64 lines
2.9 KiB
ArmAsm
64 lines
2.9 KiB
ArmAsm
; _TBMaskedPrioritySpriteTile
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;
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; Renders a composited tile with masking to the code field. The sprite is underlaid
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_TBMaskedPrioritySpriteTile_00
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_TBMaskedPrioritySpriteTile_0H
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sta _X_REG ; Immedately stash the parameters
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sty _Y_REG
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jsr _TBCopyTileDataToCBuff ; Copy the tile data into the compositing buffer (using correct x-register)
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jsr _TBCopyTileMaskToCBuff ; Copy the tile mask into the compositing buffer (using correct x-register)
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jsr _TBUnderlaySpriteDataAndMask ; Underlay the data and mask from the sprite plane into the compositing buffer
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jmp _TBMaskedCBuff ; Render the masked tile from the compositing buffer into the code field
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;_TBMaskedPrioritySpriteTile_0H
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; sta _X_REG
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; sty _Y_REG
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; jsr _TBCopyTileDataToCBuffH
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; jsr _TBCopyTileMaskToCBuffH
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; jsr _TBUnderlaySpriteDataAndMask
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; jmp _TBMaskedCBuff
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_TBMaskedPrioritySpriteTile_V0
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_TBMaskedPrioritySpriteTile_VH
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sta _X_REG
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sty _Y_REG
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jsr _TBCopyTileDataToCBuffV
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jsr _TBCopyTileMaskToCBuffV
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jsr _TBUnderlaySpriteDataAndMask
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jmp _TBMaskedCBuff
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;_TBMaskedPrioritySpriteTile_VH
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; sta _X_REG
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; sty _Y_REG
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; jsr _TBCopyTileDataToCBuffVH
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; jsr _TBCopyTileMaskToCBuffVH
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; jsr _TBUnderlaySpriteDataAndMask
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; jmp _TBMaskedCBuff
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_TBUnderlaySpriteDataAndMask
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ldx _SPR_X_REG ; set to the unaligned tile block address in the sprite plane
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]line equ 0
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lup 8
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ldal spritedata+{]line*SPRITE_PLANE_SPAN},x
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and blttmp+{]line*4}+32
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ora blttmp+{]line*4} ; Maybe this can be a TSB???
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sta blttmp+{]line*4}
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ldal spritemask+{]line*SPRITE_PLANE_SPAN},x
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and blttmp+{]line*4}+32
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sta blttmp+{]line*4}+32
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ldal spritedata+{]line*SPRITE_PLANE_SPAN}+2,x
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and blttmp+{]line*4}+32+2
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ora blttmp+{]line*4}+2
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sta blttmp+{]line*4}+2
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ldal spritemask+{]line*SPRITE_PLANE_SPAN}+2,x
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and blttmp+{]line*4}+32+2
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sta blttmp+{]line*4}+32+2
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]line equ ]line+1
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--^
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rts
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