mirror of
https://github.com/lscharen/iigs-game-engine.git
synced 2024-06-02 07:41:35 +00:00
95058fb969
All of the sprite rendering has been deferred down to the level of
the tile drawing. Sprites are no longer drawn/erased, but instead
a sprite sheet is generated in AddSprite and referenced by the
renderer.
Because there is no longer a single off-screen buffer that holds
a copy of all the rendered sprites, the TileStore size must be
expanded to hold a reference to the sprite data address fo each
tile. This increase in data structure size require the TileStore
to be put into its own bank and appropriate code restructuring.
The benefits to the rewrite are significant:
1. Sprites are never drawn/erased off-screen. They are only
ever drawn directly to the screen or play field.
2. The concept of "damaged" sprites is gone. Every dirty tile
automatically renders just to portion of a sprite that it
intersects.
These two properties result in a substantial increase in throughput.
347 lines
11 KiB
ArmAsm
347 lines
11 KiB
ArmAsm
****************************************
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* Basic Error Macro *
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****************************************
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_Err mac
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bcc NoErr
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do ]0 ; (DO if true)
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jsr PgmDeath ; this is conditionally compiled if
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str ]1 ; we pass in an error statement
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else ; (ELSE)
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jmp PgmDeath0 ; we just call the simpler error handler
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fin ; (FIN)
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NoErr eom
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;
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; Dereference a handle that is on the top of the stack
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;
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_Deref MAC
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phb ; save caller's data bank register
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pha ; push high word of handle on stack
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plb ; sets B to the bank byte of the pointer
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lda |$0002,x ; load the high word of the master pointer
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pha ; and save it on the stack
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lda |$0000,x ; load the low word of the master pointer
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tax ; and return it in X
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pla ; restore the high word in A
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plb ; pull the handle's high word high byte off the
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; stack
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plb ; restore the caller's data bank register
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<<<
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_Mul128 mac
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asl
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asl
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asl
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asl
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asl
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asl
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asl
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<<<
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; Possible optimization (assumes accumulator is <512). 8 cycles/5 bytes vs 14 cycles/7 bytes
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; cmp #$0100
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; xba
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; ror
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_Div16 mac
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lsr
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lsr
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lsr
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lsr
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<<<
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_R0W0 mac ; Read Bank 0 / Write Bank 0
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ldal STATE_REG
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and #$FFCF
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stal STATE_REG
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<<<
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_R0W1 mac ; Read Bank 0 / Write Bank 1
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ldal STATE_REG
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ora #$0010
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stal STATE_REG
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<<<
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_R1W1 mac ; Read Bank 0 / Write Bank 1
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ldal STATE_REG
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ora #$0030
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stal STATE_REG
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<<<
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_PushReg mac ; Used to save/restore registers when calling subroutines.
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pha
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phx
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phy
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<<<
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_PullReg mac
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ply
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plx
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pla
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<<<
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_PushReg2 mac ; Variation to also save the P-register to preserve m/x
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pha
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phx
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phy
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php
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<<<
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_PullReg2 mac
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plp
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ply
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plx
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pla
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<<<
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jne mac
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beq *+5
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jmp ]1
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<<<
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jeq mac
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bne *+5
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jmp ]1
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<<<
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jcc mac
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bcs *+5
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jmp ]1
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<<<
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jcs mac
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bcc *+5
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jmp ]1
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<<<
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min mac
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cmp ]1
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bcc mout
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lda ]1
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mout <<<
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; Increment a value mod some number.
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incmod mac
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inc
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cmp ]1
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bcc out
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lda #0
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out <<<
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decmod mac
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dec
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bpl out
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lda ]1
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dec
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out <<<
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adcmod mac
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adc ]1
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cmp ]2
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bcc out
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sbc ]2
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out <<<
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sbcmod mac
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sbc ]1
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bpl out
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clc
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adc ]2
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out <<<
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asr16 mac
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cmp #$8000
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ror
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<<<
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asr8 mac
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cmp #$80
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ror
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<<<
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; Inline macros for fast calculation of some internal values
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_TileStoreOffset mac
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lda ]2
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asl
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tay
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lda ]1
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asl ; Assume in range, so asl puts a 0 bit into the carry
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adc TileStoreYTable,y
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<<<
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_TileStoreOffsetX mac
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lda ]2
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asl
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tax
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lda ]1
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asl ; Assume in range, so asl puts a 0 bit into the carry
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adc TileStoreYTable,x
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<<<
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; Macro to define script steps
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ScriptStep MAC
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IF #=]5
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dw {]1+{{]5&#$000F}<<8}},]2,]3,]4
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ELSE
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dw ]1,]2,]3,]4
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FIN
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<<<
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; A specialized CopyMaskedWord macro that draws a tile from a direct page workspace. Used
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; to render fringe tiles and sprite tiles when BG1 is active. If there is no second background,
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; then one should use the optimized functions which assumes a PEA opcode and only
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; needs to copy data words
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;
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; ]1 : tiledata direct page address , the tilemask direct page address is tiledata + 32
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; ]2 : code field offset
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CopyMaskedWordD MAC
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lda ]1+32 ; load the mask value
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bne mixed ; a non-zero value may be mixed
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; This is a solid word
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lda #$00F4 ; PEA instruction
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sta: ]2,y
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lda ]1 ; load the tile data
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sta: ]2+1,y ; PEA operand
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bra next
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mixed cmp #$FFFF ; All 1's in the mask is fully transparent
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beq transparent
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; This is the slowest path because there is a *lot* of work to do. So much that it's
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; worth it to change up the environment to optimize things a bit more.
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;
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; Need to fill in the first 10 bytes of the JMP handler with the following code sequence
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;
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; lda (00),y
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; and #MASK
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; ora #DATA
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lda #$004C ; JMP instruction
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sta: ]2,y
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ldx _X_REG ; Get the addressing offset
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ldal JTableOffset,x ; Get the address offset and add to the base address
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adc _BASE_ADDR ; of the current code field line
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adc #{]2&$F000} ; adjust for the current row offset
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sta: ]2+1,y
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tay ; This becomes the new address that we use to patch in
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txa ; Get the offset and render a LDA (dp),y instruction
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sep #$20
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sta: $0001,y ; LDA (00),y operand
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lda #$B1
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sta: $0000,y ; LDA (00),y opcode
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lda #$29
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sta: $0002,y ; AND #$0000 opcode
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lda #$09
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sta: $0005,y ; ORA #$0000 opcode
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rep #$20
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lda ]1+32 ; insert the tile mask and data into the exception
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sta: $0003,y ; handler.
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lda ]1
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sta: $0006,y
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lda #$0D80 ; branch to the prologue (BRA *+15)
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sta: $0008,y
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ldy _Y_REG ; restore original y-register value and move on
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bra next
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; This is a transparent word, so just show the second background layer
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transparent
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lda #$00B1 ; LDA (dp),y instruction
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sta: ]2,y
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lda _X_REG ; X is the logical tile offset (0, 2, 4, ... 82) left-to-right
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ora #$4800 ; put a PHA after the offset
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sta: ]2+1,y
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next
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eom
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; Macros to use in the Masked Tile renderer
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;
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; ]1 : tiledata offset
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; ]2 : tilemask offset
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; ]3 : code field offset
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CopyMaskedWord MAC
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ldal ]2,x ; load the mask value
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bne mixed ; a non-zero value may be mixed
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; This is a solid word
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lda #$00F4 ; PEA instruction
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sta: ]3,y
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ldal ]1,x ; load the tile data
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sta: ]3+1,y ; PEA operand
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bra next
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mixed cmp #$FFFF ; All 1's in the mask is fully transparent
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beq transparent
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; This is the slowest path because there is a *lot* of work to do. So much that it's
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; worth it to change up the environment to optimize things a bit more.
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;
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; Need to fill in the first 8 bytes of the JMP handler with the following code sequence
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;
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; lda (00),y
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; and #MASK
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; ora #DATA
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lda #$004C ; JMP instruction
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sta: ]3,y
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ldx _X_REG ; Get the addressing offset
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ldal JTableOffset,x ; Get the address offset and add to the base address
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ora _BASE_ADDR ; of the current code field row (2 rows per bank) $0000 or $8000
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ora #{]3&$7000} ; adjust for the current line offset within the row
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sta: ]3+1,y
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tay ; This becomes the new address that we use to patch in
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txa ; Get the offset and render a LDA (dp),y instruction
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sep #$20
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sta: $0001,y ; LDA (00),y operand
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lda #$B1
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sta: $0000,y ; LDA (00),y opcode
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lda #$29
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sta: $0002,y ; AND #$0000 opcode
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lda #$09
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sta: $0005,y ; ORA #$0000 opcode
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rep #$20
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ldx _T_PTR ; restore the original x-register value
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ldal ]2,x ; insert the tile mask and data into the exception
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sta: $0003,y ; handler.
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ldal ]1,x
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sta: $0006,y
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; Copy the top 9 bytes down. We have 23 bytes of space and are only using 8. Since 9 + 8 = 17 < 23, we
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; can save 3 cycles per word by eliminating the BRA instruction
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; lda #$0D80 ; branch to the prologue (BRA *+15)
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; sta: $0008,y
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lda: $0017,y
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sta: $0008,y
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lda: $0019,y
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sta: $000A,y
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lda: $001B,y
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sta: $000C,y
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lda: $001D,y
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sta: $000E,y
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lda: $001E,y
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sta: $000F,y
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ldy _Y_REG ; restore original y-register value and move on
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bra next
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; This is a transparent word, so just show the second background layer
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transparent
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lda #$00B1 ; LDA (dp),y instruction
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sta: ]3,y
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lda _X_REG ; X is the logical tile offset (0, 2, 4, ... 82) left-to-right
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ora #$4800 ; put a PHA after the offset
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sta: ]3+1,y
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next
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eom
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