420 lines
5.3 KiB
ArmAsm
420 lines
5.3 KiB
ArmAsm
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lst off
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rel
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xc
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xc
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mx %11
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cas se
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use vt.equ
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use debug
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SCCBREG equ $c038
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SCCAREG equ $c039
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SCCBDATA equ $c03a
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SCCADATA equ $c03b
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SerFlag equ $e10104 ;
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*
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* scc speed:
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*
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* time constant = ( clock / (2 * clock mode * baud rate)) - 2
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* baud rate = clock / ( 2 * clock mode * (time constant + 2))
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*
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* clock mode = 1x, 16x, 32x, or 64x (selected via write register 4 bits 6/7)
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* clock = 3.6864 MHz crystal (scc runs at 14.31818 / 4 = ~ 3.58 Mhz)
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* time constant = write register 12 (low) + 13 (high)
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*
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*
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* see IIgs TN #18 - Do-It-Yourself SCC Access
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modem_startup ent
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enable_modem ent
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* sep #$30
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php
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sei
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stz read_q_head
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stz read_q_tail
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stz write_q_head
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stz write_q_tail
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* zero out the buffer [for CDA debugger]
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ldx #0
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]loop stz read_buffer,x
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inx
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bne ]loop
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lda SCCBREG ; sync access
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ldx #0
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]loop
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lda :table,x
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bmi :done
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sta SCCBREG
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inx
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lda :table,x
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sta SCCBREG
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inx
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bra ]loop
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:done
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* adjust SerFlag so serial IRQs will be handled.
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lda >SerFlag
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ora #%00_000_111 ; channel B interrupts.
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sta >SerFlag
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plp
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rts
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:table ; register, value
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* db 9,%01_0_1_0_0_0_1 ; reset channel B (modem port) - handled @ startup.
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db 4,%01_00_01_0_0 ; x16 clock, 1 stop bit, no parity
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db 3,%11_0_0_0_0_0_0 ; 8 bits, rx disabled
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db 5,%0_11_0_0_0_1_0 ; 8 bits, RTS
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db 11,%0_10_10_0_00 ; modem port, rcv/tx clock = br
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db 12,10 ; 9600 baud (low)
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db 13,0 ; 9600 baud (high)
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db 14,0 ; disable baud rate generator
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db 14,%000_0_0_0_0_1 ; enable baud rate generator
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db 3,%11_0_0_0_0_0_1 ; 8 bits, rx enabled
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db 5,%0_11_0_1_0_1_0 ; 8 bits, tx enabled, RTS
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db 15,0 ; disable external interrupts
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db 0,%00_010_0_00 ; reset ext/status interrupts
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db 1,%0_0_0_10_0_0_0 ; interrupts on rx or special condition
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db 9,%00_0_0_1_0_1_0 ; master interrupts enabled.
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db -1,-1
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disable_modem ent
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* local mode
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mx %11
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php
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sei
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lda SCCBREG ; sync access
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lda #9
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sta SCCBREG
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lda #%01_0_1_0_0_0_1 ; reset channel B.
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sta SCCBREG
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stz read_q_head
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stz read_q_tail
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stz write_q_head
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stz write_q_tail
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plp
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rts
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modem_shutdown ent
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mx %11
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php
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sei
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lda SCCBREG ; sync access
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lda #9
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sta SCCBREG
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lda #%01_0_1_0_0_0_1 ; reset channel B.
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sta SCCBREG
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lda >SerFlag
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and #%11_111_000 ; channel B interrupts.
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sta >SerFlag
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plp
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rts
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write_modem_sync ent
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mx %11
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* a: byte to send
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tay ; save
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* ldx #0
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php
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:mask = %0010_0100 ; tx buffer empty, clear to send
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:wait
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cli ; guard scc register access.
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sei
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stz SCCBREG
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lda SCCBREG
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and #:mask
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cmp #:mask
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bne :wait
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sty SCCBDATA
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plp
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rts
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read_modem_sync ent
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* c set if data read
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* v set if overrun
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mx %11
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* ldx #0
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rep #$41 ; clear C + V
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stz SCCBREG
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lda SCCBREG
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and #%0001
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beq :rts
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* read reg 1 for overrun
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lda #1
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sta SCCBREG
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lda SCCBREG
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and #%0010_0000
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beq :ok
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* clear the overrun
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lda #$30 ; reg0, error reset.
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sta SCCBREG
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stz SCCBREG
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sep #$40 ; V
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:ok
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* lda #8
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* sta SCCBREG
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* lda SCCBREG
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lda SCCBDATA
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* debugging...
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sec
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:rts rts
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write_buffer equ $1d00
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read_buffer equ $1e00
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modem_vector ent
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jml modem_int
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modem_int
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*
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* called in 8-bit native mode, interrupts disabled.
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* d = unknown
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* a/x/y don't need to be preserved.
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* return carry clear if handled, carry set if not.
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* doesn't access direct page.
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* check/clear overrun?
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*
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* n.b. - vt100 would drop $00 and $7f characters here - I drop them later.
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*
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mx %11
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phb
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phk
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plb
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lda SCCBREG ; sync
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stz SCCBREG
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lda SCCBREG
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and #%0000_0001 ; rx ready.
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beq :nope
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:read
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lda SCCBDATA
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ldx DPAGE+read_q_head
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sta read_buffer,x
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inc DPAGE+read_q_head
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* more?
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stz SCCBREG
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lda SCCBREG
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and #%0000_0001 ; rx ready.
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bne :read
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clc
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bra :finish
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:nope
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sec
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:finish
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* reset errors.
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lda #%00_110_000
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stz SCCBREG
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sta SCCBREG
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* reset highest ius
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lda #%00_111_000
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stz SCCBREG
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sta SCCBREG
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plb
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rtl
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modem_io ent
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debug modem_io
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mx %11
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php
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sei
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bit LOCAL
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bmi :local
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:write
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* send any outbound data...
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:mask = %0010_0100 ; tx buffer empty, clear to send
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ldx write_q_tail
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cpx write_q_head
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beq :read
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lda SCCBREG ; sync
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stz SCCBREG
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lda SCCBREG
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and #:mask
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cmp #:mask
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bne :read
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* ldx write_q_tail
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lda write_buffer,x
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sta SCCBDATA
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inc write_q_tail
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:read
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ldx read_q_tail
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cpx read_q_head
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beq :nope
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lda read_buffer,x
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inc read_q_tail
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* $00 and $7f dropped here.
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and #$7f
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beq :read
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cmp #$7f
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beq :read
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plp
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sec
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rts
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:nope
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plp
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clc
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rts
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:local
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ldx write_q_tail
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cpx write_q_head
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beq :nope
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lda write_buffer,x
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inc write_q_tail
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plp
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sec
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rts
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write_modem ent
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write_modem_async ent
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mx %11
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php
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sei
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* bit LOCAL
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* bmi :local
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ldx write_q_head
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sta write_buffer,x
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inc write_q_head
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plp
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rts
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*:local
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* ldx read_q_head
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* sta read_buffer,x
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* inc read_q_head
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* plp
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* rts
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write_modem_str ent
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; y = address of string (0-terminated)
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; inc write_q_head vs inx
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; because it wraps at $ff
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mx %10
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php
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sei
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* bit LOCAL
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* bmi :local
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:loop lda |$0000,y
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beq :fini
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ldx write_q_head
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sta write_buffer,x
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inc write_q_head
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iny
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bra :loop
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*:local lda |$0000,y
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* beq :fini
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* ldx read_q_head
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* sta read_buffer,x
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* inc read_q_head
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* iny
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* bra :local
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:fini
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plp
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rts
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read_modem ent
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read_modem_async ent
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mx %11
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php
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sei
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ldx read_q_tail
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cpx read_q_head
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beq :nope
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lda read_buffer,x
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inc read_q_tail
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plp
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sec
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rts
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:nope
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plp
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clc
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rts
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reset_modem_buffer ent
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mx %11
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php
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sei
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stz read_q_head
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stz read_q_tail
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stz write_q_head
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stz write_q_tail
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plp
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rts
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*buffer ds 256
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sav vt100.modem.L
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