293 lines
3.6 KiB
ArmAsm
293 lines
3.6 KiB
ArmAsm
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lst off
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rel
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xc
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xc
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mx %11
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cas se
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* use vt.equ
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SCCBREG equ $c038
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SCCAREG equ $c039
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SCCBDATA equ $c03a
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SCCADATA equ $c03b
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SerFlag equ $e10104 ;
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*
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* scc speed:
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*
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* time constant = ( clock / (2 * clock mode * baud rate)) - 2
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* baud rate = clock / ( 2 * clock mode * (time constant + 2))
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*
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* clock mode = 1x, 16x, 32x, or 64x (selected via write register 4 bits 6/7)
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* clock = 3.6864 MHz crystal (scc runs at 14.31818 / 4 = ~ 3.58 Mhz)
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* time constant = write register 12 (low) + 13 (high)
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*
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*
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* see IIgs TN #18 - Do-It-Yourself SCC Access
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init_modem ent
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* sep #$30
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stz q_head
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stz q_tail
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* reset channel B (modem port)
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ldx #9
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lda #%01_0_1_0_0_0_1
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stx SCCBREG
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sta SCCBREG
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nop
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nop
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* x16 clock mode, 1 stop bit, no parity
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ldx #4
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lda #%01_00_01_0_0
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stx SCCBREG
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sta SCCBREG
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* 8 bits/char, rx disabled.
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ldx #3
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lda #%11_0_0_0_0_0_0
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stx SCCBREG
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sta SCCBREG
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* 8 data bits, RTS
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ldx #5
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lda #%0_11_0_0_0_1_0
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stx SCCBREG
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sta SCCBREG
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* bit 7 = 1 for printer port, 0 for modem port.
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* 5/6 = (%10) rcv clock = br output
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* 4/3 = (%10) tx clock = br output
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ldx #11
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lda #%0_10_10_0_00
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stx SCCBREG
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sta SCCBREG
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* 9600 baud
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ldx #12
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lda #10
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stx SCCBREG
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sta SCCBREG
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* 9600 baud
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ldx #13
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lda #0
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stx SCCBREG
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sta SCCBREG
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* disable baud rate generator
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ldx #14
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lda #0
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stx SCCBREG
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sta SCCBREG
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* enable baud rate generator
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ldx #14
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lda #%000_0_0_0_0_1
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stx SCCBREG
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sta SCCBREG
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* 8 bits/char, rx enabled.
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ldx #3
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lda #%11_0_0_0_0_0_1
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stx SCCBREG
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sta SCCBREG
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* 8 data bits, tx enabled, RTS
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ldx #5
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lda #%0_11_0_1_0_1_0
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stx SCCBREG
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sta SCCBREG
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* disable interrupts
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ldx #15
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lda #0
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stx SCCBREG
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sta SCCBREG
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* reset ext/status interrupts
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ldx #0
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lda #%00_010_0_00
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stx SCCBREG
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sta SCCBREG
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* enable interrupts
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ldx #1
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* lda #0
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lda #%0_0_0_10_0_0_0 ; inr on rx or special condition.
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stx SCCBREG
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sta SCCBREG
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* reset ch b ptr to 0?
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lda SCCBREG
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* no vector, master interrupts enabled
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ldx #9
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lda #%00_0_0_1_0_1_0
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stx SCCBREG
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sta SCCBREG
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nop
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nop
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* adjust SerFlag so serial IRQs will be handled.
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lda >SerFlag
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ora #%00_000_111 ; channel B interrupts.
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sta >SerFlag
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rts
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write_modem ent
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mx %11
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* a: byte to send
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tay ; save
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* ldx #0
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:mask = %0010_0100 ; tx buffer empty, clear to send
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:wait stz SCCBREG
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lda SCCBREG
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and #:mask
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cmp #:mask
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bne :wait
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sty SCCBDATA
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rts
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read_modem_sync ent
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* c set if data read
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* v set if overrun
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mx %11
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* ldx #0
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rep #$41 ; clear C + V
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stz SCCBREG
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lda SCCBREG
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and #%0001
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beq :rts
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* read reg 1 for overrun
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lda #1
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sta SCCBREG
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lda SCCBREG
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and #%0010_0000
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beq :ok
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* indicate overrun...
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lda #"x"
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sta |$07d0+20
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* clear the overrun
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lda #$30 ; reg0, error reset.
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sta SCCBREG
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stz SCCBREG
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sep #$40 ; V
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:ok
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* lda #8
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* sta SCCBREG
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* lda SCCBREG
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lda SCCBDATA
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* debugging...
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ldx :debug
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sta $1e00,x
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inc :debug
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sec
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:rts rts
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:debug ds 2
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buffer equ $1d00
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modem_vector ent
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jml modem_int
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modem_int
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*
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* called in 8-bit native mode, interrupts disabled.
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* d = unknown
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* a/x/y don't need to be preserved.
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* return carry clear if handled, carry set if not.
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* check/clear overrun?
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mx %11
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phb
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phk
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plb
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stz SCCBREG
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lda SCCBREG
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and #%0000_0001 ; rx ready.
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beq :nope
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:read
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lda SCCBDATA
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ldx q_tail
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sta buffer,x
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inc q_tail
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* more?
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stz SCCBREG
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lda SCCBREG
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and #%0000_0001 ; rx ready.
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bne :read
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clc
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bra :finish
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:nope
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sec
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:finish
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* reset errors.
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lda #%00_110_000
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stz SCCBREG
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sta SCCBREG
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* reset highest ius
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lda #%00_111_000
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stz SCCBREG
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sta SCCBREG
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plb
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rtl
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read_modem ent
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read_modem_async ent
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mx %11
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php
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sei
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ldx q_head
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cpx q_tail
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beq :nope
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lda buffer,x
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inc q_head
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plp
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sec
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rts
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:nope
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plp
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clc
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rts
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q_head ds 2
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q_tail ds 2
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*buffer ds 256
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sav vt100.modem.L
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