@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":496:2:496:3|Pruning register CLK_OUT_PRE_33  
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":140:32:140:34|Pruning register CLK_REF(1 downto 0)  
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":112:29:112:31|Pruning register DTACK_D0  
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":133:34:133:36|Pruning register CLK_000_D4  
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":132:34:132:36|Pruning register CLK_000_D3  
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:34:131:36|Pruning register CLK_000_D2  
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":126:35:126:37|Pruning register CLK_OUT_NE  
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":161:2:161:3|Pruning register CLK_CNT_P(1 downto 0)  
@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":148:2:148:3|Pruning register CLK_CNT_N(1 downto 0)  
@W: CL265 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":135:61:135:75|Pruning bit 12 of CLK_000_N_SYNC(12 downto 0) -- not in use ... 
@W: CL271 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":105:36:105:38|Pruning bits 12 to 10 of CLK_000_P_SYNC(12 downto 0) -- not in use ... 

