diff --git a/Logic/68030-68000-bus.vhd b/Logic/68030-68000-bus.vhd index e6dc186..6c4f565 100644 --- a/Logic/68030-68000-bus.vhd +++ b/Logic/68030-68000-bus.vhd @@ -62,7 +62,8 @@ end BUS68030; architecture Behavioral of BUS68030 is -- values are determined empirically -constant DS_SAMPLE : integer := 12; -- for 7.09 MHz Clock with a base clock of 100Mhz and CPU running at 50MHZ +constant DS_SAMPLE : integer := 10; -- for 7.09 MHz Clock with a base clock of 100Mhz and CPU running at 25MHZ +--constant DS_SAMPLE : integer := 12; -- for 7.09 MHz Clock with a base clock of 100Mhz and CPU running at 50MHZ @@ -160,8 +161,8 @@ begin --here the clock is selected - --CLK_OUT_PRE_D <= CLK_OUT_PRE_25; - CLK_OUT_PRE_D <= CLK_OUT_PRE_50; + CLK_OUT_PRE_D <= CLK_OUT_PRE_25; + --CLK_OUT_PRE_D <= CLK_OUT_PRE_50; -- the external clock to the processor is generated here CLK_OUT_INT <= CLK_OUT_PRE_D; --this way we know the clock of the next state: Its like looking in the future, cool! @@ -257,12 +258,13 @@ begin --bgack is simple: assert as soon as Amiga asserts but hold bg_ack for one amiga-clock if(BGACK_000='0') then BGACK_030_INT <= '0'; + --BGACK_030_INT_PRE<= '0'; elsif ( BGACK_000='1' AND CLK_000_PE='1' AND AS_000 = '1' --the amiga AS can be still active while bgack is deasserted, so wait for this signal too! ) then -- BGACK_000 is high here! - BGACK_030_INT_PRE<= '1'; - BGACK_030_INT <= BGACK_030_INT_PRE; --hold this signal high until 7m clock goes low + --BGACK_030_INT_PRE<= '1'; + BGACK_030_INT <= '1'; --hold this signal high until 7m clock goes low end if; BGACK_030_INT_D <= BGACK_030_INT; @@ -339,7 +341,7 @@ begin case (SM_AMIGA) is when IDLE_P => --68000:S0 wait for a falling edge RW_000_INT <= '1'; - if( CLK_000_D(1)='0' and CLK_000_D(2)= '1' and AS_030_000_SYNC = '0' and nEXP_SPACE ='1')then -- if this a delayed expansion space detection, do not start an amiga cycle! + if( CLK_000_D(0)='0' and CLK_000_D(1)= '1' and AS_030_000_SYNC = '0' and nEXP_SPACE ='1')then -- if this a delayed expansion space detection, do not start an amiga cycle! SM_AMIGA<=IDLE_N; --go to s1 end if; when IDLE_N => --68000:S1 place Adress on bus and wait for rising edge, on a rising CLK_000 look for a amiga adressrobe @@ -363,7 +365,6 @@ begin SM_AMIGA <= SAMPLE_DTACK_P; end if; when SAMPLE_DTACK_P=> --68000:S4 wait for dtack or VMA - DS_000_ENABLE <= '1'; if( CLK_000_NE='1' and --falling edge ((VPA_D = '1' AND DTACK_D0='0') OR --DTACK end cycle (VPA_D='0' AND cpu_est=E9 AND VMA_INT='0')) --VPA end cycle @@ -371,18 +372,17 @@ begin SM_AMIGA<=DATA_FETCH_N; end if; when DATA_FETCH_N=> --68000:S5 nothing happens here just wait for positive clock - DS_000_ENABLE <= '1'; if(CLK_000_PE = '1')then --go to s6 SM_AMIGA<=DATA_FETCH_P; end if; when DATA_FETCH_P => --68000:S6: READ: here comes the data on the bus! - DS_000_ENABLE <= '1'; if( (CLK_000_D(DS_SAMPLE-2)='0' AND CLK_000_D((DS_SAMPLE-1))='1' AND not (CLK_030 ='1' and CLK_OUT_PRE_D='0')) OR (CLK_000_D(DS_SAMPLE-1)='0' AND CLK_000_D((DS_SAMPLE-0))='1' )) then --go to s7 next 030-clock is not a falling edge: dsack is sampled at the falling edge DSACK1_INT <='0'; end if; if( CLK_000_NE ='1') then --go to s7 next 030-clock is high: dsack is sampled at the falling edge SM_AMIGA<=END_CYCLE_N; + DSACK1_INT <='0'; end if; when END_CYCLE_N =>--68000:S7: Latch/Store data. Wait here for new cycle and go to IDLE on high clock if(CLK_000_PE='1')then --go to s0 @@ -434,10 +434,8 @@ begin and AS_000='0' and(UDS_000='0' or LDS_000='0') and ( - --CYCLE_DMA ="00" or CYCLE_DMA ="01" or CYCLE_DMA ="10" - --or CYCLE_DMA ="11" ) )then --set AS_000 @@ -460,7 +458,8 @@ begin DS_000_DMA <= '1'; CLK_030_H <= '0'; end if; - end if; + end if; + end if; end process pos_clk; diff --git a/Logic/68030_TK.STY b/Logic/68030_TK.STY index 4ec41bd..1bb8e88 100644 --- a/Logic/68030_TK.STY +++ b/Logic/68030_TK.STY @@ -2,5 +2,3 @@ tool=Synplify [STRATEGY-LIST] Normal=True, 1412327082 -[TOUCHED-REPORT] -Design.tt4File=1471555574 diff --git a/Logic/68030_TK.cmi b/Logic/68030_TK.cmi index c90aea8..1437f74 100644 --- a/Logic/68030_TK.cmi +++ b/Logic/68030_TK.cmi @@ -1,8 +1,8 @@ [WINDOWS] -MAIN_WINDOW_POSITION=-7,0,967,1167 +MAIN_WINDOW_POSITION=0,0,967,1167 LEFT_PANE_WIDTH=245 CHILD_FRAME_STATE=Maximal -CHILD_WINDOW_SIZE=974,941 +CHILD_WINDOW_SIZE=967,941 CHILD_WINDOW_POS=-8,-31 [GUI SETTING] Remember_Setting=1 @@ -40,10 +40,10 @@ State=43,no Constraint Name=162,no Constraint Value=115,no [OPT WINDOWS] -MAIN_WINDOW_POSITION=0,0,1920,1200 +MAIN_WINDOW_POSITION=293,579,755,1330 CHILD_FRAME_STATE=Maximal -CHILD_WINDOW_SIZE=1920,974 -CHILD_WINDOW_POS=-8,-30 +CHILD_WINDOW_SIZE=462,525 +CHILD_WINDOW_POS=-8,-31 [OPT GUI SETTING] Remember_Setting=1 ACTIVE_SHEET=Opt Global Constraints diff --git a/Logic/68030_TK.lci b/Logic/68030_TK.lci index 80fd337..a11a0f7 100644 --- a/Logic/68030_TK.lci +++ b/Logic/68030_TK.lci @@ -12,8 +12,8 @@ EN_PinMacrocell = Yes; [Revision] Parent = m4a5.lci; -DATE = 08/18/2016; -TIME = 23:26:14; +DATE = 08/23/2016; +TIME = 20:07:14; Source_Format = Pure_VHDL; Synthesis = Synplify; @@ -26,14 +26,17 @@ Synthesis = Synplify; [Global Constraints] Spread_placement = Yes; Zero_hold_time = Yes; -Max_pterm_split = 16; -Max_pterm_collapse = 16; +Max_pterm_split = 20; +Max_pterm_collapse = 20; Nodes_collapsing_mode = Speed; Max_fanin = 32; -Set_reset_dont_care = No; +Set_reset_dont_care = Yes; Balanced_partitioning = Yes; Max_macrocell_percent = 100; Dt_synthesis = Yes; +Xor_synthesis = Yes; +Logic_reduction = Yes; +Node_collapse = Yes; [Location Assignments] layer = OFF; @@ -150,7 +153,12 @@ Default = UP; [Slewrate] FAST = CLK_DIV_OUT, CLK_EXP, FPU_CS, AMIGA_BUS_DATA_DIR, AMIGA_BUS_ENABLE_LOW, - AMIGA_ADDR_ENABLE, AMIGA_BUS_ENABLE_HIGH; + AMIGA_ADDR_ENABLE, AMIGA_BUS_ENABLE_HIGH, AS_030, A_16_, A_17_, A_18_, + A_19_, RW, SIZE_1_, SIZE_0_, AVEC, BGACK_030, BG_000, E, IPL_030_0_, IPL_030_1_, + IPL_030_2_, LDS_000, UDS_000, VMA, RESET, CIIN, A_20_, A_21_, A_22_, A_24_, + A_25_, A_26_, A_27_, A_28_, A_29_, A_30_, A_31_, DS_030, BERR, A0, DSACK1, + RW_000, AS_000, A_23_, A1, A_3_, A_2_, AHIGH_24_, AHIGH_25_, AHIGH_26_, + AHIGH_27_, AHIGH_28_, AHIGH_29_, AHIGH_30_, AHIGH_31_, A_0_; Default = Slow; [Region] diff --git a/Logic/68030_TK.lct b/Logic/68030_TK.lct index 80fd337..a11a0f7 100644 --- a/Logic/68030_TK.lct +++ b/Logic/68030_TK.lct @@ -12,8 +12,8 @@ EN_PinMacrocell = Yes; [Revision] Parent = m4a5.lci; -DATE = 08/18/2016; -TIME = 23:26:14; +DATE = 08/23/2016; +TIME = 20:07:14; Source_Format = Pure_VHDL; Synthesis = Synplify; @@ -26,14 +26,17 @@ Synthesis = Synplify; [Global Constraints] Spread_placement = Yes; Zero_hold_time = Yes; -Max_pterm_split = 16; -Max_pterm_collapse = 16; +Max_pterm_split = 20; +Max_pterm_collapse = 20; Nodes_collapsing_mode = Speed; Max_fanin = 32; -Set_reset_dont_care = No; +Set_reset_dont_care = Yes; Balanced_partitioning = Yes; Max_macrocell_percent = 100; Dt_synthesis = Yes; +Xor_synthesis = Yes; +Logic_reduction = Yes; +Node_collapse = Yes; [Location Assignments] layer = OFF; @@ -150,7 +153,12 @@ Default = UP; [Slewrate] FAST = CLK_DIV_OUT, CLK_EXP, FPU_CS, AMIGA_BUS_DATA_DIR, AMIGA_BUS_ENABLE_LOW, - AMIGA_ADDR_ENABLE, AMIGA_BUS_ENABLE_HIGH; + AMIGA_ADDR_ENABLE, AMIGA_BUS_ENABLE_HIGH, AS_030, A_16_, A_17_, A_18_, + A_19_, RW, SIZE_1_, SIZE_0_, AVEC, BGACK_030, BG_000, E, IPL_030_0_, IPL_030_1_, + IPL_030_2_, LDS_000, UDS_000, VMA, RESET, CIIN, A_20_, A_21_, A_22_, A_24_, + A_25_, A_26_, A_27_, A_28_, A_29_, A_30_, A_31_, DS_030, BERR, A0, DSACK1, + RW_000, AS_000, A_23_, A1, A_3_, A_2_, AHIGH_24_, AHIGH_25_, AHIGH_26_, + AHIGH_27_, AHIGH_28_, AHIGH_29_, AHIGH_30_, AHIGH_31_, A_0_; Default = Slow; [Region] diff --git a/Logic/68030_TK.tcl b/Logic/68030_TK.tcl index 3cf99e5..aa7c36e 100644 --- a/Logic/68030_TK.tcl +++ b/Logic/68030_TK.tcl @@ -370935,3 +370935,24526 @@ file delete 68030_tk.rss ########## Tcl recorder end at 08/19/16 00:39:48 ########### + +########## Tcl recorder starts at 08/21/16 01:25:28 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:25:28 ########### + + +########## Tcl recorder starts at 08/21/16 01:25:29 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:25:29 ########### + + +########## Tcl recorder starts at 08/21/16 01:25:59 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:25:59 ########### + + +########## Tcl recorder starts at 08/21/16 01:25:59 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:25:59 ########### + + +########## Tcl recorder starts at 08/21/16 01:27:31 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:27:31 ########### + + +########## Tcl recorder starts at 08/21/16 01:27:31 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:27:31 ########### + + +########## Tcl recorder starts at 08/21/16 01:30:18 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:30:18 ########### + + +########## Tcl recorder starts at 08/21/16 01:30:18 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:30:18 ########### + + +########## Tcl recorder starts at 08/21/16 01:35:01 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:35:01 ########### + + +########## Tcl recorder starts at 08/21/16 01:35:02 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:35:02 ########### + + +########## Tcl recorder starts at 08/21/16 01:36:19 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:36:19 ########### + + +########## Tcl recorder starts at 08/21/16 01:36:20 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:36:20 ########### + + +########## Tcl recorder starts at 08/21/16 01:38:53 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:38:53 ########### + + +########## Tcl recorder starts at 08/21/16 01:38:53 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:38:53 ########### + + +########## Tcl recorder starts at 08/21/16 01:47:26 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:47:26 ########### + + +########## Tcl recorder starts at 08/21/16 01:47:27 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:47:27 ########### + + +########## Tcl recorder starts at 08/21/16 01:47:49 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:47:49 ########### + + +########## Tcl recorder starts at 08/21/16 01:47:50 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:47:50 ########### + + +########## Tcl recorder starts at 08/21/16 01:48:02 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:48:02 ########### + + +########## Tcl recorder starts at 08/21/16 01:48:02 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:48:02 ########### + + +########## Tcl recorder starts at 08/21/16 01:49:08 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:49:08 ########### + + +########## Tcl recorder starts at 08/21/16 01:49:08 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:49:08 ########### + + +########## Tcl recorder starts at 08/21/16 01:50:35 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:50:35 ########### + + +########## Tcl recorder starts at 08/21/16 01:50:35 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:50:35 ########### + + +########## Tcl recorder starts at 08/21/16 01:50:58 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:50:58 ########### + + +########## Tcl recorder starts at 08/21/16 01:50:58 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:50:58 ########### + + +########## Tcl recorder starts at 08/21/16 01:51:35 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:51:35 ########### + + +########## Tcl recorder starts at 08/21/16 01:51:35 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:51:35 ########### + + +########## Tcl recorder starts at 08/21/16 01:52:17 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:52:17 ########### + + +########## Tcl recorder starts at 08/21/16 01:52:17 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:52:17 ########### + + +########## Tcl recorder starts at 08/21/16 01:55:20 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:55:20 ########### + + +########## Tcl recorder starts at 08/21/16 01:55:20 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:55:20 ########### + + +########## Tcl recorder starts at 08/21/16 01:57:20 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:57:20 ########### + + +########## Tcl recorder starts at 08/21/16 01:57:20 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:57:20 ########### + + +########## Tcl recorder starts at 08/21/16 01:57:45 ########## + +# Commands to make the Process: +# Fitter Report +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 01:57:46 ########### + + +########## Tcl recorder starts at 08/21/16 02:01:09 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:01:09 ########### + + +########## Tcl recorder starts at 08/21/16 02:01:10 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:01:10 ########### + + +########## Tcl recorder starts at 08/21/16 02:03:06 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:03:06 ########### + + +########## Tcl recorder starts at 08/21/16 02:03:06 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:03:06 ########### + + +########## Tcl recorder starts at 08/21/16 02:04:56 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:04:56 ########### + + +########## Tcl recorder starts at 08/21/16 02:04:57 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:04:57 ########### + + +########## Tcl recorder starts at 08/21/16 02:05:18 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:05:18 ########### + + +########## Tcl recorder starts at 08/21/16 02:05:18 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:05:18 ########### + + +########## Tcl recorder starts at 08/21/16 02:05:51 ########## + +# Commands to make the Process: +# Constraint Editor +# - none - +# Application to view the Process: +# Constraint Editor +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -lci \"68030_tk.lct\" -touch \"68030_tk.tt4\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:05:51 ########### + + +########## Tcl recorder starts at 08/21/16 02:06:24 ########## + +# Commands to make the Process: +# Optimization Constraint +# - none - +# Application to view the Process: +# Optimization Constraint +if [catch {open opt_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file opt_cmd.rs2: $rspFile" +} else { + puts $rspFile "-global -lci 68030_tk.lct -touch 68030_tk.imp +" + close $rspFile +} +if [runCmd "\"$cpld_bin/optedit\" @opt_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:06:24 ########### + + +########## Tcl recorder starts at 08/21/16 02:07:06 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:07:06 ########### + + +########## Tcl recorder starts at 08/21/16 02:07:27 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:07:27 ########### + + +########## Tcl recorder starts at 08/21/16 02:07:48 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:07:48 ########### + + +########## Tcl recorder starts at 08/21/16 02:08:47 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:08:47 ########### + + +########## Tcl recorder starts at 08/21/16 02:08:47 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:08:47 ########### + + +########## Tcl recorder starts at 08/21/16 02:09:17 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:09:17 ########### + + +########## Tcl recorder starts at 08/21/16 02:09:30 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:09:30 ########### + + +########## Tcl recorder starts at 08/21/16 02:09:52 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:09:52 ########### + + +########## Tcl recorder starts at 08/21/16 02:10:43 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:10:43 ########### + + +########## Tcl recorder starts at 08/21/16 02:10:43 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:10:43 ########### + + +########## Tcl recorder starts at 08/21/16 02:11:17 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:11:17 ########### + + +########## Tcl recorder starts at 08/21/16 02:11:27 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:11:27 ########### + + +########## Tcl recorder starts at 08/21/16 02:16:14 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:16:14 ########### + + +########## Tcl recorder starts at 08/21/16 02:16:14 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:16:14 ########### + + +########## Tcl recorder starts at 08/21/16 02:20:20 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:20:20 ########### + + +########## Tcl recorder starts at 08/21/16 02:20:20 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:20:20 ########### + + +########## Tcl recorder starts at 08/21/16 02:21:13 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:21:13 ########### + + +########## Tcl recorder starts at 08/21/16 02:21:13 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:21:13 ########### + + +########## Tcl recorder starts at 08/21/16 02:22:15 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:22:15 ########### + + +########## Tcl recorder starts at 08/21/16 02:22:16 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:22:16 ########### + + +########## Tcl recorder starts at 08/21/16 02:22:43 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:22:43 ########### + + +########## Tcl recorder starts at 08/21/16 02:24:53 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:24:53 ########### + + +########## Tcl recorder starts at 08/21/16 02:24:53 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:24:53 ########### + + +########## Tcl recorder starts at 08/21/16 02:31:45 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:31:45 ########### + + +########## Tcl recorder starts at 08/21/16 02:31:46 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:31:46 ########### + + +########## Tcl recorder starts at 08/21/16 02:32:36 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:32:36 ########### + + +########## Tcl recorder starts at 08/21/16 02:32:36 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:32:36 ########### + + +########## Tcl recorder starts at 08/21/16 02:33:04 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:33:04 ########### + + +########## Tcl recorder starts at 08/21/16 02:35:11 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:35:11 ########### + + +########## Tcl recorder starts at 08/21/16 02:35:11 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:35:11 ########### + + +########## Tcl recorder starts at 08/21/16 02:36:48 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:36:48 ########### + + +########## Tcl recorder starts at 08/21/16 02:36:48 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:36:48 ########### + + +########## Tcl recorder starts at 08/21/16 02:38:24 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:38:24 ########### + + +########## Tcl recorder starts at 08/21/16 02:38:24 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:38:24 ########### + + +########## Tcl recorder starts at 08/21/16 02:38:48 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:38:48 ########### + + +########## Tcl recorder starts at 08/21/16 02:39:13 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:39:13 ########### + + +########## Tcl recorder starts at 08/21/16 02:39:14 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:39:14 ########### + + +########## Tcl recorder starts at 08/21/16 02:44:29 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:44:29 ########### + + +########## Tcl recorder starts at 08/21/16 02:44:30 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:44:30 ########### + + +########## Tcl recorder starts at 08/21/16 02:44:57 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:44:57 ########### + + +########## Tcl recorder starts at 08/21/16 02:47:16 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:47:16 ########### + + +########## Tcl recorder starts at 08/21/16 02:47:16 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:47:16 ########### + + +########## Tcl recorder starts at 08/21/16 02:48:05 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:48:05 ########### + + +########## Tcl recorder starts at 08/21/16 02:50:37 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:50:37 ########### + + +########## Tcl recorder starts at 08/21/16 02:50:38 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:50:38 ########### + + +########## Tcl recorder starts at 08/21/16 02:51:03 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:51:03 ########### + + +########## Tcl recorder starts at 08/21/16 02:51:31 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:51:31 ########### + + +########## Tcl recorder starts at 08/21/16 02:51:31 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:51:31 ########### + + +########## Tcl recorder starts at 08/21/16 02:51:56 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:51:56 ########### + + +########## Tcl recorder starts at 08/21/16 02:52:23 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:52:23 ########### + + +########## Tcl recorder starts at 08/21/16 02:52:43 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:52:43 ########### + + +########## Tcl recorder starts at 08/21/16 02:52:59 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:52:59 ########### + + +########## Tcl recorder starts at 08/21/16 02:53:15 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:53:15 ########### + + +########## Tcl recorder starts at 08/21/16 02:53:27 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:53:27 ########### + + +########## Tcl recorder starts at 08/21/16 02:53:48 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:53:48 ########### + + +########## Tcl recorder starts at 08/21/16 02:56:17 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:56:17 ########### + + +########## Tcl recorder starts at 08/21/16 02:56:45 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:56:45 ########### + + +########## Tcl recorder starts at 08/21/16 02:56:46 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 02:56:46 ########### + + +########## Tcl recorder starts at 08/21/16 21:29:46 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 21:29:46 ########### + + +########## Tcl recorder starts at 08/21/16 21:29:46 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 21:29:46 ########### + + +########## Tcl recorder starts at 08/21/16 21:33:05 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 21:33:05 ########### + + +########## Tcl recorder starts at 08/21/16 21:33:06 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 21:33:06 ########### + + +########## Tcl recorder starts at 08/21/16 21:33:36 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 21:33:36 ########### + + +########## Tcl recorder starts at 08/21/16 21:34:13 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 21:34:13 ########### + + +########## Tcl recorder starts at 08/21/16 21:34:14 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 21:34:14 ########### + + +########## Tcl recorder starts at 08/21/16 21:35:03 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 21:35:03 ########### + + +########## Tcl recorder starts at 08/21/16 21:35:18 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 21:35:18 ########### + + +########## Tcl recorder starts at 08/21/16 21:35:45 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 21:35:45 ########### + + +########## Tcl recorder starts at 08/21/16 21:35:56 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 21:35:56 ########### + + +########## Tcl recorder starts at 08/21/16 21:36:06 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 21:36:06 ########### + + +########## Tcl recorder starts at 08/21/16 21:36:26 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 21:36:26 ########### + + +########## Tcl recorder starts at 08/21/16 21:36:40 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 21:36:41 ########### + + +########## Tcl recorder starts at 08/21/16 21:37:12 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 21:37:12 ########### + + +########## Tcl recorder starts at 08/21/16 21:37:27 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 21:37:27 ########### + + +########## Tcl recorder starts at 08/21/16 22:12:23 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:12:23 ########### + + +########## Tcl recorder starts at 08/21/16 22:13:32 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:13:32 ########### + + +########## Tcl recorder starts at 08/21/16 22:13:51 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:13:51 ########### + + +########## Tcl recorder starts at 08/21/16 22:14:03 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:14:03 ########### + + +########## Tcl recorder starts at 08/21/16 22:15:44 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:15:44 ########### + + +########## Tcl recorder starts at 08/21/16 22:17:53 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:17:53 ########### + + +########## Tcl recorder starts at 08/21/16 22:18:03 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:18:03 ########### + + +########## Tcl recorder starts at 08/21/16 22:18:15 ########## + +# Commands to make the Process: +# Post-Fit Pinouts +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +# Application to view the Process: +# Post-Fit Pinouts +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -postfit -lci 68030_tk.lco +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:18:15 ########### + + +########## Tcl recorder starts at 08/21/16 22:18:24 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:18:24 ########### + + +########## Tcl recorder starts at 08/21/16 22:18:41 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:18:41 ########### + + +########## Tcl recorder starts at 08/21/16 22:20:02 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:20:02 ########### + + +########## Tcl recorder starts at 08/21/16 22:20:02 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:20:02 ########### + + +########## Tcl recorder starts at 08/21/16 22:20:39 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:20:39 ########### + + +########## Tcl recorder starts at 08/21/16 22:21:32 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:21:32 ########### + + +########## Tcl recorder starts at 08/21/16 22:21:33 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:21:33 ########### + + +########## Tcl recorder starts at 08/21/16 22:28:05 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:28:05 ########### + + +########## Tcl recorder starts at 08/21/16 22:28:05 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:28:05 ########### + + +########## Tcl recorder starts at 08/21/16 22:29:18 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:29:18 ########### + + +########## Tcl recorder starts at 08/21/16 22:29:18 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:29:18 ########### + + +########## Tcl recorder starts at 08/21/16 22:30:43 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:30:43 ########### + + +########## Tcl recorder starts at 08/21/16 22:30:43 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:30:43 ########### + + +########## Tcl recorder starts at 08/21/16 22:31:04 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:31:04 ########### + + +########## Tcl recorder starts at 08/21/16 22:31:04 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/21/16 22:31:04 ########### + + +########## Tcl recorder starts at 08/22/16 19:24:42 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:24:42 ########### + + +########## Tcl recorder starts at 08/22/16 19:24:42 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:24:42 ########### + + +########## Tcl recorder starts at 08/22/16 19:25:30 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:25:30 ########### + + +########## Tcl recorder starts at 08/22/16 19:25:30 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:25:30 ########### + + +########## Tcl recorder starts at 08/22/16 19:28:19 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:28:19 ########### + + +########## Tcl recorder starts at 08/22/16 19:28:20 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:28:20 ########### + + +########## Tcl recorder starts at 08/22/16 19:29:33 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:29:33 ########### + + +########## Tcl recorder starts at 08/22/16 19:29:33 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:29:33 ########### + + +########## Tcl recorder starts at 08/22/16 19:30:59 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:30:59 ########### + + +########## Tcl recorder starts at 08/22/16 19:31:00 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:31:00 ########### + + +########## Tcl recorder starts at 08/22/16 19:33:03 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:33:03 ########### + + +########## Tcl recorder starts at 08/22/16 19:33:04 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:33:04 ########### + + +########## Tcl recorder starts at 08/22/16 19:33:53 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:33:53 ########### + + +########## Tcl recorder starts at 08/22/16 19:35:00 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:35:00 ########### + + +########## Tcl recorder starts at 08/22/16 19:35:11 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:35:11 ########### + + +########## Tcl recorder starts at 08/22/16 19:35:17 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:35:17 ########### + + +########## Tcl recorder starts at 08/22/16 19:35:31 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:35:31 ########### + + +########## Tcl recorder starts at 08/22/16 19:35:41 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:35:41 ########### + + +########## Tcl recorder starts at 08/22/16 19:35:46 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:35:46 ########### + + +########## Tcl recorder starts at 08/22/16 19:36:06 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:36:06 ########### + + +########## Tcl recorder starts at 08/22/16 19:38:52 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:38:52 ########### + + +########## Tcl recorder starts at 08/22/16 19:38:52 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:38:52 ########### + + +########## Tcl recorder starts at 08/22/16 19:39:40 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:39:40 ########### + + +########## Tcl recorder starts at 08/22/16 19:39:40 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:39:40 ########### + + +########## Tcl recorder starts at 08/22/16 19:40:08 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:40:08 ########### + + +########## Tcl recorder starts at 08/22/16 19:40:19 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:40:19 ########### + + +########## Tcl recorder starts at 08/22/16 19:40:32 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:40:32 ########### + + +########## Tcl recorder starts at 08/22/16 19:40:46 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:40:46 ########### + + +########## Tcl recorder starts at 08/22/16 19:42:40 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:42:40 ########### + + +########## Tcl recorder starts at 08/22/16 19:42:40 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:42:40 ########### + + +########## Tcl recorder starts at 08/22/16 19:44:28 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:44:28 ########### + + +########## Tcl recorder starts at 08/22/16 19:44:29 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:44:29 ########### + + +########## Tcl recorder starts at 08/22/16 19:46:00 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:46:00 ########### + + +########## Tcl recorder starts at 08/22/16 19:46:00 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:46:00 ########### + + +########## Tcl recorder starts at 08/22/16 19:47:45 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:47:45 ########### + + +########## Tcl recorder starts at 08/22/16 19:47:45 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:47:45 ########### + + +########## Tcl recorder starts at 08/22/16 19:49:18 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:49:18 ########### + + +########## Tcl recorder starts at 08/22/16 19:49:19 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:49:19 ########### + + +########## Tcl recorder starts at 08/22/16 19:50:16 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:50:16 ########### + + +########## Tcl recorder starts at 08/22/16 19:50:35 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:50:35 ########### + + +########## Tcl recorder starts at 08/22/16 19:50:47 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:50:47 ########### + + +########## Tcl recorder starts at 08/22/16 19:50:57 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:50:57 ########### + + +########## Tcl recorder starts at 08/22/16 19:51:08 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:51:08 ########### + + +########## Tcl recorder starts at 08/22/16 19:51:18 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/22/16 19:51:18 ########### + + +########## Tcl recorder starts at 08/23/16 19:23:55 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:23:55 ########### + + +########## Tcl recorder starts at 08/23/16 19:23:55 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:23:55 ########### + + +########## Tcl recorder starts at 08/23/16 19:24:59 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:24:59 ########### + + +########## Tcl recorder starts at 08/23/16 19:24:59 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:25:00 ########### + + +########## Tcl recorder starts at 08/23/16 19:26:58 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:26:58 ########### + + +########## Tcl recorder starts at 08/23/16 19:26:58 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:26:58 ########### + + +########## Tcl recorder starts at 08/23/16 19:28:11 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:28:11 ########### + + +########## Tcl recorder starts at 08/23/16 19:28:49 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:28:49 ########### + + +########## Tcl recorder starts at 08/23/16 19:28:50 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:28:50 ########### + + +########## Tcl recorder starts at 08/23/16 19:30:38 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:30:38 ########### + + +########## Tcl recorder starts at 08/23/16 19:30:38 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:30:38 ########### + + +########## Tcl recorder starts at 08/23/16 19:34:43 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:34:43 ########### + + +########## Tcl recorder starts at 08/23/16 19:34:43 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:34:43 ########### + + +########## Tcl recorder starts at 08/23/16 19:35:42 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:35:42 ########### + + +########## Tcl recorder starts at 08/23/16 19:35:42 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:35:42 ########### + + +########## Tcl recorder starts at 08/23/16 19:37:53 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:37:53 ########### + + +########## Tcl recorder starts at 08/23/16 19:37:53 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:37:53 ########### + + +########## Tcl recorder starts at 08/23/16 19:38:18 ########## + +# Commands to make the Process: +# Constraint Editor +# - none - +# Application to view the Process: +# Constraint Editor +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -lci \"68030_tk.lct\" -touch \"68030_tk.tt4\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:38:18 ########### + + +########## Tcl recorder starts at 08/23/16 19:40:41 ########## + +# Commands to make the Process: +# Optimization Constraint +# - none - +# Application to view the Process: +# Optimization Constraint +if [catch {open opt_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file opt_cmd.rs2: $rspFile" +} else { + puts $rspFile "-global -lci 68030_tk.lct -touch 68030_tk.imp +" + close $rspFile +} +if [runCmd "\"$cpld_bin/optedit\" @opt_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:40:42 ########### + + +########## Tcl recorder starts at 08/23/16 19:40:50 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:40:50 ########### + + +########## Tcl recorder starts at 08/23/16 19:41:00 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:41:00 ########### + + +########## Tcl recorder starts at 08/23/16 19:41:11 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:41:11 ########### + + +########## Tcl recorder starts at 08/23/16 19:41:38 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:41:38 ########### + + +########## Tcl recorder starts at 08/23/16 19:41:39 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:41:39 ########### + + +########## Tcl recorder starts at 08/23/16 19:42:40 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:42:40 ########### + + +########## Tcl recorder starts at 08/23/16 19:42:41 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:42:41 ########### + + +########## Tcl recorder starts at 08/23/16 19:43:28 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:43:28 ########### + + +########## Tcl recorder starts at 08/23/16 19:43:29 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:43:29 ########### + + +########## Tcl recorder starts at 08/23/16 19:45:08 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:45:08 ########### + + +########## Tcl recorder starts at 08/23/16 19:45:09 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:45:09 ########### + + +########## Tcl recorder starts at 08/23/16 19:48:02 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:48:02 ########### + + +########## Tcl recorder starts at 08/23/16 19:48:03 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:48:03 ########### + + +########## Tcl recorder starts at 08/23/16 19:49:35 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:49:35 ########### + + +########## Tcl recorder starts at 08/23/16 19:49:35 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:49:35 ########### + + +########## Tcl recorder starts at 08/23/16 19:51:25 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:51:25 ########### + + +########## Tcl recorder starts at 08/23/16 19:51:25 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:51:26 ########### + + +########## Tcl recorder starts at 08/23/16 19:52:14 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:52:14 ########### + + +########## Tcl recorder starts at 08/23/16 19:52:15 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:52:15 ########### + + +########## Tcl recorder starts at 08/23/16 19:58:28 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:58:28 ########### + + +########## Tcl recorder starts at 08/23/16 19:58:29 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 19:58:29 ########### + + +########## Tcl recorder starts at 08/23/16 20:04:37 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:04:37 ########### + + +########## Tcl recorder starts at 08/23/16 20:04:37 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:04:37 ########### + + +########## Tcl recorder starts at 08/23/16 20:05:35 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:05:35 ########### + + +########## Tcl recorder starts at 08/23/16 20:05:57 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:05:57 ########### + + +########## Tcl recorder starts at 08/23/16 20:06:17 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:06:17 ########### + + +########## Tcl recorder starts at 08/23/16 20:07:04 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:07:04 ########### + + +########## Tcl recorder starts at 08/23/16 20:07:17 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:07:17 ########### + + +########## Tcl recorder starts at 08/23/16 20:08:11 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:08:11 ########### + + +########## Tcl recorder starts at 08/23/16 20:08:11 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:08:11 ########### + + +########## Tcl recorder starts at 08/23/16 20:10:10 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:10:10 ########### + + +########## Tcl recorder starts at 08/23/16 20:10:10 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:10:10 ########### + + +########## Tcl recorder starts at 08/23/16 20:13:34 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:13:34 ########### + + +########## Tcl recorder starts at 08/23/16 20:13:34 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:13:34 ########### + + +########## Tcl recorder starts at 08/23/16 20:18:31 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:18:31 ########### + + +########## Tcl recorder starts at 08/23/16 20:18:31 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:18:31 ########### + + +########## Tcl recorder starts at 08/23/16 20:23:34 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:23:34 ########### + + +########## Tcl recorder starts at 08/23/16 20:23:34 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:23:34 ########### + + +########## Tcl recorder starts at 08/23/16 20:27:23 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:27:23 ########### + + +########## Tcl recorder starts at 08/23/16 20:27:23 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:27:23 ########### + + +########## Tcl recorder starts at 08/23/16 20:30:14 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:30:14 ########### + + +########## Tcl recorder starts at 08/23/16 20:30:15 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:30:15 ########### + + +########## Tcl recorder starts at 08/23/16 20:30:34 ########## + +# Commands to make the Process: +# Report File +if [catch {open 68030_tk.rss w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rss: $rspFile" +} else { + puts $rspFile "-i \"68030_tk.tte\" -lib \"$install_dir/ispcpld/dat/mach4a\" -strategy top -sdfmdl \"$install_dir/ispcpld/dat/sdf.mdl\" -simmdl \"$install_dir/ispcpld/dat/sim.mdl\" -pla \"68030_tk.tte\" -lci \"68030_tk.lct\" -prj \"68030_tk\" -dir \"$proj_dir\" -err automake.err -log \"68030_tk.nrp\" -exf \"BUS68030.exf\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/sdf\" \"@68030_tk.rss\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rss + +########## Tcl recorder end at 08/23/16 20:30:34 ########### + + +########## Tcl recorder starts at 08/23/16 20:33:41 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:33:41 ########### + + +########## Tcl recorder starts at 08/23/16 20:33:41 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:33:41 ########### + + +########## Tcl recorder starts at 08/23/16 20:36:16 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:36:16 ########### + + +########## Tcl recorder starts at 08/23/16 20:36:17 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/23/16 20:36:17 ########### + + +########## Tcl recorder starts at 08/24/16 21:00:53 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/24/16 21:00:53 ########### + + +########## Tcl recorder starts at 08/24/16 21:00:53 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/24/16 21:00:53 ########### + + +########## Tcl recorder starts at 08/24/16 21:03:23 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/24/16 21:03:23 ########### + + +########## Tcl recorder starts at 08/24/16 21:03:23 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/24/16 21:03:23 ########### + + +########## Tcl recorder starts at 08/24/16 21:17:52 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/24/16 21:17:52 ########### + + +########## Tcl recorder starts at 08/24/16 21:17:53 ########## + +# Commands to make the Process: +# Post-Fit Pinouts +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +# Application to view the Process: +# Post-Fit Pinouts +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -postfit -lci 68030_tk.lco +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/24/16 21:17:53 ########### + + +########## Tcl recorder starts at 08/24/16 22:17:34 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/24/16 22:17:34 ########### + + +########## Tcl recorder starts at 08/24/16 22:17:35 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 08/24/16 22:17:35 ########### + diff --git a/Logic/68030_tk.b2_ b/Logic/68030_tk.b2_ index 4ef6a67..0b15a6c 100644 --- a/Logic/68030_tk.b2_ +++ b/Logic/68030_tk.b2_ @@ -1 +1 @@ - -collapse all -pterms 16 -nmax 32 -clust 5 -reduce bypin choose -xorsyn -dev M4A5_clk + -collapse all -pterms 20 -nmax 32 -clust 5 -reduce bypin choose -xorsyn -dev M4A5_clk diff --git a/Logic/68030_tk.bl2 b/Logic/68030_tk.bl2 index 528a282..4bce3de 100644 --- a/Logic/68030_tk.bl2 +++ b/Logic/68030_tk.bl2 @@ -1,121 +1,120 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Fri Aug 19 00:39:35 2016 +#$ DATE Wed Aug 24 22:17:49 2016 #$ MODULE 68030_tk -#$ PINS 75 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_030_2_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 \ -# DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BG_000 SIZE_0_ BGACK_030 AHIGH_30_ \ -# BGACK_000 AHIGH_29_ CLK_030 AHIGH_28_ CLK_000 AHIGH_27_ CLK_OSZI AHIGH_26_ CLK_DIV_OUT \ -# AHIGH_25_ CLK_EXP AHIGH_24_ FPU_CS A_DECODE_22_ FPU_SENSE A_DECODE_21_ DSACK1 \ -# A_DECODE_20_ DTACK A_DECODE_19_ AVEC A_DECODE_18_ E A_DECODE_17_ VPA A_DECODE_16_ VMA \ -# A_DECODE_15_ RST A_DECODE_14_ RESET A_DECODE_13_ RW A_DECODE_12_ AMIGA_ADDR_ENABLE \ -# A_DECODE_11_ AMIGA_BUS_DATA_DIR A_DECODE_10_ AMIGA_BUS_ENABLE_LOW A_DECODE_9_ \ -# AMIGA_BUS_ENABLE_HIGH A_DECODE_8_ CIIN A_DECODE_7_ A_DECODE_6_ A_DECODE_5_ \ -# A_DECODE_4_ A_DECODE_3_ A_DECODE_2_ A_0_ IPL_030_1_ IPL_030_0_ IPL_1_ IPL_0_ FC_0_ A_1_ -#$ NODES 662 N_28 N_246_i bgack_030_int_0_un1_n N_17 sm_amiga_nss_i_0_0__n \ -# bgack_030_int_0_un0_n N_19 dsack1_int_0_un3_n N_23 N_220_i dsack1_int_0_un1_n N_24 \ -# N_219_i dsack1_int_0_un0_n N_25 N_218_i cpu_est_0_3__un3_n \ -# un1_amiga_bus_enable_low_i cpu_est_0_3__un1_n un21_fpu_cs_i N_224_i \ -# cpu_est_0_3__un0_n inst_BGACK_030_INTreg BGACK_030_INT_i N_222_i \ -# cpu_est_0_2__un3_n vcc_n_n AMIGA_BUS_ENABLE_DMA_LOW_i N_223_i cpu_est_0_2__un1_n \ -# inst_VMA_INTreg UDS_000_INT_i N_322_i cpu_est_0_2__un0_n gnd_n_n LDS_000_INT_i \ -# N_312_i cpu_est_0_1__un3_n un1_amiga_bus_enable_low N_131_i N_139_0 \ -# cpu_est_0_1__un1_n un6_as_030 N_132_i N_108_i cpu_est_0_1__un0_n un3_size RW_000_i \ -# N_258_i vma_int_0_un3_n un4_size a_i_1__n N_257_i vma_int_0_un1_n un4_uds_000 \ -# clk_000_d_i_11__n vma_int_0_un0_n un4_lds_000 sm_amiga_i_6__n N_245_i \ -# ipl_030_0_0__un3_n un4_as_000 clk_000_d_i_1__n nEXP_SPACE_c_i ipl_030_0_0__un1_n \ -# un10_ciin AS_030_000_SYNC_i un1_as_030_i ipl_030_0_0__un0_n un21_fpu_cs \ -# sm_amiga_i_0__n pos_clk_un3_as_030_d0_0_n ds_000_dma_0_un3_n un22_berr \ -# sm_amiga_i_3__n N_107_0 ds_000_dma_0_un1_n un6_ds_030 sm_amiga_i_i_7__n N_115_i \ -# ds_000_dma_0_un0_n cpu_est_3_ sm_amiga_i_5__n N_63_0 as_000_dma_0_un3_n cpu_est_0_ \ -# rst_dly_i_0__n N_278_0 as_000_dma_0_un1_n cpu_est_1_ rst_dly_i_1__n N_279_0 \ -# as_000_dma_0_un0_n cpu_est_2_ N_364_i_0 N_260_i a_decode_15__n inst_AS_000_INT \ -# cpu_est_i_0__n N_67_0 inst_AMIGA_BUS_ENABLE_DMA_LOW rst_dly_i_2__n \ -# pos_clk_rw_000_int_5_0_n a_decode_14__n inst_AS_030_D0 AS_030_i \ -# un1_SM_AMIGA_0_sqmuxa_1_0 inst_AS_030_000_SYNC FPU_SENSE_i un10_ciin_i \ -# a_decode_13__n inst_BGACK_030_INT_D N_157_i N_313_0 inst_AS_000_DMA \ -# a_decode_i_16__n N_4_i a_decode_12__n inst_DS_000_DMA a_decode_i_18__n N_48_0 \ -# CYCLE_DMA_0_ a_decode_i_19__n N_5_i a_decode_11__n CYCLE_DMA_1_ N_113_i N_47_0 \ -# SIZE_DMA_0_ N_114_i N_7_i a_decode_10__n SIZE_DMA_1_ AS_000_INT_i N_46_0 inst_VPA_D \ -# size_dma_i_1__n N_18_i a_decode_9__n inst_UDS_000_INT size_dma_i_0__n N_41_0 \ -# inst_LDS_000_INT RESET_OUT_i N_22_i a_decode_8__n inst_CLK_OUT_PRE_D cpu_est_i_1__n \ -# N_37_0 CLK_000_D_1_ cpu_est_i_2__n N_26_i a_decode_7__n CLK_000_D_10_ VPA_D_i N_33_0 \ -# CLK_000_D_11_ DTACK_D0_i BG_030_c_i a_decode_6__n inst_DTACK_D0 cpu_est_i_3__n \ -# pos_clk_un6_bg_030_i_n inst_RESET_OUT CLK_030_i pos_clk_un9_bg_030_0_n \ -# a_decode_5__n CLK_000_D_0_ clk_000_d_i_0__n N_10_i inst_CLK_OUT_PRE_50 \ -# clk_000_d_i_10__n N_43_0 a_decode_4__n IPL_D0_0_ AS_000_DMA_i VPA_c_i IPL_D0_1_ \ -# AS_000_i N_54_0 a_decode_3__n IPL_D0_2_ CLK_030_H_i un3_as_030_i CLK_000_D_2_ \ -# cycle_dma_i_0__n N_370_i a_decode_2__n CLK_000_D_3_ AS_030_D0_i \ -# pos_clk_un6_bgack_000_0_n CLK_000_D_4_ ahigh_i_30__n N_283_i CLK_000_D_5_ \ -# ahigh_i_31__n pos_clk_size_dma_6_0_0__n CLK_000_D_6_ ahigh_i_28__n N_345_i \ -# CLK_000_D_7_ ahigh_i_29__n pos_clk_size_dma_6_0_1__n CLK_000_D_8_ ahigh_i_26__n \ -# UDS_000_c_i CLK_000_D_9_ ahigh_i_27__n LDS_000_c_i CLK_000_D_12_ ahigh_i_24__n \ -# N_171_i pos_clk_un6_bg_030_n ahigh_i_25__n N_21_i inst_AMIGA_BUS_ENABLE_DMA_HIGH \ -# N_241_i N_38_0 inst_DSACK1_INTreg N_242_i DTACK_c_i pos_clk_ipl_n N_243_i N_55_0 \ -# inst_DS_000_ENABLE N_249_i SM_AMIGA_6_ un6_ds_030_i N_248_i SM_AMIGA_0_ DS_000_DMA_i \ -# pos_clk_un9_clk_000_pe_0_n SM_AMIGA_4_ un4_as_000_i N_250_i inst_RW_000_INT \ -# un6_as_030_i N_251_i inst_RW_000_DMA un4_lds_000_i cpu_est_2_0_1__n RST_DLY_0_ \ -# un4_uds_000_i N_253_i RST_DLY_1_ AS_030_c N_369_i RST_DLY_2_ cpu_est_2_0_2__n \ -# inst_A0_DMA AS_000_c N_254_i inst_CLK_030_H N_316_i SM_AMIGA_1_ RW_000_c N_256_i \ -# SM_AMIGA_5_ N_255_i SM_AMIGA_3_ N_317_i SM_AMIGA_2_ UDS_000_c N_267_i \ -# pos_clk_ds_000_dma_4_n N_266_i N_3 LDS_000_c N_57_0 N_8 N_151_0 size_c_0__n N_321_i \ -# N_158_i size_c_1__n VMA_INT_i N_361_i ahigh_c_24__n N_362_i N_27 N_169_i ahigh_c_25__n \ -# N_186_0 N_195_0 ahigh_c_26__n N_196_0 ahigh_c_27__n N_263_i N_262_i ahigh_c_28__n \ -# N_323_0 N_101_i ahigh_c_29__n N_366_i N_182_i ahigh_c_30__n \ -# pos_clk_un23_bgack_030_int_i_0_0_n N_310_i ahigh_c_31__n N_359_i N_144_0 \ -# CLK_OUT_PRE_D_i N_142_0 N_311_i N_319_i N_93_i N_272_0 N_290_i N_273_0 N_346_i \ -# pos_clk_ds_000_dma_4_0_n N_268_i N_269_i SM_AMIGA_i_7_ sm_amiga_nss_0_3__n N_341_i \ -# N_238_i N_239_i sm_amiga_nss_0_2__n N_263 N_235_i G_116 N_236_i G_117 \ -# sm_amiga_nss_0_4__n G_118 N_234_i pos_clk_un23_bgack_030_int_i_0_n \ -# sm_amiga_nss_0_5__n N_272 N_231_i N_273 N_232_i sm_amiga_nss_0_6__n N_313 N_230_i \ -# a_decode_c_16__n sm_amiga_nss_0_7__n N_226_i N_108 a_decode_c_17__n N_331_i N_319 \ -# N_142 a_decode_c_18__n un1_as_000_i N_144 N_27_i N_322 a_decode_c_19__n N_30_0 N_169 \ -# ipl_c_i_0__n N_195 a_decode_c_20__n N_51_0 N_323 N_3_i N_209 a_decode_c_21__n N_49_0 \ -# N_218 N_8_i N_224 a_decode_c_22__n N_45_0 N_226 sm_amiga_nss_i_0_1_0__n N_331 \ -# a_decode_c_23__n sm_amiga_nss_i_0_2_0__n N_229 sm_amiga_nss_i_0_3_0__n N_230 \ -# a_c_0__n sm_amiga_nss_i_0_4_0__n N_231 sm_amiga_nss_i_0_5_0__n N_232 a_c_1__n \ -# pos_clk_un10_sm_amiga_i_1_n N_233 un10_ciin_1 N_234 nEXP_SPACE_c un10_ciin_2 N_235 \ -# un10_ciin_3 N_236 BERR_c un10_ciin_4 N_238 un10_ciin_5 N_239 BG_030_c un10_ciin_6 N_240 \ -# un10_ciin_7 N_251 BG_000DFFreg un10_ciin_8 N_262 un10_ciin_9 N_341 un10_ciin_10 N_268 \ -# BGACK_000_c un10_ciin_11 N_269 pos_clk_un23_bgack_030_int_i_0_0_1_n N_282 CLK_030_c \ -# pos_clk_un23_bgack_030_int_i_0_0_2_n N_346 N_60_i_1 N_290 N_60_i_2 N_310 N_248_1 \ -# N_311 CLK_OSZI_c N_248_2 N_355 N_249_1 N_356 N_249_2 N_359 CLK_OUT_INTreg N_361_1 N_360 \ -# N_361_2 N_365 N_157_1 N_366 FPU_SENSE_c N_157_2 \ -# pos_clk_un23_bgack_030_int_i_0_o2_2_x2 N_157_3 pos_clk_CYCLE_DMA_5_1_i_0_x2 \ -# IPL_030DFF_0_reg N_157_4 N_248 N_260_1 N_249 IPL_030DFF_1_reg N_260_2 N_369 \ -# un21_fpu_cs_1 N_196 IPL_030DFF_2_reg un22_berr_1_0 N_186 N_275_i_1 N_361 ipl_c_0__n \ -# N_275_i_2 N_362 N_274_i_1 N_151 ipl_c_1__n N_274_i_2 N_321 N_115_1 N_266 ipl_c_2__n \ -# N_115_2 N_267 N_332_1 N_255 N_246_1 N_256 DTACK_c N_246_2 N_253 N_246_3 N_254 N_246_4 \ -# cpu_est_2_2__n N_332_4_1 cpu_est_2_1__n VPA_c N_332_4_2 N_250 N_273_0_1 \ -# pos_clk_un9_clk_000_pe_n N_276_i_1 N_364 RST_c N_277_i_1 N_21 N_314_i_1 N_171 N_356_1 \ -# pos_clk_size_dma_6_1__n RW_c N_282_1 N_345 N_251_1 pos_clk_size_dma_6_0__n fc_c_0__n \ -# pos_clk_un6_bg_030_1_n N_283 N_240_1 pos_clk_un6_bgack_000_n fc_c_1__n N_238_1 N_370 \ -# N_233_1 N_259 N_231_1 N_10 AMIGA_BUS_DATA_DIR_c N_224_1 pos_clk_un9_bg_030_n N_218_1 \ -# N_4 pos_clk_ipl_1_n N_114 rw_000_dma_0_un3_n N_278 rw_000_dma_0_un1_n N_5 N_25_i \ -# rw_000_dma_0_un0_n N_113 N_34_0 lds_000_int_0_un3_n N_279 N_24_i lds_000_int_0_un1_n \ -# N_6 N_35_0 lds_000_int_0_un0_n N_115 N_23_i ipl_030_0_1__un3_n N_63 N_36_0 \ -# ipl_030_0_1__un1_n N_7 N_19_i ipl_030_0_1__un0_n pos_clk_un3_as_030_d0_n N_40_0 \ -# amiga_bus_enable_dma_high_0_un3_n N_67 N_17_i amiga_bus_enable_dma_high_0_un1_n \ -# N_18 N_42_0 amiga_bus_enable_dma_high_0_un0_n pos_clk_rw_000_int_5_n ipl_c_i_1__n \ -# amiga_bus_enable_dma_low_0_un3_n un1_SM_AMIGA_0_sqmuxa_1 N_52_0 \ -# amiga_bus_enable_dma_low_0_un1_n N_22 ipl_c_i_2__n \ -# amiga_bus_enable_dma_low_0_un0_n pos_clk_a0_dma_3_n N_53_0 uds_000_int_0_un3_n \ -# N_363 N_28_i uds_000_int_0_un1_n N_26 N_31_0 uds_000_int_0_un0_n N_157 N_29_i \ -# ipl_030_0_2__un3_n N_260 N_32_0 ipl_030_0_2__un1_n un22_berr_1 a_c_i_0__n \ -# ipl_030_0_2__un0_n N_219 size_c_i_1__n \ -# un1_amiga_bus_enable_dma_high_i_m2_0__un3_n N_139 pos_clk_un10_sm_amiga_i_n \ -# un1_amiga_bus_enable_dma_high_i_m2_0__un1_n N_220 N_332_i \ -# un1_amiga_bus_enable_dma_high_i_m2_0__un0_n N_222 N_240_i as_000_int_0_un3_n N_223 \ -# N_315_0 as_000_int_0_un1_n N_368 N_281_0 as_000_int_0_un0_n N_257 N_270_i \ -# ds_000_enable_0_un3_n N_258 N_282_i ds_000_enable_0_un1_n N_312 \ -# AMIGA_BUS_DATA_DIR_c_0 ds_000_enable_0_un0_n N_143 RW_c_i as_030_000_sync_0_un3_n \ -# N_332 N_140_0 as_030_000_sync_0_un1_n N_332_4 N_353_i as_030_000_sync_0_un0_n N_246 \ -# N_143_0 rw_000_int_0_un3_n N_180 sm_amiga_i_1__n rw_000_int_0_un1_n N_320 N_320_i \ -# rw_000_int_0_un0_n N_244 N_357_i a0_dma_0_un3_n N_334 N_356_i a0_dma_0_un1_n N_335 \ -# N_156_0 a0_dma_0_un0_n N_159 sm_amiga_i_4__n bg_000_0_un3_n N_156 N_159_i \ -# bg_000_0_un1_n N_357 sm_amiga_i_2__n bg_000_0_un0_n N_353 N_180_i \ -# size_dma_0_1__un3_n N_140 N_334_i size_dma_0_1__un1_n N_270 N_335_i \ -# size_dma_0_1__un0_n N_281 N_244_i size_dma_0_0__un3_n N_131 N_233_i \ -# size_dma_0_0__un1_n N_132 N_355_i size_dma_0_0__un0_n N_29 N_229_i \ -# bgack_030_int_0_un3_n +#$ PINS 75 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_030_2_ IPL_2_ FC_1_ AS_030 SIZE_0_ \ +# AS_000 AHIGH_30_ RW_000 AHIGH_29_ DS_030 AHIGH_28_ UDS_000 AHIGH_27_ LDS_000 AHIGH_26_ \ +# nEXP_SPACE AHIGH_25_ BERR AHIGH_24_ BG_030 A_DECODE_22_ BG_000 A_DECODE_21_ BGACK_030 \ +# A_DECODE_20_ BGACK_000 A_DECODE_19_ CLK_030 A_DECODE_18_ CLK_000 A_DECODE_17_ \ +# CLK_OSZI A_DECODE_16_ CLK_DIV_OUT A_DECODE_15_ CLK_EXP A_DECODE_14_ FPU_CS \ +# A_DECODE_13_ FPU_SENSE A_DECODE_12_ DSACK1 A_DECODE_11_ DTACK A_DECODE_10_ AVEC \ +# A_DECODE_9_ E A_DECODE_8_ VPA A_DECODE_7_ VMA A_DECODE_6_ RST A_DECODE_5_ RESET \ +# A_DECODE_4_ RW A_DECODE_3_ AMIGA_ADDR_ENABLE A_DECODE_2_ AMIGA_BUS_DATA_DIR A_0_ \ +# AMIGA_BUS_ENABLE_LOW IPL_030_1_ AMIGA_BUS_ENABLE_HIGH IPL_030_0_ CIIN IPL_1_ IPL_0_ \ +# FC_0_ A_1_ +#$ NODES 653 N_28 ipl_030_0_0__un1_n N_17 N_190_i ipl_030_0_0__un0_n N_23 N_188_i \ +# ipl_030_0_2__un3_n N_6 N_189_i ipl_030_0_2__un1_n un1_amiga_bus_enable_low_i \ +# N_173_0 ipl_030_0_2__un0_n un21_fpu_cs_i N_170_0 ds_000_dma_0_un3_n UDS_000_INT_i \ +# N_255_i ds_000_dma_0_un1_n LDS_000_INT_i N_256_i ds_000_dma_0_un0_n \ +# inst_BGACK_030_INTreg AS_030_i N_161_i dsack1_int_0_un3_n vcc_n_n AS_000_INT_i \ +# VMA_INT_i dsack1_int_0_un1_n inst_VMA_INTreg RESET_OUT_i N_152_i dsack1_int_0_un0_n \ +# gnd_n_n sm_amiga_i_3__n N_151_0 as_000_int_0_un3_n un1_amiga_bus_enable_low \ +# sm_amiga_i_0__n N_251_i as_000_int_0_un1_n un6_as_030 cpu_est_i_1__n N_250_i \ +# as_000_int_0_un0_n un3_size cpu_est_i_3__n N_147_i as_030_000_sync_0_un3_n un4_size \ +# VPA_D_i N_146_i as_030_000_sync_0_un1_n un4_uds_000 rst_dly_i_0__n N_145_i \ +# as_030_000_sync_0_un0_n un4_lds_000 rst_dly_i_1__n N_397_i a_decode_15__n \ +# un4_as_000 cpu_est_i_0__n N_142_0 un10_ciin clk_000_d_i_1__n N_136_i a_decode_14__n \ +# un21_fpu_cs cpu_est_i_2__n N_248_i un22_berr DTACK_D0_i N_227_i a_decode_13__n \ +# un6_ds_030 clk_000_d_i_9__n N_226_i cpu_est_3_ N_258_i_0 N_291_i a_decode_12__n \ +# cpu_est_0_ rst_dly_i_2__n N_224_i cpu_est_1_ FPU_SENSE_i N_225_i a_decode_11__n \ +# cpu_est_2_ AS_030_000_SYNC_i N_230_i inst_AS_000_INT sm_amiga_i_i_7__n N_267_i \ +# a_decode_10__n inst_AMIGA_BUS_ENABLE_DMA_LOW BGACK_030_INT_i cpu_est_2_0_2__n \ +# inst_AS_030_D0 AMIGA_BUS_ENABLE_DMA_LOW_i N_222_i a_decode_9__n \ +# inst_AS_030_000_SYNC N_102_i N_223_i inst_BGACK_030_INT_D N_103_i cpu_est_2_0_1__n \ +# a_decode_8__n inst_AS_000_DMA size_dma_i_1__n N_221_i inst_DS_000_DMA \ +# size_dma_i_0__n N_220_i a_decode_7__n CYCLE_DMA_0_ RW_000_i \ +# pos_clk_un9_clk_000_pe_0_n CYCLE_DMA_1_ a_i_1__n N_216_i a_decode_6__n SIZE_DMA_0_ \ +# N_124_i N_215_i SIZE_DMA_1_ CLK_030_i a_decode_5__n inst_VPA_D clk_000_d_i_0__n \ +# N_199_i inst_UDS_000_INT clk_000_d_i_8__n N_198_i a_decode_4__n inst_LDS_000_INT \ +# AS_000_DMA_i sm_amiga_nss_0_6__n inst_CLK_OUT_PRE_D AS_000_i N_21_i a_decode_3__n \ +# CLK_000_D_8_ CLK_030_H_i N_39_0 CLK_000_D_9_ AS_030_D0_i nEXP_SPACE_c_i \ +# a_decode_2__n inst_DTACK_D0 cycle_dma_i_0__n un1_as_030_i inst_RESET_OUT \ +# a_decode_i_16__n N_133_0 CLK_000_D_1_ a_decode_i_18__n N_214_i CLK_000_D_0_ \ +# a_decode_i_19__n N_213_i inst_CLK_OUT_PRE_50 ahigh_i_30__n N_306_0 \ +# inst_CLK_OUT_PRE_25 ahigh_i_31__n N_26_i IPL_D0_0_ ahigh_i_28__n N_34_0 IPL_D0_1_ \ +# ahigh_i_29__n BG_030_c_i IPL_D0_2_ ahigh_i_26__n pos_clk_un6_bg_030_i_n \ +# CLK_000_D_2_ ahigh_i_27__n pos_clk_un9_bg_030_0_n CLK_000_D_3_ ahigh_i_24__n N_25_i \ +# CLK_000_D_4_ ahigh_i_25__n N_35_0 CLK_000_D_5_ N_244_i N_24_i CLK_000_D_6_ N_245_i \ +# N_36_0 CLK_000_D_7_ N_246_i N_22_i CLK_000_D_10_ N_38_0 pos_clk_un6_bg_030_n N_85_i \ +# N_19_i inst_AMIGA_BUS_ENABLE_DMA_HIGH N_86_i N_41_0 inst_DSACK1_INTreg un6_ds_030_i \ +# N_18_i pos_clk_ipl_n DS_000_DMA_i N_42_0 inst_DS_000_ENABLE un4_as_000_i N_10_i \ +# SM_AMIGA_6_ un6_as_030_i N_44_0 SM_AMIGA_4_ un4_lds_000_i N_311_0 SM_AMIGA_0_ \ +# un4_uds_000_i un10_ciin_i inst_RW_000_INT AS_030_c N_310_0 inst_RW_000_DMA N_207_i \ +# RST_DLY_0_ AS_000_c N_208_i RST_DLY_1_ AMIGA_BUS_DATA_DIR_c_0 RST_DLY_2_ RW_000_c \ +# N_209_i inst_A0_DMA pos_clk_size_dma_6_0_0__n inst_CLK_030_H N_210_i SM_AMIGA_1_ \ +# UDS_000_c pos_clk_size_dma_6_0_1__n SM_AMIGA_5_ N_268_i SM_AMIGA_3_ LDS_000_c \ +# pos_clk_un6_bgack_000_0_n SM_AMIGA_2_ un1_SM_AMIGA_0_sqmuxa_1_0 \ +# pos_clk_un3_as_030_d0_n size_c_0__n RW_c_i pos_clk_ds_000_dma_4_n \ +# pos_clk_rw_000_int_5_0_n N_3 size_c_1__n UDS_000_c_i N_4 LDS_000_c_i N_5 \ +# ahigh_c_24__n N_164_i N_7 N_8 ahigh_c_25__n N_113_i N_195_i ahigh_c_26__n N_174_0 \ +# N_169_i ahigh_c_27__n N_260_i N_168_i N_27 ahigh_c_28__n pos_clk_un3_as_030_d0_i_n \ +# N_29 pos_clk_un21_bgack_030_int_i_0_0_n CLK_OUT_PRE_25_0 ahigh_c_29__n \ +# CLK_OUT_PRE_D_i N_143_0 ahigh_c_30__n N_396_i N_137_i ahigh_c_31__n N_372_i N_236_i \ +# N_237_i N_280_0 N_281_0 N_229_i N_66_0 N_371_i N_305_0 N_212_i N_307_0 N_211_i \ +# pos_clk_ds_000_dma_4_0_n N_205_i N_206_i sm_amiga_nss_0_2__n N_200_i \ +# sm_amiga_nss_0_5__n N_197_i N_29_i SM_AMIGA_i_7_ N_33_0 N_27_i N_31_0 ipl_c_i_2__n \ +# N_54_0 ipl_c_i_1__n N_53_0 N_113 a_decode_c_16__n ipl_c_i_0__n G_117 N_52_0 G_118 \ +# a_decode_c_17__n N_3_i G_119 N_50_0 pos_clk_un21_bgack_030_int_i_0_n \ +# a_decode_c_18__n N_4_i N_280 N_49_0 N_281 a_decode_c_19__n N_5_i N_85 N_48_0 N_86 \ +# a_decode_c_20__n N_7_i N_305 N_47_0 a_decode_c_21__n N_8_i N_307 N_46_0 N_310 \ +# a_decode_c_22__n sm_amiga_nss_i_0_1_0__n N_66 sm_amiga_nss_i_0_2_0__n \ +# a_decode_c_23__n sm_amiga_nss_i_0_3_0__n N_136 sm_amiga_nss_i_0_4_0__n N_137 \ +# a_c_0__n sm_amiga_nss_i_0_5_0__n N_143 N_373_i_1 N_147 a_c_1__n \ +# pos_clk_un10_sm_amiga_i_1_n N_161 N_124_1 nEXP_SPACE_c N_124_2 N_174 N_124_3 N_178 \ +# BERR_c N_124_4 N_184 un10_ciin_1 N_190 BG_030_c un10_ciin_2 N_193 un10_ciin_3 N_195 \ +# BG_000DFFreg un10_ciin_4 N_197 un10_ciin_5 N_200 un10_ciin_6 N_205 BGACK_000_c \ +# un10_ciin_7 N_206 un10_ciin_8 N_208 CLK_030_c un10_ciin_9 N_211 un10_ciin_10 N_212 \ +# un10_ciin_11 N_213 pos_clk_un21_bgack_030_int_i_0_0_1_n N_223 CLK_OSZI_c \ +# pos_clk_un21_bgack_030_int_i_0_0_2_n N_229 N_309_i_1 N_236 N_309_i_2 N_237 \ +# CLK_OUT_INTreg N_229_1 N_243 N_229_2 N_396 N_214_1_0 N_250 FPU_SENSE_c un21_fpu_cs_1 \ +# N_253 un22_berr_1_0 N_254 IPL_030DFF_0_reg N_255_1 N_257 N_255_2 N_259 \ +# IPL_030DFF_1_reg N_151_0_1 N_260 N_277_i_1 pos_clk_un21_bgack_030_int_i_0_o2_2_x2 \ +# IPL_030DFF_2_reg N_277_i_2 pos_clk_CYCLE_DMA_5_1_i_0_x2 N_276_i_1 un22_berr_1 \ +# ipl_c_0__n N_276_i_2 N_124 N_221_1 N_164 ipl_c_1__n N_221_2 pos_clk_rw_000_int_5_n \ +# N_220_1 un1_SM_AMIGA_0_sqmuxa_1 ipl_c_2__n N_220_2 pos_clk_un6_bgack_000_n N_194_1 \ +# N_268 N_194_2 pos_clk_size_dma_6_1__n DTACK_c N_194_3 N_210 N_278_i_1 \ +# pos_clk_size_dma_6_0__n N_307_0_1 N_209 N_308_i_1 N_207 VPA_c N_40_i_1 N_311 N_250_1 \ +# N_102 N_223_1 N_103 RST_c pos_clk_un6_bg_030_1_n N_228 N_213_1 pos_clk_a0_dma_3_n \ +# N_208_1 N_10 RW_c N_205_1 N_18 N_193_1 N_19 fc_c_0__n N_190_1 N_22 N_184_1 N_24 fc_c_1__n \ +# pos_clk_ipl_1_n N_25 ipl_030_0_1__un3_n pos_clk_un9_bg_030_n ipl_030_0_1__un1_n \ +# N_26 AMIGA_BUS_DATA_DIR_c ipl_030_0_1__un0_n N_214 uds_000_int_0_un3_n N_214_1 \ +# uds_000_int_0_un1_n N_21 uds_000_int_0_un0_n pos_clk_un9_clk_000_pe_n \ +# lds_000_int_0_un3_n cpu_est_2_1__n N_23_i lds_000_int_0_un1_n cpu_est_2_2__n N_37_0 \ +# lds_000_int_0_un0_n N_185 N_17_i ds_000_enable_0_un3_n N_142 N_43_0 \ +# ds_000_enable_0_un1_n N_258 VPA_c_i ds_000_enable_0_un0_n N_186 N_55_0 \ +# vma_int_0_un3_n N_188 DTACK_c_i vma_int_0_un1_n N_189 N_56_0 vma_int_0_un0_n N_266 \ +# N_28_i cpu_est_0_1__un3_n N_198 N_32_0 cpu_est_0_1__un1_n N_261 a_c_i_0__n \ +# cpu_est_0_1__un0_n N_199 size_c_i_1__n cpu_est_0_2__un3_n N_215 \ +# pos_clk_un10_sm_amiga_i_n cpu_est_0_2__un1_n N_216 N_201_i cpu_est_0_2__un0_n N_222 \ +# N_202_i cpu_est_0_3__un3_n N_224 sm_amiga_nss_0_4__n cpu_est_0_3__un1_n N_146 \ +# N_204_i cpu_est_0_3__un0_n N_225 N_203_i amiga_bus_enable_dma_high_0_un3_n N_173 \ +# sm_amiga_nss_0_3__n amiga_bus_enable_dma_high_0_un1_n N_226 N_45_i \ +# amiga_bus_enable_dma_high_0_un0_n N_170 un1_SM_AMIGA_0_sqmuxa_2_i \ +# amiga_bus_enable_dma_low_0_un3_n N_227 N_279_0 amiga_bus_enable_dma_low_0_un1_n \ +# N_145 N_235_i amiga_bus_enable_dma_low_0_un0_n N_151 N_234_i a0_dma_0_un3_n N_397 \ +# N_58_0 a0_dma_0_un1_n N_251 N_243_i a0_dma_0_un0_n N_255 N_254_i rw_000_dma_0_un3_n \ +# N_256 N_144_0 rw_000_dma_0_un1_n N_267 N_249_i rw_000_dma_0_un0_n N_221 N_247_i \ +# rw_000_int_0_un3_n N_220 sm_amiga_nss_0_7__n rw_000_int_0_un1_n N_194 \ +# sm_amiga_i_4__n rw_000_int_0_un0_n N_373 N_252_i bgack_030_int_0_un3_n N_398 N_153_0 \ +# bgack_030_int_0_un1_n N_191 sm_amiga_i_6__n bgack_030_int_0_un0_n N_192 \ +# sm_amiga_i_2__n bg_000_0_un3_n N_172 N_373_i bg_000_0_un1_n N_171 N_171_0 \ +# bg_000_0_un0_n N_153 N_253_i size_dma_0_1__un3_n N_252 N_172_0 size_dma_0_1__un1_n \ +# N_247 N_192_i size_dma_0_1__un0_n N_249 N_191_i size_dma_0_0__un3_n N_144 N_193_i \ +# size_dma_0_0__un1_n N_234 N_398_i size_dma_0_0__un0_n N_235 N_261_i \ +# un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un3_n N_279 N_194_i \ +# un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un1_n un1_SM_AMIGA_0_sqmuxa_2 \ +# sm_amiga_nss_i_0_0__n un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un0_n N_203 \ +# as_000_dma_0_un3_n N_204 N_186_i as_000_dma_0_un1_n N_201 N_185_i as_000_dma_0_un0_n \ +# N_202 N_184_i ipl_030_0_0__un3_n .model bus68030 .inputs A_DECODE_23_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF \ BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF \ @@ -128,171 +127,170 @@ A_DECODE_4_.BLIF A_DECODE_3_.BLIF A_DECODE_2_.BLIF IPL_1_.BLIF IPL_0_.BLIF \ FC_0_.BLIF A_1_.BLIF SIZE_1_.BLIF AHIGH_31_.BLIF AS_030.BLIF AS_000.BLIF \ RW_000.BLIF UDS_000.BLIF LDS_000.BLIF BERR.BLIF RW.BLIF SIZE_0_.BLIF \ AHIGH_30_.BLIF AHIGH_29_.BLIF AHIGH_28_.BLIF AHIGH_27_.BLIF AHIGH_26_.BLIF \ -AHIGH_25_.BLIF AHIGH_24_.BLIF A_0_.BLIF N_28.BLIF N_246_i.BLIF \ -bgack_030_int_0_un1_n.BLIF N_17.BLIF sm_amiga_nss_i_0_0__n.BLIF \ -bgack_030_int_0_un0_n.BLIF N_19.BLIF dsack1_int_0_un3_n.BLIF N_23.BLIF \ -N_220_i.BLIF dsack1_int_0_un1_n.BLIF N_24.BLIF N_219_i.BLIF \ -dsack1_int_0_un0_n.BLIF N_25.BLIF N_218_i.BLIF cpu_est_0_3__un3_n.BLIF \ -un1_amiga_bus_enable_low_i.BLIF cpu_est_0_3__un1_n.BLIF un21_fpu_cs_i.BLIF \ -N_224_i.BLIF cpu_est_0_3__un0_n.BLIF inst_BGACK_030_INTreg.BLIF \ -BGACK_030_INT_i.BLIF N_222_i.BLIF cpu_est_0_2__un3_n.BLIF vcc_n_n.BLIF \ -AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF N_223_i.BLIF cpu_est_0_2__un1_n.BLIF \ -inst_VMA_INTreg.BLIF UDS_000_INT_i.BLIF N_322_i.BLIF cpu_est_0_2__un0_n.BLIF \ -gnd_n_n.BLIF LDS_000_INT_i.BLIF N_312_i.BLIF cpu_est_0_1__un3_n.BLIF \ -un1_amiga_bus_enable_low.BLIF N_131_i.BLIF N_139_0.BLIF \ -cpu_est_0_1__un1_n.BLIF un6_as_030.BLIF N_132_i.BLIF N_108_i.BLIF \ -cpu_est_0_1__un0_n.BLIF un3_size.BLIF RW_000_i.BLIF N_258_i.BLIF \ -vma_int_0_un3_n.BLIF un4_size.BLIF a_i_1__n.BLIF N_257_i.BLIF \ -vma_int_0_un1_n.BLIF un4_uds_000.BLIF clk_000_d_i_11__n.BLIF \ -vma_int_0_un0_n.BLIF un4_lds_000.BLIF sm_amiga_i_6__n.BLIF N_245_i.BLIF \ -ipl_030_0_0__un3_n.BLIF un4_as_000.BLIF clk_000_d_i_1__n.BLIF \ -nEXP_SPACE_c_i.BLIF ipl_030_0_0__un1_n.BLIF un10_ciin.BLIF \ -AS_030_000_SYNC_i.BLIF un1_as_030_i.BLIF ipl_030_0_0__un0_n.BLIF \ -un21_fpu_cs.BLIF sm_amiga_i_0__n.BLIF pos_clk_un3_as_030_d0_0_n.BLIF \ -ds_000_dma_0_un3_n.BLIF un22_berr.BLIF sm_amiga_i_3__n.BLIF N_107_0.BLIF \ -ds_000_dma_0_un1_n.BLIF un6_ds_030.BLIF sm_amiga_i_i_7__n.BLIF N_115_i.BLIF \ -ds_000_dma_0_un0_n.BLIF cpu_est_3_.BLIF sm_amiga_i_5__n.BLIF N_63_0.BLIF \ -as_000_dma_0_un3_n.BLIF cpu_est_0_.BLIF rst_dly_i_0__n.BLIF N_278_0.BLIF \ -as_000_dma_0_un1_n.BLIF cpu_est_1_.BLIF rst_dly_i_1__n.BLIF N_279_0.BLIF \ -as_000_dma_0_un0_n.BLIF cpu_est_2_.BLIF N_364_i_0.BLIF N_260_i.BLIF \ -a_decode_15__n.BLIF inst_AS_000_INT.BLIF cpu_est_i_0__n.BLIF N_67_0.BLIF \ -inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF rst_dly_i_2__n.BLIF \ -pos_clk_rw_000_int_5_0_n.BLIF a_decode_14__n.BLIF inst_AS_030_D0.BLIF \ -AS_030_i.BLIF un1_SM_AMIGA_0_sqmuxa_1_0.BLIF inst_AS_030_000_SYNC.BLIF \ -FPU_SENSE_i.BLIF un10_ciin_i.BLIF a_decode_13__n.BLIF \ -inst_BGACK_030_INT_D.BLIF N_157_i.BLIF N_313_0.BLIF inst_AS_000_DMA.BLIF \ -a_decode_i_16__n.BLIF N_4_i.BLIF a_decode_12__n.BLIF inst_DS_000_DMA.BLIF \ -a_decode_i_18__n.BLIF N_48_0.BLIF CYCLE_DMA_0_.BLIF a_decode_i_19__n.BLIF \ -N_5_i.BLIF a_decode_11__n.BLIF CYCLE_DMA_1_.BLIF N_113_i.BLIF N_47_0.BLIF \ -SIZE_DMA_0_.BLIF N_114_i.BLIF N_7_i.BLIF a_decode_10__n.BLIF SIZE_DMA_1_.BLIF \ -AS_000_INT_i.BLIF N_46_0.BLIF inst_VPA_D.BLIF size_dma_i_1__n.BLIF N_18_i.BLIF \ -a_decode_9__n.BLIF inst_UDS_000_INT.BLIF size_dma_i_0__n.BLIF N_41_0.BLIF \ -inst_LDS_000_INT.BLIF RESET_OUT_i.BLIF N_22_i.BLIF a_decode_8__n.BLIF \ -inst_CLK_OUT_PRE_D.BLIF cpu_est_i_1__n.BLIF N_37_0.BLIF CLK_000_D_1_.BLIF \ -cpu_est_i_2__n.BLIF N_26_i.BLIF a_decode_7__n.BLIF CLK_000_D_10_.BLIF \ -VPA_D_i.BLIF N_33_0.BLIF CLK_000_D_11_.BLIF DTACK_D0_i.BLIF BG_030_c_i.BLIF \ -a_decode_6__n.BLIF inst_DTACK_D0.BLIF cpu_est_i_3__n.BLIF \ -pos_clk_un6_bg_030_i_n.BLIF inst_RESET_OUT.BLIF CLK_030_i.BLIF \ -pos_clk_un9_bg_030_0_n.BLIF a_decode_5__n.BLIF CLK_000_D_0_.BLIF \ -clk_000_d_i_0__n.BLIF N_10_i.BLIF inst_CLK_OUT_PRE_50.BLIF \ -clk_000_d_i_10__n.BLIF N_43_0.BLIF a_decode_4__n.BLIF IPL_D0_0_.BLIF \ -AS_000_DMA_i.BLIF VPA_c_i.BLIF IPL_D0_1_.BLIF AS_000_i.BLIF N_54_0.BLIF \ -a_decode_3__n.BLIF IPL_D0_2_.BLIF CLK_030_H_i.BLIF un3_as_030_i.BLIF \ -CLK_000_D_2_.BLIF cycle_dma_i_0__n.BLIF N_370_i.BLIF a_decode_2__n.BLIF \ -CLK_000_D_3_.BLIF AS_030_D0_i.BLIF pos_clk_un6_bgack_000_0_n.BLIF \ -CLK_000_D_4_.BLIF ahigh_i_30__n.BLIF N_283_i.BLIF CLK_000_D_5_.BLIF \ -ahigh_i_31__n.BLIF pos_clk_size_dma_6_0_0__n.BLIF CLK_000_D_6_.BLIF \ -ahigh_i_28__n.BLIF N_345_i.BLIF CLK_000_D_7_.BLIF ahigh_i_29__n.BLIF \ -pos_clk_size_dma_6_0_1__n.BLIF CLK_000_D_8_.BLIF ahigh_i_26__n.BLIF \ -UDS_000_c_i.BLIF CLK_000_D_9_.BLIF ahigh_i_27__n.BLIF LDS_000_c_i.BLIF \ -CLK_000_D_12_.BLIF ahigh_i_24__n.BLIF N_171_i.BLIF pos_clk_un6_bg_030_n.BLIF \ -ahigh_i_25__n.BLIF N_21_i.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF \ -N_241_i.BLIF N_38_0.BLIF inst_DSACK1_INTreg.BLIF N_242_i.BLIF DTACK_c_i.BLIF \ -pos_clk_ipl_n.BLIF N_243_i.BLIF N_55_0.BLIF inst_DS_000_ENABLE.BLIF \ -N_249_i.BLIF SM_AMIGA_6_.BLIF un6_ds_030_i.BLIF N_248_i.BLIF SM_AMIGA_0_.BLIF \ -DS_000_DMA_i.BLIF pos_clk_un9_clk_000_pe_0_n.BLIF SM_AMIGA_4_.BLIF \ -un4_as_000_i.BLIF N_250_i.BLIF inst_RW_000_INT.BLIF un6_as_030_i.BLIF \ -N_251_i.BLIF inst_RW_000_DMA.BLIF un4_lds_000_i.BLIF cpu_est_2_0_1__n.BLIF \ -RST_DLY_0_.BLIF un4_uds_000_i.BLIF N_253_i.BLIF RST_DLY_1_.BLIF AS_030_c.BLIF \ -N_369_i.BLIF RST_DLY_2_.BLIF cpu_est_2_0_2__n.BLIF inst_A0_DMA.BLIF \ -AS_000_c.BLIF N_254_i.BLIF inst_CLK_030_H.BLIF N_316_i.BLIF SM_AMIGA_1_.BLIF \ -RW_000_c.BLIF N_256_i.BLIF SM_AMIGA_5_.BLIF N_255_i.BLIF SM_AMIGA_3_.BLIF \ -N_317_i.BLIF SM_AMIGA_2_.BLIF UDS_000_c.BLIF N_267_i.BLIF \ -pos_clk_ds_000_dma_4_n.BLIF N_266_i.BLIF N_3.BLIF LDS_000_c.BLIF N_57_0.BLIF \ -N_8.BLIF N_151_0.BLIF size_c_0__n.BLIF N_321_i.BLIF N_158_i.BLIF \ -size_c_1__n.BLIF VMA_INT_i.BLIF N_361_i.BLIF ahigh_c_24__n.BLIF N_362_i.BLIF \ -N_27.BLIF N_169_i.BLIF ahigh_c_25__n.BLIF N_186_0.BLIF N_195_0.BLIF \ -ahigh_c_26__n.BLIF N_196_0.BLIF ahigh_c_27__n.BLIF N_263_i.BLIF N_262_i.BLIF \ -ahigh_c_28__n.BLIF N_323_0.BLIF N_101_i.BLIF ahigh_c_29__n.BLIF N_366_i.BLIF \ -N_182_i.BLIF ahigh_c_30__n.BLIF pos_clk_un23_bgack_030_int_i_0_0_n.BLIF \ -N_310_i.BLIF ahigh_c_31__n.BLIF N_359_i.BLIF N_144_0.BLIF CLK_OUT_PRE_D_i.BLIF \ -N_142_0.BLIF N_311_i.BLIF N_319_i.BLIF N_93_i.BLIF N_272_0.BLIF N_290_i.BLIF \ -N_273_0.BLIF N_346_i.BLIF pos_clk_ds_000_dma_4_0_n.BLIF N_268_i.BLIF \ -N_269_i.BLIF SM_AMIGA_i_7_.BLIF sm_amiga_nss_0_3__n.BLIF N_341_i.BLIF \ -N_238_i.BLIF N_239_i.BLIF sm_amiga_nss_0_2__n.BLIF N_263.BLIF N_235_i.BLIF \ -G_116.BLIF N_236_i.BLIF G_117.BLIF sm_amiga_nss_0_4__n.BLIF G_118.BLIF \ -N_234_i.BLIF pos_clk_un23_bgack_030_int_i_0_n.BLIF sm_amiga_nss_0_5__n.BLIF \ -N_272.BLIF N_231_i.BLIF N_273.BLIF N_232_i.BLIF sm_amiga_nss_0_6__n.BLIF \ -N_313.BLIF N_230_i.BLIF a_decode_c_16__n.BLIF sm_amiga_nss_0_7__n.BLIF \ -N_226_i.BLIF N_108.BLIF a_decode_c_17__n.BLIF N_331_i.BLIF N_319.BLIF \ -N_142.BLIF a_decode_c_18__n.BLIF un1_as_000_i.BLIF N_144.BLIF N_27_i.BLIF \ -N_322.BLIF a_decode_c_19__n.BLIF N_30_0.BLIF N_169.BLIF ipl_c_i_0__n.BLIF \ -N_195.BLIF a_decode_c_20__n.BLIF N_51_0.BLIF N_323.BLIF N_3_i.BLIF N_209.BLIF \ -a_decode_c_21__n.BLIF N_49_0.BLIF N_218.BLIF N_8_i.BLIF N_224.BLIF \ -a_decode_c_22__n.BLIF N_45_0.BLIF N_226.BLIF sm_amiga_nss_i_0_1_0__n.BLIF \ -N_331.BLIF a_decode_c_23__n.BLIF sm_amiga_nss_i_0_2_0__n.BLIF N_229.BLIF \ -sm_amiga_nss_i_0_3_0__n.BLIF N_230.BLIF a_c_0__n.BLIF \ -sm_amiga_nss_i_0_4_0__n.BLIF N_231.BLIF sm_amiga_nss_i_0_5_0__n.BLIF \ -N_232.BLIF a_c_1__n.BLIF pos_clk_un10_sm_amiga_i_1_n.BLIF N_233.BLIF \ -un10_ciin_1.BLIF N_234.BLIF nEXP_SPACE_c.BLIF un10_ciin_2.BLIF N_235.BLIF \ -un10_ciin_3.BLIF N_236.BLIF BERR_c.BLIF un10_ciin_4.BLIF N_238.BLIF \ -un10_ciin_5.BLIF N_239.BLIF BG_030_c.BLIF un10_ciin_6.BLIF N_240.BLIF \ -un10_ciin_7.BLIF N_251.BLIF BG_000DFFreg.BLIF un10_ciin_8.BLIF N_262.BLIF \ -un10_ciin_9.BLIF N_341.BLIF un10_ciin_10.BLIF N_268.BLIF BGACK_000_c.BLIF \ -un10_ciin_11.BLIF N_269.BLIF pos_clk_un23_bgack_030_int_i_0_0_1_n.BLIF \ -N_282.BLIF CLK_030_c.BLIF pos_clk_un23_bgack_030_int_i_0_0_2_n.BLIF N_346.BLIF \ -N_60_i_1.BLIF N_290.BLIF N_60_i_2.BLIF N_310.BLIF N_248_1.BLIF N_311.BLIF \ -CLK_OSZI_c.BLIF N_248_2.BLIF N_355.BLIF N_249_1.BLIF N_356.BLIF N_249_2.BLIF \ -N_359.BLIF CLK_OUT_INTreg.BLIF N_361_1.BLIF N_360.BLIF N_361_2.BLIF N_365.BLIF \ -N_157_1.BLIF N_366.BLIF FPU_SENSE_c.BLIF N_157_2.BLIF \ -pos_clk_un23_bgack_030_int_i_0_o2_2_x2.BLIF N_157_3.BLIF \ -pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF IPL_030DFF_0_reg.BLIF N_157_4.BLIF \ -N_248.BLIF N_260_1.BLIF N_249.BLIF IPL_030DFF_1_reg.BLIF N_260_2.BLIF \ -N_369.BLIF un21_fpu_cs_1.BLIF N_196.BLIF IPL_030DFF_2_reg.BLIF \ -un22_berr_1_0.BLIF N_186.BLIF N_275_i_1.BLIF N_361.BLIF ipl_c_0__n.BLIF \ -N_275_i_2.BLIF N_362.BLIF N_274_i_1.BLIF N_151.BLIF ipl_c_1__n.BLIF \ -N_274_i_2.BLIF N_321.BLIF N_115_1.BLIF N_266.BLIF ipl_c_2__n.BLIF N_115_2.BLIF \ -N_267.BLIF N_332_1.BLIF N_255.BLIF N_246_1.BLIF N_256.BLIF DTACK_c.BLIF \ -N_246_2.BLIF N_253.BLIF N_246_3.BLIF N_254.BLIF N_246_4.BLIF \ -cpu_est_2_2__n.BLIF N_332_4_1.BLIF cpu_est_2_1__n.BLIF VPA_c.BLIF \ -N_332_4_2.BLIF N_250.BLIF N_273_0_1.BLIF pos_clk_un9_clk_000_pe_n.BLIF \ -N_276_i_1.BLIF N_364.BLIF RST_c.BLIF N_277_i_1.BLIF N_21.BLIF N_314_i_1.BLIF \ -N_171.BLIF N_356_1.BLIF pos_clk_size_dma_6_1__n.BLIF RW_c.BLIF N_282_1.BLIF \ -N_345.BLIF N_251_1.BLIF pos_clk_size_dma_6_0__n.BLIF fc_c_0__n.BLIF \ -pos_clk_un6_bg_030_1_n.BLIF N_283.BLIF N_240_1.BLIF \ -pos_clk_un6_bgack_000_n.BLIF fc_c_1__n.BLIF N_238_1.BLIF N_370.BLIF \ -N_233_1.BLIF N_259.BLIF N_231_1.BLIF N_10.BLIF AMIGA_BUS_DATA_DIR_c.BLIF \ -N_224_1.BLIF pos_clk_un9_bg_030_n.BLIF N_218_1.BLIF N_4.BLIF \ -pos_clk_ipl_1_n.BLIF N_114.BLIF rw_000_dma_0_un3_n.BLIF N_278.BLIF \ -rw_000_dma_0_un1_n.BLIF N_5.BLIF N_25_i.BLIF rw_000_dma_0_un0_n.BLIF \ -N_113.BLIF N_34_0.BLIF lds_000_int_0_un3_n.BLIF N_279.BLIF N_24_i.BLIF \ -lds_000_int_0_un1_n.BLIF N_6.BLIF N_35_0.BLIF lds_000_int_0_un0_n.BLIF \ -N_115.BLIF N_23_i.BLIF ipl_030_0_1__un3_n.BLIF N_63.BLIF N_36_0.BLIF \ -ipl_030_0_1__un1_n.BLIF N_7.BLIF N_19_i.BLIF ipl_030_0_1__un0_n.BLIF \ -pos_clk_un3_as_030_d0_n.BLIF N_40_0.BLIF \ -amiga_bus_enable_dma_high_0_un3_n.BLIF N_67.BLIF N_17_i.BLIF \ -amiga_bus_enable_dma_high_0_un1_n.BLIF N_18.BLIF N_42_0.BLIF \ -amiga_bus_enable_dma_high_0_un0_n.BLIF pos_clk_rw_000_int_5_n.BLIF \ -ipl_c_i_1__n.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF \ -un1_SM_AMIGA_0_sqmuxa_1.BLIF N_52_0.BLIF amiga_bus_enable_dma_low_0_un1_n.BLIF \ -N_22.BLIF ipl_c_i_2__n.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF \ -pos_clk_a0_dma_3_n.BLIF N_53_0.BLIF uds_000_int_0_un3_n.BLIF N_363.BLIF \ -N_28_i.BLIF uds_000_int_0_un1_n.BLIF N_26.BLIF N_31_0.BLIF \ -uds_000_int_0_un0_n.BLIF N_157.BLIF N_29_i.BLIF ipl_030_0_2__un3_n.BLIF \ -N_260.BLIF N_32_0.BLIF ipl_030_0_2__un1_n.BLIF un22_berr_1.BLIF \ -a_c_i_0__n.BLIF ipl_030_0_2__un0_n.BLIF N_219.BLIF size_c_i_1__n.BLIF \ -un1_amiga_bus_enable_dma_high_i_m2_0__un3_n.BLIF N_139.BLIF \ -pos_clk_un10_sm_amiga_i_n.BLIF \ -un1_amiga_bus_enable_dma_high_i_m2_0__un1_n.BLIF N_220.BLIF N_332_i.BLIF \ -un1_amiga_bus_enable_dma_high_i_m2_0__un0_n.BLIF N_222.BLIF N_240_i.BLIF \ -as_000_int_0_un3_n.BLIF N_223.BLIF N_315_0.BLIF as_000_int_0_un1_n.BLIF \ -N_368.BLIF N_281_0.BLIF as_000_int_0_un0_n.BLIF N_257.BLIF N_270_i.BLIF \ -ds_000_enable_0_un3_n.BLIF N_258.BLIF N_282_i.BLIF ds_000_enable_0_un1_n.BLIF \ -N_312.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF ds_000_enable_0_un0_n.BLIF N_143.BLIF \ -RW_c_i.BLIF as_030_000_sync_0_un3_n.BLIF N_332.BLIF N_140_0.BLIF \ -as_030_000_sync_0_un1_n.BLIF N_332_4.BLIF N_353_i.BLIF \ -as_030_000_sync_0_un0_n.BLIF N_246.BLIF N_143_0.BLIF rw_000_int_0_un3_n.BLIF \ -N_180.BLIF sm_amiga_i_1__n.BLIF rw_000_int_0_un1_n.BLIF N_320.BLIF \ -N_320_i.BLIF rw_000_int_0_un0_n.BLIF N_244.BLIF N_357_i.BLIF \ -a0_dma_0_un3_n.BLIF N_334.BLIF N_356_i.BLIF a0_dma_0_un1_n.BLIF N_335.BLIF \ -N_156_0.BLIF a0_dma_0_un0_n.BLIF N_159.BLIF sm_amiga_i_4__n.BLIF \ -bg_000_0_un3_n.BLIF N_156.BLIF N_159_i.BLIF bg_000_0_un1_n.BLIF N_357.BLIF \ -sm_amiga_i_2__n.BLIF bg_000_0_un0_n.BLIF N_353.BLIF N_180_i.BLIF \ -size_dma_0_1__un3_n.BLIF N_140.BLIF N_334_i.BLIF size_dma_0_1__un1_n.BLIF \ -N_270.BLIF N_335_i.BLIF size_dma_0_1__un0_n.BLIF N_281.BLIF N_244_i.BLIF \ -size_dma_0_0__un3_n.BLIF N_131.BLIF N_233_i.BLIF size_dma_0_0__un1_n.BLIF \ -N_132.BLIF N_355_i.BLIF size_dma_0_0__un0_n.BLIF N_29.BLIF N_229_i.BLIF \ -bgack_030_int_0_un3_n.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF \ +AHIGH_25_.BLIF AHIGH_24_.BLIF A_0_.BLIF N_28.BLIF ipl_030_0_0__un1_n.BLIF \ +N_17.BLIF N_190_i.BLIF ipl_030_0_0__un0_n.BLIF N_23.BLIF N_188_i.BLIF \ +ipl_030_0_2__un3_n.BLIF N_6.BLIF N_189_i.BLIF ipl_030_0_2__un1_n.BLIF \ +un1_amiga_bus_enable_low_i.BLIF N_173_0.BLIF ipl_030_0_2__un0_n.BLIF \ +un21_fpu_cs_i.BLIF N_170_0.BLIF ds_000_dma_0_un3_n.BLIF UDS_000_INT_i.BLIF \ +N_255_i.BLIF ds_000_dma_0_un1_n.BLIF LDS_000_INT_i.BLIF N_256_i.BLIF \ +ds_000_dma_0_un0_n.BLIF inst_BGACK_030_INTreg.BLIF AS_030_i.BLIF N_161_i.BLIF \ +dsack1_int_0_un3_n.BLIF vcc_n_n.BLIF AS_000_INT_i.BLIF VMA_INT_i.BLIF \ +dsack1_int_0_un1_n.BLIF inst_VMA_INTreg.BLIF RESET_OUT_i.BLIF N_152_i.BLIF \ +dsack1_int_0_un0_n.BLIF gnd_n_n.BLIF sm_amiga_i_3__n.BLIF N_151_0.BLIF \ +as_000_int_0_un3_n.BLIF un1_amiga_bus_enable_low.BLIF sm_amiga_i_0__n.BLIF \ +N_251_i.BLIF as_000_int_0_un1_n.BLIF un6_as_030.BLIF cpu_est_i_1__n.BLIF \ +N_250_i.BLIF as_000_int_0_un0_n.BLIF un3_size.BLIF cpu_est_i_3__n.BLIF \ +N_147_i.BLIF as_030_000_sync_0_un3_n.BLIF un4_size.BLIF VPA_D_i.BLIF \ +N_146_i.BLIF as_030_000_sync_0_un1_n.BLIF un4_uds_000.BLIF rst_dly_i_0__n.BLIF \ +N_145_i.BLIF as_030_000_sync_0_un0_n.BLIF un4_lds_000.BLIF rst_dly_i_1__n.BLIF \ +N_397_i.BLIF a_decode_15__n.BLIF un4_as_000.BLIF cpu_est_i_0__n.BLIF \ +N_142_0.BLIF un10_ciin.BLIF clk_000_d_i_1__n.BLIF N_136_i.BLIF \ +a_decode_14__n.BLIF un21_fpu_cs.BLIF cpu_est_i_2__n.BLIF N_248_i.BLIF \ +un22_berr.BLIF DTACK_D0_i.BLIF N_227_i.BLIF a_decode_13__n.BLIF \ +un6_ds_030.BLIF clk_000_d_i_9__n.BLIF N_226_i.BLIF cpu_est_3_.BLIF \ +N_258_i_0.BLIF N_291_i.BLIF a_decode_12__n.BLIF cpu_est_0_.BLIF \ +rst_dly_i_2__n.BLIF N_224_i.BLIF cpu_est_1_.BLIF FPU_SENSE_i.BLIF N_225_i.BLIF \ +a_decode_11__n.BLIF cpu_est_2_.BLIF AS_030_000_SYNC_i.BLIF N_230_i.BLIF \ +inst_AS_000_INT.BLIF sm_amiga_i_i_7__n.BLIF N_267_i.BLIF a_decode_10__n.BLIF \ +inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF BGACK_030_INT_i.BLIF cpu_est_2_0_2__n.BLIF \ +inst_AS_030_D0.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF N_222_i.BLIF \ +a_decode_9__n.BLIF inst_AS_030_000_SYNC.BLIF N_102_i.BLIF N_223_i.BLIF \ +inst_BGACK_030_INT_D.BLIF N_103_i.BLIF cpu_est_2_0_1__n.BLIF \ +a_decode_8__n.BLIF inst_AS_000_DMA.BLIF size_dma_i_1__n.BLIF N_221_i.BLIF \ +inst_DS_000_DMA.BLIF size_dma_i_0__n.BLIF N_220_i.BLIF a_decode_7__n.BLIF \ +CYCLE_DMA_0_.BLIF RW_000_i.BLIF pos_clk_un9_clk_000_pe_0_n.BLIF \ +CYCLE_DMA_1_.BLIF a_i_1__n.BLIF N_216_i.BLIF a_decode_6__n.BLIF \ +SIZE_DMA_0_.BLIF N_124_i.BLIF N_215_i.BLIF SIZE_DMA_1_.BLIF CLK_030_i.BLIF \ +a_decode_5__n.BLIF inst_VPA_D.BLIF clk_000_d_i_0__n.BLIF N_199_i.BLIF \ +inst_UDS_000_INT.BLIF clk_000_d_i_8__n.BLIF N_198_i.BLIF a_decode_4__n.BLIF \ +inst_LDS_000_INT.BLIF AS_000_DMA_i.BLIF sm_amiga_nss_0_6__n.BLIF \ +inst_CLK_OUT_PRE_D.BLIF AS_000_i.BLIF N_21_i.BLIF a_decode_3__n.BLIF \ +CLK_000_D_8_.BLIF CLK_030_H_i.BLIF N_39_0.BLIF CLK_000_D_9_.BLIF \ +AS_030_D0_i.BLIF nEXP_SPACE_c_i.BLIF a_decode_2__n.BLIF inst_DTACK_D0.BLIF \ +cycle_dma_i_0__n.BLIF un1_as_030_i.BLIF inst_RESET_OUT.BLIF \ +a_decode_i_16__n.BLIF N_133_0.BLIF CLK_000_D_1_.BLIF a_decode_i_18__n.BLIF \ +N_214_i.BLIF CLK_000_D_0_.BLIF a_decode_i_19__n.BLIF N_213_i.BLIF \ +inst_CLK_OUT_PRE_50.BLIF ahigh_i_30__n.BLIF N_306_0.BLIF \ +inst_CLK_OUT_PRE_25.BLIF ahigh_i_31__n.BLIF N_26_i.BLIF IPL_D0_0_.BLIF \ +ahigh_i_28__n.BLIF N_34_0.BLIF IPL_D0_1_.BLIF ahigh_i_29__n.BLIF \ +BG_030_c_i.BLIF IPL_D0_2_.BLIF ahigh_i_26__n.BLIF pos_clk_un6_bg_030_i_n.BLIF \ +CLK_000_D_2_.BLIF ahigh_i_27__n.BLIF pos_clk_un9_bg_030_0_n.BLIF \ +CLK_000_D_3_.BLIF ahigh_i_24__n.BLIF N_25_i.BLIF CLK_000_D_4_.BLIF \ +ahigh_i_25__n.BLIF N_35_0.BLIF CLK_000_D_5_.BLIF N_244_i.BLIF N_24_i.BLIF \ +CLK_000_D_6_.BLIF N_245_i.BLIF N_36_0.BLIF CLK_000_D_7_.BLIF N_246_i.BLIF \ +N_22_i.BLIF CLK_000_D_10_.BLIF N_38_0.BLIF pos_clk_un6_bg_030_n.BLIF \ +N_85_i.BLIF N_19_i.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF N_86_i.BLIF \ +N_41_0.BLIF inst_DSACK1_INTreg.BLIF un6_ds_030_i.BLIF N_18_i.BLIF \ +pos_clk_ipl_n.BLIF DS_000_DMA_i.BLIF N_42_0.BLIF inst_DS_000_ENABLE.BLIF \ +un4_as_000_i.BLIF N_10_i.BLIF SM_AMIGA_6_.BLIF un6_as_030_i.BLIF N_44_0.BLIF \ +SM_AMIGA_4_.BLIF un4_lds_000_i.BLIF N_311_0.BLIF SM_AMIGA_0_.BLIF \ +un4_uds_000_i.BLIF un10_ciin_i.BLIF inst_RW_000_INT.BLIF AS_030_c.BLIF \ +N_310_0.BLIF inst_RW_000_DMA.BLIF N_207_i.BLIF RST_DLY_0_.BLIF AS_000_c.BLIF \ +N_208_i.BLIF RST_DLY_1_.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF RST_DLY_2_.BLIF \ +RW_000_c.BLIF N_209_i.BLIF inst_A0_DMA.BLIF pos_clk_size_dma_6_0_0__n.BLIF \ +inst_CLK_030_H.BLIF N_210_i.BLIF SM_AMIGA_1_.BLIF UDS_000_c.BLIF \ +pos_clk_size_dma_6_0_1__n.BLIF SM_AMIGA_5_.BLIF N_268_i.BLIF SM_AMIGA_3_.BLIF \ +LDS_000_c.BLIF pos_clk_un6_bgack_000_0_n.BLIF SM_AMIGA_2_.BLIF \ +un1_SM_AMIGA_0_sqmuxa_1_0.BLIF pos_clk_un3_as_030_d0_n.BLIF size_c_0__n.BLIF \ +RW_c_i.BLIF pos_clk_ds_000_dma_4_n.BLIF pos_clk_rw_000_int_5_0_n.BLIF N_3.BLIF \ +size_c_1__n.BLIF UDS_000_c_i.BLIF N_4.BLIF LDS_000_c_i.BLIF N_5.BLIF \ +ahigh_c_24__n.BLIF N_164_i.BLIF N_7.BLIF N_8.BLIF ahigh_c_25__n.BLIF \ +N_113_i.BLIF N_195_i.BLIF ahigh_c_26__n.BLIF N_174_0.BLIF N_169_i.BLIF \ +ahigh_c_27__n.BLIF N_260_i.BLIF N_168_i.BLIF N_27.BLIF ahigh_c_28__n.BLIF \ +pos_clk_un3_as_030_d0_i_n.BLIF N_29.BLIF \ +pos_clk_un21_bgack_030_int_i_0_0_n.BLIF CLK_OUT_PRE_25_0.BLIF \ +ahigh_c_29__n.BLIF CLK_OUT_PRE_D_i.BLIF N_143_0.BLIF ahigh_c_30__n.BLIF \ +N_396_i.BLIF N_137_i.BLIF ahigh_c_31__n.BLIF N_372_i.BLIF N_236_i.BLIF \ +N_237_i.BLIF N_280_0.BLIF N_281_0.BLIF N_229_i.BLIF N_66_0.BLIF N_371_i.BLIF \ +N_305_0.BLIF N_212_i.BLIF N_307_0.BLIF N_211_i.BLIF \ +pos_clk_ds_000_dma_4_0_n.BLIF N_205_i.BLIF N_206_i.BLIF \ +sm_amiga_nss_0_2__n.BLIF N_200_i.BLIF sm_amiga_nss_0_5__n.BLIF N_197_i.BLIF \ +N_29_i.BLIF SM_AMIGA_i_7_.BLIF N_33_0.BLIF N_27_i.BLIF N_31_0.BLIF \ +ipl_c_i_2__n.BLIF N_54_0.BLIF ipl_c_i_1__n.BLIF N_53_0.BLIF N_113.BLIF \ +a_decode_c_16__n.BLIF ipl_c_i_0__n.BLIF G_117.BLIF N_52_0.BLIF G_118.BLIF \ +a_decode_c_17__n.BLIF N_3_i.BLIF G_119.BLIF N_50_0.BLIF \ +pos_clk_un21_bgack_030_int_i_0_n.BLIF a_decode_c_18__n.BLIF N_4_i.BLIF \ +N_280.BLIF N_49_0.BLIF N_281.BLIF a_decode_c_19__n.BLIF N_5_i.BLIF N_85.BLIF \ +N_48_0.BLIF N_86.BLIF a_decode_c_20__n.BLIF N_7_i.BLIF N_305.BLIF N_47_0.BLIF \ +a_decode_c_21__n.BLIF N_8_i.BLIF N_307.BLIF N_46_0.BLIF N_310.BLIF \ +a_decode_c_22__n.BLIF sm_amiga_nss_i_0_1_0__n.BLIF N_66.BLIF \ +sm_amiga_nss_i_0_2_0__n.BLIF a_decode_c_23__n.BLIF \ +sm_amiga_nss_i_0_3_0__n.BLIF N_136.BLIF sm_amiga_nss_i_0_4_0__n.BLIF \ +N_137.BLIF a_c_0__n.BLIF sm_amiga_nss_i_0_5_0__n.BLIF N_143.BLIF \ +N_373_i_1.BLIF N_147.BLIF a_c_1__n.BLIF pos_clk_un10_sm_amiga_i_1_n.BLIF \ +N_161.BLIF N_124_1.BLIF nEXP_SPACE_c.BLIF N_124_2.BLIF N_174.BLIF N_124_3.BLIF \ +N_178.BLIF BERR_c.BLIF N_124_4.BLIF N_184.BLIF un10_ciin_1.BLIF N_190.BLIF \ +BG_030_c.BLIF un10_ciin_2.BLIF N_193.BLIF un10_ciin_3.BLIF N_195.BLIF \ +BG_000DFFreg.BLIF un10_ciin_4.BLIF N_197.BLIF un10_ciin_5.BLIF N_200.BLIF \ +un10_ciin_6.BLIF N_205.BLIF BGACK_000_c.BLIF un10_ciin_7.BLIF N_206.BLIF \ +un10_ciin_8.BLIF N_208.BLIF CLK_030_c.BLIF un10_ciin_9.BLIF N_211.BLIF \ +un10_ciin_10.BLIF N_212.BLIF un10_ciin_11.BLIF N_213.BLIF \ +pos_clk_un21_bgack_030_int_i_0_0_1_n.BLIF N_223.BLIF CLK_OSZI_c.BLIF \ +pos_clk_un21_bgack_030_int_i_0_0_2_n.BLIF N_229.BLIF N_309_i_1.BLIF N_236.BLIF \ +N_309_i_2.BLIF N_237.BLIF CLK_OUT_INTreg.BLIF N_229_1.BLIF N_243.BLIF \ +N_229_2.BLIF N_396.BLIF N_214_1_0.BLIF N_250.BLIF FPU_SENSE_c.BLIF \ +un21_fpu_cs_1.BLIF N_253.BLIF un22_berr_1_0.BLIF N_254.BLIF \ +IPL_030DFF_0_reg.BLIF N_255_1.BLIF N_257.BLIF N_255_2.BLIF N_259.BLIF \ +IPL_030DFF_1_reg.BLIF N_151_0_1.BLIF N_260.BLIF N_277_i_1.BLIF \ +pos_clk_un21_bgack_030_int_i_0_o2_2_x2.BLIF IPL_030DFF_2_reg.BLIF \ +N_277_i_2.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF N_276_i_1.BLIF \ +un22_berr_1.BLIF ipl_c_0__n.BLIF N_276_i_2.BLIF N_124.BLIF N_221_1.BLIF \ +N_164.BLIF ipl_c_1__n.BLIF N_221_2.BLIF pos_clk_rw_000_int_5_n.BLIF \ +N_220_1.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF ipl_c_2__n.BLIF N_220_2.BLIF \ +pos_clk_un6_bgack_000_n.BLIF N_194_1.BLIF N_268.BLIF N_194_2.BLIF \ +pos_clk_size_dma_6_1__n.BLIF DTACK_c.BLIF N_194_3.BLIF N_210.BLIF \ +N_278_i_1.BLIF pos_clk_size_dma_6_0__n.BLIF N_307_0_1.BLIF N_209.BLIF \ +N_308_i_1.BLIF N_207.BLIF VPA_c.BLIF N_40_i_1.BLIF N_311.BLIF N_250_1.BLIF \ +N_102.BLIF N_223_1.BLIF N_103.BLIF RST_c.BLIF pos_clk_un6_bg_030_1_n.BLIF \ +N_228.BLIF N_213_1.BLIF pos_clk_a0_dma_3_n.BLIF N_208_1.BLIF N_10.BLIF \ +RW_c.BLIF N_205_1.BLIF N_18.BLIF N_193_1.BLIF N_19.BLIF fc_c_0__n.BLIF \ +N_190_1.BLIF N_22.BLIF N_184_1.BLIF N_24.BLIF fc_c_1__n.BLIF \ +pos_clk_ipl_1_n.BLIF N_25.BLIF ipl_030_0_1__un3_n.BLIF \ +pos_clk_un9_bg_030_n.BLIF ipl_030_0_1__un1_n.BLIF N_26.BLIF \ +AMIGA_BUS_DATA_DIR_c.BLIF ipl_030_0_1__un0_n.BLIF N_214.BLIF \ +uds_000_int_0_un3_n.BLIF N_214_1.BLIF uds_000_int_0_un1_n.BLIF N_21.BLIF \ +uds_000_int_0_un0_n.BLIF pos_clk_un9_clk_000_pe_n.BLIF \ +lds_000_int_0_un3_n.BLIF cpu_est_2_1__n.BLIF N_23_i.BLIF \ +lds_000_int_0_un1_n.BLIF cpu_est_2_2__n.BLIF N_37_0.BLIF \ +lds_000_int_0_un0_n.BLIF N_185.BLIF N_17_i.BLIF ds_000_enable_0_un3_n.BLIF \ +N_142.BLIF N_43_0.BLIF ds_000_enable_0_un1_n.BLIF N_258.BLIF VPA_c_i.BLIF \ +ds_000_enable_0_un0_n.BLIF N_186.BLIF N_55_0.BLIF vma_int_0_un3_n.BLIF \ +N_188.BLIF DTACK_c_i.BLIF vma_int_0_un1_n.BLIF N_189.BLIF N_56_0.BLIF \ +vma_int_0_un0_n.BLIF N_266.BLIF N_28_i.BLIF cpu_est_0_1__un3_n.BLIF N_198.BLIF \ +N_32_0.BLIF cpu_est_0_1__un1_n.BLIF N_261.BLIF a_c_i_0__n.BLIF \ +cpu_est_0_1__un0_n.BLIF N_199.BLIF size_c_i_1__n.BLIF cpu_est_0_2__un3_n.BLIF \ +N_215.BLIF pos_clk_un10_sm_amiga_i_n.BLIF cpu_est_0_2__un1_n.BLIF N_216.BLIF \ +N_201_i.BLIF cpu_est_0_2__un0_n.BLIF N_222.BLIF N_202_i.BLIF \ +cpu_est_0_3__un3_n.BLIF N_224.BLIF sm_amiga_nss_0_4__n.BLIF \ +cpu_est_0_3__un1_n.BLIF N_146.BLIF N_204_i.BLIF cpu_est_0_3__un0_n.BLIF \ +N_225.BLIF N_203_i.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF N_173.BLIF \ +sm_amiga_nss_0_3__n.BLIF amiga_bus_enable_dma_high_0_un1_n.BLIF N_226.BLIF \ +N_45_i.BLIF amiga_bus_enable_dma_high_0_un0_n.BLIF N_170.BLIF \ +un1_SM_AMIGA_0_sqmuxa_2_i.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF \ +N_227.BLIF N_279_0.BLIF amiga_bus_enable_dma_low_0_un1_n.BLIF N_145.BLIF \ +N_235_i.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF N_151.BLIF N_234_i.BLIF \ +a0_dma_0_un3_n.BLIF N_397.BLIF N_58_0.BLIF a0_dma_0_un1_n.BLIF N_251.BLIF \ +N_243_i.BLIF a0_dma_0_un0_n.BLIF N_255.BLIF N_254_i.BLIF \ +rw_000_dma_0_un3_n.BLIF N_256.BLIF N_144_0.BLIF rw_000_dma_0_un1_n.BLIF \ +N_267.BLIF N_249_i.BLIF rw_000_dma_0_un0_n.BLIF N_221.BLIF N_247_i.BLIF \ +rw_000_int_0_un3_n.BLIF N_220.BLIF sm_amiga_nss_0_7__n.BLIF \ +rw_000_int_0_un1_n.BLIF N_194.BLIF sm_amiga_i_4__n.BLIF \ +rw_000_int_0_un0_n.BLIF N_373.BLIF N_252_i.BLIF bgack_030_int_0_un3_n.BLIF \ +N_398.BLIF N_153_0.BLIF bgack_030_int_0_un1_n.BLIF N_191.BLIF \ +sm_amiga_i_6__n.BLIF bgack_030_int_0_un0_n.BLIF N_192.BLIF \ +sm_amiga_i_2__n.BLIF bg_000_0_un3_n.BLIF N_172.BLIF N_373_i.BLIF \ +bg_000_0_un1_n.BLIF N_171.BLIF N_171_0.BLIF bg_000_0_un0_n.BLIF N_153.BLIF \ +N_253_i.BLIF size_dma_0_1__un3_n.BLIF N_252.BLIF N_172_0.BLIF \ +size_dma_0_1__un1_n.BLIF N_247.BLIF N_192_i.BLIF size_dma_0_1__un0_n.BLIF \ +N_249.BLIF N_191_i.BLIF size_dma_0_0__un3_n.BLIF N_144.BLIF N_193_i.BLIF \ +size_dma_0_0__un1_n.BLIF N_234.BLIF N_398_i.BLIF size_dma_0_0__un0_n.BLIF \ +N_235.BLIF N_261_i.BLIF un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un3_n.BLIF \ +N_279.BLIF N_194_i.BLIF un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un1_n.BLIF \ +un1_SM_AMIGA_0_sqmuxa_2.BLIF sm_amiga_nss_i_0_0__n.BLIF \ +un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un0_n.BLIF N_203.BLIF \ +as_000_dma_0_un3_n.BLIF N_204.BLIF N_186_i.BLIF as_000_dma_0_un1_n.BLIF \ +N_201.BLIF N_185_i.BLIF as_000_dma_0_un0_n.BLIF N_202.BLIF N_184_i.BLIF \ +ipl_030_0_0__un3_n.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF \ UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF \ AHIGH_24_.PIN.BLIF AHIGH_25_.PIN.BLIF AHIGH_26_.PIN.BLIF AHIGH_27_.PIN.BLIF \ AHIGH_28_.PIN.BLIF AHIGH_29_.PIN.BLIF AHIGH_30_.PIN.BLIF AHIGH_31_.PIN.BLIF \ @@ -306,137 +304,139 @@ SM_AMIGA_2_.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C \ cpu_est_2_.D cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C IPL_030DFF_0_reg.D \ IPL_030DFF_0_reg.C IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D \ IPL_030DFF_2_reg.C IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D IPL_D0_1_.C IPL_D0_2_.D \ -IPL_D0_2_.C CLK_000_D_6_.D CLK_000_D_6_.C CLK_000_D_7_.D CLK_000_D_7_.C \ -CLK_000_D_8_.D CLK_000_D_8_.C CLK_000_D_9_.D CLK_000_D_9_.C CLK_000_D_10_.D \ -CLK_000_D_10_.C CLK_000_D_11_.D CLK_000_D_11_.C CLK_000_D_12_.D \ -CLK_000_D_12_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C \ -SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C cpu_est_0_.D \ -cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C RST_DLY_1_.D RST_DLY_1_.C RST_DLY_2_.D \ -RST_DLY_2_.C CLK_000_D_0_.D CLK_000_D_0_.C CLK_000_D_1_.D CLK_000_D_1_.C \ -CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C CLK_000_D_4_.D \ -CLK_000_D_4_.C CLK_000_D_5_.D CLK_000_D_5_.C RST_DLY_0_.D RST_DLY_0_.C \ -inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_030_000_SYNC.D \ -inst_AS_030_000_SYNC.C inst_AS_000_INT.D inst_AS_000_INT.C \ -inst_DSACK1_INTreg.D inst_DSACK1_INTreg.C inst_DS_000_DMA.D inst_DS_000_DMA.C \ -inst_AS_030_D0.D inst_AS_030_D0.C inst_VPA_D.D inst_VPA_D.C inst_DTACK_D0.D \ -inst_DTACK_D0.C inst_CLK_030_H.D inst_CLK_030_H.C inst_RESET_OUT.D \ -inst_RESET_OUT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C BG_000DFFreg.D \ -BG_000DFFreg.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D \ -inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D \ -inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.D inst_UDS_000_INT.C \ -inst_A0_DMA.D inst_A0_DMA.C inst_VMA_INTreg.D inst_VMA_INTreg.C \ -inst_RW_000_DMA.D inst_RW_000_DMA.C inst_RW_000_INT.D inst_RW_000_INT.C \ +IPL_D0_2_.C CLK_000_D_4_.D CLK_000_D_4_.C CLK_000_D_5_.D CLK_000_D_5_.C \ +CLK_000_D_6_.D CLK_000_D_6_.C CLK_000_D_7_.D CLK_000_D_7_.C CLK_000_D_8_.D \ +CLK_000_D_8_.C CLK_000_D_9_.D CLK_000_D_9_.C CLK_000_D_10_.D CLK_000_D_10_.C \ +CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C SIZE_DMA_0_.D \ +SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C cpu_est_0_.D cpu_est_0_.C \ +cpu_est_1_.D cpu_est_1_.C RST_DLY_1_.D RST_DLY_1_.C RST_DLY_2_.D RST_DLY_2_.C \ +CLK_000_D_0_.D CLK_000_D_0_.C CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_2_.D \ +CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C RST_DLY_0_.D RST_DLY_0_.C \ inst_LDS_000_INT.D inst_LDS_000_INT.C inst_BGACK_030_INTreg.D \ -inst_BGACK_030_INTreg.C inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C \ -inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C \ -inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C SIZE_1_ AHIGH_31_ AS_030 AS_000 \ -RW_000 UDS_000 LDS_000 BERR RW SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ \ -AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ N_28 N_246_i bgack_030_int_0_un1_n N_17 \ -sm_amiga_nss_i_0_0__n bgack_030_int_0_un0_n N_19 dsack1_int_0_un3_n N_23 \ -N_220_i dsack1_int_0_un1_n N_24 N_219_i dsack1_int_0_un0_n N_25 N_218_i \ -cpu_est_0_3__un3_n un1_amiga_bus_enable_low_i cpu_est_0_3__un1_n un21_fpu_cs_i \ -N_224_i cpu_est_0_3__un0_n BGACK_030_INT_i N_222_i cpu_est_0_2__un3_n vcc_n_n \ -AMIGA_BUS_ENABLE_DMA_LOW_i N_223_i cpu_est_0_2__un1_n UDS_000_INT_i N_322_i \ -cpu_est_0_2__un0_n gnd_n_n LDS_000_INT_i N_312_i cpu_est_0_1__un3_n \ -un1_amiga_bus_enable_low N_131_i N_139_0 cpu_est_0_1__un1_n un6_as_030 N_132_i \ -N_108_i cpu_est_0_1__un0_n un3_size RW_000_i N_258_i vma_int_0_un3_n un4_size \ -a_i_1__n N_257_i vma_int_0_un1_n un4_uds_000 clk_000_d_i_11__n vma_int_0_un0_n \ -un4_lds_000 sm_amiga_i_6__n N_245_i ipl_030_0_0__un3_n un4_as_000 \ -clk_000_d_i_1__n nEXP_SPACE_c_i ipl_030_0_0__un1_n un10_ciin AS_030_000_SYNC_i \ -un1_as_030_i ipl_030_0_0__un0_n un21_fpu_cs sm_amiga_i_0__n \ -pos_clk_un3_as_030_d0_0_n ds_000_dma_0_un3_n un22_berr sm_amiga_i_3__n N_107_0 \ -ds_000_dma_0_un1_n un6_ds_030 sm_amiga_i_i_7__n N_115_i ds_000_dma_0_un0_n \ -sm_amiga_i_5__n N_63_0 as_000_dma_0_un3_n rst_dly_i_0__n N_278_0 \ -as_000_dma_0_un1_n rst_dly_i_1__n N_279_0 as_000_dma_0_un0_n N_364_i_0 N_260_i \ -a_decode_15__n cpu_est_i_0__n N_67_0 rst_dly_i_2__n pos_clk_rw_000_int_5_0_n \ -a_decode_14__n AS_030_i un1_SM_AMIGA_0_sqmuxa_1_0 FPU_SENSE_i un10_ciin_i \ -a_decode_13__n N_157_i N_313_0 a_decode_i_16__n N_4_i a_decode_12__n \ -a_decode_i_18__n N_48_0 a_decode_i_19__n N_5_i a_decode_11__n N_113_i N_47_0 \ -N_114_i N_7_i a_decode_10__n AS_000_INT_i N_46_0 size_dma_i_1__n N_18_i \ -a_decode_9__n size_dma_i_0__n N_41_0 RESET_OUT_i N_22_i a_decode_8__n \ -cpu_est_i_1__n N_37_0 cpu_est_i_2__n N_26_i a_decode_7__n VPA_D_i N_33_0 \ -DTACK_D0_i BG_030_c_i a_decode_6__n cpu_est_i_3__n pos_clk_un6_bg_030_i_n \ -CLK_030_i pos_clk_un9_bg_030_0_n a_decode_5__n clk_000_d_i_0__n N_10_i \ -clk_000_d_i_10__n N_43_0 a_decode_4__n AS_000_DMA_i VPA_c_i AS_000_i N_54_0 \ -a_decode_3__n CLK_030_H_i un3_as_030_i cycle_dma_i_0__n N_370_i a_decode_2__n \ -AS_030_D0_i pos_clk_un6_bgack_000_0_n ahigh_i_30__n N_283_i ahigh_i_31__n \ -pos_clk_size_dma_6_0_0__n ahigh_i_28__n N_345_i ahigh_i_29__n \ -pos_clk_size_dma_6_0_1__n ahigh_i_26__n UDS_000_c_i ahigh_i_27__n LDS_000_c_i \ -ahigh_i_24__n N_171_i pos_clk_un6_bg_030_n ahigh_i_25__n N_21_i N_241_i N_38_0 \ -N_242_i DTACK_c_i pos_clk_ipl_n N_243_i N_55_0 N_249_i un6_ds_030_i N_248_i \ -DS_000_DMA_i pos_clk_un9_clk_000_pe_0_n un4_as_000_i N_250_i un6_as_030_i \ -N_251_i un4_lds_000_i cpu_est_2_0_1__n un4_uds_000_i N_253_i AS_030_c N_369_i \ -cpu_est_2_0_2__n AS_000_c N_254_i N_316_i RW_000_c N_256_i N_255_i N_317_i \ -UDS_000_c N_267_i pos_clk_ds_000_dma_4_n N_266_i N_3 LDS_000_c N_57_0 N_8 \ -N_151_0 size_c_0__n N_321_i N_158_i size_c_1__n VMA_INT_i N_361_i \ -ahigh_c_24__n N_362_i N_27 N_169_i ahigh_c_25__n N_186_0 N_195_0 ahigh_c_26__n \ -N_196_0 ahigh_c_27__n N_263_i N_262_i ahigh_c_28__n N_323_0 N_101_i \ -ahigh_c_29__n N_366_i N_182_i ahigh_c_30__n pos_clk_un23_bgack_030_int_i_0_0_n \ -N_310_i ahigh_c_31__n N_359_i N_144_0 CLK_OUT_PRE_D_i N_142_0 N_311_i N_319_i \ -N_93_i N_272_0 N_290_i N_273_0 N_346_i pos_clk_ds_000_dma_4_0_n N_268_i \ -N_269_i sm_amiga_nss_0_3__n N_341_i N_238_i N_239_i sm_amiga_nss_0_2__n N_263 \ -N_235_i N_236_i sm_amiga_nss_0_4__n N_234_i pos_clk_un23_bgack_030_int_i_0_n \ -sm_amiga_nss_0_5__n N_272 N_231_i N_273 N_232_i sm_amiga_nss_0_6__n N_313 \ -N_230_i a_decode_c_16__n sm_amiga_nss_0_7__n N_226_i N_108 a_decode_c_17__n \ -N_331_i N_319 N_142 a_decode_c_18__n un1_as_000_i N_144 N_27_i N_322 \ -a_decode_c_19__n N_30_0 N_169 ipl_c_i_0__n N_195 a_decode_c_20__n N_51_0 N_323 \ -N_3_i N_209 a_decode_c_21__n N_49_0 N_218 N_8_i N_224 a_decode_c_22__n N_45_0 \ -N_226 sm_amiga_nss_i_0_1_0__n N_331 a_decode_c_23__n sm_amiga_nss_i_0_2_0__n \ -N_229 sm_amiga_nss_i_0_3_0__n N_230 a_c_0__n sm_amiga_nss_i_0_4_0__n N_231 \ -sm_amiga_nss_i_0_5_0__n N_232 a_c_1__n pos_clk_un10_sm_amiga_i_1_n N_233 \ -un10_ciin_1 N_234 nEXP_SPACE_c un10_ciin_2 N_235 un10_ciin_3 N_236 BERR_c \ -un10_ciin_4 N_238 un10_ciin_5 N_239 BG_030_c un10_ciin_6 N_240 un10_ciin_7 \ -N_251 un10_ciin_8 N_262 un10_ciin_9 N_341 un10_ciin_10 N_268 BGACK_000_c \ -un10_ciin_11 N_269 pos_clk_un23_bgack_030_int_i_0_0_1_n N_282 CLK_030_c \ -pos_clk_un23_bgack_030_int_i_0_0_2_n N_346 N_60_i_1 N_290 N_60_i_2 N_310 \ -N_248_1 N_311 CLK_OSZI_c N_248_2 N_355 N_249_1 N_356 N_249_2 N_359 N_361_1 \ -N_360 N_361_2 N_365 N_157_1 N_366 FPU_SENSE_c N_157_2 N_157_3 N_157_4 N_248 \ -N_260_1 N_249 N_260_2 N_369 un21_fpu_cs_1 N_196 un22_berr_1_0 N_186 N_275_i_1 \ -N_361 ipl_c_0__n N_275_i_2 N_362 N_274_i_1 N_151 ipl_c_1__n N_274_i_2 N_321 \ -N_115_1 N_266 ipl_c_2__n N_115_2 N_267 N_332_1 N_255 N_246_1 N_256 DTACK_c \ -N_246_2 N_253 N_246_3 N_254 N_246_4 cpu_est_2_2__n N_332_4_1 cpu_est_2_1__n \ -VPA_c N_332_4_2 N_250 N_273_0_1 pos_clk_un9_clk_000_pe_n N_276_i_1 N_364 RST_c \ -N_277_i_1 N_21 N_314_i_1 N_171 N_356_1 pos_clk_size_dma_6_1__n RW_c N_282_1 \ -N_345 N_251_1 pos_clk_size_dma_6_0__n fc_c_0__n pos_clk_un6_bg_030_1_n N_283 \ -N_240_1 pos_clk_un6_bgack_000_n fc_c_1__n N_238_1 N_370 N_233_1 N_259 N_231_1 \ -N_10 AMIGA_BUS_DATA_DIR_c N_224_1 pos_clk_un9_bg_030_n N_218_1 N_4 \ -pos_clk_ipl_1_n N_114 rw_000_dma_0_un3_n N_278 rw_000_dma_0_un1_n N_5 N_25_i \ -rw_000_dma_0_un0_n N_113 N_34_0 lds_000_int_0_un3_n N_279 N_24_i \ -lds_000_int_0_un1_n N_6 N_35_0 lds_000_int_0_un0_n N_115 N_23_i \ -ipl_030_0_1__un3_n N_63 N_36_0 ipl_030_0_1__un1_n N_7 N_19_i \ -ipl_030_0_1__un0_n pos_clk_un3_as_030_d0_n N_40_0 \ -amiga_bus_enable_dma_high_0_un3_n N_67 N_17_i \ -amiga_bus_enable_dma_high_0_un1_n N_18 N_42_0 \ -amiga_bus_enable_dma_high_0_un0_n pos_clk_rw_000_int_5_n ipl_c_i_1__n \ -amiga_bus_enable_dma_low_0_un3_n un1_SM_AMIGA_0_sqmuxa_1 N_52_0 \ -amiga_bus_enable_dma_low_0_un1_n N_22 ipl_c_i_2__n \ -amiga_bus_enable_dma_low_0_un0_n pos_clk_a0_dma_3_n N_53_0 uds_000_int_0_un3_n \ -N_363 N_28_i uds_000_int_0_un1_n N_26 N_31_0 uds_000_int_0_un0_n N_157 N_29_i \ -ipl_030_0_2__un3_n N_260 N_32_0 ipl_030_0_2__un1_n un22_berr_1 a_c_i_0__n \ -ipl_030_0_2__un0_n N_219 size_c_i_1__n \ -un1_amiga_bus_enable_dma_high_i_m2_0__un3_n N_139 pos_clk_un10_sm_amiga_i_n \ -un1_amiga_bus_enable_dma_high_i_m2_0__un1_n N_220 N_332_i \ -un1_amiga_bus_enable_dma_high_i_m2_0__un0_n N_222 N_240_i as_000_int_0_un3_n \ -N_223 N_315_0 as_000_int_0_un1_n N_368 N_281_0 as_000_int_0_un0_n N_257 \ -N_270_i ds_000_enable_0_un3_n N_258 N_282_i ds_000_enable_0_un1_n N_312 \ -AMIGA_BUS_DATA_DIR_c_0 ds_000_enable_0_un0_n N_143 RW_c_i \ -as_030_000_sync_0_un3_n N_332 N_140_0 as_030_000_sync_0_un1_n N_332_4 N_353_i \ -as_030_000_sync_0_un0_n N_246 N_143_0 rw_000_int_0_un3_n N_180 sm_amiga_i_1__n \ -rw_000_int_0_un1_n N_320 N_320_i rw_000_int_0_un0_n N_244 N_357_i \ -a0_dma_0_un3_n N_334 N_356_i a0_dma_0_un1_n N_335 N_156_0 a0_dma_0_un0_n N_159 \ -sm_amiga_i_4__n bg_000_0_un3_n N_156 N_159_i bg_000_0_un1_n N_357 \ -sm_amiga_i_2__n bg_000_0_un0_n N_353 N_180_i size_dma_0_1__un3_n N_140 N_334_i \ -size_dma_0_1__un1_n N_270 N_335_i size_dma_0_1__un0_n N_281 N_244_i \ -size_dma_0_0__un3_n N_131 N_233_i size_dma_0_0__un1_n N_132 N_355_i \ -size_dma_0_0__un0_n N_29 N_229_i bgack_030_int_0_un3_n AS_030.OE AS_000.OE \ +inst_BGACK_030_INTreg.C inst_AS_000_DMA.D inst_AS_000_DMA.C \ +inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_000_INT.D \ +inst_AS_000_INT.C inst_DSACK1_INTreg.D inst_DSACK1_INTreg.C inst_DS_000_DMA.D \ +inst_DS_000_DMA.C inst_AS_030_D0.D inst_AS_030_D0.C inst_VPA_D.D inst_VPA_D.C \ +inst_DTACK_D0.D inst_DTACK_D0.C inst_CLK_030_H.D inst_CLK_030_H.C \ +inst_RESET_OUT.D inst_RESET_OUT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C \ +inst_CLK_OUT_PRE_25.D inst_CLK_OUT_PRE_25.C BG_000DFFreg.D BG_000DFFreg.C \ +inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.C \ +inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AMIGA_BUS_ENABLE_DMA_LOW.C \ +inst_UDS_000_INT.D inst_UDS_000_INT.C inst_A0_DMA.D inst_A0_DMA.C \ +inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_DMA.D inst_RW_000_DMA.C \ +inst_RW_000_INT.D inst_RW_000_INT.C inst_BGACK_030_INT_D.D \ +inst_BGACK_030_INT_D.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C \ +inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C \ +SIZE_1_ AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR RW SIZE_0_ \ +AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ \ +N_28 ipl_030_0_0__un1_n N_17 N_190_i ipl_030_0_0__un0_n N_23 N_188_i \ +ipl_030_0_2__un3_n N_6 N_189_i ipl_030_0_2__un1_n un1_amiga_bus_enable_low_i \ +N_173_0 ipl_030_0_2__un0_n un21_fpu_cs_i N_170_0 ds_000_dma_0_un3_n \ +UDS_000_INT_i N_255_i ds_000_dma_0_un1_n LDS_000_INT_i N_256_i \ +ds_000_dma_0_un0_n AS_030_i N_161_i dsack1_int_0_un3_n vcc_n_n AS_000_INT_i \ +VMA_INT_i dsack1_int_0_un1_n RESET_OUT_i N_152_i dsack1_int_0_un0_n gnd_n_n \ +sm_amiga_i_3__n N_151_0 as_000_int_0_un3_n un1_amiga_bus_enable_low \ +sm_amiga_i_0__n N_251_i as_000_int_0_un1_n un6_as_030 cpu_est_i_1__n N_250_i \ +as_000_int_0_un0_n un3_size cpu_est_i_3__n N_147_i as_030_000_sync_0_un3_n \ +un4_size VPA_D_i N_146_i as_030_000_sync_0_un1_n un4_uds_000 rst_dly_i_0__n \ +N_145_i as_030_000_sync_0_un0_n un4_lds_000 rst_dly_i_1__n N_397_i \ +a_decode_15__n un4_as_000 cpu_est_i_0__n N_142_0 un10_ciin clk_000_d_i_1__n \ +N_136_i a_decode_14__n un21_fpu_cs cpu_est_i_2__n N_248_i un22_berr DTACK_D0_i \ +N_227_i a_decode_13__n un6_ds_030 clk_000_d_i_9__n N_226_i N_258_i_0 N_291_i \ +a_decode_12__n rst_dly_i_2__n N_224_i FPU_SENSE_i N_225_i a_decode_11__n \ +AS_030_000_SYNC_i N_230_i sm_amiga_i_i_7__n N_267_i a_decode_10__n \ +BGACK_030_INT_i cpu_est_2_0_2__n AMIGA_BUS_ENABLE_DMA_LOW_i N_222_i \ +a_decode_9__n N_102_i N_223_i N_103_i cpu_est_2_0_1__n a_decode_8__n \ +size_dma_i_1__n N_221_i size_dma_i_0__n N_220_i a_decode_7__n RW_000_i \ +pos_clk_un9_clk_000_pe_0_n a_i_1__n N_216_i a_decode_6__n N_124_i N_215_i \ +CLK_030_i a_decode_5__n clk_000_d_i_0__n N_199_i clk_000_d_i_8__n N_198_i \ +a_decode_4__n AS_000_DMA_i sm_amiga_nss_0_6__n AS_000_i N_21_i a_decode_3__n \ +CLK_030_H_i N_39_0 AS_030_D0_i nEXP_SPACE_c_i a_decode_2__n cycle_dma_i_0__n \ +un1_as_030_i a_decode_i_16__n N_133_0 a_decode_i_18__n N_214_i \ +a_decode_i_19__n N_213_i ahigh_i_30__n N_306_0 ahigh_i_31__n N_26_i \ +ahigh_i_28__n N_34_0 ahigh_i_29__n BG_030_c_i ahigh_i_26__n \ +pos_clk_un6_bg_030_i_n ahigh_i_27__n pos_clk_un9_bg_030_0_n ahigh_i_24__n \ +N_25_i ahigh_i_25__n N_35_0 N_244_i N_24_i N_245_i N_36_0 N_246_i N_22_i \ +N_38_0 pos_clk_un6_bg_030_n N_85_i N_19_i N_86_i N_41_0 un6_ds_030_i N_18_i \ +pos_clk_ipl_n DS_000_DMA_i N_42_0 un4_as_000_i N_10_i un6_as_030_i N_44_0 \ +un4_lds_000_i N_311_0 un4_uds_000_i un10_ciin_i AS_030_c N_310_0 N_207_i \ +AS_000_c N_208_i AMIGA_BUS_DATA_DIR_c_0 RW_000_c N_209_i \ +pos_clk_size_dma_6_0_0__n N_210_i UDS_000_c pos_clk_size_dma_6_0_1__n N_268_i \ +LDS_000_c pos_clk_un6_bgack_000_0_n un1_SM_AMIGA_0_sqmuxa_1_0 \ +pos_clk_un3_as_030_d0_n size_c_0__n RW_c_i pos_clk_ds_000_dma_4_n \ +pos_clk_rw_000_int_5_0_n N_3 size_c_1__n UDS_000_c_i N_4 LDS_000_c_i N_5 \ +ahigh_c_24__n N_164_i N_7 N_8 ahigh_c_25__n N_113_i N_195_i ahigh_c_26__n \ +N_174_0 N_169_i ahigh_c_27__n N_260_i N_168_i N_27 ahigh_c_28__n \ +pos_clk_un3_as_030_d0_i_n N_29 pos_clk_un21_bgack_030_int_i_0_0_n \ +ahigh_c_29__n CLK_OUT_PRE_D_i N_143_0 ahigh_c_30__n N_396_i N_137_i \ +ahigh_c_31__n N_372_i N_236_i N_237_i N_280_0 N_281_0 N_229_i N_66_0 N_371_i \ +N_305_0 N_212_i N_307_0 N_211_i pos_clk_ds_000_dma_4_0_n N_205_i N_206_i \ +sm_amiga_nss_0_2__n N_200_i sm_amiga_nss_0_5__n N_197_i N_29_i N_33_0 N_27_i \ +N_31_0 ipl_c_i_2__n N_54_0 ipl_c_i_1__n N_53_0 N_113 a_decode_c_16__n \ +ipl_c_i_0__n N_52_0 a_decode_c_17__n N_3_i N_50_0 \ +pos_clk_un21_bgack_030_int_i_0_n a_decode_c_18__n N_4_i N_280 N_49_0 N_281 \ +a_decode_c_19__n N_5_i N_85 N_48_0 N_86 a_decode_c_20__n N_7_i N_305 N_47_0 \ +a_decode_c_21__n N_8_i N_307 N_46_0 N_310 a_decode_c_22__n \ +sm_amiga_nss_i_0_1_0__n N_66 sm_amiga_nss_i_0_2_0__n a_decode_c_23__n \ +sm_amiga_nss_i_0_3_0__n N_136 sm_amiga_nss_i_0_4_0__n N_137 a_c_0__n \ +sm_amiga_nss_i_0_5_0__n N_143 N_373_i_1 N_147 a_c_1__n \ +pos_clk_un10_sm_amiga_i_1_n N_161 N_124_1 nEXP_SPACE_c N_124_2 N_174 N_124_3 \ +N_178 BERR_c N_124_4 N_184 un10_ciin_1 N_190 BG_030_c un10_ciin_2 N_193 \ +un10_ciin_3 N_195 un10_ciin_4 N_197 un10_ciin_5 N_200 un10_ciin_6 N_205 \ +BGACK_000_c un10_ciin_7 N_206 un10_ciin_8 N_208 CLK_030_c un10_ciin_9 N_211 \ +un10_ciin_10 N_212 un10_ciin_11 N_213 pos_clk_un21_bgack_030_int_i_0_0_1_n \ +N_223 CLK_OSZI_c pos_clk_un21_bgack_030_int_i_0_0_2_n N_229 N_309_i_1 N_236 \ +N_309_i_2 N_237 N_229_1 N_243 N_229_2 N_396 N_214_1_0 N_250 FPU_SENSE_c \ +un21_fpu_cs_1 N_253 un22_berr_1_0 N_254 N_255_1 N_257 N_255_2 N_259 N_151_0_1 \ +N_260 N_277_i_1 N_277_i_2 N_276_i_1 un22_berr_1 ipl_c_0__n N_276_i_2 N_124 \ +N_221_1 N_164 ipl_c_1__n N_221_2 pos_clk_rw_000_int_5_n N_220_1 \ +un1_SM_AMIGA_0_sqmuxa_1 ipl_c_2__n N_220_2 pos_clk_un6_bgack_000_n N_194_1 \ +N_268 N_194_2 pos_clk_size_dma_6_1__n DTACK_c N_194_3 N_210 N_278_i_1 \ +pos_clk_size_dma_6_0__n N_307_0_1 N_209 N_308_i_1 N_207 VPA_c N_40_i_1 N_311 \ +N_250_1 N_102 N_223_1 N_103 RST_c pos_clk_un6_bg_030_1_n N_228 N_213_1 \ +pos_clk_a0_dma_3_n N_208_1 N_10 RW_c N_205_1 N_18 N_193_1 N_19 fc_c_0__n \ +N_190_1 N_22 N_184_1 N_24 fc_c_1__n pos_clk_ipl_1_n N_25 ipl_030_0_1__un3_n \ +pos_clk_un9_bg_030_n ipl_030_0_1__un1_n N_26 AMIGA_BUS_DATA_DIR_c \ +ipl_030_0_1__un0_n N_214 uds_000_int_0_un3_n N_214_1 uds_000_int_0_un1_n N_21 \ +uds_000_int_0_un0_n pos_clk_un9_clk_000_pe_n lds_000_int_0_un3_n \ +cpu_est_2_1__n N_23_i lds_000_int_0_un1_n cpu_est_2_2__n N_37_0 \ +lds_000_int_0_un0_n N_185 N_17_i ds_000_enable_0_un3_n N_142 N_43_0 \ +ds_000_enable_0_un1_n N_258 VPA_c_i ds_000_enable_0_un0_n N_186 N_55_0 \ +vma_int_0_un3_n N_188 DTACK_c_i vma_int_0_un1_n N_189 N_56_0 vma_int_0_un0_n \ +N_266 N_28_i cpu_est_0_1__un3_n N_198 N_32_0 cpu_est_0_1__un1_n N_261 \ +a_c_i_0__n cpu_est_0_1__un0_n N_199 size_c_i_1__n cpu_est_0_2__un3_n N_215 \ +pos_clk_un10_sm_amiga_i_n cpu_est_0_2__un1_n N_216 N_201_i cpu_est_0_2__un0_n \ +N_222 N_202_i cpu_est_0_3__un3_n N_224 sm_amiga_nss_0_4__n cpu_est_0_3__un1_n \ +N_146 N_204_i cpu_est_0_3__un0_n N_225 N_203_i \ +amiga_bus_enable_dma_high_0_un3_n N_173 sm_amiga_nss_0_3__n \ +amiga_bus_enable_dma_high_0_un1_n N_226 N_45_i \ +amiga_bus_enable_dma_high_0_un0_n N_170 un1_SM_AMIGA_0_sqmuxa_2_i \ +amiga_bus_enable_dma_low_0_un3_n N_227 N_279_0 \ +amiga_bus_enable_dma_low_0_un1_n N_145 N_235_i \ +amiga_bus_enable_dma_low_0_un0_n N_151 N_234_i a0_dma_0_un3_n N_397 N_58_0 \ +a0_dma_0_un1_n N_251 N_243_i a0_dma_0_un0_n N_255 N_254_i rw_000_dma_0_un3_n \ +N_256 N_144_0 rw_000_dma_0_un1_n N_267 N_249_i rw_000_dma_0_un0_n N_221 \ +N_247_i rw_000_int_0_un3_n N_220 sm_amiga_nss_0_7__n rw_000_int_0_un1_n N_194 \ +sm_amiga_i_4__n rw_000_int_0_un0_n N_373 N_252_i bgack_030_int_0_un3_n N_398 \ +N_153_0 bgack_030_int_0_un1_n N_191 sm_amiga_i_6__n bgack_030_int_0_un0_n \ +N_192 sm_amiga_i_2__n bg_000_0_un3_n N_172 N_373_i bg_000_0_un1_n N_171 \ +N_171_0 bg_000_0_un0_n N_153 N_253_i size_dma_0_1__un3_n N_252 N_172_0 \ +size_dma_0_1__un1_n N_247 N_192_i size_dma_0_1__un0_n N_249 N_191_i \ +size_dma_0_0__un3_n N_144 N_193_i size_dma_0_0__un1_n N_234 N_398_i \ +size_dma_0_0__un0_n N_235 N_261_i \ +un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un3_n N_279 N_194_i \ +un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un1_n un1_SM_AMIGA_0_sqmuxa_2 \ +sm_amiga_nss_i_0_0__n un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un0_n N_203 \ +as_000_dma_0_un3_n N_204 N_186_i as_000_dma_0_un1_n N_201 N_185_i \ +as_000_dma_0_un0_n N_202 N_184_i ipl_030_0_0__un3_n AS_030.OE AS_000.OE \ RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE \ AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE \ -AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE RESET.OE CIIN.OE G_116 \ -G_117 G_118 pos_clk_un23_bgack_030_int_i_0_o2_2_x2 \ +AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE RESET.OE CIIN.OE \ +CLK_OUT_PRE_25_0 G_117 G_118 G_119 pos_clk_un21_bgack_030_int_i_0_o2_2_x2 \ pos_clk_CYCLE_DMA_5_1_i_0_x2 .names sm_amiga_nss_i_0_0__n.BLIF SM_AMIGA_i_7_.D 0 1 -.names N_315_0.BLIF SM_AMIGA_6_.D +.names N_306_0.BLIF SM_AMIGA_6_.D 0 1 .names sm_amiga_nss_0_2__n.BLIF SM_AMIGA_5_.D 0 1 @@ -456,21 +456,21 @@ pos_clk_CYCLE_DMA_5_1_i_0_x2 .names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_.D 1- 1 -1 1 -.names N_30_0.BLIF IPL_030DFF_0_reg.D +.names N_31_0.BLIF IPL_030DFF_0_reg.D 0 1 -.names N_31_0.BLIF IPL_030DFF_1_reg.D +.names N_32_0.BLIF IPL_030DFF_1_reg.D 0 1 -.names N_32_0.BLIF IPL_030DFF_2_reg.D +.names N_33_0.BLIF IPL_030DFF_2_reg.D 0 1 -.names N_51_0.BLIF IPL_D0_0_.D +.names N_52_0.BLIF IPL_D0_0_.D 0 1 -.names N_52_0.BLIF IPL_D0_1_.D +.names N_53_0.BLIF IPL_D0_1_.D 0 1 -.names N_53_0.BLIF IPL_D0_2_.D +.names N_54_0.BLIF IPL_D0_2_.D 0 1 -.names N_60_i_1.BLIF N_60_i_2.BLIF CYCLE_DMA_0_.D +.names N_309_i_1.BLIF N_309_i_2.BLIF CYCLE_DMA_0_.D 11 1 -.names N_277_i_1.BLIF N_101_i.BLIF CYCLE_DMA_1_.D +.names N_40_i_1.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF CYCLE_DMA_1_.D 11 1 .names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D 1- 1 @@ -478,1206 +478,1194 @@ pos_clk_CYCLE_DMA_5_1_i_0_x2 .names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D 1- 1 -1 1 -.names N_257_i.BLIF N_258_i.BLIF cpu_est_0_.D +.names N_215_i.BLIF N_216_i.BLIF cpu_est_0_.D 11 1 .names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D 1- 1 -1 1 -.names N_275_i_1.BLIF N_275_i_2.BLIF RST_DLY_1_.D +.names N_277_i_1.BLIF N_277_i_2.BLIF RST_DLY_1_.D 11 1 -.names N_274_i_1.BLIF N_274_i_2.BLIF RST_DLY_2_.D +.names N_276_i_1.BLIF N_276_i_2.BLIF RST_DLY_2_.D 11 1 -.names N_314_i_1.BLIF RST_c.BLIF RST_DLY_0_.D +.names N_278_i_1.BLIF RST_c.BLIF RST_DLY_0_.D 11 1 -.names N_45_0.BLIF inst_AS_000_DMA.D +.names N_43_0.BLIF inst_LDS_000_INT.D 0 1 -.names N_46_0.BLIF inst_AS_030_000_SYNC.D +.names N_44_0.BLIF inst_BGACK_030_INTreg.D 0 1 -.names N_47_0.BLIF inst_AS_000_INT.D +.names N_46_0.BLIF inst_AS_000_DMA.D 0 1 -.names N_48_0.BLIF inst_DSACK1_INTreg.D +.names N_47_0.BLIF inst_AS_030_000_SYNC.D 0 1 -.names N_49_0.BLIF inst_DS_000_DMA.D +.names N_48_0.BLIF inst_AS_000_INT.D 0 1 -.names N_107_0.BLIF inst_AS_030_D0.D +.names N_49_0.BLIF inst_DSACK1_INTreg.D 0 1 -.names N_54_0.BLIF inst_VPA_D.D +.names N_50_0.BLIF inst_DS_000_DMA.D 0 1 -.names N_55_0.BLIF inst_DTACK_D0.D +.names N_133_0.BLIF inst_AS_030_D0.D 0 1 -.names N_276_i_1.BLIF pos_clk_un23_bgack_030_int_i_0_0_n.BLIF inst_CLK_030_H.D +.names N_55_0.BLIF inst_VPA_D.D +0 1 +.names N_56_0.BLIF inst_DTACK_D0.D +0 1 +.names N_308_i_1.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF inst_CLK_030_H.D 11 1 -.names N_57_0.BLIF inst_RESET_OUT.D +.names N_58_0.BLIF inst_RESET_OUT.D 0 1 .names N_6.BLIF RST_c.BLIF inst_DS_000_ENABLE.D 11 1 -.names N_33_0.BLIF BG_000DFFreg.D +.names N_34_0.BLIF BG_000DFFreg.D 0 1 -.names N_34_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D +.names N_35_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D 0 1 -.names N_35_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D +.names N_36_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D 0 1 -.names N_36_0.BLIF inst_UDS_000_INT.D +.names N_37_0.BLIF inst_UDS_000_INT.D 0 1 -.names N_37_0.BLIF inst_A0_DMA.D +.names N_38_0.BLIF inst_A0_DMA.D 0 1 -.names N_38_0.BLIF inst_VMA_INTreg.D +.names N_39_0.BLIF inst_VMA_INTreg.D 0 1 -.names N_40_0.BLIF inst_RW_000_DMA.D +.names N_41_0.BLIF inst_RW_000_DMA.D 0 1 -.names N_41_0.BLIF inst_RW_000_INT.D +.names N_42_0.BLIF inst_RW_000_INT.D 0 1 -.names N_42_0.BLIF inst_LDS_000_INT.D -0 1 -.names N_43_0.BLIF inst_BGACK_030_INTreg.D -0 1 -.names N_101_i.BLIF inst_BGACK_030_INT_D.D +.names N_169_i.BLIF inst_BGACK_030_INT_D.D 0 1 .names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D 0 1 .names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF N_28 1- 1 -1 1 -.names N_246.BLIF N_246_i -0 1 -.names BGACK_000_c.BLIF pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n +.names ipl_c_0__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_0__un1_n 11 1 .names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF N_17 1- 1 -1 1 -.names sm_amiga_nss_i_0_4_0__n.BLIF sm_amiga_nss_i_0_5_0__n.BLIF \ -sm_amiga_nss_i_0_0__n +.names N_190.BLIF N_190_i +0 1 +.names IPL_030DFF_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n 11 1 -.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \ -bgack_030_int_0_un0_n +.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_23 +1- 1 +-1 1 +.names N_188.BLIF N_188_i +0 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_2__un3_n +0 1 +.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_6 +1- 1 +-1 1 +.names N_189.BLIF N_189_i +0 1 +.names ipl_c_2__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_2__un1_n +11 1 +.names un1_amiga_bus_enable_low.BLIF un1_amiga_bus_enable_low_i +0 1 +.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF N_173_0 +11 1 +.names IPL_030DFF_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n +11 1 +.names un21_fpu_cs.BLIF un21_fpu_cs_i +0 1 +.names cpu_est_1_.BLIF cpu_est_i_3__n.BLIF N_170_0 +11 1 +.names N_307.BLIF ds_000_dma_0_un3_n +0 1 +.names inst_UDS_000_INT.BLIF UDS_000_INT_i +0 1 +.names N_255.BLIF N_255_i +0 1 +.names pos_clk_ds_000_dma_4_n.BLIF N_307.BLIF ds_000_dma_0_un1_n +11 1 +.names inst_LDS_000_INT.BLIF LDS_000_INT_i +0 1 +.names N_256.BLIF N_256_i +0 1 +.names inst_DS_000_DMA.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n +11 1 +.names AS_030_c.BLIF AS_030_i +0 1 +.names N_255_i.BLIF N_256_i.BLIF N_161_i +11 1 +.names N_280.BLIF dsack1_int_0_un3_n +0 1 +.names vcc_n_n + 1 +.names inst_AS_000_INT.BLIF AS_000_INT_i +0 1 +.names inst_VMA_INTreg.BLIF VMA_INT_i +0 1 +.names N_86_i.BLIF N_280.BLIF dsack1_int_0_un1_n +11 1 +.names inst_RESET_OUT.BLIF RESET_OUT_i +0 1 +.names cpu_est_i_0__n.BLIF cpu_est_i_2__n.BLIF N_152_i +11 1 +.names inst_DSACK1_INTreg.BLIF dsack1_int_0_un3_n.BLIF dsack1_int_0_un0_n +11 1 +.names gnd_n_n +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names N_151_0_1.BLIF N_251_i.BLIF N_151_0 +11 1 +.names N_281.BLIF as_000_int_0_un3_n +0 1 +.names AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF BGACK_030_INT_i.BLIF \ +un1_amiga_bus_enable_low +11 1 +.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n +0 1 +.names N_251.BLIF N_251_i +0 1 +.names N_85_i.BLIF N_281.BLIF as_000_int_0_un1_n +11 1 +.names AS_000_DMA_i.BLIF AS_000_i.BLIF un6_as_030 +11 1 +.names cpu_est_1_.BLIF cpu_est_i_1__n +0 1 +.names N_250.BLIF N_250_i +0 1 +.names inst_AS_000_INT.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n +11 1 +.names SIZE_DMA_1_.BLIF size_dma_i_0__n.BLIF un3_size +11 1 +.names cpu_est_3_.BLIF cpu_est_i_3__n +0 1 +.names RST_DLY_0_.BLIF RST_DLY_1_.BLIF N_147_i +11 1 +.names N_66.BLIF as_030_000_sync_0_un3_n +0 1 +.names SIZE_DMA_0_.BLIF size_dma_i_1__n.BLIF un4_size +11 1 +.names inst_VPA_D.BLIF VPA_D_i +0 1 +.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_146_i +11 1 +.names pos_clk_un3_as_030_d0_n.BLIF N_66.BLIF as_030_000_sync_0_un1_n +11 1 +.names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un4_uds_000 +11 1 +.names RST_DLY_0_.BLIF rst_dly_i_0__n +0 1 +.names cpu_est_3_.BLIF cpu_est_i_1__n.BLIF N_145_i +11 1 +.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ +as_030_000_sync_0_un0_n +11 1 +.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un4_lds_000 +11 1 +.names RST_DLY_1_.BLIF rst_dly_i_1__n +0 1 +.names N_397.BLIF N_397_i +0 1 +.names AS_000_INT_i.BLIF AS_030_i.BLIF un4_as_000 +11 1 +.names cpu_est_0_.BLIF cpu_est_i_0__n +0 1 +.names N_397_i.BLIF RST_c.BLIF N_142_0 +11 1 +.names un10_ciin_10.BLIF un10_ciin_11.BLIF un10_ciin +11 1 +.names CLK_000_D_1_.BLIF clk_000_d_i_1__n +0 1 +.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_136_i +11 1 +.names un21_fpu_cs_1.BLIF un22_berr_1.BLIF un21_fpu_cs +11 1 +.names cpu_est_2_.BLIF cpu_est_i_2__n +0 1 +.names N_258_i_0.BLIF RST_c.BLIF N_248_i +11 1 +.names un22_berr_1_0.BLIF FPU_SENSE_c.BLIF un22_berr +11 1 +.names inst_DTACK_D0.BLIF DTACK_D0_i +0 1 +.names N_227.BLIF N_227_i +0 1 +.names AS_000_i.BLIF DS_000_DMA_i.BLIF un6_ds_030 +11 1 +.names CLK_000_D_9_.BLIF clk_000_d_i_9__n +0 1 +.names N_226.BLIF N_226_i +0 1 +.names N_258.BLIF N_258_i_0 +0 1 +.names N_226_i.BLIF N_227_i.BLIF N_291_i +11 1 +.names RST_DLY_2_.BLIF rst_dly_i_2__n +0 1 +.names N_224.BLIF N_224_i +0 1 +.names FPU_SENSE_c.BLIF FPU_SENSE_i +0 1 +.names N_225.BLIF N_225_i +0 1 +.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i +0 1 +.names N_224_i.BLIF N_225_i.BLIF N_230_i +11 1 +.names SM_AMIGA_i_7_.BLIF sm_amiga_i_i_7__n +0 1 +.names N_267.BLIF N_267_i +0 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +0 1 +.names N_224_i.BLIF N_267_i.BLIF cpu_est_2_0_2__n +11 1 +.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i +0 1 +.names N_222.BLIF N_222_i +0 1 +.names N_102.BLIF N_102_i +0 1 +.names N_223.BLIF N_223_i +0 1 +.names N_103.BLIF N_103_i +0 1 +.names N_222_i.BLIF N_223_i.BLIF cpu_est_2_0_1__n +11 1 +.names SIZE_DMA_1_.BLIF size_dma_i_1__n +0 1 +.names N_221.BLIF N_221_i +0 1 +.names SIZE_DMA_0_.BLIF size_dma_i_0__n +0 1 +.names N_220.BLIF N_220_i +0 1 +.names RW_000_c.BLIF RW_000_i +0 1 +.names N_220_i.BLIF N_221_i.BLIF pos_clk_un9_clk_000_pe_0_n +11 1 +.names a_c_1__n.BLIF a_i_1__n +0 1 +.names N_216.BLIF N_216_i +0 1 +.names N_124.BLIF N_124_i +0 1 +.names N_215.BLIF N_215_i +0 1 +.names CLK_030_c.BLIF CLK_030_i +0 1 +.names CLK_000_D_0_.BLIF clk_000_d_i_0__n +0 1 +.names N_199.BLIF N_199_i +0 1 +.names CLK_000_D_8_.BLIF clk_000_d_i_8__n +0 1 +.names N_198.BLIF N_198_i +0 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_i +0 1 +.names N_198_i.BLIF N_199_i.BLIF sm_amiga_nss_0_6__n +11 1 +.names AS_000_c.BLIF AS_000_i +0 1 +.names N_21.BLIF N_21_i +0 1 +.names inst_CLK_030_H.BLIF CLK_030_H_i +0 1 +.names N_21_i.BLIF RST_c.BLIF N_39_0 +11 1 +.names inst_AS_030_D0.BLIF AS_030_D0_i +0 1 +.names nEXP_SPACE_c.BLIF nEXP_SPACE_c_i +0 1 +.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n +0 1 +.names BGACK_030_INT_i.BLIF nEXP_SPACE_c_i.BLIF un1_as_030_i +11 1 +.names a_decode_c_16__n.BLIF a_decode_i_16__n +0 1 +.names AS_030_i.BLIF RST_c.BLIF N_133_0 +11 1 +.names a_decode_c_18__n.BLIF a_decode_i_18__n +0 1 +.names N_214.BLIF N_214_i +0 1 +.names a_decode_c_19__n.BLIF a_decode_i_19__n +0 1 +.names N_213.BLIF N_213_i +0 1 +.names ahigh_c_30__n.BLIF ahigh_i_30__n +0 1 +.names N_213_i.BLIF N_214_i.BLIF N_306_0 +11 1 +.names ahigh_c_31__n.BLIF ahigh_i_31__n +0 1 +.names N_26.BLIF N_26_i +0 1 +.names ahigh_c_28__n.BLIF ahigh_i_28__n +0 1 +.names N_26_i.BLIF RST_c.BLIF N_34_0 +11 1 +.names ahigh_c_29__n.BLIF ahigh_i_29__n +0 1 +.names BG_030_c.BLIF BG_030_c_i +0 1 +.names ahigh_c_26__n.BLIF ahigh_i_26__n +0 1 +.names pos_clk_un6_bg_030_n.BLIF pos_clk_un6_bg_030_i_n +0 1 +.names ahigh_c_27__n.BLIF ahigh_i_27__n +0 1 +.names BG_030_c_i.BLIF pos_clk_un6_bg_030_i_n.BLIF pos_clk_un9_bg_030_0_n +11 1 +.names ahigh_c_24__n.BLIF ahigh_i_24__n +0 1 +.names N_25.BLIF N_25_i +0 1 +.names ahigh_c_25__n.BLIF ahigh_i_25__n +0 1 +.names N_25_i.BLIF RST_c.BLIF N_35_0 +11 1 +.names G_117.BLIF N_244_i +0 1 +.names N_24.BLIF N_24_i +0 1 +.names G_118.BLIF N_245_i +0 1 +.names N_24_i.BLIF RST_c.BLIF N_36_0 +11 1 +.names G_119.BLIF N_246_i +0 1 +.names N_22.BLIF N_22_i +0 1 +.names N_22_i.BLIF RST_c.BLIF N_38_0 +11 1 +.names pos_clk_un6_bg_030_1_n.BLIF CLK_000_D_0_.BLIF pos_clk_un6_bg_030_n +11 1 +.names N_85.BLIF N_85_i +0 1 +.names N_19.BLIF N_19_i +0 1 +.names N_86.BLIF N_86_i +0 1 +.names N_19_i.BLIF RST_c.BLIF N_41_0 +11 1 +.names un6_ds_030.BLIF un6_ds_030_i +0 1 +.names N_18.BLIF N_18_i +0 1 +.names pos_clk_ipl_1_n.BLIF N_245_i.BLIF pos_clk_ipl_n +11 1 +.names inst_DS_000_DMA.BLIF DS_000_DMA_i +0 1 +.names N_18_i.BLIF RST_c.BLIF N_42_0 +11 1 +.names un4_as_000.BLIF un4_as_000_i +0 1 +.names N_10.BLIF N_10_i +0 1 +.names un6_as_030.BLIF un6_as_030_i +0 1 +.names N_10_i.BLIF RST_c.BLIF N_44_0 +11 1 +.names un4_lds_000.BLIF un4_lds_000_i +0 1 +.names BGACK_030_INT_i.BLIF RW_000_i.BLIF N_311_0 +11 1 +.names un4_uds_000.BLIF un4_uds_000_i +0 1 +.names un10_ciin.BLIF un10_ciin_i +0 1 +.names nEXP_SPACE_c_i.BLIF un10_ciin_i.BLIF N_310_0 +11 1 +.names N_207.BLIF N_207_i +0 1 +.names N_208.BLIF N_208_i +0 1 +.names N_207_i.BLIF N_208_i.BLIF AMIGA_BUS_DATA_DIR_c_0 +11 1 +.names N_209.BLIF N_209_i +0 1 +.names N_209_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n +11 1 +.names N_210.BLIF N_210_i +0 1 +.names N_210_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n +11 1 +.names N_268.BLIF N_268_i +0 1 +.names BGACK_000_c.BLIF N_268_i.BLIF pos_clk_un6_bgack_000_0_n +11 1 +.names N_85_i.BLIF N_168_i.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 +11 1 +.names pos_clk_un3_as_030_d0_i_n.BLIF pos_clk_un3_as_030_d0_n +0 1 +.names RW_c.BLIF RW_c_i +0 1 +.names pos_clk_ds_000_dma_4_0_n.BLIF pos_clk_ds_000_dma_4_n +0 1 +.names N_168_i.BLIF RW_c_i.BLIF pos_clk_rw_000_int_5_0_n +11 1 +.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF N_3 +1- 1 +-1 1 +.names UDS_000_c.BLIF UDS_000_c_i +0 1 +.names dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF N_4 +1- 1 +-1 1 +.names LDS_000_c.BLIF LDS_000_c_i +0 1 +.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF N_5 +1- 1 +-1 1 +.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_164_i +11 1 +.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_7 +1- 1 +-1 1 +.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF N_8 +1- 1 +-1 1 +.names N_113.BLIF N_113_i +0 1 +.names N_195.BLIF N_195_i +0 1 +.names AS_000_DMA_i.BLIF CLK_030_i.BLIF N_174_0 +11 1 +.names BGACK_030_INT_i.BLIF RST_c.BLIF N_169_i +11 1 +.names N_260.BLIF N_260_i +0 1 +.names N_260_i.BLIF SM_AMIGA_i_7_.BLIF N_168_i +11 1 +.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_27 +1- 1 +-1 1 +.names AS_030_D0_i.BLIF BERR_c.BLIF pos_clk_un3_as_030_d0_i_n +11 1 +.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_29 +1- 1 +-1 1 +.names pos_clk_un21_bgack_030_int_i_0_0_1_n.BLIF \ +pos_clk_un21_bgack_030_int_i_0_0_2_n.BLIF pos_clk_un21_bgack_030_int_i_0_0_n +11 1 +.names inst_CLK_OUT_PRE_D.BLIF CLK_OUT_PRE_D_i +0 1 +.names CLK_030_c.BLIF CLK_OUT_PRE_D_i.BLIF N_143_0 +11 1 +.names N_396.BLIF N_396_i +0 1 +.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_137_i +11 1 +.names BGACK_030_INT_i.BLIF inst_RESET_OUT.BLIF N_372_i +11 1 +.names N_236.BLIF N_236_i +0 1 +.names N_237.BLIF N_237_i +0 1 +.names N_86_i.BLIF pos_clk_un3_as_030_d0_i_n.BLIF N_280_0 +11 1 +.names N_85_i.BLIF pos_clk_un3_as_030_d0_i_n.BLIF N_281_0 +11 1 +.names N_229.BLIF N_229_i +0 1 +.names N_229_i.BLIF pos_clk_un3_as_030_d0_i_n.BLIF N_66_0 +11 1 +.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF N_371_i +11 1 +.names CLK_030_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF N_305_0 +11 1 +.names N_212.BLIF N_212_i +0 1 +.names N_307_0_1.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF N_307_0 +11 1 +.names N_211.BLIF N_211_i +0 1 +.names N_211_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF \ +pos_clk_ds_000_dma_4_0_n +11 1 +.names N_205.BLIF N_205_i +0 1 +.names N_206.BLIF N_206_i +0 1 +.names N_205_i.BLIF N_206_i.BLIF sm_amiga_nss_0_2__n +11 1 +.names N_200.BLIF N_200_i +0 1 +.names N_193_i.BLIF N_200_i.BLIF sm_amiga_nss_0_5__n +11 1 +.names N_197.BLIF N_197_i +0 1 +.names N_29.BLIF N_29_i +0 1 +.names N_29_i.BLIF RST_c.BLIF N_33_0 +11 1 +.names N_27.BLIF N_27_i +0 1 +.names N_27_i.BLIF RST_c.BLIF N_31_0 +11 1 +.names ipl_c_2__n.BLIF ipl_c_i_2__n +0 1 +.names ipl_c_i_2__n.BLIF RST_c.BLIF N_54_0 +11 1 +.names ipl_c_1__n.BLIF ipl_c_i_1__n +0 1 +.names ipl_c_i_1__n.BLIF RST_c.BLIF N_53_0 +11 1 +.names CYCLE_DMA_0_.BLIF N_137_i.BLIF N_113 +11 1 +.names ipl_c_0__n.BLIF ipl_c_i_0__n +0 1 +.names ipl_c_i_0__n.BLIF RST_c.BLIF N_52_0 +11 1 +.names N_3.BLIF N_3_i +0 1 +.names N_3_i.BLIF RST_c.BLIF N_50_0 +11 1 +.names pos_clk_un21_bgack_030_int_i_0_0_n.BLIF \ +pos_clk_un21_bgack_030_int_i_0_n +0 1 +.names N_4.BLIF N_4_i +0 1 +.names N_280_0.BLIF N_280 +0 1 +.names N_4_i.BLIF RST_c.BLIF N_49_0 +11 1 +.names N_281_0.BLIF N_281 +0 1 +.names N_5.BLIF N_5_i +0 1 +.names N_137_i.BLIF SM_AMIGA_6_.BLIF N_85 +11 1 +.names N_5_i.BLIF RST_c.BLIF N_48_0 +11 1 +.names N_151.BLIF SM_AMIGA_1_.BLIF N_86 +11 1 +.names N_7.BLIF N_7_i +0 1 +.names N_305_0.BLIF N_305 +0 1 +.names N_7_i.BLIF RST_c.BLIF N_47_0 +11 1 +.names N_8.BLIF N_8_i +0 1 +.names N_307_0.BLIF N_307 +0 1 +.names N_8_i.BLIF RST_c.BLIF N_46_0 +11 1 +.names N_310_0.BLIF N_310 +0 1 +.names N_191_i.BLIF N_192_i.BLIF sm_amiga_nss_i_0_1_0__n +11 1 +.names N_66_0.BLIF N_66 +0 1 +.names N_193_i.BLIF sm_amiga_nss_0_7__n.BLIF sm_amiga_nss_i_0_2_0__n +11 1 +.names N_194_i.BLIF N_261_i.BLIF sm_amiga_nss_i_0_3_0__n +11 1 +.names N_136_i.BLIF N_136 +0 1 +.names sm_amiga_nss_i_0_1_0__n.BLIF sm_amiga_nss_i_0_2_0__n.BLIF \ +sm_amiga_nss_i_0_4_0__n +11 1 +.names N_137_i.BLIF N_137 +0 1 +.names sm_amiga_nss_i_0_3_0__n.BLIF N_398_i.BLIF sm_amiga_nss_i_0_5_0__n +11 1 +.names N_143_0.BLIF N_143 +0 1 +.names sm_amiga_i_2__n.BLIF sm_amiga_i_6__n.BLIF N_373_i_1 +11 1 +.names N_147_i.BLIF N_147 +0 1 +.names size_c_0__n.BLIF a_c_i_0__n.BLIF pos_clk_un10_sm_amiga_i_1_n +11 1 +.names N_161_i.BLIF N_161 +0 1 +.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_124_1 +11 1 +.names a_decode_c_17__n.BLIF a_decode_i_16__n.BLIF N_124_2 +11 1 +.names N_174_0.BLIF N_174 +0 1 +.names a_decode_i_18__n.BLIF a_decode_i_19__n.BLIF N_124_3 +11 1 +.names un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un1_n.BLIF \ +un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un0_n.BLIF N_178 +1- 1 +-1 1 +.names N_124_1.BLIF N_124_2.BLIF N_124_4 +11 1 +.names N_184_1.BLIF rst_dly_i_2__n.BLIF N_184 +11 1 +.names ahigh_i_24__n.BLIF ahigh_i_25__n.BLIF un10_ciin_1 +11 1 +.names N_190_1.BLIF rst_dly_i_1__n.BLIF N_190 +11 1 +.names ahigh_i_26__n.BLIF ahigh_i_27__n.BLIF un10_ciin_2 +11 1 +.names N_193_1.BLIF SM_AMIGA_3_.BLIF N_193 +11 1 +.names ahigh_i_28__n.BLIF ahigh_i_29__n.BLIF un10_ciin_3 +11 1 +.names cycle_dma_i_0__n.BLIF N_137.BLIF N_195 +11 1 +.names ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF un10_ciin_4 +11 1 +.names CLK_030_H_i.BLIF N_174.BLIF N_197 +11 1 +.names a_decode_c_23__n.BLIF AS_030_D0_i.BLIF un10_ciin_5 +11 1 +.names N_259.BLIF SM_AMIGA_2_.BLIF N_200 +11 1 +.names a_decode_c_20__n.BLIF a_decode_c_21__n.BLIF un10_ciin_6 +11 1 +.names N_205_1.BLIF SM_AMIGA_5_.BLIF N_205 +11 1 +.names un10_ciin_1.BLIF un10_ciin_2.BLIF un10_ciin_7 +11 1 +.names N_254.BLIF SM_AMIGA_6_.BLIF N_206 +11 1 +.names un10_ciin_3.BLIF un10_ciin_4.BLIF un10_ciin_8 +11 1 +.names N_208_1.BLIF un1_as_030_i.BLIF N_208 +11 1 +.names un10_ciin_5.BLIF un10_ciin_6.BLIF un10_ciin_9 +11 1 +.names inst_AS_000_DMA.BLIF RW_000_i.BLIF N_211 +11 1 +.names un10_ciin_7.BLIF un10_ciin_8.BLIF un10_ciin_10 +11 1 +.names inst_CLK_030_H.BLIF CLK_030_c.BLIF N_212 +11 1 +.names un10_ciin_9.BLIF a_decode_c_22__n.BLIF un10_ciin_11 +11 1 +.names N_213_1.BLIF SM_AMIGA_i_7_.BLIF N_213 +11 1 +.names AS_000_i.BLIF BGACK_030_INT_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_1_n +11 1 +.names N_223_1.BLIF cpu_est_i_3__n.BLIF N_223 +11 1 +.names pos_clk_un21_bgack_030_int_i_0_o2_2_x2.BLIF N_396_i.BLIF \ +pos_clk_un21_bgack_030_int_i_0_0_2_n +11 1 +.names N_229_1.BLIF N_229_2.BLIF N_229 +11 1 +.names AS_000_i.BLIF N_113_i.BLIF N_309_i_1 +11 1 +.names N_142.BLIF RST_DLY_0_.BLIF N_236 +11 1 +.names N_169_i.BLIF N_195_i.BLIF N_309_i_2 +11 1 +.names N_266.BLIF rst_dly_i_0__n.BLIF N_237 +11 1 +.names N_124_i.BLIF N_257.BLIF N_229_1 +11 1 +.names BERR_c.BLIF RST_c.BLIF N_243 +11 1 +.names sm_amiga_i_i_7__n.BLIF nEXP_SPACE_c.BLIF N_229_2 +11 1 +.names LDS_000_c.BLIF UDS_000_c.BLIF N_396 +11 1 +.names N_214_1.BLIF N_253.BLIF N_214_1_0 +11 1 +.names N_250_1.BLIF clk_000_d_i_8__n.BLIF N_250 +11 1 +.names AS_030_i.BLIF FPU_SENSE_i.BLIF un21_fpu_cs_1 +11 1 +.names N_136_i.BLIF RST_c.BLIF N_253 +11 1 +.names un22_berr_1.BLIF AS_030_i.BLIF un22_berr_1_0 +11 1 +.names N_137_i.BLIF RST_c.BLIF N_254 +11 1 +.names N_145_i.BLIF N_152_i.BLIF N_255_1 +11 1 +.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_257 +11 1 +.names VMA_INT_i.BLIF VPA_D_i.BLIF N_255_2 +11 1 +.names N_137.BLIF N_243.BLIF N_259 +11 1 +.names N_136.BLIF N_250_i.BLIF N_151_0_1 +11 1 +.names N_137_i.BLIF SM_AMIGA_0_.BLIF N_260 +11 1 +.names N_188_i.BLIF N_189_i.BLIF N_277_i_1 +11 1 +.names N_190_i.BLIF RST_c.BLIF N_277_i_2 +11 1 +.names N_184_i.BLIF N_185_i.BLIF N_276_i_1 +11 1 +.names BGACK_000_c.BLIF N_124.BLIF un22_berr_1 +11 1 +.names N_186_i.BLIF RST_c.BLIF N_276_i_2 +11 1 +.names N_124_4.BLIF N_124_3.BLIF N_124 +11 1 +.names N_136_i.BLIF N_267.BLIF N_221_1 +11 1 +.names N_164_i.BLIF N_164 +0 1 +.names VPA_D_i.BLIF cpu_est_i_3__n.BLIF N_221_2 +11 1 +.names pos_clk_rw_000_int_5_0_n.BLIF pos_clk_rw_000_int_5_n +0 1 +.names N_137_i.BLIF N_152_i.BLIF N_220_1 +11 1 +.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 +0 1 +.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_220_2 +11 1 +.names pos_clk_un6_bgack_000_0_n.BLIF pos_clk_un6_bgack_000_n +0 1 +.names N_214_1.BLIF N_253.BLIF N_194_1 +11 1 +.names AS_000_c.BLIF N_137_i.BLIF N_268 +11 1 +.names N_373_i.BLIF sm_amiga_i_0__n.BLIF N_194_2 +11 1 +.names pos_clk_size_dma_6_0_1__n.BLIF pos_clk_size_dma_6_1__n +0 1 +.names N_194_1.BLIF N_194_2.BLIF N_194_3 +11 1 +.names BGACK_030_INT_i.BLIF N_164_i.BLIF N_210 +11 1 +.names N_236_i.BLIF N_237_i.BLIF N_278_i_1 +11 1 +.names pos_clk_size_dma_6_0_0__n.BLIF pos_clk_size_dma_6_0__n +0 1 +.names N_212_i.BLIF RW_000_i.BLIF N_307_0_1 +11 1 +.names BGACK_030_INT_i.BLIF N_164.BLIF N_209 +11 1 +.names N_197_i.BLIF RST_c.BLIF N_308_i_1 +11 1 +.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF N_207 +11 1 +.names AS_000_i.BLIF N_169_i.BLIF N_40_i_1 +11 1 +.names N_311_0.BLIF N_311 +0 1 +.names N_143.BLIF CLK_000_D_9_.BLIF N_250_1 +11 1 +.names a_c_1__n.BLIF BGACK_030_INT_i.BLIF N_102 +11 1 +.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_223_1 +11 1 +.names a_i_1__n.BLIF BGACK_030_INT_i.BLIF N_103 +11 1 +.names nEXP_SPACE_c.BLIF inst_AS_030_D0.BLIF pos_clk_un6_bg_030_1_n +11 1 +.names N_257.BLIF RST_c.BLIF N_228 +11 1 +.names N_259.BLIF SM_AMIGA_6_.BLIF N_213_1 +11 1 +.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF pos_clk_a0_dma_3_n +11 1 +.names AS_000_i.BLIF RW_000_c.BLIF N_208_1 +11 1 +.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_10 +1- 1 +-1 1 +.names N_136.BLIF N_243.BLIF N_205_1 +11 1 +.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_18 +1- 1 +-1 1 +.names N_161.BLIF N_253.BLIF N_193_1 11 1 .names rw_000_dma_0_un1_n.BLIF rw_000_dma_0_un0_n.BLIF N_19 1- 1 -1 1 -.names N_278.BLIF dsack1_int_0_un3_n -0 1 -.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_23 +.names N_248_i.BLIF rst_dly_i_0__n.BLIF N_190_1 +11 1 +.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF N_22 1- 1 -1 1 -.names N_220.BLIF N_220_i -0 1 -.names N_114_i.BLIF N_278.BLIF dsack1_int_0_un1_n +.names N_147.BLIF N_248_i.BLIF N_184_1 11 1 .names amiga_bus_enable_dma_low_0_un1_n.BLIF \ amiga_bus_enable_dma_low_0_un0_n.BLIF N_24 1- 1 -1 1 -.names N_219.BLIF N_219_i -0 1 -.names inst_DSACK1_INTreg.BLIF dsack1_int_0_un3_n.BLIF dsack1_int_0_un0_n +.names N_246_i.BLIF N_244_i.BLIF pos_clk_ipl_1_n 11 1 .names amiga_bus_enable_dma_high_0_un1_n.BLIF \ amiga_bus_enable_dma_high_0_un0_n.BLIF N_25 1- 1 -1 1 -.names N_218.BLIF N_218_i -0 1 -.names N_108.BLIF cpu_est_0_3__un3_n -0 1 -.names un1_amiga_bus_enable_low.BLIF un1_amiga_bus_enable_low_i -0 1 -.names cpu_est_3_.BLIF N_108.BLIF cpu_est_0_3__un1_n -11 1 -.names un21_fpu_cs.BLIF un21_fpu_cs_i -0 1 -.names N_224.BLIF N_224_i -0 1 -.names N_316_i.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n -11 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i -0 1 -.names N_222.BLIF N_222_i -0 1 -.names N_108.BLIF cpu_est_0_2__un3_n -0 1 -.names vcc_n_n - 1 -.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i -0 1 -.names N_223.BLIF N_223_i -0 1 -.names cpu_est_2_.BLIF N_108.BLIF cpu_est_0_2__un1_n -11 1 -.names inst_UDS_000_INT.BLIF UDS_000_INT_i -0 1 -.names RST_DLY_0_.BLIF RST_DLY_1_.BLIF N_322_i -11 1 -.names cpu_est_2_2__n.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n -11 1 -.names gnd_n_n -.names inst_LDS_000_INT.BLIF LDS_000_INT_i -0 1 -.names N_312.BLIF N_312_i -0 1 -.names N_108.BLIF cpu_est_0_1__un3_n -0 1 -.names AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF BGACK_030_INT_i.BLIF \ -un1_amiga_bus_enable_low -11 1 -.names N_131.BLIF N_131_i -0 1 -.names N_312_i.BLIF RST_c.BLIF N_139_0 -11 1 -.names cpu_est_1_.BLIF N_108.BLIF cpu_est_0_1__un1_n -11 1 -.names AS_000_DMA_i.BLIF AS_000_i.BLIF un6_as_030 -11 1 -.names N_132.BLIF N_132_i -0 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_108_i -11 1 -.names cpu_est_2_1__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n -11 1 -.names SIZE_DMA_1_.BLIF size_dma_i_0__n.BLIF un3_size -11 1 -.names RW_000_c.BLIF RW_000_i -0 1 -.names N_258.BLIF N_258_i -0 1 -.names pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un3_n -0 1 -.names SIZE_DMA_0_.BLIF size_dma_i_1__n.BLIF un4_size -11 1 -.names a_c_1__n.BLIF a_i_1__n -0 1 -.names N_257.BLIF N_257_i -0 1 -.names cpu_est_i_1__n.BLIF pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un1_n -11 1 -.names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un4_uds_000 -11 1 -.names CLK_000_D_11_.BLIF clk_000_d_i_11__n -0 1 -.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n -11 1 -.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un4_lds_000 -11 1 -.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n -0 1 -.names N_364_i_0.BLIF RST_c.BLIF N_245_i -11 1 -.names pos_clk_ipl_n.BLIF ipl_030_0_0__un3_n -0 1 -.names AS_000_INT_i.BLIF AS_030_i.BLIF un4_as_000 -11 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_1__n -0 1 -.names nEXP_SPACE_c.BLIF nEXP_SPACE_c_i -0 1 -.names ipl_c_0__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_0__un1_n -11 1 -.names un10_ciin_10.BLIF un10_ciin_11.BLIF un10_ciin -11 1 -.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i -0 1 -.names BGACK_030_INT_i.BLIF nEXP_SPACE_c_i.BLIF un1_as_030_i -11 1 -.names IPL_030DFF_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n -11 1 -.names un21_fpu_cs_1.BLIF un22_berr_1.BLIF un21_fpu_cs -11 1 -.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n -0 1 -.names AS_030_D0_i.BLIF BERR_c.BLIF pos_clk_un3_as_030_d0_0_n -11 1 -.names N_273.BLIF ds_000_dma_0_un3_n -0 1 -.names un22_berr_1_0.BLIF N_157.BLIF un22_berr -11 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n -0 1 -.names AS_030_i.BLIF RST_c.BLIF N_107_0 -11 1 -.names pos_clk_ds_000_dma_4_n.BLIF N_273.BLIF ds_000_dma_0_un1_n -11 1 -.names AS_000_i.BLIF DS_000_DMA_i.BLIF un6_ds_030 -11 1 -.names SM_AMIGA_i_7_.BLIF sm_amiga_i_i_7__n -0 1 -.names N_115.BLIF N_115_i -0 1 -.names inst_DS_000_DMA.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n -11 1 -.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n -0 1 -.names N_115_i.BLIF pos_clk_un3_as_030_d0_0_n.BLIF N_63_0 -11 1 -.names N_272.BLIF as_000_dma_0_un3_n -0 1 -.names RST_DLY_0_.BLIF rst_dly_i_0__n -0 1 -.names N_114_i.BLIF pos_clk_un3_as_030_d0_0_n.BLIF N_278_0 -11 1 -.names pos_clk_un23_bgack_030_int_i_0_n.BLIF N_272.BLIF as_000_dma_0_un1_n -11 1 -.names RST_DLY_1_.BLIF rst_dly_i_1__n -0 1 -.names N_113_i.BLIF pos_clk_un3_as_030_d0_0_n.BLIF N_279_0 -11 1 -.names inst_AS_000_DMA.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n -11 1 -.names N_364.BLIF N_364_i_0 -0 1 -.names N_260.BLIF N_260_i -0 1 -.names cpu_est_0_.BLIF cpu_est_i_0__n -0 1 -.names N_260_i.BLIF pos_clk_un3_as_030_d0_0_n.BLIF N_67_0 -11 1 -.names RST_DLY_2_.BLIF rst_dly_i_2__n -0 1 -.names N_182_i.BLIF RW_c_i.BLIF pos_clk_rw_000_int_5_0_n -11 1 -.names AS_030_c.BLIF AS_030_i -0 1 -.names N_113_i.BLIF N_182_i.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 -11 1 -.names FPU_SENSE_c.BLIF FPU_SENSE_i -0 1 -.names un10_ciin.BLIF un10_ciin_i -0 1 -.names N_157.BLIF N_157_i -0 1 -.names nEXP_SPACE_c_i.BLIF un10_ciin_i.BLIF N_313_0 -11 1 -.names a_decode_c_16__n.BLIF a_decode_i_16__n -0 1 -.names N_4.BLIF N_4_i -0 1 -.names a_decode_c_18__n.BLIF a_decode_i_18__n -0 1 -.names N_4_i.BLIF RST_c.BLIF N_48_0 -11 1 -.names a_decode_c_19__n.BLIF a_decode_i_19__n -0 1 -.names N_5.BLIF N_5_i -0 1 -.names N_113.BLIF N_113_i -0 1 -.names N_5_i.BLIF RST_c.BLIF N_47_0 -11 1 -.names N_114.BLIF N_114_i -0 1 -.names N_7.BLIF N_7_i -0 1 -.names inst_AS_000_INT.BLIF AS_000_INT_i -0 1 -.names N_7_i.BLIF RST_c.BLIF N_46_0 -11 1 -.names SIZE_DMA_1_.BLIF size_dma_i_1__n -0 1 -.names N_18.BLIF N_18_i -0 1 -.names SIZE_DMA_0_.BLIF size_dma_i_0__n -0 1 -.names N_18_i.BLIF RST_c.BLIF N_41_0 -11 1 -.names inst_RESET_OUT.BLIF RESET_OUT_i -0 1 -.names N_22.BLIF N_22_i -0 1 -.names cpu_est_1_.BLIF cpu_est_i_1__n -0 1 -.names N_22_i.BLIF RST_c.BLIF N_37_0 -11 1 -.names cpu_est_2_.BLIF cpu_est_i_2__n -0 1 -.names N_26.BLIF N_26_i -0 1 -.names inst_VPA_D.BLIF VPA_D_i -0 1 -.names N_26_i.BLIF RST_c.BLIF N_33_0 -11 1 -.names inst_DTACK_D0.BLIF DTACK_D0_i -0 1 -.names BG_030_c.BLIF BG_030_c_i -0 1 -.names cpu_est_3_.BLIF cpu_est_i_3__n -0 1 -.names pos_clk_un6_bg_030_n.BLIF pos_clk_un6_bg_030_i_n -0 1 -.names CLK_030_c.BLIF CLK_030_i -0 1 -.names BG_030_c_i.BLIF pos_clk_un6_bg_030_i_n.BLIF pos_clk_un9_bg_030_0_n -11 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_0__n -0 1 -.names N_10.BLIF N_10_i -0 1 -.names CLK_000_D_10_.BLIF clk_000_d_i_10__n -0 1 -.names N_10_i.BLIF RST_c.BLIF N_43_0 -11 1 -.names inst_AS_000_DMA.BLIF AS_000_DMA_i -0 1 -.names VPA_c.BLIF VPA_c_i -0 1 -.names AS_000_c.BLIF AS_000_i -0 1 -.names RST_c.BLIF VPA_c_i.BLIF N_54_0 -11 1 -.names inst_CLK_030_H.BLIF CLK_030_H_i -0 1 -.names inst_RESET_OUT.BLIF un1_as_030_i.BLIF un3_as_030_i -11 1 -.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n -0 1 -.names N_370.BLIF N_370_i -0 1 -.names inst_AS_030_D0.BLIF AS_030_D0_i -0 1 -.names BGACK_000_c.BLIF N_370_i.BLIF pos_clk_un6_bgack_000_0_n -11 1 -.names ahigh_c_30__n.BLIF ahigh_i_30__n -0 1 -.names N_283.BLIF N_283_i -0 1 -.names ahigh_c_31__n.BLIF ahigh_i_31__n -0 1 -.names N_283_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n -11 1 -.names ahigh_c_28__n.BLIF ahigh_i_28__n -0 1 -.names N_345.BLIF N_345_i -0 1 -.names ahigh_c_29__n.BLIF ahigh_i_29__n -0 1 -.names N_345_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n -11 1 -.names ahigh_c_26__n.BLIF ahigh_i_26__n -0 1 -.names UDS_000_c.BLIF UDS_000_c_i -0 1 -.names ahigh_c_27__n.BLIF ahigh_i_27__n -0 1 -.names LDS_000_c.BLIF LDS_000_c_i -0 1 -.names ahigh_c_24__n.BLIF ahigh_i_24__n -0 1 -.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_171_i -11 1 -.names pos_clk_un6_bg_030_1_n.BLIF CLK_000_D_0_.BLIF pos_clk_un6_bg_030_n -11 1 -.names ahigh_c_25__n.BLIF ahigh_i_25__n -0 1 -.names N_21.BLIF N_21_i -0 1 -.names G_116.BLIF N_241_i -0 1 -.names N_21_i.BLIF RST_c.BLIF N_38_0 -11 1 -.names G_117.BLIF N_242_i -0 1 -.names DTACK_c.BLIF DTACK_c_i -0 1 -.names pos_clk_ipl_1_n.BLIF N_242_i.BLIF pos_clk_ipl_n -11 1 -.names G_118.BLIF N_243_i -0 1 -.names DTACK_c_i.BLIF RST_c.BLIF N_55_0 -11 1 -.names N_249.BLIF N_249_i -0 1 -.names un6_ds_030.BLIF un6_ds_030_i -0 1 -.names N_248.BLIF N_248_i -0 1 -.names inst_DS_000_DMA.BLIF DS_000_DMA_i -0 1 -.names N_248_i.BLIF N_249_i.BLIF pos_clk_un9_clk_000_pe_0_n -11 1 -.names un4_as_000.BLIF un4_as_000_i -0 1 -.names N_250.BLIF N_250_i -0 1 -.names un6_as_030.BLIF un6_as_030_i -0 1 -.names N_251.BLIF N_251_i -0 1 -.names un4_lds_000.BLIF un4_lds_000_i -0 1 -.names N_250_i.BLIF N_251_i.BLIF cpu_est_2_0_1__n -11 1 -.names un4_uds_000.BLIF un4_uds_000_i -0 1 -.names N_253.BLIF N_253_i -0 1 -.names N_369.BLIF N_369_i -0 1 -.names N_253_i.BLIF N_369_i.BLIF cpu_est_2_0_2__n -11 1 -.names N_254.BLIF N_254_i -0 1 -.names N_253_i.BLIF N_254_i.BLIF N_316_i -11 1 -.names N_256.BLIF N_256_i -0 1 -.names N_255.BLIF N_255_i -0 1 -.names N_255_i.BLIF N_256_i.BLIF N_317_i -11 1 -.names N_267.BLIF N_267_i -0 1 -.names pos_clk_ds_000_dma_4_0_n.BLIF pos_clk_ds_000_dma_4_n -0 1 -.names N_266.BLIF N_266_i -0 1 -.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF N_3 -1- 1 --1 1 -.names N_266_i.BLIF N_267_i.BLIF N_57_0 -11 1 -.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF N_8 -1- 1 --1 1 -.names cpu_est_3_.BLIF cpu_est_i_1__n.BLIF N_151_0 -11 1 -.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_321_i -11 1 -.names cpu_est_i_0__n.BLIF cpu_est_i_2__n.BLIF N_158_i -11 1 -.names inst_VMA_INTreg.BLIF VMA_INT_i -0 1 -.names N_361.BLIF N_361_i -0 1 -.names N_362.BLIF N_362_i -0 1 -.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_27 -1- 1 --1 1 -.names N_361_i.BLIF N_362_i.BLIF N_169_i -11 1 -.names cpu_est_1_.BLIF cpu_est_i_3__n.BLIF N_186_0 -11 1 -.names N_108_i.BLIF N_169.BLIF N_195_0 -11 1 -.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF N_196_0 -11 1 -.names N_263.BLIF N_263_i -0 1 -.names N_262.BLIF N_262_i -0 1 -.names AS_000_DMA_i.BLIF CLK_030_i.BLIF N_323_0 -11 1 -.names BGACK_030_INT_i.BLIF RST_c.BLIF N_101_i -11 1 -.names N_366.BLIF N_366_i -0 1 -.names N_366_i.BLIF SM_AMIGA_i_7_.BLIF N_182_i -11 1 -.names pos_clk_un23_bgack_030_int_i_0_0_1_n.BLIF \ -pos_clk_un23_bgack_030_int_i_0_0_2_n.BLIF pos_clk_un23_bgack_030_int_i_0_0_n -11 1 -.names N_310.BLIF N_310_i -0 1 -.names N_359.BLIF N_359_i -0 1 -.names N_310_i.BLIF N_359_i.BLIF N_144_0 -11 1 -.names inst_CLK_OUT_PRE_D.BLIF CLK_OUT_PRE_D_i -0 1 -.names CLK_030_c.BLIF CLK_OUT_PRE_D_i.BLIF N_142_0 -11 1 -.names N_311.BLIF N_311_i -0 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_319_i -11 1 -.names BGACK_030_INT_i.BLIF inst_RESET_OUT.BLIF N_93_i -11 1 -.names CLK_030_i.BLIF pos_clk_un23_bgack_030_int_i_0_0_n.BLIF N_272_0 -11 1 -.names N_290.BLIF N_290_i -0 1 -.names N_273_0_1.BLIF pos_clk_un23_bgack_030_int_i_0_0_n.BLIF N_273_0 -11 1 -.names N_346.BLIF N_346_i -0 1 -.names N_346_i.BLIF pos_clk_un23_bgack_030_int_i_0_0_n.BLIF \ -pos_clk_ds_000_dma_4_0_n -11 1 -.names N_268.BLIF N_268_i -0 1 -.names N_269.BLIF N_269_i -0 1 -.names N_268_i.BLIF N_269_i.BLIF sm_amiga_nss_0_3__n -11 1 -.names N_341.BLIF N_341_i -0 1 -.names N_238.BLIF N_238_i -0 1 -.names N_239.BLIF N_239_i -0 1 -.names N_238_i.BLIF N_239_i.BLIF sm_amiga_nss_0_2__n -11 1 -.names CYCLE_DMA_0_.BLIF N_319_i.BLIF N_263 -11 1 -.names N_235.BLIF N_235_i -0 1 -.names N_236.BLIF N_236_i -0 1 -.names N_235_i.BLIF N_236_i.BLIF sm_amiga_nss_0_4__n -11 1 -.names N_234.BLIF N_234_i -0 1 -.names pos_clk_un23_bgack_030_int_i_0_0_n.BLIF \ -pos_clk_un23_bgack_030_int_i_0_n -0 1 -.names N_233_i.BLIF N_234_i.BLIF sm_amiga_nss_0_5__n -11 1 -.names N_272_0.BLIF N_272 -0 1 -.names N_231.BLIF N_231_i -0 1 -.names N_273_0.BLIF N_273 -0 1 -.names N_232.BLIF N_232_i -0 1 -.names N_231_i.BLIF N_232_i.BLIF sm_amiga_nss_0_6__n -11 1 -.names N_313_0.BLIF N_313 -0 1 -.names N_230.BLIF N_230_i -0 1 -.names N_229_i.BLIF N_230_i.BLIF sm_amiga_nss_0_7__n -11 1 -.names N_226.BLIF N_226_i -0 1 -.names N_108_i.BLIF N_108 -0 1 -.names N_331.BLIF N_331_i -0 1 -.names N_319_i.BLIF N_319 -0 1 -.names N_142_0.BLIF N_142 -0 1 -.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF un1_as_000_i -11 1 -.names N_144_0.BLIF N_144 -0 1 -.names N_27.BLIF N_27_i -0 1 -.names N_322_i.BLIF N_322 -0 1 -.names N_27_i.BLIF RST_c.BLIF N_30_0 -11 1 -.names N_169_i.BLIF N_169 -0 1 -.names ipl_c_0__n.BLIF ipl_c_i_0__n -0 1 -.names N_195_0.BLIF N_195 -0 1 -.names ipl_c_i_0__n.BLIF RST_c.BLIF N_51_0 -11 1 -.names N_323_0.BLIF N_323 -0 1 -.names N_3.BLIF N_3_i -0 1 -.names un1_amiga_bus_enable_dma_high_i_m2_0__un1_n.BLIF \ -un1_amiga_bus_enable_dma_high_i_m2_0__un0_n.BLIF N_209 -1- 1 --1 1 -.names N_3_i.BLIF RST_c.BLIF N_49_0 -11 1 -.names N_218_1.BLIF rst_dly_i_2__n.BLIF N_218 -11 1 -.names N_8.BLIF N_8_i -0 1 -.names N_224_1.BLIF rst_dly_i_1__n.BLIF N_224 -11 1 -.names N_8_i.BLIF RST_c.BLIF N_45_0 -11 1 -.names N_139.BLIF RST_DLY_0_.BLIF N_226 -11 1 -.names N_334_i.BLIF N_335_i.BLIF sm_amiga_nss_i_0_1_0__n -11 1 -.names N_368.BLIF rst_dly_i_0__n.BLIF N_331 -11 1 -.names N_233_i.BLIF N_244_i.BLIF sm_amiga_nss_i_0_2_0__n -11 1 -.names N_365.BLIF SM_AMIGA_0_.BLIF N_229 -11 1 -.names N_246_i.BLIF N_229_i.BLIF sm_amiga_nss_i_0_3_0__n -11 1 -.names N_360.BLIF SM_AMIGA_1_.BLIF N_230 -11 1 -.names sm_amiga_nss_i_0_1_0__n.BLIF sm_amiga_nss_i_0_2_0__n.BLIF \ -sm_amiga_nss_i_0_4_0__n -11 1 -.names N_231_1.BLIF SM_AMIGA_1_.BLIF N_231 -11 1 -.names sm_amiga_nss_i_0_3_0__n.BLIF N_355_i.BLIF sm_amiga_nss_i_0_5_0__n -11 1 -.names N_359.BLIF SM_AMIGA_2_.BLIF N_232 -11 1 -.names size_c_0__n.BLIF a_c_i_0__n.BLIF pos_clk_un10_sm_amiga_i_1_n -11 1 -.names N_233_1.BLIF SM_AMIGA_3_.BLIF N_233 -11 1 -.names ahigh_i_24__n.BLIF ahigh_i_25__n.BLIF un10_ciin_1 -11 1 -.names N_365.BLIF SM_AMIGA_2_.BLIF N_234 -11 1 -.names ahigh_i_26__n.BLIF ahigh_i_27__n.BLIF un10_ciin_2 -11 1 -.names N_195.BLIF N_355.BLIF N_235 -11 1 -.names ahigh_i_28__n.BLIF ahigh_i_29__n.BLIF un10_ciin_3 -11 1 -.names N_359.BLIF SM_AMIGA_4_.BLIF N_236 -11 1 -.names ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF un10_ciin_4 -11 1 -.names N_238_1.BLIF SM_AMIGA_5_.BLIF N_238 -11 1 -.names a_decode_c_23__n.BLIF AS_030_D0_i.BLIF un10_ciin_5 -11 1 -.names N_359.BLIF SM_AMIGA_6_.BLIF N_239 -11 1 -.names a_decode_c_20__n.BLIF a_decode_c_21__n.BLIF un10_ciin_6 -11 1 -.names N_240_1.BLIF SM_AMIGA_i_7_.BLIF N_240 -11 1 -.names un10_ciin_1.BLIF un10_ciin_2.BLIF un10_ciin_7 -11 1 -.names N_251_1.BLIF cpu_est_i_3__n.BLIF N_251 -11 1 -.names un10_ciin_3.BLIF un10_ciin_4.BLIF un10_ciin_8 -11 1 -.names cycle_dma_i_0__n.BLIF N_319.BLIF N_262 -11 1 -.names un10_ciin_5.BLIF un10_ciin_6.BLIF un10_ciin_9 -11 1 -.names CLK_030_H_i.BLIF N_323.BLIF N_341 -11 1 -.names un10_ciin_7.BLIF un10_ciin_8.BLIF un10_ciin_10 -11 1 -.names N_365.BLIF SM_AMIGA_4_.BLIF N_268 -11 1 -.names un10_ciin_9.BLIF a_decode_c_22__n.BLIF un10_ciin_11 -11 1 -.names N_360.BLIF SM_AMIGA_5_.BLIF N_269 -11 1 -.names AS_000_i.BLIF BGACK_030_INT_i.BLIF pos_clk_un23_bgack_030_int_i_0_0_1_n -11 1 -.names N_282_1.BLIF un1_as_030_i.BLIF N_282 -11 1 -.names pos_clk_un23_bgack_030_int_i_0_o2_2_x2.BLIF N_311_i.BLIF \ -pos_clk_un23_bgack_030_int_i_0_0_2_n -11 1 -.names inst_AS_000_DMA.BLIF RW_000_i.BLIF N_346 -11 1 -.names AS_000_i.BLIF N_101_i.BLIF N_60_i_1 -11 1 -.names inst_CLK_030_H.BLIF CLK_030_c.BLIF N_290 -11 1 -.names N_262_i.BLIF N_263_i.BLIF N_60_i_2 -11 1 -.names BERR_c.BLIF RST_c.BLIF N_310 -11 1 -.names N_158_i.BLIF N_319_i.BLIF N_248_1 -11 1 -.names LDS_000_c.BLIF UDS_000_c.BLIF N_311 -11 1 -.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_248_2 -11 1 -.names N_310.BLIF SM_AMIGA_3_.BLIF N_355 -11 1 -.names N_108_i.BLIF N_369.BLIF N_249_1 -11 1 -.names N_356_1.BLIF clk_000_d_i_10__n.BLIF N_356 -11 1 -.names VPA_D_i.BLIF cpu_est_i_3__n.BLIF N_249_2 -11 1 -.names N_319_i.BLIF RST_c.BLIF N_359 -11 1 -.names N_151_0.BLIF N_158_i.BLIF N_361_1 -11 1 -.names N_108_i.BLIF RST_c.BLIF N_360 -11 1 -.names VMA_INT_i.BLIF VPA_D_i.BLIF N_361_2 -11 1 -.names N_310.BLIF N_319.BLIF N_365 -11 1 -.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_157_1 -11 1 -.names N_319_i.BLIF SM_AMIGA_0_.BLIF N_366 -11 1 -.names a_decode_c_17__n.BLIF a_decode_i_16__n.BLIF N_157_2 -11 1 -.names a_decode_i_18__n.BLIF a_decode_i_19__n.BLIF N_157_3 -11 1 -.names N_157_1.BLIF N_157_2.BLIF N_157_4 -11 1 -.names N_248_1.BLIF N_248_2.BLIF N_248 -11 1 -.names N_157_i.BLIF N_363.BLIF N_260_1 -11 1 -.names N_249_1.BLIF N_249_2.BLIF N_249 -11 1 -.names sm_amiga_i_i_7__n.BLIF nEXP_SPACE_c.BLIF N_260_2 -11 1 -.names N_321_i.BLIF cpu_est_i_2__n.BLIF N_369 -11 1 -.names FPU_SENSE_i.BLIF N_157.BLIF un21_fpu_cs_1 -11 1 -.names N_196_0.BLIF N_196 -0 1 -.names un22_berr_1.BLIF FPU_SENSE_c.BLIF un22_berr_1_0 -11 1 -.names N_186_0.BLIF N_186 -0 1 -.names N_222_i.BLIF N_223_i.BLIF N_275_i_1 -11 1 -.names N_361_1.BLIF N_361_2.BLIF N_361 -11 1 -.names N_224_i.BLIF RST_c.BLIF N_275_i_2 -11 1 -.names DTACK_D0_i.BLIF inst_VPA_D.BLIF N_362 -11 1 -.names N_218_i.BLIF N_219_i.BLIF N_274_i_1 -11 1 -.names N_151_0.BLIF N_151 -0 1 -.names N_220_i.BLIF RST_c.BLIF N_274_i_2 -11 1 -.names N_321_i.BLIF N_321 -0 1 -.names N_143.BLIF sm_amiga_i_0__n.BLIF N_115_1 -11 1 -.names inst_RESET_OUT.BLIF RST_c.BLIF N_266 -11 1 -.names sm_amiga_i_5__n.BLIF SM_AMIGA_i_7_.BLIF N_115_2 -11 1 -.names N_360.BLIF N_364.BLIF N_267 -11 1 -.names CLK_000_D_2_.BLIF N_332_4.BLIF N_332_1 -11 1 -.names N_186.BLIF cpu_est_2_.BLIF N_255 -11 1 -.names sm_amiga_i_0__n.BLIF sm_amiga_i_3__n.BLIF N_246_1 -11 1 -.names N_151.BLIF cpu_est_i_2__n.BLIF N_256 -11 1 -.names CLK_000_D_2_.BLIF N_180_i.BLIF N_246_2 -11 1 -.names N_321.BLIF cpu_est_2_.BLIF N_253 -11 1 -.names N_320_i.BLIF N_332_4.BLIF N_246_3 -11 1 -.names N_196.BLIF cpu_est_i_2__n.BLIF N_254 -11 1 -.names N_246_1.BLIF N_246_2.BLIF N_246_4 -11 1 -.names cpu_est_2_0_2__n.BLIF cpu_est_2_2__n -0 1 -.names AS_030_000_SYNC_i.BLIF clk_000_d_i_1__n.BLIF N_332_4_1 -11 1 -.names cpu_est_2_0_1__n.BLIF cpu_est_2_1__n -0 1 -.names RST_c.BLIF nEXP_SPACE_c.BLIF N_332_4_2 -11 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_250 -11 1 -.names N_290_i.BLIF RW_000_i.BLIF N_273_0_1 -11 1 -.names pos_clk_un9_clk_000_pe_0_n.BLIF pos_clk_un9_clk_000_pe_n -0 1 -.names N_341_i.BLIF RST_c.BLIF N_276_i_1 -11 1 -.names N_322_i.BLIF RST_DLY_2_.BLIF N_364 -11 1 -.names pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF AS_000_i.BLIF N_277_i_1 -11 1 -.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_21 -1- 1 --1 1 -.names N_226_i.BLIF N_331_i.BLIF N_314_i_1 -11 1 -.names N_171_i.BLIF N_171 -0 1 -.names N_142.BLIF CLK_000_D_11_.BLIF N_356_1 -11 1 -.names pos_clk_size_dma_6_0_1__n.BLIF pos_clk_size_dma_6_1__n -0 1 -.names AS_000_i.BLIF RW_000_c.BLIF N_282_1 -11 1 -.names BGACK_030_INT_i.BLIF N_171_i.BLIF N_345 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_251_1 -11 1 -.names pos_clk_size_dma_6_0_0__n.BLIF pos_clk_size_dma_6_0__n -0 1 -.names nEXP_SPACE_c.BLIF inst_AS_030_D0.BLIF pos_clk_un6_bg_030_1_n -11 1 -.names BGACK_030_INT_i.BLIF N_171.BLIF N_283 -11 1 -.names N_365.BLIF SM_AMIGA_6_.BLIF N_240_1 -11 1 -.names pos_clk_un6_bgack_000_0_n.BLIF pos_clk_un6_bgack_000_n -0 1 -.names N_108.BLIF N_310.BLIF N_238_1 -11 1 -.names AS_000_c.BLIF N_319_i.BLIF N_370 -11 1 -.names N_169.BLIF N_360.BLIF N_233_1 -11 1 -.names N_363.BLIF RST_c.BLIF N_259 -11 1 -.names N_108.BLIF N_310.BLIF N_231_1 -11 1 -.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_10 -1- 1 --1 1 -.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c -0 1 -.names N_245_i.BLIF rst_dly_i_0__n.BLIF N_224_1 -11 1 -.names pos_clk_un9_bg_030_0_n.BLIF pos_clk_un9_bg_030_n -0 1 -.names N_245_i.BLIF N_322.BLIF N_218_1 -11 1 -.names dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF N_4 -1- 1 --1 1 -.names N_243_i.BLIF N_241_i.BLIF pos_clk_ipl_1_n -11 1 -.names N_156.BLIF SM_AMIGA_1_.BLIF N_114 -11 1 -.names N_363.BLIF rw_000_dma_0_un3_n -0 1 -.names N_278_0.BLIF N_278 -0 1 -.names inst_RW_000_DMA.BLIF N_363.BLIF rw_000_dma_0_un1_n -11 1 -.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF N_5 -1- 1 --1 1 -.names N_25.BLIF N_25_i -0 1 -.names N_281.BLIF rw_000_dma_0_un3_n.BLIF rw_000_dma_0_un0_n -11 1 -.names N_319_i.BLIF SM_AMIGA_6_.BLIF N_113 -11 1 -.names N_25_i.BLIF RST_c.BLIF N_34_0 -11 1 -.names SM_AMIGA_6_.BLIF lds_000_int_0_un3_n -0 1 -.names N_279_0.BLIF N_279 -0 1 -.names N_24.BLIF N_24_i -0 1 -.names pos_clk_un10_sm_amiga_i_n.BLIF SM_AMIGA_6_.BLIF lds_000_int_0_un1_n -11 1 -.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_6 -1- 1 --1 1 -.names N_24_i.BLIF RST_c.BLIF N_35_0 -11 1 -.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n -11 1 -.names N_115_1.BLIF N_115_2.BLIF N_115 -11 1 -.names N_23.BLIF N_23_i -0 1 .names pos_clk_ipl_n.BLIF ipl_030_0_1__un3_n 0 1 -.names N_63_0.BLIF N_63 +.names pos_clk_un9_bg_030_0_n.BLIF pos_clk_un9_bg_030_n 0 1 -.names N_23_i.BLIF RST_c.BLIF N_36_0 -11 1 .names ipl_c_1__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_1__un1_n 11 1 -.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_7 -1- 1 --1 1 -.names N_19.BLIF N_19_i -0 1 -.names IPL_030DFF_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n -11 1 -.names pos_clk_un3_as_030_d0_0_n.BLIF pos_clk_un3_as_030_d0_n -0 1 -.names N_19_i.BLIF RST_c.BLIF N_40_0 -11 1 -.names N_363.BLIF amiga_bus_enable_dma_high_0_un3_n -0 1 -.names N_67_0.BLIF N_67 -0 1 -.names N_17.BLIF N_17_i -0 1 -.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF N_363.BLIF \ -amiga_bus_enable_dma_high_0_un1_n -11 1 -.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_18 -1- 1 --1 1 -.names N_17_i.BLIF RST_c.BLIF N_42_0 -11 1 -.names N_132_i.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF \ -amiga_bus_enable_dma_high_0_un0_n -11 1 -.names pos_clk_rw_000_int_5_0_n.BLIF pos_clk_rw_000_int_5_n -0 1 -.names ipl_c_1__n.BLIF ipl_c_i_1__n -0 1 -.names N_363.BLIF amiga_bus_enable_dma_low_0_un3_n -0 1 -.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 -0 1 -.names ipl_c_i_1__n.BLIF RST_c.BLIF N_52_0 -11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF N_363.BLIF \ -amiga_bus_enable_dma_low_0_un1_n -11 1 -.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF N_22 -1- 1 --1 1 -.names ipl_c_2__n.BLIF ipl_c_i_2__n -0 1 -.names N_131_i.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF \ -amiga_bus_enable_dma_low_0_un0_n -11 1 -.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF pos_clk_a0_dma_3_n -11 1 -.names ipl_c_i_2__n.BLIF RST_c.BLIF N_53_0 -11 1 -.names SM_AMIGA_6_.BLIF uds_000_int_0_un3_n -0 1 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_363 -11 1 -.names N_28.BLIF N_28_i -0 1 -.names a_c_0__n.BLIF SM_AMIGA_6_.BLIF uds_000_int_0_un1_n -11 1 .names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF N_26 1- 1 -1 1 -.names N_28_i.BLIF RST_c.BLIF N_31_0 +.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c +0 1 +.names IPL_030DFF_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n 11 1 +.names N_214_1_0.BLIF sm_amiga_i_i_7__n.BLIF N_214 +11 1 +.names SM_AMIGA_6_.BLIF uds_000_int_0_un3_n +0 1 +.names AS_030_000_SYNC_i.BLIF nEXP_SPACE_c.BLIF N_214_1 +11 1 +.names a_c_0__n.BLIF SM_AMIGA_6_.BLIF uds_000_int_0_un1_n +11 1 +.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_21 +1- 1 +-1 1 .names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n 11 1 -.names N_157_4.BLIF N_157_3.BLIF N_157 -11 1 -.names N_29.BLIF N_29_i +.names pos_clk_un9_clk_000_pe_0_n.BLIF pos_clk_un9_clk_000_pe_n 0 1 -.names pos_clk_ipl_n.BLIF ipl_030_0_2__un3_n +.names SM_AMIGA_6_.BLIF lds_000_int_0_un3_n 0 1 -.names N_260_1.BLIF N_260_2.BLIF N_260 -11 1 -.names N_29_i.BLIF RST_c.BLIF N_32_0 -11 1 -.names ipl_c_2__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_2__un1_n -11 1 -.names AS_030_i.BLIF BGACK_000_c.BLIF un22_berr_1 -11 1 -.names a_c_0__n.BLIF a_c_i_0__n +.names cpu_est_2_0_1__n.BLIF cpu_est_2_1__n 0 1 -.names IPL_030DFF_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n -11 1 -.names N_139.BLIF N_364.BLIF N_219 -11 1 -.names size_c_1__n.BLIF size_c_i_1__n +.names N_23.BLIF N_23_i 0 1 -.names inst_BGACK_030_INTreg.BLIF un1_amiga_bus_enable_dma_high_i_m2_0__un3_n +.names pos_clk_un10_sm_amiga_i_n.BLIF SM_AMIGA_6_.BLIF lds_000_int_0_un1_n +11 1 +.names cpu_est_2_0_2__n.BLIF cpu_est_2_2__n 0 1 -.names N_139_0.BLIF N_139 +.names N_23_i.BLIF RST_c.BLIF N_37_0 +11 1 +.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n +11 1 +.names N_142.BLIF N_258.BLIF N_185 +11 1 +.names N_17.BLIF N_17_i 0 1 -.names pos_clk_un10_sm_amiga_i_1_n.BLIF size_c_i_1__n.BLIF \ -pos_clk_un10_sm_amiga_i_n -11 1 -.names inst_AS_030_000_SYNC.BLIF inst_BGACK_030_INTreg.BLIF \ -un1_amiga_bus_enable_dma_high_i_m2_0__un1_n -11 1 -.names N_108.BLIF rst_dly_i_2__n.BLIF N_220 -11 1 -.names N_332.BLIF N_332_i +.names N_279.BLIF ds_000_enable_0_un3_n 0 1 -.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF \ -un1_amiga_bus_enable_dma_high_i_m2_0__un3_n.BLIF \ -un1_amiga_bus_enable_dma_high_i_m2_0__un0_n -11 1 -.names N_139.BLIF N_322_i.BLIF N_222 -11 1 -.names N_240.BLIF N_240_i +.names N_142_0.BLIF N_142 0 1 -.names N_279.BLIF as_000_int_0_un3_n +.names N_17_i.BLIF RST_c.BLIF N_43_0 +11 1 +.names un1_SM_AMIGA_0_sqmuxa_2.BLIF N_279.BLIF ds_000_enable_0_un1_n +11 1 +.names N_147_i.BLIF RST_DLY_2_.BLIF N_258 +11 1 +.names VPA_c.BLIF VPA_c_i 0 1 -.names N_368.BLIF rst_dly_i_1__n.BLIF N_223 -11 1 -.names N_240_i.BLIF N_332_i.BLIF N_315_0 -11 1 -.names N_113_i.BLIF N_279.BLIF as_000_int_0_un1_n -11 1 -.names N_108.BLIF RST_c.BLIF N_368 -11 1 -.names BGACK_030_INT_i.BLIF RW_000_i.BLIF N_281_0 -11 1 -.names inst_AS_000_INT.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n -11 1 -.names N_108.BLIF cpu_est_i_0__n.BLIF N_257 -11 1 -.names N_270.BLIF N_270_i -0 1 -.names N_63.BLIF ds_000_enable_0_un3_n -0 1 -.names N_108_i.BLIF cpu_est_0_.BLIF N_258 -11 1 -.names N_282.BLIF N_282_i -0 1 -.names N_115.BLIF N_63.BLIF ds_000_enable_0_un1_n -11 1 -.names N_108_i.BLIF N_364_i_0.BLIF N_312 -11 1 -.names N_270_i.BLIF N_282_i.BLIF AMIGA_BUS_DATA_DIR_c_0 -11 1 .names inst_DS_000_ENABLE.BLIF ds_000_enable_0_un3_n.BLIF \ ds_000_enable_0_un0_n 11 1 -.names N_143_0.BLIF N_143 +.names N_136.BLIF rst_dly_i_2__n.BLIF N_186 +11 1 +.names RST_c.BLIF VPA_c_i.BLIF N_55_0 +11 1 +.names pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un3_n 0 1 -.names RW_c.BLIF RW_c_i +.names N_142.BLIF N_147_i.BLIF N_188 +11 1 +.names DTACK_c.BLIF DTACK_c_i 0 1 -.names N_67.BLIF as_030_000_sync_0_un3_n +.names cpu_est_i_1__n.BLIF pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un1_n +11 1 +.names N_266.BLIF rst_dly_i_1__n.BLIF N_189 +11 1 +.names DTACK_c_i.BLIF RST_c.BLIF N_56_0 +11 1 +.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n +11 1 +.names N_136.BLIF RST_c.BLIF N_266 +11 1 +.names N_28.BLIF N_28_i 0 1 -.names N_332_1.BLIF sm_amiga_i_i_7__n.BLIF N_332 -11 1 -.names RW_c_i.BLIF SM_AMIGA_6_.BLIF N_140_0 -11 1 -.names pos_clk_un3_as_030_d0_n.BLIF N_67.BLIF as_030_000_sync_0_un1_n -11 1 -.names N_332_4_1.BLIF N_332_4_2.BLIF N_332_4 -11 1 -.names N_353.BLIF N_353_i +.names N_136.BLIF cpu_est_0_1__un3_n 0 1 -.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ -as_030_000_sync_0_un0_n +.names N_136.BLIF N_261.BLIF N_198 11 1 -.names N_246_4.BLIF N_246_3.BLIF N_246 +.names N_28_i.BLIF RST_c.BLIF N_32_0 11 1 -.names N_159.BLIF N_353_i.BLIF N_143_0 +.names cpu_est_1_.BLIF N_136.BLIF cpu_est_0_1__un1_n 11 1 +.names N_243.BLIF SM_AMIGA_1_.BLIF N_261 +11 1 +.names a_c_0__n.BLIF a_c_i_0__n +0 1 +.names cpu_est_2_1__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n +11 1 +.names N_254.BLIF SM_AMIGA_2_.BLIF N_199 +11 1 +.names size_c_1__n.BLIF size_c_i_1__n +0 1 +.names N_136.BLIF cpu_est_0_2__un3_n +0 1 +.names N_136.BLIF cpu_est_i_0__n.BLIF N_215 +11 1 +.names pos_clk_un10_sm_amiga_i_1_n.BLIF size_c_i_1__n.BLIF \ +pos_clk_un10_sm_amiga_i_n +11 1 +.names cpu_est_2_.BLIF N_136.BLIF cpu_est_0_2__un1_n +11 1 +.names N_136_i.BLIF cpu_est_0_.BLIF N_216 +11 1 +.names N_201.BLIF N_201_i +0 1 +.names cpu_est_2_2__n.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n +11 1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_222 +11 1 +.names N_202.BLIF N_202_i +0 1 +.names N_136.BLIF cpu_est_0_3__un3_n +0 1 +.names N_146.BLIF cpu_est_2_.BLIF N_224 +11 1 +.names N_201_i.BLIF N_202_i.BLIF sm_amiga_nss_0_4__n +11 1 +.names cpu_est_3_.BLIF N_136.BLIF cpu_est_0_3__un1_n +11 1 +.names N_146_i.BLIF N_146 +0 1 +.names N_204.BLIF N_204_i +0 1 +.names N_230_i.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n +11 1 +.names N_173.BLIF cpu_est_i_2__n.BLIF N_225 +11 1 +.names N_203.BLIF N_203_i +0 1 +.names N_257.BLIF amiga_bus_enable_dma_high_0_un3_n +0 1 +.names N_173_0.BLIF N_173 +0 1 +.names N_203_i.BLIF N_204_i.BLIF sm_amiga_nss_0_3__n +11 1 +.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF N_257.BLIF \ +amiga_bus_enable_dma_high_0_un1_n +11 1 +.names N_170.BLIF cpu_est_2_.BLIF N_226 +11 1 +.names inst_RESET_OUT.BLIF un1_as_030_i.BLIF N_45_i +11 1 +.names N_103_i.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF \ +amiga_bus_enable_dma_high_0_un0_n +11 1 +.names N_170_0.BLIF N_170 +0 1 +.names un1_SM_AMIGA_0_sqmuxa_2.BLIF un1_SM_AMIGA_0_sqmuxa_2_i +0 1 +.names N_257.BLIF amiga_bus_enable_dma_low_0_un3_n +0 1 +.names N_145.BLIF cpu_est_i_2__n.BLIF N_227 +11 1 +.names pos_clk_un3_as_030_d0_i_n.BLIF un1_SM_AMIGA_0_sqmuxa_2_i.BLIF N_279_0 +11 1 +.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF N_257.BLIF \ +amiga_bus_enable_dma_low_0_un1_n +11 1 +.names N_145_i.BLIF N_145 +0 1 +.names N_235.BLIF N_235_i +0 1 +.names N_102_i.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF \ +amiga_bus_enable_dma_low_0_un0_n +11 1 +.names N_151_0.BLIF N_151 +0 1 +.names N_234.BLIF N_234_i +0 1 +.names N_257.BLIF a0_dma_0_un3_n +0 1 +.names N_136_i.BLIF N_258_i_0.BLIF N_397 +11 1 +.names N_234_i.BLIF N_235_i.BLIF N_58_0 +11 1 +.names inst_A0_DMA.BLIF N_257.BLIF a0_dma_0_un1_n +11 1 +.names CLK_000_D_10_.BLIF clk_000_d_i_9__n.BLIF N_251 +11 1 +.names N_243.BLIF N_243_i +0 1 +.names pos_clk_a0_dma_3_n.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n +11 1 +.names N_255_1.BLIF N_255_2.BLIF N_255 +11 1 +.names N_254.BLIF N_254_i +0 1 +.names N_257.BLIF rw_000_dma_0_un3_n +0 1 +.names DTACK_D0_i.BLIF inst_VPA_D.BLIF N_256 +11 1 +.names N_243_i.BLIF N_254_i.BLIF N_144_0 +11 1 +.names inst_RW_000_DMA.BLIF N_257.BLIF rw_000_dma_0_un1_n +11 1 +.names N_146_i.BLIF cpu_est_i_2__n.BLIF N_267 +11 1 +.names N_249.BLIF N_249_i +0 1 +.names N_311.BLIF rw_000_dma_0_un3_n.BLIF rw_000_dma_0_un0_n +11 1 +.names N_221_1.BLIF N_221_2.BLIF N_221 +11 1 +.names N_247.BLIF N_247_i +0 1 .names un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un3_n 0 1 -.names N_180_i.BLIF N_180 -0 1 -.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n -0 1 +.names N_220_1.BLIF N_220_2.BLIF N_220 +11 1 +.names N_247_i.BLIF N_249_i.BLIF sm_amiga_nss_0_7__n +11 1 .names pos_clk_rw_000_int_5_n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF \ rw_000_int_0_un1_n 11 1 -.names N_320_i.BLIF N_320 -0 1 -.names sm_amiga_i_1__n.BLIF sm_amiga_i_5__n.BLIF N_320_i +.names N_194_3.BLIF sm_amiga_i_3__n.BLIF N_194 11 1 -.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n -11 1 -.names N_320.BLIF N_360.BLIF N_244 -11 1 -.names N_357.BLIF N_357_i -0 1 -.names N_363.BLIF a0_dma_0_un3_n -0 1 -.names N_144.BLIF N_180.BLIF N_334 -11 1 -.names N_356.BLIF N_356_i -0 1 -.names inst_A0_DMA.BLIF N_363.BLIF a0_dma_0_un1_n -11 1 -.names N_310.BLIF N_320.BLIF N_335 -11 1 -.names N_356_i.BLIF N_357_i.BLIF N_156_0 -11 1 -.names pos_clk_a0_dma_3_n.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n -11 1 -.names N_159_i.BLIF N_159 -0 1 .names SM_AMIGA_4_.BLIF sm_amiga_i_4__n 0 1 -.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n -0 1 -.names N_156_0.BLIF N_156 -0 1 -.names sm_amiga_i_4__n.BLIF sm_amiga_i_6__n.BLIF N_159_i +.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n 11 1 -.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n +.names N_373_i.BLIF N_373 +0 1 +.names N_252.BLIF N_252_i +0 1 +.names pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n +0 1 +.names N_243.BLIF SM_AMIGA_3_.BLIF N_398 11 1 -.names CLK_000_D_12_.BLIF clk_000_d_i_11__n.BLIF N_357 +.names N_252_i.BLIF sm_amiga_i_4__n.BLIF N_153_0 +11 1 +.names BGACK_000_c.BLIF pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n +11 1 +.names N_172.BLIF SM_AMIGA_5_.BLIF N_191 +11 1 +.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n +0 1 +.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \ +bgack_030_int_0_un0_n +11 1 +.names N_144.BLIF N_373.BLIF N_192 11 1 .names SM_AMIGA_2_.BLIF sm_amiga_i_2__n 0 1 +.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n +0 1 +.names N_172_0.BLIF N_172 +0 1 +.names N_373_i_1.BLIF sm_amiga_i_4__n.BLIF N_373_i +11 1 +.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n +11 1 +.names N_171_0.BLIF N_171 +0 1 +.names N_136_i.BLIF N_161.BLIF N_171_0 +11 1 .names BG_000DFFreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n 11 1 -.names N_140.BLIF N_319_i.BLIF N_353 -11 1 -.names N_159_i.BLIF sm_amiga_i_2__n.BLIF N_180_i -11 1 -.names N_259.BLIF size_dma_0_1__un3_n +.names N_153_0.BLIF N_153 0 1 -.names N_140_0.BLIF N_140 +.names N_253.BLIF N_253_i 0 1 -.names N_334.BLIF N_334_i +.names N_228.BLIF size_dma_0_1__un3_n 0 1 -.names SIZE_DMA_1_.BLIF N_259.BLIF size_dma_0_1__un1_n +.names RW_c.BLIF SM_AMIGA_6_.BLIF N_252 11 1 -.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF N_270 +.names N_243_i.BLIF N_253_i.BLIF N_172_0 11 1 -.names N_335.BLIF N_335_i +.names SIZE_DMA_1_.BLIF N_228.BLIF size_dma_0_1__un1_n +11 1 +.names N_253.BLIF SM_AMIGA_1_.BLIF N_247 +11 1 +.names N_192.BLIF N_192_i 0 1 .names pos_clk_size_dma_6_1__n.BLIF size_dma_0_1__un3_n.BLIF \ size_dma_0_1__un0_n 11 1 -.names N_281_0.BLIF N_281 -0 1 -.names N_244.BLIF N_244_i -0 1 -.names N_259.BLIF size_dma_0_0__un3_n -0 1 -.names a_c_1__n.BLIF BGACK_030_INT_i.BLIF N_131 +.names N_259.BLIF SM_AMIGA_0_.BLIF N_249 11 1 -.names N_233.BLIF N_233_i +.names N_191.BLIF N_191_i 0 1 -.names SIZE_DMA_0_.BLIF N_259.BLIF size_dma_0_0__un1_n +.names N_228.BLIF size_dma_0_0__un3_n +0 1 +.names N_144_0.BLIF N_144 +0 1 +.names N_193.BLIF N_193_i +0 1 +.names SIZE_DMA_0_.BLIF N_228.BLIF size_dma_0_0__un1_n 11 1 -.names a_i_1__n.BLIF BGACK_030_INT_i.BLIF N_132 +.names inst_RESET_OUT.BLIF RST_c.BLIF N_234 11 1 -.names N_355.BLIF N_355_i +.names N_398.BLIF N_398_i 0 1 .names pos_clk_size_dma_6_0__n.BLIF size_dma_0_0__un3_n.BLIF \ size_dma_0_0__un0_n 11 1 -.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_29 -1- 1 --1 1 -.names N_229.BLIF N_229_i +.names N_253.BLIF N_258.BLIF N_235 +11 1 +.names N_261.BLIF N_261_i 0 1 -.names pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n +.names inst_BGACK_030_INTreg.BLIF \ +un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un3_n 0 1 -.names IPL_D0_0_.BLIF ipl_c_0__n.BLIF G_116 +.names N_279_0.BLIF N_279 +0 1 +.names N_194.BLIF N_194_i +0 1 +.names inst_AS_030_000_SYNC.BLIF inst_BGACK_030_INTreg.BLIF \ +un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un1_n +11 1 +.names N_137_i.BLIF N_153.BLIF un1_SM_AMIGA_0_sqmuxa_2 +11 1 +.names sm_amiga_nss_i_0_4_0__n.BLIF sm_amiga_nss_i_0_5_0__n.BLIF \ +sm_amiga_nss_i_0_0__n +11 1 +.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF \ +un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un3_n.BLIF \ +un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un0_n +11 1 +.names N_259.BLIF SM_AMIGA_4_.BLIF N_203 +11 1 +.names N_305.BLIF as_000_dma_0_un3_n +0 1 +.names N_253.BLIF SM_AMIGA_5_.BLIF N_204 +11 1 +.names N_186.BLIF N_186_i +0 1 +.names pos_clk_un21_bgack_030_int_i_0_n.BLIF N_305.BLIF as_000_dma_0_un1_n +11 1 +.names N_171.BLIF N_398.BLIF N_201 +11 1 +.names N_185.BLIF N_185_i +0 1 +.names inst_AS_000_DMA.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n +11 1 +.names N_254.BLIF SM_AMIGA_4_.BLIF N_202 +11 1 +.names N_184.BLIF N_184_i +0 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_0__un3_n +0 1 +.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_25.BLIF CLK_OUT_PRE_25_0 01 1 10 1 11 0 00 0 -.names IPL_D0_1_.BLIF ipl_c_1__n.BLIF G_117 +.names IPL_D0_0_.BLIF ipl_c_0__n.BLIF G_117 01 1 10 1 11 0 00 0 -.names IPL_D0_2_.BLIF ipl_c_2__n.BLIF G_118 +.names IPL_D0_1_.BLIF ipl_c_1__n.BLIF G_118 +01 1 +10 1 +11 0 +00 0 +.names IPL_D0_2_.BLIF ipl_c_2__n.BLIF G_119 01 1 10 1 11 0 00 0 .names CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF \ -pos_clk_un23_bgack_030_int_i_0_o2_2_x2 +pos_clk_un21_bgack_030_int_i_0_o2_2_x2 01 1 10 1 11 0 00 0 -.names CYCLE_DMA_1_.BLIF N_263.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2 +.names CYCLE_DMA_1_.BLIF N_113.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2 01 1 10 1 11 0 @@ -1709,7 +1697,7 @@ pos_clk_un23_bgack_030_int_i_0_o2_2_x2 .names vcc_n_n.BLIF AVEC 1 1 0 0 -.names N_317_i.BLIF E +.names N_291_i.BLIF E 1 1 0 0 .names inst_VMA_INTreg.BLIF VMA @@ -1727,7 +1715,7 @@ pos_clk_un23_bgack_030_int_i_0_o2_2_x2 .names un1_amiga_bus_enable_low_i.BLIF AMIGA_BUS_ENABLE_LOW 1 1 0 0 -.names N_209.BLIF AMIGA_BUS_ENABLE_HIGH +.names N_178.BLIF AMIGA_BUS_ENABLE_HIGH 1 1 0 0 .names un10_ciin.BLIF CIIN @@ -1787,6 +1775,18 @@ pos_clk_un23_bgack_030_int_i_0_o2_2_x2 .names CLK_OSZI_c.BLIF IPL_D0_2_.C 1 1 0 0 +.names CLK_000_D_3_.BLIF CLK_000_D_4_.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF CLK_000_D_4_.C +1 1 +0 0 +.names CLK_000_D_4_.BLIF CLK_000_D_5_.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF CLK_000_D_5_.C +1 1 +0 0 .names CLK_000_D_5_.BLIF CLK_000_D_6_.D 1 1 0 0 @@ -1817,18 +1817,6 @@ pos_clk_un23_bgack_030_int_i_0_o2_2_x2 .names CLK_OSZI_c.BLIF CLK_000_D_10_.C 1 1 0 0 -.names CLK_000_D_10_.BLIF CLK_000_D_11_.D -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_000_D_11_.C -1 1 -0 0 -.names CLK_000_D_11_.BLIF CLK_000_D_12_.D -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_000_D_12_.C -1 1 -0 0 .names CLK_OSZI_c.BLIF CYCLE_DMA_0_.C 1 1 0 0 @@ -1877,21 +1865,15 @@ pos_clk_un23_bgack_030_int_i_0_o2_2_x2 .names CLK_OSZI_c.BLIF CLK_000_D_3_.C 1 1 0 0 -.names CLK_000_D_3_.BLIF CLK_000_D_4_.D -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_000_D_4_.C -1 1 -0 0 -.names CLK_000_D_4_.BLIF CLK_000_D_5_.D -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_000_D_5_.C -1 1 -0 0 .names CLK_OSZI_c.BLIF RST_DLY_0_.C 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C +1 1 +0 0 .names CLK_OSZI_c.BLIF inst_AS_000_DMA.C 1 1 0 0 @@ -1925,6 +1907,12 @@ pos_clk_un23_bgack_030_int_i_0_o2_2_x2 .names CLK_OSZI_c.BLIF inst_DS_000_ENABLE.C 1 1 0 0 +.names CLK_OUT_PRE_25_0.BLIF inst_CLK_OUT_PRE_25.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_25.C +1 1 +0 0 .names CLK_OSZI_c.BLIF BG_000DFFreg.C 1 1 0 0 @@ -1949,30 +1937,24 @@ pos_clk_un23_bgack_030_int_i_0_o2_2_x2 .names CLK_OSZI_c.BLIF inst_RW_000_INT.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C -1 1 -0 0 .names CLK_OSZI_c.BLIF inst_BGACK_030_INT_D.C 1 1 0 0 -.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_D.D +.names inst_CLK_OUT_PRE_25.BLIF inst_CLK_OUT_PRE_D.D 1 1 0 0 .names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_D.C 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_50.C +1 1 +0 0 .names inst_CLK_OUT_PRE_D.BLIF CLK_OUT_INTreg.D 1 1 0 0 .names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_50.C -1 1 -0 0 .names un3_size.BLIF SIZE_1_ 1 1 0 0 @@ -2192,19 +2174,19 @@ pos_clk_un23_bgack_030_int_i_0_o2_2_x2 .names FC_1_.BLIF fc_c_1__n 1 1 0 0 -.names un3_as_030_i.BLIF AS_030.OE +.names N_45_i.BLIF AS_030.OE 1 1 0 0 -.names un1_as_000_i.BLIF AS_000.OE +.names N_371_i.BLIF AS_000.OE 1 1 0 0 -.names un1_as_000_i.BLIF RW_000.OE +.names N_371_i.BLIF RW_000.OE 1 1 0 0 -.names un1_as_000_i.BLIF UDS_000.OE +.names N_371_i.BLIF UDS_000.OE 1 1 0 0 -.names un1_as_000_i.BLIF LDS_000.OE +.names N_371_i.BLIF LDS_000.OE 1 1 0 0 .names un1_as_030_i.BLIF SIZE_0_.OE @@ -2213,40 +2195,40 @@ pos_clk_un23_bgack_030_int_i_0_o2_2_x2 .names un1_as_030_i.BLIF SIZE_1_.OE 1 1 0 0 -.names un3_as_030_i.BLIF AHIGH_24_.OE +.names N_45_i.BLIF AHIGH_24_.OE 1 1 0 0 -.names un3_as_030_i.BLIF AHIGH_25_.OE +.names N_45_i.BLIF AHIGH_25_.OE 1 1 0 0 -.names un3_as_030_i.BLIF AHIGH_26_.OE +.names N_45_i.BLIF AHIGH_26_.OE 1 1 0 0 -.names un3_as_030_i.BLIF AHIGH_27_.OE +.names N_45_i.BLIF AHIGH_27_.OE 1 1 0 0 -.names un3_as_030_i.BLIF AHIGH_28_.OE +.names N_45_i.BLIF AHIGH_28_.OE 1 1 0 0 -.names un3_as_030_i.BLIF AHIGH_29_.OE +.names N_45_i.BLIF AHIGH_29_.OE 1 1 0 0 -.names un3_as_030_i.BLIF AHIGH_30_.OE +.names N_45_i.BLIF AHIGH_30_.OE 1 1 0 0 -.names un3_as_030_i.BLIF AHIGH_31_.OE +.names N_45_i.BLIF AHIGH_31_.OE 1 1 0 0 -.names un3_as_030_i.BLIF A_0_.OE +.names N_45_i.BLIF A_0_.OE 1 1 0 0 .names un22_berr.BLIF BERR.OE 1 1 0 0 -.names N_93_i.BLIF RW.OE +.names N_372_i.BLIF RW.OE 1 1 0 0 -.names un3_as_030_i.BLIF DS_030.OE +.names N_45_i.BLIF DS_030.OE 1 1 0 0 .names nEXP_SPACE_c.BLIF DSACK1.OE @@ -2255,7 +2237,7 @@ pos_clk_un23_bgack_030_int_i_0_o2_2_x2 .names RESET_OUT_i.BLIF RESET.OE 1 1 0 0 -.names N_313.BLIF CIIN.OE +.names N_310.BLIF CIIN.OE 1 1 0 0 .end diff --git a/Logic/68030_tk.bl3 b/Logic/68030_tk.bl3 index 5987a90..9a6b77e 100644 --- a/Logic/68030_tk.bl3 +++ b/Logic/68030_tk.bl3 @@ -1,26 +1,25 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Fri Aug 19 00:39:35 2016 +#$ DATE Wed Aug 24 22:17:49 2016 #$ MODULE 68030_tk -#$ PINS 61 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_030_2_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 \ -# DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BG_000 SIZE_0_ BGACK_030 AHIGH_30_ \ -# BGACK_000 AHIGH_29_ CLK_030 AHIGH_28_ CLK_000 AHIGH_27_ CLK_OSZI AHIGH_26_ CLK_DIV_OUT \ -# AHIGH_25_ CLK_EXP AHIGH_24_ FPU_CS A_DECODE_22_ FPU_SENSE A_DECODE_21_ DSACK1 \ -# A_DECODE_20_ DTACK A_DECODE_19_ AVEC A_DECODE_18_ E A_DECODE_17_ VPA A_DECODE_16_ VMA \ -# RST RESET RW AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ -# AMIGA_BUS_ENABLE_HIGH CIIN A_0_ IPL_030_1_ IPL_030_0_ IPL_1_ IPL_0_ FC_0_ A_1_ -#$ NODES 63 inst_BGACK_030_INTreg inst_VMA_INTreg cpu_est_3_ cpu_est_0_ cpu_est_1_ \ +#$ PINS 61 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_030_2_ IPL_2_ FC_1_ AS_030 SIZE_0_ \ +# AS_000 AHIGH_30_ RW_000 AHIGH_29_ DS_030 AHIGH_28_ UDS_000 AHIGH_27_ LDS_000 AHIGH_26_ \ +# nEXP_SPACE AHIGH_25_ BERR AHIGH_24_ BG_030 A_DECODE_22_ BG_000 A_DECODE_21_ BGACK_030 \ +# A_DECODE_20_ BGACK_000 A_DECODE_19_ CLK_030 A_DECODE_18_ CLK_000 A_DECODE_17_ \ +# CLK_OSZI A_DECODE_16_ CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 DTACK AVEC E VPA VMA RST \ +# RESET RW AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR A_0_ AMIGA_BUS_ENABLE_LOW IPL_030_1_ \ +# AMIGA_BUS_ENABLE_HIGH IPL_030_0_ CIIN IPL_1_ IPL_0_ FC_0_ A_1_ +#$ NODES 62 inst_BGACK_030_INTreg inst_VMA_INTreg cpu_est_3_ cpu_est_0_ cpu_est_1_ \ # cpu_est_2_ inst_AS_000_INT inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 \ # inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA \ # CYCLE_DMA_0_ CYCLE_DMA_1_ SIZE_DMA_0_ SIZE_DMA_1_ inst_VPA_D inst_UDS_000_INT \ -# inst_LDS_000_INT inst_CLK_OUT_PRE_D CLK_000_D_1_ CLK_000_D_10_ CLK_000_D_11_ \ -# inst_DTACK_D0 inst_RESET_OUT CLK_000_D_0_ inst_CLK_OUT_PRE_50 IPL_D0_0_ IPL_D0_1_ \ -# IPL_D0_2_ CLK_000_D_2_ CLK_000_D_3_ CLK_000_D_4_ CLK_000_D_5_ CLK_000_D_6_ \ -# CLK_000_D_7_ CLK_000_D_8_ CLK_000_D_9_ CLK_000_D_12_ \ -# inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_DSACK1_INTreg inst_DS_000_ENABLE SM_AMIGA_6_ \ -# SM_AMIGA_0_ SM_AMIGA_4_ inst_RW_000_INT inst_RW_000_DMA RST_DLY_0_ RST_DLY_1_ \ -# RST_DLY_2_ inst_A0_DMA inst_CLK_030_H SM_AMIGA_1_ SM_AMIGA_5_ SM_AMIGA_3_ \ -# SM_AMIGA_2_ SM_AMIGA_i_7_ BG_000DFFreg CLK_OUT_INTreg IPL_030DFF_0_reg \ -# IPL_030DFF_1_reg IPL_030DFF_2_reg +# inst_LDS_000_INT inst_CLK_OUT_PRE_D CLK_000_D_8_ CLK_000_D_9_ inst_DTACK_D0 \ +# inst_RESET_OUT CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_25 \ +# IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_3_ CLK_000_D_4_ CLK_000_D_5_ \ +# CLK_000_D_6_ CLK_000_D_7_ CLK_000_D_10_ inst_AMIGA_BUS_ENABLE_DMA_HIGH \ +# inst_DSACK1_INTreg inst_DS_000_ENABLE SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_0_ \ +# inst_RW_000_INT inst_RW_000_DMA RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_A0_DMA \ +# inst_CLK_030_H SM_AMIGA_1_ SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ \ +# BG_000DFFreg CLK_OUT_INTreg IPL_030DFF_0_reg IPL_030DFF_1_reg IPL_030DFF_2_reg .model bus68030 .inputs A_DECODE_23_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF \ BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF \ @@ -33,13 +32,13 @@ inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF inst_AS_030_D0.BLIF \ inst_AS_030_000_SYNC.BLIF inst_BGACK_030_INT_D.BLIF inst_AS_000_DMA.BLIF \ inst_DS_000_DMA.BLIF CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF SIZE_DMA_0_.BLIF \ SIZE_DMA_1_.BLIF inst_VPA_D.BLIF inst_UDS_000_INT.BLIF inst_LDS_000_INT.BLIF \ -inst_CLK_OUT_PRE_D.BLIF CLK_000_D_1_.BLIF CLK_000_D_10_.BLIF \ -CLK_000_D_11_.BLIF inst_DTACK_D0.BLIF inst_RESET_OUT.BLIF CLK_000_D_0_.BLIF \ -inst_CLK_OUT_PRE_50.BLIF IPL_D0_0_.BLIF IPL_D0_1_.BLIF IPL_D0_2_.BLIF \ -CLK_000_D_2_.BLIF CLK_000_D_3_.BLIF CLK_000_D_4_.BLIF CLK_000_D_5_.BLIF \ -CLK_000_D_6_.BLIF CLK_000_D_7_.BLIF CLK_000_D_8_.BLIF CLK_000_D_9_.BLIF \ -CLK_000_D_12_.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF inst_DSACK1_INTreg.BLIF \ -inst_DS_000_ENABLE.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_4_.BLIF \ +inst_CLK_OUT_PRE_D.BLIF CLK_000_D_8_.BLIF CLK_000_D_9_.BLIF inst_DTACK_D0.BLIF \ +inst_RESET_OUT.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF \ +inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_25.BLIF IPL_D0_0_.BLIF \ +IPL_D0_1_.BLIF IPL_D0_2_.BLIF CLK_000_D_2_.BLIF CLK_000_D_3_.BLIF \ +CLK_000_D_4_.BLIF CLK_000_D_5_.BLIF CLK_000_D_6_.BLIF CLK_000_D_7_.BLIF \ +CLK_000_D_10_.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF inst_DSACK1_INTreg.BLIF \ +inst_DS_000_ENABLE.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_0_.BLIF \ inst_RW_000_INT.BLIF inst_RW_000_DMA.BLIF RST_DLY_0_.BLIF RST_DLY_1_.BLIF \ RST_DLY_2_.BLIF inst_A0_DMA.BLIF inst_CLK_030_H.BLIF SM_AMIGA_1_.BLIF \ SM_AMIGA_5_.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_i_7_.BLIF \ @@ -57,29 +56,29 @@ SM_AMIGA_3_.C SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_1_.D SM_AMIGA_1_.C \ SM_AMIGA_0_.D SM_AMIGA_0_.C cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C \ IPL_030DFF_0_reg.D IPL_030DFF_0_reg.C IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C \ IPL_030DFF_2_reg.D IPL_030DFF_2_reg.C IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D \ -IPL_D0_1_.C IPL_D0_2_.D IPL_D0_2_.C CLK_000_D_6_.D CLK_000_D_6_.C \ -CLK_000_D_7_.D CLK_000_D_7_.C CLK_000_D_8_.D CLK_000_D_8_.C CLK_000_D_9_.D \ -CLK_000_D_9_.C CLK_000_D_10_.D CLK_000_D_10_.C CLK_000_D_11_.D CLK_000_D_11_.C \ -CLK_000_D_12_.D CLK_000_D_12_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D \ +IPL_D0_1_.C IPL_D0_2_.D IPL_D0_2_.C CLK_000_D_4_.D CLK_000_D_4_.C \ +CLK_000_D_5_.D CLK_000_D_5_.C CLK_000_D_6_.D CLK_000_D_6_.C CLK_000_D_7_.D \ +CLK_000_D_7_.C CLK_000_D_8_.D CLK_000_D_8_.C CLK_000_D_9_.D CLK_000_D_9_.C \ +CLK_000_D_10_.D CLK_000_D_10_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D \ CYCLE_DMA_1_.C SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C \ cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C RST_DLY_1_.C RST_DLY_2_.D \ RST_DLY_2_.C CLK_000_D_0_.D CLK_000_D_0_.C CLK_000_D_1_.D CLK_000_D_1_.C \ -CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C CLK_000_D_4_.D \ -CLK_000_D_4_.C CLK_000_D_5_.D CLK_000_D_5_.C RST_DLY_0_.D RST_DLY_0_.C \ -inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_030_000_SYNC.D \ -inst_AS_030_000_SYNC.C inst_AS_000_INT.D inst_AS_000_INT.C \ -inst_DSACK1_INTreg.D inst_DSACK1_INTreg.C inst_DS_000_DMA.D inst_DS_000_DMA.C \ -inst_AS_030_D0.D inst_AS_030_D0.C inst_VPA_D.D inst_VPA_D.C inst_DTACK_D0.D \ -inst_DTACK_D0.C inst_CLK_030_H.C inst_RESET_OUT.D inst_RESET_OUT.C \ -inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C BG_000DFFreg.D BG_000DFFreg.C \ +CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C RST_DLY_0_.D \ +RST_DLY_0_.C inst_LDS_000_INT.D inst_LDS_000_INT.C inst_BGACK_030_INTreg.D \ +inst_BGACK_030_INTreg.C inst_AS_000_DMA.D inst_AS_000_DMA.C \ +inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_000_INT.D \ +inst_AS_000_INT.C inst_DSACK1_INTreg.D inst_DSACK1_INTreg.C inst_DS_000_DMA.D \ +inst_DS_000_DMA.C inst_AS_030_D0.D inst_AS_030_D0.C inst_VPA_D.D inst_VPA_D.C \ +inst_DTACK_D0.D inst_DTACK_D0.C inst_CLK_030_H.C inst_RESET_OUT.D \ +inst_RESET_OUT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C \ +inst_CLK_OUT_PRE_25.D inst_CLK_OUT_PRE_25.C BG_000DFFreg.D BG_000DFFreg.C \ inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.C \ inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AMIGA_BUS_ENABLE_DMA_LOW.C \ inst_UDS_000_INT.D inst_UDS_000_INT.C inst_A0_DMA.D inst_A0_DMA.C \ inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_DMA.D inst_RW_000_DMA.C \ -inst_RW_000_INT.D inst_RW_000_INT.C inst_LDS_000_INT.D inst_LDS_000_INT.C \ -inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INT_D.D \ +inst_RW_000_INT.D inst_RW_000_INT.C inst_BGACK_030_INT_D.D \ inst_BGACK_030_INT_D.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C \ -CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C \ +inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C \ SIZE_1_ AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR RW SIZE_0_ \ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ \ AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE \ @@ -89,19 +88,19 @@ CIIN.OE cpu_est_2_.D.X1 cpu_est_2_.D.X2 RST_DLY_1_.D.X1 RST_DLY_1_.D.X2 \ inst_CLK_030_H.D.X1 inst_CLK_030_H.D.X2 SM_AMIGA_3_.D.X1 SM_AMIGA_3_.D.X2 \ SM_AMIGA_i_7_.D.X1 SM_AMIGA_i_7_.D.X2 .names nEXP_SPACE.BLIF RST.BLIF inst_AS_030_000_SYNC.BLIF CLK_000_D_1_.BLIF \ -CLK_000_D_0_.BLIF CLK_000_D_2_.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_i_7_.BLIF \ -BERR.PIN.BLIF SM_AMIGA_6_.D -1100-1-0- 1 --1--0-111 1 --1-1--111 1 ----01--1- 0 -------01- 0 ------0-0- 0 ----1---0- 0 ---1----0- 0 -0------0- 0 --0------- 0 --------10 0 +CLK_000_D_0_.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_i_7_.BLIF BERR.PIN.BLIF \ +SM_AMIGA_6_.D +11010-0- 1 +-1--0111 1 +-1-1-111 1 +-----01- 0 +---01--- 0 +--1---0- 0 +0-----0- 0 +----1-0- 0 +---0--0- 0 +------10 0 +-0------ 0 .names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_6_.BLIF \ SM_AMIGA_5_.BLIF BERR.PIN.BLIF SM_AMIGA_5_.D 1011-- 1 @@ -129,21 +128,21 @@ SM_AMIGA_5_.BLIF BERR.PIN.BLIF SM_AMIGA_4_.D --1--0 0 -0---0 0 .names RST.BLIF inst_VMA_INTreg.BLIF cpu_est_3_.BLIF cpu_est_0_.BLIF \ -cpu_est_1_.BLIF cpu_est_2_.BLIF inst_VPA_D.BLIF CLK_000_D_1_.BLIF \ -inst_DTACK_D0.BLIF CLK_000_D_0_.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF \ +cpu_est_1_.BLIF cpu_est_2_.BLIF inst_VPA_D.BLIF inst_DTACK_D0.BLIF \ +CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF \ BERR.PIN.BLIF SM_AMIGA_2_.D -10100001-01-- 1 -1-----11001-- 1 +1010000-101-- 1 +1-----10101-- 1 1--------0-11 1 -1------1---11 1 -------1-1--0- 0 +1-------1--11 1 +------11---0- 0 -----10----0- 0 ----1-0----0- 0 ---1--0----0- 0 --0---0----0- 0 -1----0----0- 0 -------1-1---0 0 --------0-1--- 0 +------11----0 0 +--------01--- 0 -----10-----0 0 ----1-0-----0 0 ---1--0-----0 0 @@ -151,11 +150,11 @@ BERR.PIN.BLIF SM_AMIGA_2_.D -1----0-----0 0 ----------00- 0 ---------1-0- 0 --------0---0- 0 +--------0--0- 0 ----------0-0 0 0------------ 0 ---------1--0 0 --------0----0 0 +--------0---0 0 .names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_1_.BLIF \ SM_AMIGA_2_.BLIF BERR.PIN.BLIF SM_AMIGA_1_.D 101-1- 1 @@ -355,6 +354,24 @@ RST_DLY_1_.BLIF RST_DLY_2_.BLIF RST_DLY_0_.D --10-- 0 -0-0-- 0 0----- 0 +.names RST.BLIF inst_LDS_000_INT.BLIF SM_AMIGA_6_.BLIF SIZE_0_.PIN.BLIF \ +SIZE_1_.PIN.BLIF A_0_.PIN.BLIF inst_LDS_000_INT.D +--1100 1 +-10--- 1 +0----- 1 +100--- 0 +1-1-1- 0 +1-10-- 0 +1-1--1 0 +.names BGACK_000.BLIF RST.BLIF inst_BGACK_030_INTreg.BLIF CLK_000_D_1_.BLIF \ +CLK_000_D_0_.BLIF AS_000.PIN.BLIF inst_BGACK_030_INTreg.D +1--011 1 +1-1--- 1 +-0---- 1 +-10-0- 0 +-101-- 0 +01---- 0 +-10--0 0 .names CLK_030.BLIF RST.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_000_DMA.BLIF \ CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF \ LDS_000.PIN.BLIF inst_AS_000_DMA.D @@ -407,25 +424,36 @@ CLK_000_D_0_.BLIF SM_AMIGA_6_.BLIF BERR.PIN.BLIF inst_AS_000_INT.D 1--011- 0 100---1 0 .names CLK_030.BLIF RST.BLIF inst_AS_030_D0.BLIF inst_CLK_OUT_PRE_D.BLIF \ -CLK_000_D_10_.BLIF CLK_000_D_11_.BLIF CLK_000_D_12_.BLIF \ -inst_DSACK1_INTreg.BLIF SM_AMIGA_1_.BLIF BERR.PIN.BLIF inst_DSACK1_INTreg.D -1--0-1-1-- 1 ------001-- 1 -----11-1-- 1 -1-10-1---- 1 --------10- 1 -1--0-1---0 1 ---1--00--- 1 ---1-11---- 1 ------00--0 1 -----11---0 1 ---1-----0- 1 --0-------- 1 ---------00 1 --1-101--1- 0 -01--01--1- 0 --1---01-1- 0 --10----0-1 0 +CLK_000_D_8_.BLIF CLK_000_D_9_.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF \ +CLK_000_D_10_.BLIF inst_DSACK1_INTreg.BLIF SM_AMIGA_1_.BLIF BERR.PIN.BLIF \ +inst_DSACK1_INTreg.D +1--0-1-1-1-- 1 +1--0-10--1-- 1 +-----0-101-- 1 +-----00-01-- 1 +----11-1-1-- 1 +----110--1-- 1 +1-10-1-1---- 1 +1-10-10----- 1 +1--0-1-1---0 1 +1--0-10----0 1 +--1--0-10--- 1 +--1--00-0--- 1 +--1-11-1---- 1 +--1-110----- 1 +---------10- 1 +-----0-10--0 1 +-----00-0--0 1 +----11-1---0 1 +----110----0 1 +--1-------0- 1 +-0---------- 1 +----------00 1 +-1-101----1- 0 +01--01----1- 0 +-1---0--1-1- 0 +-1----10--1- 0 +-10------0-1 0 .names CLK_030.BLIF RST.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_000_DMA.BLIF \ inst_DS_000_DMA.BLIF CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF inst_CLK_030_H.BLIF \ AS_000.PIN.BLIF RW_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ @@ -467,56 +495,42 @@ inst_DS_000_DMA.D 1- 1 -0 1 01 0 -.names RST.BLIF CLK_000_D_1_.BLIF inst_RESET_OUT.BLIF CLK_000_D_0_.BLIF \ +.names RST.BLIF inst_RESET_OUT.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF \ RST_DLY_0_.BLIF RST_DLY_1_.BLIF RST_DLY_2_.BLIF inst_RESET_OUT.D -11-0111 1 -1-1---- 1 +1-10111 1 +11----- 1 0------ 0 ---0--0- 0 ---0-0-- 0 ---01--- 0 +-0---0- 0 +-0--0-- 0 +-0-1--- 0 -00---- 0 ---0---0 0 +-0----0 0 .names RST.BLIF inst_AS_030_D0.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF \ -inst_DS_000_ENABLE.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_4_.BLIF \ -SM_AMIGA_5_.BLIF SM_AMIGA_i_7_.BLIF BERR.PIN.BLIF RW.PIN.BLIF \ -inst_DS_000_ENABLE.D -1-01-00-01-- 1 -1-01--0-01-1 1 -1----00001-- 1 -10--1-----1- 1 ----0---1--0- 0 ---1----1--0- 0 ----00--1---- 0 ---1-0--1---- 0 --1-0---1---- 0 --11----1---- 0 ----0-1----0- 0 ---1--1----0- 0 ----001------ 0 ---1-01------ 0 --1-0-1------ 0 --11--1------ 0 ----------00- 0 ---------1-0- 0 -------1---0- 0 -----0----0-- 0 --1-------0-- 0 -----0---1--- 0 --1------1--- 0 -----0-1----- 0 --1----1----- 0 ------1----00 0 -----01-----0 0 --1---1-----0 0 -0----------- 0 +inst_DS_000_ENABLE.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_4_.BLIF BERR.PIN.BLIF \ +RW.PIN.BLIF inst_DS_000_ENABLE.D +10--1--1- 1 +1-01--1-- 1 +1-01-1--1 1 +-----000- 0 +----000-- 0 +-1---00-- 0 +------000 0 +---0---0- 0 +--1----0- 0 +----0-0-0 0 +-1----0-0 0 +---00---- 0 +--1-0---- 0 +-1-0----- 0 +-11------ 0 +0-------- 0 .names nEXP_SPACE.BLIF BG_030.BLIF RST.BLIF inst_AS_030_D0.BLIF \ CLK_000_D_0_.BLIF BG_000DFFreg.BLIF BG_000DFFreg.D ---0--- 1 --1---- 1 ----01 1 ---0-1 1 0----1 1 +--0--- 1 +-1---- 1 10111- 0 -01--0 0 .names RST.BLIF A_1_.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ @@ -556,13 +570,13 @@ cpu_est_1_.BLIF cpu_est_2_.BLIF inst_VPA_D.BLIF CLK_000_D_1_.BLIF \ CLK_000_D_0_.BLIF inst_VMA_INTreg.D --0000-01 1 -1----1-- 1 --1------1 1 --1-----0- 1 -1---1--- 1 --1--0---- 1 --1-0----- 1 -11------ 1 0-------- 1 +-1-----0- 1 +-1--0---- 1 +-1-0----- 1 +-1------1 1 1-0110010 0 10---1--- 0 101------ 0 @@ -581,9 +595,9 @@ inst_RW_000_DMA.BLIF RW_000.PIN.BLIF inst_RW_000_DMA.D .names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_6_.BLIF \ SM_AMIGA_0_.BLIF inst_RW_000_INT.BLIF SM_AMIGA_i_7_.BLIF RW.PIN.BLIF \ inst_RW_000_INT.D ----0-1-- 1 -01-1--- 1 -011---1 1 +---0-1-- 1 --0--1-- 1 -1---1-- 1 ------0- 1 @@ -592,24 +606,6 @@ inst_RW_000_INT.D 1--0001- 0 1-0--01- 0 11---01- 0 -.names RST.BLIF inst_LDS_000_INT.BLIF SM_AMIGA_6_.BLIF SIZE_0_.PIN.BLIF \ -SIZE_1_.PIN.BLIF A_0_.PIN.BLIF inst_LDS_000_INT.D ---1100 1 --10--- 1 -0----- 1 -100--- 0 -1-1-1- 0 -1-10-- 0 -1-1--1 0 -.names BGACK_000.BLIF RST.BLIF inst_BGACK_030_INTreg.BLIF CLK_000_D_1_.BLIF \ -CLK_000_D_0_.BLIF AS_000.PIN.BLIF inst_BGACK_030_INTreg.D -1--011 1 -1-1--- 1 --0---- 1 --10-0- 0 --101-- 0 -01---- 0 --10--0 0 .names RST.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.D 0- 1 -1 1 @@ -758,6 +754,18 @@ AHIGH_31_.PIN.BLIF CIIN .names CLK_OSZI.BLIF IPL_D0_2_.C 1 1 0 0 +.names CLK_000_D_3_.BLIF CLK_000_D_4_.D +1 1 +0 0 +.names CLK_OSZI.BLIF CLK_000_D_4_.C +1 1 +0 0 +.names CLK_000_D_4_.BLIF CLK_000_D_5_.D +1 1 +0 0 +.names CLK_OSZI.BLIF CLK_000_D_5_.C +1 1 +0 0 .names CLK_000_D_5_.BLIF CLK_000_D_6_.D 1 1 0 0 @@ -788,18 +796,6 @@ AHIGH_31_.PIN.BLIF CIIN .names CLK_OSZI.BLIF CLK_000_D_10_.C 1 1 0 0 -.names CLK_000_D_10_.BLIF CLK_000_D_11_.D -1 1 -0 0 -.names CLK_OSZI.BLIF CLK_000_D_11_.C -1 1 -0 0 -.names CLK_000_D_11_.BLIF CLK_000_D_12_.D -1 1 -0 0 -.names CLK_OSZI.BLIF CLK_000_D_12_.C -1 1 -0 0 .names CLK_OSZI.BLIF CYCLE_DMA_0_.C 1 1 0 0 @@ -848,21 +844,15 @@ AHIGH_31_.PIN.BLIF CIIN .names CLK_OSZI.BLIF CLK_000_D_3_.C 1 1 0 0 -.names CLK_000_D_3_.BLIF CLK_000_D_4_.D -1 1 -0 0 -.names CLK_OSZI.BLIF CLK_000_D_4_.C -1 1 -0 0 -.names CLK_000_D_4_.BLIF CLK_000_D_5_.D -1 1 -0 0 -.names CLK_OSZI.BLIF CLK_000_D_5_.C -1 1 -0 0 .names CLK_OSZI.BLIF RST_DLY_0_.C 1 1 0 0 +.names CLK_OSZI.BLIF inst_LDS_000_INT.C +1 1 +0 0 +.names CLK_OSZI.BLIF inst_BGACK_030_INTreg.C +1 1 +0 0 .names CLK_OSZI.BLIF inst_AS_000_DMA.C 1 1 0 0 @@ -896,6 +886,14 @@ AHIGH_31_.PIN.BLIF CIIN .names CLK_OSZI.BLIF inst_DS_000_ENABLE.C 1 1 0 0 +.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_25.BLIF inst_CLK_OUT_PRE_25.D +10 1 +01 1 +00 0 +11 0 +.names CLK_OSZI.BLIF inst_CLK_OUT_PRE_25.C +1 1 +0 0 .names CLK_OSZI.BLIF BG_000DFFreg.C 1 1 0 0 @@ -920,30 +918,24 @@ AHIGH_31_.PIN.BLIF CIIN .names CLK_OSZI.BLIF inst_RW_000_INT.C 1 1 0 0 -.names CLK_OSZI.BLIF inst_LDS_000_INT.C -1 1 -0 0 -.names CLK_OSZI.BLIF inst_BGACK_030_INTreg.C -1 1 -0 0 .names CLK_OSZI.BLIF inst_BGACK_030_INT_D.C 1 1 0 0 -.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_D.D +.names inst_CLK_OUT_PRE_25.BLIF inst_CLK_OUT_PRE_D.D 1 1 0 0 .names CLK_OSZI.BLIF inst_CLK_OUT_PRE_D.C 1 1 0 0 +.names CLK_OSZI.BLIF inst_CLK_OUT_PRE_50.C +1 1 +0 0 .names inst_CLK_OUT_PRE_D.BLIF CLK_OUT_INTreg.D 1 1 0 0 .names CLK_OSZI.BLIF CLK_OUT_INTreg.C 1 1 0 0 -.names CLK_OSZI.BLIF inst_CLK_OUT_PRE_50.C -1 1 -0 0 .names SIZE_DMA_0_.BLIF SIZE_DMA_1_.BLIF SIZE_1_ 01 1 1- 0 @@ -1181,75 +1173,72 @@ UDS_000.PIN.BLIF LDS_000.PIN.BLIF inst_CLK_030_H.D.X2 -0- 0 --0 0 .names RST.BLIF inst_VMA_INTreg.BLIF cpu_est_3_.BLIF cpu_est_0_.BLIF \ -cpu_est_1_.BLIF cpu_est_2_.BLIF inst_VPA_D.BLIF CLK_000_D_1_.BLIF \ -inst_DTACK_D0.BLIF CLK_000_D_0_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_3_.BLIF \ +cpu_est_1_.BLIF cpu_est_2_.BLIF inst_VPA_D.BLIF inst_DTACK_D0.BLIF \ +CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_3_.BLIF \ BERR.PIN.BLIF SM_AMIGA_3_.D.X2 -1------0-110- 1 -1------0-11-0 1 -10100001-0-11 1 -1-----1100-11 1 +1-------0110- 1 +1-------011-0 1 +1010000-10-11 1 +1-----1010-11 1 0------------ 0 --------1-1--- 0 --------0-0--- 0 --------0--0-- 0 --------1---0- 0 --------1----0 0 --1----01----- 0 ---0---01----- 0 ----1--01----- 0 -----1-01----- 0 ------101----- 0 +--------11--- 0 +--------00--- 0 +--------0-0-- 0 +--------1--0- 0 +--------1---0 0 +-1----0-1---- 0 +--0---0-1---- 0 +---1--0-1---- 0 +----1-0-1---- 0 +-----10-1---- 0 ------111---- 0 --------0---11 0 +--------0--11 0 .names RST.BLIF BERR.PIN.BLIF SM_AMIGA_i_7_.D.X1 11 1 0- 0 -0 0 .names nEXP_SPACE.BLIF RST.BLIF inst_VMA_INTreg.BLIF cpu_est_3_.BLIF \ cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF inst_AS_030_000_SYNC.BLIF \ -inst_VPA_D.BLIF CLK_000_D_1_.BLIF inst_DTACK_D0.BLIF CLK_000_D_0_.BLIF \ -CLK_000_D_2_.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_4_.BLIF \ -SM_AMIGA_1_.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF \ -BERR.PIN.BLIF SM_AMIGA_i_7_.D.X2 -11-----0-0--100000000 1 --1-------0-1-------10 1 --1-------0-1---1----0 1 --1-------0-1-1------0 1 --1-------1-0----1---0 1 --1-------1-0-----1--0 1 --101000-01-0------1-0 1 --1------1100------1-0 1 -01-----------00000001 1 --1-----1-----00000001 1 --1-------1---00000001 1 --1----------000000001 1 --1-------0-1-01000001 1 --0------------------- 0 --------------1------1 0 ----------------1----1 0 -----------------1---1 0 ------------------1--1 0 -------------------1-1 0 --------------------11 0 ----------0-0-1------- 0 ----------0-0---1----- 0 ----------0-0-------1- 0 ----------1----1-----1 0 ------------0--1-----1 0 ----------1-1--------0 0 ----------0---0-01--0- 0 ----------0---0-0-1-0- 0 ----------0---0-0--10- 0 ----------1------000-0 0 -1------0-0--1-0-----1 0 ---1-----01------00--0 0 ----0----01------00--0 0 -----1---01------00--0 0 ------1--01------00--0 0 -------1-01------00--0 0 ---------111-----00--0 0 -0--------0---0-0---00 0 --------1-0---0-0---00 0 ----------0--00-0---00 0 ----------0---010---00 0 +inst_VPA_D.BLIF inst_DTACK_D0.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF \ +SM_AMIGA_6_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_1_.BLIF \ +SM_AMIGA_5_.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF BERR.PIN.BLIF \ +SM_AMIGA_i_7_.D.X2 +-1--------011------0 1 +-1--------01-1-----0 1 +-1--------01------10 1 +-1--------10---1---0 1 +-1--------10----1--0 1 +11-----0--10000--000 1 +-101000-0-10-----1-0 1 +-1------1010-----1-0 1 +-1--------0100-00001 1 +01----------00000001 1 +-1-----1----00000001 1 +-1--------0-00000001 1 +-1---------100000001 1 +-0------------------ 0 +------------1------1 0 +-------------1-----1 0 +---------------1---1 0 +----------------1--1 0 +-----------------1-1 0 +------------------11 0 +----------1---1----1 0 +-----------0--1----1 0 +----------11-------0 0 +----------00-------0 0 +----------1-1--000-- 0 +----------1--1-000-- 0 +----------1---1000-- 0 +----------1----0001- 0 +1------0--10-------1 0 +----------0-00----00 0 +--1-----0-1----001-- 0 +---0----0-1----001-- 0 +----1---0-1----001-- 0 +-----1--0-1----001-- 0 +------1-0-1----001-- 0 +--------111----001-- 0 +0---------1----000-0 0 +-------1--1----000-0 0 .end diff --git a/Logic/68030_tk.crf b/Logic/68030_tk.crf index 0261573..16ac646 100644 --- a/Logic/68030_tk.crf +++ b/Logic/68030_tk.crf @@ -1,7 +1,7 @@ // Signal Name Cross Reference File // ispLEVER Classic 2.0.00.17.20.15 -// Design '68030_tk' created Fri Aug 19 00:39:35 2016 +// Design '68030_tk' created Wed Aug 24 22:17:49 2016 // LEGEND: '>' Functional Block Port Separator diff --git a/Logic/68030_tk.eq3 b/Logic/68030_tk.eq3 index 2cbeac8..55e707d 100644 --- a/Logic/68030_tk.eq3 +++ b/Logic/68030_tk.eq3 @@ -2,7 +2,7 @@ Copyright(C), 1992-2015, Lattice Semiconductor Corp. All Rights Reserved. -Design bus68030 created Fri Aug 19 00:39:35 2016 +Design bus68030 created Wed Aug 24 22:17:49 2016 P-Terms Fan-in Fan-out Type Name (attributes) @@ -13,34 +13,34 @@ Design bus68030 created Fri Aug 19 00:39:35 2016 1 3 1 Pin AHIGH_31_.OE 1 2 1 Pin AS_030- 1 3 1 Pin AS_030.OE - 1 2 1 Pin AS_000- - 1 2 1 Pin AS_000.OE - 1 2 1 Pin DS_030- - 1 3 1 Pin DS_030.OE - 1 2 1 Pin UDS_000- - 1 2 1 Pin UDS_000.OE - 1 2 1 Pin LDS_000- - 1 2 1 Pin LDS_000.OE - 0 0 1 Pin BERR - 1 9 1 Pin BERR.OE 1 2 1 Pin SIZE_0_ 1 2 1 Pin SIZE_0_.OE + 1 2 1 Pin AS_000- + 1 2 1 Pin AS_000.OE 0 0 1 Pin AHIGH_30_ 1 3 1 Pin AHIGH_30_.OE 0 0 1 Pin AHIGH_29_ 1 3 1 Pin AHIGH_29_.OE + 1 2 1 Pin DS_030- + 1 3 1 Pin DS_030.OE 0 0 1 Pin AHIGH_28_ 1 3 1 Pin AHIGH_28_.OE + 1 2 1 Pin UDS_000- + 1 2 1 Pin UDS_000.OE 0 0 1 Pin AHIGH_27_ 1 3 1 Pin AHIGH_27_.OE + 1 2 1 Pin LDS_000- + 1 2 1 Pin LDS_000.OE 0 0 1 Pin AHIGH_26_ 1 3 1 Pin AHIGH_26_.OE - 1 1 1 Pin CLK_DIV_OUT.D - 1 1 1 Pin CLK_DIV_OUT.C 0 0 1 Pin AHIGH_25_ 1 3 1 Pin AHIGH_25_.OE + 0 0 1 Pin BERR + 1 9 1 Pin BERR.OE 0 0 1 Pin AHIGH_24_ 1 3 1 Pin AHIGH_24_.OE + 1 1 1 Pin CLK_DIV_OUT.D + 1 1 1 Pin CLK_DIV_OUT.C 1 9 1 Pin FPU_CS- 1 0 1 Pin AVEC 2 3 1 Pin E @@ -64,7 +64,7 @@ Design bus68030 created Fri Aug 19 00:39:35 2016 1 1 1 Pin CLK_EXP.D 1 1 1 Pin CLK_EXP.C 1 1 1 Pin DSACK1.OE - 4 10 1 Pin DSACK1.D- + 5 12 1 Pin DSACK1.D- 1 1 1 Pin DSACK1.C 3 9 1 Pin VMA.T 1 1 1 Pin VMA.C @@ -117,20 +117,22 @@ Design bus68030 created Fri Aug 19 00:39:35 2016 1 1 1 Node inst_LDS_000_INT.C 1 1 1 Node inst_CLK_OUT_PRE_D.D 1 1 1 Node inst_CLK_OUT_PRE_D.C - 1 1 1 Node CLK_000_D_1_.D - 1 1 1 Node CLK_000_D_1_.C - 1 1 1 Node CLK_000_D_10_.D - 1 1 1 Node CLK_000_D_10_.C - 1 1 1 Node CLK_000_D_11_.D - 1 1 1 Node CLK_000_D_11_.C + 1 1 1 Node CLK_000_D_8_.D + 1 1 1 Node CLK_000_D_8_.C + 1 1 1 Node CLK_000_D_9_.D + 1 1 1 Node CLK_000_D_9_.C 1 2 1 Node inst_DTACK_D0.D- 1 1 1 Node inst_DTACK_D0.C 2 7 1 Node inst_RESET_OUT.D 1 1 1 Node inst_RESET_OUT.C + 1 1 1 Node CLK_000_D_1_.D + 1 1 1 Node CLK_000_D_1_.C 1 1 1 Node CLK_000_D_0_.D 1 1 1 Node CLK_000_D_0_.C 1 1 1 Node inst_CLK_OUT_PRE_50.D 1 1 1 Node inst_CLK_OUT_PRE_50.C + 2 2 1 Node inst_CLK_OUT_PRE_25.D + 1 1 1 Node inst_CLK_OUT_PRE_25.C 1 2 1 Node IPL_D0_0_.D- 1 1 1 Node IPL_D0_0_.C 1 2 1 Node IPL_D0_1_.D- @@ -149,22 +151,18 @@ Design bus68030 created Fri Aug 19 00:39:35 2016 1 1 1 Node CLK_000_D_6_.C 1 1 1 Node CLK_000_D_7_.D 1 1 1 Node CLK_000_D_7_.C - 1 1 1 Node CLK_000_D_8_.D - 1 1 1 Node CLK_000_D_8_.C - 1 1 1 Node CLK_000_D_9_.D - 1 1 1 Node CLK_000_D_9_.C - 1 1 1 Node CLK_000_D_12_.D - 1 1 1 Node CLK_000_D_12_.C + 1 1 1 Node CLK_000_D_10_.D + 1 1 1 Node CLK_000_D_10_.C 2 5 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- 1 1 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.C - 4 12 1 Node inst_DS_000_ENABLE.D + 3 9 1 Node inst_DS_000_ENABLE.D 1 1 1 Node inst_DS_000_ENABLE.C - 3 9 1 Node SM_AMIGA_6_.D + 3 8 1 Node SM_AMIGA_6_.D 1 1 1 Node SM_AMIGA_6_.C - 3 6 1 Node SM_AMIGA_0_.D - 1 1 1 Node SM_AMIGA_0_.C 3 6 1 Node SM_AMIGA_4_.D 1 1 1 Node SM_AMIGA_4_.C + 3 6 1 Node SM_AMIGA_0_.D + 1 1 1 Node SM_AMIGA_0_.C 4 6 1 Node RST_DLY_0_.D 1 1 1 Node RST_DLY_0_.C 2 6 1 NodeX1 RST_DLY_1_.D.X1 @@ -183,14 +181,14 @@ Design bus68030 created Fri Aug 19 00:39:35 2016 1 1 1 Node SM_AMIGA_3_.C 4 13 1 Node SM_AMIGA_2_.D 1 1 1 Node SM_AMIGA_2_.C - 13 21 1 NodeX1 SM_AMIGA_i_7_.D.X1 + 13 20 1 NodeX1 SM_AMIGA_i_7_.D.X1 1 2 1 NodeX2 SM_AMIGA_i_7_.D.X2 1 1 1 Node SM_AMIGA_i_7_.C 2 14 1 Node CIIN_0 ========= - 301 P-Term Total: 301 + 300 P-Term Total: 300 Total Pins: 61 - Total Nodes: 53 + Total Nodes: 52 Average P-Term/Output: 2 @@ -208,30 +206,14 @@ AHIGH_31_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); AS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); -!AS_000 = (!inst_AS_000_INT.Q & !AS_030.PIN); - -AS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); - -!DS_030 = (!inst_DS_000_DMA.Q & !AS_000.PIN); - -DS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); - -!UDS_000 = (!inst_UDS_000_INT.Q & inst_DS_000_ENABLE.Q); - -UDS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); - -!LDS_000 = (!inst_LDS_000_INT.Q & inst_DS_000_ENABLE.Q); - -LDS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); - -BERR = (0); - -BERR.OE = (FC_1_ & BGACK_000 & FPU_SENSE & !A_DECODE_19_ & !A_DECODE_18_ & A_DECODE_17_ & !A_DECODE_16_ & FC_0_ & !AS_030.PIN); - SIZE_0_ = (SIZE_DMA_0_.Q & !SIZE_DMA_1_.Q); SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q); +!AS_000 = (!inst_AS_000_INT.Q & !AS_030.PIN); + +AS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); + AHIGH_30_ = (0); AHIGH_30_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); @@ -240,30 +222,46 @@ AHIGH_29_ = (0); AHIGH_29_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +!DS_030 = (!inst_DS_000_DMA.Q & !AS_000.PIN); + +DS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); + AHIGH_28_ = (0); AHIGH_28_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +!UDS_000 = (!inst_UDS_000_INT.Q & inst_DS_000_ENABLE.Q); + +UDS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); + AHIGH_27_ = (0); AHIGH_27_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +!LDS_000 = (!inst_LDS_000_INT.Q & inst_DS_000_ENABLE.Q); + +LDS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); + AHIGH_26_ = (0); AHIGH_26_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); -CLK_DIV_OUT.D = (inst_CLK_OUT_PRE_D.Q); - -CLK_DIV_OUT.C = (CLK_OSZI); - AHIGH_25_ = (0); AHIGH_25_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +BERR = (0); + +BERR.OE = (FC_1_ & BGACK_000 & FPU_SENSE & !A_DECODE_19_ & !A_DECODE_18_ & A_DECODE_17_ & !A_DECODE_16_ & FC_0_ & !AS_030.PIN); + AHIGH_24_ = (0); AHIGH_24_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +CLK_DIV_OUT.D = (inst_CLK_OUT_PRE_D.Q); + +CLK_DIV_OUT.C = (CLK_OSZI); + !FPU_CS = (FC_1_ & BGACK_000 & !FPU_SENSE & !A_DECODE_19_ & !A_DECODE_18_ & A_DECODE_17_ & !A_DECODE_16_ & FC_0_ & !AS_030.PIN); AVEC = (1); @@ -328,10 +326,11 @@ CLK_EXP.C = (CLK_OSZI); DSACK1.OE = (nEXP_SPACE); -!DSACK1.D = (RST & !CLK_000_D_11_.Q & CLK_000_D_12_.Q & SM_AMIGA_1_.Q +!DSACK1.D = (RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_1_.Q + # RST & !CLK_000_D_9_.Q & CLK_000_D_10_.Q & SM_AMIGA_1_.Q # RST & !inst_AS_030_D0.Q & !DSACK1.Q & BERR.PIN - # !CLK_030 & RST & !CLK_000_D_10_.Q & CLK_000_D_11_.Q & SM_AMIGA_1_.Q - # RST & inst_CLK_OUT_PRE_D.Q & !CLK_000_D_10_.Q & CLK_000_D_11_.Q & SM_AMIGA_1_.Q); + # !CLK_030 & RST & !CLK_000_D_8_.Q & CLK_000_D_9_.Q & SM_AMIGA_1_.Q + # RST & inst_CLK_OUT_PRE_D.Q & !CLK_000_D_8_.Q & CLK_000_D_9_.Q & SM_AMIGA_1_.Q); DSACK1.C = (CLK_OSZI); @@ -498,21 +497,17 @@ inst_LDS_000_INT.D = (!RST inst_LDS_000_INT.C = (CLK_OSZI); -inst_CLK_OUT_PRE_D.D = (inst_CLK_OUT_PRE_50.Q); +inst_CLK_OUT_PRE_D.D = (inst_CLK_OUT_PRE_25.Q); inst_CLK_OUT_PRE_D.C = (CLK_OSZI); -CLK_000_D_1_.D = (CLK_000_D_0_.Q); +CLK_000_D_8_.D = (CLK_000_D_7_.Q); -CLK_000_D_1_.C = (CLK_OSZI); +CLK_000_D_8_.C = (CLK_OSZI); -CLK_000_D_10_.D = (CLK_000_D_9_.Q); +CLK_000_D_9_.D = (CLK_000_D_8_.Q); -CLK_000_D_10_.C = (CLK_OSZI); - -CLK_000_D_11_.D = (CLK_000_D_10_.Q); - -CLK_000_D_11_.C = (CLK_OSZI); +CLK_000_D_9_.C = (CLK_OSZI); !inst_DTACK_D0.D = (!DTACK & RST); @@ -523,6 +518,10 @@ inst_RESET_OUT.D = (RST & inst_RESET_OUT.Q inst_RESET_OUT.C = (CLK_OSZI); +CLK_000_D_1_.D = (CLK_000_D_0_.Q); + +CLK_000_D_1_.C = (CLK_OSZI); + CLK_000_D_0_.D = (CLK_000); CLK_000_D_0_.C = (CLK_OSZI); @@ -531,6 +530,11 @@ inst_CLK_OUT_PRE_50.D = (!inst_CLK_OUT_PRE_50.Q); inst_CLK_OUT_PRE_50.C = (CLK_OSZI); +inst_CLK_OUT_PRE_25.D = (!inst_CLK_OUT_PRE_50.Q & inst_CLK_OUT_PRE_25.Q + # inst_CLK_OUT_PRE_50.Q & !inst_CLK_OUT_PRE_25.Q); + +inst_CLK_OUT_PRE_25.C = (CLK_OSZI); + !IPL_D0_0_.D = (RST & !IPL_0_); IPL_D0_0_.C = (CLK_OSZI); @@ -567,48 +571,39 @@ CLK_000_D_7_.D = (CLK_000_D_6_.Q); CLK_000_D_7_.C = (CLK_OSZI); -CLK_000_D_8_.D = (CLK_000_D_7_.Q); +CLK_000_D_10_.D = (CLK_000_D_9_.Q); -CLK_000_D_8_.C = (CLK_OSZI); - -CLK_000_D_9_.D = (CLK_000_D_8_.Q); - -CLK_000_D_9_.C = (CLK_OSZI); - -CLK_000_D_12_.D = (CLK_000_D_11_.Q); - -CLK_000_D_12_.C = (CLK_OSZI); +CLK_000_D_10_.C = (CLK_OSZI); !inst_AMIGA_BUS_ENABLE_DMA_HIGH.D = (RST & !A_1_ & !BGACK_030.Q # RST & BGACK_030.Q & inst_BGACK_030_INT_D.Q & !inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q); inst_AMIGA_BUS_ENABLE_DMA_HIGH.C = (CLK_OSZI); -inst_DS_000_ENABLE.D = (RST & !inst_AS_030_D0.Q & inst_DS_000_ENABLE.Q & BERR.PIN - # RST & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_5_.Q & SM_AMIGA_i_7_.Q - # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_5_.Q & SM_AMIGA_i_7_.Q - # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_5_.Q & SM_AMIGA_i_7_.Q & RW.PIN); +inst_DS_000_ENABLE.D = (RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_4_.Q + # RST & !inst_AS_030_D0.Q & inst_DS_000_ENABLE.Q & BERR.PIN + # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_6_.Q & RW.PIN); inst_DS_000_ENABLE.C = (CLK_OSZI); SM_AMIGA_6_.D = (RST & CLK_000_D_1_.Q & SM_AMIGA_6_.Q & SM_AMIGA_i_7_.Q & BERR.PIN # RST & !CLK_000_D_0_.Q & SM_AMIGA_6_.Q & SM_AMIGA_i_7_.Q & BERR.PIN - # nEXP_SPACE & RST & !inst_AS_030_000_SYNC.Q & !CLK_000_D_1_.Q & CLK_000_D_2_.Q & !SM_AMIGA_i_7_.Q); + # nEXP_SPACE & RST & !inst_AS_030_000_SYNC.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & !SM_AMIGA_i_7_.Q); SM_AMIGA_6_.C = (CLK_OSZI); -SM_AMIGA_0_.D = (RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_1_.Q - # RST & CLK_000_D_1_.Q & SM_AMIGA_0_.Q & BERR.PIN - # RST & !CLK_000_D_0_.Q & SM_AMIGA_0_.Q & BERR.PIN); - -SM_AMIGA_0_.C = (CLK_OSZI); - SM_AMIGA_4_.D = (RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_5_.Q # RST & CLK_000_D_1_.Q & SM_AMIGA_4_.Q & BERR.PIN # RST & !CLK_000_D_0_.Q & SM_AMIGA_4_.Q & BERR.PIN); SM_AMIGA_4_.C = (CLK_OSZI); +SM_AMIGA_0_.D = (RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_1_.Q + # RST & CLK_000_D_1_.Q & SM_AMIGA_0_.Q & BERR.PIN + # RST & !CLK_000_D_0_.Q & SM_AMIGA_0_.Q & BERR.PIN); + +SM_AMIGA_0_.C = (CLK_OSZI); + RST_DLY_0_.D = (RST & !CLK_000_D_1_.Q & RST_DLY_0_.Q # RST & CLK_000_D_0_.Q & RST_DLY_0_.Q # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & !RST_DLY_0_.Q @@ -653,7 +648,7 @@ SM_AMIGA_5_.C = (CLK_OSZI); SM_AMIGA_3_.D.X1 = (RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_4_.Q & !SM_AMIGA_3_.Q # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_4_.Q & !BERR.PIN - # RST & inst_VPA_D.Q & CLK_000_D_1_.Q & !inst_DTACK_D0.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & BERR.PIN + # RST & inst_VPA_D.Q & !inst_DTACK_D0.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & BERR.PIN # RST & !VMA.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & BERR.PIN); SM_AMIGA_3_.D.X2 = (RST & SM_AMIGA_3_.Q & BERR.PIN); @@ -662,7 +657,7 @@ SM_AMIGA_3_.C = (CLK_OSZI); SM_AMIGA_2_.D = (RST & CLK_000_D_1_.Q & SM_AMIGA_2_.Q & BERR.PIN # RST & !CLK_000_D_0_.Q & SM_AMIGA_2_.Q & BERR.PIN - # RST & inst_VPA_D.Q & CLK_000_D_1_.Q & !inst_DTACK_D0.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q + # RST & inst_VPA_D.Q & !inst_DTACK_D0.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q # RST & !VMA.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); SM_AMIGA_2_.C = (CLK_OSZI); @@ -672,14 +667,14 @@ SM_AMIGA_i_7_.D.X1 = (RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_6_.Q & ! # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_1_.Q & !BERR.PIN # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_5_.Q & !BERR.PIN # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_2_.Q & !BERR.PIN - # RST & inst_VPA_D.Q & CLK_000_D_1_.Q & !inst_DTACK_D0.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & !BERR.PIN - # !nEXP_SPACE & RST & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN - # RST & inst_AS_030_000_SYNC.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN - # RST & CLK_000_D_1_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN - # RST & !CLK_000_D_2_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN - # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !SM_AMIGA_6_.Q & SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN + # RST & inst_VPA_D.Q & !inst_DTACK_D0.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & !BERR.PIN + # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN + # !nEXP_SPACE & RST & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN + # RST & inst_AS_030_000_SYNC.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN + # RST & !CLK_000_D_1_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN + # RST & CLK_000_D_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN # RST & !VMA.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & !BERR.PIN - # nEXP_SPACE & RST & !inst_AS_030_000_SYNC.Q & !CLK_000_D_1_.Q & CLK_000_D_2_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & !BERR.PIN); + # nEXP_SPACE & RST & !inst_AS_030_000_SYNC.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & !BERR.PIN); SM_AMIGA_i_7_.D.X2 = (RST & BERR.PIN); diff --git a/Logic/68030_tk.fti b/Logic/68030_tk.fti index 24156ef..c961f26 100644 --- a/Logic/68030_tk.fti +++ b/Logic/68030_tk.fti @@ -1,5 +1,5 @@ #PLAFILE 68030_tk.tt4 -#DATE 08/18/2016 +#DATE 08/23/2016 #DESIGN #DEVICE mach447a @@ -8,7 +8,7 @@ DATA LOCATION AHIGH_25_:C_12_18 // IO DATA LOCATION AHIGH_26_:C_5_17 // IO DATA LOCATION AHIGH_27_:C_9_16 // IO DATA LOCATION AHIGH_28_:C_0_15 // IO -DATA LOCATION AHIGH_29_:B_13_6 // IO +DATA LOCATION AHIGH_29_:B_8_6 // IO DATA LOCATION AHIGH_30_:B_0_5 // IO DATA LOCATION AHIGH_31_:B_12_4 // IO DATA LOCATION AMIGA_ADDR_ENABLE:D_5_33 // OUT @@ -34,34 +34,32 @@ DATA LOCATION BGACK_030:H_4_83 // IO {RN_BGACK_030} DATA LOCATION BG_000:D_1_29 // IO {RN_BG_000} DATA LOCATION BG_030:C_*_21 // INP DATA LOCATION CIIN:E_12_47 // OUT -DATA LOCATION CIIN_0:E_10 // NOD +DATA LOCATION CIIN_0:E_9 // NOD DATA LOCATION CLK_000:*_*_11 // INP -DATA LOCATION CLK_000_D_0_:C_13 // NOD -DATA LOCATION CLK_000_D_10_:C_14 // NOD -DATA LOCATION CLK_000_D_11_:H_0 // NOD -DATA LOCATION CLK_000_D_12_:G_14 // NOD -DATA LOCATION CLK_000_D_1_:H_3 // NOD -DATA LOCATION CLK_000_D_2_:E_2 // NOD -DATA LOCATION CLK_000_D_3_:E_9 // NOD -DATA LOCATION CLK_000_D_4_:C_11 // NOD -DATA LOCATION CLK_000_D_5_:E_5 // NOD -DATA LOCATION CLK_000_D_6_:D_14 // NOD -DATA LOCATION CLK_000_D_7_:A_14 // NOD -DATA LOCATION CLK_000_D_8_:G_3 // NOD -DATA LOCATION CLK_000_D_9_:A_10 // NOD +DATA LOCATION CLK_000_D_0_:E_8 // NOD +DATA LOCATION CLK_000_D_10_:F_6 // NOD +DATA LOCATION CLK_000_D_1_:H_5 // NOD +DATA LOCATION CLK_000_D_2_:H_6 // NOD +DATA LOCATION CLK_000_D_3_:E_2 // NOD +DATA LOCATION CLK_000_D_4_:D_3 // NOD +DATA LOCATION CLK_000_D_5_:B_14 // NOD +DATA LOCATION CLK_000_D_6_:B_10 // NOD +DATA LOCATION CLK_000_D_7_:E_13 // NOD +DATA LOCATION CLK_000_D_8_:E_6 // NOD +DATA LOCATION CLK_000_D_9_:H_13 // NOD DATA LOCATION CLK_030:*_*_64 // INP DATA LOCATION CLK_DIV_OUT:G_1_65 // OUT DATA LOCATION CLK_EXP:B_1_10 // OUT DATA LOCATION CLK_OSZI:*_*_61 // Cin -DATA LOCATION CYCLE_DMA_0_:A_13 // NOD -DATA LOCATION CYCLE_DMA_1_:A_9 // NOD +DATA LOCATION CYCLE_DMA_0_:C_14 // NOD +DATA LOCATION CYCLE_DMA_1_:C_10 // NOD DATA LOCATION DSACK1:H_9_81 // IO {RN_DSACK1} DATA LOCATION DS_030:A_0_98 // OUT DATA LOCATION DTACK:D_*_30 // INP DATA LOCATION E:G_4_66 // OUT DATA LOCATION FC_0_:F_*_57 // INP DATA LOCATION FC_1_:F_*_58 // INP -DATA LOCATION FPU_CS:H_5_78 // OUT +DATA LOCATION FPU_CS:H_1_78 // OUT DATA LOCATION FPU_SENSE:A_*_91 // INP DATA LOCATION IPL_030_0_:B_5_8 // IO {RN_IPL_030_0_} DATA LOCATION IPL_030_1_:B_9_7 // IO {RN_IPL_030_1_} @@ -69,9 +67,9 @@ DATA LOCATION IPL_030_2_:B_4_9 // IO {RN_IPL_030_2_} DATA LOCATION IPL_0_:G_*_67 // INP DATA LOCATION IPL_1_:F_*_56 // INP DATA LOCATION IPL_2_:G_*_68 // INP -DATA LOCATION IPL_D0_0_:B_3 // NOD -DATA LOCATION IPL_D0_1_:B_14 // NOD -DATA LOCATION IPL_D0_2_:A_3 // NOD +DATA LOCATION IPL_D0_0_:A_13 // NOD +DATA LOCATION IPL_D0_1_:B_3 // NOD +DATA LOCATION IPL_D0_2_:G_7 // NOD DATA LOCATION LDS_000:D_12_31 // IO DATA LOCATION RESET:B_2_3 // OUT DATA LOCATION RN_A_0_:G_8 // NOD {A_0_} @@ -82,50 +80,51 @@ DATA LOCATION RN_IPL_030_0_:B_5 // NOD {IPL_030_0_} DATA LOCATION RN_IPL_030_1_:B_9 // NOD {IPL_030_1_} DATA LOCATION RN_IPL_030_2_:B_4 // NOD {IPL_030_2_} DATA LOCATION RN_RW:G_0 // NOD {RW} -DATA LOCATION RN_RW_000:H_1 // NOD {RW_000} +DATA LOCATION RN_RW_000:H_0 // NOD {RW_000} DATA LOCATION RN_VMA:D_0 // NOD {VMA} DATA LOCATION RST:*_*_86 // INP -DATA LOCATION RST_DLY_0_:F_0 // NOD -DATA LOCATION RST_DLY_1_:F_13 // NOD -DATA LOCATION RST_DLY_2_:F_9 // NOD +DATA LOCATION RST_DLY_0_:G_10 // NOD +DATA LOCATION RST_DLY_1_:G_3 // NOD +DATA LOCATION RST_DLY_2_:G_14 // NOD DATA LOCATION RW:G_0_71 // IO {RN_RW} -DATA LOCATION RW_000:H_1_80 // IO {RN_RW_000} +DATA LOCATION RW_000:H_0_80 // IO {RN_RW_000} DATA LOCATION SIZE_0_:G_12_70 // IO DATA LOCATION SIZE_1_:H_12_79 // IO DATA LOCATION SIZE_DMA_0_:G_2 // NOD -DATA LOCATION SIZE_DMA_1_:G_9 // NOD -DATA LOCATION SM_AMIGA_0_:G_5 // NOD -DATA LOCATION SM_AMIGA_1_:F_1 // NOD -DATA LOCATION SM_AMIGA_2_:F_6 // NOD -DATA LOCATION SM_AMIGA_3_:F_10 // NOD -DATA LOCATION SM_AMIGA_4_:B_10 // NOD -DATA LOCATION SM_AMIGA_5_:F_5 // NOD -DATA LOCATION SM_AMIGA_6_:C_2 // NOD +DATA LOCATION SIZE_DMA_1_:G_13 // NOD +DATA LOCATION SM_AMIGA_0_:F_12 // NOD +DATA LOCATION SM_AMIGA_1_:F_8 // NOD +DATA LOCATION SM_AMIGA_2_:F_5 // NOD +DATA LOCATION SM_AMIGA_3_:F_9 // NOD +DATA LOCATION SM_AMIGA_4_:F_2 // NOD +DATA LOCATION SM_AMIGA_5_:F_13 // NOD +DATA LOCATION SM_AMIGA_6_:A_8 // NOD DATA LOCATION SM_AMIGA_i_7_:F_4 // NOD DATA LOCATION UDS_000:D_8_32 // IO DATA LOCATION VMA:D_0_35 // IO {RN_VMA} DATA LOCATION VPA:*_*_36 // INP -DATA LOCATION cpu_est_0_:D_2 // NOD -DATA LOCATION cpu_est_1_:F_8 // NOD -DATA LOCATION cpu_est_2_:D_13 // NOD -DATA LOCATION cpu_est_3_:D_9 // NOD +DATA LOCATION cpu_est_0_:D_10 // NOD +DATA LOCATION cpu_est_1_:D_13 // NOD +DATA LOCATION cpu_est_2_:D_6 // NOD +DATA LOCATION cpu_est_3_:D_2 // NOD DATA LOCATION inst_AMIGA_BUS_ENABLE_DMA_HIGH:G_6 // NOD -DATA LOCATION inst_AMIGA_BUS_ENABLE_DMA_LOW:G_10 // NOD -DATA LOCATION inst_AS_000_DMA:A_12 // NOD -DATA LOCATION inst_AS_000_INT:C_15 // NOD -DATA LOCATION inst_AS_030_000_SYNC:C_6 // NOD -DATA LOCATION inst_AS_030_D0:A_6 // NOD -DATA LOCATION inst_BGACK_030_INT_D:H_13 // NOD -DATA LOCATION inst_CLK_030_H:A_5 // NOD -DATA LOCATION inst_CLK_OUT_PRE_50:E_6 // NOD -DATA LOCATION inst_CLK_OUT_PRE_D:E_8 // NOD -DATA LOCATION inst_DS_000_DMA:A_1 // NOD -DATA LOCATION inst_DS_000_ENABLE:B_6 // NOD -DATA LOCATION inst_DTACK_D0:G_7 // NOD -DATA LOCATION inst_LDS_000_INT:D_6 // NOD -DATA LOCATION inst_RESET_OUT:A_8 // NOD -DATA LOCATION inst_UDS_000_INT:D_10 // NOD -DATA LOCATION inst_VPA_D:F_2 // NOD +DATA LOCATION inst_AMIGA_BUS_ENABLE_DMA_LOW:C_3 // NOD +DATA LOCATION inst_AS_000_DMA:C_2 // NOD +DATA LOCATION inst_AS_000_INT:A_5 // NOD +DATA LOCATION inst_AS_030_000_SYNC:A_12 // NOD +DATA LOCATION inst_AS_030_D0:D_9 // NOD +DATA LOCATION inst_BGACK_030_INT_D:F_0 // NOD +DATA LOCATION inst_CLK_030_H:C_6 // NOD +DATA LOCATION inst_CLK_OUT_PRE_25:A_1 // NOD +DATA LOCATION inst_CLK_OUT_PRE_50:A_2 // NOD +DATA LOCATION inst_CLK_OUT_PRE_D:B_13 // NOD +DATA LOCATION inst_DS_000_DMA:C_13 // NOD +DATA LOCATION inst_DS_000_ENABLE:F_1 // NOD +DATA LOCATION inst_DTACK_D0:C_7 // NOD +DATA LOCATION inst_LDS_000_INT:B_6 // NOD +DATA LOCATION inst_RESET_OUT:G_9 // NOD +DATA LOCATION inst_UDS_000_INT:D_14 // NOD +DATA LOCATION inst_VPA_D:A_9 // NOD DATA LOCATION nEXP_SPACE:*_*_14 // INP DATA IO_DIR AHIGH_24_:BI DATA IO_DIR AHIGH_25_:BI @@ -190,9 +189,9 @@ DATA IO_DIR VPA:IN DATA IO_DIR nEXP_SPACE:IN DATA GLB_CLOCK CLK_OSZI DATA PW_LEVEL SIZE_1_:1 -DATA SLEW SIZE_1_:1 +DATA SLEW SIZE_1_:0 DATA PW_LEVEL AHIGH_31_:1 -DATA SLEW AHIGH_31_:1 +DATA SLEW AHIGH_31_:0 DATA PW_LEVEL A_DECODE_23_:1 DATA SLEW A_DECODE_23_:1 DATA PW_LEVEL IPL_2_:1 @@ -200,71 +199,71 @@ DATA SLEW IPL_2_:1 DATA PW_LEVEL FC_1_:1 DATA SLEW FC_1_:1 DATA PW_LEVEL AS_030:1 -DATA SLEW AS_030:1 +DATA SLEW AS_030:0 +DATA PW_LEVEL SIZE_0_:1 +DATA SLEW SIZE_0_:0 DATA PW_LEVEL AS_000:1 -DATA SLEW AS_000:1 +DATA SLEW AS_000:0 +DATA PW_LEVEL AHIGH_30_:1 +DATA SLEW AHIGH_30_:0 +DATA PW_LEVEL AHIGH_29_:1 +DATA SLEW AHIGH_29_:0 DATA PW_LEVEL DS_030:1 -DATA SLEW DS_030:1 +DATA SLEW DS_030:0 +DATA PW_LEVEL AHIGH_28_:1 +DATA SLEW AHIGH_28_:0 DATA PW_LEVEL UDS_000:1 -DATA SLEW UDS_000:1 +DATA SLEW UDS_000:0 +DATA PW_LEVEL AHIGH_27_:1 +DATA SLEW AHIGH_27_:0 DATA PW_LEVEL LDS_000:1 -DATA SLEW LDS_000:1 +DATA SLEW LDS_000:0 +DATA PW_LEVEL AHIGH_26_:1 +DATA SLEW AHIGH_26_:0 DATA SLEW nEXP_SPACE:1 +DATA PW_LEVEL AHIGH_25_:1 +DATA SLEW AHIGH_25_:0 DATA PW_LEVEL BERR:1 -DATA SLEW BERR:1 +DATA SLEW BERR:0 +DATA PW_LEVEL AHIGH_24_:1 +DATA SLEW AHIGH_24_:0 DATA PW_LEVEL BG_030:1 DATA SLEW BG_030:1 -DATA PW_LEVEL SIZE_0_:1 -DATA SLEW SIZE_0_:1 -DATA PW_LEVEL AHIGH_30_:1 -DATA SLEW AHIGH_30_:1 -DATA PW_LEVEL BGACK_000:1 -DATA SLEW BGACK_000:1 -DATA PW_LEVEL AHIGH_29_:1 -DATA SLEW AHIGH_29_:1 -DATA SLEW CLK_030:1 -DATA PW_LEVEL AHIGH_28_:1 -DATA SLEW AHIGH_28_:1 -DATA SLEW CLK_000:1 -DATA PW_LEVEL AHIGH_27_:1 -DATA SLEW AHIGH_27_:1 -DATA SLEW CLK_OSZI:1 -DATA PW_LEVEL AHIGH_26_:1 -DATA SLEW AHIGH_26_:1 -DATA PW_LEVEL CLK_DIV_OUT:1 -DATA SLEW CLK_DIV_OUT:0 -DATA PW_LEVEL AHIGH_25_:1 -DATA SLEW AHIGH_25_:1 -DATA PW_LEVEL AHIGH_24_:1 -DATA SLEW AHIGH_24_:1 -DATA PW_LEVEL FPU_CS:1 -DATA SLEW FPU_CS:0 DATA PW_LEVEL A_DECODE_22_:1 DATA SLEW A_DECODE_22_:1 -DATA PW_LEVEL FPU_SENSE:1 -DATA SLEW FPU_SENSE:1 DATA PW_LEVEL A_DECODE_21_:1 DATA SLEW A_DECODE_21_:1 DATA PW_LEVEL A_DECODE_20_:1 DATA SLEW A_DECODE_20_:1 -DATA PW_LEVEL DTACK:1 -DATA SLEW DTACK:1 +DATA PW_LEVEL BGACK_000:1 +DATA SLEW BGACK_000:1 DATA PW_LEVEL A_DECODE_19_:1 DATA SLEW A_DECODE_19_:1 -DATA PW_LEVEL AVEC:1 -DATA SLEW AVEC:1 +DATA SLEW CLK_030:1 DATA PW_LEVEL A_DECODE_18_:1 DATA SLEW A_DECODE_18_:1 -DATA PW_LEVEL E:1 -DATA SLEW E:1 +DATA SLEW CLK_000:1 DATA PW_LEVEL A_DECODE_17_:1 DATA SLEW A_DECODE_17_:1 -DATA SLEW VPA:1 +DATA SLEW CLK_OSZI:1 DATA PW_LEVEL A_DECODE_16_:1 DATA SLEW A_DECODE_16_:1 +DATA PW_LEVEL CLK_DIV_OUT:1 +DATA SLEW CLK_DIV_OUT:0 +DATA PW_LEVEL FPU_CS:1 +DATA SLEW FPU_CS:0 +DATA PW_LEVEL FPU_SENSE:1 +DATA SLEW FPU_SENSE:1 +DATA PW_LEVEL DTACK:1 +DATA SLEW DTACK:1 +DATA PW_LEVEL AVEC:1 +DATA SLEW AVEC:0 +DATA PW_LEVEL E:1 +DATA SLEW E:0 +DATA SLEW VPA:1 DATA SLEW RST:1 DATA PW_LEVEL RESET:1 -DATA SLEW RESET:1 +DATA SLEW RESET:0 DATA PW_LEVEL AMIGA_ADDR_ENABLE:1 DATA SLEW AMIGA_ADDR_ENABLE:0 DATA PW_LEVEL AMIGA_BUS_DATA_DIR:1 @@ -274,7 +273,7 @@ DATA SLEW AMIGA_BUS_ENABLE_LOW:0 DATA PW_LEVEL AMIGA_BUS_ENABLE_HIGH:1 DATA SLEW AMIGA_BUS_ENABLE_HIGH:0 DATA PW_LEVEL CIIN:1 -DATA SLEW CIIN:1 +DATA SLEW CIIN:0 DATA PW_LEVEL IPL_1_:1 DATA SLEW IPL_1_:1 DATA PW_LEVEL IPL_0_:1 @@ -284,27 +283,27 @@ DATA SLEW FC_0_:1 DATA PW_LEVEL A_1_:1 DATA SLEW A_1_:1 DATA PW_LEVEL IPL_030_2_:1 -DATA SLEW IPL_030_2_:1 +DATA SLEW IPL_030_2_:0 DATA PW_LEVEL RW_000:1 -DATA SLEW RW_000:1 +DATA SLEW RW_000:0 DATA PW_LEVEL BG_000:1 -DATA SLEW BG_000:1 +DATA SLEW BG_000:0 DATA PW_LEVEL BGACK_030:1 -DATA SLEW BGACK_030:1 +DATA SLEW BGACK_030:0 DATA PW_LEVEL CLK_EXP:1 DATA SLEW CLK_EXP:0 DATA PW_LEVEL DSACK1:1 -DATA SLEW DSACK1:1 +DATA SLEW DSACK1:0 DATA PW_LEVEL VMA:1 -DATA SLEW VMA:1 +DATA SLEW VMA:0 DATA PW_LEVEL RW:1 -DATA SLEW RW:1 +DATA SLEW RW:0 DATA PW_LEVEL A_0_:1 -DATA SLEW A_0_:1 +DATA SLEW A_0_:0 DATA PW_LEVEL IPL_030_1_:1 -DATA SLEW IPL_030_1_:1 +DATA SLEW IPL_030_1_:0 DATA PW_LEVEL IPL_030_0_:1 -DATA SLEW IPL_030_0_:1 +DATA SLEW IPL_030_0_:0 DATA PW_LEVEL cpu_est_3_:1 DATA SLEW cpu_est_3_:1 DATA PW_LEVEL cpu_est_0_:1 @@ -343,20 +342,22 @@ DATA PW_LEVEL inst_LDS_000_INT:1 DATA SLEW inst_LDS_000_INT:1 DATA PW_LEVEL inst_CLK_OUT_PRE_D:1 DATA SLEW inst_CLK_OUT_PRE_D:1 -DATA PW_LEVEL CLK_000_D_1_:1 -DATA SLEW CLK_000_D_1_:1 -DATA PW_LEVEL CLK_000_D_10_:1 -DATA SLEW CLK_000_D_10_:1 -DATA PW_LEVEL CLK_000_D_11_:1 -DATA SLEW CLK_000_D_11_:1 +DATA PW_LEVEL CLK_000_D_8_:1 +DATA SLEW CLK_000_D_8_:1 +DATA PW_LEVEL CLK_000_D_9_:1 +DATA SLEW CLK_000_D_9_:1 DATA PW_LEVEL inst_DTACK_D0:1 DATA SLEW inst_DTACK_D0:1 DATA PW_LEVEL inst_RESET_OUT:1 DATA SLEW inst_RESET_OUT:1 +DATA PW_LEVEL CLK_000_D_1_:1 +DATA SLEW CLK_000_D_1_:1 DATA PW_LEVEL CLK_000_D_0_:1 DATA SLEW CLK_000_D_0_:1 DATA PW_LEVEL inst_CLK_OUT_PRE_50:1 DATA SLEW inst_CLK_OUT_PRE_50:1 +DATA PW_LEVEL inst_CLK_OUT_PRE_25:1 +DATA SLEW inst_CLK_OUT_PRE_25:1 DATA PW_LEVEL IPL_D0_0_:1 DATA SLEW IPL_D0_0_:1 DATA PW_LEVEL IPL_D0_1_:1 @@ -375,22 +376,18 @@ DATA PW_LEVEL CLK_000_D_6_:1 DATA SLEW CLK_000_D_6_:1 DATA PW_LEVEL CLK_000_D_7_:1 DATA SLEW CLK_000_D_7_:1 -DATA PW_LEVEL CLK_000_D_8_:1 -DATA SLEW CLK_000_D_8_:1 -DATA PW_LEVEL CLK_000_D_9_:1 -DATA SLEW CLK_000_D_9_:1 -DATA PW_LEVEL CLK_000_D_12_:1 -DATA SLEW CLK_000_D_12_:1 +DATA PW_LEVEL CLK_000_D_10_:1 +DATA SLEW CLK_000_D_10_:1 DATA PW_LEVEL inst_AMIGA_BUS_ENABLE_DMA_HIGH:1 DATA SLEW inst_AMIGA_BUS_ENABLE_DMA_HIGH:1 DATA PW_LEVEL inst_DS_000_ENABLE:1 DATA SLEW inst_DS_000_ENABLE:1 DATA PW_LEVEL SM_AMIGA_6_:1 DATA SLEW SM_AMIGA_6_:1 -DATA PW_LEVEL SM_AMIGA_0_:1 -DATA SLEW SM_AMIGA_0_:1 DATA PW_LEVEL SM_AMIGA_4_:1 DATA SLEW SM_AMIGA_4_:1 +DATA PW_LEVEL SM_AMIGA_0_:1 +DATA SLEW SM_AMIGA_0_:1 DATA PW_LEVEL RST_DLY_0_:1 DATA SLEW RST_DLY_0_:1 DATA PW_LEVEL RST_DLY_1_:1 diff --git a/Logic/68030_tk.grp b/Logic/68030_tk.grp index 59a789d..67a6186 100644 --- a/Logic/68030_tk.grp +++ b/Logic/68030_tk.grp @@ -1,23 +1,22 @@ -GROUP MACH_SEG_A inst_DS_000_DMA inst_CLK_030_H inst_AS_000_DMA inst_RESET_OUT - CYCLE_DMA_1_ CYCLE_DMA_0_ inst_AS_030_D0 IPL_D0_2_ CLK_000_D_7_ CLK_000_D_9_ - DS_030 AVEC +GROUP MACH_SEG_A DS_030 AVEC inst_AS_030_000_SYNC SM_AMIGA_6_ inst_AS_000_INT + inst_CLK_OUT_PRE_25 inst_VPA_D IPL_D0_0_ inst_CLK_OUT_PRE_50 GROUP MACH_SEG_B IPL_030_1_ RN_IPL_030_1_ IPL_030_0_ RN_IPL_030_0_ IPL_030_2_ - RN_IPL_030_2_ CLK_EXP inst_DS_000_ENABLE SM_AMIGA_4_ IPL_D0_0_ IPL_D0_1_ - AHIGH_31_ AHIGH_30_ AHIGH_29_ RESET -GROUP MACH_SEG_C inst_AS_030_000_SYNC SM_AMIGA_6_ inst_AS_000_INT CLK_000_D_10_ - CLK_000_D_0_ CLK_000_D_4_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ - AHIGH_24_ AMIGA_BUS_ENABLE_LOW -GROUP MACH_SEG_D VMA RN_VMA BG_000 RN_BG_000 inst_LDS_000_INT cpu_est_3_ - cpu_est_2_ inst_UDS_000_INT cpu_est_0_ CLK_000_D_6_ LDS_000 UDS_000 - AMIGA_BUS_ENABLE_HIGH AMIGA_ADDR_ENABLE -GROUP MACH_SEG_E CLK_000_D_5_ inst_CLK_OUT_PRE_D inst_CLK_OUT_PRE_50 CLK_000_D_3_ - CLK_000_D_2_ CIIN BERR AMIGA_BUS_DATA_DIR AS_000 CIIN_0 -GROUP MACH_SEG_F SM_AMIGA_i_7_ SM_AMIGA_2_ SM_AMIGA_3_ RST_DLY_0_ RST_DLY_1_ - RST_DLY_2_ SM_AMIGA_1_ SM_AMIGA_5_ cpu_est_1_ inst_VPA_D -GROUP MACH_SEG_G A_0_ RN_A_0_ RW RN_RW CLK_DIV_OUT SIZE_DMA_0_ SIZE_DMA_1_ - SM_AMIGA_0_ inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AMIGA_BUS_ENABLE_DMA_HIGH - inst_DTACK_D0 CLK_000_D_8_ CLK_000_D_12_ SIZE_0_ E -GROUP MACH_SEG_H DSACK1 RN_DSACK1 RW_000 RN_RW_000 BGACK_030 RN_BGACK_030 - inst_BGACK_030_INT_D CLK_000_D_11_ CLK_000_D_1_ FPU_CS AS_030 SIZE_1_ - \ No newline at end of file + RN_IPL_030_2_ AHIGH_31_ AHIGH_30_ AHIGH_29_ CLK_EXP RESET inst_LDS_000_INT + IPL_D0_1_ CLK_000_D_5_ CLK_000_D_6_ inst_CLK_OUT_PRE_D +GROUP MACH_SEG_C AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AMIGA_BUS_ENABLE_LOW + inst_DS_000_DMA inst_CLK_030_H inst_AS_000_DMA CYCLE_DMA_1_ CYCLE_DMA_0_ + inst_AMIGA_BUS_ENABLE_DMA_LOW inst_DTACK_D0 +GROUP MACH_SEG_D VMA RN_VMA BG_000 RN_BG_000 LDS_000 UDS_000 AMIGA_BUS_ENABLE_HIGH + AMIGA_ADDR_ENABLE cpu_est_3_ cpu_est_1_ cpu_est_2_ inst_UDS_000_INT + cpu_est_0_ inst_AS_030_D0 CLK_000_D_4_ +GROUP MACH_SEG_E CIIN BERR AMIGA_BUS_DATA_DIR AS_000 CIIN_0 CLK_000_D_8_ + CLK_000_D_0_ CLK_000_D_3_ CLK_000_D_7_ +GROUP MACH_SEG_F SM_AMIGA_i_7_ SM_AMIGA_2_ SM_AMIGA_3_ inst_DS_000_ENABLE + SM_AMIGA_4_ SM_AMIGA_0_ SM_AMIGA_1_ SM_AMIGA_5_ inst_BGACK_030_INT_D + CLK_000_D_10_ +GROUP MACH_SEG_G A_0_ RN_A_0_ RW RN_RW SIZE_0_ E CLK_DIV_OUT inst_RESET_OUT + SIZE_DMA_0_ SIZE_DMA_1_ RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_AMIGA_BUS_ENABLE_DMA_HIGH + IPL_D0_2_ +GROUP MACH_SEG_H DSACK1 RN_DSACK1 RW_000 RN_RW_000 FPU_CS BGACK_030 RN_BGACK_030 + AS_030 SIZE_1_ CLK_000_D_9_ CLK_000_D_2_ CLK_000_D_1_ \ No newline at end of file diff --git a/Logic/68030_tk.ipr b/Logic/68030_tk.ipr index 97b6f35..3d8892a 100644 --- a/Logic/68030_tk.ipr +++ b/Logic/68030_tk.ipr @@ -1 +1 @@ -56;:107Kjg9j \ No newline at end of file +97::254)ch7m\r \ No newline at end of file diff --git a/Logic/68030_tk.jed b/Logic/68030_tk.jed index 644f175..36d9e4a 100644 --- a/Logic/68030_tk.jed +++ b/Logic/68030_tk.jed @@ -10,7 +10,7 @@ AUTHOR: PATTERN: COMPANY: REVISION: -DATE: Fri Aug 19 00:39:40 2016 +DATE: Wed Aug 24 22:17:53 2016 ABEL mach447a * @@ -22,7 +22,7 @@ NOTE Handling of Preplacements No Change * NOTE Use placement data from 68030_tk.vct * NOTE Global clocks routable as PT clocks? N * NOTE 22V10/MACH1XX/2XX S/R Compatibility? Y * -NOTE SET/RESET treated as DONT_CARE? N * +NOTE SET/RESET treated as DONT_CARE? Y * NOTE Reduce Unforced Global Clocks? N * NOTE Iterate between partitioning and place/route? Y * NOTE Balanced partitioning? Y * @@ -32,77 +32,77 @@ NOTE Run Time Upper Bound in 15 minutes 0 * NOTE Zero Hold Time For Input Registers? Y * NOTE Table of pin names and numbers* NOTE PINS SIZE_1_:79 AHIGH_31_:4 A_DECODE_23_:85 IPL_2_:68* -NOTE PINS FC_1_:58 AS_030:82 AS_000:42 DS_030:98 UDS_000:32* -NOTE PINS LDS_000:31 nEXP_SPACE:14 BERR:41 BG_030:21 SIZE_0_:70* -NOTE PINS AHIGH_30_:5 BGACK_000:28 AHIGH_29_:6 CLK_030:64* -NOTE PINS AHIGH_28_:15 CLK_000:11 AHIGH_27_:16 CLK_OSZI:61* -NOTE PINS AHIGH_26_:17 CLK_DIV_OUT:65 AHIGH_25_:18 AHIGH_24_:19* -NOTE PINS FPU_CS:78 A_DECODE_22_:84 FPU_SENSE:91 A_DECODE_21_:94* -NOTE PINS A_DECODE_20_:93 DTACK:30 A_DECODE_19_:97 AVEC:92* -NOTE PINS A_DECODE_18_:95 E:66 A_DECODE_17_:59 VPA:36 A_DECODE_16_:96* -NOTE PINS RST:86 RESET:3 AMIGA_ADDR_ENABLE:33 AMIGA_BUS_DATA_DIR:48* +NOTE PINS FC_1_:58 AS_030:82 SIZE_0_:70 AS_000:42 AHIGH_30_:5* +NOTE PINS AHIGH_29_:6 DS_030:98 AHIGH_28_:15 UDS_000:32 AHIGH_27_:16* +NOTE PINS LDS_000:31 AHIGH_26_:17 nEXP_SPACE:14 AHIGH_25_:18* +NOTE PINS BERR:41 AHIGH_24_:19 BG_030:21 A_DECODE_22_:84* +NOTE PINS A_DECODE_21_:94 A_DECODE_20_:93 BGACK_000:28 A_DECODE_19_:97* +NOTE PINS CLK_030:64 A_DECODE_18_:95 CLK_000:11 A_DECODE_17_:59* +NOTE PINS CLK_OSZI:61 A_DECODE_16_:96 CLK_DIV_OUT:65 FPU_CS:78* +NOTE PINS FPU_SENSE:91 DTACK:30 AVEC:92 E:66 VPA:36 RST:86* +NOTE PINS RESET:3 AMIGA_ADDR_ENABLE:33 AMIGA_BUS_DATA_DIR:48* NOTE PINS AMIGA_BUS_ENABLE_LOW:20 AMIGA_BUS_ENABLE_HIGH:34* NOTE PINS CIIN:47 IPL_1_:56 IPL_0_:67 FC_0_:57 A_1_:60 IPL_030_2_:9* NOTE PINS RW_000:80 BG_000:29 BGACK_030:83 CLK_EXP:10 DSACK1:81* NOTE PINS VMA:35 RW:71 A_0_:69 IPL_030_1_:7 IPL_030_0_:8* NOTE Table of node names and numbers* NOTE NODES RN_SIZE_1_:287 RN_AHIGH_31_:143 RN_AS_030:281 * -NOTE NODES RN_AS_000:203 RN_UDS_000:185 RN_LDS_000:191 RN_BERR:197 * -NOTE NODES RN_SIZE_0_:263 RN_AHIGH_30_:125 RN_AHIGH_29_:145 * -NOTE NODES RN_AHIGH_28_:149 RN_AHIGH_27_:163 RN_AHIGH_26_:157 * -NOTE NODES RN_AHIGH_25_:167 RN_AHIGH_24_:161 RN_IPL_030_2_:131 * -NOTE NODES RN_RW_000:271 RN_BG_000:175 RN_BGACK_030:275 * -NOTE NODES RN_DSACK1:283 RN_VMA:173 RN_RW:245 RN_A_0_:257 * -NOTE NODES RN_IPL_030_1_:139 RN_IPL_030_0_:133 cpu_est_3_:187 * -NOTE NODES cpu_est_0_:176 cpu_est_1_:233 cpu_est_2_:193 * -NOTE NODES inst_AS_000_INT:172 inst_AMIGA_BUS_ENABLE_DMA_LOW:260 * -NOTE NODES inst_AS_030_D0:110 inst_AS_030_000_SYNC:158 inst_BGACK_030_INT_D:289 * -NOTE NODES inst_AS_000_DMA:119 inst_DS_000_DMA:103 CYCLE_DMA_0_:121 * -NOTE NODES CYCLE_DMA_1_:115 SIZE_DMA_0_:248 SIZE_DMA_1_:259 * -NOTE NODES inst_VPA_D:224 inst_UDS_000_INT:188 inst_LDS_000_INT:182 * -NOTE NODES inst_CLK_OUT_PRE_D:209 CLK_000_D_1_:274 CLK_000_D_10_:170 * -NOTE NODES CLK_000_D_11_:269 inst_DTACK_D0:256 inst_RESET_OUT:113 * -NOTE NODES CLK_000_D_0_:169 inst_CLK_OUT_PRE_50:206 IPL_D0_0_:130 * -NOTE NODES IPL_D0_1_:146 IPL_D0_2_:106 CLK_000_D_2_:200 * -NOTE NODES CLK_000_D_3_:211 CLK_000_D_4_:166 CLK_000_D_5_:205 * -NOTE NODES CLK_000_D_6_:194 CLK_000_D_7_:122 CLK_000_D_8_:250 * -NOTE NODES CLK_000_D_9_:116 CLK_000_D_12_:266 inst_AMIGA_BUS_ENABLE_DMA_HIGH:254 * -NOTE NODES inst_DS_000_ENABLE:134 SM_AMIGA_6_:152 SM_AMIGA_0_:253 * -NOTE NODES SM_AMIGA_4_:140 RST_DLY_0_:221 RST_DLY_1_:241 * -NOTE NODES RST_DLY_2_:235 inst_CLK_030_H:109 SM_AMIGA_1_:223 * -NOTE NODES SM_AMIGA_5_:229 SM_AMIGA_3_:236 SM_AMIGA_2_:230 * -NOTE NODES SM_AMIGA_i_7_:227 CIIN_0:212 * +NOTE NODES RN_SIZE_0_:263 RN_AS_000:203 RN_AHIGH_30_:125 * +NOTE NODES RN_AHIGH_29_:137 RN_AHIGH_28_:149 RN_UDS_000:185 * +NOTE NODES RN_AHIGH_27_:163 RN_LDS_000:191 RN_AHIGH_26_:157 * +NOTE NODES RN_AHIGH_25_:167 RN_BERR:197 RN_AHIGH_24_:161 * +NOTE NODES RN_IPL_030_2_:131 RN_RW_000:269 RN_BG_000:175 * +NOTE NODES RN_BGACK_030:275 RN_DSACK1:283 RN_VMA:173 RN_RW:245 * +NOTE NODES RN_A_0_:257 RN_IPL_030_1_:139 RN_IPL_030_0_:133 * +NOTE NODES cpu_est_3_:176 cpu_est_0_:188 cpu_est_1_:193 * +NOTE NODES cpu_est_2_:182 inst_AS_000_INT:109 inst_AMIGA_BUS_ENABLE_DMA_LOW:154 * +NOTE NODES inst_AS_030_D0:187 inst_AS_030_000_SYNC:119 inst_BGACK_030_INT_D:221 * +NOTE NODES inst_AS_000_DMA:152 inst_DS_000_DMA:169 CYCLE_DMA_0_:170 * +NOTE NODES CYCLE_DMA_1_:164 SIZE_DMA_0_:248 SIZE_DMA_1_:265 * +NOTE NODES inst_VPA_D:115 inst_UDS_000_INT:194 inst_LDS_000_INT:134 * +NOTE NODES inst_CLK_OUT_PRE_D:145 CLK_000_D_8_:206 CLK_000_D_9_:289 * +NOTE NODES inst_DTACK_D0:160 inst_RESET_OUT:259 CLK_000_D_1_:277 * +NOTE NODES CLK_000_D_0_:209 inst_CLK_OUT_PRE_50:104 inst_CLK_OUT_PRE_25:103 * +NOTE NODES IPL_D0_0_:121 IPL_D0_1_:130 IPL_D0_2_:256 CLK_000_D_2_:278 * +NOTE NODES CLK_000_D_3_:200 CLK_000_D_4_:178 CLK_000_D_5_:146 * +NOTE NODES CLK_000_D_6_:140 CLK_000_D_7_:217 CLK_000_D_10_:230 * +NOTE NODES inst_AMIGA_BUS_ENABLE_DMA_HIGH:254 inst_DS_000_ENABLE:223 * +NOTE NODES SM_AMIGA_6_:113 SM_AMIGA_4_:224 SM_AMIGA_0_:239 * +NOTE NODES RST_DLY_0_:260 RST_DLY_1_:250 RST_DLY_2_:266 * +NOTE NODES inst_CLK_030_H:158 SM_AMIGA_1_:233 SM_AMIGA_5_:241 * +NOTE NODES SM_AMIGA_3_:235 SM_AMIGA_2_:229 SM_AMIGA_i_7_:227 * +NOTE NODES CIIN_0:211 * NOTE BLOCK 0 * L000000 - 111111111011101111111101111111111111111111111111111111111111111111 - 111011111101111111111111111111111111111111111111111111111111111111 - 111111111111111111111111111111111111111111111011111111111111111111 - 111111111111111111111111111111111111111111111111101111111111111111 - 111111111111111111111111111111111101111111111111111111111111111011 - 111111111111111111111111111111011111111111111111110111111111111111 - 111101011111111111111111111111111111111111101111111111011111111111 - 111111111111111101111011111111111111011010111111111111111111111111 - 101111111111111111011111111111111011111111111111111111111111111111* + 111111111111111111111111111111111111111111111111111111111111011111 + 111111111101111111111111111111111111111111111111111111101111111111 + 111111111111101111111111111111111111111111111111111111111111111111 + 101011111111111110111111111110111111111111111111111111111111111111 + 111111111111111111111111111111111111111111111111111011111111111111 + 111111111111111111111111011111011111111111111111111111111111111111 + 111111010111110111111101111111111011111111111111111111111111111111 + 111101111111111111111111111011111111111110111111111111111111111111 + 111111111111111111010111111111111110111111100111111110111111111111* L000594 000000000000000000000000000000000000000000000000000000000000000000* -L000660 111111111111111111101111111111111011111111111111111111111111111111* +L000660 111111111111111111111111111111111111111111111111111110111111101111* L000726 000000000000000000000000000000000000000000000000000000000000000000* L000792 000000000000000000000000000000000000000000000000000000000000000000* L000858 000000000000000000000000000000000000000000000000000000000000000000* L000924 000000000000000000000000000000000000000000000000000000000000000000* -L000990 101111111111111111111111111111111111111111111111111111111111111111* -L001056 111111111111111111111111111111111111111101111111111111111111111111* -L001122 111101111111111111111111111111111111111111111111110111111111111111* -L001188 111110111111111111111111111111111111111111111111111011111111111111* -L001254 111111111111111111111111111111110111111111111111111111111111111111* +L000990 111111111111111111011111111111111111111111111011111111111111111111* +L001056 111111111111111111101111111111111111111111110111111111111111111111* +L001122 000000000000000000000000000000000000000000000000000000000000000000* +L001188 000000000000000000000000000000000000000000000000000000000000000000* +L001254 000000000000000000000000000000000000000000000000000000000000000000* L001320 111111111111111111111111111111111111111111111111111111111111111111* -L001386 111111111111111101111111111111111111111111111111111111011111111111* -L001452 111111111011111111011111111111111111111111101111111111111111111111* -L001518 111111110111111111111111111111011111011111101111111111111111111111* -L001584 111111111111111111011111111111111111101111101111111111111111111111* -L001650 000000000000000000000000000000000000000000000000000000000000000000* -L001716 011111111111111111111111111111111111111111111011111111111111111111* +L001386 111111111111111111111111111111111111111111111011111111111111111111* +L001452 111111111111111111111111111111111111111111111111111111111111111111* +L001518 111111111111111111111111111111111111111111111111111111111111111111* +L001584 111111111111111111111111111111111111111111111111111111111111111111* +L001650 111111111111111111111111111111111111111111111111111111111111111111* +L001716 111111111111111111111111111111111111111111111111111111111111111111* L001782 111111111111111111111111111111111111111111111111111111111111111111* L001848 111111111111111111111111111111111111111111111111111111111111111111* L001914 111111111111111111111111111111111111111111111111111111111111111111* @@ -114,18 +114,18 @@ L002178 111111111111111111111111111111111111111111111111111111111111111111* L002244 111111111111111111111111111111111111111111111111111111111111111111* L002310 111111111111111111111111111111111111111111111111111111111111111111* L002376 111111111111111111111111111111111111111111111111111111111111111111* -L002442 011101111011111110111111111111101011111110111111111011111111111111* -L002508 011110111011111110111111111111101011111110111111110111111111111111* -L002574 011101111111111110111111111111111011011110111111111011111111111111* -L002640 011110111111111110111111111111111011011110111111110111111111111111* -L002706 011101111011111111111111111111101011111110111111111011101111111111* +L002442 111111011111111111111111111011110111111111011111111111111111111111* +L002508 111110111111111011111111111111111101111111011111111111111111111111* +L002574 000000000000000000000000000000000000000000000000000000000000000000* +L002640 000000000000000000000000000000000000000000000000000000000000000000* +L002706 000000000000000000000000000000000000000000000000000000000000000000* L002772 000000000000000000000000000000000000000000000000000000000000000000* -L002838 011111111111111111111111111111111111111011111111111111111111111111* -L002904 011110111011111111111111111111101011111110111111110111101111111111* -L002970 011101111111111111111111111111111011011110111111111011101111111111* -L003036 011110111111111111111111111111111011011110111111110111101111111111* -L003102 000000000000000000000000000000000000000000000000000000000000000000* +L002838 111111111111111111111111111111111111111111111111111111111111111111* +L002904 111111111111111111111111111111111111111111111111111111111111111111* +L002970 111111111111111111111111111111111111111111111111111111111111111111* +L003036 111111111111111111111111111111111111111111111111111111111111111111* +L003102 111111111111111111111111111111111111111111111111111111111111111111* L003168 111111111111111111111111111111111111111111111111111111111111111111* L003234 111111111111111111111111111111111111111111111111111111111111111111* L003300 111111111111111111111111111111111111111111111111111111111111111111* @@ -133,19 +133,19 @@ L003366 111111111111111111111111111111111111111111111111111111111111111111* L003432 111111111111111111111111111111111111111111111111111111111111111111* L003498 000000000000000000000000000000000000000000000000000000000000000000* -L003564 011111011111111111111111111111111111111111111111111111111111111111* -L003630 010111111111011111110110111111111111111111111111111111111111110111* -L003696 000000000000000000000000000000000000000000000000000000000000000000* +L003564 111111111101111111111111110110101011111111011111111111111111111111* +L003630 111111011111111111111111110101111101111111011111111111111111111111* +L003696 111111011111111111111111111101111001111111011111111111111111111111* L003762 000000000000000000000000000000000000000000000000000000000000000000* L003828 000000000000000000000000000000000000000000000000000000000000000000* -L003894 011101111111111111111111111111111011111110111111111011111111111111* -L003960 011101111111111111110111111111111011111110111111111111111111111111* -L004026 011110111111111111111001111111111011111110111111110111111111111111* -L004092 011101111111111111111110111111111011111110111111111111111111111111* -L004158 000000000000000000000000000000000000000000000000000000000000000000* +L003894 111111111111111111111011111111111111111111011111111111111111111111* +L003960 111111111111111111111111111111111111111111111111111111111111111111* +L004026 111111111111111111111111111111111111111111111111111111111111111111* +L004092 111111111111111111111111111111111111111111111111111111111111111111* +L004158 111111111111111111111111111111111111111111111111111111111111111111* L004224 000000000000000000000000000000000000000000000000000000000000000000* -L004290 111111111111111111111111111111111111111111111111011111111111111111* +L004290 111111111111111111111111111111111111111111111111111111111111111111* L004356 111111111111111111111111111111111111111111111111111111111111111111* L004422 111111111111111111111111111111111111111111111111111111111111111111* L004488 111111111111111111111111111111111111111111111111111111111111111111* @@ -157,23 +157,23 @@ L004818 111111111111111111111111111111111111111111111111111111111111111111* L004884 111111111111111111111111111111111111111111111111111111111111111111* L004950 000000000000000000000000000000000000000000000000000000000000000000* -L005016 101111111111111111111111111111111111111111111111111111111111111111* -L005082 111111111111111111111111111111111111111101111111111111111111111111* -L005148 111111111011111111111111111111011111111111111111111111111111111111* -L005214 111101111111111111111111111111111111111111111111110111111111111111* -L005280 111110111111111111111111111111111111111111111111111011111111111111* -L005346 011111111111111111110111111111111011111110111111110111111111111111* -L005412 011111111111111111111001111111111011111110111111111011111111111111* -L005478 011111111111111111111110111111111011111110111111110111111111111111* +L005016 111111111111111011111111111111101101111111011111111111111111111111* +L005082 111011111101111011111111111110111101111101011111110111111111111111* +L005148 111111111101111011111111011110111101111101011111110111111111111111* +L005214 111111110101111011111111111110111101111101011111110111111111111111* +L005280 111111111101111010111111111110111101111101011111110111111111111111* +L005346 101111111111111111111111111111111111111111011111111111111111111111* +L005412 111111111101111011111101111110111101111101011111110111111111111111* +L005478 111111111101101011111111111110111101111101011111110111111111111111* L005544 000000000000000000000000000000000000000000000000000000000000000000* L005610 000000000000000000000000000000000000000000000000000000000000000000* L005676 - 111111011110111111111111111111111111111110111111111111111111111111* -L005742 111111111111111111111111111111111101111111111111111111111111111111* -L005808 111111111111111111111111111111110111111111111111111111111111111111* -L005874 111111111111111101111111111111111111111111111111111111011111111111* -L005940 000000000000000000000000000000000000000000000000000000000000000000* -L006006 000000000000000000000000000000000000000000000000000000000000000000* + 111111111110111111111111111111111111111110111111111111011111111111* +L005742 111111111111111111111111111111111111111111111111111111111111111111* +L005808 111111111111111111111111111111111111111111111111111111111111111111* +L005874 111111111111111111111111111111111111111111111111111111111111111111* +L005940 111111111111111111111111111111111111111111111111111111111111111111* +L006006 111111111111111111111111111111111111111111111111111111111111111111* L006072 111111111111111111111111111111111111111111111111111111111111111111* L006138 111111111111111111111111111111111111111111111111111111111111111111* L006204 111111111111111111111111111111111111111111111111111111111111111111* @@ -185,31 +185,31 @@ L006402 L006534 0010* L006538 01100011111000* L006552 10100110011011* -L006566 11110011110101* -L006580 01110110011111* -L006594 00000011111000* -L006608 10100110010011* -L006622 01110110010001* -L006636 11101011110011* +L006566 00010110010101* +L006580 11101011111111* +L006594 00110011111000* +L006608 11100110010010* +L006622 11010011110001* +L006636 11111111110011* L006650 10100110010000* -L006664 10100110010011* -L006678 00010110010001* -L006692 11100011110011* -L006706 10100110010000* -L006720 10100110010010* -L006734 00000110010101* -L006748 11101011111111* +L006664 01000110010011* +L006678 11011011110001* +L006692 11111111110011* +L006706 11100110010000* +L006720 01110110010011* +L006734 11010011110100* +L006748 11111011111110* NOTE BLOCK 1 * L006762 - 111111111111111111111101111111111111111101111111111111111111111111 - 111111111101011110111111011111111111111111111111111111111111111111 - 111101101011111111101111111111111111111111111111111111110111111111 - 111111111111111111111111110110111011111111111011111111011111111101 + 111111111111111111110111111111111111111101111111111111111111111111 + 111111111111111111111111101110010111111111111111111111111111111111 + 111101111011111110111111111111111111101111111111111111110111111011 + 101111111101111111111111111111111111111111111111111111011111111111 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111111111111111011111011111111111111111111111101111 - 101111111111111111111011111111111111111111111111110111111111111111 - 111011111111111111111111111111111111111111101111111111111111111111* + 111111111111101111111111111111111111111111111111110111111111111111 + 111111011111111111111111111111111111111111111111111111111111111111 + 111111111111111111111111110111111111111111111110111111111111111111 + 111111111111111111011111111111111111111111101111111111111111111111* L007356 111111111111111111111111111111111111111111111111111111111111111111* L007422 000000000000000000000000000000000000000000000000000000000000000000* @@ -217,7 +217,7 @@ L007488 000000000000000000000000000000000000000000000000000000000000000000* L007554 000000000000000000000000000000000000000000000000000000000000000000* L007620 000000000000000000000000000000000000000000000000000000000000000000* L007686 000000000000000000000000000000000000000000000000000000000000000000* -L007752 111111111111111111111111111111111111111111111111111111111111011111* +L007752 111111111111111111110111111111111111111111111111111111111111111111* L007818 000000000000000000000000000000000000000000000000000000000000000000* L007884 000000000000000000000000000000000000000000000000000000000000000000* L007950 000000000000000000000000000000000000000000000000000000000000000000* @@ -229,74 +229,74 @@ L008214 000000000000000000000000000000000000000000000000000000000000000000* L008280 000000000000000000000000000000000000000000000000000000000000000000* L008346 000000000000000000000000000000000000000000000000000000000000000000* L008412 000000000000000000000000000000000000000000000000000000000000000000* -L008478 111111111111111111111111111111111011111111011111111111111111111111* +L008478 111111111111111111111111111111111111111111011111111111111111111011* L008544 000000000000000000000000000000000000000000000000000000000000000000* L008610 000000000000000000000000000000000000000000000000000000000000000000* L008676 000000000000000000000000000000000000000000000000000000000000000000* L008742 000000000000000000000000000000000000000000000000000000000000000000* L008808 111111111111111111111111111111111111111111111111111111111111111111* -L008874 111111011011111111111111110111110111111101011111111011111111111111* -L008940 111111011011111111111111111011111011111101011111111011111111111111* -L009006 111111101011111111111111110111110111111110011111111011111111111111* -L009072 111111101011111111111111111011111011111110011111111011111111111111* +L008874 011111111001111110111111111111111111111111011111110111111111110111* +L008940 101111111001111110111111111111111111111111011111111011111111110111* +L009006 011111111010111110111111111111111111111111011111110111111111111011* +L009072 101111111010111110111111111111111111111111011111111011111111111011* L009138 111111111011111111111111111111111111111111011111111111101111111111* -L009204 111111111111111111111111110111111011111111011111111111101111111111* -L009270 111111111111111111111111111011110111111111011111111111101111111111* -L009336 111111101111111111111111111111111111111101011111111111101111111111* -L009402 111111011111111111111111111111111111111110011111111111101111111111* -L009468 111111111111111111111111111111111111111111011111111011101111111111* +L009204 101111111111111111111111111111111111111111011111110111101111111111* +L009270 011111111111111111111111111111111111111111011111111011101111111111* +L009336 111111111101111111111111111111111111111111011111111111101111111011* +L009402 111111111110111111111111111111111111111111011111111111101111110111* +L009468 111111111111111110111111111111111111111111011111111111101111111111* L009534 111111111111111111111111111111111111111111111111111111111111111111* -L009600 111111011011111111111111111011111011111101011111111011111111111111* -L009666 111111101011111111111111111011111011111110011111111011111111111111* -L009732 111111100111111111111111111011111011111110011111110111111111111111* -L009798 111111010111111111111111111011111011111101011111110111111111111111* -L009864 111111111111111111111111111111111011111111011111111111111011111111* -L009930 111111111111111111111111111011111111111111011111111111111011111111* -L009996 111111101111111111111111111111111111111101011111111111111011111111* -L010062 111111011111111111111111111111111111111110011111111111111011111111* -L010128 111111111011111111111111111111111111111111011111110111111011111111* -L010194 111111110111111111111111111111111111111111011111111011111011111111* +L009600 101111111001111110111111111111111111111111011111111011111111110111* +L009666 101111111010111110111111111111111111111111011111111011111111111011* +L009732 101111110110111101111111111111111111111111011111111011111111111011* +L009798 101111110101111101111111111111111111111111011111111011111111110111* +L009864 101111111111111111111111111111111111111111011111111111111011111111* +L009930 111111111111111111111111111111111111111111011111111011111011111111* +L009996 111111111101111111111111111111111111111111011111111111111011111011* +L010062 111111111110111111111111111111111111111111011111111111111011110111* +L010128 111111111011111101111111111111111111111111011111111111111011111111* +L010194 111111110111111110111111111111111111111111011111111111111011111111* L010260 - 101111111110111111111111111111111111011111111111111111111111111111* -L010326 111111111111111111101001111101111111111111011011111111111111111110* -L010392 111111111111111111101111101101111111111111011011111111111111111110* -L010458 110101111111111111111111111111101111111111011111111111111111111111* -L010524 111111111111111101101001111101111111111111011011111111111111111111* + 111111111111111111111111011111101111111111111110111111111111111111* +L010326 000000000000000000000000000000000000000000000000000000000000000000* +L010392 111111111111111111111111111111111111111111101111111111111111111111* +L010458 111101101111111111111111111111111111111111111111111111111111111111* +L010524 111111011111101111111111111101111111101111111111111111111111111111* L010590 000000000000000000000000000000000000000000000000000000000000000000* -L010656 111111101011111111111111110111110111111110011111111011111111111111* -L010722 111111101011111111111111111011111011111110011111111011111111111111* -L010788 111111100111111111111111110111110111111110011111110111111111111111* -L010854 111111100111111111111111111011111011111110011111110111111111111111* -L010920 111111101111101111111111111111111111111111011111111111111111111111* +L010656 011111111010111110111111111111111111111111011111110111111111111011* +L010722 101111111010111110111111111111111111111111011111111011111111111011* +L010788 011111110110111101111111111111111111111111011111110111111111111011* +L010854 101111110110111101111111111111111111111111011111111011111111111011* +L010920 111111111111111111111111111111111011111111011111111111111111111011* L010986 - 101111111110111111111111111111111111011111111111111111111111111111* -L011052 111111111111101111111111110111111011111111011111111111111111111111* -L011118 111111111111101111111111111011110111111111011111111111111111111111* -L011184 111111111111101111111111111111111111111110011111111111111111111111* -L011250 111111111011101111111111111111111111111111011111110111111111111111* -L011316 111111110111101111111111111111111111111111011111111011111111111111* -L011382 111111111111111111111111111111111111111111111111111111111111111111* -L011448 111111111111111111111111111111111111111111111111111111111111111111* -L011514 111111111111111111111111111111111111111111111111111111111111111111* -L011580 111111111111111111111111111111111111111111111111111111111111111111* -L011646 111111111111111111111111111111111111111111111111111111111111111111* + 111111111111111111111111011111101111111111111110111111111111111111* +L011052 111111111111111111111111111111111111111101111111111111111111111111* +L011118 101111111111111111111111111111111011111111011111110111111111111111* +L011184 011111111111111111111111111111111011111111011111111011111111111111* +L011250 111111111110111111111111111111111011111111011111111111111111111111* +L011316 111111111011111101111111111111111011111111011111111111111111111111* +L011382 111111110111111110111111111111111011111111011111111111111111111111* +L011448 000000000000000000000000000000000000000000000000000000000000000000* +L011514 000000000000000000000000000000000000000000000000000000000000000000* +L011580 000000000000000000000000000000000000000000000000000000000000000000* +L011646 000000000000000000000000000000000000000000000000000000000000000000* L011712 - 101111111110111111111111111111111111011111111111111111111111111111* + 111111111111111111111111011111101111111111111110111111111111111111* L011778 000000000000000000000000000000000000000000000000000000000000000000* -L011844 111111111111111111010110111111111111111111011111111111111111111111* -L011910 110111111111111111110111011111111111111111011111111111111111111111* -L011976 110111111111111111111110011111111111111111011111111111111111111111* -L012042 000000000000000000000000000000000000000000000000000000000000000000* -L012108 000000000000000000000000000000000000000000000000000000000000000000* +L011844 111111111111111111111111111111111111111111111111111111111111111111* +L011910 111111111111111111111111111111111111111111111111111111111111111111* +L011976 111111111111111111111111111111111111111111111111111111111111111111* +L012042 111111111111111111111111111111111111111111111111111111111111111111* +L012108 111111111111111111011111111111111111111111111111111111111111111111* L012174 111111111111111111111111111111111111111111111111111111111111111111* L012240 111111111111111111111111111111111111111111111111111111111111111111* L012306 111111111111111111111111111111111111111111111111111111111111111111* L012372 111111111111111111111111111111111111111111111111111111111111111111* L012438 - 111111111111111111111111111111111111101111111111111111111111111111* -L012504 111111101111111111111111111111111111111111011111111111111111111111* + 111111111111111111111111101111111111111111111111111111111111111111* +L012504 111111111111111111111111110111111111111111111111111111111111111111* L012570 111111111111111111111111111111111111111111111111111111111111111111* L012636 111111111111111111111111111111111111111111111111111111111111111111* L012702 111111111111111111111111111111111111111111111111111111111111111111* @@ -318,51 +318,51 @@ L013356 11100110011000* L013370 11110110011111* L013384 10110110011101* L013398 11000011111111* -L013412 11001111111010* +L013412 00001111110000* L013426 11100110010010* -L013440 10110110010110* -L013454 11100011110011* -L013468 00001011110001* -L013482 00001111110011* -L013496 01010110010010* -L013510 11100011111111* +L013440 00110110010110* +L013454 11000011110011* +L013468 00111011110001* +L013482 00000110010011* +L013496 00010110010010* +L013510 11101111111111* NOTE BLOCK 2 * L013524 - 111111111111111111111111111101110111111111111111111111111111011111 - 111111111101111111111111111111111111111111111011111111111111111111 - 111111111111101111011111111111111111111111111111111111111111111111 - 111011111111111111111111111011111111111111111111111111111110111101 + 111111111011110111111101111111111111111111111111111111111111111111 + 111111111101111111111011111111111111011111111111111111111111111111 + 111111111111111111011111111111111111111111111111111111111111111111 + 111101111111111111111111011111111111111111111111111111111111111111 + 111111101111111111111111111111111111111111111111111011111111111111 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111001111111011111111111111111111111111111111111111111 - 111110110111111111111101111111011111011111111111111111111111111111 - 111111111111111111111011111111111111111110111111111111111111111111 - 101111101111111111111111111111111110111111111111111111111111111111* + 111111111111101111111111111101111011111111111111011111111111111111 + 111111111111111101111111111011111111111110111111111111111111111111 + 101111111111111111111111111111111111111111111111111110111111111111* L014118 - 111111111110111111111111111111111111011110111111111111111111111111* + 111111111110111111110111111111111111111110111111111111111111111111* L014184 000000000000000000000000000000000000000000000000000000000000000000* L014250 000000000000000000000000000000000000000000000000000000000000000000* L014316 000000000000000000000000000000000000000000000000000000000000000000* L014382 000000000000000000000000000000000000000000000000000000000000000000* L014448 000000000000000000000000000000000000000000000000000000000000000000* -L014514 111111111111111111111111111111111111111110111011111111111111111111* -L014580 000000000000000000000000000000000000000000000000000000000000000000* -L014646 000000000000000000000000000000000000000000000000000000000000000000* -L014712 000000000000000000000000000000000000000000000000000000000000000000* -L014778 000000000000000000000000000000000000000000000000000000000000000000* +L014514 111111111111111111111111101111111111111110111111111111111111111111* +L014580 101111111111111111111111111111111111111111111111111111111111111111* +L014646 111111111111111111111111111111111111111101111111111111111111111111* +L014712 111101111011111111111111111111111111111111111111111111111111111111* +L014778 111111111111110111111111111111111111011111111111111111111111111111* L014844 - 111111111110111111111111111111111111011110111111111111111111111111* -L014910 011111011101111111101011111111111111111111111111111111111110111111* -L014976 011111111111111111110111111111111101111111111111111111111101111101* -L015042 011111111111111111111111111111111101111111111111111111111101101101* + 111111111110111111110111111111111111111110111111111111111111111111* +L014910 111111111111111011111111111111111111101111111111111111111111111111* +L014976 111111111111111111111111111111111111111111111111111101111111111111* +L015042 111111111111111101111111111111111111111111111111011111111111111111* L015108 000000000000000000000000000000000000000000000000000000000000000000* L015174 000000000000000000000000000000000000000000000000000000000000000000* -L015240 111111111111111111111111111111111111111111111111111111111111111111* -L015306 111111111111111111111111111111111111111111111111111111111111111111* -L015372 111111111111111111111111111111111111111111111111111111111111111111* -L015438 111111111111111111111111111111111111111111111111111111111111111111* -L015504 111111111111111111111111111111111111111111111111111111111111111111* +L015240 011111011111111111111111111111111111111110111111111111111111111111* +L015306 011111111111111111111111101111111111111101111111110111111111111111* +L015372 000000000000000000000000000000000000000000000000000000000000000000* +L015438 000000000000000000000000000000000000000000000000000000000000000000* +L015504 000000000000000000000000000000000000000000000000000000000000000000* L015570 - 111111111110111111111111111111111111011110111111111111111111111111* + 111111111110111111110111111111111111111110111111111111111111111111* L015636 111111111111111111111111111111111111111111111111111111111111111111* L015702 111111111111111111111111111111111111111111111111111111111111111111* L015768 111111111111111111111111111111111111111111111111111111111111111111* @@ -374,37 +374,37 @@ L016098 111111111111111111111111111111111111111111111111111111111111111111* L016164 111111111111111111111111111111111111111111111111111111111111111111* L016230 111111111111111111111111111111111111111111111111111111111111111111* L016296 - 111111111110111111111111111111111111011110111111111111111111111111* -L016362 011111111111111111101111111111101101111111111111111111111111111111* -L016428 011011111101110111111111111111101101111101111111111111111110111111* -L016494 011111111101110111111111011111101101111101111111111111111110111111* -L016560 011111110101110111111111111111101101111101111111111111111110111111* -L016626 011111111101110111111111111011101101111101111111111111111110111111* -L016692 111111111111111111111111111111111111111111111111111111111111111111* -L016758 111111111111111111111111111111111111111111111111111111111111111111* -L016824 111111111111111111111111111111111111111111111111111111111111111111* -L016890 111111111111111111111111111111111111111111111111111111111111111111* -L016956 111111111111111111111111111111111111111111111111111111111111111111* + 111111111110111111110111111111111111111110111111111111111111111111* +L016362 011110111011111010111111111111111111011110111111111110111111111111* +L016428 011110111011110110111111111111111111101110111111111110111111111111* +L016494 011111111111111010011111111111111111011110111111111110111111111111* +L016560 011111111111110110011111111111111111101110111111111110111111111111* +L016626 011110111011111011111111111111111111011110111111101110111111111111* +L016692 011111111111111111111111111110111111111111111111111111111111111111* +L016758 000000000000000000000000000000000000000000000000000000000000000000* +L016824 000000000000000000000000000000000000000000000000000000000000000000* +L016890 000000000000000000000000000000000000000000000000000000000000000000* +L016956 000000000000000000000000000000000000000000000000000000000000000000* L017022 - 111111111110111111111111111111111111011110111111111111111111111111* + 111111111110111111110111111111111111111110111111111111111111111111* L017088 000000000000000000000000000000000000000000000000000000000000000000* -L017154 011111111101110111111101111111101101111101111111111111111110111111* -L017220 011111111101100111111111111111101101111101111111111111111110111111* -L017286 000000000000000000000000000000000000000000000000000000000000000000* +L017154 011110111011110111111111111111111111101110111111101110111111111111* +L017220 011111111111111011011111111111111111011110111111101110111111111111* +L017286 011111111111110111011111111111111111101110111111101110111111111111* L017352 000000000000000000000000000000000000000000000000000000000000000000* L017418 000000000000000000000000000000000000000000000000000000000000000000* -L017484 111111111111111111111111111111111111111111111111111111111111111111* -L017550 111111111111111111111111111111111111111111111111111111111111111111* -L017616 111111111111111111111111111111111111111111111111111111111111111111* -L017682 111111111111111111111111111111111111111111111111111111111111111111* +L017484 000000000000000000000000000000000000000000000000000000000000000000* +L017550 000000000000000000000000000000000000000000000000000000000000000000* +L017616 000000000000000000000000000000000000000000000000000000000000000000* +L017682 000000000000000000000000000000000000000000000000000000000000000000* L017748 111111111111111111111111111111111111111111111111111111111111111111* -L017814 111111111111111111111111111111111111111111111111111111111111111111* -L017880 111111111111111111111111111111111111111111111111111111111111111111* -L017946 111111111111111111111111111111111111111111111111111111111111111111* -L018012 111111111111111111111111111111111111111111111111111111111111111111* -L018078 111111111111111111111111111111111111111111111111111111111111111111* -L018144 111101111111111111111111111111111111111111111111111111111111111111* +L017814 011111111111111011111111111111111111011110111111111110111111111111* +L017880 011111111111111111111111110111111111011110111111111110111111111111* +L017946 011111111111110111111111111011110111101110111111111110111111111111* +L018012 011111111111111111111111111111111011011110111111111110111111111111* +L018078 000000000000000000000000000000000000000000000000000000000000000000* +L018144 111111111111111111111111111111111111111111111111111111111111111111* L018210 111111111111111111111111111111111111111111111111111111111111111111* L018276 111111111111111111111111111111111111111111111111111111111111111111* L018342 111111111111111111111111111111111111111111111111111111111111111111* @@ -412,82 +412,82 @@ L018408 111111111111111111111111111111111111111111111111111111111111111111* L018474 000000000000000000000000000000000000000000000000000000000000000000* L018540 000000000000000000000000000000000000000000000000000000000000000000* -L018606 111111111111111111111111111111111111111111111111111111111111111111* -L018672 111111111111111111111111111111111111111111111111111111111111111111* -L018738 111111111111111111111111111111111111111111111111111111111111111111* -L018804 111111111111111111111111111111111111111111111111111111111111111111* -L018870 111111111111111111111111111101111111111111111111111111111111111111* -L018936 000000000000000000000000000000000000000000000000000000000000000000* -L019002 000000000000000000000000000000000000000000000000000000000000000000* -L019068 000000000000000000000000000000000000000000000000000000000000000000* -L019134 000000000000000000000000000000000000000000000000000000000000000000* +L018606 101111111111111111111111111111111111111111111111111111111111111111* +L018672 111111111111111111111111111111111111111101111111111111111111111111* +L018738 111111111111110111111111111111111111011111111111111111111111111111* +L018804 111111111111111011111111111111111111101111111111111111111111111111* +L018870 111111111111111111111111111111111111111111111111111101111111111111* +L018936 111111111111111101111111111111111111111111111111011111111111111111* +L019002 111111111011101111111101111111111111111111111111111111111111111111* +L019068 111101110111101111011111111111111111111111111111111111111111111111* +L019134 111111111111101111101101111111111111111111111111111111111111111111* L019200 000000000000000000000000000000000000000000000000000000000000000000* -L019266 111111111111111101111111111111111111111111111111111111111111111111* -L019332 000000000000000000000000000000000000000000000000000000000000000000* -L019398 000000000000000000000000000000000000000000000000000000000000000000* +L019266 011111111111110111111111110111111111111110111111111110111111111111* +L019332 011111111111111011111111111011110111111110111111111110111111111111* +L019398 011111111111110111111111111111111011111110111111111110111111111111* L019464 000000000000000000000000000000000000000000000000000000000000000000* L019530 000000000000000000000000000000000000000000000000000000000000000000* -L019596 011111111111111111111011111111111111111111111111111111111111011101* -L019662 011111111111111111111111111111101001111111111111111111111111111111* -L019728 000000000000000000000000000000000000000000000000000000000000000000* -L019794 000000000000000000000000000000000000000000000000000000000000000000* -L019860 000000000000000000000000000000000000000000000000000000000000000000* +L019596 111111111111111111111111111111111111111111111111111111111111111111* +L019662 111111111111111111111111111111111111111111111111111111111111111111* +L019728 111111111111111111111111111111111111111111111111111111111111111111* +L019794 111111111111111111111111111111111111111111111111111111111111111111* +L019860 111111111111111111111111111111111111111111111111111111111111111111* L019926 000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000* L020058 0010* L020062 00100011110000* -L020076 01101111110011* +L020076 01011111110011* L020090 10100110011110* -L020104 11011111110010* -L020118 11111011111000* -L020132 00110011110011* -L020146 11100110010110* -L020160 11100011110010* -L020174 00001111110001* -L020188 00000011110011* -L020202 11101011111110* -L020216 00110110011111* -L020230 00001111111001* -L020244 00100110010011* -L020258 00100110010000* -L020272 11100110011111* +L020104 11100110010010* +L020118 11100011111000* +L020132 00111111110011* +L020146 10100110010111* +L020160 01100110010011* +L020174 00000011110000* +L020188 00101011110011* +L020202 10100110011110* +L020216 11101111111110* +L020230 00010011111000* +L020244 10100110010011* +L020258 10100110010001* +L020272 11101011111111* NOTE BLOCK 3 * L020286 - 111111111111111111111111111111111111111111111111111111111111011111 - 111111110101111111111111111111111110111111111111111111111111111111 - 101111111111111111011101111111111111111111111110111111111111111110 - 111111111111111111111111111111111111111111110111111111111011111111 111111111111111111111111111111111111111111111111111111111111111111 - 111101111111101111111111111111111111111111011111111111111111111111 - 111111111111110111111111111111011111011111111111111111111111111111 - 111111111111111111111011111110110111111110111111111111111111111111 - 110111011111111111111111111111111111111111111111101111011111111111* + 111111110101111111111111101111111111111111111111111111111111111111 + 101111111111111111111101111111111111111111111110111111111111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111111111110111111111101111111111111111111111111111111111 + 111101111111111111011111111111111111111111011111111111111111111111 + 111111111111110110111111111111111111010111111111111111111111111111 + 111111111111111111111111111011110111111110111111111111111111111110 + 110111101111111111111111111111111101111111111111101111110111111111* L020880 111111111111111111111111111111111111111111111111111111111111111111* L020946 111011111111111111111111111111111111111111111111101111111111111111* -L021012 111011101111111011111011111111111111111111101111111111111111011110* -L021078 110111011111111011110111111111111111111111101111011111111011101101* +L021012 111010111111111101111111111011111011111111101111111111111011111111* +L021078 110101111111111110111111110111111011111011011111011111111011111111* L021144 000000000000000000000000000000000000000000000000000000000000000000* L021210 000000000000000000000000000000000000000000000000000000000000000000* -L021276 111111111001111111111111111111011111111111111111011111111111011111* -L021342 111111111011111111111111111111111111111111111111011111101111111111* +L021276 111111111001110101111111111111111111111111111111011111111111111111* +L021342 111111111011111111111111111111111110111111111111011111111111111111* L021408 000000000000000000000000000000000000000000000000000000000000000000* L021474 000000000000000000000000000000000000000000000000000000000000000000* L021540 000000000000000000000000000000000000000000000000000000000000000000* L021606 111111111111111111111111111111111111111111111111111111111111111111* -L021672 111111011111111111111011111111111111111111111111111111111111111111* -L021738 111111011111111111111111111111111111111111111111111111111111011111* -L021804 111111101111111111110111111111111111111111111111111111111111101111* -L021870 000000000000000000000000000000000000000000000000000000000000000000* +L021672 111110111111111111111111111111111011111111111111111111110111111111* +L021738 111111111111111111111111111011111111111111111111111111110111111111* +L021804 111111111111111101111111111111111111111111111111111111110111111111* +L021870 111101111111111110111111110111110111111111011111111111111111111111* L021936 000000000000000000000000000000000000000000000000000000000000000000* -L022002 111111111111111111111111111111111111111111111111111111111111111111* -L022068 111111111111111111111111111111111111111111111111111111111111111111* -L022134 111111111111111111111111111111111111111111111111111111111111111111* -L022200 111111111111111111111111111111111111111111111111111111111111111111* -L022266 111111111111111111111111111111111111111111111111111111111111111111* +L022002 111111011111111111111111111111111111111111111111111111111111111111* +L022068 000000000000000000000000000000000000000000000000000000000000000000* +L022134 000000000000000000000000000000000000000000000000000000000000000000* +L022200 000000000000000000000000000000000000000000000000000000000000000000* +L022266 000000000000000000000000000000000000000000000000000000000000000000* L022332 111111111111111111111111111111111111111111111111111111111111111111* L022398 111111111111111111011111111111111111111101111111111111111111111111* @@ -496,15 +496,15 @@ L022530 000000000000000000000000000000000000000000000000000000000000000000* L022596 000000000000000000000000000000000000000000000000000000000000000000* L022662 000000000000000000000000000000000000000000000000000000000000000000* L022728 000000000000000000000000000000000000000000000000000000000000000000* -L022794 111111111111111111111111111111111111111111111111111111111111111111* -L022860 111111111111111111111111111111111111111111111111111111111111111111* -L022926 111111111111111111111111111111111111111111111111111111111111111111* -L022992 111111111111111111111111111111111111111111111111111111111111111111* +L022794 000000000000000000000000000000000000000000000000000000000000000000* +L022860 000000000000000000000000000000000000000000000000000000000000000000* +L022926 000000000000000000000000000000000000000000000000000000000000000000* +L022992 000000000000000000000000000000000000000000000000000000000000000000* L023058 - 111111111111111111111111111111111111011101111111111111111111111111* -L023124 111111111111111111111111111111111111111111111111101111111111111111* -L023190 111111111111111111111111111111110111111111111011111111111111111111* -L023256 101111111111101111111111111111111101111111110111111111111111111111* + 111111111111111111111111011111111111111101111111111111111111111111* +L023124 111111111111111111111111111111110111111111111111111111111111111111* +L023190 111101111111111110111111110111111111111111011111111111111111111111* +L023256 000000000000000000000000000000000000000000000000000000000000000000* L023322 000000000000000000000000000000000000000000000000000000000000000000* L023388 000000000000000000000000000000000000000000000000000000000000000000* L023454 111111111111111111111111111111111111111111111111111111111111111111* @@ -513,22 +513,22 @@ L023586 111111111111111111111111111111111111111111111111111111111111111111* L023652 111111111111111111111111111111111111111111111111111111111111111111* L023718 111111111111111111111111111111111111111111111111111111111111111111* L023784 - 111111111111111111111111111111111111011101111111111111111111111111* -L023850 111110111111111111111101111111111111111111111111111111111111111111* + 111111111111111111111111011111111111111101111111111111111111111111* +L023850 111111111111111111111011111111011111111111111111111111111111111111* L023916 111111111111111111111111111111111111111111111111111111111111111111* L023982 111111111111111111111111111111111111111111111111111111111111111111* L024048 111111111111111111111111111111111111111111111111111111111111111111* L024114 111111111111111111111111111111111111111111111111111111111111111111* -L024180 111111101111110111111111111111111111111111101111111111111111111111* -L024246 111111111111110111111011111111111111111111111111111111111111111111* -L024312 111111111111110111111111111111111111111111111111111111111111011111* -L024378 111111011111111111110111111111111111111111011111111111111111101101* -L024444 000000000000000000000000000000000000000000000000000000000000000000* +L024180 111111111111111111111111111111111111111111111111011111111111111110* +L024246 111111111111111111111111111111111111111111111111111111111111111111* +L024312 111111111111111111111111111111111111111111111111111111111111111111* +L024378 111111111111111111111111111111111111111111111111111111111111111111* +L024444 111111111111111111111111111111111111111111111111111111111111111111* L024510 000000000000000000000000000000000000000000000000000000000000000000* -L024576 111110111111111111111111111111111111111111111011011111111111111111* -L024642 101111111111111111111111111111111111111111110111011111111111111111* -L024708 000000000000000000000000000000000000000000000000000000000000000000* +L024576 111101111111111111111111111011111111111111111111111111111111111111* +L024642 111101111111111101111111111111111111111111111111111111111111111111* +L024708 111110111111111110111111110111111111111111111111111111111111111111* L024774 000000000000000000000000000000000000000000000000000000000000000000* L024840 000000000000000000000000000000000000000000000000000000000000000000* L024906 111111111111111111111111111111111111111111111111111111111111111111* @@ -538,23 +538,23 @@ L025104 111111111111111111111111111111111111111111111111111111111111111111* L025170 111111111111111111111111111111111111111111111111111111111111111111* L025236 111111111111111111111111111111111111111111111111111111111111111111* -L025302 111111111111111111111101111111111011111111111111111111111111111111* +L025302 111111111111111111111110111111011111111111111111111111111111111111* L025368 111111111111111111111111111111111111111111111111111111111111111111* L025434 111111111111111111111111111111111111111111111111111111111111111111* L025500 111111111111111111111111111111111111111111111111111111111111111111* L025566 111111111111111111111111111111111111111111111111111111111111111111* -L025632 111111111111111111111111111111111111111111011111111111111111111111* -L025698 111111011111111111110111111111111111111111111111111111111111101101* -L025764 000000000000000000000000000000000000000000000000000000000000000000* -L025830 000000000000000000000000000000000000000000000000000000000000000000* +L025632 111110111111111111111111111111111111111111011111111111111111111111* +L025698 111111111111111111111111111011111111111111011111111111111111111111* +L025764 111111111111111101111111111111111111111111011111111111111111111111* +L025830 111101111111111110111111110111111111111111101111111111111011111111* L025896 000000000000000000000000000000000000000000000000000000000000000000* L025962 000000000000000000000000000000000000000000000000000000000000000000* -L026028 111111111111111111111111111101111111111111111111111111111111111111* -L026094 111111111111111111111111111111111111111111111111111111111111111111* -L026160 111111111111111111111111111111111111111111111111111111111111111111* -L026226 111111111111111111111111111111111111111111111111111111111111111111* -L026292 111111111111111111111111111111111111111111111111111111111111111111* +L026028 111111111111111111111011111111111111101111111111011111111111111111* +L026094 101111111111111111111111111111111111011111111111011111111111111111* +L026160 000000000000000000000000000000000000000000000000000000000000000000* +L026226 000000000000000000000000000000000000000000000000000000000000000000* +L026292 000000000000000000000000000000000000000000000000000000000000000000* L026358 111111111111111111111111111111111111111111111111111111111111111111* L026424 111111111111111111111111111111111111111111111111111111111111111111* L026490 111111111111111111111111111111111111111111111111111111111111111111* @@ -567,45 +567,45 @@ L026820 0010* L026824 10100111010000* L026838 11100110011110* L026852 10100110010100* -L026866 11100011111111* -L026880 10101111111001* -L026894 00001011111111* -L026908 10100110010100* -L026922 11101011110011* -L026936 01110011110010* -L026950 10100110010010* -L026964 11100110010001* -L026978 11101011110011* -L026992 01111111111010* -L027006 00100110011110* -L027020 00010110010001* -L027034 11100011110011* +L026866 00100110011111* +L026880 10101011111001* +L026894 00100011111111* +L026908 00100110010100* +L026922 11100011110010* +L026936 01111111110011* +L026950 01000110010011* +L026964 10100110010000* +L026978 11100011110011* +L026992 01111011111011* +L027006 10100110011111* +L027020 11100110010000* +L027034 11101111110011* NOTE BLOCK 4 * L027048 - 111111111111111111111111111111110111111111111111111111111111111111 - 111111111111111111111111111111111111110111011111110111111101111111 - 111111111111101111111111110101111111111111110111111111111111111111 - 111011011111111110111111111111111111111111111111111101111111111111 + 111111111111111111111111111101111111111111111111111111111111111111 + 110111111111111111111011111111111111110111011111011111111111111111 + 111111111111101111111111110111111111111101110111111111111111111111 + 111111011111111110111111101111111101111111111111111111111111111111 111111111111110111111111111111111111111111111111111111111111111111 - 111111111111111111111111011111111111111111111111101111111111111101 - 101111111111111111111101111111011111111111111111111111111011010111 - 111111111101111111101011111111111101111111111110111111111111111111 - 111110110111111111111111111111111111101110111111111111101111111111* + 111111110111111111111111111111111111111111111110111111011111111111 + 111110111111111111111111111111111111111111111111110101111011110111 + 101111111101111111101111111111111111011111111111111111111101101111 + 111111111111111111111110111111011011111111111111111111111111111110* L027642 - 110111110111011101101110101111111111111111111111111111111111111001* + 111111110111011101101111011111011111111111111111111110101111111011* L027708 000000000000000000000000000000000000000000000000000000000000000000* L027774 000000000000000000000000000000000000000000000000000000000000000000* L027840 000000000000000000000000000000000000000000000000000000000000000000* L027906 000000000000000000000000000000000000000000000000000000000000000000* L027972 000000000000000000000000000000000000000000000000000000000000000000* -L028038 111110111111111111111111111111111111111111101110111111110111111111* -L028104 111111111111111111111111111111111111111111111101111111111011111111* +L028038 101111111111111111111111111111111011111111101111111111110111111111* +L028104 011111111111111111111111111111111111111111111111111111111011111111* L028170 000000000000000000000000000000000000000000000000000000000000000000* L028236 000000000000000000000000000000000000000000000000000000000000000000* L028302 000000000000000000000000000000000000000000000000000000000000000000* L028368 - 111111111111111111111111111111111111111111111101111111111111011111* -L028434 111111111111111111110111111111111111111111111111111111111111111111* + 011111111111111111110111111111111111111111111111111111111111111111* +L028434 111111111111111111111111111111111111111111111111111111111111011111* L028500 111111111111111111111111111111111111111111111111111111111111111111* L028566 111111111111111111111111111111111111111111111111111111111111111111* L028632 111111111111111111111111111111111111111111111111111111111111111111* @@ -617,19 +617,19 @@ L028962 111111111111111111111111111111111111111111111111111111111111111111* L029028 111111111111111111111111111111111111111111111111111111111111111111* L029094 000000000000000000000000000000000000000000000000000000000000000000* -L029160 111111111111111111101111111111111011111111111111111111111111111111* +L029160 111111111111111111101111111111111111101111111111111111111111111111* L029226 111111111111111111111111111111111111111111111111111111111111111111* L029292 111111111111111111111111111111111111111111111111111111111111111111* L029358 111111111111111111111111111111111111111111111111111111111111111111* L029424 111111111111111111111111111111111111111111111111111111111111111111* -L029490 111111111111111111111111111111111111111111111111111111111101111111* +L029490 111111111111111111111111111111111111111111111111111111111111111111* L029556 111111111111111111111111111111111111111111111111111111111111111111* L029622 111111111111111111111111111111111111111111111111111111111111111111* L029688 111111111111111111111111111111111111111111111111111111111111111111* L029754 111111111111111111111111111111111111111111111111111111111111111111* L029820 000000000000000000000000000000000000000000000000000000000000000000* -L029886 101111111111111111111111111111111111111111111111111111111111111111* +L029886 111111111111111111111111111111111111111111111101111111111111111111* L029952 111111111111111111111111111111111111111111111111111111111111111111* L030018 111111111111111111111111111111111111111111111111111111111111111111* L030084 111111111111111111111111111111111111111111111111111111111111111111* @@ -641,36 +641,36 @@ L030414 111111111111111111111111111111111111111111111111111111111111111111* L030480 111111111111111111111111111111111111111111111111111111111111111111* L030546 000000000000000000000000000000000000000000000000000000000000000000* -L030612 011111111111111111111111111111111111111111111111111111111111111111* +L030612 111111111111111111111111111101111111111111111111111111111111111111* L030678 111111111111111111111111111111111111111111111111111111111111111111* L030744 111111111111111111111111111111111111111111111111111111111111111111* L030810 111111111111111111111111111111111111111111111111111111111111111111* L030876 111111111111111111111111111111111111111111111111111111111111111111* -L030942 111111111111111111111111111111111111111111111111111111011111111111* -L031008 111111111111111111111111111111111111111111111111111111111111111111* -L031074 111111111111111111111111111111111111111111111111111111111111111111* -L031140 111111111111111111111111111111111111111111111111111111111111111111* -L031206 111111111111111111111111111111111111111111111111111111111111111111* +L030942 111011101101111011111101111011111110111010111011111011111101111101* +L031008 111111111111111111111111111111111111111111011111111111111111111111* +L031074 000000000000000000000000000000000000000000000000000000000000000000* +L031140 000000000000000000000000000000000000000000000000000000000000000000* +L031206 000000000000000000000000000000000000000000000000000000000000000000* L031272 000000000000000000000000000000000000000000000000000000000000000000* -L031338 111111101101111011111111111010101101011001111011111010111111111111* -L031404 111111111111111111111111111111111111111111011111111111111111111111* -L031470 000000000000000000000000000000000000000000000000000000000000000000* -L031536 000000000000000000000000000000000000000000000000000000000000000000* -L031602 000000000000000000000000000000000000000000000000000000000000000000* +L031338 111111111111111111111111111111111111111111111111111111111111111111* +L031404 111111111111111111111111111111111111111111111111111111111111111111* +L031470 111111111111111111111111111111111111111111111111111111111111111111* +L031536 111111111111111111111111111111111111111111111111111111111111111111* +L031602 111111111111111111111111111111111111111111111111111111111111111111* L031668 111111111111111111111111111111111111111111111111111111111111111111* L031734 111111111111111111111111111111111111111111111111111111111111111111* L031800 111111111111111111111111111111111111111111111111111111111111111111* L031866 111111111111111111111111111111111111111111111111111111111111111111* L031932 111111111111111111111111111111111111111111111111111111111111111111* L031998 - 111111111111111111111111111111111111111111111111011111111111111111* -L032064 111111101101111011111111111010101101011001111011111010111111111111* + 111101111111111111111111111111111111111111111111111111111111111111* +L032064 111011101101111011111101111011111110111010111011111011111101111101* L032130 111111111111111111111111111111111111111111111111111111111111111111* L032196 111111111111111111111111111111111111111111111111111111111111111111* L032262 111111111111111111111111111111111111111111111111111111111111111111* L032328 111111111111111111111111111111111111111111111111111111111111111111* -L032394 111111111111111111111111111111111111111111111111111111111111111111* +L032394 111111111111111111111111111111111111111111111111011111111111111111* L032460 111111111111111111111111111111111111111111111111111111111111111111* L032526 111111111111111111111111111111111111111111111111111111111111111111* L032592 111111111111111111111111111111111111111111111111111111111111111111* @@ -696,95 +696,95 @@ L033600 10101111110011* L033614 00010110010100* L033628 11101111110010* L033642 01111011111000* -L033656 00000110011111* -L033670 00010110010000* -L033684 11101111111110* +L033656 11000011111111* +L033670 00110110010000* +L033684 11000011111110* L033698 00110110010001* -L033712 00000110011111* -L033726 10101011110000* -L033740 11101111111110* -L033754 00110011110000* -L033768 11001011111111* -L033782 11110111111100* -L033796 11111111111110* +L033712 10100111111111* +L033726 11011111110000* +L033740 11110011111111* +L033754 00111011110001* +L033768 00000110011111* +L033782 11010111111100* +L033796 11111111111111* NOTE BLOCK 5 * L033810 - 111111111111101111111101111111111111111111111111111111111111111111 - 111110111101111111111111011111111111101111111111111111111111111111 - 111011111111111110111111111110111111111110111111111111011111111111 - 111111111111111111101111111111111111111111111011111111111111111101 - 111111111111111111111111111111111111111111111111111011111111101111 - 111111111111111111111111111111111111111111011111111111111111111111 - 111111111111110111111111111111111111111111111111111111111111111111 + 111111111111111111111111111111101110111111111111111111111111111111 + 111011111101111111111110111111111111111111111111111111111111111111 + 111111111111011111111111111110111111111111111111111111111111111110 + 111111111111111111101111111111111111111111111111111111111111111111 111111111111111111111011111111111111111111111111111111111111111111 - 101111011111111111111111110111101110111111111111111101111111111111* + 111111111111111011111111111111111111111101011111011111111111111111 + 111101111111111110111111011111111111111111111111111111111111011111 + 111111110111111111111111111011111111111111111110111111111111111111 + 101111011111111111111111111111111111011111111111111011111111111111* L034404 000000000000000000000000000000000000000000000000000000000000000000* -L034470 011111111111111111111011111111111111111111111111110111111111111111* -L034536 011111111111111111111101111111111111111111111111110111111111111111* -L034602 011111111111111111110110111111111111111111111111111011111111111111* -L034668 011111111111011111111111111111111111011111111111110111111111111111* +L034470 011111111111111111111111111111111111111111111110111111111111111111* +L034536 000000000000000000000000000000000000000000000000000000000000000000* +L034602 000000000000000000000000000000000000000000000000000000000000000000* +L034668 000000000000000000000000000000000000000000000000000000000000000000* L034734 000000000000000000000000000000000000000000000000000000000000000000* -L034800 010111111111111111111001111111111111111111111111111111111111111111* -L034866 011111111111111111111011111111111101111111111111111111111111011111* -L034932 011111111111111111111101111111111101111111111111111111111111011111* +L034800 011111111111111101011111111011111111111111111111111111111111111111* +L034866 011111111111111111110111101111111111111111111111110111111111111111* +L034932 011111111111111101111101111011111111111111111111111111111111011111* L034998 000000000000000000000000000000000000000000000000000000000000000000* L035064 000000000000000000000000000000000000000000000000000000000000000000* L035130 000000000000000000000000000000000000000000000000000000000000000000* -L035196 011111111111111111111111111011111111111111111111111111111111111111* -L035262 111111111111111111111111111111111111111111111111111111111111111111* -L035328 111111111111111111111111111111111111111111111111111111111111111111* -L035394 111111111111111111111111111111111111111111111111111111111111111111* -L035460 111111111111111111111111111111111111111111111111111111111111111111* -L035526 011111111111111111111001011111111110111111111111111111111111111111* -L035592 011010111111111111111001101110111101111111110111111111111111101110* -L035658 011010111110111111111111101110111101111111111011111111111111101110* -L035724 011010111111111111111111101110111101111111111011111111011111101110* -L035790 011010111111111111110111101110111101111111111011111111111111101110* +L035196 011111111111111110111111110111011111111111111111111111111111111111* +L035262 011111111111111111011111110111111111111111111111110111111111111111* +L035328 011111111111111110011111111111111111111111111111110111111111111111* +L035394 000000000000000000000000000000000000000000000000000000000000000000* +L035460 000000000000000000000000000000000000000000000000000000000000000000* +L035526 111111111111111111111111111111111111111111111111111111111111111111* +L035592 111111111111111111111111111111111111111111111111111111111111111111* +L035658 111111111111111111111111111111111111111111111111111111111111111111* +L035724 111111111111111111111111111111111111111111111111111111111111111111* +L035790 111111111111111111111111111111111111111111111111111111111111111111* L035856 000000000000000000000000000000000000000000000000000000000000000000* -L035922 011111111111111111111111111111111101111111111111111111111111111111* -L035988 011010111111111111111111101110101101111111111011111111111111101110* -L036054 011111111111111111111001111111111110111111111111111111111111111101* -L036120 011111111111111111110110111111111110111111111111111111111111011111* -L036186 011111111111111111110110111101111110111111111111111111111111111111* -L036252 011101101111110111100110111111111110111110101111111110111111111111* -L036318 011101111111111110010110111111111110111111111111111111111111111111* -L036384 010111111111111111111001111111111110111111111111111111111111111111* -L036450 011010111101111111111011101110011110111111111011111111101111101110* -L036516 000000000000000000000000000000000000000000000000000000000000000000* +L035922 011111111111111111111111111111111111111111111111110111111111111111* +L035988 011111111111111101011111111011111111111111111111111011111111111111* +L036054 011011111111111101101111111010101111111111111111110111111111101110* +L036120 011011111110111111101111111110101110111111111111110111111111101110* +L036186 011011111111111111101111111110101110111111111111010111111111101110* +L036252 011011111111111111101111111010101110111111111111110111111111101110* +L036318 011011111111111101101111111110101110111111111111110111111111101110* +L036384 011111111111111101111111111011111111111111111111111011111111011111* +L036450 011111111111111110111111110111111111111111111111111011111111111101* +L036516 011111111111111110111111110111011111111111111111111011111111111111* L036582 000000000000000000000000000000000000000000000000000000000000000000* -L036648 011101101111110111100110111111111111111110101111111110111111111111* -L036714 011101111111111110010110111111111111111111111111111111111111111111* -L036780 010111111111111111110111111111111101111111111111111111111111111111* -L036846 010111111111111111111110111111111101111111111111111111111111111111* -L036912 000000000000000000000000000000000000000000000000000000000000000000* -L036978 011111111111111111111001111111111111111111111111111111111111111101* -L037044 011111111111111111111011111101111101111111111111111111111111111111* -L037110 011111111111111111111101111101111101111111111111111111111111111111* -L037176 000000000000000000000000000000000000000000000000000000000000000000* +L036648 111111111111110111111111111111111111111111111111111111111111111111* +L036714 010110011011111110111111110111111111101110101111111011111111111111* +L036780 010101111111101110111111110111111111111111111111111011111111111111* +L036846 011111111111111101111111111001111111111111111111111011111111111111* +L036912 011011111101111110101111110110111110111111111111101011111111101111* +L036978 010110011011111110111111110111111111101110101111111111111111111111* +L037044 010101111111101110111111110111111111111111111111111111111111111111* +L037110 011111111111111111111111110101111111111111111111110111111111111111* +L037176 011111111111111110111111111101111111111111111111110111111111111111* L037242 000000000000000000000000000000000000000000000000000000000000000000* L037308 000000000000000000000000000000000000000000000000000000000000000000* -L037374 111111101111111111111111111111111111111101111111111111111111111111* -L037440 111111111111111111111011111111111111111101111111111111111111111111* -L037506 111111111111111111111101111111111111111101111111111111111111111111* -L037572 111111011111111011110110111111111111111110111111111111111111111111* +L037374 011111111111111101111111111001111111111111111111111111111111111111* +L037440 011111111111111111111111111011111111111111111111110111111111111101* +L037506 011111111111111101111111111111111111111111111111110111111111111101* +L037572 000000000000000000000000000000000000000000000000000000000000000000* L037638 000000000000000000000000000000000000000000000000000000000000000000* -L037704 011111111111011111110110111111111111111111111111110111111111111111* -L037770 011111111111111111111111111111111111011111111111111111111111111111* -L037836 000000000000000000000000000000000000000000000000000000000000000000* -L037902 000000000000000000000000000000000000000000000000000000000000000000* -L037968 000000000000000000000000000000000000000000000000000000000000000000* +L037704 010111111111111111111111111111111111111111111111110111111111111111* +L037770 011011111111111101011111111011111111111111111111111111111111111111* +L037836 010110011011111110111111110111111111101110101111110111111111111111* +L037902 010101111111101110111111110111111111111111111111110111111111111111* +L037968 011111111111111101011111111011111111111111111111111011111111111111* L038034 000000000000000000000000000000000000000000000000000000000000000000* -L038100 011101111111111111111111111111111101111111111111111111111111111111* -L038166 011110111111111111111001011111111111111111111111111111111111111111* -L038232 011101101111110111100110111111111101111110101111111110111111111111* -L038298 011101111111111110010110111111111101111111111111111111111111111111* -L038364 011111111111111111111001011111111110111111111111111111111111111111* +L038100 111111111111111111111111111111111111111111111111111111111111111111* +L038166 111111111111111111111111111111111111111111111111111111111111111111* +L038232 111111111111111111111111111111111111111111111111111111111111111111* +L038298 111111111111111111111111111111111111111111111111111111111111111111* +L038364 111111111111111111111111111111111111111111111111111111111111111111* L038430 111111111111111111111111111111111111111111111111111111111111111111* L038496 111111111111111111111111111111111111111111111111111111111111111111* L038562 111111111111111111111111111111111111111111111111111111111111111111* @@ -792,14 +792,14 @@ L038628 111111111111111111111111111111111111111111111111111111111111111111* L038694 111111111111111111111111111111111111111111111111111111111111111111* L038760 000000000000000000000000000000000000000000000000000000000000000000* -L038826 111111111111111111111111111111111111111111111111111111111111111111* -L038892 111111111111111111111111111111111111111111111111111111111111111111* -L038958 111111111111111111111111111111111111111111111111111111111111111111* -L039024 111111111111111111111111111111111111111111111111111111111111111111* -L039090 111111111111111111111111111111111111111111111111111111111111111111* -L039156 011111111111011111111111111111111111111111111111111111111111111111* -L039222 011111111111111111110110111111111111101111111111110111111111111111* -L039288 011111111111101111110110111111111111111111111111110111111111111111* +L038826 011111111111111110111111110111111111111111111111111111111111111101* +L038892 011111111111111111111111110111111101111111111111110111111111111111* +L038958 011111111111111110111111111111111101111111111111110111111111111111* +L039024 000000000000000000000000000000000000000000000000000000000000000000* +L039090 000000000000000000000000000000000000000000000000000000000000000000* +L039156 011111111111111101111111111011111111111111111111111111111111011111* +L039222 011111111111111111111111111011011111111111111111110111111111111111* +L039288 011111111111111101111111111111011111111111111111110111111111111111* L039354 000000000000000000000000000000000000000000000000000000000000000000* L039420 000000000000000000000000000000000000000000000000000000000000000000* L039486 @@ -818,99 +818,99 @@ L040212 000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000* L040344 0010* -L040348 10100110011110* +L040348 01100110011110* L040362 10100110010010* -L040376 01010110011110* -L040390 11010011110011* +L040376 10100110011110* +L040390 11100011110011* L040404 00100110011111* L040418 10110110010011* -L040432 10100110011110* +L040432 00000110011110* L040446 11001111110011* L040460 10100110011111* -L040474 10100110010011* -L040488 00100110011110* -L040502 11011011111110* -L040516 11111111111110* -L040530 00100110011111* -L040544 11000011111110* +L040474 00100110010011* +L040488 11011011111110* +L040502 11111111111110* +L040516 10100110011110* +L040530 10100110011111* +L040544 11010011111110* L040558 11111011111110* NOTE BLOCK 6 * L040572 - 111111111111111111111111111111111111111111111111111111111111011111 - 111111111111111111111111101111011111111111111011111111111111111111 - 111110111110111111111111111011111111111111111111111111111111111111 - 111111111011111111111111111111111111111111111111111111111111111110 - 111111101111111111111011111111111110111101111111111111111111111111 - 111111111111111011111111111111111111111111011111111111111111111111 - 111111111111101111011111111111111011011111111111110111011111111111 - 101111111111111101111110111111111111111111111111111111111111111111 - 111011111111111111111111111111111111111111111110101111111111111111* + 111111111111111111100110111111111111111111111111111111111111111111 + 111111111110111111111111101111011111111111111111111111111111111111 + 111111111111111111111111111011111111111111111010111111111111111111 + 111111111111111111111111111111111111111111111111101111111111111011 + 111111101111111111111111111111111110111111111111111011111111111111 + 110111111111111111111111111111111111111111111111111111111111111111 + 011111111111101111111111111111111011111111111111111111111111111111 + 111111110111111101111111111111111111111110111111111111101111111111 + 111111111111111111111111111111111111111111101111111111110111111111* L041166 111111111111111111111111111111111111111111111111111111111111111111* -L041232 011111111111110111111111111111111110111111111111011111111111111111* -L041298 101111111111101111111111111111111111111111111111011111111111111111* +L041232 111111111111111111111111111111111110111101011111110111111111111111* +L041298 111111111111101111111111111111111111111110011111111111111111111111* L041364 000000000000000000000000000000000000000000000000000000000000000000* L041430 000000000000000000000000000000000000000000000000000000000000000000* L041496 000000000000000000000000000000000000000000000000000000000000000000* -L041562 111111111111111111111111111111110111111111111111111111111111111111* +L041562 111111111111111111110111111111111111111111111111111111111111111111* L041628 000000000000000000000000000000000000000000000000000000000000000000* L041694 000000000000000000000000000000000000000000000000000000000000000000* L041760 000000000000000000000000000000000000000000000000000000000000000000* L041826 000000000000000000000000000000000000000000000000000000000000000000* L041892 111111111111111111111111111111111111111111111111111111111111111111* -L041958 011111111111111011111111111111111111111111111111011111111111111111* -L042024 011111111011111111111111111111111111111111111111011111111111111111* -L042090 101111111111111110111111111111111111111111111111011111101111111111* +L041958 111111111111111111111111111111111111111101011111111011111111111111* +L042024 111111111111111111111111111111111111111101011111111111111111111011* +L042090 101111111111111110111111111111111111111110011111111111111111111111* L042156 000000000000000000000000000000000000000000000000000000000000000000* L042222 000000000000000000000000000000000000000000000000000000000000000000* -L042288 111111111111111111111111111111111111111101111111111111111111111111* -L042354 000000000000000000000000000000000000000000000000000000000000000000* -L042420 000000000000000000000000000000000000000000000000000000000000000000* +L042288 111111111111111111111111111111111111111111011111011111111111111111* +L042354 111111111101111111111110111111111011111111011111111111011111111111* +L042420 111111111101111111111111111111111011111111011111101111011111111111* L042486 000000000000000000000000000000000000000000000000000000000000000000* L042552 000000000000000000000000000000000000000000000000000000000000000000* L042618 000000000000000000000000000000000000000000000000000000000000000000* -L042684 111101111111111111111111111111111111111111011111111011111111111111* -L042750 111110111111111111111111111111111111111111101111110111111111111111* +L042684 110111110111111111111111111111111111111111111111111111111011111111* +L042750 111011111011111111111111111111111111111111111111111111110111111111* L042816 000000000000000000000000000000000000000000000000000000000000000000* L042882 000000000000000000000000000000000000000000000000000000000000000000* L042948 000000000000000000000000000000000000000000000000000000000000000000* -L043014 111111111111111111110101111111111111111111111111011111111111101111* -L043080 110111111111111111111101111111111111111111111111011111111111111101* -L043146 110111111111111111111111111111111111111111111111011111111111101101* -L043212 000000000000000000000000000000000000000000000000000000000000000000* -L043278 000000000000000000000000000000000000000000000000000000000000000000* +L043014 111111111111111111111111111111111111111111111111111111111111111111* +L043080 111111111111111111111111111111111111111111111111111111111111111111* +L043146 111111111111111111111111111111111111111111111111111111111111111111* +L043212 111111111111111111111111111111111111111111111111111111111111111111* +L043278 111111111111111111111111111111111111111111111111111111111111111111* L043344 000000000000000000000000000000000000000000000000000000000000000000* -L043410 101111101111111111111111111111111111111111111111011111111111111111* -L043476 011111111110110111111111111111111111111111111111011111111111111111* +L043410 111111101111111111111111111111111111111110011111111111111111111111* +L043476 111111111111111111111111111111111111111101011110110111111111111111* L043542 000000000000000000000000000000000000000000000000000000000000000000* L043608 000000000000000000000000000000000000000000000000000000000000000000* L043674 000000000000000000000000000000000000000000000000000000000000000000* -L043740 111111111111111111101111111111111111111111111111011111111111111111* -L043806 000000000000000000000000000000000000000000000000000000000000000000* -L043872 000000000000000000000000000000000000000000000000000000000000000000* -L043938 000000000000000000000000000000000000000000000000000000000000000000* -L044004 000000000000000000000000000000000000000000000000000000000000000000* +L043740 111111111111111111111111111111111111111111011011111111111111111111* +L043806 111111111111111111111111111111111111111111111111111111111111111111* +L043872 111111111111111111111111111111111111111111111111111111111111111111* +L043938 111111111111111111111111111111111111111111111111111111111111111111* +L044004 111111111111111111111111111111111111111111111111111111111111111111* L044070 - 101111111111111111111111111111101111011111111111111111111111111111* -L044136 111111111111111111111111111111111111111111111111101111111111111111* -L044202 011111111111110111111111110111111111111111111111111111111111111111* -L044268 101111111111111101111111111111111111111111111111111111111111111111* + 111111111111111111111111011111101111111110111111111111111111111111* +L044136 111111111111111111111111111111111111111111101111111111111111111111* +L044202 111111111111111111111111110111111111111101111111110111111111111111* +L044268 111111111111111101111111111111111111111110111111111111111111111111* L044334 000000000000000000000000000000000000000000000000000000000000000000* L044400 000000000000000000000000000000000000000000000000000000000000000000* -L044466 111111111111111111111111111111111111111111111111101111111111111111* -L044532 011111111111110111111111011111111111111111111111111111111111111111* -L044598 101111111111111110111111111111111111111111111111111111101111111111* +L044466 111111111111111111111111011111111111111111011111111111111111111111* +L044532 111111111101111111111101111111111011111111011111011111011111111111* +L044598 000000000000000000000000000000000000000000000000000000000000000000* L044664 000000000000000000000000000000000000000000000000000000000000000000* L044730 000000000000000000000000000000000000000000000000000000000000000000* L044796 - 101111111111111111111111111111101111111111111111111111111111111111* -L044862 101111011111111111111111111111111111111111111111011111111111111111* -L044928 011111111111110111111111111111111111111111111011011111111111111111* -L044994 000000000000000000000000000000000000000000000000000000000000000000* -L045060 000000000000000000000000000000000000000000000000000000000000000000* + 111111111111111111111111111111101111111110111111111111111111111111* +L044862 111111111101111111111111111111111111111111011111111111101111111111* +L044928 111111111101111111111111111111110111111111011111111111111111111111* +L044994 111111111110111111111111111111111011111111011111111111011111111111* +L045060 111111111101111111111101111111111111111111011111011111111111111111* L045126 000000000000000000000000000000000000000000000000000000000000000000* L045192 111111111111111111111111111111111111111111111111111111111111111111* L045258 111111111111111111111111111111111111111111111111111111111111111111* @@ -918,24 +918,24 @@ L045324 111111111111111111111111111111111111111111111111111111111111111111* L045390 111111111111111111111111111111111111111111111111111111111111111111* L045456 111111111111111111111111111111111111111111111111111111111111111111* L045522 - 101111111111111111111111111111111111011111111111111111111111111111* -L045588 111111110111111111111111101111111111111111111111111111111111111111* + 111111111111111111111111011111111111111110111111111111111111111111* +L045588 111111111111111111101111111111111111111111111111111111111111110111* L045654 111111111111111111111111111111111111111111111111111111111111111111* L045720 111111111111111111111111111111111111111111111111111111111111111111* L045786 111111111111111111111111111111111111111111111111111111111111111111* L045852 111111111111111111111111111111111111111111111111111111111111111111* -L045918 111111111111111111111111111111111111111111111111111111111111111111* -L045984 111111111111111111111111111111111111111111111111111111111111111111* -L046050 111111111111111111111111111111111111111111111111111111111111111111* -L046116 111111111111111111111111111111111111111111111111111111111111111111* -L046182 111111111111111111111111111111111111111111111111111111111111111111* +L045918 111111111111111111111111111111111111111111101111111111111111111111* +L045984 111111111111111111011111111111111111111101111111110111111111111111* +L046050 101111111111111110111111111111111111111110111111111111111111111111* +L046116 000000000000000000000000000000000000000000000000000000000000000000* +L046182 000000000000000000000000000000000000000000000000000000000000000000* L046248 000000000000000000000000000000000000000000000000000000000000000000* -L046314 111111111111111111111111111111111111111111111101111111111111111111* -L046380 111111111111111111111111111111111111111111111111111111111111111111* -L046446 111111111111111111111111111111111111111111111111111111111111111111* -L046512 111111111111111111111111111111111111111111111111111111111111111111* -L046578 111111111111111111111111111111111111111111111111111111111111111111* +L046314 111111111101111111111111111111111011111111011111011111011111111111* +L046380 111111111111111111111101111111111111111111011111111111111111111111* +L046446 000000000000000000000000000000000000000000000000000000000000000000* +L046512 000000000000000000000000000000000000000000000000000000000000000000* +L046578 000000000000000000000000000000000000000000000000000000000000000000* L046644 111111111111111111111111111111111111111111111111111111111111111111* L046710 111111111111111111111111111111111111111111111111111111111111111111* L046776 111111111111111111111111111111111111111111111111111111111111111111* @@ -950,40 +950,40 @@ L047124 00100110011110* L047138 11100110010100* L047152 00100110011111* L047166 10101011111001* -L047180 10100110010011* +L047180 11100011110011* L047194 11100110010000* -L047208 01100110010010* +L047208 01000110010010* L047222 10100110010001* L047236 10100110010011* -L047250 11100110010100* -L047264 11100011110010* -L047278 00111011110010* -L047292 11001111110011* -L047306 00110110010001* -L047320 11000011111111* +L047250 10100110010100* +L047264 11101011110011* +L047278 00111111110011* +L047292 10100110010011* +L047306 10100110010000* +L047320 11100011111110* NOTE BLOCK 7 * L047334 - 011111111111110111111111111111111111111111111111111110111011111111 - 111111111111111111111011111111011111111111111111111011111111111111 - 111111111111111111111111111111111111111111111111101111111111111111 - 111101101111111111111111101010111111111111111111111111111111111011 - 111111111111111111111111111111111111111111111111111111111111101111 - 111111110111111111011111111111111111111111111111111111011111111111 - 111111111110011110111111111111111101011111110111111111111111111111 - 111111111111111111111110111111111111111110111111111111111111111110 - 111011111111111111111111111111111011111011101110111111111101111111* + 111111111111111111100111111111111110111111111111111111111011111111 + 111111111111111111111110101111011111111111111111111111111111111111 + 111110111111111111111111111111111111111011111111101111111111111111 + 111111111111111110111111111110111111111110110111111111111111111011 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111111011111111111111111111011111111111111111011111111111 + 101111010110011111111111111111111011111111111111110111111111111111 + 111111111111111111111111111011111111111111111110111111111111111110 + 111011111111111111111111111111111111111111101111111110111101101111* L047928 000000000000000000000000000000000000000000000000000000000000000000* -L047994 111111111111110111111111111111111111111111111111111111111111111111* -L048060 000000000000000000000000000000000000000000000000000000000000000000* -L048126 000000000000000000000000000000000000000000000000000000000000000000* -L048192 000000000000000000000000000000000000000000000000000000000000000000* +L047994 111111111111111111111111110101111111111111011111111111111111101111* +L048060 111111111111111111111111111101111011111111011111111111111111101111* +L048126 111111101111111111111111111101111110111111011111111111111111101111* +L048192 111111011111111111111110111001110110111111011111111111111111111111* L048258 000000000000000000000000000000000000000000000000000000000000000000* -L048324 111111111111111111111101111101111111111011011111111111111111111111* -L048390 101111111111111111111111111101111111111011011111111111111111111111* -L048456 111110101111111111111111111101111111111011011111111111111111111111* -L048522 011101101111111111111110111101111111111111011111111011111111111111* -L048588 000000000000000000000000000000000000000000000000000000000000000000* +L048324 111111111011101101111111111111111111011101111111011111101110111110* +L048390 111111111111111111111111111111111111111111111111111111111111111111* +L048456 111111111111111111111111111111111111111111111111111111111111111111* +L048522 111111111111111111111111111111111111111111111111111111111111111111* +L048588 111111111111111111111111111111111111111111111111111111111111111111* L048654 000000000000000000000000000000000000000000000000000000000000000000* L048720 111111111111111111111111111111111111111111111111111111111111111111* @@ -991,7 +991,7 @@ L048786 111111111111111111111111111111111111111111111111111111111111111111* L048852 111111111111111111111111111111111111111111111111111111111111111111* L048918 111111111111111111111111111111111111111111111111111111111111111111* L048984 111111111111111111111111111111111111111111111111111111111111111111* -L049050 011111111111111111111111111111111111111111111111111111111111111111* +L049050 111111111111111111111111111111111111111111111111111111111111111111* L049116 111111111111111111111111111111111111111111111111111111111111111111* L049182 111111111111111111111111111111111111111111111111111111111111111111* L049248 111111111111111111111111111111111111111111111111111111111111111111* @@ -999,18 +999,18 @@ L049314 111111111111111111111111111111111111111111111111111111111111111111* L049380 111111111111111111111111111111111111111111111111111111111111111111* L049446 111111111111111111111111111111111111111111101111111111111111111111* -L049512 111111110111111111111111111111111111111101111111111111111111111111* -L049578 011111110111111111111110111111110111111111111111111111111111111111* +L049512 111111111111111111111111111111111111011111111101111111111111111111* +L049578 111111111111111111111111111011110111011111111111111101111111111111* L049644 000000000000000000000000000000000000000000000000000000000000000000* L049710 000000000000000000000000000000000000000000000000000000000000000000* -L049776 111111110111101111111111010111111110111111111111011111101110111110* +L049776 111111111111111111111111111111110111111111111111111111111111111111* L049842 111111111111111111111111111111111111111111111111111111111111111111* L049908 111111111111111111111111111111111111111111111111111111111111111111* L049974 111111111111111111111111111111111111111111111111111111111111111111* L050040 111111111111111111111111111111111111111111111111111111111111111111* L050106 - 111111111111111111111111111111101111011110111111111111111111111111* -L050172 111111111111111111111111111111111111111111111111111111111111111111* + 111111111111111111111111011111101111111111111110111111111111111111* +L050172 111111111111111111111111110111111111111111111111111111111111111111* L050238 111111111111111111111111111111111111111111111111111111111111111111* L050304 111111111111111111111111111111111111111111111111111111111111111111* L050370 111111111111111111111111111111111111111111111111111111111111111111* @@ -1022,18 +1022,18 @@ L050700 111111111111111111111111111111111111111111111111111111111111111111* L050766 111111111111111111111111111111111111111111111111111111111111111111* L050832 111111111111111111111111111111011111111111111111111111111111111111* -L050898 111111111111111111101111111111111011111111111111111111111111111111* +L050898 111111111111111111111111111111111111111111111011111110111111111111* L050964 111111111111111111111111111111111111111111111111111111111111111111* L051030 111111111111111111111111111111111111111111111111111111111111111111* L051096 111111111111111111111111111111111111111111111111111111111111111111* L051162 111111111111111111111111111111111111111111111111111111111111111111* -L051228 111111111111111011111111111111111111111111011101111111111011011111* -L051294 111111111111111001111111111111111111111111011101111111111111011111* -L051360 111111111111111111111111111111111111111111011110111101111111011111* -L051426 110111111110111111111111111111111111111111011011111111111111111111* -L051492 000000000000000000000000000000000000000000000000000000000000000000* +L051228 101101111111110111111111111111111111111111011111111111111011111111* +L051294 101101111111110111110111111111111111111111011111111111111111111111* +L051360 111101111111111111111111110111111011111111011111111111111111111111* +L051426 111101111111111011111111111111111111110111011111111111111111111111* +L051492 110111111110111111111111111111111111111111011111111011111111111111* L051558 - 111111111111111111111111111111111111011101111111111111111111111111* + 111111111111111111111111011111111111111111111101111111111111111111* L051624 111111111111111111111111111111111111111111111111111111111111111111* L051690 111111111111111111111111111111111111111111111111111111111111111111* L051756 111111111111111111111111111111111111111111111111111111111111111111* @@ -1045,13 +1045,13 @@ L052086 111111111111111111111111111111111111111111111111111111111111111111* L052152 111111111111111111111111111111111111111111111111111111111111111111* L052218 111111111111111111111111111111111111111111111111111111111111111111* L052284 - 111111111111111111111111111111101111111110111111111111111111111111* -L052350 111111111111111111110111111111111111111111111111111111111111111011* + 111111111111111111111111111111101111111111111110111111111111111111* +L052350 111111111111111111011111111111111111111111111111111111111111111011* L052416 111111111111111111111111111111111111111111111111111111111111111111* L052482 111111111111111111111111111111111111111111111111111111111111111111* L052548 111111111111111111111111111111111111111111111111111111111111111111* L052614 111111111111111111111111111111111111111111111111111111111111111111* -L052680 111111111111111111111111111111111111111110011111111111111111111111* +L052680 011111111111111111111111111111111111111111111111111111111111111111* L052746 111111111111111111111111111111111111111111111111111111111111111111* L052812 111111111111111111111111111111111111111111111111111111111111111111* L052878 111111111111111111111111111111111111111111111111111111111111111111* @@ -1072,41 +1072,41 @@ L053736 000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000* L053868 0010* -L053872 00100110010000* -L053886 11100110010010* -L053900 11101111110000* -L053914 00110110010011* +L053872 11100110011100* +L053886 01011011110010* +L053900 11010011110001* +L053914 11111111110011* L053928 10100110010000* -L053942 01010011111110* -L053956 11011111110100* -L053970 11111011110011* -L053984 01110011111001* +L053942 00000110011111* +L053956 00010110010100* +L053970 11101011110010* +L053984 01110011111000* L053998 11100110011111* -L054012 11011011111110* +L054012 11011011110111* L054026 11111111110011* L054040 00110011110000* -L054054 01000110010010* -L054068 11011011111111* +L054054 00000110010010* +L054068 11011011111101* L054082 11111111111111* E1 1 -01111100 -1 -01110010 +00000000 1 00000000 1 -01000011 +00000000 1 -01011001 +00000000 1 -00011111 +00000000 1 -11111110 +00000000 1 -10000010 +00000000 +1 +00000000 1 * -C4245* +C3F6D* U00000000000000000000000000000000* -C4D1 +C32C diff --git a/Logic/68030_tk.l0 b/Logic/68030_tk.l0 index 0bb3cee..ea0c642 100644 --- a/Logic/68030_tk.l0 +++ b/Logic/68030_tk.l0 @@ -1 +1 @@ - -ck Min -ce On -ar On -ap On -oe On -split 16 -clust 5 -xor on -speed -ifb yes -sr no -device M4A5 + -ck Min -ce On -ar On -ap On -oe On -split 20 -clust 5 -xor on -speed -ifb yes -sr no -device M4A5 diff --git a/Logic/68030_tk.lco b/Logic/68030_tk.lco index f8c2440..673da63 100644 --- a/Logic/68030_tk.lco +++ b/Logic/68030_tk.lco @@ -16,8 +16,8 @@ RCS = "$Revision: 1.2 $"; Parent = m4a5.lci; SDS_File = m4a5.sds; Design = 68030_tk.tt4; -DATE = 8/19/16; -TIME = 00:39:40; +DATE = 8/24/16; +TIME = 22:17:53; Source_Format = Pure_VHDL; Type = TT2; Pre_Fit_Time = 1; @@ -54,8 +54,8 @@ Pin_Macrocell_Block = No; Routing = No; [GLOBAL CONSTRAINTS] -Max_PTerm_Split = 16; -Max_PTerm_Collapse = 16; +Max_PTerm_Split = 20; +Max_PTerm_Collapse = 20; Max_Pin_Percent = 100; Max_Macrocell_Percent = 100; Max_GLB_Input_Percent = 100; @@ -65,7 +65,7 @@ XOR_Synthesis = Yes; DT_Synthesis = Yes; Node_Collapse = Yes; Run_Time = 0; -Set_Reset_Dont_Care = No; +Set_Reset_Dont_Care = Yes; Clock_Optimize = No; In_Reg_Optimize = Yes; Balanced_Partitioning = Yes; @@ -82,39 +82,39 @@ A_DECODE_23_ = pin,85,-,H,-; IPL_2_ = pin,68,-,G,-; FC_1_ = pin,58,-,F,-; AS_030 = pin,82,-,H,-; -AS_000 = pin,42,-,E,-; -DS_030 = pin,98,-,A,-; -UDS_000 = pin,32,-,D,-; -LDS_000 = pin,31,-,D,-; -nEXP_SPACE = pin,14,-,-,-; -BERR = pin,41,-,E,-; -BG_030 = pin,21,-,C,-; SIZE_0_ = pin,70,-,G,-; +AS_000 = pin,42,-,E,-; AHIGH_30_ = pin,5,-,B,-; -BGACK_000 = pin,28,-,D,-; AHIGH_29_ = pin,6,-,B,-; -CLK_030 = pin,64,-,-,-; +DS_030 = pin,98,-,A,-; AHIGH_28_ = pin,15,-,C,-; -CLK_000 = pin,11,-,-,-; +UDS_000 = pin,32,-,D,-; AHIGH_27_ = pin,16,-,C,-; -CLK_OSZI = pin,61,-,-,-; +LDS_000 = pin,31,-,D,-; AHIGH_26_ = pin,17,-,C,-; -CLK_DIV_OUT = pin,65,-,G,-; +nEXP_SPACE = pin,14,-,-,-; AHIGH_25_ = pin,18,-,C,-; +BERR = pin,41,-,E,-; AHIGH_24_ = pin,19,-,C,-; -FPU_CS = pin,78,-,H,-; +BG_030 = pin,21,-,C,-; A_DECODE_22_ = pin,84,-,H,-; -FPU_SENSE = pin,91,-,A,-; A_DECODE_21_ = pin,94,-,A,-; A_DECODE_20_ = pin,93,-,A,-; -DTACK = pin,30,-,D,-; +BGACK_000 = pin,28,-,D,-; A_DECODE_19_ = pin,97,-,A,-; -AVEC = pin,92,-,A,-; +CLK_030 = pin,64,-,-,-; A_DECODE_18_ = pin,95,-,A,-; -E = pin,66,-,G,-; +CLK_000 = pin,11,-,-,-; A_DECODE_17_ = pin,59,-,F,-; -VPA = pin,36,-,-,-; +CLK_OSZI = pin,61,-,-,-; A_DECODE_16_ = pin,96,-,A,-; +CLK_DIV_OUT = pin,65,-,G,-; +FPU_CS = pin,78,-,H,-; +FPU_SENSE = pin,91,-,A,-; +DTACK = pin,30,-,D,-; +AVEC = pin,92,-,A,-; +E = pin,66,-,G,-; +VPA = pin,36,-,-,-; RST = pin,86,-,-,-; RESET = pin,3,-,B,-; AMIGA_ADDR_ENABLE = pin,33,-,D,-; @@ -137,59 +137,58 @@ RW = pin,71,-,G,-; A_0_ = pin,69,-,G,-; IPL_030_1_ = pin,7,-,B,-; IPL_030_0_ = pin,8,-,B,-; -cpu_est_3_ = node,-,-,D,9; -cpu_est_0_ = node,-,-,D,2; -cpu_est_1_ = node,-,-,F,8; -cpu_est_2_ = node,-,-,D,13; -inst_AS_000_INT = node,-,-,C,15; -inst_AMIGA_BUS_ENABLE_DMA_LOW = node,-,-,G,10; -inst_AS_030_D0 = node,-,-,A,6; -inst_AS_030_000_SYNC = node,-,-,C,6; -inst_BGACK_030_INT_D = node,-,-,H,13; -inst_AS_000_DMA = node,-,-,A,12; -inst_DS_000_DMA = node,-,-,A,1; -CYCLE_DMA_0_ = node,-,-,A,13; -CYCLE_DMA_1_ = node,-,-,A,9; +cpu_est_3_ = node,-,-,D,2; +cpu_est_0_ = node,-,-,D,10; +cpu_est_1_ = node,-,-,D,13; +cpu_est_2_ = node,-,-,D,6; +inst_AS_000_INT = node,-,-,A,5; +inst_AMIGA_BUS_ENABLE_DMA_LOW = node,-,-,C,3; +inst_AS_030_D0 = node,-,-,D,9; +inst_AS_030_000_SYNC = node,-,-,A,12; +inst_BGACK_030_INT_D = node,-,-,F,0; +inst_AS_000_DMA = node,-,-,C,2; +inst_DS_000_DMA = node,-,-,C,13; +CYCLE_DMA_0_ = node,-,-,C,14; +CYCLE_DMA_1_ = node,-,-,C,10; SIZE_DMA_0_ = node,-,-,G,2; -SIZE_DMA_1_ = node,-,-,G,9; -inst_VPA_D = node,-,-,F,2; -inst_UDS_000_INT = node,-,-,D,10; -inst_LDS_000_INT = node,-,-,D,6; -inst_CLK_OUT_PRE_D = node,-,-,E,8; -CLK_000_D_1_ = node,-,-,H,3; -CLK_000_D_10_ = node,-,-,C,14; -CLK_000_D_11_ = node,-,-,H,0; -inst_DTACK_D0 = node,-,-,G,7; -inst_RESET_OUT = node,-,-,A,8; -CLK_000_D_0_ = node,-,-,C,13; -inst_CLK_OUT_PRE_50 = node,-,-,E,6; -IPL_D0_0_ = node,-,-,B,3; -IPL_D0_1_ = node,-,-,B,14; -IPL_D0_2_ = node,-,-,A,3; -CLK_000_D_2_ = node,-,-,E,2; -CLK_000_D_3_ = node,-,-,E,9; -CLK_000_D_4_ = node,-,-,C,11; -CLK_000_D_5_ = node,-,-,E,5; -CLK_000_D_6_ = node,-,-,D,14; -CLK_000_D_7_ = node,-,-,A,14; -CLK_000_D_8_ = node,-,-,G,3; -CLK_000_D_9_ = node,-,-,A,10; -CLK_000_D_12_ = node,-,-,G,14; +SIZE_DMA_1_ = node,-,-,G,13; +inst_VPA_D = node,-,-,A,9; +inst_UDS_000_INT = node,-,-,D,14; +inst_LDS_000_INT = node,-,-,B,6; +inst_CLK_OUT_PRE_D = node,-,-,B,13; +CLK_000_D_8_ = node,-,-,E,6; +CLK_000_D_9_ = node,-,-,H,13; +inst_DTACK_D0 = node,-,-,C,7; +inst_RESET_OUT = node,-,-,G,9; +CLK_000_D_1_ = node,-,-,H,5; +CLK_000_D_0_ = node,-,-,E,8; +inst_CLK_OUT_PRE_50 = node,-,-,A,2; +inst_CLK_OUT_PRE_25 = node,-,-,A,1; +IPL_D0_0_ = node,-,-,A,13; +IPL_D0_1_ = node,-,-,B,3; +IPL_D0_2_ = node,-,-,G,7; +CLK_000_D_2_ = node,-,-,H,6; +CLK_000_D_3_ = node,-,-,E,2; +CLK_000_D_4_ = node,-,-,D,3; +CLK_000_D_5_ = node,-,-,B,14; +CLK_000_D_6_ = node,-,-,B,10; +CLK_000_D_7_ = node,-,-,E,13; +CLK_000_D_10_ = node,-,-,F,6; inst_AMIGA_BUS_ENABLE_DMA_HIGH = node,-,-,G,6; -inst_DS_000_ENABLE = node,-,-,B,6; -SM_AMIGA_6_ = node,-,-,C,2; -SM_AMIGA_0_ = node,-,-,G,5; -SM_AMIGA_4_ = node,-,-,B,10; -RST_DLY_0_ = node,-,-,F,0; -RST_DLY_1_ = node,-,-,F,13; -RST_DLY_2_ = node,-,-,F,9; -inst_CLK_030_H = node,-,-,A,5; -SM_AMIGA_1_ = node,-,-,F,1; -SM_AMIGA_5_ = node,-,-,F,5; -SM_AMIGA_3_ = node,-,-,F,10; -SM_AMIGA_2_ = node,-,-,F,6; +inst_DS_000_ENABLE = node,-,-,F,1; +SM_AMIGA_6_ = node,-,-,A,8; +SM_AMIGA_4_ = node,-,-,F,2; +SM_AMIGA_0_ = node,-,-,F,12; +RST_DLY_0_ = node,-,-,G,10; +RST_DLY_1_ = node,-,-,G,3; +RST_DLY_2_ = node,-,-,G,14; +inst_CLK_030_H = node,-,-,C,6; +SM_AMIGA_1_ = node,-,-,F,8; +SM_AMIGA_5_ = node,-,-,F,13; +SM_AMIGA_3_ = node,-,-,F,9; +SM_AMIGA_2_ = node,-,-,F,5; SM_AMIGA_i_7_ = node,-,-,F,4; -CIIN_0 = node,-,-,E,10; +CIIN_0 = node,-,-,E,9; [GROUP ASSIGNMENTS] Layer = OFF; @@ -199,7 +198,7 @@ Layer = OFF; [SLEWRATE] Default = SLOW; -FAST = CLK_DIV_OUT,CLK_EXP,FPU_CS,AMIGA_BUS_DATA_DIR,AMIGA_BUS_ENABLE_LOW,AMIGA_ADDR_ENABLE,AMIGA_BUS_ENABLE_HIGH; +FAST = CLK_DIV_OUT,CLK_EXP,FPU_CS,AMIGA_BUS_DATA_DIR,AMIGA_BUS_ENABLE_LOW,AMIGA_ADDR_ENABLE,AMIGA_BUS_ENABLE_HIGH,AS_030,A_16_,A_17_,A_18_,A_19_,RW,SIZE_1_,SIZE_0_,AVEC,BGACK_030,BG_000,E,IPL_030_0_,IPL_030_1_,IPL_030_2_,LDS_000,UDS_000,VMA,RESET,CIIN,A_20_,A_21_,A_22_,A_24_,A_25_,A_26_,A_27_,A_28_,A_29_,A_30_,A_31_,DS_030,BERR,A0,DSACK1,RW_000,AS_000,A_23_,A1,A_3_,A_2_,AHIGH_24_,AHIGH_25_,AHIGH_26_,AHIGH_27_,AHIGH_28_,AHIGH_29_,AHIGH_30_,AHIGH_31_,A_0_; [PULLUP] Default = Up; diff --git a/Logic/68030_tk.nrp b/Logic/68030_tk.nrp index 32e4e0f..a8243cd 100644 --- a/Logic/68030_tk.nrp +++ b/Logic/68030_tk.nrp @@ -18,7 +18,7 @@ Note 18862: NODE name SM_AMIGA_i_7_bus.D.X1 being renamed to GATE_SM_AMIGA_i_7_b Note 18862: NODE name SM_AMIGA_i_7_bus.D.X2 being renamed to GATE_SM_AMIGA_i_7_bus_D_X2. Note 18862: NODE name CIIN_0 being renamed to GATE_CIIN_OE. Utilization Estimate - Combinational Macros: 520 - Flip-Flop and Latch Macros: 64 + Combinational Macros: 524 + Flip-Flop and Latch Macros: 61 I/O Pads: 61 -Elapsed time: 2 seconds +Elapsed time: 1 seconds diff --git a/Logic/68030_tk.out b/Logic/68030_tk.out index d2e2791..406ddd6 100644 --- a/Logic/68030_tk.out +++ b/Logic/68030_tk.out @@ -1,8551 +1,153 @@ -141 "number of signals after reading design file" +127 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 363 7 3 0 4 6 79 -1 3 0 21 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 68 A0 5 364 6 2 0 6 68 -1 3 0 21 - 70 RW 5 372 6 2 1 7 70 -1 2 0 21 + 79 RW_000 5 350 7 2 4 6 79 -1 4 0 21 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 97 DS_030 5 -1 0 1 3 97 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 366 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 365 1 0 6 -1 10 0 21 - 65 E 5 370 6 0 65 -1 5 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 371 3 0 34 -1 3 0 21 + 70 RW 5 358 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 10 0 21 + 82 BGACK_030 0 7 0 82 -1 4 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 68 A_0_ 5 353 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 28 BG_000 0 3 0 28 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 314 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 299 inst_nEXP_SPACE_D0reg 3 -1 1 6 0 3 4 5 6 7 -1 -1 1 0 21 - 318 inst_CLK_000_PE 3 -1 2 5 0 2 3 5 7 -1 -1 1 0 21 - 298 inst_AS_030_D0 3 -1 7 5 1 3 4 5 7 -1 -1 1 0 21 - 317 inst_CLK_000_D0 3 -1 0 4 1 3 4 5 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 3 3 5 7 -1 -1 14 0 21 - 370 RN_E 3 65 6 3 2 3 6 65 -1 5 0 21 - 326 SM_AMIGA_3_ 3 -1 2 3 1 2 5 -1 -1 5 0 21 - 294 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 5 0 21 - 322 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 - 330 SM_AMIGA_6_ 3 -1 5 3 0 5 6 -1 -1 3 0 21 - 296 SM_AMIGA_5_ 3 -1 5 3 1 5 7 -1 -1 3 0 21 - 293 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 2 0 21 - 327 inst_CLK_000_NE_D0 3 -1 0 3 2 5 6 -1 -1 1 0 21 - 320 inst_CLK_000_NE 3 -1 0 3 0 3 5 -1 -1 1 0 21 - 302 inst_BGACK_030_INT_D 3 -1 7 3 2 5 6 -1 -1 1 0 21 - 303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 357 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 311 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 4 0 21 - 371 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 358 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 - 356 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 355 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 310 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 3 0 21 - 308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 328 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 2 0 21 - 295 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 316 inst_CLK_000_D1 3 -1 4 2 1 5 -1 -1 1 0 21 - 309 inst_VPA_D 3 -1 3 2 2 3 -1 -1 1 0 21 - 300 inst_DS_030_D0 3 -1 3 2 0 6 -1 -1 1 0 21 - 366 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 365 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 354 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 301 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 7 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 332 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 364 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 363 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 331 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 372 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 359 N_61_i 3 -1 2 1 5 -1 -1 2 0 21 - 333 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 297 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 353 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_8_ 3 -1 2 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_7_ 3 -1 6 1 2 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_6_ 3 -1 2 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_5_ 3 -1 3 1 2 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_4_ 3 -1 2 1 3 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_3_ 3 -1 6 1 2 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_2_ 3 -1 1 1 6 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_8_ 3 -1 1 1 0 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_7_ 3 -1 5 1 1 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_6_ 3 -1 5 1 5 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_5_ 3 -1 1 1 5 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_4_ 3 -1 4 1 1 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_3_ 3 -1 2 1 4 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_2_ 3 -1 2 1 2 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_1_ 3 -1 6 1 2 -1 -1 1 0 21 - 334 CLK_000_P_SYNC_0_ 3 -1 5 1 6 -1 -1 1 0 21 - 325 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 324 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 - 321 CLK_000_N_SYNC_11_ 3 -1 7 1 0 -1 -1 1 0 21 - 319 CLK_000_P_SYNC_9_ 3 -1 0 1 2 -1 -1 1 0 21 - 315 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 313 inst_DTACK_D0 3 -1 0 1 2 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 4 1 7 -1 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 352 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 4 0 21 + 316 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 295 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 -1 2 3 6 -1 -1 4 0 21 + 317 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 312 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 -1 2 4 7 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 1 1 21 + 347 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 13 1 21 + 355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21 + 300 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 7 0 21 + 333 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 5 0 21 + 356 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 332 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 357 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 353 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 351 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 343 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 336 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 335 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 334 inst_BGACK_000_SAMPLE 3 -1 -1 1 7 -1 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 307 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 306 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 358 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 348 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 341 inst_BG_000_PRE 3 -1 -1 1 3 -1 -1 2 0 21 + 331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 1 3 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 330 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 321 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 320 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21 + 319 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 + 314 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 313 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 342 inst_CLK_030_H 3 -1 -1 0 -1 -1 8 0 21 + 346 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 345 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 1 21 + 338 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 344 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 337 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 340 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 339 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 329 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 328 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 327 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 326 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 325 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 324 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 323 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 322 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 318 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 315 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 63 CLK_030 1 -1 -1 3 0 1 7 63 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 4 0 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 - 59 A1 1 -1 -1 2 2 6 59 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 1 13 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -141 "number of signals after reading design file" + 59 A_1_ 1 -1 -1 0 59 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 20 BG_030 1 -1 -1 0 20 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +157 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 363 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 372 6 2 1 7 70 -1 2 0 21 + 41 AS_000 5 -1 4 5 0 2 4 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 + 79 RW_000 5 380 7 3 1 4 6 79 -1 3 0 21 + 70 RW 5 388 6 2 6 7 70 -1 2 0 21 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 366 6 1 2 68 -1 3 0 21 - 97 DS_030 5 -1 0 1 3 97 -1 1 0 21 + 68 A_0_ 5 383 6 1 2 68 -1 3 0 21 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 365 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 364 1 0 6 -1 10 0 21 - 65 E 5 370 6 0 65 -1 5 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 371 3 0 34 -1 3 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 315 inst_RESET_OUT 3 -1 6 6 0 1 3 4 6 7 -1 -1 2 0 21 - 321 inst_CLK_000_NE 3 -1 0 6 0 1 2 3 5 6 -1 -1 1 0 21 - 300 inst_nEXP_SPACE_D0reg 3 -1 5 6 0 3 4 5 6 7 -1 -1 1 0 21 - 319 inst_CLK_000_PE 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 5 1 3 4 5 7 -1 -1 1 0 21 - 356 SM_AMIGA_1_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 - 297 SM_AMIGA_5_ 3 -1 5 4 1 2 5 7 -1 -1 3 0 21 - 329 SM_AMIGA_0_ 3 -1 0 4 0 2 5 7 -1 -1 2 0 21 - 360 SM_AMIGA_i_7_ 3 -1 2 3 3 5 7 -1 -1 14 0 21 - 370 RN_E 3 65 6 3 2 3 6 65 -1 5 0 21 - 327 SM_AMIGA_3_ 3 -1 2 3 1 2 5 -1 -1 5 0 21 - 295 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 5 0 21 - 323 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 - 294 cpu_est_0_ 3 -1 3 3 2 3 6 -1 -1 2 0 21 - 328 inst_CLK_000_NE_D0 3 -1 3 3 2 3 6 -1 -1 1 0 21 - 318 inst_CLK_000_D0 3 -1 1 3 3 4 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 3 0 5 6 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 358 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 333 RST_DLY_1_ 3 -1 1 2 1 6 -1 -1 4 0 21 - 312 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 4 0 21 - 371 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 359 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 - 357 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 332 RST_DLY_0_ 3 -1 1 2 1 6 -1 -1 3 0 21 - 331 SM_AMIGA_6_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 311 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 334 RST_DLY_2_ 3 -1 6 2 1 6 -1 -1 2 0 21 - 330 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 296 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 317 inst_CLK_000_D1 3 -1 4 2 4 5 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 3 2 0 3 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 3 2 2 3 -1 -1 1 0 21 - 365 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 364 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 355 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 302 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 7 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 293 N_301 3 -1 5 1 2 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 363 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 372 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 1 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 6 1 1 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 3 1 6 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 0 1 3 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 1 1 0 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 6 1 1 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 5 1 6 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 6 1 5 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 1 1 6 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_8_ 3 -1 2 1 1 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_7_ 3 -1 5 1 2 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_6_ 3 -1 1 1 5 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_5_ 3 -1 0 1 1 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_4_ 3 -1 4 1 0 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_3_ 3 -1 3 1 4 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_2_ 3 -1 0 1 3 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_1_ 3 -1 6 1 0 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_0_ 3 -1 4 1 6 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 322 CLK_000_N_SYNC_11_ 3 -1 7 1 0 -1 -1 1 0 21 - 320 CLK_000_P_SYNC_9_ 3 -1 1 1 3 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 5 1 2 -1 -1 1 0 21 - 301 inst_DS_030_D0 3 -1 3 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 0 59 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 5 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 5 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -141 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 366 7 3 0 4 6 79 -1 3 0 21 - 70 RW 5 372 6 2 0 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 367 6 1 1 68 -1 3 0 21 - 97 DS_030 5 -1 0 1 3 97 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 365 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 370 7 0 80 -1 4 0 21 - 82 BGACK_030 5 369 7 0 82 -1 3 0 21 - 34 VMA 5 371 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 368 3 0 28 -1 2 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 369 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 0 6 0 1 3 4 6 7 -1 -1 2 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 6 6 0 3 4 5 6 7 -1 -1 1 0 21 - 320 inst_CLK_000_PE 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 5 0 3 4 5 7 -1 -1 1 0 21 - 322 inst_CLK_000_NE 3 -1 6 4 0 2 3 5 -1 -1 1 0 21 - 361 SM_AMIGA_i_7_ 3 -1 5 3 3 5 7 -1 -1 13 0 21 - 327 SM_AMIGA_3_ 3 -1 2 3 0 2 5 -1 -1 5 0 21 - 294 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 - 357 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 298 SM_AMIGA_5_ 3 -1 5 3 0 5 7 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 293 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 329 SM_AMIGA_0_ 3 -1 2 3 2 5 7 -1 -1 2 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 2 5 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 359 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 313 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 4 0 21 - 371 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 360 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 - 358 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 332 SM_AMIGA_6_ 3 -1 5 2 1 5 -1 -1 3 0 21 - 312 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 330 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 2 2 0 2 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 2 2 2 3 -1 -1 2 0 21 - 328 inst_CLK_000_NE_D0 3 -1 3 2 2 3 -1 -1 1 0 21 - 319 inst_CLK_000_D0 3 -1 1 2 3 5 -1 -1 1 0 21 - 318 inst_CLK_000_D1 3 -1 5 2 3 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21 - 365 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 303 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 7 0 21 - 370 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 334 RST_DLY_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 367 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 366 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 333 RST_DLY_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 372 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 368 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 362 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 335 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 331 N_270_i 3 -1 2 1 5 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 355 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_9_ 3 -1 3 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_8_ 3 -1 2 1 3 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_7_ 3 -1 3 1 2 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_6_ 3 -1 6 1 3 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_5_ 3 -1 6 1 6 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_4_ 3 -1 1 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_3_ 3 -1 2 1 1 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_2_ 3 -1 2 1 2 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_1_ 3 -1 1 1 2 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_8_ 3 -1 1 1 2 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_7_ 3 -1 0 1 1 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_6_ 3 -1 4 1 0 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_5_ 3 -1 0 1 4 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_4_ 3 -1 3 1 0 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_3_ 3 -1 4 1 3 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_2_ 3 -1 5 1 4 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_1_ 3 -1 6 1 5 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_0_ 3 -1 3 1 6 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 2 1 3 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21 - 302 inst_DS_030_D0 3 -1 3 1 1 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 59 A1 1 -1 -1 2 2 6 59 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 6 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 81 AS_030 5 -1 7 3 3 4 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 371 6 2 2 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 366 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 5 7 0 1 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 inst_CLK_000_PE 3 -1 6 6 0 2 3 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 3 5 2 3 4 5 7 -1 -1 1 0 21 - 357 SM_AMIGA_1_ 3 -1 2 4 1 2 6 7 -1 -1 3 0 21 - 355 SM_AMIGA_6_ 3 -1 5 4 0 1 2 5 -1 -1 3 0 21 - 298 SM_AMIGA_5_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 - 329 SM_AMIGA_0_ 3 -1 6 4 1 2 6 7 -1 -1 2 0 21 - 322 inst_CLK_000_NE 3 -1 3 4 1 2 3 6 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 2 3 3 5 7 -1 -1 14 0 21 - 293 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 296 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 319 inst_CLK_000_D0 3 -1 0 3 1 3 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 5 2 1 5 -1 -1 7 0 21 - 327 SM_AMIGA_3_ 3 -1 2 2 1 2 -1 -1 5 0 21 - 359 SM_AMIGA_2_ 3 -1 2 2 1 2 -1 -1 4 0 21 - 370 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 358 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 3 0 21 - 331 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 330 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 2 0 21 - 328 inst_CLK_000_NE_D0 3 -1 3 2 2 3 -1 -1 1 0 21 - 318 inst_CLK_000_D1 3 -1 5 2 1 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 6 2 2 3 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 2 5 6 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 333 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 302 N_218_i 3 -1 1 1 2 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 332 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 334 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 2 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 4 1 2 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 7 1 4 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 1 1 7 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 6 1 1 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 1 1 6 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 6 1 5 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 5 1 6 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_8_ 3 -1 4 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_7_ 3 -1 3 1 4 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_6_ 3 -1 3 1 3 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_5_ 3 -1 0 1 3 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_4_ 3 -1 6 1 0 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_3_ 3 -1 3 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_2_ 3 -1 0 1 3 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_1_ 3 -1 6 1 0 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_0_ 3 -1 1 1 6 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 7 1 3 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 6 1 6 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A1 1 -1 -1 1 5 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 5 13 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 81 AS_030 5 -1 7 3 3 4 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 371 6 2 2 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 366 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 5 7 0 1 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 inst_CLK_000_PE 3 -1 6 6 0 2 3 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 3 5 2 3 4 5 7 -1 -1 1 0 21 - 357 SM_AMIGA_1_ 3 -1 2 4 1 2 6 7 -1 -1 3 0 21 - 355 SM_AMIGA_6_ 3 -1 5 4 0 1 2 5 -1 -1 3 0 21 - 298 SM_AMIGA_5_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 - 329 SM_AMIGA_0_ 3 -1 6 4 1 2 6 7 -1 -1 2 0 21 - 322 inst_CLK_000_NE 3 -1 3 4 1 2 3 6 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 2 3 3 5 7 -1 -1 14 0 21 - 293 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 296 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 319 inst_CLK_000_D0 3 -1 0 3 1 3 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 5 2 1 5 -1 -1 7 0 21 - 327 SM_AMIGA_3_ 3 -1 2 2 1 2 -1 -1 5 0 21 - 359 SM_AMIGA_2_ 3 -1 2 2 1 2 -1 -1 4 0 21 - 370 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 358 SM_AMIGA_4_ 3 -1 2 2 1 2 -1 -1 3 0 21 - 331 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 330 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 2 0 21 - 328 inst_CLK_000_NE_D0 3 -1 3 2 2 3 -1 -1 1 0 21 - 318 inst_CLK_000_D1 3 -1 5 2 1 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 6 2 2 3 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 2 5 6 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 333 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 302 N_218_i 3 -1 1 1 2 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 332 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 334 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 2 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 4 1 2 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 7 1 4 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 1 1 7 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 6 1 1 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 1 1 6 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 6 1 5 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 5 1 6 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_8_ 3 -1 4 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_7_ 3 -1 3 1 4 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_6_ 3 -1 3 1 3 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_5_ 3 -1 0 1 3 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_4_ 3 -1 6 1 0 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_3_ 3 -1 3 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_2_ 3 -1 0 1 3 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_1_ 3 -1 6 1 0 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_0_ 3 -1 1 1 6 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 7 1 3 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 6 1 6 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A1 1 -1 -1 1 5 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 5 13 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 70 RW 5 371 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 366 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 inst_CLK_000_PE 3 -1 6 5 1 2 3 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 301 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 328 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 1 3 0 1 2 -1 -1 2 0 21 - 319 inst_CLK_000_D0 3 -1 1 3 3 4 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 331 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 330 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 322 inst_CLK_000_NE 3 -1 6 2 3 5 -1 -1 1 0 21 - 318 inst_CLK_000_D1 3 -1 4 2 4 5 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 5 2 0 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 333 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 293 N_317_i 3 -1 5 1 5 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 332 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 334 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 1 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 7 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 0 1 7 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 5 1 0 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 6 1 5 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 3 1 6 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 1 1 3 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_7_ 3 -1 6 1 0 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_6_ 3 -1 1 1 6 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_5_ 3 -1 0 1 1 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_4_ 3 -1 6 1 0 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_3_ 3 -1 6 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_2_ 3 -1 4 1 6 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_1_ 3 -1 6 1 4 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_0_ 3 -1 4 1 6 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 1 1 6 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 6 1 6 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 70 RW 5 371 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 366 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 inst_CLK_000_PE 3 -1 6 5 1 2 3 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 301 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 328 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 1 3 0 1 2 -1 -1 2 0 21 - 319 inst_CLK_000_D0 3 -1 1 3 3 4 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 331 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 330 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 322 inst_CLK_000_NE 3 -1 6 2 3 5 -1 -1 1 0 21 - 318 inst_CLK_000_D1 3 -1 4 2 4 5 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 5 2 0 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 333 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 293 N_317_i 3 -1 5 1 5 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 332 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 334 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 6 1 5 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 1 1 3 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_7_ 3 -1 1 1 6 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_4_ 3 -1 6 1 6 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_3_ 3 -1 4 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_2_ 3 -1 6 1 4 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_1_ 3 -1 1 1 6 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 6 1 6 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 70 RW 5 371 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 366 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 inst_CLK_000_PE 3 -1 6 5 1 2 3 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 301 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 328 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 1 3 0 1 2 -1 -1 2 0 21 - 319 inst_CLK_000_D0 3 -1 1 3 3 4 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 331 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 330 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 322 inst_CLK_000_NE 3 -1 6 2 3 5 -1 -1 1 0 21 - 318 inst_CLK_000_D1 3 -1 4 2 4 5 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 5 2 0 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 333 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 293 N_317_i 3 -1 5 1 5 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 332 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 334 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 6 1 5 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 1 1 3 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_7_ 3 -1 1 1 6 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_4_ 3 -1 6 1 6 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_3_ 3 -1 4 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_2_ 3 -1 6 1 4 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_1_ 3 -1 1 1 6 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 6 1 6 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -141 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 366 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 372 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 367 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 363 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 365 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 364 1 0 6 -1 10 0 21 - 80 DSACK1 5 370 7 0 80 -1 4 0 21 - 82 BGACK_030 5 369 7 0 82 -1 3 0 21 - 34 VMA 5 371 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 368 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 369 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 315 inst_RESET_OUT 3 -1 5 7 0 1 3 4 5 6 7 -1 -1 2 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 5 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 320 inst_CLK_000_PE 3 -1 1 5 0 2 3 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 5 0 3 4 5 7 -1 -1 1 0 21 - 361 SM_AMIGA_i_7_ 3 -1 2 4 2 3 5 7 -1 -1 14 0 21 - 298 SM_AMIGA_5_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 - 322 inst_CLK_000_NE 3 -1 4 4 0 2 3 5 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 2 3 1 2 5 -1 -1 3 0 21 - 330 SM_AMIGA_4_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 293 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 328 SM_AMIGA_0_ 3 -1 2 3 2 5 7 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 2 0 21 - 319 inst_CLK_000_D0 3 -1 0 3 2 3 4 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 3 3 1 6 7 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 - 331 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 371 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 2 2 2 7 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 317 inst_CLK_OUT_PRE_25 3 -1 6 2 3 6 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 327 inst_CLK_000_NE_D0 3 -1 5 2 2 6 -1 -1 1 0 21 - 318 inst_CLK_000_D1 3 -1 4 2 2 4 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 3 2 2 3 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 2 5 6 -1 -1 1 0 21 - 365 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 364 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 363 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 358 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 370 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 4 0 21 - 333 RST_DLY_1_ 3 -1 5 1 5 -1 -1 4 0 21 - 367 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 366 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 332 RST_DLY_0_ 3 -1 5 1 5 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 372 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 368 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 362 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 360 N_199_i 3 -1 2 1 2 -1 -1 2 0 21 - 334 RST_DLY_2_ 3 -1 5 1 5 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 3 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 3 1 3 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 5 1 3 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 2 1 5 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 1 1 2 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_8_ 3 -1 1 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_7_ 3 -1 3 1 1 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_6_ 3 -1 6 1 3 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_4_ 3 -1 1 1 3 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_2_ 3 -1 3 1 1 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_1_ 3 -1 0 1 3 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 7 1 4 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 6 1 1 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 59 A1 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 5 13 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -141 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 366 7 2 4 6 79 -1 3 0 21 - 70 RW 5 372 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 68 A0 5 367 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 - 8 IPL_030_2_ 5 363 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 365 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 364 1 0 6 -1 10 0 21 - 80 DSACK1 5 370 7 0 80 -1 4 0 21 - 82 BGACK_030 5 369 7 0 82 -1 3 0 21 - 34 VMA 5 371 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 368 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 369 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 3 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 321 inst_CLK_000_PE 3 -1 6 5 2 3 5 6 7 -1 -1 1 0 21 - 301 inst_AS_030_D0 3 -1 7 5 0 2 3 4 7 -1 -1 1 0 21 - 299 SM_AMIGA_5_ 3 -1 5 4 0 2 5 7 -1 -1 3 0 21 - 320 inst_CLK_000_D0 3 -1 0 4 0 2 3 5 -1 -1 1 0 21 - 361 SM_AMIGA_i_7_ 3 -1 5 3 2 3 7 -1 -1 14 0 21 - 295 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 356 SM_AMIGA_6_ 3 -1 2 3 0 2 5 -1 -1 3 0 21 - 296 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 329 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 323 inst_CLK_000_NE 3 -1 4 3 1 3 5 -1 -1 1 0 21 - 319 inst_CLK_000_D1 3 -1 3 3 0 2 5 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 4 3 0 1 4 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 306 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 9 0 21 - 305 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 332 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 371 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 358 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 331 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 330 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 318 inst_CLK_OUT_PRE_25 3 -1 0 2 0 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 297 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 328 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 3 2 6 7 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21 - 365 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 364 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 363 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 357 inst_CLK_030_H 3 -1 6 1 6 -1 -1 8 0 21 - 359 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 370 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 360 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 334 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 293 N_201_i 3 -1 5 1 5 -1 -1 4 0 21 - 367 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 366 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 333 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21 - 372 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 368 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 362 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 335 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 2 0 21 - 355 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_8_ 3 -1 3 1 0 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_7_ 3 -1 1 1 3 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_6_ 3 -1 1 1 1 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_5_ 3 -1 3 1 1 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_4_ 3 -1 0 1 3 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_3_ 3 -1 6 1 0 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_2_ 3 -1 6 1 6 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_1_ 3 -1 6 1 6 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_0_ 3 -1 5 1 6 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_8_ 3 -1 1 1 0 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_7_ 3 -1 5 1 1 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_6_ 3 -1 4 1 5 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_5_ 3 -1 0 1 4 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_4_ 3 -1 3 1 0 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_3_ 3 -1 2 1 3 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_2_ 3 -1 5 1 2 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_1_ 3 -1 4 1 5 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_0_ 3 -1 0 1 4 -1 -1 1 0 21 - 327 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 326 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 - 325 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 - 324 CLK_000_N_SYNC_11_ 3 -1 7 1 4 -1 -1 1 0 21 - 322 CLK_000_P_SYNC_9_ 3 -1 0 1 6 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 - 63 CLK_030 1 -1 -1 2 6 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 3 13 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -142 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 367 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 373 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 368 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 364 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 366 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 365 1 0 6 -1 10 0 21 - 80 DSACK1 5 371 7 0 80 -1 4 0 21 - 82 BGACK_030 5 370 7 0 82 -1 3 0 21 - 34 VMA 5 372 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 369 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 370 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 315 inst_RESET_OUT 3 -1 6 6 0 1 3 4 6 7 -1 -1 2 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 7 6 0 2 3 4 6 7 -1 -1 1 0 21 - 321 inst_CLK_000_PE 3 -1 5 5 0 2 3 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 5 1 2 3 4 7 -1 -1 1 0 21 - 359 SM_AMIGA_1_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21 - 298 SM_AMIGA_5_ 3 -1 5 4 1 2 5 7 -1 -1 3 0 21 - 324 inst_CLK_000_NE 3 -1 6 4 0 3 5 6 -1 -1 1 0 21 - 320 inst_CLK_000_D0 3 -1 3 4 1 2 3 6 -1 -1 1 0 21 - 362 SM_AMIGA_i_7_ 3 -1 5 3 2 3 7 -1 -1 14 0 21 - 361 SM_AMIGA_2_ 3 -1 5 3 0 2 5 -1 -1 4 0 21 - 295 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 357 SM_AMIGA_6_ 3 -1 2 3 0 2 5 -1 -1 3 0 21 - 296 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 330 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 319 inst_CLK_000_D1 3 -1 2 3 1 2 6 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 4 3 1 2 6 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 360 SM_AMIGA_3_ 3 -1 5 2 2 5 -1 -1 5 0 21 - 333 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 372 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 332 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 318 inst_CLK_OUT_PRE_25 3 -1 6 2 3 6 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 293 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 329 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 4 2 4 6 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 3 2 6 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 2 2 3 5 -1 -1 1 0 21 - 366 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 365 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 364 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 358 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 302 inst_AS_030_000_SYNC 3 -1 2 1 2 -1 -1 7 0 21 - 371 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 335 RST_DLY_1_ 3 -1 6 1 6 -1 -1 4 0 21 - 317 N_210_i 3 -1 2 1 5 -1 -1 4 0 21 - 368 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 367 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 334 RST_DLY_0_ 3 -1 6 1 6 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 373 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 369 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 363 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 336 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 356 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 355 CLK_000_N_SYNC_9_ 3 -1 3 1 7 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_8_ 3 -1 1 1 3 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_7_ 3 -1 6 1 1 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_6_ 3 -1 0 1 6 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_5_ 3 -1 0 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_4_ 3 -1 3 1 0 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_3_ 3 -1 3 1 3 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_2_ 3 -1 5 1 3 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_1_ 3 -1 5 1 5 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_0_ 3 -1 6 1 5 -1 -1 1 0 21 - 345 CLK_000_P_SYNC_8_ 3 -1 6 1 5 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_7_ 3 -1 1 1 6 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_6_ 3 -1 5 1 1 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_5_ 3 -1 1 1 5 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_4_ 3 -1 4 1 1 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_3_ 3 -1 5 1 4 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_2_ 3 -1 5 1 5 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_1_ 3 -1 1 1 5 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 328 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 327 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 326 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 325 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21 - 323 CLK_000_P_SYNC_9_ 3 -1 5 1 5 -1 -1 1 0 21 - 322 inst_CLK_OUT_EXP_INT 3 -1 4 1 1 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 7 13 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 70 RW 5 371 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 366 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 inst_CLK_000_PE 3 -1 6 5 1 2 3 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 301 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 328 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 1 3 0 1 2 -1 -1 2 0 21 - 319 inst_CLK_000_D0 3 -1 1 3 3 4 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 331 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 330 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 322 inst_CLK_000_NE 3 -1 6 2 3 5 -1 -1 1 0 21 - 318 inst_CLK_000_D1 3 -1 4 2 4 5 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 5 2 0 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 333 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 293 N_317_i 3 -1 5 1 5 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 332 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 334 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 6 1 5 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 1 1 3 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_7_ 3 -1 1 1 6 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_4_ 3 -1 6 1 6 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_3_ 3 -1 4 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_2_ 3 -1 6 1 4 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_1_ 3 -1 1 1 6 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 6 1 6 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 70 RW 5 371 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 366 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 inst_CLK_000_PE 3 -1 6 5 1 2 3 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 301 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 328 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 1 3 0 1 2 -1 -1 2 0 21 - 319 inst_CLK_000_D0 3 -1 1 3 3 4 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 331 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 330 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 322 inst_CLK_000_NE 3 -1 6 2 3 5 -1 -1 1 0 21 - 318 inst_CLK_000_D1 3 -1 4 2 4 5 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 5 2 0 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 333 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 293 N_317_i 3 -1 5 1 5 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 332 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 334 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 6 1 5 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 1 1 3 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_7_ 3 -1 1 1 6 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_4_ 3 -1 6 1 6 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_3_ 3 -1 4 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_2_ 3 -1 6 1 4 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_1_ 3 -1 1 1 6 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 6 1 6 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -141 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 366 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 372 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 367 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 363 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 365 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 364 1 0 6 -1 10 0 21 - 80 DSACK1 5 370 7 0 80 -1 4 0 21 - 82 BGACK_030 5 369 7 0 82 -1 3 0 21 - 34 VMA 5 371 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 368 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 369 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 315 inst_RESET_OUT 3 -1 5 7 0 1 3 4 5 6 7 -1 -1 2 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 5 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 320 inst_CLK_000_PE 3 -1 1 5 0 2 3 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 5 0 3 4 5 7 -1 -1 1 0 21 - 361 SM_AMIGA_i_7_ 3 -1 2 4 2 3 5 7 -1 -1 14 0 21 - 298 SM_AMIGA_5_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 - 322 inst_CLK_000_NE 3 -1 4 4 0 2 3 5 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 2 3 1 2 5 -1 -1 3 0 21 - 330 SM_AMIGA_4_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 293 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 328 SM_AMIGA_0_ 3 -1 2 3 2 5 7 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 2 0 21 - 319 inst_CLK_000_D0 3 -1 0 3 2 3 4 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 3 3 1 6 7 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 - 331 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 371 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 2 2 2 7 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 317 inst_CLK_OUT_PRE_25 3 -1 6 2 3 6 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 327 inst_CLK_000_NE_D0 3 -1 5 2 2 6 -1 -1 1 0 21 - 318 inst_CLK_000_D1 3 -1 4 2 2 4 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 3 2 2 3 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 2 5 6 -1 -1 1 0 21 - 365 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 364 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 363 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 358 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 370 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 4 0 21 - 333 RST_DLY_1_ 3 -1 5 1 5 -1 -1 4 0 21 - 367 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 366 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 332 RST_DLY_0_ 3 -1 5 1 5 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 372 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 368 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 362 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 360 N_199_i 3 -1 2 1 2 -1 -1 2 0 21 - 334 RST_DLY_2_ 3 -1 5 1 5 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 3 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 3 1 3 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 5 1 3 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 2 1 5 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 1 1 2 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_8_ 3 -1 1 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_7_ 3 -1 3 1 1 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_6_ 3 -1 6 1 3 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_4_ 3 -1 1 1 3 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_2_ 3 -1 3 1 1 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_1_ 3 -1 0 1 3 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 7 1 4 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 6 1 1 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 59 A1 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 5 13 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 70 RW 5 371 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 366 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 inst_CLK_000_PE 3 -1 6 5 1 2 3 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 301 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 328 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 1 3 0 1 2 -1 -1 2 0 21 - 319 inst_CLK_000_D0 3 -1 1 3 3 4 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 331 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 330 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 322 inst_CLK_000_NE 3 -1 6 2 3 5 -1 -1 1 0 21 - 318 inst_CLK_000_D1 3 -1 4 2 4 5 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 5 2 0 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 333 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 293 N_317_i 3 -1 5 1 5 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 332 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 334 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 6 1 5 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 1 1 3 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_7_ 3 -1 1 1 6 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_4_ 3 -1 6 1 6 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_3_ 3 -1 4 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_2_ 3 -1 6 1 4 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_1_ 3 -1 1 1 6 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 6 1 6 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 68 A0 5 366 6 2 0 1 68 -1 3 0 21 - 70 RW 5 371 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 301 inst_AS_030_D0 3 -1 7 5 1 3 4 5 7 -1 -1 1 0 21 - 355 SM_AMIGA_6_ 3 -1 5 4 0 1 2 5 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 - 320 inst_CLK_000_PE 3 -1 4 4 2 3 5 7 -1 -1 1 0 21 - 319 inst_CLK_000_D0 3 -1 4 4 2 3 4 5 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 4 0 1 5 6 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 2 3 3 5 7 -1 -1 15 0 21 - 295 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 - 310 SIZE_DMA_1_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 - 296 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 294 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 326 SM_AMIGA_0_ 3 -1 2 3 2 5 7 -1 -1 2 0 21 - 322 inst_CLK_000_NE 3 -1 4 3 2 3 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 5 3 1 6 7 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 - 329 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 2 2 2 7 -1 -1 3 0 21 - 328 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 327 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 297 cpu_est_0_ 3 -1 2 2 2 3 -1 -1 2 0 21 - 321 inst_CLK_000_NE_D0 3 -1 5 2 2 3 -1 -1 1 0 21 - 318 inst_CLK_000_D1 3 -1 5 2 2 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 358 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 4 0 21 - 331 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 330 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 332 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 6 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 3 1 6 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 5 1 3 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 6 1 5 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 1 1 6 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 3 1 1 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 6 1 3 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 6 1 6 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 5 1 6 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_9_ 3 -1 2 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_8_ 3 -1 5 1 2 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_7_ 3 -1 2 1 5 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_6_ 3 -1 1 1 2 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_5_ 3 -1 0 1 1 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_4_ 3 -1 0 1 0 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_3_ 3 -1 2 1 0 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_2_ 3 -1 6 1 2 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_1_ 3 -1 1 1 6 -1 -1 1 0 21 - 334 CLK_000_P_SYNC_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 333 CLK_000_P_SYNC_10_ 3 -1 6 1 0 -1 -1 1 0 21 - 325 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 324 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 5 1 5 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21 - 293 N_336_i 3 -1 2 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 59 A1 1 -1 -1 2 0 1 59 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 4 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -129 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 352 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 0 2 6 31 -1 1 0 21 - 68 A0 5 353 6 2 5 6 68 -1 3 0 21 - 70 RW 5 358 6 2 1 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 2 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 6 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 6 69 -1 1 0 21 - 8 IPL_030_2_ 5 351 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 360 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 359 1 0 6 -1 10 0 21 - 80 DSACK1 5 356 7 0 80 -1 4 0 21 - 82 BGACK_030 5 355 7 0 82 -1 3 0 21 - 34 VMA 5 357 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 354 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 355 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 3 0 21 - 315 inst_RESET_OUT 3 -1 6 6 0 1 3 4 6 7 -1 -1 2 0 21 - 318 inst_CLK_000_PE 3 -1 5 6 0 1 2 3 5 7 -1 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 6 6 0 3 4 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 6 0 1 3 4 5 7 -1 -1 1 0 21 - 348 SM_AMIGA_i_7_ 3 -1 5 5 0 1 3 5 7 -1 -1 15 0 21 - 320 inst_CLK_000_NE 3 -1 5 4 1 3 5 6 -1 -1 1 0 21 - 317 inst_CLK_000_D0 3 -1 5 4 1 3 5 6 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 4 0 2 3 6 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 - 343 SM_AMIGA_6_ 3 -1 5 3 1 5 6 -1 -1 3 0 21 - 327 SM_AMIGA_4_ 3 -1 5 3 1 2 5 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 - 298 SM_AMIGA_5_ 3 -1 1 3 1 5 7 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 325 SM_AMIGA_0_ 3 -1 5 3 1 5 7 -1 -1 2 0 21 - 319 inst_CLK_000_NE_D0 3 -1 1 3 2 3 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 2 3 2 3 5 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 0 2 0 5 -1 -1 7 0 21 - 346 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 328 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 5 0 21 - 347 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 357 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 345 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 3 0 21 - 311 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 2 0 21 - 324 inst_CLK_000_D1 3 -1 6 2 1 5 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 3 2 2 5 -1 -1 1 0 21 - 360 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 359 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 351 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 344 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 356 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 330 RST_DLY_1_ 3 -1 6 1 6 -1 -1 4 0 21 - 353 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 352 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 329 RST_DLY_0_ 3 -1 6 1 6 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 358 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 354 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 350 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 331 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 326 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 349 N_350 3 -1 3 1 5 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 340 CLK_000_N_SYNC_8_ 3 -1 2 1 0 -1 -1 1 0 21 - 339 CLK_000_N_SYNC_7_ 3 -1 2 1 2 -1 -1 1 0 21 - 338 CLK_000_N_SYNC_6_ 3 -1 3 1 2 -1 -1 1 0 21 - 337 CLK_000_N_SYNC_5_ 3 -1 0 1 3 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_4_ 3 -1 0 1 0 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_3_ 3 -1 4 1 0 -1 -1 1 0 21 - 334 CLK_000_N_SYNC_2_ 3 -1 5 1 4 -1 -1 1 0 21 - 333 CLK_000_N_SYNC_1_ 3 -1 1 1 5 -1 -1 1 0 21 - 332 CLK_000_N_SYNC_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 59 A1 1 -1 -1 2 2 3 59 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 6 13 -1 - 10 CLK_000 1 -1 -1 1 5 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -123 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 346 7 2 4 6 79 -1 3 0 21 - 68 A0 5 347 6 2 1 2 68 -1 3 0 21 - 70 RW 5 352 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 - 8 IPL_030_2_ 5 345 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 354 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 353 1 0 6 -1 10 0 21 - 80 DSACK1 5 350 7 0 80 -1 4 0 21 - 82 BGACK_030 5 349 7 0 82 -1 3 0 21 - 34 VMA 5 351 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 348 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 349 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 3 0 21 - 318 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 1 6 0 3 4 5 6 7 -1 -1 1 0 21 - 320 inst_CLK_000_PE 3 -1 5 5 0 2 3 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 5 0 3 4 5 7 -1 -1 1 0 21 - 341 SM_AMIGA_i_7_ 3 -1 5 4 0 3 5 7 -1 -1 14 0 21 - 296 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 - 338 SM_AMIGA_1_ 3 -1 2 3 2 5 7 -1 -1 3 0 21 - 336 SM_AMIGA_6_ 3 -1 5 3 1 2 5 -1 -1 3 0 21 - 298 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 295 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 293 cpu_est_3_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 342 inst_CLK_000_NE 3 -1 5 3 2 3 5 -1 -1 1 0 21 - 321 inst_CLK_000_NE_D0 3 -1 5 3 2 3 5 -1 -1 1 0 21 - 314 inst_CLK_000_D0 3 -1 5 3 3 5 6 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 305 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 9 0 21 - 304 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 0 2 0 5 -1 -1 7 0 21 - 339 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 329 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 340 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 351 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 328 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 2 0 6 -1 -1 3 0 21 - 327 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 326 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 2 0 6 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 294 cpu_est_0_ 3 -1 2 2 2 3 -1 -1 2 0 21 - 325 inst_CLK_000_D1 3 -1 6 2 4 5 -1 -1 1 0 21 - 315 inst_CLK_000_D5 3 -1 4 2 4 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 1 2 2 3 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 2 0 6 -1 -1 1 0 21 - 354 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 353 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 345 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 337 inst_CLK_030_H 3 -1 6 1 6 -1 -1 8 0 21 - 350 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 332 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 347 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 346 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 331 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 352 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 343 N_192 3 -1 2 1 5 -1 -1 2 0 21 - 333 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 335 inst_CLK_000_D4 3 -1 7 1 4 -1 -1 1 0 21 - 334 inst_CLK_000_D3 3 -1 1 1 7 -1 -1 1 0 21 - 330 inst_CLK_000_D2 3 -1 4 1 1 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 - 319 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 - 317 inst_DTACK_D0 3 -1 1 1 2 -1 -1 1 0 21 - 316 inst_CLK_000_D6 3 -1 4 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 - 63 CLK_030 1 -1 -1 2 6 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 0 59 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 1 13 -1 - 10 CLK_000 1 -1 -1 1 5 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -129 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 352 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 0 2 6 31 -1 1 0 21 - 68 A0 5 353 6 2 5 6 68 -1 3 0 21 - 70 RW 5 358 6 2 1 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 2 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 6 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 6 69 -1 1 0 21 - 8 IPL_030_2_ 5 351 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 360 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 359 1 0 6 -1 10 0 21 - 80 DSACK1 5 356 7 0 80 -1 4 0 21 - 82 BGACK_030 5 355 7 0 82 -1 3 0 21 - 34 VMA 5 357 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 354 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 355 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 3 0 21 - 315 inst_RESET_OUT 3 -1 6 6 0 1 3 4 6 7 -1 -1 2 0 21 - 318 inst_CLK_000_PE 3 -1 5 6 0 1 2 3 5 7 -1 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 6 6 0 3 4 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 6 0 1 3 4 5 7 -1 -1 1 0 21 - 348 SM_AMIGA_i_7_ 3 -1 5 5 0 1 3 5 7 -1 -1 15 0 21 - 320 inst_CLK_000_NE 3 -1 5 4 1 3 5 6 -1 -1 1 0 21 - 317 inst_CLK_000_D0 3 -1 5 4 1 3 5 6 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 4 0 2 3 6 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 - 343 SM_AMIGA_6_ 3 -1 5 3 1 5 6 -1 -1 3 0 21 - 327 SM_AMIGA_4_ 3 -1 5 3 1 2 5 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 - 298 SM_AMIGA_5_ 3 -1 1 3 1 5 7 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 325 SM_AMIGA_0_ 3 -1 5 3 1 5 7 -1 -1 2 0 21 - 319 inst_CLK_000_NE_D0 3 -1 1 3 2 3 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 2 3 2 3 5 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 0 2 0 5 -1 -1 7 0 21 - 346 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 328 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 5 0 21 - 347 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 357 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 345 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 3 0 21 - 311 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 2 0 21 - 324 inst_CLK_000_D1 3 -1 6 2 1 5 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 3 2 2 5 -1 -1 1 0 21 - 360 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 359 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 351 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 344 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 356 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 330 RST_DLY_1_ 3 -1 6 1 6 -1 -1 4 0 21 - 353 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 352 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 329 RST_DLY_0_ 3 -1 6 1 6 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 358 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 354 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 350 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 331 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 326 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 349 N_350 3 -1 3 1 5 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 340 CLK_000_N_SYNC_8_ 3 -1 2 1 0 -1 -1 1 0 21 - 339 CLK_000_N_SYNC_7_ 3 -1 2 1 2 -1 -1 1 0 21 - 338 CLK_000_N_SYNC_6_ 3 -1 3 1 2 -1 -1 1 0 21 - 337 CLK_000_N_SYNC_5_ 3 -1 0 1 3 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_4_ 3 -1 0 1 0 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_3_ 3 -1 4 1 0 -1 -1 1 0 21 - 334 CLK_000_N_SYNC_2_ 3 -1 5 1 4 -1 -1 1 0 21 - 333 CLK_000_N_SYNC_1_ 3 -1 1 1 5 -1 -1 1 0 21 - 332 CLK_000_N_SYNC_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 59 A1 1 -1 -1 2 2 3 59 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 6 13 -1 - 10 CLK_000 1 -1 -1 1 5 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 70 RW 5 371 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 366 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 inst_CLK_000_PE 3 -1 6 5 1 2 3 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 301 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 328 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 1 3 0 1 2 -1 -1 2 0 21 - 319 inst_CLK_000_D0 3 -1 1 3 3 4 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 331 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 330 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 322 inst_CLK_000_NE 3 -1 6 2 3 5 -1 -1 1 0 21 - 318 inst_CLK_000_D1 3 -1 4 2 4 5 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 5 2 0 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 333 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 293 N_317_i 3 -1 5 1 5 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 332 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 334 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 6 1 5 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 1 1 3 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_7_ 3 -1 1 1 6 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_4_ 3 -1 6 1 6 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_3_ 3 -1 4 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_2_ 3 -1 6 1 4 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_1_ 3 -1 1 1 6 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 6 1 6 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 70 RW 5 371 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 366 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 inst_CLK_000_PE 3 -1 6 5 1 2 3 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 301 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 328 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 1 3 0 1 2 -1 -1 2 0 21 - 319 inst_CLK_000_D0 3 -1 1 3 3 4 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 331 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 330 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 322 inst_CLK_000_NE 3 -1 6 2 3 5 -1 -1 1 0 21 - 318 inst_CLK_000_D1 3 -1 4 2 4 5 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 5 2 0 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 333 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 293 N_317_i 3 -1 5 1 5 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 332 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 334 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 6 1 5 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 1 1 3 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_7_ 3 -1 1 1 6 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_4_ 3 -1 6 1 6 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_3_ 3 -1 4 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_2_ 3 -1 6 1 4 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_1_ 3 -1 1 1 6 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 6 1 6 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -141 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 363 7 3 0 4 6 79 -1 3 0 21 - 68 A0 5 364 6 2 5 6 68 -1 3 0 21 - 70 RW 5 371 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 368 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 367 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 32 AMIGA_ADDR_ENABLE 5 372 3 0 32 -1 4 0 21 - 82 BGACK_030 5 366 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 365 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 366 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 0 6 0 2 3 4 6 7 -1 -1 1 0 21 - 322 inst_CLK_000_NE 3 -1 6 5 1 2 3 5 6 -1 -1 1 0 21 - 320 inst_CLK_000_PE 3 -1 1 5 1 2 3 5 7 -1 -1 1 0 21 - 301 inst_AS_030_D0 3 -1 7 5 0 2 3 4 7 -1 -1 1 0 21 - 328 SM_AMIGA_6_ 3 -1 2 4 2 3 5 6 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 3 2 3 7 -1 -1 14 0 21 - 293 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 357 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 329 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 319 inst_CLK_000_D0 3 -1 0 3 2 3 4 -1 -1 1 0 21 - 318 inst_CLK_000_D1 3 -1 4 3 2 3 4 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 3 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 2 3 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 358 SM_AMIGA_3_ 3 -1 5 2 2 5 -1 -1 5 0 21 - 332 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 359 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 4 0 21 - 334 RST_DLY_1_ 3 -1 6 2 1 6 -1 -1 4 0 21 - 370 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 333 RST_DLY_0_ 3 -1 1 2 1 6 -1 -1 3 0 21 - 331 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 1 2 0 1 -1 -1 3 0 21 - 335 RST_DLY_2_ 3 -1 6 2 1 6 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 1 2 0 1 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 3 2 2 3 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_9_ 3 -1 5 2 3 7 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 6 2 3 6 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 7 2 3 5 -1 -1 1 0 21 - 368 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 367 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 1 2 -1 -1 7 0 21 - 372 RN_AMIGA_ADDR_ENABLE 3 32 3 1 3 32 -1 4 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 298 N_257_i 3 -1 2 1 5 -1 -1 4 0 21 - 364 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 363 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 365 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 330 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21 - 355 CLK_000_N_SYNC_10_ 3 -1 3 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_8_ 3 -1 0 1 5 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_7_ 3 -1 6 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_6_ 3 -1 6 1 6 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_5_ 3 -1 6 1 6 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_4_ 3 -1 1 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_8_ 3 -1 4 1 1 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_7_ 3 -1 1 1 4 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_6_ 3 -1 6 1 1 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_5_ 3 -1 5 1 6 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_4_ 3 -1 5 1 5 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_3_ 3 -1 1 1 5 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_1_ 3 -1 0 1 0 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 327 inst_CLK_000_NE_D0 3 -1 3 1 5 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 1 1 1 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 5 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 59 A1 1 -1 -1 1 3 59 -1 - 35 VPA 1 -1 -1 1 7 35 -1 - 29 DTACK 1 -1 -1 1 5 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 70 RW 5 371 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 366 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 inst_CLK_000_PE 3 -1 6 5 1 2 3 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 301 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 328 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 1 3 0 1 2 -1 -1 2 0 21 - 319 inst_CLK_000_D0 3 -1 1 3 3 4 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 331 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 330 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 322 inst_CLK_000_NE 3 -1 6 2 3 5 -1 -1 1 0 21 - 318 inst_CLK_000_D1 3 -1 4 2 4 5 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 5 2 0 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 333 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 293 N_317_i 3 -1 5 1 5 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 332 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 334 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 6 1 5 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 1 1 3 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_7_ 3 -1 1 1 6 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_4_ 3 -1 6 1 6 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_3_ 3 -1 4 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_2_ 3 -1 6 1 4 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_1_ 3 -1 1 1 6 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 6 1 6 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 70 RW 5 371 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 366 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 inst_CLK_000_PE 3 -1 6 5 1 2 3 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 301 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 328 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 1 3 0 1 2 -1 -1 2 0 21 - 319 CLK_000_D_0_ 3 -1 1 3 3 4 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 331 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 330 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 322 inst_CLK_000_NE 3 -1 6 2 3 5 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 4 2 4 5 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 5 2 0 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 333 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 293 N_317_i 3 -1 5 1 5 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 332 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 334 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 6 1 5 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 1 1 3 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_7_ 3 -1 1 1 6 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_4_ 3 -1 6 1 6 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_3_ 3 -1 4 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_2_ 3 -1 6 1 4 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_1_ 3 -1 1 1 6 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 6 1 6 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -129 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 352 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 0 2 6 31 -1 1 0 21 - 68 A0 5 353 6 2 5 6 68 -1 3 0 21 - 70 RW 5 358 6 2 1 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 2 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 6 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 6 69 -1 1 0 21 - 8 IPL_030_2_ 5 351 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 360 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 359 1 0 6 -1 10 0 21 - 80 DSACK1 5 356 7 0 80 -1 4 0 21 - 82 BGACK_030 5 355 7 0 82 -1 3 0 21 - 34 VMA 5 357 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 354 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 355 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 3 0 21 - 315 inst_RESET_OUT 3 -1 6 6 0 1 3 4 6 7 -1 -1 2 0 21 - 318 inst_CLK_000_PE 3 -1 5 6 0 1 2 3 5 7 -1 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 6 6 0 3 4 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 6 0 1 3 4 5 7 -1 -1 1 0 21 - 348 SM_AMIGA_i_7_ 3 -1 5 5 0 1 3 5 7 -1 -1 15 0 21 - 320 inst_CLK_000_NE 3 -1 5 4 1 3 5 6 -1 -1 1 0 21 - 317 CLK_000_D_0_ 3 -1 5 4 1 3 5 6 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 4 0 2 3 6 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 - 343 SM_AMIGA_6_ 3 -1 5 3 1 5 6 -1 -1 3 0 21 - 327 SM_AMIGA_4_ 3 -1 5 3 1 2 5 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 - 298 SM_AMIGA_5_ 3 -1 1 3 1 5 7 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 325 SM_AMIGA_0_ 3 -1 5 3 1 5 7 -1 -1 2 0 21 - 319 inst_CLK_000_NE_D0 3 -1 1 3 2 3 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 2 3 2 3 5 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 0 2 0 5 -1 -1 7 0 21 - 346 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 328 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 5 0 21 - 347 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 357 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 345 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 3 0 21 - 311 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 2 0 21 - 324 CLK_000_D_1_ 3 -1 6 2 1 5 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 3 2 2 5 -1 -1 1 0 21 - 360 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 359 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 351 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 344 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 356 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 330 RST_DLY_1_ 3 -1 6 1 6 -1 -1 4 0 21 - 353 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 352 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 329 RST_DLY_0_ 3 -1 6 1 6 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 358 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 354 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 350 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 331 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 326 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 349 N_350 3 -1 3 1 5 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 340 CLK_000_N_SYNC_8_ 3 -1 2 1 0 -1 -1 1 0 21 - 339 CLK_000_N_SYNC_7_ 3 -1 2 1 2 -1 -1 1 0 21 - 338 CLK_000_N_SYNC_6_ 3 -1 3 1 2 -1 -1 1 0 21 - 337 CLK_000_N_SYNC_5_ 3 -1 0 1 3 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_4_ 3 -1 0 1 0 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_3_ 3 -1 4 1 0 -1 -1 1 0 21 - 334 CLK_000_N_SYNC_2_ 3 -1 5 1 4 -1 -1 1 0 21 - 333 CLK_000_N_SYNC_1_ 3 -1 1 1 5 -1 -1 1 0 21 - 332 CLK_000_N_SYNC_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 59 A1 1 -1 -1 2 2 3 59 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 6 13 -1 - 10 CLK_000 1 -1 -1 1 5 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -127 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 350 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 68 A0 5 351 6 2 1 6 68 -1 3 0 21 - 70 RW 5 356 6 2 0 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 349 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 358 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 357 1 0 6 -1 10 0 21 - 80 DSACK1 5 354 7 0 80 -1 4 0 21 - 82 BGACK_030 5 353 7 0 82 -1 3 0 21 - 34 VMA 5 355 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 352 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 353 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 5 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 347 SM_AMIGA_i_7_ 3 -1 2 5 0 2 3 5 7 -1 -1 14 0 21 - 301 inst_AS_030_D0 3 -1 7 5 0 3 4 5 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 1 4 1 2 3 6 -1 -1 4 0 21 - 342 SM_AMIGA_6_ 3 -1 2 4 0 1 2 6 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 1 4 1 2 3 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 2 4 1 2 3 6 -1 -1 3 0 21 - 322 inst_CLK_000_NE 3 -1 1 4 0 2 3 6 -1 -1 1 0 21 - 321 inst_CLK_000_NE_D0 3 -1 6 4 1 2 3 5 -1 -1 1 0 21 - 320 inst_CLK_000_PE 3 -1 4 4 0 2 3 7 -1 -1 1 0 21 - 319 CLK_000_D_0_ 3 -1 1 4 1 2 3 4 -1 -1 1 0 21 - 326 SM_AMIGA_0_ 3 -1 2 3 0 2 7 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 3 1 2 3 -1 -1 2 0 21 - 318 CLK_000_D_1_ 3 -1 4 3 1 2 4 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 - 329 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 5 0 21 - 355 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 344 SM_AMIGA_1_ 3 -1 2 2 2 7 -1 -1 3 0 21 - 328 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 327 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 311 inst_VPA_D 3 -1 3 2 2 3 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 2 5 6 -1 -1 1 0 21 - 358 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 357 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 343 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 345 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 354 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 346 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 4 0 21 - 331 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 293 N_317_i 3 -1 2 1 2 -1 -1 4 0 21 - 351 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 350 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 330 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 356 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 352 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 348 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 332 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 341 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 340 CLK_000_N_SYNC_9_ 3 -1 5 1 7 -1 -1 1 0 21 - 339 CLK_000_N_SYNC_8_ 3 -1 0 1 5 -1 -1 1 0 21 - 338 CLK_000_N_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21 - 337 CLK_000_N_SYNC_6_ 3 -1 5 1 5 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_5_ 3 -1 6 1 5 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_4_ 3 -1 5 1 6 -1 -1 1 0 21 - 334 CLK_000_N_SYNC_3_ 3 -1 1 1 5 -1 -1 1 0 21 - 333 CLK_000_N_SYNC_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 325 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 324 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 5 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 6 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 5 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 5 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -127 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 1 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 350 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 356 6 2 1 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 351 6 1 3 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 - 8 IPL_030_2_ 5 349 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 358 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 357 1 0 6 -1 10 0 21 - 80 DSACK1 5 354 7 0 80 -1 4 0 21 - 82 BGACK_030 5 353 7 0 82 -1 3 0 21 - 34 VMA 5 355 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 352 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 353 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 315 inst_RESET_OUT 3 -1 2 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 319 inst_CLK_000_PE 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 6 6 0 3 4 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 4 6 1 3 4 5 6 7 -1 -1 1 0 21 - 321 inst_CLK_000_NE 3 -1 5 5 1 2 3 5 6 -1 -1 1 0 21 - 347 SM_AMIGA_i_7_ 3 -1 5 4 1 3 5 7 -1 -1 14 0 21 - 342 SM_AMIGA_6_ 3 -1 5 4 1 3 5 6 -1 -1 3 0 21 - 298 SM_AMIGA_5_ 3 -1 6 4 1 5 6 7 -1 -1 3 0 21 - 293 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 - 327 SM_AMIGA_4_ 3 -1 1 3 1 2 5 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 325 SM_AMIGA_0_ 3 -1 5 3 1 5 7 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 7 3 1 6 7 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 4 3 0 5 6 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 345 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 328 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 5 0 21 - 346 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 355 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 344 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 326 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 2 0 21 - 320 inst_CLK_000_NE_D0 3 -1 5 2 2 5 -1 -1 1 0 21 - 318 CLK_000_D_0_ 3 -1 0 2 3 5 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 1 2 2 3 -1 -1 1 0 21 - 358 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 357 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 343 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 302 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 7 0 21 - 354 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 331 RST_DLY_1_ 3 -1 2 1 2 -1 -1 4 0 21 - 351 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 350 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 329 RST_DLY_0_ 3 -1 2 1 2 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 356 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 352 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 348 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 332 RST_DLY_2_ 3 -1 2 1 2 -1 -1 2 0 21 - 330 N_182_i 3 -1 2 1 5 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 341 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 340 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 339 CLK_000_N_SYNC_8_ 3 -1 1 1 0 -1 -1 1 0 21 - 338 CLK_000_N_SYNC_7_ 3 -1 5 1 1 -1 -1 1 0 21 - 337 CLK_000_N_SYNC_6_ 3 -1 2 1 5 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_5_ 3 -1 2 1 2 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_4_ 3 -1 6 1 2 -1 -1 1 0 21 - 334 CLK_000_N_SYNC_3_ 3 -1 1 1 6 -1 -1 1 0 21 - 333 CLK_000_N_SYNC_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 4 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 317 CLK_000_D_1_ 3 -1 5 1 5 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 7 1 7 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 4 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 4 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A1 1 -1 -1 1 0 59 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 4 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 6 13 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -130 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 6 0 1 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 353 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 31 UDS_000 5 -1 3 3 0 2 6 31 -1 1 0 21 - 70 RW 5 359 6 2 0 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 2 30 -1 1 0 21 - 68 A0 5 354 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 352 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 361 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 360 1 0 6 -1 10 0 21 - 80 DSACK1 5 357 7 0 80 -1 4 0 21 - 82 BGACK_030 5 356 7 0 82 -1 3 0 21 - 34 VMA 5 358 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 355 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 356 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 315 inst_RESET_OUT 3 -1 6 6 0 1 3 4 6 7 -1 -1 2 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 2 6 0 3 4 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 4 6 0 1 3 4 6 7 -1 -1 1 0 21 - 350 SM_AMIGA_i_7_ 3 -1 5 5 0 3 5 6 7 -1 -1 14 0 21 - 322 inst_CLK_000_NE 3 -1 5 5 0 3 5 6 7 -1 -1 1 0 21 - 320 inst_CLK_000_PE 3 -1 5 5 0 2 3 5 7 -1 -1 1 0 21 - 298 SM_AMIGA_5_ 3 -1 0 4 0 1 5 7 -1 -1 3 0 21 - 318 CLK_000_D_0_ 3 -1 6 4 0 2 3 5 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 344 SM_AMIGA_6_ 3 -1 5 3 0 1 5 -1 -1 3 0 21 - 328 SM_AMIGA_4_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 293 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 326 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 2 0 21 - 321 inst_CLK_000_NE_D0 3 -1 7 3 2 3 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 3 2 5 6 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 6 2 5 6 -1 -1 7 0 21 - 347 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 329 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 5 0 21 - 349 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 358 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 346 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 327 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 2 0 21 - 317 CLK_000_D_1_ 3 -1 2 2 0 5 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 3 2 0 3 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 1 2 2 3 -1 -1 1 0 21 - 361 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 360 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 352 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 345 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 357 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 331 RST_DLY_1_ 3 -1 6 1 6 -1 -1 4 0 21 - 354 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 353 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 330 RST_DLY_0_ 3 -1 6 1 6 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 359 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 355 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 351 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 348 N_187_i 3 -1 2 1 5 -1 -1 2 0 21 - 332 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 343 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_9_ 3 -1 1 1 7 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_8_ 3 -1 1 1 1 -1 -1 1 0 21 - 340 CLK_000_N_SYNC_7_ 3 -1 5 1 1 -1 -1 1 0 21 - 339 CLK_000_N_SYNC_6_ 3 -1 5 1 5 -1 -1 1 0 21 - 338 CLK_000_N_SYNC_5_ 3 -1 2 1 5 -1 -1 1 0 21 - 337 CLK_000_N_SYNC_4_ 3 -1 6 1 2 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_3_ 3 -1 3 1 6 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_2_ 3 -1 5 1 3 -1 -1 1 0 21 - 334 CLK_000_N_SYNC_1_ 3 -1 1 1 5 -1 -1 1 0 21 - 333 CLK_000_N_SYNC_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 325 IPL_D0_2_ 3 -1 4 1 1 -1 -1 1 0 21 - 324 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 323 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 319 CLK_000_D_2_ 3 -1 5 1 5 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 4 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 6 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 6 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 6 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 6 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 6 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 6 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 4 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 59 A1 1 -1 -1 2 2 5 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 4 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 2 13 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 70 RW 5 371 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 366 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 inst_CLK_000_PE 3 -1 6 5 1 2 3 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 301 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 328 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 1 3 0 1 2 -1 -1 2 0 21 - 319 CLK_000_D_0_ 3 -1 1 3 3 4 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 331 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 330 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 327 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 322 inst_CLK_000_NE 3 -1 6 2 3 5 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 4 2 4 5 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 5 2 0 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 333 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 293 N_317_i 3 -1 5 1 5 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 332 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 334 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 354 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_6_ 3 -1 6 1 5 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_4_ 3 -1 1 1 3 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_7_ 3 -1 1 1 6 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_4_ 3 -1 6 1 6 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_3_ 3 -1 4 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_2_ 3 -1 6 1 4 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_1_ 3 -1 1 1 6 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21 - 326 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 325 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 324 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 323 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_9_ 3 -1 6 1 6 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -131 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 - 79 RW_000 5 354 7 3 0 4 6 79 -1 3 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 68 A0 5 355 6 2 1 3 68 -1 3 0 21 - 70 RW 5 360 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 353 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 362 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 361 1 0 6 -1 10 0 21 - 80 DSACK1 5 358 7 0 80 -1 4 0 21 - 82 BGACK_030 5 357 7 0 82 -1 3 0 21 - 34 VMA 5 359 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 356 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 357 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 1 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 315 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 inst_CLK_000_PE 3 -1 0 6 0 1 2 3 5 7 -1 -1 1 0 21 - 322 inst_CLK_000_NE 3 -1 3 5 1 2 3 5 6 -1 -1 1 0 21 - 350 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 345 SM_AMIGA_6_ 3 -1 5 4 1 2 3 5 -1 -1 3 0 21 - 318 CLK_000_D_0_ 3 -1 0 4 0 3 4 5 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 347 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 - 298 SM_AMIGA_5_ 3 -1 2 3 2 5 7 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 293 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 326 SM_AMIGA_0_ 3 -1 2 3 2 5 7 -1 -1 2 0 21 - 317 CLK_000_D_1_ 3 -1 4 3 0 4 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 3 3 1 6 7 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 3 0 2 6 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 329 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 331 RST_DLY_1_ 3 -1 6 2 1 6 -1 -1 4 0 21 - 359 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 330 RST_DLY_0_ 3 -1 1 2 1 6 -1 -1 3 0 21 - 328 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 332 RST_DLY_2_ 3 -1 1 2 1 6 -1 -1 2 0 21 - 327 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 1 2 0 1 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 342 CLK_000_N_SYNC_9_ 3 -1 5 2 6 7 -1 -1 1 0 21 - 321 inst_CLK_000_NE_D0 3 -1 1 2 3 5 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 6 2 3 6 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21 - 362 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 361 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 353 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 346 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 348 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 358 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 351 N_232 3 -1 5 1 5 -1 -1 4 0 21 - 349 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 355 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 354 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 360 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 356 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 352 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 344 CLK_000_N_SYNC_11_ 3 -1 7 1 3 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_10_ 3 -1 6 1 7 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_8_ 3 -1 2 1 5 -1 -1 1 0 21 - 340 CLK_000_N_SYNC_7_ 3 -1 0 1 2 -1 -1 1 0 21 - 339 CLK_000_N_SYNC_6_ 3 -1 7 1 0 -1 -1 1 0 21 - 338 CLK_000_N_SYNC_5_ 3 -1 4 1 7 -1 -1 1 0 21 - 337 CLK_000_N_SYNC_4_ 3 -1 2 1 4 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_3_ 3 -1 0 1 2 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_2_ 3 -1 6 1 0 -1 -1 1 0 21 - 334 CLK_000_N_SYNC_1_ 3 -1 0 1 6 -1 -1 1 0 21 - 333 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 325 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 - 324 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 323 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 319 CLK_000_D_2_ 3 -1 4 1 0 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 59 A1 1 -1 -1 2 0 6 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 1 13 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -130 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 353 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 359 6 2 1 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 354 6 1 6 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 6 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 6 69 -1 1 0 21 - 8 IPL_030_2_ 5 352 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 361 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 360 1 0 6 -1 10 0 21 - 80 DSACK1 5 357 7 0 80 -1 4 0 21 - 82 BGACK_030 5 356 7 0 82 -1 3 0 21 - 34 VMA 5 358 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 355 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 356 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 5 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 inst_CLK_000_PE 3 -1 5 6 0 1 2 3 5 7 -1 -1 1 0 21 - 322 inst_CLK_000_NE 3 -1 0 5 0 1 2 3 5 -1 -1 1 0 21 - 301 inst_AS_030_D0 3 -1 7 5 1 3 4 5 7 -1 -1 1 0 21 - 350 SM_AMIGA_i_7_ 3 -1 2 4 1 3 5 7 -1 -1 15 0 21 - 347 SM_AMIGA_1_ 3 -1 1 4 0 1 2 7 -1 -1 3 0 21 - 345 SM_AMIGA_6_ 3 -1 5 4 1 2 5 6 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 5 4 1 2 5 7 -1 -1 3 0 21 - 326 SM_AMIGA_0_ 3 -1 0 4 0 1 2 7 -1 -1 2 0 21 - 294 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 - 309 SIZE_DMA_0_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 319 CLK_000_D_0_ 3 -1 0 3 2 3 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 0 5 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 - 329 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 5 0 21 - 349 SM_AMIGA_2_ 3 -1 2 2 1 2 -1 -1 4 0 21 - 358 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 328 SM_AMIGA_4_ 3 -1 1 2 1 2 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 327 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 2 2 2 3 -1 -1 2 0 21 - 318 CLK_000_D_1_ 3 -1 5 2 2 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 6 2 2 3 -1 -1 1 0 21 - 361 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 360 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 352 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 346 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 348 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 357 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 331 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 354 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 353 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 330 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 359 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 355 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 351 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 332 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 344 CLK_000_N_SYNC_11_ 3 -1 7 1 0 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_9_ 3 -1 1 1 7 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_8_ 3 -1 5 1 1 -1 -1 1 0 21 - 340 CLK_000_N_SYNC_7_ 3 -1 1 1 5 -1 -1 1 0 21 - 339 CLK_000_N_SYNC_6_ 3 -1 6 1 1 -1 -1 1 0 21 - 338 CLK_000_N_SYNC_5_ 3 -1 5 1 6 -1 -1 1 0 21 - 337 CLK_000_N_SYNC_4_ 3 -1 4 1 5 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_3_ 3 -1 3 1 4 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_2_ 3 -1 3 1 3 -1 -1 1 0 21 - 334 CLK_000_N_SYNC_1_ 3 -1 6 1 3 -1 -1 1 0 21 - 333 CLK_000_N_SYNC_0_ 3 -1 2 1 6 -1 -1 1 0 21 - 325 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 324 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 323 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 321 inst_CLK_000_NE_D0 3 -1 5 1 2 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21 - 293 N_348_i 3 -1 2 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 59 A1 1 -1 -1 2 0 5 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 10 CLK_000 1 -1 -1 2 0 5 10 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 5 13 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -130 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 2 3 5 7 40 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 79 RW_000 5 353 7 3 2 4 6 79 -1 5 0 21 - 70 RW 5 359 6 2 0 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 - 68 A0 5 354 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 352 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 361 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 360 1 0 6 -1 10 0 21 - 80 DSACK1 5 357 7 0 80 -1 4 0 21 - 82 BGACK_030 5 356 7 0 82 -1 3 0 21 - 34 VMA 5 358 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 355 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 356 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 3 6 0 3 4 5 6 7 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 7 5 0 2 3 5 7 -1 -1 1 0 21 - 317 CLK_000_D_0_ 3 -1 7 5 0 2 3 5 7 -1 -1 1 0 21 - 301 inst_AS_030_D0 3 -1 7 5 0 2 3 4 7 -1 -1 1 0 21 - 344 SM_AMIGA_6_ 3 -1 3 4 0 1 3 5 -1 -1 3 1 21 - 299 SM_AMIGA_5_ 3 -1 5 4 0 2 5 7 -1 -1 3 0 21 - 303 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21 - 323 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 4 0 21 - 297 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 296 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 349 SM_AMIGA_i_7_ 3 -1 5 3 0 3 7 -1 -1 2 0 21 - 326 CLK_000_N_SYNC_12_ 3 -1 5 3 1 3 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 306 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 305 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 325 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 5 0 21 - 358 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 346 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 342 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 1 21 - 313 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 324 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 343 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 340 CLK_000_N_SYNC_10_ 3 -1 7 2 1 7 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 2 2 3 5 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 2 0 6 -1 -1 1 0 21 - 351 SM_AMIGA_i_7__0 3 -1 5 1 5 -1 -1 15 0 21 - 361 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 360 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 352 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 345 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 353 RN_RW_000 3 79 7 1 7 79 -1 5 0 21 - 348 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 - 347 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 357 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 328 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 307 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 4 0 21 - 293 N_230_i 3 -1 5 1 5 -1 -1 4 0 21 - 354 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 327 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 359 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 355 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 350 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 329 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 341 CLK_000_N_SYNC_11_ 3 -1 1 1 5 -1 -1 1 0 21 - 339 CLK_000_N_SYNC_9_ 3 -1 6 1 7 -1 -1 1 0 21 - 338 CLK_000_N_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 337 CLK_000_N_SYNC_7_ 3 -1 6 1 6 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_6_ 3 -1 2 1 6 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_5_ 3 -1 6 1 2 -1 -1 1 0 21 - 334 CLK_000_N_SYNC_4_ 3 -1 2 1 6 -1 -1 1 0 21 - 333 CLK_000_N_SYNC_3_ 3 -1 5 1 2 -1 -1 1 0 21 - 332 CLK_000_N_SYNC_2_ 3 -1 2 1 5 -1 -1 1 0 21 - 331 CLK_000_N_SYNC_1_ 3 -1 4 1 2 -1 -1 1 0 21 - 330 CLK_000_N_SYNC_0_ 3 -1 3 1 4 -1 -1 1 0 21 - 322 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 321 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 320 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 319 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21 - 308 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 1 1 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 10 CLK_000 1 -1 -1 5 0 2 3 5 7 10 -1 - 96 A_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 2 7 63 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 6 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 3 13 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 70 RW 5 371 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 366 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 CLK_000_P_SYNC_10_ 3 -1 6 5 1 2 3 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 301 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 324 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 1 3 0 1 2 -1 -1 2 0 21 - 319 CLK_000_D_0_ 3 -1 1 3 3 4 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 327 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 326 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 325 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 354 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 328 CLK_000_N_SYNC_12_ 3 -1 6 2 3 5 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 4 2 4 5 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 5 2 0 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 330 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 293 N_317_i 3 -1 5 1 5 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 329 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 331 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 353 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_8_ 3 -1 0 1 0 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_6_ 3 -1 6 1 5 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_4_ 3 -1 1 1 3 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_9_ 3 -1 6 1 6 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_8_ 3 -1 1 1 6 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_7_ 3 -1 0 1 1 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_6_ 3 -1 6 1 0 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_5_ 3 -1 6 1 6 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_4_ 3 -1 4 1 6 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_3_ 3 -1 6 1 4 -1 -1 1 0 21 - 334 CLK_000_P_SYNC_2_ 3 -1 1 1 6 -1 -1 1 0 21 - 333 CLK_000_P_SYNC_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 332 CLK_000_P_SYNC_0_ 3 -1 4 1 6 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -138 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 363 7 2 4 6 79 -1 3 0 21 - 70 RW 5 369 6 2 0 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 68 A0 5 364 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 - 8 IPL_030_2_ 5 360 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 362 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 361 1 0 6 -1 10 0 21 - 80 DSACK1 5 367 7 0 80 -1 4 0 21 - 82 BGACK_030 5 366 7 0 82 -1 3 0 21 - 34 VMA 5 368 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 365 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 366 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 0 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 CLK_000_P_SYNC_10_ 3 -1 2 5 0 3 5 6 7 -1 -1 1 0 21 - 301 inst_AS_030_D0 3 -1 7 5 0 2 3 4 7 -1 -1 1 0 21 - 358 SM_AMIGA_i_7_ 3 -1 5 4 0 2 3 7 -1 -1 14 0 21 - 299 SM_AMIGA_5_ 3 -1 5 4 0 2 5 7 -1 -1 2 1 21 - 303 inst_AS_030_000_SYNC 3 -1 2 3 0 2 5 -1 -1 7 0 21 - 295 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 353 SM_AMIGA_6_ 3 -1 0 3 0 1 5 -1 -1 3 0 21 - 296 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 324 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 2 0 21 - 319 CLK_000_D_0_ 3 -1 3 3 0 3 5 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 0 3 0 3 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 3 3 1 2 6 -1 -1 1 0 21 - 306 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 9 0 21 - 305 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 7 0 21 - 327 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 5 0 21 - 368 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 326 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 355 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 2 1 21 - 325 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 297 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 328 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21 - 362 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 361 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 360 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 354 inst_CLK_030_H 3 -1 6 1 6 -1 -1 8 0 21 - 356 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 367 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 357 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 293 N_212_i 3 -1 5 1 5 -1 -1 4 0 21 - 364 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 363 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 351 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 350 RST_DLY_0_ 3 -1 0 1 0 -1 -1 3 1 21 - 308 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21 - 369 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 365 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 359 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 352 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 349 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_9_ 3 -1 5 1 7 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_8_ 3 -1 6 1 5 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_7_ 3 -1 1 1 6 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_6_ 3 -1 4 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_5_ 3 -1 3 1 4 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_4_ 3 -1 2 1 3 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_3_ 3 -1 7 1 2 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_2_ 3 -1 1 1 7 -1 -1 1 0 21 - 340 CLK_000_N_SYNC_1_ 3 -1 4 1 1 -1 -1 1 0 21 - 339 CLK_000_N_SYNC_0_ 3 -1 5 1 4 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_8_ 3 -1 5 1 2 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_7_ 3 -1 3 1 5 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_6_ 3 -1 6 1 3 -1 -1 1 0 21 - 334 CLK_000_P_SYNC_5_ 3 -1 0 1 6 -1 -1 1 0 21 - 333 CLK_000_P_SYNC_4_ 3 -1 2 1 0 -1 -1 1 0 21 - 332 CLK_000_P_SYNC_3_ 3 -1 3 1 2 -1 -1 1 0 21 - 331 CLK_000_P_SYNC_2_ 3 -1 2 1 3 -1 -1 1 0 21 - 330 CLK_000_P_SYNC_1_ 3 -1 0 1 2 -1 -1 1 0 21 - 329 CLK_000_P_SYNC_0_ 3 -1 0 1 0 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 10 CLK_000 1 -1 -1 3 0 3 5 10 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 63 CLK_030 1 -1 -1 2 6 7 63 -1 - 59 A1 1 -1 -1 2 1 2 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -139 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 362 7 3 0 4 6 79 -1 3 0 21 - 70 RW 5 370 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 365 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 361 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 368 7 0 80 -1 4 0 21 - 82 BGACK_030 5 367 7 0 82 -1 3 0 21 - 34 VMA 5 369 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 366 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 6 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 367 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 3 0 21 - 315 inst_RESET_OUT 3 -1 0 6 0 1 3 4 6 7 -1 -1 2 0 21 - 319 CLK_000_P_SYNC_10_ 3 -1 0 6 0 2 3 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 5 1 2 3 4 7 -1 -1 1 0 21 - 358 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 13 0 21 - 298 SM_AMIGA_5_ 3 -1 5 4 1 2 5 7 -1 -1 2 1 21 - 293 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 353 SM_AMIGA_6_ 3 -1 5 3 1 2 5 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 324 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 323 CLK_000_D_2_ 3 -1 5 3 0 3 5 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 3 3 0 3 5 -1 -1 1 0 21 - 316 CLK_000_D_0_ 3 -1 3 3 0 3 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 327 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 369 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 355 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 2 1 21 - 326 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 2 0 21 - 325 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 6 2 0 6 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 349 inst_CLK_000_NE_D0 3 -1 5 2 3 5 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 2 2 2 6 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 361 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 354 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 359 N_160_i_3 3 -1 5 1 5 -1 -1 6 0 21 - 356 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 357 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 365 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 362 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 351 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 350 RST_DLY_0_ 3 -1 0 1 0 -1 -1 3 1 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 370 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 366 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 360 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 352 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 348 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_9_ 3 -1 0 1 7 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_8_ 3 -1 3 1 0 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_7_ 3 -1 3 1 3 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_6_ 3 -1 1 1 3 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_5_ 3 -1 0 1 1 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_4_ 3 -1 6 1 0 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_3_ 3 -1 1 1 6 -1 -1 1 0 21 - 340 CLK_000_N_SYNC_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 339 CLK_000_N_SYNC_1_ 3 -1 6 1 5 -1 -1 1 0 21 - 338 CLK_000_N_SYNC_0_ 3 -1 3 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_9_ 3 -1 3 1 0 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_8_ 3 -1 7 1 3 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_7_ 3 -1 1 1 7 -1 -1 1 0 21 - 334 CLK_000_P_SYNC_6_ 3 -1 4 1 1 -1 -1 1 0 21 - 333 CLK_000_P_SYNC_5_ 3 -1 4 1 4 -1 -1 1 0 21 - 332 CLK_000_P_SYNC_4_ 3 -1 0 1 4 -1 -1 1 0 21 - 331 CLK_000_P_SYNC_3_ 3 -1 0 1 0 -1 -1 1 0 21 - 330 CLK_000_P_SYNC_2_ 3 -1 0 1 0 -1 -1 1 0 21 - 329 CLK_000_P_SYNC_1_ 3 -1 6 1 0 -1 -1 1 0 21 - 328 CLK_000_P_SYNC_0_ 3 -1 3 1 6 -1 -1 1 0 21 - 322 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 321 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 320 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 59 A1 1 -1 -1 1 6 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 6 13 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -131 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 79 RW_000 5 354 7 3 2 4 6 79 -1 5 0 21 - 81 AS_030 5 -1 7 3 3 4 7 81 -1 1 0 21 - 70 RW 5 360 6 2 0 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 - 68 A0 5 355 6 1 6 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 6 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 6 69 -1 1 0 21 - 8 IPL_030_2_ 5 353 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 362 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 361 1 0 6 -1 10 0 21 - 80 DSACK1 5 358 7 0 80 -1 4 0 21 - 82 BGACK_030 5 357 7 0 82 -1 3 0 21 - 34 VMA 5 359 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 356 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 6 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 357 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 3 0 21 - 315 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 319 CLK_000_D_0_ 3 -1 1 5 0 2 3 5 7 -1 -1 1 0 21 - 317 CLK_000_D_2_ 3 -1 2 5 0 2 3 5 7 -1 -1 1 0 21 - 316 CLK_000_D_1_ 3 -1 7 5 0 2 3 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 3 5 0 1 3 4 7 -1 -1 1 0 21 - 345 SM_AMIGA_6_ 3 -1 2 4 0 2 5 6 -1 -1 4 0 21 - 324 SM_AMIGA_0_ 3 -1 5 4 0 1 5 7 -1 -1 4 0 21 - 350 SM_AMIGA_i_7_ 3 -1 1 4 0 2 3 7 -1 -1 2 0 21 - 298 SM_AMIGA_5_ 3 -1 5 4 0 1 5 7 -1 -1 2 0 21 - 302 inst_AS_030_000_SYNC 3 -1 0 3 0 2 5 -1 -1 7 0 21 - 293 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 296 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_0_ 3 -1 2 3 2 3 5 -1 -1 2 0 21 - 343 inst_CLK_000_NE_D0 3 -1 5 3 2 3 5 -1 -1 1 0 21 - 327 CLK_000_N_SYNC_12_ 3 -1 6 3 1 3 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 3 0 2 6 -1 -1 1 0 21 - 305 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 304 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 326 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 5 0 21 - 344 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 4 0 21 - 322 N_202_i 3 -1 5 2 1 5 -1 -1 4 0 21 - 359 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 347 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 2 0 21 - 325 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 310 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 - 352 SM_AMIGA_i_7__0 3 -1 5 1 1 -1 -1 15 0 21 - 362 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 361 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 353 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 348 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 8 0 21 - 346 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 354 RN_RW_000 3 79 7 1 7 79 -1 5 0 21 - 358 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 329 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 306 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 4 0 21 - 355 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 349 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 1 21 - 328 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 360 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 356 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 351 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 330 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 342 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 340 CLK_000_N_SYNC_9_ 3 -1 1 1 7 -1 -1 1 0 21 - 339 CLK_000_N_SYNC_8_ 3 -1 2 1 1 -1 -1 1 0 21 - 338 CLK_000_N_SYNC_7_ 3 -1 1 1 2 -1 -1 1 0 21 - 337 CLK_000_N_SYNC_6_ 3 -1 3 1 1 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_5_ 3 -1 2 1 3 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_4_ 3 -1 5 1 2 -1 -1 1 0 21 - 334 CLK_000_N_SYNC_3_ 3 -1 6 1 5 -1 -1 1 0 21 - 333 CLK_000_N_SYNC_2_ 3 -1 3 1 6 -1 -1 1 0 21 - 332 CLK_000_N_SYNC_1_ 3 -1 4 1 3 -1 -1 1 0 21 - 331 CLK_000_N_SYNC_0_ 3 -1 7 1 4 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 321 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 - 320 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 - 307 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 1 1 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 63 CLK_030 1 -1 -1 2 2 7 63 -1 - 59 A1 1 -1 -1 2 2 6 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 6 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -130 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 2 3 5 7 40 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 79 RW_000 5 353 7 3 2 4 6 79 -1 5 0 21 - 70 RW 5 359 6 2 0 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 - 68 A0 5 354 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 352 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 361 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 360 1 0 6 -1 10 0 21 - 80 DSACK1 5 357 7 0 80 -1 4 0 21 - 82 BGACK_030 5 356 7 0 82 -1 3 0 21 - 34 VMA 5 358 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 355 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 356 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 3 6 0 3 4 5 6 7 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 7 5 0 2 3 5 7 -1 -1 1 0 21 - 317 CLK_000_D_0_ 3 -1 7 5 0 2 3 5 7 -1 -1 1 0 21 - 301 inst_AS_030_D0 3 -1 7 5 0 2 3 4 7 -1 -1 1 0 21 - 344 SM_AMIGA_6_ 3 -1 3 4 0 1 3 5 -1 -1 3 1 21 - 299 SM_AMIGA_5_ 3 -1 5 4 0 2 5 7 -1 -1 3 0 21 - 303 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21 - 323 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 4 0 21 - 297 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 296 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 349 SM_AMIGA_i_7_ 3 -1 5 3 0 3 7 -1 -1 2 0 21 - 326 CLK_000_N_SYNC_12_ 3 -1 5 3 1 3 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 306 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 305 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 325 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 5 0 21 - 358 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 346 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 342 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 1 21 - 313 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 324 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 343 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 340 CLK_000_N_SYNC_10_ 3 -1 7 2 1 7 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 2 2 3 5 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 2 0 6 -1 -1 1 0 21 - 351 SM_AMIGA_i_7__0 3 -1 5 1 5 -1 -1 15 0 21 - 361 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 360 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 352 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 345 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 353 RN_RW_000 3 79 7 1 7 79 -1 5 0 21 - 348 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 - 347 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 357 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 328 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 307 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 4 0 21 - 293 N_230_i 3 -1 5 1 5 -1 -1 4 0 21 - 354 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 327 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 359 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 355 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 350 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 329 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 341 CLK_000_N_SYNC_11_ 3 -1 1 1 5 -1 -1 1 0 21 - 339 CLK_000_N_SYNC_9_ 3 -1 6 1 7 -1 -1 1 0 21 - 338 CLK_000_N_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 337 CLK_000_N_SYNC_7_ 3 -1 6 1 6 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_6_ 3 -1 2 1 6 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_5_ 3 -1 6 1 2 -1 -1 1 0 21 - 334 CLK_000_N_SYNC_4_ 3 -1 2 1 6 -1 -1 1 0 21 - 333 CLK_000_N_SYNC_3_ 3 -1 5 1 2 -1 -1 1 0 21 - 332 CLK_000_N_SYNC_2_ 3 -1 2 1 5 -1 -1 1 0 21 - 331 CLK_000_N_SYNC_1_ 3 -1 4 1 2 -1 -1 1 0 21 - 330 CLK_000_N_SYNC_0_ 3 -1 3 1 4 -1 -1 1 0 21 - 322 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 321 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 320 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 319 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21 - 308 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 1 1 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 10 CLK_000 1 -1 -1 5 0 2 3 5 7 10 -1 - 96 A_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 2 7 63 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 6 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 3 13 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -129 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 79 RW_000 5 352 7 3 2 4 6 79 -1 5 0 21 - 70 RW 5 358 6 2 0 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 - 68 A0 5 353 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 351 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 360 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 359 1 0 6 -1 10 0 21 - 80 DSACK1 5 356 7 0 80 -1 4 0 21 - 82 BGACK_030 5 355 7 0 82 -1 3 0 21 - 34 VMA 5 357 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 354 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 355 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 348 CLK_000_D_0_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 1 6 0 3 4 5 6 7 -1 -1 1 0 21 - 317 CLK_000_D_1_ 3 -1 6 5 0 2 3 5 7 -1 -1 1 0 21 - 301 inst_AS_030_D0 3 -1 7 5 0 1 3 4 7 -1 -1 1 0 21 - 299 SM_AMIGA_5_ 3 -1 5 4 0 1 5 7 -1 -1 3 0 21 - 347 SM_AMIGA_i_7_ 3 -1 2 4 0 3 5 7 -1 -1 2 0 21 - 322 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 4 0 21 - 297 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 342 SM_AMIGA_6_ 3 -1 5 3 0 1 5 -1 -1 3 1 21 - 296 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 325 CLK_000_N_SYNC_11_ 3 -1 7 3 3 4 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 1 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 0 2 6 -1 -1 1 0 21 - 306 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 305 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 0 2 0 5 -1 -1 7 0 21 - 324 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 5 0 21 - 293 N_225_i 3 -1 5 2 2 5 -1 -1 4 0 21 - 357 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 344 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 340 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 1 21 - 313 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 323 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 341 inst_CLK_000_NE_D0 3 -1 4 2 3 5 -1 -1 1 0 21 - 338 CLK_000_N_SYNC_9_ 3 -1 6 2 6 7 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 4 2 1 4 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 2 2 3 5 -1 -1 1 0 21 - 350 SM_AMIGA_i_7__0 3 -1 5 1 2 -1 -1 15 0 21 - 360 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 359 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 351 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 343 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 352 RN_RW_000 3 79 7 1 7 79 -1 5 0 21 - 346 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 - 345 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 356 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 327 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 307 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 4 0 21 - 353 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 326 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 358 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 354 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 349 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 328 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 339 CLK_000_N_SYNC_10_ 3 -1 6 1 7 -1 -1 1 0 21 - 337 CLK_000_N_SYNC_8_ 3 -1 2 1 6 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_7_ 3 -1 1 1 2 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_6_ 3 -1 2 1 1 -1 -1 1 0 21 - 334 CLK_000_N_SYNC_5_ 3 -1 1 1 2 -1 -1 1 0 21 - 333 CLK_000_N_SYNC_4_ 3 -1 6 1 1 -1 -1 1 0 21 - 332 CLK_000_N_SYNC_3_ 3 -1 3 1 6 -1 -1 1 0 21 - 331 CLK_000_N_SYNC_2_ 3 -1 4 1 3 -1 -1 1 0 21 - 330 CLK_000_N_SYNC_1_ 3 -1 1 1 4 -1 -1 1 0 21 - 329 CLK_000_N_SYNC_0_ 3 -1 7 1 1 -1 -1 1 0 21 - 321 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 320 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 319 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 5 1 5 -1 -1 1 0 21 - 308 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 1 1 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 10 CLK_000 1 -1 -1 5 0 2 3 5 7 10 -1 - 96 A_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 - 63 CLK_030 1 -1 -1 2 2 7 63 -1 - 59 A1 1 -1 -1 2 2 6 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 5 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 1 13 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -138 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 363 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 369 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 364 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 361 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 362 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 360 1 0 6 -1 10 0 21 - 80 DSACK1 5 367 7 0 80 -1 4 0 21 - 82 BGACK_030 5 366 7 0 82 -1 3 0 21 - 34 VMA 5 368 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 365 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 366 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 CLK_000_P_SYNC_9_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21 - 301 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21 - 358 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 324 SM_AMIGA_0_ 3 -1 6 4 2 5 6 7 -1 -1 2 0 21 - 294 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 4 0 21 - 355 SM_AMIGA_1_ 3 -1 5 3 5 6 7 -1 -1 3 0 21 - 353 SM_AMIGA_6_ 3 -1 5 3 1 2 5 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 296 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 2 0 21 - 352 inst_CLK_000_NE_D0 3 -1 6 3 3 5 6 -1 -1 1 0 21 - 328 CLK_000_N_SYNC_11_ 3 -1 7 3 3 5 6 -1 -1 1 0 21 - 319 CLK_000_D_0_ 3 -1 1 3 1 3 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 0 2 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 327 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 368 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 326 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 325 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 350 CLK_000_N_SYNC_9_ 3 -1 1 2 6 7 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 5 2 1 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 - 362 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 361 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 360 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 354 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 356 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 367 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 357 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 330 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 293 N_317_i 3 -1 5 1 5 -1 -1 4 0 21 - 364 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 363 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 329 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 369 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 365 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 359 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 331 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 351 CLK_000_N_SYNC_10_ 3 -1 6 1 7 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_8_ 3 -1 3 1 1 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_7_ 3 -1 6 1 3 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_6_ 3 -1 6 1 6 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_5_ 3 -1 6 1 6 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_4_ 3 -1 1 1 6 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_3_ 3 -1 7 1 1 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_2_ 3 -1 0 1 7 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_1_ 3 -1 4 1 0 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_0_ 3 -1 5 1 4 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_8_ 3 -1 3 1 4 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_7_ 3 -1 2 1 3 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_6_ 3 -1 1 1 2 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_5_ 3 -1 6 1 1 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_4_ 3 -1 0 1 6 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_3_ 3 -1 6 1 0 -1 -1 1 0 21 - 334 CLK_000_P_SYNC_2_ 3 -1 0 1 6 -1 -1 1 0 21 - 333 CLK_000_P_SYNC_1_ 3 -1 1 1 0 -1 -1 1 0 21 - 332 CLK_000_P_SYNC_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A1 1 -1 -1 1 0 59 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -139 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 79 RW_000 5 364 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 70 RW 5 370 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 365 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 361 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 363 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 362 1 0 6 -1 10 0 21 - 80 DSACK1 5 368 7 0 80 -1 4 0 21 - 82 BGACK_030 5 367 7 0 82 -1 3 0 21 - 34 VMA 5 369 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 366 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 6 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 367 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 CLK_000_P_SYNC_10_ 3 -1 0 5 0 2 3 5 7 -1 -1 1 0 21 - 359 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 301 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 354 SM_AMIGA_6_ 3 -1 5 3 1 2 5 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 324 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 328 CLK_000_N_SYNC_11_ 3 -1 7 3 1 3 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 0 2 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 327 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 369 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 356 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 326 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 325 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 353 inst_CLK_000_NE_D0 3 -1 5 2 3 5 -1 -1 1 0 21 - 319 CLK_000_D_0_ 3 -1 1 2 3 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21 - 363 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 361 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 355 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 357 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 358 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 330 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 293 N_317_i 3 -1 5 1 5 -1 -1 4 0 21 - 365 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 364 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 329 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 370 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 366 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 360 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 331 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 352 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_9_ 3 -1 6 1 7 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_8_ 3 -1 4 1 6 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_7_ 3 -1 0 1 4 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_6_ 3 -1 6 1 0 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_4_ 3 -1 6 1 3 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_3_ 3 -1 0 1 6 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_2_ 3 -1 3 1 0 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_1_ 3 -1 3 1 3 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_0_ 3 -1 5 1 3 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_9_ 3 -1 5 1 0 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_8_ 3 -1 3 1 5 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_7_ 3 -1 6 1 3 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_6_ 3 -1 0 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_5_ 3 -1 0 1 0 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_4_ 3 -1 6 1 0 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_3_ 3 -1 1 1 6 -1 -1 1 0 21 - 334 CLK_000_P_SYNC_2_ 3 -1 4 1 1 -1 -1 1 0 21 - 333 CLK_000_P_SYNC_1_ 3 -1 3 1 4 -1 -1 1 0 21 - 332 CLK_000_P_SYNC_0_ 3 -1 5 1 3 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 3 1 5 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 0 59 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 6 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -139 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 79 RW_000 5 364 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 70 RW 5 370 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 365 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 361 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 363 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 362 1 0 6 -1 10 0 21 - 80 DSACK1 5 368 7 0 80 -1 4 0 21 - 82 BGACK_030 5 367 7 0 82 -1 3 0 21 - 34 VMA 5 369 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 366 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 6 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 367 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 320 CLK_000_P_SYNC_9_ 3 -1 0 5 0 2 3 5 7 -1 -1 1 0 21 - 359 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 301 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 354 SM_AMIGA_6_ 3 -1 5 3 1 2 5 -1 -1 3 0 21 - 299 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 324 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 328 CLK_000_N_SYNC_12_ 3 -1 3 3 1 3 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 3 0 2 6 -1 -1 1 0 21 - 305 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 327 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 369 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 356 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 326 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 325 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 353 inst_CLK_000_NE_D0 3 -1 5 2 3 5 -1 -1 1 0 21 - 319 CLK_000_D_0_ 3 -1 1 2 3 5 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21 - 363 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 361 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 306 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 355 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 357 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 358 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 330 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 293 N_317_i 3 -1 5 1 5 -1 -1 4 0 21 - 365 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 364 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 329 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 308 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 370 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 366 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 360 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 331 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 307 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 352 CLK_000_N_SYNC_11_ 3 -1 7 1 3 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_9_ 3 -1 6 1 7 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_8_ 3 -1 4 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_7_ 3 -1 0 1 4 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_6_ 3 -1 6 1 0 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_4_ 3 -1 6 1 3 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_3_ 3 -1 0 1 6 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_2_ 3 -1 3 1 0 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_1_ 3 -1 3 1 3 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_0_ 3 -1 5 1 3 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_8_ 3 -1 5 1 0 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_7_ 3 -1 3 1 5 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_6_ 3 -1 6 1 3 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_5_ 3 -1 0 1 6 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_4_ 3 -1 0 1 0 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_3_ 3 -1 6 1 0 -1 -1 1 0 21 - 334 CLK_000_P_SYNC_2_ 3 -1 1 1 6 -1 -1 1 0 21 - 333 CLK_000_P_SYNC_1_ 3 -1 4 1 1 -1 -1 1 0 21 - 332 CLK_000_P_SYNC_0_ 3 -1 5 1 4 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 3 1 5 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 0 59 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 6 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -130 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 2 3 5 7 40 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 79 RW_000 5 353 7 3 2 4 6 79 -1 5 0 21 - 70 RW 5 359 6 2 0 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 - 68 A0 5 354 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 352 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 361 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 360 1 0 6 -1 10 0 21 - 80 DSACK1 5 357 7 0 80 -1 4 0 21 - 82 BGACK_030 5 356 7 0 82 -1 3 0 21 - 34 VMA 5 358 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 355 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 356 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 3 6 0 3 4 5 6 7 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 7 5 0 2 3 5 7 -1 -1 1 0 21 - 317 CLK_000_D_0_ 3 -1 7 5 0 2 3 5 7 -1 -1 1 0 21 - 301 inst_AS_030_D0 3 -1 7 5 0 2 3 4 7 -1 -1 1 0 21 - 344 SM_AMIGA_6_ 3 -1 3 4 0 1 3 5 -1 -1 3 1 21 - 299 SM_AMIGA_5_ 3 -1 5 4 0 2 5 7 -1 -1 3 0 21 - 303 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21 - 323 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 4 0 21 - 297 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 296 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 349 SM_AMIGA_i_7_ 3 -1 5 3 0 3 7 -1 -1 2 0 21 - 326 CLK_000_N_SYNC_12_ 3 -1 5 3 1 3 5 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 306 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 305 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 325 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 5 0 21 - 358 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 346 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 342 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 1 21 - 313 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 310 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 324 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 343 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 340 CLK_000_N_SYNC_10_ 3 -1 7 2 1 7 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 2 2 3 5 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 2 0 6 -1 -1 1 0 21 - 351 SM_AMIGA_i_7__0 3 -1 5 1 5 -1 -1 15 0 21 - 361 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 360 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 352 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 345 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 353 RN_RW_000 3 79 7 1 7 79 -1 5 0 21 - 348 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 - 347 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 357 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 328 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 307 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 4 0 21 - 293 N_230_i 3 -1 5 1 5 -1 -1 4 0 21 - 354 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 327 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 359 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 355 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 350 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 329 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 341 CLK_000_N_SYNC_11_ 3 -1 1 1 5 -1 -1 1 0 21 - 339 CLK_000_N_SYNC_9_ 3 -1 6 1 7 -1 -1 1 0 21 - 338 CLK_000_N_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 337 CLK_000_N_SYNC_7_ 3 -1 6 1 6 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_6_ 3 -1 2 1 6 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_5_ 3 -1 6 1 2 -1 -1 1 0 21 - 334 CLK_000_N_SYNC_4_ 3 -1 2 1 6 -1 -1 1 0 21 - 333 CLK_000_N_SYNC_3_ 3 -1 5 1 2 -1 -1 1 0 21 - 332 CLK_000_N_SYNC_2_ 3 -1 2 1 5 -1 -1 1 0 21 - 331 CLK_000_N_SYNC_1_ 3 -1 4 1 2 -1 -1 1 0 21 - 330 CLK_000_N_SYNC_0_ 3 -1 3 1 4 -1 -1 1 0 21 - 322 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 321 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 320 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 319 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21 - 308 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 1 1 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 10 CLK_000 1 -1 -1 5 0 2 3 5 7 10 -1 - 96 A_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 2 7 63 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 6 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 3 13 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 68 A0 5 366 6 2 0 6 68 -1 3 0 21 - 70 RW 5 371 6 2 1 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 363 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 362 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 300 inst_nEXP_SPACE_D0reg 3 -1 5 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 314 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 359 SM_AMIGA_i_7_ 3 -1 2 5 1 2 3 5 7 -1 -1 15 0 21 - 318 CLK_000_P_SYNC_10_ 3 -1 5 5 0 1 2 3 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 5 1 3 4 5 7 -1 -1 1 0 21 - 354 SM_AMIGA_6_ 3 -1 2 4 0 1 2 6 -1 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 0 4 0 1 2 7 -1 -1 2 0 21 - 327 CLK_000_N_SYNC_12_ 3 -1 0 4 0 1 2 3 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 - 356 SM_AMIGA_1_ 3 -1 2 3 0 2 7 -1 -1 3 0 21 - 319 SM_AMIGA_5_ 3 -1 2 3 1 2 7 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 295 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 2 0 21 - 317 CLK_000_D_0_ 3 -1 6 3 2 3 5 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 6 3 1 6 7 -1 -1 1 0 21 - 303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 301 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 - 326 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 325 SM_AMIGA_4_ 3 -1 1 2 1 2 -1 -1 3 0 21 - 311 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 324 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 310 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 353 inst_CLK_000_NE_D0 3 -1 2 2 2 6 -1 -1 1 0 21 - 316 CLK_000_D_1_ 3 -1 3 2 2 5 -1 -1 1 0 21 - 315 inst_CLK_OUT_PRE_50 3 -1 2 2 2 6 -1 -1 1 0 21 - 309 inst_VPA_D 3 -1 5 2 2 3 -1 -1 1 0 21 - 302 inst_BGACK_030_INT_D 3 -1 7 2 5 6 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 355 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 357 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 358 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 4 0 21 - 329 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 328 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 330 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 360 N_319 3 -1 3 1 2 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_11_ 3 -1 7 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_9_ 3 -1 4 1 7 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_8_ 3 -1 6 1 4 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_7_ 3 -1 5 1 6 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_6_ 3 -1 4 1 5 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_5_ 3 -1 0 1 4 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_4_ 3 -1 6 1 0 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_3_ 3 -1 5 1 6 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_2_ 3 -1 0 1 5 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_1_ 3 -1 5 1 0 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_0_ 3 -1 5 1 5 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_9_ 3 -1 4 1 5 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_8_ 3 -1 3 1 4 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_7_ 3 -1 1 1 3 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_5_ 3 -1 5 1 0 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_4_ 3 -1 1 1 5 -1 -1 1 0 21 - 334 CLK_000_P_SYNC_3_ 3 -1 3 1 1 -1 -1 1 0 21 - 333 CLK_000_P_SYNC_2_ 3 -1 3 1 3 -1 -1 1 0 21 - 332 CLK_000_P_SYNC_1_ 3 -1 3 1 3 -1 -1 1 0 21 - 331 CLK_000_P_SYNC_0_ 3 -1 2 1 3 -1 -1 1 0 21 - 322 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 321 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 320 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 313 inst_DTACK_D0 3 -1 3 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 59 A1 1 -1 -1 1 5 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 5 13 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -146 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 371 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 68 A0 5 372 6 2 0 1 68 -1 3 0 21 - 70 RW 5 377 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 368 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 370 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 369 1 0 6 -1 10 0 21 - 80 DSACK1 5 375 7 0 80 -1 4 0 21 - 82 BGACK_030 5 374 7 0 82 -1 3 0 21 - 34 VMA 5 376 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 373 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 374 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 315 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 319 CLK_000_P_SYNC_10_ 3 -1 0 6 0 2 3 5 6 7 -1 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 5 6 0 3 4 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21 - 366 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 15 0 21 - 361 SM_AMIGA_6_ 3 -1 5 4 0 1 2 5 -1 -1 3 0 21 - 330 SM_AMIGA_0_ 3 -1 6 4 2 5 6 7 -1 -1 2 0 21 - 334 CLK_000_N_SYNC_12_ 3 -1 1 4 1 3 5 6 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 363 SM_AMIGA_1_ 3 -1 5 3 5 6 7 -1 -1 3 0 21 - 320 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 360 inst_CLK_000_NE_D0 3 -1 5 3 2 3 5 -1 -1 1 0 21 - 318 CLK_000_D_0_ 3 -1 6 3 1 3 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 3 3 2 3 5 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 364 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 333 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 365 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 376 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 332 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 2 2 2 3 -1 -1 2 0 21 - 317 CLK_000_D_1_ 3 -1 5 2 1 5 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 3 2 2 5 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 2 5 6 -1 -1 1 0 21 - 370 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 369 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 368 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 362 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 302 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 7 0 21 - 375 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 336 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 372 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 371 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 335 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 377 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 373 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 367 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 337 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 359 CLK_000_N_SYNC_11_ 3 -1 3 1 1 -1 -1 1 0 21 - 358 CLK_000_N_SYNC_10_ 3 -1 3 1 3 -1 -1 1 0 21 - 357 CLK_000_N_SYNC_9_ 3 -1 2 1 3 -1 -1 1 0 21 - 356 CLK_000_N_SYNC_8_ 3 -1 6 1 2 -1 -1 1 0 21 - 355 CLK_000_N_SYNC_7_ 3 -1 4 1 6 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_6_ 3 -1 4 1 4 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_5_ 3 -1 3 1 4 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_4_ 3 -1 2 1 3 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_3_ 3 -1 3 1 2 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_2_ 3 -1 1 1 3 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21 - 347 CLK_000_P_SYNC_9_ 3 -1 1 1 0 -1 -1 1 0 21 - 346 CLK_000_P_SYNC_8_ 3 -1 0 1 1 -1 -1 1 0 21 - 345 CLK_000_P_SYNC_7_ 3 -1 2 1 0 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_6_ 3 -1 2 1 2 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_5_ 3 -1 2 1 2 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_3_ 3 -1 1 1 0 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_1_ 3 -1 6 1 0 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_0_ 3 -1 1 1 6 -1 -1 1 0 21 - 329 CLK_000_D_7_ 3 -1 7 1 7 -1 -1 1 0 21 - 328 CLK_000_D_6_ 3 -1 4 1 7 -1 -1 1 0 21 - 327 CLK_000_D_5_ 3 -1 5 1 4 -1 -1 1 0 21 - 326 CLK_000_D_4_ 3 -1 6 1 5 -1 -1 1 0 21 - 325 CLK_000_D_3_ 3 -1 3 1 6 -1 -1 1 0 21 - 324 CLK_000_D_2_ 3 -1 5 1 3 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 - 293 N_319 3 -1 2 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 59 A1 1 -1 -1 1 6 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 5 13 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -145 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 369 7 3 0 4 6 79 -1 3 0 21 - 68 A0 5 371 6 2 3 6 68 -1 3 0 21 - 70 RW 5 376 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 6 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 6 69 -1 1 0 21 - 8 IPL_030_2_ 5 367 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 370 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 368 1 0 6 -1 10 0 21 - 80 DSACK1 5 374 7 0 80 -1 4 0 21 - 82 BGACK_030 5 373 7 0 82 -1 3 0 21 - 34 VMA 5 375 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 372 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 373 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 300 inst_nEXP_SPACE_D0reg 3 -1 2 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 315 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 319 CLK_000_P_SYNC_10_ 3 -1 1 6 0 1 2 3 5 7 -1 -1 1 0 21 - 333 CLK_000_N_SYNC_12_ 3 -1 0 5 0 1 3 5 7 -1 -1 1 0 21 - 365 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 360 SM_AMIGA_6_ 3 -1 5 4 2 3 5 6 -1 -1 3 0 21 - 320 SM_AMIGA_5_ 3 -1 5 4 0 2 5 7 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 331 SM_AMIGA_4_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 329 SM_AMIGA_0_ 3 -1 7 3 2 5 7 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 301 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 332 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 335 RST_DLY_1_ 3 -1 1 2 0 1 -1 -1 4 0 21 - 375 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 362 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 334 RST_DLY_0_ 3 -1 0 2 0 1 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 336 RST_DLY_2_ 3 -1 0 2 0 1 -1 -1 2 0 21 - 330 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 1 2 0 1 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 359 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 327 CLK_000_D_5_ 3 -1 6 2 6 7 -1 -1 1 0 21 - 318 CLK_000_D_0_ 3 -1 3 2 3 5 -1 -1 1 0 21 - 317 CLK_000_D_1_ 3 -1 5 2 3 5 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 - 370 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 368 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 367 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 361 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 363 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 374 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 364 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 302 N_263_i 3 -1 5 1 5 -1 -1 4 0 21 - 371 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 369 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 376 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 372 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 366 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 358 CLK_000_N_SYNC_11_ 3 -1 3 1 0 -1 -1 1 0 21 - 357 CLK_000_N_SYNC_10_ 3 -1 0 1 3 -1 -1 1 0 21 - 356 CLK_000_N_SYNC_9_ 3 -1 6 1 0 -1 -1 1 0 21 - 355 CLK_000_N_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_6_ 3 -1 4 1 0 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_5_ 3 -1 6 1 4 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_4_ 3 -1 4 1 6 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_3_ 3 -1 6 1 4 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_2_ 3 -1 1 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_0_ 3 -1 3 1 3 -1 -1 1 0 21 - 346 CLK_000_P_SYNC_9_ 3 -1 0 1 1 -1 -1 1 0 21 - 345 CLK_000_P_SYNC_8_ 3 -1 2 1 0 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_7_ 3 -1 6 1 2 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_6_ 3 -1 0 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_5_ 3 -1 1 1 0 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_4_ 3 -1 1 1 1 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_1_ 3 -1 5 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_0_ 3 -1 3 1 5 -1 -1 1 0 21 - 328 CLK_000_D_6_ 3 -1 6 1 7 -1 -1 1 0 21 - 326 CLK_000_D_4_ 3 -1 1 1 6 -1 -1 1 0 21 - 325 CLK_000_D_3_ 3 -1 5 1 1 -1 -1 1 0 21 - 324 CLK_000_D_2_ 3 -1 5 1 5 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A1 1 -1 -1 1 2 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 2 13 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -147 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 79 RW_000 5 371 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 68 A0 5 373 6 2 0 1 68 -1 3 0 21 - 70 RW 5 378 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 369 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 372 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 370 1 0 6 -1 10 0 21 - 80 DSACK1 5 376 7 0 80 -1 4 0 21 - 82 BGACK_030 5 375 7 0 82 -1 3 0 21 - 34 VMA 5 377 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 374 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 375 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 6 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 315 inst_RESET_OUT 3 -1 6 6 0 1 3 4 6 7 -1 -1 2 0 21 - 319 CLK_000_P_SYNC_10_ 3 -1 6 5 0 2 3 5 7 -1 -1 1 0 21 - 362 SM_AMIGA_6_ 3 -1 5 4 0 1 2 5 -1 -1 3 0 21 - 335 CLK_000_N_SYNC_12_ 3 -1 4 4 2 3 5 6 -1 -1 1 0 21 - 318 CLK_000_D_0_ 3 -1 3 4 0 2 3 5 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 4 0 1 5 6 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 4 3 4 5 7 -1 -1 1 0 21 - 367 SM_AMIGA_i_7_ 3 -1 2 3 3 5 7 -1 -1 15 0 21 - 294 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 364 SM_AMIGA_1_ 3 -1 2 3 2 5 7 -1 -1 3 0 21 - 320 SM_AMIGA_5_ 3 -1 2 3 2 5 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 331 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 3 3 1 6 7 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 - 334 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 377 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 333 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 332 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 2 2 2 3 -1 -1 2 0 21 - 361 inst_CLK_000_NE_D0 3 -1 5 2 2 3 -1 -1 1 0 21 - 317 CLK_000_D_1_ 3 -1 0 2 2 5 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 4 2 3 4 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 2 2 2 3 -1 -1 1 0 21 - 372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 369 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 363 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 365 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 376 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 366 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 4 0 21 - 337 RST_DLY_1_ 3 -1 6 1 6 -1 -1 4 0 21 - 373 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 371 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 336 RST_DLY_0_ 3 -1 6 1 6 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 378 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 374 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 368 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 338 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 360 CLK_000_N_SYNC_11_ 3 -1 0 1 4 -1 -1 1 0 21 - 359 CLK_000_N_SYNC_10_ 3 -1 0 1 0 -1 -1 1 0 21 - 358 CLK_000_N_SYNC_9_ 3 -1 6 1 0 -1 -1 1 0 21 - 357 CLK_000_N_SYNC_8_ 3 -1 3 1 6 -1 -1 1 0 21 - 356 CLK_000_N_SYNC_7_ 3 -1 3 1 3 -1 -1 1 0 21 - 355 CLK_000_N_SYNC_6_ 3 -1 2 1 3 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_5_ 3 -1 1 1 2 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_4_ 3 -1 0 1 1 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_3_ 3 -1 1 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_1_ 3 -1 6 1 0 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_0_ 3 -1 2 1 6 -1 -1 1 0 21 - 348 CLK_000_P_SYNC_9_ 3 -1 1 1 6 -1 -1 1 0 21 - 347 CLK_000_P_SYNC_8_ 3 -1 5 1 1 -1 -1 1 0 21 - 346 CLK_000_P_SYNC_7_ 3 -1 4 1 5 -1 -1 1 0 21 - 345 CLK_000_P_SYNC_6_ 3 -1 1 1 4 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_5_ 3 -1 5 1 1 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_4_ 3 -1 1 1 5 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_3_ 3 -1 6 1 1 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_2_ 3 -1 6 1 6 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_1_ 3 -1 3 1 6 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_0_ 3 -1 5 1 3 -1 -1 1 0 21 - 330 CLK_000_D_8_ 3 -1 7 1 7 -1 -1 1 0 21 - 329 CLK_000_D_7_ 3 -1 3 1 7 -1 -1 1 0 21 - 328 CLK_000_D_6_ 3 -1 0 1 3 -1 -1 1 0 21 - 327 CLK_000_D_5_ 3 -1 3 1 0 -1 -1 1 0 21 - 326 CLK_000_D_4_ 3 -1 2 1 3 -1 -1 1 0 21 - 325 CLK_000_D_3_ 3 -1 1 1 2 -1 -1 1 0 21 - 324 CLK_000_D_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 5 1 2 -1 -1 1 0 21 - 293 N_319 3 -1 2 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 5 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 6 13 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -148 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 373 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 379 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 374 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 370 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 372 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 371 1 0 6 -1 10 0 21 - 80 DSACK1 5 377 7 0 80 -1 4 0 21 - 82 BGACK_030 5 376 7 0 82 -1 3 0 21 - 34 VMA 5 378 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 375 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 376 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 315 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 1 6 0 3 4 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 4 6 2 3 4 5 6 7 -1 -1 1 0 21 - 319 CLK_000_P_SYNC_10_ 3 -1 1 5 0 2 3 5 7 -1 -1 1 0 21 - 368 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 15 0 21 - 320 SM_AMIGA_5_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21 - 294 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 - 363 SM_AMIGA_6_ 3 -1 5 3 1 2 5 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 6 3 2 3 6 -1 -1 3 0 21 - 332 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 2 0 21 - 362 inst_CLK_000_NE_D0 3 -1 3 3 2 5 6 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_12_ 3 -1 0 3 1 3 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 2 3 1 6 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 0 3 2 3 5 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 3 0 5 6 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 366 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 335 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 367 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 338 RST_DLY_1_ 3 -1 1 2 1 3 -1 -1 4 0 21 - 378 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 365 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 337 RST_DLY_0_ 3 -1 3 2 1 3 -1 -1 3 0 21 - 334 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 339 RST_DLY_2_ 3 -1 3 2 1 3 -1 -1 2 0 21 - 333 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 318 CLK_000_D_0_ 3 -1 3 2 3 5 -1 -1 1 0 21 - 317 CLK_000_D_1_ 3 -1 5 2 5 6 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 6 2 2 6 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 6 2 2 5 -1 -1 1 0 21 - 372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 371 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 370 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 364 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 302 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 7 0 21 - 377 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 374 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 373 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 379 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 375 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 369 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 361 CLK_000_N_SYNC_11_ 3 -1 6 1 0 -1 -1 1 0 21 - 360 CLK_000_N_SYNC_10_ 3 -1 1 1 6 -1 -1 1 0 21 - 359 CLK_000_N_SYNC_9_ 3 -1 6 1 1 -1 -1 1 0 21 - 358 CLK_000_N_SYNC_8_ 3 -1 5 1 6 -1 -1 1 0 21 - 357 CLK_000_N_SYNC_7_ 3 -1 1 1 5 -1 -1 1 0 21 - 356 CLK_000_N_SYNC_6_ 3 -1 1 1 1 -1 -1 1 0 21 - 355 CLK_000_N_SYNC_5_ 3 -1 2 1 1 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_3_ 3 -1 2 1 0 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_2_ 3 -1 1 1 2 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_0_ 3 -1 5 1 6 -1 -1 1 0 21 - 349 CLK_000_P_SYNC_9_ 3 -1 2 1 1 -1 -1 1 0 21 - 348 CLK_000_P_SYNC_8_ 3 -1 2 1 2 -1 -1 1 0 21 - 347 CLK_000_P_SYNC_7_ 3 -1 4 1 2 -1 -1 1 0 21 - 346 CLK_000_P_SYNC_6_ 3 -1 0 1 4 -1 -1 1 0 21 - 345 CLK_000_P_SYNC_5_ 3 -1 3 1 0 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_4_ 3 -1 3 1 3 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_3_ 3 -1 4 1 3 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_2_ 3 -1 0 1 4 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_1_ 3 -1 0 1 0 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21 - 331 CLK_000_D_9_ 3 -1 7 1 7 -1 -1 1 0 21 - 330 CLK_000_D_8_ 3 -1 5 1 7 -1 -1 1 0 21 - 329 CLK_000_D_7_ 3 -1 2 1 5 -1 -1 1 0 21 - 328 CLK_000_D_6_ 3 -1 7 1 2 -1 -1 1 0 21 - 327 CLK_000_D_5_ 3 -1 6 1 7 -1 -1 1 0 21 - 326 CLK_000_D_4_ 3 -1 3 1 6 -1 -1 1 0 21 - 325 CLK_000_D_3_ 3 -1 3 1 3 -1 -1 1 0 21 - 324 CLK_000_D_2_ 3 -1 6 1 3 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 293 N_377_i 3 -1 3 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 0 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 1 13 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -149 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 79 RW_000 5 372 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 - 70 RW 5 380 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 375 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 371 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 374 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 373 1 0 6 -1 10 0 21 - 80 DSACK1 5 378 7 0 80 -1 4 0 21 - 82 BGACK_030 5 377 7 0 82 -1 3 0 21 - 34 VMA 5 379 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 376 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 377 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 300 inst_nEXP_SPACE_D0reg 3 -1 0 6 0 3 4 5 6 7 -1 -1 1 0 21 - 321 CLK_000_P_SYNC_10_ 3 -1 2 5 0 2 3 5 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21 - 369 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 15 0 21 - 337 CLK_000_N_SYNC_12_ 3 -1 1 4 1 3 4 5 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 - 364 SM_AMIGA_6_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 - 322 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 293 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 333 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 363 inst_CLK_000_NE_D0 3 -1 4 3 2 3 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 3 3 2 3 5 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 367 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 336 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 368 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 379 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 366 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 335 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 334 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 2 0 21 - 320 CLK_000_D_0_ 3 -1 1 2 3 5 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 0 2 2 5 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 2 5 6 -1 -1 1 0 21 - 374 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 373 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 371 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 365 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 301 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 7 0 21 - 378 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 339 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 375 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 372 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 338 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 380 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 376 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 370 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 340 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 362 CLK_000_N_SYNC_11_ 3 -1 6 1 1 -1 -1 1 0 21 - 361 CLK_000_N_SYNC_10_ 3 -1 5 1 6 -1 -1 1 0 21 - 360 CLK_000_N_SYNC_9_ 3 -1 0 1 5 -1 -1 1 0 21 - 359 CLK_000_N_SYNC_8_ 3 -1 6 1 0 -1 -1 1 0 21 - 358 CLK_000_N_SYNC_7_ 3 -1 3 1 6 -1 -1 1 0 21 - 357 CLK_000_N_SYNC_6_ 3 -1 1 1 3 -1 -1 1 0 21 - 356 CLK_000_N_SYNC_5_ 3 -1 2 1 1 -1 -1 1 0 21 - 355 CLK_000_N_SYNC_4_ 3 -1 2 1 2 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_3_ 3 -1 3 1 2 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_2_ 3 -1 3 1 3 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_1_ 3 -1 3 1 3 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_0_ 3 -1 5 1 3 -1 -1 1 0 21 - 350 CLK_000_P_SYNC_9_ 3 -1 6 1 2 -1 -1 1 0 21 - 349 CLK_000_P_SYNC_8_ 3 -1 1 1 6 -1 -1 1 0 21 - 348 CLK_000_P_SYNC_7_ 3 -1 0 1 1 -1 -1 1 0 21 - 347 CLK_000_P_SYNC_6_ 3 -1 0 1 0 -1 -1 1 0 21 - 346 CLK_000_P_SYNC_5_ 3 -1 1 1 0 -1 -1 1 0 21 - 345 CLK_000_P_SYNC_4_ 3 -1 3 1 1 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_3_ 3 -1 6 1 3 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_2_ 3 -1 6 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_1_ 3 -1 0 1 6 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21 - 332 CLK_000_D_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 331 CLK_000_D_7_ 3 -1 6 1 0 -1 -1 1 0 21 - 330 CLK_000_D_6_ 3 -1 1 1 6 -1 -1 1 0 21 - 329 CLK_000_D_5_ 3 -1 3 1 1 -1 -1 1 0 21 - 328 CLK_000_D_4_ 3 -1 2 1 3 -1 -1 1 0 21 - 327 CLK_000_D_3_ 3 -1 1 1 2 -1 -1 1 0 21 - 326 CLK_000_D_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 325 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 324 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 323 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 319 CLK_000_D_1_ 3 -1 5 1 5 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 CLK_000_D_9_ 3 -1 7 1 7 -1 -1 1 0 21 - 314 CLK_000_D_8_ 3 -1 0 1 7 -1 -1 1 0 21 - 302 N_343_i 3 -1 2 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 59 A1 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -148 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 371 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 379 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 374 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 370 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 373 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 372 1 0 6 -1 10 0 21 - 80 DSACK1 5 377 7 0 80 -1 4 0 21 - 82 BGACK_030 5 376 7 0 82 -1 3 0 21 - 34 VMA 5 378 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 375 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 376 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 300 inst_nEXP_SPACE_D0reg 3 -1 0 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 317 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 321 CLK_000_P_SYNC_10_ 3 -1 5 5 0 2 3 5 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 5 1 3 4 5 7 -1 -1 1 0 21 - 368 SM_AMIGA_i_7_ 3 -1 2 4 2 3 5 7 -1 -1 15 0 21 - 322 SM_AMIGA_5_ 3 -1 5 4 1 2 5 7 -1 -1 3 0 21 - 294 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 363 SM_AMIGA_6_ 3 -1 2 3 1 2 5 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 293 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 332 SM_AMIGA_0_ 3 -1 2 3 2 5 7 -1 -1 2 0 21 - 336 CLK_000_N_SYNC_12_ 3 -1 2 3 2 3 5 -1 -1 1 0 21 - 320 CLK_000_D_0_ 3 -1 3 3 2 3 6 -1 -1 1 0 21 - 319 CLK_000_D_1_ 3 -1 2 3 2 5 6 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 3 0 5 6 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 - 335 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 378 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 365 SM_AMIGA_1_ 3 -1 2 2 2 7 -1 -1 3 0 21 - 334 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 333 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 2 0 21 - 362 inst_CLK_000_NE_D0 3 -1 2 2 2 3 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 1 2 2 3 -1 -1 1 0 21 - 373 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 372 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 370 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 364 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 366 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 377 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 367 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 4 0 21 - 338 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 374 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 371 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 337 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 379 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 375 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 369 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 339 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 361 CLK_000_N_SYNC_11_ 3 -1 6 1 2 -1 -1 1 0 21 - 360 CLK_000_N_SYNC_10_ 3 -1 6 1 6 -1 -1 1 0 21 - 359 CLK_000_N_SYNC_9_ 3 -1 1 1 6 -1 -1 1 0 21 - 358 CLK_000_N_SYNC_8_ 3 -1 6 1 1 -1 -1 1 0 21 - 357 CLK_000_N_SYNC_7_ 3 -1 5 1 6 -1 -1 1 0 21 - 356 CLK_000_N_SYNC_6_ 3 -1 1 1 5 -1 -1 1 0 21 - 355 CLK_000_N_SYNC_5_ 3 -1 0 1 1 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_4_ 3 -1 6 1 0 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_3_ 3 -1 0 1 6 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_2_ 3 -1 1 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_0_ 3 -1 6 1 6 -1 -1 1 0 21 - 349 CLK_000_P_SYNC_9_ 3 -1 1 1 5 -1 -1 1 0 21 - 348 CLK_000_P_SYNC_8_ 3 -1 0 1 1 -1 -1 1 0 21 - 347 CLK_000_P_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21 - 346 CLK_000_P_SYNC_6_ 3 -1 2 1 5 -1 -1 1 0 21 - 345 CLK_000_P_SYNC_5_ 3 -1 6 1 2 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_4_ 3 -1 0 1 6 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_3_ 3 -1 4 1 0 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_2_ 3 -1 3 1 4 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_1_ 3 -1 6 1 3 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_0_ 3 -1 2 1 6 -1 -1 1 0 21 - 331 CLK_000_D_9_ 3 -1 7 1 7 -1 -1 1 0 21 - 330 CLK_000_D_6_ 3 -1 5 1 6 -1 -1 1 0 21 - 329 CLK_000_D_5_ 3 -1 5 1 5 -1 -1 1 0 21 - 328 CLK_000_D_4_ 3 -1 1 1 5 -1 -1 1 0 21 - 327 CLK_000_D_3_ 3 -1 0 1 1 -1 -1 1 0 21 - 326 CLK_000_D_2_ 3 -1 5 1 0 -1 -1 1 0 21 - 325 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 324 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 0 1 2 -1 -1 1 0 21 - 315 CLK_000_D_8_ 3 -1 7 1 7 -1 -1 1 0 21 - 314 CLK_000_D_7_ 3 -1 6 1 7 -1 -1 1 0 21 - 301 N_343_i 3 -1 2 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A1 1 -1 -1 1 0 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -148 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 371 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 68 A0 5 372 6 2 1 2 68 -1 3 0 21 - 70 RW 5 379 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 370 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 374 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 373 1 0 6 -1 10 0 21 - 80 DSACK1 5 377 7 0 80 -1 4 0 21 - 82 BGACK_030 5 376 7 0 82 -1 3 0 21 - 34 VMA 5 378 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 375 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 376 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 1 6 0 3 4 5 6 7 -1 -1 1 0 21 - 367 SM_AMIGA_i_7_ 3 -1 5 5 0 2 3 5 7 -1 -1 14 0 21 - 321 CLK_000_P_SYNC_10_ 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 5 0 2 3 4 7 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 362 SM_AMIGA_6_ 3 -1 5 3 1 2 5 -1 -1 3 0 21 - 322 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 332 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 368 CLK_000_N_SYNC_12_ 3 -1 3 3 1 3 5 -1 -1 1 0 21 - 320 CLK_000_D_0_ 3 -1 1 3 0 3 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 0 2 0 5 -1 -1 7 0 21 - 335 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 378 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 364 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 334 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 333 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 319 CLK_000_D_1_ 3 -1 3 2 0 5 -1 -1 1 0 21 - 314 CLK_000_D_6_ 3 -1 2 2 1 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 2 0 6 -1 -1 1 0 21 - 374 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 373 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 370 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 363 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 365 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 377 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 366 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 337 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 293 N_202_i 3 -1 5 1 5 -1 -1 4 0 21 - 372 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 371 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 336 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 379 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 375 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 369 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 338 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 361 inst_CLK_000_NE_D0 3 -1 3 1 5 -1 -1 1 0 21 - 360 CLK_000_N_SYNC_11_ 3 -1 2 1 3 -1 -1 1 0 21 - 359 CLK_000_N_SYNC_10_ 3 -1 0 1 2 -1 -1 1 0 21 - 358 CLK_000_N_SYNC_9_ 3 -1 3 1 0 -1 -1 1 0 21 - 357 CLK_000_N_SYNC_8_ 3 -1 6 1 3 -1 -1 1 0 21 - 356 CLK_000_N_SYNC_7_ 3 -1 3 1 6 -1 -1 1 0 21 - 355 CLK_000_N_SYNC_6_ 3 -1 6 1 3 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_5_ 3 -1 2 1 6 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_4_ 3 -1 1 1 2 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_3_ 3 -1 2 1 1 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_2_ 3 -1 4 1 2 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_1_ 3 -1 2 1 4 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_0_ 3 -1 0 1 2 -1 -1 1 0 21 - 348 CLK_000_P_SYNC_9_ 3 -1 0 1 3 -1 -1 1 0 21 - 347 CLK_000_P_SYNC_8_ 3 -1 2 1 0 -1 -1 1 0 21 - 346 CLK_000_P_SYNC_7_ 3 -1 3 1 2 -1 -1 1 0 21 - 345 CLK_000_P_SYNC_6_ 3 -1 2 1 3 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_5_ 3 -1 6 1 2 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_4_ 3 -1 6 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_3_ 3 -1 6 1 6 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_2_ 3 -1 1 1 6 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_0_ 3 -1 0 1 3 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 7 1 7 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 1 1 7 -1 -1 1 0 21 - 329 CLK_000_D_5_ 3 -1 2 1 2 -1 -1 1 0 21 - 328 CLK_000_D_4_ 3 -1 1 1 2 -1 -1 1 0 21 - 327 CLK_000_D_3_ 3 -1 6 1 1 -1 -1 1 0 21 - 326 CLK_000_D_2_ 3 -1 0 1 6 -1 -1 1 0 21 - 325 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 324 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 - 323 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21 - 315 CLK_000_D_9_ 3 -1 7 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 59 A1 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 1 13 -1 - 10 CLK_000 1 -1 -1 1 1 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -146 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 371 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 68 A0 5 372 6 2 0 6 68 -1 3 0 21 - 70 RW 5 377 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 368 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 370 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 369 1 0 6 -1 10 0 21 - 80 DSACK1 5 375 7 0 80 -1 4 0 21 - 82 BGACK_030 5 374 7 0 82 -1 3 0 21 - 34 VMA 5 376 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 373 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 374 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 321 CLK_000_P_SYNC_10_ 3 -1 0 6 0 2 3 5 6 7 -1 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 5 6 0 3 4 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21 - 366 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 15 0 21 - 361 SM_AMIGA_6_ 3 -1 5 4 0 2 5 6 -1 -1 3 0 21 - 330 SM_AMIGA_0_ 3 -1 6 4 2 5 6 7 -1 -1 2 0 21 - 334 CLK_000_N_SYNC_12_ 3 -1 1 4 1 3 5 6 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 - 363 SM_AMIGA_1_ 3 -1 5 3 5 6 7 -1 -1 3 0 21 - 322 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 293 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 360 inst_CLK_000_NE_D0 3 -1 6 3 2 3 5 -1 -1 1 0 21 - 320 CLK_000_D_0_ 3 -1 5 3 3 4 5 -1 -1 1 0 21 - 319 CLK_000_D_1_ 3 -1 4 3 0 3 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 5 3 1 6 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 3 3 2 3 5 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 2 3 1 5 6 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 364 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 5 0 21 - 333 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 365 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 4 0 21 - 376 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 332 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 7 2 0 7 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 2 0 21 - 316 inst_DTACK_D0 3 -1 0 2 2 5 -1 -1 1 0 21 - 370 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 369 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 368 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 362 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 302 inst_AS_030_000_SYNC 3 -1 5 1 5 -1 -1 7 0 21 - 375 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 336 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 372 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 371 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 335 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 377 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 373 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 367 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 337 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 359 CLK_000_N_SYNC_11_ 3 -1 1 1 1 -1 -1 1 0 21 - 358 CLK_000_N_SYNC_10_ 3 -1 0 1 1 -1 -1 1 0 21 - 357 CLK_000_N_SYNC_9_ 3 -1 6 1 0 -1 -1 1 0 21 - 356 CLK_000_N_SYNC_8_ 3 -1 1 1 6 -1 -1 1 0 21 - 355 CLK_000_N_SYNC_7_ 3 -1 4 1 1 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_6_ 3 -1 1 1 4 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_5_ 3 -1 3 1 1 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_4_ 3 -1 0 1 3 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_3_ 3 -1 4 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_2_ 3 -1 6 1 4 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_1_ 3 -1 2 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_0_ 3 -1 5 1 2 -1 -1 1 0 21 - 347 CLK_000_P_SYNC_9_ 3 -1 6 1 0 -1 -1 1 0 21 - 346 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 345 CLK_000_P_SYNC_7_ 3 -1 6 1 6 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_6_ 3 -1 3 1 6 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_5_ 3 -1 3 1 3 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_4_ 3 -1 0 1 3 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_3_ 3 -1 0 1 0 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_2_ 3 -1 1 1 0 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_0_ 3 -1 3 1 2 -1 -1 1 0 21 - 329 CLK_000_D_7_ 3 -1 7 1 7 -1 -1 1 0 21 - 328 CLK_000_D_4_ 3 -1 6 1 3 -1 -1 1 0 21 - 327 CLK_000_D_3_ 3 -1 2 1 6 -1 -1 1 0 21 - 326 CLK_000_D_2_ 3 -1 0 1 2 -1 -1 1 0 21 - 325 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 324 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 323 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 5 1 5 -1 -1 1 0 21 - 315 CLK_000_D_6_ 3 -1 7 1 7 -1 -1 1 0 21 - 314 CLK_000_D_5_ 3 -1 3 1 7 -1 -1 1 0 21 - 299 N_343_i 3 -1 2 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 5 13 -1 - 10 CLK_000 1 -1 -1 1 5 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -146 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 1 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 371 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 68 A0 5 372 6 2 0 6 68 -1 3 0 21 - 70 RW 5 377 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 370 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 369 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 368 1 0 6 -1 10 0 21 - 82 BGACK_030 5 374 7 0 82 -1 3 0 21 - 34 VMA 5 376 3 0 34 -1 3 0 21 - 80 DSACK1 5 375 7 0 80 -1 2 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 373 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 374 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 315 inst_RESET_OUT 3 -1 5 7 0 1 3 4 5 6 7 -1 -1 2 0 21 - 319 CLK_000_P_SYNC_10_ 3 -1 5 6 0 2 3 5 6 7 -1 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 0 6 0 2 3 4 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 5 1 2 3 4 7 -1 -1 1 0 21 - 361 SM_AMIGA_6_ 3 -1 2 4 0 2 5 6 -1 -1 3 0 21 - 333 SM_AMIGA_1_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21 - 320 SM_AMIGA_5_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 - 330 SM_AMIGA_0_ 3 -1 6 4 2 5 6 7 -1 -1 2 0 21 - 366 CLK_000_N_SYNC_12_ 3 -1 5 4 2 3 5 6 -1 -1 1 0 21 - 365 SM_AMIGA_i_7_ 3 -1 5 3 2 3 7 -1 -1 14 0 21 - 294 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 318 CLK_000_D_0_ 3 -1 6 3 2 3 6 -1 -1 1 0 21 - 317 CLK_000_D_1_ 3 -1 6 3 2 3 6 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 363 SM_AMIGA_3_ 3 -1 5 2 2 5 -1 -1 5 0 21 - 334 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 364 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 4 0 21 - 376 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 332 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 360 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 321 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 7 2 3 5 -1 -1 1 0 21 - 370 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 369 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 368 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 362 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 302 inst_AS_030_000_SYNC 3 -1 2 1 2 -1 -1 7 0 21 - 336 RST_DLY_1_ 3 -1 5 1 5 -1 -1 4 0 21 - 293 N_201_i 3 -1 2 1 5 -1 -1 4 0 21 - 372 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 371 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 335 RST_DLY_0_ 3 -1 5 1 5 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 377 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 375 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 - 373 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 367 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 337 RST_DLY_2_ 3 -1 5 1 5 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 359 CLK_000_N_SYNC_11_ 3 -1 4 1 5 -1 -1 1 0 21 - 358 CLK_000_N_SYNC_10_ 3 -1 2 1 4 -1 -1 1 0 21 - 357 CLK_000_N_SYNC_9_ 3 -1 6 1 2 -1 -1 1 0 21 - 356 CLK_000_N_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 355 CLK_000_N_SYNC_7_ 3 -1 0 1 6 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_6_ 3 -1 4 1 0 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_5_ 3 -1 1 1 4 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_4_ 3 -1 0 1 1 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_3_ 3 -1 0 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_2_ 3 -1 5 1 0 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_1_ 3 -1 1 1 5 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 347 CLK_000_P_SYNC_9_ 3 -1 6 1 5 -1 -1 1 0 21 - 346 CLK_000_P_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21 - 345 CLK_000_P_SYNC_7_ 3 -1 1 1 0 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_6_ 3 -1 1 1 1 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_5_ 3 -1 1 1 1 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_4_ 3 -1 3 1 1 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_3_ 3 -1 5 1 3 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_2_ 3 -1 7 1 5 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_1_ 3 -1 1 1 7 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 329 CLK_000_D_7_ 3 -1 7 1 7 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 0 1 5 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 1 1 0 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 3 1 1 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 6 1 3 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 - 313 CLK_000_D_6_ 3 -1 5 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 59 A1 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 7 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -147 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 372 7 3 0 4 6 79 -1 3 0 21 - 70 RW 5 378 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A0 5 373 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 371 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 370 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 369 1 0 6 -1 10 0 21 - 82 BGACK_030 5 375 7 0 82 -1 3 0 21 - 34 VMA 5 377 3 0 34 -1 3 0 21 - 80 DSACK1 5 376 7 0 80 -1 2 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 374 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 375 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 315 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 6 6 0 2 3 4 6 7 -1 -1 1 0 21 - 319 CLK_000_P_SYNC_10_ 3 -1 5 5 1 2 3 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 5 2 3 4 6 7 -1 -1 1 0 21 - 320 SM_AMIGA_5_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21 - 367 CLK_000_N_SYNC_12_ 3 -1 6 4 0 2 3 5 -1 -1 1 0 21 - 366 SM_AMIGA_i_7_ 3 -1 5 3 2 3 7 -1 -1 14 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 362 SM_AMIGA_6_ 3 -1 2 3 0 2 5 -1 -1 3 0 21 - 334 SM_AMIGA_1_ 3 -1 2 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 331 SM_AMIGA_0_ 3 -1 2 3 2 5 7 -1 -1 2 0 21 - 318 CLK_000_D_0_ 3 -1 3 3 2 3 4 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 364 SM_AMIGA_3_ 3 -1 5 2 2 5 -1 -1 5 0 21 - 335 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 365 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 4 0 21 - 377 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 333 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 1 2 0 1 -1 -1 3 0 21 - 332 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 1 2 0 1 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 361 inst_CLK_000_NE_D0 3 -1 0 2 3 5 -1 -1 1 0 21 - 321 inst_CLK_OUT_PRE_D 3 -1 7 2 1 6 -1 -1 1 0 21 - 317 CLK_000_D_1_ 3 -1 2 2 2 4 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21 - 371 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 370 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 369 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 363 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 302 inst_AS_030_000_SYNC 3 -1 2 1 2 -1 -1 7 0 21 - 337 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 293 N_201_i 3 -1 2 1 5 -1 -1 4 0 21 - 373 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 372 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 336 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 378 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 376 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 - 374 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 368 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 338 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 360 CLK_000_N_SYNC_11_ 3 -1 3 1 6 -1 -1 1 0 21 - 359 CLK_000_N_SYNC_10_ 3 -1 5 1 3 -1 -1 1 0 21 - 358 CLK_000_N_SYNC_9_ 3 -1 0 1 5 -1 -1 1 0 21 - 357 CLK_000_N_SYNC_8_ 3 -1 4 1 0 -1 -1 1 0 21 - 356 CLK_000_N_SYNC_7_ 3 -1 0 1 4 -1 -1 1 0 21 - 355 CLK_000_N_SYNC_6_ 3 -1 5 1 0 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_5_ 3 -1 5 1 5 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_4_ 3 -1 0 1 5 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_3_ 3 -1 3 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_2_ 3 -1 1 1 3 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 348 CLK_000_P_SYNC_9_ 3 -1 6 1 5 -1 -1 1 0 21 - 347 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 346 CLK_000_P_SYNC_7_ 3 -1 5 1 6 -1 -1 1 0 21 - 345 CLK_000_P_SYNC_6_ 3 -1 1 1 5 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_5_ 3 -1 1 1 1 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_4_ 3 -1 1 1 1 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_3_ 3 -1 5 1 1 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_2_ 3 -1 6 1 5 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_1_ 3 -1 6 1 6 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_0_ 3 -1 4 1 6 -1 -1 1 0 21 - 330 CLK_000_D_8_ 3 -1 7 1 7 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 5 1 2 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 0 1 5 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 1 1 0 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 5 1 1 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 4 1 5 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 7 1 7 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 313 CLK_000_D_7_ 3 -1 2 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 59 A1 1 -1 -1 2 1 6 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 0 63 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 6 13 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 68 A0 5 366 6 2 0 6 68 -1 3 0 21 - 70 RW 5 371 6 2 1 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 363 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 362 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 300 inst_nEXP_SPACE_D0reg 3 -1 5 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 314 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 359 SM_AMIGA_i_7_ 3 -1 2 5 1 2 3 5 7 -1 -1 15 0 21 - 318 CLK_000_P_SYNC_10_ 3 -1 5 5 0 1 2 3 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 5 1 3 4 5 7 -1 -1 1 0 21 - 354 SM_AMIGA_6_ 3 -1 2 4 0 1 2 6 -1 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 0 4 0 1 2 7 -1 -1 2 0 21 - 327 CLK_000_N_SYNC_12_ 3 -1 0 4 0 1 2 3 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 - 356 SM_AMIGA_1_ 3 -1 2 3 0 2 7 -1 -1 3 0 21 - 319 SM_AMIGA_5_ 3 -1 2 3 1 2 7 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 295 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 2 0 21 - 317 CLK_000_D_0_ 3 -1 6 3 2 3 5 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 6 3 1 6 7 -1 -1 1 0 21 - 303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 301 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 - 326 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 325 SM_AMIGA_4_ 3 -1 1 2 1 2 -1 -1 3 0 21 - 311 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 324 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 310 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 353 inst_CLK_000_NE_D0 3 -1 2 2 2 6 -1 -1 1 0 21 - 316 CLK_000_D_1_ 3 -1 3 2 2 5 -1 -1 1 0 21 - 315 inst_CLK_OUT_PRE_50 3 -1 2 2 2 6 -1 -1 1 0 21 - 309 inst_VPA_D 3 -1 5 2 2 3 -1 -1 1 0 21 - 302 inst_BGACK_030_INT_D 3 -1 7 2 5 6 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 355 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 357 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 358 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 4 0 21 - 329 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 328 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 330 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 360 N_319 3 -1 3 1 2 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_11_ 3 -1 7 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_9_ 3 -1 4 1 7 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_8_ 3 -1 6 1 4 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_7_ 3 -1 5 1 6 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_6_ 3 -1 4 1 5 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_5_ 3 -1 0 1 4 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_4_ 3 -1 6 1 0 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_3_ 3 -1 5 1 6 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_2_ 3 -1 0 1 5 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_1_ 3 -1 5 1 0 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_0_ 3 -1 5 1 5 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_9_ 3 -1 4 1 5 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_8_ 3 -1 3 1 4 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_7_ 3 -1 1 1 3 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_5_ 3 -1 5 1 0 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_4_ 3 -1 1 1 5 -1 -1 1 0 21 - 334 CLK_000_P_SYNC_3_ 3 -1 3 1 1 -1 -1 1 0 21 - 333 CLK_000_P_SYNC_2_ 3 -1 3 1 3 -1 -1 1 0 21 - 332 CLK_000_P_SYNC_1_ 3 -1 3 1 3 -1 -1 1 0 21 - 331 CLK_000_P_SYNC_0_ 3 -1 2 1 3 -1 -1 1 0 21 - 322 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 321 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 320 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 313 inst_DTACK_D0 3 -1 3 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 59 A1 1 -1 -1 1 5 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 5 13 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 365 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 68 A0 5 366 6 2 0 6 68 -1 3 0 21 - 70 RW 5 371 6 2 1 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 363 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 362 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 2 3 4 5 6 7 82 -1 3 0 21 - 300 inst_nEXP_SPACE_D0reg 3 -1 5 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 314 inst_RESET_OUT 3 -1 1 6 0 1 3 4 6 7 -1 -1 2 0 21 - 359 SM_AMIGA_i_7_ 3 -1 2 5 1 2 3 5 7 -1 -1 15 0 21 - 318 CLK_000_P_SYNC_10_ 3 -1 5 5 0 1 2 3 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 5 1 3 4 5 7 -1 -1 1 0 21 - 354 SM_AMIGA_6_ 3 -1 2 4 0 1 2 6 -1 -1 3 0 21 - 323 SM_AMIGA_0_ 3 -1 0 4 0 1 2 7 -1 -1 2 0 21 - 327 CLK_000_N_SYNC_12_ 3 -1 0 4 0 1 2 3 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 4 0 21 - 356 SM_AMIGA_1_ 3 -1 2 3 0 2 7 -1 -1 3 0 21 - 319 SM_AMIGA_5_ 3 -1 2 3 1 2 7 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 295 cpu_est_0_ 3 -1 2 3 2 3 6 -1 -1 2 0 21 - 317 CLK_000_D_0_ 3 -1 6 3 2 3 5 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 6 3 1 6 7 -1 -1 1 0 21 - 303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 301 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 - 326 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 325 SM_AMIGA_4_ 3 -1 1 2 1 2 -1 -1 3 0 21 - 311 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 324 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 - 310 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 353 inst_CLK_000_NE_D0 3 -1 2 2 2 6 -1 -1 1 0 21 - 316 CLK_000_D_1_ 3 -1 3 2 2 5 -1 -1 1 0 21 - 315 inst_CLK_OUT_PRE_50 3 -1 2 2 2 6 -1 -1 1 0 21 - 309 inst_VPA_D 3 -1 5 2 2 3 -1 -1 1 0 21 - 302 inst_BGACK_030_INT_D 3 -1 7 2 5 6 -1 -1 1 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 355 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 357 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 358 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 4 0 21 - 329 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 366 RN_A0 3 68 6 1 6 68 -1 3 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 328 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 330 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 360 N_319 3 -1 3 1 2 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_11_ 3 -1 7 1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_9_ 3 -1 4 1 7 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_8_ 3 -1 6 1 4 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_7_ 3 -1 5 1 6 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_6_ 3 -1 4 1 5 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_5_ 3 -1 0 1 4 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_4_ 3 -1 6 1 0 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_3_ 3 -1 5 1 6 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_2_ 3 -1 0 1 5 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_1_ 3 -1 5 1 0 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_0_ 3 -1 5 1 5 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_9_ 3 -1 4 1 5 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_8_ 3 -1 3 1 4 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_7_ 3 -1 1 1 3 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_5_ 3 -1 5 1 0 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_4_ 3 -1 1 1 5 -1 -1 1 0 21 - 334 CLK_000_P_SYNC_3_ 3 -1 3 1 1 -1 -1 1 0 21 - 333 CLK_000_P_SYNC_2_ 3 -1 3 1 3 -1 -1 1 0 21 - 332 CLK_000_P_SYNC_1_ 3 -1 3 1 3 -1 -1 1 0 21 - 331 CLK_000_P_SYNC_0_ 3 -1 2 1 3 -1 -1 1 0 21 - 322 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 321 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 320 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 313 inst_DTACK_D0 3 -1 3 1 2 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_21_ 1 -1 -1 1 4 93 -1 - 92 A_20_ 1 -1 -1 1 4 92 -1 - 84 A_23_ 1 -1 -1 1 4 84 -1 - 83 A_22_ 1 -1 -1 1 4 83 -1 - 59 A1 1 -1 -1 1 5 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 18 A_24_ 1 -1 -1 1 4 18 -1 - 17 A_25_ 1 -1 -1 1 4 17 -1 - 16 A_26_ 1 -1 -1 1 4 16 -1 - 15 A_27_ 1 -1 -1 1 4 15 -1 - 14 A_28_ 1 -1 -1 1 4 14 -1 - 13 nEXP_SPACE 1 -1 -1 1 5 13 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 - 5 A_29_ 1 -1 -1 1 4 5 -1 - 4 A_30_ 1 -1 -1 1 4 4 -1 - 3 A_31_ 1 -1 -1 1 4 3 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 381 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 310 A_0_ 5 384 6 2 1 6 -1 -1 3 0 21 - 70 RW 5 389 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 380 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 386 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 385 1 0 6 -1 10 0 21 - 80 DSACK1 5 387 7 0 80 -1 4 0 21 - 82 BGACK_030 5 383 7 0 82 -1 3 0 21 - 34 VMA 5 388 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 382 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 318 inst_nEXP_SPACE_D0reg 3 -1 6 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 383 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 3 0 21 - 332 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 336 CLK_000_P_SYNC_10_ 3 -1 6 5 0 2 3 5 7 -1 -1 1 0 21 - 317 inst_AS_030_D0 3 -1 7 5 1 2 3 4 7 -1 -1 1 0 21 - 377 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 372 SM_AMIGA_6_ 3 -1 5 4 1 2 5 6 -1 -1 3 0 21 - 337 SM_AMIGA_5_ 3 -1 5 4 1 2 5 7 -1 -1 3 0 21 - 311 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 314 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 312 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 341 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 335 CLK_000_D_0_ 3 -1 0 3 3 5 6 -1 -1 1 0 21 - 330 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 321 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 319 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 344 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 388 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 374 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 343 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 329 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 326 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 325 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 328 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 315 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 313 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 371 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_12_ 3 -1 0 2 3 5 -1 -1 1 0 21 - 334 CLK_000_D_1_ 3 -1 6 2 3 5 -1 -1 1 0 21 - 333 inst_CLK_OUT_PRE_50 3 -1 1 2 1 4 -1 -1 1 0 21 - 327 inst_VPA_D 3 -1 2 2 3 5 -1 -1 1 0 21 - 320 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 - 386 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 385 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 380 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 322 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 373 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 375 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 387 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 378 N_104 3 -1 5 1 5 -1 -1 4 0 21 - 376 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 347 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 384 RN_A_0_ 3 310 6 1 6 -1 -1 3 0 21 - 381 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 346 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 324 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 389 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 382 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 379 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 348 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 323 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 316 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 370 CLK_000_N_SYNC_11_ 3 -1 7 1 0 -1 -1 1 0 21 - 369 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 368 CLK_000_N_SYNC_9_ 3 -1 1 1 7 -1 -1 1 0 21 - 367 CLK_000_N_SYNC_8_ 3 -1 1 1 1 -1 -1 1 0 21 - 366 CLK_000_N_SYNC_7_ 3 -1 6 1 1 -1 -1 1 0 21 - 365 CLK_000_N_SYNC_6_ 3 -1 0 1 6 -1 -1 1 0 21 - 364 CLK_000_N_SYNC_5_ 3 -1 0 1 0 -1 -1 1 0 21 - 363 CLK_000_N_SYNC_4_ 3 -1 0 1 0 -1 -1 1 0 21 - 362 CLK_000_N_SYNC_3_ 3 -1 1 1 0 -1 -1 1 0 21 - 361 CLK_000_N_SYNC_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 360 CLK_000_N_SYNC_1_ 3 -1 4 1 6 -1 -1 1 0 21 - 359 CLK_000_N_SYNC_0_ 3 -1 3 1 4 -1 -1 1 0 21 - 358 CLK_000_P_SYNC_9_ 3 -1 1 1 6 -1 -1 1 0 21 - 357 CLK_000_P_SYNC_8_ 3 -1 0 1 1 -1 -1 1 0 21 - 356 CLK_000_P_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21 - 355 CLK_000_P_SYNC_6_ 3 -1 4 1 0 -1 -1 1 0 21 - 354 CLK_000_P_SYNC_5_ 3 -1 1 1 4 -1 -1 1 0 21 - 353 CLK_000_P_SYNC_4_ 3 -1 2 1 1 -1 -1 1 0 21 - 352 CLK_000_P_SYNC_3_ 3 -1 6 1 2 -1 -1 1 0 21 - 351 CLK_000_P_SYNC_2_ 3 -1 3 1 6 -1 -1 1 0 21 - 350 CLK_000_P_SYNC_1_ 3 -1 0 1 3 -1 -1 1 0 21 - 349 CLK_000_P_SYNC_0_ 3 -1 3 1 0 -1 -1 1 0 21 - 340 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 339 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 338 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 331 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 6 13 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 - 308 AHIGH_16_ 1 -1 -1 3 2 4 7 -1 -1 - 307 AHIGH_17_ 1 -1 -1 3 2 4 7 -1 -1 - 306 AHIGH_18_ 1 -1 -1 3 2 4 7 -1 -1 - 305 AHIGH_19_ 1 -1 -1 3 2 4 7 -1 -1 - 309 A_1_ 1 -1 -1 1 2 -1 -1 - 304 AHIGH_20_ 1 -1 -1 1 4 -1 -1 - 303 AHIGH_21_ 1 -1 -1 1 4 -1 -1 - 302 AHIGH_22_ 1 -1 -1 1 4 -1 -1 - 301 AHIGH_23_ 1 -1 -1 1 4 -1 -1 - 300 AHIGH_24_ 1 -1 -1 1 4 -1 -1 - 299 AHIGH_25_ 1 -1 -1 1 4 -1 -1 - 298 AHIGH_26_ 1 -1 -1 1 4 -1 -1 - 297 AHIGH_27_ 1 -1 -1 1 4 -1 -1 - 296 AHIGH_28_ 1 -1 -1 1 4 -1 -1 - 295 AHIGH_29_ 1 -1 -1 1 4 -1 -1 - 294 AHIGH_30_ 1 -1 -1 1 4 -1 -1 - 293 AHIGH_31_ 1 -1 -1 1 4 -1 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 381 7 3 1 4 6 79 -1 3 0 21 - 310 A_0_ 5 384 6 2 0 6 -1 -1 3 0 21 - 70 RW 5 389 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 1 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 1 6 30 -1 1 0 21 - 300 AHIGH_24_ 5 -1 4 1 4 -1 -1 1 0 21 - 299 AHIGH_25_ 5 -1 4 1 4 -1 -1 1 0 21 - 298 AHIGH_26_ 5 -1 0 1 4 -1 -1 1 0 21 - 297 AHIGH_27_ 5 -1 4 1 4 -1 -1 1 0 21 - 296 AHIGH_28_ 5 -1 7 1 4 -1 -1 1 0 21 - 295 AHIGH_29_ 5 -1 7 1 4 -1 -1 1 0 21 - 294 AHIGH_30_ 5 -1 4 1 4 -1 -1 1 0 21 - 293 AHIGH_31_ 5 -1 0 1 4 -1 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 380 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 386 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 385 1 0 6 -1 10 0 21 - 80 DSACK1 5 387 7 0 80 -1 4 0 21 - 82 BGACK_030 5 383 7 0 82 -1 3 0 21 - 34 VMA 5 388 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 382 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 383 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 318 inst_nEXP_SPACE_D0reg 3 -1 6 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 332 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 336 CLK_000_P_SYNC_10_ 3 -1 0 6 0 1 2 3 5 7 -1 -1 1 0 21 - 378 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 10 0 21 - 372 SM_AMIGA_6_ 3 -1 5 4 0 2 5 6 -1 -1 3 0 21 - 337 SM_AMIGA_5_ 3 -1 5 4 0 2 5 7 -1 -1 3 0 21 - 317 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 314 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 374 SM_AMIGA_1_ 3 -1 0 3 0 5 7 -1 -1 3 0 21 - 343 SM_AMIGA_4_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 - 313 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 311 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 341 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 345 CLK_000_N_SYNC_12_ 3 -1 0 3 0 3 5 -1 -1 1 0 21 - 330 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 322 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21 - 321 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 - 319 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 344 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 376 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 4 0 21 - 347 RST_DLY_1_ 3 -1 0 2 0 3 -1 -1 4 0 21 - 388 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 346 RST_DLY_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 329 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 326 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 325 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 348 RST_DLY_2_ 3 -1 3 2 0 3 -1 -1 2 0 21 - 342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 328 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 315 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 312 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 371 inst_CLK_000_NE_D0 3 -1 5 2 3 5 -1 -1 1 0 21 - 335 CLK_000_D_0_ 3 -1 5 2 3 5 -1 -1 1 0 21 - 334 CLK_000_D_1_ 3 -1 3 2 3 5 -1 -1 1 0 21 - 327 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21 - 320 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 - 386 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 385 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 380 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 373 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 - 377 N_145_i_2 3 -1 0 1 5 -1 -1 5 0 21 - 375 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 387 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 384 RN_A_0_ 3 310 6 1 6 -1 -1 3 0 21 - 381 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 324 CYCLE_DMA_1_ 3 -1 1 1 1 -1 -1 3 0 21 - 389 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 382 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 379 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 323 CYCLE_DMA_0_ 3 -1 1 1 1 -1 -1 2 0 21 - 316 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 370 CLK_000_N_SYNC_11_ 3 -1 7 1 0 -1 -1 1 0 21 - 369 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 368 CLK_000_N_SYNC_9_ 3 -1 2 1 7 -1 -1 1 0 21 - 367 CLK_000_N_SYNC_8_ 3 -1 0 1 2 -1 -1 1 0 21 - 366 CLK_000_N_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21 - 365 CLK_000_N_SYNC_6_ 3 -1 2 1 0 -1 -1 1 0 21 - 364 CLK_000_N_SYNC_5_ 3 -1 0 1 2 -1 -1 1 0 21 - 363 CLK_000_N_SYNC_4_ 3 -1 1 1 0 -1 -1 1 0 21 - 362 CLK_000_N_SYNC_3_ 3 -1 5 1 1 -1 -1 1 0 21 - 361 CLK_000_N_SYNC_2_ 3 -1 5 1 5 -1 -1 1 0 21 - 360 CLK_000_N_SYNC_1_ 3 -1 1 1 5 -1 -1 1 0 21 - 359 CLK_000_N_SYNC_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 358 CLK_000_P_SYNC_9_ 3 -1 6 1 0 -1 -1 1 0 21 - 357 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 356 CLK_000_P_SYNC_7_ 3 -1 0 1 6 -1 -1 1 0 21 - 355 CLK_000_P_SYNC_6_ 3 -1 6 1 0 -1 -1 1 0 21 - 354 CLK_000_P_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 353 CLK_000_P_SYNC_4_ 3 -1 1 1 3 -1 -1 1 0 21 - 352 CLK_000_P_SYNC_3_ 3 -1 5 1 1 -1 -1 1 0 21 - 351 CLK_000_P_SYNC_2_ 3 -1 4 1 5 -1 -1 1 0 21 - 350 CLK_000_P_SYNC_1_ 3 -1 1 1 4 -1 -1 1 0 21 - 349 CLK_000_P_SYNC_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 340 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 339 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 338 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 333 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 331 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 1 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 6 13 -1 - 10 CLK_000 1 -1 -1 1 5 10 -1 - 309 AHIGH_16_ 1 -1 -1 3 2 4 7 -1 -1 - 308 AHIGH_17_ 1 -1 -1 3 2 4 7 -1 -1 - 307 AHIGH_18_ 1 -1 -1 3 2 4 7 -1 -1 - 306 AHIGH_19_ 1 -1 -1 3 2 4 7 -1 -1 - 301 A_1_ 1 -1 -1 2 2 6 -1 -1 - 305 AHIGH_20_ 1 -1 -1 1 4 -1 -1 - 304 AHIGH_21_ 1 -1 -1 1 4 -1 -1 - 303 AHIGH_22_ 1 -1 -1 1 4 -1 -1 - 302 AHIGH_23_ 1 -1 -1 1 4 -1 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 381 7 3 1 4 6 79 -1 3 0 21 - 310 A_0_ 5 384 6 2 0 6 -1 -1 3 0 21 - 70 RW 5 389 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 1 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 1 6 30 -1 1 0 21 - 300 AHIGH_24_ 5 -1 4 1 4 -1 -1 1 0 21 - 299 AHIGH_25_ 5 -1 4 1 4 -1 -1 1 0 21 - 298 AHIGH_26_ 5 -1 0 1 4 -1 -1 1 0 21 - 297 AHIGH_27_ 5 -1 4 1 4 -1 -1 1 0 21 - 296 AHIGH_28_ 5 -1 7 1 4 -1 -1 1 0 21 - 295 AHIGH_29_ 5 -1 7 1 4 -1 -1 1 0 21 - 294 AHIGH_30_ 5 -1 4 1 4 -1 -1 1 0 21 - 293 AHIGH_31_ 5 -1 0 1 4 -1 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 8 IPL_030_2_ 5 380 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 386 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 385 1 0 6 -1 10 0 21 - 80 DSACK1 5 387 7 0 80 -1 4 0 21 - 82 BGACK_030 5 383 7 0 82 -1 3 0 21 - 34 VMA 5 388 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 382 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 383 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 318 inst_nEXP_SPACE_D0reg 3 -1 6 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 332 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 336 CLK_000_P_SYNC_10_ 3 -1 0 6 0 1 2 3 5 7 -1 -1 1 0 21 - 378 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 10 0 21 - 372 SM_AMIGA_6_ 3 -1 5 4 0 2 5 6 -1 -1 3 0 21 - 337 SM_AMIGA_5_ 3 -1 5 4 0 2 5 7 -1 -1 3 0 21 - 317 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 - 314 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 374 SM_AMIGA_1_ 3 -1 0 3 0 5 7 -1 -1 3 0 21 - 343 SM_AMIGA_4_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 - 313 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 311 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 341 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 345 CLK_000_N_SYNC_12_ 3 -1 0 3 0 3 5 -1 -1 1 0 21 - 330 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 322 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21 - 321 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 - 319 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 344 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 376 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 4 0 21 - 347 RST_DLY_1_ 3 -1 0 2 0 3 -1 -1 4 0 21 - 388 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 346 RST_DLY_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 - 329 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 326 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 325 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 348 RST_DLY_2_ 3 -1 3 2 0 3 -1 -1 2 0 21 - 342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 328 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 315 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 312 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 371 inst_CLK_000_NE_D0 3 -1 5 2 3 5 -1 -1 1 0 21 - 335 CLK_000_D_0_ 3 -1 5 2 3 5 -1 -1 1 0 21 - 334 CLK_000_D_1_ 3 -1 3 2 3 5 -1 -1 1 0 21 - 327 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21 - 320 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 - 386 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 385 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 380 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 373 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 - 377 N_145_i_2 3 -1 0 1 5 -1 -1 5 0 21 - 375 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 387 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 384 RN_A_0_ 3 310 6 1 6 -1 -1 3 0 21 - 381 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 324 CYCLE_DMA_1_ 3 -1 1 1 1 -1 -1 3 0 21 - 389 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 382 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 379 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 323 CYCLE_DMA_0_ 3 -1 1 1 1 -1 -1 2 0 21 - 316 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 370 CLK_000_N_SYNC_11_ 3 -1 7 1 0 -1 -1 1 0 21 - 369 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 368 CLK_000_N_SYNC_9_ 3 -1 2 1 7 -1 -1 1 0 21 - 367 CLK_000_N_SYNC_8_ 3 -1 0 1 2 -1 -1 1 0 21 - 366 CLK_000_N_SYNC_7_ 3 -1 0 1 0 -1 -1 1 0 21 - 365 CLK_000_N_SYNC_6_ 3 -1 2 1 0 -1 -1 1 0 21 - 364 CLK_000_N_SYNC_5_ 3 -1 0 1 2 -1 -1 1 0 21 - 363 CLK_000_N_SYNC_4_ 3 -1 1 1 0 -1 -1 1 0 21 - 362 CLK_000_N_SYNC_3_ 3 -1 5 1 1 -1 -1 1 0 21 - 361 CLK_000_N_SYNC_2_ 3 -1 5 1 5 -1 -1 1 0 21 - 360 CLK_000_N_SYNC_1_ 3 -1 1 1 5 -1 -1 1 0 21 - 359 CLK_000_N_SYNC_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 358 CLK_000_P_SYNC_9_ 3 -1 6 1 0 -1 -1 1 0 21 - 357 CLK_000_P_SYNC_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 356 CLK_000_P_SYNC_7_ 3 -1 0 1 6 -1 -1 1 0 21 - 355 CLK_000_P_SYNC_6_ 3 -1 6 1 0 -1 -1 1 0 21 - 354 CLK_000_P_SYNC_5_ 3 -1 3 1 6 -1 -1 1 0 21 - 353 CLK_000_P_SYNC_4_ 3 -1 1 1 3 -1 -1 1 0 21 - 352 CLK_000_P_SYNC_3_ 3 -1 5 1 1 -1 -1 1 0 21 - 351 CLK_000_P_SYNC_2_ 3 -1 4 1 5 -1 -1 1 0 21 - 350 CLK_000_P_SYNC_1_ 3 -1 1 1 4 -1 -1 1 0 21 - 349 CLK_000_P_SYNC_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 340 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 339 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 338 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 333 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 331 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 1 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 6 13 -1 - 10 CLK_000 1 -1 -1 1 5 10 -1 - 309 AHIGH_16_ 1 -1 -1 3 2 4 7 -1 -1 - 308 AHIGH_17_ 1 -1 -1 3 2 4 7 -1 -1 - 307 AHIGH_18_ 1 -1 -1 3 2 4 7 -1 -1 - 306 AHIGH_19_ 1 -1 -1 3 2 4 7 -1 -1 - 301 A_1_ 1 -1 -1 2 2 6 -1 -1 - 305 AHIGH_20_ 1 -1 -1 1 4 -1 -1 - 304 AHIGH_21_ 1 -1 -1 1 4 -1 -1 - 303 AHIGH_22_ 1 -1 -1 1 4 -1 -1 - 302 AHIGH_23_ 1 -1 -1 1 4 -1 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 384 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 389 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 310 A_0_ 5 380 0 1 1 -1 -1 3 0 21 - 302 AHIGH_24_ 5 -1 4 1 4 -1 -1 1 0 21 - 301 AHIGH_25_ 5 -1 7 1 4 -1 -1 1 0 21 - 300 AHIGH_26_ 5 -1 4 1 4 -1 -1 1 0 21 - 299 AHIGH_27_ 5 -1 4 1 4 -1 -1 1 0 21 - 298 AHIGH_28_ 5 -1 7 1 4 -1 -1 1 0 21 - 297 AHIGH_29_ 5 -1 4 1 4 -1 -1 1 0 21 - 296 AHIGH_30_ 5 -1 6 1 4 -1 -1 1 0 21 - 293 AHIGH_31_ 5 -1 6 1 4 -1 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 8 IPL_030_2_ 5 383 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 382 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 381 1 0 6 -1 10 0 21 - 80 DSACK1 5 387 7 0 80 -1 4 0 21 - 82 BGACK_030 5 386 7 0 82 -1 3 0 21 - 34 VMA 5 388 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 385 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 386 RN_BGACK_030 3 82 7 6 0 2 3 4 6 7 82 -1 3 0 21 - 333 inst_RESET_OUT 3 -1 3 6 0 1 3 4 6 7 -1 -1 2 0 21 - 319 inst_nEXP_SPACE_D0reg 3 -1 2 6 0 2 3 4 6 7 -1 -1 1 0 21 - 318 inst_AS_030_D0 3 -1 7 6 2 3 4 5 6 7 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_10_ 3 -1 6 5 0 2 3 5 7 -1 -1 1 0 21 - 378 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 338 SM_AMIGA_5_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21 - 315 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 375 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 373 SM_AMIGA_6_ 3 -1 2 3 1 2 5 -1 -1 3 0 21 - 314 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 311 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 342 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 336 CLK_000_D_0_ 3 -1 5 3 2 3 6 -1 -1 1 0 21 - 331 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 321 inst_BGACK_030_INT_D 3 -1 7 3 0 2 6 -1 -1 1 0 21 - 322 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 376 SM_AMIGA_3_ 3 -1 5 2 2 5 -1 -1 5 0 21 - 345 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 377 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 4 0 21 - 388 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 344 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 330 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 327 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 326 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 343 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 - 329 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 317 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 316 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 312 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 372 inst_CLK_000_NE_D0 3 -1 5 2 3 5 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_12_ 3 -1 4 2 3 5 -1 -1 1 0 21 - 335 CLK_000_D_1_ 3 -1 3 2 2 6 -1 -1 1 0 21 - 328 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21 - 383 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 382 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 381 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 323 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 374 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 320 inst_AS_030_000_SYNC 3 -1 2 1 2 -1 -1 7 0 21 - 387 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 348 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 313 N_195_i 3 -1 2 1 5 -1 -1 4 0 21 - 384 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 380 RN_A_0_ 3 310 0 1 0 -1 -1 3 0 21 - 347 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 325 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 389 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 385 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 379 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 349 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 324 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 371 CLK_000_N_SYNC_11_ 3 -1 7 1 4 -1 -1 1 0 21 - 370 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 369 CLK_000_N_SYNC_9_ 3 -1 1 1 7 -1 -1 1 0 21 - 368 CLK_000_N_SYNC_8_ 3 -1 0 1 1 -1 -1 1 0 21 - 367 CLK_000_N_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21 - 366 CLK_000_N_SYNC_6_ 3 -1 1 1 5 -1 -1 1 0 21 - 365 CLK_000_N_SYNC_5_ 3 -1 1 1 1 -1 -1 1 0 21 - 364 CLK_000_N_SYNC_4_ 3 -1 3 1 1 -1 -1 1 0 21 - 363 CLK_000_N_SYNC_3_ 3 -1 6 1 3 -1 -1 1 0 21 - 362 CLK_000_N_SYNC_2_ 3 -1 1 1 6 -1 -1 1 0 21 - 361 CLK_000_N_SYNC_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 360 CLK_000_N_SYNC_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 359 CLK_000_P_SYNC_9_ 3 -1 1 1 6 -1 -1 1 0 21 - 358 CLK_000_P_SYNC_8_ 3 -1 5 1 1 -1 -1 1 0 21 - 357 CLK_000_P_SYNC_7_ 3 -1 0 1 5 -1 -1 1 0 21 - 356 CLK_000_P_SYNC_6_ 3 -1 2 1 0 -1 -1 1 0 21 - 355 CLK_000_P_SYNC_5_ 3 -1 6 1 2 -1 -1 1 0 21 - 354 CLK_000_P_SYNC_4_ 3 -1 1 1 6 -1 -1 1 0 21 - 353 CLK_000_P_SYNC_3_ 3 -1 3 1 1 -1 -1 1 0 21 - 352 CLK_000_P_SYNC_2_ 3 -1 0 1 3 -1 -1 1 0 21 - 351 CLK_000_P_SYNC_1_ 3 -1 0 1 0 -1 -1 1 0 21 - 350 CLK_000_P_SYNC_0_ 3 -1 2 1 0 -1 -1 1 0 21 - 341 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 340 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 339 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 334 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 332 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 2 13 -1 - 10 CLK_000 1 -1 -1 1 5 10 -1 - 309 A_DECODE_16_ 1 -1 -1 3 2 4 7 -1 -1 - 308 A_DECODE_17_ 1 -1 -1 3 2 4 7 -1 -1 - 307 A_DECODE_18_ 1 -1 -1 3 2 4 7 -1 -1 - 306 A_DECODE_19_ 1 -1 -1 3 2 4 7 -1 -1 - 305 A_DECODE_20_ 1 -1 -1 1 4 -1 -1 - 304 A_DECODE_21_ 1 -1 -1 1 4 -1 -1 - 303 A_DECODE_22_ 1 -1 -1 1 4 -1 -1 - 295 A_1_ 1 -1 -1 1 0 -1 -1 - 294 A_DECODE_23_ 1 -1 -1 1 4 -1 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 366 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 371 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A_0_ 5 362 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 @@ -8554,16 +156,16 @@ 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 365 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 + 82 BGACK_030 5 382 7 0 82 -1 3 0 21 + 34 VMA 5 387 3 0 34 -1 3 0 21 + 28 BG_000 5 381 3 0 28 -1 3 0 21 + 8 IPL_030_2_ 5 379 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 385 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 384 1 0 6 -1 3 0 21 + 80 DSACK1 5 386 7 0 80 -1 2 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 77 FPU_CS 0 7 0 77 -1 1 0 21 @@ -8573,97 +175,710 @@ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 2 RESET 0 1 0 2 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 2 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 315 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 319 CLK_000_P_SYNC_10_ 3 -1 1 5 0 1 3 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 320 SM_AMIGA_5_ 3 -1 5 4 1 2 5 7 -1 -1 3 0 21 - 297 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 296 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 328 CLK_000_N_SYNC_12_ 3 -1 6 3 1 3 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 327 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 370 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 355 SM_AMIGA_6_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 326 SM_AMIGA_4_ 3 -1 1 2 1 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 325 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 324 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 354 inst_CLK_000_NE_D0 3 -1 5 2 3 5 -1 -1 1 0 21 - 318 CLK_000_D_0_ 3 -1 2 2 3 5 -1 -1 1 0 21 - 317 CLK_000_D_1_ 3 -1 5 2 3 5 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21 - 365 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 330 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 295 N_195_i 3 -1 5 1 5 -1 -1 4 0 21 - 366 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 362 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 329 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 331 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 353 CLK_000_N_SYNC_11_ 3 -1 7 1 6 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_9_ 3 -1 6 1 7 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_8_ 3 -1 2 1 6 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_7_ 3 -1 4 1 2 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_6_ 3 -1 6 1 4 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_5_ 3 -1 2 1 6 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_4_ 3 -1 4 1 2 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_3_ 3 -1 2 1 4 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_2_ 3 -1 1 1 2 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_9_ 3 -1 0 1 1 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_8_ 3 -1 2 1 0 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_7_ 3 -1 0 1 2 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_6_ 3 -1 0 1 0 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_5_ 3 -1 2 1 0 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_4_ 3 -1 3 1 2 -1 -1 1 0 21 - 335 CLK_000_P_SYNC_3_ 3 -1 6 1 3 -1 -1 1 0 21 - 334 CLK_000_P_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21 - 333 CLK_000_P_SYNC_1_ 3 -1 6 1 2 -1 -1 1 0 21 - 332 CLK_000_P_SYNC_0_ 3 -1 3 1 6 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 316 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 314 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 + 382 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 339 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 340 CLK_000_D_0_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21 + 335 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 + 316 inst_AS_030_D0 3 -1 7 5 0 2 4 5 7 -1 -1 1 0 21 + 364 SM_AMIGA_6_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21 + 377 SM_AMIGA_i_7_ 3 -1 2 3 0 5 7 -1 -1 3 0 21 + 373 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 367 SM_AMIGA_4_ 3 -1 2 3 2 5 6 -1 -1 3 0 21 + 363 inst_BGACK_000_SAMPLE 3 -1 7 3 0 2 7 -1 -1 3 0 21 + 313 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 + 312 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 3 0 21 + 310 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 + 317 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 2 0 21 + 351 N_175_i_0_i_i 3 -1 7 3 5 6 7 -1 -1 1 0 21 + 344 IPL_D0_0_ 3 -1 5 3 0 1 3 -1 -1 1 0 21 + 318 inst_BGACK_030_INT_D 3 -1 7 3 0 1 6 -1 -1 1 0 21 + 387 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 376 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 374 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 370 RST_DLY_2_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 366 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 + 361 inst_BGACK_030_INT_PRE 3 -1 0 2 0 2 -1 -1 3 0 21 + 332 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 328 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 326 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 311 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21 + 375 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 2 0 21 + 371 inst_BG_000_PRE 3 -1 2 2 2 3 -1 -1 2 0 21 + 365 N_249_i 3 -1 2 2 1 3 -1 -1 2 0 21 + 360 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 2 0 21 + 359 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 + 331 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 321 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 2 0 21 + 319 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 2 0 21 + 315 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 314 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 308 N_194_i 3 -1 5 2 0 2 -1 -1 2 0 21 + 347 CLK_000_D_2_ 3 -1 7 2 4 5 -1 -1 1 0 21 + 346 IPL_D0_2_ 3 -1 2 2 1 2 -1 -1 1 0 21 + 345 IPL_D0_1_ 3 -1 6 2 1 3 -1 -1 1 0 21 + 337 CLK_000_D_11_ 3 -1 3 2 1 3 -1 -1 1 0 21 + 336 CLK_000_D_10_ 3 -1 7 2 1 3 -1 -1 1 0 21 + 333 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 385 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 384 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 383 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 381 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 380 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 379 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 369 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 342 N_154_0 3 -1 6 1 5 -1 -1 3 0 21 + 334 N_159_0 3 -1 1 1 7 -1 -1 3 0 21 + 324 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21 + 323 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 3 0 21 + 309 N_190_i 3 -1 5 1 2 -1 -1 3 0 21 + 300 cpu_est_2_2__n 3 -1 3 1 3 -1 -1 3 0 21 + 293 N_258 3 -1 0 1 0 -1 -1 3 0 21 + 388 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 386 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 378 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 372 inst_CLK_030_H 3 -1 1 1 1 -1 -1 2 0 21 + 368 RST_DLY_0_ 3 -1 0 1 0 -1 -1 2 0 21 + 362 N_247_i 3 -1 0 1 1 -1 -1 2 0 21 + 343 bgack_030_int_pre_0_un1_n 3 -1 0 1 0 -1 -1 2 0 21 + 327 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 6 1 1 -1 -1 2 0 21 + 322 ds_000_dma_0_un1_n 3 -1 1 1 6 -1 -1 2 0 21 + 320 ds_000_dma_0_un3_n 3 -1 1 1 6 -1 -1 2 0 21 + 307 N_192_i 3 -1 5 1 2 -1 -1 2 0 21 + 306 vma_int_0_un3_n 3 -1 5 1 3 -1 -1 2 0 21 + 305 N_195_i 3 -1 7 1 2 -1 -1 2 0 21 + 303 cpu_est_2_1__n 3 -1 5 1 6 -1 -1 2 0 21 + 302 N_200_i 3 -1 3 1 0 -1 -1 2 0 21 + 301 ipl_030_0_2__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 299 N_294 3 -1 5 1 3 -1 -1 2 0 21 + 298 ipl_030_0_1__un1_n 3 -1 3 1 1 -1 -1 2 0 21 + 296 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 295 N_179_0 3 -1 5 1 2 -1 -1 2 0 21 + 358 CLK_000_D_12_ 3 -1 3 1 1 -1 -1 1 0 21 + 357 CLK_000_D_9_ 3 -1 0 1 7 -1 -1 1 0 21 + 356 CLK_000_D_8_ 3 -1 4 1 0 -1 -1 1 0 21 + 355 CLK_000_D_7_ 3 -1 5 1 4 -1 -1 1 0 21 + 354 CLK_000_D_6_ 3 -1 3 1 5 -1 -1 1 0 21 + 353 CLK_000_D_5_ 3 -1 5 1 3 -1 -1 1 0 21 + 352 bgack_030_int_0_un1_n 3 -1 2 1 7 -1 -1 1 0 21 + 350 CLK_000_D_4_ 3 -1 0 1 5 -1 -1 1 0 21 + 349 N_257_i 3 -1 6 1 6 -1 -1 1 0 21 + 348 CLK_000_D_3_ 3 -1 4 1 0 -1 -1 1 0 21 + 341 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 338 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 + 330 inst_VPA_D 3 -1 3 1 5 -1 -1 1 0 21 + 329 N_147_i 3 -1 4 1 0 -1 -1 1 0 21 + 325 pos_clk_un3_as_030_d0_0_n 3 -1 7 1 5 -1 -1 1 0 21 + 304 N_196_i 3 -1 5 1 2 -1 -1 1 0 21 + 297 N_204_i 3 -1 0 1 0 -1 -1 1 0 21 + 294 N_267 3 -1 0 1 0 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 4 5 6 7 13 -1 + 66 IPL_0_ 1 -1 -1 4 0 1 3 5 66 -1 + 27 BGACK_000 1 -1 -1 4 0 2 4 7 27 -1 + 55 IPL_1_ 1 -1 -1 3 1 3 6 55 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 59 A_1_ 1 -1 -1 2 1 6 59 -1 - 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 1 63 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 3 29 -1 + 20 BG_030 1 -1 -1 1 2 20 -1 + 10 CLK_000 1 -1 -1 1 4 10 -1 +157 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 2 4 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 + 79 RW_000 5 380 7 3 1 4 6 79 -1 3 0 21 + 70 RW 5 388 6 2 6 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 68 A_0_ 5 383 6 1 2 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 382 7 0 82 -1 3 0 21 + 34 VMA 5 387 3 0 34 -1 3 0 21 + 28 BG_000 5 381 3 0 28 -1 3 0 21 + 8 IPL_030_2_ 5 379 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 385 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 384 1 0 6 -1 3 0 21 + 80 DSACK1 5 386 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 382 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 339 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 340 CLK_000_D_0_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21 + 335 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 + 316 inst_AS_030_D0 3 -1 7 5 0 2 4 5 7 -1 -1 1 0 21 + 364 SM_AMIGA_6_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21 + 377 SM_AMIGA_i_7_ 3 -1 2 3 0 5 7 -1 -1 3 0 21 + 373 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 367 SM_AMIGA_4_ 3 -1 2 3 2 5 6 -1 -1 3 0 21 + 363 inst_BGACK_000_SAMPLE 3 -1 7 3 0 2 7 -1 -1 3 0 21 + 313 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 + 312 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 3 0 21 + 310 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 + 317 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 2 0 21 + 351 N_175_i_0_i_i 3 -1 7 3 5 6 7 -1 -1 1 0 21 + 344 IPL_D0_0_ 3 -1 5 3 0 1 3 -1 -1 1 0 21 + 318 inst_BGACK_030_INT_D 3 -1 7 3 0 1 6 -1 -1 1 0 21 + 387 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 376 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 374 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 370 RST_DLY_2_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 366 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 + 361 inst_BGACK_030_INT_PRE 3 -1 0 2 0 2 -1 -1 3 0 21 + 332 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 328 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 326 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 311 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21 + 375 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 2 0 21 + 371 inst_BG_000_PRE 3 -1 2 2 2 3 -1 -1 2 0 21 + 365 N_249_i 3 -1 2 2 1 3 -1 -1 2 0 21 + 360 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 2 0 21 + 359 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 + 331 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 321 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 2 0 21 + 319 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 2 0 21 + 315 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 314 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 308 N_194_i 3 -1 5 2 0 2 -1 -1 2 0 21 + 347 CLK_000_D_2_ 3 -1 7 2 4 5 -1 -1 1 0 21 + 346 IPL_D0_2_ 3 -1 2 2 1 2 -1 -1 1 0 21 + 345 IPL_D0_1_ 3 -1 6 2 1 3 -1 -1 1 0 21 + 337 CLK_000_D_11_ 3 -1 3 2 1 3 -1 -1 1 0 21 + 336 CLK_000_D_10_ 3 -1 7 2 1 3 -1 -1 1 0 21 + 333 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 385 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 384 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 383 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 381 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 380 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 379 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 369 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 342 N_154_0 3 -1 6 1 5 -1 -1 3 0 21 + 334 N_159_0 3 -1 1 1 7 -1 -1 3 0 21 + 324 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21 + 323 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 3 0 21 + 309 N_190_i 3 -1 5 1 2 -1 -1 3 0 21 + 300 cpu_est_2_2__n 3 -1 3 1 3 -1 -1 3 0 21 + 293 N_258 3 -1 0 1 0 -1 -1 3 0 21 + 388 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 386 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 378 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 372 inst_CLK_030_H 3 -1 1 1 1 -1 -1 2 0 21 + 368 RST_DLY_0_ 3 -1 0 1 0 -1 -1 2 0 21 + 362 N_247_i 3 -1 0 1 1 -1 -1 2 0 21 + 343 bgack_030_int_pre_0_un1_n 3 -1 0 1 0 -1 -1 2 0 21 + 327 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 6 1 1 -1 -1 2 0 21 + 322 ds_000_dma_0_un1_n 3 -1 1 1 6 -1 -1 2 0 21 + 320 ds_000_dma_0_un3_n 3 -1 1 1 6 -1 -1 2 0 21 + 307 N_192_i 3 -1 5 1 2 -1 -1 2 0 21 + 306 vma_int_0_un3_n 3 -1 5 1 3 -1 -1 2 0 21 + 305 N_195_i 3 -1 7 1 2 -1 -1 2 0 21 + 303 cpu_est_2_1__n 3 -1 5 1 6 -1 -1 2 0 21 + 302 N_200_i 3 -1 3 1 0 -1 -1 2 0 21 + 301 ipl_030_0_2__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 299 N_294 3 -1 5 1 3 -1 -1 2 0 21 + 298 ipl_030_0_1__un1_n 3 -1 3 1 1 -1 -1 2 0 21 + 296 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 295 N_179_0 3 -1 5 1 2 -1 -1 2 0 21 + 358 CLK_000_D_12_ 3 -1 3 1 1 -1 -1 1 0 21 + 357 CLK_000_D_9_ 3 -1 0 1 7 -1 -1 1 0 21 + 356 CLK_000_D_8_ 3 -1 4 1 0 -1 -1 1 0 21 + 355 CLK_000_D_7_ 3 -1 5 1 4 -1 -1 1 0 21 + 354 CLK_000_D_6_ 3 -1 3 1 5 -1 -1 1 0 21 + 353 CLK_000_D_5_ 3 -1 5 1 3 -1 -1 1 0 21 + 352 bgack_030_int_0_un1_n 3 -1 2 1 7 -1 -1 1 0 21 + 350 CLK_000_D_4_ 3 -1 0 1 5 -1 -1 1 0 21 + 349 N_257_i 3 -1 6 1 6 -1 -1 1 0 21 + 348 CLK_000_D_3_ 3 -1 4 1 0 -1 -1 1 0 21 + 341 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 338 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 + 330 inst_VPA_D 3 -1 3 1 5 -1 -1 1 0 21 + 329 N_147_i 3 -1 4 1 0 -1 -1 1 0 21 + 325 pos_clk_un3_as_030_d0_0_n 3 -1 7 1 5 -1 -1 1 0 21 + 304 N_196_i 3 -1 5 1 2 -1 -1 1 0 21 + 297 N_204_i 3 -1 0 1 0 -1 -1 1 0 21 + 294 N_267 3 -1 0 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 4 5 6 7 13 -1 + 66 IPL_0_ 1 -1 -1 4 0 1 3 5 66 -1 + 27 BGACK_000 1 -1 -1 4 0 2 4 7 27 -1 + 55 IPL_1_ 1 -1 -1 3 1 3 6 55 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 59 A_1_ 1 -1 -1 2 1 6 59 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 1 63 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 3 29 -1 + 20 BG_030 1 -1 -1 1 2 20 -1 + 10 CLK_000 1 -1 -1 1 4 10 -1 +144 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 367 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 375 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 4 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 4 0 21 + 82 BGACK_030 0 7 0 82 -1 3 0 21 + 68 A_0_ 5 370 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 28 BG_000 0 3 0 28 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 369 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 + 330 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 325 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 331 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 326 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 311 inst_AS_030_D0 3 -1 -1 2 4 7 -1 -1 1 0 21 + 373 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 371 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21 + 367 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21 + 364 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 4 0 21 + 348 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 315 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 308 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21 + 307 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 305 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21 + 299 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 298 ipl_030_0_1__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 297 ipl_030_0_0__un1_n 3 -1 -1 1 1 -1 -1 4 0 21 + 296 ipl_030_0_0__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 374 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 370 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 368 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 360 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 353 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 352 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 351 inst_BGACK_000_SAMPLE 3 -1 -1 1 7 -1 -1 3 0 21 + 324 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 320 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 318 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 306 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 375 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 365 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 358 inst_BG_000_PRE 3 -1 -1 1 3 -1 -1 2 0 21 + 350 N_247_i 3 -1 -1 1 1 -1 -1 2 0 21 + 323 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 314 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21 + 309 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 346 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 340 bgack_030_int_0_un1_n 3 -1 -1 1 7 -1 -1 1 0 21 + 336 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 335 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21 + 328 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 327 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 322 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 313 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 301 vma_int_0_un1_n 3 -1 -1 1 3 -1 -1 1 0 21 + 363 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 362 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21 + 355 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 349 inst_BGACK_030_INT_PRE 3 -1 -1 0 -1 -1 4 0 21 + 319 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 -1 0 -1 -1 4 0 21 + 317 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 304 N_190_i 3 -1 -1 0 -1 -1 4 0 21 + 361 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 356 RST_DLY_1_ 3 -1 -1 0 -1 -1 3 0 21 + 354 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 316 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 294 N_258 3 -1 -1 0 -1 -1 3 0 21 + 359 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 357 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 332 bgack_030_int_pre_0_un3_n 3 -1 -1 0 -1 -1 2 0 21 + 312 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 310 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 303 N_194_i 3 -1 -1 0 -1 -1 2 0 21 + 302 N_192_i 3 -1 -1 0 -1 -1 2 0 21 + 295 N_365_i 3 -1 -1 0 -1 -1 2 0 21 + 345 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 344 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 343 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 342 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 341 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 339 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 338 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 337 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 334 IPL_D0_0_ 3 -1 -1 0 -1 -1 1 0 21 + 333 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 329 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 321 N_147_i 3 -1 -1 0 -1 -1 1 0 21 + 300 N_196_i 3 -1 -1 0 -1 -1 1 0 21 + 293 N_163_i 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 4 0 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 66 IPL_0_ 1 -1 -1 0 66 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 20 BG_030 1 -1 -1 0 20 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +144 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 367 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 375 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 4 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 4 0 21 + 82 BGACK_030 0 7 0 82 -1 3 0 21 + 68 A_0_ 5 370 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 28 BG_000 0 3 0 28 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 369 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 + 330 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 325 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 331 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 326 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 311 inst_AS_030_D0 3 -1 -1 2 4 7 -1 -1 1 0 21 + 373 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 371 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21 + 367 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21 + 364 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 4 0 21 + 348 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 315 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 308 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21 + 307 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 305 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21 + 299 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 298 ipl_030_0_1__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 297 ipl_030_0_0__un1_n 3 -1 -1 1 1 -1 -1 4 0 21 + 296 ipl_030_0_0__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 374 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 370 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 368 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 360 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 353 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 352 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 351 inst_BGACK_000_SAMPLE 3 -1 -1 1 7 -1 -1 3 0 21 + 324 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 320 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 318 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 306 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 375 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 365 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 358 inst_BG_000_PRE 3 -1 -1 1 3 -1 -1 2 0 21 + 350 N_247_i 3 -1 -1 1 1 -1 -1 2 0 21 + 323 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 314 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21 + 309 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 301 vma_int_0_un1_n 3 -1 -1 1 3 -1 -1 2 0 21 + 346 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 340 bgack_030_int_0_un1_n 3 -1 -1 1 7 -1 -1 1 0 21 + 336 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 335 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21 + 328 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 327 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 322 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 313 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 293 N_163_i 3 -1 -1 1 3 -1 -1 1 0 21 + 362 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21 + 357 RST_DLY_2_ 3 -1 -1 0 -1 -1 4 0 21 + 349 inst_BGACK_030_INT_PRE 3 -1 -1 0 -1 -1 4 0 21 + 319 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 -1 0 -1 -1 4 0 21 + 317 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 304 N_190_i 3 -1 -1 0 -1 -1 4 0 21 + 363 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21 + 361 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 356 RST_DLY_1_ 3 -1 -1 0 -1 -1 3 0 21 + 354 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 316 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 294 N_258 3 -1 -1 0 -1 -1 3 0 21 + 359 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 355 RST_DLY_0_ 3 -1 -1 0 -1 -1 2 0 21 + 347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 332 bgack_030_int_pre_0_un3_n 3 -1 -1 0 -1 -1 2 0 21 + 312 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 310 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 302 N_192_i 3 -1 -1 0 -1 -1 2 0 21 + 295 N_365_i 3 -1 -1 0 -1 -1 2 0 21 + 345 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 344 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 343 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 342 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 341 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 339 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 338 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 337 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 334 IPL_D0_0_ 3 -1 -1 0 -1 -1 1 0 21 + 333 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 329 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 321 N_147_i 3 -1 -1 0 -1 -1 1 0 21 + 303 N_194_i 3 -1 -1 0 -1 -1 1 0 21 + 300 N_196_i 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 4 0 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 66 IPL_0_ 1 -1 -1 0 66 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 20 BG_030 1 -1 -1 0 20 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +129 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 352 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 360 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 82 BGACK_030 0 7 0 82 -1 4 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 68 A_0_ 5 355 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 28 BG_000 0 3 0 28 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 354 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 4 0 21 + 317 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 318 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 313 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 -1 2 4 7 -1 -1 1 0 21 + 349 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 13 1 21 + 333 pos_clk_ipl_n 3 -1 -1 1 1 -1 -1 6 0 21 + 335 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 5 0 21 + 358 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 352 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 334 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 303 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 295 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21 + 359 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 355 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 353 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 345 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 338 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 337 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 336 inst_BGACK_000_SAMPLE 3 -1 -1 1 7 -1 -1 3 0 21 + 311 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 308 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 306 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 360 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 357 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 356 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 351 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 350 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 343 inst_BG_000_PRE 3 -1 -1 1 3 -1 -1 2 0 21 + 310 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 302 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 331 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 315 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 314 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 309 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21 + 300 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 + 348 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 347 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 1 21 + 340 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 307 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 -1 0 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 346 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 339 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 344 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 342 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 341 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21 + 332 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 330 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 329 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 328 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 327 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 326 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 325 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 324 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 323 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 322 IPL_D0_2_ 3 -1 -1 0 -1 -1 1 0 21 + 321 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21 + 320 IPL_D0_0_ 3 -1 -1 0 -1 -1 1 0 21 + 319 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 316 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 4 0 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 @@ -8671,11 +886,1097 @@ 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 67 IPL_2_ 1 -1 -1 1 1 67 -1 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 35 VPA 1 -1 -1 1 6 35 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 20 BG_030 1 -1 -1 0 20 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +129 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 352 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 360 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 82 BGACK_030 0 7 0 82 -1 4 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 68 A_0_ 5 355 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 28 BG_000 0 3 0 28 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 354 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 4 0 21 + 317 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 318 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 313 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 -1 2 4 7 -1 -1 1 0 21 + 349 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 13 1 21 + 333 pos_clk_ipl_n 3 -1 -1 1 1 -1 -1 6 0 21 + 335 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 5 0 21 + 358 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 352 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 334 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 303 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 295 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21 + 359 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 355 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 353 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 345 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 338 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 337 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 336 inst_BGACK_000_SAMPLE 3 -1 -1 1 7 -1 -1 3 0 21 + 311 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 308 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 306 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 360 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 357 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 356 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 351 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 350 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 343 inst_BG_000_PRE 3 -1 -1 1 3 -1 -1 2 0 21 + 310 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 302 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 331 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 315 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 314 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 309 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21 + 300 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 + 348 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 347 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 1 21 + 340 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 307 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 -1 0 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 346 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 339 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 344 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 342 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 341 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21 + 332 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 330 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 329 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 328 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 327 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 326 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 325 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 324 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 323 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 322 IPL_D0_2_ 3 -1 -1 0 -1 -1 1 0 21 + 321 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21 + 320 IPL_D0_0_ 3 -1 -1 0 -1 -1 1 0 21 + 319 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 316 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 4 0 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 20 BG_030 1 -1 -1 0 20 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +157 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 2 4 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 + 79 RW_000 5 380 7 3 1 4 6 79 -1 3 0 21 + 70 RW 5 388 6 2 6 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 68 A_0_ 5 383 6 1 2 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 382 7 0 82 -1 3 0 21 + 34 VMA 5 387 3 0 34 -1 3 0 21 + 28 BG_000 5 381 3 0 28 -1 3 0 21 + 8 IPL_030_2_ 5 379 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 385 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 384 1 0 6 -1 3 0 21 + 80 DSACK1 5 386 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 382 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 339 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 340 CLK_000_D_0_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21 + 335 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 + 316 inst_AS_030_D0 3 -1 7 5 0 2 4 5 7 -1 -1 1 0 21 + 364 SM_AMIGA_6_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21 + 377 SM_AMIGA_i_7_ 3 -1 2 3 0 5 7 -1 -1 3 0 21 + 373 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 367 SM_AMIGA_4_ 3 -1 2 3 2 5 6 -1 -1 3 0 21 + 363 inst_BGACK_000_SAMPLE 3 -1 7 3 0 2 7 -1 -1 3 0 21 + 313 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 + 312 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 3 0 21 + 310 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 + 317 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 2 0 21 + 351 N_175_i_0_i_i 3 -1 7 3 5 6 7 -1 -1 1 0 21 + 344 IPL_D0_0_ 3 -1 5 3 0 1 3 -1 -1 1 0 21 + 318 inst_BGACK_030_INT_D 3 -1 7 3 0 1 6 -1 -1 1 0 21 + 387 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 376 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 374 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 370 RST_DLY_2_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 366 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 + 361 inst_BGACK_030_INT_PRE 3 -1 0 2 0 2 -1 -1 3 0 21 + 332 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 328 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 326 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 311 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21 + 375 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 2 0 21 + 371 inst_BG_000_PRE 3 -1 2 2 2 3 -1 -1 2 0 21 + 365 N_249_i 3 -1 2 2 1 3 -1 -1 2 0 21 + 360 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 2 0 21 + 359 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 + 331 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 321 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 2 0 21 + 319 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 2 0 21 + 315 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 314 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 308 N_194_i 3 -1 5 2 0 2 -1 -1 2 0 21 + 347 CLK_000_D_2_ 3 -1 7 2 4 5 -1 -1 1 0 21 + 346 IPL_D0_2_ 3 -1 2 2 1 2 -1 -1 1 0 21 + 345 IPL_D0_1_ 3 -1 6 2 1 3 -1 -1 1 0 21 + 337 CLK_000_D_11_ 3 -1 3 2 1 3 -1 -1 1 0 21 + 336 CLK_000_D_10_ 3 -1 7 2 1 3 -1 -1 1 0 21 + 333 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 385 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 384 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 383 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 381 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 380 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 379 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 369 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 342 N_154_0 3 -1 6 1 5 -1 -1 3 0 21 + 334 N_159_0 3 -1 1 1 7 -1 -1 3 0 21 + 324 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21 + 323 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 3 0 21 + 309 N_190_i 3 -1 5 1 2 -1 -1 3 0 21 + 300 cpu_est_2_2__n 3 -1 3 1 3 -1 -1 3 0 21 + 293 N_258 3 -1 0 1 0 -1 -1 3 0 21 + 388 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 386 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 378 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 372 inst_CLK_030_H 3 -1 1 1 1 -1 -1 2 0 21 + 368 RST_DLY_0_ 3 -1 0 1 0 -1 -1 2 0 21 + 362 N_247_i 3 -1 0 1 1 -1 -1 2 0 21 + 343 bgack_030_int_pre_0_un1_n 3 -1 0 1 0 -1 -1 2 0 21 + 327 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 6 1 1 -1 -1 2 0 21 + 322 ds_000_dma_0_un1_n 3 -1 1 1 6 -1 -1 2 0 21 + 320 ds_000_dma_0_un3_n 3 -1 1 1 6 -1 -1 2 0 21 + 307 N_192_i 3 -1 5 1 2 -1 -1 2 0 21 + 306 vma_int_0_un3_n 3 -1 5 1 3 -1 -1 2 0 21 + 305 N_195_i 3 -1 7 1 2 -1 -1 2 0 21 + 303 cpu_est_2_1__n 3 -1 5 1 6 -1 -1 2 0 21 + 302 N_200_i 3 -1 3 1 0 -1 -1 2 0 21 + 301 ipl_030_0_2__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 299 N_294 3 -1 5 1 3 -1 -1 2 0 21 + 298 ipl_030_0_1__un1_n 3 -1 3 1 1 -1 -1 2 0 21 + 296 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 295 N_179_0 3 -1 5 1 2 -1 -1 2 0 21 + 358 CLK_000_D_12_ 3 -1 3 1 1 -1 -1 1 0 21 + 357 CLK_000_D_9_ 3 -1 0 1 7 -1 -1 1 0 21 + 356 CLK_000_D_8_ 3 -1 4 1 0 -1 -1 1 0 21 + 355 CLK_000_D_7_ 3 -1 5 1 4 -1 -1 1 0 21 + 354 CLK_000_D_6_ 3 -1 3 1 5 -1 -1 1 0 21 + 353 CLK_000_D_5_ 3 -1 5 1 3 -1 -1 1 0 21 + 352 bgack_030_int_0_un1_n 3 -1 2 1 7 -1 -1 1 0 21 + 350 CLK_000_D_4_ 3 -1 0 1 5 -1 -1 1 0 21 + 349 N_257_i 3 -1 6 1 6 -1 -1 1 0 21 + 348 CLK_000_D_3_ 3 -1 4 1 0 -1 -1 1 0 21 + 341 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 338 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 + 330 inst_VPA_D 3 -1 3 1 5 -1 -1 1 0 21 + 329 N_147_i 3 -1 4 1 0 -1 -1 1 0 21 + 325 pos_clk_un3_as_030_d0_0_n 3 -1 7 1 5 -1 -1 1 0 21 + 304 N_196_i 3 -1 5 1 2 -1 -1 1 0 21 + 297 N_204_i 3 -1 0 1 0 -1 -1 1 0 21 + 294 N_267 3 -1 0 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 4 5 6 7 13 -1 + 66 IPL_0_ 1 -1 -1 4 0 1 3 5 66 -1 + 27 BGACK_000 1 -1 -1 4 0 2 4 7 27 -1 + 55 IPL_1_ 1 -1 -1 3 1 3 6 55 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 59 A_1_ 1 -1 -1 2 1 6 59 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 1 63 -1 + 35 VPA 1 -1 -1 1 3 35 -1 29 DTACK 1 -1 -1 1 3 29 -1 + 20 BG_030 1 -1 -1 1 2 20 -1 + 10 CLK_000 1 -1 -1 1 4 10 -1 +149 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 6 0 1 2 3 5 7 40 -1 1 0 21 + 79 RW_000 5 372 7 2 4 6 79 -1 3 0 21 + 70 RW 5 380 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 + 68 A_0_ 5 373 6 1 2 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 377 7 0 82 -1 3 0 21 + 34 VMA 5 379 3 0 34 -1 3 0 21 + 28 BG_000 5 376 3 0 28 -1 3 0 21 + 80 DSACK1 5 378 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 8 IPL_030_2_ 5 371 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 375 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 374 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 377 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 326 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 349 SM_AMIGA_6_ 3 -1 0 5 0 1 2 5 7 -1 -1 3 0 21 + 327 CLK_000_D_0_ 3 -1 6 5 0 1 3 5 7 -1 -1 1 0 21 + 318 CLK_000_D_1_ 3 -1 7 5 0 1 3 5 7 -1 -1 1 0 21 + 361 SM_AMIGA_1_ 3 -1 1 4 0 1 5 6 -1 -1 3 0 21 + 303 inst_AS_030_D0 3 -1 7 4 0 2 4 7 -1 -1 1 0 21 + 367 SM_AMIGA_i_7_ 3 -1 5 3 0 5 7 -1 -1 3 0 21 + 362 SM_AMIGA_5_ 3 -1 5 3 0 1 5 -1 -1 3 0 21 + 350 SM_AMIGA_0_ 3 -1 5 3 1 5 7 -1 -1 3 0 21 + 297 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 304 inst_AS_030_000_SYNC 3 -1 0 3 0 1 3 -1 -1 2 0 21 + 300 pos_clk_bg_000_pre5_i_n 3 -1 7 3 2 5 7 -1 -1 1 0 21 + 364 SM_AMIGA_2_ 3 -1 5 2 1 5 -1 -1 3 0 21 + 358 inst_BG_000_PRE 3 -1 2 2 2 3 -1 -1 3 0 21 + 353 RST_DLY_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 351 SM_AMIGA_4_ 3 -1 5 2 1 5 -1 -1 3 0 21 + 347 inst_BGACK_000_SAMPLE 3 -1 7 2 5 7 -1 -1 3 0 21 + 314 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 311 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 310 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 308 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 307 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 3 0 21 + 299 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 298 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 296 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 363 SM_AMIGA_3_ 3 -1 5 2 1 3 -1 -1 2 0 21 + 357 RST_DLY_2_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 355 RST_DLY_1_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 345 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21 + 343 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 + 313 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 306 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21 + 302 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 + 301 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 + 348 N_156_i 3 -1 7 2 3 6 -1 -1 1 0 21 + 332 CLK_000_D_2_ 3 -1 7 2 0 1 -1 -1 1 0 21 + 322 CLK_000_D_11_ 3 -1 2 2 4 6 -1 -1 1 0 21 + 320 CLK_000_D_10_ 3 -1 6 2 2 6 -1 -1 1 0 21 + 316 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 305 inst_BGACK_030_INT_D 3 -1 7 2 0 6 -1 -1 1 0 21 + 379 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 376 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 373 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 372 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 369 S0__clk_un23_bgack_030_int_i_0_0 3 -1 2 1 6 -1 -1 3 0 21 + 368 N_105 3 -1 5 1 2 -1 -1 3 0 21 + 359 N_102_i 3 -1 6 1 7 -1 -1 3 0 21 + 346 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 309 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21 + 293 N_231_i 3 -1 3 1 5 -1 -1 3 0 21 + 380 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 378 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 375 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 374 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 371 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 370 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 366 N_323_0 3 -1 6 1 6 -1 -1 2 0 21 + 360 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21 + 356 N_251_i 3 -1 1 1 5 -1 -1 2 0 21 + 354 N_252_i 3 -1 6 1 3 -1 -1 2 0 21 + 352 N_249_i 3 -1 2 1 5 -1 -1 2 0 21 + 344 pos_clk_ipl_n 3 -1 5 1 1 -1 -1 2 0 21 + 334 N_210_i 3 -1 3 1 0 -1 -1 2 0 21 + 321 N_218_i 3 -1 7 1 5 -1 -1 2 0 21 + 319 N_217_i 3 -1 3 1 5 -1 -1 2 0 21 + 317 N_216_i 3 -1 0 1 5 -1 -1 2 0 21 + 315 N_215_i 3 -1 5 1 5 -1 -1 2 0 21 + 294 vma_int_0_un3_n 3 -1 3 1 3 -1 -1 2 0 21 + 365 N_174_i 3 -1 7 1 0 -1 -1 1 0 21 + 342 CLK_000_D_12_ 3 -1 4 1 6 -1 -1 1 0 21 + 341 CLK_000_D_9_ 3 -1 4 1 6 -1 -1 1 0 21 + 340 CLK_000_D_8_ 3 -1 5 1 4 -1 -1 1 0 21 + 339 N_278_i 3 -1 3 1 3 -1 -1 1 0 21 + 338 CLK_000_D_7_ 3 -1 1 1 5 -1 -1 1 0 21 + 337 CLK_000_D_6_ 3 -1 0 1 1 -1 -1 1 0 21 + 336 CLK_000_D_5_ 3 -1 1 1 0 -1 -1 1 0 21 + 335 CLK_000_D_4_ 3 -1 1 1 1 -1 -1 1 0 21 + 333 CLK_000_D_3_ 3 -1 0 1 1 -1 -1 1 0 21 + 331 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 330 IPL_D0_1_ 3 -1 5 1 5 -1 -1 1 0 21 + 329 IPL_D0_0_ 3 -1 2 1 2 -1 -1 1 0 21 + 328 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 325 N_219_i 3 -1 1 1 5 -1 -1 1 0 21 + 324 inst_DTACK_D0 3 -1 2 1 3 -1 -1 1 0 21 + 323 N_272_i 3 -1 1 1 5 -1 -1 1 0 21 + 312 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21 + 295 N_265_i 3 -1 5 1 7 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 6 0 1 2 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 63 CLK_030 1 -1 -1 1 6 63 -1 + 59 A_1_ 1 -1 -1 1 0 59 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 2 29 -1 + 20 BG_030 1 -1 -1 1 2 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +152 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21 + 79 RW_000 5 378 7 3 3 4 6 79 -1 3 0 21 + 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 + 68 A_0_ 5 375 6 2 2 3 68 -1 3 0 21 + 70 RW 5 383 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 380 7 0 82 -1 3 0 21 + 28 BG_000 5 379 3 0 28 -1 3 0 21 + 8 IPL_030_2_ 5 374 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 377 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 376 1 0 6 -1 3 0 21 + 80 DSACK1 5 381 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 34 VMA 5 382 3 0 34 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 380 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 334 inst_RESET_OUT 3 -1 2 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 336 CLK_000_D_0_ 3 -1 6 6 0 2 3 5 6 7 -1 -1 1 0 21 + 329 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 + 356 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21 + 310 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 + 299 pos_clk_bg_0005_i_n 3 -1 7 4 0 3 5 7 -1 -1 1 0 21 + 368 SM_AMIGA_i_7_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 360 RST_DLY_1_ 3 -1 0 3 0 2 3 -1 -1 3 0 21 + 311 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 2 0 21 + 305 cpu_est_2_ 3 -1 5 3 0 5 6 -1 -1 2 0 21 + 363 SM_AMIGA_1_ 3 -1 5 2 1 5 -1 -1 3 0 21 + 359 RST_DLY_0_ 3 -1 2 2 2 3 -1 -1 3 0 21 + 357 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 355 inst_BGACK_000_SAMPLE 3 -1 7 2 6 7 -1 -1 3 0 21 + 324 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 319 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 318 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 315 CYCLE_DMA_0_ 3 -1 6 2 0 6 -1 -1 3 0 21 + 303 cpu_est_1_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 301 cpu_est_3_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 365 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 2 0 21 + 361 RST_DLY_2_ 3 -1 2 2 0 2 -1 -1 2 0 21 + 353 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21 + 352 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 314 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 2 0 21 + 313 inst_AS_000_DMA 3 -1 3 2 3 7 -1 -1 2 0 21 + 306 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 367 N_176_i 3 -1 3 2 0 2 -1 -1 1 0 21 + 331 CLK_000_D_11_ 3 -1 5 2 0 1 -1 -1 1 0 21 + 330 CLK_000_D_10_ 3 -1 4 2 1 5 -1 -1 1 0 21 + 327 inst_CLK_OUT_PRE_D 3 -1 7 2 1 6 -1 -1 1 0 21 + 312 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 + 379 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 378 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 377 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 376 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 375 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 374 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 366 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21 + 364 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21 + 358 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 + 354 inst_BGACK_030_INT_PRE 3 -1 6 1 6 -1 -1 3 0 21 + 332 un1_SM_AMIGA_1_i 3 -1 5 1 2 -1 -1 3 0 21 + 323 N_208_i 3 -1 5 1 5 -1 -1 3 0 21 + 317 cpu_est_0_2__un0_n 3 -1 0 1 5 -1 -1 3 0 21 + 316 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 302 cpu_est_0_ 3 -1 0 1 0 -1 -1 3 0 21 + 298 DSACK1_INT_0_sqmuxa_i 3 -1 1 1 7 -1 -1 3 0 21 + 295 N_22 3 -1 0 1 3 -1 -1 3 0 21 + 383 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 381 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 373 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 370 G_117 3 -1 1 1 1 -1 -1 2 0 21 + 369 G_116 3 -1 1 1 1 -1 -1 2 0 21 + 362 inst_CLK_030_H 3 -1 3 1 3 -1 -1 2 0 21 + 335 pos_clk_un23_bgack_030_int_i_0_0_n 3 -1 0 1 3 -1 -1 2 0 21 + 328 N_209_i 3 -1 5 1 5 -1 -1 2 0 21 + 322 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 320 N_193_i 3 -1 7 1 5 -1 -1 2 0 21 + 309 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 308 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 307 N_181_i 3 -1 0 1 5 -1 -1 2 0 21 + 304 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 300 ipl_030_0_2__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 297 ds_000_dma_0_un1_n 3 -1 3 1 1 -1 -1 2 0 21 + 296 ds_000_dma_0_un3_n 3 -1 3 1 1 -1 -1 2 0 21 + 294 N_198_i 3 -1 0 1 5 -1 -1 2 0 21 + 382 RN_VMA 3 34 3 1 0 34 -1 1 0 21 + 372 N_304_i 3 -1 3 1 0 -1 -1 1 0 21 + 371 N_70 3 -1 2 1 0 -1 -1 1 0 21 + 351 CLK_000_D_12_ 3 -1 0 1 1 -1 -1 1 0 21 + 350 CLK_000_D_9_ 3 -1 6 1 4 -1 -1 1 0 21 + 349 CLK_000_D_8_ 3 -1 0 1 6 -1 -1 1 0 21 + 348 CLK_000_D_7_ 3 -1 3 1 0 -1 -1 1 0 21 + 347 CLK_000_D_6_ 3 -1 4 1 3 -1 -1 1 0 21 + 346 CLK_000_D_5_ 3 -1 4 1 4 -1 -1 1 0 21 + 345 CLK_000_D_4_ 3 -1 5 1 4 -1 -1 1 0 21 + 344 CLK_000_D_3_ 3 -1 5 1 5 -1 -1 1 0 21 + 343 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 342 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 + 341 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 340 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 + 339 N_287_i 3 -1 0 1 0 -1 -1 1 0 21 + 338 inst_CLK_OUT_PRE_50 3 -1 7 1 7 -1 -1 1 0 21 + 337 N_90_i 3 -1 6 1 0 -1 -1 1 0 21 + 333 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 326 N_210_i 3 -1 5 1 5 -1 -1 1 0 21 + 325 pos_clk_un28_as_030_d0_i_n 3 -1 4 1 2 -1 -1 1 0 21 + 321 inst_VPA_D 3 -1 3 1 0 -1 -1 1 0 21 + 293 bgack_030_int_0_un1_n 3 -1 6 1 7 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 27 BGACK_000 1 -1 -1 3 4 6 7 27 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 + 63 CLK_030 1 -1 -1 2 1 3 63 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +150 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 79 RW_000 5 376 7 3 0 4 6 79 -1 3 0 21 + 81 AS_030 5 -1 7 3 3 4 7 81 -1 1 0 21 + 40 BERR 5 -1 4 3 1 5 7 40 -1 1 0 21 + 70 RW 5 381 6 2 5 7 70 -1 2 0 21 + 68 A_0_ 5 373 6 1 3 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 378 7 0 82 -1 3 0 21 + 34 VMA 5 380 3 0 34 -1 3 0 21 + 80 DSACK1 5 379 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 377 3 0 28 -1 2 0 21 + 8 IPL_030_2_ 5 372 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 375 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 374 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 378 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 327 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 329 CLK_000_D_0_ 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 322 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 304 inst_AS_030_D0 3 -1 3 5 1 3 4 5 7 -1 -1 1 0 21 + 364 SM_AMIGA_i_7_ 3 -1 5 3 1 5 7 -1 -1 3 0 21 + 351 SM_AMIGA_0_ 3 -1 5 3 1 5 7 -1 -1 3 0 21 + 350 SM_AMIGA_6_ 3 -1 5 3 3 5 7 -1 -1 3 0 21 + 298 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 + 305 inst_AS_030_000_SYNC 3 -1 1 3 1 3 5 -1 -1 2 0 21 + 301 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 2 0 21 + 300 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 2 0 21 + 321 inst_CLK_OUT_PRE_D 3 -1 4 3 1 2 6 -1 -1 1 0 21 + 307 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 + 296 N_151_i 3 -1 1 3 2 5 7 -1 -1 1 0 21 + 380 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 360 SM_AMIGA_5_ 3 -1 5 2 1 5 -1 -1 3 0 21 + 359 SM_AMIGA_1_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 349 inst_BGACK_000_SAMPLE 3 -1 7 2 2 7 -1 -1 3 0 21 + 316 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 315 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 299 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 361 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 2 0 21 + 347 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 2 0 21 + 344 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 + 309 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 2 0 21 + 302 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 334 CLK_000_D_2_ 3 -1 7 2 4 5 -1 -1 1 0 21 + 324 CLK_000_D_11_ 3 -1 0 2 2 5 -1 -1 1 0 21 + 323 CLK_000_D_10_ 3 -1 2 2 0 2 -1 -1 1 0 21 + 318 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 + 376 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 373 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 367 N_156_0 3 -1 6 1 6 -1 -1 3 0 21 + 362 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21 + 354 RST_DLY_1_ 3 -1 6 1 6 -1 -1 3 0 21 + 352 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 + 348 inst_BGACK_030_INT_PRE 3 -1 2 1 2 -1 -1 3 0 21 + 345 N_159_0 3 -1 5 1 1 -1 -1 3 0 21 + 341 N_100_i 3 -1 2 1 7 -1 -1 3 0 21 + 320 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 + 313 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21 + 312 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21 + 308 N_207_i 3 -1 5 1 5 -1 -1 3 0 21 + 293 cpu_est_0_2__un0_n 3 -1 0 1 0 -1 -1 3 0 21 + 381 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 379 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 377 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 375 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 374 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 372 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 366 N_210 3 -1 0 1 5 -1 -1 2 0 21 + 365 N_171_0 3 -1 2 1 0 -1 -1 2 0 21 + 363 N_231_i 3 -1 3 1 3 -1 -1 2 0 21 + 358 N_247_i 3 -1 2 1 6 -1 -1 2 0 21 + 357 inst_CLK_030_H 3 -1 0 1 0 -1 -1 2 0 21 + 356 N_245_i 3 -1 1 1 6 -1 -1 2 0 21 + 355 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 353 RST_DLY_0_ 3 -1 6 1 6 -1 -1 2 0 21 + 346 pos_clk_ipl_n 3 -1 6 1 1 -1 -1 2 0 21 + 328 ds_000_dma_0_un1_n 3 -1 0 1 0 -1 -1 2 0 21 + 326 ds_000_dma_0_un3_n 3 -1 0 1 0 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 311 N_209_i 3 -1 5 1 5 -1 -1 2 0 21 + 310 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 2 0 21 + 306 N_187_0 3 -1 0 1 5 -1 -1 2 0 21 + 303 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 295 cpu_est_0_1__un0_n 3 -1 3 1 0 -1 -1 2 0 21 + 370 N_382 3 -1 7 1 1 -1 -1 1 0 21 + 369 N_275 3 -1 6 1 2 -1 -1 1 0 21 + 368 N_274 3 -1 7 1 5 -1 -1 1 0 21 + 343 CLK_000_D_12_ 3 -1 5 1 2 -1 -1 1 0 21 + 342 CLK_000_D_9_ 3 -1 5 1 2 -1 -1 1 0 21 + 340 CLK_000_D_8_ 3 -1 2 1 5 -1 -1 1 0 21 + 339 CLK_000_D_7_ 3 -1 1 1 2 -1 -1 1 0 21 + 338 CLK_000_D_6_ 3 -1 5 1 1 -1 -1 1 0 21 + 337 CLK_000_D_5_ 3 -1 0 1 5 -1 -1 1 0 21 + 336 CLK_000_D_4_ 3 -1 3 1 0 -1 -1 1 0 21 + 335 CLK_000_D_3_ 3 -1 4 1 3 -1 -1 1 0 21 + 333 IPL_D0_2_ 3 -1 3 1 2 -1 -1 1 0 21 + 332 IPL_D0_1_ 3 -1 1 1 6 -1 -1 1 0 21 + 331 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 330 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 325 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 317 N_200_i 3 -1 6 1 6 -1 -1 1 0 21 + 314 N_212_i 3 -1 5 1 5 -1 -1 1 0 21 + 297 bgack_030_int_0_un1_n 3 -1 2 1 7 -1 -1 1 0 21 + 294 N_252_i 3 -1 3 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 67 IPL_2_ 1 -1 -1 3 1 2 3 67 -1 + 27 BGACK_000 1 -1 -1 3 2 4 7 27 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 63 CLK_030 1 -1 -1 2 0 2 63 -1 + 59 A_1_ 1 -1 -1 2 1 2 59 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 4 10 -1 +153 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 40 BERR 5 -1 4 5 0 2 3 5 7 40 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 79 RW_000 5 378 7 3 0 4 6 79 -1 3 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 68 A_0_ 5 376 6 1 3 68 -1 3 0 21 + 70 RW 5 384 6 1 7 70 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 381 7 0 82 -1 3 0 21 + 28 BG_000 5 380 3 0 28 -1 3 0 21 + 80 DSACK1 5 382 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 383 3 0 34 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 8 IPL_030_2_ 5 375 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 379 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 377 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 381 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 337 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 338 CLK_000_D_0_ 3 -1 2 6 0 1 2 3 5 7 -1 -1 1 0 21 + 333 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 + 317 inst_AS_030_D0 3 -1 7 5 0 3 4 5 7 -1 -1 1 0 21 + 362 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21 + 369 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 314 cpu_est_2_ 3 -1 1 3 1 5 6 -1 -1 3 0 21 + 313 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 + 311 cpu_est_0_ 3 -1 0 3 0 5 6 -1 -1 3 0 21 + 310 cpu_est_3_ 3 -1 1 3 1 5 6 -1 -1 3 0 21 + 348 N_121_i 3 -1 7 3 2 3 7 -1 -1 1 0 21 + 319 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 1 0 21 + 373 SM_AMIGA_i_7_ 3 -1 2 2 5 7 -1 -1 3 0 21 + 372 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 370 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 365 RST_DLY_0_ 3 -1 1 2 1 3 -1 -1 3 0 21 + 364 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 363 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 + 358 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 327 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 326 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 324 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 3 0 21 + 323 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 383 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21 + 371 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 2 0 21 + 368 inst_CLK_030_H 3 -1 0 2 0 6 -1 -1 2 0 21 + 366 RST_DLY_1_ 3 -1 1 2 1 3 -1 -1 2 0 21 + 355 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 325 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 0 2 0 6 -1 -1 2 0 21 + 322 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 2 0 21 + 321 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 2 0 21 + 316 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 315 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21 + 304 N_229_i 3 -1 5 2 2 5 -1 -1 2 0 21 + 344 CLK_000_D_2_ 3 -1 7 2 2 5 -1 -1 1 0 21 + 335 CLK_000_D_11_ 3 -1 4 2 4 6 -1 -1 1 0 21 + 334 CLK_000_D_10_ 3 -1 5 2 4 6 -1 -1 1 0 21 + 332 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21 + 320 inst_BGACK_030_INT_D 3 -1 7 2 5 6 -1 -1 1 0 21 + 380 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 378 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 376 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 361 inst_BGACK_000_SAMPLE 3 -1 2 1 2 -1 -1 3 0 21 + 331 N_137_0 3 -1 6 1 7 -1 -1 3 0 21 + 330 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 + 308 N_240_i 3 -1 2 1 2 -1 -1 3 0 21 + 298 cpu_est_2_2__n 3 -1 6 1 1 -1 -1 3 0 21 + 384 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 382 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 379 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 377 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 375 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 374 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 367 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 + 360 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 2 0 21 + 359 N_249_i 3 -1 1 1 1 -1 -1 2 0 21 + 357 N_247_i 3 -1 1 1 1 -1 -1 2 0 21 + 356 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21 + 339 N_342_i 3 -1 7 1 5 -1 -1 2 0 21 + 329 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 318 as_030_000_sync_0_un1_n 3 -1 0 1 0 -1 -1 2 0 21 + 309 un1_bgack_030_int7_2 3 -1 2 1 7 -1 -1 2 0 21 + 307 ds_000_dma_0_un1_n 3 -1 0 1 6 -1 -1 2 0 21 + 306 N_242_i 3 -1 2 1 2 -1 -1 2 0 21 + 305 ds_000_dma_0_un3_n 3 -1 6 1 6 -1 -1 2 0 21 + 303 N_225_i 3 -1 7 1 2 -1 -1 2 0 21 + 301 N_351 3 -1 7 1 1 -1 -1 2 0 21 + 300 pos_clk_un26_clk_000_pe_n 3 -1 5 1 3 -1 -1 2 0 21 + 299 cpu_est_2_1__n 3 -1 5 1 3 -1 -1 2 0 21 + 297 N_252 3 -1 5 1 1 -1 -1 2 0 21 + 296 N_250 3 -1 5 1 1 -1 -1 2 0 21 + 295 N_216_i 3 -1 3 1 1 -1 -1 2 0 21 + 294 N_157_0 3 -1 5 1 2 -1 -1 2 0 21 + 354 CLK_000_D_12_ 3 -1 4 1 6 -1 -1 1 0 21 + 353 CLK_000_D_9_ 3 -1 3 1 5 -1 -1 1 0 21 + 352 CLK_000_D_8_ 3 -1 6 1 3 -1 -1 1 0 21 + 351 CLK_000_D_7_ 3 -1 0 1 6 -1 -1 1 0 21 + 350 CLK_000_D_6_ 3 -1 1 1 0 -1 -1 1 0 21 + 349 CLK_000_D_5_ 3 -1 0 1 1 -1 -1 1 0 21 + 347 CLK_000_D_4_ 3 -1 5 1 0 -1 -1 1 0 21 + 346 N_275_i 3 -1 6 1 0 -1 -1 1 0 21 + 345 CLK_000_D_3_ 3 -1 2 1 5 -1 -1 1 0 21 + 343 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 + 342 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 + 341 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 + 340 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 + 336 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21 + 328 inst_VPA_D 3 -1 0 1 5 -1 -1 1 0 21 + 312 N_156_0 3 -1 5 1 0 -1 -1 1 0 21 + 302 N_243_i 3 -1 5 1 2 -1 -1 1 0 21 + 293 N_317 3 -1 3 1 1 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 27 BGACK_000 1 -1 -1 3 2 4 7 27 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 + 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 + 63 CLK_030 1 -1 -1 2 0 6 63 -1 + 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 2 13 -1 10 CLK_000 1 -1 -1 1 2 10 -1 +152 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 6 0 2 3 4 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 5 0 2 3 5 7 40 -1 1 0 21 + 79 RW_000 5 378 7 3 2 4 6 79 -1 3 0 21 + 70 RW 5 383 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 68 A_0_ 5 374 6 1 3 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 380 7 0 82 -1 3 0 21 + 28 BG_000 5 379 3 0 28 -1 3 0 21 + 80 DSACK1 5 381 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 8 IPL_030_2_ 5 375 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 377 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 376 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 34 VMA 5 382 3 0 34 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 380 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 331 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 332 CLK_000_D_0_ 3 -1 3 6 0 2 3 4 5 6 -1 -1 1 0 21 + 326 CLK_000_D_1_ 3 -1 4 6 0 2 3 4 5 6 -1 -1 1 0 21 + 367 N_117_i 3 -1 4 4 3 5 6 7 -1 -1 1 0 21 + 308 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 + 368 SM_AMIGA_i_7_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 355 SM_AMIGA_6_ 3 -1 5 3 3 5 7 -1 -1 3 0 21 + 313 inst_BGACK_000_SAMPLE 3 -1 3 3 2 3 7 -1 -1 3 0 21 + 310 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 2 0 21 + 371 S0__clk_un26_bgack_030_int_i_0_0 3 -1 6 2 2 3 -1 -1 3 0 21 + 366 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 362 SM_AMIGA_1_ 3 -1 5 2 1 5 -1 -1 3 0 21 + 356 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 319 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 304 cpu_est_2_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 303 cpu_est_1_ 3 -1 6 2 0 6 -1 -1 3 0 21 + 302 cpu_est_0_ 3 -1 6 2 0 6 -1 -1 3 0 21 + 301 cpu_est_3_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 370 N_220 3 -1 0 2 2 5 -1 -1 2 0 21 + 364 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 2 0 21 + 349 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 315 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 2 0 21 + 314 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 2 0 21 + 305 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 345 N_116_i 3 -1 4 2 0 6 -1 -1 1 0 21 + 338 CLK_000_D_2_ 3 -1 4 2 5 6 -1 -1 1 0 21 + 327 CLK_000_D_10_ 3 -1 1 2 1 5 -1 -1 1 0 21 + 325 inst_CLK_OUT_PRE_D 3 -1 7 2 1 6 -1 -1 1 0 21 + 321 inst_VPA_D 3 -1 6 2 0 6 -1 -1 1 0 21 + 311 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 + 379 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 378 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 374 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 369 N_215 3 -1 5 1 3 -1 -1 3 0 21 + 363 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21 + 358 RST_DLY_0_ 3 -1 0 1 0 -1 -1 3 0 21 + 357 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 + 353 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 324 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 + 323 N_22_i 3 -1 0 1 3 -1 -1 3 0 21 + 318 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21 + 317 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 3 0 21 + 306 N_230_i 3 -1 5 1 5 -1 -1 3 0 21 + 297 as_000_int_0_un3_n 3 -1 3 1 1 -1 -1 3 0 21 + 296 N_165_i 3 -1 1 1 7 -1 -1 3 0 21 + 293 N_222 3 -1 0 1 5 -1 -1 3 0 21 + 383 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 381 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 377 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 376 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 375 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 373 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 361 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21 + 360 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 + 359 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 0 21 + 354 N_175_i 3 -1 0 1 0 -1 -1 2 0 21 + 352 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 2 0 21 + 351 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21 + 350 N_248_i 3 -1 0 1 1 -1 -1 2 0 21 + 348 N_247_i 3 -1 3 1 1 -1 -1 2 0 21 + 336 N_256_i 3 -1 0 1 0 -1 -1 2 0 21 + 322 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 309 N_232_i 3 -1 5 1 5 -1 -1 2 0 21 + 307 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 300 un1_bgack_030_int7_2 3 -1 2 1 7 -1 -1 2 0 21 + 299 as_000_int_0_un1_n 3 -1 3 1 1 -1 -1 2 0 21 + 295 ds_000_dma_0_un1_n 3 -1 2 1 2 -1 -1 2 0 21 + 294 ds_000_dma_0_un3_n 3 -1 2 1 2 -1 -1 2 0 21 + 382 RN_VMA 3 34 3 1 0 34 -1 1 0 21 + 372 N_263 3 -1 7 1 5 -1 -1 1 0 21 + 365 pos_clk_un26_bgack_030_int_i_0_0_n 3 -1 3 1 2 -1 -1 1 0 21 + 347 CLK_000_D_12_ 3 -1 1 1 1 -1 -1 1 0 21 + 346 CLK_000_D_9_ 3 -1 5 1 1 -1 -1 1 0 21 + 344 CLK_000_D_8_ 3 -1 0 1 5 -1 -1 1 0 21 + 343 CLK_000_D_7_ 3 -1 1 1 0 -1 -1 1 0 21 + 342 CLK_000_D_6_ 3 -1 5 1 1 -1 -1 1 0 21 + 341 CLK_000_D_5_ 3 -1 1 1 5 -1 -1 1 0 21 + 340 CLK_000_D_4_ 3 -1 5 1 1 -1 -1 1 0 21 + 339 CLK_000_D_3_ 3 -1 6 1 5 -1 -1 1 0 21 + 337 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 + 335 IPL_D0_1_ 3 -1 5 1 0 -1 -1 1 0 21 + 334 IPL_D0_0_ 3 -1 3 1 3 -1 -1 1 0 21 + 333 inst_CLK_OUT_PRE_50 3 -1 7 1 7 -1 -1 1 0 21 + 330 inst_DTACK_D0 3 -1 1 1 0 -1 -1 1 0 21 + 329 N_253_i 3 -1 6 1 0 -1 -1 1 0 21 + 328 CLK_000_D_11_ 3 -1 5 1 1 -1 -1 1 0 21 + 316 N_273_i 3 -1 0 1 0 -1 -1 1 0 21 + 312 N_334_i 3 -1 5 1 5 -1 -1 1 0 21 + 298 N_135_i 3 -1 4 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 55 IPL_1_ 1 -1 -1 3 0 1 5 55 -1 + 27 BGACK_000 1 -1 -1 3 3 4 7 27 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 63 CLK_030 1 -1 -1 2 1 2 63 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 150 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" @@ -8683,1395 +1984,13 @@ "--- ---- ---- ---- --- --- --- ---- --- --- ----" 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 374 7 3 0 4 6 79 -1 3 0 21 + 79 RW_000 5 376 7 3 2 4 6 79 -1 3 0 21 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 68 A_0_ 5 373 6 2 1 6 68 -1 3 0 21 - 70 RW 5 381 6 2 5 7 70 -1 2 0 21 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 372 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 376 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 375 1 0 6 -1 10 0 21 - 80 DSACK1 5 379 7 0 80 -1 4 0 21 - 82 BGACK_030 5 378 7 0 82 -1 3 0 21 - 34 VMA 5 380 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 377 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 7 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 378 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 300 inst_AS_030_D0 3 -1 7 6 0 2 3 4 5 7 -1 -1 1 0 21 - 370 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 321 CLK_000_P_SYNC_10_ 3 -1 6 4 0 3 5 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 365 SM_AMIGA_6_ 3 -1 5 3 1 5 6 -1 -1 3 0 21 - 322 SM_AMIGA_5_ 3 -1 5 3 0 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 296 cpu_est_0_ 3 -1 2 3 2 3 5 -1 -1 2 0 21 - 338 CLK_000_N_SYNC_12_ 3 -1 6 3 2 3 5 -1 -1 1 0 21 - 320 CLK_000_D_0_ 3 -1 2 3 3 4 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 337 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 380 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 367 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 334 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 364 inst_CLK_000_NE_D0 3 -1 2 2 2 5 -1 -1 1 0 21 - 319 CLK_000_D_1_ 3 -1 4 2 4 5 -1 -1 1 0 21 - 314 CLK_000_D_9_ 3 -1 3 2 2 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21 - 376 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 375 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 372 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 366 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 368 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 379 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 369 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 340 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 293 N_205_i 3 -1 5 1 5 -1 -1 4 0 21 - 374 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 373 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 339 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 336 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 381 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 377 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 341 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 363 CLK_000_N_SYNC_11_ 3 -1 3 1 6 -1 -1 1 0 21 - 362 CLK_000_N_SYNC_10_ 3 -1 2 1 3 -1 -1 1 0 21 - 361 CLK_000_N_SYNC_9_ 3 -1 1 1 2 -1 -1 1 0 21 - 360 CLK_000_N_SYNC_8_ 3 -1 2 1 1 -1 -1 1 0 21 - 359 CLK_000_N_SYNC_7_ 3 -1 4 1 2 -1 -1 1 0 21 - 358 CLK_000_N_SYNC_6_ 3 -1 6 1 4 -1 -1 1 0 21 - 357 CLK_000_N_SYNC_5_ 3 -1 0 1 6 -1 -1 1 0 21 - 356 CLK_000_N_SYNC_4_ 3 -1 2 1 0 -1 -1 1 0 21 - 355 CLK_000_N_SYNC_3_ 3 -1 6 1 2 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_2_ 3 -1 0 1 6 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_1_ 3 -1 1 1 0 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_0_ 3 -1 4 1 1 -1 -1 1 0 21 - 351 CLK_000_P_SYNC_9_ 3 -1 6 1 6 -1 -1 1 0 21 - 350 CLK_000_P_SYNC_8_ 3 -1 1 1 6 -1 -1 1 0 21 - 349 CLK_000_P_SYNC_7_ 3 -1 1 1 1 -1 -1 1 0 21 - 348 CLK_000_P_SYNC_6_ 3 -1 0 1 1 -1 -1 1 0 21 - 347 CLK_000_P_SYNC_5_ 3 -1 2 1 0 -1 -1 1 0 21 - 346 CLK_000_P_SYNC_4_ 3 -1 6 1 2 -1 -1 1 0 21 - 345 CLK_000_P_SYNC_3_ 3 -1 5 1 6 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_2_ 3 -1 5 1 5 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_1_ 3 -1 2 1 5 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_0_ 3 -1 4 1 2 -1 -1 1 0 21 - 333 CLK_000_D_11_ 3 -1 7 1 7 -1 -1 1 0 21 - 332 CLK_000_D_8_ 3 -1 3 1 3 -1 -1 1 0 21 - 331 CLK_000_D_7_ 3 -1 3 1 3 -1 -1 1 0 21 - 330 CLK_000_D_6_ 3 -1 3 1 3 -1 -1 1 0 21 - 329 CLK_000_D_5_ 3 -1 3 1 3 -1 -1 1 0 21 - 328 CLK_000_D_4_ 3 -1 6 1 3 -1 -1 1 0 21 - 327 CLK_000_D_3_ 3 -1 0 1 6 -1 -1 1 0 21 - 326 CLK_000_D_2_ 3 -1 4 1 0 -1 -1 1 0 21 - 325 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 324 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 323 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21 - 315 CLK_000_D_10_ 3 -1 2 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 59 A_1_ 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 7 13 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 -151 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 1 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 374 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 68 A_0_ 5 375 6 2 0 6 68 -1 3 0 21 - 70 RW 5 382 6 2 1 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 373 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 377 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 376 1 0 6 -1 10 0 21 - 80 DSACK1 5 380 7 0 80 -1 4 0 21 - 82 BGACK_030 5 379 7 0 82 -1 3 0 21 - 34 VMA 5 381 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 378 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 6 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 379 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 321 CLK_000_P_SYNC_10_ 3 -1 3 6 0 1 3 5 6 7 -1 -1 1 0 21 - 371 SM_AMIGA_i_7_ 3 -1 5 5 1 2 3 5 7 -1 -1 14 0 21 - 300 inst_AS_030_D0 3 -1 7 5 1 2 3 4 7 -1 -1 1 0 21 - 366 SM_AMIGA_6_ 3 -1 5 4 0 1 5 6 -1 -1 3 0 21 - 322 SM_AMIGA_5_ 3 -1 5 4 1 2 5 7 -1 -1 3 0 21 - 335 SM_AMIGA_0_ 3 -1 6 4 1 5 6 7 -1 -1 2 0 21 - 339 CLK_000_N_SYNC_12_ 3 -1 0 4 1 3 5 6 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 368 SM_AMIGA_1_ 3 -1 5 3 5 6 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 320 CLK_000_D_0_ 3 -1 5 3 3 5 6 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 338 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 5 0 21 - 381 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 337 SM_AMIGA_4_ 3 -1 5 2 1 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 336 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 365 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 319 CLK_000_D_1_ 3 -1 5 2 5 6 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 2 2 3 5 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 - 377 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 376 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 373 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 367 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 369 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 380 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 370 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 341 RST_DLY_1_ 3 -1 1 1 1 -1 -1 4 0 21 - 293 N_205_i 3 -1 5 1 5 -1 -1 4 0 21 - 375 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 374 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 340 RST_DLY_0_ 3 -1 1 1 1 -1 -1 3 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 382 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 378 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 372 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 342 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 364 CLK_000_N_SYNC_11_ 3 -1 0 1 0 -1 -1 1 0 21 - 363 CLK_000_N_SYNC_10_ 3 -1 6 1 0 -1 -1 1 0 21 - 362 CLK_000_N_SYNC_9_ 3 -1 4 1 6 -1 -1 1 0 21 - 361 CLK_000_N_SYNC_8_ 3 -1 3 1 4 -1 -1 1 0 21 - 360 CLK_000_N_SYNC_7_ 3 -1 5 1 3 -1 -1 1 0 21 - 359 CLK_000_N_SYNC_6_ 3 -1 2 1 5 -1 -1 1 0 21 - 358 CLK_000_N_SYNC_5_ 3 -1 4 1 2 -1 -1 1 0 21 - 357 CLK_000_N_SYNC_4_ 3 -1 6 1 4 -1 -1 1 0 21 - 356 CLK_000_N_SYNC_3_ 3 -1 0 1 6 -1 -1 1 0 21 - 355 CLK_000_N_SYNC_2_ 3 -1 3 1 0 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_1_ 3 -1 0 1 3 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_0_ 3 -1 6 1 0 -1 -1 1 0 21 - 352 CLK_000_P_SYNC_9_ 3 -1 6 1 3 -1 -1 1 0 21 - 351 CLK_000_P_SYNC_8_ 3 -1 0 1 6 -1 -1 1 0 21 - 350 CLK_000_P_SYNC_7_ 3 -1 5 1 0 -1 -1 1 0 21 - 349 CLK_000_P_SYNC_6_ 3 -1 7 1 5 -1 -1 1 0 21 - 348 CLK_000_P_SYNC_5_ 3 -1 3 1 7 -1 -1 1 0 21 - 347 CLK_000_P_SYNC_4_ 3 -1 4 1 3 -1 -1 1 0 21 - 346 CLK_000_P_SYNC_3_ 3 -1 6 1 4 -1 -1 1 0 21 - 345 CLK_000_P_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_1_ 3 -1 2 1 2 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_0_ 3 -1 5 1 2 -1 -1 1 0 21 - 334 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 - 333 CLK_000_D_9_ 3 -1 1 1 3 -1 -1 1 0 21 - 332 CLK_000_D_8_ 3 -1 2 1 1 -1 -1 1 0 21 - 331 CLK_000_D_7_ 3 -1 1 1 2 -1 -1 1 0 21 - 330 CLK_000_D_6_ 3 -1 0 1 1 -1 -1 1 0 21 - 329 CLK_000_D_5_ 3 -1 3 1 0 -1 -1 1 0 21 - 328 CLK_000_D_4_ 3 -1 1 1 3 -1 -1 1 0 21 - 327 CLK_000_D_3_ 3 -1 2 1 1 -1 -1 1 0 21 - 326 CLK_000_D_2_ 3 -1 5 1 2 -1 -1 1 0 21 - 325 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 324 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 323 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21 - 315 CLK_000_D_11_ 3 -1 7 1 7 -1 -1 1 0 21 - 314 CLK_000_D_10_ 3 -1 3 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 59 A_1_ 1 -1 -1 2 2 6 59 -1 - 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 6 13 -1 - 10 CLK_000 1 -1 -1 1 5 10 -1 -128 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 79 RW_000 5 352 7 2 4 6 79 -1 5 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 70 RW 5 357 6 1 7 70 -1 2 0 21 - 40 BERR 5 -1 4 1 7 40 -1 1 0 21 - 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 - 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 0 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 0 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 0 1 0 6 -1 10 0 21 - 80 DSACK1 0 7 0 80 -1 4 0 21 - 82 BGACK_030 0 7 0 82 -1 3 0 21 - 68 A_0_ 5 358 6 0 68 -1 3 0 21 - 34 VMA 0 3 0 34 -1 3 0 21 - 65 E 0 -1 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 - 28 BG_000 0 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 -1 0 91 -1 1 0 21 - 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 69 SIZE_0_ 0 6 0 69 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 - 30 LDS_000 0 3 0 30 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 -1 0 2 -1 1 0 21 - 354 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 - 318 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 -1 5 0 3 4 6 7 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 - 319 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 - 314 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 - 359 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 351 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 350 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21 - 304 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21 - 352 RN_RW_000 3 79 7 1 7 79 -1 5 0 21 - 336 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 5 0 21 - 355 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 344 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 4 0 21 - 334 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 4 0 21 - 321 SM_AMIGA_5_ 3 -1 -1 1 7 -1 -1 4 0 21 - 295 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21 - 358 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 356 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 - 296 cpu_est_3_ 3 -1 -1 1 3 -1 -1 3 0 21 - 294 cpu_est_1_ 3 -1 -1 1 3 -1 -1 3 0 21 - 357 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 353 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 348 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 - 297 cpu_est_0_ 3 -1 -1 1 3 -1 -1 2 0 21 - 347 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 1 0 21 - 333 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 - 316 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 - 315 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 - 349 SM_AMIGA_i_7__0 3 -1 -1 0 -1 -1 11 1 21 - 345 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 8 0 21 - 343 inst_CLK_030_H 3 -1 -1 0 -1 -1 8 0 21 - 302 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 - 346 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 5 0 21 - 342 SM_AMIGA_6_ 3 -1 -1 0 -1 -1 4 0 21 - 338 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 4 0 21 - 306 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 4 0 21 - 340 RST_DLY_1_ 3 -1 -1 0 -1 -1 3 0 21 - 339 RST_DLY_0_ 3 -1 -1 0 -1 -1 3 1 21 - 341 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 - 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 - 293 N_199_i 3 -1 -1 0 -1 -1 2 0 21 - 337 inst_CLK_000_NE_D0 3 -1 -1 0 -1 -1 1 0 21 - 332 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 - 320 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 - 317 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 - 307 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 1 1 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 4 1 3 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 2 4 7 56 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 10 CLK_000 1 -1 -1 2 3 7 10 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 7 63 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 59 A_1_ 1 -1 -1 0 59 -1 - 35 VPA 1 -1 -1 0 35 -1 - 29 DTACK 1 -1 -1 0 29 -1 - 13 nEXP_SPACE 1 -1 -1 0 13 -1 -128 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 79 RW_000 5 352 7 2 4 6 79 -1 5 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 70 RW 5 357 6 1 7 70 -1 2 0 21 - 40 BERR 5 -1 4 1 7 40 -1 1 0 21 - 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 - 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 0 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 0 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 0 1 0 6 -1 10 0 21 - 80 DSACK1 0 7 0 80 -1 4 0 21 - 82 BGACK_030 0 7 0 82 -1 3 0 21 - 68 A_0_ 5 358 6 0 68 -1 3 0 21 - 34 VMA 0 3 0 34 -1 3 0 21 - 65 E 0 -1 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 - 28 BG_000 0 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 -1 0 91 -1 1 0 21 - 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 69 SIZE_0_ 0 6 0 69 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 - 30 LDS_000 0 3 0 30 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 -1 0 2 -1 1 0 21 - 354 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 - 318 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 -1 5 0 3 4 6 7 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 - 319 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 - 314 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 - 359 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 351 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 350 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21 - 304 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21 - 352 RN_RW_000 3 79 7 1 7 79 -1 5 0 21 - 336 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 5 0 21 - 355 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 344 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 4 0 21 - 334 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 4 0 21 - 321 SM_AMIGA_5_ 3 -1 -1 1 7 -1 -1 4 0 21 - 295 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21 - 358 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 356 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 - 296 cpu_est_3_ 3 -1 -1 1 3 -1 -1 3 0 21 - 294 cpu_est_1_ 3 -1 -1 1 3 -1 -1 3 0 21 - 357 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 353 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 348 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 - 297 cpu_est_0_ 3 -1 -1 1 3 -1 -1 2 0 21 - 347 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 1 0 21 - 333 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 - 316 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 - 315 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 - 349 SM_AMIGA_i_7__0 3 -1 -1 0 -1 -1 11 1 21 - 345 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 8 0 21 - 343 inst_CLK_030_H 3 -1 -1 0 -1 -1 8 0 21 - 302 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 - 346 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 5 0 21 - 342 SM_AMIGA_6_ 3 -1 -1 0 -1 -1 4 0 21 - 338 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 4 0 21 - 306 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 4 0 21 - 340 RST_DLY_1_ 3 -1 -1 0 -1 -1 3 0 21 - 339 RST_DLY_0_ 3 -1 -1 0 -1 -1 3 1 21 - 341 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 - 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 - 293 N_199_i 3 -1 -1 0 -1 -1 2 0 21 - 337 inst_CLK_000_NE_D0 3 -1 -1 0 -1 -1 1 0 21 - 332 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 - 320 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 - 317 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 - 307 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 1 1 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 4 1 3 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 2 4 7 56 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 10 CLK_000 1 -1 -1 2 3 7 10 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 7 63 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 59 A_1_ 1 -1 -1 0 59 -1 - 35 VPA 1 -1 -1 0 35 -1 - 29 DTACK 1 -1 -1 0 29 -1 - 13 nEXP_SPACE 1 -1 -1 0 13 -1 -129 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 2 3 5 7 40 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 - 79 RW_000 5 355 7 3 1 4 6 79 -1 4 0 21 - 31 UDS_000 5 -1 3 3 1 2 6 31 -1 1 0 21 - 68 A_0_ 5 351 6 2 2 6 68 -1 3 0 21 - 70 RW 5 360 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 30 LDS_000 5 -1 3 2 1 2 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 6 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 6 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 354 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 353 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 352 1 0 6 -1 10 0 21 - 80 DSACK1 5 358 7 0 80 -1 4 0 21 - 82 BGACK_030 5 357 7 0 82 -1 3 0 21 - 34 VMA 5 359 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 356 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 302 inst_nEXP_SPACE_D0reg 3 -1 1 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 357 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 319 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 301 inst_AS_030_D0 3 -1 4 5 2 3 4 5 7 -1 -1 1 0 21 - 348 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 11 0 21 - 343 SM_AMIGA_6_ 3 -1 5 4 2 3 5 6 -1 -1 3 0 21 - 315 CLK_000_D_0_ 3 -1 7 4 0 3 5 7 -1 -1 1 0 21 - 321 SM_AMIGA_5_ 3 -1 3 3 3 5 7 -1 -1 4 0 21 - 295 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 - 310 SIZE_DMA_1_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 - 309 SIZE_DMA_0_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 - 298 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 - 296 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 - 297 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 2 0 21 - 338 inst_CLK_000_NE_D0 3 -1 7 3 0 3 6 -1 -1 1 0 21 - 314 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 306 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21 - 346 SM_AMIGA_3_ 3 -1 0 2 0 5 -1 -1 8 0 21 - 305 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 - 303 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 337 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 347 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 4 0 21 - 345 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 4 0 21 - 340 RST_DLY_0_ 3 -1 5 2 0 5 -1 -1 4 0 21 - 308 CYCLE_DMA_1_ 3 -1 0 2 0 1 -1 -1 4 0 21 - 359 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 339 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 335 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 - 313 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 3 0 21 - 307 CYCLE_DMA_0_ 3 -1 0 2 0 1 -1 -1 3 0 21 - 342 RST_DLY_2_ 3 -1 0 2 0 5 -1 -1 2 0 21 - 341 RST_DLY_1_ 3 -1 0 2 0 5 -1 -1 2 1 21 - 336 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 312 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 299 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 325 CLK_000_D_1_ 3 -1 5 2 3 5 -1 -1 1 0 21 - 317 CLK_000_D_11_ 3 -1 7 2 3 7 -1 -1 1 0 21 - 311 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 304 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 - 354 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 344 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 - 358 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 355 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 350 SM_AMIGA_i_7__0 3 -1 5 1 5 -1 -1 4 0 21 - 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 360 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 356 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 349 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 293 N_146_i 3 -1 0 1 5 -1 -1 2 0 21 - 334 CLK_000_D_12_ 3 -1 3 1 7 -1 -1 1 0 21 - 333 CLK_000_D_9_ 3 -1 5 1 0 -1 -1 1 0 21 - 332 CLK_000_D_8_ 3 -1 6 1 5 -1 -1 1 0 21 - 331 CLK_000_D_7_ 3 -1 4 1 6 -1 -1 1 0 21 - 330 CLK_000_D_6_ 3 -1 6 1 4 -1 -1 1 0 21 - 329 CLK_000_D_5_ 3 -1 6 1 6 -1 -1 1 0 21 - 328 CLK_000_D_4_ 3 -1 6 1 6 -1 -1 1 0 21 - 327 CLK_000_D_3_ 3 -1 3 1 6 -1 -1 1 0 21 - 326 CLK_000_D_2_ 3 -1 3 1 3 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 4 1 1 -1 -1 1 0 21 - 320 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 318 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 - 316 CLK_000_D_10_ 3 -1 0 1 7 -1 -1 1 0 21 - 294 N_132_i 3 -1 3 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 10 CLK_000 1 -1 -1 4 0 3 5 7 10 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 4 66 -1 - 63 CLK_030 1 -1 -1 2 1 7 63 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 59 A_1_ 1 -1 -1 1 2 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 1 13 -1 -127 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 3 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 5 0 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 351 7 3 1 4 6 79 -1 4 0 21 - 70 RW 5 356 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 1 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 1 6 30 -1 1 0 21 - 68 A_0_ 5 357 6 1 5 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 350 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 349 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 358 1 0 6 -1 10 0 21 - 80 DSACK1 5 354 7 0 80 -1 4 0 21 - 82 BGACK_030 5 353 7 0 82 -1 3 0 21 - 34 VMA 5 355 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 352 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 3 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 353 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 300 inst_AS_030_D0 3 -1 7 6 0 3 4 5 6 7 -1 -1 1 0 21 - 319 CLK_000_D_0_ 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 0 5 0 2 3 5 7 -1 -1 1 0 21 - 347 SM_AMIGA_i_7_ 3 -1 2 4 0 3 5 7 -1 -1 12 0 21 - 344 SM_AMIGA_1_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21 - 321 SM_AMIGA_5_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 4 0 1 2 6 -1 -1 1 0 21 - 346 SM_AMIGA_2_ 3 -1 2 3 0 2 5 -1 -1 5 0 21 - 297 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 334 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 1 3 1 6 7 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 305 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21 - 345 SM_AMIGA_3_ 3 -1 2 2 2 5 -1 -1 8 0 21 - 304 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 0 2 0 5 -1 -1 7 0 21 - 336 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 307 CYCLE_DMA_1_ 3 -1 3 2 1 3 -1 -1 4 0 21 - 355 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 342 SM_AMIGA_6_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 338 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 306 CYCLE_DMA_0_ 3 -1 3 2 1 3 -1 -1 3 0 21 - 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 2 0 21 - 337 inst_CLK_000_NE_D0 3 -1 5 2 2 3 -1 -1 1 0 21 - 314 CLK_000_D_10_ 3 -1 5 2 0 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21 - 358 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 350 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 343 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 - 354 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 351 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 339 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 293 N_206_i 3 -1 5 1 2 -1 -1 4 0 21 - 357 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 356 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 352 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 348 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 341 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 340 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 333 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 - 332 CLK_000_D_9_ 3 -1 6 1 5 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 4 1 6 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 0 1 4 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 4 1 0 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 2 1 4 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 5 1 2 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 3 1 0 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 320 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 3 1 2 -1 -1 1 0 21 - 315 CLK_000_D_11_ 3 -1 0 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 63 CLK_030 1 -1 -1 2 1 7 63 -1 - 59 A_1_ 1 -1 -1 2 2 6 59 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 3 13 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 -126 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 1 2 5 6 7 40 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 79 RW_000 5 352 7 3 2 4 6 79 -1 4 0 21 - 68 A_0_ 5 348 6 2 0 2 68 -1 3 0 21 - 70 RW 5 357 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 30 LDS_000 5 -1 3 1 2 30 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 351 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 350 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 349 1 0 6 -1 10 0 21 - 80 DSACK1 5 355 7 0 80 -1 4 0 21 - 82 BGACK_030 5 354 7 0 82 -1 3 0 21 - 34 VMA 5 356 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 353 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 3 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 354 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 319 CLK_000_D_0_ 3 -1 0 6 0 1 3 4 5 7 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 7 6 0 1 3 4 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 6 2 3 4 5 6 7 -1 -1 1 0 21 - 346 SM_AMIGA_i_7_ 3 -1 5 5 1 3 5 6 7 -1 -1 12 0 21 - 341 SM_AMIGA_6_ 3 -1 1 4 0 1 2 5 -1 -1 3 0 21 - 303 inst_BGACK_030_INT_D 3 -1 4 4 0 2 3 6 -1 -1 1 0 21 - 302 inst_AS_030_000_SYNC 3 -1 6 3 1 5 6 -1 -1 7 0 21 - 297 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 321 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 305 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 304 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 335 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 2 0 2 -1 -1 4 0 21 - 356 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 343 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 333 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21 - 311 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 336 inst_CLK_000_NE_D0 3 -1 4 2 3 5 -1 -1 1 0 21 - 315 CLK_000_D_10_ 3 -1 6 2 3 7 -1 -1 1 0 21 - 314 CLK_000_D_9_ 3 -1 1 2 6 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21 - 351 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 350 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 349 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 344 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 8 0 21 - 342 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 345 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 - 355 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 352 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 338 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 293 N_229_i 3 -1 5 1 5 -1 -1 4 0 21 - 348 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 337 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 - 357 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 353 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 347 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 340 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 339 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 334 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21 - 332 CLK_000_D_11_ 3 -1 3 1 7 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 1 1 1 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 6 1 1 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 3 1 6 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 1 1 3 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 2 1 1 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 3 1 2 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 320 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 6 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 6 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 6 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 6 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 6 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 6 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 63 CLK_030 1 -1 -1 2 2 7 63 -1 - 59 A_1_ 1 -1 -1 2 0 3 59 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 3 13 -1 - 10 CLK_000 1 -1 -1 1 0 10 -1 -128 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 0 5 6 7 40 -1 1 0 21 - 79 RW_000 5 353 7 3 2 4 6 79 -1 4 0 21 - 70 RW 5 358 6 2 0 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 - 68 A_0_ 5 359 6 1 2 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 352 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 351 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 350 1 0 6 -1 10 0 21 - 80 DSACK1 5 356 7 0 80 -1 4 0 21 - 82 BGACK_030 5 355 7 0 82 -1 3 0 21 - 34 VMA 5 357 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 354 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 355 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 3 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 317 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 318 CLK_000_D_1_ 3 -1 3 6 0 2 3 4 5 7 -1 -1 1 0 21 - 348 SM_AMIGA_i_7_ 3 -1 5 5 0 3 5 6 7 -1 -1 12 0 21 - 319 CLK_000_D_0_ 3 -1 2 5 0 2 3 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 4 5 0 3 4 6 7 -1 -1 1 0 21 - 297 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 343 SM_AMIGA_6_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 - 335 SM_AMIGA_0_ 3 -1 7 3 0 5 7 -1 -1 3 0 21 - 321 SM_AMIGA_5_ 3 -1 0 3 0 5 7 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_0_ 3 -1 1 3 1 3 5 -1 -1 2 0 21 - 338 inst_CLK_000_NE_D0 3 -1 7 3 1 3 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 3 3 1 6 7 -1 -1 1 0 21 - 305 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 304 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 6 2 5 6 -1 -1 7 0 21 - 337 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 5 0 21 - 357 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 345 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 339 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 336 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 320 inst_CLK_OUT_PRE_50 3 -1 4 2 3 4 -1 -1 1 0 21 - 315 CLK_000_D_12_ 3 -1 7 2 1 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 5 2 1 6 -1 -1 1 0 21 - 352 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 350 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 346 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 8 0 21 - 344 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 347 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 - 356 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 353 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 340 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 307 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21 - 293 N_206_i 3 -1 5 1 5 -1 -1 4 0 21 - 359 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 306 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21 - 358 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 354 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 349 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 342 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 341 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 334 CLK_000_D_13_ 3 -1 1 1 7 -1 -1 1 0 21 - 333 CLK_000_D_10_ 3 -1 3 1 4 -1 -1 1 0 21 - 332 CLK_000_D_9_ 3 -1 0 1 3 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 2 1 0 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 5 1 2 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 0 1 5 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 0 1 0 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 3 1 0 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 3 1 3 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 4 1 3 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21 - 314 CLK_000_D_11_ 3 -1 4 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 6 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 6 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 6 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 6 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 6 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 6 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 63 CLK_030 1 -1 -1 2 2 7 63 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A_1_ 1 -1 -1 1 1 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 3 13 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 -128 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 2 5 6 7 40 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 79 RW_000 5 351 7 3 2 4 6 79 -1 4 0 21 - 68 A_0_ 5 352 6 2 1 5 68 -1 3 0 21 - 70 RW 5 359 6 2 6 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 350 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 354 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 353 1 0 6 -1 10 0 21 - 80 DSACK1 5 357 7 0 80 -1 4 0 21 - 82 BGACK_030 5 356 7 0 82 -1 3 0 21 - 34 VMA 5 358 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 355 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 1 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 356 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 318 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 319 CLK_000_D_0_ 3 -1 3 7 0 2 3 4 5 6 7 -1 -1 1 0 21 - 314 CLK_000_D_1_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 6 0 2 3 4 6 7 -1 -1 1 0 21 - 348 SM_AMIGA_i_7_ 3 -1 5 5 0 3 5 6 7 -1 -1 12 0 21 - 321 SM_AMIGA_5_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21 - 303 inst_BGACK_030_INT_D 3 -1 0 4 0 1 3 6 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 343 SM_AMIGA_6_ 3 -1 5 3 1 5 6 -1 -1 3 0 21 - 335 SM_AMIGA_0_ 3 -1 7 3 5 6 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 305 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 304 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 0 2 0 5 -1 -1 7 0 21 - 337 inst_DS_000_ENABLE 3 -1 6 2 3 6 -1 -1 5 0 21 - 358 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 345 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 339 SM_AMIGA_4_ 3 -1 5 2 5 6 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 311 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 338 inst_CLK_000_NE_D0 3 -1 7 2 3 5 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 5 2 3 5 -1 -1 1 0 21 - 316 CLK_000_D_12_ 3 -1 4 2 3 7 -1 -1 1 0 21 - 315 CLK_000_D_11_ 3 -1 3 2 4 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21 - 354 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 353 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 350 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 346 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 8 0 21 - 344 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 347 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 - 357 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 351 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 340 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 307 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21 - 293 N_331 3 -1 5 1 5 -1 -1 4 0 21 - 352 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 306 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21 - 359 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 355 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 349 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 342 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 341 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 336 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21 - 334 CLK_000_D_13_ 3 -1 3 1 7 -1 -1 1 0 21 - 333 CLK_000_D_10_ 3 -1 0 1 3 -1 -1 1 0 21 - 332 CLK_000_D_9_ 3 -1 1 1 0 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 2 1 1 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 5 1 2 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 5 1 5 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 1 1 5 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 2 1 1 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 3 1 2 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 320 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 317 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 63 CLK_030 1 -1 -1 2 2 7 63 -1 - 59 A_1_ 1 -1 -1 2 1 3 59 -1 - 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 1 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 1 13 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 -127 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 350 7 2 4 6 79 -1 4 0 21 - 70 RW 5 358 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A_0_ 5 351 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 349 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 353 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 352 1 0 6 -1 10 0 21 - 80 DSACK1 5 356 7 0 80 -1 4 0 21 - 82 BGACK_030 5 355 7 0 82 -1 3 0 21 - 34 VMA 5 357 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 354 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 2 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 355 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 318 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 314 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 - 347 SM_AMIGA_i_7_ 3 -1 5 5 1 2 3 5 7 -1 -1 12 0 21 - 319 CLK_000_D_0_ 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 4 5 1 2 3 4 7 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 3 0 6 7 -1 -1 7 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 342 SM_AMIGA_6_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 - 334 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 321 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 3 3 1 6 7 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 305 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 9 0 21 - 343 inst_CLK_030_H 3 -1 0 2 0 6 -1 -1 8 0 21 - 302 inst_AS_030_000_SYNC 3 -1 1 2 1 5 -1 -1 7 0 21 - 336 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 2 0 6 -1 -1 4 0 21 - 357 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 344 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 338 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 2 0 6 -1 -1 3 0 21 - 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 337 inst_CLK_000_NE_D0 3 -1 2 2 3 5 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 1 2 4 5 -1 -1 1 0 21 - 320 inst_CLK_OUT_PRE_50 3 -1 1 2 1 3 -1 -1 1 0 21 - 315 CLK_000_D_10_ 3 -1 4 2 2 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21 - 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 345 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 8 0 21 - 346 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 - 356 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 339 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 293 N_331 3 -1 5 1 5 -1 -1 4 0 21 - 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 358 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 354 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 348 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 341 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 340 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 333 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 - 332 CLK_000_D_9_ 3 -1 4 1 4 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 5 1 4 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 2 1 5 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 5 1 2 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 6 1 5 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 3 1 6 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 4 1 3 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 317 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 - 316 CLK_000_D_11_ 3 -1 2 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 1 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 1 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 1 4 7 94 -1 - 63 CLK_030 1 -1 -1 3 0 6 7 63 -1 - 58 A_DECODE_17_ 1 -1 -1 3 1 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 1 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 1 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A_1_ 1 -1 -1 1 2 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 2 13 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 -127 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 4 6 7 41 -1 1 0 21 - 40 BERR 5 -1 4 5 0 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 350 7 2 4 6 79 -1 4 0 21 - 70 RW 5 358 6 2 0 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 68 A_0_ 5 351 6 1 5 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21 + 68 A_0_ 5 372 6 1 3 68 -1 3 0 21 + 70 RW 5 381 6 1 7 70 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 @@ -10082,224 +2001,116 @@ 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 349 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 353 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 352 1 0 6 -1 10 0 21 - 80 DSACK1 5 356 7 0 80 -1 4 0 21 - 82 BGACK_030 5 355 7 0 82 -1 3 0 21 - 34 VMA 5 357 3 0 34 -1 3 0 21 + 82 BGACK_030 5 378 7 0 82 -1 3 0 21 + 28 BG_000 5 377 3 0 28 -1 3 0 21 + 8 IPL_030_2_ 5 375 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 374 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 373 1 0 6 -1 3 0 21 + 80 DSACK1 5 379 7 0 80 -1 2 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 354 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 77 FPU_CS 0 7 0 77 -1 1 0 21 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 46 CIIN 0 4 0 46 -1 1 0 21 + 34 VMA 5 380 3 0 34 -1 1 0 21 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 2 RESET 0 1 0 2 -1 1 0 21 - 355 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 5 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 318 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 300 inst_AS_030_D0 3 -1 7 6 0 3 4 5 6 7 -1 -1 1 0 21 - 319 CLK_000_D_0_ 3 -1 2 5 0 1 2 3 7 -1 -1 1 0 21 - 314 CLK_000_D_1_ 3 -1 7 5 0 1 2 3 7 -1 -1 1 0 21 - 347 SM_AMIGA_i_7_ 3 -1 2 4 0 3 5 7 -1 -1 12 0 21 - 321 SM_AMIGA_5_ 3 -1 2 4 0 2 6 7 -1 -1 3 0 21 - 302 inst_AS_030_000_SYNC 3 -1 5 3 0 2 5 -1 -1 7 0 21 - 294 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 - 342 SM_AMIGA_6_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 - 334 SM_AMIGA_0_ 3 -1 7 3 0 2 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 - 325 CLK_000_D_2_ 3 -1 7 3 0 2 3 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 3 3 1 6 7 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 5 3 1 5 6 -1 -1 1 0 21 - 305 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 9 0 21 - 304 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 7 0 21 - 336 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 5 0 21 - 339 RST_DLY_0_ 3 -1 1 2 0 1 -1 -1 4 0 21 - 307 CYCLE_DMA_1_ 3 -1 1 2 1 6 -1 -1 4 0 21 - 357 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 - 344 SM_AMIGA_1_ 3 -1 2 2 2 7 -1 -1 3 0 21 - 338 SM_AMIGA_4_ 3 -1 2 2 0 2 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 306 CYCLE_DMA_0_ 3 -1 1 2 1 6 -1 -1 3 0 21 - 341 RST_DLY_2_ 3 -1 0 2 0 1 -1 -1 2 0 21 - 340 RST_DLY_1_ 3 -1 1 2 0 1 -1 -1 2 1 21 - 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 2 2 2 3 -1 -1 2 0 21 - 337 inst_CLK_000_NE_D0 3 -1 7 2 2 3 -1 -1 1 0 21 - 316 CLK_000_D_11_ 3 -1 7 2 0 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 3 2 2 3 -1 -1 1 0 21 - 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 345 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 8 0 21 - 343 inst_CLK_030_H 3 -1 6 1 6 -1 -1 8 0 21 - 346 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 5 0 21 - 356 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 293 N_331 3 -1 2 1 2 -1 -1 4 0 21 - 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 358 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 354 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 348 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 333 CLK_000_D_12_ 3 -1 0 1 7 -1 -1 1 0 21 - 332 CLK_000_D_9_ 3 -1 3 1 0 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 0 1 3 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 1 1 0 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 5 1 1 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 3 1 5 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 5 1 3 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 3 1 5 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 320 inst_CLK_OUT_PRE_50 3 -1 3 1 3 -1 -1 1 0 21 - 317 inst_DTACK_D0 3 -1 3 1 2 -1 -1 1 0 21 - 315 CLK_000_D_10_ 3 -1 0 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 63 CLK_030 1 -1 -1 2 6 7 63 -1 - 59 A_1_ 1 -1 -1 2 1 5 59 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 5 13 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 -126 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 350 7 3 0 4 6 79 -1 4 0 21 - 81 AS_030 5 -1 7 3 1 4 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 357 6 2 2 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A_0_ 5 349 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 348 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 352 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 351 1 0 6 -1 10 0 21 - 80 DSACK1 5 355 7 0 80 -1 4 0 21 - 82 BGACK_030 5 354 7 0 82 -1 3 0 21 - 34 VMA 5 356 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 353 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 354 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 2 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 318 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 319 CLK_000_D_0_ 3 -1 3 6 0 2 3 5 6 7 -1 -1 1 0 21 - 314 CLK_000_D_1_ 3 -1 6 6 0 2 3 4 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 1 5 2 3 4 6 7 -1 -1 1 0 21 - 346 SM_AMIGA_i_7_ 3 -1 5 4 2 3 6 7 -1 -1 12 0 21 - 341 SM_AMIGA_6_ 3 -1 2 4 0 1 2 5 -1 -1 3 0 21 - 321 SM_AMIGA_5_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21 - 302 inst_AS_030_000_SYNC 3 -1 6 3 2 5 6 -1 -1 7 0 21 - 294 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 333 SM_AMIGA_0_ 3 -1 7 3 2 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 335 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 356 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 343 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 337 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 334 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 336 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 4 2 2 5 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 5 2 2 6 -1 -1 1 0 21 - 352 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 351 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 348 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 344 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 8 0 21 - 342 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 345 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 - 355 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 338 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 293 N_331 3 -1 5 1 5 -1 -1 4 0 21 - 349 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 357 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 353 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 347 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 340 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 339 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 332 CLK_000_D_11_ 3 -1 7 1 7 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 3 1 3 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 5 1 3 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 5 1 5 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 1 1 5 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 4 1 1 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 5 1 4 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 320 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 317 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21 - 316 CLK_000_D_10_ 3 -1 7 1 7 -1 -1 1 0 21 - 315 CLK_000_D_9_ 3 -1 3 1 7 -1 -1 1 0 21 + 378 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 330 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 331 CLK_000_D_0_ 3 -1 5 5 0 3 5 6 7 -1 -1 1 0 21 + 326 CLK_000_D_1_ 3 -1 7 5 0 3 5 6 7 -1 -1 1 0 21 + 310 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21 + 349 SM_AMIGA_6_ 3 -1 5 4 0 3 5 7 -1 -1 3 0 21 + 360 N_120_i 3 -1 7 4 0 3 5 7 -1 -1 1 0 21 + 362 SM_AMIGA_i_7_ 3 -1 0 3 2 5 7 -1 -1 3 0 21 + 356 SM_AMIGA_1_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 + 307 cpu_est_2_ 3 -1 1 3 1 5 6 -1 -1 3 0 21 + 311 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 2 0 21 + 325 inst_CLK_OUT_PRE_D 3 -1 4 3 1 2 6 -1 -1 1 0 21 + 293 N_119_i 3 -1 7 3 1 5 6 -1 -1 1 0 21 + 358 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 357 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 350 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 348 inst_BGACK_030_INT_PRE 3 -1 0 2 0 7 -1 -1 3 0 21 + 347 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 319 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 315 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 3 0 21 + 306 cpu_est_1_ 3 -1 6 2 5 6 -1 -1 3 0 21 + 304 cpu_est_0_ 3 -1 6 2 5 6 -1 -1 3 0 21 + 303 cpu_est_3_ 3 -1 6 2 5 6 -1 -1 3 0 21 + 346 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 314 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 2 0 21 + 308 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 305 N_149_i 3 -1 6 2 0 5 -1 -1 2 0 21 + 337 CLK_000_D_2_ 3 -1 7 2 1 5 -1 -1 1 0 21 + 328 CLK_000_D_11_ 3 -1 0 2 2 5 -1 -1 1 0 21 + 327 CLK_000_D_10_ 3 -1 6 2 0 2 -1 -1 1 0 21 + 321 inst_VPA_D 3 -1 0 2 5 6 -1 -1 1 0 21 + 313 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 + 377 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 376 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 375 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 374 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 373 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 372 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 368 N_234 3 -1 5 1 0 -1 -1 3 0 21 + 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21 + 353 RST_DLY_1_ 3 -1 3 1 3 -1 -1 3 0 21 + 351 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 + 324 N_270_i 3 -1 3 1 3 -1 -1 3 0 21 + 323 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 + 318 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 316 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 + 299 N_168_i 3 -1 2 1 7 -1 -1 3 0 21 + 296 bgack_030_int_0_un1_n 3 -1 0 1 7 -1 -1 3 0 21 + 295 N_22 3 -1 6 1 3 -1 -1 3 0 21 + 381 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 379 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 365 N_276_0 3 -1 2 1 2 -1 -1 2 0 21 + 364 G_117 3 -1 1 1 1 -1 -1 2 0 21 + 363 G_116 3 -1 1 1 1 -1 -1 2 0 21 + 355 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21 + 354 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 + 352 RST_DLY_0_ 3 -1 3 1 3 -1 -1 2 0 21 + 333 N_220_i 3 -1 7 1 0 -1 -1 2 0 21 + 322 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 312 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21 + 309 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 302 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 301 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 300 pos_clk_un26_bgack_030_int_i_0_i_n 3 -1 0 1 2 -1 -1 2 0 21 + 297 N_271_i 3 -1 7 1 5 -1 -1 2 0 21 + 380 RN_VMA 3 34 3 1 6 34 -1 1 0 21 + 370 N_241 3 -1 5 1 6 -1 -1 1 0 21 + 369 N_237 3 -1 5 1 0 -1 -1 1 0 21 + 367 N_292 3 -1 7 1 0 -1 -1 1 0 21 + 366 N_267 3 -1 7 1 0 -1 -1 1 0 21 + 361 N_138_i 3 -1 6 1 2 -1 -1 1 0 21 + 345 CLK_000_D_12_ 3 -1 5 1 2 -1 -1 1 0 21 + 344 CLK_000_D_9_ 3 -1 4 1 6 -1 -1 1 0 21 + 343 CLK_000_D_8_ 3 -1 0 1 4 -1 -1 1 0 21 + 342 CLK_000_D_7_ 3 -1 1 1 0 -1 -1 1 0 21 + 341 CLK_000_D_6_ 3 -1 5 1 1 -1 -1 1 0 21 + 340 CLK_000_D_5_ 3 -1 2 1 5 -1 -1 1 0 21 + 339 CLK_000_D_4_ 3 -1 3 1 2 -1 -1 1 0 21 + 338 CLK_000_D_3_ 3 -1 1 1 3 -1 -1 1 0 21 + 336 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 + 335 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 + 334 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 + 332 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 329 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21 + 317 N_178_i 3 -1 3 1 3 -1 -1 1 0 21 + 298 N_132_i 3 -1 6 1 1 -1 -1 1 0 21 + 294 N_268_i 3 -1 6 1 0 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 96 A_DECODE_19_ 1 -1 -1 3 4 6 7 96 -1 95 A_DECODE_16_ 1 -1 -1 3 4 6 7 95 -1 @@ -10307,38 +2118,37 @@ 58 A_DECODE_17_ 1 -1 -1 3 4 6 7 58 -1 57 FC_1_ 1 -1 -1 3 4 6 7 57 -1 56 FC_0_ 1 -1 -1 3 4 6 7 56 -1 + 27 BGACK_000 1 -1 -1 3 0 4 7 27 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 + 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 63 CLK_030 1 -1 -1 1 2 63 -1 59 A_1_ 1 -1 -1 1 2 59 -1 - 35 VPA 1 -1 -1 1 3 35 -1 + 35 VPA 1 -1 -1 1 0 35 -1 29 DTACK 1 -1 -1 1 0 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 2 13 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 + 10 CLK_000 1 -1 -1 1 5 10 -1 151 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 374 7 3 0 4 6 79 -1 3 0 21 + 40 BERR 5 -1 4 7 0 1 2 3 5 6 7 40 -1 1 0 21 + 79 RW_000 5 377 7 3 2 4 6 79 -1 3 0 21 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 382 6 2 2 7 70 -1 2 0 21 + 70 RW 5 382 6 2 5 7 70 -1 2 0 21 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A_0_ 5 375 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 + 68 A_0_ 5 373 6 1 3 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 @@ -10347,16 +2157,16 @@ 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 373 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 377 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 376 1 0 6 -1 10 0 21 - 80 DSACK1 5 380 7 0 80 -1 4 0 21 82 BGACK_030 5 379 7 0 82 -1 3 0 21 34 VMA 5 381 3 0 34 -1 3 0 21 + 28 BG_000 5 378 3 0 28 -1 3 0 21 + 8 IPL_030_2_ 5 376 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 375 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 374 1 0 6 -1 3 0 21 + 80 DSACK1 5 380 7 0 80 -1 2 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 378 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 77 FPU_CS 0 7 0 77 -1 1 0 21 @@ -10366,1713 +2176,414 @@ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 2 RESET 0 1 0 2 -1 1 0 21 - 300 inst_nEXP_SPACE_D0reg 3 -1 6 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 + 332 inst_RESET_OUT 3 -1 5 8 0 1 2 3 4 5 6 7 -1 -1 2 0 21 379 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 320 CLK_000_P_SYNC_10_ 3 -1 6 5 0 2 3 5 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 5 0 2 3 4 7 -1 -1 1 0 21 - 321 SM_AMIGA_5_ 3 -1 5 4 0 2 5 7 -1 -1 3 0 21 - 371 SM_AMIGA_i_7_ 3 -1 5 3 2 3 7 -1 -1 14 0 21 - 293 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 366 SM_AMIGA_6_ 3 -1 2 3 1 2 5 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 334 SM_AMIGA_0_ 3 -1 7 3 2 5 7 -1 -1 2 0 21 - 339 CLK_000_N_SYNC_12_ 3 -1 3 3 3 5 7 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 5 3 1 6 7 -1 -1 1 0 21 - 302 inst_BGACK_030_INT_D 3 -1 2 3 1 2 6 -1 -1 1 0 21 - 303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 301 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 338 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 381 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 368 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 337 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 311 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 310 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 365 inst_CLK_000_NE_D0 3 -1 7 2 3 5 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_0_ 3 -1 4 2 2 5 -1 -1 1 0 21 - 319 CLK_000_D_0_ 3 -1 3 2 3 4 -1 -1 1 0 21 - 309 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21 - 377 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 376 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 373 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 367 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 369 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 380 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 370 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 341 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 375 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 374 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 343 N_194_i 3 -1 5 1 5 -1 -1 3 0 21 - 340 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 333 CLK_000_D_0_ 3 -1 1 5 0 3 5 6 7 -1 -1 1 0 21 + 328 CLK_000_D_1_ 3 -1 0 5 0 3 5 6 7 -1 -1 1 0 21 + 311 inst_AS_030_D0 3 -1 7 5 1 2 3 4 6 -1 -1 1 0 21 + 365 SM_AMIGA_i_7_ 3 -1 5 4 1 2 5 7 -1 -1 3 0 21 + 353 SM_AMIGA_6_ 3 -1 5 4 0 3 5 7 -1 -1 3 0 21 + 361 SM_AMIGA_5_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 + 354 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 312 inst_AS_030_000_SYNC 3 -1 1 3 1 3 5 -1 -1 3 0 21 + 307 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 + 306 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 + 305 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 + 308 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 2 0 21 + 313 inst_BGACK_030_INT_D 3 -1 4 3 1 2 6 -1 -1 1 0 21 + 295 N_145_i 3 -1 7 3 0 3 7 -1 -1 1 0 21 + 363 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 360 SM_AMIGA_1_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 355 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 322 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 321 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 315 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 3 0 21 + 348 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21 + 347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 314 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 2 0 21 + 309 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21 + 335 IPL_D0_0_ 3 -1 0 2 0 1 -1 -1 1 0 21 + 330 CLK_000_D_11_ 3 -1 7 2 2 3 -1 -1 1 0 21 + 329 CLK_000_D_10_ 3 -1 6 2 2 7 -1 -1 1 0 21 + 327 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21 + 325 N_144_i 3 -1 3 2 5 6 -1 -1 1 0 21 + 381 RN_VMA 3 34 3 1 0 34 -1 3 0 21 + 378 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 377 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 376 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 375 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 374 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 373 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 366 N_204 3 -1 0 1 5 -1 -1 3 0 21 + 362 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 3 0 21 + 356 RST_DLY_0_ 3 -1 5 1 5 -1 -1 3 0 21 + 350 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 326 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 + 320 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 319 dsack1_int_0_un1_n 3 -1 2 1 7 -1 -1 3 0 21 + 318 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 + 317 dsack1_int_0_un3_n 3 -1 2 1 7 -1 -1 3 0 21 + 299 N_153_0 3 -1 5 1 2 -1 -1 3 0 21 + 297 cpu_est_0_2__un0_n 3 -1 0 1 6 -1 -1 3 0 21 + 294 vma_int_0_un0_n 3 -1 0 1 3 -1 -1 3 0 21 382 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 378 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 380 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 372 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 342 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 364 CLK_000_N_SYNC_11_ 3 -1 2 1 3 -1 -1 1 0 21 - 363 CLK_000_N_SYNC_10_ 3 -1 1 1 2 -1 -1 1 0 21 - 362 CLK_000_N_SYNC_9_ 3 -1 6 1 1 -1 -1 1 0 21 - 361 CLK_000_N_SYNC_8_ 3 -1 3 1 6 -1 -1 1 0 21 - 360 CLK_000_N_SYNC_7_ 3 -1 2 1 3 -1 -1 1 0 21 - 359 CLK_000_N_SYNC_6_ 3 -1 3 1 2 -1 -1 1 0 21 - 358 CLK_000_N_SYNC_5_ 3 -1 2 1 3 -1 -1 1 0 21 - 357 CLK_000_N_SYNC_4_ 3 -1 0 1 2 -1 -1 1 0 21 - 356 CLK_000_N_SYNC_3_ 3 -1 1 1 0 -1 -1 1 0 21 - 355 CLK_000_N_SYNC_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_1_ 3 -1 5 1 0 -1 -1 1 0 21 - 353 CLK_000_P_SYNC_9_ 3 -1 5 1 6 -1 -1 1 0 21 - 352 CLK_000_P_SYNC_8_ 3 -1 4 1 5 -1 -1 1 0 21 - 351 CLK_000_P_SYNC_7_ 3 -1 0 1 4 -1 -1 1 0 21 - 350 CLK_000_P_SYNC_6_ 3 -1 0 1 0 -1 -1 1 0 21 - 349 CLK_000_P_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21 - 348 CLK_000_P_SYNC_4_ 3 -1 0 1 6 -1 -1 1 0 21 - 347 CLK_000_P_SYNC_3_ 3 -1 6 1 0 -1 -1 1 0 21 - 346 CLK_000_P_SYNC_2_ 3 -1 5 1 6 -1 -1 1 0 21 - 345 CLK_000_P_SYNC_1_ 3 -1 0 1 5 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_0_ 3 -1 4 1 0 -1 -1 1 0 21 - 333 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 - 332 CLK_000_D_9_ 3 -1 2 1 1 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 1 1 2 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 5 1 1 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 6 1 5 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 6 1 6 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 2 1 6 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 5 1 2 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 4 1 5 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 4 1 4 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 5 1 5 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21 - 314 CLK_000_D_11_ 3 -1 7 1 7 -1 -1 1 0 21 - 313 CLK_000_D_10_ 3 -1 1 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 59 A_1_ 1 -1 -1 2 1 2 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 35 VPA 1 -1 -1 1 1 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 6 13 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 -141 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 79 RW_000 5 367 7 2 4 6 79 -1 5 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 70 RW 5 372 6 1 7 70 -1 2 0 21 - 40 BERR 5 -1 4 1 7 40 -1 1 0 21 - 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 - 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 0 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 0 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 0 1 0 6 -1 10 0 21 - 80 DSACK1 0 7 0 80 -1 4 0 21 - 82 BGACK_030 0 7 0 82 -1 3 0 21 - 68 A_0_ 5 364 6 0 68 -1 3 0 21 - 34 VMA 0 3 0 34 -1 3 0 21 - 65 E 0 -1 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 - 28 BG_000 0 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 -1 0 91 -1 1 0 21 - 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 69 SIZE_0_ 0 6 0 69 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 - 30 LDS_000 0 3 0 30 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 -1 0 2 -1 1 0 21 - 369 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 -1 5 0 3 4 6 7 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 - 319 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 - 318 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 - 366 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 365 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 363 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21 - 304 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21 - 367 RN_RW_000 3 79 7 1 7 79 -1 5 0 21 - 337 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 5 0 21 - 370 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 334 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 4 0 21 - 297 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21 - 371 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 364 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 - 321 SM_AMIGA_5_ 3 -1 -1 1 7 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 -1 1 3 -1 -1 3 0 21 - 293 cpu_est_3_ 3 -1 -1 1 3 -1 -1 3 0 21 - 372 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 368 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 - 360 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 - 294 cpu_est_0_ 3 -1 -1 1 3 -1 -1 2 0 21 - 338 CLK_000_N_SYNC_12_ 3 -1 -1 1 3 -1 -1 1 0 21 - 333 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 - 315 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 - 314 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 - 362 SM_AMIGA_i_7__0 3 -1 -1 0 -1 -1 15 0 21 - 356 inst_CLK_030_H 3 -1 -1 0 -1 -1 8 0 21 - 302 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 - 359 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 5 0 21 - 358 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 5 0 21 - 340 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21 - 306 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 -1 0 -1 -1 3 1 21 - 353 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 1 21 - 339 RST_DLY_0_ 3 -1 -1 0 -1 -1 3 0 21 - 295 N_208_i 3 -1 -1 0 -1 -1 3 0 21 - 341 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 - 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 - 354 inst_CLK_000_NE_D0 3 -1 -1 0 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_11_ 3 -1 -1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_10_ 3 -1 -1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_9_ 3 -1 -1 0 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_8_ 3 -1 -1 0 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_7_ 3 -1 -1 0 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_6_ 3 -1 -1 0 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_5_ 3 -1 -1 0 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_4_ 3 -1 -1 0 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_3_ 3 -1 -1 0 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_2_ 3 -1 -1 0 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_1_ 3 -1 -1 0 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_0_ 3 -1 -1 0 -1 -1 1 0 21 - 332 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 - 320 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 - 307 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 1 1 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 4 1 3 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 2 4 7 56 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 10 CLK_000 1 -1 -1 2 3 7 10 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 7 63 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 59 A_1_ 1 -1 -1 0 59 -1 - 35 VPA 1 -1 -1 0 35 -1 - 29 DTACK 1 -1 -1 0 29 -1 - 13 nEXP_SPACE 1 -1 -1 0 13 -1 -141 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 79 RW_000 5 367 7 2 4 6 79 -1 5 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 70 RW 5 372 6 1 7 70 -1 2 0 21 - 40 BERR 5 -1 4 1 7 40 -1 1 0 21 - 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 - 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 0 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 0 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 0 1 0 6 -1 10 0 21 - 80 DSACK1 0 7 0 80 -1 4 0 21 - 82 BGACK_030 0 7 0 82 -1 3 0 21 - 68 A_0_ 5 364 6 0 68 -1 3 0 21 - 34 VMA 0 3 0 34 -1 3 0 21 - 65 E 0 -1 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 - 28 BG_000 0 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 -1 0 91 -1 1 0 21 - 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 69 SIZE_0_ 0 6 0 69 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 - 30 LDS_000 0 3 0 30 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 -1 0 2 -1 1 0 21 - 369 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 -1 5 0 3 4 6 7 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 - 319 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 - 318 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 - 366 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 365 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 363 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21 - 304 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21 - 367 RN_RW_000 3 79 7 1 7 79 -1 5 0 21 - 337 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 5 0 21 - 370 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 334 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 4 0 21 - 297 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21 - 371 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 364 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 - 321 SM_AMIGA_5_ 3 -1 -1 1 7 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 -1 1 3 -1 -1 3 0 21 - 293 cpu_est_3_ 3 -1 -1 1 3 -1 -1 3 0 21 - 372 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 368 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 - 360 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 - 294 cpu_est_0_ 3 -1 -1 1 3 -1 -1 2 0 21 - 338 CLK_000_N_SYNC_12_ 3 -1 -1 1 3 -1 -1 1 0 21 - 333 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 - 315 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 - 314 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 - 362 SM_AMIGA_i_7__0 3 -1 -1 0 -1 -1 15 0 21 - 356 inst_CLK_030_H 3 -1 -1 0 -1 -1 8 0 21 - 302 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 - 359 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 5 0 21 - 358 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 5 0 21 - 340 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21 - 306 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 -1 0 -1 -1 3 1 21 - 353 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 1 21 - 339 RST_DLY_0_ 3 -1 -1 0 -1 -1 3 0 21 - 295 N_208_i 3 -1 -1 0 -1 -1 3 0 21 - 341 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 - 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 - 354 inst_CLK_000_NE_D0 3 -1 -1 0 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_11_ 3 -1 -1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_10_ 3 -1 -1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_9_ 3 -1 -1 0 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_8_ 3 -1 -1 0 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_7_ 3 -1 -1 0 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_6_ 3 -1 -1 0 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_5_ 3 -1 -1 0 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_4_ 3 -1 -1 0 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_3_ 3 -1 -1 0 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_2_ 3 -1 -1 0 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_1_ 3 -1 -1 0 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_0_ 3 -1 -1 0 -1 -1 1 0 21 - 332 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 - 320 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 - 307 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 1 1 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 4 1 3 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 2 4 7 56 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 10 CLK_000 1 -1 -1 2 3 7 10 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 7 63 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 59 A_1_ 1 -1 -1 0 59 -1 - 35 VPA 1 -1 -1 0 35 -1 - 29 DTACK 1 -1 -1 0 29 -1 - 13 nEXP_SPACE 1 -1 -1 0 13 -1 -141 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 79 RW_000 5 367 7 3 2 4 6 79 -1 4 0 21 - 70 RW 5 372 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 - 68 A_0_ 5 363 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 366 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 365 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 364 1 0 6 -1 10 0 21 - 80 DSACK1 5 370 7 0 80 -1 4 0 21 - 82 BGACK_030 5 369 7 0 82 -1 3 0 21 - 34 VMA 5 371 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 368 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 369 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 300 inst_nEXP_SPACE_D0reg 3 -1 0 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 317 CLK_000_D_0_ 3 -1 4 6 0 2 3 4 5 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 5 1 3 4 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 11 0 21 - 354 SM_AMIGA_6_ 3 -1 2 3 1 2 5 -1 -1 4 0 21 - 296 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 356 SM_AMIGA_1_ 3 -1 0 3 0 5 7 -1 -1 3 0 21 - 319 SM_AMIGA_5_ 3 -1 5 3 1 5 7 -1 -1 3 0 21 - 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 - 293 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 - 353 inst_CLK_000_NE_D0 3 -1 5 3 0 3 5 -1 -1 1 0 21 - 337 CLK_000_N_SYNC_12_ 3 -1 0 3 0 3 5 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_0_ 3 -1 5 3 2 4 5 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 304 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 303 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 301 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 - 358 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 357 SM_AMIGA_3_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 336 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 352 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 4 0 21 - 371 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 333 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 311 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 305 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21 - 334 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 310 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 2 0 21 - 309 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 302 inst_BGACK_030_INT_D 3 -1 3 2 5 6 -1 -1 1 0 21 - 366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 365 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 364 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 355 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 370 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 367 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 339 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 306 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21 - 363 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 362 SM_AMIGA_i_7__0 3 -1 5 1 5 -1 -1 3 0 21 - 338 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 372 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 368 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 359 N_162_i 3 -1 0 1 5 -1 -1 2 0 21 - 340 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 351 CLK_000_N_SYNC_11_ 3 -1 1 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_10_ 3 -1 0 1 1 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_9_ 3 -1 6 1 0 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_8_ 3 -1 2 1 6 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_7_ 3 -1 0 1 2 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_6_ 3 -1 1 1 0 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_5_ 3 -1 3 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_4_ 3 -1 6 1 3 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_3_ 3 -1 5 1 6 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_2_ 3 -1 2 1 5 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_1_ 3 -1 4 1 2 -1 -1 1 0 21 - 332 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 - 331 CLK_000_D_9_ 3 -1 1 1 0 -1 -1 1 0 21 - 330 CLK_000_D_8_ 3 -1 2 1 1 -1 -1 1 0 21 - 329 CLK_000_D_7_ 3 -1 4 1 2 -1 -1 1 0 21 - 328 CLK_000_D_6_ 3 -1 3 1 4 -1 -1 1 0 21 - 327 CLK_000_D_5_ 3 -1 6 1 3 -1 -1 1 0 21 - 326 CLK_000_D_4_ 3 -1 6 1 6 -1 -1 1 0 21 - 325 CLK_000_D_3_ 3 -1 1 1 6 -1 -1 1 0 21 - 324 CLK_000_D_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 323 CLK_000_D_1_ 3 -1 4 1 5 -1 -1 1 0 21 - 322 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 321 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 320 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 2 1 0 -1 -1 1 0 21 - 314 CLK_000_D_11_ 3 -1 7 1 7 -1 -1 1 0 21 - 313 CLK_000_D_10_ 3 -1 0 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 10 CLK_000 1 -1 -1 6 0 2 3 4 5 7 10 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 - 63 CLK_030 1 -1 -1 2 2 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 0 1 5 7 40 -1 1 0 21 - 79 RW_000 5 363 7 3 2 4 6 79 -1 4 0 21 - 68 A_0_ 5 369 6 2 2 6 68 -1 3 0 21 - 70 RW 5 368 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 371 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 370 1 0 6 -1 10 0 21 - 80 DSACK1 5 366 7 0 80 -1 4 0 21 - 82 BGACK_030 5 365 7 0 82 -1 3 0 21 - 34 VMA 5 367 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 364 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 0 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 365 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 320 CLK_000_D_0_ 3 -1 3 6 0 1 2 3 5 7 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 4 5 0 3 4 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 0 3 5 7 -1 -1 15 0 21 - 355 SM_AMIGA_6_ 3 -1 5 4 0 2 5 6 -1 -1 3 0 21 - 338 CLK_000_N_SYNC_12_ 3 -1 6 4 0 1 3 5 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 4 0 1 2 6 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 308 SIZE_DMA_0_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 - 295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 293 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 1 3 1 5 7 -1 -1 2 0 21 - 321 SM_AMIGA_5_ 3 -1 0 3 0 5 7 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 305 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 304 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 0 2 0 5 -1 -1 7 0 21 - 337 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 359 SM_AMIGA_2_ 3 -1 5 2 1 5 -1 -1 4 0 21 - 367 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 334 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 306 CYCLE_DMA_0_ 3 -1 1 2 1 2 -1 -1 3 0 21 - 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 315 CLK_000_D_11_ 3 -1 5 2 0 7 -1 -1 1 0 21 - 314 CLK_000_D_10_ 3 -1 0 2 5 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 - 371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 8 0 21 - 356 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 366 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 363 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 340 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 307 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21 - 369 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 353 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 - 339 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 368 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 364 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 341 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 298 pos_clk_un23_clk_000_ne_d0_i_n 3 -1 5 1 5 -1 -1 2 0 21 - 354 inst_CLK_000_NE_D0 3 -1 5 1 5 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_11_ 3 -1 3 1 6 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_10_ 3 -1 2 1 3 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_9_ 3 -1 4 1 2 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_8_ 3 -1 1 1 4 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_7_ 3 -1 2 1 1 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_6_ 3 -1 5 1 2 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_5_ 3 -1 1 1 5 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_4_ 3 -1 6 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_3_ 3 -1 0 1 6 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_2_ 3 -1 3 1 0 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_1_ 3 -1 5 1 3 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_0_ 3 -1 7 1 5 -1 -1 1 0 21 - 333 CLK_000_D_12_ 3 -1 0 1 7 -1 -1 1 0 21 - 332 CLK_000_D_9_ 3 -1 0 1 0 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 6 1 0 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 1 1 6 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 4 1 1 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 1 1 4 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 6 1 1 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 0 1 6 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 0 1 0 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 319 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21 + 371 un1_bgack_030_int7_2_0 3 -1 7 1 7 -1 -1 2 0 21 + 367 N_208 3 -1 7 1 5 -1 -1 2 0 21 + 364 N_318_0 3 -1 2 1 2 -1 -1 2 0 21 + 359 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21 + 358 RST_DLY_2_ 3 -1 5 1 5 -1 -1 2 0 21 + 357 RST_DLY_1_ 3 -1 5 1 5 -1 -1 2 0 21 + 352 N_218_i 3 -1 5 1 5 -1 -1 2 0 21 + 351 N_246_i 3 -1 1 1 1 -1 -1 2 0 21 + 349 N_245_i 3 -1 0 1 1 -1 -1 2 0 21 + 324 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 316 N_171_i 3 -1 0 1 5 -1 -1 2 0 21 + 310 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 304 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21 + 303 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 302 pos_clk_un26_bgack_030_int_i_1_i_n 3 -1 0 1 2 -1 -1 2 0 21 + 300 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 370 N_345 3 -1 7 1 5 -1 -1 1 0 21 + 369 N_305 3 -1 7 1 5 -1 -1 1 0 21 + 368 N_209 3 -1 5 1 5 -1 -1 1 0 21 + 346 CLK_000_D_12_ 3 -1 3 1 2 -1 -1 1 0 21 + 345 CLK_000_D_9_ 3 -1 3 1 6 -1 -1 1 0 21 + 344 CLK_000_D_8_ 3 -1 5 1 3 -1 -1 1 0 21 + 343 CLK_000_D_7_ 3 -1 1 1 5 -1 -1 1 0 21 + 342 CLK_000_D_6_ 3 -1 0 1 1 -1 -1 1 0 21 + 341 CLK_000_D_5_ 3 -1 3 1 0 -1 -1 1 0 21 + 340 CLK_000_D_4_ 3 -1 2 1 3 -1 -1 1 0 21 + 339 CLK_000_D_3_ 3 -1 5 1 2 -1 -1 1 0 21 + 338 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 337 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 + 336 IPL_D0_1_ 3 -1 4 1 1 -1 -1 1 0 21 + 334 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 + 331 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 323 inst_VPA_D 3 -1 6 1 0 -1 -1 1 0 21 + 301 pos_clk_un3_as_030_d0_i_n 3 -1 6 1 2 -1 -1 1 0 21 + 298 N_152_0 3 -1 1 1 2 -1 -1 1 0 21 + 296 N_340_i 3 -1 6 1 0 -1 -1 1 0 21 + 293 N_225 3 -1 6 1 1 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 2 7 63 -1 - 59 A_1_ 1 -1 -1 2 1 2 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 -141 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 367 7 3 0 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 68 A_0_ 5 363 6 2 1 2 68 -1 3 0 21 - 70 RW 5 372 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 366 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 365 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 364 1 0 6 -1 10 0 21 - 80 DSACK1 5 370 7 0 80 -1 4 0 21 - 82 BGACK_030 5 369 7 0 82 -1 3 0 21 - 34 VMA 5 371 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 368 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 369 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 300 inst_nEXP_SPACE_D0reg 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 1 0 21 - 320 CLK_000_D_0_ 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 5 0 2 3 4 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 0 2 3 7 -1 -1 15 0 21 - 351 SM_AMIGA_6_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 - 301 inst_AS_030_000_SYNC 3 -1 0 3 0 1 2 -1 -1 7 0 21 - 296 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 352 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 308 SIZE_DMA_1_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 - 295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 293 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 336 CLK_000_N_SYNC_12_ 3 -1 1 3 1 3 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 335 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 338 RST_DLY_1_ 3 -1 1 2 1 3 -1 -1 4 0 21 - 371 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 353 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 337 RST_DLY_0_ 3 -1 3 2 1 3 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 2 0 21 - 355 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 2 0 21 - 339 RST_DLY_2_ 3 -1 3 2 1 3 -1 -1 2 0 21 - 333 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 310 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 334 CLK_000_N_SYNC_0_ 3 -1 0 2 1 2 -1 -1 1 0 21 - 315 CLK_000_D_11_ 3 -1 7 2 4 7 -1 -1 1 0 21 - 309 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21 - 302 inst_BGACK_030_INT_D 3 -1 7 2 0 6 -1 -1 1 0 21 - 366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 365 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 364 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 8 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 370 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 367 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 363 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 372 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 368 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 362 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 361 N_256 3 -1 3 1 5 -1 -1 1 0 21 - 354 inst_CLK_000_NE_D0 3 -1 5 1 5 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_11_ 3 -1 6 1 1 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_10_ 3 -1 5 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_9_ 3 -1 3 1 5 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_8_ 3 -1 1 1 3 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_7_ 3 -1 6 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_6_ 3 -1 6 1 6 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_5_ 3 -1 0 1 6 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_4_ 3 -1 4 1 0 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_3_ 3 -1 2 1 4 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_2_ 3 -1 4 1 2 -1 -1 1 0 21 - 340 CLK_000_N_SYNC_1_ 3 -1 1 1 4 -1 -1 1 0 21 - 332 CLK_000_D_12_ 3 -1 4 1 7 -1 -1 1 0 21 - 331 CLK_000_D_9_ 3 -1 6 1 6 -1 -1 1 0 21 - 330 CLK_000_D_8_ 3 -1 5 1 6 -1 -1 1 0 21 - 329 CLK_000_D_7_ 3 -1 5 1 5 -1 -1 1 0 21 - 328 CLK_000_D_6_ 3 -1 3 1 5 -1 -1 1 0 21 - 327 CLK_000_D_5_ 3 -1 6 1 3 -1 -1 1 0 21 - 326 CLK_000_D_4_ 3 -1 5 1 6 -1 -1 1 0 21 - 325 CLK_000_D_3_ 3 -1 2 1 5 -1 -1 1 0 21 - 324 CLK_000_D_2_ 3 -1 2 1 2 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 319 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21 - 314 CLK_000_D_10_ 3 -1 6 1 7 -1 -1 1 0 21 - 311 N_145_0 3 -1 1 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 6 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 6 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 6 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 6 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 6 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 6 7 56 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 63 CLK_030 1 -1 -1 2 1 2 63 -1 + 55 IPL_1_ 1 -1 -1 2 1 4 55 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 3 13 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 -141 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 367 7 3 0 4 6 79 -1 4 0 21 - 70 RW 5 372 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A_0_ 5 363 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 366 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 365 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 364 1 0 6 -1 10 0 21 - 80 DSACK1 5 370 7 0 80 -1 4 0 21 - 82 BGACK_030 5 369 7 0 82 -1 3 0 21 - 34 VMA 5 371 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 368 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 369 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 300 inst_nEXP_SPACE_D0reg 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 7 6 0 2 3 4 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 5 0 2 3 5 7 -1 -1 15 0 21 - 333 SM_AMIGA_6_ 3 -1 0 5 0 1 2 5 7 -1 -1 3 0 21 - 320 CLK_000_D_0_ 3 -1 2 5 0 2 3 5 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21 - 303 inst_AS_000_DMA 3 -1 6 3 0 6 7 -1 -1 7 0 21 - 296 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 293 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 337 CLK_000_N_SYNC_12_ 3 -1 2 3 3 5 6 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_0_ 3 -1 7 3 0 2 3 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 302 inst_BGACK_030_INT_D 3 -1 6 3 1 2 6 -1 -1 1 0 21 - 301 inst_AS_030_000_SYNC 3 -1 2 2 0 2 -1 -1 7 0 21 - 336 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 306 CYCLE_DMA_1_ 3 -1 0 2 0 6 -1 -1 4 0 21 - 371 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 305 CYCLE_DMA_0_ 3 -1 0 2 0 6 -1 -1 3 0 21 - 356 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 2 0 21 - 334 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 314 CLK_000_D_10_ 3 -1 6 2 0 7 -1 -1 1 0 21 - 309 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21 - 366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 365 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 364 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 8 0 21 - 355 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 370 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 367 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 339 RST_DLY_1_ 3 -1 6 1 6 -1 -1 4 0 21 - 363 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 357 SM_AMIGA_0_ 3 -1 5 1 5 -1 -1 3 0 21 - 352 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 - 338 RST_DLY_0_ 3 -1 6 1 6 -1 -1 3 0 21 - 372 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 368 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 362 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 354 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 2 0 21 - 340 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 361 N_245 3 -1 3 1 5 -1 -1 1 0 21 - 353 inst_CLK_000_NE_D0 3 -1 5 1 5 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_11_ 3 -1 5 1 2 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_10_ 3 -1 2 1 5 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_9_ 3 -1 2 1 2 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_8_ 3 -1 0 1 2 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_7_ 3 -1 2 1 0 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_6_ 3 -1 4 1 2 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_5_ 3 -1 6 1 4 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_4_ 3 -1 3 1 6 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_3_ 3 -1 0 1 3 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_2_ 3 -1 0 1 0 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_1_ 3 -1 3 1 0 -1 -1 1 0 21 - 332 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 - 331 CLK_000_D_9_ 3 -1 3 1 6 -1 -1 1 0 21 - 330 CLK_000_D_8_ 3 -1 2 1 3 -1 -1 1 0 21 - 329 CLK_000_D_7_ 3 -1 3 1 2 -1 -1 1 0 21 - 328 CLK_000_D_6_ 3 -1 1 1 3 -1 -1 1 0 21 - 327 CLK_000_D_5_ 3 -1 4 1 1 -1 -1 1 0 21 - 326 CLK_000_D_4_ 3 -1 3 1 4 -1 -1 1 0 21 - 325 CLK_000_D_3_ 3 -1 5 1 3 -1 -1 1 0 21 - 324 CLK_000_D_2_ 3 -1 4 1 5 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 319 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 - 315 CLK_000_D_11_ 3 -1 0 1 7 -1 -1 1 0 21 - 310 N_132_0 3 -1 2 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 63 CLK_030 1 -1 -1 3 0 6 7 63 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A_1_ 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 1 13 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 -141 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 79 RW_000 5 367 7 3 2 4 6 79 -1 4 0 21 - 70 RW 5 372 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 - 68 A_0_ 5 363 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 366 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 365 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 364 1 0 6 -1 10 0 21 - 80 DSACK1 5 370 7 0 80 -1 4 0 21 - 82 BGACK_030 5 369 7 0 82 -1 3 0 21 - 34 VMA 5 371 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 368 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 369 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 - 300 inst_nEXP_SPACE_D0reg 3 -1 0 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 316 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 317 CLK_000_D_0_ 3 -1 4 6 0 2 3 4 5 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 5 1 3 4 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 11 0 21 - 354 SM_AMIGA_6_ 3 -1 2 3 1 2 5 -1 -1 4 0 21 - 296 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 - 356 SM_AMIGA_1_ 3 -1 0 3 0 5 7 -1 -1 3 0 21 - 319 SM_AMIGA_5_ 3 -1 5 3 1 5 7 -1 -1 3 0 21 - 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 - 293 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 - 353 inst_CLK_000_NE_D0 3 -1 5 3 0 3 5 -1 -1 1 0 21 - 337 CLK_000_N_SYNC_12_ 3 -1 0 3 0 3 5 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_0_ 3 -1 5 3 2 4 5 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 0 3 1 6 7 -1 -1 1 0 21 - 304 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 303 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 301 inst_AS_030_000_SYNC 3 -1 5 2 2 5 -1 -1 7 0 21 - 358 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 357 SM_AMIGA_3_ 3 -1 0 2 0 5 -1 -1 5 0 21 - 336 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 352 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 4 0 21 - 371 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 - 333 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 311 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 305 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21 - 334 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 310 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 - 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 2 0 21 - 309 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 - 302 inst_BGACK_030_INT_D 3 -1 3 2 5 6 -1 -1 1 0 21 - 366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 365 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 364 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 355 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 370 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 367 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 339 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 306 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21 - 363 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 362 SM_AMIGA_i_7__0 3 -1 5 1 5 -1 -1 3 0 21 - 338 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 372 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 368 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 359 N_162_i 3 -1 0 1 5 -1 -1 2 0 21 - 340 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 351 CLK_000_N_SYNC_11_ 3 -1 1 1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_10_ 3 -1 0 1 1 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_9_ 3 -1 6 1 0 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_8_ 3 -1 2 1 6 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_7_ 3 -1 0 1 2 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_6_ 3 -1 1 1 0 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_5_ 3 -1 3 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_4_ 3 -1 6 1 3 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_3_ 3 -1 5 1 6 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_2_ 3 -1 2 1 5 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_1_ 3 -1 4 1 2 -1 -1 1 0 21 - 332 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 - 331 CLK_000_D_9_ 3 -1 1 1 0 -1 -1 1 0 21 - 330 CLK_000_D_8_ 3 -1 2 1 1 -1 -1 1 0 21 - 329 CLK_000_D_7_ 3 -1 4 1 2 -1 -1 1 0 21 - 328 CLK_000_D_6_ 3 -1 3 1 4 -1 -1 1 0 21 - 327 CLK_000_D_5_ 3 -1 6 1 3 -1 -1 1 0 21 - 326 CLK_000_D_4_ 3 -1 6 1 6 -1 -1 1 0 21 - 325 CLK_000_D_3_ 3 -1 1 1 6 -1 -1 1 0 21 - 324 CLK_000_D_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 323 CLK_000_D_1_ 3 -1 4 1 5 -1 -1 1 0 21 - 322 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 321 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 320 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 2 1 0 -1 -1 1 0 21 - 314 CLK_000_D_11_ 3 -1 7 1 7 -1 -1 1 0 21 - 313 CLK_000_D_10_ 3 -1 0 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 10 CLK_000 1 -1 -1 6 0 2 3 4 5 7 10 -1 - 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 - 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 - 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 - 63 CLK_030 1 -1 -1 2 2 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 0 1 5 7 40 -1 1 0 21 - 79 RW_000 5 363 7 3 2 4 6 79 -1 4 0 21 - 68 A_0_ 5 369 6 2 2 6 68 -1 3 0 21 - 70 RW 5 368 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 362 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 371 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 370 1 0 6 -1 10 0 21 - 80 DSACK1 5 366 7 0 80 -1 4 0 21 - 82 BGACK_030 5 365 7 0 82 -1 3 0 21 - 34 VMA 5 367 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 364 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 0 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 365 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 320 CLK_000_D_0_ 3 -1 3 6 0 1 2 3 5 7 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 4 5 0 3 4 5 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 0 3 5 7 -1 -1 15 0 21 - 355 SM_AMIGA_6_ 3 -1 5 4 0 2 5 6 -1 -1 3 0 21 - 338 CLK_000_N_SYNC_12_ 3 -1 6 4 0 1 3 5 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 4 0 1 2 6 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 308 SIZE_DMA_0_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 - 295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 293 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 1 3 1 5 7 -1 -1 2 0 21 - 321 SM_AMIGA_5_ 3 -1 0 3 0 5 7 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 305 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 304 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 0 2 0 5 -1 -1 7 0 21 - 337 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 359 SM_AMIGA_2_ 3 -1 5 2 1 5 -1 -1 4 0 21 - 367 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 334 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 306 CYCLE_DMA_0_ 3 -1 1 2 1 2 -1 -1 3 0 21 - 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 315 CLK_000_D_11_ 3 -1 5 2 0 7 -1 -1 1 0 21 - 314 CLK_000_D_10_ 3 -1 0 2 5 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 - 371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 8 0 21 - 356 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 366 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 363 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 340 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 307 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21 - 369 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 353 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 - 339 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 368 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 364 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 341 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 298 pos_clk_un23_clk_000_ne_d0_i_n 3 -1 5 1 5 -1 -1 2 0 21 - 354 inst_CLK_000_NE_D0 3 -1 5 1 5 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_11_ 3 -1 3 1 6 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_10_ 3 -1 2 1 3 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_9_ 3 -1 4 1 2 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_8_ 3 -1 1 1 4 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_7_ 3 -1 2 1 1 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_6_ 3 -1 5 1 2 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_5_ 3 -1 1 1 5 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_4_ 3 -1 6 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_3_ 3 -1 0 1 6 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_2_ 3 -1 3 1 0 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_1_ 3 -1 5 1 3 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_0_ 3 -1 7 1 5 -1 -1 1 0 21 - 333 CLK_000_D_12_ 3 -1 0 1 7 -1 -1 1 0 21 - 332 CLK_000_D_9_ 3 -1 0 1 0 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 6 1 0 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 1 1 6 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 4 1 1 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 1 1 4 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 6 1 1 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 0 1 6 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 0 1 0 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 319 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 2 7 63 -1 - 59 A_1_ 1 -1 -1 2 1 2 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 13 nEXP_SPACE 1 -1 -1 1 0 13 -1 - 10 CLK_000 1 -1 -1 1 3 10 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 5 1 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 366 7 3 0 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 68 A_0_ 5 362 6 2 0 5 68 -1 3 0 21 - 70 RW 5 371 6 2 2 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 365 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 364 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 363 1 0 6 -1 10 0 21 - 80 DSACK1 5 369 7 0 80 -1 4 0 21 - 82 BGACK_030 5 368 7 0 82 -1 3 0 21 - 34 VMA 5 370 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 367 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 368 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 2 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 301 inst_nEXP_SPACE_D0reg 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 1 0 21 - 320 CLK_000_D_0_ 3 -1 6 6 0 2 3 4 5 7 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 4 6 0 2 3 4 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 6 1 2 3 4 6 7 -1 -1 1 0 21 - 360 SM_AMIGA_i_7_ 3 -1 5 4 1 2 3 7 -1 -1 15 0 21 - 321 SM_AMIGA_5_ 3 -1 2 4 2 5 6 7 -1 -1 2 0 21 - 338 CLK_000_N_SYNC_12_ 3 -1 6 4 1 2 3 5 -1 -1 1 0 21 - 297 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 355 SM_AMIGA_6_ 3 -1 2 3 0 2 5 -1 -1 3 0 21 - 334 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 357 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 2 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 2 3 1 6 7 -1 -1 1 0 21 - 358 SM_AMIGA_3_ 3 -1 5 2 2 5 -1 -1 8 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 1 2 1 2 -1 -1 7 0 21 - 337 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 359 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 4 0 21 - 370 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 353 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 354 inst_CLK_000_NE_D0 3 -1 1 2 3 5 -1 -1 1 0 21 - 336 CLK_000_N_SYNC_0_ 3 -1 4 2 2 3 -1 -1 1 0 21 - 319 inst_CLK_OUT_PRE_50 3 -1 4 2 2 4 -1 -1 1 0 21 - 315 CLK_000_D_11_ 3 -1 7 2 6 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 2 1 6 -1 -1 1 0 21 - 365 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 356 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 369 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 366 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 340 RST_DLY_1_ 3 -1 2 1 2 -1 -1 4 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 362 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 339 RST_DLY_0_ 3 -1 2 1 2 -1 -1 3 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 293 N_199_i 3 -1 2 1 5 -1 -1 3 0 21 - 371 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 367 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 361 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 341 RST_DLY_2_ 3 -1 2 1 2 -1 -1 2 0 21 - 352 CLK_000_N_SYNC_11_ 3 -1 4 1 6 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_10_ 3 -1 0 1 4 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_9_ 3 -1 3 1 0 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_8_ 3 -1 0 1 3 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_7_ 3 -1 3 1 0 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_6_ 3 -1 0 1 3 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_5_ 3 -1 1 1 0 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_4_ 3 -1 6 1 1 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_3_ 3 -1 0 1 6 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_2_ 3 -1 0 1 0 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_1_ 3 -1 3 1 0 -1 -1 1 0 21 - 333 CLK_000_D_12_ 3 -1 6 1 7 -1 -1 1 0 21 - 332 CLK_000_D_9_ 3 -1 1 1 6 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 3 1 1 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 5 1 3 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 1 1 5 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 0 1 1 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 0 1 0 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 5 1 0 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 4 1 5 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 - 314 CLK_000_D_10_ 3 -1 6 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 1 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 1 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 1 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 1 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 1 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 1 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 13 nEXP_SPACE 1 -1 -1 2 1 6 13 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A_1_ 1 -1 -1 1 1 59 -1 - 35 VPA 1 -1 -1 1 3 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -139 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 362 7 3 0 4 6 79 -1 4 0 21 - 81 AS_030 5 -1 7 3 1 4 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 68 A_0_ 5 368 6 2 1 2 68 -1 3 0 21 - 70 RW 5 367 6 2 2 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 361 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 370 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 369 1 0 6 -1 10 0 21 - 80 DSACK1 5 365 7 0 80 -1 4 0 21 - 82 BGACK_030 5 364 7 0 82 -1 3 0 21 - 34 VMA 5 366 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 363 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 364 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 317 CLK_000_D_1_ 3 -1 2 6 0 2 3 5 6 7 -1 -1 1 0 21 - 319 CLK_000_D_0_ 3 -1 1 5 0 2 3 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 1 5 0 2 3 4 7 -1 -1 1 0 21 - 359 SM_AMIGA_i_7_ 3 -1 5 4 0 2 3 7 -1 -1 15 0 21 - 297 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 354 SM_AMIGA_6_ 3 -1 2 3 1 2 5 -1 -1 3 0 21 - 333 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 356 SM_AMIGA_1_ 3 -1 2 3 2 5 7 -1 -1 2 0 21 - 320 SM_AMIGA_5_ 3 -1 2 3 2 5 7 -1 -1 2 0 21 - 337 CLK_000_N_SYNC_12_ 3 -1 6 3 2 3 5 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 302 inst_BGACK_030_INT_D 3 -1 7 3 0 1 6 -1 -1 1 0 21 - 357 SM_AMIGA_3_ 3 -1 5 2 2 5 -1 -1 8 0 21 - 303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 301 inst_AS_030_000_SYNC 3 -1 0 2 0 2 -1 -1 7 0 21 - 336 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 5 0 21 - 358 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 4 0 21 - 366 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 352 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 311 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 334 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 310 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 2 0 21 - 353 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 309 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21 - 370 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 369 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 361 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 355 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 365 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 362 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 339 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 368 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 338 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 293 N_296_i 3 -1 2 1 5 -1 -1 3 0 21 - 367 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 363 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 360 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 340 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 351 CLK_000_N_SYNC_11_ 3 -1 5 1 6 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_10_ 3 -1 6 1 5 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_9_ 3 -1 2 1 6 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_8_ 3 -1 5 1 2 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_7_ 3 -1 3 1 5 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_6_ 3 -1 0 1 3 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_5_ 3 -1 6 1 0 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_4_ 3 -1 1 1 6 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_3_ 3 -1 6 1 1 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_2_ 3 -1 3 1 6 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_1_ 3 -1 2 1 3 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_0_ 3 -1 3 1 2 -1 -1 1 0 21 - 332 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 - 331 CLK_000_D_9_ 3 -1 6 1 5 -1 -1 1 0 21 - 330 CLK_000_D_8_ 3 -1 6 1 6 -1 -1 1 0 21 - 329 CLK_000_D_7_ 3 -1 0 1 6 -1 -1 1 0 21 - 328 CLK_000_D_6_ 3 -1 4 1 0 -1 -1 1 0 21 - 327 CLK_000_D_5_ 3 -1 6 1 4 -1 -1 1 0 21 - 326 CLK_000_D_4_ 3 -1 4 1 6 -1 -1 1 0 21 - 325 CLK_000_D_3_ 3 -1 4 1 4 -1 -1 1 0 21 - 324 CLK_000_D_2_ 3 -1 6 1 4 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21 - 314 CLK_000_D_11_ 3 -1 7 1 7 -1 -1 1 0 21 - 313 CLK_000_D_10_ 3 -1 5 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 - 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A_1_ 1 -1 -1 1 1 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 0 35 -1 29 DTACK 1 -1 -1 1 6 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 10 CLK_000 1 -1 -1 1 1 10 -1 -139 "number of signals after reading design file" +151 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" + 40 BERR 5 -1 4 7 0 1 2 3 5 6 7 40 -1 1 0 21 + 79 RW_000 5 377 7 3 2 4 6 79 -1 3 0 21 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 79 RW_000 5 365 7 2 4 6 79 -1 8 0 21 + 70 RW 5 382 6 2 5 7 70 -1 2 0 21 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 70 RW 5 370 6 1 7 70 -1 2 0 21 - 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 68 A_0_ 5 373 6 1 3 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 - 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 0 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 0 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 0 1 0 6 -1 10 0 21 - 80 DSACK1 0 7 0 80 -1 4 0 21 - 82 BGACK_030 0 7 0 82 -1 3 0 21 - 68 A_0_ 5 361 6 0 68 -1 3 0 21 - 34 VMA 0 3 0 34 -1 3 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 379 7 0 82 -1 3 0 21 + 34 VMA 5 381 3 0 34 -1 3 0 21 + 28 BG_000 5 378 3 0 28 -1 3 0 21 + 8 IPL_030_2_ 5 376 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 375 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 374 1 0 6 -1 3 0 21 + 80 DSACK1 5 380 7 0 80 -1 2 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 0 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 -1 0 91 -1 1 0 21 - 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 77 FPU_CS 0 7 0 77 -1 1 0 21 - 69 SIZE_0_ 0 6 0 69 -1 1 0 21 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 - 30 LDS_000 0 3 0 30 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 -1 0 2 -1 1 0 21 - 367 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 - 359 SM_AMIGA_i_7_ 3 -1 -1 2 3 7 -1 -1 15 0 21 - 294 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 4 0 21 - 297 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 -1 2 3 6 -1 -1 3 0 21 - 320 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 - 364 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 363 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 304 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 8 0 21 - 303 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21 - 336 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 5 0 21 - 368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 369 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 361 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 333 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 - 311 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 - 308 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 - 307 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 - 370 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 366 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 360 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 - 356 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 2 0 21 - 334 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 1 3 -1 -1 2 0 21 - 321 SM_AMIGA_5_ 3 -1 -1 1 7 -1 -1 2 0 21 - 310 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 -1 1 3 -1 -1 2 0 21 - 337 CLK_000_N_SYNC_12_ 3 -1 -1 1 3 -1 -1 1 0 21 - 332 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 - 326 CLK_000_D_4_ 3 -1 -1 1 7 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 - 315 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 - 314 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 - 313 CLK_000_D_3_ 3 -1 -1 1 7 -1 -1 1 0 21 - 309 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 - 302 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 - 357 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 8 0 21 - 355 inst_CLK_030_H 3 -1 -1 0 -1 -1 8 0 21 - 301 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 - 358 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 - 339 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21 - 306 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 - 354 SM_AMIGA_6_ 3 -1 -1 0 -1 -1 3 0 21 - 352 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 - 338 RST_DLY_0_ 3 -1 -1 0 -1 -1 3 0 21 - 305 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 - 293 N_194_i 3 -1 -1 0 -1 -1 3 0 21 - 340 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 - 353 inst_CLK_000_NE_D0 3 -1 -1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_11_ 3 -1 -1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_10_ 3 -1 -1 0 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_9_ 3 -1 -1 0 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_8_ 3 -1 -1 0 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_7_ 3 -1 -1 0 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_6_ 3 -1 -1 0 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_5_ 3 -1 -1 0 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_4_ 3 -1 -1 0 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_3_ 3 -1 -1 0 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_2_ 3 -1 -1 0 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_1_ 3 -1 -1 0 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_0_ 3 -1 -1 0 -1 -1 1 0 21 - 331 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 - 330 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 - 329 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 - 328 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 - 327 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 - 319 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 332 inst_RESET_OUT 3 -1 5 8 0 1 2 3 4 5 6 7 -1 -1 2 0 21 + 379 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 333 CLK_000_D_0_ 3 -1 1 5 0 3 5 6 7 -1 -1 1 0 21 + 328 CLK_000_D_1_ 3 -1 0 5 0 3 5 6 7 -1 -1 1 0 21 + 311 inst_AS_030_D0 3 -1 7 5 1 2 3 4 6 -1 -1 1 0 21 + 365 SM_AMIGA_i_7_ 3 -1 5 4 1 2 5 7 -1 -1 3 0 21 + 353 SM_AMIGA_6_ 3 -1 5 4 0 3 5 7 -1 -1 3 0 21 + 361 SM_AMIGA_5_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 + 354 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 312 inst_AS_030_000_SYNC 3 -1 1 3 1 3 5 -1 -1 3 0 21 + 307 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 + 306 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 + 305 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 + 308 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 2 0 21 + 313 inst_BGACK_030_INT_D 3 -1 4 3 1 2 6 -1 -1 1 0 21 + 295 N_145_i 3 -1 7 3 0 3 7 -1 -1 1 0 21 + 363 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 360 SM_AMIGA_1_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 355 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 322 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 321 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 315 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 3 0 21 + 348 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21 + 347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 314 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 2 0 21 + 309 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21 + 335 IPL_D0_0_ 3 -1 0 2 0 1 -1 -1 1 0 21 + 330 CLK_000_D_11_ 3 -1 7 2 2 3 -1 -1 1 0 21 + 329 CLK_000_D_10_ 3 -1 6 2 2 7 -1 -1 1 0 21 + 327 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21 + 325 N_144_i 3 -1 3 2 5 6 -1 -1 1 0 21 + 381 RN_VMA 3 34 3 1 0 34 -1 3 0 21 + 378 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 377 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 376 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 375 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 374 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 373 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 366 N_204 3 -1 0 1 5 -1 -1 3 0 21 + 362 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 3 0 21 + 356 RST_DLY_0_ 3 -1 5 1 5 -1 -1 3 0 21 + 350 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 326 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 + 320 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 319 dsack1_int_0_un1_n 3 -1 2 1 7 -1 -1 3 0 21 + 318 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 + 317 dsack1_int_0_un3_n 3 -1 2 1 7 -1 -1 3 0 21 + 299 N_153_0 3 -1 5 1 2 -1 -1 3 0 21 + 297 cpu_est_0_2__un0_n 3 -1 0 1 6 -1 -1 3 0 21 + 294 vma_int_0_un0_n 3 -1 0 1 3 -1 -1 3 0 21 + 382 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 380 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 372 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 371 un1_bgack_030_int7_2_0 3 -1 7 1 7 -1 -1 2 0 21 + 367 N_208 3 -1 7 1 5 -1 -1 2 0 21 + 364 N_318_0 3 -1 2 1 2 -1 -1 2 0 21 + 359 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21 + 358 RST_DLY_2_ 3 -1 5 1 5 -1 -1 2 0 21 + 357 RST_DLY_1_ 3 -1 5 1 5 -1 -1 2 0 21 + 352 N_218_i 3 -1 5 1 5 -1 -1 2 0 21 + 351 N_246_i 3 -1 1 1 1 -1 -1 2 0 21 + 349 N_245_i 3 -1 0 1 1 -1 -1 2 0 21 + 324 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 316 N_171_i 3 -1 0 1 5 -1 -1 2 0 21 + 310 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 304 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21 + 303 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 302 pos_clk_un26_bgack_030_int_i_1_i_n 3 -1 0 1 2 -1 -1 2 0 21 + 300 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 370 N_345 3 -1 7 1 5 -1 -1 1 0 21 + 369 N_305 3 -1 7 1 5 -1 -1 1 0 21 + 368 N_209 3 -1 5 1 5 -1 -1 1 0 21 + 346 CLK_000_D_12_ 3 -1 3 1 2 -1 -1 1 0 21 + 345 CLK_000_D_9_ 3 -1 3 1 6 -1 -1 1 0 21 + 344 CLK_000_D_8_ 3 -1 5 1 3 -1 -1 1 0 21 + 343 CLK_000_D_7_ 3 -1 1 1 5 -1 -1 1 0 21 + 342 CLK_000_D_6_ 3 -1 0 1 1 -1 -1 1 0 21 + 341 CLK_000_D_5_ 3 -1 3 1 0 -1 -1 1 0 21 + 340 CLK_000_D_4_ 3 -1 2 1 3 -1 -1 1 0 21 + 339 CLK_000_D_3_ 3 -1 5 1 2 -1 -1 1 0 21 + 338 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 337 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 + 336 IPL_D0_1_ 3 -1 4 1 1 -1 -1 1 0 21 + 334 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 + 331 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 323 inst_VPA_D 3 -1 6 1 0 -1 -1 1 0 21 + 301 pos_clk_un3_as_030_d0_i_n 3 -1 6 1 2 -1 -1 1 0 21 + 298 N_152_0 3 -1 1 1 2 -1 -1 1 0 21 + 296 N_340_i 3 -1 6 1 0 -1 -1 1 0 21 + 293 N_225 3 -1 6 1 1 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 - 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 6 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 6 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 6 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 6 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 6 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 6 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 + 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 + 63 CLK_030 1 -1 -1 2 1 2 63 -1 + 55 IPL_1_ 1 -1 -1 2 1 4 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +145 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 4 5 6 40 -1 1 0 21 + 79 RW_000 5 371 7 3 2 4 6 79 -1 4 0 21 + 68 A_0_ 5 367 6 2 1 2 68 -1 3 0 21 + 70 RW 5 376 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 28 BG_000 5 372 3 0 28 -1 4 0 21 + 8 IPL_030_2_ 5 370 1 0 8 -1 4 0 21 + 7 IPL_030_0_ 5 369 1 0 7 -1 4 0 21 + 34 VMA 5 375 3 0 34 -1 3 0 21 + 80 DSACK1 5 374 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 6 IPL_030_1_ 5 368 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 82 BGACK_030 5 373 7 0 82 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 328 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 373 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 1 0 21 + 329 CLK_000_D_0_ 3 -1 3 6 0 1 2 3 5 7 -1 -1 1 0 21 + 324 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 + 347 SM_AMIGA_6_ 3 -1 0 5 0 1 2 5 7 -1 -1 3 0 21 + 358 SM_AMIGA_i_7_ 3 -1 0 4 0 5 6 7 -1 -1 4 0 21 + 307 inst_AS_030_D0 3 -1 4 4 3 4 5 6 -1 -1 1 0 21 + 304 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 + 303 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 301 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 348 SM_AMIGA_0_ 3 -1 0 3 0 5 7 -1 -1 3 0 21 + 308 inst_AS_030_000_SYNC 3 -1 6 3 0 3 6 -1 -1 3 0 21 + 357 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 4 0 21 + 356 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 4 0 21 + 351 RST_DLY_1_ 3 -1 5 2 1 5 -1 -1 4 0 21 + 350 RST_DLY_0_ 3 -1 5 2 1 5 -1 -1 4 0 21 + 344 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 4 0 21 + 312 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 4 0 21 + 375 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 355 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 354 SM_AMIGA_1_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 349 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 322 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 318 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 317 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 314 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 302 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 + 352 RST_DLY_2_ 3 -1 1 2 1 5 -1 -1 2 0 21 + 343 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 311 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 2 0 21 + 305 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 334 CLK_000_D_2_ 3 -1 7 2 0 6 -1 -1 1 0 21 + 333 IPL_D0_2_ 3 -1 6 2 1 3 -1 -1 1 0 21 + 331 IPL_D0_0_ 3 -1 6 2 1 3 -1 -1 1 0 21 + 323 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21 + 319 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21 + 309 inst_BGACK_030_INT_D 3 -1 4 2 2 6 -1 -1 1 0 21 + 372 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 371 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 370 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21 + 369 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21 + 345 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 4 0 21 + 316 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21 + 315 dsack1_int_0_un1_n 3 -1 6 1 7 -1 -1 4 0 21 + 313 dsack1_int_0_un3_n 3 -1 6 1 7 -1 -1 4 0 21 + 300 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 4 0 21 + 299 ipl_030_0_1__un1_n 3 -1 3 1 1 -1 -1 4 0 21 + 298 ipl_030_0_1__un3_n 3 -1 1 1 1 -1 -1 4 0 21 + 297 pos_clk_un26_bgack_030_int_i_1_i_n 3 -1 2 1 2 -1 -1 4 0 21 + 296 ipl_030_0_0__un3_n 3 -1 1 1 1 -1 -1 4 0 21 + 295 N_11 3 -1 7 1 7 -1 -1 4 0 21 + 367 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 294 vma_int_0_un0_n 3 -1 3 1 3 -1 -1 3 0 21 + 376 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 374 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 368 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 366 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 360 N_208 3 -1 0 1 0 -1 -1 2 0 21 + 359 N_207 3 -1 5 1 0 -1 -1 2 0 21 + 353 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21 + 346 N_246_i 3 -1 3 1 1 -1 -1 2 0 21 + 306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 365 N_345 3 -1 5 1 0 -1 -1 1 0 21 + 364 N_344 3 -1 7 1 0 -1 -1 1 0 21 + 363 N_309 3 -1 5 1 0 -1 -1 1 0 21 + 362 N_305 3 -1 4 1 0 -1 -1 1 0 21 + 361 N_209 3 -1 0 1 0 -1 -1 1 0 21 + 342 CLK_000_D_12_ 3 -1 6 1 6 -1 -1 1 0 21 + 341 CLK_000_D_9_ 3 -1 2 1 2 -1 -1 1 0 21 + 340 CLK_000_D_8_ 3 -1 1 1 2 -1 -1 1 0 21 + 339 CLK_000_D_7_ 3 -1 1 1 1 -1 -1 1 0 21 + 338 CLK_000_D_6_ 3 -1 5 1 1 -1 -1 1 0 21 + 337 CLK_000_D_5_ 3 -1 7 1 5 -1 -1 1 0 21 + 336 CLK_000_D_4_ 3 -1 3 1 7 -1 -1 1 0 21 + 335 CLK_000_D_3_ 3 -1 6 1 3 -1 -1 1 0 21 + 332 IPL_D0_1_ 3 -1 3 1 3 -1 -1 1 0 21 + 330 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 + 327 inst_DTACK_D0 3 -1 5 1 5 -1 -1 1 0 21 + 326 CLK_000_D_11_ 3 -1 6 1 6 -1 -1 1 0 21 + 325 CLK_000_D_10_ 3 -1 2 1 6 -1 -1 1 0 21 + 321 N_144_i 3 -1 7 1 5 -1 -1 1 0 21 + 310 N_346_i 3 -1 3 1 5 -1 -1 1 0 21 + 293 N_225 3 -1 4 1 6 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 67 IPL_2_ 1 -1 -1 3 1 3 6 67 -1 + 66 IPL_0_ 1 -1 -1 3 1 3 6 66 -1 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 63 CLK_030 1 -1 -1 2 2 6 63 -1 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 57 FC_1_ 1 -1 -1 2 4 7 57 -1 56 FC_0_ 1 -1 -1 2 4 7 56 -1 @@ -12081,25 +2592,22 @@ 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 7 63 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 55 IPL_1_ 1 -1 -1 1 3 55 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 5 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 - 59 A_1_ 1 -1 -1 0 59 -1 - 35 VPA 1 -1 -1 0 35 -1 - 29 DTACK 1 -1 -1 0 29 -1 - 10 CLK_000 1 -1 -1 0 10 -1 -139 "number of signals after reading design file" + 10 CLK_000 1 -1 -1 1 3 10 -1 +125 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 79 RW_000 5 365 7 2 4 6 79 -1 5 0 21 + 79 RW_000 5 351 7 2 4 6 79 -1 4 0 21 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 70 RW 5 370 6 1 7 70 -1 2 0 21 + 70 RW 5 356 6 1 7 70 -1 2 0 21 40 BERR 5 -1 4 1 7 40 -1 1 0 21 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 @@ -12113,14 +2621,14 @@ 8 IPL_030_2_ 0 1 0 8 -1 10 0 21 7 IPL_030_0_ 0 1 0 7 -1 10 0 21 6 IPL_030_1_ 0 1 0 6 -1 10 0 21 + 82 BGACK_030 0 7 0 82 -1 5 0 21 80 DSACK1 0 7 0 80 -1 4 0 21 - 82 BGACK_030 0 7 0 82 -1 3 0 21 - 68 A_0_ 5 361 6 0 68 -1 3 0 21 + 28 BG_000 0 3 0 28 -1 4 0 21 + 68 A_0_ 5 347 6 0 68 -1 3 0 21 34 VMA 0 3 0 34 -1 3 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 0 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 -1 0 91 -1 1 0 21 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 @@ -12133,228 +2641,68 @@ 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 2 RESET 0 -1 0 2 -1 1 0 21 - 367 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 - 359 SM_AMIGA_i_7_ 3 -1 -1 2 3 7 -1 -1 15 0 21 - 293 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 4 0 21 - 296 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 -1 2 3 6 -1 -1 3 0 21 - 320 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 - 364 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 363 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 304 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21 - 303 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21 - 365 RN_RW_000 3 79 7 1 7 79 -1 5 0 21 - 336 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 5 0 21 - 368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 369 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 361 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 333 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 - 311 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 - 308 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 - 307 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 - 370 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 366 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 360 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 - 356 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 2 0 21 - 334 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 1 3 -1 -1 2 0 21 - 321 SM_AMIGA_5_ 3 -1 -1 1 7 -1 -1 2 0 21 - 310 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 -1 1 3 -1 -1 2 0 21 - 337 CLK_000_N_SYNC_12_ 3 -1 -1 1 3 -1 -1 1 0 21 - 332 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 - 326 CLK_000_D_4_ 3 -1 -1 1 7 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 - 315 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 - 314 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 - 313 CLK_000_D_3_ 3 -1 -1 1 7 -1 -1 1 0 21 - 309 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 - 302 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 - 357 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 8 0 21 - 355 inst_CLK_030_H 3 -1 -1 0 -1 -1 8 0 21 - 301 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 - 358 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 - 339 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21 - 306 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 - 354 SM_AMIGA_6_ 3 -1 -1 0 -1 -1 3 0 21 - 352 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 - 338 RST_DLY_0_ 3 -1 -1 0 -1 -1 3 0 21 - 305 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 - 340 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 - 300 N_140_i 3 -1 -1 0 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 - 353 inst_CLK_000_NE_D0 3 -1 -1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_11_ 3 -1 -1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_10_ 3 -1 -1 0 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_9_ 3 -1 -1 0 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_8_ 3 -1 -1 0 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_7_ 3 -1 -1 0 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_6_ 3 -1 -1 0 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_5_ 3 -1 -1 0 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_4_ 3 -1 -1 0 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_3_ 3 -1 -1 0 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_2_ 3 -1 -1 0 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_1_ 3 -1 -1 0 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_0_ 3 -1 -1 0 -1 -1 1 0 21 - 331 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 - 330 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 - 329 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 - 328 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 - 327 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 - 319 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 - 85 RST 1 -1 -1 4 1 3 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 2 4 7 56 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 63 CLK_030 1 -1 -1 1 7 63 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 59 A_1_ 1 -1 -1 0 59 -1 - 35 VPA 1 -1 -1 0 35 -1 - 29 DTACK 1 -1 -1 0 29 -1 - 10 CLK_000 1 -1 -1 0 10 -1 -140 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 79 RW_000 5 363 7 2 4 6 79 -1 4 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 70 RW 5 368 6 1 7 70 -1 2 0 21 - 40 BERR 5 -1 4 1 7 40 -1 1 0 21 - 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 - 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 0 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 0 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 0 1 0 6 -1 10 0 21 - 80 DSACK1 0 7 0 80 -1 4 0 21 - 82 BGACK_030 0 7 0 82 -1 3 0 21 - 68 A_0_ 5 369 6 0 68 -1 3 0 21 - 34 VMA 0 3 0 34 -1 3 0 21 - 65 E 0 -1 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 - 28 BG_000 0 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 -1 0 91 -1 1 0 21 - 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 69 SIZE_0_ 0 6 0 69 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 - 30 LDS_000 0 3 0 30 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 -1 0 2 -1 1 0 21 - 365 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 + 353 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 5 0 21 316 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 - 319 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 - 317 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 - 359 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 14 0 21 - 371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 304 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21 - 303 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21 - 336 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 5 0 21 - 366 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 363 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 297 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21 - 369 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 367 RN_VMA 3 34 3 1 3 34 -1 3 0 21 - 333 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 - 311 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 - 308 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 - 307 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 -1 1 3 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 -1 1 3 -1 -1 3 0 21 - 368 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 364 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 360 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 - 356 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 2 0 21 - 320 SM_AMIGA_5_ 3 -1 -1 1 7 -1 -1 2 0 21 - 310 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 -1 1 3 -1 -1 2 0 21 - 337 CLK_000_N_SYNC_12_ 3 -1 -1 1 3 -1 -1 1 0 21 - 332 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 - 325 CLK_000_D_3_ 3 -1 -1 1 7 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 295 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 -1 2 3 6 -1 -1 4 0 21 + 317 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 312 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 1 1 21 + 345 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 13 1 21 + 350 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 348 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21 + 300 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 7 0 21 + 354 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 352 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 351 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 333 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21 + 332 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 355 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 347 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 341 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 335 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 334 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 307 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 306 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 356 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 346 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 1 3 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 330 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 321 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 320 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21 + 319 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 314 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 313 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 - 309 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 - 302 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 - 357 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 8 0 21 - 355 inst_CLK_030_H 3 -1 -1 0 -1 -1 8 0 21 - 301 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 - 358 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 - 339 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21 - 306 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 - 361 SM_AMIGA_i_7__0 3 -1 -1 0 -1 -1 3 0 21 - 354 SM_AMIGA_6_ 3 -1 -1 0 -1 -1 3 0 21 - 352 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 - 338 RST_DLY_0_ 3 -1 -1 0 -1 -1 3 0 21 - 305 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 - 340 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 - 334 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 - 293 N_151 3 -1 -1 0 -1 -1 2 0 21 - 353 inst_CLK_000_NE_D0 3 -1 -1 0 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_11_ 3 -1 -1 0 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_10_ 3 -1 -1 0 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_9_ 3 -1 -1 0 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_8_ 3 -1 -1 0 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_7_ 3 -1 -1 0 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_6_ 3 -1 -1 0 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_5_ 3 -1 -1 0 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_4_ 3 -1 -1 0 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_3_ 3 -1 -1 0 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_2_ 3 -1 -1 0 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_1_ 3 -1 -1 0 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_0_ 3 -1 -1 0 -1 -1 1 0 21 - 331 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 - 330 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 - 329 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 - 328 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 - 327 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 - 326 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 - 324 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 340 inst_CLK_030_H 3 -1 -1 0 -1 -1 8 0 21 + 344 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 343 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 1 21 + 337 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 342 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 336 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 339 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 338 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 329 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 328 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 327 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 326 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 325 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 324 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 323 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 322 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 318 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 315 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 @@ -12381,22 +2729,705 @@ 35 VPA 1 -1 -1 0 35 -1 29 DTACK 1 -1 -1 0 29 -1 10 CLK_000 1 -1 -1 0 10 -1 -140 "number of signals after reading design file" +125 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 364 7 3 0 4 6 79 -1 4 0 21 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 369 6 2 0 7 70 -1 2 0 21 + 79 RW_000 5 351 7 2 4 6 79 -1 4 0 21 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A_0_ 5 370 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 + 70 RW 5 356 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 10 0 21 + 82 BGACK_030 0 7 0 82 -1 5 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 28 BG_000 0 3 0 28 -1 4 0 21 + 68 A_0_ 5 347 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 353 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 5 0 21 + 316 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 295 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 -1 2 3 6 -1 -1 4 0 21 + 317 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 312 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 1 1 21 + 345 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 13 1 21 + 350 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 348 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21 + 300 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 7 0 21 + 354 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 352 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 351 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 333 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21 + 332 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 355 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 347 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 341 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 335 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 334 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 307 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 306 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 356 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 346 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 1 3 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 330 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 321 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 320 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21 + 319 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 + 314 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 313 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 340 inst_CLK_030_H 3 -1 -1 0 -1 -1 8 0 21 + 344 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 343 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 1 21 + 337 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 342 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 336 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 339 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 338 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 329 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 328 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 327 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 326 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 325 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 324 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 323 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 322 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 318 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 315 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +129 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 355 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 360 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 10 0 21 + 82 BGACK_030 0 7 0 82 -1 5 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 28 BG_000 0 3 0 28 -1 4 0 21 + 68 A_0_ 5 351 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 357 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 5 0 21 + 318 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 313 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 319 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 314 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 354 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 347 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21 + 358 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 356 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 355 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 335 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21 + 334 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 295 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21 + 359 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 343 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 337 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 336 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 312 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 308 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 307 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 360 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 350 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 310 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 332 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 323 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 322 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21 + 321 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 + 316 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 315 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 309 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21 + 342 inst_CLK_030_H 3 -1 -1 0 -1 -1 8 0 21 + 300 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 + 346 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 345 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 1 21 + 339 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 306 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 344 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 338 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 305 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 341 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 340 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21 + 333 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 304 N_171_i 3 -1 -1 0 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 349 N_344 3 -1 -1 0 -1 -1 1 0 21 + 348 N_209 3 -1 -1 0 -1 -1 1 0 21 + 331 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 330 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 329 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 328 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 327 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 326 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 325 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 324 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 320 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 317 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 311 N_144_i 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +132 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 358 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 363 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 82 BGACK_030 0 7 0 82 -1 5 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 28 BG_000 0 3 0 28 -1 4 0 21 + 68 A_0_ 5 354 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 360 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 5 0 21 + 320 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 315 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 301 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 321 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 316 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 350 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 7 0 21 + 304 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21 + 336 pos_clk_ipl_n 3 -1 -1 1 1 -1 -1 6 0 21 + 361 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 359 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 358 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 338 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21 + 337 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 305 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 297 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 295 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21 + 362 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 354 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 346 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 340 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 339 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 314 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 310 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 309 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 296 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 363 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 357 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 353 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 312 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 299 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 334 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 318 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 317 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 311 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 303 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 298 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21 + 302 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 + 349 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 348 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21 + 342 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 308 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 294 pos_clk_un26_bgack_030_int_i_1_i_n 3 -1 -1 0 -1 -1 4 0 21 + 347 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 341 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 307 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 351 N_208 3 -1 -1 0 -1 -1 2 0 21 + 345 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 344 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 343 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21 + 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 306 N_171_i 3 -1 -1 0 -1 -1 2 0 21 + 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 352 N_209 3 -1 -1 0 -1 -1 1 0 21 + 333 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 332 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 331 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 330 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 329 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 328 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 327 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 326 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 325 IPL_D0_2_ 3 -1 -1 0 -1 -1 1 0 21 + 324 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21 + 323 IPL_D0_0_ 3 -1 -1 0 -1 -1 1 0 21 + 322 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 319 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 313 N_144_i 3 -1 -1 0 -1 -1 1 0 21 + 293 N_145_i 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +132 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 358 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 363 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 82 BGACK_030 0 7 0 82 -1 5 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 28 BG_000 0 3 0 28 -1 4 0 21 + 68 A_0_ 5 354 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 360 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 5 0 21 + 320 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 315 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 301 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 321 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 316 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 350 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 7 0 21 + 304 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21 + 336 pos_clk_ipl_n 3 -1 -1 1 1 -1 -1 6 0 21 + 361 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 359 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 358 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 338 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21 + 337 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 305 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 297 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 295 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21 + 362 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 354 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 346 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 340 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 339 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 314 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 310 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 309 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 296 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 363 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 357 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 353 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 312 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 299 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 334 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 318 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 317 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 311 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 303 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 298 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21 + 302 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 7 0 21 + 349 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 348 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21 + 342 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 308 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 294 pos_clk_un26_bgack_030_int_i_1_i_n 3 -1 -1 0 -1 -1 4 0 21 + 347 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 341 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 307 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 351 N_208 3 -1 -1 0 -1 -1 2 0 21 + 345 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 344 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 343 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21 + 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 306 N_171_i 3 -1 -1 0 -1 -1 2 0 21 + 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 352 N_209 3 -1 -1 0 -1 -1 1 0 21 + 333 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 332 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 331 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 330 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 329 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 328 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 327 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 326 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 325 IPL_D0_2_ 3 -1 -1 0 -1 -1 1 0 21 + 324 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21 + 323 IPL_D0_0_ 3 -1 -1 0 -1 -1 1 0 21 + 322 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 319 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 313 N_144_i 3 -1 -1 0 -1 -1 1 0 21 + 293 N_145_i 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +135 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 361 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 366 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 82 BGACK_030 0 7 0 82 -1 5 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 28 BG_000 0 3 0 28 -1 4 0 21 + 68 A_0_ 5 357 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 363 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 5 0 21 + 320 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 315 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 302 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 321 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 316 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 350 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 6 0 21 + 336 pos_clk_ipl_n 3 -1 -1 1 1 -1 -1 6 0 21 + 364 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 362 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 361 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 338 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21 + 337 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 306 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 298 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 296 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21 + 357 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 346 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 340 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 339 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 314 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 311 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 310 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 297 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 294 vma_int_0_un0_n 3 -1 -1 1 3 -1 -1 3 0 21 + 366 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 360 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 359 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 358 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 356 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 313 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 305 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21 + 300 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 334 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 318 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 317 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 304 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 299 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21 + 349 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 348 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21 + 342 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 309 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 295 pos_clk_un26_bgack_030_int_i_1_i_n 3 -1 -1 0 -1 -1 4 0 21 + 365 RN_VMA 3 34 3 0 34 -1 3 0 21 + 347 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 341 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 308 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 303 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 3 0 21 + 351 N_208 3 -1 -1 0 -1 -1 2 0 21 + 345 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 344 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 343 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21 + 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 307 N_171_i 3 -1 -1 0 -1 -1 2 0 21 + 301 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 355 N_345 3 -1 -1 0 -1 -1 1 0 21 + 354 N_344 3 -1 -1 0 -1 -1 1 0 21 + 353 N_305 3 -1 -1 0 -1 -1 1 0 21 + 352 N_209 3 -1 -1 0 -1 -1 1 0 21 + 333 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 332 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 331 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 330 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 329 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 328 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 327 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 326 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 325 IPL_D0_2_ 3 -1 -1 0 -1 -1 1 0 21 + 324 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21 + 323 IPL_D0_0_ 3 -1 -1 0 -1 -1 1 0 21 + 322 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 319 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 312 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21 + 293 N_225 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +141 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21 + 79 RW_000 5 367 7 3 1 4 6 79 -1 4 0 21 + 40 BERR 5 -1 4 3 0 2 5 40 -1 1 0 21 + 68 A_0_ 5 363 6 2 2 6 68 -1 3 0 21 + 70 RW 5 372 6 2 2 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 @@ -12405,16 +3436,16 @@ 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 363 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 362 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 371 1 0 6 -1 10 0 21 - 80 DSACK1 5 367 7 0 80 -1 4 0 21 - 82 BGACK_030 5 366 7 0 82 -1 3 0 21 - 34 VMA 5 368 3 0 34 -1 3 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 3 0 21 + 82 BGACK_030 5 369 7 0 82 -1 5 0 21 + 7 IPL_030_0_ 5 365 1 0 7 -1 5 0 21 + 6 IPL_030_1_ 5 364 1 0 6 -1 5 0 21 + 28 BG_000 5 368 3 0 28 -1 4 0 21 + 8 IPL_030_2_ 5 366 1 0 8 -1 4 0 21 + 34 VMA 5 371 3 0 34 -1 3 0 21 + 80 DSACK1 5 370 7 0 80 -1 2 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 28 BG_000 5 365 3 0 28 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 77 FPU_CS 0 7 0 77 -1 1 0 21 @@ -12424,424 +3455,1317 @@ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 2 RESET 0 1 0 2 -1 1 0 21 - 366 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 2 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 359 SM_AMIGA_i_7_ 3 -1 5 5 0 2 3 5 7 -1 -1 14 0 21 - 320 SM_AMIGA_5_ 3 -1 1 5 0 1 2 5 7 -1 -1 2 0 21 - 336 CLK_000_N_SYNC_12_ 3 -1 6 5 1 2 3 5 6 -1 -1 1 0 21 - 319 CLK_000_D_0_ 3 -1 4 5 0 1 3 5 7 -1 -1 1 0 21 - 317 CLK_000_D_1_ 3 -1 7 5 0 1 3 5 7 -1 -1 1 0 21 - 300 inst_AS_030_D0 3 -1 7 5 0 2 3 4 7 -1 -1 1 0 21 - 333 SM_AMIGA_0_ 3 -1 5 4 0 3 5 7 -1 -1 3 0 21 - 297 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 354 SM_AMIGA_6_ 3 -1 5 3 0 1 5 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 301 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 335 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 5 0 21 - 338 RST_DLY_1_ 3 -1 6 2 2 6 -1 -1 4 0 21 - 368 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 351 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 337 RST_DLY_0_ 3 -1 6 2 2 6 -1 -1 3 0 21 - 311 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 356 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 2 0 21 - 353 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 339 RST_DLY_2_ 3 -1 2 2 2 6 -1 -1 2 0 21 - 310 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 295 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 334 CLK_000_N_SYNC_0_ 3 -1 0 2 2 5 -1 -1 1 0 21 - 313 CLK_000_D_10_ 3 -1 0 2 0 7 -1 -1 1 0 21 - 309 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21 - 302 inst_BGACK_030_INT_D 3 -1 3 2 2 6 -1 -1 1 0 21 - 371 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 363 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 362 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 357 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 8 0 21 - 355 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 367 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 364 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 358 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 370 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 361 SM_AMIGA_i_7__0 3 -1 5 1 5 -1 -1 3 0 21 - 305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 369 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 365 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 360 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 293 N_149_i 3 -1 5 1 5 -1 -1 2 0 21 - 352 inst_CLK_000_NE_D0 3 -1 3 1 5 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_11_ 3 -1 2 1 6 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_10_ 3 -1 6 1 2 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_9_ 3 -1 1 1 6 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_8_ 3 -1 3 1 1 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_7_ 3 -1 5 1 3 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_6_ 3 -1 0 1 5 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_5_ 3 -1 5 1 0 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_4_ 3 -1 6 1 5 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_3_ 3 -1 1 1 6 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_2_ 3 -1 3 1 1 -1 -1 1 0 21 - 340 CLK_000_N_SYNC_1_ 3 -1 2 1 3 -1 -1 1 0 21 - 332 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 - 331 CLK_000_D_9_ 3 -1 1 1 0 -1 -1 1 0 21 - 330 CLK_000_D_8_ 3 -1 6 1 1 -1 -1 1 0 21 - 329 CLK_000_D_7_ 3 -1 1 1 6 -1 -1 1 0 21 - 328 CLK_000_D_6_ 3 -1 3 1 1 -1 -1 1 0 21 - 327 CLK_000_D_5_ 3 -1 4 1 3 -1 -1 1 0 21 - 326 CLK_000_D_4_ 3 -1 4 1 4 -1 -1 1 0 21 - 325 CLK_000_D_3_ 3 -1 6 1 4 -1 -1 1 0 21 - 324 CLK_000_D_2_ 3 -1 3 1 6 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 - 314 CLK_000_D_11_ 3 -1 0 1 7 -1 -1 1 0 21 + 369 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 5 0 21 + 325 inst_RESET_OUT 3 -1 2 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 321 CLK_000_D_1_ 3 -1 7 7 0 2 3 4 5 6 7 -1 -1 1 0 21 + 326 CLK_000_D_0_ 3 -1 0 6 0 2 3 5 6 7 -1 -1 1 0 21 + 344 SM_AMIGA_6_ 3 -1 0 4 0 2 6 7 -1 -1 3 0 21 + 305 inst_AS_030_D0 3 -1 4 4 2 3 4 5 -1 -1 1 0 21 + 355 SM_AMIGA_i_7_ 3 -1 0 3 0 2 7 -1 -1 5 0 21 + 301 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 299 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 + 351 SM_AMIGA_1_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 + 346 SM_AMIGA_4_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 + 345 SM_AMIGA_0_ 3 -1 2 3 0 2 7 -1 -1 3 0 21 + 306 inst_AS_030_000_SYNC 3 -1 2 3 0 2 3 -1 -1 3 0 21 + 300 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 320 inst_CLK_OUT_PRE_D 3 -1 7 3 1 5 6 -1 -1 1 0 21 + 307 inst_BGACK_030_INT_D 3 -1 4 3 1 2 6 -1 -1 1 0 21 + 302 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 1 1 21 + 353 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 5 0 21 + 354 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 4 0 21 + 341 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 4 0 21 + 310 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 4 0 21 + 352 SM_AMIGA_5_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 316 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 315 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 343 N_246_i 3 -1 3 2 1 3 -1 -1 2 0 21 + 340 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 318 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 + 309 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 2 0 21 + 304 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 + 303 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 331 CLK_000_D_2_ 3 -1 4 2 0 1 -1 -1 1 0 21 + 330 IPL_D0_2_ 3 -1 5 2 1 3 -1 -1 1 0 21 + 328 IPL_D0_0_ 3 -1 1 2 1 3 -1 -1 1 0 21 + 323 CLK_000_D_11_ 3 -1 5 2 3 5 -1 -1 1 0 21 + 365 RN_IPL_030_0_ 3 7 1 1 1 7 -1 5 0 21 + 364 RN_IPL_030_1_ 3 6 1 1 1 6 -1 5 0 21 + 368 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 367 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21 + 347 RST_DLY_0_ 3 -1 2 1 2 -1 -1 4 0 21 + 342 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 4 0 21 + 314 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 4 0 21 + 313 dsack1_int_0_un1_n 3 -1 5 1 7 -1 -1 4 0 21 + 311 dsack1_int_0_un3_n 3 -1 5 1 7 -1 -1 4 0 21 + 298 ipl_030_0_2__un3_n 3 -1 3 1 1 -1 -1 4 0 21 + 297 ipl_030_0_1__un1_n 3 -1 3 1 1 -1 -1 4 0 21 + 296 pos_clk_un26_bgack_030_int_i_1_i_n 3 -1 6 1 1 -1 -1 4 0 21 + 295 ipl_030_0_0__un1_n 3 -1 3 1 1 -1 -1 4 0 21 + 371 RN_VMA 3 34 3 1 5 34 -1 3 0 21 + 363 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 312 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 3 0 21 + 294 vma_int_0_un0_n 3 -1 5 1 3 -1 -1 3 0 21 + 372 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 370 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 362 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 357 N_208 3 -1 2 1 0 -1 -1 2 0 21 + 356 N_207 3 -1 5 1 0 -1 -1 2 0 21 + 350 inst_CLK_030_H 3 -1 1 1 1 -1 -1 2 0 21 + 349 RST_DLY_2_ 3 -1 2 1 2 -1 -1 2 0 21 + 348 RST_DLY_1_ 3 -1 2 1 2 -1 -1 2 1 21 + 361 N_345 3 -1 7 1 0 -1 -1 1 0 21 + 360 N_344 3 -1 0 1 0 -1 -1 1 0 21 + 359 N_305 3 -1 0 1 0 -1 -1 1 0 21 + 358 N_209 3 -1 0 1 0 -1 -1 1 0 21 + 339 CLK_000_D_12_ 3 -1 3 1 5 -1 -1 1 0 21 + 338 CLK_000_D_9_ 3 -1 6 1 6 -1 -1 1 0 21 + 337 CLK_000_D_8_ 3 -1 3 1 6 -1 -1 1 0 21 + 336 CLK_000_D_7_ 3 -1 7 1 3 -1 -1 1 0 21 + 335 CLK_000_D_6_ 3 -1 3 1 7 -1 -1 1 0 21 + 334 CLK_000_D_5_ 3 -1 0 1 3 -1 -1 1 0 21 + 333 CLK_000_D_4_ 3 -1 1 1 0 -1 -1 1 0 21 + 332 CLK_000_D_3_ 3 -1 1 1 1 -1 -1 1 0 21 + 329 IPL_D0_1_ 3 -1 3 1 3 -1 -1 1 0 21 + 327 inst_CLK_OUT_PRE_50 3 -1 7 1 7 -1 -1 1 0 21 + 324 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21 + 322 CLK_000_D_10_ 3 -1 6 1 5 -1 -1 1 0 21 + 317 inst_VPA_D 3 -1 1 1 5 -1 -1 1 0 21 + 308 N_346_i 3 -1 5 1 5 -1 -1 1 0 21 + 293 N_225 3 -1 5 1 2 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 67 IPL_2_ 1 -1 -1 3 1 3 5 67 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 63 CLK_030 1 -1 -1 2 1 5 63 -1 + 59 A_1_ 1 -1 -1 2 1 6 59 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 10 CLK_000 1 -1 -1 2 3 4 10 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 59 A_1_ 1 -1 -1 1 2 59 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 3 29 -1 + 55 IPL_1_ 1 -1 -1 1 3 55 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 0 10 -1 139 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 362 7 3 0 4 6 79 -1 4 0 21 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 367 6 2 0 7 70 -1 2 0 21 + 79 RW_000 5 365 7 2 4 6 79 -1 4 0 21 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A_0_ 5 368 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 361 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 370 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 369 1 0 6 -1 10 0 21 - 80 DSACK1 5 365 7 0 80 -1 4 0 21 - 82 BGACK_030 5 364 7 0 82 -1 3 0 21 - 34 VMA 5 366 3 0 34 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 + 70 RW 5 370 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 82 BGACK_030 0 7 0 82 -1 5 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 28 BG_000 0 3 0 28 -1 4 0 21 + 68 A_0_ 5 362 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 363 3 0 28 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 364 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 301 inst_AS_030_D0 3 -1 7 5 0 2 3 4 7 -1 -1 1 0 21 - 359 SM_AMIGA_i_7_ 3 -1 5 4 0 2 5 7 -1 -1 15 0 21 - 321 SM_AMIGA_5_ 3 -1 5 4 0 2 5 7 -1 -1 2 0 21 - 320 CLK_000_D_0_ 3 -1 5 4 0 3 5 7 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 7 4 0 3 5 7 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 354 SM_AMIGA_6_ 3 -1 5 3 0 1 5 -1 -1 3 0 21 - 334 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 337 CLK_000_N_SYNC_12_ 3 -1 2 3 3 4 5 -1 -1 1 0 21 - 313 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 304 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 302 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 336 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 5 0 21 - 366 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 352 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 - 312 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 309 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 308 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 356 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 2 0 21 - 311 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 335 CLK_000_N_SYNC_0_ 3 -1 0 2 3 5 -1 -1 1 0 21 - 315 CLK_000_D_11_ 3 -1 4 2 3 7 -1 -1 1 0 21 - 314 CLK_000_D_10_ 3 -1 4 2 4 7 -1 -1 1 0 21 - 310 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21 - 303 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 - 370 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 369 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 361 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 305 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 357 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 8 0 21 - 355 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 365 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 362 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 358 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 339 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 307 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 368 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 338 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 306 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 367 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 363 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 360 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 340 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 300 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 293 N_151_i 3 -1 5 1 5 -1 -1 2 0 21 - 353 inst_CLK_000_NE_D0 3 -1 4 1 5 -1 -1 1 0 21 - 351 CLK_000_N_SYNC_11_ 3 -1 6 1 2 -1 -1 1 0 21 - 350 CLK_000_N_SYNC_10_ 3 -1 1 1 6 -1 -1 1 0 21 - 349 CLK_000_N_SYNC_9_ 3 -1 0 1 1 -1 -1 1 0 21 - 348 CLK_000_N_SYNC_8_ 3 -1 2 1 0 -1 -1 1 0 21 - 347 CLK_000_N_SYNC_7_ 3 -1 1 1 2 -1 -1 1 0 21 - 346 CLK_000_N_SYNC_6_ 3 -1 6 1 1 -1 -1 1 0 21 - 345 CLK_000_N_SYNC_5_ 3 -1 5 1 6 -1 -1 1 0 21 - 344 CLK_000_N_SYNC_4_ 3 -1 2 1 5 -1 -1 1 0 21 - 343 CLK_000_N_SYNC_3_ 3 -1 1 1 2 -1 -1 1 0 21 - 342 CLK_000_N_SYNC_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 341 CLK_000_N_SYNC_1_ 3 -1 3 1 6 -1 -1 1 0 21 - 333 CLK_000_D_12_ 3 -1 3 1 7 -1 -1 1 0 21 - 332 CLK_000_D_9_ 3 -1 2 1 4 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 1 1 2 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 6 1 1 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 1 1 6 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 3 1 1 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 0 1 3 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 2 1 0 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 0 1 2 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 319 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 367 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 5 0 21 + 322 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 316 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 304 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 323 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 318 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 357 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 5 0 21 + 308 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 5 0 21 + 368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 366 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 365 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 356 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21 + 342 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 341 pos_clk_ipl_n 3 -1 -1 1 1 -1 -1 4 0 21 + 298 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 295 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21 + 369 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 362 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 352 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 345 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 344 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 315 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 312 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 311 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 297 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 370 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 364 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 363 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 361 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 360 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 317 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21 + 314 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 307 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21 + 301 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 339 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 320 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 319 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 306 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 299 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21 + 354 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 5 0 21 + 296 as_030_000_sync_0_un3_n 3 -1 -1 0 -1 -1 5 0 21 + 359 N_87 3 -1 -1 0 -1 -1 4 0 21 + 358 sm_amiga_nss_i_0_4_0__n 3 -1 -1 0 -1 -1 4 0 21 + 355 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 351 inst_CLK_030_H 3 -1 -1 0 -1 -1 4 0 21 + 348 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 334 N_297_0 3 -1 -1 0 -1 -1 4 0 21 + 310 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 302 as_000_dma_0_un1_n 3 -1 -1 0 -1 -1 4 0 21 + 300 as_000_dma_0_un3_n 3 -1 -1 0 -1 -1 4 0 21 + 353 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 347 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 309 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 350 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 349 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21 + 346 N_245_i 3 -1 -1 0 -1 -1 2 0 21 + 343 N_317_i 3 -1 -1 0 -1 -1 2 0 21 + 340 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 305 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 303 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 338 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 337 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 336 N_310_i 3 -1 -1 0 -1 -1 1 0 21 + 335 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 333 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 332 N_309_i 3 -1 -1 0 -1 -1 1 0 21 + 331 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 330 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 329 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 328 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 327 IPL_D0_2_ 3 -1 -1 0 -1 -1 1 0 21 + 326 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21 + 325 IPL_D0_0_ 3 -1 -1 0 -1 -1 1 0 21 + 324 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 321 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 313 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21 + 294 N_291_i 3 -1 -1 0 -1 -1 1 0 21 + 293 N_92 3 -1 -1 0 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 59 A_1_ 1 -1 -1 2 2 6 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 35 VPA 1 -1 -1 1 6 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 - 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 5 10 -1 -150 "number of signals after reading design file" - -"sig sig sig pair blk fan PT xor sync" -"num name type sig num out pin node cnt PT type" -"--- ---- ---- ---- --- --- --- ---- --- --- ----" - - 40 BERR 5 -1 4 4 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 373 7 3 0 4 6 79 -1 3 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 68 A_0_ 5 374 6 2 0 1 68 -1 3 0 21 - 70 RW 5 381 6 2 5 7 70 -1 2 0 21 - 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 372 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 376 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 375 1 0 6 -1 10 0 21 - 80 DSACK1 5 379 7 0 80 -1 4 0 21 - 82 BGACK_030 5 378 7 0 82 -1 3 0 21 - 34 VMA 5 380 3 0 34 -1 3 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 - 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 28 BG_000 5 377 3 0 28 -1 2 0 21 - 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 - 77 FPU_CS 0 7 0 77 -1 1 0 21 - 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 - 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 - 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 378 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 300 inst_AS_030_D0 3 -1 7 6 2 3 4 5 6 7 -1 -1 1 0 21 - 320 CLK_000_P_SYNC_10_ 3 -1 0 5 0 2 3 5 7 -1 -1 1 0 21 - 370 SM_AMIGA_i_7_ 3 -1 5 4 2 3 5 7 -1 -1 14 0 21 - 365 SM_AMIGA_6_ 3 -1 2 4 0 1 2 5 -1 -1 3 0 21 - 294 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 321 SM_AMIGA_5_ 3 -1 5 3 5 6 7 -1 -1 3 0 21 - 297 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 334 SM_AMIGA_0_ 3 -1 5 3 3 5 7 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 1 3 1 3 5 -1 -1 2 0 21 - 338 CLK_000_N_SYNC_12_ 3 -1 3 3 3 4 5 -1 -1 1 0 21 - 335 CLK_000_N_SYNC_0_ 3 -1 3 3 2 4 5 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 302 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 - 303 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 301 inst_AS_030_000_SYNC 3 -1 2 2 2 5 -1 -1 7 0 21 - 337 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 380 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 367 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 - 311 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 364 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 310 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 - 363 inst_CLK_000_NE_D0 3 -1 4 2 1 5 -1 -1 1 0 21 - 319 CLK_000_D_0_ 3 -1 6 2 2 3 -1 -1 1 0 21 - 318 CLK_000_D_1_ 3 -1 2 2 3 6 -1 -1 1 0 21 - 309 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21 - 376 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 375 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 372 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 304 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 366 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 368 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 379 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 369 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 340 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 - 374 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 373 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 339 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 - 336 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 - 306 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 293 N_226 3 -1 5 1 5 -1 -1 3 0 21 - 381 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 377 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 341 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 305 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 2 0 21 - 362 CLK_000_N_SYNC_11_ 3 -1 2 1 3 -1 -1 1 0 21 - 361 CLK_000_N_SYNC_10_ 3 -1 2 1 2 -1 -1 1 0 21 - 360 CLK_000_N_SYNC_9_ 3 -1 5 1 2 -1 -1 1 0 21 - 359 CLK_000_N_SYNC_8_ 3 -1 1 1 5 -1 -1 1 0 21 - 358 CLK_000_N_SYNC_7_ 3 -1 6 1 1 -1 -1 1 0 21 - 357 CLK_000_N_SYNC_6_ 3 -1 1 1 6 -1 -1 1 0 21 - 356 CLK_000_N_SYNC_5_ 3 -1 0 1 1 -1 -1 1 0 21 - 355 CLK_000_N_SYNC_4_ 3 -1 0 1 0 -1 -1 1 0 21 - 354 CLK_000_N_SYNC_3_ 3 -1 5 1 0 -1 -1 1 0 21 - 353 CLK_000_N_SYNC_2_ 3 -1 0 1 5 -1 -1 1 0 21 - 352 CLK_000_N_SYNC_1_ 3 -1 4 1 0 -1 -1 1 0 21 - 351 CLK_000_P_SYNC_9_ 3 -1 2 1 0 -1 -1 1 0 21 - 350 CLK_000_P_SYNC_8_ 3 -1 0 1 2 -1 -1 1 0 21 - 349 CLK_000_P_SYNC_7_ 3 -1 3 1 0 -1 -1 1 0 21 - 348 CLK_000_P_SYNC_6_ 3 -1 6 1 3 -1 -1 1 0 21 - 347 CLK_000_P_SYNC_5_ 3 -1 6 1 6 -1 -1 1 0 21 - 346 CLK_000_P_SYNC_4_ 3 -1 0 1 6 -1 -1 1 0 21 - 345 CLK_000_P_SYNC_3_ 3 -1 2 1 0 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_2_ 3 -1 5 1 2 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_1_ 3 -1 0 1 5 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_0_ 3 -1 3 1 0 -1 -1 1 0 21 - 333 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 - 332 CLK_000_D_9_ 3 -1 3 1 6 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 1 1 3 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 6 1 1 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 1 1 6 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 4 1 1 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 2 1 4 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 6 1 2 -1 -1 1 0 21 - 325 CLK_000_D_2_ 3 -1 6 1 6 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 - 317 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21 - 314 CLK_000_D_11_ 3 -1 7 1 7 -1 -1 1 0 21 - 313 CLK_000_D_10_ 3 -1 6 1 7 -1 -1 1 0 21 - 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 - 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 - 59 A_1_ 1 -1 -1 2 1 2 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 - 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 10 CLK_000 1 -1 -1 2 3 6 10 -1 - 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 - 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 - 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 - 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 20 BG_030 1 -1 -1 1 3 20 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 137 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 79 RW_000 5 360 7 3 2 4 6 79 -1 3 0 21 - 40 BERR 5 -1 4 3 0 5 7 40 -1 1 0 21 - 70 RW 5 368 6 2 5 7 70 -1 2 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 363 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 368 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 5 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 5 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 28 BG_000 0 3 0 28 -1 4 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 4 0 21 + 82 BGACK_030 0 7 0 82 -1 3 0 21 + 68 A_0_ 5 359 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 365 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 + 325 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 320 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 306 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 326 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 321 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 361 RN_IPL_030_0_ 3 7 1 1 1 7 -1 5 0 21 + 360 RN_IPL_030_1_ 3 6 1 1 1 6 -1 5 0 21 + 357 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 5 0 21 + 366 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 364 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 363 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21 + 356 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21 + 342 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 312 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 301 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 299 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21 + 296 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 295 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21 + 293 ipl_030_0_0__un1_n 3 -1 -1 1 1 -1 -1 4 0 21 + 367 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 359 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 351 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 345 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 344 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 316 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 315 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 300 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 368 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 358 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 343 N_246_i 3 -1 -1 1 1 -1 -1 2 0 21 + 318 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 311 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21 + 303 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 297 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21 + 340 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 331 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 329 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 + 323 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 322 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 309 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 302 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21 + 353 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 5 0 21 + 355 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 354 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 -1 0 -1 -1 4 0 21 + 347 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 314 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 304 N_80_i 3 -1 -1 0 -1 -1 4 0 21 + 352 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 346 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 313 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 350 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 349 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 348 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21 + 341 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 308 N_325_i 3 -1 -1 0 -1 -1 2 0 21 + 307 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 305 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 294 N_191_i 3 -1 -1 0 -1 -1 2 0 21 + 339 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 338 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 337 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 336 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 335 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 334 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 333 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 332 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 330 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21 + 328 N_297_i 3 -1 -1 0 -1 -1 1 0 21 + 327 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 324 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 317 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21 + 310 N_326_i 3 -1 -1 0 -1 -1 1 0 21 + 298 pos_clk_un28_as_030_d0_i_n 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 55 IPL_1_ 1 -1 -1 0 55 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +139 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 365 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 370 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 28 BG_000 0 3 0 28 -1 4 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 4 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 4 0 21 + 82 BGACK_030 0 7 0 82 -1 3 0 21 + 68 A_0_ 5 361 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 367 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 + 326 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 321 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 307 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 327 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 322 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 366 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 365 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 364 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21 + 363 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21 + 358 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 4 0 21 + 357 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21 + 343 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 313 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 303 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21 + 302 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 300 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21 + 297 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 296 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21 + 295 ipl_030_0_1__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 293 ipl_030_0_0__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 369 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 361 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 352 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 346 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 345 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 320 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 317 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 316 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 301 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 370 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 360 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 344 N_246_i 3 -1 -1 1 1 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 312 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21 + 304 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 298 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21 + 341 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 332 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 330 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 + 324 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 323 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 310 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 356 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 355 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 -1 0 -1 -1 4 0 21 + 354 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21 + 349 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21 + 348 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 315 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 305 N_80_i 3 -1 -1 0 -1 -1 4 0 21 + 353 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 347 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 314 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 351 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 350 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 309 N_325_i 3 -1 -1 0 -1 -1 2 0 21 + 308 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 294 N_191_i 3 -1 -1 0 -1 -1 2 0 21 + 359 N_310_i 3 -1 -1 0 -1 -1 1 0 21 + 340 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 339 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 338 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 337 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 336 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 335 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 334 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 333 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 331 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21 + 329 N_297_i 3 -1 -1 0 -1 -1 1 0 21 + 328 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 325 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 318 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21 + 311 N_326_i 3 -1 -1 0 -1 -1 1 0 21 + 299 pos_clk_un28_as_030_d0_i_n 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 55 IPL_1_ 1 -1 -1 0 55 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +139 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 365 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 370 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 28 BG_000 0 3 0 28 -1 4 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 4 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 4 0 21 + 82 BGACK_030 0 7 0 82 -1 3 0 21 + 68 A_0_ 5 361 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 367 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 + 326 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 321 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 307 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 327 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 322 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 366 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 365 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 364 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21 + 363 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21 + 358 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 4 0 21 + 357 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21 + 343 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 313 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 303 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21 + 297 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 296 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21 + 295 ipl_030_0_1__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 293 ipl_030_0_0__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 369 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 361 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 345 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 320 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 317 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 316 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 302 cpu_est_1_ 3 -1 -1 1 3 -1 -1 3 0 21 + 300 cpu_est_3_ 3 -1 -1 1 3 -1 -1 3 0 21 + 370 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 360 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 352 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 2 0 21 + 346 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 2 0 21 + 344 N_246_i 3 -1 -1 1 1 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 312 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21 + 304 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 301 cpu_est_0_ 3 -1 -1 1 3 -1 -1 2 0 21 + 298 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21 + 341 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 332 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 330 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 + 324 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 323 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 310 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 355 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 -1 0 -1 -1 4 0 21 + 354 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21 + 349 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21 + 315 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 305 N_80_i 3 -1 -1 0 -1 -1 4 0 21 + 356 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 3 0 21 + 348 RST_DLY_0_ 3 -1 -1 0 -1 -1 3 0 21 + 347 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 314 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 353 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 2 0 21 + 351 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 350 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 309 N_325_i 3 -1 -1 0 -1 -1 2 0 21 + 308 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 294 N_191_i 3 -1 -1 0 -1 -1 2 0 21 + 359 N_310_i 3 -1 -1 0 -1 -1 1 0 21 + 340 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 339 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 338 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 337 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 336 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 335 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 334 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 333 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 331 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21 + 329 N_297_i 3 -1 -1 0 -1 -1 1 0 21 + 328 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 325 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 318 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21 + 311 N_326_i 3 -1 -1 0 -1 -1 1 0 21 + 299 pos_clk_un28_as_030_d0_i_n 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 55 IPL_1_ 1 -1 -1 0 55 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +147 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 + 79 RW_000 5 373 7 3 0 4 6 79 -1 3 0 21 + 68 A_0_ 5 369 6 2 1 2 68 -1 3 0 21 + 70 RW 5 378 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 80 DSACK1 5 376 7 0 80 -1 3 0 21 + 34 VMA 5 377 3 0 34 -1 3 0 21 + 28 BG_000 5 374 3 0 28 -1 3 0 21 + 8 IPL_030_2_ 5 372 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 371 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 370 1 0 6 -1 3 0 21 + 82 BGACK_030 5 375 7 0 82 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 375 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 2 0 21 + 329 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 367 N_310_i 3 -1 3 5 0 1 3 5 6 -1 -1 1 0 21 + 362 pos_clk_bgack_030_int_pre5_i_n 3 -1 3 5 0 3 5 6 7 -1 -1 1 0 21 + 309 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21 + 349 SM_AMIGA_6_ 3 -1 5 4 1 2 5 7 -1 -1 2 0 21 + 364 SM_AMIGA_i_7_ 3 -1 0 3 2 5 7 -1 -1 3 0 21 + 356 SM_AMIGA_1_ 3 -1 5 3 0 5 7 -1 -1 2 0 21 + 310 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 2 0 21 + 324 inst_CLK_OUT_PRE_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 + 352 RST_DLY_0_ 3 -1 3 2 1 3 -1 -1 3 0 21 + 323 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 319 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 303 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 301 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 357 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 2 0 21 + 353 RST_DLY_1_ 3 -1 1 2 1 3 -1 -1 2 0 21 + 351 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 2 0 21 + 350 SM_AMIGA_0_ 3 -1 0 2 5 7 -1 -1 2 0 21 + 347 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 2 0 21 + 345 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 322 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 317 CYCLE_DMA_0_ 3 -1 0 2 0 6 -1 -1 2 0 21 + 314 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 2 0 21 + 311 N_325_i 3 -1 5 2 0 5 -1 -1 2 0 21 + 305 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 304 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 2 0 21 + 302 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 2 0 21 + 336 CLK_000_D_2_ 3 -1 5 2 4 5 -1 -1 1 0 21 + 327 CLK_000_D_11_ 3 -1 2 2 2 7 -1 -1 1 0 21 + 325 CLK_000_D_1_ 3 -1 3 2 3 5 -1 -1 1 0 21 + 321 inst_VPA_D 3 -1 6 2 1 3 -1 -1 1 0 21 + 312 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 + 377 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 376 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 374 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 373 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 372 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 369 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 366 cpu_est_0_2__un0_n 3 -1 3 1 6 -1 -1 3 0 21 + 365 S0__clk_un22_bgack_030_int_i_0_i 3 -1 6 1 0 -1 -1 3 0 21 + 360 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 318 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21 + 315 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 3 0 21 + 308 N_324_i 3 -1 5 1 0 -1 -1 3 0 21 + 306 N_80_i 3 -1 5 1 0 -1 -1 3 0 21 + 294 N_314 3 -1 5 1 5 -1 -1 3 0 21 + 378 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 368 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 361 N_303_0 3 -1 0 1 0 -1 -1 2 0 21 + 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 2 0 21 + 358 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 2 0 21 + 355 inst_CLK_030_H 3 -1 0 1 0 -1 -1 2 0 21 + 354 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 + 348 N_246_i 3 -1 1 1 1 -1 -1 2 0 21 + 346 N_245_i 3 -1 2 1 1 -1 -1 2 0 21 + 316 N_112_i 3 -1 3 1 1 -1 -1 2 0 21 + 307 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 299 N_341_i 3 -1 2 1 7 -1 -1 2 0 21 + 298 vma_int_0_un3_n 3 -1 3 1 3 -1 -1 2 0 21 + 297 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21 + 296 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 293 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 363 N_319_i 3 -1 1 1 5 -1 -1 1 0 21 + 344 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 + 343 CLK_000_D_9_ 3 -1 4 1 0 -1 -1 1 0 21 + 342 CLK_000_D_8_ 3 -1 0 1 4 -1 -1 1 0 21 + 341 CLK_000_D_7_ 3 -1 5 1 0 -1 -1 1 0 21 + 340 CLK_000_D_6_ 3 -1 2 1 5 -1 -1 1 0 21 + 339 CLK_000_D_5_ 3 -1 5 1 2 -1 -1 1 0 21 + 338 CLK_000_D_4_ 3 -1 6 1 5 -1 -1 1 0 21 + 337 CLK_000_D_3_ 3 -1 4 1 6 -1 -1 1 0 21 + 335 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 + 334 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 333 IPL_D0_0_ 3 -1 2 1 2 -1 -1 1 0 21 + 332 N_297_i 3 -1 3 1 5 -1 -1 1 0 21 + 331 inst_CLK_OUT_PRE_50 3 -1 7 1 7 -1 -1 1 0 21 + 330 CLK_000_D_0_ 3 -1 5 1 3 -1 -1 1 0 21 + 328 inst_DTACK_D0 3 -1 2 1 1 -1 -1 1 0 21 + 326 CLK_000_D_10_ 3 -1 0 1 2 -1 -1 1 0 21 + 313 N_326_i 3 -1 5 1 0 -1 -1 1 0 21 + 300 pos_clk_un28_as_030_d0_i_n 3 -1 7 1 2 -1 -1 1 0 21 + 295 N_191_i 3 -1 7 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 + 63 CLK_030 1 -1 -1 2 0 2 63 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 2 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 5 10 -1 +147 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 1 5 7 40 -1 1 0 21 + 79 RW_000 5 373 7 3 4 5 6 79 -1 3 0 21 + 70 RW 5 378 6 2 5 7 70 -1 2 0 21 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 - 68 A_0_ 5 361 6 1 2 68 -1 3 0 21 + 68 A_0_ 5 369 6 1 5 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 375 7 0 82 -1 3 0 21 + 80 DSACK1 5 376 7 0 80 -1 3 0 21 + 34 VMA 5 377 3 0 34 -1 3 0 21 + 28 BG_000 5 374 3 0 28 -1 3 0 21 + 8 IPL_030_2_ 5 372 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 371 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 370 1 0 6 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 375 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 329 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 330 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 325 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 309 inst_AS_030_D0 3 -1 7 5 0 1 3 4 7 -1 -1 1 0 21 + 356 SM_AMIGA_1_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21 + 349 SM_AMIGA_6_ 3 -1 0 4 0 1 5 7 -1 -1 3 0 21 + 362 pos_clk_bgack_030_int_pre5_i_n 3 -1 7 4 2 3 5 7 -1 -1 1 0 21 + 357 SM_AMIGA_5_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 + 350 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 3 0 21 + 302 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 314 inst_AS_000_DMA 3 -1 6 3 5 6 7 -1 -1 2 0 21 + 327 CLK_000_D_11_ 3 -1 4 3 0 1 7 -1 -1 1 0 21 + 312 inst_BGACK_030_INT_D 3 -1 5 3 0 2 6 -1 -1 1 0 21 + 365 S0__clk_un22_bgack_030_int_i_0_i 3 -1 2 2 5 6 -1 -1 3 0 21 + 364 SM_AMIGA_i_7_ 3 -1 2 2 0 7 -1 -1 3 0 21 + 359 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 352 RST_DLY_0_ 3 -1 2 2 2 6 -1 -1 3 0 21 + 351 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 323 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 319 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 317 CYCLE_DMA_0_ 3 -1 6 2 2 6 -1 -1 3 0 21 + 315 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 3 0 21 + 303 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 301 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 358 SM_AMIGA_3_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 354 RST_DLY_2_ 3 -1 2 2 2 6 -1 -1 2 0 21 + 353 RST_DLY_1_ 3 -1 2 2 2 6 -1 -1 2 0 21 + 347 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 2 0 21 + 345 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 322 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 311 N_325_i 3 -1 3 2 0 2 -1 -1 2 0 21 + 310 inst_AS_030_000_SYNC 3 -1 0 2 0 3 -1 -1 2 0 21 + 305 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 304 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 2 0 21 + 367 N_310_i 3 -1 7 2 2 3 -1 -1 1 0 21 + 336 CLK_000_D_2_ 3 -1 7 2 0 5 -1 -1 1 0 21 + 331 inst_CLK_OUT_PRE_50 3 -1 0 2 0 5 -1 -1 1 0 21 + 326 CLK_000_D_10_ 3 -1 5 2 1 4 -1 -1 1 0 21 + 324 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21 + 321 inst_VPA_D 3 -1 0 2 3 6 -1 -1 1 0 21 + 377 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 376 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 374 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 373 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 372 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 369 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 366 cpu_est_0_2__un0_n 3 -1 3 1 3 -1 -1 3 0 21 + 360 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 318 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21 + 308 N_324_i 3 -1 0 1 2 -1 -1 3 0 21 + 306 N_80_i 3 -1 5 1 2 -1 -1 3 0 21 + 294 N_314 3 -1 5 1 0 -1 -1 3 0 21 + 378 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 368 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 361 N_303_0 3 -1 6 1 5 -1 -1 2 0 21 + 355 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21 + 348 N_246_i 3 -1 1 1 1 -1 -1 2 0 21 + 346 N_245_i 3 -1 1 1 1 -1 -1 2 0 21 + 316 N_112_i 3 -1 6 1 2 -1 -1 2 0 21 + 307 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 299 N_341_i 3 -1 1 1 7 -1 -1 2 0 21 + 298 vma_int_0_un3_n 3 -1 6 1 3 -1 -1 2 0 21 + 297 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21 + 296 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 295 N_191_i 3 -1 7 1 2 -1 -1 2 0 21 + 293 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 363 N_319_i 3 -1 3 1 0 -1 -1 1 0 21 + 344 CLK_000_D_12_ 3 -1 0 1 7 -1 -1 1 0 21 + 343 CLK_000_D_9_ 3 -1 2 1 5 -1 -1 1 0 21 + 342 CLK_000_D_8_ 3 -1 5 1 2 -1 -1 1 0 21 + 341 CLK_000_D_7_ 3 -1 2 1 5 -1 -1 1 0 21 + 340 CLK_000_D_6_ 3 -1 3 1 2 -1 -1 1 0 21 + 339 CLK_000_D_5_ 3 -1 5 1 3 -1 -1 1 0 21 + 338 CLK_000_D_4_ 3 -1 6 1 5 -1 -1 1 0 21 + 337 CLK_000_D_3_ 3 -1 5 1 6 -1 -1 1 0 21 + 335 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 + 334 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 333 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 + 332 N_297_i 3 -1 3 1 0 -1 -1 1 0 21 + 328 inst_DTACK_D0 3 -1 1 1 3 -1 -1 1 0 21 + 313 N_326_i 3 -1 0 1 2 -1 -1 1 0 21 + 300 pos_clk_un28_as_030_d0_i_n 3 -1 7 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 63 CLK_030 1 -1 -1 2 1 6 63 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 +150 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 4 0 4 5 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 2 5 6 40 -1 1 0 21 + 79 RW_000 5 375 7 3 0 4 6 79 -1 3 0 21 + 70 RW 5 380 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 31 UDS_000 5 -1 3 2 5 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 5 6 30 -1 1 0 21 + 68 A_0_ 5 381 6 1 3 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 377 7 0 82 -1 3 0 21 + 34 VMA 5 379 3 0 34 -1 3 0 21 + 80 DSACK1 5 378 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 376 3 0 28 -1 2 0 21 + 8 IPL_030_2_ 5 374 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 373 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 372 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 377 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 331 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 332 CLK_000_D_0_ 3 -1 5 6 0 2 3 5 6 7 -1 -1 1 0 21 + 327 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 + 312 inst_AS_030_D0 3 -1 7 6 0 2 3 4 5 6 -1 -1 1 0 21 + 351 SM_AMIGA_6_ 3 -1 0 5 0 2 3 5 7 -1 -1 3 0 21 + 366 SM_AMIGA_i_7_ 3 -1 2 3 0 2 7 -1 -1 3 0 21 + 358 SM_AMIGA_1_ 3 -1 5 3 2 5 6 -1 -1 3 0 21 + 352 SM_AMIGA_0_ 3 -1 6 3 2 6 7 -1 -1 3 0 21 + 308 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 0 21 + 314 inst_AS_030_000_SYNC 3 -1 0 3 0 2 3 -1 -1 2 0 21 + 324 N_106_i 3 -1 7 3 1 3 6 -1 -1 1 0 21 + 315 inst_BGACK_030_INT_D 3 -1 7 3 0 1 6 -1 -1 1 0 21 + 361 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 359 SM_AMIGA_5_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 354 RST_DLY_0_ 3 -1 6 2 1 6 -1 -1 3 0 21 + 353 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 321 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 320 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 306 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 302 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 360 SM_AMIGA_3_ 3 -1 2 2 2 3 -1 -1 2 0 21 + 356 RST_DLY_2_ 3 -1 6 2 1 6 -1 -1 2 0 21 + 355 RST_DLY_1_ 3 -1 1 2 1 6 -1 -1 2 0 21 + 350 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21 + 348 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 + 316 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 2 0 21 + 311 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 + 309 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 337 CLK_000_D_2_ 3 -1 7 2 0 2 -1 -1 1 0 21 + 333 inst_CLK_OUT_PRE_50 3 -1 2 2 0 2 -1 -1 1 0 21 + 329 CLK_000_D_11_ 3 -1 1 2 1 6 -1 -1 1 0 21 + 326 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21 + 293 N_89_i 3 -1 7 2 5 7 -1 -1 1 0 21 + 381 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 379 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 375 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 369 S0__clk_un22_bgack_030_int_i_0_i 3 -1 5 1 0 -1 -1 3 0 21 + 367 N_280_i_1 3 -1 1 1 1 -1 -1 3 0 21 + 365 N_143_0 3 -1 5 1 2 -1 -1 3 0 21 + 363 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 325 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 + 319 CYCLE_DMA_1_ 3 -1 5 1 5 -1 -1 3 0 21 + 318 CYCLE_DMA_0_ 3 -1 5 1 5 -1 -1 3 0 21 + 305 N_244_i 3 -1 5 1 2 -1 -1 3 0 21 + 304 cpu_est_0_ 3 -1 3 1 3 -1 -1 3 0 21 + 298 as_000_int_0_un3_n 3 -1 5 1 5 -1 -1 3 0 21 + 297 N_3 3 -1 0 1 5 -1 -1 3 0 21 + 295 dsack1_int_0_un1_n 3 -1 6 1 7 -1 -1 3 0 21 + 294 dsack1_int_0_un3_n 3 -1 6 1 7 -1 -1 3 0 21 + 380 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 378 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 376 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 374 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 373 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 372 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 370 ds_000_dma_0_un1_n 3 -1 0 1 0 -1 -1 2 0 21 + 368 N_232 3 -1 3 1 2 -1 -1 2 0 21 + 357 inst_CLK_030_H 3 -1 0 1 0 -1 -1 2 0 21 + 349 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21 + 345 N_246_i 3 -1 5 1 1 -1 -1 2 0 21 + 343 N_245_i 3 -1 5 1 1 -1 -1 2 0 21 + 323 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 313 N_337_i 3 -1 1 1 6 -1 -1 2 0 21 + 310 N_178_0 3 -1 3 1 2 -1 -1 2 0 21 + 303 N_322_i 3 -1 2 1 2 -1 -1 2 0 21 + 301 N_323_i 3 -1 6 1 2 -1 -1 2 0 21 + 299 as_000_int_0_un1_n 3 -1 5 1 5 -1 -1 2 0 21 + 364 N_155_i 3 -1 7 1 0 -1 -1 1 0 21 + 362 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 0 1 0 -1 -1 1 0 21 + 347 CLK_000_D_12_ 3 -1 6 1 6 -1 -1 1 0 21 + 346 CLK_000_D_9_ 3 -1 2 1 5 -1 -1 1 0 21 + 344 CLK_000_D_8_ 3 -1 4 1 2 -1 -1 1 0 21 + 342 CLK_000_D_7_ 3 -1 0 1 4 -1 -1 1 0 21 + 341 CLK_000_D_6_ 3 -1 1 1 0 -1 -1 1 0 21 + 340 CLK_000_D_5_ 3 -1 2 1 1 -1 -1 1 0 21 + 339 CLK_000_D_4_ 3 -1 5 1 2 -1 -1 1 0 21 + 338 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21 + 336 IPL_D0_2_ 3 -1 7 1 1 -1 -1 1 0 21 + 335 IPL_D0_1_ 3 -1 0 1 5 -1 -1 1 0 21 + 334 IPL_D0_0_ 3 -1 5 1 5 -1 -1 1 0 21 + 330 inst_DTACK_D0 3 -1 6 1 3 -1 -1 1 0 21 + 328 CLK_000_D_10_ 3 -1 5 1 1 -1 -1 1 0 21 + 322 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21 + 317 inst_DS_000_DMA 3 -1 5 1 0 -1 -1 1 0 21 + 307 vma_int_0_un1_n 3 -1 3 1 3 -1 -1 1 0 21 + 300 N_248_i 3 -1 2 1 2 -1 -1 1 0 21 + 296 N_149_i 3 -1 3 1 1 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 55 IPL_1_ 1 -1 -1 3 0 1 5 55 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 7 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 63 CLK_030 1 -1 -1 2 0 1 63 -1 + 59 A_1_ 1 -1 -1 2 0 1 59 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 5 10 -1 +147 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 1 5 7 40 -1 1 0 21 + 79 RW_000 5 373 7 3 4 5 6 79 -1 3 0 21 + 70 RW 5 378 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 + 68 A_0_ 5 369 6 1 5 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 375 7 0 82 -1 3 0 21 + 80 DSACK1 5 376 7 0 80 -1 3 0 21 + 34 VMA 5 377 3 0 34 -1 3 0 21 + 28 BG_000 5 374 3 0 28 -1 3 0 21 + 8 IPL_030_2_ 5 372 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 371 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 370 1 0 6 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 375 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 329 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 330 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 325 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 309 inst_AS_030_D0 3 -1 7 5 0 1 3 4 7 -1 -1 1 0 21 + 356 SM_AMIGA_1_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21 + 349 SM_AMIGA_6_ 3 -1 0 4 0 1 5 7 -1 -1 3 0 21 + 362 pos_clk_bgack_030_int_pre5_i_n 3 -1 7 4 2 3 5 7 -1 -1 1 0 21 + 357 SM_AMIGA_5_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 + 350 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 3 0 21 + 302 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 314 inst_AS_000_DMA 3 -1 6 3 5 6 7 -1 -1 2 0 21 + 327 CLK_000_D_11_ 3 -1 4 3 0 1 7 -1 -1 1 0 21 + 312 inst_BGACK_030_INT_D 3 -1 5 3 0 2 6 -1 -1 1 0 21 + 365 S0__clk_un22_bgack_030_int_i_0_i 3 -1 2 2 5 6 -1 -1 3 0 21 + 364 SM_AMIGA_i_7_ 3 -1 2 2 0 7 -1 -1 3 0 21 + 359 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 352 RST_DLY_0_ 3 -1 2 2 2 6 -1 -1 3 0 21 + 351 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 323 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 319 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 317 CYCLE_DMA_0_ 3 -1 6 2 2 6 -1 -1 3 0 21 + 315 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 3 0 21 + 303 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 301 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 358 SM_AMIGA_3_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 354 RST_DLY_2_ 3 -1 2 2 2 6 -1 -1 2 0 21 + 353 RST_DLY_1_ 3 -1 2 2 2 6 -1 -1 2 0 21 + 347 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 2 0 21 + 345 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 322 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 311 N_325_i 3 -1 3 2 0 2 -1 -1 2 0 21 + 310 inst_AS_030_000_SYNC 3 -1 0 2 0 3 -1 -1 2 0 21 + 305 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 304 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 2 0 21 + 367 N_310_i 3 -1 7 2 2 3 -1 -1 1 0 21 + 336 CLK_000_D_2_ 3 -1 7 2 0 5 -1 -1 1 0 21 + 331 inst_CLK_OUT_PRE_50 3 -1 0 2 0 5 -1 -1 1 0 21 + 326 CLK_000_D_10_ 3 -1 5 2 1 4 -1 -1 1 0 21 + 324 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21 + 321 inst_VPA_D 3 -1 0 2 3 6 -1 -1 1 0 21 + 377 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 376 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 374 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 373 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 372 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 369 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 366 cpu_est_0_2__un0_n 3 -1 3 1 3 -1 -1 3 0 21 + 360 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 318 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21 + 308 N_324_i 3 -1 0 1 2 -1 -1 3 0 21 + 306 N_80_i 3 -1 5 1 2 -1 -1 3 0 21 + 294 N_314 3 -1 5 1 0 -1 -1 3 0 21 + 378 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 368 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 361 N_303_0 3 -1 6 1 5 -1 -1 2 0 21 + 355 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21 + 348 N_246_i 3 -1 1 1 1 -1 -1 2 0 21 + 346 N_245_i 3 -1 1 1 1 -1 -1 2 0 21 + 316 N_112_i 3 -1 6 1 2 -1 -1 2 0 21 + 307 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 299 N_341_i 3 -1 1 1 7 -1 -1 2 0 21 + 298 vma_int_0_un3_n 3 -1 6 1 3 -1 -1 2 0 21 + 297 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21 + 296 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 295 N_191_i 3 -1 7 1 2 -1 -1 2 0 21 + 293 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 363 N_319_i 3 -1 3 1 0 -1 -1 1 0 21 + 344 CLK_000_D_12_ 3 -1 0 1 7 -1 -1 1 0 21 + 343 CLK_000_D_9_ 3 -1 2 1 5 -1 -1 1 0 21 + 342 CLK_000_D_8_ 3 -1 5 1 2 -1 -1 1 0 21 + 341 CLK_000_D_7_ 3 -1 2 1 5 -1 -1 1 0 21 + 340 CLK_000_D_6_ 3 -1 3 1 2 -1 -1 1 0 21 + 339 CLK_000_D_5_ 3 -1 5 1 3 -1 -1 1 0 21 + 338 CLK_000_D_4_ 3 -1 6 1 5 -1 -1 1 0 21 + 337 CLK_000_D_3_ 3 -1 5 1 6 -1 -1 1 0 21 + 335 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 + 334 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 333 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 + 332 N_297_i 3 -1 3 1 0 -1 -1 1 0 21 + 328 inst_DTACK_D0 3 -1 1 1 3 -1 -1 1 0 21 + 313 N_326_i 3 -1 0 1 2 -1 -1 1 0 21 + 300 pos_clk_un28_as_030_d0_i_n 3 -1 7 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 63 CLK_030 1 -1 -1 2 1 6 63 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 +145 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 4 0 3 4 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 + 79 RW_000 5 368 7 3 1 4 6 79 -1 3 0 21 + 81 AS_030 5 -1 7 3 4 5 7 81 -1 1 0 21 + 31 UDS_000 5 -1 3 3 0 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 0 1 30 -1 1 0 21 + 68 A_0_ 5 374 6 1 2 68 -1 3 0 21 + 70 RW 5 373 6 1 7 70 -1 2 0 21 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 @@ -12852,16 +4776,16 @@ 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 359 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 363 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 362 1 0 6 -1 10 0 21 - 80 DSACK1 5 366 7 0 80 -1 4 0 21 - 82 BGACK_030 5 365 7 0 82 -1 3 0 21 - 34 VMA 5 367 3 0 34 -1 3 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 3 0 21 + 82 BGACK_030 5 370 7 0 82 -1 3 0 21 + 80 DSACK1 5 371 7 0 80 -1 3 0 21 + 34 VMA 5 372 3 0 34 -1 3 0 21 + 28 BG_000 5 369 3 0 28 -1 3 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 28 BG_000 5 364 3 0 28 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 8 IPL_030_2_ 5 367 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 376 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 375 1 0 6 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 77 FPU_CS 0 7 0 77 -1 1 0 21 @@ -12871,264 +4795,2810 @@ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 2 RESET 0 1 0 2 -1 1 0 21 - 365 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 317 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 300 inst_AS_030_D0 3 -1 7 5 0 3 4 5 7 -1 -1 1 0 21 - 357 SM_AMIGA_i_7_ 3 -1 5 4 0 3 5 7 -1 -1 14 0 21 - 320 CLK_000_P_SYNC_10_ 3 -1 6 4 2 3 5 7 -1 -1 1 0 21 - 295 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 4 0 21 - 296 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 294 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 334 SM_AMIGA_0_ 3 -1 5 3 3 5 7 -1 -1 2 0 21 - 321 SM_AMIGA_5_ 3 -1 5 3 0 5 7 -1 -1 2 1 21 - 297 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 2 0 21 - 325 CLK_000_D_2_ 3 -1 5 3 1 3 5 -1 -1 1 0 21 - 318 CLK_000_D_0_ 3 -1 0 3 1 3 5 -1 -1 1 0 21 - 313 CLK_000_D_1_ 3 -1 3 3 1 3 5 -1 -1 1 0 21 - 312 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 302 inst_BGACK_030_INT_D 3 -1 7 3 0 1 6 -1 -1 1 0 21 - 304 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 303 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 301 inst_AS_030_000_SYNC 3 -1 0 2 0 5 -1 -1 7 0 21 - 336 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 367 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 352 SM_AMIGA_6_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 350 RST_DLY_1_ 3 -1 3 2 1 3 -1 -1 3 0 21 - 349 RST_DLY_0_ 3 -1 3 2 1 3 -1 -1 3 1 21 - 311 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 354 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 2 1 21 - 351 RST_DLY_2_ 3 -1 3 2 1 3 -1 -1 2 0 21 - 348 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 - 310 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 298 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 - 347 inst_CLK_000_NE_D0 3 -1 1 2 5 6 -1 -1 1 0 21 - 309 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21 - 363 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 359 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 353 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 355 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 - 366 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 356 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 293 N_224_i 3 -1 5 1 5 -1 -1 4 0 21 - 361 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 360 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 306 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21 - 368 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 364 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 358 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 335 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 2 0 21 - 305 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 2 0 21 - 346 CLK_000_P_SYNC_9_ 3 -1 4 1 6 -1 -1 1 0 21 - 345 CLK_000_P_SYNC_8_ 3 -1 6 1 4 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_7_ 3 -1 2 1 6 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_6_ 3 -1 1 1 2 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_5_ 3 -1 1 1 1 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_4_ 3 -1 3 1 1 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_3_ 3 -1 0 1 3 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_2_ 3 -1 6 1 0 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_1_ 3 -1 0 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_0_ 3 -1 3 1 0 -1 -1 1 0 21 - 333 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 - 332 CLK_000_D_9_ 3 -1 6 1 2 -1 -1 1 0 21 - 331 CLK_000_D_8_ 3 -1 0 1 6 -1 -1 1 0 21 - 330 CLK_000_D_7_ 3 -1 6 1 0 -1 -1 1 0 21 - 329 CLK_000_D_6_ 3 -1 6 1 6 -1 -1 1 0 21 - 328 CLK_000_D_5_ 3 -1 0 1 6 -1 -1 1 0 21 - 327 CLK_000_D_4_ 3 -1 0 1 0 -1 -1 1 0 21 - 326 CLK_000_D_3_ 3 -1 5 1 0 -1 -1 1 0 21 - 324 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 - 323 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 319 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 316 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21 - 315 CLK_000_D_11_ 3 -1 7 1 7 -1 -1 1 0 21 - 314 CLK_000_D_10_ 3 -1 2 1 7 -1 -1 1 0 21 + 370 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 326 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 327 CLK_000_D_0_ 3 -1 5 5 2 3 5 6 7 -1 -1 1 0 21 + 322 CLK_000_D_1_ 3 -1 7 5 2 3 5 6 7 -1 -1 1 0 21 + 307 inst_AS_030_D0 3 -1 5 5 0 3 4 5 7 -1 -1 1 0 21 + 296 N_162_i 3 -1 7 4 0 3 5 7 -1 -1 1 0 21 + 358 SM_AMIGA_i_7_ 3 -1 2 3 0 5 7 -1 -1 3 0 21 + 353 SM_AMIGA_3_ 3 -1 2 3 2 3 5 -1 -1 3 0 21 + 351 SM_AMIGA_1_ 3 -1 2 3 2 5 7 -1 -1 3 0 21 + 344 SM_AMIGA_6_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 316 SIZE_DMA_1_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 + 315 SIZE_DMA_0_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 + 311 inst_AS_000_DMA 3 -1 0 3 0 1 7 -1 -1 2 0 21 + 308 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 2 0 21 + 321 inst_CLK_OUT_PRE_D 3 -1 1 3 0 1 6 -1 -1 1 0 21 + 354 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 352 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 346 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 345 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 343 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 320 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 313 CYCLE_DMA_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 304 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 303 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 302 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 301 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 341 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 + 305 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 300 pos_clk_un24_bgack_030_int_i_0_i_n 3 -1 0 2 0 1 -1 -1 2 0 21 + 355 N_161_i 3 -1 7 2 2 6 -1 -1 1 0 21 + 332 CLK_000_D_2_ 3 -1 7 2 3 5 -1 -1 1 0 21 + 324 CLK_000_D_11_ 3 -1 1 2 2 7 -1 -1 1 0 21 + 323 CLK_000_D_10_ 3 -1 2 2 1 7 -1 -1 1 0 21 + 312 inst_DS_000_DMA 3 -1 0 2 0 1 -1 -1 1 0 21 + 310 inst_BGACK_030_INT_D 3 -1 7 2 0 6 -1 -1 1 0 21 + 374 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 372 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 371 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 369 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 368 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 364 sm_amiga_nss_i_0_5_0__n 3 -1 5 1 2 -1 -1 3 0 21 + 363 sm_amiga_nss_i_0_1_0__n 3 -1 2 1 2 -1 -1 3 0 21 + 347 RST_DLY_0_ 3 -1 6 1 6 -1 -1 3 0 21 + 314 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 376 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 375 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 373 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 367 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 366 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 360 G_117 3 -1 5 1 6 -1 -1 2 0 21 + 359 G_116 3 -1 1 1 6 -1 -1 2 0 21 + 357 N_189_i 3 -1 3 1 2 -1 -1 2 0 21 + 350 inst_CLK_030_H 3 -1 1 1 1 -1 -1 2 0 21 + 349 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 348 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 0 21 + 342 pos_clk_ipl_n 3 -1 6 1 1 -1 -1 2 0 21 + 317 N_218_i 3 -1 3 1 2 -1 -1 2 0 21 + 309 N_225_i 3 -1 6 1 6 -1 -1 2 0 21 + 299 N_310_i 3 -1 7 1 5 -1 -1 2 0 21 + 294 ds_000_dma_0_un0_n 3 -1 1 1 0 -1 -1 2 0 21 + 293 ds_000_dma_0_un1_n 3 -1 1 1 0 -1 -1 2 0 21 + 365 N_393 3 -1 4 1 0 -1 -1 1 0 21 + 362 N_332 3 -1 7 1 2 -1 -1 1 0 21 + 361 N_376 3 -1 7 1 2 -1 -1 1 0 21 + 356 N_175_i 3 -1 3 1 6 -1 -1 1 0 21 + 340 CLK_000_D_12_ 3 -1 2 1 7 -1 -1 1 0 21 + 339 CLK_000_D_9_ 3 -1 5 1 2 -1 -1 1 0 21 + 338 CLK_000_D_8_ 3 -1 3 1 5 -1 -1 1 0 21 + 337 CLK_000_D_7_ 3 -1 5 1 3 -1 -1 1 0 21 + 336 CLK_000_D_6_ 3 -1 5 1 5 -1 -1 1 0 21 + 335 CLK_000_D_5_ 3 -1 6 1 5 -1 -1 1 0 21 + 334 CLK_000_D_4_ 3 -1 5 1 6 -1 -1 1 0 21 + 333 CLK_000_D_3_ 3 -1 3 1 5 -1 -1 1 0 21 + 331 IPL_D0_2_ 3 -1 6 1 6 -1 -1 1 0 21 + 330 IPL_D0_1_ 3 -1 4 1 5 -1 -1 1 0 21 + 329 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 + 328 inst_CLK_OUT_PRE_50 3 -1 1 1 1 -1 -1 1 0 21 + 325 inst_DTACK_D0 3 -1 0 1 3 -1 -1 1 0 21 + 318 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21 + 298 N_169_0 3 -1 0 1 7 -1 -1 1 0 21 + 297 N_307_i 3 -1 1 1 0 -1 -1 1 0 21 + 295 N_264_i 3 -1 3 1 3 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 3 1 4 5 55 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 63 CLK_030 1 -1 -1 2 2 7 63 -1 + 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 + 63 CLK_030 1 -1 -1 2 0 1 63 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 10 CLK_000 1 -1 -1 2 0 3 10 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 59 A_1_ 1 -1 -1 1 1 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 + 59 A_1_ 1 -1 -1 1 0 59 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 5 10 -1 +149 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 + 79 RW_000 5 375 7 3 3 4 6 79 -1 3 0 21 + 68 A_0_ 5 371 6 2 1 3 68 -1 3 0 21 + 70 RW 5 380 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 377 7 0 82 -1 3 0 21 + 28 BG_000 5 376 3 0 28 -1 3 0 21 + 80 DSACK1 5 378 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 379 3 0 34 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 8 IPL_030_2_ 5 374 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 373 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 372 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 377 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 332 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 353 SM_AMIGA_6_ 3 -1 5 5 0 1 3 5 7 -1 -1 3 0 21 + 333 CLK_000_D_0_ 3 -1 5 5 0 2 3 5 7 -1 -1 1 0 21 + 327 CLK_000_D_1_ 3 -1 7 5 0 2 3 5 7 -1 -1 1 0 21 + 310 inst_AS_030_D0 3 -1 7 5 0 2 4 6 7 -1 -1 1 0 21 + 366 SM_AMIGA_i_7_ 3 -1 5 4 0 2 5 7 -1 -1 3 0 21 + 328 N_313_i 3 -1 7 4 1 5 6 7 -1 -1 1 0 21 + 354 SM_AMIGA_0_ 3 -1 7 3 2 5 7 -1 -1 3 0 21 + 306 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 + 313 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 2 0 21 + 314 inst_BGACK_030_INT_D 3 -1 7 3 0 2 6 -1 -1 1 0 21 + 362 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 361 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 359 inst_BG_000_PRE 3 -1 6 2 3 6 -1 -1 3 0 21 + 355 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 324 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 321 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 319 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 317 CYCLE_DMA_0_ 3 -1 2 2 1 2 -1 -1 3 0 21 + 307 cpu_est_2_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 304 cpu_est_0_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 303 cpu_est_3_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 379 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21 + 363 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 2 0 21 + 352 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21 + 350 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 316 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 2 0 21 + 315 inst_AS_000_DMA 3 -1 3 2 3 7 -1 -1 2 0 21 + 308 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 + 368 N_121_i 3 -1 7 2 0 3 -1 -1 1 0 21 + 329 CLK_000_D_10_ 3 -1 2 2 4 6 -1 -1 1 0 21 + 325 inst_CLK_OUT_PRE_D 3 -1 6 2 1 6 -1 -1 1 0 21 + 376 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 375 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 371 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 367 N_302_i_1 3 -1 3 1 3 -1 -1 3 0 21 + 365 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 364 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21 + 356 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 + 341 N_244_i 3 -1 0 1 5 -1 -1 3 0 21 + 320 N_131_0 3 -1 5 1 2 -1 -1 3 0 21 + 318 CYCLE_DMA_1_ 3 -1 1 1 1 -1 -1 3 0 21 + 312 N_138_0 3 -1 6 1 7 -1 -1 3 0 21 + 293 cpu_est_2_2__n 3 -1 6 1 0 -1 -1 3 0 21 + 380 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 378 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 374 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 373 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 372 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 370 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 360 inst_CLK_030_H 3 -1 3 1 3 -1 -1 2 0 21 + 358 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 + 357 RST_DLY_1_ 3 -1 3 1 3 -1 -1 2 0 21 + 351 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21 + 349 N_248_i 3 -1 1 1 1 -1 -1 2 0 21 + 347 N_247_i 3 -1 1 1 1 -1 -1 2 0 21 + 323 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 309 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 305 pos_clk_un22_bgack_030_int_i_0_0_n 3 -1 1 1 3 -1 -1 2 0 21 + 302 N_252_i 3 -1 5 1 5 -1 -1 2 0 21 + 301 N_253_i 3 -1 5 1 5 -1 -1 2 0 21 + 300 ds_000_dma_0_un1_n 3 -1 3 1 2 -1 -1 2 0 21 + 299 N_242_i 3 -1 0 1 5 -1 -1 2 0 21 + 298 ds_000_dma_0_un3_n 3 -1 3 1 2 -1 -1 2 0 21 + 296 pos_clk_un24_clk_000_pe_n 3 -1 0 1 3 -1 -1 2 0 21 + 295 N_238_i 3 -1 7 1 5 -1 -1 2 0 21 + 369 N_270 3 -1 0 1 0 -1 -1 1 0 21 + 348 CLK_000_D_12_ 3 -1 6 1 6 -1 -1 1 0 21 + 346 CLK_000_D_9_ 3 -1 6 1 2 -1 -1 1 0 21 + 345 CLK_000_D_8_ 3 -1 5 1 6 -1 -1 1 0 21 + 344 CLK_000_D_7_ 3 -1 2 1 5 -1 -1 1 0 21 + 343 CLK_000_D_6_ 3 -1 6 1 2 -1 -1 1 0 21 + 342 CLK_000_D_5_ 3 -1 2 1 6 -1 -1 1 0 21 + 340 CLK_000_D_4_ 3 -1 0 1 2 -1 -1 1 0 21 + 339 CLK_000_D_3_ 3 -1 5 1 0 -1 -1 1 0 21 + 338 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 337 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 336 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 335 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 334 inst_CLK_OUT_PRE_50 3 -1 6 1 6 -1 -1 1 0 21 + 331 inst_DTACK_D0 3 -1 5 1 0 -1 -1 1 0 21 + 330 CLK_000_D_11_ 3 -1 4 1 6 -1 -1 1 0 21 + 326 N_262_i 3 -1 6 1 1 -1 -1 1 0 21 + 322 inst_VPA_D 3 -1 2 1 0 -1 -1 1 0 21 + 311 N_372_i_0 3 -1 7 1 0 -1 -1 1 0 21 + 297 N_265_i 3 -1 5 1 5 -1 -1 1 0 21 + 294 N_254_i 3 -1 5 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 63 CLK_030 1 -1 -1 2 3 6 63 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 2 35 -1 + 29 DTACK 1 -1 -1 1 5 29 -1 + 20 BG_030 1 -1 -1 1 6 20 -1 + 10 CLK_000 1 -1 -1 1 5 10 -1 +147 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 1 5 7 40 -1 1 0 21 + 79 RW_000 5 373 7 3 4 5 6 79 -1 3 0 21 + 70 RW 5 378 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 + 68 A_0_ 5 369 6 1 5 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 375 7 0 82 -1 3 0 21 + 80 DSACK1 5 376 7 0 80 -1 3 0 21 + 34 VMA 5 377 3 0 34 -1 3 0 21 + 28 BG_000 5 374 3 0 28 -1 3 0 21 + 8 IPL_030_2_ 5 372 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 371 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 370 1 0 6 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 375 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 329 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 330 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 325 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 309 inst_AS_030_D0 3 -1 7 5 0 1 3 4 7 -1 -1 1 0 21 + 356 SM_AMIGA_1_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21 + 349 SM_AMIGA_6_ 3 -1 0 4 0 1 5 7 -1 -1 3 0 21 + 362 pos_clk_bgack_030_int_pre5_i_n 3 -1 7 4 2 3 5 7 -1 -1 1 0 21 + 357 SM_AMIGA_5_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 + 350 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 3 0 21 + 302 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 314 inst_AS_000_DMA 3 -1 6 3 5 6 7 -1 -1 2 0 21 + 327 CLK_000_D_11_ 3 -1 4 3 0 1 7 -1 -1 1 0 21 + 312 inst_BGACK_030_INT_D 3 -1 5 3 0 2 6 -1 -1 1 0 21 + 365 S0__clk_un22_bgack_030_int_i_0_i 3 -1 2 2 5 6 -1 -1 3 0 21 + 364 SM_AMIGA_i_7_ 3 -1 2 2 0 7 -1 -1 3 0 21 + 359 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 352 RST_DLY_0_ 3 -1 2 2 2 6 -1 -1 3 0 21 + 351 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 323 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 319 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 317 CYCLE_DMA_0_ 3 -1 6 2 2 6 -1 -1 3 0 21 + 315 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 3 0 21 + 303 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 301 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 358 SM_AMIGA_3_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 354 RST_DLY_2_ 3 -1 2 2 2 6 -1 -1 2 0 21 + 353 RST_DLY_1_ 3 -1 2 2 2 6 -1 -1 2 0 21 + 347 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 2 0 21 + 345 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 322 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 311 N_325_i 3 -1 3 2 0 2 -1 -1 2 0 21 + 310 inst_AS_030_000_SYNC 3 -1 0 2 0 3 -1 -1 2 0 21 + 305 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 304 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 2 0 21 + 367 N_310_i 3 -1 7 2 2 3 -1 -1 1 0 21 + 336 CLK_000_D_2_ 3 -1 7 2 0 5 -1 -1 1 0 21 + 331 inst_CLK_OUT_PRE_50 3 -1 0 2 0 5 -1 -1 1 0 21 + 326 CLK_000_D_10_ 3 -1 5 2 1 4 -1 -1 1 0 21 + 324 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21 + 321 inst_VPA_D 3 -1 0 2 3 6 -1 -1 1 0 21 + 377 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 376 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 374 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 373 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 372 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 369 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 366 cpu_est_0_2__un0_n 3 -1 3 1 3 -1 -1 3 0 21 + 360 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 318 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21 + 308 N_324_i 3 -1 0 1 2 -1 -1 3 0 21 + 306 N_80_i 3 -1 5 1 2 -1 -1 3 0 21 + 294 N_314 3 -1 5 1 0 -1 -1 3 0 21 + 378 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 368 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 361 N_303_0 3 -1 6 1 5 -1 -1 2 0 21 + 355 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21 + 348 N_246_i 3 -1 1 1 1 -1 -1 2 0 21 + 346 N_245_i 3 -1 1 1 1 -1 -1 2 0 21 + 316 N_112_i 3 -1 6 1 2 -1 -1 2 0 21 + 307 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 299 N_341_i 3 -1 1 1 7 -1 -1 2 0 21 + 298 vma_int_0_un3_n 3 -1 6 1 3 -1 -1 2 0 21 + 297 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21 + 296 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 295 N_191_i 3 -1 7 1 2 -1 -1 2 0 21 + 293 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 363 N_319_i 3 -1 3 1 0 -1 -1 1 0 21 + 344 CLK_000_D_12_ 3 -1 0 1 7 -1 -1 1 0 21 + 343 CLK_000_D_9_ 3 -1 2 1 5 -1 -1 1 0 21 + 342 CLK_000_D_8_ 3 -1 5 1 2 -1 -1 1 0 21 + 341 CLK_000_D_7_ 3 -1 2 1 5 -1 -1 1 0 21 + 340 CLK_000_D_6_ 3 -1 3 1 2 -1 -1 1 0 21 + 339 CLK_000_D_5_ 3 -1 5 1 3 -1 -1 1 0 21 + 338 CLK_000_D_4_ 3 -1 6 1 5 -1 -1 1 0 21 + 337 CLK_000_D_3_ 3 -1 5 1 6 -1 -1 1 0 21 + 335 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 + 334 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 333 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 + 332 N_297_i 3 -1 3 1 0 -1 -1 1 0 21 + 328 inst_DTACK_D0 3 -1 1 1 3 -1 -1 1 0 21 + 313 N_326_i 3 -1 0 1 2 -1 -1 1 0 21 + 300 pos_clk_un28_as_030_d0_i_n 3 -1 7 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 63 CLK_030 1 -1 -1 2 1 6 63 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 +137 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 363 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 368 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 5 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 5 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 28 BG_000 0 3 0 28 -1 4 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 4 0 21 + 82 BGACK_030 0 7 0 82 -1 3 0 21 + 68 A_0_ 5 359 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 365 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 + 325 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 320 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 306 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 326 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 321 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 361 RN_IPL_030_0_ 3 7 1 1 1 7 -1 5 0 21 + 360 RN_IPL_030_1_ 3 6 1 1 1 6 -1 5 0 21 + 357 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 5 0 21 + 366 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 364 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 363 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21 + 356 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21 + 342 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 312 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 301 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 299 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21 + 296 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 295 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21 + 293 ipl_030_0_0__un1_n 3 -1 -1 1 1 -1 -1 4 0 21 + 367 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 359 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 351 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 345 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 344 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 316 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 315 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 300 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 368 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 358 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 343 N_246_i 3 -1 -1 1 1 -1 -1 2 0 21 + 318 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 311 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21 + 303 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 297 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21 + 340 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 331 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 329 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 + 323 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 322 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 309 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 302 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21 + 353 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 5 0 21 + 355 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 354 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 -1 0 -1 -1 4 0 21 + 347 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 314 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 304 N_80_i 3 -1 -1 0 -1 -1 4 0 21 + 352 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 346 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 313 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 350 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 349 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 348 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21 + 341 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 308 N_325_i 3 -1 -1 0 -1 -1 2 0 21 + 307 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 305 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 294 N_191_i 3 -1 -1 0 -1 -1 2 0 21 + 339 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 338 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 337 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 336 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 335 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 334 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 333 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 332 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 330 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21 + 328 N_297_i 3 -1 -1 0 -1 -1 1 0 21 + 327 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 324 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 317 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21 + 310 N_326_i 3 -1 -1 0 -1 -1 1 0 21 + 298 pos_clk_un28_as_030_d0_i_n 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 55 IPL_1_ 1 -1 -1 0 55 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +137 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 363 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 368 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 5 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 5 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 28 BG_000 0 3 0 28 -1 4 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 4 0 21 + 82 BGACK_030 0 7 0 82 -1 3 0 21 + 68 A_0_ 5 359 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 365 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 + 325 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 320 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 306 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 326 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 321 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 361 RN_IPL_030_0_ 3 7 1 1 1 7 -1 5 0 21 + 360 RN_IPL_030_1_ 3 6 1 1 1 6 -1 5 0 21 + 357 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 5 0 21 + 366 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 364 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 363 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 362 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21 + 356 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21 + 342 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 312 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 301 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 299 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21 + 296 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 295 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21 + 293 ipl_030_0_0__un1_n 3 -1 -1 1 1 -1 -1 4 0 21 + 367 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 359 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 351 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 345 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 344 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 316 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 315 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 300 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 368 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 358 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 343 N_246_i 3 -1 -1 1 1 -1 -1 2 0 21 + 318 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 311 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21 + 303 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 297 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21 + 340 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 331 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 329 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 + 323 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 322 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 309 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 302 cpu_est_2_ 3 -1 -1 1 3 -1 -1 1 1 21 + 353 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 5 0 21 + 355 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 354 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 -1 0 -1 -1 4 0 21 + 347 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 314 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 304 N_80_i 3 -1 -1 0 -1 -1 4 0 21 + 352 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 346 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 313 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 350 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 349 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 348 RST_DLY_1_ 3 -1 -1 0 -1 -1 2 1 21 + 341 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 308 N_325_i 3 -1 -1 0 -1 -1 2 0 21 + 307 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 305 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 294 N_191_i 3 -1 -1 0 -1 -1 2 0 21 + 339 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 338 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 337 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 336 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 335 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 334 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 333 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 332 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 330 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21 + 328 N_297_i 3 -1 -1 0 -1 -1 1 0 21 + 327 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 324 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 317 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21 + 310 N_326_i 3 -1 -1 0 -1 -1 1 0 21 + 298 pos_clk_un28_as_030_d0_i_n 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 55 IPL_1_ 1 -1 -1 0 55 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +139 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 365 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 370 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 28 BG_000 0 3 0 28 -1 4 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 4 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 4 0 21 + 82 BGACK_030 0 7 0 82 -1 3 0 21 + 68 A_0_ 5 361 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 367 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 + 326 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 321 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 307 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 327 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 322 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 366 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 365 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 364 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21 + 363 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21 + 358 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 4 0 21 + 357 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21 + 343 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 313 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 303 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21 + 302 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 300 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21 + 297 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 296 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21 + 295 ipl_030_0_1__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 293 ipl_030_0_0__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 369 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 361 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 352 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 346 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 345 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 320 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 317 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 316 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 301 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 370 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 360 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 344 N_246_i 3 -1 -1 1 1 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 312 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21 + 304 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 298 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21 + 341 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 332 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 330 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 + 324 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 323 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 310 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 356 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 355 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 -1 0 -1 -1 4 0 21 + 354 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21 + 349 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21 + 348 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 315 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 305 N_80_i 3 -1 -1 0 -1 -1 4 0 21 + 353 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 347 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 314 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 351 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 350 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 309 N_325_i 3 -1 -1 0 -1 -1 2 0 21 + 308 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 294 N_191_i 3 -1 -1 0 -1 -1 2 0 21 + 359 N_310_i 3 -1 -1 0 -1 -1 1 0 21 + 340 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 339 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 338 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 337 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 336 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 335 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 334 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 333 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 331 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21 + 329 N_297_i 3 -1 -1 0 -1 -1 1 0 21 + 328 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 325 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 318 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21 + 311 N_326_i 3 -1 -1 0 -1 -1 1 0 21 + 299 pos_clk_un28_as_030_d0_i_n 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 55 IPL_1_ 1 -1 -1 0 55 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +139 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 365 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 370 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 28 BG_000 0 3 0 28 -1 4 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 4 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 4 0 21 + 82 BGACK_030 0 7 0 82 -1 3 0 21 + 68 A_0_ 5 361 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 367 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 + 326 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 321 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 307 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 327 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 322 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 366 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 365 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 364 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21 + 363 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21 + 358 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 4 0 21 + 357 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21 + 343 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 313 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 303 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21 + 302 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 300 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21 + 297 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 296 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21 + 295 ipl_030_0_1__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 293 ipl_030_0_0__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 369 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 361 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 352 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 346 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 345 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 320 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 317 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 316 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 301 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 370 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 360 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 344 N_246_i 3 -1 -1 1 1 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 312 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21 + 304 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 298 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21 + 341 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 332 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 330 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 + 324 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 323 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 310 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 356 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 355 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 -1 0 -1 -1 4 0 21 + 354 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21 + 349 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21 + 348 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 315 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 305 N_80_i 3 -1 -1 0 -1 -1 4 0 21 + 353 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 347 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 314 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 351 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 350 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 309 N_325_i 3 -1 -1 0 -1 -1 2 0 21 + 308 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 294 N_191_i 3 -1 -1 0 -1 -1 2 0 21 + 359 N_310_i 3 -1 -1 0 -1 -1 1 0 21 + 340 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 339 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 338 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 337 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 336 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 335 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 334 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 333 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 331 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21 + 329 N_297_i 3 -1 -1 0 -1 -1 1 0 21 + 328 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 325 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 318 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21 + 311 N_326_i 3 -1 -1 0 -1 -1 1 0 21 + 299 pos_clk_un28_as_030_d0_i_n 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 55 IPL_1_ 1 -1 -1 0 55 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +139 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 365 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 370 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 28 BG_000 0 3 0 28 -1 4 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 4 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 4 0 21 + 82 BGACK_030 0 7 0 82 -1 3 0 21 + 68 A_0_ 5 361 6 0 68 -1 3 0 21 + 34 VMA 0 3 0 34 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 367 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 0 21 + 326 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 321 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 307 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 327 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 322 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 368 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 366 RN_BG_000 3 28 3 1 3 28 -1 4 0 21 + 365 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 364 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21 + 363 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21 + 358 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 4 0 21 + 357 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 4 0 21 + 343 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 313 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 303 cpu_est_2_ 3 -1 -1 1 3 -1 -1 4 0 21 + 302 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 300 cpu_est_3_ 3 -1 -1 1 3 -1 -1 4 0 21 + 297 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 296 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21 + 295 ipl_030_0_1__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 293 ipl_030_0_0__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 369 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 361 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 352 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 346 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 345 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 320 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 317 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 316 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 301 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 370 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 362 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 360 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 344 N_246_i 3 -1 -1 1 1 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 312 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21 + 304 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 298 vma_int_0_un3_n 3 -1 -1 1 3 -1 -1 2 0 21 + 341 CLK_000_D_12_ 3 -1 -1 1 7 -1 -1 1 0 21 + 332 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 330 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 + 324 CLK_000_D_11_ 3 -1 -1 1 7 -1 -1 1 0 21 + 323 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 310 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 356 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 355 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 -1 0 -1 -1 4 0 21 + 354 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 0 21 + 349 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21 + 348 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 315 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 305 N_80_i 3 -1 -1 0 -1 -1 4 0 21 + 353 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 347 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 314 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 351 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 350 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 309 N_325_i 3 -1 -1 0 -1 -1 2 0 21 + 308 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 294 N_191_i 3 -1 -1 0 -1 -1 2 0 21 + 359 N_310_i 3 -1 -1 0 -1 -1 1 0 21 + 340 CLK_000_D_9_ 3 -1 -1 0 -1 -1 1 0 21 + 339 CLK_000_D_8_ 3 -1 -1 0 -1 -1 1 0 21 + 338 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 337 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 336 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 335 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 334 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 333 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 331 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21 + 329 N_297_i 3 -1 -1 0 -1 -1 1 0 21 + 328 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 325 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 318 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21 + 311 N_326_i 3 -1 -1 0 -1 -1 1 0 21 + 299 pos_clk_un28_as_030_d0_i_n 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 55 IPL_1_ 1 -1 -1 0 55 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +147 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 1 5 7 40 -1 1 0 21 + 79 RW_000 5 373 7 3 4 5 6 79 -1 3 0 21 + 70 RW 5 378 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 + 68 A_0_ 5 369 6 1 5 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 375 7 0 82 -1 3 0 21 + 80 DSACK1 5 376 7 0 80 -1 3 0 21 + 34 VMA 5 377 3 0 34 -1 3 0 21 + 28 BG_000 5 374 3 0 28 -1 3 0 21 + 8 IPL_030_2_ 5 372 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 371 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 370 1 0 6 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 375 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 329 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 330 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 325 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 309 inst_AS_030_D0 3 -1 7 5 0 1 3 4 7 -1 -1 1 0 21 + 356 SM_AMIGA_1_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21 + 349 SM_AMIGA_6_ 3 -1 0 4 0 1 5 7 -1 -1 3 0 21 + 362 pos_clk_bgack_030_int_pre5_i_n 3 -1 7 4 2 3 5 7 -1 -1 1 0 21 + 357 SM_AMIGA_5_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 + 350 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 3 0 21 + 302 cpu_est_0_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 314 inst_AS_000_DMA 3 -1 6 3 5 6 7 -1 -1 2 0 21 + 327 CLK_000_D_11_ 3 -1 4 3 0 1 7 -1 -1 1 0 21 + 312 inst_BGACK_030_INT_D 3 -1 5 3 0 2 6 -1 -1 1 0 21 + 365 S0__clk_un22_bgack_030_int_i_0_i 3 -1 2 2 5 6 -1 -1 3 0 21 + 364 SM_AMIGA_i_7_ 3 -1 2 2 0 7 -1 -1 3 0 21 + 359 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 352 RST_DLY_0_ 3 -1 2 2 2 6 -1 -1 3 0 21 + 351 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 323 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 319 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 317 CYCLE_DMA_0_ 3 -1 6 2 2 6 -1 -1 3 0 21 + 315 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 3 0 21 + 303 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 301 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 358 SM_AMIGA_3_ 3 -1 0 2 0 3 -1 -1 2 0 21 + 354 RST_DLY_2_ 3 -1 2 2 2 6 -1 -1 2 0 21 + 353 RST_DLY_1_ 3 -1 2 2 2 6 -1 -1 2 0 21 + 347 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 2 0 21 + 345 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 322 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 311 N_325_i 3 -1 3 2 0 2 -1 -1 2 0 21 + 310 inst_AS_030_000_SYNC 3 -1 0 2 0 3 -1 -1 2 0 21 + 305 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 304 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 2 0 21 + 367 N_310_i 3 -1 7 2 2 3 -1 -1 1 0 21 + 336 CLK_000_D_2_ 3 -1 7 2 0 5 -1 -1 1 0 21 + 331 inst_CLK_OUT_PRE_50 3 -1 0 2 0 5 -1 -1 1 0 21 + 326 CLK_000_D_10_ 3 -1 5 2 1 4 -1 -1 1 0 21 + 324 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21 + 321 inst_VPA_D 3 -1 0 2 3 6 -1 -1 1 0 21 + 377 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 376 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 374 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 373 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 372 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 369 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 366 cpu_est_0_2__un0_n 3 -1 3 1 3 -1 -1 3 0 21 + 360 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 318 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21 + 308 N_324_i 3 -1 0 1 2 -1 -1 3 0 21 + 306 N_80_i 3 -1 5 1 2 -1 -1 3 0 21 + 294 N_314 3 -1 5 1 0 -1 -1 3 0 21 + 378 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 368 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 361 N_303_0 3 -1 6 1 5 -1 -1 2 0 21 + 355 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21 + 348 N_246_i 3 -1 1 1 1 -1 -1 2 0 21 + 346 N_245_i 3 -1 1 1 1 -1 -1 2 0 21 + 316 N_112_i 3 -1 6 1 2 -1 -1 2 0 21 + 307 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 299 N_341_i 3 -1 1 1 7 -1 -1 2 0 21 + 298 vma_int_0_un3_n 3 -1 6 1 3 -1 -1 2 0 21 + 297 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21 + 296 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 295 N_191_i 3 -1 7 1 2 -1 -1 2 0 21 + 293 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 363 N_319_i 3 -1 3 1 0 -1 -1 1 0 21 + 344 CLK_000_D_12_ 3 -1 0 1 7 -1 -1 1 0 21 + 343 CLK_000_D_9_ 3 -1 2 1 5 -1 -1 1 0 21 + 342 CLK_000_D_8_ 3 -1 5 1 2 -1 -1 1 0 21 + 341 CLK_000_D_7_ 3 -1 2 1 5 -1 -1 1 0 21 + 340 CLK_000_D_6_ 3 -1 3 1 2 -1 -1 1 0 21 + 339 CLK_000_D_5_ 3 -1 5 1 3 -1 -1 1 0 21 + 338 CLK_000_D_4_ 3 -1 6 1 5 -1 -1 1 0 21 + 337 CLK_000_D_3_ 3 -1 5 1 6 -1 -1 1 0 21 + 335 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 + 334 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 333 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 + 332 N_297_i 3 -1 3 1 0 -1 -1 1 0 21 + 328 inst_DTACK_D0 3 -1 1 1 3 -1 -1 1 0 21 + 313 N_326_i 3 -1 0 1 2 -1 -1 1 0 21 + 300 pos_clk_un28_as_030_d0_i_n 3 -1 7 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 63 CLK_030 1 -1 -1 2 1 6 63 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 +148 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 4 5 6 7 41 -1 1 0 21 + 79 RW_000 5 374 7 3 2 4 6 79 -1 3 0 21 + 40 BERR 5 -1 4 3 0 5 7 40 -1 1 0 21 + 70 RW 5 379 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 68 A_0_ 5 370 6 1 1 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 376 7 0 82 -1 3 0 21 + 34 VMA 5 378 3 0 34 -1 3 0 21 + 28 BG_000 5 375 3 0 28 -1 3 0 21 + 8 IPL_030_2_ 5 373 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 372 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 371 1 0 6 -1 3 0 21 + 80 DSACK1 5 377 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 376 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 329 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 330 CLK_000_D_0_ 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21 + 324 CLK_000_D_1_ 3 -1 7 5 0 2 3 5 7 -1 -1 1 0 21 + 353 SM_AMIGA_1_ 3 -1 0 4 0 2 5 6 -1 -1 3 0 21 + 307 inst_AS_030_D0 3 -1 4 4 3 4 5 7 -1 -1 1 0 21 + 354 SM_AMIGA_5_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 + 347 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 346 SM_AMIGA_6_ 3 -1 5 3 1 5 7 -1 -1 3 0 21 + 304 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 + 301 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 + 300 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 + 355 SM_AMIGA_3_ 3 -1 2 3 0 2 5 -1 -1 2 0 21 + 310 inst_BGACK_030_INT_D 3 -1 4 3 3 5 6 -1 -1 1 0 21 + 295 pos_clk_bgack_030_int_pre5_i_n 3 -1 7 3 3 5 7 -1 -1 1 0 21 + 378 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 359 SM_AMIGA_i_7_ 3 -1 2 2 5 7 -1 -1 3 0 21 + 356 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 349 RST_DLY_0_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 348 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 345 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 321 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 317 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 315 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 303 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 364 N_238 3 -1 0 2 2 5 -1 -1 2 0 21 + 350 RST_DLY_1_ 3 -1 2 2 0 2 -1 -1 2 0 21 + 332 inst_CLK_OUT_PRE_25 3 -1 0 2 0 3 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 312 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 2 0 21 + 311 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 2 0 21 + 308 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 2 0 21 + 306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 305 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 363 N_107_i 3 -1 7 2 0 3 -1 -1 1 0 21 + 337 CLK_000_D_2_ 3 -1 7 2 4 5 -1 -1 1 0 21 + 326 CLK_000_D_9_ 3 -1 2 2 5 6 -1 -1 1 0 21 + 325 CLK_000_D_8_ 3 -1 5 2 2 6 -1 -1 1 0 21 + 323 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 + 318 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 + 375 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 374 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 373 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 371 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 370 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 357 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 334 N_240_i 3 -1 0 1 2 -1 -1 3 0 21 + 316 N_322_i 3 -1 5 1 2 -1 -1 3 0 21 + 314 CYCLE_DMA_1_ 3 -1 5 1 5 -1 -1 3 0 21 + 313 CYCLE_DMA_0_ 3 -1 5 1 5 -1 -1 3 0 21 + 298 N_215_i 3 -1 6 1 7 -1 -1 3 0 21 + 379 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 377 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 369 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 367 S0__clk_un22_bgack_030_int_i_0_i 3 -1 5 1 6 -1 -1 2 0 21 + 361 G_117 3 -1 1 1 1 -1 -1 2 0 21 + 360 G_116 3 -1 1 1 1 -1 -1 2 0 21 + 358 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 6 1 2 -1 -1 2 0 21 + 352 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21 + 351 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 + 344 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21 + 327 N_226_i 3 -1 0 1 2 -1 -1 2 0 21 + 319 N_251_i 3 -1 0 1 2 -1 -1 2 0 21 + 302 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 299 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 297 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21 + 296 N_336_i 3 -1 5 1 5 -1 -1 2 0 21 + 294 ds_000_dma_0_un1_n 3 -1 2 1 1 -1 -1 2 0 21 + 293 ds_000_dma_0_un3_n 3 -1 2 1 1 -1 -1 2 0 21 + 368 N_342 3 -1 3 1 0 -1 -1 1 0 21 + 366 N_361 3 -1 4 1 5 -1 -1 1 0 21 + 365 N_332 3 -1 7 1 2 -1 -1 1 0 21 + 362 N_154_i 3 -1 3 1 0 -1 -1 1 0 21 + 343 CLK_000_D_10_ 3 -1 5 1 6 -1 -1 1 0 21 + 342 CLK_000_D_7_ 3 -1 0 1 5 -1 -1 1 0 21 + 341 CLK_000_D_6_ 3 -1 6 1 0 -1 -1 1 0 21 + 340 CLK_000_D_5_ 3 -1 2 1 6 -1 -1 1 0 21 + 339 CLK_000_D_4_ 3 -1 3 1 2 -1 -1 1 0 21 + 338 CLK_000_D_3_ 3 -1 4 1 3 -1 -1 1 0 21 + 336 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 335 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 333 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 + 331 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 + 328 inst_DTACK_D0 3 -1 3 1 0 -1 -1 1 0 21 + 322 N_253_i 3 -1 5 1 2 -1 -1 1 0 21 + 309 vma_int_0_un1_n 3 -1 3 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 + 63 CLK_030 1 -1 -1 2 2 6 63 -1 + 59 A_1_ 1 -1 -1 2 3 6 59 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 3 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 +150 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 4 5 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 + 79 RW_000 5 376 7 2 4 6 79 -1 3 0 21 + 70 RW 5 381 6 2 6 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 68 A_0_ 5 372 6 1 1 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 378 7 0 82 -1 3 0 21 + 80 DSACK1 5 379 7 0 80 -1 3 0 21 + 34 VMA 5 380 3 0 34 -1 3 0 21 + 28 BG_000 5 377 3 0 28 -1 3 0 21 + 8 IPL_030_2_ 5 375 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 374 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 373 1 0 6 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 378 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 331 inst_RESET_OUT 3 -1 2 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 332 CLK_000_D_0_ 3 -1 5 6 0 2 3 5 6 7 -1 -1 1 0 21 + 326 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 + 349 SM_AMIGA_6_ 3 -1 2 5 1 2 5 6 7 -1 -1 3 0 21 + 350 SM_AMIGA_0_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21 + 308 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 + 296 pos_clk_bgack_030_int_pre5_i_n 3 -1 7 4 0 3 5 7 -1 -1 1 0 21 + 356 SM_AMIGA_1_ 3 -1 5 3 0 5 7 -1 -1 3 0 21 + 351 SM_AMIGA_4_ 3 -1 2 3 0 2 5 -1 -1 3 0 21 + 305 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 + 302 cpu_est_0_ 3 -1 5 3 0 3 5 -1 -1 3 0 21 + 301 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 + 300 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 + 309 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 2 0 21 + 380 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 362 SM_AMIGA_i_7_ 3 -1 5 2 2 7 -1 -1 3 0 21 + 357 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 352 RST_DLY_0_ 3 -1 3 2 2 3 -1 -1 3 0 21 + 348 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 322 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 317 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 316 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 314 CYCLE_DMA_0_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 358 SM_AMIGA_3_ 3 -1 0 2 0 5 -1 -1 2 0 21 + 354 RST_DLY_2_ 3 -1 3 2 2 3 -1 -1 2 0 21 + 353 RST_DLY_1_ 3 -1 2 2 2 3 -1 -1 2 0 21 + 347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 311 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21 + 306 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 365 N_107_i 3 -1 7 2 0 3 -1 -1 1 0 21 + 339 CLK_000_D_2_ 3 -1 0 2 2 5 -1 -1 1 0 21 + 336 IPL_D0_1_ 3 -1 1 2 0 1 -1 -1 1 0 21 + 335 IPL_D0_0_ 3 -1 3 2 1 3 -1 -1 1 0 21 + 328 CLK_000_D_10_ 3 -1 4 2 1 7 -1 -1 1 0 21 + 327 CLK_000_D_9_ 3 -1 1 2 1 4 -1 -1 1 0 21 + 324 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 318 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 + 310 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 + 379 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 377 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 376 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 375 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 374 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 373 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 372 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 360 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 359 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21 + 337 N_240_i 3 -1 0 1 0 -1 -1 3 0 21 + 315 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 381 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 369 N_258 3 -1 3 1 0 -1 -1 2 0 21 + 368 S0__clk_un22_bgack_030_int_i_0_i 3 -1 0 1 6 -1 -1 2 0 21 + 366 N_238 3 -1 0 1 5 -1 -1 2 0 21 + 364 G_117 3 -1 0 1 1 -1 -1 2 0 21 + 363 G_116 3 -1 3 1 1 -1 -1 2 0 21 + 361 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 6 1 6 -1 -1 2 0 21 + 355 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21 + 334 inst_CLK_OUT_PRE_25 3 -1 4 1 4 -1 -1 2 0 21 + 330 N_226_i 3 -1 3 1 2 -1 -1 2 0 21 + 321 N_251_i 3 -1 5 1 5 -1 -1 2 0 21 + 319 N_249_i 3 -1 5 1 5 -1 -1 2 0 21 + 313 vma_int_0_un3_n 3 -1 0 1 3 -1 -1 2 0 21 + 312 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 2 0 21 + 307 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 304 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 303 N_338_i 3 -1 1 1 7 -1 -1 2 0 21 + 299 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 298 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21 + 297 N_336_i 3 -1 6 1 2 -1 -1 2 0 21 + 295 ds_000_dma_0_un1_n 3 -1 6 1 0 -1 -1 2 0 21 + 294 ds_000_dma_0_un3_n 3 -1 6 1 0 -1 -1 2 0 21 + 293 N_252_i 3 -1 2 1 5 -1 -1 2 0 21 + 370 N_342 3 -1 3 1 0 -1 -1 1 0 21 + 367 N_361 3 -1 7 1 2 -1 -1 1 0 21 + 346 CLK_000_D_11_ 3 -1 7 1 7 -1 -1 1 0 21 + 345 CLK_000_D_8_ 3 -1 3 1 1 -1 -1 1 0 21 + 344 CLK_000_D_7_ 3 -1 5 1 3 -1 -1 1 0 21 + 343 CLK_000_D_6_ 3 -1 5 1 5 -1 -1 1 0 21 + 342 CLK_000_D_5_ 3 -1 6 1 5 -1 -1 1 0 21 + 341 CLK_000_D_4_ 3 -1 5 1 6 -1 -1 1 0 21 + 340 CLK_000_D_3_ 3 -1 5 1 5 -1 -1 1 0 21 + 338 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 333 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 329 inst_DTACK_D0 3 -1 5 1 0 -1 -1 1 0 21 + 325 N_253_i 3 -1 5 1 5 -1 -1 1 0 21 + 323 N_337_i 3 -1 5 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 63 CLK_030 1 -1 -1 2 1 6 63 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 5 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 5 10 -1 +147 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 1 4 6 7 41 -1 1 0 21 + 79 RW_000 5 371 7 3 4 5 6 79 -1 3 0 21 + 81 AS_030 5 -1 7 3 2 4 7 81 -1 1 0 21 + 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 + 68 A_0_ 5 377 6 2 0 5 68 -1 3 0 21 + 70 RW 5 376 6 2 5 7 70 -1 2 0 21 + 31 UDS_000 5 -1 3 2 3 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 3 6 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 373 7 0 82 -1 3 0 21 + 80 DSACK1 5 374 7 0 80 -1 3 0 21 + 34 VMA 5 375 3 0 34 -1 3 0 21 + 8 IPL_030_2_ 5 370 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 369 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 378 1 0 6 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 372 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 373 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 329 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 330 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 + 325 CLK_000_D_1_ 3 -1 1 5 0 2 3 5 7 -1 -1 1 0 21 + 344 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 + 310 inst_AS_030_D0 3 -1 2 4 2 3 4 7 -1 -1 1 0 21 + 351 SM_AMIGA_1_ 3 -1 2 3 2 5 7 -1 -1 3 0 21 + 319 SIZE_DMA_0_ 3 -1 3 3 3 6 7 -1 -1 3 0 21 + 356 N_89_i 3 -1 7 3 1 2 7 -1 -1 1 0 21 + 314 inst_BGACK_030_INT_D 3 -1 7 3 2 3 6 -1 -1 1 0 21 + 358 SM_AMIGA_i_7_ 3 -1 5 2 2 7 -1 -1 3 0 21 + 354 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 353 SM_AMIGA_3_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 352 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 346 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 345 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 + 323 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 + 320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 317 CYCLE_DMA_0_ 3 -1 0 2 0 1 -1 -1 3 0 21 + 306 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 302 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 301 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 360 G_118 3 -1 1 2 0 1 -1 -1 2 0 21 + 343 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21 + 332 inst_CLK_OUT_PRE_25 3 -1 0 2 0 4 -1 -1 2 0 21 + 322 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 316 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 2 0 21 + 315 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 2 0 21 + 312 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 2 0 21 + 309 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 307 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 367 N_106_i 3 -1 7 2 3 5 -1 -1 1 0 21 + 336 CLK_000_D_2_ 3 -1 7 2 2 6 -1 -1 1 0 21 + 334 IPL_D0_1_ 3 -1 0 2 0 1 -1 -1 1 0 21 + 333 IPL_D0_0_ 3 -1 0 2 0 1 -1 -1 1 0 21 + 331 inst_CLK_OUT_PRE_50 3 -1 6 2 0 6 -1 -1 1 0 21 + 327 CLK_000_D_8_ 3 -1 5 2 6 7 -1 -1 1 0 21 + 326 CLK_000_D_7_ 3 -1 6 2 5 6 -1 -1 1 0 21 + 324 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 378 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 377 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 375 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 374 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 371 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 370 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 369 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 364 N_241 3 -1 2 1 5 -1 -1 3 0 21 + 362 N_280_i_1 3 -1 0 1 0 -1 -1 3 0 21 + 357 N_143_0 3 -1 5 1 2 -1 -1 3 0 21 + 355 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 348 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 318 CYCLE_DMA_1_ 3 -1 1 1 1 -1 -1 3 0 21 + 305 N_137_0 3 -1 0 1 0 -1 -1 3 0 21 + 304 cpu_est_0_ 3 -1 3 1 3 -1 -1 3 0 21 + 376 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 372 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 368 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 366 K0_lk_un22_bgack_030_int_i_0_o2_ 3 -1 1 1 6 -1 -1 2 0 21 + 359 G_116 3 -1 1 1 1 -1 -1 2 0 21 + 350 inst_CLK_030_H 3 -1 5 1 5 -1 -1 2 0 21 + 349 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 + 347 RST_DLY_0_ 3 -1 0 1 0 -1 -1 2 0 21 + 342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21 + 313 ipl_030_0_0__un1_n 3 -1 0 1 1 -1 -1 2 0 21 + 311 N_245_i 3 -1 7 1 5 -1 -1 2 0 21 + 308 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 303 ipl_030_0_2__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 300 ds_000_dma_0_un1_n 3 -1 5 1 1 -1 -1 2 0 21 + 299 ds_000_dma_0_un3_n 3 -1 5 1 1 -1 -1 2 0 21 + 298 N_166_i 3 -1 3 1 5 -1 -1 2 0 21 + 297 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 6 1 5 -1 -1 2 0 21 + 295 N_338_i 3 -1 6 1 7 -1 -1 2 0 21 + 365 N_322 3 -1 2 1 5 -1 -1 1 0 21 + 363 N_341 3 -1 5 1 5 -1 -1 1 0 21 + 361 N_302 3 -1 7 1 5 -1 -1 1 0 21 + 341 CLK_000_D_9_ 3 -1 7 1 7 -1 -1 1 0 21 + 340 CLK_000_D_6_ 3 -1 4 1 6 -1 -1 1 0 21 + 339 CLK_000_D_5_ 3 -1 6 1 4 -1 -1 1 0 21 + 338 CLK_000_D_4_ 3 -1 6 1 6 -1 -1 1 0 21 + 337 CLK_000_D_3_ 3 -1 6 1 6 -1 -1 1 0 21 + 335 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 + 328 inst_DTACK_D0 3 -1 3 1 3 -1 -1 1 0 21 + 321 inst_VPA_D 3 -1 0 1 3 -1 -1 1 0 21 + 296 vma_int_0_un1_n 3 -1 3 1 3 -1 -1 1 0 21 + 294 N_155_i 3 -1 2 1 2 -1 -1 1 0 21 + 293 N_149_i 3 -1 3 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 + 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 + 63 CLK_030 1 -1 -1 2 5 6 63 -1 + 59 A_1_ 1 -1 -1 2 3 6 59 -1 + 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 3 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +147 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 1 4 6 7 41 -1 1 0 21 + 79 RW_000 5 371 7 3 4 5 6 79 -1 3 0 21 + 81 AS_030 5 -1 7 3 2 4 7 81 -1 1 0 21 + 40 BERR 5 -1 4 3 2 5 7 40 -1 1 0 21 + 68 A_0_ 5 377 6 2 0 5 68 -1 3 0 21 + 70 RW 5 376 6 2 5 7 70 -1 2 0 21 + 31 UDS_000 5 -1 3 2 3 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 3 6 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 373 7 0 82 -1 3 0 21 + 80 DSACK1 5 374 7 0 80 -1 3 0 21 + 34 VMA 5 375 3 0 34 -1 3 0 21 + 8 IPL_030_2_ 5 370 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 369 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 378 1 0 6 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 372 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 373 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 329 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 330 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 + 325 CLK_000_D_1_ 3 -1 1 5 0 2 3 5 7 -1 -1 1 0 21 + 344 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 + 310 inst_AS_030_D0 3 -1 2 4 2 3 4 7 -1 -1 1 0 21 + 351 SM_AMIGA_1_ 3 -1 2 3 2 5 7 -1 -1 3 0 21 + 319 SIZE_DMA_0_ 3 -1 3 3 3 6 7 -1 -1 3 0 21 + 356 N_89_i 3 -1 7 3 1 2 7 -1 -1 1 0 21 + 314 inst_BGACK_030_INT_D 3 -1 7 3 2 3 6 -1 -1 1 0 21 + 358 SM_AMIGA_i_7_ 3 -1 5 2 2 7 -1 -1 3 0 21 + 354 SM_AMIGA_2_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 353 SM_AMIGA_3_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 352 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 346 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 345 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 + 323 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 + 320 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 317 CYCLE_DMA_0_ 3 -1 0 2 0 1 -1 -1 3 0 21 + 306 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 302 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 301 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 360 G_118 3 -1 1 2 0 1 -1 -1 2 0 21 + 343 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21 + 332 inst_CLK_OUT_PRE_25 3 -1 0 2 0 4 -1 -1 2 0 21 + 322 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 316 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 2 0 21 + 315 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 2 0 21 + 312 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 2 0 21 + 309 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 307 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 367 N_106_i 3 -1 7 2 3 5 -1 -1 1 0 21 + 336 CLK_000_D_2_ 3 -1 7 2 2 6 -1 -1 1 0 21 + 334 IPL_D0_1_ 3 -1 0 2 0 1 -1 -1 1 0 21 + 333 IPL_D0_0_ 3 -1 0 2 0 1 -1 -1 1 0 21 + 331 inst_CLK_OUT_PRE_50 3 -1 6 2 0 6 -1 -1 1 0 21 + 327 CLK_000_D_8_ 3 -1 5 2 6 7 -1 -1 1 0 21 + 326 CLK_000_D_7_ 3 -1 6 2 5 6 -1 -1 1 0 21 + 324 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 378 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 377 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 375 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 374 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 371 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 370 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 369 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 364 N_241 3 -1 2 1 5 -1 -1 3 0 21 + 362 N_280_i_1 3 -1 0 1 0 -1 -1 3 0 21 + 357 N_143_0 3 -1 5 1 2 -1 -1 3 0 21 + 355 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 348 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 318 CYCLE_DMA_1_ 3 -1 1 1 1 -1 -1 3 0 21 + 305 N_137_0 3 -1 0 1 0 -1 -1 3 0 21 + 304 cpu_est_0_ 3 -1 3 1 3 -1 -1 3 0 21 + 376 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 372 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 368 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 366 K0_lk_un22_bgack_030_int_i_0_o2_ 3 -1 1 1 6 -1 -1 2 0 21 + 359 G_116 3 -1 1 1 1 -1 -1 2 0 21 + 350 inst_CLK_030_H 3 -1 5 1 5 -1 -1 2 0 21 + 349 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 + 347 RST_DLY_0_ 3 -1 0 1 0 -1 -1 2 0 21 + 342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21 + 313 ipl_030_0_0__un1_n 3 -1 0 1 1 -1 -1 2 0 21 + 311 N_245_i 3 -1 7 1 5 -1 -1 2 0 21 + 308 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 303 ipl_030_0_2__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 300 ds_000_dma_0_un1_n 3 -1 5 1 1 -1 -1 2 0 21 + 299 ds_000_dma_0_un3_n 3 -1 5 1 1 -1 -1 2 0 21 + 298 N_166_i 3 -1 3 1 5 -1 -1 2 0 21 + 297 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 6 1 5 -1 -1 2 0 21 + 295 N_338_i 3 -1 6 1 7 -1 -1 2 0 21 + 365 N_322 3 -1 2 1 5 -1 -1 1 0 21 + 363 N_341 3 -1 5 1 5 -1 -1 1 0 21 + 361 N_302 3 -1 7 1 5 -1 -1 1 0 21 + 341 CLK_000_D_9_ 3 -1 7 1 7 -1 -1 1 0 21 + 340 CLK_000_D_6_ 3 -1 4 1 6 -1 -1 1 0 21 + 339 CLK_000_D_5_ 3 -1 6 1 4 -1 -1 1 0 21 + 338 CLK_000_D_4_ 3 -1 6 1 6 -1 -1 1 0 21 + 337 CLK_000_D_3_ 3 -1 6 1 6 -1 -1 1 0 21 + 335 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 + 328 inst_DTACK_D0 3 -1 3 1 3 -1 -1 1 0 21 + 321 inst_VPA_D 3 -1 0 1 3 -1 -1 1 0 21 + 296 vma_int_0_un1_n 3 -1 3 1 3 -1 -1 1 0 21 + 294 N_155_i 3 -1 2 1 2 -1 -1 1 0 21 + 293 N_149_i 3 -1 3 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 + 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 + 63 CLK_030 1 -1 -1 2 5 6 63 -1 + 59 A_1_ 1 -1 -1 2 3 6 59 -1 + 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 3 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +148 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 40 BERR 5 -1 4 6 0 1 2 5 6 7 40 -1 1 0 21 + 79 RW_000 5 373 7 4 3 4 5 6 79 -1 3 0 21 + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 81 AS_030 5 -1 7 3 0 4 7 81 -1 1 0 21 + 68 A_0_ 5 379 6 2 1 6 68 -1 3 0 21 + 70 RW 5 378 6 2 5 7 70 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 375 7 0 82 -1 3 0 21 + 80 DSACK1 5 376 7 0 80 -1 3 0 21 + 34 VMA 5 377 3 0 34 -1 3 0 21 + 8 IPL_030_2_ 5 372 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 371 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 370 1 0 6 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 374 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 375 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 330 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 346 SM_AMIGA_6_ 3 -1 5 6 0 1 2 5 6 7 -1 -1 3 0 21 + 331 CLK_000_D_0_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21 + 326 CLK_000_D_1_ 3 -1 6 5 0 2 3 5 7 -1 -1 1 0 21 + 311 inst_AS_030_D0 3 -1 0 5 0 2 3 4 7 -1 -1 1 0 21 + 360 SM_AMIGA_i_7_ 3 -1 5 3 0 5 7 -1 -1 3 0 21 + 347 SM_AMIGA_0_ 3 -1 7 3 0 5 7 -1 -1 3 0 21 + 312 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 2 0 21 + 368 N_106_i 3 -1 3 3 3 5 6 -1 -1 1 0 21 + 358 N_89_i 3 -1 7 3 1 2 7 -1 -1 1 0 21 + 314 inst_BGACK_030_INT_D 3 -1 5 3 0 3 6 -1 -1 1 0 21 + 356 SM_AMIGA_2_ 3 -1 5 2 1 5 -1 -1 3 0 21 + 354 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 353 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 348 SM_AMIGA_4_ 3 -1 5 2 1 5 -1 -1 3 0 21 + 324 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 321 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 320 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 306 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 305 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 303 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 302 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 352 inst_CLK_030_H 3 -1 5 2 3 5 -1 -1 2 0 21 + 345 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 2 0 21 + 323 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 + 317 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 2 0 21 + 316 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 2 0 21 + 309 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 + 308 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 297 pos_clk_un22_bgack_030_int_i_0_i_n 3 -1 2 2 3 5 -1 -1 2 0 21 + 337 CLK_000_D_2_ 3 -1 7 2 5 6 -1 -1 1 0 21 + 332 inst_CLK_OUT_PRE_50 3 -1 6 2 2 6 -1 -1 1 0 21 + 328 CLK_000_D_9_ 3 -1 0 2 6 7 -1 -1 1 0 21 + 327 CLK_000_D_8_ 3 -1 0 2 0 6 -1 -1 1 0 21 + 325 inst_CLK_OUT_PRE_D 3 -1 2 2 1 6 -1 -1 1 0 21 + 379 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 377 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 376 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 373 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 372 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 371 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 370 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 366 N_241 3 -1 1 1 5 -1 -1 3 0 21 + 364 N_280_i_1 3 -1 0 1 0 -1 -1 3 0 21 + 359 N_143_0 3 -1 5 1 0 -1 -1 3 0 21 + 357 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 355 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 3 0 21 + 350 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 319 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21 + 318 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21 + 307 N_137_0 3 -1 0 1 0 -1 -1 3 0 21 + 378 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 374 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 369 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 362 G_117 3 -1 1 1 1 -1 -1 2 0 21 + 361 G_116 3 -1 1 1 1 -1 -1 2 0 21 + 351 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 + 349 RST_DLY_0_ 3 -1 0 1 0 -1 -1 2 0 21 + 344 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21 + 333 inst_CLK_OUT_PRE_25 3 -1 2 1 2 -1 -1 2 0 21 + 315 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 313 N_245_i 3 -1 7 1 5 -1 -1 2 0 21 + 310 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 304 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21 + 301 ds_000_dma_0_un1_n 3 -1 5 1 2 -1 -1 2 0 21 + 300 ds_000_dma_0_un3_n 3 -1 3 1 2 -1 -1 2 0 21 + 299 N_166_i 3 -1 3 1 5 -1 -1 2 0 21 + 296 N_338_i 3 -1 6 1 7 -1 -1 2 0 21 + 367 N_322 3 -1 5 1 5 -1 -1 1 0 21 + 365 N_341 3 -1 7 1 5 -1 -1 1 0 21 + 363 N_302 3 -1 6 1 5 -1 -1 1 0 21 + 343 CLK_000_D_10_ 3 -1 7 1 7 -1 -1 1 0 21 + 342 CLK_000_D_7_ 3 -1 2 1 0 -1 -1 1 0 21 + 341 CLK_000_D_6_ 3 -1 6 1 2 -1 -1 1 0 21 + 340 CLK_000_D_5_ 3 -1 2 1 6 -1 -1 1 0 21 + 339 CLK_000_D_4_ 3 -1 3 1 2 -1 -1 1 0 21 + 338 CLK_000_D_3_ 3 -1 6 1 3 -1 -1 1 0 21 + 336 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 335 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 + 334 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 + 329 inst_DTACK_D0 3 -1 5 1 3 -1 -1 1 0 21 + 322 inst_VPA_D 3 -1 1 1 3 -1 -1 1 0 21 + 298 vma_int_0_un1_n 3 -1 3 1 3 -1 -1 1 0 21 + 295 N_155_i 3 -1 7 1 0 -1 -1 1 0 21 + 294 N_149_i 3 -1 3 1 3 -1 -1 1 0 21 + 293 N_303_i 3 -1 6 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 63 CLK_030 1 -1 -1 3 3 5 6 63 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 59 A_1_ 1 -1 -1 2 0 3 59 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 29 DTACK 1 -1 -1 1 5 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 4 10 -1 +150 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 2 4 5 7 41 -1 1 0 21 + 40 BERR 5 -1 4 5 0 2 3 5 7 40 -1 1 0 21 + 79 RW_000 5 375 7 3 2 4 6 79 -1 3 0 21 + 68 A_0_ 5 381 6 2 1 2 68 -1 3 0 21 + 70 RW 5 380 6 2 0 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 31 UDS_000 5 -1 3 2 5 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 5 6 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 374 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 373 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 372 1 0 6 -1 3 0 21 + 80 DSACK1 5 378 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 379 3 0 34 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 376 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 82 BGACK_030 5 377 7 0 82 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 328 inst_RESET_OUT 3 -1 5 8 0 1 2 3 4 5 6 7 -1 -1 2 0 21 + 377 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 1 0 21 + 329 CLK_000_D_0_ 3 -1 2 6 0 2 3 5 6 7 -1 -1 1 0 21 + 324 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 + 351 SM_AMIGA_6_ 3 -1 0 5 0 1 2 3 7 -1 -1 3 0 21 + 354 SM_AMIGA_4_ 3 -1 3 4 0 2 3 6 -1 -1 3 0 21 + 311 inst_BGACK_030_INT_D 3 -1 3 4 0 2 3 6 -1 -1 1 0 21 + 308 inst_AS_030_D0 3 -1 4 4 0 3 4 7 -1 -1 1 0 21 + 364 SM_AMIGA_i_7_ 3 -1 0 3 0 3 7 -1 -1 3 0 21 + 352 SM_AMIGA_0_ 3 -1 0 3 0 3 7 -1 -1 3 0 21 + 304 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 3 0 21 + 303 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 + 367 N_110_i 3 -1 0 3 0 5 6 -1 -1 1 0 21 + 360 N_111_i 3 -1 7 3 2 5 7 -1 -1 1 0 21 + 366 S0__clk_un23_bgack_030_int_i_1_0 3 -1 5 2 2 7 -1 -1 3 0 21 + 363 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 3 0 21 + 361 SM_AMIGA_5_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 359 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 3 0 21 + 321 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 317 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 316 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 302 cpu_est_3_ 3 -1 6 2 5 6 -1 -1 3 0 21 + 301 cpu_est_2_ 3 -1 6 2 5 6 -1 -1 3 0 21 + 379 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21 + 362 SM_AMIGA_3_ 3 -1 6 2 0 5 -1 -1 2 0 21 + 339 N_186_i 3 -1 5 2 0 2 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 313 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 2 0 21 + 312 inst_AS_000_DMA 3 -1 7 2 2 7 -1 -1 2 0 21 + 310 inst_AS_030_000_SYNC 3 -1 0 2 0 3 -1 -1 2 0 21 + 305 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 + 330 inst_CLK_OUT_PRE_50 3 -1 3 2 2 3 -1 -1 1 0 21 + 326 CLK_000_D_8_ 3 -1 6 2 1 5 -1 -1 1 0 21 + 325 CLK_000_D_7_ 3 -1 3 2 1 6 -1 -1 1 0 21 + 323 inst_CLK_OUT_PRE_D 3 -1 2 2 1 6 -1 -1 1 0 21 + 319 inst_VPA_D 3 -1 5 2 5 6 -1 -1 1 0 21 + 381 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 375 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 374 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 373 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 372 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 365 N_213 3 -1 5 1 6 -1 -1 3 0 21 + 355 RST_DLY_0_ 3 -1 5 1 5 -1 -1 3 0 21 + 350 inst_BGACK_030_INT_PRE 3 -1 5 1 5 -1 -1 3 0 21 + 349 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 3 0 21 + 342 N_223_i 3 -1 2 1 0 -1 -1 3 0 21 + 315 CYCLE_DMA_1_ 3 -1 5 1 5 -1 -1 3 0 21 + 314 CYCLE_DMA_0_ 3 -1 5 1 5 -1 -1 3 0 21 + 307 N_163_i 3 -1 0 1 0 -1 -1 3 0 21 + 300 N_158_i 3 -1 1 1 7 -1 -1 3 0 21 + 295 N_11_i 3 -1 5 1 7 -1 -1 3 0 21 + 380 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 378 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 376 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 368 N_166 3 -1 5 1 5 -1 -1 2 0 21 + 358 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21 + 357 RST_DLY_2_ 3 -1 5 1 5 -1 -1 2 0 21 + 356 RST_DLY_1_ 3 -1 5 1 5 -1 -1 2 0 21 + 348 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21 + 346 N_245_i 3 -1 1 1 1 -1 -1 2 0 21 + 344 N_244_i 3 -1 1 1 1 -1 -1 2 0 21 + 335 N_174_i 3 -1 7 1 0 -1 -1 2 0 21 + 331 inst_CLK_OUT_PRE_25 3 -1 2 1 2 -1 -1 2 0 21 + 318 N_273_i 3 -1 0 1 3 -1 -1 2 0 21 + 306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 299 ds_000_dma_0_un1_n 3 -1 2 1 6 -1 -1 2 0 21 + 298 ds_000_dma_0_un3_n 3 -1 2 1 6 -1 -1 2 0 21 + 297 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21 + 296 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 294 pos_clk_un9_clk_000_pe_n 3 -1 6 1 3 -1 -1 2 0 21 + 293 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 370 N_291 3 -1 5 1 5 -1 -1 1 0 21 + 369 N_123_i 3 -1 3 1 6 -1 -1 1 0 21 + 353 pos_clk_un23_bgack_030_int_i_1_0_n 3 -1 7 1 2 -1 -1 1 0 21 + 347 CLK_000_D_9_ 3 -1 5 1 1 -1 -1 1 0 21 + 345 CLK_000_D_6_ 3 -1 6 1 3 -1 -1 1 0 21 + 343 CLK_000_D_5_ 3 -1 4 1 6 -1 -1 1 0 21 + 341 CLK_000_D_4_ 3 -1 6 1 4 -1 -1 1 0 21 + 340 CLK_000_D_3_ 3 -1 0 1 6 -1 -1 1 0 21 + 338 CLK_000_D_2_ 3 -1 5 1 0 -1 -1 1 0 21 + 337 N_277_i 3 -1 0 1 0 -1 -1 1 0 21 + 336 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 334 IPL_D0_1_ 3 -1 4 1 1 -1 -1 1 0 21 + 333 N_226_i 3 -1 0 1 0 -1 -1 1 0 21 + 332 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 + 327 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 + 322 N_129_i 3 -1 4 1 0 -1 -1 1 0 21 + 309 N_296_0 3 -1 0 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 63 CLK_030 1 -1 -1 3 1 2 7 63 -1 + 27 BGACK_000 1 -1 -1 3 4 5 7 27 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 + 59 A_1_ 1 -1 -1 2 2 3 59 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 1 4 55 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 29 DTACK 1 -1 -1 1 3 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 2 10 -1 +144 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 4 5 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 5 0 2 5 6 7 40 -1 1 0 21 + 79 RW_000 5 370 7 3 2 4 6 79 -1 3 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 68 A_0_ 5 366 6 1 2 68 -1 3 0 21 + 70 RW 5 375 6 1 7 70 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 372 7 0 82 -1 3 0 21 + 34 VMA 5 374 3 0 34 -1 3 0 21 + 8 IPL_030_2_ 5 369 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 368 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 367 1 0 6 -1 3 0 21 + 80 DSACK1 5 373 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 371 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 372 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 328 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 329 CLK_000_D_0_ 3 -1 5 6 0 2 3 5 6 7 -1 -1 1 0 21 + 323 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 + 307 inst_AS_030_D0 3 -1 4 5 2 3 4 5 7 -1 -1 1 0 21 + 352 SM_AMIGA_1_ 3 -1 0 4 0 1 5 6 -1 -1 3 0 21 + 346 SM_AMIGA_0_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21 + 345 SM_AMIGA_6_ 3 -1 5 4 0 2 5 7 -1 -1 3 0 21 + 310 inst_BGACK_030_INT_D 3 -1 4 4 1 3 5 6 -1 -1 1 0 21 + 358 SM_AMIGA_i_7_ 3 -1 0 3 2 5 7 -1 -1 3 0 21 + 353 SM_AMIGA_5_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 + 347 SM_AMIGA_4_ 3 -1 2 3 0 2 5 -1 -1 3 0 21 + 356 N_322_i 3 -1 7 3 0 5 7 -1 -1 1 0 21 + 332 N_321_i 3 -1 7 3 0 3 6 -1 -1 1 0 21 + 355 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 343 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 321 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 317 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 316 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 315 CYCLE_DMA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 314 CYCLE_DMA_0_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 303 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 302 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 301 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 300 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 354 SM_AMIGA_3_ 3 -1 5 2 3 5 -1 -1 2 0 21 + 331 inst_CLK_OUT_PRE_25 3 -1 6 2 3 6 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 311 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 2 0 21 + 309 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 2 0 21 + 305 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 + 304 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 336 CLK_000_D_2_ 3 -1 7 2 5 7 -1 -1 1 0 21 + 330 inst_CLK_OUT_PRE_50 3 -1 7 2 6 7 -1 -1 1 0 21 + 326 CLK_000_D_7_ 3 -1 0 2 1 3 -1 -1 1 0 21 + 324 CLK_000_D_6_ 3 -1 4 2 0 1 -1 -1 1 0 21 + 322 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 + 374 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 370 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 369 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 368 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 367 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 366 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 364 N_98 3 -1 0 1 0 -1 -1 3 0 21 + 363 sm_amiga_nss_i_0_5_0__n 3 -1 5 1 0 -1 -1 3 0 21 + 348 RST_DLY_0_ 3 -1 0 1 0 -1 -1 3 0 21 + 344 inst_BGACK_030_INT_PRE 3 -1 6 1 6 -1 -1 3 0 21 + 296 N_91_i 3 -1 1 1 7 -1 -1 3 0 21 + 375 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 373 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 371 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 365 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 362 N_101 3 -1 3 1 0 -1 -1 2 0 21 + 361 S0__clk_un23_bgack_030_int_i_0_i 3 -1 0 1 6 -1 -1 2 0 21 + 360 G_117 3 -1 1 1 1 -1 -1 2 0 21 + 359 G_116 3 -1 1 1 1 -1 -1 2 0 21 + 357 pos_clk_un23_bgack_030_int_i_0_i_n 3 -1 6 1 2 -1 -1 2 0 21 + 351 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21 + 350 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 + 349 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 0 21 + 342 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21 + 341 N_118_i 3 -1 0 1 0 -1 -1 2 0 21 + 313 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 2 0 21 + 308 ds_000_dma_0_un1_n 3 -1 2 1 0 -1 -1 2 0 21 + 306 ds_000_dma_0_un3_n 3 -1 2 1 0 -1 -1 2 0 21 + 299 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21 + 298 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 297 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 295 N_130_i 3 -1 7 1 2 -1 -1 2 0 21 + 293 N_334 3 -1 3 1 5 -1 -1 2 0 21 + 340 CLK_000_D_8_ 3 -1 3 1 1 -1 -1 1 0 21 + 339 CLK_000_D_5_ 3 -1 2 1 4 -1 -1 1 0 21 + 338 CLK_000_D_4_ 3 -1 5 1 2 -1 -1 1 0 21 + 337 CLK_000_D_3_ 3 -1 7 1 5 -1 -1 1 0 21 + 335 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 334 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 333 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 + 327 inst_DTACK_D0 3 -1 5 1 3 -1 -1 1 0 21 + 325 pos_clk_un28_as_030_d0_i_n 3 -1 4 1 5 -1 -1 1 0 21 + 320 N_308_i 3 -1 6 1 3 -1 -1 1 0 21 + 318 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21 + 312 N_312_i 3 -1 3 1 6 -1 -1 1 0 21 + 294 bgack_030_int_0_un1_n 3 -1 6 1 7 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 27 BGACK_000 1 -1 -1 3 4 6 7 27 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 + 63 CLK_030 1 -1 -1 2 1 2 63 -1 + 59 A_1_ 1 -1 -1 2 1 3 59 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 5 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 5 10 -1 +124 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 350 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 355 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 10 0 21 + 34 VMA 0 3 0 34 -1 7 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 82 BGACK_030 0 7 0 82 -1 3 1 21 + 68 A_0_ 5 346 6 0 68 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 0 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 352 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 1 21 + 316 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 296 cpu_est_1_ 3 -1 -1 2 3 6 -1 -1 4 0 21 + 294 cpu_est_3_ 3 -1 -1 2 3 6 -1 -1 4 0 21 + 317 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 312 CLK_000_D_1_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 293 cpu_est_2_ 3 -1 -1 2 3 6 -1 -1 1 1 21 + 344 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 13 1 21 + 349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 9 0 21 + 354 RN_VMA 3 34 3 1 3 34 -1 7 0 21 + 302 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 7 0 21 + 300 inst_AS_030_000_SYNC 3 -1 -1 1 3 -1 -1 7 0 21 + 353 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 331 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 346 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 340 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 334 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 333 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 332 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 307 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 306 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 295 cpu_est_0_ 3 -1 -1 1 3 -1 -1 3 0 21 + 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 345 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 330 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 1 3 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 329 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 322 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 321 IPL_D0_1_ 3 -1 -1 1 1 -1 -1 1 0 21 + 320 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 + 314 CLK_000_D_9_ 3 -1 -1 1 7 -1 -1 1 0 21 + 313 CLK_000_D_8_ 3 -1 -1 1 7 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 -1 1 3 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 339 inst_CLK_030_H 3 -1 -1 0 -1 -1 6 1 21 + 343 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 342 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 4 1 21 + 336 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 341 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 337 RST_DLY_1_ 3 -1 -1 0 -1 -1 3 1 21 + 335 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 338 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 319 inst_CLK_OUT_PRE_25 3 -1 -1 0 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 328 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 327 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 326 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 325 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 324 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 323 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 318 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 315 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 136 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 79 RW_000 5 359 7 3 2 4 6 79 -1 3 0 21 - 81 AS_030 5 -1 7 3 0 4 7 81 -1 1 0 21 - 40 BERR 5 -1 4 3 0 5 7 40 -1 1 0 21 - 70 RW 5 364 6 2 5 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 - 68 A_0_ 5 365 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 - 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 - 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 - 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 - 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 - 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 - 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 - 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 - 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 358 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 367 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 366 1 0 6 -1 10 0 21 - 80 DSACK1 5 362 7 0 80 -1 4 0 21 - 82 BGACK_030 5 361 7 0 82 -1 3 0 21 - 34 VMA 5 363 3 0 34 -1 3 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 3 0 21 - 65 E 0 6 0 65 -1 2 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 362 7 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 70 RW 5 367 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 5 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 5 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 4 0 21 + 82 BGACK_030 0 7 0 82 -1 3 1 21 + 68 A_0_ 5 358 6 0 68 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 28 BG_000 5 360 3 0 28 -1 2 0 21 + 34 VMA 0 3 0 34 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 28 BG_000 0 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 - 91 AVEC 0 0 0 91 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 46 CIIN 0 4 0 46 -1 1 0 21 - 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 - 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 - 2 RESET 0 1 0 2 -1 1 0 21 - 361 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 299 inst_AS_030_D0 3 -1 0 5 0 3 4 5 7 -1 -1 1 0 21 - 356 SM_AMIGA_i_7_ 3 -1 5 4 0 3 5 7 -1 -1 15 0 21 - 319 CLK_000_P_SYNC_10_ 3 -1 3 4 2 3 5 7 -1 -1 1 0 21 - 317 CLK_000_D_0_ 3 -1 0 4 0 3 4 5 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 4 0 1 2 6 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 295 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 - 293 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 - 333 SM_AMIGA_0_ 3 -1 5 3 3 5 7 -1 -1 2 0 21 - 324 CLK_000_D_2_ 3 -1 3 3 0 3 5 -1 -1 1 0 21 - 312 CLK_000_D_1_ 3 -1 4 3 0 3 5 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 6 3 1 6 7 -1 -1 1 0 21 - 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 300 inst_AS_030_000_SYNC 3 -1 0 2 0 5 -1 -1 7 0 21 - 335 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 353 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 4 0 21 - 320 SM_AMIGA_5_ 3 -1 5 2 5 7 -1 -1 4 0 21 - 363 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 310 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 351 SM_AMIGA_6_ 3 -1 5 2 1 5 -1 -1 2 0 21 - 347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 309 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 296 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 2 0 21 - 346 inst_CLK_000_NE_D0 3 -1 3 2 3 5 -1 -1 1 0 21 - 308 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21 - 367 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 366 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 358 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 354 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 9 0 21 - 352 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 362 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 365 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 359 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 355 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21 - 349 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21 - 348 RST_DLY_0_ 3 -1 0 1 0 -1 -1 3 1 21 - 305 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21 - 364 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 360 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 357 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 350 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 - 334 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 2 0 21 - 304 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 2 0 21 - 345 CLK_000_P_SYNC_9_ 3 -1 4 1 3 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_8_ 3 -1 6 1 4 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_7_ 3 -1 2 1 6 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_6_ 3 -1 1 1 2 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_5_ 3 -1 2 1 1 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_4_ 3 -1 1 1 2 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_3_ 3 -1 6 1 1 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_2_ 3 -1 2 1 6 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_1_ 3 -1 6 1 2 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_0_ 3 -1 5 1 6 -1 -1 1 0 21 - 332 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 - 331 CLK_000_D_9_ 3 -1 6 1 1 -1 -1 1 0 21 - 330 CLK_000_D_8_ 3 -1 3 1 6 -1 -1 1 0 21 - 329 CLK_000_D_7_ 3 -1 6 1 3 -1 -1 1 0 21 - 328 CLK_000_D_6_ 3 -1 0 1 6 -1 -1 1 0 21 - 327 CLK_000_D_5_ 3 -1 4 1 0 -1 -1 1 0 21 - 326 CLK_000_D_4_ 3 -1 1 1 4 -1 -1 1 0 21 - 325 CLK_000_D_3_ 3 -1 3 1 1 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 6 1 6 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 7 1 5 -1 -1 1 0 21 - 314 CLK_000_D_11_ 3 -1 7 1 7 -1 -1 1 0 21 - 313 CLK_000_D_10_ 3 -1 1 1 7 -1 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 364 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 3 1 21 + 321 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 316 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 304 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 322 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 360 RN_IPL_030_0_ 3 7 1 1 1 7 -1 5 0 21 + 359 RN_IPL_030_1_ 3 6 1 1 1 6 -1 5 0 21 + 355 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 5 0 21 + 365 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 362 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 361 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21 + 341 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 308 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 301 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 296 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 295 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21 + 293 ipl_030_0_0__un1_n 3 -1 -1 1 1 -1 -1 4 0 21 + 358 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 351 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 344 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 343 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 342 inst_BGACK_030_INT_PRE 3 -1 -1 1 7 -1 -1 3 0 21 + 315 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 312 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 311 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 367 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 366 RN_VMA 3 34 3 1 3 34 -1 2 0 21 + 363 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 357 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 338 N_245_i 3 -1 -1 1 1 -1 -1 2 0 21 + 314 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 307 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21 + 302 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 294 pos_clk_un9_clk_000_pe_n 3 -1 -1 1 3 -1 -1 2 0 21 + 339 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 328 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 325 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 + 319 CLK_000_D_9_ 3 -1 -1 1 7 -1 -1 1 0 21 + 318 CLK_000_D_8_ 3 -1 -1 1 7 -1 -1 1 0 21 + 317 CLK_000_D_1_ 3 -1 -1 1 7 -1 -1 1 0 21 + 306 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 300 N_162_i 3 -1 -1 0 -1 -1 5 0 21 + 354 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 347 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 345 pos_clk_un23_bgack_030_int_i_1_0_n 3 -1 -1 0 -1 -1 4 0 21 + 335 N_223_i 3 -1 -1 0 -1 -1 4 0 21 + 310 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 298 cpu_est_3_ 3 -1 -1 0 -1 -1 4 0 21 + 356 N_213 3 -1 -1 0 -1 -1 3 1 21 + 352 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 348 RST_DLY_1_ 3 -1 -1 0 -1 -1 3 1 21 + 346 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 309 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 299 cpu_est_0_ 3 -1 -1 0 -1 -1 3 0 21 + 353 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 2 0 21 + 350 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 349 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 340 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 332 N_186_i 3 -1 -1 0 -1 -1 2 0 21 + 329 N_174_i 3 -1 -1 0 -1 -1 2 0 21 + 324 inst_CLK_OUT_PRE_25 3 -1 -1 0 -1 -1 2 0 21 + 305 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 303 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 337 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 336 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 334 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 333 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 331 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 330 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 327 N_226_i 3 -1 -1 0 -1 -1 1 0 21 + 326 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21 + 323 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 320 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 313 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21 + 297 cpu_est_2_ 3 -1 -1 0 -1 -1 1 1 21 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 - 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 - 63 CLK_030 1 -1 -1 2 2 7 63 -1 - 59 A_1_ 1 -1 -1 2 1 2 59 -1 - 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 10 CLK_000 1 -1 -1 2 0 3 10 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 35 VPA 1 -1 -1 1 0 35 -1 - 29 DTACK 1 -1 -1 1 7 29 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 20 BG_030 1 -1 -1 1 3 20 -1 -135 "number of signals after reading design file" + 59 A_1_ 1 -1 -1 0 59 -1 + 55 IPL_1_ 1 -1 -1 0 55 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +144 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 - 79 RW_000 5 359 7 3 2 4 6 79 -1 3 0 21 - 70 RW 5 364 6 2 5 7 70 -1 2 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 370 7 2 4 6 79 -1 4 0 21 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 - 68 A_0_ 5 365 6 1 1 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 + 70 RW 5 375 6 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 1 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 18 AHIGH_24_ 5 -1 -1 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 -1 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 -1 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 -1 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 -1 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 -1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 -1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 -1 1 4 3 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 4 0 21 + 8 IPL_030_2_ 0 1 0 8 -1 4 0 21 + 7 IPL_030_0_ 0 1 0 7 -1 4 0 21 + 68 A_0_ 5 366 6 0 68 -1 3 0 21 + 65 E 0 -1 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 0 3 0 34 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 -1 0 33 -1 2 0 21 + 28 BG_000 0 3 0 28 -1 2 0 21 + 6 IPL_030_1_ 0 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 -1 0 91 -1 1 0 21 + 82 BGACK_030 0 7 0 82 -1 1 0 21 + 78 SIZE_1_ 0 -1 0 78 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 69 SIZE_0_ 0 6 0 69 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 -1 0 32 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 -1 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 -1 0 2 -1 1 0 21 + 327 inst_RESET_OUT 3 -1 -1 5 0 3 4 6 7 -1 -1 2 0 21 + 372 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 1 0 21 + 321 inst_CLK_OUT_PRE_D 3 -1 -1 3 1 6 7 -1 -1 1 0 21 + 307 inst_AS_030_D0 3 -1 -1 3 3 4 7 -1 -1 1 0 21 + 328 CLK_000_D_0_ 3 -1 -1 2 3 7 -1 -1 1 0 21 + 373 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 370 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 369 RN_IPL_030_2_ 3 8 1 1 1 8 -1 4 0 21 + 368 RN_IPL_030_0_ 3 7 1 1 1 7 -1 4 0 21 + 362 SM_AMIGA_i_7_ 3 -1 -1 1 7 -1 -1 4 0 21 + 348 inst_DS_000_ENABLE 3 -1 -1 1 3 -1 -1 4 0 21 + 313 inst_DS_000_DMA 3 -1 -1 1 0 -1 -1 4 0 21 + 304 cpu_est_1_ 3 -1 -1 1 3 -1 -1 4 0 21 + 299 ipl_030_0_2__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 298 ipl_030_0_1__un1_n 3 -1 -1 1 1 -1 -1 4 0 21 + 297 N_11_i 3 -1 -1 1 7 -1 -1 4 0 21 + 296 ipl_030_0_1__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 294 ipl_030_0_0__un3_n 3 -1 -1 1 1 -1 -1 4 0 21 + 366 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 358 SM_AMIGA_1_ 3 -1 -1 1 7 -1 -1 3 0 21 + 351 SM_AMIGA_0_ 3 -1 -1 1 7 -1 -1 3 0 21 + 350 SM_AMIGA_6_ 3 -1 -1 1 7 -1 -1 3 0 21 + 320 inst_LDS_000_INT 3 -1 -1 1 3 -1 -1 3 0 21 + 317 SIZE_DMA_1_ 3 -1 -1 1 6 -1 -1 3 0 21 + 316 SIZE_DMA_0_ 3 -1 -1 1 6 -1 -1 3 0 21 + 375 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 374 RN_VMA 3 34 3 1 3 34 -1 2 0 21 + 371 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 367 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 365 CIIN_0 3 -1 -1 1 4 -1 -1 2 0 21 + 345 N_245_i 3 -1 -1 1 1 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 -1 1 3 -1 -1 2 0 21 + 312 inst_AS_000_DMA 3 -1 -1 1 7 -1 -1 2 0 21 + 305 inst_AS_000_INT 3 -1 -1 1 4 -1 -1 2 0 21 + 295 pos_clk_un9_clk_000_pe_n 3 -1 -1 1 3 -1 -1 2 0 21 + 346 CLK_000_D_10_ 3 -1 -1 1 7 -1 -1 1 0 21 + 334 IPL_D0_2_ 3 -1 -1 1 1 -1 -1 1 0 21 + 331 IPL_D0_0_ 3 -1 -1 1 1 -1 -1 1 0 21 + 325 CLK_000_D_9_ 3 -1 -1 1 7 -1 -1 1 0 21 + 324 CLK_000_D_8_ 3 -1 -1 1 7 -1 -1 1 0 21 + 323 CLK_000_D_1_ 3 -1 -1 1 7 -1 -1 1 0 21 + 311 inst_BGACK_030_INT_D 3 -1 -1 1 6 -1 -1 1 0 21 + 363 N_213 3 -1 -1 0 -1 -1 4 0 21 + 361 SM_AMIGA_2_ 3 -1 -1 0 -1 -1 4 0 21 + 355 RST_DLY_1_ 3 -1 -1 0 -1 -1 4 0 21 + 354 RST_DLY_0_ 3 -1 -1 0 -1 -1 4 0 21 + 352 pos_clk_un23_bgack_030_int_i_1_0_n 3 -1 -1 0 -1 -1 4 0 21 + 342 N_223_i 3 -1 -1 0 -1 -1 4 0 21 + 315 CYCLE_DMA_1_ 3 -1 -1 0 -1 -1 4 0 21 + 302 cpu_est_3_ 3 -1 -1 0 -1 -1 4 0 21 + 359 SM_AMIGA_5_ 3 -1 -1 0 -1 -1 3 0 21 + 353 SM_AMIGA_4_ 3 -1 -1 0 -1 -1 3 0 21 + 349 inst_BGACK_030_INT_PRE 3 -1 -1 0 -1 -1 3 0 21 + 314 CYCLE_DMA_0_ 3 -1 -1 0 -1 -1 3 0 21 + 308 N_163_i 3 -1 -1 0 -1 -1 3 0 21 + 303 cpu_est_0_ 3 -1 -1 0 -1 -1 3 0 21 + 301 cpu_est_2_ 3 -1 -1 0 -1 -1 3 0 21 + 293 cpu_est_2_2__n 3 -1 -1 0 -1 -1 3 0 21 + 360 SM_AMIGA_3_ 3 -1 -1 0 -1 -1 2 0 21 + 357 inst_CLK_030_H 3 -1 -1 0 -1 -1 2 0 21 + 356 RST_DLY_2_ 3 -1 -1 0 -1 -1 2 0 21 + 347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 -1 0 -1 -1 2 0 21 + 339 N_186_i 3 -1 -1 0 -1 -1 2 0 21 + 335 N_174_i 3 -1 -1 0 -1 -1 2 0 21 + 330 inst_CLK_OUT_PRE_25 3 -1 -1 0 -1 -1 2 0 21 + 309 inst_AS_030_000_SYNC 3 -1 -1 0 -1 -1 2 0 21 + 306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 -1 0 -1 -1 2 0 21 + 300 N_315 3 -1 -1 0 -1 -1 2 0 21 + 364 N_291 3 -1 -1 0 -1 -1 1 0 21 + 344 CLK_000_D_7_ 3 -1 -1 0 -1 -1 1 0 21 + 343 CLK_000_D_6_ 3 -1 -1 0 -1 -1 1 0 21 + 341 CLK_000_D_5_ 3 -1 -1 0 -1 -1 1 0 21 + 340 CLK_000_D_4_ 3 -1 -1 0 -1 -1 1 0 21 + 338 CLK_000_D_3_ 3 -1 -1 0 -1 -1 1 0 21 + 337 N_277_i 3 -1 -1 0 -1 -1 1 0 21 + 336 CLK_000_D_2_ 3 -1 -1 0 -1 -1 1 0 21 + 333 N_226_i 3 -1 -1 0 -1 -1 1 0 21 + 332 IPL_D0_1_ 3 -1 -1 0 -1 -1 1 0 21 + 329 inst_CLK_OUT_PRE_50 3 -1 -1 0 -1 -1 1 0 21 + 326 inst_DTACK_D0 3 -1 -1 0 -1 -1 1 0 21 + 322 N_129_i 3 -1 -1 0 -1 -1 1 0 21 + 318 inst_VPA_D 3 -1 -1 0 -1 -1 1 0 21 + 310 N_296_0 3 -1 -1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 85 RST 1 -1 -1 4 1 3 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 7 63 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 59 A_1_ 1 -1 -1 0 59 -1 + 55 IPL_1_ 1 -1 -1 0 55 -1 + 35 VPA 1 -1 -1 0 35 -1 + 29 DTACK 1 -1 -1 0 29 -1 + 10 CLK_000 1 -1 -1 0 10 -1 +152 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 5 0 1 3 5 7 40 -1 1 0 21 + 79 RW_000 5 378 7 4 2 4 5 6 79 -1 3 0 21 + 70 RW 5 383 6 2 0 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 68 A_0_ 5 374 6 1 3 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 @@ -13137,18 +7607,18 @@ 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 358 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 357 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 366 1 0 6 -1 10 0 21 - 80 DSACK1 5 362 7 0 80 -1 4 0 21 - 82 BGACK_030 5 361 7 0 82 -1 3 0 21 - 34 VMA 5 363 3 0 34 -1 3 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 3 0 21 + 8 IPL_030_2_ 5 377 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 376 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 375 1 0 6 -1 3 0 21 + 80 DSACK1 5 381 7 0 80 -1 2 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 - 28 BG_000 5 360 3 0 28 -1 2 0 21 + 34 VMA 5 382 3 0 34 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 379 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 + 82 BGACK_030 5 380 7 0 82 -1 1 0 21 77 FPU_CS 0 7 0 77 -1 1 0 21 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 46 CIIN 0 4 0 46 -1 1 0 21 @@ -13156,93 +7626,110 @@ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 2 RESET 0 1 0 2 -1 1 0 21 - 361 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 299 inst_AS_030_D0 3 -1 7 6 0 2 3 4 5 7 -1 -1 1 0 21 - 355 SM_AMIGA_i_7_ 3 -1 5 4 0 3 5 7 -1 -1 15 0 21 - 324 CLK_000_D_2_ 3 -1 5 4 0 3 5 6 -1 -1 1 0 21 - 319 CLK_000_P_SYNC_10_ 3 -1 3 4 2 3 5 7 -1 -1 1 0 21 - 295 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 5 0 21 - 320 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 4 0 21 - 333 SM_AMIGA_0_ 3 -1 5 3 3 5 7 -1 -1 2 0 21 - 293 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 2 1 21 - 317 CLK_000_D_0_ 3 -1 3 3 3 5 6 -1 -1 1 0 21 - 312 CLK_000_D_1_ 3 -1 6 3 3 5 6 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 3 0 2 6 -1 -1 1 0 21 - 294 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 0 21 - 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 300 inst_AS_030_000_SYNC 3 -1 0 2 0 5 -1 -1 7 0 21 - 335 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 352 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 4 0 21 - 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 4 0 21 - 363 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 310 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 - 307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 350 SM_AMIGA_6_ 3 -1 5 2 1 5 -1 -1 2 0 21 - 346 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 - 309 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 308 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 - 366 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 358 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 357 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 353 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 9 0 21 - 351 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 362 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 365 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 359 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 - 354 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21 - 348 RST_DLY_1_ 3 -1 6 1 6 -1 -1 3 0 21 - 347 RST_DLY_0_ 3 -1 6 1 6 -1 -1 3 1 21 - 305 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21 - 364 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 360 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 356 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 349 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 334 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 2 0 21 - 304 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 345 CLK_000_P_SYNC_9_ 3 -1 4 1 3 -1 -1 1 0 21 - 344 CLK_000_P_SYNC_8_ 3 -1 2 1 4 -1 -1 1 0 21 - 343 CLK_000_P_SYNC_7_ 3 -1 1 1 2 -1 -1 1 0 21 - 342 CLK_000_P_SYNC_6_ 3 -1 6 1 1 -1 -1 1 0 21 - 341 CLK_000_P_SYNC_5_ 3 -1 6 1 6 -1 -1 1 0 21 - 340 CLK_000_P_SYNC_4_ 3 -1 1 1 6 -1 -1 1 0 21 - 339 CLK_000_P_SYNC_3_ 3 -1 1 1 1 -1 -1 1 0 21 - 338 CLK_000_P_SYNC_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 337 CLK_000_P_SYNC_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 336 CLK_000_P_SYNC_0_ 3 -1 5 1 0 -1 -1 1 0 21 - 332 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 - 331 CLK_000_D_9_ 3 -1 6 1 0 -1 -1 1 0 21 - 330 CLK_000_D_8_ 3 -1 0 1 6 -1 -1 1 0 21 - 329 CLK_000_D_7_ 3 -1 0 1 0 -1 -1 1 0 21 - 328 CLK_000_D_6_ 3 -1 0 1 0 -1 -1 1 0 21 - 327 CLK_000_D_5_ 3 -1 0 1 0 -1 -1 1 0 21 - 326 CLK_000_D_4_ 3 -1 6 1 0 -1 -1 1 0 21 - 325 CLK_000_D_3_ 3 -1 0 1 6 -1 -1 1 0 21 - 323 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 322 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 321 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21 - 314 CLK_000_D_11_ 3 -1 7 1 7 -1 -1 1 0 21 - 313 CLK_000_D_10_ 3 -1 0 1 7 -1 -1 1 0 21 + 380 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 1 0 21 + 328 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 329 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 324 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 360 SM_AMIGA_1_ 3 -1 0 4 0 1 2 3 -1 -1 3 0 21 + 304 cpu_est_1_ 3 -1 5 4 0 3 5 6 -1 -1 3 0 21 + 307 inst_AS_030_D0 3 -1 7 4 0 3 4 7 -1 -1 1 0 21 + 364 SM_AMIGA_2_ 3 -1 1 3 0 1 3 -1 -1 3 0 21 + 362 SM_AMIGA_5_ 3 -1 0 3 0 1 3 -1 -1 3 0 21 + 355 SM_AMIGA_4_ 3 -1 3 3 0 2 3 -1 -1 3 0 21 + 353 SM_AMIGA_0_ 3 -1 3 3 0 3 7 -1 -1 3 0 21 + 352 SM_AMIGA_6_ 3 -1 0 3 0 3 7 -1 -1 3 0 21 + 312 inst_AS_000_DMA 3 -1 2 3 2 5 7 -1 -1 2 0 21 + 361 N_111_i 3 -1 3 3 3 6 7 -1 -1 1 0 21 + 322 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21 + 311 inst_BGACK_030_INT_D 3 -1 4 3 0 2 6 -1 -1 1 0 21 + 370 N_116_0 3 -1 6 2 5 6 -1 -1 3 0 21 + 368 S0__clk_un23_bgack_030_int_i_1_0 3 -1 6 2 0 2 -1 -1 3 0 21 + 365 SM_AMIGA_i_7_ 3 -1 1 2 0 7 -1 -1 3 0 21 + 357 RST_DLY_1_ 3 -1 5 2 5 6 -1 -1 3 0 21 + 350 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 + 317 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 316 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 314 CYCLE_DMA_0_ 3 -1 5 2 5 6 -1 -1 3 0 21 + 303 cpu_est_0_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 302 cpu_est_3_ 3 -1 5 2 5 6 -1 -1 3 0 21 + 300 cpu_est_2_ 3 -1 5 2 5 6 -1 -1 3 0 21 + 382 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21 + 363 SM_AMIGA_3_ 3 -1 2 2 0 5 -1 -1 2 0 21 + 359 inst_CLK_030_H 3 -1 2 2 2 5 -1 -1 2 0 21 + 356 RST_DLY_0_ 3 -1 6 2 5 6 -1 -1 2 0 21 + 349 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 331 inst_CLK_OUT_PRE_25 3 -1 2 2 2 5 -1 -1 2 0 21 + 313 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 2 0 21 + 309 inst_AS_030_000_SYNC 3 -1 0 2 0 3 -1 -1 2 0 21 + 305 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21 + 369 N_110_i 3 -1 6 2 1 5 -1 -1 1 0 21 + 337 CLK_000_D_2_ 3 -1 1 2 0 2 -1 -1 1 0 21 + 333 IPL_D0_1_ 3 -1 4 2 1 4 -1 -1 1 0 21 + 330 inst_CLK_OUT_PRE_50 3 -1 7 2 2 7 -1 -1 1 0 21 + 326 CLK_000_D_9_ 3 -1 0 2 2 3 -1 -1 1 0 21 + 325 CLK_000_D_8_ 3 -1 5 2 0 2 -1 -1 1 0 21 + 378 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 377 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 376 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 375 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 374 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 367 N_213 3 -1 5 1 2 -1 -1 3 0 21 + 366 N_100_i_1 3 -1 6 1 6 -1 -1 3 0 21 + 351 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 343 N_223_i 3 -1 3 1 1 -1 -1 3 0 21 + 321 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 + 315 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21 + 308 N_163_i 3 -1 0 1 3 -1 -1 3 0 21 + 301 N_158_i 3 -1 2 1 7 -1 -1 3 0 21 + 295 N_11_i 3 -1 7 1 7 -1 -1 3 0 21 + 383 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 381 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 379 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 373 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 358 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 347 N_245_i 3 -1 4 1 1 -1 -1 2 0 21 + 345 N_244_i 3 -1 1 1 1 -1 -1 2 0 21 + 340 N_186_i 3 -1 5 1 1 -1 -1 2 0 21 + 336 N_174_i 3 -1 7 1 1 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 319 N_273_i 3 -1 7 1 0 -1 -1 2 0 21 + 306 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 299 ds_000_dma_0_un1_n 3 -1 5 1 6 -1 -1 2 0 21 + 298 ds_000_dma_0_un3_n 3 -1 2 1 6 -1 -1 2 0 21 + 297 ipl_030_0_2__un3_n 3 -1 1 1 1 -1 -1 2 0 21 + 296 ipl_030_0_1__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 294 pos_clk_un9_clk_000_pe_n 3 -1 5 1 3 -1 -1 2 0 21 + 293 ipl_030_0_0__un1_n 3 -1 1 1 1 -1 -1 2 0 21 + 372 N_291 3 -1 5 1 5 -1 -1 1 0 21 + 371 N_123_i 3 -1 0 1 5 -1 -1 1 0 21 + 354 pos_clk_un23_bgack_030_int_i_1_0_n 3 -1 0 1 5 -1 -1 1 0 21 + 348 CLK_000_D_10_ 3 -1 3 1 2 -1 -1 1 0 21 + 346 CLK_000_D_7_ 3 -1 2 1 5 -1 -1 1 0 21 + 344 CLK_000_D_6_ 3 -1 5 1 2 -1 -1 1 0 21 + 342 CLK_000_D_5_ 3 -1 0 1 5 -1 -1 1 0 21 + 341 CLK_000_D_4_ 3 -1 5 1 0 -1 -1 1 0 21 + 339 CLK_000_D_3_ 3 -1 2 1 5 -1 -1 1 0 21 + 338 N_277_i 3 -1 0 1 1 -1 -1 1 0 21 + 335 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 334 N_226_i 3 -1 0 1 1 -1 -1 1 0 21 + 332 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 + 327 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21 + 323 N_129_i 3 -1 4 1 0 -1 -1 1 0 21 + 318 inst_VPA_D 3 -1 5 1 5 -1 -1 1 0 21 + 310 N_296_0 3 -1 3 1 0 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 - 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 - 63 CLK_030 1 -1 -1 2 2 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 63 CLK_030 1 -1 -1 2 2 5 63 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 1 4 55 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 @@ -13250,26 +7737,2373 @@ 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 67 IPL_2_ 1 -1 -1 1 1 67 -1 59 A_1_ 1 -1 -1 1 2 59 -1 - 35 VPA 1 -1 -1 1 3 35 -1 + 35 VPA 1 -1 -1 1 5 35 -1 29 DTACK 1 -1 -1 1 0 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 10 CLK_000 1 -1 -1 1 3 10 -1 -124 "number of signals after reading design file" +149 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 1 4 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 1 2 7 40 -1 1 0 21 + 79 RW_000 5 375 7 2 4 6 79 -1 3 0 21 + 68 A_0_ 5 371 6 2 2 5 68 -1 3 0 21 + 70 RW 5 380 6 2 0 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 377 7 0 82 -1 3 0 21 + 80 DSACK1 5 378 7 0 80 -1 3 0 21 + 34 VMA 5 379 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 376 3 0 28 -1 2 0 21 + 8 IPL_030_2_ 5 374 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 373 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 372 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 324 inst_RESET_OUT 3 -1 5 8 0 1 2 3 4 5 6 7 -1 -1 2 0 21 + 377 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 326 CLK_000_D_0_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 319 CLK_000_D_1_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 349 SM_AMIGA_6_ 3 -1 2 5 0 1 2 5 7 -1 -1 3 0 21 + 305 inst_AS_030_D0 3 -1 7 5 1 2 3 4 7 -1 -1 1 0 21 + 351 SM_AMIGA_4_ 3 -1 0 3 0 1 2 -1 -1 3 0 21 + 350 SM_AMIGA_0_ 3 -1 7 3 0 2 7 -1 -1 3 0 21 + 302 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 300 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 299 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 + 358 SM_AMIGA_3_ 3 -1 2 3 0 2 5 -1 -1 2 0 21 + 306 inst_AS_030_000_SYNC 3 -1 2 3 0 2 3 -1 -1 2 0 21 + 331 N_69_i 3 -1 7 3 0 3 5 -1 -1 1 0 21 + 322 CLK_000_D_11_ 3 -1 2 3 4 6 7 -1 -1 1 0 21 + 379 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 366 S0__clk_un23_bgack_030_int_i_0_0 3 -1 6 2 4 6 -1 -1 3 0 21 + 361 SM_AMIGA_i_7_ 3 -1 0 2 2 7 -1 -1 3 0 21 + 359 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 3 0 21 + 357 SM_AMIGA_5_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 356 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21 + 352 RST_DLY_0_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 314 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 312 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 311 CYCLE_DMA_1_ 3 -1 1 2 1 6 -1 -1 3 0 21 + 310 CYCLE_DMA_0_ 3 -1 6 2 1 6 -1 -1 3 0 21 + 301 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 + 354 RST_DLY_2_ 3 -1 5 2 0 5 -1 -1 2 0 21 + 353 RST_DLY_1_ 3 -1 5 2 0 5 -1 -1 2 0 21 + 347 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21 + 345 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 328 inst_CLK_OUT_PRE_25 3 -1 6 2 4 6 -1 -1 2 0 21 + 316 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 309 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 2 0 21 + 308 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21 + 303 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 364 N_67_i 3 -1 7 2 1 7 -1 -1 1 0 21 + 333 CLK_000_D_2_ 3 -1 7 2 0 2 -1 -1 1 0 21 + 327 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21 + 320 CLK_000_D_10_ 3 -1 4 2 2 6 -1 -1 1 0 21 + 318 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 315 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 + 307 inst_BGACK_030_INT_D 3 -1 3 2 2 6 -1 -1 1 0 21 + 378 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 375 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 371 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 369 N_104 3 -1 1 1 0 -1 -1 3 0 21 + 368 N_103 3 -1 0 1 0 -1 -1 3 0 21 + 348 inst_BGACK_030_INT_PRE 3 -1 1 1 1 -1 -1 3 0 21 + 295 N_330_0 3 -1 0 1 2 -1 -1 3 0 21 + 380 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 376 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 374 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 373 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 372 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 370 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 367 N_106 3 -1 0 1 0 -1 -1 2 0 21 + 365 N_107 3 -1 5 1 0 -1 -1 2 0 21 + 363 G_117 3 -1 0 1 5 -1 -1 2 0 21 + 362 G_116 3 -1 1 1 5 -1 -1 2 0 21 + 355 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21 + 346 pos_clk_ipl_n 3 -1 5 1 1 -1 -1 2 0 21 + 339 N_123_i 3 -1 0 1 5 -1 -1 2 0 21 + 313 N_309_i 3 -1 3 1 3 -1 -1 2 0 21 + 304 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 298 ds_000_dma_0_un1_n 3 -1 6 1 5 -1 -1 2 0 21 + 297 ds_000_dma_0_un3_n 3 -1 6 1 5 -1 -1 2 0 21 + 296 N_133_i 3 -1 6 1 7 -1 -1 2 0 21 + 360 pos_clk_un23_bgack_030_int_i_0_0_n 3 -1 4 1 6 -1 -1 1 0 21 + 344 CLK_000_D_12_ 3 -1 4 1 7 -1 -1 1 0 21 + 343 CLK_000_D_9_ 3 -1 3 1 4 -1 -1 1 0 21 + 342 N_315_i 3 -1 3 1 2 -1 -1 1 0 21 + 341 CLK_000_D_8_ 3 -1 3 1 3 -1 -1 1 0 21 + 340 CLK_000_D_7_ 3 -1 1 1 3 -1 -1 1 0 21 + 338 CLK_000_D_6_ 3 -1 5 1 1 -1 -1 1 0 21 + 337 N_82_i 3 -1 5 1 2 -1 -1 1 0 21 + 336 CLK_000_D_5_ 3 -1 3 1 5 -1 -1 1 0 21 + 335 CLK_000_D_4_ 3 -1 5 1 3 -1 -1 1 0 21 + 334 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21 + 332 IPL_D0_2_ 3 -1 2 1 5 -1 -1 1 0 21 + 330 IPL_D0_1_ 3 -1 0 1 0 -1 -1 1 0 21 + 329 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 + 325 pos_clk_un28_as_030_d0_i_n 3 -1 7 1 2 -1 -1 1 0 21 + 323 inst_DTACK_D0 3 -1 5 1 5 -1 -1 1 0 21 + 321 N_316_i 3 -1 5 1 3 -1 -1 1 0 21 + 294 N_108 3 -1 0 1 0 -1 -1 1 0 21 + 293 bgack_030_int_0_un1_n 3 -1 1 1 7 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 67 IPL_2_ 1 -1 -1 3 1 2 5 67 -1 + 27 BGACK_000 1 -1 -1 3 1 4 7 27 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 6 63 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 5 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +150 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 2 4 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 + 79 RW_000 5 376 7 2 4 6 79 -1 3 0 21 + 70 RW 5 381 6 2 2 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 68 A_0_ 5 372 6 1 1 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 378 7 0 82 -1 3 0 21 + 80 DSACK1 5 379 7 0 80 -1 3 0 21 + 34 VMA 5 380 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 377 3 0 28 -1 2 0 21 + 8 IPL_030_2_ 5 374 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 375 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 373 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 378 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 325 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 351 SM_AMIGA_6_ 3 -1 0 5 0 1 2 5 7 -1 -1 3 0 21 + 326 CLK_000_D_0_ 3 -1 1 5 0 2 3 5 7 -1 -1 1 0 21 + 320 CLK_000_D_1_ 3 -1 7 5 0 2 3 5 7 -1 -1 1 0 21 + 306 inst_AS_030_D0 3 -1 7 5 0 3 4 5 7 -1 -1 1 0 21 + 358 SM_AMIGA_1_ 3 -1 5 3 0 5 7 -1 -1 3 0 21 + 353 SM_AMIGA_4_ 3 -1 2 3 0 2 5 -1 -1 3 0 21 + 352 SM_AMIGA_0_ 3 -1 7 3 0 5 7 -1 -1 3 0 21 + 311 CYCLE_DMA_0_ 3 -1 0 3 0 2 6 -1 -1 3 0 21 + 302 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 + 360 SM_AMIGA_3_ 3 -1 2 3 0 2 3 -1 -1 2 0 21 + 366 N_67_i 3 -1 7 3 2 5 7 -1 -1 1 0 21 + 308 inst_BGACK_030_INT_D 3 -1 7 3 0 1 6 -1 -1 1 0 21 + 363 SM_AMIGA_i_7_ 3 -1 5 2 0 7 -1 -1 3 0 21 + 361 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 359 SM_AMIGA_5_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 354 RST_DLY_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 + 318 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 314 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 313 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 312 CYCLE_DMA_1_ 3 -1 2 2 2 6 -1 -1 3 0 21 + 303 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 301 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 300 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 356 RST_DLY_2_ 3 -1 5 2 3 5 -1 -1 2 0 21 + 355 RST_DLY_1_ 3 -1 5 2 3 5 -1 -1 2 0 21 + 349 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 2 0 21 + 347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 + 329 inst_CLK_OUT_PRE_25 3 -1 2 2 2 4 -1 -1 2 0 21 + 317 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 310 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 2 0 21 + 309 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21 + 307 inst_AS_030_000_SYNC 3 -1 0 2 0 3 -1 -1 2 0 21 + 305 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 + 304 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 334 CLK_000_D_2_ 3 -1 7 2 0 1 -1 -1 1 0 21 + 322 CLK_000_D_12_ 3 -1 4 2 6 7 -1 -1 1 0 21 + 321 CLK_000_D_11_ 3 -1 4 2 4 6 -1 -1 1 0 21 + 319 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 380 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 379 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 376 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 372 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 370 N_103 3 -1 0 1 5 -1 -1 3 0 21 + 369 sm_amiga_nss_i_0_4_0__n 3 -1 5 1 5 -1 -1 3 0 21 + 368 S0__clk_un23_bgack_030_int_i_0_0 3 -1 6 1 6 -1 -1 3 0 21 + 350 inst_BGACK_030_INT_PRE 3 -1 2 1 2 -1 -1 3 0 21 + 296 N_330_0 3 -1 2 1 0 -1 -1 3 0 21 + 381 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 377 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 375 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 374 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 373 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 367 N_107 3 -1 3 1 5 -1 -1 2 0 21 + 365 G_117 3 -1 5 1 1 -1 -1 2 0 21 + 364 G_116 3 -1 2 1 1 -1 -1 2 0 21 + 357 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21 + 348 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21 + 341 N_123_i 3 -1 3 1 5 -1 -1 2 0 21 + 315 N_309_i 3 -1 6 1 3 -1 -1 2 0 21 + 299 ds_000_dma_0_un1_n 3 -1 6 1 2 -1 -1 2 0 21 + 298 ds_000_dma_0_un3_n 3 -1 6 1 2 -1 -1 2 0 21 + 297 N_133_i 3 -1 6 1 7 -1 -1 2 0 21 + 362 pos_clk_un23_bgack_030_int_i_0_0_n 3 -1 6 1 6 -1 -1 1 0 21 + 346 CLK_000_D_13_ 3 -1 7 1 7 -1 -1 1 0 21 + 345 CLK_000_D_10_ 3 -1 5 1 4 -1 -1 1 0 21 + 344 N_315_i 3 -1 3 1 2 -1 -1 1 0 21 + 343 CLK_000_D_9_ 3 -1 5 1 5 -1 -1 1 0 21 + 342 CLK_000_D_8_ 3 -1 5 1 5 -1 -1 1 0 21 + 340 CLK_000_D_7_ 3 -1 0 1 5 -1 -1 1 0 21 + 339 N_82_i 3 -1 3 1 2 -1 -1 1 0 21 + 338 CLK_000_D_6_ 3 -1 1 1 0 -1 -1 1 0 21 + 337 CLK_000_D_5_ 3 -1 5 1 1 -1 -1 1 0 21 + 336 CLK_000_D_4_ 3 -1 4 1 5 -1 -1 1 0 21 + 335 CLK_000_D_3_ 3 -1 1 1 4 -1 -1 1 0 21 + 333 N_69_i 3 -1 5 1 3 -1 -1 1 0 21 + 332 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 331 IPL_D0_1_ 3 -1 5 1 5 -1 -1 1 0 21 + 330 IPL_D0_0_ 3 -1 0 1 2 -1 -1 1 0 21 + 328 inst_CLK_OUT_PRE_50 3 -1 2 1 2 -1 -1 1 0 21 + 327 pos_clk_un28_as_030_d0_i_n 3 -1 7 1 0 -1 -1 1 0 21 + 324 inst_DTACK_D0 3 -1 6 1 3 -1 -1 1 0 21 + 323 N_316_i 3 -1 3 1 3 -1 -1 1 0 21 + 316 inst_VPA_D 3 -1 5 1 3 -1 -1 1 0 21 + 295 N_332_i 3 -1 0 1 5 -1 -1 1 0 21 + 294 N_108 3 -1 0 1 5 -1 -1 1 0 21 + 293 bgack_030_int_0_un1_n 3 -1 2 1 7 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 66 IPL_0_ 1 -1 -1 3 0 1 2 66 -1 + 27 BGACK_000 1 -1 -1 3 2 4 7 27 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 6 63 -1 + 59 A_1_ 1 -1 -1 1 1 59 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +152 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 347 7 3 2 4 6 79 -1 4 0 21 - 70 RW 5 352 6 2 5 7 70 -1 2 0 21 + 40 BERR 5 -1 4 3 2 3 5 40 -1 1 0 21 + 79 RW_000 5 378 7 2 4 6 79 -1 3 0 21 + 70 RW 5 383 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 68 A_0_ 5 374 6 1 3 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 380 7 0 82 -1 3 0 21 + 80 DSACK1 5 381 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 379 3 0 28 -1 2 0 21 + 8 IPL_030_2_ 5 377 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 376 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 375 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 34 VMA 5 382 3 0 34 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 380 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 330 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 331 CLK_000_D_0_ 3 -1 1 5 0 2 3 5 7 -1 -1 1 0 21 + 353 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21 + 326 CLK_000_D_1_ 3 -1 7 4 0 2 5 7 -1 -1 1 0 21 + 360 SM_AMIGA_1_ 3 -1 5 3 0 3 5 -1 -1 3 0 21 + 310 inst_AS_000_DMA 3 -1 1 3 1 6 7 -1 -1 2 0 21 + 307 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 2 0 21 + 372 N_142_i 3 -1 7 3 2 5 7 -1 -1 1 0 21 + 309 inst_BGACK_030_INT_D 3 -1 4 3 1 2 6 -1 -1 1 0 21 + 306 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21 + 367 SM_AMIGA_i_7_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 361 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 354 SM_AMIGA_0_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 319 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 317 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 311 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 3 0 21 + 303 cpu_est_1_ 3 -1 6 2 0 6 -1 -1 3 0 21 + 302 cpu_est_0_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 301 cpu_est_3_ 3 -1 6 2 0 6 -1 -1 3 0 21 + 300 cpu_est_2_ 3 -1 6 2 0 6 -1 -1 3 0 21 + 365 pos_clk_un23_bgack_030_int_i_0_i_n 3 -1 2 2 1 6 -1 -1 2 0 21 + 362 SM_AMIGA_3_ 3 -1 5 2 0 5 -1 -1 2 0 21 + 347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 + 305 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 + 304 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 332 inst_CLK_OUT_PRE_50 3 -1 5 2 3 5 -1 -1 1 0 21 + 328 CLK_000_D_10_ 3 -1 7 2 1 3 -1 -1 1 0 21 + 327 CLK_000_D_9_ 3 -1 2 2 1 7 -1 -1 1 0 21 + 325 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 + 321 N_143_i 3 -1 7 2 0 6 -1 -1 1 0 21 + 378 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 374 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 368 N_337 3 -1 5 1 3 -1 -1 3 0 21 + 364 N_162_0 3 -1 1 1 3 -1 -1 3 0 21 + 363 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 3 0 21 + 357 RST_DLY_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 356 RST_DLY_0_ 3 -1 0 1 0 -1 -1 3 0 21 + 355 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 + 352 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 335 N_22_i 3 -1 0 1 3 -1 -1 3 0 21 + 324 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 + 314 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 3 0 21 + 312 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21 + 383 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 381 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 379 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 377 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 376 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 375 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 373 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 371 N_276_0_1 3 -1 6 1 6 -1 -1 2 0 21 + 369 N_200 3 -1 0 1 5 -1 -1 2 0 21 + 359 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21 + 358 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 + 351 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 2 0 21 + 350 N_246_i 3 -1 1 1 1 -1 -1 2 0 21 + 349 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21 + 348 N_244_i 3 -1 2 1 1 -1 -1 2 0 21 + 333 inst_CLK_OUT_PRE_25 3 -1 3 1 3 -1 -1 2 0 21 + 323 N_241_i 3 -1 6 1 6 -1 -1 2 0 21 + 322 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 318 dsack1_int_0_un1_n 3 -1 3 1 7 -1 -1 2 0 21 + 316 dsack1_int_0_un3_n 3 -1 3 1 7 -1 -1 2 0 21 + 313 N_182_0 3 -1 0 1 5 -1 -1 2 0 21 + 299 pos_clk_un6_bgack_000_0_n 3 -1 7 1 7 -1 -1 2 0 21 + 296 N_201_i 3 -1 2 1 5 -1 -1 2 0 21 + 295 N_199_i 3 -1 0 1 5 -1 -1 2 0 21 + 294 N_198_i 3 -1 5 1 5 -1 -1 2 0 21 + 293 N_178_0 3 -1 5 1 7 -1 -1 2 0 21 + 382 RN_VMA 3 34 3 1 0 34 -1 1 0 21 + 370 N_263 3 -1 6 1 2 -1 -1 1 0 21 + 366 N_161_i 3 -1 4 1 2 -1 -1 1 0 21 + 346 CLK_000_D_11_ 3 -1 3 1 1 -1 -1 1 0 21 + 345 CLK_000_D_8_ 3 -1 6 1 2 -1 -1 1 0 21 + 344 CLK_000_D_7_ 3 -1 2 1 6 -1 -1 1 0 21 + 343 CLK_000_D_6_ 3 -1 0 1 2 -1 -1 1 0 21 + 342 CLK_000_D_5_ 3 -1 5 1 0 -1 -1 1 0 21 + 341 CLK_000_D_4_ 3 -1 2 1 5 -1 -1 1 0 21 + 340 CLK_000_D_3_ 3 -1 5 1 2 -1 -1 1 0 21 + 339 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 338 N_237_i 3 -1 0 1 0 -1 -1 1 0 21 + 337 IPL_D0_2_ 3 -1 4 1 1 -1 -1 1 0 21 + 336 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 + 334 IPL_D0_0_ 3 -1 1 1 2 -1 -1 1 0 21 + 329 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 + 320 inst_VPA_D 3 -1 3 1 0 -1 -1 1 0 21 + 315 N_156_i 3 -1 0 1 0 -1 -1 1 0 21 + 308 N_214_i 3 -1 0 1 0 -1 -1 1 0 21 + 298 N_202_i 3 -1 5 1 5 -1 -1 1 0 21 + 297 N_266_i 3 -1 5 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 4 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 + 63 CLK_030 1 -1 -1 2 1 6 63 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 1 59 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +150 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 374 7 2 4 6 79 -1 3 0 21 + 68 A_0_ 5 380 6 2 0 1 68 -1 3 0 21 + 70 RW 5 379 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 376 7 0 82 -1 3 0 21 + 34 VMA 5 378 3 0 34 -1 3 0 21 + 80 DSACK1 5 377 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 375 3 0 28 -1 2 0 21 + 8 IPL_030_2_ 5 373 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 372 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 381 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 376 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 330 inst_RESET_OUT 3 -1 2 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 332 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 4 5 7 -1 -1 1 0 21 + 331 CLK_000_D_1_ 3 -1 4 7 0 1 2 3 4 5 7 -1 -1 1 0 21 + 352 SM_AMIGA_6_ 3 -1 1 5 0 1 2 5 7 -1 -1 3 0 21 + 310 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21 + 366 SM_AMIGA_i_7_ 3 -1 5 3 1 2 7 -1 -1 3 0 21 + 362 SM_AMIGA_2_ 3 -1 5 3 0 1 5 -1 -1 3 0 21 + 359 SM_AMIGA_1_ 3 -1 0 3 0 5 7 -1 -1 3 0 21 + 353 SM_AMIGA_0_ 3 -1 7 3 1 2 7 -1 -1 3 0 21 + 305 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 + 311 inst_AS_030_000_SYNC 3 -1 2 3 1 2 3 -1 -1 2 0 21 + 365 N_375_i 3 -1 5 3 2 3 5 -1 -1 1 0 21 + 325 N_376_i 3 -1 4 3 0 5 7 -1 -1 1 0 21 + 324 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21 + 361 SM_AMIGA_3_ 3 -1 5 2 1 5 -1 -1 3 0 21 + 360 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 354 SM_AMIGA_4_ 3 -1 5 2 1 5 -1 -1 3 0 21 + 351 inst_BGACK_030_INT_PRE 3 -1 0 2 0 7 -1 -1 3 0 21 + 322 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 + 318 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 317 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 307 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 303 cpu_est_0_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 301 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 350 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21 + 348 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 314 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 2 0 21 + 313 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21 + 309 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 308 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 327 CLK_000_D_11_ 3 -1 2 2 2 3 -1 -1 1 0 21 + 312 inst_BGACK_030_INT_D 3 -1 5 2 2 6 -1 -1 1 0 21 + 380 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 378 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 374 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 355 RST_DLY_0_ 3 -1 2 1 2 -1 -1 3 0 21 + 316 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 315 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 + 306 N_154_0 3 -1 2 1 7 -1 -1 3 0 21 + 295 N_192_i 3 -1 5 1 5 -1 -1 3 0 21 + 293 N_146_0 3 -1 5 1 2 -1 -1 3 0 21 + 381 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 379 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 377 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 375 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 373 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 370 N_186 3 -1 2 1 2 -1 -1 2 0 21 + 368 G_117 3 -1 0 1 1 -1 -1 2 0 21 + 367 G_116 3 -1 5 1 1 -1 -1 2 0 21 + 363 N_164_i 3 -1 3 1 5 -1 -1 2 0 21 + 358 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21 + 357 RST_DLY_2_ 3 -1 2 1 2 -1 -1 2 0 21 + 356 RST_DLY_1_ 3 -1 2 1 2 -1 -1 2 0 21 + 349 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21 + 335 inst_CLK_OUT_PRE_25 3 -1 5 1 5 -1 -1 2 0 21 + 321 pos_clk_un23_bgack_030_int_i_0_0_n 3 -1 0 1 6 -1 -1 2 0 21 + 304 ds_000_dma_0_un1_n 3 -1 6 1 6 -1 -1 2 0 21 + 302 ds_000_dma_0_un3_n 3 -1 6 1 6 -1 -1 2 0 21 + 296 N_191_i 3 -1 5 1 5 -1 -1 2 0 21 + 294 N_255_i 3 -1 7 1 5 -1 -1 2 0 21 + 369 N_258 3 -1 0 1 5 -1 -1 1 0 21 + 364 N_149_i 3 -1 0 1 3 -1 -1 1 0 21 + 347 CLK_000_D_12_ 3 -1 3 1 2 -1 -1 1 0 21 + 346 CLK_000_D_9_ 3 -1 5 1 0 -1 -1 1 0 21 + 345 CLK_000_D_8_ 3 -1 6 1 5 -1 -1 1 0 21 + 344 CLK_000_D_7_ 3 -1 0 1 6 -1 -1 1 0 21 + 343 CLK_000_D_6_ 3 -1 1 1 0 -1 -1 1 0 21 + 342 CLK_000_D_5_ 3 -1 0 1 1 -1 -1 1 0 21 + 341 CLK_000_D_4_ 3 -1 3 1 0 -1 -1 1 0 21 + 340 CLK_000_D_3_ 3 -1 4 1 3 -1 -1 1 0 21 + 339 CLK_000_D_2_ 3 -1 4 1 4 -1 -1 1 0 21 + 338 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 + 337 IPL_D0_1_ 3 -1 1 1 0 -1 -1 1 0 21 + 336 IPL_D0_0_ 3 -1 5 1 5 -1 -1 1 0 21 + 334 inst_CLK_OUT_PRE_50 3 -1 5 1 5 -1 -1 1 0 21 + 333 N_133_i 3 -1 4 1 2 -1 -1 1 0 21 + 329 inst_DTACK_D0 3 -1 1 1 3 -1 -1 1 0 21 + 328 N_275_i 3 -1 4 1 7 -1 -1 1 0 21 + 326 CLK_000_D_10_ 3 -1 0 1 2 -1 -1 1 0 21 + 323 N_249_i 3 -1 6 1 0 -1 -1 1 0 21 + 319 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21 + 300 N_194_i 3 -1 1 1 5 -1 -1 1 0 21 + 299 vma_int_0_un1_n 3 -1 3 1 3 -1 -1 1 0 21 + 298 N_253_i 3 -1 1 1 5 -1 -1 1 0 21 + 297 N_267_i 3 -1 0 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 27 BGACK_000 1 -1 -1 3 0 4 7 27 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 63 CLK_030 1 -1 -1 2 2 6 63 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 +139 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 + 40 BERR 5 -1 4 5 0 2 3 5 7 40 -1 1 0 21 + 79 RW_000 5 362 7 3 1 4 6 79 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 31 UDS_000 5 -1 3 2 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 1 6 30 -1 1 0 21 + 68 A_0_ 5 367 6 1 5 68 -1 3 0 21 + 70 RW 5 368 6 1 0 70 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 5 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 5 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 364 7 0 82 -1 3 0 21 + 80 DSACK1 5 365 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 363 3 0 28 -1 2 0 21 + 8 IPL_030_2_ 5 361 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 370 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 369 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 34 VMA 5 366 3 0 34 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 364 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 319 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 321 CLK_000_D_0_ 3 -1 5 5 0 2 3 5 7 -1 -1 1 0 21 + 320 CLK_000_D_1_ 3 -1 7 5 0 2 3 5 7 -1 -1 1 0 21 + 326 N_112_i 3 -1 7 4 0 2 3 6 -1 -1 1 0 21 + 343 SM_AMIGA_3_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 + 334 SM_AMIGA_1_ 3 -1 5 3 0 5 7 -1 -1 3 0 21 + 333 SM_AMIGA_6_ 3 -1 3 3 0 3 5 -1 -1 3 0 21 + 300 cpu_est_0_ 3 -1 7 3 2 6 7 -1 -1 3 0 21 + 306 inst_BGACK_030_INT_D 3 -1 4 3 3 5 6 -1 -1 1 0 21 + 304 inst_AS_030_D0 3 -1 7 3 3 4 7 -1 -1 1 0 21 + 347 SM_AMIGA_i_7_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 344 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 342 SM_AMIGA_5_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 337 SM_AMIGA_4_ 3 -1 2 2 0 2 -1 -1 3 0 21 + 336 SM_AMIGA_0_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 332 inst_BGACK_030_INT_PRE 3 -1 2 2 2 7 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 313 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 312 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 310 CYCLE_DMA_0_ 3 -1 2 2 1 2 -1 -1 3 0 21 + 309 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 3 0 21 + 305 inst_AS_030_000_SYNC 3 -1 3 2 0 3 -1 -1 3 0 21 + 301 cpu_est_1_ 3 -1 6 2 2 6 -1 -1 3 0 21 + 298 cpu_est_3_ 3 -1 2 2 2 6 -1 -1 3 0 21 + 297 cpu_est_2_ 3 -1 6 2 2 6 -1 -1 3 0 21 + 335 N_138_i 3 -1 2 2 0 5 -1 -1 2 0 21 + 329 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 + 323 inst_CLK_OUT_PRE_25 3 -1 5 2 0 5 -1 -1 2 0 21 + 316 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 307 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 2 0 21 + 303 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 + 302 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21 + 324 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21 + 322 inst_CLK_OUT_PRE_50 3 -1 2 2 2 5 -1 -1 1 0 21 + 367 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 356 N_169 3 -1 0 1 3 -1 -1 3 0 21 + 350 N_299_i_1 3 -1 3 1 3 -1 -1 3 0 21 + 345 sm_amiga_nss_i_7__n 3 -1 5 1 0 -1 -1 3 0 21 + 338 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 0 21 + 311 CYCLE_DMA_1_ 3 -1 1 1 1 -1 -1 3 0 21 + 299 N_22_i 3 -1 2 1 3 -1 -1 3 0 21 + 296 rw_000_int_0_un1_n 3 -1 0 1 7 -1 -1 3 0 21 + 295 rw_000_int_0_un3_n 3 -1 0 1 7 -1 -1 3 0 21 + 370 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 369 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 368 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 365 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 363 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 362 RN_RW_000 3 79 7 1 7 79 -1 2 0 21 + 361 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 360 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 359 pos_clk_un23_bgack_030_int_i_1_i_n 3 -1 1 1 1 -1 -1 2 0 21 + 357 pos_clk_un23_bgack_030_int_i_0_x2 3 -1 1 1 1 -1 -1 2 0 21 + 352 N_231 3 -1 0 1 0 -1 -1 2 0 21 + 351 N_215 3 -1 2 1 0 -1 -1 2 0 21 + 349 G_119 3 -1 6 1 1 -1 -1 2 0 21 + 348 G_118 3 -1 2 1 1 -1 -1 2 0 21 + 346 N_109_0 3 -1 1 1 1 -1 -1 2 0 21 + 341 inst_CLK_030_H 3 -1 1 1 1 -1 -1 2 0 21 + 340 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 + 339 RST_DLY_1_ 3 -1 3 1 3 -1 -1 2 0 21 + 331 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 2 0 21 + 330 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21 + 315 N_241_i 3 -1 6 1 6 -1 -1 2 0 21 + 293 pos_clk_un6_bgack_000_0_n 3 -1 7 1 7 -1 -1 2 0 21 + 366 RN_VMA 3 34 3 1 2 34 -1 1 0 21 + 358 N_113_i 3 -1 7 1 1 -1 -1 1 0 21 + 355 N_294 3 -1 3 1 0 -1 -1 1 0 21 + 354 N_274 3 -1 7 1 0 -1 -1 1 0 21 + 353 N_234 3 -1 0 1 0 -1 -1 1 0 21 + 328 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 327 IPL_D0_1_ 3 -1 5 1 6 -1 -1 1 0 21 + 325 IPL_D0_0_ 3 -1 6 1 2 -1 -1 1 0 21 + 318 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21 + 314 inst_VPA_D 3 -1 6 1 2 -1 -1 1 0 21 + 308 N_238_i 3 -1 2 1 2 -1 -1 1 0 21 + 294 N_167_i 3 -1 7 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 66 IPL_0_ 1 -1 -1 3 1 2 6 66 -1 + 55 IPL_1_ 1 -1 -1 3 1 5 6 55 -1 + 27 BGACK_000 1 -1 -1 3 2 4 7 27 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 1 63 -1 + 59 A_1_ 1 -1 -1 1 5 59 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 5 10 -1 +151 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 40 BERR 5 -1 4 6 0 1 2 3 5 7 40 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 1 4 6 7 41 -1 1 0 21 + 79 RW_000 5 375 7 2 4 6 79 -1 3 0 21 + 70 RW 5 380 6 2 1 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 + 68 A_0_ 5 381 6 1 3 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 377 7 0 82 -1 3 0 21 + 80 DSACK1 5 378 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 376 3 0 28 -1 2 0 21 + 8 IPL_030_2_ 5 374 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 373 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 382 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 34 VMA 5 379 3 0 34 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 377 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 327 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 329 CLK_000_D_0_ 3 -1 2 7 0 1 2 3 4 5 6 -1 -1 1 0 21 + 328 CLK_000_D_1_ 3 -1 4 7 0 1 2 3 4 5 6 -1 -1 1 0 21 + 310 inst_AS_030_D0 3 -1 7 5 1 2 3 4 7 -1 -1 1 0 21 + 351 SM_AMIGA_6_ 3 -1 3 4 0 1 3 7 -1 -1 3 0 21 + 364 SM_AMIGA_i_7_ 3 -1 5 3 2 3 7 -1 -1 3 0 21 + 353 SM_AMIGA_4_ 3 -1 2 3 0 1 2 -1 -1 3 0 21 + 352 SM_AMIGA_0_ 3 -1 0 3 0 2 7 -1 -1 3 0 21 + 361 SM_AMIGA_3_ 3 -1 2 3 0 2 5 -1 -1 2 0 21 + 369 S0__clk_un23_bgack_030_int_i_0_0 3 -1 0 2 0 6 -1 -1 3 0 21 + 362 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 359 SM_AMIGA_5_ 3 -1 3 2 2 3 -1 -1 3 0 21 + 358 SM_AMIGA_1_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 354 RST_DLY_0_ 3 -1 6 2 2 6 -1 -1 3 0 21 + 350 inst_BGACK_030_INT_PRE 3 -1 1 2 1 7 -1 -1 3 0 21 + 318 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 317 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 306 cpu_est_2_ 3 -1 5 2 5 6 -1 -1 3 0 21 + 305 cpu_est_1_ 3 -1 5 2 5 6 -1 -1 3 0 21 + 303 cpu_est_3_ 3 -1 5 2 5 6 -1 -1 3 0 21 + 355 RST_DLY_1_ 3 -1 2 2 2 6 -1 -1 2 0 21 + 349 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21 + 331 inst_CLK_OUT_PRE_25 3 -1 1 2 1 3 -1 -1 2 0 21 + 314 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 2 0 21 + 313 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21 + 311 inst_AS_030_000_SYNC 3 -1 3 2 0 3 -1 -1 2 0 21 + 308 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 3 2 2 3 -1 -1 2 0 21 + 307 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 330 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21 + 325 CLK_000_D_11_ 3 -1 3 2 0 6 -1 -1 1 0 21 + 324 CLK_000_D_10_ 3 -1 2 2 0 3 -1 -1 1 0 21 + 322 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 + 312 inst_BGACK_030_INT_D 3 -1 7 2 3 6 -1 -1 1 0 21 + 309 N_127_i 3 -1 4 2 0 7 -1 -1 1 0 21 + 299 N_126_i 3 -1 4 2 5 6 -1 -1 1 0 21 + 381 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 375 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 367 N_95 3 -1 0 1 7 -1 -1 3 0 21 + 363 N_136_0 3 -1 1 1 2 -1 -1 3 0 21 + 333 N_22_i 3 -1 5 1 3 -1 -1 3 0 21 + 321 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 + 316 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 315 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 + 304 cpu_est_0_ 3 -1 5 1 5 -1 -1 3 0 21 + 298 N_180 3 -1 0 1 5 -1 -1 3 0 21 + 382 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 380 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 378 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 376 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 374 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 373 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 372 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 371 N_187 3 -1 6 1 2 -1 -1 2 0 21 + 370 N_409_1 3 -1 6 1 0 -1 -1 2 0 21 + 368 N_181 3 -1 5 1 5 -1 -1 2 0 21 + 366 G_117 3 -1 1 1 1 -1 -1 2 0 21 + 365 G_116 3 -1 2 1 1 -1 -1 2 0 21 + 357 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21 + 356 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 348 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21 + 347 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 2 0 21 + 323 pos_clk_un6_bgack_000_0_n 3 -1 4 1 7 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 302 N_211_i 3 -1 5 1 5 -1 -1 2 0 21 + 301 N_408 3 -1 2 1 5 -1 -1 2 0 21 + 297 N_179 3 -1 3 1 5 -1 -1 2 0 21 + 296 ds_000_dma_0_un1_n 3 -1 6 1 2 -1 -1 2 0 21 + 295 ds_000_dma_0_un3_n 3 -1 6 1 2 -1 -1 2 0 21 + 294 N_163_0 3 -1 5 1 2 -1 -1 2 0 21 + 379 RN_VMA 3 34 3 1 5 34 -1 1 0 21 + 360 pos_clk_un23_bgack_030_int_i_0_0_n 3 -1 0 1 6 -1 -1 1 0 21 + 346 CLK_000_D_12_ 3 -1 0 1 0 -1 -1 1 0 21 + 345 CLK_000_D_9_ 3 -1 0 1 2 -1 -1 1 0 21 + 344 CLK_000_D_8_ 3 -1 5 1 0 -1 -1 1 0 21 + 343 CLK_000_D_7_ 3 -1 5 1 5 -1 -1 1 0 21 + 342 CLK_000_D_6_ 3 -1 5 1 5 -1 -1 1 0 21 + 341 CLK_000_D_5_ 3 -1 2 1 5 -1 -1 1 0 21 + 340 CLK_000_D_4_ 3 -1 0 1 2 -1 -1 1 0 21 + 339 N_208_i 3 -1 5 1 5 -1 -1 1 0 21 + 338 CLK_000_D_3_ 3 -1 5 1 0 -1 -1 1 0 21 + 337 N_130_i 3 -1 7 1 3 -1 -1 1 0 21 + 336 CLK_000_D_2_ 3 -1 4 1 5 -1 -1 1 0 21 + 335 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 + 334 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 + 332 IPL_D0_0_ 3 -1 1 1 2 -1 -1 1 0 21 + 326 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 + 319 inst_VPA_D 3 -1 7 1 5 -1 -1 1 0 21 + 300 N_245 3 -1 0 1 5 -1 -1 1 0 21 + 293 N_182 3 -1 0 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 27 BGACK_000 1 -1 -1 3 1 4 7 27 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 6 63 -1 + 59 A_1_ 1 -1 -1 1 3 59 -1 + 35 VPA 1 -1 -1 1 7 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 2 10 -1 +150 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 374 7 2 4 6 79 -1 3 0 21 + 68 A_0_ 5 380 6 2 0 1 68 -1 3 0 21 + 70 RW 5 379 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 376 7 0 82 -1 3 0 21 + 34 VMA 5 378 3 0 34 -1 3 0 21 + 80 DSACK1 5 377 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 375 3 0 28 -1 2 0 21 + 8 IPL_030_2_ 5 373 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 372 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 381 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 376 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 330 inst_RESET_OUT 3 -1 2 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 332 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 4 5 7 -1 -1 1 0 21 + 331 CLK_000_D_1_ 3 -1 4 7 0 1 2 3 4 5 7 -1 -1 1 0 21 + 352 SM_AMIGA_6_ 3 -1 1 5 0 1 2 5 7 -1 -1 3 0 21 + 310 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21 + 366 SM_AMIGA_i_7_ 3 -1 5 3 1 2 7 -1 -1 3 0 21 + 362 SM_AMIGA_2_ 3 -1 5 3 0 1 5 -1 -1 3 0 21 + 359 SM_AMIGA_1_ 3 -1 0 3 0 5 7 -1 -1 3 0 21 + 353 SM_AMIGA_0_ 3 -1 7 3 1 2 7 -1 -1 3 0 21 + 305 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 + 311 inst_AS_030_000_SYNC 3 -1 2 3 1 2 3 -1 -1 2 0 21 + 365 N_375_i 3 -1 5 3 2 3 5 -1 -1 1 0 21 + 325 N_376_i 3 -1 4 3 0 5 7 -1 -1 1 0 21 + 324 inst_CLK_OUT_PRE_D 3 -1 5 3 1 2 6 -1 -1 1 0 21 + 361 SM_AMIGA_3_ 3 -1 5 2 1 5 -1 -1 3 0 21 + 360 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 354 SM_AMIGA_4_ 3 -1 5 2 1 5 -1 -1 3 0 21 + 351 inst_BGACK_030_INT_PRE 3 -1 0 2 0 7 -1 -1 3 0 21 + 322 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 + 318 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 317 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 307 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 303 cpu_est_0_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 301 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 350 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21 + 348 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 314 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 2 0 21 + 313 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21 + 309 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 308 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 327 CLK_000_D_11_ 3 -1 2 2 2 3 -1 -1 1 0 21 + 312 inst_BGACK_030_INT_D 3 -1 5 2 2 6 -1 -1 1 0 21 + 380 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 378 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 374 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 355 RST_DLY_0_ 3 -1 2 1 2 -1 -1 3 0 21 + 316 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 3 0 21 + 315 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 + 306 N_154_0 3 -1 2 1 7 -1 -1 3 0 21 + 295 N_192_i 3 -1 5 1 5 -1 -1 3 0 21 + 293 N_146_0 3 -1 5 1 2 -1 -1 3 0 21 + 381 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 379 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 377 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 375 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 373 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 372 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 371 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 370 N_186 3 -1 2 1 2 -1 -1 2 0 21 + 368 G_117 3 -1 0 1 1 -1 -1 2 0 21 + 367 G_116 3 -1 5 1 1 -1 -1 2 0 21 + 363 N_164_i 3 -1 3 1 5 -1 -1 2 0 21 + 358 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21 + 357 RST_DLY_2_ 3 -1 2 1 2 -1 -1 2 0 21 + 356 RST_DLY_1_ 3 -1 2 1 2 -1 -1 2 0 21 + 349 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21 + 335 inst_CLK_OUT_PRE_25 3 -1 5 1 5 -1 -1 2 0 21 + 321 pos_clk_un23_bgack_030_int_i_0_0_n 3 -1 0 1 6 -1 -1 2 0 21 + 304 ds_000_dma_0_un1_n 3 -1 6 1 6 -1 -1 2 0 21 + 302 ds_000_dma_0_un3_n 3 -1 6 1 6 -1 -1 2 0 21 + 296 N_191_i 3 -1 5 1 5 -1 -1 2 0 21 + 294 N_255_i 3 -1 7 1 5 -1 -1 2 0 21 + 369 N_258 3 -1 0 1 5 -1 -1 1 0 21 + 364 N_149_i 3 -1 0 1 3 -1 -1 1 0 21 + 347 CLK_000_D_12_ 3 -1 3 1 2 -1 -1 1 0 21 + 346 CLK_000_D_9_ 3 -1 5 1 0 -1 -1 1 0 21 + 345 CLK_000_D_8_ 3 -1 6 1 5 -1 -1 1 0 21 + 344 CLK_000_D_7_ 3 -1 0 1 6 -1 -1 1 0 21 + 343 CLK_000_D_6_ 3 -1 1 1 0 -1 -1 1 0 21 + 342 CLK_000_D_5_ 3 -1 0 1 1 -1 -1 1 0 21 + 341 CLK_000_D_4_ 3 -1 3 1 0 -1 -1 1 0 21 + 340 CLK_000_D_3_ 3 -1 4 1 3 -1 -1 1 0 21 + 339 CLK_000_D_2_ 3 -1 4 1 4 -1 -1 1 0 21 + 338 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 + 337 IPL_D0_1_ 3 -1 1 1 0 -1 -1 1 0 21 + 336 IPL_D0_0_ 3 -1 5 1 5 -1 -1 1 0 21 + 334 inst_CLK_OUT_PRE_50 3 -1 5 1 5 -1 -1 1 0 21 + 333 N_133_i 3 -1 4 1 2 -1 -1 1 0 21 + 329 inst_DTACK_D0 3 -1 1 1 3 -1 -1 1 0 21 + 328 N_275_i 3 -1 4 1 7 -1 -1 1 0 21 + 326 CLK_000_D_10_ 3 -1 0 1 2 -1 -1 1 0 21 + 323 N_249_i 3 -1 6 1 0 -1 -1 1 0 21 + 319 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21 + 300 N_194_i 3 -1 1 1 5 -1 -1 1 0 21 + 299 vma_int_0_un1_n 3 -1 3 1 3 -1 -1 1 0 21 + 298 N_253_i 3 -1 1 1 5 -1 -1 1 0 21 + 297 N_267_i 3 -1 0 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 27 BGACK_000 1 -1 -1 3 0 4 7 27 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 63 CLK_030 1 -1 -1 2 2 6 63 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 +149 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 40 BERR 5 -1 4 5 0 1 2 4 5 40 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 4 5 7 41 -1 1 0 21 + 79 RW_000 5 372 7 2 4 6 79 -1 3 0 21 + 70 RW 5 377 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 68 A_0_ 5 378 6 1 1 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 34 VMA 5 376 3 0 34 -1 3 0 21 + 80 DSACK1 5 375 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 373 3 0 28 -1 2 0 21 + 8 IPL_030_2_ 5 371 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 380 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 379 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 82 BGACK_030 5 374 7 0 82 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 374 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 1 0 21 + 322 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 324 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 + 323 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 + 362 SM_AMIGA_3_ 3 -1 0 4 0 1 2 3 -1 -1 3 0 21 + 351 SM_AMIGA_6_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 + 306 inst_AS_030_D0 3 -1 7 4 0 2 3 4 -1 -1 1 0 21 + 298 N_124_i 3 -1 3 4 0 1 2 6 -1 -1 1 0 21 + 363 SM_AMIGA_2_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 + 353 SM_AMIGA_4_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 + 352 SM_AMIGA_0_ 3 -1 0 3 0 2 7 -1 -1 3 0 21 + 303 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 + 300 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21 + 364 SM_AMIGA_i_7_ 3 -1 5 2 2 7 -1 -1 3 0 21 + 361 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 359 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 355 RST_DLY_0_ 3 -1 1 2 0 1 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 315 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 314 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 310 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 3 0 21 + 307 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 3 0 21 + 301 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 299 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 357 RST_DLY_2_ 3 -1 0 2 0 1 -1 -1 2 0 21 + 356 RST_DLY_1_ 3 -1 0 2 0 1 -1 -1 2 0 21 + 348 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21 + 346 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 318 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 309 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21 + 304 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 368 N_125_i 3 -1 7 2 5 7 -1 -1 1 0 21 + 327 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21 + 320 CLK_000_D_11_ 3 -1 5 2 0 5 -1 -1 1 0 21 + 308 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 + 378 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 376 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 372 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 369 N_132_0 3 -1 5 1 2 -1 -1 3 0 21 + 354 sm_amiga_nss_i_7__n 3 -1 0 1 5 -1 -1 3 0 21 + 349 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 313 CYCLE_DMA_1_ 3 -1 5 1 5 -1 -1 3 0 21 + 312 CYCLE_DMA_0_ 3 -1 5 1 5 -1 -1 3 0 21 + 297 N_11 3 -1 7 1 7 -1 -1 3 0 21 + 294 dsack1_int_0_un1_n 3 -1 0 1 7 -1 -1 3 0 21 + 293 dsack1_int_0_un3_n 3 -1 0 1 7 -1 -1 3 0 21 + 380 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 379 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 377 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 375 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 373 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 371 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 370 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 366 G_117 3 -1 0 1 6 -1 -1 2 0 21 + 365 G_116 3 -1 0 1 6 -1 -1 2 0 21 + 360 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21 + 358 N_291_0 3 -1 6 1 6 -1 -1 2 0 21 + 350 pos_clk_un23_bgack_030_int_i_0_i_n 3 -1 5 1 6 -1 -1 2 0 21 + 347 pos_clk_ipl_n 3 -1 6 1 1 -1 -1 2 0 21 + 337 N_243_i 3 -1 5 1 5 -1 -1 2 0 21 + 335 N_231_i 3 -1 3 1 5 -1 -1 2 0 21 + 326 inst_CLK_OUT_PRE_25 3 -1 5 1 5 -1 -1 2 0 21 + 316 N_220_i 3 -1 1 1 0 -1 -1 2 0 21 + 311 N_150_i 3 -1 3 1 0 -1 -1 2 0 21 + 305 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 367 N_337 3 -1 6 1 5 -1 -1 1 0 21 + 345 CLK_000_D_12_ 3 -1 5 1 0 -1 -1 1 0 21 + 344 CLK_000_D_10_ 3 -1 2 1 5 -1 -1 1 0 21 + 343 CLK_000_D_9_ 3 -1 3 1 2 -1 -1 1 0 21 + 342 CLK_000_D_8_ 3 -1 3 1 3 -1 -1 1 0 21 + 341 CLK_000_D_7_ 3 -1 4 1 3 -1 -1 1 0 21 + 340 CLK_000_D_6_ 3 -1 3 1 4 -1 -1 1 0 21 + 339 CLK_000_D_5_ 3 -1 1 1 3 -1 -1 1 0 21 + 338 CLK_000_D_4_ 3 -1 5 1 1 -1 -1 1 0 21 + 336 CLK_000_D_3_ 3 -1 1 1 5 -1 -1 1 0 21 + 334 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 + 333 N_350_i 3 -1 5 1 5 -1 -1 1 0 21 + 332 IPL_D0_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 331 N_304_i 3 -1 1 1 5 -1 -1 1 0 21 + 330 IPL_D0_1_ 3 -1 3 1 0 -1 -1 1 0 21 + 329 N_245_i 3 -1 2 1 5 -1 -1 1 0 21 + 328 IPL_D0_0_ 3 -1 0 1 0 -1 -1 1 0 21 + 325 inst_CLK_OUT_PRE_50 3 -1 5 1 5 -1 -1 1 0 21 + 321 inst_DTACK_D0 3 -1 0 1 3 -1 -1 1 0 21 + 317 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21 + 302 N_136_i 3 -1 3 1 2 -1 -1 1 0 21 + 296 N_266_i 3 -1 3 1 3 -1 -1 1 0 21 + 295 N_227 3 -1 4 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 67 IPL_2_ 1 -1 -1 3 1 6 7 67 -1 + 55 IPL_1_ 1 -1 -1 3 0 1 3 55 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 6 63 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +149 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 40 BERR 5 -1 4 5 0 1 2 4 5 40 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 4 5 7 41 -1 1 0 21 + 79 RW_000 5 372 7 2 4 6 79 -1 3 0 21 + 70 RW 5 377 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 68 A_0_ 5 378 6 1 1 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 34 VMA 5 376 3 0 34 -1 3 0 21 + 80 DSACK1 5 375 7 0 80 -1 2 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 373 3 0 28 -1 2 0 21 + 8 IPL_030_2_ 5 371 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 380 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 379 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 82 BGACK_030 5 374 7 0 82 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 374 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 1 0 21 + 322 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 324 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 + 323 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 + 362 SM_AMIGA_3_ 3 -1 0 4 0 1 2 3 -1 -1 3 0 21 + 351 SM_AMIGA_6_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 + 306 inst_AS_030_D0 3 -1 7 4 0 2 3 4 -1 -1 1 0 21 + 298 N_124_i 3 -1 3 4 0 1 2 6 -1 -1 1 0 21 + 363 SM_AMIGA_2_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 + 353 SM_AMIGA_4_ 3 -1 5 3 0 2 5 -1 -1 3 0 21 + 352 SM_AMIGA_0_ 3 -1 0 3 0 2 7 -1 -1 3 0 21 + 303 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 3 0 21 + 300 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21 + 364 SM_AMIGA_i_7_ 3 -1 5 2 2 7 -1 -1 3 0 21 + 361 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 359 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 355 RST_DLY_0_ 3 -1 1 2 0 1 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 315 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 314 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 310 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 3 0 21 + 307 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 3 0 21 + 301 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 299 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 357 RST_DLY_2_ 3 -1 0 2 0 1 -1 -1 2 0 21 + 356 RST_DLY_1_ 3 -1 0 2 0 1 -1 -1 2 0 21 + 348 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21 + 346 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 318 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 309 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 2 0 21 + 304 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 368 N_125_i 3 -1 7 2 5 7 -1 -1 1 0 21 + 327 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21 + 320 CLK_000_D_11_ 3 -1 5 2 0 5 -1 -1 1 0 21 + 308 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 + 378 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 376 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 372 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 369 N_132_0 3 -1 5 1 2 -1 -1 3 0 21 + 354 sm_amiga_nss_i_7__n 3 -1 0 1 5 -1 -1 3 0 21 + 349 inst_BGACK_030_INT_PRE 3 -1 7 1 7 -1 -1 3 0 21 + 313 CYCLE_DMA_1_ 3 -1 5 1 5 -1 -1 3 0 21 + 312 CYCLE_DMA_0_ 3 -1 5 1 5 -1 -1 3 0 21 + 297 N_11 3 -1 7 1 7 -1 -1 3 0 21 + 294 dsack1_int_0_un1_n 3 -1 0 1 7 -1 -1 3 0 21 + 293 dsack1_int_0_un3_n 3 -1 0 1 7 -1 -1 3 0 21 + 380 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 379 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 377 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 375 RN_DSACK1 3 80 7 1 7 80 -1 2 0 21 + 373 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 371 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 370 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 366 G_117 3 -1 0 1 6 -1 -1 2 0 21 + 365 G_116 3 -1 0 1 6 -1 -1 2 0 21 + 360 inst_CLK_030_H 3 -1 6 1 6 -1 -1 2 0 21 + 358 N_291_0 3 -1 6 1 6 -1 -1 2 0 21 + 350 pos_clk_un23_bgack_030_int_i_0_i_n 3 -1 5 1 6 -1 -1 2 0 21 + 347 pos_clk_ipl_n 3 -1 6 1 1 -1 -1 2 0 21 + 337 N_243_i 3 -1 5 1 5 -1 -1 2 0 21 + 335 N_231_i 3 -1 3 1 5 -1 -1 2 0 21 + 326 inst_CLK_OUT_PRE_25 3 -1 5 1 5 -1 -1 2 0 21 + 316 N_220_i 3 -1 1 1 0 -1 -1 2 0 21 + 311 N_150_i 3 -1 3 1 0 -1 -1 2 0 21 + 305 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 367 N_337 3 -1 6 1 5 -1 -1 1 0 21 + 345 CLK_000_D_12_ 3 -1 5 1 0 -1 -1 1 0 21 + 344 CLK_000_D_10_ 3 -1 2 1 5 -1 -1 1 0 21 + 343 CLK_000_D_9_ 3 -1 3 1 2 -1 -1 1 0 21 + 342 CLK_000_D_8_ 3 -1 3 1 3 -1 -1 1 0 21 + 341 CLK_000_D_7_ 3 -1 4 1 3 -1 -1 1 0 21 + 340 CLK_000_D_6_ 3 -1 3 1 4 -1 -1 1 0 21 + 339 CLK_000_D_5_ 3 -1 1 1 3 -1 -1 1 0 21 + 338 CLK_000_D_4_ 3 -1 5 1 1 -1 -1 1 0 21 + 336 CLK_000_D_3_ 3 -1 1 1 5 -1 -1 1 0 21 + 334 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 + 333 N_350_i 3 -1 5 1 5 -1 -1 1 0 21 + 332 IPL_D0_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 331 N_304_i 3 -1 1 1 5 -1 -1 1 0 21 + 330 IPL_D0_1_ 3 -1 3 1 0 -1 -1 1 0 21 + 329 N_245_i 3 -1 2 1 5 -1 -1 1 0 21 + 328 IPL_D0_0_ 3 -1 0 1 0 -1 -1 1 0 21 + 325 inst_CLK_OUT_PRE_50 3 -1 5 1 5 -1 -1 1 0 21 + 321 inst_DTACK_D0 3 -1 0 1 3 -1 -1 1 0 21 + 317 inst_VPA_D 3 -1 3 1 3 -1 -1 1 0 21 + 302 N_136_i 3 -1 3 1 2 -1 -1 1 0 21 + 296 N_266_i 3 -1 3 1 3 -1 -1 1 0 21 + 295 N_227 3 -1 4 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 67 IPL_2_ 1 -1 -1 3 1 6 7 67 -1 + 55 IPL_1_ 1 -1 -1 3 0 1 3 55 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 6 63 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +144 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 1 4 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 2 5 6 7 40 -1 1 0 21 + 79 RW_000 5 367 7 3 0 4 6 79 -1 3 0 21 + 68 A_0_ 5 373 6 2 0 3 68 -1 3 0 21 + 70 RW 5 372 6 2 2 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 82 BGACK_030 5 369 7 0 82 -1 3 0 21 + 80 DSACK1 5 370 7 0 80 -1 3 0 21 + 34 VMA 5 371 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 368 3 0 28 -1 2 0 21 + 8 IPL_030_2_ 5 366 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 375 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 374 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 369 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 318 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 320 CLK_000_D_0_ 3 -1 0 5 1 2 3 5 7 -1 -1 1 0 21 + 319 CLK_000_D_1_ 3 -1 7 5 1 2 3 5 7 -1 -1 1 0 21 + 340 SM_AMIGA_6_ 3 -1 2 4 0 2 3 7 -1 -1 3 0 21 + 303 inst_AS_030_D0 3 -1 7 4 2 3 4 7 -1 -1 1 0 21 + 352 SM_AMIGA_3_ 3 -1 5 3 2 3 5 -1 -1 3 0 21 + 300 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 3 0 21 + 299 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 + 350 N_150_i 3 -1 7 3 2 6 7 -1 -1 1 0 21 + 305 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 + 355 SM_AMIGA_i_7_ 3 -1 5 2 2 7 -1 -1 3 0 21 + 353 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 351 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 348 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 343 RST_DLY_0_ 3 -1 5 2 1 5 -1 -1 3 0 21 + 342 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 341 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 + 315 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 + 312 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 311 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 309 CYCLE_DMA_0_ 3 -1 1 2 1 6 -1 -1 3 0 21 + 298 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 3 0 21 + 297 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 346 RST_DLY_2_ 3 -1 5 2 1 5 -1 -1 2 0 21 + 345 RST_DLY_1_ 3 -1 1 2 1 5 -1 -1 2 0 21 + 339 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 2 0 21 + 337 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 + 306 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 2 0 21 + 304 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 2 0 21 + 302 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 + 301 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 294 N_178_i 3 -1 3 2 2 5 -1 -1 2 0 21 + 323 inst_CLK_OUT_PRE_D 3 -1 1 2 1 6 -1 -1 1 0 21 + 321 inst_CLK_OUT_PRE_50 3 -1 4 2 1 4 -1 -1 1 0 21 + 296 N_149_i 3 -1 7 2 3 5 -1 -1 1 0 21 + 373 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 371 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 370 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 367 RN_RW_000 3 79 7 1 7 79 -1 3 0 21 + 364 sm_amiga_nss_0_7__n 3 -1 7 1 5 -1 -1 3 0 21 + 363 N_209 3 -1 2 1 5 -1 -1 3 0 21 + 358 S0__clk_un21_bgack_030_int_i_0_i 3 -1 6 1 0 -1 -1 3 0 21 + 347 N_157_0 3 -1 2 1 2 -1 -1 3 0 21 + 310 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 3 0 21 + 307 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 3 0 21 + 375 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 374 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 372 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 368 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 366 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 365 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 361 pos_clk_ipl_1_n 3 -1 0 1 0 -1 -1 2 0 21 + 357 N_210 3 -1 3 1 5 -1 -1 2 0 21 + 356 G_116 3 -1 6 1 0 -1 -1 2 0 21 + 354 N_309_0 3 -1 0 1 0 -1 -1 2 0 21 + 349 inst_CLK_030_H 3 -1 0 1 0 -1 -1 2 0 21 + 338 pos_clk_ipl_n 3 -1 0 1 1 -1 -1 2 0 21 + 322 inst_CLK_OUT_PRE_25 3 -1 1 1 1 -1 -1 2 0 21 + 314 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 293 N_204_i 3 -1 5 1 1 -1 -1 2 0 21 + 362 N_211 3 -1 2 1 5 -1 -1 1 0 21 + 360 N_266 3 -1 5 1 5 -1 -1 1 0 21 + 359 N_259 3 -1 6 1 5 -1 -1 1 0 21 + 344 N_167_i 3 -1 4 1 2 -1 -1 1 0 21 + 336 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 + 335 CLK_000_D_10_ 3 -1 5 1 6 -1 -1 1 0 21 + 334 CLK_000_D_9_ 3 -1 4 1 5 -1 -1 1 0 21 + 333 CLK_000_D_8_ 3 -1 0 1 4 -1 -1 1 0 21 + 332 CLK_000_D_7_ 3 -1 0 1 0 -1 -1 1 0 21 + 331 CLK_000_D_6_ 3 -1 6 1 0 -1 -1 1 0 21 + 330 CLK_000_D_5_ 3 -1 5 1 6 -1 -1 1 0 21 + 329 CLK_000_D_4_ 3 -1 3 1 5 -1 -1 1 0 21 + 328 CLK_000_D_3_ 3 -1 5 1 3 -1 -1 1 0 21 + 327 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 326 IPL_D0_2_ 3 -1 1 1 0 -1 -1 1 0 21 + 325 IPL_D0_1_ 3 -1 5 1 0 -1 -1 1 0 21 + 324 IPL_D0_0_ 3 -1 6 1 6 -1 -1 1 0 21 + 317 inst_DTACK_D0 3 -1 6 1 3 -1 -1 1 0 21 + 316 CLK_000_D_11_ 3 -1 6 1 7 -1 -1 1 0 21 + 313 inst_VPA_D 3 -1 5 1 3 -1 -1 1 0 21 + 308 N_236_i 3 -1 3 1 3 -1 -1 1 0 21 + 295 N_160_i 3 -1 2 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 55 IPL_1_ 1 -1 -1 3 0 1 5 55 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 59 A_1_ 1 -1 -1 1 1 59 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 0 10 -1 +138 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 1 5 7 40 -1 1 0 21 + 79 RW_000 5 361 7 3 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 3 3 4 7 81 -1 1 0 21 + 68 A_0_ 5 367 6 2 0 2 68 -1 3 0 21 + 70 RW 5 366 6 2 5 7 70 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 34 VMA 5 365 3 0 34 -1 4 0 21 + 6 IPL_030_1_ 5 368 1 0 6 -1 4 0 21 + 82 BGACK_030 5 363 7 0 82 -1 3 0 21 + 80 DSACK1 5 364 7 0 80 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 362 3 0 28 -1 2 0 21 + 8 IPL_030_2_ 5 360 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 369 1 0 7 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 363 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 317 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 319 CLK_000_D_0_ 3 -1 2 5 0 3 5 6 7 -1 -1 1 0 21 + 318 CLK_000_D_1_ 3 -1 6 5 0 3 5 6 7 -1 -1 1 0 21 + 302 inst_AS_030_D0 3 -1 3 5 1 3 4 5 7 -1 -1 1 0 21 + 340 SM_AMIGA_6_ 3 -1 5 4 0 2 5 7 -1 -1 3 0 21 + 352 SM_AMIGA_i_7_ 3 -1 0 3 1 5 7 -1 -1 4 0 21 + 299 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 298 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 296 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 + 297 cpu_est_0_ 3 -1 0 3 0 3 5 -1 -1 3 0 21 + 303 inst_AS_030_000_SYNC 3 -1 5 3 1 3 5 -1 -1 1 0 21 + 365 RN_VMA 3 34 3 2 3 5 34 -1 4 0 21 + 351 SM_AMIGA_2_ 3 -1 5 2 0 5 -1 -1 4 0 21 + 350 SM_AMIGA_3_ 3 -1 0 2 0 5 -1 -1 4 0 21 + 339 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 4 0 21 + 307 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 4 0 21 + 349 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 347 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21 + 342 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 341 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 + 314 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 311 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 310 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 337 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 313 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 + 305 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 2 0 21 + 300 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 322 inst_CLK_OUT_PRE_D 3 -1 1 2 1 6 -1 -1 1 0 21 + 320 inst_CLK_OUT_PRE_50 3 -1 2 2 1 2 -1 -1 1 0 21 + 304 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 + 368 RN_IPL_030_1_ 3 6 1 1 1 6 -1 4 0 21 + 361 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 357 N_209 3 -1 0 1 0 -1 -1 4 0 21 + 355 pos_clk_ipl_1_n 3 -1 2 1 1 -1 -1 4 0 21 + 345 RST_DLY_1_ 3 -1 3 1 3 -1 -1 4 0 21 + 344 RST_DLY_0_ 3 -1 3 1 3 -1 -1 4 0 21 + 343 pos_clk_un21_bgack_030_int_i_0_i_n 3 -1 6 1 2 -1 -1 4 0 21 + 309 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 4 0 21 + 293 as_030_000_sync_0_un0_n 3 -1 1 1 5 -1 -1 4 0 21 + 367 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 364 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 358 sm_amiga_nss_0_7__n 3 -1 7 1 0 -1 -1 3 0 21 + 308 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 3 0 21 + 369 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 366 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 362 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 360 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 359 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 348 inst_CLK_030_H 3 -1 2 1 2 -1 -1 2 0 21 + 346 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 + 338 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 2 0 21 + 321 inst_CLK_OUT_PRE_25 3 -1 1 1 1 -1 -1 2 0 21 + 301 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 294 N_178_i 3 -1 5 1 0 -1 -1 2 0 21 + 356 N_211 3 -1 5 1 0 -1 -1 1 0 21 + 354 N_266 3 -1 7 1 0 -1 -1 1 0 21 + 353 N_259 3 -1 0 1 0 -1 -1 1 0 21 + 336 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 + 335 CLK_000_D_10_ 3 -1 3 1 2 -1 -1 1 0 21 + 334 N_190_i 3 -1 6 1 1 -1 -1 1 0 21 + 333 CLK_000_D_9_ 3 -1 3 1 3 -1 -1 1 0 21 + 332 CLK_000_D_8_ 3 -1 3 1 3 -1 -1 1 0 21 + 331 CLK_000_D_7_ 3 -1 0 1 3 -1 -1 1 0 21 + 330 CLK_000_D_6_ 3 -1 6 1 0 -1 -1 1 0 21 + 329 CLK_000_D_5_ 3 -1 6 1 6 -1 -1 1 0 21 + 328 CLK_000_D_4_ 3 -1 6 1 6 -1 -1 1 0 21 + 327 CLK_000_D_3_ 3 -1 1 1 6 -1 -1 1 0 21 + 326 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 + 325 IPL_D0_2_ 3 -1 1 1 2 -1 -1 1 0 21 + 324 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 323 IPL_D0_0_ 3 -1 1 1 2 -1 -1 1 0 21 + 316 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21 + 315 CLK_000_D_11_ 3 -1 2 1 7 -1 -1 1 0 21 + 312 inst_VPA_D 3 -1 5 1 5 -1 -1 1 0 21 + 306 N_237_i 3 -1 5 1 3 -1 -1 1 0 21 + 295 N_149_i 3 -1 7 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 1 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 1 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 1 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 1 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 1 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 1 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 2 63 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 2 10 -1 +130 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 4 5 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 5 0 1 2 5 7 40 -1 1 0 21 + 79 RW_000 5 353 7 3 4 5 6 79 -1 4 0 21 + 68 A_0_ 5 359 6 2 1 2 68 -1 3 0 21 + 70 RW 5 358 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 31 UDS_000 5 -1 3 2 5 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 5 6 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 34 VMA 5 357 3 0 34 -1 7 0 21 + 82 BGACK_030 5 355 7 0 82 -1 3 0 21 + 80 DSACK1 5 356 7 0 80 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 354 3 0 28 -1 2 0 21 + 8 IPL_030_2_ 5 352 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 361 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 360 1 0 6 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 355 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 314 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 316 CLK_000_D_0_ 3 -1 3 6 0 1 3 5 6 7 -1 -1 1 0 21 + 315 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 + 336 SM_AMIGA_6_ 3 -1 0 5 0 1 2 5 7 -1 -1 3 0 21 + 300 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21 + 348 SM_AMIGA_i_7_ 3 -1 0 4 0 2 5 7 -1 -1 8 0 21 + 301 inst_AS_030_000_SYNC 3 -1 2 3 0 2 3 -1 -1 7 0 21 + 296 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 294 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 345 SM_AMIGA_5_ 3 -1 1 3 0 1 5 -1 -1 3 0 21 + 337 SM_AMIGA_0_ 3 -1 7 3 0 5 7 -1 -1 3 0 21 + 295 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 + 297 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 + 357 RN_VMA 3 34 3 2 0 3 34 -1 7 0 21 + 303 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21 + 347 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 4 0 21 + 335 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 4 0 21 + 306 CYCLE_DMA_1_ 3 -1 6 2 5 6 -1 -1 4 0 21 + 304 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 4 0 21 + 343 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21 + 338 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 311 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 308 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 307 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 305 CYCLE_DMA_0_ 3 -1 6 2 5 6 -1 -1 3 0 21 + 333 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 318 inst_CLK_OUT_PRE_25 3 -1 1 2 1 2 -1 -1 2 0 21 + 310 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 298 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 319 inst_CLK_OUT_PRE_D 3 -1 2 2 1 6 -1 -1 1 0 21 + 317 inst_CLK_OUT_PRE_50 3 -1 6 2 1 6 -1 -1 1 0 21 + 309 inst_VPA_D 3 -1 1 2 0 3 -1 -1 1 0 21 + 302 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 + 344 inst_CLK_030_H 3 -1 5 1 5 -1 -1 6 1 21 + 334 pos_clk_ipl_n 3 -1 1 1 1 -1 -1 6 0 21 + 346 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 353 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 350 N_209 3 -1 5 1 0 -1 -1 4 0 21 + 340 RST_DLY_0_ 3 -1 3 1 3 -1 -1 4 0 21 + 339 pos_clk_un21_bgack_030_int_i_0_i_n 3 -1 6 1 5 -1 -1 4 0 21 + 359 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 356 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 341 RST_DLY_1_ 3 -1 3 1 3 -1 -1 3 1 21 + 361 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 360 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 358 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 354 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 352 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 351 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 342 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 + 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 349 N_211 3 -1 0 1 0 -1 -1 1 0 21 + 332 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 + 331 CLK_000_D_10_ 3 -1 2 1 5 -1 -1 1 0 21 + 330 CLK_000_D_9_ 3 -1 1 1 2 -1 -1 1 0 21 + 329 CLK_000_D_8_ 3 -1 2 1 1 -1 -1 1 0 21 + 328 CLK_000_D_7_ 3 -1 2 1 2 -1 -1 1 0 21 + 327 CLK_000_D_6_ 3 -1 3 1 2 -1 -1 1 0 21 + 326 CLK_000_D_5_ 3 -1 3 1 3 -1 -1 1 0 21 + 325 CLK_000_D_4_ 3 -1 2 1 3 -1 -1 1 0 21 + 324 CLK_000_D_3_ 3 -1 2 1 2 -1 -1 1 0 21 + 323 CLK_000_D_2_ 3 -1 1 1 2 -1 -1 1 0 21 + 322 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 + 321 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 320 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 312 CLK_000_D_11_ 3 -1 5 1 7 -1 -1 1 0 21 + 293 N_269_i 3 -1 0 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 + 59 A_1_ 1 -1 -1 2 2 6 59 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 5 63 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 +125 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 40 BERR 5 -1 4 5 0 2 5 6 7 40 -1 1 0 21 + 79 RW_000 5 348 7 3 0 4 6 79 -1 4 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 31 UDS_000 5 -1 3 3 0 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 0 1 6 30 -1 1 0 21 + 70 RW 5 353 6 2 2 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 68 A_0_ 5 354 6 1 2 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 347 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 356 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 355 1 0 6 -1 10 0 21 + 34 VMA 5 352 3 0 34 -1 7 0 21 + 82 BGACK_030 5 350 7 0 82 -1 3 0 21 + 80 DSACK1 5 351 7 0 80 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 349 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 350 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 313 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 315 CLK_000_D_0_ 3 -1 3 7 0 2 3 4 5 6 7 -1 -1 1 0 21 + 314 CLK_000_D_1_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 6 0 2 3 4 5 7 -1 -1 1 0 21 + 345 SM_AMIGA_i_7_ 3 -1 5 4 0 2 6 7 -1 -1 13 1 21 + 300 inst_AS_030_000_SYNC 3 -1 0 4 0 3 5 6 -1 -1 7 0 21 + 334 SM_AMIGA_6_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21 + 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 335 SM_AMIGA_0_ 3 -1 7 3 2 5 7 -1 -1 3 0 21 + 307 SIZE_DMA_1_ 3 -1 1 3 1 6 7 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 0 1 6 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 1 1 21 + 352 RN_VMA 3 34 3 2 3 5 34 -1 7 0 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 + 333 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 4 0 21 + 342 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 340 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 336 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 7 2 0 7 -1 -1 3 0 21 + 332 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 + 317 inst_CLK_OUT_PRE_25 3 -1 2 2 2 3 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 318 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 + 311 CLK_000_D_11_ 3 -1 3 2 4 7 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 + 356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 + 341 inst_CLK_030_H 3 -1 0 1 0 -1 -1 6 1 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 344 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 + 343 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 + 337 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 + 354 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 351 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 338 RST_DLY_1_ 3 -1 6 1 6 -1 -1 3 1 21 + 353 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 346 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 339 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 331 CLK_000_D_12_ 3 -1 4 1 7 -1 -1 1 0 21 + 330 CLK_000_D_10_ 3 -1 3 1 3 -1 -1 1 0 21 + 329 CLK_000_D_9_ 3 -1 5 1 3 -1 -1 1 0 21 + 328 CLK_000_D_8_ 3 -1 1 1 5 -1 -1 1 0 21 + 327 CLK_000_D_7_ 3 -1 0 1 1 -1 -1 1 0 21 + 326 CLK_000_D_6_ 3 -1 7 1 0 -1 -1 1 0 21 + 325 CLK_000_D_5_ 3 -1 3 1 7 -1 -1 1 0 21 + 324 CLK_000_D_4_ 3 -1 5 1 3 -1 -1 1 0 21 + 323 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21 + 322 CLK_000_D_2_ 3 -1 5 1 0 -1 -1 1 0 21 + 321 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 320 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 319 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 316 inst_CLK_OUT_PRE_50 3 -1 2 1 2 -1 -1 1 0 21 + 312 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 59 A_1_ 1 -1 -1 1 1 59 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 +125 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 40 BERR 5 -1 4 5 0 2 5 6 7 40 -1 1 0 21 + 79 RW_000 5 348 7 3 0 4 6 79 -1 4 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 31 UDS_000 5 -1 3 3 0 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 0 1 6 30 -1 1 0 21 + 70 RW 5 353 6 2 2 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 68 A_0_ 5 354 6 1 2 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 347 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 356 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 355 1 0 6 -1 10 0 21 + 82 BGACK_030 5 350 7 0 82 -1 3 0 21 + 80 DSACK1 5 351 7 0 80 -1 3 0 21 + 34 VMA 5 352 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 349 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 350 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 313 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 315 CLK_000_D_0_ 3 -1 3 7 0 2 3 4 5 6 7 -1 -1 1 0 21 + 314 CLK_000_D_1_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 6 0 2 3 4 5 7 -1 -1 1 0 21 + 345 SM_AMIGA_i_7_ 3 -1 5 4 0 2 6 7 -1 -1 13 1 21 + 300 inst_AS_030_000_SYNC 3 -1 0 4 0 3 5 6 -1 -1 7 0 21 + 334 SM_AMIGA_6_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21 + 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 335 SM_AMIGA_0_ 3 -1 7 3 2 5 7 -1 -1 3 0 21 + 307 SIZE_DMA_1_ 3 -1 1 3 1 6 7 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 0 1 6 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 1 1 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 + 333 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 4 0 21 + 352 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 342 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 340 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 336 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 7 2 0 7 -1 -1 3 0 21 + 332 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 + 317 inst_CLK_OUT_PRE_25 3 -1 2 2 2 3 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 318 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 + 311 CLK_000_D_11_ 3 -1 3 2 4 7 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 + 356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 + 341 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 344 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 + 343 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 + 337 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 + 354 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 351 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 353 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 346 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 339 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 338 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 331 CLK_000_D_12_ 3 -1 4 1 7 -1 -1 1 0 21 + 330 CLK_000_D_10_ 3 -1 3 1 3 -1 -1 1 0 21 + 329 CLK_000_D_9_ 3 -1 5 1 3 -1 -1 1 0 21 + 328 CLK_000_D_8_ 3 -1 1 1 5 -1 -1 1 0 21 + 327 CLK_000_D_7_ 3 -1 0 1 1 -1 -1 1 0 21 + 326 CLK_000_D_6_ 3 -1 7 1 0 -1 -1 1 0 21 + 325 CLK_000_D_5_ 3 -1 3 1 7 -1 -1 1 0 21 + 324 CLK_000_D_4_ 3 -1 5 1 3 -1 -1 1 0 21 + 323 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21 + 322 CLK_000_D_2_ 3 -1 5 1 0 -1 -1 1 0 21 + 321 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 320 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 319 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 316 inst_CLK_OUT_PRE_50 3 -1 2 1 2 -1 -1 1 0 21 + 312 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 59 A_1_ 1 -1 -1 1 1 59 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 +125 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 40 BERR 5 -1 4 5 0 2 5 6 7 40 -1 1 0 21 + 79 RW_000 5 348 7 3 0 4 6 79 -1 4 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 31 UDS_000 5 -1 3 3 0 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 0 1 6 30 -1 1 0 21 + 70 RW 5 353 6 2 2 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 68 A_0_ 5 354 6 1 2 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 347 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 356 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 355 1 0 6 -1 10 0 21 + 82 BGACK_030 5 350 7 0 82 -1 3 0 21 + 80 DSACK1 5 351 7 0 80 -1 3 0 21 + 34 VMA 5 352 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 349 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 350 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 313 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 315 CLK_000_D_0_ 3 -1 3 7 0 2 3 4 5 6 7 -1 -1 1 0 21 + 314 CLK_000_D_1_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 6 0 2 3 4 5 7 -1 -1 1 0 21 + 345 SM_AMIGA_i_7_ 3 -1 5 4 0 2 6 7 -1 -1 13 1 21 + 300 inst_AS_030_000_SYNC 3 -1 0 4 0 3 5 6 -1 -1 7 0 21 + 334 SM_AMIGA_6_ 3 -1 6 4 2 5 6 7 -1 -1 3 0 21 + 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 335 SM_AMIGA_0_ 3 -1 7 3 2 5 7 -1 -1 3 0 21 + 307 SIZE_DMA_1_ 3 -1 1 3 1 6 7 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 0 1 6 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 1 1 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 + 333 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 4 0 21 + 352 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 342 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 340 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 336 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 7 2 0 7 -1 -1 3 0 21 + 332 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 + 317 inst_CLK_OUT_PRE_25 3 -1 2 2 2 3 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 318 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 + 311 CLK_000_D_11_ 3 -1 3 2 4 7 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 + 356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 + 341 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 344 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 + 343 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 + 337 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 + 354 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 351 RN_DSACK1 3 80 7 1 7 80 -1 3 0 21 + 353 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 346 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 339 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 338 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 331 CLK_000_D_12_ 3 -1 4 1 7 -1 -1 1 0 21 + 330 CLK_000_D_10_ 3 -1 3 1 3 -1 -1 1 0 21 + 329 CLK_000_D_9_ 3 -1 5 1 3 -1 -1 1 0 21 + 328 CLK_000_D_8_ 3 -1 1 1 5 -1 -1 1 0 21 + 327 CLK_000_D_7_ 3 -1 0 1 1 -1 -1 1 0 21 + 326 CLK_000_D_6_ 3 -1 7 1 0 -1 -1 1 0 21 + 325 CLK_000_D_5_ 3 -1 3 1 7 -1 -1 1 0 21 + 324 CLK_000_D_4_ 3 -1 5 1 3 -1 -1 1 0 21 + 323 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21 + 322 CLK_000_D_2_ 3 -1 5 1 0 -1 -1 1 0 21 + 321 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 320 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 319 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 316 inst_CLK_OUT_PRE_50 3 -1 2 1 2 -1 -1 1 0 21 + 312 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 59 A_1_ 1 -1 -1 1 1 59 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 +125 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 + 79 RW_000 5 348 7 3 0 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 3 4 6 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 68 A_0_ 5 354 6 2 1 2 68 -1 3 0 21 + 70 RW 5 353 6 2 2 7 70 -1 2 0 21 + 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 347 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 356 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 355 1 0 6 -1 10 0 21 + 80 DSACK1 5 351 7 0 80 -1 5 0 21 + 82 BGACK_030 5 350 7 0 82 -1 3 0 21 + 34 VMA 5 352 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 349 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 350 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 315 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 317 CLK_000_D_0_ 3 -1 4 5 0 2 3 5 7 -1 -1 1 0 21 + 316 CLK_000_D_1_ 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 6 5 0 2 3 4 7 -1 -1 1 0 21 + 345 SM_AMIGA_i_7_ 3 -1 5 4 0 2 5 7 -1 -1 13 1 21 + 334 SM_AMIGA_6_ 3 -1 5 4 1 2 5 7 -1 -1 3 0 21 + 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 + 335 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 2 3 2 3 5 -1 -1 3 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 2 3 1 6 7 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 + 333 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 4 0 21 + 352 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 342 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 341 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 336 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 332 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 319 inst_CLK_OUT_PRE_25 3 -1 6 2 2 6 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 318 inst_CLK_OUT_PRE_50 3 -1 4 2 4 6 -1 -1 1 0 21 + 313 CLK_000_D_11_ 3 -1 7 2 4 7 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 2 0 6 -1 -1 1 0 21 + 356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 + 340 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 + 351 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 344 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 + 343 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 + 337 RST_DLY_0_ 3 -1 3 1 3 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 + 354 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 + 353 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 346 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 339 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 + 338 RST_DLY_1_ 3 -1 3 1 3 -1 -1 2 1 21 + 331 CLK_000_D_12_ 3 -1 4 1 7 -1 -1 1 0 21 + 330 CLK_000_D_9_ 3 -1 6 1 1 -1 -1 1 0 21 + 329 CLK_000_D_8_ 3 -1 6 1 6 -1 -1 1 0 21 + 328 CLK_000_D_7_ 3 -1 5 1 6 -1 -1 1 0 21 + 327 CLK_000_D_6_ 3 -1 2 1 5 -1 -1 1 0 21 + 326 CLK_000_D_5_ 3 -1 1 1 2 -1 -1 1 0 21 + 325 CLK_000_D_4_ 3 -1 2 1 1 -1 -1 1 0 21 + 324 CLK_000_D_3_ 3 -1 4 1 2 -1 -1 1 0 21 + 323 CLK_000_D_2_ 3 -1 7 1 4 -1 -1 1 0 21 + 322 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 321 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 320 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 314 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 + 312 CLK_000_D_10_ 3 -1 1 1 7 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 4 10 -1 +124 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 3 4 6 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 + 79 RW_000 5 347 7 2 4 6 79 -1 4 0 21 + 70 RW 5 352 6 2 0 7 70 -1 2 0 21 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 68 A_0_ 5 353 6 1 0 68 -1 3 0 21 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 + 31 UDS_000 5 -1 3 1 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 1 6 30 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 @@ -13281,12 +10115,12 @@ 8 IPL_030_2_ 5 346 1 0 8 -1 10 0 21 7 IPL_030_0_ 5 355 1 0 7 -1 10 0 21 6 IPL_030_1_ 5 354 1 0 6 -1 10 0 21 - 80 DSACK1 5 350 7 0 80 -1 4 0 21 + 80 DSACK1 5 350 7 0 80 -1 5 0 21 82 BGACK_030 5 349 7 0 82 -1 3 0 21 34 VMA 5 351 3 0 34 -1 3 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 3 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 28 BG_000 5 348 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 @@ -13298,105 +10132,368 @@ 9 CLK_EXP 0 1 0 9 -1 1 0 21 2 RESET 0 1 0 2 -1 1 0 21 349 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 315 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 317 CLK_000_D_0_ 3 -1 3 6 0 2 3 5 6 7 -1 -1 1 0 21 - 312 CLK_000_D_1_ 3 -1 6 6 0 2 3 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 6 1 2 3 4 5 7 -1 -1 1 0 21 - 344 SM_AMIGA_i_7_ 3 -1 5 4 1 3 5 7 -1 -1 13 1 21 - 294 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 5 0 21 - 319 SM_AMIGA_5_ 3 -1 5 3 2 5 7 -1 -1 4 0 21 - 332 SM_AMIGA_0_ 3 -1 5 3 3 5 7 -1 -1 3 0 21 - 296 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 2 1 21 - 323 CLK_000_D_2_ 3 -1 3 3 3 5 6 -1 -1 1 0 21 + 316 CLK_000_D_1_ 3 -1 6 6 0 2 3 5 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 5 0 2 3 4 7 -1 -1 1 0 21 + 333 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 + 344 SM_AMIGA_i_7_ 3 -1 5 3 0 2 7 -1 -1 13 1 21 + 300 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 334 SM_AMIGA_0_ 3 -1 5 3 0 5 7 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 21 311 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 3 0 1 6 -1 -1 1 0 21 - 293 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 0 21 - 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 - 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 - 300 inst_AS_030_000_SYNC 3 -1 1 2 1 5 -1 -1 7 0 21 - 333 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 5 0 21 - 341 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 4 0 21 - 339 SM_AMIGA_6_ 3 -1 5 2 0 5 -1 -1 4 0 21 - 295 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 4 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 3 1 2 6 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 7 0 21 + 336 RST_DLY_0_ 3 -1 5 2 0 5 -1 -1 4 0 21 + 332 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 351 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 341 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 340 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 335 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 310 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21 - 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 + 304 CYCLE_DMA_0_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 338 RST_DLY_2_ 3 -1 0 2 0 5 -1 -1 2 0 21 + 337 RST_DLY_1_ 3 -1 5 2 0 5 -1 -1 2 1 21 + 331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 309 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 314 CLK_000_D_11_ 3 -1 7 2 0 7 -1 -1 1 0 21 - 308 inst_VPA_D 3 -1 2 2 3 5 -1 -1 1 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 + 313 CLK_000_D_11_ 3 -1 3 2 6 7 -1 -1 1 0 21 + 312 CLK_000_D_10_ 3 -1 4 2 3 7 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 340 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 - 350 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 339 inst_CLK_030_H 3 -1 6 1 6 -1 -1 8 0 21 + 350 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21 347 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 343 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 342 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 - 305 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21 353 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 337 RST_DLY_1_ 3 -1 6 1 6 -1 -1 3 0 21 - 336 RST_DLY_0_ 3 -1 6 1 6 -1 -1 3 1 21 - 334 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 352 RN_RW 3 70 6 1 6 70 -1 2 0 21 348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 345 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 338 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 331 CLK_000_D_12_ 3 -1 0 1 7 -1 -1 1 0 21 - 330 CLK_000_D_9_ 3 -1 4 1 3 -1 -1 1 0 21 - 329 CLK_000_D_8_ 3 -1 0 1 4 -1 -1 1 0 21 - 328 CLK_000_D_7_ 3 -1 0 1 0 -1 -1 1 0 21 - 327 CLK_000_D_6_ 3 -1 4 1 0 -1 -1 1 0 21 - 326 CLK_000_D_5_ 3 -1 1 1 4 -1 -1 1 0 21 - 325 CLK_000_D_4_ 3 -1 6 1 1 -1 -1 1 0 21 - 324 CLK_000_D_3_ 3 -1 6 1 6 -1 -1 1 0 21 - 322 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 321 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 320 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 330 CLK_000_D_12_ 3 -1 6 1 7 -1 -1 1 0 21 + 329 CLK_000_D_9_ 3 -1 2 1 4 -1 -1 1 0 21 + 328 CLK_000_D_8_ 3 -1 2 1 2 -1 -1 1 0 21 + 327 CLK_000_D_7_ 3 -1 2 1 2 -1 -1 1 0 21 + 326 CLK_000_D_6_ 3 -1 2 1 2 -1 -1 1 0 21 + 325 CLK_000_D_5_ 3 -1 1 1 2 -1 -1 1 0 21 + 324 CLK_000_D_4_ 3 -1 5 1 1 -1 -1 1 0 21 + 323 CLK_000_D_3_ 3 -1 4 1 5 -1 -1 1 0 21 + 322 CLK_000_D_2_ 3 -1 7 1 4 -1 -1 1 0 21 + 321 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 320 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 319 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21 - 313 CLK_000_D_10_ 3 -1 3 1 7 -1 -1 1 0 21 + 314 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 1 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 1 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 1 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 1 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 1 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 1 4 7 56 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 63 CLK_030 1 -1 -1 2 2 7 63 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 63 CLK_030 1 -1 -1 2 6 7 63 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A_1_ 1 -1 -1 1 0 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 2 29 -1 + 59 A_1_ 1 -1 -1 1 1 59 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 10 CLK_000 1 -1 -1 1 3 10 -1 +125 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 + 79 RW_000 5 348 7 3 0 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 3 4 6 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 68 A_0_ 5 354 6 2 1 2 68 -1 3 0 21 + 70 RW 5 353 6 2 2 7 70 -1 2 0 21 + 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 347 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 356 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 355 1 0 6 -1 10 0 21 + 80 DSACK1 5 351 7 0 80 -1 5 0 21 + 82 BGACK_030 5 350 7 0 82 -1 3 0 21 + 34 VMA 5 352 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 349 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 350 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 315 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 317 CLK_000_D_0_ 3 -1 4 5 0 2 3 5 7 -1 -1 1 0 21 + 316 CLK_000_D_1_ 3 -1 3 5 0 2 3 5 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 6 5 0 2 3 4 7 -1 -1 1 0 21 + 345 SM_AMIGA_i_7_ 3 -1 5 4 0 2 5 7 -1 -1 13 1 21 + 334 SM_AMIGA_6_ 3 -1 5 4 1 2 5 7 -1 -1 3 0 21 + 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 + 335 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 2 3 2 3 5 -1 -1 3 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 2 3 1 6 7 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 + 333 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 4 0 21 + 352 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 342 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 341 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 336 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 332 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 319 inst_CLK_OUT_PRE_25 3 -1 6 2 2 6 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 318 inst_CLK_OUT_PRE_50 3 -1 4 2 4 6 -1 -1 1 0 21 + 313 CLK_000_D_11_ 3 -1 7 2 4 7 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 2 0 6 -1 -1 1 0 21 + 356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 + 340 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 + 351 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 344 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 + 343 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 + 337 RST_DLY_0_ 3 -1 3 1 3 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 + 354 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 + 353 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 346 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 339 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 + 338 RST_DLY_1_ 3 -1 3 1 3 -1 -1 2 1 21 + 331 CLK_000_D_12_ 3 -1 4 1 7 -1 -1 1 0 21 + 330 CLK_000_D_9_ 3 -1 6 1 1 -1 -1 1 0 21 + 329 CLK_000_D_8_ 3 -1 6 1 6 -1 -1 1 0 21 + 328 CLK_000_D_7_ 3 -1 5 1 6 -1 -1 1 0 21 + 327 CLK_000_D_6_ 3 -1 2 1 5 -1 -1 1 0 21 + 326 CLK_000_D_5_ 3 -1 1 1 2 -1 -1 1 0 21 + 325 CLK_000_D_4_ 3 -1 2 1 1 -1 -1 1 0 21 + 324 CLK_000_D_3_ 3 -1 4 1 2 -1 -1 1 0 21 + 323 CLK_000_D_2_ 3 -1 7 1 4 -1 -1 1 0 21 + 322 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 321 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 320 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 314 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 + 312 CLK_000_D_10_ 3 -1 1 1 7 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 4 10 -1 +126 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 79 RW_000 5 349 7 3 2 4 6 79 -1 4 0 21 + 40 BERR 5 -1 4 3 0 5 7 40 -1 1 0 21 + 70 RW 5 354 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 + 68 A_0_ 5 355 6 1 2 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 348 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 357 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 356 1 0 6 -1 10 0 21 + 80 DSACK1 5 352 7 0 80 -1 5 0 21 + 82 BGACK_030 5 351 7 0 82 -1 3 0 21 + 34 VMA 5 353 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 350 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 351 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 315 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 316 CLK_000_D_1_ 3 -1 7 6 0 3 4 5 6 7 -1 -1 1 0 21 + 317 CLK_000_D_0_ 3 -1 1 5 0 3 5 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 5 0 3 4 5 7 -1 -1 1 0 21 + 335 SM_AMIGA_6_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 4 0 1 2 6 -1 -1 1 0 21 + 346 SM_AMIGA_i_7_ 3 -1 5 3 0 5 7 -1 -1 13 1 21 + 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 306 SIZE_DMA_0_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 3 3 1 6 7 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 + 334 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 0 2 0 2 -1 -1 4 0 21 + 353 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 343 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 342 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 336 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 + 333 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 319 inst_CLK_OUT_PRE_25 3 -1 1 2 1 3 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 318 inst_CLK_OUT_PRE_50 3 -1 4 2 1 4 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 + 357 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 356 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 348 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 341 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 + 352 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21 + 349 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 345 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 + 344 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 + 338 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 355 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 337 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 + 354 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 350 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 347 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 340 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 339 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 332 CLK_000_D_13_ 3 -1 7 1 7 -1 -1 1 0 21 + 331 CLK_000_D_10_ 3 -1 6 1 0 -1 -1 1 0 21 + 330 CLK_000_D_9_ 3 -1 1 1 6 -1 -1 1 0 21 + 329 CLK_000_D_8_ 3 -1 3 1 1 -1 -1 1 0 21 + 328 CLK_000_D_7_ 3 -1 2 1 3 -1 -1 1 0 21 + 327 CLK_000_D_6_ 3 -1 1 1 2 -1 -1 1 0 21 + 326 CLK_000_D_5_ 3 -1 1 1 1 -1 -1 1 0 21 + 325 CLK_000_D_4_ 3 -1 2 1 1 -1 -1 1 0 21 + 324 CLK_000_D_3_ 3 -1 6 1 2 -1 -1 1 0 21 + 323 CLK_000_D_2_ 3 -1 4 1 6 -1 -1 1 0 21 + 322 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 + 321 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 + 320 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 + 314 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21 + 313 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 + 312 CLK_000_D_11_ 3 -1 0 1 7 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 63 CLK_030 1 -1 -1 2 2 7 63 -1 + 59 A_1_ 1 -1 -1 2 1 6 59 -1 + 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 124 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 - 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 79 RW_000 5 347 7 3 1 4 6 79 -1 4 0 21 - 81 AS_030 5 -1 7 3 4 6 7 81 -1 1 0 21 - 70 RW 5 352 6 2 2 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 1 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 1 6 30 -1 1 0 21 + 81 AS_030 5 -1 7 3 0 4 7 81 -1 1 0 21 + 40 BERR 5 -1 4 3 0 5 7 40 -1 1 0 21 + 31 UDS_000 5 -1 3 3 1 2 6 31 -1 1 0 21 + 70 RW 5 352 6 2 5 7 70 -1 2 0 21 + 30 LDS_000 5 -1 3 2 1 2 30 -1 1 0 21 68 A_0_ 5 353 6 1 2 68 -1 3 0 21 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 @@ -13411,12 +10508,12 @@ 8 IPL_030_2_ 5 346 1 0 8 -1 10 0 21 7 IPL_030_0_ 5 355 1 0 7 -1 10 0 21 6 IPL_030_1_ 5 354 1 0 6 -1 10 0 21 - 80 DSACK1 5 350 7 0 80 -1 4 0 21 + 80 DSACK1 5 350 7 0 80 -1 5 0 21 82 BGACK_030 5 349 7 0 82 -1 3 0 21 34 VMA 5 351 3 0 34 -1 3 0 21 - 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 3 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 28 BG_000 5 348 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 @@ -13427,69 +10524,198 @@ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 2 RESET 0 1 0 2 -1 1 0 21 - 312 CLK_000_D_1_ 3 -1 7 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 349 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 317 CLK_000_D_0_ 3 -1 0 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 6 6 0 2 3 4 5 7 -1 -1 1 0 21 - 322 CLK_000_D_2_ 3 -1 4 5 0 2 3 5 6 -1 -1 1 0 21 - 344 SM_AMIGA_i_7_ 3 -1 5 4 0 2 3 7 -1 -1 13 1 21 - 333 SM_AMIGA_6_ 3 -1 0 4 0 2 5 7 -1 -1 4 0 21 - 331 SM_AMIGA_0_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21 - 293 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 5 0 21 - 341 SM_AMIGA_5_ 3 -1 0 3 0 2 5 -1 -1 4 0 21 - 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 2 1 21 + 315 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 317 CLK_000_D_0_ 3 -1 2 6 0 2 3 5 6 7 -1 -1 1 0 21 + 316 CLK_000_D_1_ 3 -1 5 6 0 2 3 5 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 0 5 0 3 4 5 7 -1 -1 1 0 21 + 333 SM_AMIGA_6_ 3 -1 5 4 0 2 5 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 4 0 1 2 6 -1 -1 1 0 21 + 344 SM_AMIGA_i_7_ 3 -1 5 3 0 5 7 -1 -1 13 1 21 + 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 307 SIZE_DMA_1_ 3 -1 2 3 2 6 7 -1 -1 3 0 21 + 306 SIZE_DMA_0_ 3 -1 1 3 1 6 7 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 0 3 0 1 2 -1 -1 3 0 21 311 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 3 0 2 6 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21 302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 - 300 inst_AS_030_000_SYNC 3 -1 0 2 0 5 -1 -1 7 0 21 - 340 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 4 0 21 - 332 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 4 0 21 - 294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 4 0 21 + 332 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 2 2 1 2 -1 -1 4 0 21 351 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 334 SM_AMIGA_4_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 341 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 340 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 335 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 334 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 - 307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 0 2 0 1 -1 -1 3 0 21 - 335 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21 + 331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 319 inst_CLK_OUT_PRE_25 3 -1 3 2 3 4 -1 -1 2 0 21 309 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 - 314 CLK_000_D_11_ 3 -1 7 2 3 7 -1 -1 1 0 21 - 308 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 + 308 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21 355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 339 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 - 350 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 + 350 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21 347 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 343 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 342 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 - 305 CYCLE_DMA_1_ 3 -1 1 1 1 -1 -1 4 0 21 + 336 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 353 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 337 RST_DLY_1_ 3 -1 6 1 6 -1 -1 3 0 21 - 336 RST_DLY_0_ 3 -1 6 1 6 -1 -1 3 1 21 352 RN_RW 3 70 6 1 6 70 -1 2 0 21 348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 345 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 338 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 - 330 CLK_000_D_12_ 3 -1 3 1 7 -1 -1 1 0 21 - 329 CLK_000_D_9_ 3 -1 4 1 3 -1 -1 1 0 21 - 328 CLK_000_D_8_ 3 -1 5 1 4 -1 -1 1 0 21 - 327 CLK_000_D_7_ 3 -1 3 1 5 -1 -1 1 0 21 - 326 CLK_000_D_6_ 3 -1 0 1 3 -1 -1 1 0 21 - 325 CLK_000_D_5_ 3 -1 3 1 0 -1 -1 1 0 21 - 324 CLK_000_D_4_ 3 -1 0 1 3 -1 -1 1 0 21 - 323 CLK_000_D_3_ 3 -1 5 1 0 -1 -1 1 0 21 - 321 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 - 320 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 - 319 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 + 337 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 330 CLK_000_D_11_ 3 -1 7 1 7 -1 -1 1 0 21 + 329 CLK_000_D_8_ 3 -1 4 1 0 -1 -1 1 0 21 + 328 CLK_000_D_7_ 3 -1 6 1 4 -1 -1 1 0 21 + 327 CLK_000_D_6_ 3 -1 1 1 6 -1 -1 1 0 21 + 326 CLK_000_D_5_ 3 -1 6 1 1 -1 -1 1 0 21 + 325 CLK_000_D_4_ 3 -1 5 1 6 -1 -1 1 0 21 + 324 CLK_000_D_3_ 3 -1 4 1 5 -1 -1 1 0 21 + 323 CLK_000_D_2_ 3 -1 3 1 4 -1 -1 1 0 21 + 322 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 + 321 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 320 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 + 318 inst_CLK_OUT_PRE_50 3 -1 3 1 3 -1 -1 1 0 21 + 314 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 + 313 CLK_000_D_10_ 3 -1 7 1 7 -1 -1 1 0 21 + 312 CLK_000_D_9_ 3 -1 0 1 7 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 + 63 CLK_030 1 -1 -1 2 1 7 63 -1 + 59 A_1_ 1 -1 -1 2 2 6 59 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 3 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 2 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 2 5 7 40 -1 1 0 21 + 79 RW_000 5 346 7 3 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 3 4 5 7 81 -1 1 0 21 + 70 RW 5 351 6 2 0 7 70 -1 2 0 21 + 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 + 68 A_0_ 5 352 6 1 3 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 345 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 354 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 353 1 0 6 -1 10 0 21 + 80 DSACK1 5 349 7 0 80 -1 5 0 21 + 82 BGACK_030 5 348 7 0 82 -1 3 0 21 + 34 VMA 5 350 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 347 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 348 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 315 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 317 CLK_000_D_0_ 3 -1 0 6 0 1 2 3 5 7 -1 -1 1 0 21 + 316 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 + 332 SM_AMIGA_6_ 3 -1 0 5 0 2 3 5 7 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 5 5 0 2 3 4 7 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 333 SM_AMIGA_0_ 3 -1 7 3 0 5 7 -1 -1 3 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21 + 343 SM_AMIGA_i_7_ 3 -1 5 2 0 7 -1 -1 13 1 21 + 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 + 335 RST_DLY_0_ 3 -1 2 2 1 2 -1 -1 4 0 21 + 331 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 4 0 21 + 350 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 340 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 339 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 334 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 1 2 1 2 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 + 337 RST_DLY_2_ 3 -1 2 2 1 2 -1 -1 2 0 21 + 336 RST_DLY_1_ 3 -1 1 2 1 2 -1 -1 2 1 21 + 330 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 313 CLK_000_D_9_ 3 -1 5 2 4 7 -1 -1 1 0 21 + 312 CLK_000_D_8_ 3 -1 0 2 5 7 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 5 2 0 6 -1 -1 1 0 21 + 354 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 353 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 345 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 338 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 + 349 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21 + 346 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 342 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 + 341 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 + 305 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21 + 352 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 + 351 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 347 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 319 inst_CLK_OUT_PRE_25 3 -1 4 1 4 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 329 CLK_000_D_10_ 3 -1 4 1 7 -1 -1 1 0 21 + 328 CLK_000_D_7_ 3 -1 6 1 0 -1 -1 1 0 21 + 327 CLK_000_D_6_ 3 -1 5 1 6 -1 -1 1 0 21 + 326 CLK_000_D_5_ 3 -1 6 1 5 -1 -1 1 0 21 + 325 CLK_000_D_4_ 3 -1 3 1 6 -1 -1 1 0 21 + 324 CLK_000_D_3_ 3 -1 6 1 3 -1 -1 1 0 21 + 323 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 322 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 321 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 320 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21 - 313 CLK_000_D_10_ 3 -1 3 1 7 -1 -1 1 0 21 + 314 inst_DTACK_D0 3 -1 5 1 5 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 @@ -13500,34 +10726,34 @@ 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 - 63 CLK_030 1 -1 -1 2 1 7 63 -1 - 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 63 CLK_030 1 -1 -1 2 2 7 63 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 - 10 CLK_000 1 -1 -1 2 0 3 10 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 67 IPL_2_ 1 -1 -1 1 1 67 -1 - 59 A_1_ 1 -1 -1 1 2 59 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 29 DTACK 1 -1 -1 1 5 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 -124 "number of signals after reading design file" + 10 CLK_000 1 -1 -1 1 0 10 -1 +121 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 347 7 3 0 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 352 6 2 2 7 70 -1 2 0 21 + 40 BERR 5 -1 4 5 1 2 3 5 7 40 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 79 RW_000 5 344 7 3 0 4 6 79 -1 4 0 21 + 68 A_0_ 5 350 6 2 0 1 68 -1 3 0 21 + 70 RW 5 349 6 2 5 7 70 -1 2 0 21 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A_0_ 5 353 6 1 0 68 -1 3 0 21 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 @@ -13538,16 +10764,16 @@ 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 346 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 355 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 354 1 0 6 -1 10 0 21 - 80 DSACK1 5 350 7 0 80 -1 4 0 21 - 82 BGACK_030 5 349 7 0 82 -1 3 0 21 - 34 VMA 5 351 3 0 34 -1 3 0 21 + 8 IPL_030_2_ 5 343 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 352 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 351 1 0 6 -1 10 0 21 + 80 DSACK1 5 347 7 0 80 -1 5 0 21 + 82 BGACK_030 5 346 7 0 82 -1 3 0 21 + 34 VMA 5 348 3 0 34 -1 3 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 348 3 0 28 -1 2 0 21 + 28 BG_000 5 345 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 77 FPU_CS 0 7 0 77 -1 1 0 21 @@ -13557,109 +10783,106 @@ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 2 RESET 0 1 0 2 -1 1 0 21 - 349 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 317 CLK_000_D_0_ 3 -1 6 5 0 2 3 5 7 -1 -1 1 0 21 - 312 CLK_000_D_1_ 3 -1 5 5 0 2 3 5 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 5 1 2 3 4 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 1 4 1 2 3 5 -1 -1 7 0 21 - 333 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 4 0 21 - 344 SM_AMIGA_i_7_ 3 -1 5 3 1 2 7 -1 -1 13 1 21 - 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 5 0 21 - 340 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 4 0 21 - 334 SM_AMIGA_0_ 3 -1 2 3 2 5 7 -1 -1 3 0 21 - 295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 2 1 21 - 322 CLK_000_D_2_ 3 -1 7 3 2 3 5 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 0 21 + 317 CLK_000_D_0_ 3 -1 4 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 + 316 CLK_000_D_1_ 3 -1 4 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 + 346 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 315 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 299 inst_AS_030_D0 3 -1 7 5 2 3 4 5 7 -1 -1 1 0 21 + 330 SM_AMIGA_6_ 3 -1 5 4 0 1 5 7 -1 -1 3 0 21 + 341 SM_AMIGA_i_7_ 3 -1 5 3 2 5 7 -1 -1 13 1 21 + 300 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 337 SM_AMIGA_1_ 3 -1 3 3 3 5 7 -1 -1 3 0 21 + 307 SIZE_DMA_1_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 2 3 1 6 7 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 0 2 6 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 341 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 4 0 21 - 332 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 4 0 21 - 294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 4 0 21 - 351 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 335 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 340 SM_AMIGA_2_ 3 -1 5 2 3 5 -1 -1 4 0 21 + 329 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 4 0 21 + 348 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 338 SM_AMIGA_5_ 3 -1 1 2 1 5 -1 -1 3 0 21 + 331 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 310 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 - 307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 309 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 313 CLK_000_D_10_ 3 -1 2 2 1 7 -1 -1 1 0 21 - 308 inst_VPA_D 3 -1 2 2 3 5 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 1 2 1 6 -1 -1 1 0 21 - 355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 304 CYCLE_DMA_0_ 3 -1 2 2 0 2 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 + 328 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 + 319 inst_CLK_OUT_PRE_25 3 -1 1 2 1 2 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 318 inst_CLK_OUT_PRE_50 3 -1 2 2 1 2 -1 -1 1 0 21 + 312 CLK_000_D_6_ 3 -1 3 2 5 7 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 1 2 3 5 -1 -1 1 0 21 + 352 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 351 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 339 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 350 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 347 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 343 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 342 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 + 336 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 + 347 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21 + 344 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 339 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 + 333 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 353 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 337 RST_DLY_1_ 3 -1 3 1 3 -1 -1 3 0 21 - 336 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 1 21 - 304 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 352 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 345 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 338 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 330 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 - 329 CLK_000_D_9_ 3 -1 6 1 2 -1 -1 1 0 21 - 328 CLK_000_D_8_ 3 -1 4 1 6 -1 -1 1 0 21 - 327 CLK_000_D_7_ 3 -1 5 1 4 -1 -1 1 0 21 - 326 CLK_000_D_6_ 3 -1 4 1 5 -1 -1 1 0 21 - 325 CLK_000_D_5_ 3 -1 6 1 4 -1 -1 1 0 21 - 324 CLK_000_D_4_ 3 -1 6 1 6 -1 -1 1 0 21 - 323 CLK_000_D_3_ 3 -1 2 1 6 -1 -1 1 0 21 - 321 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 320 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 319 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21 - 314 CLK_000_D_11_ 3 -1 1 1 7 -1 -1 1 0 21 + 350 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 332 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 + 349 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 345 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 342 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 335 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 334 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 327 CLK_000_D_8_ 3 -1 7 1 7 -1 -1 1 0 21 + 326 CLK_000_D_5_ 3 -1 3 1 3 -1 -1 1 0 21 + 325 CLK_000_D_4_ 3 -1 2 1 3 -1 -1 1 0 21 + 324 CLK_000_D_3_ 3 -1 2 1 2 -1 -1 1 0 21 + 323 CLK_000_D_2_ 3 -1 4 1 2 -1 -1 1 0 21 + 322 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 + 321 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 320 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 + 314 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21 + 313 CLK_000_D_7_ 3 -1 5 1 7 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 1 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 1 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 1 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 1 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 1 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 1 4 7 56 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 + 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 59 A_1_ 1 -1 -1 2 0 2 59 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -124 "number of signals after reading design file" + 10 CLK_000 1 -1 -1 1 4 10 -1 +117 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 40 BERR 5 -1 4 4 1 2 5 7 40 -1 1 0 21 - 79 RW_000 5 347 7 3 0 4 6 79 -1 4 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 352 6 2 2 7 70 -1 2 0 21 + 40 BERR 5 -1 4 5 0 1 5 6 7 40 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 79 RW_000 5 340 7 3 2 4 6 79 -1 4 0 21 + 68 A_0_ 5 346 6 2 1 2 68 -1 3 0 21 + 70 RW 5 345 6 2 5 7 70 -1 2 0 21 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A_0_ 5 353 6 1 0 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 0 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 0 69 -1 1 0 21 + 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 @@ -13668,16 +10891,16 @@ 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 346 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 355 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 354 1 0 6 -1 10 0 21 - 80 DSACK1 5 350 7 0 80 -1 4 0 21 - 82 BGACK_030 5 349 7 0 82 -1 3 0 21 - 34 VMA 5 351 3 0 34 -1 3 0 21 + 8 IPL_030_2_ 5 339 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 348 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 347 1 0 6 -1 10 0 21 + 80 DSACK1 5 343 7 0 80 -1 5 0 21 + 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 34 VMA 5 344 3 0 34 -1 3 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 348 3 0 28 -1 2 0 21 + 28 BG_000 5 341 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 77 FPU_CS 0 7 0 77 -1 1 0 21 @@ -13687,109 +10910,102 @@ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 2 RESET 0 1 0 2 -1 1 0 21 - 349 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 317 CLK_000_D_0_ 3 -1 6 5 0 2 3 5 7 -1 -1 1 0 21 - 312 CLK_000_D_1_ 3 -1 5 5 0 2 3 5 7 -1 -1 1 0 21 - 299 inst_AS_030_D0 3 -1 7 5 1 2 3 4 7 -1 -1 1 0 21 - 300 inst_AS_030_000_SYNC 3 -1 1 4 1 2 3 5 -1 -1 7 0 21 - 333 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 4 0 21 - 344 SM_AMIGA_i_7_ 3 -1 5 3 1 2 7 -1 -1 13 1 21 - 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 5 0 21 - 340 SM_AMIGA_1_ 3 -1 5 3 2 5 7 -1 -1 4 0 21 - 334 SM_AMIGA_0_ 3 -1 2 3 2 5 7 -1 -1 3 0 21 - 295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 2 1 21 - 322 CLK_000_D_2_ 3 -1 7 3 2 3 5 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 0 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 341 SM_AMIGA_5_ 3 -1 5 2 2 5 -1 -1 4 0 21 - 332 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 4 0 21 - 294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 4 0 21 - 351 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 335 SM_AMIGA_4_ 3 -1 5 2 2 5 -1 -1 3 0 21 - 310 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 + 316 CLK_000_D_1_ 3 -1 7 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 + 342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 315 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 317 CLK_000_D_0_ 3 -1 0 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 326 SM_AMIGA_6_ 3 -1 1 5 0 1 2 5 7 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 4 5 0 3 4 5 7 -1 -1 1 0 21 + 337 SM_AMIGA_i_7_ 3 -1 5 4 0 1 5 7 -1 -1 13 1 21 + 300 inst_AS_030_000_SYNC 3 -1 0 4 0 1 3 5 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 + 333 SM_AMIGA_1_ 3 -1 5 3 5 6 7 -1 -1 3 0 21 + 327 SM_AMIGA_0_ 3 -1 6 3 5 6 7 -1 -1 3 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 1 3 1 6 7 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 + 325 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 4 0 21 + 344 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 334 SM_AMIGA_5_ 3 -1 1 2 1 5 -1 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 309 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 + 294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21 + 324 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 319 inst_CLK_OUT_PRE_25 3 -1 4 2 1 4 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 313 CLK_000_D_10_ 3 -1 2 2 1 7 -1 -1 1 0 21 - 308 inst_VPA_D 3 -1 2 2 3 5 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 1 2 1 6 -1 -1 1 0 21 - 355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 339 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 350 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 347 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 343 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 342 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 - 305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 353 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 337 RST_DLY_1_ 3 -1 3 1 3 -1 -1 3 0 21 - 336 RST_DLY_0_ 3 -1 3 1 3 -1 -1 3 1 21 - 304 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 352 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 345 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 338 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 - 330 CLK_000_D_12_ 3 -1 7 1 7 -1 -1 1 0 21 - 329 CLK_000_D_9_ 3 -1 6 1 2 -1 -1 1 0 21 - 328 CLK_000_D_8_ 3 -1 4 1 6 -1 -1 1 0 21 - 327 CLK_000_D_7_ 3 -1 5 1 4 -1 -1 1 0 21 - 326 CLK_000_D_6_ 3 -1 4 1 5 -1 -1 1 0 21 - 325 CLK_000_D_5_ 3 -1 6 1 4 -1 -1 1 0 21 - 324 CLK_000_D_4_ 3 -1 6 1 6 -1 -1 1 0 21 - 323 CLK_000_D_3_ 3 -1 2 1 6 -1 -1 1 0 21 - 321 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 - 320 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 319 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 + 313 CLK_000_D_3_ 3 -1 7 2 3 7 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 6 2 3 5 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 2 0 6 -1 -1 1 0 21 + 348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 332 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 + 343 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21 + 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 336 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 + 335 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 + 329 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21 + 346 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 328 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21 + 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 338 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 331 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 + 330 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 + 323 CLK_000_D_4_ 3 -1 3 1 7 -1 -1 1 0 21 + 322 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 + 321 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 + 320 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 0 1 5 -1 -1 1 0 21 - 314 CLK_000_D_11_ 3 -1 1 1 7 -1 -1 1 0 21 + 314 inst_DTACK_D0 3 -1 5 1 5 -1 -1 1 0 21 + 312 CLK_000_D_2_ 3 -1 4 1 7 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 1 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 1 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 1 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 1 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 1 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 1 4 7 56 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 63 CLK_030 1 -1 -1 2 2 7 63 -1 + 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 59 A_1_ 1 -1 -1 1 6 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 2 35 -1 - 29 DTACK 1 -1 -1 1 0 29 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 5 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 6 10 -1 -124 "number of signals after reading design file" + 10 CLK_000 1 -1 -1 1 0 10 -1 +117 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 40 BERR 5 -1 4 5 1 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 347 7 3 0 4 6 79 -1 4 0 21 - 81 AS_030 5 -1 7 3 0 4 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 352 6 2 1 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A_0_ 5 353 6 1 3 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 81 AS_030 5 -1 7 4 0 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 3 5 7 40 -1 1 0 21 + 79 RW_000 5 340 7 3 2 4 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 3 1 2 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 1 2 6 30 -1 1 0 21 + 68 A_0_ 5 346 6 2 2 5 68 -1 3 0 21 + 70 RW 5 345 6 2 5 7 70 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 @@ -13798,16 +11014,16 @@ 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 346 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 355 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 354 1 0 6 -1 10 0 21 - 80 DSACK1 5 350 7 0 80 -1 4 0 21 - 82 BGACK_030 5 349 7 0 82 -1 3 0 21 - 34 VMA 5 351 3 0 34 -1 3 0 21 + 8 IPL_030_2_ 5 339 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 348 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 347 1 0 6 -1 10 0 21 + 80 DSACK1 5 343 7 0 80 -1 5 0 21 + 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 34 VMA 5 344 3 0 34 -1 3 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 348 3 0 28 -1 2 0 21 + 28 BG_000 5 341 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 77 FPU_CS 0 7 0 77 -1 1 0 21 @@ -13817,109 +11033,102 @@ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 2 RESET 0 1 0 2 -1 1 0 21 - 312 CLK_000_D_1_ 3 -1 7 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 349 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 317 CLK_000_D_0_ 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 333 SM_AMIGA_6_ 3 -1 2 5 1 2 3 5 7 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 0 5 1 2 3 4 7 -1 -1 1 0 21 - 334 SM_AMIGA_0_ 3 -1 6 4 1 5 6 7 -1 -1 3 0 21 - 344 SM_AMIGA_i_7_ 3 -1 5 3 1 2 7 -1 -1 13 1 21 - 300 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 7 0 21 - 295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 - 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 340 SM_AMIGA_1_ 3 -1 5 3 5 6 7 -1 -1 3 0 21 - 322 CLK_000_D_2_ 3 -1 4 3 2 4 5 -1 -1 1 0 21 - 311 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 + 342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 315 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 317 CLK_000_D_0_ 3 -1 0 6 0 2 3 5 6 7 -1 -1 1 0 21 + 316 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 + 326 SM_AMIGA_6_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21 + 337 SM_AMIGA_i_7_ 3 -1 5 3 0 5 7 -1 -1 13 1 21 + 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 + 307 SIZE_DMA_1_ 3 -1 1 3 1 6 7 -1 -1 3 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 1 3 1 6 7 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 0 1 6 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 0 3 4 -1 -1 1 0 21 296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 336 RST_DLY_0_ 3 -1 5 2 0 5 -1 -1 4 0 21 - 332 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 4 0 21 - 351 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 341 SM_AMIGA_5_ 3 -1 5 2 1 5 -1 -1 3 0 21 - 335 SM_AMIGA_4_ 3 -1 1 2 1 5 -1 -1 3 0 21 - 307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 + 335 SM_AMIGA_3_ 3 -1 3 2 3 5 -1 -1 4 1 21 + 325 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 4 0 21 + 344 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 334 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 333 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 328 SM_AMIGA_4_ 3 -1 5 2 3 5 -1 -1 3 0 21 + 327 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 - 338 RST_DLY_2_ 3 -1 5 2 0 5 -1 -1 2 0 21 - 337 RST_DLY_1_ 3 -1 5 2 0 5 -1 -1 2 1 21 - 331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21 + 324 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 314 CLK_000_D_11_ 3 -1 7 2 6 7 -1 -1 1 0 21 - 308 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 - 355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 339 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 350 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 347 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 343 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 342 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 - 305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 353 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 310 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 352 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 345 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 309 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 330 CLK_000_D_12_ 3 -1 6 1 7 -1 -1 1 0 21 - 329 CLK_000_D_9_ 3 -1 0 1 2 -1 -1 1 0 21 - 328 CLK_000_D_8_ 3 -1 6 1 0 -1 -1 1 0 21 - 327 CLK_000_D_7_ 3 -1 0 1 6 -1 -1 1 0 21 - 326 CLK_000_D_6_ 3 -1 3 1 0 -1 -1 1 0 21 - 325 CLK_000_D_5_ 3 -1 4 1 3 -1 -1 1 0 21 - 324 CLK_000_D_4_ 3 -1 2 1 4 -1 -1 1 0 21 - 323 CLK_000_D_3_ 3 -1 4 1 2 -1 -1 1 0 21 - 321 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 320 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 319 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21 - 313 CLK_000_D_10_ 3 -1 2 1 7 -1 -1 1 0 21 + 297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 + 318 inst_CLK_OUT_PRE_50 3 -1 3 2 1 3 -1 -1 1 0 21 + 314 inst_DTACK_D0 3 -1 4 2 3 5 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 + 348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 332 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 + 343 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21 + 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 336 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 + 329 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21 + 346 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21 + 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 338 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 331 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 330 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 319 inst_CLK_OUT_PRE_25 3 -1 1 1 1 -1 -1 2 0 21 + 323 CLK_000_D_4_ 3 -1 7 1 7 -1 -1 1 0 21 + 322 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 321 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 + 320 IPL_D0_0_ 3 -1 4 1 1 -1 -1 1 0 21 + 313 CLK_000_D_3_ 3 -1 7 1 7 -1 -1 1 0 21 + 312 CLK_000_D_2_ 3 -1 5 1 7 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 66 IPL_0_ 1 -1 -1 2 1 4 66 -1 + 63 CLK_030 1 -1 -1 2 2 7 63 -1 + 59 A_1_ 1 -1 -1 2 1 6 59 -1 + 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 4 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 -124 "number of signals after reading design file" + 10 CLK_000 1 -1 -1 1 0 10 -1 +117 "number of signals after reading design file" "sig sig sig pair blk fan PT xor sync" "num name type sig num out pin node cnt PT type" "--- ---- ---- ---- --- --- --- ---- --- --- ----" - 40 BERR 5 -1 4 5 1 2 5 6 7 40 -1 1 0 21 - 79 RW_000 5 347 7 3 0 4 6 79 -1 4 0 21 - 81 AS_030 5 -1 7 3 0 4 7 81 -1 1 0 21 - 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 - 70 RW 5 352 6 2 1 7 70 -1 2 0 21 - 31 UDS_000 5 -1 3 2 0 6 31 -1 1 0 21 - 30 LDS_000 5 -1 3 2 0 6 30 -1 1 0 21 - 68 A_0_ 5 353 6 1 3 68 -1 3 0 21 - 78 SIZE_1_ 5 -1 7 1 3 78 -1 1 0 21 - 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 1 5 7 40 -1 1 0 21 + 79 RW_000 5 340 7 3 2 4 6 79 -1 4 0 21 + 68 A_0_ 5 346 6 2 2 6 68 -1 3 0 21 + 70 RW 5 345 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 @@ -13928,16 +11137,16 @@ 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 - 8 IPL_030_2_ 5 346 1 0 8 -1 10 0 21 - 7 IPL_030_0_ 5 355 1 0 7 -1 10 0 21 - 6 IPL_030_1_ 5 354 1 0 6 -1 10 0 21 - 80 DSACK1 5 350 7 0 80 -1 4 0 21 - 82 BGACK_030 5 349 7 0 82 -1 3 0 21 - 34 VMA 5 351 3 0 34 -1 3 0 21 + 8 IPL_030_2_ 5 339 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 348 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 347 1 0 6 -1 10 0 21 + 80 DSACK1 5 343 7 0 80 -1 5 0 21 + 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 34 VMA 5 344 3 0 34 -1 3 0 21 65 E 0 6 0 65 -1 2 0 21 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 - 28 BG_000 5 348 3 0 28 -1 2 0 21 + 28 BG_000 5 341 3 0 28 -1 2 0 21 97 DS_030 0 0 0 97 -1 1 0 21 91 AVEC 0 0 0 91 -1 1 0 21 77 FPU_CS 0 7 0 77 -1 1 0 21 @@ -13947,90 +11156,457 @@ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 9 CLK_EXP 0 1 0 9 -1 1 0 21 2 RESET 0 1 0 2 -1 1 0 21 - 312 CLK_000_D_1_ 3 -1 7 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 - 349 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 - 316 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 - 317 CLK_000_D_0_ 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21 - 333 SM_AMIGA_6_ 3 -1 2 5 1 2 3 5 7 -1 -1 3 0 21 - 299 inst_AS_030_D0 3 -1 0 5 1 2 3 4 7 -1 -1 1 0 21 - 334 SM_AMIGA_0_ 3 -1 6 4 1 5 6 7 -1 -1 3 0 21 - 344 SM_AMIGA_i_7_ 3 -1 5 3 1 2 7 -1 -1 13 1 21 - 300 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 7 0 21 + 342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 315 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 316 CLK_000_D_1_ 3 -1 7 6 0 1 3 4 5 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 6 0 1 3 4 5 7 -1 -1 1 0 21 + 326 SM_AMIGA_6_ 3 -1 1 5 1 2 5 6 7 -1 -1 3 0 21 + 317 CLK_000_D_0_ 3 -1 1 5 0 1 3 5 7 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 0 4 0 1 3 5 -1 -1 7 0 21 + 337 SM_AMIGA_i_7_ 3 -1 5 3 0 1 7 -1 -1 13 1 21 295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 - 340 SM_AMIGA_1_ 3 -1 5 3 5 6 7 -1 -1 3 0 21 - 322 CLK_000_D_2_ 3 -1 4 3 2 4 5 -1 -1 1 0 21 311 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 - 296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21 - 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 - 336 RST_DLY_0_ 3 -1 5 2 0 5 -1 -1 4 0 21 - 332 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 4 0 21 - 351 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 - 341 SM_AMIGA_5_ 3 -1 5 2 1 5 -1 -1 3 0 21 - 335 SM_AMIGA_4_ 3 -1 1 2 1 5 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 6 3 0 2 6 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 + 305 CYCLE_DMA_1_ 3 -1 0 2 0 2 -1 -1 4 0 21 + 344 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 333 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 328 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 + 325 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 - 294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 - 338 RST_DLY_2_ 3 -1 5 2 0 5 -1 -1 2 0 21 - 337 RST_DLY_1_ 3 -1 5 2 0 5 -1 -1 2 1 21 - 331 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 - 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 - 297 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 - 314 CLK_000_D_11_ 3 -1 7 2 6 7 -1 -1 1 0 21 - 308 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 - 301 inst_BGACK_030_INT_D 3 -1 7 2 2 6 -1 -1 1 0 21 - 355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 - 354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 - 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 - 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 - 339 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 - 350 RN_DSACK1 3 80 7 1 7 80 -1 4 0 21 - 347 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 - 343 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 - 342 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 - 305 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 - 353 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 - 310 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 - 304 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 - 352 RN_RW 3 70 6 1 6 70 -1 2 0 21 - 348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 - 345 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 - 309 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 - 330 CLK_000_D_12_ 3 -1 6 1 7 -1 -1 1 0 21 - 329 CLK_000_D_9_ 3 -1 0 1 2 -1 -1 1 0 21 - 328 CLK_000_D_8_ 3 -1 6 1 0 -1 -1 1 0 21 - 327 CLK_000_D_7_ 3 -1 0 1 6 -1 -1 1 0 21 - 326 CLK_000_D_6_ 3 -1 3 1 0 -1 -1 1 0 21 - 325 CLK_000_D_5_ 3 -1 4 1 3 -1 -1 1 0 21 - 324 CLK_000_D_4_ 3 -1 2 1 4 -1 -1 1 0 21 - 323 CLK_000_D_3_ 3 -1 4 1 2 -1 -1 1 0 21 - 321 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 - 320 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 - 319 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 - 318 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 - 315 inst_DTACK_D0 3 -1 6 1 5 -1 -1 1 0 21 - 313 CLK_000_D_10_ 3 -1 2 1 7 -1 -1 1 0 21 + 304 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21 + 324 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 319 inst_CLK_OUT_PRE_25 3 -1 6 2 4 6 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 318 inst_CLK_OUT_PRE_50 3 -1 2 2 2 6 -1 -1 1 0 21 + 312 CLK_000_D_2_ 3 -1 4 2 1 7 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 + 348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 332 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 + 343 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21 + 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 336 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 + 335 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 + 329 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 + 346 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 334 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21 + 327 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 + 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 338 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 331 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 + 330 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 323 CLK_000_D_4_ 3 -1 7 1 7 -1 -1 1 0 21 + 322 IPL_D0_2_ 3 -1 4 1 1 -1 -1 1 0 21 + 321 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 + 320 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 + 314 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 + 313 CLK_000_D_3_ 3 -1 1 1 7 -1 -1 1 0 21 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 - 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 - 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 - 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 - 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 - 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 - 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 - 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 - 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 - 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 67 IPL_2_ 1 -1 -1 2 1 4 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 63 CLK_030 1 -1 -1 2 2 7 63 -1 + 59 A_1_ 1 -1 -1 2 2 6 59 -1 + 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 27 BGACK_000 1 -1 -1 2 4 7 27 -1 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 - 66 IPL_0_ 1 -1 -1 1 1 66 -1 - 59 A_1_ 1 -1 -1 1 6 59 -1 - 55 IPL_1_ 1 -1 -1 1 1 55 -1 - 35 VPA 1 -1 -1 1 5 35 -1 - 29 DTACK 1 -1 -1 1 6 29 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 3 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 \ No newline at end of file + 10 CLK_000 1 -1 -1 1 1 10 -1 +116 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 79 RW_000 5 339 7 3 2 4 6 79 -1 4 0 21 + 40 BERR 5 -1 4 3 0 5 7 40 -1 1 0 21 + 70 RW 5 345 6 2 0 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 + 68 A_0_ 5 344 6 1 1 68 -1 3 0 21 + 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 338 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 10 0 21 + 80 DSACK1 5 342 7 0 80 -1 5 0 21 + 82 BGACK_030 5 341 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 340 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 341 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 315 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 316 CLK_000_D_1_ 3 -1 7 7 0 2 3 4 5 6 7 -1 -1 1 0 21 + 317 CLK_000_D_0_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21 + 325 SM_AMIGA_6_ 3 -1 0 4 0 1 5 7 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 7 4 0 3 4 7 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 5 3 1 6 7 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21 + 336 SM_AMIGA_i_7_ 3 -1 5 2 0 7 -1 -1 13 1 21 + 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 + 328 RST_DLY_0_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 333 SM_AMIGA_5_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 332 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 327 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 326 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 324 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 + 330 RST_DLY_2_ 3 -1 6 2 3 6 -1 -1 2 0 21 + 329 RST_DLY_1_ 3 -1 6 2 3 6 -1 -1 2 1 21 + 323 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 + 313 CLK_000_D_3_ 3 -1 7 2 5 7 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 2 0 6 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 331 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 + 342 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21 + 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 335 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 + 334 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 + 305 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21 + 344 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21 + 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 337 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 322 CLK_000_D_4_ 3 -1 5 1 7 -1 -1 1 0 21 + 321 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 320 IPL_D0_1_ 3 -1 4 1 1 -1 -1 1 0 21 + 319 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 + 318 inst_CLK_OUT_PRE_50 3 -1 5 1 5 -1 -1 1 0 21 + 314 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 + 312 CLK_000_D_2_ 3 -1 4 1 7 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 63 CLK_030 1 -1 -1 2 2 7 63 -1 + 55 IPL_1_ 1 -1 -1 2 1 4 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 4 10 -1 +117 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 40 BERR 5 -1 4 4 0 1 5 7 40 -1 1 0 21 + 79 RW_000 5 340 7 3 2 4 6 79 -1 4 0 21 + 68 A_0_ 5 346 6 2 2 6 68 -1 3 0 21 + 70 RW 5 345 6 2 5 7 70 -1 2 0 21 + 81 AS_030 5 -1 7 2 4 7 81 -1 1 0 21 + 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 339 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 348 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 347 1 0 6 -1 10 0 21 + 80 DSACK1 5 343 7 0 80 -1 5 0 21 + 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 34 VMA 5 344 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 341 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 315 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 316 CLK_000_D_1_ 3 -1 7 6 0 1 3 4 5 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 6 0 1 3 4 5 7 -1 -1 1 0 21 + 326 SM_AMIGA_6_ 3 -1 1 5 1 2 5 6 7 -1 -1 3 0 21 + 317 CLK_000_D_0_ 3 -1 1 5 0 1 3 5 7 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 0 4 0 1 3 5 -1 -1 7 0 21 + 337 SM_AMIGA_i_7_ 3 -1 5 3 0 1 7 -1 -1 13 1 21 + 295 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 6 3 0 2 6 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 + 305 CYCLE_DMA_1_ 3 -1 0 2 0 2 -1 -1 4 0 21 + 344 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 333 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 328 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 + 325 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 5 2 3 5 -1 -1 3 0 21 + 324 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 319 inst_CLK_OUT_PRE_25 3 -1 6 2 4 6 -1 -1 2 0 21 + 309 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 318 inst_CLK_OUT_PRE_50 3 -1 2 2 2 6 -1 -1 1 0 21 + 312 CLK_000_D_2_ 3 -1 4 2 1 7 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 + 348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 332 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 + 343 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21 + 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 336 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 + 335 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 + 329 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 + 346 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 334 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21 + 327 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 + 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 338 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 331 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 + 330 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 323 CLK_000_D_4_ 3 -1 7 1 7 -1 -1 1 0 21 + 322 IPL_D0_2_ 3 -1 4 1 1 -1 -1 1 0 21 + 321 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 + 320 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 + 314 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 + 313 CLK_000_D_3_ 3 -1 1 1 7 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 4 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 63 CLK_030 1 -1 -1 2 2 7 63 -1 + 59 A_1_ 1 -1 -1 2 2 6 59 -1 + 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 3 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 79 RW_000 5 346 7 3 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 3 3 4 7 81 -1 1 0 21 + 40 BERR 5 -1 4 3 0 5 7 40 -1 1 0 21 + 68 A_0_ 5 352 6 2 1 3 68 -1 3 0 21 + 70 RW 5 351 6 2 5 7 70 -1 2 0 21 + 31 UDS_000 5 -1 3 2 2 6 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 2 6 30 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 1 78 -1 1 0 21 + 69 SIZE_0_ 5 -1 6 1 1 69 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 345 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 354 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 353 1 0 6 -1 10 0 21 + 80 DSACK1 5 349 7 0 80 -1 5 0 21 + 82 BGACK_030 5 348 7 0 82 -1 3 0 21 + 34 VMA 5 350 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 347 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 348 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 315 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 317 CLK_000_D_0_ 3 -1 4 6 0 2 3 5 6 7 -1 -1 1 0 21 + 316 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 + 332 SM_AMIGA_6_ 3 -1 0 5 0 1 3 5 7 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 3 5 0 3 4 5 7 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 5 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 1 3 1 6 7 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 5 3 0 2 6 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21 + 343 SM_AMIGA_i_7_ 3 -1 5 2 0 7 -1 -1 13 1 21 + 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 + 350 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 339 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 334 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 331 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 310 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 307 SIZE_DMA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 306 SIZE_DMA_0_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 + 330 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 319 inst_CLK_OUT_PRE_25 3 -1 0 2 0 1 -1 -1 2 0 21 + 297 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 + 313 CLK_000_D_9_ 3 -1 7 2 5 7 -1 -1 1 0 21 + 308 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21 + 354 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 353 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 345 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 338 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 + 349 RN_DSACK1 3 80 7 1 7 80 -1 5 0 21 + 346 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 342 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 4 0 21 + 341 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 4 1 21 + 335 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 2 1 2 -1 -1 4 0 21 + 352 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 340 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21 + 333 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21 + 351 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 347 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 337 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 336 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 309 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 329 CLK_000_D_10_ 3 -1 5 1 7 -1 -1 1 0 21 + 328 CLK_000_D_7_ 3 -1 4 1 4 -1 -1 1 0 21 + 327 CLK_000_D_6_ 3 -1 1 1 4 -1 -1 1 0 21 + 326 CLK_000_D_5_ 3 -1 1 1 1 -1 -1 1 0 21 + 325 CLK_000_D_4_ 3 -1 3 1 1 -1 -1 1 0 21 + 324 CLK_000_D_3_ 3 -1 4 1 3 -1 -1 1 0 21 + 323 CLK_000_D_2_ 3 -1 7 1 4 -1 -1 1 0 21 + 322 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 + 321 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 320 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 + 318 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 + 314 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21 + 312 CLK_000_D_8_ 3 -1 4 1 7 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 + 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 + 63 CLK_030 1 -1 -1 2 2 7 63 -1 + 59 A_1_ 1 -1 -1 2 2 6 59 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 2 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 4 10 -1 \ No newline at end of file diff --git a/Logic/68030_tk.plc b/Logic/68030_tk.plc index 60c3f25..1106972 100644 --- a/Logic/68030_tk.plc +++ b/Logic/68030_tk.plc @@ -8,7 +8,7 @@ ; Source file 68030_tk.tt4 ; FITTER-generated Placements. ; DEVICE mach447a -; DATE Fri Aug 19 00:39:40 2016 +; DATE Wed Aug 24 22:17:53 2016 Pin 79 SIZE_1_ Comb ; S6=1 S9=1 Pair 287 @@ -17,39 +17,39 @@ Pin 85 A_DECODE_23_ Pin 68 IPL_2_ Pin 58 FC_1_ Pin 82 AS_030 Comb ; S6=1 S9=1 Pair 281 -Pin 42 AS_000 Comb ; S6=1 S9=1 Pair 203 -Pin 98 DS_030 Comb ; S6=1 S9=1 Pair 101 -Pin 32 UDS_000 Comb ; S6=1 S9=1 Pair 185 -Pin 31 LDS_000 Comb ; S6=1 S9=1 Pair 191 -Pin 14 nEXP_SPACE -Pin 41 BERR Comb ; S6=1 S9=1 Pair 197 -Pin 21 BG_030 Pin 70 SIZE_0_ Comb ; S6=1 S9=1 Pair 263 +Pin 42 AS_000 Comb ; S6=1 S9=1 Pair 203 Pin 5 AHIGH_30_ Comb ; S6=1 S9=1 Pair 125 -Pin 28 BGACK_000 -Pin 6 AHIGH_29_ Comb ; S6=1 S9=1 Pair 145 -Pin 64 CLK_030 +Pin 6 AHIGH_29_ Comb ; S6=1 S9=1 Pair 137 +Pin 98 DS_030 Comb ; S6=1 S9=1 Pair 101 Pin 15 AHIGH_28_ Comb ; S6=1 S9=1 Pair 149 -Pin 11 CLK_000 +Pin 32 UDS_000 Comb ; S6=1 S9=1 Pair 185 Pin 16 AHIGH_27_ Comb ; S6=1 S9=1 Pair 163 -Pin 61 CLK_OSZI +Pin 31 LDS_000 Comb ; S6=1 S9=1 Pair 191 Pin 17 AHIGH_26_ Comb ; S6=1 S9=1 Pair 157 -Pin 65 CLK_DIV_OUT Reg ; S6=1 S9=1 Pair 247 +Pin 14 nEXP_SPACE Pin 18 AHIGH_25_ Comb ; S6=1 S9=1 Pair 167 +Pin 41 BERR Comb ; S6=1 S9=1 Pair 197 Pin 19 AHIGH_24_ Comb ; S6=1 S9=1 Pair 161 -Pin 78 FPU_CS Comb ; S6=1 S9=1 Pair 277 +Pin 21 BG_030 Pin 84 A_DECODE_22_ -Pin 91 FPU_SENSE Pin 94 A_DECODE_21_ Pin 93 A_DECODE_20_ -Pin 30 DTACK +Pin 28 BGACK_000 Pin 97 A_DECODE_19_ -Pin 92 AVEC Comb ; S6=1 S9=1 Pair 107 +Pin 64 CLK_030 Pin 95 A_DECODE_18_ -Pin 66 E Comb ; S6=1 S9=1 Pair 251 +Pin 11 CLK_000 Pin 59 A_DECODE_17_ -Pin 36 VPA +Pin 61 CLK_OSZI Pin 96 A_DECODE_16_ +Pin 65 CLK_DIV_OUT Reg ; S6=1 S9=1 Pair 247 +Pin 78 FPU_CS Comb ; S6=1 S9=1 Pair 271 +Pin 91 FPU_SENSE +Pin 30 DTACK +Pin 92 AVEC Comb ; S6=1 S9=1 Pair 107 +Pin 66 E Comb ; S6=1 S9=1 Pair 251 +Pin 36 VPA Pin 86 RST Pin 3 RESET Comb ; S6=1 S9=1 Pair 128 Pin 33 AMIGA_ADDR_ENABLE Comb ; S6=1 S9=1 Pair 181 @@ -62,7 +62,7 @@ Pin 67 IPL_0_ Pin 57 FC_0_ Pin 60 A_1_ Pin 9 IPL_030_2_ Reg ; S6=1 S9=1 Pair 131 -Pin 80 RW_000 Reg ; S6=1 S9=1 Pair 271 +Pin 80 RW_000 Reg ; S6=1 S9=1 Pair 269 Pin 29 BG_000 Reg ; S6=1 S9=1 Pair 175 Pin 83 BGACK_030 Reg ; S6=1 S9=1 Pair 275 Pin 10 CLK_EXP Reg ; S6=1 S9=1 Pair 127 @@ -75,20 +75,20 @@ Pin 8 IPL_030_0_ Reg ; S6=1 S9=1 Pair 133 Node 287 RN_SIZE_1_ Comb ; S6=1 S9=1 Node 143 RN_AHIGH_31_ Comb ; S6=1 S9=1 Node 281 RN_AS_030 Comb ; S6=1 S9=1 -Node 203 RN_AS_000 Comb ; S6=1 S9=1 -Node 185 RN_UDS_000 Comb ; S6=1 S9=1 -Node 191 RN_LDS_000 Comb ; S6=1 S9=1 -Node 197 RN_BERR Comb ; S6=1 S9=1 Node 263 RN_SIZE_0_ Comb ; S6=1 S9=1 +Node 203 RN_AS_000 Comb ; S6=1 S9=1 Node 125 RN_AHIGH_30_ Comb ; S6=1 S9=1 -Node 145 RN_AHIGH_29_ Comb ; S6=1 S9=1 +Node 137 RN_AHIGH_29_ Comb ; S6=1 S9=1 Node 149 RN_AHIGH_28_ Comb ; S6=1 S9=1 +Node 185 RN_UDS_000 Comb ; S6=1 S9=1 Node 163 RN_AHIGH_27_ Comb ; S6=1 S9=1 +Node 191 RN_LDS_000 Comb ; S6=1 S9=1 Node 157 RN_AHIGH_26_ Comb ; S6=1 S9=1 Node 167 RN_AHIGH_25_ Comb ; S6=1 S9=1 +Node 197 RN_BERR Comb ; S6=1 S9=1 Node 161 RN_AHIGH_24_ Comb ; S6=1 S9=1 Node 131 RN_IPL_030_2_ Reg ; S6=1 S9=1 -Node 271 RN_RW_000 Reg ; S6=1 S9=1 +Node 269 RN_RW_000 Reg ; S6=1 S9=1 Node 175 RN_BG_000 Reg ; S6=1 S9=1 Node 275 RN_BGACK_030 Reg ; S6=1 S9=1 Node 283 RN_DSACK1 Reg ; S6=1 S9=1 @@ -97,58 +97,57 @@ Node 245 RN_RW Reg ; S6=1 S9=1 Node 257 RN_A_0_ Reg ; S6=1 S9=1 Node 139 RN_IPL_030_1_ Reg ; S6=1 S9=1 Node 133 RN_IPL_030_0_ Reg ; S6=1 S9=1 -Node 187 cpu_est_3_ Reg ; S6=1 S9=1 -Node 176 cpu_est_0_ Reg ; S6=1 S9=1 -Node 233 cpu_est_1_ Reg ; S6=1 S9=1 -Node 193 cpu_est_2_ Reg ; S6=1 S9=1 -Node 172 inst_AS_000_INT Reg ; S6=1 S9=1 -Node 260 inst_AMIGA_BUS_ENABLE_DMA_LOW Reg ; S6=1 S9=1 -Node 110 inst_AS_030_D0 Reg ; S6=1 S9=1 -Node 158 inst_AS_030_000_SYNC Reg ; S6=1 S9=1 -Node 289 inst_BGACK_030_INT_D Reg ; S6=1 S9=1 -Node 119 inst_AS_000_DMA Reg ; S6=1 S9=1 -Node 103 inst_DS_000_DMA Reg ; S6=1 S9=1 -Node 121 CYCLE_DMA_0_ Reg ; S6=1 S9=1 -Node 115 CYCLE_DMA_1_ Reg ; S6=1 S9=1 +Node 176 cpu_est_3_ Reg ; S6=1 S9=1 +Node 188 cpu_est_0_ Reg ; S6=1 S9=1 +Node 193 cpu_est_1_ Reg ; S6=1 S9=1 +Node 182 cpu_est_2_ Reg ; S6=1 S9=1 +Node 109 inst_AS_000_INT Reg ; S6=1 S9=1 +Node 154 inst_AMIGA_BUS_ENABLE_DMA_LOW Reg ; S6=1 S9=1 +Node 187 inst_AS_030_D0 Reg ; S6=1 S9=1 +Node 119 inst_AS_030_000_SYNC Reg ; S6=1 S9=1 +Node 221 inst_BGACK_030_INT_D Reg ; S6=1 S9=1 +Node 152 inst_AS_000_DMA Reg ; S6=1 S9=1 +Node 169 inst_DS_000_DMA Reg ; S6=1 S9=1 +Node 170 CYCLE_DMA_0_ Reg ; S6=1 S9=1 +Node 164 CYCLE_DMA_1_ Reg ; S6=1 S9=1 Node 248 SIZE_DMA_0_ Reg ; S6=1 S9=1 -Node 259 SIZE_DMA_1_ Reg ; S6=1 S9=1 -Node 224 inst_VPA_D Reg ; S6=1 S9=1 -Node 188 inst_UDS_000_INT Reg ; S6=1 S9=1 -Node 182 inst_LDS_000_INT Reg ; S6=1 S9=1 -Node 209 inst_CLK_OUT_PRE_D Reg ; S6=1 S9=1 -Node 274 CLK_000_D_1_ Reg ; S6=1 S9=1 -Node 170 CLK_000_D_10_ Reg ; S6=1 S9=1 -Node 269 CLK_000_D_11_ Reg ; S6=1 S9=1 -Node 256 inst_DTACK_D0 Reg ; S6=1 S9=1 -Node 113 inst_RESET_OUT Reg ; S6=1 S9=1 -Node 169 CLK_000_D_0_ Reg ; S6=1 S9=1 -Node 206 inst_CLK_OUT_PRE_50 Reg ; S6=1 S9=1 -Node 130 IPL_D0_0_ Reg ; S6=1 S9=1 -Node 146 IPL_D0_1_ Reg ; S6=1 S9=1 -Node 106 IPL_D0_2_ Reg ; S6=1 S9=1 -Node 200 CLK_000_D_2_ Reg ; S6=1 S9=1 -Node 211 CLK_000_D_3_ Reg ; S6=1 S9=1 -Node 166 CLK_000_D_4_ Reg ; S6=1 S9=1 -Node 205 CLK_000_D_5_ Reg ; S6=1 S9=1 -Node 194 CLK_000_D_6_ Reg ; S6=1 S9=1 -Node 122 CLK_000_D_7_ Reg ; S6=1 S9=1 -Node 250 CLK_000_D_8_ Reg ; S6=1 S9=1 -Node 116 CLK_000_D_9_ Reg ; S6=1 S9=1 -Node 266 CLK_000_D_12_ Reg ; S6=1 S9=1 +Node 265 SIZE_DMA_1_ Reg ; S6=1 S9=1 +Node 115 inst_VPA_D Reg ; S6=1 S9=1 +Node 194 inst_UDS_000_INT Reg ; S6=1 S9=1 +Node 134 inst_LDS_000_INT Reg ; S6=1 S9=1 +Node 145 inst_CLK_OUT_PRE_D Reg ; S6=1 S9=1 +Node 206 CLK_000_D_8_ Reg ; S6=1 S9=1 +Node 289 CLK_000_D_9_ Reg ; S6=1 S9=1 +Node 160 inst_DTACK_D0 Reg ; S6=1 S9=1 +Node 259 inst_RESET_OUT Reg ; S6=1 S9=1 +Node 277 CLK_000_D_1_ Reg ; S6=1 S9=1 +Node 209 CLK_000_D_0_ Reg ; S6=1 S9=1 +Node 104 inst_CLK_OUT_PRE_50 Reg ; S6=1 S9=1 +Node 103 inst_CLK_OUT_PRE_25 Reg ; S6=1 S9=1 +Node 121 IPL_D0_0_ Reg ; S6=1 S9=1 +Node 130 IPL_D0_1_ Reg ; S6=1 S9=1 +Node 256 IPL_D0_2_ Reg ; S6=1 S9=1 +Node 278 CLK_000_D_2_ Reg ; S6=1 S9=1 +Node 200 CLK_000_D_3_ Reg ; S6=1 S9=1 +Node 178 CLK_000_D_4_ Reg ; S6=1 S9=1 +Node 146 CLK_000_D_5_ Reg ; S6=1 S9=1 +Node 140 CLK_000_D_6_ Reg ; S6=1 S9=1 +Node 217 CLK_000_D_7_ Reg ; S6=1 S9=1 +Node 230 CLK_000_D_10_ Reg ; S6=1 S9=1 Node 254 inst_AMIGA_BUS_ENABLE_DMA_HIGH Reg ; S6=1 S9=1 -Node 134 inst_DS_000_ENABLE Reg ; S6=1 S9=1 -Node 152 SM_AMIGA_6_ Reg ; S6=1 S9=1 -Node 253 SM_AMIGA_0_ Reg ; S6=1 S9=1 -Node 140 SM_AMIGA_4_ Reg ; S6=1 S9=1 -Node 221 RST_DLY_0_ Reg ; S6=1 S9=1 -Node 241 RST_DLY_1_ Reg ; S6=1 S9=1 -Node 235 RST_DLY_2_ Reg ; S6=1 S9=1 -Node 109 inst_CLK_030_H Reg ; S6=1 S9=1 -Node 223 SM_AMIGA_1_ Reg ; S6=1 S9=1 -Node 229 SM_AMIGA_5_ Reg ; S6=1 S9=1 -Node 236 SM_AMIGA_3_ Reg ; S6=1 S9=1 -Node 230 SM_AMIGA_2_ Reg ; S6=1 S9=1 +Node 223 inst_DS_000_ENABLE Reg ; S6=1 S9=1 +Node 113 SM_AMIGA_6_ Reg ; S6=1 S9=1 +Node 224 SM_AMIGA_4_ Reg ; S6=1 S9=1 +Node 239 SM_AMIGA_0_ Reg ; S6=1 S9=1 +Node 260 RST_DLY_0_ Reg ; S6=1 S9=1 +Node 250 RST_DLY_1_ Reg ; S6=1 S9=1 +Node 266 RST_DLY_2_ Reg ; S6=1 S9=1 +Node 158 inst_CLK_030_H Reg ; S6=1 S9=1 +Node 233 SM_AMIGA_1_ Reg ; S6=1 S9=1 +Node 241 SM_AMIGA_5_ Reg ; S6=1 S9=1 +Node 235 SM_AMIGA_3_ Reg ; S6=1 S9=1 +Node 229 SM_AMIGA_2_ Reg ; S6=1 S9=1 Node 227 SM_AMIGA_i_7_ Reg ; S6=1 S9=1 -Node 212 CIIN_0 Comb ; S6=1 S9=1 +Node 211 CIIN_0 Comb ; S6=1 S9=1 ; Unused Pins & Nodes ; -> None Found. diff --git a/Logic/68030_tk.prd b/Logic/68030_tk.prd index 64dbd6c..4e45c4c 100644 --- a/Logic/68030_tk.prd +++ b/Logic/68030_tk.prd @@ -5,8 +5,8 @@ |--------------------------------------------| -Start: Fri Aug 19 00:39:39 2016 -End : Fri Aug 19 00:39:40 2016 $$$ Elapsed time: 00:00:01 +Start: Wed Aug 24 22:17:53 2016 +End : Wed Aug 24 22:17:53 2016 $$$ Elapsed time: 00:00:00 =========================================================================== Part [E:/ispLEVER_Classic2_0/ispcpld/dat/mach4a/mach447a] Design [68030_tk.tt4] @@ -21,16 +21,16 @@ Part [E:/ispLEVER_Classic2_0/ispcpld/dat/mach4a/mach447a] Design [68030_tk.tt4] | | +- Signals to Place | | +----- Logic Array Inputs | | | +- Placed | | | +- Array Inputs Used _|____|____|____|_______________|____|_____________|___|________________ - 0 | 16 | 12 | 12 => 100% | 8 | 8 => 100% | 33 | 23 => 69% - 1 | 16 | 12 | 12 => 100% | 8 | 8 => 100% | 33 | 25 => 75% - 2 | 16 | 12 | 12 => 100% | 8 | 7 => 87% | 33 | 24 => 72% - 3 | 16 | 12 | 12 => 100% | 8 | 8 => 100% | 33 | 25 => 75% - 4 | 16 | 10 | 10 => 100% | 8 | 4 => 50% | 33 | 33 => 100% + 0 | 16 | 9 | 9 => 100% | 8 | 8 => 100% | 33 | 25 => 75% + 1 | 16 | 13 | 13 => 100% | 8 | 8 => 100% | 33 | 22 => 66% + 2 | 16 | 13 | 13 => 100% | 8 | 7 => 87% | 33 | 20 => 60% + 3 | 16 | 13 | 13 => 100% | 8 | 8 => 100% | 33 | 24 => 72% + 4 | 16 | 9 | 9 => 100% | 8 | 4 => 50% | 33 | 33 => 100% 5 | 16 | 10 | 10 => 100% | 8 | 5 => 62% | 33 | 25 => 75% - 6 | 16 | 13 | 13 => 100% | 8 | 7 => 87% | 33 | 27 => 81% + 6 | 16 | 13 | 13 => 100% | 8 | 7 => 87% | 33 | 24 => 72% 7 | 16 | 9 | 9 => 100% | 8 | 8 => 100% | 33 | 33 => 100% ---|----|----|------------|-------|------------|-----|------------------ - | Avg number of array inputs in used blocks : 26.88 => 81% + | Avg number of array inputs in used blocks : 25.75 => 78% * Input/Clock Signal count: 24 -> placed: 24 = 100% @@ -41,13 +41,13 @@ _|____|____|____|_______________|____|_____________|___|________________ Clock Only Pins : 0 0 => 0% Clock/Input Pins : 4 4 => 100% Logic Blocks : 8 8 => 100% - Macrocells : 128 90 => 70% - PT Clusters : 128 53 => 41% - - Single PT Clusters : 128 46 => 35% + Macrocells : 128 89 => 69% + PT Clusters : 128 55 => 42% + - Single PT Clusters : 128 44 => 34% Input Registers : 0 * Routing Completion: 100% -* Attempts: Place [ 4804] Route [ 1] +* Attempts: Place [ 392] Route [ 1] =========================================================================== Signal Fanout Table =========================================================================== @@ -69,21 +69,21 @@ ___|__|__|____|____________________________________________________________ 10| 4|OUT| 48|=> ....|....| AMIGA_BUS_DATA_DIR 11| 3|OUT| 34|=> ....|....| AMIGA_BUS_ENABLE_HIGH 12| 2|OUT| 20|=> ....|....| AMIGA_BUS_ENABLE_LOW - 13| 4| IO| 42|=> 0...|4..7| AS_000 - 14| 7| IO| 82|=> 0...|4..7| AS_030 + 13| 4| IO| 42|=> 0.2.|4..7| AS_000 + 14| 7| IO| 82|=> ...3|4..7| AS_030 15| 0|OUT| 92|=> ....|....| AVEC - 16| 6| IO| 69|=> ...3|....| A_0_ + 16| 6| IO| 69|=> .1.3|....| A_0_ |=> Paired w/: RN_A_0_ - 17| 5|INP| 60|=> ....|..6.| A_1_ - 18| 0|INP| 96|=> ..2.|4..7| A_DECODE_16_ - 19| 5|INP| 59|=> ..2.|4..7| A_DECODE_17_ - 20| 0|INP| 95|=> ..2.|4..7| A_DECODE_18_ - 21| 0|INP| 97|=> ..2.|4..7| A_DECODE_19_ + 17| 5|INP| 60|=> ..2.|..6.| A_1_ + 18| 0|INP| 96|=> 0...|4..7| A_DECODE_16_ + 19| 5|INP| 59|=> 0...|4..7| A_DECODE_17_ + 20| 0|INP| 95|=> 0...|4..7| A_DECODE_18_ + 21| 0|INP| 97|=> 0...|4..7| A_DECODE_19_ 22| 0|INP| 93|=> ....|4...| A_DECODE_20_ 23| 0|INP| 94|=> ....|4...| A_DECODE_21_ 24| 7|INP| 84|=> ....|4...| A_DECODE_22_ 25| 7|INP| 85|=> ....|4...| A_DECODE_23_ - 26| 4| IO| 41|=> .12.|.567| BERR + 26| 4| IO| 41|=> 0...|.5.7| BERR 27| 3|INP| 28|=> ....|4..7| BGACK_000 28| 7| IO| 83|=> ....|....| BGACK_030 |=> Paired w/: RN_BGACK_030 @@ -92,115 +92,114 @@ ___|__|__|____|____________________________________________________________ 30| 2|INP| 21|=> ...3|....| BG_030 31| 4|OUT| 47|=> ....|....| CIIN 32| 4|NOD| . |=> ....|4...| CIIN_0 - 33| +|INP| 11|=> ..2.|....| CLK_000 - 34| 2|NOD| . |=> 0123|.567| CLK_000_D_0_ - 35| 2|NOD| . |=> ....|...7| CLK_000_D_10_ - 36| 7|NOD| . |=> ....|..67| CLK_000_D_11_ - 37| 6|NOD| . |=> ....|...7| CLK_000_D_12_ - 38| 7|NOD| . |=> 0123|4567| CLK_000_D_1_ - 39| 4|NOD| . |=> ..2.|45..| CLK_000_D_2_ - 40| 4|NOD| . |=> ..2.|....| CLK_000_D_3_ - 41| 2|NOD| . |=> ....|4...| CLK_000_D_4_ - 42| 4|NOD| . |=> ...3|....| CLK_000_D_5_ - 43| 3|NOD| . |=> 0...|....| CLK_000_D_6_ - 44| 0|NOD| . |=> ....|..6.| CLK_000_D_7_ - 45| 6|NOD| . |=> 0...|....| CLK_000_D_8_ - 46| 0|NOD| . |=> ..2.|....| CLK_000_D_9_ - 47| +|INP| 64|=> 0...|...7| CLK_030 - 48| 6|OUT| 65|=> ....|....| CLK_DIV_OUT - 49| 1|OUT| 10|=> ....|....| CLK_EXP - 50| +|Cin| 61|=> ....|....| CLK_OSZI - 51| 0|NOD| . |=> 0...|....| CYCLE_DMA_0_ - 52| 0|NOD| . |=> 0...|....| CYCLE_DMA_1_ - 53| 7| IO| 81|=> ....|....| DSACK1 + 33| +|INP| 11|=> ....|4...| CLK_000 + 34| 4|NOD| . |=> 0.23|.567| CLK_000_D_0_ + 35| 5|NOD| . |=> ....|...7| CLK_000_D_10_ + 36| 7|NOD| . |=> 0.23|.567| CLK_000_D_1_ + 37| 7|NOD| . |=> ....|4...| CLK_000_D_2_ + 38| 4|NOD| . |=> ...3|....| CLK_000_D_3_ + 39| 3|NOD| . |=> .1..|....| CLK_000_D_4_ + 40| 1|NOD| . |=> .1..|....| CLK_000_D_5_ + 41| 1|NOD| . |=> ....|4...| CLK_000_D_6_ + 42| 4|NOD| . |=> ....|4...| CLK_000_D_7_ + 43| 4|NOD| . |=> ....|...7| CLK_000_D_8_ + 44| 7|NOD| . |=> ....|.5.7| CLK_000_D_9_ + 45| +|INP| 64|=> ..2.|...7| CLK_030 + 46| 6|OUT| 65|=> ....|....| CLK_DIV_OUT + 47| 1|OUT| 10|=> ....|....| CLK_EXP + 48| +|Cin| 61|=> ....|....| CLK_OSZI + 49| 2|NOD| . |=> ..2.|....| CYCLE_DMA_0_ + 50| 2|NOD| . |=> ..2.|....| CYCLE_DMA_1_ + 51| 7| IO| 81|=> ....|....| DSACK1 |=> Paired w/: RN_DSACK1 - 54| 0|OUT| 98|=> ....|....| DS_030 - 55| 3|INP| 30|=> ....|..6.| DTACK - 56| 6|OUT| 66|=> ....|....| E - 57| 5|INP| 57|=> ..2.|4..7| FC_0_ - 58| 5|INP| 58|=> ..2.|4..7| FC_1_ - 59| 7|OUT| 78|=> ....|....| FPU_CS - 60| 0|INP| 91|=> ....|4..7| FPU_SENSE - 61| 1| IO| 8|=> ....|....| IPL_030_0_ + 52| 0|OUT| 98|=> ....|....| DS_030 + 53| 3|INP| 30|=> ..2.|....| DTACK + 54| 6|OUT| 66|=> ....|....| E + 55| 5|INP| 57|=> 0...|4..7| FC_0_ + 56| 5|INP| 58|=> 0...|4..7| FC_1_ + 57| 7|OUT| 78|=> ....|....| FPU_CS + 58| 0|INP| 91|=> ....|4..7| FPU_SENSE + 59| 1| IO| 8|=> ....|....| IPL_030_0_ |=> Paired w/: RN_IPL_030_0_ - 62| 1| IO| 7|=> ....|....| IPL_030_1_ + 60| 1| IO| 7|=> ....|....| IPL_030_1_ |=> Paired w/: RN_IPL_030_1_ - 63| 1| IO| 9|=> ....|....| IPL_030_2_ + 61| 1| IO| 9|=> ....|....| IPL_030_2_ |=> Paired w/: RN_IPL_030_2_ - 64| 6|INP| 67|=> .1..|....| IPL_0_ - 65| 5|INP| 56|=> .1..|....| IPL_1_ - 66| 6|INP| 68|=> 01..|....| IPL_2_ - 67| 1|NOD| . |=> .1..|....| IPL_D0_0_ - 68| 1|NOD| . |=> .1..|....| IPL_D0_1_ - 69| 0|NOD| . |=> .1..|....| IPL_D0_2_ - 70| 3| IO| 31|=> 0...|..6.| LDS_000 - 71| 1|OUT| 3|=> ....|....| RESET - 72| 6|NOD| . |=> ....|..6.| RN_A_0_ + 62| 6|INP| 67|=> 01..|....| IPL_0_ + 63| 5|INP| 56|=> .1..|....| IPL_1_ + 64| 6|INP| 68|=> .1..|..6.| IPL_2_ + 65| 0|NOD| . |=> .1..|....| IPL_D0_0_ + 66| 1|NOD| . |=> .1..|....| IPL_D0_1_ + 67| 6|NOD| . |=> .1..|....| IPL_D0_2_ + 68| 3| IO| 31|=> ..2.|..6.| LDS_000 + 69| 1|OUT| 3|=> ....|....| RESET + 70| 6|NOD| . |=> ....|..6.| RN_A_0_ |=> Paired w/: A_0_ - 73| 7|NOD| . |=> 0123|4.67| RN_BGACK_030 + 71| 7|NOD| . |=> 0123|4567| RN_BGACK_030 |=> Paired w/: BGACK_030 - 74| 3|NOD| . |=> ...3|....| RN_BG_000 + 72| 3|NOD| . |=> ...3|....| RN_BG_000 |=> Paired w/: BG_000 - 75| 7|NOD| . |=> ....|...7| RN_DSACK1 + 73| 7|NOD| . |=> ....|...7| RN_DSACK1 |=> Paired w/: DSACK1 - 76| 1|NOD| . |=> .1..|....| RN_IPL_030_0_ + 74| 1|NOD| . |=> .1..|....| RN_IPL_030_0_ |=> Paired w/: IPL_030_0_ - 77| 1|NOD| . |=> .1..|....| RN_IPL_030_1_ + 75| 1|NOD| . |=> .1..|....| RN_IPL_030_1_ |=> Paired w/: IPL_030_1_ - 78| 1|NOD| . |=> .1..|....| RN_IPL_030_2_ + 76| 1|NOD| . |=> .1..|....| RN_IPL_030_2_ |=> Paired w/: IPL_030_2_ - 79| 6|NOD| . |=> ....|..6.| RN_RW + 77| 6|NOD| . |=> ....|..6.| RN_RW |=> Paired w/: RW - 80| 7|NOD| . |=> ....|...7| RN_RW_000 + 78| 7|NOD| . |=> ....|...7| RN_RW_000 |=> Paired w/: RW_000 - 81| 3|NOD| . |=> ...3|.5..| RN_VMA + 79| 3|NOD| . |=> ...3|.5..| RN_VMA |=> Paired w/: VMA - 82| +|INP| 86|=> 0123|.567| RST - 83| 5|NOD| . |=> 0...|.5..| RST_DLY_0_ - 84| 5|NOD| . |=> 0...|.5..| RST_DLY_1_ - 85| 5|NOD| . |=> 0...|.5..| RST_DLY_2_ - 86| 6| IO| 71|=> .1..|...7| RW + 80| +|INP| 86|=> 0123|.567| RST + 81| 6|NOD| . |=> ....|..6.| RST_DLY_0_ + 82| 6|NOD| . |=> ....|..6.| RST_DLY_1_ + 83| 6|NOD| . |=> ....|..6.| RST_DLY_2_ + 84| 6| IO| 71|=> ....|.5.7| RW |=> Paired w/: RN_RW - 87| 7| IO| 80|=> 0...|4.6.| RW_000 + 85| 7| IO| 80|=> ..2.|4.6.| RW_000 |=> Paired w/: RN_RW_000 - 88| 6| IO| 70|=> ...3|....| SIZE_0_ - 89| 7| IO| 79|=> ...3|....| SIZE_1_ - 90| 6|NOD| . |=> ....|..67| SIZE_DMA_0_ - 91| 6|NOD| . |=> ....|..67| SIZE_DMA_1_ - 92| 6|NOD| . |=> .1..|.567| SM_AMIGA_0_ - 93| 5|NOD| . |=> ....|.567| SM_AMIGA_1_ - 94| 5|NOD| . |=> ....|.5..| SM_AMIGA_2_ - 95| 5|NOD| . |=> ....|.5..| SM_AMIGA_3_ - 96| 1|NOD| . |=> .1..|.5..| SM_AMIGA_4_ - 97| 5|NOD| . |=> .1..|.5..| SM_AMIGA_5_ - 98| 2|NOD| . |=> .123|.5.7| SM_AMIGA_6_ - 99| 5|NOD| . |=> .12.|...7| SM_AMIGA_i_7_ - 100| 3| IO| 32|=> 0...|..6.| UDS_000 - 101| 3| IO| 35|=> ....|....| VMA + 86| 6| IO| 70|=> .1..|....| SIZE_0_ + 87| 7| IO| 79|=> .1..|....| SIZE_1_ + 88| 6|NOD| . |=> ....|..67| SIZE_DMA_0_ + 89| 6|NOD| . |=> ....|..67| SIZE_DMA_1_ + 90| 5|NOD| . |=> ....|.5.7| SM_AMIGA_0_ + 91| 5|NOD| . |=> ....|.5.7| SM_AMIGA_1_ + 92| 5|NOD| . |=> ....|.5..| SM_AMIGA_2_ + 93| 5|NOD| . |=> ....|.5..| SM_AMIGA_3_ + 94| 5|NOD| . |=> ....|.5..| SM_AMIGA_4_ + 95| 5|NOD| . |=> ....|.5..| SM_AMIGA_5_ + 96| 0|NOD| . |=> 01.3|.5.7| SM_AMIGA_6_ + 97| 5|NOD| . |=> 0...|...7| SM_AMIGA_i_7_ + 98| 3| IO| 32|=> ..2.|..6.| UDS_000 + 99| 3| IO| 35|=> ....|....| VMA |=> Paired w/: RN_VMA - 102| +|INP| 36|=> ....|.5..| VPA - 103| 3|NOD| . |=> ...3|.5..| cpu_est_0_ - 104| 5|NOD| . |=> ...3|.56.| cpu_est_1_ - 105| 3|NOD| . |=> ...3|.56.| cpu_est_2_ - 106| 3|NOD| . |=> ...3|.56.| cpu_est_3_ - 107| 6|NOD| . |=> ...3|..6.| inst_AMIGA_BUS_ENABLE_DMA_HIGH - 108| 6|NOD| . |=> ..2.|..6.| inst_AMIGA_BUS_ENABLE_DMA_LOW - 109| 0|NOD| . |=> 0...|...7| inst_AS_000_DMA - 110| 2|NOD| . |=> ..2.|4...| inst_AS_000_INT - 111| 2|NOD| . |=> ..23|.5..| inst_AS_030_000_SYNC - 112| 0|NOD| . |=> .123|4..7| inst_AS_030_D0 - 113| 7|NOD| . |=> ..2.|..6.| inst_BGACK_030_INT_D - 114| 0|NOD| . |=> 0...|....| inst_CLK_030_H - 115| 4|NOD| . |=> ....|4...| inst_CLK_OUT_PRE_50 - 116| 4|NOD| . |=> .1..|..67| inst_CLK_OUT_PRE_D - 117| 0|NOD| . |=> 0...|....| inst_DS_000_DMA - 118| 1|NOD| . |=> .1.3|....| inst_DS_000_ENABLE - 119| 6|NOD| . |=> ....|.5..| inst_DTACK_D0 - 120| 3|NOD| . |=> ...3|....| inst_LDS_000_INT - 121| 0|NOD| . |=> 0123|4.67| inst_RESET_OUT - 122| 3|NOD| . |=> ...3|....| inst_UDS_000_INT - 123| 5|NOD| . |=> ...3|.5..| inst_VPA_D - 124| +|INP| 14|=> 0123|4567| nEXP_SPACE + 100| +|INP| 36|=> 0...|....| VPA + 101| 3|NOD| . |=> ...3|.5..| cpu_est_0_ + 102| 3|NOD| . |=> ...3|.56.| cpu_est_1_ + 103| 3|NOD| . |=> ...3|.56.| cpu_est_2_ + 104| 3|NOD| . |=> ...3|.56.| cpu_est_3_ + 105| 6|NOD| . |=> ...3|..6.| inst_AMIGA_BUS_ENABLE_DMA_HIGH + 106| 2|NOD| . |=> ..2.|....| inst_AMIGA_BUS_ENABLE_DMA_LOW + 107| 2|NOD| . |=> ..2.|...7| inst_AS_000_DMA + 108| 0|NOD| . |=> 0...|4...| inst_AS_000_INT + 109| 0|NOD| . |=> 0..3|.5..| inst_AS_030_000_SYNC + 110| 3|NOD| . |=> 0..3|45.7| inst_AS_030_D0 + 111| 5|NOD| . |=> 0.2.|..6.| inst_BGACK_030_INT_D + 112| 2|NOD| . |=> ..2.|....| inst_CLK_030_H + 113| 0|NOD| . |=> 01..|....| inst_CLK_OUT_PRE_25 + 114| 0|NOD| . |=> 0...|....| inst_CLK_OUT_PRE_50 + 115| 1|NOD| . |=> .1..|..67| inst_CLK_OUT_PRE_D + 116| 2|NOD| . |=> 0.2.|....| inst_DS_000_DMA + 117| 5|NOD| . |=> ...3|.5..| inst_DS_000_ENABLE + 118| 2|NOD| . |=> ....|.5..| inst_DTACK_D0 + 119| 1|NOD| . |=> .1.3|....| inst_LDS_000_INT + 120| 6|NOD| . |=> 0123|4.67| inst_RESET_OUT + 121| 3|NOD| . |=> ...3|....| inst_UDS_000_INT + 122| 0|NOD| . |=> ...3|.5..| inst_VPA_D + 123| +|INP| 14|=> 0123|4567| nEXP_SPACE --------------------------------------------------------------------------- =========================================================================== < E:/ispLEVER_Classic2_0/ispcpld/dat/mach4a/mach447a Device Pin Assignments > @@ -321,20 +320,20 @@ ____|_____|_________|______________________________________________________ | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| DS_030|OUT| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig - 1|inst_DS_000_DMA|NOD| | S | 9 | 4 to [ 1]| 1 XOR to [ 1] as logic PT - 2| | ? | | S | | 4 to [ 1]| 1 XOR free - 3| IPL_D0_2_|NOD| | S | 1 | 4 free | 1 XOR to [ 3] for 1 PT sig + 1|inst_CLK_OUT_PRE_25|NOD| | S | 2 | 4 to [ 1]| 1 XOR free + 2|inst_CLK_OUT_PRE_50|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig + 3| | ? | | S | | 4 free | 1 XOR free 4| AVEC|OUT| | S | 1 | 4 free | 1 XOR to [ 4] for 1 PT sig - 5|inst_CLK_030_H|NOD| | S | 8 | 4 to [ 5]| 1 XOR to [ 5] as logic PT - 6|inst_AS_030_D0|NOD| | S | 1 | 4 to [ 5]| 1 XOR to [ 6] for 1 PT sig + 5|inst_AS_000_INT|NOD| | S | 2 | 4 to [ 5]| 1 XOR free + 6| | ? | | S | | 4 free | 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free - 8|inst_RESET_OUT|NOD| | S | 2 | 4 to [ 8]| 1 XOR free - 9| CYCLE_DMA_1_|NOD| | S | 4 | 4 to [ 9]| 1 XOR free -10| CLK_000_D_9_|NOD| | S | 1 | 4 free | 1 XOR to [10] for 1 PT sig + 8| SM_AMIGA_6_|NOD| | S | 3 | 4 to [ 8]| 1 XOR free + 9| inst_VPA_D|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig +10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free -12|inst_AS_000_DMA|NOD| | S | 7 | 4 to [12]| 1 XOR to [12] as logic PT -13| CYCLE_DMA_0_|NOD| | S | 3 | 4 to [13]| 1 XOR free -14| CLK_000_D_7_|NOD| | S | 1 | 4 to [12]| 1 XOR to [14] for 1 PT sig +12|inst_AS_030_000_SYNC|NOD| | S | 7 | 4 to [12]| 1 XOR to [12] as logic PT +13| IPL_D0_0_|NOD| | S | 1 | 4 to [12]| 1 XOR to [13] for 1 PT sig +14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== @@ -347,22 +346,22 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| DS_030|OUT| | S | 1 |=> can support up to [ 5] logic PT(s) - 1|inst_DS_000_DMA|NOD| | S | 9 |=> can support up to [ 18] logic PT(s) - 2| | ? | | S | |=> can support up to [ 9] logic PT(s) - 3| IPL_D0_2_|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) - 4| AVEC|OUT| | S | 1 |=> can support up to [ 9] logic PT(s) - 5|inst_CLK_030_H|NOD| | S | 8 |=> can support up to [ 18] logic PT(s) - 6|inst_AS_030_D0|NOD| | S | 1 |=> can support up to [ 6] logic PT(s) - 7| | ? | | S | |=> can support up to [ 5] logic PT(s) - 8|inst_RESET_OUT|NOD| | S | 2 |=> can support up to [ 14] logic PT(s) - 9| CYCLE_DMA_1_|NOD| | S | 4 |=> can support up to [ 14] logic PT(s) -10| CLK_000_D_9_|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) -11| | ? | | S | |=> can support up to [ 9] logic PT(s) -12|inst_AS_000_DMA|NOD| | S | 7 |=> can support up to [ 14] logic PT(s) -13| CYCLE_DMA_0_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s) -14| CLK_000_D_7_|NOD| | S | 1 |=> can support up to [ 6] logic PT(s) -15| | ? | | S | |=> can support up to [ 5] logic PT(s) + 0| DS_030|OUT| | S | 1 |=> can support up to [ 9] logic PT(s) + 1|inst_CLK_OUT_PRE_25|NOD| | S | 2 |=> can support up to [ 18] logic PT(s) + 2|inst_CLK_OUT_PRE_50|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) + 3| | ? | | S | |=> can support up to [ 13] logic PT(s) + 4| AVEC|OUT| | S | 1 |=> can support up to [ 15] logic PT(s) + 5|inst_AS_000_INT|NOD| | S | 2 |=> can support up to [ 19] logic PT(s) + 6| | ? | | S | |=> can support up to [ 10] logic PT(s) + 7| | ? | | S | |=> can support up to [ 14] logic PT(s) + 8| SM_AMIGA_6_|NOD| | S | 3 |=> can support up to [ 19] logic PT(s) + 9| inst_VPA_D|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) +10| | ? | | S | |=> can support up to [ 14] logic PT(s) +11| | ? | | S | |=> can support up to [ 10] logic PT(s) +12|inst_AS_030_000_SYNC|NOD| | S | 7 |=> can support up to [ 19] logic PT(s) +13| IPL_D0_0_|NOD| | S | 1 |=> can support up to [ 11] logic PT(s) +14| | ? | | S | |=> can support up to [ 10] logic PT(s) +15| | ? | | S | |=> can support up to [ 10] logic PT(s) --------------------------------------------------------------------------- =========================================================================== < Block [ 0] > Node-Pin Assignments @@ -373,20 +372,20 @@ _|_________________|__|__|___|_____|_______________________________________ | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ 0| DS_030|OUT| | => | 5 6 ( 7) 0 | 96 97 ( 98) 91 - 1|inst_DS_000_DMA|NOD| | => | 5 6 7 0 | 96 97 98 91 - 2| | | | => | 6 7 0 1 | 97 98 91 92 - 3| IPL_D0_2_|NOD| | => | 6 7 0 1 | 97 98 91 92 + 1|inst_CLK_OUT_PRE_25|NOD| | => | 5 6 7 0 | 96 97 98 91 + 2|inst_CLK_OUT_PRE_50|NOD| | => | 6 7 0 1 | 97 98 91 92 + 3| | | | => | 6 7 0 1 | 97 98 91 92 4| AVEC|OUT| | => | 7 0 ( 1) 2 | 98 91 ( 92) 93 - 5|inst_CLK_030_H|NOD| | => | 7 0 1 2 | 98 91 92 93 - 6|inst_AS_030_D0|NOD| | => | 0 1 2 3 | 91 92 93 94 + 5|inst_AS_000_INT|NOD| | => | 7 0 1 2 | 98 91 92 93 + 6| | | | => | 0 1 2 3 | 91 92 93 94 7| | | | => | 0 1 2 3 | 91 92 93 94 - 8|inst_RESET_OUT|NOD| | => | 1 2 3 4 | 92 93 94 95 - 9| CYCLE_DMA_1_|NOD| | => | 1 2 3 4 | 92 93 94 95 -10| CLK_000_D_9_|NOD| | => | 2 3 4 5 | 93 94 95 96 + 8| SM_AMIGA_6_|NOD| | => | 1 2 3 4 | 92 93 94 95 + 9| inst_VPA_D|NOD| | => | 1 2 3 4 | 92 93 94 95 +10| | | | => | 2 3 4 5 | 93 94 95 96 11| | | | => | 2 3 4 5 | 93 94 95 96 -12|inst_AS_000_DMA|NOD| | => | 3 4 5 6 | 94 95 96 97 -13| CYCLE_DMA_0_|NOD| | => | 3 4 5 6 | 94 95 96 97 -14| CLK_000_D_7_|NOD| | => | 4 5 6 7 | 95 96 97 98 +12|inst_AS_030_000_SYNC|NOD| | => | 3 4 5 6 | 94 95 96 97 +13| IPL_D0_0_|NOD| | => | 3 4 5 6 | 94 95 96 97 +14| | | | => | 4 5 6 7 | 95 96 97 98 15| | | | => | 4 5 6 7 | 95 96 97 98 --------------------------------------------------------------------------- =========================================================================== @@ -437,41 +436,41 @@ IMX No. | +---- Block IO Pin or Macrocell Number 0 [IOpin 0 | 91|INP FPU_SENSE|*|*] [RegIn 0 |102| -| | ] [MCell 0 |101|OUT DS_030| | ] - [MCell 1 |103|NOD inst_DS_000_DMA| |*] + [MCell 1 |103|NOD inst_CLK_OUT_PRE_25| |*] 1 [IOpin 1 | 92|OUT AVEC|*| ] [RegIn 1 |105| -| | ] - [MCell 2 |104| -| | ] - [MCell 3 |106|NOD IPL_D0_2_| |*] + [MCell 2 |104|NOD inst_CLK_OUT_PRE_50| |*] + [MCell 3 |106| -| | ] 2 [IOpin 2 | 93|INP A_DECODE_20_|*|*] [RegIn 2 |108| -| | ] [MCell 4 |107|OUT AVEC| | ] - [MCell 5 |109|NOD inst_CLK_030_H| |*] + [MCell 5 |109|NOD inst_AS_000_INT| |*] 3 [IOpin 3 | 94|INP A_DECODE_21_|*|*] [RegIn 3 |111| -| | ] - [MCell 6 |110|NOD inst_AS_030_D0| |*] + [MCell 6 |110| -| | ] [MCell 7 |112| -| | ] 4 [IOpin 4 | 95|INP A_DECODE_18_|*|*] [RegIn 4 |114| -| | ] - [MCell 8 |113|NOD inst_RESET_OUT| |*] - [MCell 9 |115|NOD CYCLE_DMA_1_| |*] + [MCell 8 |113|NOD SM_AMIGA_6_| |*] + [MCell 9 |115|NOD inst_VPA_D| |*] 5 [IOpin 5 | 96|INP A_DECODE_16_|*|*] [RegIn 5 |117| -| | ] - [MCell 10 |116|NOD CLK_000_D_9_| |*] + [MCell 10 |116| -| | ] [MCell 11 |118| -| | ] 6 [IOpin 6 | 97|INP A_DECODE_19_|*|*] [RegIn 6 |120| -| | ] - [MCell 12 |119|NOD inst_AS_000_DMA| |*] - [MCell 13 |121|NOD CYCLE_DMA_0_| |*] + [MCell 12 |119|NOD inst_AS_030_000_SYNC| |*] + [MCell 13 |121|NOD IPL_D0_0_| |*] 7 [IOpin 7 | 98|OUT DS_030|*| ] [RegIn 7 |123| -| | ] - [MCell 14 |122|NOD CLK_000_D_7_| |*] + [MCell 14 |122| -| | ] [MCell 15 |124| -| | ] --------------------------------------------------------------------------- =========================================================================== @@ -480,38 +479,38 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| Input Pin ( 86)| RST -Mux01| Mcel 5 9 ( 235)| RST_DLY_2_ -Mux02| Mcel 0 9 ( 115)| CYCLE_DMA_1_ -Mux03| Mcel 0 8 ( 113)| inst_RESET_OUT -Mux04| Input Pin ( 64)| CLK_030 +Mux00| IOPin 6 2 ( 67)| IPL_0_ +Mux01| IOPin 5 2 ( 58)| FC_1_ +Mux02| Mcel 0 5 ( 109)| inst_AS_000_INT +Mux03| Mcel 0 8 ( 113)| SM_AMIGA_6_ +Mux04| IOPin 0 4 ( 95)| A_DECODE_18_ Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| Mcel 5 13 ( 241)| RST_DLY_1_ -Mux07| ... | ... -Mux08| IOPin 3 3 ( 32)| UDS_000 -Mux09| Mcel 0 1 ( 103)| inst_DS_000_DMA -Mux10| Mcel 7 3 ( 274)| CLK_000_D_1_ -Mux11| Mcel 2 13 ( 169)| CLK_000_D_0_ -Mux12| ... | ... -Mux13| ... | ... -Mux14| ... | ... -Mux15| Mcel 0 12 ( 119)| inst_AS_000_DMA -Mux16| IOPin 4 1 ( 42)| AS_000 -Mux17| Mcel 3 14 ( 194)| CLK_000_D_6_ -Mux18| Mcel 0 5 ( 109)| inst_CLK_030_H -Mux19| IOPin 7 3 ( 82)| AS_030 +Mux06| IOPin 5 3 ( 57)| FC_0_ +Mux07| Mcel 3 9 ( 187)| inst_AS_030_D0 +Mux08| IOPin 5 1 ( 59)| A_DECODE_17_ +Mux09| Mcel 0 1 ( 103)| inst_CLK_OUT_PRE_25 +Mux10| Input Pin ( 36)| VPA +Mux11| IOPin 0 5 ( 96)| A_DECODE_16_ +Mux12| IOPin 0 6 ( 97)| A_DECODE_19_ +Mux13| Mcel 7 5 ( 277)| CLK_000_D_1_ +Mux14| Mcel 5 4 ( 227)| SM_AMIGA_i_7_ +Mux15| Mcel 0 12 ( 119)| inst_AS_030_000_SYNC +Mux16| Mcel 4 8 ( 209)| CLK_000_D_0_ +Mux17| IOPin 4 0 ( 41)| BERR +Mux18| ... | ... +Mux19| ... | ... Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux21| IOPin 7 5 ( 80)| RW_000 -Mux22| IOPin 6 3 ( 68)| IPL_2_ +Mux21| Input Pin ( 86)| RST +Mux22| Mcel 0 2 ( 104)| inst_CLK_OUT_PRE_50 Mux23| ... | ... -Mux24| Mcel 6 3 ( 250)| CLK_000_D_8_ -Mux25| Mcel 0 13 ( 121)| CYCLE_DMA_0_ -Mux26| ... | ... -Mux27| IOPin 3 4 ( 31)| LDS_000 +Mux24| ... | ... +Mux25| Mcel 5 0 ( 221)| inst_BGACK_030_INT_D +Mux26| IOPin 4 1 ( 42)| AS_000 +Mux27| Mcel 6 9 ( 259)| inst_RESET_OUT Mux28| ... | ... Mux29| ... | ... -Mux30| ... | ... -Mux31| Mcel 5 0 ( 221)| RST_DLY_0_ +Mux30| Mcel 2 13 ( 169)| inst_DS_000_DMA +Mux31| ... | ... Mux32| ... | ... --------------------------------------------------------------------------- =========================================================================== @@ -527,18 +526,18 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| AHIGH_30_| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig 1| CLK_EXP|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig 2| RESET|OUT| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig - 3| IPL_D0_0_|NOD| | S | 1 | 4 free | 1 XOR to [ 3] for 1 PT sig + 3| IPL_D0_1_|NOD| | S | 1 | 4 free | 1 XOR to [ 3] for 1 PT sig 4| IPL_030_2_| IO| | S |10 | 4 to [ 4]| 1 XOR to [ 4] as logic PT 5| IPL_030_0_| IO| | S |10 | 4 to [ 4]| 1 XOR to [ 4] as logic PT - 6|inst_DS_000_ENABLE|NOD| | S | 4 | 4 to [ 5]| 1 XOR to [ 5] as logic PT + 6|inst_LDS_000_INT|NOD| | S | 3 | 4 to [ 5]| 1 XOR to [ 5] as logic PT 7| | ? | | S | | 4 to [ 5]| 1 XOR to [ 5] as logic PT - 8| | ? | | S | | 4 to [ 6]| 1 XOR free + 8| AHIGH_29_| IO| | S | 1 | 4 to [ 6]| 1 XOR to [ 8] for 1 PT sig 9| IPL_030_1_| IO| | S |10 | 4 to [ 9]| 1 XOR to [ 9] as logic PT -10| SM_AMIGA_4_|NOD| | S | 3 | 4 to [ 9]| 1 XOR to [ 9] as logic PT -11| | ? | | S | | 4 free | 1 XOR free -12| AHIGH_31_| IO| | S | 1 | 4 to [10]| 1 XOR to [12] for 1 PT sig -13| AHIGH_29_| IO| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig -14| IPL_D0_1_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig +10| CLK_000_D_6_|NOD| | S | 1 | 4 to [ 9]| 1 XOR to [10] for 1 PT sig +11| | ? | | S | | 4 to [ 9]| 1 XOR free +12| AHIGH_31_| IO| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig +13|inst_CLK_OUT_PRE_D|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig +14| CLK_000_D_5_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== @@ -554,18 +553,18 @@ _|_________________|__|__|___|_____|_______________________________________ 0| AHIGH_30_| IO| | S | 1 |=> can support up to [ 13] logic PT(s) 1| CLK_EXP|OUT| | S | 1 |=> can support up to [ 17] logic PT(s) 2| RESET|OUT| | S | 1 |=> can support up to [ 13] logic PT(s) - 3| IPL_D0_0_|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) + 3| IPL_D0_1_|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) 4| IPL_030_2_| IO| | S |10 |=> can support up to [ 14] logic PT(s) 5| IPL_030_0_| IO| | S |10 |=> can support up to [ 10] logic PT(s) - 6|inst_DS_000_ENABLE|NOD| | S | 4 |=> can support up to [ 5] logic PT(s) + 6|inst_LDS_000_INT|NOD| | S | 3 |=> can support up to [ 4] logic PT(s) 7| | ? | | S | |=> [ 0] PT capacity - 8| | ? | | S | |=> can support up to [ 1] logic PT(s) - 9| IPL_030_1_| IO| | S |10 |=> can support up to [ 15] logic PT(s) -10| SM_AMIGA_4_|NOD| | S | 3 |=> can support up to [ 9] logic PT(s) + 8| AHIGH_29_| IO| | S | 1 |=> can support up to [ 1] logic PT(s) + 9| IPL_030_1_| IO| | S |10 |=> can support up to [ 14] logic PT(s) +10| CLK_000_D_6_|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) 11| | ? | | S | |=> can support up to [ 9] logic PT(s) -12| AHIGH_31_| IO| | S | 1 |=> can support up to [ 14] logic PT(s) -13| AHIGH_29_| IO| | S | 1 |=> can support up to [ 14] logic PT(s) -14| IPL_D0_1_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) +12| AHIGH_31_| IO| | S | 1 |=> can support up to [ 13] logic PT(s) +13|inst_CLK_OUT_PRE_D|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) +14| CLK_000_D_5_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) 15| | ? | | S | |=> can support up to [ 9] logic PT(s) --------------------------------------------------------------------------- =========================================================================== @@ -579,18 +578,18 @@ _|_________________|__|_____|____________________|________________________ 0| AHIGH_30_| IO| | => |( 5) 6 7 0 |( 5) 4 3 10 1| CLK_EXP|OUT| | => | 5 6 7 ( 0)| 5 4 3 ( 10) 2| RESET|OUT| | => | 6 ( 7) 0 1 | 4 ( 3) 10 9 - 3| IPL_D0_0_|NOD| | => | 6 7 0 1 | 4 3 10 9 + 3| IPL_D0_1_|NOD| | => | 6 7 0 1 | 4 3 10 9 4| IPL_030_2_| IO| | => | 7 0 ( 1) 2 | 3 10 ( 9) 8 5| IPL_030_0_| IO| | => | 7 0 1 ( 2)| 3 10 9 ( 8) - 6|inst_DS_000_ENABLE|NOD| | => | 0 1 2 3 | 10 9 8 7 + 6|inst_LDS_000_INT|NOD| | => | 0 1 2 3 | 10 9 8 7 7| | | | => | 0 1 2 3 | 10 9 8 7 - 8| | | | => | 1 2 3 4 | 9 8 7 6 + 8| AHIGH_29_| IO| | => | 1 2 3 ( 4)| 9 8 7 ( 6) 9| IPL_030_1_| IO| | => | 1 2 ( 3) 4 | 9 8 ( 7) 6 -10| SM_AMIGA_4_|NOD| | => | 2 3 4 5 | 8 7 6 5 +10| CLK_000_D_6_|NOD| | => | 2 3 4 5 | 8 7 6 5 11| | | | => | 2 3 4 5 | 8 7 6 5 12| AHIGH_31_| IO| | => | 3 4 5 ( 6)| 7 6 5 ( 4) -13| AHIGH_29_| IO| | => | 3 ( 4) 5 6 | 7 ( 6) 5 4 -14| IPL_D0_1_|NOD| | => | 4 5 6 7 | 6 5 4 3 +13|inst_CLK_OUT_PRE_D|NOD| | => | 3 4 5 6 | 7 6 5 4 +14| CLK_000_D_5_|NOD| | => | 4 5 6 7 | 6 5 4 3 15| | | | => | 4 5 6 7 | 6 5 4 3 --------------------------------------------------------------------------- =========================================================================== @@ -606,7 +605,7 @@ _|_________________|__|___|_____|___________________________________________ 1| IPL_030_2_| IO|*| 9| => | 2 3 ( 4) 5 6 7 8 9 2| IPL_030_0_| IO|*| 8| => | 4 ( 5) 6 7 8 9 10 11 3| IPL_030_1_| IO|*| 7| => | 6 7 8 ( 9) 10 11 12 13 - 4| AHIGH_29_| IO|*| 6| => | 8 9 10 11 12 (13) 14 15 + 4| AHIGH_29_| IO|*| 6| => | ( 8) 9 10 11 12 13 14 15 5| AHIGH_30_| IO|*| 5| => | 10 11 12 13 14 15 ( 0) 1 6| AHIGH_31_| IO|*| 4| => | (12) 13 14 15 0 1 2 3 7| RESET|OUT|*| 3| => | 14 15 0 1 ( 2) 3 4 5 @@ -649,7 +648,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 1 [IOpin 1 | 9| IO IPL_030_2_|*| ] paired w/[ RN_IPL_030_2_] [RegIn 1 |129| -| | ] [MCell 2 |128|OUT RESET| | ] - [MCell 3 |130|NOD IPL_D0_0_| |*] + [MCell 3 |130|NOD IPL_D0_1_| |*] 2 [IOpin 2 | 8| IO IPL_030_0_|*| ] paired w/[ RN_IPL_030_0_] [RegIn 2 |132| -| | ] @@ -658,27 +657,27 @@ IMX No. | +---- Block IO Pin or Macrocell Number 3 [IOpin 3 | 7| IO IPL_030_1_|*| ] paired w/[ RN_IPL_030_1_] [RegIn 3 |135| -| | ] - [MCell 6 |134|NOD inst_DS_000_ENABLE| |*] + [MCell 6 |134|NOD inst_LDS_000_INT| |*] [MCell 7 |136| -| | ] 4 [IOpin 4 | 6| IO AHIGH_29_|*|*] [RegIn 4 |138| -| | ] - [MCell 8 |137| -| | ] + [MCell 8 |137| IO AHIGH_29_| | ] [MCell 9 |139|NOD RN_IPL_030_1_| |*] paired w/[ IPL_030_1_] 5 [IOpin 5 | 5| IO AHIGH_30_|*|*] [RegIn 5 |141| -| | ] - [MCell 10 |140|NOD SM_AMIGA_4_| |*] + [MCell 10 |140|NOD CLK_000_D_6_| |*] [MCell 11 |142| -| | ] 6 [IOpin 6 | 4| IO AHIGH_31_|*|*] [RegIn 6 |144| -| | ] [MCell 12 |143| IO AHIGH_31_| | ] - [MCell 13 |145| IO AHIGH_29_| | ] + [MCell 13 |145|NOD inst_CLK_OUT_PRE_D| |*] 7 [IOpin 7 | 3|OUT RESET|*| ] [RegIn 7 |147| -| | ] - [MCell 14 |146|NOD IPL_D0_1_| |*] + [MCell 14 |146|NOD CLK_000_D_5_| |*] [MCell 15 |148| -| | ] --------------------------------------------------------------------------- =========================================================================== @@ -687,39 +686,39 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux01| IOPin 4 0 ( 41)| BERR -Mux02| Mcel 1 6 ( 134)| inst_DS_000_ENABLE -Mux03| IOPin 5 4 ( 56)| IPL_1_ +Mux00| IOPin 6 2 ( 67)| IPL_0_ +Mux01| ... | ... +Mux02| Mcel 1 6 ( 134)| inst_LDS_000_INT +Mux03| Mcel 0 8 ( 113)| SM_AMIGA_6_ Mux04| IOPin 6 3 ( 68)| IPL_2_ -Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| Mcel 1 9 ( 139)| RN_IPL_030_1_ +Mux05| Mcel 1 3 ( 130)| IPL_D0_1_ +Mux06| IOPin 7 6 ( 79)| SIZE_1_ Mux07| ... | ... -Mux08| IOPin 6 6 ( 71)| RW -Mux09| Mcel 5 5 ( 229)| SM_AMIGA_5_ -Mux10| Mcel 7 3 ( 274)| CLK_000_D_1_ -Mux11| Mcel 2 13 ( 169)| CLK_000_D_0_ -Mux12| Mcel 1 10 ( 140)| SM_AMIGA_4_ -Mux13| Mcel 1 3 ( 130)| IPL_D0_0_ -Mux14| Mcel 5 4 ( 227)| SM_AMIGA_i_7_ -Mux15| Mcel 0 6 ( 110)| inst_AS_030_D0 -Mux16| IOPin 6 2 ( 67)| IPL_0_ +Mux08| Mcel 6 7 ( 256)| IPL_D0_2_ +Mux09| Mcel 0 1 ( 103)| inst_CLK_OUT_PRE_25 +Mux10| Mcel 1 13 ( 145)| inst_CLK_OUT_PRE_D +Mux11| ... | ... +Mux12| Mcel 6 9 ( 259)| inst_RESET_OUT +Mux13| Mcel 3 3 ( 178)| CLK_000_D_4_ +Mux14| IOPin 6 5 ( 70)| SIZE_0_ +Mux15| Input Pin ( 14)| nEXP_SPACE +Mux16| Mcel 1 9 ( 139)| RN_IPL_030_1_ Mux17| ... | ... -Mux18| Mcel 0 8 ( 113)| inst_RESET_OUT +Mux18| IOPin 6 4 ( 69)| A_0_ Mux19| ... | ... -Mux20| Mcel 1 14 ( 146)| IPL_D0_1_ +Mux20| Mcel 1 14 ( 146)| CLK_000_D_5_ Mux21| Input Pin ( 86)| RST -Mux22| Mcel 6 5 ( 253)| SM_AMIGA_0_ -Mux23| ... | ... +Mux22| ... | ... +Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 Mux24| ... | ... -Mux25| Mcel 0 3 ( 106)| IPL_D0_2_ +Mux25| Mcel 0 13 ( 121)| IPL_D0_0_ Mux26| ... | ... Mux27| Mcel 1 4 ( 131)| RN_IPL_030_2_ Mux28| Mcel 1 5 ( 133)| RN_IPL_030_0_ Mux29| ... | ... -Mux30| Mcel 4 8 ( 209)| inst_CLK_OUT_PRE_D -Mux31| ... | ... -Mux32| Mcel 2 2 ( 152)| SM_AMIGA_6_ +Mux30| ... | ... +Mux31| IOPin 5 4 ( 56)| IPL_1_ +Mux32| ... | ... --------------------------------------------------------------------------- =========================================================================== < Block [ 2] > Macrocell (MCell) Cluster Assignments @@ -732,21 +731,21 @@ Mux32| Mcel 2 2 ( 152)| SM_AMIGA_6_ | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| AHIGH_28_| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig - 1|AMIGA_BUS_ENABLE_LOW|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig - 2| SM_AMIGA_6_|NOD| | S | 3 | 4 to [ 2]| 1 XOR free - 3| | ? | | S | | 4 free | 1 XOR free + 1|AMIGA_BUS_ENABLE_LOW|OUT| | S | 1 | 4 to [ 2]| 1 XOR to [ 1] for 1 PT sig + 2|inst_AS_000_DMA|NOD| | S | 7 | 4 to [ 2]| 1 XOR to [ 2] as logic PT + 3|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | S | 2 | 4 to [ 3]| 1 XOR free 4| | ? | | S | | 4 free | 1 XOR free 5| AHIGH_26_| IO| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig - 6|inst_AS_030_000_SYNC|NOD| | S | 7 | 4 to [ 6]| 1 XOR to [ 6] as logic PT - 7| | ? | | S | | 4 free | 1 XOR free + 6|inst_CLK_030_H|NOD| | S | 8 | 4 to [ 6]| 1 XOR to [ 6] as logic PT + 7| inst_DTACK_D0|NOD| | S | 1 | 4 free | 1 XOR to [ 7] for 1 PT sig 8| AHIGH_24_| IO| | S | 1 | 4 to [ 6]| 1 XOR to [ 8] for 1 PT sig 9| AHIGH_27_| IO| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig -10| | ? | | S | | 4 free | 1 XOR free -11| CLK_000_D_4_|NOD| | S | 1 | 4 free | 1 XOR to [11] for 1 PT sig -12| AHIGH_25_| IO| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig -13| CLK_000_D_0_|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig -14| CLK_000_D_10_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig -15|inst_AS_000_INT|NOD| | S | 2 | 4 to [15]| 1 XOR free +10| CYCLE_DMA_1_|NOD| | S | 4 | 4 to [10]| 1 XOR free +11| | ? | | S | | 4 free | 1 XOR free +12| AHIGH_25_| IO| | S | 1 | 4 to [13]| 1 XOR to [12] for 1 PT sig +13|inst_DS_000_DMA|NOD| | S | 9 | 4 to [13]| 1 XOR to [13] as logic PT +14| CYCLE_DMA_0_|NOD| | S | 3 | 4 to [14]| 1 XOR free +15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== < Block [ 2] > Maximum PT Capacity @@ -758,22 +757,22 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| AHIGH_28_| IO| | S | 1 |=> can support up to [ 9] logic PT(s) - 1|AMIGA_BUS_ENABLE_LOW|OUT| | S | 1 |=> can support up to [ 14] logic PT(s) - 2| SM_AMIGA_6_|NOD| | S | 3 |=> can support up to [ 19] logic PT(s) - 3| | ? | | S | |=> can support up to [ 14] logic PT(s) - 4| | ? | | S | |=> can support up to [ 14] logic PT(s) - 5| AHIGH_26_| IO| | S | 1 |=> can support up to [ 15] logic PT(s) - 6|inst_AS_030_000_SYNC|NOD| | S | 7 |=> can support up to [ 18] logic PT(s) - 7| | ? | | S | |=> can support up to [ 9] logic PT(s) - 8| AHIGH_24_| IO| | S | 1 |=> can support up to [ 15] logic PT(s) - 9| AHIGH_27_| IO| | S | 1 |=> can support up to [ 14] logic PT(s) -10| | ? | | S | |=> can support up to [ 17] logic PT(s) -11| CLK_000_D_4_|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) -12| AHIGH_25_| IO| | S | 1 |=> can support up to [ 17] logic PT(s) -13| CLK_000_D_0_|NOD| | S | 1 |=> can support up to [ 13] logic PT(s) -14| CLK_000_D_10_|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) -15|inst_AS_000_INT|NOD| | S | 2 |=> can support up to [ 9] logic PT(s) + 0| AHIGH_28_| IO| | S | 1 |=> can support up to [ 5] logic PT(s) + 1|AMIGA_BUS_ENABLE_LOW|OUT| | S | 1 |=> can support up to [ 5] logic PT(s) + 2|inst_AS_000_DMA|NOD| | S | 7 |=> can support up to [ 14] logic PT(s) + 3|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | S | 2 |=> can support up to [ 14] logic PT(s) + 4| | ? | | S | |=> can support up to [ 9] logic PT(s) + 5| AHIGH_26_| IO| | S | 1 |=> can support up to [ 14] logic PT(s) + 6|inst_CLK_030_H|NOD| | S | 8 |=> can support up to [ 17] logic PT(s) + 7| inst_DTACK_D0|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) + 8| AHIGH_24_| IO| | S | 1 |=> can support up to [ 9] logic PT(s) + 9| AHIGH_27_| IO| | S | 1 |=> can support up to [ 10] logic PT(s) +10| CYCLE_DMA_1_|NOD| | S | 4 |=> can support up to [ 14] logic PT(s) +11| | ? | | S | |=> can support up to [ 5] logic PT(s) +12| AHIGH_25_| IO| | S | 1 |=> can support up to [ 6] logic PT(s) +13|inst_DS_000_DMA|NOD| | S | 9 |=> can support up to [ 14] logic PT(s) +14| CYCLE_DMA_0_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s) +15| | ? | | S | |=> can support up to [ 5] logic PT(s) --------------------------------------------------------------------------- =========================================================================== < Block [ 2] > Node-Pin Assignments @@ -785,20 +784,20 @@ _|_________________|__|__|___|_____|_______________________________________ _|_________________|__|_____|____________________|________________________ 0| AHIGH_28_| IO| | => | 5 6 7 ( 0)| 20 21 22 ( 15) 1|AMIGA_BUS_ENABLE_LOW|OUT| | => |( 5) 6 7 0 |( 20) 21 22 15 - 2| SM_AMIGA_6_|NOD| | => | 6 7 0 1 | 21 22 15 16 - 3| | | | => | 6 7 0 1 | 21 22 15 16 + 2|inst_AS_000_DMA|NOD| | => | 6 7 0 1 | 21 22 15 16 + 3|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | => | 6 7 0 1 | 21 22 15 16 4| | | | => | 7 0 1 2 | 22 15 16 17 5| AHIGH_26_| IO| | => | 7 0 1 ( 2)| 22 15 16 ( 17) - 6|inst_AS_030_000_SYNC|NOD| | => | 0 1 2 3 | 15 16 17 18 - 7| | | | => | 0 1 2 3 | 15 16 17 18 + 6|inst_CLK_030_H|NOD| | => | 0 1 2 3 | 15 16 17 18 + 7| inst_DTACK_D0|NOD| | => | 0 1 2 3 | 15 16 17 18 8| AHIGH_24_| IO| | => | 1 2 3 ( 4)| 16 17 18 ( 19) 9| AHIGH_27_| IO| | => |( 1) 2 3 4 |( 16) 17 18 19 -10| | | | => | 2 3 4 5 | 17 18 19 20 -11| CLK_000_D_4_|NOD| | => | 2 3 4 5 | 17 18 19 20 +10| CYCLE_DMA_1_|NOD| | => | 2 3 4 5 | 17 18 19 20 +11| | | | => | 2 3 4 5 | 17 18 19 20 12| AHIGH_25_| IO| | => |( 3) 4 5 6 |( 18) 19 20 21 -13| CLK_000_D_0_|NOD| | => | 3 4 5 6 | 18 19 20 21 -14| CLK_000_D_10_|NOD| | => | 4 5 6 7 | 19 20 21 22 -15|inst_AS_000_INT|NOD| | => | 4 5 6 7 | 19 20 21 22 +13|inst_DS_000_DMA|NOD| | => | 3 4 5 6 | 18 19 20 21 +14| CYCLE_DMA_0_|NOD| | => | 4 5 6 7 | 19 20 21 22 +15| | | | => | 4 5 6 7 | 19 20 21 22 --------------------------------------------------------------------------- =========================================================================== < Block [ 2] > IO-to-Node Pin Mapping @@ -852,8 +851,8 @@ IMX No. | +---- Block IO Pin or Macrocell Number 1 [IOpin 1 | 16| IO AHIGH_27_|*|*] [RegIn 1 |153| -| | ] - [MCell 2 |152|NOD SM_AMIGA_6_| |*] - [MCell 3 |154| -| | ] + [MCell 2 |152|NOD inst_AS_000_DMA| |*] + [MCell 3 |154|NOD inst_AMIGA_BUS_ENABLE_DMA_LOW| |*] 2 [IOpin 2 | 17| IO AHIGH_26_|*|*] [RegIn 2 |156| -| | ] @@ -862,8 +861,8 @@ IMX No. | +---- Block IO Pin or Macrocell Number 3 [IOpin 3 | 18| IO AHIGH_25_|*|*] [RegIn 3 |159| -| | ] - [MCell 6 |158|NOD inst_AS_030_000_SYNC| |*] - [MCell 7 |160| -| | ] + [MCell 6 |158|NOD inst_CLK_030_H| |*] + [MCell 7 |160|NOD inst_DTACK_D0| |*] 4 [IOpin 4 | 19| IO AHIGH_24_|*|*] [RegIn 4 |162| -| | ] @@ -872,18 +871,18 @@ IMX No. | +---- Block IO Pin or Macrocell Number 5 [IOpin 5 | 20|OUT AMIGA_BUS_ENABLE_LOW|*| ] [RegIn 5 |165| -| | ] - [MCell 10 |164| -| | ] - [MCell 11 |166|NOD CLK_000_D_4_| |*] + [MCell 10 |164|NOD CYCLE_DMA_1_| |*] + [MCell 11 |166| -| | ] 6 [IOpin 6 | 21|INP BG_030|*|*] [RegIn 6 |168| -| | ] [MCell 12 |167| IO AHIGH_25_| | ] - [MCell 13 |169|NOD CLK_000_D_0_| |*] + [MCell 13 |169|NOD inst_DS_000_DMA| |*] 7 [IOpin 7 | 22| -| | ] [RegIn 7 |171| -| | ] - [MCell 14 |170|NOD CLK_000_D_10_| |*] - [MCell 15 |172|NOD inst_AS_000_INT| |*] + [MCell 14 |170|NOD CYCLE_DMA_0_| |*] + [MCell 15 |172| -| | ] --------------------------------------------------------------------------- =========================================================================== < Block [ 2] > Logic Array Fan-in @@ -892,38 +891,38 @@ IMX No. | +---- Block IO Pin or Macrocell Number | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- Mux00| Input Pin ( 86)| RST -Mux01| IOPin 5 2 ( 58)| FC_1_ -Mux02| Mcel 4 9 ( 211)| CLK_000_D_3_ -Mux03| Mcel 4 2 ( 200)| CLK_000_D_2_ -Mux04| IOPin 0 4 ( 95)| A_DECODE_18_ +Mux01| ... | ... +Mux02| Mcel 2 2 ( 152)| inst_AS_000_DMA +Mux03| IOPin 5 0 ( 60)| A_1_ +Mux04| Input Pin ( 64)| CLK_030 Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| IOPin 5 3 ( 57)| FC_0_ -Mux07| Mcel 7 13 ( 289)| inst_BGACK_030_INT_D -Mux08| Mcel 0 10 ( 116)| CLK_000_D_9_ -Mux09| Mcel 2 6 ( 158)| inst_AS_030_000_SYNC -Mux10| Mcel 7 3 ( 274)| CLK_000_D_1_ -Mux11| IOPin 0 5 ( 96)| A_DECODE_16_ -Mux12| IOPin 0 6 ( 97)| A_DECODE_19_ -Mux13| IOPin 5 1 ( 59)| A_DECODE_17_ -Mux14| Input Pin ( 11)| CLK_000 -Mux15| Mcel 0 6 ( 110)| inst_AS_030_D0 -Mux16| Mcel 2 15 ( 172)| inst_AS_000_INT -Mux17| IOPin 4 0 ( 41)| BERR -Mux18| Mcel 0 8 ( 113)| inst_RESET_OUT +Mux06| IOPin 7 5 ( 80)| RW_000 +Mux07| Mcel 2 14 ( 170)| CYCLE_DMA_0_ +Mux08| IOPin 3 3 ( 32)| UDS_000 +Mux09| Mcel 2 6 ( 158)| inst_CLK_030_H +Mux10| Mcel 6 9 ( 259)| inst_RESET_OUT +Mux11| Mcel 2 13 ( 169)| inst_DS_000_DMA +Mux12| Mcel 2 3 ( 154)| inst_AMIGA_BUS_ENABLE_DMA_LOW +Mux13| Mcel 7 5 ( 277)| CLK_000_D_1_ +Mux14| IOPin 3 5 ( 30)| DTACK +Mux15| ... | ... +Mux16| Mcel 4 8 ( 209)| CLK_000_D_0_ +Mux17| ... | ... +Mux18| Mcel 2 10 ( 164)| CYCLE_DMA_1_ Mux19| ... | ... Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 Mux21| ... | ... -Mux22| Mcel 6 10 ( 260)| inst_AMIGA_BUS_ENABLE_DMA_LOW +Mux22| ... | ... Mux23| ... | ... -Mux24| ... | ... -Mux25| ... | ... -Mux26| ... | ... +Mux24| IOPin 3 4 ( 31)| LDS_000 +Mux25| Mcel 5 0 ( 221)| inst_BGACK_030_INT_D +Mux26| IOPin 4 1 ( 42)| AS_000 Mux27| ... | ... Mux28| ... | ... -Mux29| Mcel 5 4 ( 227)| SM_AMIGA_i_7_ -Mux30| Mcel 2 13 ( 169)| CLK_000_D_0_ +Mux29| ... | ... +Mux30| ... | ... Mux31| ... | ... -Mux32| Mcel 2 2 ( 152)| SM_AMIGA_6_ +Mux32| ... | ... --------------------------------------------------------------------------- =========================================================================== < Block [ 3] > Macrocell (MCell) Cluster Assignments @@ -937,19 +936,19 @@ Mux32| Mcel 2 2 ( 152)| SM_AMIGA_6_ _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| VMA| IO| | S | 3 | 4 to [ 0]| 1 XOR free 1| BG_000| IO| | S | 2 | 4 to [ 1]| 1 XOR free - 2| cpu_est_0_|NOD| | S | 3 | 4 to [ 2]| 1 XOR free - 3| | ? | | S | | 4 free | 1 XOR free + 2| cpu_est_3_|NOD| | S | 4 | 4 to [ 2]| 1 XOR free + 3| CLK_000_D_4_|NOD| | S | 1 | 4 free | 1 XOR to [ 3] for 1 PT sig 4|AMIGA_BUS_ENABLE_HIGH|OUT| | S | 2 | 4 to [ 4]| 1 XOR free 5|AMIGA_ADDR_ENABLE|OUT| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig - 6|inst_LDS_000_INT|NOD| | S | 3 | 4 to [ 6]| 1 XOR free + 6| cpu_est_2_|NOD| | S | 1 :+: 1| 4 to [ 6]| 1 XOR to [ 6] 7| | ? | | S | | 4 free | 1 XOR free 8| UDS_000| IO| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig - 9| cpu_est_3_|NOD| | S | 4 | 4 to [ 9]| 1 XOR free -10|inst_UDS_000_INT|NOD| | S | 2 | 4 to [10]| 1 XOR free + 9|inst_AS_030_D0|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig +10| cpu_est_0_|NOD| | S | 3 | 4 to [10]| 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free 12| LDS_000| IO| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig -13| cpu_est_2_|NOD| | S | 1 :+: 1| 4 to [13]| 1 XOR to [13] -14| CLK_000_D_6_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig +13| cpu_est_1_|NOD| | S | 4 | 4 to [13]| 1 XOR free +14|inst_UDS_000_INT|NOD| | S | 2 | 4 to [14]| 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== @@ -963,21 +962,21 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ 0| VMA| IO| | S | 3 |=> can support up to [ 5] logic PT(s) - 1| BG_000| IO| | S | 2 |=> can support up to [ 10] logic PT(s) - 2| cpu_est_0_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s) - 3| | ? | | S | |=> can support up to [ 9] logic PT(s) - 4|AMIGA_BUS_ENABLE_HIGH|OUT| | S | 2 |=> can support up to [ 14] logic PT(s) + 1| BG_000| IO| | S | 2 |=> can support up to [ 9] logic PT(s) + 2| cpu_est_3_|NOD| | S | 4 |=> can support up to [ 9] logic PT(s) + 3| CLK_000_D_4_|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) + 4|AMIGA_BUS_ENABLE_HIGH|OUT| | S | 2 |=> can support up to [ 13] logic PT(s) 5|AMIGA_ADDR_ENABLE|OUT| | S | 1 |=> can support up to [ 10] logic PT(s) - 6|inst_LDS_000_INT|NOD| | S | 3 |=> can support up to [ 18] logic PT(s) - 7| | ? | | S | |=> can support up to [ 9] logic PT(s) - 8| UDS_000| IO| | S | 1 |=> can support up to [ 10] logic PT(s) - 9| cpu_est_3_|NOD| | S | 4 |=> can support up to [ 14] logic PT(s) -10|inst_UDS_000_INT|NOD| | S | 2 |=> can support up to [ 14] logic PT(s) + 6| cpu_est_2_|NOD| | S | 1 :+: 1|=> can support up to [ 17] logic PT(s) + 7| | ? | | S | |=> can support up to [ 13] logic PT(s) + 8| UDS_000| IO| | S | 1 |=> can support up to [ 14] logic PT(s) + 9|inst_AS_030_D0|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) +10| cpu_est_0_|NOD| | S | 3 |=> can support up to [ 18] logic PT(s) 11| | ? | | S | |=> can support up to [ 9] logic PT(s) -12| LDS_000| IO| | S | 1 |=> can support up to [ 14] logic PT(s) -13| cpu_est_2_|NOD| | S | 1 :+: 1|=> can support up to [ 17] logic PT(s) -14| CLK_000_D_6_|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) -15| | ? | | S | |=> can support up to [ 9] logic PT(s) +12| LDS_000| IO| | S | 1 |=> can support up to [ 10] logic PT(s) +13| cpu_est_1_|NOD| | S | 4 |=> can support up to [ 14] logic PT(s) +14|inst_UDS_000_INT|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) +15| | ? | | S | |=> can support up to [ 5] logic PT(s) --------------------------------------------------------------------------- =========================================================================== < Block [ 3] > Node-Pin Assignments @@ -989,19 +988,19 @@ _|_________________|__|__|___|_____|_______________________________________ _|_________________|__|_____|____________________|________________________ 0| VMA| IO| | => | 5 6 7 ( 0)| 30 29 28 ( 35) 1| BG_000| IO| | => | 5 ( 6) 7 0 | 30 ( 29) 28 35 - 2| cpu_est_0_|NOD| | => | 6 7 0 1 | 29 28 35 34 - 3| | | | => | 6 7 0 1 | 29 28 35 34 + 2| cpu_est_3_|NOD| | => | 6 7 0 1 | 29 28 35 34 + 3| CLK_000_D_4_|NOD| | => | 6 7 0 1 | 29 28 35 34 4|AMIGA_BUS_ENABLE_HIGH|OUT| | => | 7 0 ( 1) 2 | 28 35 ( 34) 33 5|AMIGA_ADDR_ENABLE|OUT| | => | 7 0 1 ( 2)| 28 35 34 ( 33) - 6|inst_LDS_000_INT|NOD| | => | 0 1 2 3 | 35 34 33 32 + 6| cpu_est_2_|NOD| | => | 0 1 2 3 | 35 34 33 32 7| | | | => | 0 1 2 3 | 35 34 33 32 8| UDS_000| IO| | => | 1 2 ( 3) 4 | 34 33 ( 32) 31 - 9| cpu_est_3_|NOD| | => | 1 2 3 4 | 34 33 32 31 -10|inst_UDS_000_INT|NOD| | => | 2 3 4 5 | 33 32 31 30 + 9|inst_AS_030_D0|NOD| | => | 1 2 3 4 | 34 33 32 31 +10| cpu_est_0_|NOD| | => | 2 3 4 5 | 33 32 31 30 11| | | | => | 2 3 4 5 | 33 32 31 30 12| LDS_000| IO| | => | 3 ( 4) 5 6 | 32 ( 31) 30 29 -13| cpu_est_2_|NOD| | => | 3 4 5 6 | 32 31 30 29 -14| CLK_000_D_6_|NOD| | => | 4 5 6 7 | 31 30 29 28 +13| cpu_est_1_|NOD| | => | 3 4 5 6 | 32 31 30 29 +14|inst_UDS_000_INT|NOD| | => | 4 5 6 7 | 31 30 29 28 15| | | | => | 4 5 6 7 | 31 30 29 28 --------------------------------------------------------------------------- =========================================================================== @@ -1058,8 +1057,8 @@ IMX No. | +---- Block IO Pin or Macrocell Number 1 [IOpin 1 | 34|OUT AMIGA_BUS_ENABLE_HIGH|*| ] [RegIn 1 |177| -| | ] - [MCell 2 |176|NOD cpu_est_0_| |*] - [MCell 3 |178| -| | ] + [MCell 2 |176|NOD cpu_est_3_| |*] + [MCell 3 |178|NOD CLK_000_D_4_| |*] 2 [IOpin 2 | 33|OUT AMIGA_ADDR_ENABLE|*| ] [RegIn 2 |180| -| | ] @@ -1068,27 +1067,27 @@ IMX No. | +---- Block IO Pin or Macrocell Number 3 [IOpin 3 | 32| IO UDS_000|*|*] [RegIn 3 |183| -| | ] - [MCell 6 |182|NOD inst_LDS_000_INT| |*] + [MCell 6 |182|NOD cpu_est_2_| |*] [MCell 7 |184| -| | ] 4 [IOpin 4 | 31| IO LDS_000|*|*] [RegIn 4 |186| -| | ] [MCell 8 |185| IO UDS_000| | ] - [MCell 9 |187|NOD cpu_est_3_| |*] + [MCell 9 |187|NOD inst_AS_030_D0| |*] 5 [IOpin 5 | 30|INP DTACK|*|*] [RegIn 5 |189| -| | ] - [MCell 10 |188|NOD inst_UDS_000_INT| |*] + [MCell 10 |188|NOD cpu_est_0_| |*] [MCell 11 |190| -| | ] 6 [IOpin 6 | 29| IO BG_000|*| ] paired w/[ RN_BG_000] [RegIn 6 |192| -| | ] [MCell 12 |191| IO LDS_000| | ] - [MCell 13 |193|NOD cpu_est_2_| |*] + [MCell 13 |193|NOD cpu_est_1_| |*] 7 [IOpin 7 | 28|INP BGACK_000|*|*] [RegIn 7 |195| -| | ] - [MCell 14 |194|NOD CLK_000_D_6_| |*] + [MCell 14 |194|NOD inst_UDS_000_INT| |*] [MCell 15 |196| -| | ] --------------------------------------------------------------------------- =========================================================================== @@ -1099,37 +1098,37 @@ IMX No. | +---- Block IO Pin or Macrocell Number --|--|--------------------|--------------------------------------------------- Mux00| IOPin 6 4 ( 69)| A_0_ Mux01| Mcel 3 0 ( 173)| RN_VMA -Mux02| Mcel 3 10 ( 188)| inst_UDS_000_INT -Mux03| Mcel 3 2 ( 176)| cpu_est_0_ +Mux02| Mcel 3 10 ( 188)| cpu_est_0_ +Mux03| Mcel 4 2 ( 200)| CLK_000_D_3_ Mux04| IOPin 2 6 ( 21)| BG_030 Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| IOPin 7 6 ( 79)| SIZE_1_ -Mux07| Mcel 3 9 ( 187)| cpu_est_3_ -Mux08| ... | ... -Mux09| Mcel 2 6 ( 158)| inst_AS_030_000_SYNC -Mux10| Mcel 7 3 ( 274)| CLK_000_D_1_ -Mux11| Mcel 1 6 ( 134)| inst_DS_000_ENABLE -Mux12| ... | ... -Mux13| ... | ... -Mux14| Mcel 4 5 ( 205)| CLK_000_D_5_ -Mux15| Mcel 0 6 ( 110)| inst_AS_030_D0 -Mux16| Mcel 3 6 ( 182)| inst_LDS_000_INT -Mux17| IOPin 6 5 ( 70)| SIZE_0_ -Mux18| Mcel 0 8 ( 113)| inst_RESET_OUT -Mux19| ... | ... +Mux06| ... | ... +Mux07| Mcel 3 9 ( 187)| inst_AS_030_D0 +Mux08| Mcel 4 8 ( 209)| CLK_000_D_0_ +Mux09| Mcel 0 12 ( 119)| inst_AS_030_000_SYNC +Mux10| Mcel 3 14 ( 194)| inst_UDS_000_INT +Mux11| Mcel 1 6 ( 134)| inst_LDS_000_INT +Mux12| Mcel 6 9 ( 259)| inst_RESET_OUT +Mux13| Mcel 7 5 ( 277)| CLK_000_D_1_ +Mux14| ... | ... +Mux15| Mcel 5 1 ( 223)| inst_DS_000_ENABLE +Mux16| Mcel 3 6 ( 182)| cpu_est_2_ +Mux17| Mcel 3 1 ( 175)| RN_BG_000 +Mux18| Mcel 0 8 ( 113)| SM_AMIGA_6_ +Mux19| Mcel 0 9 ( 115)| inst_VPA_D Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux21| Mcel 3 13 ( 193)| cpu_est_2_ -Mux22| Mcel 2 2 ( 152)| SM_AMIGA_6_ +Mux21| Mcel 3 13 ( 193)| cpu_est_1_ +Mux22| ... | ... Mux23| Mcel 6 6 ( 254)| inst_AMIGA_BUS_ENABLE_DMA_HIGH Mux24| Input Pin ( 86)| RST Mux25| ... | ... Mux26| ... | ... -Mux27| Mcel 3 1 ( 175)| RN_BG_000 -Mux28| Mcel 5 2 ( 224)| inst_VPA_D +Mux27| ... | ... +Mux28| Mcel 3 2 ( 176)| cpu_est_3_ Mux29| ... | ... -Mux30| Mcel 2 13 ( 169)| CLK_000_D_0_ +Mux30| ... | ... Mux31| ... | ... -Mux32| Mcel 5 8 ( 233)| cpu_est_1_ +Mux32| IOPin 7 3 ( 82)| AS_030 --------------------------------------------------------------------------- =========================================================================== < Block [ 4] > Macrocell (MCell) Cluster Assignments @@ -1143,18 +1142,18 @@ Mux32| Mcel 5 8 ( 233)| cpu_est_1_ _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| BERR| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig 1|AMIGA_BUS_DATA_DIR|OUT| | S | 2 | 4 to [ 1]| 1 XOR free - 2| CLK_000_D_2_|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig + 2| CLK_000_D_3_|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig 3| | ? | | S | | 4 free | 1 XOR free 4| AS_000| IO| | S | 1 | 4 free | 1 XOR to [ 4] for 1 PT sig - 5| CLK_000_D_5_|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig - 6|inst_CLK_OUT_PRE_50|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig + 5| | ? | | S | | 4 free | 1 XOR free + 6| CLK_000_D_8_|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig 7| | ? | | S | | 4 free | 1 XOR free - 8|inst_CLK_OUT_PRE_D|NOD| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig - 9| CLK_000_D_3_|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig -10| CIIN_0|NOD| | S | 2 | 4 to [10]| 1 XOR free + 8| CLK_000_D_0_|NOD| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig + 9| CIIN_0|NOD| | S | 2 | 4 to [ 9]| 1 XOR free +10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free 12| CIIN|OUT| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig -13| | ? | | S | | 4 free | 1 XOR free +13| CLK_000_D_7_|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig 14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- @@ -1170,19 +1169,19 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ _|_________________|__|__|___|_____|_______________________________________ 0| BERR| IO| | S | 1 |=> can support up to [ 9] logic PT(s) 1|AMIGA_BUS_DATA_DIR|OUT| | S | 2 |=> can support up to [ 18] logic PT(s) - 2| CLK_000_D_2_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) - 3| | ? | | S | |=> can support up to [ 17] logic PT(s) - 4| AS_000| IO| | S | 1 |=> can support up to [ 18] logic PT(s) - 5| CLK_000_D_5_|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) - 6|inst_CLK_OUT_PRE_50|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) - 7| | ? | | S | |=> can support up to [ 17] logic PT(s) - 8|inst_CLK_OUT_PRE_D|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) - 9| CLK_000_D_3_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) -10| CIIN_0|NOD| | S | 2 |=> can support up to [ 18] logic PT(s) -11| | ? | | S | |=> can support up to [ 14] logic PT(s) -12| CIIN|OUT| | S | 1 |=> can support up to [ 20] logic PT(s) -13| | ? | | S | |=> can support up to [ 19] logic PT(s) -14| | ? | | S | |=> can support up to [ 15] logic PT(s) + 2| CLK_000_D_3_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) + 3| | ? | | S | |=> can support up to [ 18] logic PT(s) + 4| AS_000| IO| | S | 1 |=> can support up to [ 19] logic PT(s) + 5| | ? | | S | |=> can support up to [ 18] logic PT(s) + 6| CLK_000_D_8_|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) + 7| | ? | | S | |=> can support up to [ 13] logic PT(s) + 8| CLK_000_D_0_|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) + 9| CIIN_0|NOD| | S | 2 |=> can support up to [ 19] logic PT(s) +10| | ? | | S | |=> can support up to [ 14] logic PT(s) +11| | ? | | S | |=> can support up to [ 18] logic PT(s) +12| CIIN|OUT| | S | 1 |=> can support up to [ 19] logic PT(s) +13| CLK_000_D_7_|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) +14| | ? | | S | |=> can support up to [ 14] logic PT(s) 15| | ? | | S | |=> can support up to [ 10] logic PT(s) --------------------------------------------------------------------------- =========================================================================== @@ -1195,18 +1194,18 @@ _|_________________|__|__|___|_____|_______________________________________ _|_________________|__|_____|____________________|________________________ 0| BERR| IO| | => | 5 6 7 ( 0)| 46 47 48 ( 41) 1|AMIGA_BUS_DATA_DIR|OUT| | => | 5 6 ( 7) 0 | 46 47 ( 48) 41 - 2| CLK_000_D_2_|NOD| | => | 6 7 0 1 | 47 48 41 42 + 2| CLK_000_D_3_|NOD| | => | 6 7 0 1 | 47 48 41 42 3| | | | => | 6 7 0 1 | 47 48 41 42 4| AS_000| IO| | => | 7 0 ( 1) 2 | 48 41 ( 42) 43 - 5| CLK_000_D_5_|NOD| | => | 7 0 1 2 | 48 41 42 43 - 6|inst_CLK_OUT_PRE_50|NOD| | => | 0 1 2 3 | 41 42 43 44 + 5| | | | => | 7 0 1 2 | 48 41 42 43 + 6| CLK_000_D_8_|NOD| | => | 0 1 2 3 | 41 42 43 44 7| | | | => | 0 1 2 3 | 41 42 43 44 - 8|inst_CLK_OUT_PRE_D|NOD| | => | 1 2 3 4 | 42 43 44 45 - 9| CLK_000_D_3_|NOD| | => | 1 2 3 4 | 42 43 44 45 -10| CIIN_0|NOD| | => | 2 3 4 5 | 43 44 45 46 + 8| CLK_000_D_0_|NOD| | => | 1 2 3 4 | 42 43 44 45 + 9| CIIN_0|NOD| | => | 1 2 3 4 | 42 43 44 45 +10| | | | => | 2 3 4 5 | 43 44 45 46 11| | | | => | 2 3 4 5 | 43 44 45 46 12| CIIN|OUT| | => | 3 4 5 ( 6)| 44 45 46 ( 47) -13| | | | => | 3 4 5 6 | 44 45 46 47 +13| CLK_000_D_7_|NOD| | => | 3 4 5 6 | 44 45 46 47 14| | | | => | 4 5 6 7 | 45 46 47 48 15| | | | => | 4 5 6 7 | 45 46 47 48 --------------------------------------------------------------------------- @@ -1262,33 +1261,33 @@ IMX No. | +---- Block IO Pin or Macrocell Number 1 [IOpin 1 | 42| IO AS_000|*|*] [RegIn 1 |201| -| | ] - [MCell 2 |200|NOD CLK_000_D_2_| |*] + [MCell 2 |200|NOD CLK_000_D_3_| |*] [MCell 3 |202| -| | ] 2 [IOpin 2 | 43| -| | ] [RegIn 2 |204| -| | ] [MCell 4 |203| IO AS_000| | ] - [MCell 5 |205|NOD CLK_000_D_5_| |*] + [MCell 5 |205| -| | ] 3 [IOpin 3 | 44| -| | ] [RegIn 3 |207| -| | ] - [MCell 6 |206|NOD inst_CLK_OUT_PRE_50| |*] + [MCell 6 |206|NOD CLK_000_D_8_| |*] [MCell 7 |208| -| | ] 4 [IOpin 4 | 45| -| | ] [RegIn 4 |210| -| | ] - [MCell 8 |209|NOD inst_CLK_OUT_PRE_D| |*] - [MCell 9 |211|NOD CLK_000_D_3_| |*] + [MCell 8 |209|NOD CLK_000_D_0_| |*] + [MCell 9 |211|NOD CIIN_0| |*] 5 [IOpin 5 | 46| -| | ] [RegIn 5 |213| -| | ] - [MCell 10 |212|NOD CIIN_0| |*] + [MCell 10 |212| -| | ] [MCell 11 |214| -| | ] 6 [IOpin 6 | 47|OUT CIIN|*| ] [RegIn 6 |216| -| | ] [MCell 12 |215|OUT CIIN| | ] - [MCell 13 |217| -| | ] + [MCell 13 |217|NOD CLK_000_D_7_| |*] 7 [IOpin 7 | 48|OUT AMIGA_BUS_DATA_DIR|*| ] [RegIn 7 |219| -| | ] @@ -1301,39 +1300,39 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| Mcel 4 6 ( 206)| inst_CLK_OUT_PRE_50 -Mux01| IOPin 5 2 ( 58)| FC_1_ -Mux02| IOPin 4 1 ( 42)| AS_000 +Mux00| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux01| IOPin 1 6 ( 4)| AHIGH_31_ +Mux02| Mcel 4 9 ( 211)| CIIN_0 Mux03| IOPin 2 1 ( 16)| AHIGH_27_ -Mux04| IOPin 0 0 ( 91)| FPU_SENSE +Mux04| IOPin 3 7 ( 28)| BGACK_000 Mux05| IOPin 0 3 ( 94)| A_DECODE_21_ Mux06| IOPin 5 3 ( 57)| FC_0_ Mux07| IOPin 2 0 ( 15)| AHIGH_28_ Mux08| IOPin 5 1 ( 59)| A_DECODE_17_ Mux09| IOPin 7 3 ( 82)| AS_030 -Mux10| Mcel 7 3 ( 274)| CLK_000_D_1_ -Mux11| IOPin 0 5 ( 96)| A_DECODE_16_ -Mux12| IOPin 0 6 ( 97)| A_DECODE_19_ +Mux10| Mcel 6 9 ( 259)| inst_RESET_OUT +Mux11| IOPin 7 1 ( 84)| A_DECODE_22_ +Mux12| IOPin 5 2 ( 58)| FC_1_ Mux13| IOPin 1 4 ( 6)| AHIGH_29_ -Mux14| IOPin 2 4 ( 19)| AHIGH_24_ -Mux15| Mcel 0 6 ( 110)| inst_AS_030_D0 -Mux16| Mcel 2 15 ( 172)| inst_AS_000_INT -Mux17| IOPin 0 2 ( 93)| A_DECODE_20_ -Mux18| IOPin 7 0 ( 85)| A_DECODE_23_ +Mux14| Input Pin ( 11)| CLK_000 +Mux15| IOPin 0 0 ( 91)| FPU_SENSE +Mux16| IOPin 4 1 ( 42)| AS_000 +Mux17| IOPin 2 2 ( 17)| AHIGH_26_ +Mux18| Mcel 0 5 ( 109)| inst_AS_000_INT Mux19| IOPin 1 5 ( 5)| AHIGH_30_ -Mux20| IOPin 7 1 ( 84)| A_DECODE_22_ +Mux20| IOPin 2 4 ( 19)| AHIGH_24_ Mux21| Input Pin ( 14)| nEXP_SPACE Mux22| IOPin 2 3 ( 18)| AHIGH_25_ -Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux24| Mcel 4 10 ( 212)| CIIN_0 -Mux25| IOPin 1 6 ( 4)| AHIGH_31_ -Mux26| IOPin 2 2 ( 17)| AHIGH_26_ -Mux27| Mcel 4 2 ( 200)| CLK_000_D_2_ +Mux23| Mcel 4 13 ( 217)| CLK_000_D_7_ +Mux24| Mcel 1 10 ( 140)| CLK_000_D_6_ +Mux25| Mcel 3 9 ( 187)| inst_AS_030_D0 +Mux26| IOPin 0 5 ( 96)| A_DECODE_16_ +Mux27| IOPin 0 6 ( 97)| A_DECODE_19_ Mux28| IOPin 7 5 ( 80)| RW_000 -Mux29| Mcel 2 11 ( 166)| CLK_000_D_4_ -Mux30| Mcel 0 8 ( 113)| inst_RESET_OUT +Mux29| IOPin 0 2 ( 93)| A_DECODE_20_ +Mux30| Mcel 7 6 ( 278)| CLK_000_D_2_ Mux31| IOPin 0 4 ( 95)| A_DECODE_18_ -Mux32| IOPin 3 7 ( 28)| BGACK_000 +Mux32| IOPin 7 0 ( 85)| A_DECODE_23_ --------------------------------------------------------------------------- =========================================================================== < Block [ 5] > Macrocell (MCell) Cluster Assignments @@ -1345,20 +1344,20 @@ Mux32| IOPin 3 7 ( 28)| BGACK_000 | Sig Type-+ | | | | | | | XOR to Mcell Assignment | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| RST_DLY_0_|NOD| | S | 4 | 4 to [ 0]| 1 XOR free - 1| SM_AMIGA_1_|NOD| | S | 3 | 4 to [ 1]| 1 XOR free - 2| inst_VPA_D|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig - 3| | ? | | S | | 4 to [ 4]| 1 XOR free + 0|inst_BGACK_030_INT_D|NOD| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig + 1|inst_DS_000_ENABLE|NOD| | S | 3 | 4 to [ 1]| 1 XOR free + 2| SM_AMIGA_4_|NOD| | S | 3 | 4 to [ 2]| 1 XOR free + 3| | ? | | S | | 4 free | 1 XOR free 4| SM_AMIGA_i_7_|NOD| | S |13 :+: 1| 4 to [ 4]| 1 XOR to [ 4] - 5| SM_AMIGA_5_|NOD| | S | 3 | 4 to [ 4]| 1 XOR to [ 4] as logic PT - 6| SM_AMIGA_2_|NOD| | S | 4 | 4 to [ 6]| 1 XOR free + 5| SM_AMIGA_2_|NOD| | S | 4 | 4 to [ 4]| 1 XOR to [ 4] as logic PT + 6| CLK_000_D_10_|NOD| | S | 1 | 4 to [ 4]| 1 XOR to [ 6] for 1 PT sig 7| | ? | | S | | 4 to [ 5]| 1 XOR free - 8| cpu_est_1_|NOD| | S | 4 | 4 to [ 8]| 1 XOR free - 9| RST_DLY_2_|NOD| | S | 2 | 4 to [ 9]| 1 XOR free -10| SM_AMIGA_3_|NOD| | S | 4 :+: 1| 4 to [10]| 1 XOR to [10] + 8| SM_AMIGA_1_|NOD| | S | 3 | 4 to [ 8]| 1 XOR free + 9| SM_AMIGA_3_|NOD| | S | 4 :+: 1| 4 to [ 9]| 1 XOR to [ 9] +10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free -12| | ? | | S | | 4 free | 1 XOR free -13| RST_DLY_1_|NOD| | S | 2 :+: 1| 4 to [13]| 1 XOR to [13] +12| SM_AMIGA_0_|NOD| | S | 3 | 4 to [12]| 1 XOR free +13| SM_AMIGA_5_|NOD| | S | 3 | 4 to [13]| 1 XOR free 14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- @@ -1372,20 +1371,20 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| RST_DLY_0_|NOD| | S | 4 |=> can support up to [ 9] logic PT(s) - 1| SM_AMIGA_1_|NOD| | S | 3 |=> can support up to [ 9] logic PT(s) - 2| inst_VPA_D|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) + 0|inst_BGACK_030_INT_D|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) + 1|inst_DS_000_ENABLE|NOD| | S | 3 |=> can support up to [ 14] logic PT(s) + 2| SM_AMIGA_4_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s) 3| | ? | | S | |=> can support up to [ 5] logic PT(s) - 4| SM_AMIGA_i_7_|NOD| | S |13 :+: 1|=> can support up to [ 14] logic PT(s) - 5| SM_AMIGA_5_|NOD| | S | 3 |=> can support up to [ 5] logic PT(s) - 6| SM_AMIGA_2_|NOD| | S | 4 |=> can support up to [ 5] logic PT(s) + 4| SM_AMIGA_i_7_|NOD| | S |13 :+: 1|=> can support up to [ 18] logic PT(s) + 5| SM_AMIGA_2_|NOD| | S | 4 |=> can support up to [ 5] logic PT(s) + 6| CLK_000_D_10_|NOD| | S | 1 |=> can support up to [ 1] logic PT(s) 7| | ? | | S | |=> can support up to [ 1] logic PT(s) - 8| cpu_est_1_|NOD| | S | 4 |=> can support up to [ 5] logic PT(s) - 9| RST_DLY_2_|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) -10| SM_AMIGA_3_|NOD| | S | 4 :+: 1|=> can support up to [ 14] logic PT(s) + 8| SM_AMIGA_1_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s) + 9| SM_AMIGA_3_|NOD| | S | 4 :+: 1|=> can support up to [ 14] logic PT(s) +10| | ? | | S | |=> can support up to [ 10] logic PT(s) 11| | ? | | S | |=> can support up to [ 10] logic PT(s) -12| | ? | | S | |=> can support up to [ 15] logic PT(s) -13| RST_DLY_1_|NOD| | S | 2 :+: 1|=> can support up to [ 19] logic PT(s) +12| SM_AMIGA_0_|NOD| | S | 3 |=> can support up to [ 15] logic PT(s) +13| SM_AMIGA_5_|NOD| | S | 3 |=> can support up to [ 15] logic PT(s) 14| | ? | | S | |=> can support up to [ 10] logic PT(s) 15| | ? | | S | |=> can support up to [ 10] logic PT(s) --------------------------------------------------------------------------- @@ -1397,20 +1396,20 @@ _|_________________|__|__|___|_____|_______________________________________ | Sig Type---+ | to | Block [ 5] IO Pin | Device Pin | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ - 0| RST_DLY_0_|NOD| | => | 5 6 7 0 | 55 54 53 60 - 1| SM_AMIGA_1_|NOD| | => | 5 6 7 0 | 55 54 53 60 - 2| inst_VPA_D|NOD| | => | 6 7 0 1 | 54 53 60 59 + 0|inst_BGACK_030_INT_D|NOD| | => | 5 6 7 0 | 55 54 53 60 + 1|inst_DS_000_ENABLE|NOD| | => | 5 6 7 0 | 55 54 53 60 + 2| SM_AMIGA_4_|NOD| | => | 6 7 0 1 | 54 53 60 59 3| | | | => | 6 7 0 1 | 54 53 60 59 4| SM_AMIGA_i_7_|NOD| | => | 7 0 1 2 | 53 60 59 58 - 5| SM_AMIGA_5_|NOD| | => | 7 0 1 2 | 53 60 59 58 - 6| SM_AMIGA_2_|NOD| | => | 0 1 2 3 | 60 59 58 57 + 5| SM_AMIGA_2_|NOD| | => | 7 0 1 2 | 53 60 59 58 + 6| CLK_000_D_10_|NOD| | => | 0 1 2 3 | 60 59 58 57 7| | | | => | 0 1 2 3 | 60 59 58 57 - 8| cpu_est_1_|NOD| | => | 1 2 3 4 | 59 58 57 56 - 9| RST_DLY_2_|NOD| | => | 1 2 3 4 | 59 58 57 56 -10| SM_AMIGA_3_|NOD| | => | 2 3 4 5 | 58 57 56 55 + 8| SM_AMIGA_1_|NOD| | => | 1 2 3 4 | 59 58 57 56 + 9| SM_AMIGA_3_|NOD| | => | 1 2 3 4 | 59 58 57 56 +10| | | | => | 2 3 4 5 | 58 57 56 55 11| | | | => | 2 3 4 5 | 58 57 56 55 -12| | | | => | 3 4 5 6 | 57 56 55 54 -13| RST_DLY_1_|NOD| | => | 3 4 5 6 | 57 56 55 54 +12| SM_AMIGA_0_|NOD| | => | 3 4 5 6 | 57 56 55 54 +13| SM_AMIGA_5_|NOD| | => | 3 4 5 6 | 57 56 55 54 14| | | | => | 4 5 6 7 | 56 55 54 53 15| | | | => | 4 5 6 7 | 56 55 54 53 --------------------------------------------------------------------------- @@ -1461,38 +1460,38 @@ IMX No. | +---- Block IO Pin or Macrocell Number ---|-------|----|---|---|----------|------|-|------------------------------ 0 [IOpin 0 | 60|INP A_1_|*|*] [RegIn 0 |222| -| | ] - [MCell 0 |221|NOD RST_DLY_0_| |*] - [MCell 1 |223|NOD SM_AMIGA_1_| |*] + [MCell 0 |221|NOD inst_BGACK_030_INT_D| |*] + [MCell 1 |223|NOD inst_DS_000_ENABLE| |*] 1 [IOpin 1 | 59|INP A_DECODE_17_|*|*] [RegIn 1 |225| -| | ] - [MCell 2 |224|NOD inst_VPA_D| |*] + [MCell 2 |224|NOD SM_AMIGA_4_| |*] [MCell 3 |226| -| | ] 2 [IOpin 2 | 58|INP FC_1_|*|*] [RegIn 2 |228| -| | ] [MCell 4 |227|NOD SM_AMIGA_i_7_| |*] - [MCell 5 |229|NOD SM_AMIGA_5_| |*] + [MCell 5 |229|NOD SM_AMIGA_2_| |*] 3 [IOpin 3 | 57|INP FC_0_|*|*] [RegIn 3 |231| -| | ] - [MCell 6 |230|NOD SM_AMIGA_2_| |*] + [MCell 6 |230|NOD CLK_000_D_10_| |*] [MCell 7 |232| -| | ] 4 [IOpin 4 | 56|INP IPL_1_|*|*] [RegIn 4 |234| -| | ] - [MCell 8 |233|NOD cpu_est_1_| |*] - [MCell 9 |235|NOD RST_DLY_2_| |*] + [MCell 8 |233|NOD SM_AMIGA_1_| |*] + [MCell 9 |235|NOD SM_AMIGA_3_| |*] 5 [IOpin 5 | 55| -| | ] [RegIn 5 |237| -| | ] - [MCell 10 |236|NOD SM_AMIGA_3_| |*] + [MCell 10 |236| -| | ] [MCell 11 |238| -| | ] 6 [IOpin 6 | 54| -| | ] [RegIn 6 |240| -| | ] - [MCell 12 |239| -| | ] - [MCell 13 |241|NOD RST_DLY_1_| |*] + [MCell 12 |239|NOD SM_AMIGA_0_| |*] + [MCell 13 |241|NOD SM_AMIGA_5_| |*] 7 [IOpin 7 | 53| -| | ] [RegIn 7 |243| -| | ] @@ -1506,38 +1505,38 @@ IMX No. | +---- Block IO Pin or Macrocell Number | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- Mux00| Input Pin ( 86)| RST -Mux01| Mcel 5 6 ( 230)| SM_AMIGA_2_ -Mux02| Mcel 5 10 ( 236)| SM_AMIGA_3_ -Mux03| Mcel 3 2 ( 176)| cpu_est_0_ -Mux04| ... | ... +Mux01| Mcel 5 9 ( 235)| SM_AMIGA_3_ +Mux02| Mcel 0 9 ( 115)| inst_VPA_D +Mux03| Mcel 3 2 ( 176)| cpu_est_3_ +Mux04| Mcel 3 6 ( 182)| cpu_est_2_ Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| Mcel 5 13 ( 241)| RST_DLY_1_ -Mux07| Mcel 3 9 ( 187)| cpu_est_3_ -Mux08| Mcel 6 7 ( 256)| inst_DTACK_D0 -Mux09| Mcel 5 2 ( 224)| inst_VPA_D -Mux10| Mcel 7 3 ( 274)| CLK_000_D_1_ -Mux11| Mcel 2 13 ( 169)| CLK_000_D_0_ -Mux12| Mcel 1 10 ( 140)| SM_AMIGA_4_ -Mux13| Input Pin ( 36)| VPA -Mux14| Mcel 5 5 ( 229)| SM_AMIGA_5_ -Mux15| Mcel 4 2 ( 200)| CLK_000_D_2_ +Mux06| Mcel 2 7 ( 160)| inst_DTACK_D0 +Mux07| Mcel 7 13 ( 289)| CLK_000_D_9_ +Mux08| Mcel 4 8 ( 209)| CLK_000_D_0_ +Mux09| Mcel 5 2 ( 224)| SM_AMIGA_4_ +Mux10| Mcel 5 1 ( 223)| inst_DS_000_ENABLE +Mux11| IOPin 6 6 ( 71)| RW +Mux12| Mcel 3 9 ( 187)| inst_AS_030_D0 +Mux13| Mcel 7 5 ( 277)| CLK_000_D_1_ +Mux14| Mcel 5 5 ( 229)| SM_AMIGA_2_ +Mux15| Mcel 5 13 ( 241)| SM_AMIGA_5_ Mux16| ... | ... -Mux17| IOPin 4 0 ( 41)| BERR -Mux18| Mcel 5 9 ( 235)| RST_DLY_2_ +Mux17| Mcel 5 12 ( 239)| SM_AMIGA_0_ +Mux18| Mcel 3 0 ( 173)| RN_VMA Mux19| ... | ... -Mux20| Mcel 5 8 ( 233)| cpu_est_1_ -Mux21| Mcel 3 13 ( 193)| cpu_est_2_ -Mux22| Mcel 6 5 ( 253)| SM_AMIGA_0_ -Mux23| ... | ... -Mux24| ... | ... -Mux25| Mcel 5 0 ( 221)| RST_DLY_0_ -Mux26| Mcel 3 0 ( 173)| RN_VMA -Mux27| Mcel 2 6 ( 158)| inst_AS_030_000_SYNC +Mux20| Mcel 3 10 ( 188)| cpu_est_0_ +Mux21| Mcel 3 13 ( 193)| cpu_est_1_ +Mux22| ... | ... +Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux24| Mcel 0 12 ( 119)| inst_AS_030_000_SYNC +Mux25| IOPin 4 0 ( 41)| BERR +Mux26| ... | ... +Mux27| ... | ... Mux28| ... | ... Mux29| ... | ... -Mux30| Mcel 5 1 ( 223)| SM_AMIGA_1_ +Mux30| Mcel 0 8 ( 113)| SM_AMIGA_6_ Mux31| ... | ... -Mux32| Mcel 2 2 ( 152)| SM_AMIGA_6_ +Mux32| Mcel 5 8 ( 233)| SM_AMIGA_1_ --------------------------------------------------------------------------- =========================================================================== < Block [ 6] > Macrocell (MCell) Cluster Assignments @@ -1552,18 +1551,18 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| RW| IO| | S | 2 | 4 to [ 0]| 1 XOR free 1| CLK_DIV_OUT|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig 2| SIZE_DMA_0_|NOD| | S | 3 | 4 to [ 2]| 1 XOR free - 3| CLK_000_D_8_|NOD| | S | 1 | 4 free | 1 XOR to [ 3] for 1 PT sig + 3| RST_DLY_1_|NOD| | S | 2 :+: 1| 4 to [ 3]| 1 XOR to [ 3] 4| E|OUT| | S | 2 | 4 to [ 4]| 1 XOR free - 5| SM_AMIGA_0_|NOD| | S | 3 | 4 to [ 5]| 1 XOR free + 5| | ? | | S | | 4 free | 1 XOR free 6|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | S | 2 | 4 to [ 6]| 1 XOR free - 7| inst_DTACK_D0|NOD| | S | 1 | 4 free | 1 XOR to [ 7] for 1 PT sig + 7| IPL_D0_2_|NOD| | S | 1 | 4 free | 1 XOR to [ 7] for 1 PT sig 8| A_0_| IO| | S | 3 | 4 to [ 8]| 1 XOR free - 9| SIZE_DMA_1_|NOD| | S | 3 | 4 to [ 9]| 1 XOR free -10|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | S | 2 | 4 to [10]| 1 XOR free + 9|inst_RESET_OUT|NOD| | S | 2 | 4 to [ 9]| 1 XOR free +10| RST_DLY_0_|NOD| | S | 4 | 4 to [10]| 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free 12| SIZE_0_| IO| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig -13| | ? | | S | | 4 free | 1 XOR free -14| CLK_000_D_12_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig +13| SIZE_DMA_1_|NOD| | S | 3 | 4 to [13]| 1 XOR free +14| RST_DLY_2_|NOD| | S | 2 | 4 to [14]| 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== @@ -1577,21 +1576,21 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ 0| RW| IO| | S | 2 |=> can support up to [ 9] logic PT(s) - 1| CLK_DIV_OUT|OUT| | S | 1 |=> can support up to [ 9] logic PT(s) - 2| SIZE_DMA_0_|NOD| | S | 3 |=> can support up to [ 13] logic PT(s) - 3| CLK_000_D_8_|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) - 4| E|OUT| | S | 2 |=> can support up to [ 9] logic PT(s) - 5| SM_AMIGA_0_|NOD| | S | 3 |=> can support up to [ 9] logic PT(s) - 6|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | S | 2 |=> can support up to [ 9] logic PT(s) - 7| inst_DTACK_D0|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) + 1| CLK_DIV_OUT|OUT| | S | 1 |=> can support up to [ 5] logic PT(s) + 2| SIZE_DMA_0_|NOD| | S | 3 |=> can support up to [ 9] logic PT(s) + 3| RST_DLY_1_|NOD| | S | 2 :+: 1|=> can support up to [ 9] logic PT(s) + 4| E|OUT| | S | 2 |=> can support up to [ 10] logic PT(s) + 5| | ? | | S | |=> can support up to [ 9] logic PT(s) + 6|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | S | 2 |=> can support up to [ 14] logic PT(s) + 7| IPL_D0_2_|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) 8| A_0_| IO| | S | 3 |=> can support up to [ 9] logic PT(s) - 9| SIZE_DMA_1_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s) -10|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | S | 2 |=> can support up to [ 14] logic PT(s) -11| | ? | | S | |=> can support up to [ 14] logic PT(s) -12| SIZE_0_| IO| | S | 1 |=> can support up to [ 19] logic PT(s) -13| | ? | | S | |=> can support up to [ 18] logic PT(s) -14| CLK_000_D_12_|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) -15| | ? | | S | |=> can support up to [ 9] logic PT(s) + 9|inst_RESET_OUT|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) +10| RST_DLY_0_|NOD| | S | 4 |=> can support up to [ 14] logic PT(s) +11| | ? | | S | |=> can support up to [ 9] logic PT(s) +12| SIZE_0_| IO| | S | 1 |=> can support up to [ 10] logic PT(s) +13| SIZE_DMA_1_|NOD| | S | 3 |=> can support up to [ 14] logic PT(s) +14| RST_DLY_2_|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) +15| | ? | | S | |=> can support up to [ 5] logic PT(s) --------------------------------------------------------------------------- =========================================================================== < Block [ 6] > Node-Pin Assignments @@ -1604,18 +1603,18 @@ _|_________________|__|_____|____________________|________________________ 0| RW| IO| | => | 5 ( 6) 7 0 | 70 ( 71) 72 65 1| CLK_DIV_OUT|OUT| | => | 5 6 7 ( 0)| 70 71 72 ( 65) 2| SIZE_DMA_0_|NOD| | => | 6 7 0 1 | 71 72 65 66 - 3| CLK_000_D_8_|NOD| | => | 6 7 0 1 | 71 72 65 66 + 3| RST_DLY_1_|NOD| | => | 6 7 0 1 | 71 72 65 66 4| E|OUT| | => | 7 0 ( 1) 2 | 72 65 ( 66) 67 - 5| SM_AMIGA_0_|NOD| | => | 7 0 1 2 | 72 65 66 67 + 5| | | | => | 7 0 1 2 | 72 65 66 67 6|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | => | 0 1 2 3 | 65 66 67 68 - 7| inst_DTACK_D0|NOD| | => | 0 1 2 3 | 65 66 67 68 + 7| IPL_D0_2_|NOD| | => | 0 1 2 3 | 65 66 67 68 8| A_0_| IO| | => | 1 2 3 ( 4)| 66 67 68 ( 69) - 9| SIZE_DMA_1_|NOD| | => | 1 2 3 4 | 66 67 68 69 -10|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | => | 2 3 4 5 | 67 68 69 70 + 9|inst_RESET_OUT|NOD| | => | 1 2 3 4 | 66 67 68 69 +10| RST_DLY_0_|NOD| | => | 2 3 4 5 | 67 68 69 70 11| | | | => | 2 3 4 5 | 67 68 69 70 12| SIZE_0_| IO| | => | 3 4 ( 5) 6 | 68 69 ( 70) 71 -13| | | | => | 3 4 5 6 | 68 69 70 71 -14| CLK_000_D_12_|NOD| | => | 4 5 6 7 | 69 70 71 72 +13| SIZE_DMA_1_|NOD| | => | 3 4 5 6 | 68 69 70 71 +14| RST_DLY_2_|NOD| | => | 4 5 6 7 | 69 70 71 72 15| | | | => | 4 5 6 7 | 69 70 71 72 --------------------------------------------------------------------------- =========================================================================== @@ -1673,36 +1672,36 @@ IMX No. | +---- Block IO Pin or Macrocell Number 1 [IOpin 1 | 66|OUT E|*| ] [RegIn 1 |249| -| | ] [MCell 2 |248|NOD SIZE_DMA_0_| |*] - [MCell 3 |250|NOD CLK_000_D_8_| |*] + [MCell 3 |250|NOD RST_DLY_1_| |*] 2 [IOpin 2 | 67|INP IPL_0_|*|*] [RegIn 2 |252| -| | ] [MCell 4 |251|OUT E| | ] - [MCell 5 |253|NOD SM_AMIGA_0_| |*] + [MCell 5 |253| -| | ] 3 [IOpin 3 | 68|INP IPL_2_|*|*] [RegIn 3 |255| -| | ] [MCell 6 |254|NOD inst_AMIGA_BUS_ENABLE_DMA_HIGH| |*] - [MCell 7 |256|NOD inst_DTACK_D0| |*] + [MCell 7 |256|NOD IPL_D0_2_| |*] 4 [IOpin 4 | 69| IO A_0_|*|*] paired w/[ RN_A_0_] [RegIn 4 |258| -| | ] [MCell 8 |257|NOD RN_A_0_| |*] paired w/[ A_0_] - [MCell 9 |259|NOD SIZE_DMA_1_| |*] + [MCell 9 |259|NOD inst_RESET_OUT| |*] 5 [IOpin 5 | 70| IO SIZE_0_|*|*] [RegIn 5 |261| -| | ] - [MCell 10 |260|NOD inst_AMIGA_BUS_ENABLE_DMA_LOW| |*] + [MCell 10 |260|NOD RST_DLY_0_| |*] [MCell 11 |262| -| | ] 6 [IOpin 6 | 71| IO RW|*|*] paired w/[ RN_RW] [RegIn 6 |264| -| | ] [MCell 12 |263| IO SIZE_0_| | ] - [MCell 13 |265| -| | ] + [MCell 13 |265|NOD SIZE_DMA_1_| |*] 7 [IOpin 7 | 72| -| | ] [RegIn 7 |267| -| | ] - [MCell 14 |266|NOD CLK_000_D_12_| |*] + [MCell 14 |266|NOD RST_DLY_2_| |*] [MCell 15 |268| -| | ] --------------------------------------------------------------------------- =========================================================================== @@ -1711,39 +1710,39 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux01| IOPin 4 0 ( 41)| BERR -Mux02| Mcel 5 8 ( 233)| cpu_est_1_ +Mux00| IOPin 3 4 ( 31)| LDS_000 +Mux01| Mcel 3 13 ( 193)| cpu_est_1_ +Mux02| ... | ... Mux03| IOPin 5 0 ( 60)| A_1_ -Mux04| Mcel 6 2 ( 248)| SIZE_DMA_0_ -Mux05| Mcel 6 6 ( 254)| inst_AMIGA_BUS_ENABLE_DMA_HIGH +Mux04| Mcel 3 6 ( 182)| cpu_est_2_ +Mux05| Mcel 6 10 ( 260)| RST_DLY_0_ Mux06| IOPin 7 5 ( 80)| RW_000 -Mux07| Mcel 7 13 ( 289)| inst_BGACK_030_INT_D +Mux07| ... | ... Mux08| IOPin 3 3 ( 32)| UDS_000 -Mux09| IOPin 3 5 ( 30)| DTACK -Mux10| Mcel 5 1 ( 223)| SM_AMIGA_1_ -Mux11| Mcel 7 3 ( 274)| CLK_000_D_1_ -Mux12| Mcel 6 9 ( 259)| SIZE_DMA_1_ +Mux09| Mcel 6 13 ( 265)| SIZE_DMA_1_ +Mux10| Mcel 1 13 ( 145)| inst_CLK_OUT_PRE_D +Mux11| Mcel 6 14 ( 266)| RST_DLY_2_ +Mux12| Mcel 6 9 ( 259)| inst_RESET_OUT Mux13| Mcel 6 8 ( 257)| RN_A_0_ Mux14| ... | ... Mux15| Input Pin ( 14)| nEXP_SPACE -Mux16| Mcel 4 8 ( 209)| inst_CLK_OUT_PRE_D +Mux16| Mcel 4 8 ( 209)| CLK_000_D_0_ Mux17| Mcel 6 0 ( 245)| RN_RW -Mux18| Mcel 0 8 ( 113)| inst_RESET_OUT +Mux18| ... | ... Mux19| ... | ... -Mux20| Mcel 0 14 ( 122)| CLK_000_D_7_ -Mux21| Mcel 3 13 ( 193)| cpu_est_2_ -Mux22| Mcel 6 10 ( 260)| inst_AMIGA_BUS_ENABLE_DMA_LOW -Mux23| Mcel 7 0 ( 269)| CLK_000_D_11_ -Mux24| Input Pin ( 86)| RST -Mux25| Mcel 3 9 ( 187)| cpu_est_3_ +Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux21| Input Pin ( 86)| RST +Mux22| IOPin 6 3 ( 68)| IPL_2_ +Mux23| Mcel 6 6 ( 254)| inst_AMIGA_BUS_ENABLE_DMA_HIGH +Mux24| Mcel 6 3 ( 250)| RST_DLY_1_ +Mux25| Mcel 5 0 ( 221)| inst_BGACK_030_INT_D Mux26| ... | ... -Mux27| IOPin 3 4 ( 31)| LDS_000 -Mux28| ... | ... +Mux27| Mcel 7 5 ( 277)| CLK_000_D_1_ +Mux28| Mcel 3 2 ( 176)| cpu_est_3_ Mux29| ... | ... -Mux30| Mcel 2 13 ( 169)| CLK_000_D_0_ -Mux31| ... | ... -Mux32| Mcel 6 5 ( 253)| SM_AMIGA_0_ +Mux30| ... | ... +Mux31| Mcel 6 2 ( 248)| SIZE_DMA_0_ +Mux32| ... | ... --------------------------------------------------------------------------- =========================================================================== < Block [ 7] > Macrocell (MCell) Cluster Assignments @@ -1755,20 +1754,20 @@ Mux32| Mcel 6 5 ( 253)| SM_AMIGA_0_ | Sig Type-+ | | | | | | | XOR to Mcell Assignment | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| CLK_000_D_11_|NOD| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig - 1| RW_000| IO| | S | 4 | 4 to [ 1]| 1 XOR free + 0| RW_000| IO| | S | 4 | 4 to [ 0]| 1 XOR free + 1| FPU_CS|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig 2| | ? | | S | | 4 free | 1 XOR free - 3| CLK_000_D_1_|NOD| | S | 1 | 4 free | 1 XOR to [ 3] for 1 PT sig + 3| | ? | | S | | 4 free | 1 XOR free 4| BGACK_030| IO| | S | 3 | 4 to [ 4]| 1 XOR free - 5| FPU_CS|OUT| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig - 6| | ? | | S | | 4 free | 1 XOR free + 5| CLK_000_D_1_|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig + 6| CLK_000_D_2_|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig 7| | ? | | S | | 4 free | 1 XOR free 8| AS_030| IO| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig - 9| DSACK1| IO| | S | 4 | 4 to [ 9]| 1 XOR free + 9| DSACK1| IO| | S | 5 | 4 to [ 9]| 1 XOR to [ 9] as logic PT 10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free 12| SIZE_1_| IO| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig -13|inst_BGACK_030_INT_D|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig +13| CLK_000_D_9_|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig 14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- @@ -1782,20 +1781,20 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| CLK_000_D_11_|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) - 1| RW_000| IO| | S | 4 |=> can support up to [ 18] logic PT(s) - 2| | ? | | S | |=> can support up to [ 9] logic PT(s) - 3| CLK_000_D_1_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) + 0| RW_000| IO| | S | 4 |=> can support up to [ 14] logic PT(s) + 1| FPU_CS|OUT| | S | 1 |=> can support up to [ 15] logic PT(s) + 2| | ? | | S | |=> can support up to [ 14] logic PT(s) + 3| | ? | | S | |=> can support up to [ 14] logic PT(s) 4| BGACK_030| IO| | S | 3 |=> can support up to [ 18] logic PT(s) - 5| FPU_CS|OUT| | S | 1 |=> can support up to [ 15] logic PT(s) - 6| | ? | | S | |=> can support up to [ 18] logic PT(s) - 7| | ? | | S | |=> can support up to [ 14] logic PT(s) + 5| CLK_000_D_1_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) + 6| CLK_000_D_2_|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) + 7| | ? | | S | |=> can support up to [ 13] logic PT(s) 8| AS_030| IO| | S | 1 |=> can support up to [ 15] logic PT(s) - 9| DSACK1| IO| | S | 4 |=> can support up to [ 19] logic PT(s) + 9| DSACK1| IO| | S | 5 |=> can support up to [ 19] logic PT(s) 10| | ? | | S | |=> can support up to [ 14] logic PT(s) 11| | ? | | S | |=> can support up to [ 18] logic PT(s) 12| SIZE_1_| IO| | S | 1 |=> can support up to [ 19] logic PT(s) -13|inst_BGACK_030_INT_D|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) +13| CLK_000_D_9_|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) 14| | ? | | S | |=> can support up to [ 14] logic PT(s) 15| | ? | | S | |=> can support up to [ 10] logic PT(s) --------------------------------------------------------------------------- @@ -1807,20 +1806,20 @@ _|_________________|__|__|___|_____|_______________________________________ | Sig Type---+ | to | Block [ 7] IO Pin | Device Pin | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ - 0| CLK_000_D_11_|NOD| | => | 5 6 7 0 | 80 79 78 85 - 1| RW_000| IO| | => |( 5) 6 7 0 |( 80) 79 78 85 + 0| RW_000| IO| | => |( 5) 6 7 0 |( 80) 79 78 85 + 1| FPU_CS|OUT| | => | 5 6 ( 7) 0 | 80 79 ( 78) 85 2| | | | => | 6 7 0 1 | 79 78 85 84 - 3| CLK_000_D_1_|NOD| | => | 6 7 0 1 | 79 78 85 84 + 3| | | | => | 6 7 0 1 | 79 78 85 84 4| BGACK_030| IO| | => | 7 0 1 ( 2)| 78 85 84 ( 83) - 5| FPU_CS|OUT| | => |( 7) 0 1 2 |( 78) 85 84 83 - 6| | | | => | 0 1 2 3 | 85 84 83 82 + 5| CLK_000_D_1_|NOD| | => | 7 0 1 2 | 78 85 84 83 + 6| CLK_000_D_2_|NOD| | => | 0 1 2 3 | 85 84 83 82 7| | | | => | 0 1 2 3 | 85 84 83 82 8| AS_030| IO| | => | 1 2 ( 3) 4 | 84 83 ( 82) 81 9| DSACK1| IO| | => | 1 2 3 ( 4)| 84 83 82 ( 81) 10| | | | => | 2 3 4 5 | 83 82 81 80 11| | | | => | 2 3 4 5 | 83 82 81 80 12| SIZE_1_| IO| | => | 3 4 5 ( 6)| 82 81 80 ( 79) -13|inst_BGACK_030_INT_D|NOD| | => | 3 4 5 6 | 82 81 80 79 +13| CLK_000_D_9_|NOD| | => | 3 4 5 6 | 82 81 80 79 14| | | | => | 4 5 6 7 | 81 80 79 78 15| | | | => | 4 5 6 7 | 81 80 79 78 --------------------------------------------------------------------------- @@ -1838,9 +1837,9 @@ _|_________________|__|___|_____|___________________________________________ 2| BGACK_030| IO|*| 83| => | ( 4) 5 6 7 8 9 10 11 3| AS_030| IO|*| 82| => | 6 7 ( 8) 9 10 11 12 13 4| DSACK1| IO|*| 81| => | 8 ( 9) 10 11 12 13 14 15 - 5| RW_000| IO|*| 80| => | 10 11 12 13 14 15 0 ( 1) + 5| RW_000| IO|*| 80| => | 10 11 12 13 14 15 ( 0) 1 6| SIZE_1_| IO|*| 79| => | (12) 13 14 15 0 1 2 3 - 7| FPU_CS|OUT|*| 78| => | 14 15 0 1 2 3 4 ( 5) + 7| FPU_CS|OUT|*| 78| => | 14 15 0 ( 1) 2 3 4 5 --------------------------------------------------------------------------- =========================================================================== < Block [ 7] > IO/Node and IO/Input Macrocell Pairing Table @@ -1874,22 +1873,22 @@ IMX No. | +---- Block IO Pin or Macrocell Number ---|-------|----|---|---|----------|------|-|------------------------------ 0 [IOpin 0 | 85|INP A_DECODE_23_|*|*] [RegIn 0 |270| -| | ] - [MCell 0 |269|NOD CLK_000_D_11_| |*] - [MCell 1 |271|NOD RN_RW_000| |*] paired w/[ RW_000] + [MCell 0 |269|NOD RN_RW_000| |*] paired w/[ RW_000] + [MCell 1 |271|OUT FPU_CS| | ] 1 [IOpin 1 | 84|INP A_DECODE_22_|*|*] [RegIn 1 |273| -| | ] [MCell 2 |272| -| | ] - [MCell 3 |274|NOD CLK_000_D_1_| |*] + [MCell 3 |274| -| | ] 2 [IOpin 2 | 83| IO BGACK_030|*| ] paired w/[ RN_BGACK_030] [RegIn 2 |276| -| | ] [MCell 4 |275|NOD RN_BGACK_030| |*] paired w/[ BGACK_030] - [MCell 5 |277|OUT FPU_CS| | ] + [MCell 5 |277|NOD CLK_000_D_1_| |*] 3 [IOpin 3 | 82| IO AS_030|*|*] [RegIn 3 |279| -| | ] - [MCell 6 |278| -| | ] + [MCell 6 |278|NOD CLK_000_D_2_| |*] [MCell 7 |280| -| | ] 4 [IOpin 4 | 81| IO DSACK1|*| ] paired w/[ RN_DSACK1] @@ -1905,7 +1904,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 6 [IOpin 6 | 79| IO SIZE_1_|*|*] [RegIn 6 |288| -| | ] [MCell 12 |287| IO SIZE_1_| | ] - [MCell 13 |289|NOD inst_BGACK_030_INT_D| |*] + [MCell 13 |289|NOD CLK_000_D_9_| |*] 7 [IOpin 7 | 78|OUT FPU_CS|*| ] [RegIn 7 |291| -| | ] @@ -1918,37 +1917,37 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| Mcel 2 13 ( 169)| CLK_000_D_0_ +Mux00| Mcel 4 6 ( 206)| CLK_000_D_8_ Mux01| IOPin 4 0 ( 41)| BERR -Mux02| Mcel 2 2 ( 152)| SM_AMIGA_6_ -Mux03| Mcel 6 5 ( 253)| SM_AMIGA_0_ -Mux04| IOPin 3 7 ( 28)| BGACK_000 +Mux02| Mcel 5 8 ( 233)| SM_AMIGA_1_ +Mux03| Mcel 0 8 ( 113)| SM_AMIGA_6_ +Mux04| IOPin 0 4 ( 95)| A_DECODE_18_ Mux05| Mcel 7 9 ( 283)| RN_DSACK1 Mux06| IOPin 0 5 ( 96)| A_DECODE_16_ -Mux07| Mcel 2 14 ( 170)| CLK_000_D_10_ -Mux08| Mcel 4 8 ( 209)| inst_CLK_OUT_PRE_D -Mux09| Mcel 0 12 ( 119)| inst_AS_000_DMA -Mux10| Mcel 6 9 ( 259)| SIZE_DMA_1_ -Mux11| Mcel 7 3 ( 274)| CLK_000_D_1_ -Mux12| IOPin 5 2 ( 58)| FC_1_ -Mux13| IOPin 5 1 ( 59)| A_DECODE_17_ +Mux07| Mcel 7 13 ( 289)| CLK_000_D_9_ +Mux08| IOPin 5 1 ( 59)| A_DECODE_17_ +Mux09| Mcel 6 13 ( 265)| SIZE_DMA_1_ +Mux10| Mcel 1 13 ( 145)| inst_CLK_OUT_PRE_D +Mux11| IOPin 6 6 ( 71)| RW +Mux12| Mcel 6 9 ( 259)| inst_RESET_OUT +Mux13| Mcel 7 5 ( 277)| CLK_000_D_1_ Mux14| Mcel 5 4 ( 227)| SM_AMIGA_i_7_ Mux15| Input Pin ( 14)| nEXP_SPACE -Mux16| IOPin 4 1 ( 42)| AS_000 -Mux17| IOPin 0 4 ( 95)| A_DECODE_18_ -Mux18| Mcel 0 8 ( 113)| inst_RESET_OUT -Mux19| Mcel 7 1 ( 271)| RN_RW_000 -Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux16| Mcel 4 8 ( 209)| CLK_000_D_0_ +Mux17| Mcel 5 12 ( 239)| SM_AMIGA_0_ +Mux18| IOPin 3 7 ( 28)| BGACK_000 +Mux19| Mcel 5 6 ( 230)| CLK_000_D_10_ +Mux20| IOPin 5 2 ( 58)| FC_1_ Mux21| Input Pin ( 86)| RST -Mux22| Mcel 0 6 ( 110)| inst_AS_030_D0 -Mux23| Mcel 7 0 ( 269)| CLK_000_D_11_ +Mux22| Mcel 2 2 ( 152)| inst_AS_000_DMA +Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 Mux24| IOPin 5 3 ( 57)| FC_0_ -Mux25| IOPin 6 6 ( 71)| RW -Mux26| Mcel 6 14 ( 266)| CLK_000_D_12_ +Mux25| Mcel 3 9 ( 187)| inst_AS_030_D0 +Mux26| IOPin 4 1 ( 42)| AS_000 Mux27| IOPin 0 6 ( 97)| A_DECODE_19_ Mux28| Input Pin ( 64)| CLK_030 Mux29| IOPin 0 0 ( 91)| FPU_SENSE -Mux30| Mcel 5 1 ( 223)| SM_AMIGA_1_ +Mux30| Mcel 7 0 ( 269)| RN_RW_000 Mux31| Mcel 6 2 ( 248)| SIZE_DMA_0_ Mux32| IOPin 7 3 ( 82)| AS_030 --------------------------------------------------------------------------- \ No newline at end of file diff --git a/Logic/68030_tk.rpt b/Logic/68030_tk.rpt index 6c0a21e..a9a9351 100644 --- a/Logic/68030_tk.rpt +++ b/Logic/68030_tk.rpt @@ -12,7 +12,7 @@ Project_Summary Project Name : 68030_tk Project Path : C:\Users\Matze\Documents\GitHub\68030tk\Logic -Project Fitted on : Fri Aug 19 00:39:40 2016 +Project Fitted on : Wed Aug 24 22:17:54 2016 Device : M4A5-128/64 Package : 100TQFP @@ -40,7 +40,7 @@ Design_Summary Total Input Pins : 24 Total Output Pins : 19 Total Bidir I/O Pins : 18 - Total Flip-Flops : 64 + Total Flip-Flops : 63 Total Product Terms : 222 Total Reserved Pins : 0 Total Reserved Blocks : 0 @@ -54,13 +54,13 @@ Dedicated Pins Input-Only Pins 2 2 0 --> 100% Clock/Input Pins 4 4 0 --> 100% I/O Pins 64 55 9 --> 85% -Logic Macrocells 128 91 37 --> 71% +Logic Macrocells 128 90 38 --> 70% Input Registers 64 0 64 --> 0% Unusable Macrocells .. 1 .. -CSM Outputs/Total Block Inputs 264 215 49 --> 81% +CSM Outputs/Total Block Inputs 264 206 58 --> 78% Logical Product Terms 640 226 414 --> 35% -Product Term Clusters 128 53 75 --> 41% +Product Term Clusters 128 54 74 --> 42%  Blocks_Resource_Summary @@ -71,14 +71,14 @@ Blocks_Resource_Summary --------------------------------------------------------------------------------- Maximum 33 8 8 -- -- 16 80 16 - --------------------------------------------------------------------------------- -Block A 23 8 0 12 0 4 39 7 Lo -Block B 25 8 0 12 1 3 44 8 Lo -Block C 24 7 0 12 0 4 21 12 Lo -Block D 25 8 0 12 0 4 25 8 Lo -Block E 33 4 0 10 0 6 12 14 Lo -Block F 25 5 0 10 0 6 43 5 Lo -Block G 27 7 0 13 0 3 25 8 Lo -Block H 33 8 0 9 0 7 17 13 Lo +Block A 25 8 0 9 0 7 19 11 Lo +Block B 22 8 0 13 1 2 42 8 Lo +Block C 20 7 0 13 0 3 40 7 Lo +Block D 24 8 0 13 0 3 27 8 Lo +Block E 33 4 0 9 0 7 11 14 Lo +Block F 25 5 0 10 0 6 40 6 Lo +Block G 24 7 0 13 0 3 29 6 Lo +Block H 33 8 0 9 0 7 18 13 Lo --------------------------------------------------------------------------------- Four rightmost columns above reflect last status of the placement process. @@ -128,8 +128,8 @@ Block Reservation : No Clock Optimization : No Input Register Optimization : Yes XOR Synthesis : Yes - Max. P-Term for Collapsing : 16 - Max. P-Term for Splitting : 16 + Max. P-Term for Collapsing : 20 + Max. P-Term for Splitting : 20 Max. Equation Fanin : 32 Keep Xor : Yes @@ -287,29 +287,29 @@ Input_Signal_List Pin r e O Input Pin Blk PTs Type e s E Fanout Pwr Slew Signal ---------------------------------------------------------------------- - 60 F . I/O ------G- Low Slow A_1_ - 96 A . I/O --C-E--H Low Slow A_DECODE_16_ - 59 F . I/O --C-E--H Low Slow A_DECODE_17_ - 95 A . I/O --C-E--H Low Slow A_DECODE_18_ - 97 A . I/O --C-E--H Low Slow A_DECODE_19_ + 60 F . I/O --C---G- Low Slow A_1_ + 96 A . I/O A---E--H Low Slow A_DECODE_16_ + 59 F . I/O A---E--H Low Slow A_DECODE_17_ + 95 A . I/O A---E--H Low Slow A_DECODE_18_ + 97 A . I/O A---E--H Low Slow A_DECODE_19_ 93 A . I/O ----E--- Low Slow A_DECODE_20_ 94 A . I/O ----E--- Low Slow A_DECODE_21_ 84 H . I/O ----E--- Low Slow A_DECODE_22_ 85 H . I/O ----E--- Low Slow A_DECODE_23_ 28 D . I/O ----E--H Low Slow BGACK_000 21 C . I/O ---D---- Low Slow BG_030 - 30 D . I/O ------G- Low Slow DTACK - 57 F . I/O --C-E--H Low Slow FC_0_ - 58 F . I/O --C-E--H Low Slow FC_1_ + 30 D . I/O --C----- Low Slow DTACK + 57 F . I/O A---E--H Low Slow FC_0_ + 58 F . I/O A---E--H Low Slow FC_1_ 91 A . I/O ----E--H Low Slow FPU_SENSE - 67 G . I/O -B------ Low Slow IPL_0_ + 67 G . I/O AB------ Low Slow IPL_0_ 56 F . I/O -B------ Low Slow IPL_1_ - 68 G . I/O AB------ Low Slow IPL_2_ - 11 . . Ck/I --C----- - Slow CLK_000 + 68 G . I/O -B----G- Low Slow IPL_2_ + 11 . . Ck/I ----E--- - Slow CLK_000 14 . . Ck/I ABCDEFGH - Slow nEXP_SPACE - 36 . . Ded -----F-- - Slow VPA + 36 . . Ded A------- - Slow VPA 61 . . Ck/I ABCDEFGH - Slow CLK_OSZI - 64 . . Ck/I A------H - Slow CLK_030 + 64 . . Ck/I --C----H - Slow CLK_030 86 . . Ded ABCD-FGH - Slow RST ---------------------------------------------------------------------- @@ -330,21 +330,21 @@ Pin Blk PTs Type e s E Fanout Pwr Slew Signal 48 E 2 COM -------- Low Fast AMIGA_BUS_DATA_DIR 34 D 2 COM -------- Low Fast AMIGA_BUS_ENABLE_HIGH 20 C 1 COM -------- Low Fast AMIGA_BUS_ENABLE_LOW - 92 A 1 COM -------- Low Slow AVEC - 83 H 3 DFF * * -------- Low Slow BGACK_030 - 29 D 2 DFF * * -------- Low Slow BG_000 - 47 E 1 COM -------- Low Slow CIIN - 65 G 1 DFF * * -------- Low Fast CLK_DIV_OUT - 10 B 1 DFF * * -------- Low Fast CLK_EXP - 81 H 4 DFF * * -------- Low Slow DSACK1 - 98 A 1 COM -------- Low Slow DS_030 - 66 G 2 COM -------- Low Slow E + 92 A 1 COM -------- Low Fast AVEC + 83 H 3 DFF -------- Low Fast BGACK_030 + 29 D 2 DFF -------- Low Fast BG_000 + 47 E 1 COM -------- Low Fast CIIN + 65 G 1 DFF -------- Low Fast CLK_DIV_OUT + 10 B 1 DFF -------- Low Fast CLK_EXP + 81 H 5 DFF -------- Low Fast DSACK1 + 98 A 1 COM -------- Low Fast DS_030 + 66 G 2 COM -------- Low Fast E 78 H 1 COM -------- Low Fast FPU_CS - 8 B 10 DFF * * -------- Low Slow IPL_030_0_ - 7 B 10 DFF * * -------- Low Slow IPL_030_1_ - 9 B 10 DFF * * -------- Low Slow IPL_030_2_ - 3 B 1 COM -------- Low Slow RESET - 35 D 3 TFF * * -------- Low Slow VMA + 8 B 10 DFF -------- Low Fast IPL_030_0_ + 7 B 10 DFF -------- Low Fast IPL_030_1_ + 9 B 10 DFF -------- Low Fast IPL_030_2_ + 3 B 1 COM -------- Low Fast RESET + 35 D 3 TFF -------- Low Fast VMA ---------------------------------------------------------------------- Power : Hi = High @@ -360,24 +360,24 @@ Bidir_Signal_List Pin r e O Bidir Pin Blk PTs Type e s E Fanout Pwr Slew Signal ---------------------------------------------------------------------- - 19 C 1 COM ----E--- Low Slow AHIGH_24_ - 18 C 1 COM ----E--- Low Slow AHIGH_25_ - 17 C 1 COM ----E--- Low Slow AHIGH_26_ - 16 C 1 COM ----E--- Low Slow AHIGH_27_ - 15 C 1 COM ----E--- Low Slow AHIGH_28_ - 6 B 1 COM ----E--- Low Slow AHIGH_29_ - 5 B 1 COM ----E--- Low Slow AHIGH_30_ - 4 B 1 COM ----E--- Low Slow AHIGH_31_ - 42 E 1 COM A---E--H Low Slow AS_000 - 82 H 1 COM A---E--H Low Slow AS_030 - 69 G 3 DFF * * ---D---- Low Slow A_0_ - 41 E 1 COM -BC--FGH Low Slow BERR - 31 D 1 COM A-----G- Low Slow LDS_000 - 71 G 2 DFF * * -B-----H Low Slow RW - 80 H 4 DFF * * A---E-G- Low Slow RW_000 - 70 G 1 COM ---D---- Low Slow SIZE_0_ - 79 H 1 COM ---D---- Low Slow SIZE_1_ - 32 D 1 COM A-----G- Low Slow UDS_000 + 19 C 1 COM ----E--- Low Fast AHIGH_24_ + 18 C 1 COM ----E--- Low Fast AHIGH_25_ + 17 C 1 COM ----E--- Low Fast AHIGH_26_ + 16 C 1 COM ----E--- Low Fast AHIGH_27_ + 15 C 1 COM ----E--- Low Fast AHIGH_28_ + 6 B 1 COM ----E--- Low Fast AHIGH_29_ + 5 B 1 COM ----E--- Low Fast AHIGH_30_ + 4 B 1 COM ----E--- Low Fast AHIGH_31_ + 42 E 1 COM A-C-E--H Low Fast AS_000 + 82 H 1 COM ---DE--H Low Fast AS_030 + 69 G 3 DFF -B-D---- Low Fast A_0_ + 41 E 1 COM A----F-H Low Fast BERR + 31 D 1 COM --C---G- Low Fast LDS_000 + 71 G 2 DFF -----F-H Low Fast RW + 80 H 4 DFF --C-E-G- Low Fast RW_000 + 70 G 1 COM -B------ Low Fast SIZE_0_ + 79 H 1 COM -B------ Low Fast SIZE_1_ + 32 D 1 COM --C---G- Low Fast UDS_000 ---------------------------------------------------------------------- Power : Hi = High @@ -393,69 +393,68 @@ Buried_Signal_List Pin r e O Node #Mc Blk PTs Type e s E Fanout Pwr Slew Signal ---------------------------------------------------------------------- - E10 E 2 COM ----E--- Low Slow CIIN_0 - C13 C 1 DFF * * ABCD-FGH Low Slow CLK_000_D_0_ - C14 C 1 DFF * * -------H Low Slow CLK_000_D_10_ - H0 H 1 DFF * * ------GH Low Slow CLK_000_D_11_ - G14 G 1 DFF * * -------H Low Slow CLK_000_D_12_ - H3 H 1 DFF * * ABCDEFGH Low Slow CLK_000_D_1_ - E2 E 1 DFF * * --C-EF-- Low Slow CLK_000_D_2_ - E9 E 1 DFF * * --C----- Low Slow CLK_000_D_3_ - C11 C 1 DFF * * ----E--- Low Slow CLK_000_D_4_ - E5 E 1 DFF * * ---D---- Low Slow CLK_000_D_5_ - D14 D 1 DFF * * A------- Low Slow CLK_000_D_6_ - A14 A 1 DFF * * ------G- Low Slow CLK_000_D_7_ - G3 G 1 DFF * * A------- Low Slow CLK_000_D_8_ - A10 A 1 DFF * * --C----- Low Slow CLK_000_D_9_ - A13 A 3 DFF * * A------- Low Slow CYCLE_DMA_0_ - A9 A 4 DFF * * A------- Low Slow CYCLE_DMA_1_ - B3 B 1 DFF * * -B------ Low Slow IPL_D0_0_ - B14 B 1 DFF * * -B------ Low Slow IPL_D0_1_ - A3 A 1 DFF * * -B------ Low Slow IPL_D0_2_ - G8 G 3 DFF * * ------G- Low - RN_A_0_ --> A_0_ - H4 H 3 DFF * * ABCDE-GH Low - RN_BGACK_030 --> BGACK_030 - D1 D 2 DFF * * ---D---- Low - RN_BG_000 --> BG_000 - H9 H 4 DFF * * -------H Low - RN_DSACK1 --> DSACK1 - B5 B 10 DFF * * -B------ Low - RN_IPL_030_0_ --> IPL_030_0_ - B9 B 10 DFF * * -B------ Low - RN_IPL_030_1_ --> IPL_030_1_ - B4 B 10 DFF * * -B------ Low - RN_IPL_030_2_ --> IPL_030_2_ - G0 G 2 DFF * * ------G- Low - RN_RW --> RW - H1 H 4 DFF * * -------H Low - RN_RW_000 --> RW_000 - D0 D 3 TFF * * ---D-F-- Low - RN_VMA --> VMA - F0 F 4 DFF * * A----F-- Low Slow RST_DLY_0_ - F13 F 2 DFF * * A----F-- Low Slow RST_DLY_1_ - F9 F 2 DFF * * A----F-- Low Slow RST_DLY_2_ - G2 G 3 DFF * * ------GH Low Slow SIZE_DMA_0_ - G9 G 3 DFF * * ------GH Low Slow SIZE_DMA_1_ - G5 G 3 DFF * * -B---FGH Low Slow SM_AMIGA_0_ - F1 F 3 DFF * * -----FGH Low Slow SM_AMIGA_1_ - F6 F 4 DFF * * -----F-- Low Slow SM_AMIGA_2_ - F10 F 4 DFF * * -----F-- Low Slow SM_AMIGA_3_ - B10 B 3 DFF * * -B---F-- Low Slow SM_AMIGA_4_ - F5 F 3 DFF * * -B---F-- Low Slow SM_AMIGA_5_ - C2 C 3 DFF * * -BCD-F-H Low Slow SM_AMIGA_6_ - F4 F 13 DFF * * -BC----H Low Slow SM_AMIGA_i_7_ - D2 D 3 DFF * * ---D-F-- Low Slow cpu_est_0_ - F8 F 4 DFF * * ---D-FG- Low Slow cpu_est_1_ - D13 D 1 DFF * * ---D-FG- Low Slow cpu_est_2_ - D9 D 4 DFF * * ---D-FG- Low Slow cpu_est_3_ - G6 G 2 DFF * * ---D--G- Low Slow inst_AMIGA_BUS_ENABLE_DMA_HIGH - G10 G 2 DFF * * --C---G- Low Slow inst_AMIGA_BUS_ENABLE_DMA_LOW - A12 A 7 DFF * * A------H Low Slow inst_AS_000_DMA - C15 C 2 DFF * * --C-E--- Low Slow inst_AS_000_INT - C6 C 7 DFF * * --CD-F-- Low Slow inst_AS_030_000_SYNC - A6 A 1 DFF * * -BCDE--H Low Slow inst_AS_030_D0 - H13 H 1 DFF * * --C---G- Low Slow inst_BGACK_030_INT_D - A5 A 8 DFF * * A------- Low Slow inst_CLK_030_H - E6 E 1 DFF * * ----E--- Low Slow inst_CLK_OUT_PRE_50 - E8 E 1 DFF * * -B----GH Low Slow inst_CLK_OUT_PRE_D - A1 A 9 DFF * * A------- Low Slow inst_DS_000_DMA - B6 B 4 DFF * * -B-D---- Low Slow inst_DS_000_ENABLE - G7 G 1 DFF * * -----F-- Low Slow inst_DTACK_D0 - D6 D 3 DFF * * ---D---- Low Slow inst_LDS_000_INT - A8 A 2 DFF * * ABCDE-GH Low Slow inst_RESET_OUT - D10 D 2 DFF * * ---D---- Low Slow inst_UDS_000_INT - F2 F 1 DFF * * ---D-F-- Low Slow inst_VPA_D + E9 E 2 COM ----E--- Low Slow CIIN_0 + E8 E 1 DFF A-CD-FGH Low Slow CLK_000_D_0_ + F6 F 1 DFF -------H Low Slow CLK_000_D_10_ + H5 H 1 DFF A-CD-FGH Low Slow CLK_000_D_1_ + H6 H 1 DFF ----E--- Low Slow CLK_000_D_2_ + E2 E 1 DFF ---D---- Low Slow CLK_000_D_3_ + D3 D 1 DFF -B------ Low Slow CLK_000_D_4_ + B14 B 1 DFF -B------ Low Slow CLK_000_D_5_ + B10 B 1 DFF ----E--- Low Slow CLK_000_D_6_ + E13 E 1 DFF ----E--- Low Slow CLK_000_D_7_ + E6 E 1 DFF -------H Low Slow CLK_000_D_8_ + H13 H 1 DFF -----F-H Low Slow CLK_000_D_9_ + C14 C 3 DFF --C----- Low Slow CYCLE_DMA_0_ + C10 C 4 DFF --C----- Low Slow CYCLE_DMA_1_ + A13 A 1 DFF -B------ Low Slow IPL_D0_0_ + B3 B 1 DFF -B------ Low Slow IPL_D0_1_ + G7 G 1 DFF -B------ Low Slow IPL_D0_2_ + G8 G 3 DFF ------G- Low - RN_A_0_ --> A_0_ + H4 H 3 DFF ABCDEFGH Low - RN_BGACK_030 --> BGACK_030 + D1 D 2 DFF ---D---- Low - RN_BG_000 --> BG_000 + H9 H 5 DFF -------H Low - RN_DSACK1 --> DSACK1 + B5 B 10 DFF -B------ Low - RN_IPL_030_0_ --> IPL_030_0_ + B9 B 10 DFF -B------ Low - RN_IPL_030_1_ --> IPL_030_1_ + B4 B 10 DFF -B------ Low - RN_IPL_030_2_ --> IPL_030_2_ + G0 G 2 DFF ------G- Low - RN_RW --> RW + H0 H 4 DFF -------H Low - RN_RW_000 --> RW_000 + D0 D 3 TFF ---D-F-- Low - RN_VMA --> VMA + G10 G 4 DFF ------G- Low Slow RST_DLY_0_ + G3 G 2 DFF ------G- Low Slow RST_DLY_1_ + G14 G 2 DFF ------G- Low Slow RST_DLY_2_ + G2 G 3 DFF ------GH Low Slow SIZE_DMA_0_ + G13 G 3 DFF ------GH Low Slow SIZE_DMA_1_ + F12 F 3 DFF -----F-H Low Slow SM_AMIGA_0_ + F8 F 3 DFF -----F-H Low Slow SM_AMIGA_1_ + F5 F 4 DFF -----F-- Low Slow SM_AMIGA_2_ + F9 F 4 DFF -----F-- Low Slow SM_AMIGA_3_ + F2 F 3 DFF -----F-- Low Slow SM_AMIGA_4_ + F13 F 3 DFF -----F-- Low Slow SM_AMIGA_5_ + A8 A 3 DFF AB-D-F-H Low Slow SM_AMIGA_6_ + F4 F 13 DFF A------H Low Slow SM_AMIGA_i_7_ + D10 D 3 DFF ---D-F-- Low Slow cpu_est_0_ + D13 D 4 DFF ---D-FG- Low Slow cpu_est_1_ + D6 D 1 DFF ---D-FG- Low Slow cpu_est_2_ + D2 D 4 DFF ---D-FG- Low Slow cpu_est_3_ + G6 G 2 DFF ---D--G- Low Slow inst_AMIGA_BUS_ENABLE_DMA_HIGH + C3 C 2 DFF --C----- Low Slow inst_AMIGA_BUS_ENABLE_DMA_LOW + C2 C 7 DFF --C----H Low Slow inst_AS_000_DMA + A5 A 2 DFF A---E--- Low Slow inst_AS_000_INT + A12 A 7 DFF A--D-F-- Low Slow inst_AS_030_000_SYNC + D9 D 1 DFF A--DEF-H Low Slow inst_AS_030_D0 + F0 F 1 DFF A-C---G- Low Slow inst_BGACK_030_INT_D + C6 C 8 DFF --C----- Low Slow inst_CLK_030_H + A1 A 2 DFF AB------ Low Slow inst_CLK_OUT_PRE_25 + A2 A 1 DFF A------- Low Slow inst_CLK_OUT_PRE_50 + B13 B 1 DFF -B----GH Low Slow inst_CLK_OUT_PRE_D + C13 C 9 DFF A-C----- Low Slow inst_DS_000_DMA + F1 F 3 DFF ---D-F-- Low Slow inst_DS_000_ENABLE + C7 C 1 DFF -----F-- Low Slow inst_DTACK_D0 + B6 B 3 DFF -B-D---- Low Slow inst_LDS_000_INT + G9 G 2 DFF ABCDE-GH Low Slow inst_RESET_OUT + D14 D 2 DFF ---D---- Low Slow inst_UDS_000_INT + A9 A 1 DFF ---D-F-- Low Slow inst_VPA_D ---------------------------------------------------------------------- Power : Hi = High @@ -470,199 +469,196 @@ Signals_Fanout_List ~~~~~~~~~~~~~~~~~~~ Signal Source : Fanout List ----------------------------------------------------------------------------- - SIZE_1_{ I}:inst_LDS_000_INT{ D} + SIZE_1_{ I}:inst_LDS_000_INT{ B} AHIGH_31_{ C}: CIIN{ E} CIIN_0{ E} A_DECODE_23_{ I}: CIIN{ E} CIIN_0{ E} IPL_2_{ H}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} - : IPL_D0_2_{ A} - FC_1_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ C} + : IPL_D0_2_{ G} + FC_1_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ A} AS_030{ I}: AS_000{ E} BERR{ E} FPU_CS{ H} - : inst_AS_030_D0{ A} + : inst_AS_030_D0{ D} + SIZE_0_{ H}:inst_LDS_000_INT{ B} AS_000{ F}: AS_030{ H} DS_030{ A}AMIGA_BUS_DATA_DIR{ E} - : BGACK_030{ H}inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} - : CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} inst_CLK_030_H{ A} - UDS_000{ E}: A_0_{ G}inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} - : SIZE_DMA_0_{ G} SIZE_DMA_1_{ G} inst_CLK_030_H{ A} - LDS_000{ E}:inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} SIZE_DMA_0_{ G} - : SIZE_DMA_1_{ G} inst_CLK_030_H{ A} + : BGACK_030{ H}inst_AS_000_DMA{ C}inst_DS_000_DMA{ C} + : CYCLE_DMA_0_{ C} CYCLE_DMA_1_{ C} inst_CLK_030_H{ C} + AHIGH_30_{ C}: CIIN{ E} CIIN_0{ E} + AHIGH_29_{ C}: CIIN{ E} CIIN_0{ E} + AHIGH_28_{ D}: CIIN{ E} CIIN_0{ E} + UDS_000{ E}: A_0_{ G}inst_AS_000_DMA{ C}inst_DS_000_DMA{ C} + : SIZE_DMA_0_{ G} SIZE_DMA_1_{ G} inst_CLK_030_H{ C} + AHIGH_27_{ D}: CIIN{ E} CIIN_0{ E} + LDS_000{ E}:inst_AS_000_DMA{ C}inst_DS_000_DMA{ C} SIZE_DMA_0_{ G} + : SIZE_DMA_1_{ G} inst_CLK_030_H{ C} + AHIGH_26_{ D}: CIIN{ E} CIIN_0{ E} nEXP_SPACE{. }: SIZE_1_{ H} AHIGH_31_{ B} AS_030{ H} - : DS_030{ A} SIZE_0_{ G} AHIGH_30_{ B} - : AHIGH_29_{ B} AHIGH_28_{ C} AHIGH_27_{ C} + : SIZE_0_{ G} AHIGH_30_{ B} AHIGH_29_{ B} + : DS_030{ A} AHIGH_28_{ C} AHIGH_27_{ C} : AHIGH_26_{ C} AHIGH_25_{ C} AHIGH_24_{ C} :AMIGA_BUS_DATA_DIR{ E} BG_000{ D} DSACK1{ H} - : A_0_{ G}inst_AS_030_000_SYNC{ C} SM_AMIGA_6_{ C} + : A_0_{ G}inst_AS_030_000_SYNC{ A} SM_AMIGA_6_{ A} : SM_AMIGA_i_7_{ F} CIIN_0{ E} - BERR{ F}: DSACK1{ H}inst_AS_000_INT{ C}inst_AS_030_000_SYNC{ C} - :inst_DS_000_ENABLE{ B} SM_AMIGA_6_{ C} SM_AMIGA_0_{ G} - : SM_AMIGA_4_{ B} SM_AMIGA_1_{ F} SM_AMIGA_5_{ F} - : SM_AMIGA_3_{ F} SM_AMIGA_2_{ F} SM_AMIGA_i_7_{ F} - BG_030{ D}: BG_000{ D} - SIZE_0_{ H}:inst_LDS_000_INT{ D} - AHIGH_30_{ C}: CIIN{ E} CIIN_0{ E} - BGACK_000{ E}: BERR{ E} FPU_CS{ H} BGACK_030{ H} - AHIGH_29_{ C}: CIIN{ E} CIIN_0{ E} - CLK_030{. }: DSACK1{ H}inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} - : inst_CLK_030_H{ A} - AHIGH_28_{ D}: CIIN{ E} CIIN_0{ E} - CLK_000{. }: CLK_000_D_0_{ C} - AHIGH_27_{ D}: CIIN{ E} CIIN_0{ E} - AHIGH_26_{ D}: CIIN{ E} CIIN_0{ E} AHIGH_25_{ D}: CIIN{ E} CIIN_0{ E} + BERR{ F}: DSACK1{ H}inst_AS_000_INT{ A}inst_AS_030_000_SYNC{ A} + :inst_DS_000_ENABLE{ F} SM_AMIGA_6_{ A} SM_AMIGA_4_{ F} + : SM_AMIGA_0_{ F} SM_AMIGA_1_{ F} SM_AMIGA_5_{ F} + : SM_AMIGA_3_{ F} SM_AMIGA_2_{ F} SM_AMIGA_i_7_{ F} AHIGH_24_{ D}: CIIN{ E} CIIN_0{ E} + BG_030{ D}: BG_000{ D} A_DECODE_22_{ I}: CIIN{ E} CIIN_0{ E} - FPU_SENSE{ B}: BERR{ E} FPU_CS{ H} A_DECODE_21_{ B}: CIIN{ E} CIIN_0{ E} A_DECODE_20_{ B}: CIIN{ E} CIIN_0{ E} - DTACK{ E}: inst_DTACK_D0{ G} -A_DECODE_19_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ C} -A_DECODE_18_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ C} -A_DECODE_17_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ C} - VPA{. }: inst_VPA_D{ F} -A_DECODE_16_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ C} + BGACK_000{ E}: BERR{ E} FPU_CS{ H} BGACK_030{ H} +A_DECODE_19_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ A} + CLK_030{. }: DSACK1{ H}inst_AS_000_DMA{ C}inst_DS_000_DMA{ C} + : inst_CLK_030_H{ C} +A_DECODE_18_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ A} + CLK_000{. }: CLK_000_D_0_{ E} +A_DECODE_17_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ A} +A_DECODE_16_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ A} + FPU_SENSE{ B}: BERR{ E} FPU_CS{ H} + DTACK{ E}: inst_DTACK_D0{ C} + VPA{. }: inst_VPA_D{ A} RST{. }: IPL_030_2_{ B} RW_000{ H} BG_000{ D} : BGACK_030{ H} DSACK1{ H} VMA{ D} : RW{ G} A_0_{ G} IPL_030_1_{ B} - : IPL_030_0_{ B}inst_AS_000_INT{ C}inst_AMIGA_BUS_ENABLE_DMA_LOW{ G} - : inst_AS_030_D0{ A}inst_AS_030_000_SYNC{ C}inst_BGACK_030_INT_D{ H} - :inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} CYCLE_DMA_0_{ A} - : CYCLE_DMA_1_{ A} SIZE_DMA_0_{ G} SIZE_DMA_1_{ G} - : inst_VPA_D{ F}inst_UDS_000_INT{ D}inst_LDS_000_INT{ D} - : inst_DTACK_D0{ G} inst_RESET_OUT{ A} IPL_D0_0_{ B} - : IPL_D0_1_{ B} IPL_D0_2_{ A}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ G} - :inst_DS_000_ENABLE{ B} SM_AMIGA_6_{ C} SM_AMIGA_0_{ G} - : SM_AMIGA_4_{ B} RST_DLY_0_{ F} RST_DLY_1_{ F} - : RST_DLY_2_{ F} inst_CLK_030_H{ A} SM_AMIGA_1_{ F} + : IPL_030_0_{ B}inst_AS_000_INT{ A}inst_AMIGA_BUS_ENABLE_DMA_LOW{ C} + : inst_AS_030_D0{ D}inst_AS_030_000_SYNC{ A}inst_BGACK_030_INT_D{ F} + :inst_AS_000_DMA{ C}inst_DS_000_DMA{ C} CYCLE_DMA_0_{ C} + : CYCLE_DMA_1_{ C} SIZE_DMA_0_{ G} SIZE_DMA_1_{ G} + : inst_VPA_D{ A}inst_UDS_000_INT{ D}inst_LDS_000_INT{ B} + : inst_DTACK_D0{ C} inst_RESET_OUT{ G} IPL_D0_0_{ A} + : IPL_D0_1_{ B} IPL_D0_2_{ G}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ G} + :inst_DS_000_ENABLE{ F} SM_AMIGA_6_{ A} SM_AMIGA_4_{ F} + : SM_AMIGA_0_{ F} RST_DLY_0_{ G} RST_DLY_1_{ G} + : RST_DLY_2_{ G} inst_CLK_030_H{ C} SM_AMIGA_1_{ F} : SM_AMIGA_5_{ F} SM_AMIGA_3_{ F} SM_AMIGA_2_{ F} : SM_AMIGA_i_7_{ F} IPL_1_{ G}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} : IPL_D0_1_{ B} IPL_0_{ H}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} - : IPL_D0_0_{ B} - FC_0_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ C} - A_1_{ G}:inst_AMIGA_BUS_ENABLE_DMA_LOW{ G}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ G} + : IPL_D0_0_{ A} + FC_0_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ A} + A_1_{ G}:inst_AMIGA_BUS_ENABLE_DMA_LOW{ C}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ G} RN_IPL_030_2_{ C}: IPL_030_2_{ B} - RW_000{ I}:AMIGA_BUS_DATA_DIR{ E} RW{ G}inst_DS_000_DMA{ A} + RW_000{ I}:AMIGA_BUS_DATA_DIR{ E} RW{ G}inst_DS_000_DMA{ C} RN_RW_000{ I}: RW_000{ H} RN_BG_000{ E}: BG_000{ D} RN_BGACK_030{ I}: SIZE_1_{ H} AHIGH_31_{ B} AS_030{ H} - : AS_000{ E} DS_030{ A} UDS_000{ D} - : LDS_000{ D} SIZE_0_{ G} AHIGH_30_{ B} - : AHIGH_29_{ B} AHIGH_28_{ C} AHIGH_27_{ C} + : SIZE_0_{ G} AS_000{ E} AHIGH_30_{ B} + : AHIGH_29_{ B} DS_030{ A} AHIGH_28_{ C} + : UDS_000{ D} AHIGH_27_{ C} LDS_000{ D} : AHIGH_26_{ C} AHIGH_25_{ C} AHIGH_24_{ C} :AMIGA_BUS_DATA_DIR{ E}AMIGA_BUS_ENABLE_LOW{ C}AMIGA_BUS_ENABLE_HIGH{ D} : RW_000{ H} BGACK_030{ H} RW{ G} - : A_0_{ G}inst_AMIGA_BUS_ENABLE_DMA_LOW{ G}inst_AS_030_000_SYNC{ C} - :inst_BGACK_030_INT_D{ H}inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} - : CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} SIZE_DMA_0_{ G} - : SIZE_DMA_1_{ G}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ G} inst_CLK_030_H{ A} + : A_0_{ G}inst_AMIGA_BUS_ENABLE_DMA_LOW{ C}inst_AS_030_000_SYNC{ A} + :inst_BGACK_030_INT_D{ F}inst_AS_000_DMA{ C}inst_DS_000_DMA{ C} + : CYCLE_DMA_0_{ C} CYCLE_DMA_1_{ C} SIZE_DMA_0_{ G} + : SIZE_DMA_1_{ G}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ G} inst_CLK_030_H{ C} RN_DSACK1{ I}: DSACK1{ H} RN_VMA{ E}: VMA{ D} SM_AMIGA_3_{ F} SM_AMIGA_2_{ F} : SM_AMIGA_i_7_{ F} - RW{ H}: RW_000{ H}inst_DS_000_ENABLE{ B} + RW{ H}: RW_000{ H}inst_DS_000_ENABLE{ F} RN_RW{ H}: RW{ G} - A_0_{ H}:inst_UDS_000_INT{ D}inst_LDS_000_INT{ D} + A_0_{ H}:inst_UDS_000_INT{ D}inst_LDS_000_INT{ B} RN_A_0_{ H}: A_0_{ G} RN_IPL_030_1_{ C}: IPL_030_1_{ B} RN_IPL_030_0_{ C}: IPL_030_0_{ B} cpu_est_3_{ E}: E{ G} VMA{ D} cpu_est_3_{ D} - : cpu_est_1_{ F} SM_AMIGA_3_{ F} SM_AMIGA_2_{ F} + : cpu_est_1_{ D} SM_AMIGA_3_{ F} SM_AMIGA_2_{ F} : SM_AMIGA_i_7_{ F} cpu_est_0_{ E}: VMA{ D} cpu_est_3_{ D} cpu_est_0_{ D} - : cpu_est_1_{ F} cpu_est_2_{ D} SM_AMIGA_3_{ F} + : cpu_est_1_{ D} cpu_est_2_{ D} SM_AMIGA_3_{ F} : SM_AMIGA_2_{ F} SM_AMIGA_i_7_{ F} - cpu_est_1_{ G}: E{ G} VMA{ D} cpu_est_3_{ D} - : cpu_est_1_{ F} cpu_est_2_{ D} SM_AMIGA_3_{ F} + cpu_est_1_{ E}: E{ G} VMA{ D} cpu_est_3_{ D} + : cpu_est_1_{ D} cpu_est_2_{ D} SM_AMIGA_3_{ F} : SM_AMIGA_2_{ F} SM_AMIGA_i_7_{ F} cpu_est_2_{ E}: E{ G} VMA{ D} cpu_est_3_{ D} : cpu_est_2_{ D} SM_AMIGA_3_{ F} SM_AMIGA_2_{ F} : SM_AMIGA_i_7_{ F} -inst_AS_000_INT{ D}: AS_000{ E}inst_AS_000_INT{ C} -inst_AMIGA_BUS_ENABLE_DMA_LOW{ H}:AMIGA_BUS_ENABLE_LOW{ C}inst_AMIGA_BUS_ENABLE_DMA_LOW{ G} -inst_AS_030_D0{ B}: CIIN{ E} BG_000{ D} DSACK1{ H} - :inst_AS_000_INT{ C}inst_AS_030_000_SYNC{ C}inst_DS_000_ENABLE{ B} +inst_AS_000_INT{ B}: AS_000{ E}inst_AS_000_INT{ A} +inst_AMIGA_BUS_ENABLE_DMA_LOW{ D}:AMIGA_BUS_ENABLE_LOW{ C}inst_AMIGA_BUS_ENABLE_DMA_LOW{ C} +inst_AS_030_D0{ E}: CIIN{ E} BG_000{ D} DSACK1{ H} + :inst_AS_000_INT{ A}inst_AS_030_000_SYNC{ A}inst_DS_000_ENABLE{ F} : CIIN_0{ E} -inst_AS_030_000_SYNC{ D}:AMIGA_BUS_ENABLE_HIGH{ D}inst_AS_030_000_SYNC{ C} SM_AMIGA_6_{ C} +inst_AS_030_000_SYNC{ B}:AMIGA_BUS_ENABLE_HIGH{ D}inst_AS_030_000_SYNC{ A} SM_AMIGA_6_{ A} : SM_AMIGA_i_7_{ F} -inst_BGACK_030_INT_D{ I}: RW{ G} A_0_{ G}inst_AMIGA_BUS_ENABLE_DMA_LOW{ G} - :inst_AS_030_000_SYNC{ C} SIZE_DMA_0_{ G} SIZE_DMA_1_{ G} +inst_BGACK_030_INT_D{ G}: RW{ G} A_0_{ G}inst_AMIGA_BUS_ENABLE_DMA_LOW{ C} + :inst_AS_030_000_SYNC{ A} SIZE_DMA_0_{ G} SIZE_DMA_1_{ G} :inst_AMIGA_BUS_ENABLE_DMA_HIGH{ G} -inst_AS_000_DMA{ B}: AS_030{ H}inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} - : inst_CLK_030_H{ A} -inst_DS_000_DMA{ B}: DS_030{ A}inst_DS_000_DMA{ A} -CYCLE_DMA_0_{ B}:inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} CYCLE_DMA_0_{ A} - : CYCLE_DMA_1_{ A} inst_CLK_030_H{ A} -CYCLE_DMA_1_{ B}:inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} CYCLE_DMA_1_{ A} - : inst_CLK_030_H{ A} +inst_AS_000_DMA{ D}: AS_030{ H}inst_AS_000_DMA{ C}inst_DS_000_DMA{ C} + : inst_CLK_030_H{ C} +inst_DS_000_DMA{ D}: DS_030{ A}inst_DS_000_DMA{ C} +CYCLE_DMA_0_{ D}:inst_AS_000_DMA{ C}inst_DS_000_DMA{ C} CYCLE_DMA_0_{ C} + : CYCLE_DMA_1_{ C} inst_CLK_030_H{ C} +CYCLE_DMA_1_{ D}:inst_AS_000_DMA{ C}inst_DS_000_DMA{ C} CYCLE_DMA_1_{ C} + : inst_CLK_030_H{ C} SIZE_DMA_0_{ H}: SIZE_1_{ H} SIZE_0_{ G} SIZE_DMA_0_{ G} SIZE_DMA_1_{ H}: SIZE_1_{ H} SIZE_0_{ G} SIZE_DMA_1_{ G} - inst_VPA_D{ G}: VMA{ D} SM_AMIGA_3_{ F} SM_AMIGA_2_{ F} + inst_VPA_D{ B}: VMA{ D} SM_AMIGA_3_{ F} SM_AMIGA_2_{ F} : SM_AMIGA_i_7_{ F} inst_UDS_000_INT{ E}: UDS_000{ D}inst_UDS_000_INT{ D} -inst_LDS_000_INT{ E}: LDS_000{ D}inst_LDS_000_INT{ D} -inst_CLK_OUT_PRE_D{ F}: CLK_DIV_OUT{ G} CLK_EXP{ B} DSACK1{ H} -CLK_000_D_1_{ I}: RW_000{ H} BGACK_030{ H} VMA{ D} - : cpu_est_3_{ D} cpu_est_0_{ D} cpu_est_1_{ F} - : cpu_est_2_{ D}inst_AS_000_INT{ C} CYCLE_DMA_0_{ A} - : CYCLE_DMA_1_{ A} inst_RESET_OUT{ A} CLK_000_D_2_{ E} - :inst_DS_000_ENABLE{ B} SM_AMIGA_6_{ C} SM_AMIGA_0_{ G} - : SM_AMIGA_4_{ B} RST_DLY_0_{ F} RST_DLY_1_{ F} - : RST_DLY_2_{ F} SM_AMIGA_1_{ F} SM_AMIGA_5_{ F} - : SM_AMIGA_3_{ F} SM_AMIGA_2_{ F} SM_AMIGA_i_7_{ F} -CLK_000_D_10_{ D}: DSACK1{ H} CLK_000_D_11_{ H} -CLK_000_D_11_{ I}: DSACK1{ H} CLK_000_D_12_{ G} -inst_DTACK_D0{ H}: SM_AMIGA_3_{ F} SM_AMIGA_2_{ F} SM_AMIGA_i_7_{ F} -inst_RESET_OUT{ B}: AHIGH_31_{ B} AS_030{ H} AS_000{ E} - : DS_030{ A} UDS_000{ D} LDS_000{ D} - : AHIGH_30_{ B} AHIGH_29_{ B} AHIGH_28_{ C} - : AHIGH_27_{ C} AHIGH_26_{ C} AHIGH_25_{ C} +inst_LDS_000_INT{ C}: LDS_000{ D}inst_LDS_000_INT{ B} +inst_CLK_OUT_PRE_D{ C}: CLK_DIV_OUT{ G} CLK_EXP{ B} DSACK1{ H} +CLK_000_D_8_{ F}: DSACK1{ H} CLK_000_D_9_{ H} +CLK_000_D_9_{ I}: DSACK1{ H} CLK_000_D_10_{ F} +inst_DTACK_D0{ D}: SM_AMIGA_3_{ F} SM_AMIGA_2_{ F} SM_AMIGA_i_7_{ F} +inst_RESET_OUT{ H}: AHIGH_31_{ B} AS_030{ H} AS_000{ E} + : AHIGH_30_{ B} AHIGH_29_{ B} DS_030{ A} + : AHIGH_28_{ C} UDS_000{ D} AHIGH_27_{ C} + : LDS_000{ D} AHIGH_26_{ C} AHIGH_25_{ C} : AHIGH_24_{ C} RESET{ B} RW_000{ H} - : RW{ G} A_0_{ G} inst_RESET_OUT{ A} -CLK_000_D_0_{ D}: RW_000{ H} BG_000{ D} BGACK_030{ H} + : RW{ G} A_0_{ G} inst_RESET_OUT{ G} +CLK_000_D_1_{ I}: RW_000{ H} BGACK_030{ H} DSACK1{ H} : VMA{ D} cpu_est_3_{ D} cpu_est_0_{ D} - : cpu_est_1_{ F} cpu_est_2_{ D}inst_AS_000_INT{ C} - : CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} CLK_000_D_1_{ H} - : inst_RESET_OUT{ A}inst_DS_000_ENABLE{ B} SM_AMIGA_6_{ C} - : SM_AMIGA_0_{ G} SM_AMIGA_4_{ B} RST_DLY_0_{ F} - : RST_DLY_1_{ F} RST_DLY_2_{ F} SM_AMIGA_1_{ F} + : cpu_est_1_{ D} cpu_est_2_{ D}inst_AS_000_INT{ A} + : CYCLE_DMA_0_{ C} CYCLE_DMA_1_{ C} inst_RESET_OUT{ G} + : CLK_000_D_2_{ H}inst_DS_000_ENABLE{ F} SM_AMIGA_6_{ A} + : SM_AMIGA_4_{ F} SM_AMIGA_0_{ F} RST_DLY_0_{ G} + : RST_DLY_1_{ G} RST_DLY_2_{ G} SM_AMIGA_1_{ F} : SM_AMIGA_5_{ F} SM_AMIGA_3_{ F} SM_AMIGA_2_{ F} : SM_AMIGA_i_7_{ F} -inst_CLK_OUT_PRE_50{ F}:inst_CLK_OUT_PRE_D{ E}inst_CLK_OUT_PRE_50{ E} - IPL_D0_0_{ C}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} +CLK_000_D_0_{ F}: RW_000{ H} BG_000{ D} BGACK_030{ H} + : DSACK1{ H} VMA{ D} cpu_est_3_{ D} + : cpu_est_0_{ D} cpu_est_1_{ D} cpu_est_2_{ D} + :inst_AS_000_INT{ A} CYCLE_DMA_0_{ C} CYCLE_DMA_1_{ C} + : inst_RESET_OUT{ G} CLK_000_D_1_{ H}inst_DS_000_ENABLE{ F} + : SM_AMIGA_6_{ A} SM_AMIGA_4_{ F} SM_AMIGA_0_{ F} + : RST_DLY_0_{ G} RST_DLY_1_{ G} RST_DLY_2_{ G} + : SM_AMIGA_1_{ F} SM_AMIGA_5_{ F} SM_AMIGA_3_{ F} + : SM_AMIGA_2_{ F} SM_AMIGA_i_7_{ F} +inst_CLK_OUT_PRE_50{ B}:inst_CLK_OUT_PRE_50{ A}inst_CLK_OUT_PRE_25{ A} +inst_CLK_OUT_PRE_25{ B}:inst_CLK_OUT_PRE_D{ B}inst_CLK_OUT_PRE_25{ A} + IPL_D0_0_{ B}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} IPL_D0_1_{ C}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} - IPL_D0_2_{ B}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} -CLK_000_D_2_{ F}: CLK_000_D_3_{ E} SM_AMIGA_6_{ C} SM_AMIGA_i_7_{ F} -CLK_000_D_3_{ F}: CLK_000_D_4_{ C} -CLK_000_D_4_{ D}: CLK_000_D_5_{ E} -CLK_000_D_5_{ F}: CLK_000_D_6_{ D} -CLK_000_D_6_{ E}: CLK_000_D_7_{ A} -CLK_000_D_7_{ B}: CLK_000_D_8_{ G} -CLK_000_D_8_{ H}: CLK_000_D_9_{ A} -CLK_000_D_9_{ B}: CLK_000_D_10_{ C} -CLK_000_D_12_{ H}: DSACK1{ H} + IPL_D0_2_{ H}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} +CLK_000_D_2_{ I}: CLK_000_D_3_{ E} +CLK_000_D_3_{ F}: CLK_000_D_4_{ D} +CLK_000_D_4_{ E}: CLK_000_D_5_{ B} +CLK_000_D_5_{ C}: CLK_000_D_6_{ B} +CLK_000_D_6_{ C}: CLK_000_D_7_{ E} +CLK_000_D_7_{ F}: CLK_000_D_8_{ E} +CLK_000_D_10_{ G}: DSACK1{ H} inst_AMIGA_BUS_ENABLE_DMA_HIGH{ H}:AMIGA_BUS_ENABLE_HIGH{ D}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ G} -inst_DS_000_ENABLE{ C}: UDS_000{ D} LDS_000{ D}inst_DS_000_ENABLE{ B} -SM_AMIGA_6_{ D}: RW_000{ H}inst_AS_000_INT{ C}inst_UDS_000_INT{ D} - :inst_LDS_000_INT{ D}inst_DS_000_ENABLE{ B} SM_AMIGA_6_{ C} +inst_DS_000_ENABLE{ G}: UDS_000{ D} LDS_000{ D}inst_DS_000_ENABLE{ F} +SM_AMIGA_6_{ B}: RW_000{ H}inst_AS_000_INT{ A}inst_UDS_000_INT{ D} + :inst_LDS_000_INT{ B}inst_DS_000_ENABLE{ F} SM_AMIGA_6_{ A} : SM_AMIGA_5_{ F} SM_AMIGA_i_7_{ F} -SM_AMIGA_0_{ H}: RW_000{ H}inst_DS_000_ENABLE{ B} SM_AMIGA_0_{ G} +SM_AMIGA_4_{ G}:inst_DS_000_ENABLE{ F} SM_AMIGA_4_{ F} SM_AMIGA_3_{ F} : SM_AMIGA_i_7_{ F} -SM_AMIGA_4_{ C}:inst_DS_000_ENABLE{ B} SM_AMIGA_4_{ B} SM_AMIGA_3_{ F} - : SM_AMIGA_i_7_{ F} - RST_DLY_0_{ G}: inst_RESET_OUT{ A} RST_DLY_0_{ F} RST_DLY_1_{ F} - : RST_DLY_2_{ F} - RST_DLY_1_{ G}: inst_RESET_OUT{ A} RST_DLY_0_{ F} RST_DLY_1_{ F} - : RST_DLY_2_{ F} - RST_DLY_2_{ G}: inst_RESET_OUT{ A} RST_DLY_0_{ F} RST_DLY_1_{ F} - : RST_DLY_2_{ F} -inst_CLK_030_H{ B}:inst_DS_000_DMA{ A} inst_CLK_030_H{ A} -SM_AMIGA_1_{ G}: DSACK1{ H} SM_AMIGA_0_{ G} SM_AMIGA_1_{ F} - : SM_AMIGA_i_7_{ F} -SM_AMIGA_5_{ G}:inst_DS_000_ENABLE{ B} SM_AMIGA_4_{ B} SM_AMIGA_5_{ F} +SM_AMIGA_0_{ G}: RW_000{ H} SM_AMIGA_0_{ F} SM_AMIGA_i_7_{ F} + RST_DLY_0_{ H}: inst_RESET_OUT{ G} RST_DLY_0_{ G} RST_DLY_1_{ G} + : RST_DLY_2_{ G} + RST_DLY_1_{ H}: inst_RESET_OUT{ G} RST_DLY_0_{ G} RST_DLY_1_{ G} + : RST_DLY_2_{ G} + RST_DLY_2_{ H}: inst_RESET_OUT{ G} RST_DLY_0_{ G} RST_DLY_1_{ G} + : RST_DLY_2_{ G} +inst_CLK_030_H{ D}:inst_DS_000_DMA{ C} inst_CLK_030_H{ C} +SM_AMIGA_1_{ G}: DSACK1{ H} SM_AMIGA_0_{ F} SM_AMIGA_1_{ F} : SM_AMIGA_i_7_{ F} +SM_AMIGA_5_{ G}: SM_AMIGA_4_{ F} SM_AMIGA_5_{ F} SM_AMIGA_i_7_{ F} SM_AMIGA_3_{ G}: SM_AMIGA_3_{ F} SM_AMIGA_2_{ F} SM_AMIGA_i_7_{ F} SM_AMIGA_2_{ G}: SM_AMIGA_1_{ F} SM_AMIGA_2_{ F} SM_AMIGA_i_7_{ F} -SM_AMIGA_i_7_{ G}: RW_000{ H}inst_AS_030_000_SYNC{ C}inst_DS_000_ENABLE{ B} - : SM_AMIGA_6_{ C} +SM_AMIGA_i_7_{ G}: RW_000{ H}inst_AS_030_000_SYNC{ A} SM_AMIGA_6_{ A} CIIN_0{ F}: CIIN{ E} ----------------------------------------------------------------------------- @@ -673,24 +669,21 @@ Set_Reset_Summary ~~~~~~~~~~~~~~~~~ Block A -block level set pt : GND -block level reset pt : GND +block level set pt : +block level reset pt : Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name +-----+-----+-----+-----+------------------------ | | | | | DS_030 | | | | | AVEC -| * | S | BS | BR | inst_RESET_OUT -| * | S | BS | BR | inst_AS_030_D0 -| * | S | BS | BR | inst_AS_000_DMA -| * | S | BS | BR | inst_DS_000_DMA -| * | S | BS | BR | inst_CLK_030_H -| * | S | BS | BR | CYCLE_DMA_1_ -| * | S | BS | BR | CYCLE_DMA_0_ -| * | S | BS | BR | CLK_000_D_9_ -| * | S | BS | BR | CLK_000_D_7_ -| * | S | BS | BR | IPL_D0_2_ +| * | S | BS | BR | SM_AMIGA_6_ +| * | S | BS | BR | inst_AS_030_000_SYNC +| * | S | BS | BR | inst_CLK_OUT_PRE_25 +| * | S | BS | BR | inst_AS_000_INT +| * | S | BS | BR | inst_VPA_D +| * | S | BS | BR | IPL_D0_0_ +| * | S | BS | BR | inst_CLK_OUT_PRE_50 | | | | | A_DECODE_19_ | | | | | A_DECODE_16_ | | | | | A_DECODE_18_ @@ -700,8 +693,8 @@ Equations : Block B -block level set pt : GND -block level reset pt : GND +block level set pt : +block level reset pt : Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name @@ -714,18 +707,19 @@ Equations : | * | S | BS | BR | IPL_030_1_ | * | S | BS | BR | CLK_EXP | | | | | RESET -| * | S | BS | BR | inst_DS_000_ENABLE -| * | S | BS | BR | SM_AMIGA_4_ +| * | S | BS | BR | inst_CLK_OUT_PRE_D +| * | S | BS | BR | inst_LDS_000_INT | * | S | BS | BR | RN_IPL_030_0_ | * | S | BS | BR | RN_IPL_030_1_ | * | S | BS | BR | RN_IPL_030_2_ +| * | S | BS | BR | CLK_000_D_6_ +| * | S | BS | BR | CLK_000_D_5_ | * | S | BS | BR | IPL_D0_1_ -| * | S | BS | BR | IPL_D0_0_ Block C -block level set pt : GND -block level reset pt : GND +block level set pt : +block level reset pt : Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name @@ -736,18 +730,19 @@ Equations : | | | | | AHIGH_27_ | | | | | AHIGH_28_ | | | | | AMIGA_BUS_ENABLE_LOW -| * | S | BS | BR | CLK_000_D_0_ -| * | S | BS | BR | SM_AMIGA_6_ -| * | S | BS | BR | inst_AS_030_000_SYNC -| * | S | BS | BR | inst_AS_000_INT -| * | S | BS | BR | CLK_000_D_4_ -| * | S | BS | BR | CLK_000_D_10_ +| * | S | BS | BR | inst_DS_000_DMA +| * | S | BS | BR | inst_AS_000_DMA +| * | S | BS | BR | inst_CLK_030_H +| * | S | BS | BR | CYCLE_DMA_1_ +| * | S | BS | BR | CYCLE_DMA_0_ +| * | S | BS | BR | inst_AMIGA_BUS_ENABLE_DMA_LOW +| * | S | BS | BR | inst_DTACK_D0 | | | | | BG_030 Block D -block level set pt : GND -block level reset pt : GND +block level set pt : +block level reset pt : Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name @@ -758,54 +753,54 @@ Equations : | | | | | AMIGA_BUS_ENABLE_HIGH | * | S | BS | BR | BG_000 | | | | | AMIGA_ADDR_ENABLE +| * | S | BS | BR | inst_AS_030_D0 +| * | S | BS | BR | cpu_est_1_ | * | S | BS | BR | cpu_est_3_ | * | S | BS | BR | cpu_est_2_ | * | S | BS | BR | RN_VMA | * | S | BS | BR | cpu_est_0_ -| * | S | BS | BR | inst_LDS_000_INT | * | S | BS | BR | RN_BG_000 | * | S | BS | BR | inst_UDS_000_INT -| * | S | BS | BR | CLK_000_D_6_ +| * | S | BS | BR | CLK_000_D_4_ | | | | | BGACK_000 | | | | | DTACK Block E -block level set pt : GND -block level reset pt : GND +block level set pt : +block level reset pt : Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name +-----+-----+-----+-----+------------------------ -| | | | | BERR | | | | | AS_000 +| | | | | BERR | | | | | AMIGA_BUS_DATA_DIR | | | | | CIIN -| * | S | BS | BR | CLK_000_D_2_ -| * | S | BS | BR | inst_CLK_OUT_PRE_D +| * | S | BS | BR | CLK_000_D_0_ | | | | | CIIN_0 -| * | S | BS | BR | CLK_000_D_5_ +| * | S | BS | BR | CLK_000_D_7_ | * | S | BS | BR | CLK_000_D_3_ -| * | S | BS | BR | inst_CLK_OUT_PRE_50 +| * | S | BS | BR | CLK_000_D_8_ Block F -block level set pt : GND -block level reset pt : GND +block level set pt : +block level reset pt : Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name +-----+-----+-----+-----+------------------------ +| * | S | BS | BR | inst_BGACK_030_INT_D | * | S | BS | BR | SM_AMIGA_i_7_ -| * | S | BS | BR | cpu_est_1_ | * | S | BS | BR | SM_AMIGA_1_ -| * | S | BS | BR | RST_DLY_0_ -| * | S | BS | BR | SM_AMIGA_5_ -| * | S | BS | BR | RST_DLY_2_ -| * | S | BS | BR | RST_DLY_1_ -| * | S | BS | BR | inst_VPA_D +| * | S | BS | BR | SM_AMIGA_0_ +| * | S | BS | BR | inst_DS_000_ENABLE | * | S | BS | BR | SM_AMIGA_2_ | * | S | BS | BR | SM_AMIGA_3_ +| * | S | BS | BR | SM_AMIGA_5_ +| * | S | BS | BR | SM_AMIGA_4_ +| * | S | BS | BR | CLK_000_D_10_ | | | | | A_DECODE_17_ | | | | | FC_1_ | | | | | FC_0_ @@ -814,34 +809,34 @@ Equations : Block G -block level set pt : GND -block level reset pt : GND +block level set pt : +block level reset pt : Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name +-----+-----+-----+-----+------------------------ -| * | S | BS | BR | RW | * | S | BS | BR | A_0_ +| * | S | BS | BR | RW | | | | | SIZE_0_ | | | | | E | * | S | BS | BR | CLK_DIV_OUT -| * | S | BS | BR | SM_AMIGA_0_ +| * | S | BS | BR | inst_RESET_OUT | * | S | BS | BR | SIZE_DMA_1_ | * | S | BS | BR | SIZE_DMA_0_ | * | S | BS | BR | inst_AMIGA_BUS_ENABLE_DMA_HIGH -| * | S | BS | BR | inst_AMIGA_BUS_ENABLE_DMA_LOW +| * | S | BS | BR | RST_DLY_0_ | * | S | BS | BR | RN_A_0_ | * | S | BS | BR | RN_RW -| * | S | BS | BR | CLK_000_D_12_ -| * | S | BS | BR | CLK_000_D_8_ -| * | S | BS | BR | inst_DTACK_D0 +| * | S | BS | BR | RST_DLY_2_ +| * | S | BS | BR | RST_DLY_1_ +| * | S | BS | BR | IPL_D0_2_ | | | | | IPL_2_ | | | | | IPL_0_ Block H -block level set pt : GND -block level reset pt : GND +block level set pt : +block level reset pt : Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name @@ -852,12 +847,12 @@ Equations : | * | S | BS | BR | DSACK1 | * | S | BS | BR | BGACK_030 | | | | | FPU_CS -| * | S | BS | BR | CLK_000_D_1_ | * | S | BS | BR | RN_BGACK_030 -| * | S | BS | BR | CLK_000_D_11_ -| * | S | BS | BR | inst_BGACK_030_INT_D +| * | S | BS | BR | CLK_000_D_1_ +| * | S | BS | BR | CLK_000_D_9_ | * | S | BS | BR | RN_DSACK1 | * | S | BS | BR | RN_RW_000 +| * | S | BS | BR | CLK_000_D_2_ | | | | | A_DECODE_23_ | | | | | A_DECODE_22_ @@ -876,23 +871,23 @@ BLOCK_A_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx A0 RST pin 86 mx A17 CLK_000_D_6_ mcell D14 -mx A1 RST_DLY_2_ mcell F9 mx A18 inst_CLK_030_H mcell A5 -mx A2 CYCLE_DMA_1_ mcell A9 mx A19 AS_030 pin 82 -mx A3 inst_RESET_OUT mcell A8 mx A20 RN_BGACK_030 mcell H4 -mx A4 CLK_030 pin 64 mx A21 RW_000 pin 80 -mx A5 nEXP_SPACE pin 14 mx A22 IPL_2_ pin 68 -mx A6 RST_DLY_1_ mcell F13 mx A23 ... ... -mx A7 ... ... mx A24 CLK_000_D_8_ mcell G3 -mx A8 UDS_000 pin 32 mx A25 CYCLE_DMA_0_ mcell A13 -mx A9 inst_DS_000_DMA mcell A1 mx A26 ... ... -mx A10 CLK_000_D_1_ mcell H3 mx A27 LDS_000 pin 31 -mx A11 CLK_000_D_0_ mcell C13 mx A28 ... ... -mx A12 ... ... mx A29 ... ... -mx A13 ... ... mx A30 ... ... -mx A14 ... ... mx A31 RST_DLY_0_ mcell F0 -mx A15 inst_AS_000_DMA mcell A12 mx A32 ... ... -mx A16 AS_000 pin 42 +mx A0 IPL_0_ pin 67 mx A17 BERR pin 41 +mx A1 FC_1_ pin 58 mx A18 ... ... +mx A2 inst_AS_000_INT mcell A5 mx A19 ... ... +mx A3 SM_AMIGA_6_ mcell A8 mx A20 RN_BGACK_030 mcell H4 +mx A4 A_DECODE_18_ pin 95 mx A21 RST pin 86 +mx A5 nEXP_SPACE pin 14 mx A22inst_CLK_OUT_PRE_50 mcell A2 +mx A6 FC_0_ pin 57 mx A23 ... ... +mx A7 inst_AS_030_D0 mcell D9 mx A24 ... ... +mx A8 A_DECODE_17_ pin 59 mx A25inst_BGACK_030_INT_D mcell F0 +mx A9inst_CLK_OUT_PRE_25 mcell A1 mx A26 AS_000 pin 42 +mx A10 VPA pin 36 mx A27 inst_RESET_OUT mcell G9 +mx A11 A_DECODE_16_ pin 96 mx A28 ... ... +mx A12 A_DECODE_19_ pin 97 mx A29 ... ... +mx A13 CLK_000_D_1_ mcell H5 mx A30 inst_DS_000_DMA mcell C13 +mx A14 SM_AMIGA_i_7_ mcell F4 mx A31 ... ... +mx A15inst_AS_030_000_SYNC mcell A12 mx A32 ... ... +mx A16 CLK_000_D_0_ mcell E8 ---------------------------------------------------------------------------- @@ -900,23 +895,23 @@ BLOCK_B_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx B0 RN_BGACK_030 mcell H4 mx B17 ... ... -mx B1 BERR pin 41 mx B18 inst_RESET_OUT mcell A8 -mx B2inst_DS_000_ENABLE mcell B6 mx B19 ... ... -mx B3 IPL_1_ pin 56 mx B20 IPL_D0_1_ mcell B14 +mx B0 IPL_0_ pin 67 mx B17 ... ... +mx B1 ... ... mx B18 A_0_ pin 69 +mx B2inst_LDS_000_INT mcell B6 mx B19 ... ... +mx B3 SM_AMIGA_6_ mcell A8 mx B20 CLK_000_D_5_ mcell B14 mx B4 IPL_2_ pin 68 mx B21 RST pin 86 -mx B5 nEXP_SPACE pin 14 mx B22 SM_AMIGA_0_ mcell G5 -mx B6 RN_IPL_030_1_ mcell B9 mx B23 ... ... +mx B5 IPL_D0_1_ mcell B3 mx B22 ... ... +mx B6 SIZE_1_ pin 79 mx B23 RN_BGACK_030 mcell H4 mx B7 ... ... mx B24 ... ... -mx B8 RW pin 71 mx B25 IPL_D0_2_ mcell A3 -mx B9 SM_AMIGA_5_ mcell F5 mx B26 ... ... -mx B10 CLK_000_D_1_ mcell H3 mx B27 RN_IPL_030_2_ mcell B4 -mx B11 CLK_000_D_0_ mcell C13 mx B28 RN_IPL_030_0_ mcell B5 -mx B12 SM_AMIGA_4_ mcell B10 mx B29 ... ... -mx B13 IPL_D0_0_ mcell B3 mx B30inst_CLK_OUT_PRE_D mcell E8 -mx B14 SM_AMIGA_i_7_ mcell F4 mx B31 ... ... -mx B15 inst_AS_030_D0 mcell A6 mx B32 SM_AMIGA_6_ mcell C2 -mx B16 IPL_0_ pin 67 +mx B8 IPL_D0_2_ mcell G7 mx B25 IPL_D0_0_ mcell A13 +mx B9inst_CLK_OUT_PRE_25 mcell A1 mx B26 ... ... +mx B10inst_CLK_OUT_PRE_D mcell B13 mx B27 RN_IPL_030_2_ mcell B4 +mx B11 ... ... mx B28 RN_IPL_030_0_ mcell B5 +mx B12 inst_RESET_OUT mcell G9 mx B29 ... ... +mx B13 CLK_000_D_4_ mcell D3 mx B30 ... ... +mx B14 SIZE_0_ pin 70 mx B31 IPL_1_ pin 56 +mx B15 nEXP_SPACE pin 14 mx B32 ... ... +mx B16 RN_IPL_030_1_ mcell B9 ---------------------------------------------------------------------------- @@ -924,23 +919,23 @@ BLOCK_C_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx C0 RST pin 86 mx C17 BERR pin 41 -mx C1 FC_1_ pin 58 mx C18 inst_RESET_OUT mcell A8 -mx C2 CLK_000_D_3_ mcell E9 mx C19 ... ... -mx C3 CLK_000_D_2_ mcell E2 mx C20 RN_BGACK_030 mcell H4 -mx C4 A_DECODE_18_ pin 95 mx C21 ... ... -mx C5 nEXP_SPACE pin 14 mx C22inst_AMIGA_BUS_ENABLE_DMA_LOW mcell G10 -mx C6 FC_0_ pin 57 mx C23 ... ... -mx C7inst_BGACK_030_INT_D mcell H13 mx C24 ... ... -mx C8 CLK_000_D_9_ mcell A10 mx C25 ... ... -mx C9inst_AS_030_000_SYNC mcell C6 mx C26 ... ... -mx C10 CLK_000_D_1_ mcell H3 mx C27 ... ... -mx C11 A_DECODE_16_ pin 96 mx C28 ... ... -mx C12 A_DECODE_19_ pin 97 mx C29 SM_AMIGA_i_7_ mcell F4 -mx C13 A_DECODE_17_ pin 59 mx C30 CLK_000_D_0_ mcell C13 -mx C14 CLK_000 pin 11 mx C31 ... ... -mx C15 inst_AS_030_D0 mcell A6 mx C32 SM_AMIGA_6_ mcell C2 -mx C16 inst_AS_000_INT mcell C15 +mx C0 RST pin 86 mx C17 ... ... +mx C1 ... ... mx C18 CYCLE_DMA_1_ mcell C10 +mx C2 inst_AS_000_DMA mcell C2 mx C19 ... ... +mx C3 A_1_ pin 60 mx C20 RN_BGACK_030 mcell H4 +mx C4 CLK_030 pin 64 mx C21 ... ... +mx C5 nEXP_SPACE pin 14 mx C22 ... ... +mx C6 RW_000 pin 80 mx C23 ... ... +mx C7 CYCLE_DMA_0_ mcell C14 mx C24 LDS_000 pin 31 +mx C8 UDS_000 pin 32 mx C25inst_BGACK_030_INT_D mcell F0 +mx C9 inst_CLK_030_H mcell C6 mx C26 AS_000 pin 42 +mx C10 inst_RESET_OUT mcell G9 mx C27 ... ... +mx C11 inst_DS_000_DMA mcell C13 mx C28 ... ... +mx C12inst_AMIGA_BUS_ENABLE_DMA_LOW mcell C3 mx C29 ... ... +mx C13 CLK_000_D_1_ mcell H5 mx C30 ... ... +mx C14 DTACK pin 30 mx C31 ... ... +mx C15 ... ... mx C32 ... ... +mx C16 CLK_000_D_0_ mcell E8 ---------------------------------------------------------------------------- @@ -948,23 +943,23 @@ BLOCK_D_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx D0 A_0_ pin 69 mx D17 SIZE_0_ pin 70 -mx D1 RN_VMA mcell D0 mx D18 inst_RESET_OUT mcell A8 -mx D2inst_UDS_000_INT mcell D10 mx D19 ... ... -mx D3 cpu_est_0_ mcell D2 mx D20 RN_BGACK_030 mcell H4 -mx D4 BG_030 pin 21 mx D21 cpu_est_2_ mcell D13 -mx D5 nEXP_SPACE pin 14 mx D22 SM_AMIGA_6_ mcell C2 -mx D6 SIZE_1_ pin 79 mx D23inst_AMIGA_BUS_ENABLE_DMA_HIGH mcell G6 -mx D7 cpu_est_3_ mcell D9 mx D24 RST pin 86 -mx D8 ... ... mx D25 ... ... -mx D9inst_AS_030_000_SYNC mcell C6 mx D26 ... ... -mx D10 CLK_000_D_1_ mcell H3 mx D27 RN_BG_000 mcell D1 -mx D11inst_DS_000_ENABLE mcell B6 mx D28 inst_VPA_D mcell F2 -mx D12 ... ... mx D29 ... ... -mx D13 ... ... mx D30 CLK_000_D_0_ mcell C13 -mx D14 CLK_000_D_5_ mcell E5 mx D31 ... ... -mx D15 inst_AS_030_D0 mcell A6 mx D32 cpu_est_1_ mcell F8 -mx D16inst_LDS_000_INT mcell D6 +mx D0 A_0_ pin 69 mx D17 RN_BG_000 mcell D1 +mx D1 RN_VMA mcell D0 mx D18 SM_AMIGA_6_ mcell A8 +mx D2 cpu_est_0_ mcell D10 mx D19 inst_VPA_D mcell A9 +mx D3 CLK_000_D_3_ mcell E2 mx D20 RN_BGACK_030 mcell H4 +mx D4 BG_030 pin 21 mx D21 cpu_est_1_ mcell D13 +mx D5 nEXP_SPACE pin 14 mx D22 ... ... +mx D6 ... ... mx D23inst_AMIGA_BUS_ENABLE_DMA_HIGH mcell G6 +mx D7 inst_AS_030_D0 mcell D9 mx D24 RST pin 86 +mx D8 CLK_000_D_0_ mcell E8 mx D25 ... ... +mx D9inst_AS_030_000_SYNC mcell A12 mx D26 ... ... +mx D10inst_UDS_000_INT mcell D14 mx D27 ... ... +mx D11inst_LDS_000_INT mcell B6 mx D28 cpu_est_3_ mcell D2 +mx D12 inst_RESET_OUT mcell G9 mx D29 ... ... +mx D13 CLK_000_D_1_ mcell H5 mx D30 ... ... +mx D14 ... ... mx D31 ... ... +mx D15inst_DS_000_ENABLE mcell F1 mx D32 AS_030 pin 82 +mx D16 cpu_est_2_ mcell D6 ---------------------------------------------------------------------------- @@ -972,23 +967,23 @@ BLOCK_E_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx E0inst_CLK_OUT_PRE_50 mcell E6 mx E17 A_DECODE_20_ pin 93 -mx E1 FC_1_ pin 58 mx E18 A_DECODE_23_ pin 85 -mx E2 AS_000 pin 42 mx E19 AHIGH_30_ pin 5 -mx E3 AHIGH_27_ pin 16 mx E20 A_DECODE_22_ pin 84 -mx E4 FPU_SENSE pin 91 mx E21 nEXP_SPACE pin 14 +mx E0 RN_BGACK_030 mcell H4 mx E17 AHIGH_26_ pin 17 +mx E1 AHIGH_31_ pin 4 mx E18 inst_AS_000_INT mcell A5 +mx E2 CIIN_0 mcell E9 mx E19 AHIGH_30_ pin 5 +mx E3 AHIGH_27_ pin 16 mx E20 AHIGH_24_ pin 19 +mx E4 BGACK_000 pin 28 mx E21 nEXP_SPACE pin 14 mx E5 A_DECODE_21_ pin 94 mx E22 AHIGH_25_ pin 18 -mx E6 FC_0_ pin 57 mx E23 RN_BGACK_030 mcell H4 -mx E7 AHIGH_28_ pin 15 mx E24 CIIN_0 mcell E10 -mx E8 A_DECODE_17_ pin 59 mx E25 AHIGH_31_ pin 4 -mx E9 AS_030 pin 82 mx E26 AHIGH_26_ pin 17 -mx E10 CLK_000_D_1_ mcell H3 mx E27 CLK_000_D_2_ mcell E2 -mx E11 A_DECODE_16_ pin 96 mx E28 RW_000 pin 80 -mx E12 A_DECODE_19_ pin 97 mx E29 CLK_000_D_4_ mcell C11 -mx E13 AHIGH_29_ pin 6 mx E30 inst_RESET_OUT mcell A8 -mx E14 AHIGH_24_ pin 19 mx E31 A_DECODE_18_ pin 95 -mx E15 inst_AS_030_D0 mcell A6 mx E32 BGACK_000 pin 28 -mx E16 inst_AS_000_INT mcell C15 +mx E6 FC_0_ pin 57 mx E23 CLK_000_D_7_ mcell E13 +mx E7 AHIGH_28_ pin 15 mx E24 CLK_000_D_6_ mcell B10 +mx E8 A_DECODE_17_ pin 59 mx E25 inst_AS_030_D0 mcell D9 +mx E9 AS_030 pin 82 mx E26 A_DECODE_16_ pin 96 +mx E10 inst_RESET_OUT mcell G9 mx E27 A_DECODE_19_ pin 97 +mx E11 A_DECODE_22_ pin 84 mx E28 RW_000 pin 80 +mx E12 FC_1_ pin 58 mx E29 A_DECODE_20_ pin 93 +mx E13 AHIGH_29_ pin 6 mx E30 CLK_000_D_2_ mcell H6 +mx E14 CLK_000 pin 11 mx E31 A_DECODE_18_ pin 95 +mx E15 FPU_SENSE pin 91 mx E32 A_DECODE_23_ pin 85 +mx E16 AS_000 pin 42 ---------------------------------------------------------------------------- @@ -996,22 +991,22 @@ BLOCK_F_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx F0 RST pin 86 mx F17 BERR pin 41 -mx F1 SM_AMIGA_2_ mcell F6 mx F18 RST_DLY_2_ mcell F9 -mx F2 SM_AMIGA_3_ mcell F10 mx F19 ... ... -mx F3 cpu_est_0_ mcell D2 mx F20 cpu_est_1_ mcell F8 -mx F4 ... ... mx F21 cpu_est_2_ mcell D13 -mx F5 nEXP_SPACE pin 14 mx F22 SM_AMIGA_0_ mcell G5 -mx F6 RST_DLY_1_ mcell F13 mx F23 ... ... -mx F7 cpu_est_3_ mcell D9 mx F24 ... ... -mx F8 inst_DTACK_D0 mcell G7 mx F25 RST_DLY_0_ mcell F0 -mx F9 inst_VPA_D mcell F2 mx F26 RN_VMA mcell D0 -mx F10 CLK_000_D_1_ mcell H3 mx F27inst_AS_030_000_SYNC mcell C6 -mx F11 CLK_000_D_0_ mcell C13 mx F28 ... ... -mx F12 SM_AMIGA_4_ mcell B10 mx F29 ... ... -mx F13 VPA pin 36 mx F30 SM_AMIGA_1_ mcell F1 -mx F14 SM_AMIGA_5_ mcell F5 mx F31 ... ... -mx F15 CLK_000_D_2_ mcell E2 mx F32 SM_AMIGA_6_ mcell C2 +mx F0 RST pin 86 mx F17 SM_AMIGA_0_ mcell F12 +mx F1 SM_AMIGA_3_ mcell F9 mx F18 RN_VMA mcell D0 +mx F2 inst_VPA_D mcell A9 mx F19 ... ... +mx F3 cpu_est_3_ mcell D2 mx F20 cpu_est_0_ mcell D10 +mx F4 cpu_est_2_ mcell D6 mx F21 cpu_est_1_ mcell D13 +mx F5 nEXP_SPACE pin 14 mx F22 ... ... +mx F6 inst_DTACK_D0 mcell C7 mx F23 RN_BGACK_030 mcell H4 +mx F7 CLK_000_D_9_ mcell H13 mx F24inst_AS_030_000_SYNC mcell A12 +mx F8 CLK_000_D_0_ mcell E8 mx F25 BERR pin 41 +mx F9 SM_AMIGA_4_ mcell F2 mx F26 ... ... +mx F10inst_DS_000_ENABLE mcell F1 mx F27 ... ... +mx F11 RW pin 71 mx F28 ... ... +mx F12 inst_AS_030_D0 mcell D9 mx F29 ... ... +mx F13 CLK_000_D_1_ mcell H5 mx F30 SM_AMIGA_6_ mcell A8 +mx F14 SM_AMIGA_2_ mcell F5 mx F31 ... ... +mx F15 SM_AMIGA_5_ mcell F13 mx F32 SM_AMIGA_1_ mcell F8 mx F16 ... ... ---------------------------------------------------------------------------- @@ -1020,23 +1015,23 @@ BLOCK_G_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx G0 RN_BGACK_030 mcell H4 mx G17 RN_RW mcell G0 -mx G1 BERR pin 41 mx G18 inst_RESET_OUT mcell A8 -mx G2 cpu_est_1_ mcell F8 mx G19 ... ... -mx G3 A_1_ pin 60 mx G20 CLK_000_D_7_ mcell A14 -mx G4 SIZE_DMA_0_ mcell G2 mx G21 cpu_est_2_ mcell D13 -mx G5inst_AMIGA_BUS_ENABLE_DMA_HIGH mcell G6 mx G22inst_AMIGA_BUS_ENABLE_DMA_LOW mcell G10 -mx G6 RW_000 pin 80 mx G23 CLK_000_D_11_ mcell H0 -mx G7inst_BGACK_030_INT_D mcell H13 mx G24 RST pin 86 -mx G8 UDS_000 pin 32 mx G25 cpu_est_3_ mcell D9 -mx G9 DTACK pin 30 mx G26 ... ... -mx G10 SM_AMIGA_1_ mcell F1 mx G27 LDS_000 pin 31 -mx G11 CLK_000_D_1_ mcell H3 mx G28 ... ... -mx G12 SIZE_DMA_1_ mcell G9 mx G29 ... ... -mx G13 RN_A_0_ mcell G8 mx G30 CLK_000_D_0_ mcell C13 -mx G14 ... ... mx G31 ... ... -mx G15 nEXP_SPACE pin 14 mx G32 SM_AMIGA_0_ mcell G5 -mx G16inst_CLK_OUT_PRE_D mcell E8 +mx G0 LDS_000 pin 31 mx G17 RN_RW mcell G0 +mx G1 cpu_est_1_ mcell D13 mx G18 ... ... +mx G2 ... ... mx G19 ... ... +mx G3 A_1_ pin 60 mx G20 RN_BGACK_030 mcell H4 +mx G4 cpu_est_2_ mcell D6 mx G21 RST pin 86 +mx G5 RST_DLY_0_ mcell G10 mx G22 IPL_2_ pin 68 +mx G6 RW_000 pin 80 mx G23inst_AMIGA_BUS_ENABLE_DMA_HIGH mcell G6 +mx G7 ... ... mx G24 RST_DLY_1_ mcell G3 +mx G8 UDS_000 pin 32 mx G25inst_BGACK_030_INT_D mcell F0 +mx G9 SIZE_DMA_1_ mcell G13 mx G26 ... ... +mx G10inst_CLK_OUT_PRE_D mcell B13 mx G27 CLK_000_D_1_ mcell H5 +mx G11 RST_DLY_2_ mcell G14 mx G28 cpu_est_3_ mcell D2 +mx G12 inst_RESET_OUT mcell G9 mx G29 ... ... +mx G13 RN_A_0_ mcell G8 mx G30 ... ... +mx G14 ... ... mx G31 SIZE_DMA_0_ mcell G2 +mx G15 nEXP_SPACE pin 14 mx G32 ... ... +mx G16 CLK_000_D_0_ mcell E8 ---------------------------------------------------------------------------- @@ -1044,23 +1039,23 @@ BLOCK_H_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx H0 CLK_000_D_0_ mcell C13 mx H17 A_DECODE_18_ pin 95 -mx H1 BERR pin 41 mx H18 inst_RESET_OUT mcell A8 -mx H2 SM_AMIGA_6_ mcell C2 mx H19 RN_RW_000 mcell H1 -mx H3 SM_AMIGA_0_ mcell G5 mx H20 RN_BGACK_030 mcell H4 -mx H4 BGACK_000 pin 28 mx H21 RST pin 86 -mx H5 RN_DSACK1 mcell H9 mx H22 inst_AS_030_D0 mcell A6 -mx H6 A_DECODE_16_ pin 96 mx H23 CLK_000_D_11_ mcell H0 -mx H7 CLK_000_D_10_ mcell C14 mx H24 FC_0_ pin 57 -mx H8inst_CLK_OUT_PRE_D mcell E8 mx H25 RW pin 71 -mx H9 inst_AS_000_DMA mcell A12 mx H26 CLK_000_D_12_ mcell G14 -mx H10 SIZE_DMA_1_ mcell G9 mx H27 A_DECODE_19_ pin 97 -mx H11 CLK_000_D_1_ mcell H3 mx H28 CLK_030 pin 64 -mx H12 FC_1_ pin 58 mx H29 FPU_SENSE pin 91 -mx H13 A_DECODE_17_ pin 59 mx H30 SM_AMIGA_1_ mcell F1 +mx H0 CLK_000_D_8_ mcell E6 mx H17 SM_AMIGA_0_ mcell F12 +mx H1 BERR pin 41 mx H18 BGACK_000 pin 28 +mx H2 SM_AMIGA_1_ mcell F8 mx H19 CLK_000_D_10_ mcell F6 +mx H3 SM_AMIGA_6_ mcell A8 mx H20 FC_1_ pin 58 +mx H4 A_DECODE_18_ pin 95 mx H21 RST pin 86 +mx H5 RN_DSACK1 mcell H9 mx H22 inst_AS_000_DMA mcell C2 +mx H6 A_DECODE_16_ pin 96 mx H23 RN_BGACK_030 mcell H4 +mx H7 CLK_000_D_9_ mcell H13 mx H24 FC_0_ pin 57 +mx H8 A_DECODE_17_ pin 59 mx H25 inst_AS_030_D0 mcell D9 +mx H9 SIZE_DMA_1_ mcell G13 mx H26 AS_000 pin 42 +mx H10inst_CLK_OUT_PRE_D mcell B13 mx H27 A_DECODE_19_ pin 97 +mx H11 RW pin 71 mx H28 CLK_030 pin 64 +mx H12 inst_RESET_OUT mcell G9 mx H29 FPU_SENSE pin 91 +mx H13 CLK_000_D_1_ mcell H5 mx H30 RN_RW_000 mcell H0 mx H14 SM_AMIGA_i_7_ mcell F4 mx H31 SIZE_DMA_0_ mcell G2 mx H15 nEXP_SPACE pin 14 mx H32 AS_030 pin 82 -mx H16 AS_000 pin 42 +mx H16 CLK_000_D_0_ mcell E8 ---------------------------------------------------------------------------- CSM indicates the mux inputs from the Central Switch Matrix. @@ -1081,34 +1076,34 @@ PostFit_Equations 1 3 1 Pin AHIGH_31_.OE 1 2 1 Pin AS_030- 1 3 1 Pin AS_030.OE - 1 2 1 Pin AS_000- - 1 2 1 Pin AS_000.OE - 1 2 1 Pin DS_030- - 1 3 1 Pin DS_030.OE - 1 2 1 Pin UDS_000- - 1 2 1 Pin UDS_000.OE - 1 2 1 Pin LDS_000- - 1 2 1 Pin LDS_000.OE - 0 0 1 Pin BERR - 1 9 1 Pin BERR.OE 1 2 1 Pin SIZE_0_ 1 2 1 Pin SIZE_0_.OE + 1 2 1 Pin AS_000- + 1 2 1 Pin AS_000.OE 0 0 1 Pin AHIGH_30_ 1 3 1 Pin AHIGH_30_.OE 0 0 1 Pin AHIGH_29_ 1 3 1 Pin AHIGH_29_.OE + 1 2 1 Pin DS_030- + 1 3 1 Pin DS_030.OE 0 0 1 Pin AHIGH_28_ 1 3 1 Pin AHIGH_28_.OE + 1 2 1 Pin UDS_000- + 1 2 1 Pin UDS_000.OE 0 0 1 Pin AHIGH_27_ 1 3 1 Pin AHIGH_27_.OE + 1 2 1 Pin LDS_000- + 1 2 1 Pin LDS_000.OE 0 0 1 Pin AHIGH_26_ 1 3 1 Pin AHIGH_26_.OE - 1 1 1 Pin CLK_DIV_OUT.D - 1 1 1 Pin CLK_DIV_OUT.C 0 0 1 Pin AHIGH_25_ 1 3 1 Pin AHIGH_25_.OE + 0 0 1 Pin BERR + 1 9 1 Pin BERR.OE 0 0 1 Pin AHIGH_24_ 1 3 1 Pin AHIGH_24_.OE + 1 1 1 Pin CLK_DIV_OUT.D + 1 1 1 Pin CLK_DIV_OUT.C 1 9 1 Pin FPU_CS- 1 0 1 Pin AVEC 2 3 1 Pin E @@ -1132,7 +1127,7 @@ PostFit_Equations 1 1 1 Pin CLK_EXP.D 1 1 1 Pin CLK_EXP.C 1 1 1 Pin DSACK1.OE - 4 10 1 Pin DSACK1.D- + 5 12 1 Pin DSACK1.D- 1 1 1 Pin DSACK1.C 3 9 1 Pin VMA.T 1 1 1 Pin VMA.C @@ -1185,20 +1180,22 @@ PostFit_Equations 1 1 1 Node inst_LDS_000_INT.C 1 1 1 Node inst_CLK_OUT_PRE_D.D 1 1 1 Node inst_CLK_OUT_PRE_D.C - 1 1 1 Node CLK_000_D_1_.D - 1 1 1 Node CLK_000_D_1_.C - 1 1 1 Node CLK_000_D_10_.D - 1 1 1 Node CLK_000_D_10_.C - 1 1 1 Node CLK_000_D_11_.D - 1 1 1 Node CLK_000_D_11_.C + 1 1 1 Node CLK_000_D_8_.D + 1 1 1 Node CLK_000_D_8_.C + 1 1 1 Node CLK_000_D_9_.D + 1 1 1 Node CLK_000_D_9_.C 1 2 1 Node inst_DTACK_D0.D- 1 1 1 Node inst_DTACK_D0.C 2 7 1 Node inst_RESET_OUT.D 1 1 1 Node inst_RESET_OUT.C + 1 1 1 Node CLK_000_D_1_.D + 1 1 1 Node CLK_000_D_1_.C 1 1 1 Node CLK_000_D_0_.D 1 1 1 Node CLK_000_D_0_.C 1 1 1 Node inst_CLK_OUT_PRE_50.D 1 1 1 Node inst_CLK_OUT_PRE_50.C + 2 2 1 Node inst_CLK_OUT_PRE_25.D + 1 1 1 Node inst_CLK_OUT_PRE_25.C 1 2 1 Node IPL_D0_0_.D- 1 1 1 Node IPL_D0_0_.C 1 2 1 Node IPL_D0_1_.D- @@ -1217,22 +1214,18 @@ PostFit_Equations 1 1 1 Node CLK_000_D_6_.C 1 1 1 Node CLK_000_D_7_.D 1 1 1 Node CLK_000_D_7_.C - 1 1 1 Node CLK_000_D_8_.D - 1 1 1 Node CLK_000_D_8_.C - 1 1 1 Node CLK_000_D_9_.D - 1 1 1 Node CLK_000_D_9_.C - 1 1 1 Node CLK_000_D_12_.D - 1 1 1 Node CLK_000_D_12_.C + 1 1 1 Node CLK_000_D_10_.D + 1 1 1 Node CLK_000_D_10_.C 2 5 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- 1 1 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.C - 4 12 1 Node inst_DS_000_ENABLE.D + 3 9 1 Node inst_DS_000_ENABLE.D 1 1 1 Node inst_DS_000_ENABLE.C - 3 9 1 Node SM_AMIGA_6_.D + 3 8 1 Node SM_AMIGA_6_.D 1 1 1 Node SM_AMIGA_6_.C - 3 6 1 Node SM_AMIGA_0_.D - 1 1 1 Node SM_AMIGA_0_.C 3 6 1 Node SM_AMIGA_4_.D 1 1 1 Node SM_AMIGA_4_.C + 3 6 1 Node SM_AMIGA_0_.D + 1 1 1 Node SM_AMIGA_0_.C 4 6 1 Node RST_DLY_0_.D 1 1 1 Node RST_DLY_0_.C 2 6 1 NodeX1 RST_DLY_1_.D.X1 @@ -1251,14 +1244,14 @@ PostFit_Equations 1 1 1 Node SM_AMIGA_3_.C 4 13 1 Node SM_AMIGA_2_.D 1 1 1 Node SM_AMIGA_2_.C - 13 21 1 NodeX1 SM_AMIGA_i_7_.D.X1 + 13 20 1 NodeX1 SM_AMIGA_i_7_.D.X1 1 2 1 NodeX2 SM_AMIGA_i_7_.D.X2 1 1 1 Node SM_AMIGA_i_7_.C 2 14 1 Node CIIN_0 ========= - 301 P-Term Total: 301 + 300 P-Term Total: 300 Total Pins: 61 - Total Nodes: 53 + Total Nodes: 52 Average P-Term/Output: 2 @@ -1276,30 +1269,14 @@ AHIGH_31_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); AS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); -!AS_000 = (!inst_AS_000_INT.Q & !AS_030.PIN); - -AS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); - -!DS_030 = (!inst_DS_000_DMA.Q & !AS_000.PIN); - -DS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); - -!UDS_000 = (!inst_UDS_000_INT.Q & inst_DS_000_ENABLE.Q); - -UDS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); - -!LDS_000 = (!inst_LDS_000_INT.Q & inst_DS_000_ENABLE.Q); - -LDS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); - -BERR = (0); - -BERR.OE = (FC_1_ & BGACK_000 & FPU_SENSE & !A_DECODE_19_ & !A_DECODE_18_ & A_DECODE_17_ & !A_DECODE_16_ & FC_0_ & !AS_030.PIN); - SIZE_0_ = (SIZE_DMA_0_.Q & !SIZE_DMA_1_.Q); SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q); +!AS_000 = (!inst_AS_000_INT.Q & !AS_030.PIN); + +AS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); + AHIGH_30_ = (0); AHIGH_30_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); @@ -1308,30 +1285,46 @@ AHIGH_29_ = (0); AHIGH_29_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +!DS_030 = (!inst_DS_000_DMA.Q & !AS_000.PIN); + +DS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); + AHIGH_28_ = (0); AHIGH_28_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +!UDS_000 = (!inst_UDS_000_INT.Q & inst_DS_000_ENABLE.Q); + +UDS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); + AHIGH_27_ = (0); AHIGH_27_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +!LDS_000 = (!inst_LDS_000_INT.Q & inst_DS_000_ENABLE.Q); + +LDS_000.OE = (BGACK_030.Q & inst_RESET_OUT.Q); + AHIGH_26_ = (0); AHIGH_26_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); -CLK_DIV_OUT.D = (inst_CLK_OUT_PRE_D.Q); - -CLK_DIV_OUT.C = (CLK_OSZI); - AHIGH_25_ = (0); AHIGH_25_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +BERR = (0); + +BERR.OE = (FC_1_ & BGACK_000 & FPU_SENSE & !A_DECODE_19_ & !A_DECODE_18_ & A_DECODE_17_ & !A_DECODE_16_ & FC_0_ & !AS_030.PIN); + AHIGH_24_ = (0); AHIGH_24_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +CLK_DIV_OUT.D = (inst_CLK_OUT_PRE_D.Q); + +CLK_DIV_OUT.C = (CLK_OSZI); + !FPU_CS = (FC_1_ & BGACK_000 & !FPU_SENSE & !A_DECODE_19_ & !A_DECODE_18_ & A_DECODE_17_ & !A_DECODE_16_ & FC_0_ & !AS_030.PIN); AVEC = (1); @@ -1396,10 +1389,11 @@ CLK_EXP.C = (CLK_OSZI); DSACK1.OE = (nEXP_SPACE); -!DSACK1.D = (RST & !CLK_000_D_11_.Q & CLK_000_D_12_.Q & SM_AMIGA_1_.Q +!DSACK1.D = (RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_1_.Q + # RST & !CLK_000_D_9_.Q & CLK_000_D_10_.Q & SM_AMIGA_1_.Q # RST & !inst_AS_030_D0.Q & !DSACK1.Q & BERR.PIN - # !CLK_030 & RST & !CLK_000_D_10_.Q & CLK_000_D_11_.Q & SM_AMIGA_1_.Q - # RST & inst_CLK_OUT_PRE_D.Q & !CLK_000_D_10_.Q & CLK_000_D_11_.Q & SM_AMIGA_1_.Q); + # !CLK_030 & RST & !CLK_000_D_8_.Q & CLK_000_D_9_.Q & SM_AMIGA_1_.Q + # RST & inst_CLK_OUT_PRE_D.Q & !CLK_000_D_8_.Q & CLK_000_D_9_.Q & SM_AMIGA_1_.Q); DSACK1.C = (CLK_OSZI); @@ -1566,21 +1560,17 @@ inst_LDS_000_INT.D = (!RST inst_LDS_000_INT.C = (CLK_OSZI); -inst_CLK_OUT_PRE_D.D = (inst_CLK_OUT_PRE_50.Q); +inst_CLK_OUT_PRE_D.D = (inst_CLK_OUT_PRE_25.Q); inst_CLK_OUT_PRE_D.C = (CLK_OSZI); -CLK_000_D_1_.D = (CLK_000_D_0_.Q); +CLK_000_D_8_.D = (CLK_000_D_7_.Q); -CLK_000_D_1_.C = (CLK_OSZI); +CLK_000_D_8_.C = (CLK_OSZI); -CLK_000_D_10_.D = (CLK_000_D_9_.Q); +CLK_000_D_9_.D = (CLK_000_D_8_.Q); -CLK_000_D_10_.C = (CLK_OSZI); - -CLK_000_D_11_.D = (CLK_000_D_10_.Q); - -CLK_000_D_11_.C = (CLK_OSZI); +CLK_000_D_9_.C = (CLK_OSZI); !inst_DTACK_D0.D = (!DTACK & RST); @@ -1591,6 +1581,10 @@ inst_RESET_OUT.D = (RST & inst_RESET_OUT.Q inst_RESET_OUT.C = (CLK_OSZI); +CLK_000_D_1_.D = (CLK_000_D_0_.Q); + +CLK_000_D_1_.C = (CLK_OSZI); + CLK_000_D_0_.D = (CLK_000); CLK_000_D_0_.C = (CLK_OSZI); @@ -1599,6 +1593,11 @@ inst_CLK_OUT_PRE_50.D = (!inst_CLK_OUT_PRE_50.Q); inst_CLK_OUT_PRE_50.C = (CLK_OSZI); +inst_CLK_OUT_PRE_25.D = (!inst_CLK_OUT_PRE_50.Q & inst_CLK_OUT_PRE_25.Q + # inst_CLK_OUT_PRE_50.Q & !inst_CLK_OUT_PRE_25.Q); + +inst_CLK_OUT_PRE_25.C = (CLK_OSZI); + !IPL_D0_0_.D = (RST & !IPL_0_); IPL_D0_0_.C = (CLK_OSZI); @@ -1635,48 +1634,39 @@ CLK_000_D_7_.D = (CLK_000_D_6_.Q); CLK_000_D_7_.C = (CLK_OSZI); -CLK_000_D_8_.D = (CLK_000_D_7_.Q); +CLK_000_D_10_.D = (CLK_000_D_9_.Q); -CLK_000_D_8_.C = (CLK_OSZI); - -CLK_000_D_9_.D = (CLK_000_D_8_.Q); - -CLK_000_D_9_.C = (CLK_OSZI); - -CLK_000_D_12_.D = (CLK_000_D_11_.Q); - -CLK_000_D_12_.C = (CLK_OSZI); +CLK_000_D_10_.C = (CLK_OSZI); !inst_AMIGA_BUS_ENABLE_DMA_HIGH.D = (RST & !A_1_ & !BGACK_030.Q # RST & BGACK_030.Q & inst_BGACK_030_INT_D.Q & !inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q); inst_AMIGA_BUS_ENABLE_DMA_HIGH.C = (CLK_OSZI); -inst_DS_000_ENABLE.D = (RST & !inst_AS_030_D0.Q & inst_DS_000_ENABLE.Q & BERR.PIN - # RST & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_5_.Q & SM_AMIGA_i_7_.Q - # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_5_.Q & SM_AMIGA_i_7_.Q - # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_5_.Q & SM_AMIGA_i_7_.Q & RW.PIN); +inst_DS_000_ENABLE.D = (RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_4_.Q + # RST & !inst_AS_030_D0.Q & inst_DS_000_ENABLE.Q & BERR.PIN + # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_6_.Q & RW.PIN); inst_DS_000_ENABLE.C = (CLK_OSZI); SM_AMIGA_6_.D = (RST & CLK_000_D_1_.Q & SM_AMIGA_6_.Q & SM_AMIGA_i_7_.Q & BERR.PIN # RST & !CLK_000_D_0_.Q & SM_AMIGA_6_.Q & SM_AMIGA_i_7_.Q & BERR.PIN - # nEXP_SPACE & RST & !inst_AS_030_000_SYNC.Q & !CLK_000_D_1_.Q & CLK_000_D_2_.Q & !SM_AMIGA_i_7_.Q); + # nEXP_SPACE & RST & !inst_AS_030_000_SYNC.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & !SM_AMIGA_i_7_.Q); SM_AMIGA_6_.C = (CLK_OSZI); -SM_AMIGA_0_.D = (RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_1_.Q - # RST & CLK_000_D_1_.Q & SM_AMIGA_0_.Q & BERR.PIN - # RST & !CLK_000_D_0_.Q & SM_AMIGA_0_.Q & BERR.PIN); - -SM_AMIGA_0_.C = (CLK_OSZI); - SM_AMIGA_4_.D = (RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_5_.Q # RST & CLK_000_D_1_.Q & SM_AMIGA_4_.Q & BERR.PIN # RST & !CLK_000_D_0_.Q & SM_AMIGA_4_.Q & BERR.PIN); SM_AMIGA_4_.C = (CLK_OSZI); +SM_AMIGA_0_.D = (RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_1_.Q + # RST & CLK_000_D_1_.Q & SM_AMIGA_0_.Q & BERR.PIN + # RST & !CLK_000_D_0_.Q & SM_AMIGA_0_.Q & BERR.PIN); + +SM_AMIGA_0_.C = (CLK_OSZI); + RST_DLY_0_.D = (RST & !CLK_000_D_1_.Q & RST_DLY_0_.Q # RST & CLK_000_D_0_.Q & RST_DLY_0_.Q # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & !RST_DLY_0_.Q @@ -1721,7 +1711,7 @@ SM_AMIGA_5_.C = (CLK_OSZI); SM_AMIGA_3_.D.X1 = (RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_4_.Q & !SM_AMIGA_3_.Q # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_4_.Q & !BERR.PIN - # RST & inst_VPA_D.Q & CLK_000_D_1_.Q & !inst_DTACK_D0.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & BERR.PIN + # RST & inst_VPA_D.Q & !inst_DTACK_D0.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & BERR.PIN # RST & !VMA.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & BERR.PIN); SM_AMIGA_3_.D.X2 = (RST & SM_AMIGA_3_.Q & BERR.PIN); @@ -1730,7 +1720,7 @@ SM_AMIGA_3_.C = (CLK_OSZI); SM_AMIGA_2_.D = (RST & CLK_000_D_1_.Q & SM_AMIGA_2_.Q & BERR.PIN # RST & !CLK_000_D_0_.Q & SM_AMIGA_2_.Q & BERR.PIN - # RST & inst_VPA_D.Q & CLK_000_D_1_.Q & !inst_DTACK_D0.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q + # RST & inst_VPA_D.Q & !inst_DTACK_D0.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q # RST & !VMA.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); SM_AMIGA_2_.C = (CLK_OSZI); @@ -1740,14 +1730,14 @@ SM_AMIGA_i_7_.D.X1 = (RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_6_.Q & ! # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_1_.Q & !BERR.PIN # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_5_.Q & !BERR.PIN # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_2_.Q & !BERR.PIN - # RST & inst_VPA_D.Q & CLK_000_D_1_.Q & !inst_DTACK_D0.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & !BERR.PIN - # !nEXP_SPACE & RST & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN - # RST & inst_AS_030_000_SYNC.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN - # RST & CLK_000_D_1_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN - # RST & !CLK_000_D_2_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN - # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !SM_AMIGA_6_.Q & SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN + # RST & inst_VPA_D.Q & !inst_DTACK_D0.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & !BERR.PIN + # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN + # !nEXP_SPACE & RST & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN + # RST & inst_AS_030_000_SYNC.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN + # RST & !CLK_000_D_1_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN + # RST & CLK_000_D_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & BERR.PIN # RST & !VMA.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & !BERR.PIN - # nEXP_SPACE & RST & !inst_AS_030_000_SYNC.Q & !CLK_000_D_1_.Q & CLK_000_D_2_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & !BERR.PIN); + # nEXP_SPACE & RST & !inst_AS_030_000_SYNC.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & !BERR.PIN); SM_AMIGA_i_7_.D.X2 = (RST & BERR.PIN); diff --git a/Logic/68030_tk.tal b/Logic/68030_tk.tal index 0748a43..ee3f282 100644 --- a/Logic/68030_tk.tal +++ b/Logic/68030_tk.tal @@ -79,13 +79,14 @@ inst_AS_030_000_SYNC 1 1 1 1 .. .. 1 1 inst_BGACK_030_INT_D 1 1 .. .. .. .. 1 1 inst_VPA_D 1 1 .. .. .. .. 1 1 inst_CLK_OUT_PRE_D .. .. .. .. .. .. 1 1 - CLK_000_D_1_ .. .. .. .. .. .. 1 1 - CLK_000_D_10_ .. .. .. .. .. .. 1 1 - CLK_000_D_11_ .. .. .. .. .. .. 1 1 + CLK_000_D_8_ .. .. .. .. .. .. 1 1 + CLK_000_D_9_ .. .. .. .. .. .. 1 1 inst_DTACK_D0 1 1 .. .. .. .. 1 1 inst_RESET_OUT 1 1 .. .. .. .. .. .. + CLK_000_D_1_ .. .. .. .. .. .. 1 1 CLK_000_D_0_ 1 1 .. .. .. .. 1 1 inst_CLK_OUT_PRE_50 .. .. .. .. .. .. 1 1 +inst_CLK_OUT_PRE_25 .. .. .. .. .. .. 1 1 IPL_D0_0_ 1 1 .. .. .. .. 1 1 IPL_D0_1_ 1 1 .. .. .. .. 1 1 IPL_D0_2_ 1 1 .. .. .. .. 1 1 @@ -95,13 +96,11 @@ inst_CLK_OUT_PRE_50 .. .. .. .. .. .. 1 1 CLK_000_D_5_ .. .. .. .. .. .. 1 1 CLK_000_D_6_ .. .. .. .. .. .. 1 1 CLK_000_D_7_ .. .. .. .. .. .. 1 1 - CLK_000_D_8_ .. .. .. .. .. .. 1 1 - CLK_000_D_9_ .. .. .. .. .. .. 1 1 - CLK_000_D_12_ .. .. .. .. .. .. 1 1 + CLK_000_D_10_ .. .. .. .. .. .. 1 1 inst_AMIGA_BUS_ENABLE_DMA_HIGH 1 1 1 1 .. .. .. .. SM_AMIGA_6_ 1 1 .. .. .. .. 1 1 - SM_AMIGA_0_ 1 1 .. .. .. .. 1 1 SM_AMIGA_4_ 1 1 .. .. .. .. 1 1 + SM_AMIGA_0_ 1 1 .. .. .. .. 1 1 RST_DLY_0_ 1 1 .. .. .. .. 1 1 RST_DLY_1_ 1 1 .. .. .. .. 1 1 RST_DLY_2_ 1 1 .. .. .. .. 1 1 diff --git a/Logic/68030_tk.tt2 b/Logic/68030_tk.tt2 index ce48372..32c0d4f 100644 --- a/Logic/68030_tk.tt2 +++ b/Logic/68030_tk.tt2 @@ -1,590 +1,581 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Fri Aug 19 00:39:35 2016 +#$ DATE Wed Aug 24 22:17:49 2016 #$ MODULE 68030_tk -#$ PINS 61 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 SIZE_0_ AHIGH_30_ BGACK_000 AHIGH_29_ CLK_030 AHIGH_28_ CLK_000 AHIGH_27_ CLK_OSZI AHIGH_26_ CLK_DIV_OUT AHIGH_25_ AHIGH_24_ FPU_CS A_DECODE_22_ FPU_SENSE A_DECODE_21_ A_DECODE_20_ DTACK A_DECODE_19_ AVEC A_DECODE_18_ E A_DECODE_17_ VPA A_DECODE_16_ RST RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_1_ IPL_0_ FC_0_ A_1_ IPL_030_2_ RW_000 BG_000 BGACK_030 CLK_EXP DSACK1 VMA RW A_0_ IPL_030_1_ IPL_030_0_ -#$ NODES 52 cpu_est_3_ cpu_est_0_ cpu_est_1_ cpu_est_2_ inst_AS_000_INT inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA CYCLE_DMA_0_ CYCLE_DMA_1_ SIZE_DMA_0_ SIZE_DMA_1_ inst_VPA_D inst_UDS_000_INT inst_LDS_000_INT inst_CLK_OUT_PRE_D CLK_000_D_1_ CLK_000_D_10_ CLK_000_D_11_ inst_DTACK_D0 inst_RESET_OUT CLK_000_D_0_ inst_CLK_OUT_PRE_50 IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_3_ CLK_000_D_4_ CLK_000_D_5_ CLK_000_D_6_ CLK_000_D_7_ CLK_000_D_8_ CLK_000_D_9_ CLK_000_D_12_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_DS_000_ENABLE SM_AMIGA_6_ SM_AMIGA_0_ SM_AMIGA_4_ RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_CLK_030_H SM_AMIGA_1_ SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ +#$ PINS 61 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_2_ FC_1_ AS_030 SIZE_0_ AS_000 AHIGH_30_ AHIGH_29_ DS_030 AHIGH_28_ UDS_000 AHIGH_27_ LDS_000 AHIGH_26_ nEXP_SPACE AHIGH_25_ BERR AHIGH_24_ BG_030 A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ BGACK_000 A_DECODE_19_ CLK_030 A_DECODE_18_ CLK_000 A_DECODE_17_ CLK_OSZI A_DECODE_16_ CLK_DIV_OUT FPU_CS FPU_SENSE DTACK AVEC E VPA RST RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_1_ IPL_0_ FC_0_ A_1_ IPL_030_2_ RW_000 BG_000 BGACK_030 CLK_EXP DSACK1 VMA RW A_0_ IPL_030_1_ IPL_030_0_ +#$ NODES 51 cpu_est_3_ cpu_est_0_ cpu_est_1_ cpu_est_2_ inst_AS_000_INT inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA CYCLE_DMA_0_ CYCLE_DMA_1_ SIZE_DMA_0_ SIZE_DMA_1_ inst_VPA_D inst_UDS_000_INT inst_LDS_000_INT inst_CLK_OUT_PRE_D CLK_000_D_8_ CLK_000_D_9_ inst_DTACK_D0 inst_RESET_OUT CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_25 IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_3_ CLK_000_D_4_ CLK_000_D_5_ CLK_000_D_6_ CLK_000_D_7_ CLK_000_D_10_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_DS_000_ENABLE SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_0_ RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_CLK_030_H SM_AMIGA_1_ SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ .type fr -.i 104 -.o 177 -.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q VMA.Q cpu_est_3_.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q inst_AS_000_INT.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q SIZE_DMA_0_.Q SIZE_DMA_1_.Q inst_VPA_D.Q inst_UDS_000_INT.Q inst_LDS_000_INT.Q inst_CLK_OUT_PRE_D.Q CLK_000_D_1_.Q CLK_000_D_10_.Q CLK_000_D_11_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_3_.Q CLK_000_D_4_.Q CLK_000_D_5_.Q CLK_000_D_6_.Q CLK_000_D_7_.Q CLK_000_D_8_.Q CLK_000_D_9_.Q CLK_000_D_12_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q DSACK1.Q inst_DS_000_ENABLE.Q SM_AMIGA_6_.Q SM_AMIGA_0_.Q SM_AMIGA_4_.Q RW_000.Q RW.Q RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q inst_CLK_030_H.Q SM_AMIGA_1_.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q BG_000.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN -.ob DS_030 FPU_CS AVEC E RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SM_AMIGA_i_7_.C SM_AMIGA_6_.C SM_AMIGA_5_.C SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.C SM_AMIGA_1_.C SM_AMIGA_0_.C cpu_est_2_.C cpu_est_3_.C IPL_030_0_.C IPL_030_1_.C IPL_030_2_.C IPL_D0_0_.C IPL_D0_1_.C IPL_D0_2_.C CLK_000_D_6_.C CLK_000_D_7_.C CLK_000_D_8_.C CLK_000_D_9_.C CLK_000_D_10_.C CLK_000_D_11_.C CLK_000_D_12_.C CYCLE_DMA_0_.C CYCLE_DMA_1_.C SIZE_DMA_0_.C SIZE_DMA_1_.C cpu_est_0_.C cpu_est_1_.C RST_DLY_1_.C RST_DLY_2_.C CLK_000_D_0_.C CLK_000_D_1_.C CLK_000_D_2_.C CLK_000_D_3_.C CLK_000_D_4_.C CLK_000_D_5_.C RST_DLY_0_.C inst_AS_000_DMA.C inst_AS_030_000_SYNC.C inst_AS_000_INT.C DSACK1.C inst_DS_000_DMA.C inst_AS_030_D0.C inst_VPA_D.C inst_DTACK_D0.C inst_CLK_030_H.C inst_RESET_OUT.C inst_DS_000_ENABLE.C BG_000.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.C A_0_.C VMA.C RW.C RW_000.C inst_LDS_000_INT.C BGACK_030.C inst_BGACK_030_INT_D.C inst_CLK_OUT_PRE_D.C CLK_EXP.C inst_CLK_OUT_PRE_50.C SIZE_1_ AHIGH_31_ AS_030 AS_000 UDS_000 LDS_000 BERR SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE RESET.OE CIIN.OE SM_AMIGA_3_.D.X1 SM_AMIGA_3_.D.X2 SM_AMIGA_i_7_.D.X1 SM_AMIGA_i_7_.D.X2 CLK_DIV_OUT.C CLK_DIV_OUT.D BGACK_030.D VMA.T cpu_est_3_.D cpu_est_0_.D cpu_est_1_.D cpu_est_2_.D inst_AS_000_INT.D inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AS_030_D0.D inst_AS_030_000_SYNC.D inst_BGACK_030_INT_D.D inst_AS_000_DMA.D inst_DS_000_DMA.D CYCLE_DMA_0_.D CYCLE_DMA_1_.D SIZE_DMA_0_.D SIZE_DMA_1_.D inst_VPA_D.D inst_UDS_000_INT.D inst_LDS_000_INT.D inst_CLK_OUT_PRE_D.D CLK_000_D_1_.D CLK_000_D_10_.D CLK_000_D_11_.D inst_DTACK_D0.D inst_RESET_OUT.D CLK_000_D_0_.D inst_CLK_OUT_PRE_50.D IPL_D0_0_.D IPL_D0_1_.D IPL_D0_2_.D CLK_000_D_2_.D CLK_000_D_3_.D CLK_000_D_4_.D CLK_000_D_5_.D CLK_000_D_6_.D CLK_000_D_7_.D CLK_000_D_8_.D CLK_000_D_9_.D CLK_000_D_12_.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.D DSACK1.D inst_DS_000_ENABLE.D SM_AMIGA_6_.D SM_AMIGA_0_.D SM_AMIGA_4_.D RW_000.D RW.D RST_DLY_0_.D RST_DLY_1_.D RST_DLY_2_.D A_0_.D inst_CLK_030_H.D SM_AMIGA_1_.D SM_AMIGA_5_.D SM_AMIGA_2_.D BG_000.D CLK_EXP.D IPL_030_0_.D IPL_030_1_.D IPL_030_2_.D -.p 578 --------------------------------------------------------------------------------------------------------- ~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --1------------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---0----------------------------------------------------------------------------------------------------- ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------1------------0---1-------------------------------00-----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------1-----------0---1-------------------------------00-----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------1---1--1----------------------------00-----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------------------------------0----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ ----------------------------------------------1-------------------------------000----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------------------------------------------0---------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ----0-----------------------------------------0---------------------0-0----------0---------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------1-----------0---------------------0-0----------0---------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------0---------0-----------0-0----------0---------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------0---------------------010----------0---------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------------------------------------------1--------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ ----------------------------------------------------------------------------------0--------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ ---------------------------------1----------------------------------1-----------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ -------------------------------------------------------------------01-----------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ -------------1--------------------------------0----1----------------10------------1---------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ --------------------------------------------------------------------1----------------------------------00 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +.i 103 +.o 175 +.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q VMA.Q cpu_est_3_.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q inst_AS_000_INT.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q SIZE_DMA_0_.Q SIZE_DMA_1_.Q inst_VPA_D.Q inst_UDS_000_INT.Q inst_LDS_000_INT.Q inst_CLK_OUT_PRE_D.Q CLK_000_D_8_.Q CLK_000_D_9_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_25.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_3_.Q CLK_000_D_4_.Q CLK_000_D_5_.Q CLK_000_D_6_.Q CLK_000_D_7_.Q CLK_000_D_10_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q DSACK1.Q inst_DS_000_ENABLE.Q SM_AMIGA_6_.Q SM_AMIGA_4_.Q SM_AMIGA_0_.Q RW_000.Q RW.Q RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q inst_CLK_030_H.Q SM_AMIGA_1_.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q BG_000.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN +.ob DS_030 FPU_CS AVEC E RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SM_AMIGA_i_7_.C SM_AMIGA_6_.C SM_AMIGA_5_.C SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.C SM_AMIGA_1_.C SM_AMIGA_0_.C cpu_est_2_.C cpu_est_3_.C IPL_030_0_.C IPL_030_1_.C IPL_030_2_.C IPL_D0_0_.C IPL_D0_1_.C IPL_D0_2_.C CLK_000_D_4_.C CLK_000_D_5_.C CLK_000_D_6_.C CLK_000_D_7_.C CLK_000_D_8_.C CLK_000_D_9_.C CLK_000_D_10_.C CYCLE_DMA_0_.C CYCLE_DMA_1_.C SIZE_DMA_0_.C SIZE_DMA_1_.C cpu_est_0_.C cpu_est_1_.C RST_DLY_1_.C RST_DLY_2_.C CLK_000_D_0_.C CLK_000_D_1_.C CLK_000_D_2_.C CLK_000_D_3_.C RST_DLY_0_.C inst_LDS_000_INT.C BGACK_030.C inst_AS_000_DMA.C inst_AS_030_000_SYNC.C inst_AS_000_INT.C DSACK1.C inst_DS_000_DMA.C inst_AS_030_D0.C inst_VPA_D.C inst_DTACK_D0.C inst_CLK_030_H.C inst_RESET_OUT.C inst_DS_000_ENABLE.C inst_CLK_OUT_PRE_25.C BG_000.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.C A_0_.C VMA.C RW.C RW_000.C inst_BGACK_030_INT_D.C inst_CLK_OUT_PRE_D.C inst_CLK_OUT_PRE_50.C CLK_EXP.C SIZE_1_ AHIGH_31_ AS_030 AS_000 UDS_000 LDS_000 BERR SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE RESET.OE CIIN.OE SM_AMIGA_3_.D.X1 SM_AMIGA_3_.D.X2 SM_AMIGA_i_7_.D.X1 SM_AMIGA_i_7_.D.X2 CLK_DIV_OUT.C CLK_DIV_OUT.D BGACK_030.D VMA.T cpu_est_3_.D cpu_est_0_.D cpu_est_1_.D cpu_est_2_.D inst_AS_000_INT.D inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AS_030_D0.D inst_AS_030_000_SYNC.D inst_BGACK_030_INT_D.D inst_AS_000_DMA.D inst_DS_000_DMA.D CYCLE_DMA_0_.D CYCLE_DMA_1_.D SIZE_DMA_0_.D SIZE_DMA_1_.D inst_VPA_D.D inst_UDS_000_INT.D inst_LDS_000_INT.D inst_CLK_OUT_PRE_D.D CLK_000_D_8_.D CLK_000_D_9_.D inst_DTACK_D0.D inst_RESET_OUT.D CLK_000_D_1_.D CLK_000_D_0_.D inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_25.D IPL_D0_0_.D IPL_D0_1_.D IPL_D0_2_.D CLK_000_D_2_.D CLK_000_D_3_.D CLK_000_D_4_.D CLK_000_D_5_.D CLK_000_D_6_.D CLK_000_D_7_.D CLK_000_D_10_.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.D DSACK1.D inst_DS_000_ENABLE.D SM_AMIGA_6_.D SM_AMIGA_4_.D SM_AMIGA_0_.D RW_000.D RW.D RST_DLY_0_.D RST_DLY_1_.D RST_DLY_2_.D A_0_.D inst_CLK_030_H.D SM_AMIGA_1_.D SM_AMIGA_5_.D SM_AMIGA_2_.D BG_000.D CLK_EXP.D IPL_030_0_.D IPL_030_1_.D IPL_030_2_.D +.p 569 +------------------------------------------------------------------------------------------------------- ~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-1----------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--0---------------------------------------------------------------------------------------------------- ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1-------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +-----0------------------------------------------------------------------------------------------------- ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------1----------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------1---------------------------------------------------------------------------------------------- ~~~~~~~~~~11111111111111111111111111111111111111111111111111111111111111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1--------------------------------------------------------------------------------------------- ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------1-------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------0------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~1111111~~11111~~~1~~~~~111~~~~~~~11~~~~11~~~1~~~~1~111 +----------------1-------------------------------------------------------------------------------------- ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------1------------------------------------------------------------------------------------- ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------0------------------------------------------------------------------------------------ ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------1----------------------------------------------------------------------------------- ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------1---------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------1--------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------0-------------------------------------------------------------------------------- ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1------------------------------------------------------------------------------ ~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----1------------------1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------0------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------10------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +-----------------------00------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------0------------0----------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------01-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0-1------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0-11------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------01------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------10-0------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1-00------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------1----------------------------------------------------------------------- ~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1------1----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------------------------1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--1-------------0010--1----------1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1--------1--------------------------------------------------------------------- ~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0--------1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------0-------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~1~~~~~~~~~~~~~ +---------------------------------10-------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------1------------------------------------------------------------------- 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------0---------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +--------------------------------------------------1--------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +------------------------------------------------0-----------------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------0----------------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +--------------------------------------------------1---------------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +-------------------------------------------------10--------------------10------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +-----------------------------------------------------------------------00------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +------------------------------------------------0------------------------0----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------0-----------------------0----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +--------------------------------------------------1----------------------0----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-------------------------------------------------10--------------------1-0----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +-----------------------------------------------------------------------0-0----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-------------------------------------------------10--------------------110----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +------------------------------------------------------------------------00----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +------------1-----------1-------------------------------------------------0---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +------1--------------------------------------------------------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +-----------------------------------1---------------------------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +------0-----1--------------------------------01-----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +------------1-------------------------------101-----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +------------1------------------------------------10-------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +------------1---------------------------------0---------------1-------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1--------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +--------------------------------------------------0-------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +--------------------------------------------------------------------0-------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +-------------------------------------------------1---------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +--------------------------------------------------0--------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +------------------------------------------------------------------0----------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-------------------------------------------------------------------0---------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +-------------------------1---------------0-------1--------------------------001------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0--------------0-------1--------------------------001------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1-------------0-------1--------------------------001------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------1------------0-------1--------------------------001------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------1-----------0-------1--------------------------001------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------1-----1-1--------------------------001------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1----------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1----------------1---------000------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1-----------------1--------000------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1------------------1-------000------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1--------------------------0001----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1---------------0-------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +--------------------------0--------------0-------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +---------------------------1-------------0-------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +----------------------------1------------0-------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-----------------------------1-----------0-------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-----------------------------------------1-----1-------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-------------------------------------------------0-----------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +--------------------------------------------------1----------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +----------------------------------------------------------------------------0--0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +------------------------------------------------------------------------------00----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +------------------------------------------------------------------0-------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +------------1------------------------------------1-------------------0----------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +------------1-------------------------------------0------------------0----------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +------------1-----------------------------------------------------0-00----------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +---0----------------------------------------------------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +---------------------------------1----------------------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-------------------------------------------------0------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +--------------------------------------------------1-----------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +----0-------1--------------------------------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +------------1--------0------------------------------------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +------------1----------------------------------------0----------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +------------1-------0---------------------------------1---------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +------------1-------1---------------------------------0---------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-0----------1------------------------------------------1--------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-1----------1------------------------------------------0--------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +------------1-------0--------------------------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +------------1--------0-------------------------------1-----------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +------------1--------1-------------------------------0-----------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +------------1-----------------------------------------0----------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-0----------1------------------------------------------1---------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-1----------1------------------------------------------0---------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-0----------1-----------------------------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +------------1--------0-------------------------------1------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +------------1--------1-------------------------------0------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +------------1-------0---------------------------------1-----------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +------------1-------1---------------------------------0-----------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +------------1------------------------------------------0----------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-------------------------------------------------------------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1------------------------------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--1--1---0------0010--1--------------------------------------------------------------0----------------- ~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0------------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +------------1-----------0-------------------------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------0--------------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------0-------------------------------------------------0---------------- 0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-----------------------------------------------------------------------------------1--------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1--------------------------------------------------------------1--------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------------------------11--------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0--------------------------------------------------------------0--------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0--------------------------------------------------------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +------------1-----------0---------------------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0---------------------------------------------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +------1-----1-----------0------------01-----------------------------------------------0-0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0----------0-01-----------------------------------------------0-0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0-----1-----------0-----------001-----------------------------------------------0-0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1-----1-----------0------------10-----------------------------------------------0-0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0----------0-10-----------------------------------------------0-0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0-----1-----------0-----------010-----------------------------------------------0-0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1-----1-----------0----------0-01------------------------------------1----------0-0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1-----1-----------0----------0-10------------------------------------1----------0-0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0-----------001------------------------------------0----------0-0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0-----------010------------------------------------0----------0-0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0------------01-----------------------------------------------010-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0------------10-----------------------------------------------010-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0----------------------------------------------------------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------------------11------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +------1-----1-----------0------------01-----------------------------------------------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0----------0-01-----------------------------------------------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0-----1-----------0-----------001-----------------------------------------------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1-----1-----------0------------10-----------------------------------------------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0----------0-10-----------------------------------------------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0-----1-----------0-----------010-----------------------------------------------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1-----1-----------0----------0-01------------------------------------1----------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1-----1-----------0----------0-10------------------------------------1----------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0-----------001------------------------------------0----------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0-----------010------------------------------------0----------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0------------01-----------------------------------------------01-0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0------------10-----------------------------------------------01-0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0---------------------------------------------------------------00------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------------------------------------------------1-----------------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------------------------------------------------1------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------------------------------1---------- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------------------------------------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------------------------------------1--------- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------------------------------------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------------------------1-------- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0------------------------------------------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------------------------1------- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-------------------------------------------------------------------------------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------------------------1------ ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------------------------------------------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------------------------------1----- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0---------------------------------------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------------------------------------1---- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------------------------------------------------------------------------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------------------------------------------1--- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------------------------------------------------------------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------------------------------------------------1---------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------------------------------------------------1---------------------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------------0-0--------------------------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-------------------00-------------------------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-----------------------------0---------------10--------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-------------------0-------------------------------0------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------1----------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------1---------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1------------------1--------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------0-----------------1--------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------1------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------1-----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------1----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------0----------------------------1----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------------1---------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--01--------1-----------1-------0-1---------------------------------------------0--------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--------1---1-------1-------0-1---------------------------------------------0--------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--------1----1------1-------0-1---------------------------------------------0--------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--------1-----0-----1-------0-1---------------------------------------------0--------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--------1------1----1-------0-1---------------------------------------------0--------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--------1---------0-1-------0-1---------------------------------------------0--------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1---------------0-----------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +--------------------------0--------------0-----------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +---------------------------1-------------0-----------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +----------------------------1------------0-----------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-----------------------------1-----------0-----------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-----------------------------------------1-----1-----------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-------------------------------------------------1---------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~00~~~~~~ +-------------------------------------------------0---------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~0~~~~~ +--------------------------------------------------1--------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~0~~~~~ +-------------------------------------------------11--------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------0--------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~00~~~~~~ +-------------------------------------------------00--------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------0----------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +------------------------------------------------------------------00---------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------0------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------0-----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------0----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +---0---------------------------------------------1--------------------------000----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------1---------------1--------------------------000----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------------0---------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-------------------------------------------------0----------------00-----------0---------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------------------1--------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +--------------------------------1----------------------------------0----------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------0-0----------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +------------1------------------------------------01---------------1-0-----------1---------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +-------------------------------------------------------------------0---------------------------------00 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ .end diff --git a/Logic/68030_tk.tt3 b/Logic/68030_tk.tt3 index 7716294..327c6f8 100644 --- a/Logic/68030_tk.tt3 +++ b/Logic/68030_tk.tt3 @@ -1,590 +1,581 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Fri Aug 19 00:39:35 2016 +#$ DATE Wed Aug 24 22:17:49 2016 #$ MODULE 68030_tk -#$ PINS 61 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 SIZE_0_ AHIGH_30_ BGACK_000 AHIGH_29_ CLK_030 AHIGH_28_ CLK_000 AHIGH_27_ CLK_OSZI AHIGH_26_ CLK_DIV_OUT AHIGH_25_ AHIGH_24_ FPU_CS A_DECODE_22_ FPU_SENSE A_DECODE_21_ A_DECODE_20_ DTACK A_DECODE_19_ AVEC A_DECODE_18_ E A_DECODE_17_ VPA A_DECODE_16_ RST RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_1_ IPL_0_ FC_0_ A_1_ IPL_030_2_ RW_000 BG_000 BGACK_030 CLK_EXP DSACK1 VMA RW A_0_ IPL_030_1_ IPL_030_0_ -#$ NODES 52 cpu_est_3_ cpu_est_0_ cpu_est_1_ cpu_est_2_ inst_AS_000_INT inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA CYCLE_DMA_0_ CYCLE_DMA_1_ SIZE_DMA_0_ SIZE_DMA_1_ inst_VPA_D inst_UDS_000_INT inst_LDS_000_INT inst_CLK_OUT_PRE_D CLK_000_D_1_ CLK_000_D_10_ CLK_000_D_11_ inst_DTACK_D0 inst_RESET_OUT CLK_000_D_0_ inst_CLK_OUT_PRE_50 IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_3_ CLK_000_D_4_ CLK_000_D_5_ CLK_000_D_6_ CLK_000_D_7_ CLK_000_D_8_ CLK_000_D_9_ CLK_000_D_12_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_DS_000_ENABLE SM_AMIGA_6_ SM_AMIGA_0_ SM_AMIGA_4_ RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_CLK_030_H SM_AMIGA_1_ SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ +#$ PINS 61 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_2_ FC_1_ AS_030 SIZE_0_ AS_000 AHIGH_30_ AHIGH_29_ DS_030 AHIGH_28_ UDS_000 AHIGH_27_ LDS_000 AHIGH_26_ nEXP_SPACE AHIGH_25_ BERR AHIGH_24_ BG_030 A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ BGACK_000 A_DECODE_19_ CLK_030 A_DECODE_18_ CLK_000 A_DECODE_17_ CLK_OSZI A_DECODE_16_ CLK_DIV_OUT FPU_CS FPU_SENSE DTACK AVEC E VPA RST RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_1_ IPL_0_ FC_0_ A_1_ IPL_030_2_ RW_000 BG_000 BGACK_030 CLK_EXP DSACK1 VMA RW A_0_ IPL_030_1_ IPL_030_0_ +#$ NODES 51 cpu_est_3_ cpu_est_0_ cpu_est_1_ cpu_est_2_ inst_AS_000_INT inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA CYCLE_DMA_0_ CYCLE_DMA_1_ SIZE_DMA_0_ SIZE_DMA_1_ inst_VPA_D inst_UDS_000_INT inst_LDS_000_INT inst_CLK_OUT_PRE_D CLK_000_D_8_ CLK_000_D_9_ inst_DTACK_D0 inst_RESET_OUT CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_25 IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_3_ CLK_000_D_4_ CLK_000_D_5_ CLK_000_D_6_ CLK_000_D_7_ CLK_000_D_10_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_DS_000_ENABLE SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_0_ RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_CLK_030_H SM_AMIGA_1_ SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ .type fr -.i 104 -.o 177 -.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q VMA.Q cpu_est_3_.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q inst_AS_000_INT.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q SIZE_DMA_0_.Q SIZE_DMA_1_.Q inst_VPA_D.Q inst_UDS_000_INT.Q inst_LDS_000_INT.Q inst_CLK_OUT_PRE_D.Q CLK_000_D_1_.Q CLK_000_D_10_.Q CLK_000_D_11_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_3_.Q CLK_000_D_4_.Q CLK_000_D_5_.Q CLK_000_D_6_.Q CLK_000_D_7_.Q CLK_000_D_8_.Q CLK_000_D_9_.Q CLK_000_D_12_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q DSACK1.Q inst_DS_000_ENABLE.Q SM_AMIGA_6_.Q SM_AMIGA_0_.Q SM_AMIGA_4_.Q RW_000.Q RW.Q RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q inst_CLK_030_H.Q SM_AMIGA_1_.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q BG_000.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN -.ob DS_030 FPU_CS AVEC E RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SM_AMIGA_i_7_.C SM_AMIGA_6_.C SM_AMIGA_5_.C SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.C SM_AMIGA_1_.C SM_AMIGA_0_.C cpu_est_2_.C cpu_est_3_.C IPL_030_0_.C IPL_030_1_.C IPL_030_2_.C IPL_D0_0_.C IPL_D0_1_.C IPL_D0_2_.C CLK_000_D_6_.C CLK_000_D_7_.C CLK_000_D_8_.C CLK_000_D_9_.C CLK_000_D_10_.C CLK_000_D_11_.C CLK_000_D_12_.C CYCLE_DMA_0_.C CYCLE_DMA_1_.C SIZE_DMA_0_.C SIZE_DMA_1_.C cpu_est_0_.C cpu_est_1_.C RST_DLY_1_.C RST_DLY_2_.C CLK_000_D_0_.C CLK_000_D_1_.C CLK_000_D_2_.C CLK_000_D_3_.C CLK_000_D_4_.C CLK_000_D_5_.C RST_DLY_0_.C inst_AS_000_DMA.C inst_AS_030_000_SYNC.C inst_AS_000_INT.C DSACK1.C inst_DS_000_DMA.C inst_AS_030_D0.C inst_VPA_D.C inst_DTACK_D0.C inst_CLK_030_H.C inst_RESET_OUT.C inst_DS_000_ENABLE.C BG_000.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.C A_0_.C VMA.C RW.C RW_000.C inst_LDS_000_INT.C BGACK_030.C inst_BGACK_030_INT_D.C inst_CLK_OUT_PRE_D.C CLK_EXP.C inst_CLK_OUT_PRE_50.C SIZE_1_ AHIGH_31_ AS_030 AS_000 UDS_000 LDS_000 BERR SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE RESET.OE CIIN.OE SM_AMIGA_3_.D.X1 SM_AMIGA_3_.D.X2 SM_AMIGA_i_7_.D.X1 SM_AMIGA_i_7_.D.X2 CLK_DIV_OUT.C CLK_DIV_OUT.D BGACK_030.D VMA.T cpu_est_3_.D cpu_est_0_.D cpu_est_1_.D cpu_est_2_.D inst_AS_000_INT.D inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AS_030_D0.D inst_AS_030_000_SYNC.D inst_BGACK_030_INT_D.D inst_AS_000_DMA.D inst_DS_000_DMA.D CYCLE_DMA_0_.D CYCLE_DMA_1_.D SIZE_DMA_0_.D SIZE_DMA_1_.D inst_VPA_D.D inst_UDS_000_INT.D inst_LDS_000_INT.D inst_CLK_OUT_PRE_D.D CLK_000_D_1_.D CLK_000_D_10_.D CLK_000_D_11_.D inst_DTACK_D0.D inst_RESET_OUT.D CLK_000_D_0_.D inst_CLK_OUT_PRE_50.D IPL_D0_0_.D IPL_D0_1_.D IPL_D0_2_.D CLK_000_D_2_.D CLK_000_D_3_.D CLK_000_D_4_.D CLK_000_D_5_.D CLK_000_D_6_.D CLK_000_D_7_.D CLK_000_D_8_.D CLK_000_D_9_.D CLK_000_D_12_.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.D DSACK1.D inst_DS_000_ENABLE.D SM_AMIGA_6_.D SM_AMIGA_0_.D SM_AMIGA_4_.D RW_000.D RW.D RST_DLY_0_.D RST_DLY_1_.D RST_DLY_2_.D A_0_.D inst_CLK_030_H.D SM_AMIGA_1_.D SM_AMIGA_5_.D SM_AMIGA_2_.D BG_000.D CLK_EXP.D IPL_030_0_.D IPL_030_1_.D IPL_030_2_.D -.p 578 --------------------------------------------------------------------------------------------------------- ~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --1------------------------------------------------------------------------------------------------------ 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------0--------------0---1-------------------------------00-----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------1-------------0---1-------------------------------00-----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------1------------0---1-------------------------------00-----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------1-----------0---1-------------------------------00-----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------1---1--1----------------------------00-----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------------------------------0----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ ----------------------------------------------1-------------------------------000----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------------------------------------------0---------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ----0-----------------------------------------0---------------------0-0----------0---------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------1-----------0---------------------0-0----------0---------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------0---------0-----------0-0----------0---------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------0---------------------010----------0---------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------------------------------------------1--------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ ----------------------------------------------------------------------------------0--------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ ---------------------------------1----------------------------------1-----------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ -------------------------------------------------------------------01-----------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ -------------1--------------------------------0----1----------------10------------1---------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ --------------------------------------------------------------------1----------------------------------00 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +.i 103 +.o 175 +.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q VMA.Q cpu_est_3_.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q inst_AS_000_INT.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q SIZE_DMA_0_.Q SIZE_DMA_1_.Q inst_VPA_D.Q inst_UDS_000_INT.Q inst_LDS_000_INT.Q inst_CLK_OUT_PRE_D.Q CLK_000_D_8_.Q CLK_000_D_9_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_25.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_3_.Q CLK_000_D_4_.Q CLK_000_D_5_.Q CLK_000_D_6_.Q CLK_000_D_7_.Q CLK_000_D_10_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q DSACK1.Q inst_DS_000_ENABLE.Q SM_AMIGA_6_.Q SM_AMIGA_4_.Q SM_AMIGA_0_.Q RW_000.Q RW.Q RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q inst_CLK_030_H.Q SM_AMIGA_1_.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q BG_000.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN +.ob DS_030 FPU_CS AVEC E RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SM_AMIGA_i_7_.C SM_AMIGA_6_.C SM_AMIGA_5_.C SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.C SM_AMIGA_1_.C SM_AMIGA_0_.C cpu_est_2_.C cpu_est_3_.C IPL_030_0_.C IPL_030_1_.C IPL_030_2_.C IPL_D0_0_.C IPL_D0_1_.C IPL_D0_2_.C CLK_000_D_4_.C CLK_000_D_5_.C CLK_000_D_6_.C CLK_000_D_7_.C CLK_000_D_8_.C CLK_000_D_9_.C CLK_000_D_10_.C CYCLE_DMA_0_.C CYCLE_DMA_1_.C SIZE_DMA_0_.C SIZE_DMA_1_.C cpu_est_0_.C cpu_est_1_.C RST_DLY_1_.C RST_DLY_2_.C CLK_000_D_0_.C CLK_000_D_1_.C CLK_000_D_2_.C CLK_000_D_3_.C RST_DLY_0_.C inst_LDS_000_INT.C BGACK_030.C inst_AS_000_DMA.C inst_AS_030_000_SYNC.C inst_AS_000_INT.C DSACK1.C inst_DS_000_DMA.C inst_AS_030_D0.C inst_VPA_D.C inst_DTACK_D0.C inst_CLK_030_H.C inst_RESET_OUT.C inst_DS_000_ENABLE.C inst_CLK_OUT_PRE_25.C BG_000.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.C A_0_.C VMA.C RW.C RW_000.C inst_BGACK_030_INT_D.C inst_CLK_OUT_PRE_D.C inst_CLK_OUT_PRE_50.C CLK_EXP.C SIZE_1_ AHIGH_31_ AS_030 AS_000 UDS_000 LDS_000 BERR SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE RESET.OE CIIN.OE SM_AMIGA_3_.D.X1 SM_AMIGA_3_.D.X2 SM_AMIGA_i_7_.D.X1 SM_AMIGA_i_7_.D.X2 CLK_DIV_OUT.C CLK_DIV_OUT.D BGACK_030.D VMA.T cpu_est_3_.D cpu_est_0_.D cpu_est_1_.D cpu_est_2_.D inst_AS_000_INT.D inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AS_030_D0.D inst_AS_030_000_SYNC.D inst_BGACK_030_INT_D.D inst_AS_000_DMA.D inst_DS_000_DMA.D CYCLE_DMA_0_.D CYCLE_DMA_1_.D SIZE_DMA_0_.D SIZE_DMA_1_.D inst_VPA_D.D inst_UDS_000_INT.D inst_LDS_000_INT.D inst_CLK_OUT_PRE_D.D CLK_000_D_8_.D CLK_000_D_9_.D inst_DTACK_D0.D inst_RESET_OUT.D CLK_000_D_1_.D CLK_000_D_0_.D inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_25.D IPL_D0_0_.D IPL_D0_1_.D IPL_D0_2_.D CLK_000_D_2_.D CLK_000_D_3_.D CLK_000_D_4_.D CLK_000_D_5_.D CLK_000_D_6_.D CLK_000_D_7_.D CLK_000_D_10_.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.D DSACK1.D inst_DS_000_ENABLE.D SM_AMIGA_6_.D SM_AMIGA_4_.D SM_AMIGA_0_.D RW_000.D RW.D RST_DLY_0_.D RST_DLY_1_.D RST_DLY_2_.D A_0_.D inst_CLK_030_H.D SM_AMIGA_1_.D SM_AMIGA_5_.D SM_AMIGA_2_.D BG_000.D CLK_EXP.D IPL_030_0_.D IPL_030_1_.D IPL_030_2_.D +.p 569 +------------------------------------------------------------------------------------------------------- ~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-1----------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--0---------------------------------------------------------------------------------------------------- ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1-------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +-----0------------------------------------------------------------------------------------------------- ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------1----------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------1---------------------------------------------------------------------------------------------- ~~~~~~~~~~11111111111111111111111111111111111111111111111111111111111111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1--------------------------------------------------------------------------------------------- ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------1-------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------0------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~1111111~~11111~~~1~~~~~111~~~~~~~11~~~~11~~~1~~~~1~111 +----------------1-------------------------------------------------------------------------------------- ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------1------------------------------------------------------------------------------------- ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------0------------------------------------------------------------------------------------ ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------1----------------------------------------------------------------------------------- ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------1---------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------1--------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------0-------------------------------------------------------------------------------- ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1------------------------------------------------------------------------------ ~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----1------------------1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------0------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------10------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +-----------------------00------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------0------------0----------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------01-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0-1------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0-11------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------01------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------10-0------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1-00------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------1----------------------------------------------------------------------- ~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1------1----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------------------------1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--1-------------0010--1----------1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1--------1--------------------------------------------------------------------- ~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0--------1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------0-------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~1~~~~~~~~~~~~~ +---------------------------------10-------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0----------------------------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------1------------------------------------------------------------------ 1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------11---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------00---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------1----1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------1-----1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------01-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------10-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------1---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +---------------------------------------------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------1-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ +------------1-----------------------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1-----------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0-----------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------0-----------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~111111111~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------0------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1------------------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1----------------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1----------------------0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1---------------------0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------1--------------------0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------1-------------------0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1-------------------------1-----------0-1--0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +--------------------------------1------------11--0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1-----------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1----------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------1---------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------1--------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1-------------------------1-----------0-1---1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +--------------------------------1------------11---1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-------------------------00000-------------------01---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1-------------------0---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1-----------------0---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0---------------------10---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------010--------------------10---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------111-------------------10---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------110-------------------10---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1------------10110-----------0-------10---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------0--------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------01-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------10-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-1------------------11-------------------------------111----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~111 +-1------------------10-------------------------------011----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11 +-1------------------01-------------------------------101----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1 +-1------------------00-------------------------------001----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-0------------------11-------------------------------110----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~ +-0------------------10-------------------------------010----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-0------------------01-------------------------------100----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------------------------------------------1---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1-------------0--0------------0---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +--------------------------------1-------------0---1-----------0---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +------------------------1--------------------------------------1--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +------------------------0--------------------------------------1--------------------------------------- ~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1-------------------------------------0-1--0--------------1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +---------------------------------------------11--0--------------1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +------1-------------------------------------0-1---1-------------1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +---------------------------------------------11---1-------------1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +----------------------------------------------0--0------------0-1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +----------------------------------------------0---1-----------0-1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1------------------------------------01---------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +------------------------------1-----------------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1---------------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1-----------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1----------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1------------------------------------01----------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +-------------------------------------------------01-----------------1---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +-------------------------------------------------1-------------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +--------------------------------------------------0------------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +------------------------------------------------------------------0--1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +------------------------1---------------------------------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +------------1------------------------------------0---------------------1------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +------------1-------------------------------------1--------------------1------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +------------1------------------------------------10--------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +------------1------------------------------------0----------------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +------------1-------------------------------------1---------------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +------------1------------------------------------10--------------------11------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +------------1----------------------------------------------------------01------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +------------1------------------------------------10--------------------10------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +------------1------------------------------------------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +------------1-----------------------------------------------------------11----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +------------1----------------------------------------------------------111----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +------------1------------------------------------10--------------------111----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------1---------------------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +------------1------------------------------------10-------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +--------------------------------1-------------------------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------1-----------0-------------------------- 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +------------1------------------------------------01----------------1----------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1------------------------------------01----------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +---------------------------------1----------------------------------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +---1--------1--------------------0---------------10-----------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +---0-----------------------------------------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +--------------------------------0------------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +--------------------------------------------------0------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +---------------------1------------------------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-----------------------------------------------------1----------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------0---------------------------------1---------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------1---------------------------------0---------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-0-----------------------------------------------------1--------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-1-----------------------------------------------------0--------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------1--------------------------------------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +---------------------0-------------------------------1-----------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +---------------------1-------------------------------0-----------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +------------------------------------------------------1----------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-0-----------------------------------------------------1---------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-1-----------------------------------------------------0---------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-1----------------------------------------------------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +---------------------0-------------------------------1------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +---------------------1-------------------------------0------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +--------------------0---------------------------------1-----------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +--------------------1---------------------------------0-----------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-------------------------------------------------------1----------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-------------------------------------------------------------------------------------1----------------- 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0------------0-----------01-----------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0------------10----------01-----------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0------------1------------0-----------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0-------------1-----------0-----------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0--------------------------------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +---0--------------------0-------------------------------------------------------------01--------------- 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------1--------------------------------------0-----------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0---------------------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +------0-----1-----------0----------0-01-----------------------------------------------0-0-------------- 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +------------------------0---------------------------------------------------------------00------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +1------------111----------------0-----------------------------------------------------------00000000--- ~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------1---------------------------------1-- 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1--------------------1--------------------------------000-------0000---------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1------------------------------------0----------------000-------0000---------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-------------------------------------1---------------000-------0000---------------------1- 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1---------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1-------------------------------------0-1--0---------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +---------------------------------------------11--0---------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +------1-------------------------------------0-1---1--------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +---------------------------------------------11---1--------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------0--------------------------------------------------0- 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~00000000000~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +0--0--------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----0------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------0----------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------0---------------------------------------------------------------------------------------------- ~~~~~~~~~~00000000000000000000000000000000000000000000000000000000000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------0--------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-0----------1------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----0------1------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------0-1------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------01------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------0------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0000~~~~~~~~~~~~~~~00~~~~~~~~~0~~~~~~~~~~~~~~~~0000~~000~0000~~~~~ +-------------0----------------------------------------------------------------------------------------- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0---------0----------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------0---------------------------------------------------------------------------------------- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------0---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------0--------------------------------------------------------------------------------------- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------0--------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------1-------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------1------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------0------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------1----------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-------0---------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1--------0--------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------0-------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~00000000000~00~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +------------------------0------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1----------10------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1----------00------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +------------0------------1----------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-------------1---------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1-1-------------------------------------------------------------------------- ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1--------------01-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1--0-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1-0-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------00-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1----------------1------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------01------------------------------------------------------------------------- ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0--0------------------------------------------------------------------------- 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~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------1------0--1-------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------1---------0-------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +-------------------------------------11---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +-------------------------------------00---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +---------------------------------------1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------1--------------0--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------0-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------1---------------0-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1---------------1------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------0---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +---------------------------------------------0--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------0------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00000~~000000000~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0------------------------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1------------0-----------------------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1----------------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-------------------------------------0-----------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------0----------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1---------------0-------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0--------------0-------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1-------------0-------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------1------------0-------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------1-----------0-------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------1-----1-1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0----------------------0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0---------------------0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------0--------------------0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------0-------------------0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------00----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0-----------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1--------------1----------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0----------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------0---------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------0--------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---10-------1-------------------1-----------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +------------------------------------------------0-1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------11---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------01---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~000~~~~~~~~~0~~~~~ +-------------------------------------1-----------01---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------11----------01---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------0---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0-------------------------0---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1-----------------0---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-------------------------------------0------------0---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------0-----------0---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------10---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~ +---------------------------1---------------------10---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------11--------------------10---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------10--------------------10---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0-1-------------------10---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------111-------------------10---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1-0-------------------10---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------00---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1------------------------------------00---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1--------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------11-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------0-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------00-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-1----------1-------10-------------------------------011----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-1----------1-------01-------------------------------101----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-1----------1-------00-------------------------------001----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~ +-0----------1-------11-------------------------------110----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-0----------1-------10-------------------------------010----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0 +-0----------1-------01-------------------------------100----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00 +-0----------1-------00-------------------------------000----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~000 +--------------------------------------------------------0---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------0--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------0------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------0------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------0----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0--------------------------------------0--------------------------------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------1---------1----------------------------0--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +------------------------------------------0----------------------1------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0---------------------1------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1---------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +--------------------------------------------------0--------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +------------1------------------------------------01---------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------------------------0-----------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1------------------------------0----------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------0-----------------0----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +--------------------------------------------------1----------------0----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +--------------------------------1---------------------------------00----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------000----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-------------------------------------------------0------------------0---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +--------------------------------------------------1-----------------0---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +------------1-----------1---------1-----------------------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +------------------------------------------------0----------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------0---------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +--------------------------------------------------1--------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +------------------------------------------------0-----------------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------0----------------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +--------------------------------------------------1---------------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +-------------------------------------------------10--------------------10------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +-----------------------------------------------------------------------00------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +------------------------------------------------0------------------------0----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------0-----------------------0----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +--------------------------------------------------1----------------------0----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-------------------------------------------------10--------------------1-0----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +-----------------------------------------------------------------------0-0----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-------------------------------------------------10--------------------110----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +------------------------------------------------------------------------00----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +------------1-----------1-------------------------------------------------0---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +------1--------------------------------------------------------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +-----------------------------------1---------------------------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +------0-----1--------------------------------01-----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +------------1-------------------------------101-----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +------------1------------------------------------10-------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +------------1---------------------------------0---------------1-------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1--------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +--------------------------------------------------0-------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +--------------------------------------------------------------------0-------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +-------------------------------------------------1---------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +--------------------------------------------------0--------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +------------------------------------------------------------------0----------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-------------------------------------------------------------------0---------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +-------------------------1---------------0-------1--------------------------001------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0--------------0-------1--------------------------001------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1-------------0-------1--------------------------001------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------1------------0-------1--------------------------001------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------1-----------0-------1--------------------------001------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------1-----1-1--------------------------001------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1----------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1----------------1---------000------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1-----------------1--------000------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1------------------1-------000------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1--------------------------0001----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1---------------0-------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +--------------------------0--------------0-------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +---------------------------1-------------0-------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +----------------------------1------------0-------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-----------------------------1-----------0-------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-----------------------------------------1-----1-------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-------------------------------------------------0-----------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +--------------------------------------------------1----------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +----------------------------------------------------------------------------0--0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +------------------------------------------------------------------------------00----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +------------------------------------------------------------------0-------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +------------1------------------------------------1-------------------0----------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +------------1-------------------------------------0------------------0----------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +------------1-----------------------------------------------------0-00----------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +---0----------------------------------------------------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +---------------------------------1----------------------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-------------------------------------------------0------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +--------------------------------------------------1-----------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +----0-------1--------------------------------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +------------1--------0------------------------------------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +------------1----------------------------------------0----------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +------------1-------0---------------------------------1---------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +------------1-------1---------------------------------0---------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-0----------1------------------------------------------1--------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-1----------1------------------------------------------0--------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +------------1-------0--------------------------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +------------1--------0-------------------------------1-----------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +------------1--------1-------------------------------0-----------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +------------1-----------------------------------------0----------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-0----------1------------------------------------------1---------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-1----------1------------------------------------------0---------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-0----------1-----------------------------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +------------1--------0-------------------------------1------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +------------1--------1-------------------------------0------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +------------1-------0---------------------------------1-----------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +------------1-------1---------------------------------0-----------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +------------1------------------------------------------0----------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-------------------------------------------------------------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1------------------------------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--1--1---0------0010--1--------------------------------------------------------------0----------------- ~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0------------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +------------1-----------0-------------------------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------0--------------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------0-------------------------------------------------0---------------- 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0-----------001------------------------------------0----------0-0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0-----------010------------------------------------0----------0-0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0------------01-----------------------------------------------010-------------- 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +------1-----1-----------0------------01-----------------------------------------------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0----------0-01-----------------------------------------------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0-----1-----------0-----------001-----------------------------------------------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1-----1-----------0------------10-----------------------------------------------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0----------0-10-----------------------------------------------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0-----1-----------0-----------010-----------------------------------------------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1-----1-----------0----------0-01------------------------------------1----------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1-----1-----------0----------0-10------------------------------------1----------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0-----------001------------------------------------0----------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0-----------010------------------------------------0----------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0------------01-----------------------------------------------01-0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0------------10-----------------------------------------------01-0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------0---------------------------------------------------------------00------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------------------------------------------------1-----------------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------------------------------------------------1------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------------------------------1---------- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------------------------------------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------------------------------------1--------- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------------------------------------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------------------------1-------- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0------------------------------------------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------------------------1------- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-------------------------------------------------------------------------------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------------------------1------ ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------------------------------------------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------------------------------1----- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0---------------------------------------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------------------------------------1---- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------------------------------------------------------------------------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------------------------------------------1--- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------------------------------------------------------------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------------------------------------------------1---------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------------------------------------------------1---------------------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-----------------0-0--------------------------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-------------------00-------------------------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-----------------------------0---------------10--------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1-------------------0-------------------------------0------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------1----------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------1---------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------1------------------1--------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------0-----------------1--------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------1------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------1-----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------1----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------0----------------------------1----------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------------1---------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--01--------1-----------1-------0-1---------------------------------------------0--------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--------1---1-------1-------0-1---------------------------------------------0--------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--------1----1------1-------0-1---------------------------------------------0--------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--------1-----0-----1-------0-1---------------------------------------------0--------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--------1------1----1-------0-1---------------------------------------------0--------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--------1---------0-1-------0-1---------------------------------------------0--------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1---------------0-----------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +--------------------------0--------------0-----------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +---------------------------1-------------0-----------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +----------------------------1------------0-----------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-----------------------------1-----------0-----------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-----------------------------------------1-----1-----------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-------------------------------------------------1---------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~00~~~~~~ +-------------------------------------------------0---------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~0~~~~~ +--------------------------------------------------1--------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~0~~~~~ +-------------------------------------------------11--------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------0--------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~00~~~~~~ +-------------------------------------------------00--------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------0----------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +------------------------------------------------------------------00---------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------0------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------0-----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------0----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +---0---------------------------------------------1--------------------------000----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------1---------------1--------------------------000----------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------------0---------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-------------------------------------------------0----------------00-----------0---------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------------------1--------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +--------------------------------1----------------------------------0----------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------0-0----------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +------------1------------------------------------01---------------1-0-----------1---------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +-------------------------------------------------------------------0---------------------------------00 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ .end diff --git a/Logic/68030_tk.tt4 b/Logic/68030_tk.tt4 index 52d16ca..2e903ca 100644 --- a/Logic/68030_tk.tt4 +++ b/Logic/68030_tk.tt4 @@ -1,28 +1,28 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Fri Aug 19 00:39:35 2016 +#$ DATE Wed Aug 24 22:17:49 2016 #$ MODULE BUS68030 -#$ PINS 61 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 - UDS_000 LDS_000 nEXP_SPACE BERR BG_030 SIZE_0_ AHIGH_30_ BGACK_000 AHIGH_29_ - CLK_030 AHIGH_28_ CLK_000 AHIGH_27_ CLK_OSZI AHIGH_26_ CLK_DIV_OUT AHIGH_25_ - AHIGH_24_ FPU_CS A_DECODE_22_ FPU_SENSE A_DECODE_21_ A_DECODE_20_ DTACK - A_DECODE_19_ AVEC A_DECODE_18_ E A_DECODE_17_ VPA A_DECODE_16_ RST RESET +#$ PINS 61 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_2_ FC_1_ AS_030 SIZE_0_ AS_000 + AHIGH_30_ AHIGH_29_ DS_030 AHIGH_28_ UDS_000 AHIGH_27_ LDS_000 AHIGH_26_ + nEXP_SPACE AHIGH_25_ BERR AHIGH_24_ BG_030 A_DECODE_22_ A_DECODE_21_ + A_DECODE_20_ BGACK_000 A_DECODE_19_ CLK_030 A_DECODE_18_ CLK_000 A_DECODE_17_ + CLK_OSZI A_DECODE_16_ CLK_DIV_OUT FPU_CS FPU_SENSE DTACK AVEC E VPA RST RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_1_ IPL_0_ FC_0_ A_1_ IPL_030_2_ RW_000 BG_000 BGACK_030 CLK_EXP DSACK1 VMA RW A_0_ IPL_030_1_ IPL_030_0_ -#$ NODES 53 cpu_est_3_ cpu_est_0_ cpu_est_1_ cpu_est_2_ inst_AS_000_INT +#$ NODES 52 cpu_est_3_ cpu_est_0_ cpu_est_1_ cpu_est_2_ inst_AS_000_INT inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA CYCLE_DMA_0_ CYCLE_DMA_1_ SIZE_DMA_0_ SIZE_DMA_1_ inst_VPA_D inst_UDS_000_INT inst_LDS_000_INT - inst_CLK_OUT_PRE_D CLK_000_D_1_ CLK_000_D_10_ CLK_000_D_11_ inst_DTACK_D0 - inst_RESET_OUT CLK_000_D_0_ inst_CLK_OUT_PRE_50 IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ - CLK_000_D_2_ CLK_000_D_3_ CLK_000_D_4_ CLK_000_D_5_ CLK_000_D_6_ CLK_000_D_7_ - CLK_000_D_8_ CLK_000_D_9_ CLK_000_D_12_ inst_AMIGA_BUS_ENABLE_DMA_HIGH - inst_DS_000_ENABLE SM_AMIGA_6_ SM_AMIGA_0_ SM_AMIGA_4_ RST_DLY_0_ RST_DLY_1_ + inst_CLK_OUT_PRE_D CLK_000_D_8_ CLK_000_D_9_ inst_DTACK_D0 inst_RESET_OUT + CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_25 IPL_D0_0_ + IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_3_ CLK_000_D_4_ CLK_000_D_5_ + CLK_000_D_6_ CLK_000_D_7_ CLK_000_D_10_ inst_AMIGA_BUS_ENABLE_DMA_HIGH + inst_DS_000_ENABLE SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_0_ RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_CLK_030_H SM_AMIGA_1_ SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ CIIN_0 .type f -.i 105 -.o 180 +.i 104 +.o 178 .ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ @@ -31,23 +31,23 @@ inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q SIZE_DMA_0_.Q SIZE_DMA_1_.Q inst_VPA_D.Q inst_UDS_000_INT.Q inst_LDS_000_INT.Q inst_CLK_OUT_PRE_D.Q - CLK_000_D_1_.Q CLK_000_D_10_.Q CLK_000_D_11_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q - CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q - CLK_000_D_2_.Q CLK_000_D_3_.Q CLK_000_D_4_.Q CLK_000_D_5_.Q CLK_000_D_6_.Q - CLK_000_D_7_.Q CLK_000_D_8_.Q CLK_000_D_9_.Q CLK_000_D_12_.Q + CLK_000_D_8_.Q CLK_000_D_9_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q CLK_000_D_1_.Q + CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_25.Q IPL_D0_0_.Q + IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_3_.Q CLK_000_D_4_.Q + CLK_000_D_5_.Q CLK_000_D_6_.Q CLK_000_D_7_.Q CLK_000_D_10_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q DSACK1.Q inst_DS_000_ENABLE.Q SM_AMIGA_6_.Q - SM_AMIGA_0_.Q SM_AMIGA_4_.Q RW_000.Q RW.Q RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q + SM_AMIGA_4_.Q SM_AMIGA_0_.Q RW_000.Q RW.Q RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q inst_CLK_030_H.Q SM_AMIGA_1_.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q BG_000.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN CIIN_0 -.ob SIZE_1_ SIZE_1_.OE AHIGH_31_ AHIGH_31_.OE AS_030% AS_030.OE AS_000% - AS_000.OE DS_030% DS_030.OE UDS_000% UDS_000.OE LDS_000% LDS_000.OE BERR BERR.OE - SIZE_0_ SIZE_0_.OE AHIGH_30_ AHIGH_30_.OE AHIGH_29_ AHIGH_29_.OE AHIGH_28_ - AHIGH_28_.OE AHIGH_27_ AHIGH_27_.OE AHIGH_26_ AHIGH_26_.OE CLK_DIV_OUT.D - CLK_DIV_OUT.C AHIGH_25_ AHIGH_25_.OE AHIGH_24_ AHIGH_24_.OE FPU_CS% AVEC E RESET - RESET.OE AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW% +.ob SIZE_1_ SIZE_1_.OE AHIGH_31_ AHIGH_31_.OE AS_030% AS_030.OE SIZE_0_ + SIZE_0_.OE AS_000% AS_000.OE AHIGH_30_ AHIGH_30_.OE AHIGH_29_ AHIGH_29_.OE + DS_030% DS_030.OE AHIGH_28_ AHIGH_28_.OE UDS_000% UDS_000.OE AHIGH_27_ + AHIGH_27_.OE LDS_000% LDS_000.OE AHIGH_26_ AHIGH_26_.OE AHIGH_25_ AHIGH_25_.OE + BERR BERR.OE AHIGH_24_ AHIGH_24_.OE CLK_DIV_OUT.D CLK_DIV_OUT.C FPU_CS% AVEC E + RESET RESET.OE AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW% AMIGA_BUS_ENABLE_HIGH CIIN CIIN.OE IPL_030_2_.D% IPL_030_2_.C RW_000.D% RW_000.C RW_000.OE BG_000.D% BG_000.C BGACK_030.D BGACK_030.C CLK_EXP.D CLK_EXP.C DSACK1.D% DSACK1.C DSACK1.OE VMA.T VMA.C RW.D% RW.C RW.OE A_0_.D A_0_.C A_0_.OE @@ -61,226 +61,225 @@ CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C SIZE_DMA_0_.D% SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C inst_VPA_D.D% inst_VPA_D.C inst_UDS_000_INT.D% inst_UDS_000_INT.C inst_LDS_000_INT.D inst_LDS_000_INT.C - inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C CLK_000_D_1_.D CLK_000_D_1_.C - CLK_000_D_10_.D CLK_000_D_10_.C CLK_000_D_11_.D CLK_000_D_11_.C inst_DTACK_D0.D% - inst_DTACK_D0.C inst_RESET_OUT.D inst_RESET_OUT.C CLK_000_D_0_.D CLK_000_D_0_.C - inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C IPL_D0_0_.D% IPL_D0_0_.C IPL_D0_1_.D% - IPL_D0_1_.C IPL_D0_2_.D% IPL_D0_2_.C CLK_000_D_2_.D CLK_000_D_2_.C - CLK_000_D_3_.D CLK_000_D_3_.C CLK_000_D_4_.D CLK_000_D_4_.C CLK_000_D_5_.D - CLK_000_D_5_.C CLK_000_D_6_.D CLK_000_D_6_.C CLK_000_D_7_.D CLK_000_D_7_.C - CLK_000_D_8_.D CLK_000_D_8_.C CLK_000_D_9_.D CLK_000_D_9_.C CLK_000_D_12_.D - CLK_000_D_12_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D% + inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C CLK_000_D_8_.D CLK_000_D_8_.C + CLK_000_D_9_.D CLK_000_D_9_.C inst_DTACK_D0.D% inst_DTACK_D0.C inst_RESET_OUT.D + inst_RESET_OUT.C CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_0_.D CLK_000_D_0_.C + inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_25.D + inst_CLK_OUT_PRE_25.C IPL_D0_0_.D% IPL_D0_0_.C IPL_D0_1_.D% IPL_D0_1_.C + IPL_D0_2_.D% IPL_D0_2_.C CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D + CLK_000_D_3_.C CLK_000_D_4_.D CLK_000_D_4_.C CLK_000_D_5_.D CLK_000_D_5_.C + CLK_000_D_6_.D CLK_000_D_6_.C CLK_000_D_7_.D CLK_000_D_7_.C CLK_000_D_10_.D + CLK_000_D_10_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D% inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C - SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_4_.D - SM_AMIGA_4_.C RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.D.X1 RST_DLY_1_.D.X2 + SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_0_.D + SM_AMIGA_0_.C RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.D.X1 RST_DLY_1_.D.X2 RST_DLY_1_.C RST_DLY_2_.D RST_DLY_2_.C inst_CLK_030_H.D inst_CLK_030_H.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_3_.D.X1 SM_AMIGA_3_.D.X2 SM_AMIGA_3_.C SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_i_7_.D.X1 SM_AMIGA_i_7_.D.X2 SM_AMIGA_i_7_.C CIIN_0 -.phase 111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 -.p 204 ----------------------------------------01---------------------------------------------------------------- 100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0-------------------------------------------------------------------------------- 010000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------------------------------------------------------------------- 000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0------------------------1------------------------------------------------------- 000101000100000000010101010100010100000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------0---------------------------------------------------0----------------- 000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------0-------------------------------------------------------0------------------ 000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1------------------------1------------------------------------------------------- 000000010001010000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------0--------------------------------------------------0----------------- 000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------------0-----------------------1-------------------------------------- 000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------------0----------------------1-------------------------------------- 000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---1--1---1------0010--1---------------------------------------------------------------0------------------ 000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------10---------------------------------------------------------------- 000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------1------------------------------------------------------------ 000000000000000000000000000010000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------1------------------------------------------------------------------------------------------------ 000000000000000000000000000001000000000000000010100101010100101001001010101010010101010101010101010101010101010101010101010101010101010101010101010101010101010100101010101001010010 ---1--1---0------0010--1---------------------------------------------------------------0------------------ 000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------0-11--------------------------------------------------------------------------- 000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1-00--------------------------------------------------------------------------- 000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------------------0------------------------------------------------------- 000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0--------------------------------------------------------------01---------------- 000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1---------------------------------------------------------------0---------------- 000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0------0------------------------------------------------------------------------- 000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1--------1----------------------------------------------------------------------- 000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0---------------------------------------1---------------------------------------- 000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -1------------111----------------0------------------------------------------------------------00000000---- 000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 ---------------------------------------------------------------------------------------------------------1 000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------11------------------------------110-------------------------------------------------- 000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------10------------------------------010-------------------------------------------------- 000000000000000000000000000000000000000000000100000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------01------------------------------100-------------------------------------------------- 000000000000000000000000000000000000000000000100000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------00------------------------------000-------------------------------------------------- 000000000000000000000000000000000000000000000100000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1------------------------------------------------------------------------0------------------- 000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------0------------------------------1--------------------------------0------------------- 000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------1------------------------------0--------------------------------0------------------- 000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------0--------------------------------1-------------------------------0------------------- 000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------1--------------------------------0-------------------------------0------------------- 000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------------------------------------0------------------------------0------------------- 000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------------------------------1------------------------0----------1----------------------- 000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------------------------------------0-------------------0----------1----------------------- 000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1------------------------------------------------------00-0----------1----------------------- 000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------------------------------0----1----------------10------------1---------------------0- 000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----10-------1-------------------1-----------------1------------------------------------------------------ 000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0-------1---------------------------------------------------------------------0---------------------- 000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------0-------------------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000010000000000010000000000000000000000000101000000010000010000000000000000000000000000000000000000000000000000000000000000000000000 ------1------------------1-------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------1---------------------------------------0----1------------------------------------1----------------- 000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------0-----1---------------------------------01-----------------------------1--------------------------- 000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------------------------------1-01-----------------------------1--------------------------- 000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1----------------------------------0---------------1-------------1--------------------------- 000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------------------0--------------------------------0------------------------------------1-- 000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1----------------------------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 -------------0------------0------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------00000---------------0----1------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1------------10110-----------0---1----0------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1---------1------------------------------------0--------------------------------- 000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0---------------------------------------------------------------0---------------- 000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0------------------------1------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1---------1----------------------------------------1----------------------------- 000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0----------------------------------------------------------------1--------------- 000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-------01------------------------------101-------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-------00------------------------------001-------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------0---------------------------------------------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------0------------------------------1-------------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------1------------------------------0-------------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1----------------------------------------0------------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-----------------------------------------1-----------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-----------------------------------------0-----------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-------10------------------------------011-------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------0-------------------------------------------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1---------------------------------------0------------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------0--------------------------------1-----------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------1--------------------------------0-----------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-----------------------------------------1----------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-----------------------------------------0----------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------10-0--------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1------------------0----------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1-----------------------1------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------111---------------1----0------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------1-----------------0----------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------1----------------------1------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------0-----------------1----0------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------01---------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------1----------------0----------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------1---------------------1------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------010----------------1----0------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------11----------------1----0------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------1--------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------------------------------0----1----------------1------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000 -------------1-----------------0-0---------------------------------------------------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1----------10-------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1------0--1---------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------------------------------------------------------------------------0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------------------00--------------------------------------------------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---01--------1-----------1-------0-1----------------------------------------------0--------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1---1-------1-------0-1----------------------------------------------0--------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1----1------1-------0-1----------------------------------------------0--------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1-----0-----1-------0-1----------------------------------------------0--------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1------1----1-------0-1----------------------------------------------0--------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1---------0-1-------0-1----------------------------------------------0--------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0-------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1-------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------0----------------------------1--------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------11------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------00------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------------------------------------------------------1----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------------------------------------------------------------11-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------0-----------------------------1---------------------------------------------------0---------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------1----------------------------1----------------------------------------1-----------0---------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------1---------------------------------------0-----------0---------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------1-------1-----------------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------0-------0----1------------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------1------------0------------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------01------------------------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0-------------1------1-----------------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------10------0----1------------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0-------------1-----------0------------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1---------0---------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1--------------0----------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0----------------------------------------------------------------00-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1---------1-----1---------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0----------------------------------------------------------------00-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------01-------------------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------------------------0------------------------0------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1------------------------------------------------------1---------------------------------0--- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------------1-----------------------0------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------------------------------------1-----------------------10--------0--- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------------------1----------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------------1------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------------------------1------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------1---------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000 -----------0-1-------------------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000 -------------1------------------------------------1------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000 -------------1--------------------------------1----0---------------------111------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000 --------1------------------------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000 ----------------------------------------------------0----------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 -------------1--------0----------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000 -------------1-------0------------------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000 --0----------1-------------------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000 ----------------------------------------------1----------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000 --------------------------------------------------------1------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000 ---------------------------------------------------------1------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000 ----------------------------------------------------------1----------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000 -----------------------------------------------------------1---------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000 ------------------------------------------------------------1--------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000 -------------------------------------------------------------1-------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000 --------------------------------------------------------------1------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000 ------------------------------------------------1--------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000 -------------1----------00-------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 -------------1-----------1---------1-----------------------------0---------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 -------------1--------------------------------0----1----------------00---------0--1----------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000 -------------1------------------------------------------------------000--------0--1----------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000 -------------1-------------------0---------------------------------1-----------------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000 -------------1--------------------------------0----1-----------------0---------0--1---------------------1- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000 ----1--------1--------------------0-----------0---------1-------------------------0----------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 -------------1--------------------------------1---------------------1-------------1--------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 -------------1-------------------------------------0----------------1-------------1--------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 -------------1--------------------------------1----0--------------------------1--------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 -------------1--------------------------------1----------------------1---------------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 -------------1-------------------------------------0-----------------1---------------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 -------------1--------------------------------1----0---------------------------1-------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 -------------1--------------------------------1-----------------------1--------------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 -------------1-------------------------------------0------------------1--------------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 -------------1--------------------------------0--------------------------1-------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 -------------1-------------------------------------1---------------------1-------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 -------------1--------------------------------1----0---------------------0-------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 -------------1-----------------------------------------------------------111------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 -------------1--------------------------------1----0---------------------1-0------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 -------------1--------------------------------1----0---------------------10------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 -------------1------------------------------------------------------------1------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000 -------------1--------------------------------1----0---------------------11------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000 -------------1-------------------------------------------------------------1------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000 -------0-----1-----------0----------0-01------------------------------------------------0-0--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -------0-----1-----------0----------0-10------------------------------------------------0-0--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -------------1-----------0------------01-------------------------------------1----------0-0--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -------------1-----------0------------10-------------------------------------1----------0-0--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -------0-----1-----------0----------0-01------------------------------------------------0--0-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -------0-----1-----------0----------0-10------------------------------------------------0--0-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -------------1-----------0------------01-------------------------------------1----------0--0-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -------------1-----------0------------10-------------------------------------1----------0--0-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -------------1--------------------------------0----1-----------------------------1------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000 -------------1--------------------------------0-------------------------------1------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000 -------------1-------------------------------------1--------------------------1------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000 -------------1--------------------------------0--------------------------------1-----------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000 -------------1-------------------------------------1---------------------------1-----------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000 -------------1--------------------------------0----1------------------1---------0------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 -------------1------------01000-----------0---1----0----------------------------1----------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 -------------1----------------------------1---1--0-0----------------------------1----------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 -------------1--------------------------------0----1------------------1--------------------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100001000 -------------1------------------------------------------------------------------1----------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 -------------1------------01000-----------0---1----0----------------------------1------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------1----------------------------1---1--0-0----------------------------1------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------1--------------------------------1----------------------------------1---------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------1-------------------------------------0-----------------------------1---------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------1--------------------------------0----1----------------010-------0000---------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 ----0--------1------------------------------------------------------000-------0000---------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1--------------------1---------------------------------000-------0000---------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1--------------------------------1---------------------000-------0000---------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1------------------------------------------0-----------000-------0000---------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1--------------------------------0----1----------------1----------------------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1--------------------------------1----0--------------------------1------------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1--------------------------------1----0---------------------------1-----------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1------------01000-----------0---1----0----------------------------1----------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1----------------------------1---1--0-0----------------------------1----------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1--------------------------------0----1-----------------------------1---------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 ----1--------1--------------------0-----------0---------1-----------000-------0000---------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1-----------------------------------------------------------------------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 +.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 +.p 203 +---------------------------------------01--------------------------------------------------------------- 1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---0--------------------0------------------------------------------------------------------------------- 0100000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------------------------------------------------------------------------- 0000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---0--------------------0-----------------------1------------------------------------------------------- 0001010000010101010001000101000100000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------0--------------------------------------------------0----------------- 0000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------------------10--------------------------------------------------------------- 0000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------0------------------------------------------------------0------------------ 0000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1-----------------------1------------------------------------------------------- 0000000001000000000100010000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------0-------------------------------------------------0----------------- 0000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------------0----------------------1-------------------------------------- 0000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------------0---------------------1-------------------------------------- 0000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--1--1---1------0010--1--------------------------------------------------------------0------------------ 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------------------------1----------------------------------------------------------- 0000000000000000000000000000000010000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------1----------------------------------------------------------------------------------------------- 0000000000000000000000000000000001000000000000101001010101001010010010101010100101010101010101010101010101010101010101010101010101010101010101010101010101010100101010101001010010 +--1--1---0------0010--1--------------------------------------------------------------0------------------ 0000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------0-11-------------------------------------------------------------------------- 0000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------1-00-------------------------------------------------------------------------- 0000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------------------0------------------------------------------------------- 0000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---0--------------------0-------------------------------------------------------------01---------------- 0000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1--------------------------------------------------------------0---------------- 0000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0------0------------------------------------------------------------------------ 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1--------1---------------------------------------------------------------------- 0000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0--------------------------------------1---------------------------------------- 0000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +1------------111----------------0-----------------------------------------------------------00000000---- 0000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 +-------------------------------------------------------------------------------------------------------1 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0----------1-------11-------------------------------110------------------------------------------------ 0000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0----------1-------10-------------------------------010------------------------------------------------ 0000000000000000000000000000000000000000000001000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0----------1-------01-------------------------------100------------------------------------------------ 0000000000000000000000000000000000000000000001000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0----------1-------00-------------------------------000------------------------------------------------ 0000000000000000000000000000000000000000000001000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0----------1-----------------------------------------------------------------------0------------------- 0000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1--------0-------------------------------1------------------------------0------------------- 0000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1--------1-------------------------------0------------------------------0------------------- 0000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------0---------------------------------1-----------------------------0------------------- 0000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------1---------------------------------0-----------------------------0------------------- 0000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1------------------------------------------0----------------------------0------------------- 0000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1------------------------------------1-------------------0----------1----------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------------------------------------0------------------0----------1----------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------------------------------------------------0-00----------1----------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1------------------------------------01---------------1-0-----------1---------------------0- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---10-------1-------------------1-----------------1----------------------------------------------------- 0000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0-------1--------------------------------------------------------------------0---------------------- 0000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------0------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000100000000000100000000000000000000000001010000000100000100000000000000000000000000000000000000000000000000000000000000000000000 +-----1------------------1------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----1-------------------------------------------01-----------------------------------1----------------- 0000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------0-----1--------------------------------01-----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------------------------------101-----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1------------------------------------10-------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 +------------1---------------------------------0---------------1-------------1--------------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------------------0-------------------------------0------------------------------------1-- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1---------------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 +------------0------------0------------------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------00000-------------------01----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1------------10110-----------0-------10----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------1---------1-----------------------------------0--------------------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0--------------------------------------------------------------0---------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0-----------------------1------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1---------1---------------------------------------1----------------------------- 0000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0---------------------------------------------------------------1--------------- 0000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1----------1-------01-------------------------------101------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1----------1-------00-------------------------------001------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------0--------------------------------------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1--------0-------------------------------1-----------------------------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1--------1-------------------------------0-----------------------------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------------------------------------0----------------------------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0----------1------------------------------------------1---------------------------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1----------1------------------------------------------0---------------------------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1----------1-------10-------------------------------011------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1--------0------------------------------------------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1----------------------------------------0----------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------0---------------------------------1---------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------1---------------------------------0---------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0----------1------------------------------------------1--------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1----------1------------------------------------------0--------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------10-0-------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------1----------------------0------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------1-----------------------1----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------111-------------------10----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------1---------------------0------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------1----------------------1----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------0---------------------10----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------01--------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------1--------------------0------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------1---------------------1----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------010--------------------10----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------11--------------------10----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------1-------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1------------------------------------01---------------1------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000 +------------1-----------------0-0--------------------------------------------------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1----------10------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------1------0--1--------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1------------------------------------------------------------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------------------00-------------------------------------------------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--01--------1-----------1-------0-1---------------------------------------------0--------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1--------1---1-------1-------0-1---------------------------------------------0--------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1--------1----1------1-------0-1---------------------------------------------0--------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1--------1-----0-----1-------0-1---------------------------------------------0--------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1--------1------1----1-------0-1---------------------------------------------0--------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1--------1---------0-1-------0-1---------------------------------------------0--------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------0----------------------------1-------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------11----------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------00----------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------------------------------------------------------------------1----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------------------------------------------------------11-------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------0-----------------------------1--------------------------------------------------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------1----------------------------1---------------------------------------1-----------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------1--------------------------------------0-----------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0------------1-----------1------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0------------0-----------01-----------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0------------1------------0-----------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0------------01-----------------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0-------------1----------1------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0------------10----------01-----------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0-------------1-----------0-----------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------1---------0--------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------1--------------0---------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0---------------------------------------------------------------00-------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1---------1-----1--------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0---------------------------------------------------------------00-------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------01------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------------------------0-----------------------0------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------------------------------------------------1---------------------------------0--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------------1----------------------0------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------------------------------------1-----------------------10--------0--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------------------1--------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------------------------------1------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 +---------------------------------------------1---------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000 +----------0-1------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000 +------------1-----------------------------------1------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000 +------------1------------------------------------10--------------------111------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000 +--------------------------------------------------1----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000 +-------1------------------------------------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 +---------------------------------------------------0---------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000 +---------------------------------------------------01--------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000 +---------------------------------------------------10--------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000 +------------1--------0---------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000 +------------1-------0----------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000 +-0----------1------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000 +-------------------------------------------------1------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000 +--------------------------------------------------------1----------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000 +---------------------------------------------------------1---------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000 +----------------------------------------------------------1--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000 +-----------------------------------------------------------1-------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000 +------------------------------------------------------------1------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000 +----------------------------------------------1--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000 +------------1----------00------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 +------------1-----------1---------1----------------------------0---------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 +------------1------------------------------------01----------------1------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000 +------------1-------------------0--------------------------------1-----------------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000 +------------1------------------------------------01---------------1-----------------------------------1- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000 +---1--------1--------------------0---------------10-----------------------------0----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 +------------1------------------------------------1----------------1-------------1--------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 +------------1-------------------------------------0---------------1-------------1--------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 +------------1------------------------------------10--------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +------------1------------------------------------1-----------------1---------------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +------------1-------------------------------------0----------------1---------------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +------------1------------------------------------1------------------1--------------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 +------------1-------------------------------------0-----------------1--------------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 +------------1------------------------------------0---------------------1-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 +------------1-------------------------------------1--------------------1-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 +------------1------------------------------------10--------------------0-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 +------------1----------------------------------------------------------111------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 +------------1------------------------------------10--------------------1-0------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 +------------1------------------------------------10--------------------10------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 +------------1-----------------------------------------------------------1------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000 +------------1------------------------------------10--------------------11------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000 +------------1------------------------------------------------------------1------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000 +------0-----1-----------0----------0-01-----------------------------------------------0-0--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +------0-----1-----------0----------0-10-----------------------------------------------0-0--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +------------1-----------0------------01------------------------------------1----------0-0--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +------------1-----------0------------10------------------------------------1----------0-0--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +------0-----1-----------0----------0-01-----------------------------------------------0--0-------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +------0-----1-----------0----------0-10-----------------------------------------------0--0-------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +------------1-----------0------------01------------------------------------1----------0--0-------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +------------1-----------0------------10------------------------------------1----------0--0-------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +------------1------------------------------------01----------------------------1------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000 +------------1------------------------------------0--------------------------1------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000 +------------1-------------------------------------1-------------------------1------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000 +------------1------------------------------------0---------------------------1-----------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000 +------------1-------------------------------------1--------------------------1-----------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000 +------------1------------------------------------01----------------1----------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 +------------1------------01000-----------0-------10---------------------------1----------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 +------------1----------------------------1-----0-10---------------------------1----------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 +------------1------------------------------------01----------------1---------------------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100001000 +------------1-----------------------------------------------------------------1----------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +------------1------------01000-----------0-------10---------------------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +------------1----------------------------1-----0-10---------------------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +------------1------------------------------------1-----------------------------1---------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +------------1-------------------------------------0----------------------------1---------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +------------1------------------------------------01---------------00--------0000---------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +---0--------1-----------------------------------------------------000-------0000---------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1--------------------1--------------------------------000-------0000---------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1------------------------------------0----------------000-------0000---------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1-------------------------------------1---------------000-------0000---------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1------------------------------------01---------------1----------------------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1------------------------------------10-------------------------1------------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1------------------------------------10--------------------------1-----------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1------------01000-----------0-------10---------------------------1----------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1----------------------------1-----0-10---------------------------1----------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1------------------------------------01----------------------------1---------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +---1--------1--------------------0---------------10---------------000---------00---------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1----------------------------------------------------------------------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 .end diff --git a/Logic/68030_tk.tte b/Logic/68030_tk.tte index cf6e697..f6dff64 100644 --- a/Logic/68030_tk.tte +++ b/Logic/68030_tk.tte @@ -1,28 +1,28 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Fri Aug 19 00:39:35 2016 +#$ DATE Wed Aug 24 22:17:49 2016 #$ MODULE BUS68030 -#$ PINS 61 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 - UDS_000 LDS_000 nEXP_SPACE BERR BG_030 SIZE_0_ AHIGH_30_ BGACK_000 AHIGH_29_ - CLK_030 AHIGH_28_ CLK_000 AHIGH_27_ CLK_OSZI AHIGH_26_ CLK_DIV_OUT AHIGH_25_ - AHIGH_24_ FPU_CS A_DECODE_22_ FPU_SENSE A_DECODE_21_ A_DECODE_20_ DTACK - A_DECODE_19_ AVEC A_DECODE_18_ E A_DECODE_17_ VPA A_DECODE_16_ RST RESET +#$ PINS 61 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_2_ FC_1_ AS_030 SIZE_0_ AS_000 + AHIGH_30_ AHIGH_29_ DS_030 AHIGH_28_ UDS_000 AHIGH_27_ LDS_000 AHIGH_26_ + nEXP_SPACE AHIGH_25_ BERR AHIGH_24_ BG_030 A_DECODE_22_ A_DECODE_21_ + A_DECODE_20_ BGACK_000 A_DECODE_19_ CLK_030 A_DECODE_18_ CLK_000 A_DECODE_17_ + CLK_OSZI A_DECODE_16_ CLK_DIV_OUT FPU_CS FPU_SENSE DTACK AVEC E VPA RST RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_1_ IPL_0_ FC_0_ A_1_ IPL_030_2_ RW_000 BG_000 BGACK_030 CLK_EXP DSACK1 VMA RW A_0_ IPL_030_1_ IPL_030_0_ -#$ NODES 53 cpu_est_3_ cpu_est_0_ cpu_est_1_ cpu_est_2_ inst_AS_000_INT +#$ NODES 52 cpu_est_3_ cpu_est_0_ cpu_est_1_ cpu_est_2_ inst_AS_000_INT inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA CYCLE_DMA_0_ CYCLE_DMA_1_ SIZE_DMA_0_ SIZE_DMA_1_ inst_VPA_D inst_UDS_000_INT inst_LDS_000_INT - inst_CLK_OUT_PRE_D CLK_000_D_1_ CLK_000_D_10_ CLK_000_D_11_ inst_DTACK_D0 - inst_RESET_OUT CLK_000_D_0_ inst_CLK_OUT_PRE_50 IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ - CLK_000_D_2_ CLK_000_D_3_ CLK_000_D_4_ CLK_000_D_5_ CLK_000_D_6_ CLK_000_D_7_ - CLK_000_D_8_ CLK_000_D_9_ CLK_000_D_12_ inst_AMIGA_BUS_ENABLE_DMA_HIGH - inst_DS_000_ENABLE SM_AMIGA_6_ SM_AMIGA_0_ SM_AMIGA_4_ RST_DLY_0_ RST_DLY_1_ + inst_CLK_OUT_PRE_D CLK_000_D_8_ CLK_000_D_9_ inst_DTACK_D0 inst_RESET_OUT + CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_25 IPL_D0_0_ + IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_3_ CLK_000_D_4_ CLK_000_D_5_ + CLK_000_D_6_ CLK_000_D_7_ CLK_000_D_10_ inst_AMIGA_BUS_ENABLE_DMA_HIGH + inst_DS_000_ENABLE SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_0_ RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_CLK_030_H SM_AMIGA_1_ SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ CIIN_0 .type f -.i 105 -.o 180 +.i 104 +.o 178 .ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ @@ -31,23 +31,23 @@ inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q SIZE_DMA_0_.Q SIZE_DMA_1_.Q inst_VPA_D.Q inst_UDS_000_INT.Q inst_LDS_000_INT.Q inst_CLK_OUT_PRE_D.Q - CLK_000_D_1_.Q CLK_000_D_10_.Q CLK_000_D_11_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q - CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q - CLK_000_D_2_.Q CLK_000_D_3_.Q CLK_000_D_4_.Q CLK_000_D_5_.Q CLK_000_D_6_.Q - CLK_000_D_7_.Q CLK_000_D_8_.Q CLK_000_D_9_.Q CLK_000_D_12_.Q + CLK_000_D_8_.Q CLK_000_D_9_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q CLK_000_D_1_.Q + CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_25.Q IPL_D0_0_.Q + IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_3_.Q CLK_000_D_4_.Q + CLK_000_D_5_.Q CLK_000_D_6_.Q CLK_000_D_7_.Q CLK_000_D_10_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q DSACK1.Q inst_DS_000_ENABLE.Q SM_AMIGA_6_.Q - SM_AMIGA_0_.Q SM_AMIGA_4_.Q RW_000.Q RW.Q RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q + SM_AMIGA_4_.Q SM_AMIGA_0_.Q RW_000.Q RW.Q RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q inst_CLK_030_H.Q SM_AMIGA_1_.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q BG_000.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN CIIN_0 -.ob SIZE_1_ SIZE_1_.OE AHIGH_31_ AHIGH_31_.OE AS_030- AS_030.OE AS_000- - AS_000.OE DS_030- DS_030.OE UDS_000- UDS_000.OE LDS_000- LDS_000.OE BERR BERR.OE - SIZE_0_ SIZE_0_.OE AHIGH_30_ AHIGH_30_.OE AHIGH_29_ AHIGH_29_.OE AHIGH_28_ - AHIGH_28_.OE AHIGH_27_ AHIGH_27_.OE AHIGH_26_ AHIGH_26_.OE CLK_DIV_OUT.D - CLK_DIV_OUT.C AHIGH_25_ AHIGH_25_.OE AHIGH_24_ AHIGH_24_.OE FPU_CS- AVEC E RESET - RESET.OE AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW- +.ob SIZE_1_ SIZE_1_.OE AHIGH_31_ AHIGH_31_.OE AS_030- AS_030.OE SIZE_0_ + SIZE_0_.OE AS_000- AS_000.OE AHIGH_30_ AHIGH_30_.OE AHIGH_29_ AHIGH_29_.OE + DS_030- DS_030.OE AHIGH_28_ AHIGH_28_.OE UDS_000- UDS_000.OE AHIGH_27_ + AHIGH_27_.OE LDS_000- LDS_000.OE AHIGH_26_ AHIGH_26_.OE AHIGH_25_ AHIGH_25_.OE + BERR BERR.OE AHIGH_24_ AHIGH_24_.OE CLK_DIV_OUT.D CLK_DIV_OUT.C FPU_CS- AVEC E + RESET RESET.OE AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW- AMIGA_BUS_ENABLE_HIGH CIIN CIIN.OE IPL_030_2_.D- IPL_030_2_.C RW_000.D- RW_000.C RW_000.OE BG_000.D- BG_000.C BGACK_030.D BGACK_030.C CLK_EXP.D CLK_EXP.C DSACK1.D- DSACK1.C DSACK1.OE VMA.T VMA.C RW.D- RW.C RW.OE A_0_.D A_0_.C A_0_.OE @@ -61,226 +61,225 @@ CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C SIZE_DMA_0_.D- SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C inst_VPA_D.D- inst_VPA_D.C inst_UDS_000_INT.D- inst_UDS_000_INT.C inst_LDS_000_INT.D inst_LDS_000_INT.C - inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C CLK_000_D_1_.D CLK_000_D_1_.C - CLK_000_D_10_.D CLK_000_D_10_.C CLK_000_D_11_.D CLK_000_D_11_.C inst_DTACK_D0.D- - inst_DTACK_D0.C inst_RESET_OUT.D inst_RESET_OUT.C CLK_000_D_0_.D CLK_000_D_0_.C - inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C IPL_D0_0_.D- IPL_D0_0_.C IPL_D0_1_.D- - IPL_D0_1_.C IPL_D0_2_.D- IPL_D0_2_.C CLK_000_D_2_.D CLK_000_D_2_.C - CLK_000_D_3_.D CLK_000_D_3_.C CLK_000_D_4_.D CLK_000_D_4_.C CLK_000_D_5_.D - CLK_000_D_5_.C CLK_000_D_6_.D CLK_000_D_6_.C CLK_000_D_7_.D CLK_000_D_7_.C - CLK_000_D_8_.D CLK_000_D_8_.C CLK_000_D_9_.D CLK_000_D_9_.C CLK_000_D_12_.D - CLK_000_D_12_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- + inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C CLK_000_D_8_.D CLK_000_D_8_.C + CLK_000_D_9_.D CLK_000_D_9_.C inst_DTACK_D0.D- inst_DTACK_D0.C inst_RESET_OUT.D + inst_RESET_OUT.C CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_0_.D CLK_000_D_0_.C + inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_25.D + inst_CLK_OUT_PRE_25.C IPL_D0_0_.D- IPL_D0_0_.C IPL_D0_1_.D- IPL_D0_1_.C + IPL_D0_2_.D- IPL_D0_2_.C CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D + CLK_000_D_3_.C CLK_000_D_4_.D CLK_000_D_4_.C CLK_000_D_5_.D CLK_000_D_5_.C + CLK_000_D_6_.D CLK_000_D_6_.C CLK_000_D_7_.D CLK_000_D_7_.C CLK_000_D_10_.D + CLK_000_D_10_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C - SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_4_.D - SM_AMIGA_4_.C RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.D.X1 RST_DLY_1_.D.X2 + SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_0_.D + SM_AMIGA_0_.C RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.D.X1 RST_DLY_1_.D.X2 RST_DLY_1_.C RST_DLY_2_.D RST_DLY_2_.C inst_CLK_030_H.D inst_CLK_030_H.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_3_.D.X1 SM_AMIGA_3_.D.X2 SM_AMIGA_3_.C SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_i_7_.D.X1 SM_AMIGA_i_7_.D.X2 SM_AMIGA_i_7_.C CIIN_0 -.phase 111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 -.p 204 ----------------------------------------01---------------------------------------------------------------- 100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0-------------------------------------------------------------------------------- 010000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------------------------------------------------------------------- 000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0------------------------1------------------------------------------------------- 000101000100000000010101010100010100000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------0---------------------------------------------------0----------------- 000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------0-------------------------------------------------------0------------------ 000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1------------------------1------------------------------------------------------- 000000010001010000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------0--------------------------------------------------0----------------- 000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------------0-----------------------1-------------------------------------- 000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------------0----------------------1-------------------------------------- 000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---1--1---1------0010--1---------------------------------------------------------------0------------------ 000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------10---------------------------------------------------------------- 000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------1------------------------------------------------------------ 000000000000000000000000000010000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------1------------------------------------------------------------------------------------------------ 000000000000000000000000000001000000000000000010100101010100101001001010101010010101010101010101010101010101010101010101010101010101010101010101010101010101010100101010101001010010 ---1--1---0------0010--1---------------------------------------------------------------0------------------ 000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------0-11--------------------------------------------------------------------------- 000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1-00--------------------------------------------------------------------------- 000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------------------0------------------------------------------------------- 000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0--------------------------------------------------------------01---------------- 000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1---------------------------------------------------------------0---------------- 000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0------0------------------------------------------------------------------------- 000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1--------1----------------------------------------------------------------------- 000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0---------------------------------------1---------------------------------------- 000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -1------------111----------------0------------------------------------------------------------00000000---- 000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 ---------------------------------------------------------------------------------------------------------1 000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------11------------------------------110-------------------------------------------------- 000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------10------------------------------010-------------------------------------------------- 000000000000000000000000000000000000000000000100000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------01------------------------------100-------------------------------------------------- 000000000000000000000000000000000000000000000100000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------00------------------------------000-------------------------------------------------- 000000000000000000000000000000000000000000000100000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1------------------------------------------------------------------------0------------------- 000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------0------------------------------1--------------------------------0------------------- 000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------1------------------------------0--------------------------------0------------------- 000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------0--------------------------------1-------------------------------0------------------- 000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------1--------------------------------0-------------------------------0------------------- 000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------------------------------------0------------------------------0------------------- 000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------------------------------1------------------------0----------1----------------------- 000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------------------------------------0-------------------0----------1----------------------- 000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1------------------------------------------------------00-0----------1----------------------- 000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------------------------------0----1----------------10------------1---------------------0- 000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----10-------1-------------------1-----------------1------------------------------------------------------ 000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0-------1---------------------------------------------------------------------0---------------------- 000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------0-------------------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000010000000000010000000000000000000000000101000000010000010000000000000000000000000000000000000000000000000000000000000000000000000 ------1------------------1-------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------1---------------------------------------0----1------------------------------------1----------------- 000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------0-----1---------------------------------01-----------------------------1--------------------------- 000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------------------------------1-01-----------------------------1--------------------------- 000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1----------------------------------0---------------1-------------1--------------------------- 000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------------------0--------------------------------0------------------------------------1-- 000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1----------------------------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 -------------0------------0------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------00000---------------0----1------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1------------10110-----------0---1----0------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1---------1------------------------------------0--------------------------------- 000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0---------------------------------------------------------------0---------------- 000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0------------------------1------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1---------1----------------------------------------1----------------------------- 000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0----------------------------------------------------------------1--------------- 000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-------01------------------------------101-------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-------00------------------------------001-------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------0---------------------------------------------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------0------------------------------1-------------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------1------------------------------0-------------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1----------------------------------------0------------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-----------------------------------------1-----------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-----------------------------------------0-----------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-------10------------------------------011-------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------0-------------------------------------------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1---------------------------------------0------------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------0--------------------------------1-----------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------1--------------------------------0-----------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-----------------------------------------1----------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-----------------------------------------0----------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------10-0--------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1------------------0----------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1-----------------------1------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------111---------------1----0------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------1-----------------0----------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------1----------------------1------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------0-----------------1----0------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------01---------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------1----------------0----------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------1---------------------1------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------010----------------1----0------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------11----------------1----0------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------1--------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------------------------------0----1----------------1------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000 -------------1-----------------0-0---------------------------------------------------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1----------10-------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1------0--1---------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------------------------------------------------------------------------0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------------------00--------------------------------------------------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---01--------1-----------1-------0-1----------------------------------------------0--------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1---1-------1-------0-1----------------------------------------------0--------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1----1------1-------0-1----------------------------------------------0--------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1-----0-----1-------0-1----------------------------------------------0--------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1------1----1-------0-1----------------------------------------------0--------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1---------0-1-------0-1----------------------------------------------0--------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0-------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1-------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------0----------------------------1--------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------11------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------00------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------------------------------------------------------1----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------------------------------------------------------------11-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------0-----------------------------1---------------------------------------------------0---------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------1----------------------------1----------------------------------------1-----------0---------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------1---------------------------------------0-----------0---------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------1-------1-----------------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------0-------0----1------------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------1------------0------------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------01------------------------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0-------------1------1-----------------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------10------0----1------------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0-------------1-----------0------------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1---------0---------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1--------------0----------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0----------------------------------------------------------------00-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1---------1-----1---------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0----------------------------------------------------------------00-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------01-------------------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------------------------0------------------------0------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1------------------------------------------------------1---------------------------------0--- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------------1-----------------------0------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------------------------------------1-----------------------10--------0--- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------------------1----------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------------1------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------------------------1------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------1---------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000 -----------0-1-------------------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000 -------------1------------------------------------1------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000 -------------1--------------------------------1----0---------------------111------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000 --------1------------------------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000 ----------------------------------------------------0----------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 -------------1--------0----------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000 -------------1-------0------------------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000 --0----------1-------------------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000 ----------------------------------------------1----------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000 --------------------------------------------------------1------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000 ---------------------------------------------------------1------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000 ----------------------------------------------------------1----------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000 -----------------------------------------------------------1---------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000 ------------------------------------------------------------1--------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000 -------------------------------------------------------------1-------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000 --------------------------------------------------------------1------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000 ------------------------------------------------1--------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000 -------------1----------00-------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 -------------1-----------1---------1-----------------------------0---------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 -------------1--------------------------------0----1----------------00---------0--1----------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000 -------------1------------------------------------------------------000--------0--1----------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000 -------------1-------------------0---------------------------------1-----------------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000 -------------1--------------------------------0----1-----------------0---------0--1---------------------1- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000 ----1--------1--------------------0-----------0---------1-------------------------0----------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 -------------1--------------------------------1---------------------1-------------1--------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 -------------1-------------------------------------0----------------1-------------1--------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 -------------1--------------------------------1----0--------------------------1--------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 -------------1--------------------------------1----------------------1---------------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 -------------1-------------------------------------0-----------------1---------------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 -------------1--------------------------------1----0---------------------------1-------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 -------------1--------------------------------1-----------------------1--------------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 -------------1-------------------------------------0------------------1--------------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 -------------1--------------------------------0--------------------------1-------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 -------------1-------------------------------------1---------------------1-------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 -------------1--------------------------------1----0---------------------0-------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 -------------1-----------------------------------------------------------111------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 -------------1--------------------------------1----0---------------------1-0------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 -------------1--------------------------------1----0---------------------10------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 -------------1------------------------------------------------------------1------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000 -------------1--------------------------------1----0---------------------11------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000 -------------1-------------------------------------------------------------1------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000 -------0-----1-----------0----------0-01------------------------------------------------0-0--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -------0-----1-----------0----------0-10------------------------------------------------0-0--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -------------1-----------0------------01-------------------------------------1----------0-0--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -------------1-----------0------------10-------------------------------------1----------0-0--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -------0-----1-----------0----------0-01------------------------------------------------0--0-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -------0-----1-----------0----------0-10------------------------------------------------0--0-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -------------1-----------0------------01-------------------------------------1----------0--0-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -------------1-----------0------------10-------------------------------------1----------0--0-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -------------1--------------------------------0----1-----------------------------1------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000 -------------1--------------------------------0-------------------------------1------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000 -------------1-------------------------------------1--------------------------1------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000 -------------1--------------------------------0--------------------------------1-----------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000 -------------1-------------------------------------1---------------------------1-----------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000 -------------1--------------------------------0----1------------------1---------0------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 -------------1------------01000-----------0---1----0----------------------------1----------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 -------------1----------------------------1---1--0-0----------------------------1----------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 -------------1--------------------------------0----1------------------1--------------------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100001000 -------------1------------------------------------------------------------------1----------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 -------------1------------01000-----------0---1----0----------------------------1------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------1----------------------------1---1--0-0----------------------------1------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------1--------------------------------1----------------------------------1---------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------1-------------------------------------0-----------------------------1---------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------1--------------------------------0----1----------------010-------0000---------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 ----0--------1------------------------------------------------------000-------0000---------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1--------------------1---------------------------------000-------0000---------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1--------------------------------1---------------------000-------0000---------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1------------------------------------------0-----------000-------0000---------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1--------------------------------0----1----------------1----------------------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1--------------------------------1----0--------------------------1------------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1--------------------------------1----0---------------------------1-----------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1------------01000-----------0---1----0----------------------------1----------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1----------------------------1---1--0-0----------------------------1----------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1--------------------------------0----1-----------------------------1---------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 ----1--------1--------------------0-----------0---------1-----------000-------0000---------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1-----------------------------------------------------------------------------------------1-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 +.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 +.p 203 +---------------------------------------01--------------------------------------------------------------- 1000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---0--------------------0------------------------------------------------------------------------------- 0100000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------------------------------------------------------------------------- 0000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---0--------------------0-----------------------1------------------------------------------------------- 0001010000010101010001000101000100000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------0--------------------------------------------------0----------------- 0000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------------------10--------------------------------------------------------------- 0000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------0------------------------------------------------------0------------------ 0000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1-----------------------1------------------------------------------------------- 0000000001000000000100010000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------0-------------------------------------------------0----------------- 0000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------------0----------------------1-------------------------------------- 0000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------------0---------------------1-------------------------------------- 0000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--1--1---1------0010--1--------------------------------------------------------------0------------------ 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------------------------1----------------------------------------------------------- 0000000000000000000000000000000010000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------1----------------------------------------------------------------------------------------------- 0000000000000000000000000000000001000000000000101001010101001010010010101010100101010101010101010101010101010101010101010101010101010101010101010101010101010100101010101001010010 +--1--1---0------0010--1--------------------------------------------------------------0------------------ 0000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------0-11-------------------------------------------------------------------------- 0000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------1-00-------------------------------------------------------------------------- 0000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------------------0------------------------------------------------------- 0000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---0--------------------0-------------------------------------------------------------01---------------- 0000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1--------------------------------------------------------------0---------------- 0000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0------0------------------------------------------------------------------------ 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1--------1---------------------------------------------------------------------- 0000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0--------------------------------------1---------------------------------------- 0000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +1------------111----------------0-----------------------------------------------------------00000000---- 0000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 +-------------------------------------------------------------------------------------------------------1 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0----------1-------11-------------------------------110------------------------------------------------ 0000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0----------1-------10-------------------------------010------------------------------------------------ 0000000000000000000000000000000000000000000001000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0----------1-------01-------------------------------100------------------------------------------------ 0000000000000000000000000000000000000000000001000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0----------1-------00-------------------------------000------------------------------------------------ 0000000000000000000000000000000000000000000001000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0----------1-----------------------------------------------------------------------0------------------- 0000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1--------0-------------------------------1------------------------------0------------------- 0000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1--------1-------------------------------0------------------------------0------------------- 0000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------0---------------------------------1-----------------------------0------------------- 0000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------1---------------------------------0-----------------------------0------------------- 0000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1------------------------------------------0----------------------------0------------------- 0000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1------------------------------------1-------------------0----------1----------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------------------------------------0------------------0----------1----------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------------------------------------------------0-00----------1----------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1------------------------------------01---------------1-0-----------1---------------------0- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---10-------1-------------------1-----------------1----------------------------------------------------- 0000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0-------1--------------------------------------------------------------------0---------------------- 0000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------0------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000100000000000100000000000000000000000001010000000100000100000000000000000000000000000000000000000000000000000000000000000000000 +-----1------------------1------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----1-------------------------------------------01-----------------------------------1----------------- 0000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------0-----1--------------------------------01-----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------------------------------101-----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1------------------------------------10-------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 +------------1---------------------------------0---------------1-------------1--------------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------------------0-------------------------------0------------------------------------1-- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1---------------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 +------------0------------0------------------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------00000-------------------01----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1------------10110-----------0-------10----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------1---------1-----------------------------------0--------------------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0--------------------------------------------------------------0---------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0-----------------------1------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1---------1---------------------------------------1----------------------------- 0000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0---------------------------------------------------------------1--------------- 0000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1----------1-------01-------------------------------101------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1----------1-------00-------------------------------001------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------0--------------------------------------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1--------0-------------------------------1-----------------------------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1--------1-------------------------------0-----------------------------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------------------------------------0----------------------------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0----------1------------------------------------------1---------------------------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1----------1------------------------------------------0---------------------------0-------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1----------1-------10-------------------------------011------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1--------0------------------------------------------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1----------------------------------------0----------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------0---------------------------------1---------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------1---------------------------------0---------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0----------1------------------------------------------1--------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1----------1------------------------------------------0--------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------10-0-------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------1----------------------0------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------1-----------------------1----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------111-------------------10----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------1---------------------0------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------1----------------------1----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------0---------------------10----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------01--------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------1--------------------0------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------1---------------------1----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------010--------------------10----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------11--------------------10----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------1-------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1------------------------------------01---------------1------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000 +------------1-----------------0-0--------------------------------------------------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1----------10------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------1------0--1--------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1------------------------------------------------------------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-------------------00-------------------------------------------------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--01--------1-----------1-------0-1---------------------------------------------0--------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1--------1---1-------1-------0-1---------------------------------------------0--------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1--------1----1------1-------0-1---------------------------------------------0--------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1--------1-----0-----1-------0-1---------------------------------------------0--------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1--------1------1----1-------0-1---------------------------------------------0--------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1--------1---------0-1-------0-1---------------------------------------------0--------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------0----------------------------1-------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------11----------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------00----------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------------------------------------------------------------------1----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------------------------------------------------------11-------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------0-----------------------------1--------------------------------------------------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------1----------------------------1---------------------------------------1-----------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------1--------------------------------------0-----------0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0------------1-----------1------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0------------0-----------01-----------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0------------1------------0-----------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0------------01-----------------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0-------------1----------1------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0------------10----------01-----------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0-------------1-----------0-----------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------1---------0--------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------1--------------0---------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------0---------------------------------------------------------------00-------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1---------1-----1--------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0---------------------------------------------------------------00-------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------01------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------------------------0-----------------------0------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000 +------------1-----------------------------------------------------1---------------------------------0--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------------1----------------------0------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------------------------------------1-----------------------10--------0--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------------------1--------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------------------------------1------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000 +---------------------------------------------1---------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000 +----------0-1------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000 +------------1-----------------------------------1------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000 +------------1------------------------------------10--------------------111------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000 +--------------------------------------------------1----------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000 +-------1------------------------------------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 +---------------------------------------------------0---------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000 +---------------------------------------------------01--------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000 +---------------------------------------------------10--------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000 +------------1--------0---------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000 +------------1-------0----------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000 +-0----------1------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000 +-------------------------------------------------1------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000 +--------------------------------------------------------1----------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000 +---------------------------------------------------------1---------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000 +----------------------------------------------------------1--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000 +-----------------------------------------------------------1-------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000 +------------------------------------------------------------1------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000 +----------------------------------------------1--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000 +------------1----------00------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 +------------1-----------1---------1----------------------------0---------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 +------------1------------------------------------01----------------1------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000 +------------1-------------------0--------------------------------1-----------------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000 +------------1------------------------------------01---------------1-----------------------------------1- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000 +---1--------1--------------------0---------------10-----------------------------0----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 +------------1------------------------------------1----------------1-------------1--------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 +------------1-------------------------------------0---------------1-------------1--------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 +------------1------------------------------------10--------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +------------1------------------------------------1-----------------1---------------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +------------1-------------------------------------0----------------1---------------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +------------1------------------------------------1------------------1--------------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 +------------1-------------------------------------0-----------------1--------------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 +------------1------------------------------------0---------------------1-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 +------------1-------------------------------------1--------------------1-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 +------------1------------------------------------10--------------------0-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 +------------1----------------------------------------------------------111------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000 +------------1------------------------------------10--------------------1-0------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 +------------1------------------------------------10--------------------10------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 +------------1-----------------------------------------------------------1------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000 +------------1------------------------------------10--------------------11------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000 +------------1------------------------------------------------------------1------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000 +------0-----1-----------0----------0-01-----------------------------------------------0-0--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +------0-----1-----------0----------0-10-----------------------------------------------0-0--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +------------1-----------0------------01------------------------------------1----------0-0--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +------------1-----------0------------10------------------------------------1----------0-0--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +------0-----1-----------0----------0-01-----------------------------------------------0--0-------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +------0-----1-----------0----------0-10-----------------------------------------------0--0-------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +------------1-----------0------------01------------------------------------1----------0--0-------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +------------1-----------0------------10------------------------------------1----------0--0-------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +------------1------------------------------------01----------------------------1------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000 +------------1------------------------------------0--------------------------1------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000 +------------1-------------------------------------1-------------------------1------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000 +------------1------------------------------------0---------------------------1-----------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000 +------------1-------------------------------------1--------------------------1-----------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000 +------------1------------------------------------01----------------1----------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 +------------1------------01000-----------0-------10---------------------------1----------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 +------------1----------------------------1-----0-10---------------------------1----------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 +------------1------------------------------------01----------------1---------------------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100001000 +------------1-----------------------------------------------------------------1----------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +------------1------------01000-----------0-------10---------------------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +------------1----------------------------1-----0-10---------------------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +------------1------------------------------------1-----------------------------1---------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +------------1-------------------------------------0----------------------------1---------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +------------1------------------------------------01---------------00--------0000---------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +---0--------1-----------------------------------------------------000-------0000---------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1--------------------1--------------------------------000-------0000---------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1------------------------------------0----------------000-------0000---------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1-------------------------------------1---------------000-------0000---------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1------------------------------------01---------------1----------------------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1------------------------------------10-------------------------1------------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1------------------------------------10--------------------------1-----------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1------------01000-----------0-------10---------------------------1----------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1----------------------------1-----0-10---------------------------1----------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1------------------------------------01----------------------------1---------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +---1--------1--------------------0---------------10---------------000---------00---------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------1----------------------------------------------------------------------------------------1-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 .end diff --git a/Logic/68030_tk.vcl b/Logic/68030_tk.vcl index 85c57ca..d58421f 100644 --- a/Logic/68030_tk.vcl +++ b/Logic/68030_tk.vcl @@ -17,8 +17,8 @@ Parent = m4a5.lci; SDS_file = m4a5.sds; Design = 68030_tk.tt4; Rev = 0.01; -DATE = 8/19/16; -TIME = 00:39:39; +DATE = 8/24/16; +TIME = 22:17:53; Type = TT2; Pre_Fit_Time = 1; Source_Format = Pure_VHDL; @@ -100,8 +100,8 @@ Page_Break = YES; [OPTIMIZATION OPTIONS] Logic_Reduction = YES; -Max_PTerm_Split = 16; -Max_PTerm_Collapse = 16; +Max_PTerm_Split = 20; +Max_PTerm_Collapse = 20; XOR_Synthesis = YES; Node_Collapse = Yes; DT_Synthesis = Yes; @@ -109,7 +109,7 @@ DT_Synthesis = Yes; [FITTER GLOBAL OPTIONS] Run_Time = 0; -Set_Reset_Dont_Care = NO; +Set_Reset_Dont_Care = YES; In_Reg_Optimize = YES; Clock_Optimize = NO; Conf_Unused_IOs = OUT_LOW; @@ -124,8 +124,13 @@ Type = GLB; Zero_Hold_Time = Yes; Signature_Word = 0; Pull_up = Yes; -Out_Slew_Rate = SLOW, FAST, 7, CLK_DIV_OUT, CLK_EXP, FPU_CS, AMIGA_BUS_DATA_DIR, AMIGA_BUS_ENABLE_LOW, - AMIGA_ADDR_ENABLE, AMIGA_BUS_ENABLE_HIGH; +Out_Slew_Rate = SLOW, FAST, 57, CLK_DIV_OUT, CLK_EXP, FPU_CS, AMIGA_BUS_DATA_DIR, AMIGA_BUS_ENABLE_LOW, + AMIGA_ADDR_ENABLE, AMIGA_BUS_ENABLE_HIGH, AS_030, A_16_, A_17_, A_18_, + A_19_, RW, SIZE_1_, SIZE_0_, AVEC, BGACK_030, BG_000, E, IPL_030_0_, IPL_030_1_, + IPL_030_2_, LDS_000, UDS_000, VMA, RESET, CIIN, A_20_, A_21_, A_22_, A_24_, + A_25_, A_26_, A_27_, A_28_, A_29_, A_30_, A_31_, DS_030, BERR, A0, DSACK1, + RW_000, AS_000, A_23_, A1, A_3_, A_2_, AHIGH_24_, AHIGH_25_, AHIGH_26_, + AHIGH_27_, AHIGH_28_, AHIGH_29_, AHIGH_30_, AHIGH_31_, A_0_; Device_max_fanin = 33; Device_max_pterms = 20; Usercode_Format = Hex; @@ -136,14 +141,14 @@ layer = OFF; [LOCATION ASSIGNMENT] Layer = OFF -BERR = OUTPUT,41,4,-; +AS_000 = OUTPUT,42,4,-; RW_000 = BIDIR,80,7,-; AS_030 = OUTPUT,82,7,-; -AS_000 = OUTPUT,42,4,-; +BERR = OUTPUT,41,4,-; +A_0_ = BIDIR,69,6,-; RW = BIDIR,71,6,-; UDS_000 = OUTPUT,32,3,-; LDS_000 = OUTPUT,31,3,-; -A_0_ = BIDIR,69,6,-; SIZE_1_ = OUTPUT,79,7,-; SIZE_0_ = OUTPUT,70,6,-; AHIGH_24_ = OUTPUT,19,2,-; @@ -173,67 +178,66 @@ AMIGA_ADDR_ENABLE = OUTPUT,33,3,-; AMIGA_BUS_ENABLE_LOW = OUTPUT,20,2,-; CLK_EXP = OUTPUT,10,1,-; RESET = OUTPUT,3,1,-; -CLK_000_D_1_ = NODE,*,7,-; RN_BGACK_030 = NODE,-1,7,-; -inst_RESET_OUT = NODE,*,0,-; -CLK_000_D_0_ = NODE,*,2,-; -SM_AMIGA_6_ = NODE,*,2,-; -inst_AS_030_D0 = NODE,*,0,-; -SM_AMIGA_0_ = NODE,*,6,-; -SM_AMIGA_i_7_ = NODE,*,5,-; -inst_AS_030_000_SYNC = NODE,*,2,-; -cpu_est_1_ = NODE,*,5,-; +inst_RESET_OUT = NODE,*,6,-; +CLK_000_D_0_ = NODE,*,4,-; +CLK_000_D_1_ = NODE,*,7,-; +SM_AMIGA_6_ = NODE,*,0,-; +inst_AS_030_D0 = NODE,*,3,-; +inst_AS_030_000_SYNC = NODE,*,0,-; +cpu_est_1_ = NODE,*,3,-; cpu_est_3_ = NODE,*,3,-; -SM_AMIGA_1_ = NODE,*,5,-; -CLK_000_D_2_ = NODE,*,4,-; -inst_CLK_OUT_PRE_D = NODE,*,4,-; +inst_CLK_OUT_PRE_D = NODE,*,1,-; +inst_BGACK_030_INT_D = NODE,*,5,-; cpu_est_2_ = NODE,*,3,-; -inst_AS_000_DMA = NODE,*,0,-; -RST_DLY_0_ = NODE,*,5,-; -inst_DS_000_ENABLE = NODE,*,1,-; +SM_AMIGA_i_7_ = NODE,*,5,-; +inst_DS_000_DMA = NODE,*,2,-; +inst_AS_000_DMA = NODE,*,2,-; RN_VMA = NODE,-1,3,-; -SM_AMIGA_5_ = NODE,*,5,-; -SM_AMIGA_4_ = NODE,*,1,-; +SM_AMIGA_1_ = NODE,*,5,-; +SM_AMIGA_0_ = NODE,*,5,-; +inst_DS_000_ENABLE = NODE,*,5,-; +inst_LDS_000_INT = NODE,*,1,-; SIZE_DMA_1_ = NODE,*,6,-; SIZE_DMA_0_ = NODE,*,6,-; cpu_est_0_ = NODE,*,3,-; -RST_DLY_2_ = NODE,*,5,-; -RST_DLY_1_ = NODE,*,5,-; inst_AMIGA_BUS_ENABLE_DMA_HIGH = NODE,*,6,-; -inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,*,6,-; -inst_AS_000_INT = NODE,*,2,-; -CLK_000_D_11_ = NODE,*,7,-; -inst_VPA_D = NODE,*,5,-; -inst_BGACK_030_INT_D = NODE,*,7,-; +inst_CLK_OUT_PRE_25 = NODE,*,0,-; +inst_AS_000_INT = NODE,*,0,-; +CLK_000_D_9_ = NODE,*,7,-; +inst_VPA_D = NODE,*,0,-; RN_IPL_030_0_ = NODE,-1,1,-; RN_IPL_030_1_ = NODE,-1,1,-; RN_IPL_030_2_ = NODE,-1,1,-; -inst_DS_000_DMA = NODE,*,0,-; -inst_CLK_030_H = NODE,*,0,-; +inst_CLK_030_H = NODE,*,2,-; RN_DSACK1 = NODE,-1,7,-; RN_RW_000 = NODE,-1,7,-; SM_AMIGA_2_ = NODE,*,5,-; SM_AMIGA_3_ = NODE,*,5,-; -CYCLE_DMA_1_ = NODE,*,0,-; +RST_DLY_0_ = NODE,*,6,-; +CYCLE_DMA_1_ = NODE,*,2,-; RN_A_0_ = NODE,-1,6,-; -inst_LDS_000_INT = NODE,*,3,-; -CYCLE_DMA_0_ = NODE,*,0,-; +SM_AMIGA_5_ = NODE,*,5,-; +SM_AMIGA_4_ = NODE,*,5,-; +CYCLE_DMA_0_ = NODE,*,2,-; RN_RW = NODE,-1,6,-; RN_BG_000 = NODE,-1,3,-; CIIN_0 = NODE,*,4,-; +RST_DLY_2_ = NODE,*,6,-; +RST_DLY_1_ = NODE,*,6,-; inst_UDS_000_INT = NODE,*,3,-; -CLK_000_D_12_ = NODE,*,6,-; -CLK_000_D_9_ = NODE,*,0,-; -CLK_000_D_8_ = NODE,*,6,-; -CLK_000_D_7_ = NODE,*,0,-; -CLK_000_D_6_ = NODE,*,3,-; -CLK_000_D_5_ = NODE,*,4,-; -CLK_000_D_4_ = NODE,*,2,-; +inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,*,2,-; +CLK_000_D_10_ = NODE,*,5,-; +CLK_000_D_7_ = NODE,*,4,-; +CLK_000_D_6_ = NODE,*,1,-; +CLK_000_D_5_ = NODE,*,1,-; +CLK_000_D_4_ = NODE,*,3,-; CLK_000_D_3_ = NODE,*,4,-; -IPL_D0_2_ = NODE,*,0,-; +CLK_000_D_2_ = NODE,*,7,-; +IPL_D0_2_ = NODE,*,6,-; IPL_D0_1_ = NODE,*,1,-; -IPL_D0_0_ = NODE,*,1,-; -inst_CLK_OUT_PRE_50 = NODE,*,4,-; -inst_DTACK_D0 = NODE,*,6,-; -CLK_000_D_10_ = NODE,*,2,-; +IPL_D0_0_ = NODE,*,0,-; +inst_CLK_OUT_PRE_50 = NODE,*,0,-; +inst_DTACK_D0 = NODE,*,2,-; +CLK_000_D_8_ = NODE,*,4,-; CLK_OSZI = INPUT,61,-,-; diff --git a/Logic/68030_tk.vco b/Logic/68030_tk.vco index 44248ee..67a9212 100644 --- a/Logic/68030_tk.vco +++ b/Logic/68030_tk.vco @@ -17,8 +17,8 @@ Parent = m4a5.lci; SDS_file = m4a5.sds; Design = 68030_tk.tt4; Rev = 0.01; -DATE = 8/19/16; -TIME = 00:39:40; +DATE = 8/24/16; +TIME = 22:17:53; Type = TT2; Pre_Fit_Time = 1; Source_Format = Pure_VHDL; @@ -100,8 +100,8 @@ Page_Break = YES; [OPTIMIZATION OPTIONS] Logic_Reduction = YES; -Max_PTerm_Split = 16; -Max_PTerm_Collapse = 16; +Max_PTerm_Split = 20; +Max_PTerm_Collapse = 20; XOR_Synthesis = YES; Node_Collapse = Yes; DT_Synthesis = Yes; @@ -109,7 +109,7 @@ DT_Synthesis = Yes; [FITTER GLOBAL OPTIONS] Run_Time = 0; -Set_Reset_Dont_Care = NO; +Set_Reset_Dont_Care = YES; In_Reg_Optimize = YES; Clock_Optimize = NO; Conf_Unused_IOs = OUT_LOW; @@ -124,8 +124,13 @@ Type = GLB; Zero_Hold_Time = Yes; Signature_Word = 0; Pull_up = Yes; -Out_Slew_Rate = SLOW, FAST, 7, CLK_DIV_OUT, CLK_EXP, FPU_CS, AMIGA_BUS_DATA_DIR, AMIGA_BUS_ENABLE_LOW, - AMIGA_ADDR_ENABLE, AMIGA_BUS_ENABLE_HIGH; +Out_Slew_Rate = SLOW, FAST, 57, CLK_DIV_OUT, CLK_EXP, FPU_CS, AMIGA_BUS_DATA_DIR, AMIGA_BUS_ENABLE_LOW, + AMIGA_ADDR_ENABLE, AMIGA_BUS_ENABLE_HIGH, AS_030, A_16_, A_17_, A_18_, + A_19_, RW, SIZE_1_, SIZE_0_, AVEC, BGACK_030, BG_000, E, IPL_030_0_, IPL_030_1_, + IPL_030_2_, LDS_000, UDS_000, VMA, RESET, CIIN, A_20_, A_21_, A_22_, A_24_, + A_25_, A_26_, A_27_, A_28_, A_29_, A_30_, A_31_, DS_030, BERR, A0, DSACK1, + RW_000, AS_000, A_23_, A1, A_3_, A_2_, AHIGH_24_, AHIGH_25_, AHIGH_26_, + AHIGH_27_, AHIGH_28_, AHIGH_29_, AHIGH_30_, AHIGH_31_, A_0_; Device_max_fanin = 33; Device_max_pterms = 20; Usercode_Format = Hex; @@ -142,39 +147,39 @@ A_DECODE_23_ = INPUT,85, H,-; IPL_2_ = INPUT,68, G,-; FC_1_ = INPUT,58, F,-; AS_030 = BIDIR,82, H,-; -AS_000 = BIDIR,42, E,-; -DS_030 = OUTPUT,98, A,-; -UDS_000 = BIDIR,32, D,-; -LDS_000 = BIDIR,31, D,-; -nEXP_SPACE = INPUT,14,-,-; -BERR = BIDIR,41, E,-; -BG_030 = INPUT,21, C,-; SIZE_0_ = BIDIR,70, G,-; +AS_000 = BIDIR,42, E,-; AHIGH_30_ = BIDIR,5, B,-; -BGACK_000 = INPUT,28, D,-; AHIGH_29_ = BIDIR,6, B,-; -CLK_030 = INPUT,64,-,-; +DS_030 = OUTPUT,98, A,-; AHIGH_28_ = BIDIR,15, C,-; -CLK_000 = INPUT,11,-,-; +UDS_000 = BIDIR,32, D,-; AHIGH_27_ = BIDIR,16, C,-; -CLK_OSZI = INPUT,61,-,-; +LDS_000 = BIDIR,31, D,-; AHIGH_26_ = BIDIR,17, C,-; -CLK_DIV_OUT = OUTPUT,65, G,-; +nEXP_SPACE = INPUT,14,-,-; AHIGH_25_ = BIDIR,18, C,-; +BERR = BIDIR,41, E,-; AHIGH_24_ = BIDIR,19, C,-; -FPU_CS = OUTPUT,78, H,-; +BG_030 = INPUT,21, C,-; A_DECODE_22_ = INPUT,84, H,-; -FPU_SENSE = INPUT,91, A,-; A_DECODE_21_ = INPUT,94, A,-; A_DECODE_20_ = INPUT,93, A,-; -DTACK = INPUT,30, D,-; +BGACK_000 = INPUT,28, D,-; A_DECODE_19_ = INPUT,97, A,-; -AVEC = OUTPUT,92, A,-; +CLK_030 = INPUT,64,-,-; A_DECODE_18_ = INPUT,95, A,-; -E = OUTPUT,66, G,-; +CLK_000 = INPUT,11,-,-; A_DECODE_17_ = INPUT,59, F,-; -VPA = INPUT,36,-,-; +CLK_OSZI = INPUT,61,-,-; A_DECODE_16_ = INPUT,96, A,-; +CLK_DIV_OUT = OUTPUT,65, G,-; +FPU_CS = OUTPUT,78, H,-; +FPU_SENSE = INPUT,91, A,-; +DTACK = INPUT,30, D,-; +AVEC = OUTPUT,92, A,-; +E = OUTPUT,66, G,-; +VPA = INPUT,36,-,-; RST = INPUT,86,-,-; RESET = OUTPUT,3, B,-; AMIGA_ADDR_ENABLE = OUTPUT,33, D,-; @@ -197,56 +202,55 @@ RW = BIDIR,71, G,-; A_0_ = BIDIR,69, G,-; IPL_030_1_ = OUTPUT,7, B,-; IPL_030_0_ = OUTPUT,8, B,-; -cpu_est_3_ = NODE,9, D,-; -cpu_est_0_ = NODE,2, D,-; -cpu_est_1_ = NODE,8, F,-; -cpu_est_2_ = NODE,13, D,-; -inst_AS_000_INT = NODE,15, C,-; -inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,10, G,-; -inst_AS_030_D0 = NODE,6, A,-; -inst_AS_030_000_SYNC = NODE,6, C,-; -inst_BGACK_030_INT_D = NODE,13, H,-; -inst_AS_000_DMA = NODE,12, A,-; -inst_DS_000_DMA = NODE,1, A,-; -CYCLE_DMA_0_ = NODE,13, A,-; -CYCLE_DMA_1_ = NODE,9, A,-; +cpu_est_3_ = NODE,2, D,-; +cpu_est_0_ = NODE,10, D,-; +cpu_est_1_ = NODE,13, D,-; +cpu_est_2_ = NODE,6, D,-; +inst_AS_000_INT = NODE,5, A,-; +inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,3, C,-; +inst_AS_030_D0 = NODE,9, D,-; +inst_AS_030_000_SYNC = NODE,12, A,-; +inst_BGACK_030_INT_D = NODE,0, F,-; +inst_AS_000_DMA = NODE,2, C,-; +inst_DS_000_DMA = NODE,13, C,-; +CYCLE_DMA_0_ = NODE,14, C,-; +CYCLE_DMA_1_ = NODE,10, C,-; SIZE_DMA_0_ = NODE,2, G,-; -SIZE_DMA_1_ = NODE,9, G,-; -inst_VPA_D = NODE,2, F,-; -inst_UDS_000_INT = NODE,10, D,-; -inst_LDS_000_INT = NODE,6, D,-; -inst_CLK_OUT_PRE_D = NODE,8, E,-; -CLK_000_D_1_ = NODE,3, H,-; -CLK_000_D_10_ = NODE,14, C,-; -CLK_000_D_11_ = NODE,0, H,-; -inst_DTACK_D0 = NODE,7, G,-; -inst_RESET_OUT = NODE,8, A,-; -CLK_000_D_0_ = NODE,13, C,-; -inst_CLK_OUT_PRE_50 = NODE,6, E,-; -IPL_D0_0_ = NODE,3, B,-; -IPL_D0_1_ = NODE,14, B,-; -IPL_D0_2_ = NODE,3, A,-; -CLK_000_D_2_ = NODE,2, E,-; -CLK_000_D_3_ = NODE,9, E,-; -CLK_000_D_4_ = NODE,11, C,-; -CLK_000_D_5_ = NODE,5, E,-; -CLK_000_D_6_ = NODE,14, D,-; -CLK_000_D_7_ = NODE,14, A,-; -CLK_000_D_8_ = NODE,3, G,-; -CLK_000_D_9_ = NODE,10, A,-; -CLK_000_D_12_ = NODE,14, G,-; +SIZE_DMA_1_ = NODE,13, G,-; +inst_VPA_D = NODE,9, A,-; +inst_UDS_000_INT = NODE,14, D,-; +inst_LDS_000_INT = NODE,6, B,-; +inst_CLK_OUT_PRE_D = NODE,13, B,-; +CLK_000_D_8_ = NODE,6, E,-; +CLK_000_D_9_ = NODE,13, H,-; +inst_DTACK_D0 = NODE,7, C,-; +inst_RESET_OUT = NODE,9, G,-; +CLK_000_D_1_ = NODE,5, H,-; +CLK_000_D_0_ = NODE,8, E,-; +inst_CLK_OUT_PRE_50 = NODE,2, A,-; +inst_CLK_OUT_PRE_25 = NODE,1, A,-; +IPL_D0_0_ = NODE,13, A,-; +IPL_D0_1_ = NODE,3, B,-; +IPL_D0_2_ = NODE,7, G,-; +CLK_000_D_2_ = NODE,6, H,-; +CLK_000_D_3_ = NODE,2, E,-; +CLK_000_D_4_ = NODE,3, D,-; +CLK_000_D_5_ = NODE,14, B,-; +CLK_000_D_6_ = NODE,10, B,-; +CLK_000_D_7_ = NODE,13, E,-; +CLK_000_D_10_ = NODE,6, F,-; inst_AMIGA_BUS_ENABLE_DMA_HIGH = NODE,6, G,-; -inst_DS_000_ENABLE = NODE,6, B,-; -SM_AMIGA_6_ = NODE,2, C,-; -SM_AMIGA_0_ = NODE,5, G,-; -SM_AMIGA_4_ = NODE,10, B,-; -RST_DLY_0_ = NODE,0, F,-; -RST_DLY_1_ = NODE,13, F,-; -RST_DLY_2_ = NODE,9, F,-; -inst_CLK_030_H = NODE,5, A,-; -SM_AMIGA_1_ = NODE,1, F,-; -SM_AMIGA_5_ = NODE,5, F,-; -SM_AMIGA_3_ = NODE,10, F,-; -SM_AMIGA_2_ = NODE,6, F,-; +inst_DS_000_ENABLE = NODE,1, F,-; +SM_AMIGA_6_ = NODE,8, A,-; +SM_AMIGA_4_ = NODE,2, F,-; +SM_AMIGA_0_ = NODE,12, F,-; +RST_DLY_0_ = NODE,10, G,-; +RST_DLY_1_ = NODE,3, G,-; +RST_DLY_2_ = NODE,14, G,-; +inst_CLK_030_H = NODE,6, C,-; +SM_AMIGA_1_ = NODE,8, F,-; +SM_AMIGA_5_ = NODE,13, F,-; +SM_AMIGA_3_ = NODE,9, F,-; +SM_AMIGA_2_ = NODE,5, F,-; SM_AMIGA_i_7_ = NODE,4, F,-; -CIIN_0 = NODE,10, E,-; +CIIN_0 = NODE,9, E,-; diff --git a/Logic/68030_tk.vct b/Logic/68030_tk.vct index a90ec30..8382c5f 100644 --- a/Logic/68030_tk.vct +++ b/Logic/68030_tk.vct @@ -15,8 +15,8 @@ Voltage = 5.0; RCS = "$Revision: 1.2 $"; Parent = m4a5.lci; SDS_File = m4a5.sds; -DATE = 08/18/2016; -TIME = 23:26:14; +DATE = 08/23/2016; +TIME = 20:07:14; Source_Format = Pure_VHDL; Type = TT2; Pre_Fit_Time = 1; @@ -61,8 +61,8 @@ Max_Blk_In_Percent = 100; [OPTIMIZATION OPTIONS] Logic_Reduction = Yes; -Max_PTerm_Split = 16; -Max_PTerm_Collapse = 16; +Max_PTerm_Split = 20; +Max_PTerm_Collapse = 20; XOR_Synthesis = Yes; EN_XOR_Synthesis = Yes; XOR_Gate = Yes; @@ -90,7 +90,7 @@ Max_Symbols = 32; [FITTER GLOBAL OPTIONS] Run_Time = 0; -Set_Reset_Dont_Care = No; +Set_Reset_Dont_Care = Yes; EN_Set_Reset_Dont_Care = Yes; In_Reg_Optimize = Yes; EN_In_Reg_Optimize = No; @@ -104,7 +104,7 @@ Conf_Unused_IOs = Out_Low; Zero_Hold_Time = Yes; Signature_Word = 0; Pull_up = Yes; -Out_Slew_Rate = SLOW,FAST,7,CLK_DIV_OUT,CLK_EXP,FPU_CS,AMIGA_BUS_DATA_DIR,AMIGA_BUS_ENABLE_LOW,AMIGA_ADDR_ENABLE,AMIGA_BUS_ENABLE_HIGH; +Out_Slew_Rate = SLOW,FAST,57,CLK_DIV_OUT,CLK_EXP,FPU_CS,AMIGA_BUS_DATA_DIR,AMIGA_BUS_ENABLE_LOW,AMIGA_ADDR_ENABLE,AMIGA_BUS_ENABLE_HIGH,AS_030,A_16_,A_17_,A_18_,A_19_,RW,SIZE_1_,SIZE_0_,AVEC,BGACK_030,BG_000,E,IPL_030_0_,IPL_030_1_,IPL_030_2_,LDS_000,UDS_000,VMA,RESET,CIIN,A_20_,A_21_,A_22_,A_24_,A_25_,A_26_,A_27_,A_28_,A_29_,A_30_,A_31_,DS_030,BERR,A0,DSACK1,RW_000,AS_000,A_23_,A1,A_3_,A_2_,AHIGH_24_,AHIGH_25_,AHIGH_26_,AHIGH_27_,AHIGH_28_,AHIGH_29_,AHIGH_30_,AHIGH_31_,A_0_; Device_max_fanin = 33; Device_max_pterms = 20; Usercode_Format = Hex; diff --git a/Logic/68030_tk.vho b/Logic/68030_tk.vho index 6838ef2..46bdeeb 100644 --- a/Logic/68030_tk.vho +++ b/Logic/68030_tk.vho @@ -67,34 +67,34 @@ architecture NetList of BUS68030 is signal LDS_000PIN : std_logic; signal LDS_000COM : std_logic; signal nEXP_SPACEPIN : std_logic; - signal BERRPIN : std_logic; - signal BG_030PIN : std_logic; signal SIZE_0XPIN : std_logic; signal SIZE_0XCOM : std_logic; + signal BERRPIN : std_logic; signal AHIGH_30XPIN : std_logic; - signal BGACK_000PIN : std_logic; + signal BG_030PIN : std_logic; signal AHIGH_29XPIN : std_logic; - signal CLK_030PIN : std_logic; signal AHIGH_28XPIN : std_logic; - signal CLK_000PIN : std_logic; signal AHIGH_27XPIN : std_logic; - signal CLK_OSZIPIN : std_logic; + signal BGACK_000PIN : std_logic; signal AHIGH_26XPIN : std_logic; - signal CLK_DIV_OUTQ : std_logic; + signal CLK_030PIN : std_logic; signal AHIGH_25XPIN : std_logic; + signal CLK_000PIN : std_logic; signal AHIGH_24XPIN : std_logic; - signal FPU_CSCOM : std_logic; + signal CLK_OSZIPIN : std_logic; signal A_DECODE_22XPIN : std_logic; - signal FPU_SENSEPIN : std_logic; + signal CLK_DIV_OUTQ : std_logic; signal A_DECODE_21XPIN : std_logic; signal A_DECODE_20XPIN : std_logic; - signal DTACKPIN : std_logic; + signal FPU_CSCOM : std_logic; signal A_DECODE_19XPIN : std_logic; + signal FPU_SENSEPIN : std_logic; signal A_DECODE_18XPIN : std_logic; - signal ECOM : std_logic; signal A_DECODE_17XPIN : std_logic; - signal VPAPIN : std_logic; + signal DTACKPIN : std_logic; signal A_DECODE_16XPIN : std_logic; + signal ECOM : std_logic; + signal VPAPIN : std_logic; signal RSTPIN : std_logic; signal AMIGA_BUS_DATA_DIRCOM : std_logic; signal AMIGA_BUS_ENABLE_LOWCOM : std_logic; @@ -137,13 +137,14 @@ architecture NetList of BUS68030 is signal inst_UDS_000_INTQ : std_logic; signal inst_LDS_000_INTQ : std_logic; signal inst_CLK_OUT_PRE_DQ : std_logic; - signal CLK_000_D_1_busQ : std_logic; - signal CLK_000_D_10_busQ : std_logic; - signal CLK_000_D_11_busQ : std_logic; + signal CLK_000_D_6_busQ : std_logic; + signal CLK_000_D_7_busQ : std_logic; signal inst_DTACK_D0Q : std_logic; signal inst_RESET_OUTQ : std_logic; + signal CLK_000_D_1_busQ : std_logic; signal CLK_000_D_0_busQ : std_logic; signal inst_CLK_OUT_PRE_50Q : std_logic; + signal inst_CLK_OUT_PRE_25Q : std_logic; signal IPL_D0_0_busQ : std_logic; signal IPL_D0_1_busQ : std_logic; signal IPL_D0_2_busQ : std_logic; @@ -151,11 +152,7 @@ architecture NetList of BUS68030 is signal CLK_000_D_3_busQ : std_logic; signal CLK_000_D_4_busQ : std_logic; signal CLK_000_D_5_busQ : std_logic; - signal CLK_000_D_6_busQ : std_logic; - signal CLK_000_D_7_busQ : std_logic; signal CLK_000_D_8_busQ : std_logic; - signal CLK_000_D_9_busQ : std_logic; - signal CLK_000_D_12_busQ : std_logic; signal inst_AMIGA_BUS_ENABLE_DMA_HIGHQ : std_logic; signal inst_DS_000_ENABLEQ : std_logic; signal SM_AMIGA_6_busQ : std_logic; @@ -182,8 +179,8 @@ architecture NetList of BUS68030 is signal UDS_000_OE : std_logic; signal T_4 : std_logic; signal LDS_000_OE : std_logic; - signal BERR_OE : std_logic; signal SIZE_0X_OE : std_logic; + signal BERR_OE : std_logic; signal AHIGH_30X_OE : std_logic; signal AHIGH_29X_OE : std_logic; signal AHIGH_28X_OE : std_logic; @@ -228,6 +225,7 @@ architecture NetList of BUS68030 is signal T_22 : std_logic; signal inst_RESET_OUT_D : std_logic; signal inst_CLK_OUT_PRE_50_D : std_logic; + signal inst_CLK_OUT_PRE_25_D : std_logic; signal T_23 : std_logic; signal T_24 : std_logic; signal T_25 : std_logic; @@ -677,6 +675,9 @@ architecture NetList of BUS68030 is signal T_428 : std_logic; signal T_429 : std_logic; signal T_430 : std_logic; + signal T_431 : std_logic; + signal T_432 : std_logic; + signal T_433 : std_logic; signal VCC_net : std_logic; signal GND_net : std_logic; signal GATE_SIZE_1_XA : std_logic; @@ -726,7 +727,6 @@ architecture NetList of BUS68030 is signal GATE_T_23_A : std_logic; signal GATE_T_24_A : std_logic; signal GATE_T_25_A : std_logic; - signal GATE_T_27_A : std_logic; signal GATE_T_34_A : std_logic; signal GATE_T_35_A : std_logic; signal GATE_T_36_A : std_logic; @@ -831,17 +831,16 @@ architecture NetList of BUS68030 is signal GATE_T_164_A : std_logic; signal GATE_T_165_A : std_logic; signal GATE_T_166_A : std_logic; - signal GATE_T_169_A : std_logic; - signal GATE_T_169_B : std_logic; + signal GATE_T_167_A : std_logic; signal GATE_T_170_A : std_logic; - signal GATE_T_172_B : std_logic; - signal GATE_T_172_A : std_logic; + signal GATE_T_170_B : std_logic; + signal GATE_T_171_A : std_logic; + signal GATE_T_173_B : std_logic; signal GATE_T_173_A : std_logic; signal GATE_T_174_A : std_logic; signal GATE_T_175_A : std_logic; signal GATE_T_176_A : std_logic; signal GATE_T_177_A : std_logic; - signal GATE_T_178_B : std_logic; signal GATE_T_178_A : std_logic; signal GATE_T_179_B : std_logic; signal GATE_T_179_A : std_logic; @@ -849,56 +848,54 @@ architecture NetList of BUS68030 is signal GATE_T_180_A : std_logic; signal GATE_T_181_B : std_logic; signal GATE_T_181_A : std_logic; - signal GATE_T_182_A : std_logic; signal GATE_T_182_B : std_logic; + signal GATE_T_182_A : std_logic; signal GATE_T_183_A : std_logic; signal GATE_T_183_B : std_logic; signal GATE_T_184_A : std_logic; + signal GATE_T_184_B : std_logic; signal GATE_T_185_A : std_logic; - signal GATE_T_187_DN : std_logic; - signal GATE_T_188_A : std_logic; + signal GATE_T_186_A : std_logic; + signal GATE_T_188_DN : std_logic; signal GATE_T_189_A : std_logic; - signal GATE_T_189_B : std_logic; signal GATE_T_190_A : std_logic; - signal GATE_T_195_A : std_logic; - signal GATE_T_197_A : std_logic; + signal GATE_T_190_B : std_logic; + signal GATE_T_191_A : std_logic; + signal GATE_T_196_A : std_logic; signal GATE_T_198_A : std_logic; - signal GATE_T_200_A : std_logic; - signal GATE_T_203_A : std_logic; + signal GATE_T_199_A : std_logic; + signal GATE_T_201_A : std_logic; signal GATE_T_204_A : std_logic; signal GATE_T_205_A : std_logic; - signal GATE_T_209_A : std_logic; - signal GATE_T_209_B : std_logic; - signal GATE_T_212_A : std_logic; - signal GATE_T_215_A : std_logic; - signal GATE_T_218_A : std_logic; - signal GATE_T_218_B : std_logic; + signal GATE_T_206_A : std_logic; + signal GATE_T_210_A : std_logic; + signal GATE_T_213_A : std_logic; + signal GATE_T_213_B : std_logic; + signal GATE_T_216_A : std_logic; signal GATE_T_219_A : std_logic; - signal GATE_T_221_A : std_logic; - signal GATE_T_221_B : std_logic; + signal GATE_T_219_B : std_logic; signal GATE_T_222_A : std_logic; signal GATE_T_223_A : std_logic; signal GATE_T_224_A : std_logic; signal GATE_T_224_B : std_logic; signal GATE_T_226_A : std_logic; - signal GATE_T_228_DN : std_logic; - signal GATE_T_229_B : std_logic; signal GATE_T_229_A : std_logic; - signal GATE_T_231_A : std_logic; - signal GATE_T_233_A : std_logic; + signal GATE_T_229_B : std_logic; + signal GATE_T_230_A : std_logic; + signal GATE_T_232_A : std_logic; signal GATE_T_234_A : std_logic; signal GATE_T_235_A : std_logic; - signal GATE_T_238_A : std_logic; - signal GATE_T_238_B : std_logic; - signal GATE_T_240_A : std_logic; + signal GATE_T_236_A : std_logic; + signal GATE_T_239_A : std_logic; + signal GATE_T_239_B : std_logic; signal GATE_T_241_A : std_logic; - signal GATE_T_243_A : std_logic; - signal GATE_T_245_A : std_logic; + signal GATE_T_242_A : std_logic; + signal GATE_T_244_A : std_logic; signal GATE_T_246_A : std_logic; - signal GATE_T_248_A : std_logic; - signal GATE_T_248_B : std_logic; - signal GATE_T_250_A : std_logic; - signal GATE_T_255_A : std_logic; + signal GATE_T_247_A : std_logic; + signal GATE_T_249_A : std_logic; + signal GATE_T_249_B : std_logic; + signal GATE_T_251_A : std_logic; signal GATE_T_256_A : std_logic; signal GATE_T_257_A : std_logic; signal GATE_T_258_A : std_logic; @@ -910,97 +907,98 @@ architecture NetList of BUS68030 is signal GATE_T_264_A : std_logic; signal GATE_T_265_A : std_logic; signal GATE_T_266_A : std_logic; - signal GATE_T_268_A : std_logic; - signal GATE_T_270_A : std_logic; - signal GATE_T_272_A : std_logic; - signal GATE_T_274_A : std_logic; - signal GATE_T_276_A : std_logic; - signal GATE_T_278_A : std_logic; - signal GATE_T_280_A : std_logic; - signal GATE_T_282_A : std_logic; + signal GATE_T_267_A : std_logic; + signal GATE_T_269_A : std_logic; + signal GATE_T_271_A : std_logic; + signal GATE_T_273_A : std_logic; + signal GATE_T_275_A : std_logic; + signal GATE_T_277_A : std_logic; + signal GATE_T_279_A : std_logic; + signal GATE_T_281_A : std_logic; signal GATE_T_283_A : std_logic; - signal GATE_T_288_A : std_logic; + signal GATE_T_284_A : std_logic; signal GATE_T_289_A : std_logic; - signal GATE_T_292_A : std_logic; - signal GATE_T_294_A : std_logic; - signal GATE_T_296_A : std_logic; + signal GATE_T_291_A : std_logic; + signal GATE_T_293_A : std_logic; + signal GATE_T_295_A : std_logic; signal GATE_T_297_A : std_logic; signal GATE_T_298_A : std_logic; signal GATE_T_299_A : std_logic; signal GATE_T_300_A : std_logic; - signal GATE_T_302_A : std_logic; - signal GATE_T_304_A : std_logic; + signal GATE_T_301_A : std_logic; + signal GATE_T_303_A : std_logic; signal GATE_T_305_A : std_logic; - signal GATE_T_307_A : std_logic; + signal GATE_T_306_A : std_logic; signal GATE_T_308_A : std_logic; signal GATE_T_309_A : std_logic; signal GATE_T_310_A : std_logic; signal GATE_T_311_A : std_logic; signal GATE_T_312_A : std_logic; - signal GATE_T_314_A : std_logic; + signal GATE_T_313_A : std_logic; signal GATE_T_315_A : std_logic; signal GATE_T_316_A : std_logic; signal GATE_T_317_A : std_logic; - signal GATE_T_319_A : std_logic; - signal GATE_T_320_B : std_logic; + signal GATE_T_318_A : std_logic; signal GATE_T_320_A : std_logic; - signal GATE_T_329_A : std_logic; + signal GATE_T_321_B : std_logic; + signal GATE_T_321_A : std_logic; signal GATE_T_330_A : std_logic; - signal GATE_T_332_A : std_logic; + signal GATE_T_331_A : std_logic; signal GATE_T_333_A : std_logic; signal GATE_T_334_A : std_logic; - signal GATE_T_337_A : std_logic; + signal GATE_T_335_A : std_logic; signal GATE_T_338_A : std_logic; - signal GATE_T_341_A : std_logic; + signal GATE_T_339_A : std_logic; signal GATE_T_342_A : std_logic; signal GATE_T_343_A : std_logic; - signal GATE_T_345_A : std_logic; + signal GATE_T_344_A : std_logic; signal GATE_T_346_A : std_logic; - signal GATE_T_349_A : std_logic; + signal GATE_T_347_A : std_logic; signal GATE_T_350_A : std_logic; signal GATE_T_351_A : std_logic; - signal GATE_T_353_A : std_logic; + signal GATE_T_352_A : std_logic; signal GATE_T_354_A : std_logic; - signal GATE_T_360_A : std_logic; + signal GATE_T_355_A : std_logic; signal GATE_T_361_A : std_logic; - signal GATE_T_366_A : std_logic; + signal GATE_T_362_A : std_logic; signal GATE_T_367_A : std_logic; signal GATE_T_368_A : std_logic; - signal GATE_T_371_A : std_logic; - signal GATE_T_375_A : std_logic; + signal GATE_T_369_A : std_logic; + signal GATE_T_372_A : std_logic; signal GATE_T_376_A : std_logic; - signal GATE_T_381_A : std_logic; + signal GATE_T_377_A : std_logic; signal GATE_T_382_A : std_logic; signal GATE_T_383_A : std_logic; - signal GATE_T_386_A : std_logic; - signal GATE_T_390_A : std_logic; - signal GATE_T_390_B : std_logic; + signal GATE_T_384_A : std_logic; + signal GATE_T_387_A : std_logic; signal GATE_T_391_A : std_logic; + signal GATE_T_391_B : std_logic; signal GATE_T_392_A : std_logic; signal GATE_T_393_A : std_logic; - signal GATE_T_394_A : std_logic; - signal GATE_T_395_A : std_logic; + signal GATE_T_396_A : std_logic; + signal GATE_T_397_A : std_logic; signal GATE_T_398_A : std_logic; - signal GATE_T_400_A : std_logic; signal GATE_T_401_A : std_logic; signal GATE_T_403_A : std_logic; - signal GATE_T_409_A : std_logic; - signal GATE_T_410_A : std_logic; - signal GATE_T_411_A : std_logic; + signal GATE_T_404_A : std_logic; + signal GATE_T_406_A : std_logic; signal GATE_T_412_A : std_logic; signal GATE_T_413_A : std_logic; signal GATE_T_414_A : std_logic; signal GATE_T_415_A : std_logic; + signal GATE_T_416_A : std_logic; + signal GATE_T_417_A : std_logic; signal GATE_T_418_A : std_logic; - signal GATE_T_425_A : std_logic; - signal GATE_T_425_B : std_logic; - signal GATE_T_426_A : std_logic; - signal GATE_T_426_B : std_logic; - signal GATE_T_427_A : std_logic; + signal GATE_T_421_A : std_logic; signal GATE_T_428_A : std_logic; signal GATE_T_428_B : std_logic; signal GATE_T_429_A : std_logic; signal GATE_T_429_B : std_logic; + signal GATE_T_430_A : std_logic; + signal GATE_T_431_A : std_logic; + signal GATE_T_431_B : std_logic; + signal GATE_T_432_A : std_logic; + signal GATE_T_432_B : std_logic; begin VCC_I_I_1: VCC port map ( X=>VCC_net ); @@ -1060,92 +1058,86 @@ begin generic map( PULL => "Up") port map ( O=>nEXP_SPACEPIN, I0=>nEXP_SPACE ); - OUT_BERR_I_1: BI_DIR - generic map( PULL => "Up") - port map ( O=>BERRPIN, - I0=>GND_net, - IO=>BERR, - OE=>BERR_OE ); - IN_BG_030_I_1: IBUF - generic map( PULL => "Up") - port map ( O=>BG_030PIN, - I0=>BG_030 ); OUT_SIZE_0_XI_1: BI_DIR generic map( PULL => "Up") port map ( O=>SIZE_0XPIN, I0=>SIZE_0XCOM, IO=>SIZE(0), OE=>SIZE_0X_OE ); + OUT_BERR_I_1: BI_DIR + generic map( PULL => "Up") + port map ( O=>BERRPIN, + I0=>GND_net, + IO=>BERR, + OE=>BERR_OE ); OUT_AHIGH_30_XI_1: BI_DIR generic map( PULL => "Up") port map ( O=>AHIGH_30XPIN, I0=>GND_net, IO=>AHIGH(30), OE=>AHIGH_30X_OE ); - IN_BGACK_000_I_1: IBUF + IN_BG_030_I_1: IBUF generic map( PULL => "Up") - port map ( O=>BGACK_000PIN, - I0=>BGACK_000 ); + port map ( O=>BG_030PIN, + I0=>BG_030 ); OUT_AHIGH_29_XI_1: BI_DIR generic map( PULL => "Up") port map ( O=>AHIGH_29XPIN, I0=>GND_net, IO=>AHIGH(29), OE=>AHIGH_29X_OE ); - IN_CLK_030_I_1: IBUF - generic map( PULL => "Up") - port map ( O=>CLK_030PIN, - I0=>CLK_030 ); OUT_AHIGH_28_XI_1: BI_DIR generic map( PULL => "Up") port map ( O=>AHIGH_28XPIN, I0=>GND_net, IO=>AHIGH(28), OE=>AHIGH_28X_OE ); - IN_CLK_000_I_1: IBUF - generic map( PULL => "Up") - port map ( O=>CLK_000PIN, - I0=>CLK_000 ); OUT_AHIGH_27_XI_1: BI_DIR generic map( PULL => "Up") port map ( O=>AHIGH_27XPIN, I0=>GND_net, IO=>AHIGH(27), OE=>AHIGH_27X_OE ); - IN_CLK_OSZI_I_1: IBUF + IN_BGACK_000_I_1: IBUF generic map( PULL => "Up") - port map ( O=>CLK_OSZIPIN, - I0=>CLK_OSZI ); + port map ( O=>BGACK_000PIN, + I0=>BGACK_000 ); OUT_AHIGH_26_XI_1: BI_DIR generic map( PULL => "Up") port map ( O=>AHIGH_26XPIN, I0=>GND_net, IO=>AHIGH(26), OE=>AHIGH_26X_OE ); - OUT_CLK_DIV_OUT_I_1: OBUF port map ( O=>CLK_DIV_OUT, - I0=>CLK_DIV_OUTQ ); + IN_CLK_030_I_1: IBUF + generic map( PULL => "Up") + port map ( O=>CLK_030PIN, + I0=>CLK_030 ); OUT_AHIGH_25_XI_1: BI_DIR generic map( PULL => "Up") port map ( O=>AHIGH_25XPIN, I0=>GND_net, IO=>AHIGH(25), OE=>AHIGH_25X_OE ); + IN_CLK_000_I_1: IBUF + generic map( PULL => "Up") + port map ( O=>CLK_000PIN, + I0=>CLK_000 ); OUT_AHIGH_24_XI_1: BI_DIR generic map( PULL => "Up") port map ( O=>AHIGH_24XPIN, I0=>GND_net, IO=>AHIGH(24), OE=>AHIGH_24X_OE ); - OUT_FPU_CS_I_1: OBUF port map ( O=>FPU_CS, - I0=>FPU_CSCOM ); + IN_CLK_OSZI_I_1: IBUF + generic map( PULL => "Up") + port map ( O=>CLK_OSZIPIN, + I0=>CLK_OSZI ); IN_A_DECODE_22_XI_1: IBUF generic map( PULL => "Up") port map ( O=>A_DECODE_22XPIN, I0=>A_DECODE(22) ); - IN_FPU_SENSE_I_1: IBUF - generic map( PULL => "Up") - port map ( O=>FPU_SENSEPIN, - I0=>FPU_SENSE ); + OUT_CLK_DIV_OUT_I_1: OBUF port map ( O=>CLK_DIV_OUT, + I0=>CLK_DIV_OUTQ ); IN_A_DECODE_21_XI_1: IBUF generic map( PULL => "Up") port map ( O=>A_DECODE_21XPIN, @@ -1154,34 +1146,40 @@ begin generic map( PULL => "Up") port map ( O=>A_DECODE_20XPIN, I0=>A_DECODE(20) ); - IN_DTACK_I_1: IBUF - generic map( PULL => "Up") - port map ( O=>DTACKPIN, - I0=>DTACK ); + OUT_FPU_CS_I_1: OBUF port map ( O=>FPU_CS, + I0=>FPU_CSCOM ); IN_A_DECODE_19_XI_1: IBUF generic map( PULL => "Up") port map ( O=>A_DECODE_19XPIN, I0=>A_DECODE(19) ); - OUT_AVEC_I_1: OBUF port map ( O=>AVEC, - I0=>VCC_net ); + IN_FPU_SENSE_I_1: IBUF + generic map( PULL => "Up") + port map ( O=>FPU_SENSEPIN, + I0=>FPU_SENSE ); IN_A_DECODE_18_XI_1: IBUF generic map( PULL => "Up") port map ( O=>A_DECODE_18XPIN, I0=>A_DECODE(18) ); - OUT_E_I_1: OBUF port map ( O=>E, - I0=>ECOM ); IN_A_DECODE_17_XI_1: IBUF generic map( PULL => "Up") port map ( O=>A_DECODE_17XPIN, I0=>A_DECODE(17) ); - IN_VPA_I_1: IBUF + IN_DTACK_I_1: IBUF generic map( PULL => "Up") - port map ( O=>VPAPIN, - I0=>VPA ); + port map ( O=>DTACKPIN, + I0=>DTACK ); IN_A_DECODE_16_XI_1: IBUF generic map( PULL => "Up") port map ( O=>A_DECODE_16XPIN, I0=>A_DECODE(16) ); + OUT_AVEC_I_1: OBUF port map ( O=>AVEC, + I0=>VCC_net ); + OUT_E_I_1: OBUF port map ( O=>E, + I0=>ECOM ); + IN_VPA_I_1: IBUF + generic map( PULL => "Up") + port map ( O=>VPAPIN, + I0=>VPA ); IN_RST_I_1: IBUF generic map( PULL => "Up") port map ( O=>RSTPIN, @@ -1341,17 +1339,14 @@ begin FF_inst_LDS_000_INT_I_1: DFF port map ( D=>inst_LDS_000_INT_D, Q=>inst_LDS_000_INTQ, CLK=>CLK_OSZIPIN ); - FF_inst_CLK_OUT_PRE_D_I_1: DFF port map ( D=>inst_CLK_OUT_PRE_50Q, + FF_inst_CLK_OUT_PRE_D_I_1: DFF port map ( D=>inst_CLK_OUT_PRE_25Q, Q=>inst_CLK_OUT_PRE_DQ, CLK=>CLK_OSZIPIN ); - FF_CLK_000_D_1_bus_I_1: DFF port map ( D=>CLK_000_D_0_busQ, - Q=>CLK_000_D_1_busQ, + FF_CLK_000_D_6_bus_I_1: DFF port map ( D=>CLK_000_D_5_busQ, + Q=>CLK_000_D_6_busQ, CLK=>CLK_OSZIPIN ); - FF_CLK_000_D_10_bus_I_1: DFF port map ( D=>CLK_000_D_9_busQ, - Q=>CLK_000_D_10_busQ, - CLK=>CLK_OSZIPIN ); - FF_CLK_000_D_11_bus_I_1: DFF port map ( D=>CLK_000_D_10_busQ, - Q=>CLK_000_D_11_busQ, + FF_CLK_000_D_7_bus_I_1: DFF port map ( D=>CLK_000_D_6_busQ, + Q=>CLK_000_D_7_busQ, CLK=>CLK_OSZIPIN ); FF_inst_DTACK_D0_I_1: DFF port map ( D=>inst_DTACK_D0_D, Q=>inst_DTACK_D0Q, @@ -1359,12 +1354,18 @@ begin FF_inst_RESET_OUT_I_1: DFF port map ( D=>inst_RESET_OUT_D, Q=>inst_RESET_OUTQ, CLK=>CLK_OSZIPIN ); + FF_CLK_000_D_1_bus_I_1: DFF port map ( D=>CLK_000_D_0_busQ, + Q=>CLK_000_D_1_busQ, + CLK=>CLK_OSZIPIN ); FF_CLK_000_D_0_bus_I_1: DFF port map ( D=>CLK_000PIN, Q=>CLK_000_D_0_busQ, CLK=>CLK_OSZIPIN ); FF_inst_CLK_OUT_PRE_50_I_1: DFF port map ( D=>inst_CLK_OUT_PRE_50_D, Q=>inst_CLK_OUT_PRE_50Q, CLK=>CLK_OSZIPIN ); + FF_inst_CLK_OUT_PRE_25_I_1: DFF port map ( D=>inst_CLK_OUT_PRE_25_D, + Q=>inst_CLK_OUT_PRE_25Q, + CLK=>CLK_OSZIPIN ); FF_IPL_D0_0_bus_I_1: DFF port map ( D=>IPL_D0_0_bus_D, Q=>IPL_D0_0_busQ, CLK=>CLK_OSZIPIN ); @@ -1386,21 +1387,9 @@ begin FF_CLK_000_D_5_bus_I_1: DFF port map ( D=>CLK_000_D_4_busQ, Q=>CLK_000_D_5_busQ, CLK=>CLK_OSZIPIN ); - FF_CLK_000_D_6_bus_I_1: DFF port map ( D=>CLK_000_D_5_busQ, - Q=>CLK_000_D_6_busQ, - CLK=>CLK_OSZIPIN ); - FF_CLK_000_D_7_bus_I_1: DFF port map ( D=>CLK_000_D_6_busQ, - Q=>CLK_000_D_7_busQ, - CLK=>CLK_OSZIPIN ); FF_CLK_000_D_8_bus_I_1: DFF port map ( D=>CLK_000_D_7_busQ, Q=>CLK_000_D_8_busQ, CLK=>CLK_OSZIPIN ); - FF_CLK_000_D_9_bus_I_1: DFF port map ( D=>CLK_000_D_8_busQ, - Q=>CLK_000_D_9_busQ, - CLK=>CLK_OSZIPIN ); - FF_CLK_000_D_12_bus_I_1: DFF port map ( D=>CLK_000_D_11_busQ, - Q=>CLK_000_D_12_busQ, - CLK=>CLK_OSZIPIN ); FF_inst_AMIGA_BUS_ENABLE_DMA_HIGH_I_1: DFF port map ( D=>inst_AMIGA_BUS_ENABLE_DMA_HIGH_D, Q=>inst_AMIGA_BUS_ENABLE_DMA_HIGHQ, CLK=>CLK_OSZIPIN ); @@ -1503,10 +1492,6 @@ begin GATE_LDS_000_OE_I_1: AND2 port map ( O=>LDS_000_OE, I1=>inst_RESET_OUTQ, I0=>BGACK_030Q ); - GATE_BERR_OE_I_1: AND3 port map ( O=>BERR_OE, - I2=>T_429, - I1=>T_430, - I0=>T_428 ); GATE_SIZE_0_XI_1: AND2 port map ( O=>SIZE_0XCOM, I1=>SIZE_DMA_0_busQ, I0=>GATE_SIZE_0_XA ); @@ -1515,6 +1500,10 @@ begin GATE_SIZE_0X_OE_I_1: NOR2 port map ( O=>SIZE_0X_OE, I1=>BGACK_030Q, I0=>nEXP_SPACEPIN ); + GATE_BERR_OE_I_1: AND3 port map ( O=>BERR_OE, + I2=>T_432, + I1=>T_433, + I0=>T_431 ); GATE_AHIGH_30X_OE_I_1: INV port map ( I0=>BGACK_030Q, O=>GATE_AHIGH_30X_OE_A ); GATE_AHIGH_30X_OE_I_2: INV port map ( I0=>nEXP_SPACEPIN, @@ -1572,59 +1561,58 @@ begin I2=>GATE_AHIGH_24X_OE_A, I1=>GATE_AHIGH_24X_OE_B ); GATE_T_5_I_1: AND3 port map ( O=>T_5, - I2=>T_426, - I1=>T_427, - I0=>T_425 ); + I2=>T_429, + I1=>T_430, + I0=>T_428 ); GATE_E_I_1: OR2 port map ( O=>ECOM, - I1=>T_190, - I0=>T_189 ); + I1=>T_191, + I0=>T_190 ); GATE_RESET_OE_I_1: INV port map ( I0=>inst_RESET_OUTQ, O=>RESET_OE ); GATE_AMIGA_BUS_DATA_DIR_I_1: OR2 port map ( O=>AMIGA_BUS_DATA_DIRCOM, - I1=>T_188, - I0=>T_187 ); + I1=>T_189, + I0=>T_188 ); GATE_T_6_I_1: NOR2 port map ( O=>T_6, I1=>inst_AMIGA_BUS_ENABLE_DMA_LOWQ, I0=>BGACK_030Q ); GATE_AMIGA_BUS_ENABLE_HIGH_I_1: OR2 port map ( O=>AMIGA_BUS_ENABLE_HIGHCOM, - I1=>T_186, - I0=>T_185 ); + I1=>T_187, + I0=>T_186 ); GATE_CIIN_I_1: AND4 port map ( O=>CIINCOM, - I3=>T_422, - I2=>T_423, - I1=>T_424, + I3=>T_425, + I2=>T_426, + I1=>T_427, I0=>GATE_CIIN_A ); GATE_CIIN_I_2: INV port map ( I0=>AHIGH_31XPIN, O=>GATE_CIIN_A ); - GATE_T_7_I_1: OR4 port map ( I0=>T_183, - I1=>T_406, + GATE_T_7_I_1: OR4 port map ( I0=>T_184, + I1=>T_409, O=>T_7, - I2=>T_405, - I3=>T_404 ); - GATE_T_8_I_1: OR4 port map ( I0=>T_170, - I1=>T_171, + I2=>T_408, + I3=>T_407 ); + GATE_T_8_I_1: OR4 port map ( I0=>T_171, + I1=>T_172, O=>T_8, - I2=>T_172, - I3=>T_173 ); + I2=>T_173, + I3=>T_174 ); GATE_RW_000_OE_I_1: AND2 port map ( O=>RW_000_OE, I1=>inst_RESET_OUTQ, I0=>BGACK_030Q ); GATE_T_9_I_1: OR2 port map ( O=>T_9, - I1=>T_169, - I0=>T_168 ); + I1=>T_170, + I0=>T_169 ); GATE_BGACK_030_D_I_3: NAN3 port map ( O=>BGACK_030_D, I2=>RSTPIN, I1=>GATE_BGACK_030_D_B, I0=>GATE_BGACK_030_D_A ); - GATE_BGACK_030_D_I_2: INV port map ( I0=>T_166, + GATE_BGACK_030_D_I_2: INV port map ( I0=>T_167, O=>GATE_BGACK_030_D_B ); - GATE_BGACK_030_D_I_1: INV port map ( I0=>T_167, + GATE_BGACK_030_D_I_1: INV port map ( I0=>T_168, O=>GATE_BGACK_030_D_A ); - GATE_T_10_I_1: OR4 port map ( I0=>T_162, - I1=>T_163, - O=>T_10, - I2=>T_164, - I3=>T_165 ); + GATE_T_10_I_1: OR3 port map ( O=>T_10, + I2=>T_395, + I1=>T_166, + I0=>T_394 ); GATE_VMA_T_I_1: OR3 port map ( O=>VMA_T, I2=>T_160, I1=>T_159, @@ -1654,15 +1642,15 @@ begin I2=>GATE_A_0X_OE_A, I1=>GATE_A_0X_OE_B ); GATE_T_12_I_1: OR4 port map ( I0=>T_154, - I1=>T_374, + I1=>T_375, O=>T_12, - I2=>T_373, - I3=>T_372 ); + I2=>T_374, + I3=>T_373 ); GATE_T_13_I_1: OR4 port map ( I0=>T_144, - I1=>T_359, + I1=>T_360, O=>T_13, - I2=>T_358, - I3=>T_357 ); + I2=>T_359, + I3=>T_358 ); GATE_cpu_est_3_bus_D_I_1: OR4 port map ( I0=>T_131, I1=>T_132, O=>cpu_est_3_bus_D, @@ -1696,10 +1684,10 @@ begin GATE_T_16_I_2: INV port map ( O=>GATE_T_16_A, I0=>AS_030PIN ); GATE_T_17_I_1: OR4 port map ( I0=>T_119, - I1=>T_328, + I1=>T_329, O=>T_17, - I2=>T_327, - I3=>T_326 ); + I2=>T_328, + I3=>T_327 ); GATE_T_18_I_1: AND2 port map ( O=>T_18, I1=>RSTPIN, I0=>GATE_T_18_A ); @@ -1710,16 +1698,16 @@ begin I2=>GATE_inst_AS_000_DMA_D_C, I1=>GATE_inst_AS_000_DMA_D_B, I0=>GATE_inst_AS_000_DMA_D_A ); - GATE_inst_AS_000_DMA_D_I_2: INV port map ( I0=>T_324, + GATE_inst_AS_000_DMA_D_I_2: INV port map ( I0=>T_325, O=>GATE_inst_AS_000_DMA_D_A ); - GATE_inst_AS_000_DMA_D_I_3: INV port map ( I0=>T_323, + GATE_inst_AS_000_DMA_D_I_3: INV port map ( I0=>T_324, O=>GATE_inst_AS_000_DMA_D_B ); - GATE_inst_AS_000_DMA_D_I_4: INV port map ( I0=>T_325, + GATE_inst_AS_000_DMA_D_I_4: INV port map ( I0=>T_326, O=>GATE_inst_AS_000_DMA_D_C ); GATE_inst_DS_000_DMA_D_I_1: OR3 port map ( O=>inst_DS_000_DMA_D, - I2=>T_321, - I1=>T_322, - I0=>T_320 ); + I2=>T_322, + I1=>T_323, + I0=>T_321 ); GATE_CYCLE_DMA_0_bus_D_I_1: OR3 port map ( O=>CYCLE_DMA_0_bus_D, I2=>T_101, I1=>T_100, @@ -1767,6 +1755,9 @@ begin I0=>T_85 ); GATE_inst_CLK_OUT_PRE_50_D_I_1: INV port map ( I0=>inst_CLK_OUT_PRE_50Q, O=>inst_CLK_OUT_PRE_50_D ); + GATE_inst_CLK_OUT_PRE_25_D_I_1: XOR2 port map ( O=>inst_CLK_OUT_PRE_25_D, + I1=>inst_CLK_OUT_PRE_25Q, + I0=>inst_CLK_OUT_PRE_50Q ); GATE_T_23_I_1: AND2 port map ( O=>T_23, I1=>RSTPIN, I0=>GATE_T_23_A ); @@ -1816,11 +1807,11 @@ begin GATE_RST_DLY_2_bus_D_I_1: OR2 port map ( O=>RST_DLY_2_bus_D, I1=>T_65, I0=>T_64 ); - GATE_inst_CLK_030_H_D_I_1: OR4 port map ( I0=>T_254, - I1=>T_253, + GATE_inst_CLK_030_H_D_I_1: OR4 port map ( I0=>T_255, + I1=>T_254, O=>inst_CLK_030_H_D, - I2=>T_252, - I3=>T_251 ); + I2=>T_253, + I3=>T_252 ); GATE_SM_AMIGA_1_bus_D_I_1: OR3 port map ( O=>SM_AMIGA_1_bus_D, I2=>T_54, I1=>T_53, @@ -1844,15 +1835,15 @@ begin I2=>T_48, I3=>T_49 ); GATE_SM_AMIGA_i_7_bus_D_X1_I_1: OR4 port map ( I0=>T_39, - I1=>T_193, + I1=>T_194, O=>SM_AMIGA_i_7_bus_D_X1, - I2=>T_192, - I3=>T_191 ); + I2=>T_193, + I3=>T_192 ); GATE_SM_AMIGA_i_7_bus_D_X2_I_1: AND2 port map ( O=>SM_AMIGA_i_7_bus_D_X2, I1=>BERRPIN, I0=>RSTPIN ); GATE_CIIN_OE_I_1: OR2 port map ( O=>CIIN_OE, - I1=>T_184, + I1=>T_185, I0=>nEXP_SPACEPIN ); GATE_cpu_est_2_bus_D_I_1: XOR2 port map ( O=>cpu_est_2_bus_D, I1=>cpu_est_2_bus_D_X1, @@ -1924,119 +1915,117 @@ begin I3=>T_227, I2=>T_228, I1=>T_229, - I0=>GATE_T_27_A ); - GATE_T_27_I_2: INV port map ( I0=>BERRPIN, - O=>GATE_T_27_A ); + I0=>T_230 ); GATE_T_28_I_1: AND4 port map ( O=>T_28, I3=>T_223, I2=>T_224, I1=>T_225, I0=>T_226 ); GATE_T_29_I_1: AND4 port map ( O=>T_29, - I3=>T_219, - I2=>T_220, - I1=>T_221, - I0=>T_222 ); + I3=>T_220, + I2=>T_221, + I1=>T_222, + I0=>BERRPIN ); GATE_T_30_I_1: AND4 port map ( O=>T_30, - I3=>T_216, - I2=>T_217, - I1=>T_218, + I3=>T_217, + I2=>T_218, + I1=>T_219, I0=>BERRPIN ); GATE_T_31_I_1: AND4 port map ( O=>T_31, - I3=>T_213, - I2=>T_214, - I1=>T_215, + I3=>T_214, + I2=>T_215, + I1=>T_216, I0=>BERRPIN ); GATE_T_32_I_1: AND4 port map ( O=>T_32, - I3=>T_210, - I2=>T_211, - I1=>T_212, + I3=>T_211, + I2=>T_212, + I1=>T_213, I0=>BERRPIN ); GATE_T_33_I_1: AND4 port map ( O=>T_33, - I3=>T_207, - I2=>T_208, - I1=>T_209, + I3=>T_208, + I2=>T_209, + I1=>T_210, I0=>BERRPIN ); GATE_T_34_I_1: AND4 port map ( O=>T_34, - I3=>T_204, - I2=>T_205, - I1=>T_206, + I3=>T_205, + I2=>T_206, + I1=>T_207, I0=>GATE_T_34_A ); GATE_T_34_I_2: INV port map ( I0=>BERRPIN, O=>GATE_T_34_A ); GATE_T_35_I_1: INV port map ( I0=>BERRPIN, O=>GATE_T_35_A ); GATE_T_35_I_2: AND3 port map ( O=>T_35, - I2=>T_203, - I1=>T_202, + I2=>T_204, + I1=>T_203, I0=>GATE_T_35_A ); GATE_T_36_I_1: INV port map ( I0=>BERRPIN, O=>GATE_T_36_A ); GATE_T_36_I_2: AND3 port map ( O=>T_36, - I2=>T_201, - I1=>T_200, + I2=>T_202, + I1=>T_201, I0=>GATE_T_36_A ); GATE_T_37_I_1: INV port map ( I0=>BERRPIN, O=>GATE_T_37_A ); GATE_T_37_I_2: AND3 port map ( O=>T_37, - I2=>T_199, - I1=>T_198, + I2=>T_200, + I1=>T_199, I0=>GATE_T_37_A ); GATE_T_38_I_1: INV port map ( I0=>BERRPIN, O=>GATE_T_38_A ); GATE_T_38_I_2: AND3 port map ( O=>T_38, - I2=>T_197, - I1=>T_196, + I2=>T_198, + I1=>T_197, I0=>GATE_T_38_A ); GATE_T_39_I_1: INV port map ( I0=>BERRPIN, O=>GATE_T_39_A ); GATE_T_39_I_2: AND3 port map ( O=>T_39, - I2=>T_195, - I1=>T_194, + I2=>T_196, + I1=>T_195, I0=>GATE_T_39_A ); GATE_T_40_I_1: AND4 port map ( O=>T_40, - I3=>T_237, - I2=>T_238, - I1=>T_239, - I0=>T_240 ); + I3=>T_238, + I2=>T_239, + I1=>T_240, + I0=>T_241 ); GATE_T_41_I_1: AND4 port map ( O=>T_41, - I3=>T_234, - I2=>T_235, - I1=>T_236, + I3=>T_235, + I2=>T_236, + I1=>T_237, I0=>BERRPIN ); GATE_T_42_I_1: INV port map ( I0=>BERRPIN, O=>GATE_T_42_A ); GATE_T_42_I_2: AND3 port map ( O=>T_42, - I2=>T_233, - I1=>T_232, + I2=>T_234, + I1=>T_233, I0=>GATE_T_42_A ); GATE_T_43_I_1: INV port map ( I0=>SM_AMIGA_3_busQ, O=>GATE_T_43_A ); GATE_T_43_I_2: AND3 port map ( O=>T_43, - I2=>T_231, - I1=>T_230, + I2=>T_232, + I1=>T_231, I0=>GATE_T_43_A ); GATE_T_44_I_1: INV port map ( I0=>RST_DLY_2_busQ, O=>GATE_T_44_A ); GATE_T_44_I_2: AND3 port map ( O=>T_44, - I2=>T_244, - I1=>T_243, + I2=>T_245, + I1=>T_244, I0=>GATE_T_44_A ); GATE_T_45_I_1: INV port map ( I0=>RST_DLY_1_busQ, O=>GATE_T_45_A ); GATE_T_45_I_2: AND3 port map ( O=>T_45, - I2=>T_242, - I1=>T_241, + I2=>T_243, + I1=>T_242, I0=>GATE_T_45_A ); GATE_T_46_I_1: AND4 port map ( O=>T_46, - I3=>T_248, - I2=>T_249, - I1=>T_250, + I3=>T_249, + I2=>T_250, + I1=>T_251, I0=>SM_AMIGA_3_busQ ); GATE_T_47_I_1: AND3 port map ( O=>T_47, - I2=>T_246, - I1=>T_247, - I0=>T_245 ); + I2=>T_247, + I1=>T_248, + I0=>T_246 ); GATE_T_48_I_1: AND4 port map ( O=>T_48, I3=>BERRPIN, I2=>SM_AMIGA_2_busQ, @@ -2088,57 +2077,57 @@ begin GATE_T_55_I_2: INV port map ( I0=>CLK_000_D_1_busQ, O=>GATE_T_55_A ); GATE_T_56_I_1: AND4 port map ( O=>T_56, - I3=>T_279, - I2=>T_280, - I1=>T_281, - I0=>T_282 ); + I3=>T_280, + I2=>T_281, + I1=>T_282, + I0=>T_283 ); GATE_T_57_I_1: AND4 port map ( O=>T_57, - I3=>T_275, - I2=>T_276, - I1=>T_277, - I0=>T_278 ); + I3=>T_276, + I2=>T_277, + I1=>T_278, + I0=>T_279 ); GATE_T_58_I_1: AND4 port map ( O=>T_58, - I3=>T_271, - I2=>T_272, - I1=>T_273, - I0=>T_274 ); + I3=>T_272, + I2=>T_273, + I1=>T_274, + I0=>T_275 ); GATE_T_59_I_1: AND4 port map ( O=>T_59, - I3=>T_267, - I2=>T_268, - I1=>T_269, - I0=>T_270 ); + I3=>T_268, + I2=>T_269, + I1=>T_270, + I0=>T_271 ); GATE_T_60_I_1: AND4 port map ( O=>T_60, - I3=>T_264, - I2=>T_265, - I1=>T_266, + I3=>T_265, + I2=>T_266, + I1=>T_267, I0=>GATE_T_60_A ); GATE_T_60_I_2: INV port map ( I0=>LDS_000PIN, O=>GATE_T_60_A ); GATE_T_61_I_1: AND4 port map ( O=>T_61, - I3=>T_261, - I2=>T_262, - I1=>T_263, + I3=>T_262, + I2=>T_263, + I1=>T_264, I0=>GATE_T_61_A ); GATE_T_61_I_2: INV port map ( I0=>LDS_000PIN, O=>GATE_T_61_A ); GATE_T_62_I_1: AND4 port map ( O=>T_62, - I3=>T_258, - I2=>T_259, - I1=>T_260, + I3=>T_259, + I2=>T_260, + I1=>T_261, I0=>GATE_T_62_A ); GATE_T_62_I_2: INV port map ( I0=>UDS_000PIN, O=>GATE_T_62_A ); GATE_T_63_I_1: AND4 port map ( O=>T_63, - I3=>T_255, - I2=>T_256, - I1=>T_257, + I3=>T_256, + I2=>T_257, + I1=>T_258, I0=>GATE_T_63_A ); GATE_T_63_I_2: INV port map ( I0=>UDS_000PIN, O=>GATE_T_63_A ); GATE_T_64_I_1: AND3 port map ( O=>T_64, - I2=>T_284, + I2=>T_285, I1=>RST_DLY_1_busQ, - I0=>T_283 ); + I0=>T_284 ); GATE_T_65_I_1: AND2 port map ( O=>T_65, I1=>RST_DLY_2_busQ, I0=>RSTPIN ); @@ -2205,31 +2194,31 @@ begin GATE_T_75_I_2: INV port map ( I0=>CLK_000_D_0_busQ, O=>GATE_T_75_A ); GATE_T_76_I_1: AND3 port map ( O=>T_76, - I2=>T_290, - I1=>T_291, - I0=>T_289 ); + I2=>T_291, + I1=>T_292, + I0=>T_290 ); GATE_T_77_I_1: AND3 port map ( O=>T_77, - I2=>T_288, + I2=>T_289, I1=>BERRPIN, - I0=>T_287 ); + I0=>T_288 ); GATE_T_78_I_1: AND3 port map ( O=>T_78, - I2=>T_286, + I2=>T_287, I1=>BERRPIN, - I0=>T_285 ); + I0=>T_286 ); GATE_T_79_I_1: AND4 port map ( O=>T_79, - I3=>T_298, - I2=>T_299, - I1=>T_300, + I3=>T_299, + I2=>T_300, + I1=>T_301, I0=>RWPIN ); GATE_T_80_I_1: AND4 port map ( O=>T_80, - I3=>T_295, - I2=>T_296, - I1=>T_297, + I3=>T_296, + I2=>T_297, + I1=>T_298, I0=>SM_AMIGA_i_7_busQ ); GATE_T_81_I_1: AND3 port map ( O=>T_81, - I2=>T_293, - I1=>T_294, - I0=>T_292 ); + I2=>T_294, + I1=>T_295, + I0=>T_293 ); GATE_T_82_I_1: AND4 port map ( O=>T_82, I3=>BERRPIN, I2=>inst_DS_000_ENABLEQ, @@ -2253,9 +2242,9 @@ begin I2=>GATE_T_84_A, I1=>GATE_T_84_B ); GATE_T_85_I_1: AND3 port map ( O=>T_85, - I2=>T_302, - I1=>T_303, - I0=>T_301 ); + I2=>T_303, + I1=>T_304, + I0=>T_302 ); GATE_T_86_I_1: AND2 port map ( O=>T_86, I1=>inst_RESET_OUTQ, I0=>RSTPIN ); @@ -2315,45 +2304,45 @@ begin I1=>RSTPIN, I0=>GATE_T_95_A ); GATE_T_96_I_1: AND4 port map ( O=>T_96, - I3=>T_310, - I2=>T_311, - I1=>T_312, + I3=>T_311, + I2=>T_312, + I1=>T_313, I0=>GATE_T_96_A ); GATE_T_96_I_2: INV port map ( I0=>AS_000PIN, O=>GATE_T_96_A ); GATE_T_97_I_1: INV port map ( I0=>AS_000PIN, O=>GATE_T_97_A ); GATE_T_97_I_2: AND3 port map ( O=>T_97, - I2=>T_309, - I1=>T_308, + I2=>T_310, + I1=>T_309, I0=>GATE_T_97_A ); GATE_T_98_I_1: INV port map ( I0=>AS_000PIN, O=>GATE_T_98_A ); GATE_T_98_I_2: AND3 port map ( O=>T_98, - I2=>T_307, - I1=>T_306, + I2=>T_308, + I1=>T_307, I0=>GATE_T_98_A ); GATE_T_99_I_1: INV port map ( I0=>AS_000PIN, O=>GATE_T_99_A ); GATE_T_99_I_2: AND3 port map ( O=>T_99, - I2=>T_305, - I1=>T_304, + I2=>T_306, + I1=>T_305, I0=>GATE_T_99_A ); GATE_T_100_I_1: AND3 port map ( O=>T_100, - I2=>T_318, - I1=>T_319, - I0=>T_317 ); + I2=>T_319, + I1=>T_320, + I0=>T_318 ); GATE_T_101_I_1: INV port map ( I0=>AS_000PIN, O=>GATE_T_101_A ); GATE_T_101_I_2: AND3 port map ( O=>T_101, - I2=>T_316, - I1=>T_315, + I2=>T_317, + I1=>T_316, I0=>GATE_T_101_A ); GATE_T_102_I_1: INV port map ( I0=>AS_000PIN, O=>GATE_T_102_A ); GATE_T_102_I_2: AND3 port map ( O=>T_102, - I2=>T_314, - I1=>T_313, + I2=>T_315, + I1=>T_314, I0=>GATE_T_102_A ); GATE_T_103_I_1: AND4 port map ( O=>T_103, I3=>inst_AS_000_DMAQ, @@ -2402,35 +2391,35 @@ begin GATE_T_112_I_2: INV port map ( O=>GATE_T_112_A, I0=>CLK_030PIN ); GATE_T_113_I_1: AND4 port map ( O=>T_113, - I3=>T_349, - I2=>T_350, - I1=>T_351, - I0=>T_352 ); + I3=>T_350, + I2=>T_351, + I1=>T_352, + I0=>T_353 ); GATE_T_114_I_1: AND4 port map ( O=>T_114, - I3=>T_345, - I2=>T_346, - I1=>T_347, - I0=>T_348 ); + I3=>T_346, + I2=>T_347, + I1=>T_348, + I0=>T_349 ); GATE_T_115_I_1: AND4 port map ( O=>T_115, - I3=>T_341, - I2=>T_342, - I1=>T_343, - I0=>T_344 ); + I3=>T_342, + I2=>T_343, + I1=>T_344, + I0=>T_345 ); GATE_T_116_I_1: AND4 port map ( O=>T_116, - I3=>T_337, - I2=>T_338, - I1=>T_339, - I0=>T_340 ); + I3=>T_338, + I2=>T_339, + I1=>T_340, + I0=>T_341 ); GATE_T_117_I_1: AND4 port map ( O=>T_117, - I3=>T_333, - I2=>T_334, - I1=>T_335, - I0=>T_336 ); + I3=>T_334, + I2=>T_335, + I1=>T_336, + I0=>T_337 ); GATE_T_118_I_1: AND4 port map ( O=>T_118, - I3=>T_329, - I2=>T_330, - I1=>T_331, - I0=>T_332 ); + I3=>T_330, + I2=>T_331, + I1=>T_332, + I0=>T_333 ); GATE_T_119_I_3: AND4 port map ( O=>T_119, I3=>BERRPIN, I2=>RSTPIN, @@ -2472,8 +2461,8 @@ begin GATE_T_124_I_1: INV port map ( I0=>CLK_000_D_0_busQ, O=>GATE_T_124_A ); GATE_T_124_I_2: AND3 port map ( O=>T_124, - I2=>T_354, - I1=>T_353, + I2=>T_355, + I1=>T_354, I0=>GATE_T_124_A ); GATE_T_125_I_1: AND2 port map ( O=>T_125, I1=>CLK_000_D_0_busQ, @@ -2507,8 +2496,8 @@ begin GATE_T_131_I_1: INV port map ( I0=>CLK_000_D_0_busQ, O=>GATE_T_131_A ); GATE_T_131_I_2: AND3 port map ( O=>T_131, - I2=>T_356, - I1=>T_355, + I2=>T_357, + I1=>T_356, I0=>GATE_T_131_A ); GATE_T_132_I_1: INV port map ( I0=>cpu_est_2_busQ, O=>GATE_T_132_A ); @@ -2527,28 +2516,28 @@ begin GATE_T_134_I_2: INV port map ( O=>GATE_T_134_A, I0=>CLK_000_D_1_busQ ); GATE_T_135_I_1: AND4 port map ( O=>T_135, - I3=>T_369, - I2=>T_370, - I1=>T_371, + I3=>T_370, + I2=>T_371, + I1=>T_372, I0=>GATE_T_135_A ); GATE_T_135_I_2: INV port map ( I0=>IPL_D0_2_busQ, O=>GATE_T_135_A ); GATE_T_136_I_1: AND4 port map ( O=>T_136, - I3=>T_366, - I2=>T_367, - I1=>T_368, + I3=>T_367, + I2=>T_368, + I1=>T_369, I0=>GATE_T_136_A ); GATE_T_136_I_2: INV port map ( I0=>IPL_D0_2_busQ, O=>GATE_T_136_A ); GATE_T_137_I_1: AND4 port map ( O=>T_137, - I3=>T_363, - I2=>T_364, - I1=>T_365, + I3=>T_364, + I2=>T_365, + I1=>T_366, I0=>IPL_D0_2_busQ ); GATE_T_138_I_1: AND4 port map ( O=>T_138, - I3=>T_360, - I2=>T_361, - I1=>T_362, + I3=>T_361, + I2=>T_362, + I1=>T_363, I0=>IPL_D0_2_busQ ); GATE_T_139_I_3: AND4 port map ( O=>T_139, I3=>RSTPIN, @@ -2603,28 +2592,28 @@ begin I2=>GATE_T_144_A, I1=>GATE_T_144_B ); GATE_T_145_I_1: AND4 port map ( O=>T_145, - I3=>T_384, - I2=>T_385, - I1=>T_386, + I3=>T_385, + I2=>T_386, + I1=>T_387, I0=>GATE_T_145_A ); GATE_T_145_I_2: INV port map ( I0=>IPL_D0_2_busQ, O=>GATE_T_145_A ); GATE_T_146_I_1: AND4 port map ( O=>T_146, - I3=>T_381, - I2=>T_382, - I1=>T_383, + I3=>T_382, + I2=>T_383, + I1=>T_384, I0=>GATE_T_146_A ); GATE_T_146_I_2: INV port map ( I0=>IPL_D0_2_busQ, O=>GATE_T_146_A ); GATE_T_147_I_1: AND4 port map ( O=>T_147, - I3=>T_378, - I2=>T_379, - I1=>T_380, + I3=>T_379, + I2=>T_380, + I1=>T_381, I0=>IPL_D0_2_busQ ); GATE_T_148_I_1: AND4 port map ( O=>T_148, - I3=>T_375, - I2=>T_376, - I1=>T_377, + I3=>T_376, + I2=>T_377, + I1=>T_378, I0=>IPL_D0_2_busQ ); GATE_T_149_I_3: AND4 port map ( O=>T_149, I3=>RSTPIN, @@ -2703,25 +2692,25 @@ begin I2=>GATE_T_158_A, I1=>GATE_T_158_B ); GATE_T_159_I_1: AND3 port map ( O=>T_159, - I2=>T_391, - I1=>T_392, - I0=>T_390 ); + I2=>T_392, + I1=>T_393, + I0=>T_391 ); GATE_T_160_I_1: AND4 port map ( O=>T_160, - I3=>T_387, - I2=>T_388, - I1=>T_389, + I3=>T_388, + I2=>T_389, + I1=>T_390, I0=>CLK_000_D_0_busQ ); GATE_T_161_I_1: NOR2 port map ( O=>T_161, I1=>VMAQ, I0=>RSTPIN ); GATE_T_162_I_1: AND3 port map ( O=>T_162, - I2=>T_396, + I2=>T_399, I1=>SM_AMIGA_1_busQ, - I0=>T_395 ); + I0=>T_398 ); GATE_T_163_I_1: AND3 port map ( O=>T_163, - I2=>T_394, + I2=>T_397, I1=>SM_AMIGA_1_busQ, - I0=>T_393 ); + I0=>T_396 ); GATE_T_164_I_3: AND4 port map ( O=>T_164, I3=>BERRPIN, I2=>RSTPIN, @@ -2733,331 +2722,329 @@ begin O=>GATE_T_164_A ); GATE_T_165_I_1: AND4 port map ( O=>T_165, I3=>SM_AMIGA_1_busQ, - I2=>CLK_000_D_12_busQ, + I2=>CLK_000_D_8_busQ, I1=>RSTPIN, I0=>GATE_T_165_A ); - GATE_T_165_I_2: INV port map ( I0=>CLK_000_D_11_busQ, + GATE_T_165_I_2: INV port map ( I0=>CLK_000_D_7_busQ, O=>GATE_T_165_A ); GATE_T_166_I_1: AND4 port map ( O=>T_166, + I3=>CLK_000_D_1_busQ, + I2=>RSTPIN, + I1=>SM_AMIGA_1_busQ, + I0=>GATE_T_166_A ); + GATE_T_166_I_2: INV port map ( I0=>CLK_000_D_0_busQ, + O=>GATE_T_166_A ); + GATE_T_167_I_1: AND4 port map ( O=>T_167, I3=>AS_000PIN, I2=>CLK_000_D_0_busQ, I1=>BGACK_000PIN, - I0=>GATE_T_166_A ); - GATE_T_166_I_2: INV port map ( I0=>CLK_000_D_1_busQ, - O=>GATE_T_166_A ); - GATE_T_167_I_1: AND2 port map ( O=>T_167, + I0=>GATE_T_167_A ); + GATE_T_167_I_2: INV port map ( I0=>CLK_000_D_1_busQ, + O=>GATE_T_167_A ); + GATE_T_168_I_1: AND2 port map ( O=>T_168, I1=>BGACK_030Q, I0=>BGACK_000PIN ); - GATE_T_168_I_1: AND3 port map ( O=>T_168, - I2=>T_398, + GATE_T_169_I_1: AND3 port map ( O=>T_169, + I2=>T_401, I1=>CLK_000_D_0_busQ, - I0=>T_397 ); - GATE_T_169_I_1: INV port map ( I0=>BG_000Q, - O=>GATE_T_169_A ); - GATE_T_169_I_2: INV port map ( I0=>BG_030PIN, - O=>GATE_T_169_B ); - GATE_T_169_I_3: AND3 port map ( O=>T_169, - I0=>RSTPIN, - I2=>GATE_T_169_A, - I1=>GATE_T_169_B ); - GATE_T_170_I_1: AND4 port map ( O=>T_170, - I3=>T_401, - I2=>T_402, - I1=>T_403, - I0=>GATE_T_170_A ); - GATE_T_170_I_2: INV port map ( I0=>RWPIN, + I0=>T_400 ); + GATE_T_170_I_1: INV port map ( I0=>BG_000Q, O=>GATE_T_170_A ); - GATE_T_171_I_1: AND3 port map ( O=>T_171, - I2=>T_400, + GATE_T_170_I_2: INV port map ( I0=>BG_030PIN, + O=>GATE_T_170_B ); + GATE_T_170_I_3: AND3 port map ( O=>T_170, + I0=>RSTPIN, + I2=>GATE_T_170_A, + I1=>GATE_T_170_B ); + GATE_T_171_I_1: AND4 port map ( O=>T_171, + I3=>T_404, + I2=>T_405, + I1=>T_406, + I0=>GATE_T_171_A ); + GATE_T_171_I_2: INV port map ( I0=>RWPIN, + O=>GATE_T_171_A ); + GATE_T_172_I_1: AND3 port map ( O=>T_172, + I2=>T_403, I1=>SM_AMIGA_i_7_busQ, - I0=>T_399 ); - GATE_T_172_I_3: AND4 port map ( O=>T_172, + I0=>T_402 ); + GATE_T_173_I_3: AND4 port map ( O=>T_173, I3=>SM_AMIGA_i_7_busQ, I2=>RSTPIN, - I1=>GATE_T_172_B, - I0=>GATE_T_172_A ); - GATE_T_172_I_2: INV port map ( I0=>RW_000Q, - O=>GATE_T_172_B ); - GATE_T_172_I_1: INV port map ( I0=>CLK_000_D_0_busQ, - O=>GATE_T_172_A ); - GATE_T_173_I_1: AND4 port map ( O=>T_173, + I1=>GATE_T_173_B, + I0=>GATE_T_173_A ); + GATE_T_173_I_2: INV port map ( I0=>RW_000Q, + O=>GATE_T_173_B ); + GATE_T_173_I_1: INV port map ( I0=>CLK_000_D_0_busQ, + O=>GATE_T_173_A ); + GATE_T_174_I_1: AND4 port map ( O=>T_174, I3=>CLK_000_D_1_busQ, I2=>RSTPIN, I1=>SM_AMIGA_i_7_busQ, - I0=>GATE_T_173_A ); - GATE_T_173_I_2: INV port map ( I0=>RW_000Q, - O=>GATE_T_173_A ); - GATE_T_174_I_1: AND4 port map ( O=>T_174, - I3=>T_416, - I2=>T_417, - I1=>T_418, I0=>GATE_T_174_A ); - GATE_T_174_I_2: INV port map ( I0=>IPL_D0_2_busQ, + GATE_T_174_I_2: INV port map ( I0=>RW_000Q, O=>GATE_T_174_A ); GATE_T_175_I_1: AND4 port map ( O=>T_175, - I3=>T_413, - I2=>T_414, - I1=>T_415, + I3=>T_419, + I2=>T_420, + I1=>T_421, I0=>GATE_T_175_A ); GATE_T_175_I_2: INV port map ( I0=>IPL_D0_2_busQ, O=>GATE_T_175_A ); GATE_T_176_I_1: AND4 port map ( O=>T_176, - I3=>T_410, - I2=>T_411, - I1=>T_412, + I3=>T_416, + I2=>T_417, + I1=>T_418, I0=>GATE_T_176_A ); GATE_T_176_I_2: INV port map ( I0=>IPL_D0_2_busQ, O=>GATE_T_176_A ); GATE_T_177_I_1: AND4 port map ( O=>T_177, - I3=>T_407, - I2=>T_408, - I1=>T_409, + I3=>T_413, + I2=>T_414, + I1=>T_415, I0=>GATE_T_177_A ); GATE_T_177_I_2: INV port map ( I0=>IPL_D0_2_busQ, O=>GATE_T_177_A ); - GATE_T_178_I_3: AND4 port map ( O=>T_178, - I3=>IPL_1XPIN, - I2=>RSTPIN, - I1=>GATE_T_178_B, + GATE_T_178_I_1: AND4 port map ( O=>T_178, + I3=>T_410, + I2=>T_411, + I1=>T_412, I0=>GATE_T_178_A ); - GATE_T_178_I_2: INV port map ( I0=>IPL_030_2XQ, - O=>GATE_T_178_B ); - GATE_T_178_I_1: INV port map ( I0=>IPL_D0_1_busQ, + GATE_T_178_I_2: INV port map ( I0=>IPL_D0_2_busQ, O=>GATE_T_178_A ); GATE_T_179_I_3: AND4 port map ( O=>T_179, - I3=>IPL_D0_1_busQ, + I3=>IPL_1XPIN, I2=>RSTPIN, I1=>GATE_T_179_B, I0=>GATE_T_179_A ); GATE_T_179_I_2: INV port map ( I0=>IPL_030_2XQ, O=>GATE_T_179_B ); - GATE_T_179_I_1: INV port map ( I0=>IPL_1XPIN, + GATE_T_179_I_1: INV port map ( I0=>IPL_D0_1_busQ, O=>GATE_T_179_A ); GATE_T_180_I_3: AND4 port map ( O=>T_180, - I3=>IPL_0XPIN, + I3=>IPL_D0_1_busQ, I2=>RSTPIN, I1=>GATE_T_180_B, I0=>GATE_T_180_A ); GATE_T_180_I_2: INV port map ( I0=>IPL_030_2XQ, O=>GATE_T_180_B ); - GATE_T_180_I_1: INV port map ( I0=>IPL_D0_0_busQ, + GATE_T_180_I_1: INV port map ( I0=>IPL_1XPIN, O=>GATE_T_180_A ); GATE_T_181_I_3: AND4 port map ( O=>T_181, - I3=>IPL_D0_0_busQ, + I3=>IPL_0XPIN, I2=>RSTPIN, I1=>GATE_T_181_B, I0=>GATE_T_181_A ); GATE_T_181_I_2: INV port map ( I0=>IPL_030_2XQ, O=>GATE_T_181_B ); - GATE_T_181_I_1: INV port map ( I0=>IPL_0XPIN, + GATE_T_181_I_1: INV port map ( I0=>IPL_D0_0_busQ, O=>GATE_T_181_A ); - GATE_T_182_I_1: INV port map ( I0=>IPL_030_2XQ, - O=>GATE_T_182_A ); - GATE_T_182_I_2: INV port map ( I0=>IPL_D0_2_busQ, + GATE_T_182_I_3: AND4 port map ( O=>T_182, + I3=>IPL_D0_0_busQ, + I2=>RSTPIN, + I1=>GATE_T_182_B, + I0=>GATE_T_182_A ); + GATE_T_182_I_2: INV port map ( I0=>IPL_030_2XQ, O=>GATE_T_182_B ); - GATE_T_182_I_3: AND3 port map ( O=>T_182, - I0=>RSTPIN, - I2=>GATE_T_182_A, - I1=>GATE_T_182_B ); + GATE_T_182_I_1: INV port map ( I0=>IPL_0XPIN, + O=>GATE_T_182_A ); GATE_T_183_I_1: INV port map ( I0=>IPL_030_2XQ, O=>GATE_T_183_A ); - GATE_T_183_I_2: INV port map ( I0=>IPL_2XPIN, + GATE_T_183_I_2: INV port map ( I0=>IPL_D0_2_busQ, O=>GATE_T_183_B ); GATE_T_183_I_3: AND3 port map ( O=>T_183, I0=>RSTPIN, I2=>GATE_T_183_A, I1=>GATE_T_183_B ); - GATE_T_184_I_1: AND4 port map ( O=>T_184, - I3=>T_419, - I2=>T_420, - I1=>T_421, - I0=>GATE_T_184_A ); - GATE_T_184_I_2: INV port map ( I0=>AHIGH_31XPIN, + GATE_T_184_I_1: INV port map ( I0=>IPL_030_2XQ, O=>GATE_T_184_A ); - GATE_T_185_I_1: AND2 port map ( O=>T_185, - I1=>inst_AMIGA_BUS_ENABLE_DMA_HIGHQ, + GATE_T_184_I_2: INV port map ( I0=>IPL_2XPIN, + O=>GATE_T_184_B ); + GATE_T_184_I_3: AND3 port map ( O=>T_184, + I0=>RSTPIN, + I2=>GATE_T_184_A, + I1=>GATE_T_184_B ); + GATE_T_185_I_1: AND4 port map ( O=>T_185, + I3=>T_422, + I2=>T_423, + I1=>T_424, I0=>GATE_T_185_A ); - GATE_T_185_I_2: INV port map ( O=>GATE_T_185_A, - I0=>BGACK_030Q ); + GATE_T_185_I_2: INV port map ( I0=>AHIGH_31XPIN, + O=>GATE_T_185_A ); GATE_T_186_I_1: AND2 port map ( O=>T_186, + I1=>inst_AMIGA_BUS_ENABLE_DMA_HIGHQ, + I0=>GATE_T_186_A ); + GATE_T_186_I_2: INV port map ( O=>GATE_T_186_A, + I0=>BGACK_030Q ); + GATE_T_187_I_1: AND2 port map ( O=>T_187, I1=>inst_AS_030_000_SYNCQ, I0=>BGACK_030Q ); - GATE_T_187_I_1: NOR4 port map ( I0=>nEXP_SPACEPIN, + GATE_T_188_I_1: NOR4 port map ( I0=>nEXP_SPACEPIN, I1=>BGACK_030Q, - O=>T_187, + O=>T_188, I2=>AS_000PIN, - I3=>GATE_T_187_DN ); - GATE_T_187_I_2: INV port map ( I0=>RW_000PIN, - O=>GATE_T_187_DN ); - GATE_T_188_I_1: AND2 port map ( O=>T_188, + I3=>GATE_T_188_DN ); + GATE_T_188_I_2: INV port map ( I0=>RW_000PIN, + O=>GATE_T_188_DN ); + GATE_T_189_I_1: AND2 port map ( O=>T_189, I1=>BGACK_030Q, - I0=>GATE_T_188_A ); - GATE_T_188_I_2: INV port map ( O=>GATE_T_188_A, + I0=>GATE_T_189_A ); + GATE_T_189_I_2: INV port map ( O=>GATE_T_189_A, I0=>RW_000PIN ); - GATE_T_189_I_1: INV port map ( I0=>cpu_est_2_busQ, - O=>GATE_T_189_A ); - GATE_T_189_I_2: INV port map ( I0=>cpu_est_1_busQ, - O=>GATE_T_189_B ); - GATE_T_189_I_3: AND3 port map ( O=>T_189, - I0=>cpu_est_3_busQ, - I2=>GATE_T_189_A, - I1=>GATE_T_189_B ); - GATE_T_190_I_1: INV port map ( I0=>cpu_est_3_busQ, + GATE_T_190_I_1: INV port map ( I0=>cpu_est_2_busQ, O=>GATE_T_190_A ); - GATE_T_190_I_2: AND3 port map ( O=>T_190, + GATE_T_190_I_2: INV port map ( I0=>cpu_est_1_busQ, + O=>GATE_T_190_B ); + GATE_T_190_I_3: AND3 port map ( O=>T_190, + I0=>cpu_est_3_busQ, + I2=>GATE_T_190_A, + I1=>GATE_T_190_B ); + GATE_T_191_I_1: INV port map ( I0=>cpu_est_3_busQ, + O=>GATE_T_191_A ); + GATE_T_191_I_2: AND3 port map ( O=>T_191, I2=>cpu_est_1_busQ, I1=>cpu_est_2_busQ, - I0=>GATE_T_190_A ); - GATE_T_191_I_1: OR4 port map ( I0=>T_35, + I0=>GATE_T_191_A ); + GATE_T_192_I_1: OR4 port map ( I0=>T_35, I1=>T_36, - O=>T_191, + O=>T_192, I2=>T_37, I3=>T_38 ); - GATE_T_192_I_1: OR4 port map ( I0=>T_31, + GATE_T_193_I_1: OR4 port map ( I0=>T_31, I1=>T_32, - O=>T_192, + O=>T_193, I2=>T_33, I3=>T_34 ); - GATE_T_193_I_1: OR4 port map ( I0=>T_27, + GATE_T_194_I_1: OR4 port map ( I0=>T_27, I1=>T_28, - O=>T_193, + O=>T_194, I2=>T_29, I3=>T_30 ); - GATE_T_194_I_1: AND2 port map ( O=>T_194, + GATE_T_195_I_1: AND2 port map ( O=>T_195, I1=>SM_AMIGA_6_busQ, I0=>CLK_000_D_0_busQ ); - GATE_T_195_I_1: AND2 port map ( O=>T_195, - I1=>RSTPIN, - I0=>GATE_T_195_A ); - GATE_T_195_I_2: INV port map ( O=>GATE_T_195_A, - I0=>CLK_000_D_1_busQ ); GATE_T_196_I_1: AND2 port map ( O=>T_196, + I1=>RSTPIN, + I0=>GATE_T_196_A ); + GATE_T_196_I_2: INV port map ( O=>GATE_T_196_A, + I0=>CLK_000_D_1_busQ ); + GATE_T_197_I_1: AND2 port map ( O=>T_197, I1=>SM_AMIGA_4_busQ, I0=>CLK_000_D_0_busQ ); - GATE_T_197_I_1: AND2 port map ( O=>T_197, - I1=>RSTPIN, - I0=>GATE_T_197_A ); - GATE_T_197_I_2: INV port map ( O=>GATE_T_197_A, - I0=>CLK_000_D_1_busQ ); GATE_T_198_I_1: AND2 port map ( O=>T_198, - I1=>SM_AMIGA_1_busQ, + I1=>RSTPIN, I0=>GATE_T_198_A ); GATE_T_198_I_2: INV port map ( O=>GATE_T_198_A, - I0=>CLK_000_D_0_busQ ); + I0=>CLK_000_D_1_busQ ); GATE_T_199_I_1: AND2 port map ( O=>T_199, - I1=>CLK_000_D_1_busQ, - I0=>RSTPIN ); - GATE_T_200_I_1: AND2 port map ( O=>T_200, - I1=>SM_AMIGA_5_busQ, - I0=>GATE_T_200_A ); - GATE_T_200_I_2: INV port map ( O=>GATE_T_200_A, + I1=>SM_AMIGA_1_busQ, + I0=>GATE_T_199_A ); + GATE_T_199_I_2: INV port map ( O=>GATE_T_199_A, I0=>CLK_000_D_0_busQ ); - GATE_T_201_I_1: AND2 port map ( O=>T_201, + GATE_T_200_I_1: AND2 port map ( O=>T_200, I1=>CLK_000_D_1_busQ, I0=>RSTPIN ); + GATE_T_201_I_1: AND2 port map ( O=>T_201, + I1=>SM_AMIGA_5_busQ, + I0=>GATE_T_201_A ); + GATE_T_201_I_2: INV port map ( O=>GATE_T_201_A, + I0=>CLK_000_D_0_busQ ); GATE_T_202_I_1: AND2 port map ( O=>T_202, + I1=>CLK_000_D_1_busQ, + I0=>RSTPIN ); + GATE_T_203_I_1: AND2 port map ( O=>T_203, I1=>SM_AMIGA_2_busQ, I0=>CLK_000_D_0_busQ ); - GATE_T_203_I_1: AND2 port map ( O=>T_203, - I1=>RSTPIN, - I0=>GATE_T_203_A ); - GATE_T_203_I_2: INV port map ( O=>GATE_T_203_A, - I0=>CLK_000_D_1_busQ ); GATE_T_204_I_1: AND2 port map ( O=>T_204, - I1=>SM_AMIGA_3_busQ, + I1=>RSTPIN, I0=>GATE_T_204_A ); GATE_T_204_I_2: INV port map ( O=>GATE_T_204_A, - I0=>CLK_000_D_0_busQ ); + I0=>CLK_000_D_1_busQ ); GATE_T_205_I_1: AND2 port map ( O=>T_205, - I1=>CLK_000_D_1_busQ, + I1=>SM_AMIGA_3_busQ, I0=>GATE_T_205_A ); GATE_T_205_I_2: INV port map ( O=>GATE_T_205_A, - I0=>inst_DTACK_D0Q ); + I0=>CLK_000_D_0_busQ ); GATE_T_206_I_1: AND2 port map ( O=>T_206, + I1=>CLK_000_D_1_busQ, + I0=>GATE_T_206_A ); + GATE_T_206_I_2: INV port map ( O=>GATE_T_206_A, + I0=>inst_DTACK_D0Q ); + GATE_T_207_I_1: AND2 port map ( O=>T_207, I1=>inst_VPA_DQ, I0=>RSTPIN ); - GATE_T_207_I_1: NOR3 port map ( O=>T_207, - I2=>SM_AMIGA_3_busQ, - I1=>SM_AMIGA_5_busQ, - I0=>SM_AMIGA_2_busQ ); GATE_T_208_I_1: NOR3 port map ( O=>T_208, - I2=>SM_AMIGA_4_busQ, - I1=>SM_AMIGA_0_busQ, - I0=>SM_AMIGA_1_busQ ); - GATE_T_209_I_1: INV port map ( I0=>SM_AMIGA_6_busQ, - O=>GATE_T_209_A ); - GATE_T_209_I_2: INV port map ( I0=>nEXP_SPACEPIN, - O=>GATE_T_209_B ); - GATE_T_209_I_3: AND3 port map ( O=>T_209, - I0=>RSTPIN, - I2=>GATE_T_209_A, - I1=>GATE_T_209_B ); - GATE_T_210_I_1: NOR3 port map ( O=>T_210, I2=>SM_AMIGA_3_busQ, I1=>SM_AMIGA_5_busQ, I0=>SM_AMIGA_2_busQ ); - GATE_T_211_I_1: NOR3 port map ( O=>T_211, + GATE_T_209_I_1: NOR3 port map ( O=>T_209, I2=>SM_AMIGA_4_busQ, - I1=>SM_AMIGA_0_busQ, + I1=>SM_AMIGA_6_busQ, I0=>SM_AMIGA_1_busQ ); - GATE_T_212_I_1: INV port map ( I0=>SM_AMIGA_6_busQ, - O=>GATE_T_212_A ); - GATE_T_212_I_2: AND3 port map ( O=>T_212, - I2=>inst_AS_030_000_SYNCQ, - I1=>RSTPIN, - I0=>GATE_T_212_A ); - GATE_T_213_I_1: NOR3 port map ( O=>T_213, - I2=>SM_AMIGA_3_busQ, - I1=>SM_AMIGA_5_busQ, - I0=>SM_AMIGA_2_busQ ); - GATE_T_214_I_1: NOR3 port map ( O=>T_214, - I2=>SM_AMIGA_4_busQ, - I1=>SM_AMIGA_0_busQ, - I0=>SM_AMIGA_1_busQ ); - GATE_T_215_I_1: INV port map ( I0=>SM_AMIGA_6_busQ, - O=>GATE_T_215_A ); - GATE_T_215_I_2: AND3 port map ( O=>T_215, - I2=>CLK_000_D_1_busQ, - I1=>RSTPIN, - I0=>GATE_T_215_A ); - GATE_T_216_I_1: NOR3 port map ( O=>T_216, - I2=>SM_AMIGA_3_busQ, - I1=>SM_AMIGA_5_busQ, - I0=>SM_AMIGA_2_busQ ); - GATE_T_217_I_1: NOR3 port map ( O=>T_217, - I2=>SM_AMIGA_4_busQ, - I1=>SM_AMIGA_0_busQ, - I0=>SM_AMIGA_1_busQ ); - GATE_T_218_I_1: INV port map ( I0=>SM_AMIGA_6_busQ, - O=>GATE_T_218_A ); - GATE_T_218_I_2: INV port map ( I0=>CLK_000_D_2_busQ, - O=>GATE_T_218_B ); - GATE_T_218_I_3: AND3 port map ( O=>T_218, - I0=>RSTPIN, - I2=>GATE_T_218_A, - I1=>GATE_T_218_B ); - GATE_T_219_I_1: AND2 port map ( O=>T_219, - I1=>BERRPIN, - I0=>GATE_T_219_A ); - GATE_T_219_I_2: INV port map ( O=>GATE_T_219_A, - I0=>SM_AMIGA_2_busQ ); - GATE_T_220_I_1: NOR3 port map ( O=>T_220, - I2=>SM_AMIGA_5_busQ, - I1=>SM_AMIGA_1_busQ, - I0=>SM_AMIGA_3_busQ ); - GATE_T_221_I_1: INV port map ( I0=>SM_AMIGA_4_busQ, - O=>GATE_T_221_A ); - GATE_T_221_I_2: INV port map ( I0=>SM_AMIGA_6_busQ, - O=>GATE_T_221_B ); - GATE_T_221_I_3: AND3 port map ( O=>T_221, - I0=>SM_AMIGA_0_busQ, - I2=>GATE_T_221_A, - I1=>GATE_T_221_B ); - GATE_T_222_I_1: INV port map ( I0=>CLK_000_D_1_busQ, - O=>GATE_T_222_A ); - GATE_T_222_I_2: AND3 port map ( O=>T_222, + GATE_T_210_I_1: INV port map ( I0=>CLK_000_D_1_busQ, + O=>GATE_T_210_A ); + GATE_T_210_I_2: AND3 port map ( O=>T_210, I2=>RSTPIN, I1=>CLK_000_D_0_busQ, + I0=>GATE_T_210_A ); + GATE_T_211_I_1: NOR3 port map ( O=>T_211, + I2=>SM_AMIGA_3_busQ, + I1=>SM_AMIGA_5_busQ, + I0=>SM_AMIGA_2_busQ ); + GATE_T_212_I_1: NOR3 port map ( O=>T_212, + I2=>SM_AMIGA_4_busQ, + I1=>SM_AMIGA_0_busQ, + I0=>SM_AMIGA_1_busQ ); + GATE_T_213_I_1: INV port map ( I0=>SM_AMIGA_6_busQ, + O=>GATE_T_213_A ); + GATE_T_213_I_2: INV port map ( I0=>nEXP_SPACEPIN, + O=>GATE_T_213_B ); + GATE_T_213_I_3: AND3 port map ( O=>T_213, + I0=>RSTPIN, + I2=>GATE_T_213_A, + I1=>GATE_T_213_B ); + GATE_T_214_I_1: NOR3 port map ( O=>T_214, + I2=>SM_AMIGA_3_busQ, + I1=>SM_AMIGA_5_busQ, + I0=>SM_AMIGA_2_busQ ); + GATE_T_215_I_1: NOR3 port map ( O=>T_215, + I2=>SM_AMIGA_4_busQ, + I1=>SM_AMIGA_0_busQ, + I0=>SM_AMIGA_1_busQ ); + GATE_T_216_I_1: INV port map ( I0=>SM_AMIGA_6_busQ, + O=>GATE_T_216_A ); + GATE_T_216_I_2: AND3 port map ( O=>T_216, + I2=>inst_AS_030_000_SYNCQ, + I1=>RSTPIN, + I0=>GATE_T_216_A ); + GATE_T_217_I_1: NOR3 port map ( O=>T_217, + I2=>SM_AMIGA_3_busQ, + I1=>SM_AMIGA_5_busQ, + I0=>SM_AMIGA_2_busQ ); + GATE_T_218_I_1: NOR3 port map ( O=>T_218, + I2=>SM_AMIGA_4_busQ, + I1=>SM_AMIGA_0_busQ, + I0=>SM_AMIGA_1_busQ ); + GATE_T_219_I_1: INV port map ( I0=>SM_AMIGA_6_busQ, + O=>GATE_T_219_A ); + GATE_T_219_I_2: INV port map ( I0=>CLK_000_D_1_busQ, + O=>GATE_T_219_B ); + GATE_T_219_I_3: AND3 port map ( O=>T_219, + I0=>RSTPIN, + I2=>GATE_T_219_A, + I1=>GATE_T_219_B ); + GATE_T_220_I_1: NOR3 port map ( O=>T_220, + I2=>SM_AMIGA_3_busQ, + I1=>SM_AMIGA_5_busQ, + I0=>SM_AMIGA_2_busQ ); + GATE_T_221_I_1: NOR3 port map ( O=>T_221, + I2=>SM_AMIGA_4_busQ, + I1=>SM_AMIGA_0_busQ, + I0=>SM_AMIGA_1_busQ ); + GATE_T_222_I_1: INV port map ( I0=>SM_AMIGA_6_busQ, + O=>GATE_T_222_A ); + GATE_T_222_I_2: AND3 port map ( O=>T_222, + I2=>CLK_000_D_0_busQ, + I1=>RSTPIN, I0=>GATE_T_222_A ); GATE_T_223_I_1: AND2 port map ( O=>T_223, I1=>SM_AMIGA_3_busQ, @@ -3082,846 +3069,837 @@ begin I2=>RSTPIN, I1=>cpu_est_3_busQ, I0=>GATE_T_226_A ); - GATE_T_227_I_14: NOR4 port map ( O=>T_227, - I3=>SM_AMIGA_2_busQ, - I2=>SM_AMIGA_3_busQ, - I1=>SM_AMIGA_5_busQ, - I0=>SM_AMIGA_1_busQ ); - GATE_T_228_I_1: NOR4 port map ( I0=>SM_AMIGA_0_busQ, - I1=>SM_AMIGA_4_busQ, - O=>T_228, - I2=>SM_AMIGA_6_busQ, - I3=>GATE_T_228_DN ); - GATE_T_228_I_2: INV port map ( I0=>CLK_000_D_2_busQ, - O=>GATE_T_228_DN ); - GATE_T_229_I_3: AND4 port map ( O=>T_229, - I3=>RSTPIN, - I2=>nEXP_SPACEPIN, - I1=>GATE_T_229_B, - I0=>GATE_T_229_A ); - GATE_T_229_I_2: INV port map ( I0=>CLK_000_D_1_busQ, - O=>GATE_T_229_B ); - GATE_T_229_I_1: INV port map ( I0=>inst_AS_030_000_SYNCQ, + GATE_T_227_I_1: NOR2 port map ( O=>T_227, + I1=>BERRPIN, + I0=>SM_AMIGA_2_busQ ); + GATE_T_228_I_1: NOR3 port map ( O=>T_228, + I2=>SM_AMIGA_4_busQ, + I1=>SM_AMIGA_0_busQ, + I0=>SM_AMIGA_3_busQ ); + GATE_T_229_I_1: INV port map ( I0=>SM_AMIGA_6_busQ, O=>GATE_T_229_A ); - GATE_T_230_I_1: AND2 port map ( O=>T_230, - I1=>SM_AMIGA_4_busQ, - I0=>CLK_000_D_0_busQ ); + GATE_T_229_I_2: INV port map ( I0=>CLK_000_D_0_busQ, + O=>GATE_T_229_B ); + GATE_T_229_I_3: AND3 port map ( O=>T_229, + I0=>CLK_000_D_1_busQ, + I2=>GATE_T_229_A, + I1=>GATE_T_229_B ); + GATE_T_230_I_1: INV port map ( I0=>inst_AS_030_000_SYNCQ, + O=>GATE_T_230_A ); + GATE_T_230_I_2: AND3 port map ( O=>T_230, + I2=>RSTPIN, + I1=>nEXP_SPACEPIN, + I0=>GATE_T_230_A ); GATE_T_231_I_1: AND2 port map ( O=>T_231, - I1=>RSTPIN, - I0=>GATE_T_231_A ); - GATE_T_231_I_2: INV port map ( O=>GATE_T_231_A, - I0=>CLK_000_D_1_busQ ); - GATE_T_232_I_1: AND2 port map ( O=>T_232, I1=>SM_AMIGA_4_busQ, I0=>CLK_000_D_0_busQ ); - GATE_T_233_I_1: AND2 port map ( O=>T_233, + GATE_T_232_I_1: AND2 port map ( O=>T_232, I1=>RSTPIN, - I0=>GATE_T_233_A ); - GATE_T_233_I_2: INV port map ( O=>GATE_T_233_A, + I0=>GATE_T_232_A ); + GATE_T_232_I_2: INV port map ( O=>GATE_T_232_A, I0=>CLK_000_D_1_busQ ); + GATE_T_233_I_1: AND2 port map ( O=>T_233, + I1=>SM_AMIGA_4_busQ, + I0=>CLK_000_D_0_busQ ); GATE_T_234_I_1: AND2 port map ( O=>T_234, - I1=>SM_AMIGA_3_busQ, + I1=>RSTPIN, I0=>GATE_T_234_A ); GATE_T_234_I_2: INV port map ( O=>GATE_T_234_A, - I0=>CLK_000_D_0_busQ ); + I0=>CLK_000_D_1_busQ ); GATE_T_235_I_1: AND2 port map ( O=>T_235, - I1=>CLK_000_D_1_busQ, + I1=>SM_AMIGA_3_busQ, I0=>GATE_T_235_A ); GATE_T_235_I_2: INV port map ( O=>GATE_T_235_A, - I0=>inst_DTACK_D0Q ); + I0=>CLK_000_D_0_busQ ); GATE_T_236_I_1: AND2 port map ( O=>T_236, + I1=>CLK_000_D_1_busQ, + I0=>GATE_T_236_A ); + GATE_T_236_I_2: INV port map ( O=>GATE_T_236_A, + I0=>inst_DTACK_D0Q ); + GATE_T_237_I_1: AND2 port map ( O=>T_237, I1=>inst_VPA_DQ, I0=>RSTPIN ); - GATE_T_237_I_1: AND2 port map ( O=>T_237, + GATE_T_238_I_1: AND2 port map ( O=>T_238, I1=>BERRPIN, I0=>SM_AMIGA_3_busQ ); - GATE_T_238_I_1: INV port map ( I0=>CLK_000_D_0_busQ, - O=>GATE_T_238_A ); - GATE_T_238_I_2: INV port map ( I0=>inst_VPA_DQ, - O=>GATE_T_238_B ); - GATE_T_238_I_3: AND3 port map ( O=>T_238, + GATE_T_239_I_1: INV port map ( I0=>CLK_000_D_0_busQ, + O=>GATE_T_239_A ); + GATE_T_239_I_2: INV port map ( I0=>inst_VPA_DQ, + O=>GATE_T_239_B ); + GATE_T_239_I_3: AND3 port map ( O=>T_239, I0=>CLK_000_D_1_busQ, - I2=>GATE_T_238_A, - I1=>GATE_T_238_B ); - GATE_T_239_I_1: NOR3 port map ( O=>T_239, + I2=>GATE_T_239_A, + I1=>GATE_T_239_B ); + GATE_T_240_I_1: NOR3 port map ( O=>T_240, I2=>cpu_est_1_busQ, I1=>cpu_est_0_busQ, I0=>cpu_est_2_busQ ); - GATE_T_240_I_1: INV port map ( I0=>VMAQ, - O=>GATE_T_240_A ); - GATE_T_240_I_2: AND3 port map ( O=>T_240, + GATE_T_241_I_1: INV port map ( I0=>VMAQ, + O=>GATE_T_241_A ); + GATE_T_241_I_2: AND3 port map ( O=>T_241, I2=>RSTPIN, I1=>cpu_est_3_busQ, - I0=>GATE_T_240_A ); - GATE_T_241_I_1: AND2 port map ( O=>T_241, - I1=>RST_DLY_0_busQ, I0=>GATE_T_241_A ); - GATE_T_241_I_2: INV port map ( O=>GATE_T_241_A, - I0=>CLK_000_D_0_busQ ); GATE_T_242_I_1: AND2 port map ( O=>T_242, - I1=>CLK_000_D_1_busQ, - I0=>RSTPIN ); - GATE_T_243_I_1: AND2 port map ( O=>T_243, I1=>RST_DLY_0_busQ, - I0=>GATE_T_243_A ); - GATE_T_243_I_2: INV port map ( O=>GATE_T_243_A, + I0=>GATE_T_242_A ); + GATE_T_242_I_2: INV port map ( O=>GATE_T_242_A, I0=>CLK_000_D_0_busQ ); - GATE_T_244_I_1: AND2 port map ( O=>T_244, + GATE_T_243_I_1: AND2 port map ( O=>T_243, I1=>CLK_000_D_1_busQ, I0=>RSTPIN ); - GATE_T_245_I_1: AND2 port map ( O=>T_245, - I1=>SM_AMIGA_3_busQ, - I0=>GATE_T_245_A ); - GATE_T_245_I_2: INV port map ( O=>GATE_T_245_A, + GATE_T_244_I_1: AND2 port map ( O=>T_244, + I1=>RST_DLY_0_busQ, + I0=>GATE_T_244_A ); + GATE_T_244_I_2: INV port map ( O=>GATE_T_244_A, I0=>CLK_000_D_0_busQ ); - GATE_T_246_I_1: AND2 port map ( O=>T_246, + GATE_T_245_I_1: AND2 port map ( O=>T_245, I1=>CLK_000_D_1_busQ, + I0=>RSTPIN ); + GATE_T_246_I_1: AND2 port map ( O=>T_246, + I1=>SM_AMIGA_3_busQ, I0=>GATE_T_246_A ); GATE_T_246_I_2: INV port map ( O=>GATE_T_246_A, - I0=>inst_DTACK_D0Q ); + I0=>CLK_000_D_0_busQ ); GATE_T_247_I_1: AND2 port map ( O=>T_247, + I1=>CLK_000_D_1_busQ, + I0=>GATE_T_247_A ); + GATE_T_247_I_2: INV port map ( O=>GATE_T_247_A, + I0=>inst_DTACK_D0Q ); + GATE_T_248_I_1: AND2 port map ( O=>T_248, I1=>inst_VPA_DQ, I0=>RSTPIN ); - GATE_T_248_I_1: INV port map ( I0=>CLK_000_D_0_busQ, - O=>GATE_T_248_A ); - GATE_T_248_I_2: INV port map ( I0=>inst_VPA_DQ, - O=>GATE_T_248_B ); - GATE_T_248_I_3: AND3 port map ( O=>T_248, + GATE_T_249_I_1: INV port map ( I0=>CLK_000_D_0_busQ, + O=>GATE_T_249_A ); + GATE_T_249_I_2: INV port map ( I0=>inst_VPA_DQ, + O=>GATE_T_249_B ); + GATE_T_249_I_3: AND3 port map ( O=>T_249, I0=>CLK_000_D_1_busQ, - I2=>GATE_T_248_A, - I1=>GATE_T_248_B ); - GATE_T_249_I_1: NOR3 port map ( O=>T_249, + I2=>GATE_T_249_A, + I1=>GATE_T_249_B ); + GATE_T_250_I_1: NOR3 port map ( O=>T_250, I2=>cpu_est_1_busQ, I1=>cpu_est_0_busQ, I0=>cpu_est_2_busQ ); - GATE_T_250_I_1: INV port map ( I0=>VMAQ, - O=>GATE_T_250_A ); - GATE_T_250_I_2: AND3 port map ( O=>T_250, + GATE_T_251_I_1: INV port map ( I0=>VMAQ, + O=>GATE_T_251_A ); + GATE_T_251_I_2: AND3 port map ( O=>T_251, I2=>RSTPIN, I1=>cpu_est_3_busQ, - I0=>GATE_T_250_A ); - GATE_T_251_I_1: OR2 port map ( O=>T_251, + I0=>GATE_T_251_A ); + GATE_T_252_I_1: OR2 port map ( O=>T_252, I1=>T_63, I0=>T_62 ); - GATE_T_252_I_1: OR2 port map ( O=>T_252, + GATE_T_253_I_1: OR2 port map ( O=>T_253, I1=>T_61, I0=>T_60 ); - GATE_T_253_I_1: OR2 port map ( O=>T_253, + GATE_T_254_I_1: OR2 port map ( O=>T_254, I1=>T_59, I0=>T_58 ); - GATE_T_254_I_1: OR2 port map ( O=>T_254, + GATE_T_255_I_1: OR2 port map ( O=>T_255, I1=>T_57, I0=>T_56 ); - GATE_T_255_I_1: AND2 port map ( O=>T_255, - I1=>inst_CLK_030_HQ, - I0=>GATE_T_255_A ); - GATE_T_255_I_2: INV port map ( O=>GATE_T_255_A, - I0=>AS_000PIN ); GATE_T_256_I_1: AND2 port map ( O=>T_256, - I1=>CYCLE_DMA_1_busQ, + I1=>inst_CLK_030_HQ, I0=>GATE_T_256_A ); GATE_T_256_I_2: INV port map ( O=>GATE_T_256_A, - I0=>CYCLE_DMA_0_busQ ); + I0=>AS_000PIN ); GATE_T_257_I_1: AND2 port map ( O=>T_257, - I1=>RSTPIN, + I1=>CYCLE_DMA_1_busQ, I0=>GATE_T_257_A ); GATE_T_257_I_2: INV port map ( O=>GATE_T_257_A, - I0=>BGACK_030Q ); + I0=>CYCLE_DMA_0_busQ ); GATE_T_258_I_1: AND2 port map ( O=>T_258, - I1=>inst_CLK_030_HQ, + I1=>RSTPIN, I0=>GATE_T_258_A ); GATE_T_258_I_2: INV port map ( O=>GATE_T_258_A, - I0=>AS_000PIN ); + I0=>BGACK_030Q ); GATE_T_259_I_1: AND2 port map ( O=>T_259, - I1=>CYCLE_DMA_0_busQ, + I1=>inst_CLK_030_HQ, I0=>GATE_T_259_A ); GATE_T_259_I_2: INV port map ( O=>GATE_T_259_A, - I0=>CYCLE_DMA_1_busQ ); + I0=>AS_000PIN ); GATE_T_260_I_1: AND2 port map ( O=>T_260, - I1=>RSTPIN, + I1=>CYCLE_DMA_0_busQ, I0=>GATE_T_260_A ); GATE_T_260_I_2: INV port map ( O=>GATE_T_260_A, - I0=>BGACK_030Q ); + I0=>CYCLE_DMA_1_busQ ); GATE_T_261_I_1: AND2 port map ( O=>T_261, - I1=>inst_CLK_030_HQ, + I1=>RSTPIN, I0=>GATE_T_261_A ); GATE_T_261_I_2: INV port map ( O=>GATE_T_261_A, - I0=>AS_000PIN ); + I0=>BGACK_030Q ); GATE_T_262_I_1: AND2 port map ( O=>T_262, - I1=>CYCLE_DMA_1_busQ, + I1=>inst_CLK_030_HQ, I0=>GATE_T_262_A ); GATE_T_262_I_2: INV port map ( O=>GATE_T_262_A, - I0=>CYCLE_DMA_0_busQ ); + I0=>AS_000PIN ); GATE_T_263_I_1: AND2 port map ( O=>T_263, - I1=>RSTPIN, + I1=>CYCLE_DMA_1_busQ, I0=>GATE_T_263_A ); GATE_T_263_I_2: INV port map ( O=>GATE_T_263_A, - I0=>BGACK_030Q ); + I0=>CYCLE_DMA_0_busQ ); GATE_T_264_I_1: AND2 port map ( O=>T_264, - I1=>inst_CLK_030_HQ, + I1=>RSTPIN, I0=>GATE_T_264_A ); GATE_T_264_I_2: INV port map ( O=>GATE_T_264_A, - I0=>AS_000PIN ); + I0=>BGACK_030Q ); GATE_T_265_I_1: AND2 port map ( O=>T_265, - I1=>CYCLE_DMA_0_busQ, + I1=>inst_CLK_030_HQ, I0=>GATE_T_265_A ); GATE_T_265_I_2: INV port map ( O=>GATE_T_265_A, - I0=>CYCLE_DMA_1_busQ ); + I0=>AS_000PIN ); GATE_T_266_I_1: AND2 port map ( O=>T_266, - I1=>RSTPIN, + I1=>CYCLE_DMA_0_busQ, I0=>GATE_T_266_A ); GATE_T_266_I_2: INV port map ( O=>GATE_T_266_A, + I0=>CYCLE_DMA_1_busQ ); + GATE_T_267_I_1: AND2 port map ( O=>T_267, + I1=>RSTPIN, + I0=>GATE_T_267_A ); + GATE_T_267_I_2: INV port map ( O=>GATE_T_267_A, I0=>BGACK_030Q ); - GATE_T_267_I_1: NOR2 port map ( O=>T_267, + GATE_T_268_I_1: NOR2 port map ( O=>T_268, I1=>UDS_000PIN, I0=>AS_000PIN ); - GATE_T_268_I_1: AND2 port map ( O=>T_268, + GATE_T_269_I_1: AND2 port map ( O=>T_269, I1=>CYCLE_DMA_1_busQ, - I0=>GATE_T_268_A ); - GATE_T_268_I_2: INV port map ( O=>GATE_T_268_A, + I0=>GATE_T_269_A ); + GATE_T_269_I_2: INV port map ( O=>GATE_T_269_A, I0=>CYCLE_DMA_0_busQ ); - GATE_T_269_I_1: NOR2 port map ( O=>T_269, + GATE_T_270_I_1: NOR2 port map ( O=>T_270, I1=>inst_AS_000_DMAQ, I0=>BGACK_030Q ); - GATE_T_270_I_1: AND2 port map ( O=>T_270, + GATE_T_271_I_1: AND2 port map ( O=>T_271, I1=>RSTPIN, - I0=>GATE_T_270_A ); - GATE_T_270_I_2: INV port map ( O=>GATE_T_270_A, + I0=>GATE_T_271_A ); + GATE_T_271_I_2: INV port map ( O=>GATE_T_271_A, I0=>CLK_030PIN ); - GATE_T_271_I_1: NOR2 port map ( O=>T_271, + GATE_T_272_I_1: NOR2 port map ( O=>T_272, I1=>UDS_000PIN, I0=>AS_000PIN ); - GATE_T_272_I_1: AND2 port map ( O=>T_272, + GATE_T_273_I_1: AND2 port map ( O=>T_273, I1=>CYCLE_DMA_0_busQ, - I0=>GATE_T_272_A ); - GATE_T_272_I_2: INV port map ( O=>GATE_T_272_A, + I0=>GATE_T_273_A ); + GATE_T_273_I_2: INV port map ( O=>GATE_T_273_A, I0=>CYCLE_DMA_1_busQ ); - GATE_T_273_I_1: NOR2 port map ( O=>T_273, + GATE_T_274_I_1: NOR2 port map ( O=>T_274, I1=>inst_AS_000_DMAQ, I0=>BGACK_030Q ); - GATE_T_274_I_1: AND2 port map ( O=>T_274, + GATE_T_275_I_1: AND2 port map ( O=>T_275, I1=>RSTPIN, - I0=>GATE_T_274_A ); - GATE_T_274_I_2: INV port map ( O=>GATE_T_274_A, + I0=>GATE_T_275_A ); + GATE_T_275_I_2: INV port map ( O=>GATE_T_275_A, I0=>CLK_030PIN ); - GATE_T_275_I_1: NOR2 port map ( O=>T_275, + GATE_T_276_I_1: NOR2 port map ( O=>T_276, I1=>LDS_000PIN, I0=>AS_000PIN ); - GATE_T_276_I_1: AND2 port map ( O=>T_276, + GATE_T_277_I_1: AND2 port map ( O=>T_277, I1=>CYCLE_DMA_1_busQ, - I0=>GATE_T_276_A ); - GATE_T_276_I_2: INV port map ( O=>GATE_T_276_A, + I0=>GATE_T_277_A ); + GATE_T_277_I_2: INV port map ( O=>GATE_T_277_A, I0=>CYCLE_DMA_0_busQ ); - GATE_T_277_I_1: NOR2 port map ( O=>T_277, + GATE_T_278_I_1: NOR2 port map ( O=>T_278, I1=>inst_AS_000_DMAQ, I0=>BGACK_030Q ); - GATE_T_278_I_1: AND2 port map ( O=>T_278, + GATE_T_279_I_1: AND2 port map ( O=>T_279, I1=>RSTPIN, - I0=>GATE_T_278_A ); - GATE_T_278_I_2: INV port map ( O=>GATE_T_278_A, + I0=>GATE_T_279_A ); + GATE_T_279_I_2: INV port map ( O=>GATE_T_279_A, I0=>CLK_030PIN ); - GATE_T_279_I_1: NOR2 port map ( O=>T_279, + GATE_T_280_I_1: NOR2 port map ( O=>T_280, I1=>LDS_000PIN, I0=>AS_000PIN ); - GATE_T_280_I_1: AND2 port map ( O=>T_280, + GATE_T_281_I_1: AND2 port map ( O=>T_281, I1=>CYCLE_DMA_0_busQ, - I0=>GATE_T_280_A ); - GATE_T_280_I_2: INV port map ( O=>GATE_T_280_A, + I0=>GATE_T_281_A ); + GATE_T_281_I_2: INV port map ( O=>GATE_T_281_A, I0=>CYCLE_DMA_1_busQ ); - GATE_T_281_I_1: NOR2 port map ( O=>T_281, + GATE_T_282_I_1: NOR2 port map ( O=>T_282, I1=>inst_AS_000_DMAQ, I0=>BGACK_030Q ); - GATE_T_282_I_1: AND2 port map ( O=>T_282, - I1=>RSTPIN, - I0=>GATE_T_282_A ); - GATE_T_282_I_2: INV port map ( O=>GATE_T_282_A, - I0=>CLK_030PIN ); GATE_T_283_I_1: AND2 port map ( O=>T_283, - I1=>RST_DLY_0_busQ, + I1=>RSTPIN, I0=>GATE_T_283_A ); GATE_T_283_I_2: INV port map ( O=>GATE_T_283_A, - I0=>CLK_000_D_0_busQ ); + I0=>CLK_030PIN ); GATE_T_284_I_1: AND2 port map ( O=>T_284, - I1=>CLK_000_D_1_busQ, - I0=>RSTPIN ); - GATE_T_285_I_1: AND2 port map ( O=>T_285, - I1=>SM_AMIGA_i_7_busQ, - I0=>SM_AMIGA_6_busQ ); - GATE_T_286_I_1: AND2 port map ( O=>T_286, - I1=>CLK_000_D_1_busQ, - I0=>RSTPIN ); - GATE_T_287_I_1: AND2 port map ( O=>T_287, - I1=>SM_AMIGA_i_7_busQ, - I0=>SM_AMIGA_6_busQ ); - GATE_T_288_I_1: AND2 port map ( O=>T_288, - I1=>RSTPIN, - I0=>GATE_T_288_A ); - GATE_T_288_I_2: INV port map ( O=>GATE_T_288_A, + I1=>RST_DLY_0_busQ, + I0=>GATE_T_284_A ); + GATE_T_284_I_2: INV port map ( O=>GATE_T_284_A, I0=>CLK_000_D_0_busQ ); + GATE_T_285_I_1: AND2 port map ( O=>T_285, + I1=>CLK_000_D_1_busQ, + I0=>RSTPIN ); + GATE_T_286_I_1: AND2 port map ( O=>T_286, + I1=>SM_AMIGA_i_7_busQ, + I0=>SM_AMIGA_6_busQ ); + GATE_T_287_I_1: AND2 port map ( O=>T_287, + I1=>CLK_000_D_1_busQ, + I0=>RSTPIN ); + GATE_T_288_I_1: AND2 port map ( O=>T_288, + I1=>SM_AMIGA_i_7_busQ, + I0=>SM_AMIGA_6_busQ ); GATE_T_289_I_1: AND2 port map ( O=>T_289, - I1=>CLK_000_D_2_busQ, + I1=>RSTPIN, I0=>GATE_T_289_A ); GATE_T_289_I_2: INV port map ( O=>GATE_T_289_A, - I0=>SM_AMIGA_i_7_busQ ); + I0=>CLK_000_D_0_busQ ); GATE_T_290_I_1: NOR2 port map ( O=>T_290, - I1=>CLK_000_D_1_busQ, - I0=>inst_AS_030_000_SYNCQ ); + I1=>SM_AMIGA_i_7_busQ, + I0=>CLK_000_D_0_busQ ); GATE_T_291_I_1: AND2 port map ( O=>T_291, + I1=>CLK_000_D_1_busQ, + I0=>GATE_T_291_A ); + GATE_T_291_I_2: INV port map ( O=>GATE_T_291_A, + I0=>inst_AS_030_000_SYNCQ ); + GATE_T_292_I_1: AND2 port map ( O=>T_292, I1=>RSTPIN, I0=>nEXP_SPACEPIN ); - GATE_T_292_I_1: AND2 port map ( O=>T_292, + GATE_T_293_I_1: AND2 port map ( O=>T_293, I1=>SM_AMIGA_i_7_busQ, - I0=>GATE_T_292_A ); - GATE_T_292_I_2: INV port map ( O=>GATE_T_292_A, + I0=>GATE_T_293_A ); + GATE_T_293_I_2: INV port map ( O=>GATE_T_293_A, I0=>SM_AMIGA_5_busQ ); - GATE_T_293_I_1: NOR2 port map ( O=>T_293, + GATE_T_294_I_1: NOR2 port map ( O=>T_294, I1=>SM_AMIGA_4_busQ, I0=>SM_AMIGA_0_busQ ); - GATE_T_294_I_1: AND2 port map ( O=>T_294, + GATE_T_295_I_1: AND2 port map ( O=>T_295, I1=>RSTPIN, - I0=>GATE_T_294_A ); - GATE_T_294_I_2: INV port map ( O=>GATE_T_294_A, + I0=>GATE_T_295_A ); + GATE_T_295_I_2: INV port map ( O=>GATE_T_295_A, I0=>SM_AMIGA_6_busQ ); - GATE_T_295_I_1: NOR2 port map ( O=>T_295, + GATE_T_296_I_1: NOR2 port map ( O=>T_296, I1=>SM_AMIGA_5_busQ, I0=>SM_AMIGA_0_busQ ); - GATE_T_296_I_1: AND2 port map ( O=>T_296, - I1=>CLK_000_D_0_busQ, - I0=>GATE_T_296_A ); - GATE_T_296_I_2: INV port map ( O=>GATE_T_296_A, - I0=>SM_AMIGA_6_busQ ); GATE_T_297_I_1: AND2 port map ( O=>T_297, - I1=>RSTPIN, + I1=>CLK_000_D_0_busQ, I0=>GATE_T_297_A ); GATE_T_297_I_2: INV port map ( O=>GATE_T_297_A, - I0=>CLK_000_D_1_busQ ); + I0=>SM_AMIGA_6_busQ ); GATE_T_298_I_1: AND2 port map ( O=>T_298, - I1=>SM_AMIGA_i_7_busQ, + I1=>RSTPIN, I0=>GATE_T_298_A ); GATE_T_298_I_2: INV port map ( O=>GATE_T_298_A, - I0=>SM_AMIGA_5_busQ ); + I0=>CLK_000_D_1_busQ ); GATE_T_299_I_1: AND2 port map ( O=>T_299, - I1=>CLK_000_D_0_busQ, + I1=>SM_AMIGA_i_7_busQ, I0=>GATE_T_299_A ); GATE_T_299_I_2: INV port map ( O=>GATE_T_299_A, - I0=>SM_AMIGA_0_busQ ); + I0=>SM_AMIGA_5_busQ ); GATE_T_300_I_1: AND2 port map ( O=>T_300, - I1=>RSTPIN, + I1=>CLK_000_D_0_busQ, I0=>GATE_T_300_A ); GATE_T_300_I_2: INV port map ( O=>GATE_T_300_A, - I0=>CLK_000_D_1_busQ ); + I0=>SM_AMIGA_0_busQ ); GATE_T_301_I_1: AND2 port map ( O=>T_301, + I1=>RSTPIN, + I0=>GATE_T_301_A ); + GATE_T_301_I_2: INV port map ( O=>GATE_T_301_A, + I0=>CLK_000_D_1_busQ ); + GATE_T_302_I_1: AND2 port map ( O=>T_302, I1=>RST_DLY_2_busQ, I0=>RST_DLY_1_busQ ); - GATE_T_302_I_1: AND2 port map ( O=>T_302, - I1=>RST_DLY_0_busQ, - I0=>GATE_T_302_A ); - GATE_T_302_I_2: INV port map ( O=>GATE_T_302_A, - I0=>CLK_000_D_0_busQ ); GATE_T_303_I_1: AND2 port map ( O=>T_303, + I1=>RST_DLY_0_busQ, + I0=>GATE_T_303_A ); + GATE_T_303_I_2: INV port map ( O=>GATE_T_303_A, + I0=>CLK_000_D_0_busQ ); + GATE_T_304_I_1: AND2 port map ( O=>T_304, I1=>CLK_000_D_1_busQ, I0=>RSTPIN ); - GATE_T_304_I_1: AND2 port map ( O=>T_304, - I1=>CYCLE_DMA_1_busQ, - I0=>GATE_T_304_A ); - GATE_T_304_I_2: INV port map ( O=>GATE_T_304_A, - I0=>CYCLE_DMA_0_busQ ); GATE_T_305_I_1: AND2 port map ( O=>T_305, - I1=>RSTPIN, + I1=>CYCLE_DMA_1_busQ, I0=>GATE_T_305_A ); GATE_T_305_I_2: INV port map ( O=>GATE_T_305_A, - I0=>BGACK_030Q ); + I0=>CYCLE_DMA_0_busQ ); GATE_T_306_I_1: AND2 port map ( O=>T_306, + I1=>RSTPIN, + I0=>GATE_T_306_A ); + GATE_T_306_I_2: INV port map ( O=>GATE_T_306_A, + I0=>BGACK_030Q ); + GATE_T_307_I_1: AND2 port map ( O=>T_307, I1=>CLK_000_D_1_busQ, I0=>CYCLE_DMA_1_busQ ); - GATE_T_307_I_1: AND2 port map ( O=>T_307, - I1=>RSTPIN, - I0=>GATE_T_307_A ); - GATE_T_307_I_2: INV port map ( O=>GATE_T_307_A, - I0=>BGACK_030Q ); GATE_T_308_I_1: AND2 port map ( O=>T_308, - I1=>CYCLE_DMA_1_busQ, + I1=>RSTPIN, I0=>GATE_T_308_A ); GATE_T_308_I_2: INV port map ( O=>GATE_T_308_A, - I0=>CLK_000_D_0_busQ ); + I0=>BGACK_030Q ); GATE_T_309_I_1: AND2 port map ( O=>T_309, - I1=>RSTPIN, + I1=>CYCLE_DMA_1_busQ, I0=>GATE_T_309_A ); GATE_T_309_I_2: INV port map ( O=>GATE_T_309_A, - I0=>BGACK_030Q ); + I0=>CLK_000_D_0_busQ ); GATE_T_310_I_1: AND2 port map ( O=>T_310, - I1=>CLK_000_D_0_busQ, + I1=>RSTPIN, I0=>GATE_T_310_A ); GATE_T_310_I_2: INV port map ( O=>GATE_T_310_A, - I0=>CLK_000_D_1_busQ ); + I0=>BGACK_030Q ); GATE_T_311_I_1: AND2 port map ( O=>T_311, - I1=>CYCLE_DMA_0_busQ, + I1=>CLK_000_D_0_busQ, I0=>GATE_T_311_A ); GATE_T_311_I_2: INV port map ( O=>GATE_T_311_A, - I0=>CYCLE_DMA_1_busQ ); + I0=>CLK_000_D_1_busQ ); GATE_T_312_I_1: AND2 port map ( O=>T_312, - I1=>RSTPIN, + I1=>CYCLE_DMA_0_busQ, I0=>GATE_T_312_A ); GATE_T_312_I_2: INV port map ( O=>GATE_T_312_A, - I0=>BGACK_030Q ); + I0=>CYCLE_DMA_1_busQ ); GATE_T_313_I_1: AND2 port map ( O=>T_313, + I1=>RSTPIN, + I0=>GATE_T_313_A ); + GATE_T_313_I_2: INV port map ( O=>GATE_T_313_A, + I0=>BGACK_030Q ); + GATE_T_314_I_1: AND2 port map ( O=>T_314, I1=>CLK_000_D_1_busQ, I0=>CYCLE_DMA_0_busQ ); - GATE_T_314_I_1: AND2 port map ( O=>T_314, - I1=>RSTPIN, - I0=>GATE_T_314_A ); - GATE_T_314_I_2: INV port map ( O=>GATE_T_314_A, - I0=>BGACK_030Q ); GATE_T_315_I_1: AND2 port map ( O=>T_315, - I1=>CYCLE_DMA_0_busQ, + I1=>RSTPIN, I0=>GATE_T_315_A ); GATE_T_315_I_2: INV port map ( O=>GATE_T_315_A, - I0=>CLK_000_D_0_busQ ); + I0=>BGACK_030Q ); GATE_T_316_I_1: AND2 port map ( O=>T_316, - I1=>RSTPIN, + I1=>CYCLE_DMA_0_busQ, I0=>GATE_T_316_A ); GATE_T_316_I_2: INV port map ( O=>GATE_T_316_A, - I0=>BGACK_030Q ); + I0=>CLK_000_D_0_busQ ); GATE_T_317_I_1: AND2 port map ( O=>T_317, - I1=>CLK_000_D_0_busQ, + I1=>RSTPIN, I0=>GATE_T_317_A ); GATE_T_317_I_2: INV port map ( O=>GATE_T_317_A, + I0=>BGACK_030Q ); + GATE_T_318_I_1: AND2 port map ( O=>T_318, + I1=>CLK_000_D_0_busQ, + I0=>GATE_T_318_A ); + GATE_T_318_I_2: INV port map ( O=>GATE_T_318_A, I0=>AS_000PIN ); - GATE_T_318_I_1: NOR2 port map ( O=>T_318, + GATE_T_319_I_1: NOR2 port map ( O=>T_319, I1=>CLK_000_D_1_busQ, I0=>CYCLE_DMA_0_busQ ); - GATE_T_319_I_1: AND2 port map ( O=>T_319, + GATE_T_320_I_1: AND2 port map ( O=>T_320, I1=>RSTPIN, - I0=>GATE_T_319_A ); - GATE_T_319_I_2: INV port map ( O=>GATE_T_319_A, - I0=>BGACK_030Q ); - GATE_T_320_I_3: NAN3 port map ( O=>T_320, - I2=>RSTPIN, - I1=>GATE_T_320_B, I0=>GATE_T_320_A ); - GATE_T_320_I_2: INV port map ( I0=>BGACK_030Q, - O=>GATE_T_320_B ); - GATE_T_320_I_1: INV port map ( I0=>AS_000PIN, - O=>GATE_T_320_A ); - GATE_T_321_I_1: OR3 port map ( O=>T_321, + GATE_T_320_I_2: INV port map ( O=>GATE_T_320_A, + I0=>BGACK_030Q ); + GATE_T_321_I_3: NAN3 port map ( O=>T_321, + I2=>RSTPIN, + I1=>GATE_T_321_B, + I0=>GATE_T_321_A ); + GATE_T_321_I_2: INV port map ( I0=>BGACK_030Q, + O=>GATE_T_321_B ); + GATE_T_321_I_1: INV port map ( I0=>AS_000PIN, + O=>GATE_T_321_A ); + GATE_T_322_I_1: OR3 port map ( O=>T_322, I2=>T_107, I1=>T_106, I0=>T_108 ); - GATE_T_322_I_1: OR3 port map ( O=>T_322, + GATE_T_323_I_1: OR3 port map ( O=>T_323, I2=>T_104, I1=>T_103, I0=>T_105 ); - GATE_T_323_I_1: OR2 port map ( O=>T_323, + GATE_T_324_I_1: OR2 port map ( O=>T_324, I1=>AS_000PIN, I0=>BGACK_030Q ); - GATE_T_324_I_1: OR2 port map ( O=>T_324, + GATE_T_325_I_1: OR2 port map ( O=>T_325, I1=>T_112, I0=>T_111 ); - GATE_T_325_I_1: OR2 port map ( O=>T_325, + GATE_T_326_I_1: OR2 port map ( O=>T_326, I1=>T_110, I0=>T_109 ); - GATE_T_326_I_1: OR2 port map ( O=>T_326, + GATE_T_327_I_1: OR2 port map ( O=>T_327, I1=>T_118, I0=>T_117 ); - GATE_T_327_I_1: OR2 port map ( O=>T_327, + GATE_T_328_I_1: OR2 port map ( O=>T_328, I1=>T_116, I0=>T_115 ); - GATE_T_328_I_1: OR2 port map ( O=>T_328, + GATE_T_329_I_1: OR2 port map ( O=>T_329, I1=>T_114, I0=>T_113 ); - GATE_T_329_I_1: AND2 port map ( O=>T_329, - I1=>BERRPIN, - I0=>GATE_T_329_A ); - GATE_T_329_I_2: INV port map ( O=>GATE_T_329_A, - I0=>SM_AMIGA_i_7_busQ ); GATE_T_330_I_1: AND2 port map ( O=>T_330, - I1=>inst_BGACK_030_INT_DQ, + I1=>BERRPIN, I0=>GATE_T_330_A ); GATE_T_330_I_2: INV port map ( O=>GATE_T_330_A, - I0=>inst_AS_030_D0Q ); + I0=>SM_AMIGA_i_7_busQ ); GATE_T_331_I_1: AND2 port map ( O=>T_331, + I1=>inst_BGACK_030_INT_DQ, + I0=>GATE_T_331_A ); + GATE_T_331_I_2: INV port map ( O=>GATE_T_331_A, + I0=>inst_AS_030_D0Q ); + GATE_T_332_I_1: AND2 port map ( O=>T_332, I1=>BGACK_030Q, I0=>RSTPIN ); - GATE_T_332_I_1: AND2 port map ( O=>T_332, - I1=>nEXP_SPACEPIN, - I0=>GATE_T_332_A ); - GATE_T_332_I_2: INV port map ( O=>GATE_T_332_A, - I0=>FC_1XPIN ); GATE_T_333_I_1: AND2 port map ( O=>T_333, - I1=>BERRPIN, + I1=>nEXP_SPACEPIN, I0=>GATE_T_333_A ); GATE_T_333_I_2: INV port map ( O=>GATE_T_333_A, - I0=>SM_AMIGA_i_7_busQ ); + I0=>FC_1XPIN ); GATE_T_334_I_1: AND2 port map ( O=>T_334, - I1=>inst_BGACK_030_INT_DQ, + I1=>BERRPIN, I0=>GATE_T_334_A ); GATE_T_334_I_2: INV port map ( O=>GATE_T_334_A, - I0=>inst_AS_030_D0Q ); + I0=>SM_AMIGA_i_7_busQ ); GATE_T_335_I_1: AND2 port map ( O=>T_335, + I1=>inst_BGACK_030_INT_DQ, + I0=>GATE_T_335_A ); + GATE_T_335_I_2: INV port map ( O=>GATE_T_335_A, + I0=>inst_AS_030_D0Q ); + GATE_T_336_I_1: AND2 port map ( O=>T_336, I1=>BGACK_030Q, I0=>A_DECODE_19XPIN ); - GATE_T_336_I_1: AND2 port map ( O=>T_336, + GATE_T_337_I_1: AND2 port map ( O=>T_337, I1=>RSTPIN, I0=>nEXP_SPACEPIN ); - GATE_T_337_I_1: AND2 port map ( O=>T_337, - I1=>BERRPIN, - I0=>GATE_T_337_A ); - GATE_T_337_I_2: INV port map ( O=>GATE_T_337_A, - I0=>SM_AMIGA_i_7_busQ ); GATE_T_338_I_1: AND2 port map ( O=>T_338, - I1=>inst_BGACK_030_INT_DQ, + I1=>BERRPIN, I0=>GATE_T_338_A ); GATE_T_338_I_2: INV port map ( O=>GATE_T_338_A, - I0=>inst_AS_030_D0Q ); + I0=>SM_AMIGA_i_7_busQ ); GATE_T_339_I_1: AND2 port map ( O=>T_339, + I1=>inst_BGACK_030_INT_DQ, + I0=>GATE_T_339_A ); + GATE_T_339_I_2: INV port map ( O=>GATE_T_339_A, + I0=>inst_AS_030_D0Q ); + GATE_T_340_I_1: AND2 port map ( O=>T_340, I1=>BGACK_030Q, I0=>A_DECODE_18XPIN ); - GATE_T_340_I_1: AND2 port map ( O=>T_340, + GATE_T_341_I_1: AND2 port map ( O=>T_341, I1=>RSTPIN, I0=>nEXP_SPACEPIN ); - GATE_T_341_I_1: AND2 port map ( O=>T_341, - I1=>BERRPIN, - I0=>GATE_T_341_A ); - GATE_T_341_I_2: INV port map ( O=>GATE_T_341_A, - I0=>SM_AMIGA_i_7_busQ ); GATE_T_342_I_1: AND2 port map ( O=>T_342, - I1=>inst_BGACK_030_INT_DQ, + I1=>BERRPIN, I0=>GATE_T_342_A ); GATE_T_342_I_2: INV port map ( O=>GATE_T_342_A, - I0=>inst_AS_030_D0Q ); + I0=>SM_AMIGA_i_7_busQ ); GATE_T_343_I_1: AND2 port map ( O=>T_343, - I1=>BGACK_030Q, + I1=>inst_BGACK_030_INT_DQ, I0=>GATE_T_343_A ); GATE_T_343_I_2: INV port map ( O=>GATE_T_343_A, - I0=>A_DECODE_17XPIN ); + I0=>inst_AS_030_D0Q ); GATE_T_344_I_1: AND2 port map ( O=>T_344, + I1=>BGACK_030Q, + I0=>GATE_T_344_A ); + GATE_T_344_I_2: INV port map ( O=>GATE_T_344_A, + I0=>A_DECODE_17XPIN ); + GATE_T_345_I_1: AND2 port map ( O=>T_345, I1=>RSTPIN, I0=>nEXP_SPACEPIN ); - GATE_T_345_I_1: AND2 port map ( O=>T_345, - I1=>BERRPIN, - I0=>GATE_T_345_A ); - GATE_T_345_I_2: INV port map ( O=>GATE_T_345_A, - I0=>SM_AMIGA_i_7_busQ ); GATE_T_346_I_1: AND2 port map ( O=>T_346, - I1=>inst_BGACK_030_INT_DQ, + I1=>BERRPIN, I0=>GATE_T_346_A ); GATE_T_346_I_2: INV port map ( O=>GATE_T_346_A, - I0=>inst_AS_030_D0Q ); + I0=>SM_AMIGA_i_7_busQ ); GATE_T_347_I_1: AND2 port map ( O=>T_347, + I1=>inst_BGACK_030_INT_DQ, + I0=>GATE_T_347_A ); + GATE_T_347_I_2: INV port map ( O=>GATE_T_347_A, + I0=>inst_AS_030_D0Q ); + GATE_T_348_I_1: AND2 port map ( O=>T_348, I1=>BGACK_030Q, I0=>A_DECODE_16XPIN ); - GATE_T_348_I_1: AND2 port map ( O=>T_348, + GATE_T_349_I_1: AND2 port map ( O=>T_349, I1=>RSTPIN, I0=>nEXP_SPACEPIN ); - GATE_T_349_I_1: AND2 port map ( O=>T_349, - I1=>BERRPIN, - I0=>GATE_T_349_A ); - GATE_T_349_I_2: INV port map ( O=>GATE_T_349_A, - I0=>SM_AMIGA_i_7_busQ ); GATE_T_350_I_1: AND2 port map ( O=>T_350, - I1=>inst_BGACK_030_INT_DQ, + I1=>BERRPIN, I0=>GATE_T_350_A ); GATE_T_350_I_2: INV port map ( O=>GATE_T_350_A, - I0=>inst_AS_030_D0Q ); + I0=>SM_AMIGA_i_7_busQ ); GATE_T_351_I_1: AND2 port map ( O=>T_351, - I1=>BGACK_030Q, + I1=>inst_BGACK_030_INT_DQ, I0=>GATE_T_351_A ); GATE_T_351_I_2: INV port map ( O=>GATE_T_351_A, - I0=>FC_0XPIN ); + I0=>inst_AS_030_D0Q ); GATE_T_352_I_1: AND2 port map ( O=>T_352, + I1=>BGACK_030Q, + I0=>GATE_T_352_A ); + GATE_T_352_I_2: INV port map ( O=>GATE_T_352_A, + I0=>FC_0XPIN ); + GATE_T_353_I_1: AND2 port map ( O=>T_353, I1=>RSTPIN, I0=>nEXP_SPACEPIN ); - GATE_T_353_I_1: AND2 port map ( O=>T_353, - I1=>CLK_000_D_1_busQ, - I0=>GATE_T_353_A ); - GATE_T_353_I_2: INV port map ( O=>GATE_T_353_A, - I0=>cpu_est_1_busQ ); GATE_T_354_I_1: AND2 port map ( O=>T_354, - I1=>cpu_est_0_busQ, + I1=>CLK_000_D_1_busQ, I0=>GATE_T_354_A ); GATE_T_354_I_2: INV port map ( O=>GATE_T_354_A, - I0=>cpu_est_3_busQ ); + I0=>cpu_est_1_busQ ); GATE_T_355_I_1: AND2 port map ( O=>T_355, + I1=>cpu_est_0_busQ, + I0=>GATE_T_355_A ); + GATE_T_355_I_2: INV port map ( O=>GATE_T_355_A, + I0=>cpu_est_3_busQ ); + GATE_T_356_I_1: AND2 port map ( O=>T_356, I1=>CLK_000_D_1_busQ, I0=>cpu_est_2_busQ ); - GATE_T_356_I_1: AND2 port map ( O=>T_356, + GATE_T_357_I_1: AND2 port map ( O=>T_357, I1=>cpu_est_1_busQ, I0=>cpu_est_0_busQ ); - GATE_T_357_I_1: OR3 port map ( O=>T_357, + GATE_T_358_I_1: OR3 port map ( O=>T_358, I2=>T_142, I1=>T_141, I0=>T_143 ); - GATE_T_358_I_1: OR3 port map ( O=>T_358, + GATE_T_359_I_1: OR3 port map ( O=>T_359, I2=>T_139, I1=>T_138, I0=>T_140 ); - GATE_T_359_I_1: OR3 port map ( O=>T_359, + GATE_T_360_I_1: OR3 port map ( O=>T_360, I2=>T_136, I1=>T_135, I0=>T_137 ); - GATE_T_360_I_1: AND2 port map ( O=>T_360, - I1=>IPL_D0_1_busQ, - I0=>GATE_T_360_A ); - GATE_T_360_I_2: INV port map ( O=>GATE_T_360_A, - I0=>IPL_D0_0_busQ ); GATE_T_361_I_1: AND2 port map ( O=>T_361, - I1=>IPL_1XPIN, + I1=>IPL_D0_1_busQ, I0=>GATE_T_361_A ); GATE_T_361_I_2: INV port map ( O=>GATE_T_361_A, - I0=>IPL_0XPIN ); + I0=>IPL_D0_0_busQ ); GATE_T_362_I_1: AND2 port map ( O=>T_362, + I1=>IPL_1XPIN, + I0=>GATE_T_362_A ); + GATE_T_362_I_2: INV port map ( O=>GATE_T_362_A, + I0=>IPL_0XPIN ); + GATE_T_363_I_1: AND2 port map ( O=>T_363, I1=>RSTPIN, I0=>IPL_2XPIN ); - GATE_T_363_I_1: NOR2 port map ( O=>T_363, + GATE_T_364_I_1: NOR2 port map ( O=>T_364, I1=>IPL_D0_1_busQ, I0=>IPL_D0_0_busQ ); - GATE_T_364_I_1: NOR2 port map ( O=>T_364, + GATE_T_365_I_1: NOR2 port map ( O=>T_365, I1=>IPL_0XPIN, I0=>IPL_1XPIN ); - GATE_T_365_I_1: AND2 port map ( O=>T_365, + GATE_T_366_I_1: AND2 port map ( O=>T_366, I1=>RSTPIN, I0=>IPL_2XPIN ); - GATE_T_366_I_1: AND2 port map ( O=>T_366, - I1=>IPL_D0_1_busQ, - I0=>GATE_T_366_A ); - GATE_T_366_I_2: INV port map ( O=>GATE_T_366_A, - I0=>IPL_D0_0_busQ ); GATE_T_367_I_1: AND2 port map ( O=>T_367, - I1=>IPL_1XPIN, + I1=>IPL_D0_1_busQ, I0=>GATE_T_367_A ); GATE_T_367_I_2: INV port map ( O=>GATE_T_367_A, - I0=>IPL_0XPIN ); + I0=>IPL_D0_0_busQ ); GATE_T_368_I_1: AND2 port map ( O=>T_368, - I1=>RSTPIN, + I1=>IPL_1XPIN, I0=>GATE_T_368_A ); GATE_T_368_I_2: INV port map ( O=>GATE_T_368_A, + I0=>IPL_0XPIN ); + GATE_T_369_I_1: AND2 port map ( O=>T_369, + I1=>RSTPIN, + I0=>GATE_T_369_A ); + GATE_T_369_I_2: INV port map ( O=>GATE_T_369_A, I0=>IPL_2XPIN ); - GATE_T_369_I_1: NOR2 port map ( O=>T_369, + GATE_T_370_I_1: NOR2 port map ( O=>T_370, I1=>IPL_D0_1_busQ, I0=>IPL_D0_0_busQ ); - GATE_T_370_I_1: NOR2 port map ( O=>T_370, + GATE_T_371_I_1: NOR2 port map ( O=>T_371, I1=>IPL_0XPIN, I0=>IPL_1XPIN ); - GATE_T_371_I_1: AND2 port map ( O=>T_371, + GATE_T_372_I_1: AND2 port map ( O=>T_372, I1=>RSTPIN, - I0=>GATE_T_371_A ); - GATE_T_371_I_2: INV port map ( O=>GATE_T_371_A, + I0=>GATE_T_372_A ); + GATE_T_372_I_2: INV port map ( O=>GATE_T_372_A, I0=>IPL_2XPIN ); - GATE_T_372_I_1: OR3 port map ( O=>T_372, + GATE_T_373_I_1: OR3 port map ( O=>T_373, I2=>T_152, I1=>T_151, I0=>T_153 ); - GATE_T_373_I_1: OR3 port map ( O=>T_373, + GATE_T_374_I_1: OR3 port map ( O=>T_374, I2=>T_149, I1=>T_148, I0=>T_150 ); - GATE_T_374_I_1: OR3 port map ( O=>T_374, + GATE_T_375_I_1: OR3 port map ( O=>T_375, I2=>T_146, I1=>T_145, I0=>T_147 ); - GATE_T_375_I_1: AND2 port map ( O=>T_375, - I1=>IPL_D0_0_busQ, - I0=>GATE_T_375_A ); - GATE_T_375_I_2: INV port map ( O=>GATE_T_375_A, - I0=>IPL_D0_1_busQ ); GATE_T_376_I_1: AND2 port map ( O=>T_376, - I1=>IPL_0XPIN, + I1=>IPL_D0_0_busQ, I0=>GATE_T_376_A ); GATE_T_376_I_2: INV port map ( O=>GATE_T_376_A, - I0=>IPL_1XPIN ); + I0=>IPL_D0_1_busQ ); GATE_T_377_I_1: AND2 port map ( O=>T_377, + I1=>IPL_0XPIN, + I0=>GATE_T_377_A ); + GATE_T_377_I_2: INV port map ( O=>GATE_T_377_A, + I0=>IPL_1XPIN ); + GATE_T_378_I_1: AND2 port map ( O=>T_378, I1=>RSTPIN, I0=>IPL_2XPIN ); - GATE_T_378_I_1: NOR2 port map ( O=>T_378, + GATE_T_379_I_1: NOR2 port map ( O=>T_379, I1=>IPL_D0_1_busQ, I0=>IPL_D0_0_busQ ); - GATE_T_379_I_1: NOR2 port map ( O=>T_379, + GATE_T_380_I_1: NOR2 port map ( O=>T_380, I1=>IPL_0XPIN, I0=>IPL_1XPIN ); - GATE_T_380_I_1: AND2 port map ( O=>T_380, + GATE_T_381_I_1: AND2 port map ( O=>T_381, I1=>RSTPIN, I0=>IPL_2XPIN ); - GATE_T_381_I_1: AND2 port map ( O=>T_381, - I1=>IPL_D0_0_busQ, - I0=>GATE_T_381_A ); - GATE_T_381_I_2: INV port map ( O=>GATE_T_381_A, - I0=>IPL_D0_1_busQ ); GATE_T_382_I_1: AND2 port map ( O=>T_382, - I1=>IPL_0XPIN, + I1=>IPL_D0_0_busQ, I0=>GATE_T_382_A ); GATE_T_382_I_2: INV port map ( O=>GATE_T_382_A, - I0=>IPL_1XPIN ); + I0=>IPL_D0_1_busQ ); GATE_T_383_I_1: AND2 port map ( O=>T_383, - I1=>RSTPIN, + I1=>IPL_0XPIN, I0=>GATE_T_383_A ); GATE_T_383_I_2: INV port map ( O=>GATE_T_383_A, + I0=>IPL_1XPIN ); + GATE_T_384_I_1: AND2 port map ( O=>T_384, + I1=>RSTPIN, + I0=>GATE_T_384_A ); + GATE_T_384_I_2: INV port map ( O=>GATE_T_384_A, I0=>IPL_2XPIN ); - GATE_T_384_I_1: NOR2 port map ( O=>T_384, + GATE_T_385_I_1: NOR2 port map ( O=>T_385, I1=>IPL_D0_1_busQ, I0=>IPL_D0_0_busQ ); - GATE_T_385_I_1: NOR2 port map ( O=>T_385, + GATE_T_386_I_1: NOR2 port map ( O=>T_386, I1=>IPL_0XPIN, I0=>IPL_1XPIN ); - GATE_T_386_I_1: AND2 port map ( O=>T_386, + GATE_T_387_I_1: AND2 port map ( O=>T_387, I1=>RSTPIN, - I0=>GATE_T_386_A ); - GATE_T_386_I_2: INV port map ( O=>GATE_T_386_A, + I0=>GATE_T_387_A ); + GATE_T_387_I_2: INV port map ( O=>GATE_T_387_A, I0=>IPL_2XPIN ); - GATE_T_387_I_1: NOR2 port map ( O=>T_387, + GATE_T_388_I_1: NOR2 port map ( O=>T_388, I1=>CLK_000_D_1_busQ, I0=>cpu_est_2_busQ ); - GATE_T_388_I_1: NOR2 port map ( O=>T_388, + GATE_T_389_I_1: NOR2 port map ( O=>T_389, I1=>cpu_est_1_busQ, I0=>cpu_est_0_busQ ); - GATE_T_389_I_1: NOR2 port map ( O=>T_389, + GATE_T_390_I_1: NOR2 port map ( O=>T_390, I1=>cpu_est_3_busQ, I0=>VMAQ ); - GATE_T_390_I_1: INV port map ( I0=>CLK_000_D_0_busQ, - O=>GATE_T_390_A ); - GATE_T_390_I_2: INV port map ( I0=>inst_VPA_DQ, - O=>GATE_T_390_B ); - GATE_T_390_I_3: AND3 port map ( O=>T_390, - I0=>CLK_000_D_1_busQ, - I2=>GATE_T_390_A, - I1=>GATE_T_390_B ); - GATE_T_391_I_1: INV port map ( I0=>cpu_est_2_busQ, + GATE_T_391_I_1: INV port map ( I0=>CLK_000_D_0_busQ, O=>GATE_T_391_A ); - GATE_T_391_I_2: AND3 port map ( O=>T_391, - I2=>cpu_est_1_busQ, - I1=>cpu_est_0_busQ, - I0=>GATE_T_391_A ); - GATE_T_392_I_1: INV port map ( I0=>cpu_est_3_busQ, + GATE_T_391_I_2: INV port map ( I0=>inst_VPA_DQ, + O=>GATE_T_391_B ); + GATE_T_391_I_3: AND3 port map ( O=>T_391, + I0=>CLK_000_D_1_busQ, + I2=>GATE_T_391_A, + I1=>GATE_T_391_B ); + GATE_T_392_I_1: INV port map ( I0=>cpu_est_2_busQ, O=>GATE_T_392_A ); GATE_T_392_I_2: AND3 port map ( O=>T_392, + I2=>cpu_est_1_busQ, + I1=>cpu_est_0_busQ, + I0=>GATE_T_392_A ); + GATE_T_393_I_1: INV port map ( I0=>cpu_est_3_busQ, + O=>GATE_T_393_A ); + GATE_T_393_I_2: AND3 port map ( O=>T_393, I2=>VMAQ, I1=>RSTPIN, - I0=>GATE_T_392_A ); - GATE_T_393_I_1: AND2 port map ( O=>T_393, - I1=>CLK_000_D_11_busQ, I0=>GATE_T_393_A ); - GATE_T_393_I_2: INV port map ( O=>GATE_T_393_A, - I0=>CLK_000_D_10_busQ ); - GATE_T_394_I_1: AND2 port map ( O=>T_394, - I1=>RSTPIN, - I0=>GATE_T_394_A ); - GATE_T_394_I_2: INV port map ( O=>GATE_T_394_A, - I0=>CLK_030PIN ); - GATE_T_395_I_1: AND2 port map ( O=>T_395, - I1=>CLK_000_D_11_busQ, - I0=>GATE_T_395_A ); - GATE_T_395_I_2: INV port map ( O=>GATE_T_395_A, - I0=>CLK_000_D_10_busQ ); + GATE_T_394_I_1: OR2 port map ( O=>T_394, + I1=>T_165, + I0=>T_164 ); + GATE_T_395_I_1: OR2 port map ( O=>T_395, + I1=>T_163, + I0=>T_162 ); GATE_T_396_I_1: AND2 port map ( O=>T_396, - I1=>inst_CLK_OUT_PRE_DQ, - I0=>RSTPIN ); + I1=>CLK_000_D_7_busQ, + I0=>GATE_T_396_A ); + GATE_T_396_I_2: INV port map ( O=>GATE_T_396_A, + I0=>CLK_000_D_6_busQ ); GATE_T_397_I_1: AND2 port map ( O=>T_397, - I1=>inst_AS_030_D0Q, - I0=>RSTPIN ); + I1=>RSTPIN, + I0=>GATE_T_397_A ); + GATE_T_397_I_2: INV port map ( O=>GATE_T_397_A, + I0=>CLK_030PIN ); GATE_T_398_I_1: AND2 port map ( O=>T_398, - I1=>nEXP_SPACEPIN, + I1=>CLK_000_D_7_busQ, I0=>GATE_T_398_A ); GATE_T_398_I_2: INV port map ( O=>GATE_T_398_A, - I0=>BG_030PIN ); - GATE_T_399_I_1: NOR2 port map ( O=>T_399, - I1=>RW_000Q, - I0=>SM_AMIGA_0_busQ ); + I0=>CLK_000_D_6_busQ ); + GATE_T_399_I_1: AND2 port map ( O=>T_399, + I1=>inst_CLK_OUT_PRE_DQ, + I0=>RSTPIN ); GATE_T_400_I_1: AND2 port map ( O=>T_400, - I1=>RSTPIN, - I0=>GATE_T_400_A ); - GATE_T_400_I_2: INV port map ( O=>GATE_T_400_A, - I0=>SM_AMIGA_6_busQ ); + I1=>inst_AS_030_D0Q, + I0=>RSTPIN ); GATE_T_401_I_1: AND2 port map ( O=>T_401, - I1=>SM_AMIGA_i_7_busQ, + I1=>nEXP_SPACEPIN, I0=>GATE_T_401_A ); GATE_T_401_I_2: INV port map ( O=>GATE_T_401_A, + I0=>BG_030PIN ); + GATE_T_402_I_1: NOR2 port map ( O=>T_402, + I1=>RW_000Q, I0=>SM_AMIGA_0_busQ ); - GATE_T_402_I_1: AND2 port map ( O=>T_402, - I1=>SM_AMIGA_6_busQ, - I0=>CLK_000_D_0_busQ ); GATE_T_403_I_1: AND2 port map ( O=>T_403, I1=>RSTPIN, I0=>GATE_T_403_A ); GATE_T_403_I_2: INV port map ( O=>GATE_T_403_A, - I0=>CLK_000_D_1_busQ ); - GATE_T_404_I_1: OR3 port map ( O=>T_404, - I2=>T_181, - I1=>T_180, - I0=>T_182 ); - GATE_T_405_I_1: OR3 port map ( O=>T_405, - I2=>T_178, - I1=>T_177, - I0=>T_179 ); - GATE_T_406_I_1: OR3 port map ( O=>T_406, - I2=>T_175, - I1=>T_174, - I0=>T_176 ); - GATE_T_407_I_1: AND2 port map ( O=>T_407, - I1=>IPL_D0_1_busQ, - I0=>IPL_D0_0_busQ ); - GATE_T_408_I_1: AND2 port map ( O=>T_408, - I1=>IPL_0XPIN, - I0=>IPL_1XPIN ); - GATE_T_409_I_1: AND2 port map ( O=>T_409, + I0=>SM_AMIGA_6_busQ ); + GATE_T_404_I_1: AND2 port map ( O=>T_404, + I1=>SM_AMIGA_i_7_busQ, + I0=>GATE_T_404_A ); + GATE_T_404_I_2: INV port map ( O=>GATE_T_404_A, + I0=>SM_AMIGA_0_busQ ); + GATE_T_405_I_1: AND2 port map ( O=>T_405, + I1=>SM_AMIGA_6_busQ, + I0=>CLK_000_D_0_busQ ); + GATE_T_406_I_1: AND2 port map ( O=>T_406, I1=>RSTPIN, - I0=>GATE_T_409_A ); - GATE_T_409_I_2: INV port map ( O=>GATE_T_409_A, - I0=>IPL_2XPIN ); + I0=>GATE_T_406_A ); + GATE_T_406_I_2: INV port map ( O=>GATE_T_406_A, + I0=>CLK_000_D_1_busQ ); + GATE_T_407_I_1: OR3 port map ( O=>T_407, + I2=>T_182, + I1=>T_181, + I0=>T_183 ); + GATE_T_408_I_1: OR3 port map ( O=>T_408, + I2=>T_179, + I1=>T_178, + I0=>T_180 ); + GATE_T_409_I_1: OR3 port map ( O=>T_409, + I2=>T_176, + I1=>T_175, + I0=>T_177 ); GATE_T_410_I_1: AND2 port map ( O=>T_410, I1=>IPL_D0_1_busQ, - I0=>GATE_T_410_A ); - GATE_T_410_I_2: INV port map ( O=>GATE_T_410_A, I0=>IPL_D0_0_busQ ); GATE_T_411_I_1: AND2 port map ( O=>T_411, - I1=>IPL_1XPIN, - I0=>GATE_T_411_A ); - GATE_T_411_I_2: INV port map ( O=>GATE_T_411_A, - I0=>IPL_0XPIN ); + I1=>IPL_0XPIN, + I0=>IPL_1XPIN ); GATE_T_412_I_1: AND2 port map ( O=>T_412, I1=>RSTPIN, I0=>GATE_T_412_A ); GATE_T_412_I_2: INV port map ( O=>GATE_T_412_A, I0=>IPL_2XPIN ); GATE_T_413_I_1: AND2 port map ( O=>T_413, - I1=>IPL_D0_0_busQ, + I1=>IPL_D0_1_busQ, I0=>GATE_T_413_A ); GATE_T_413_I_2: INV port map ( O=>GATE_T_413_A, - I0=>IPL_D0_1_busQ ); + I0=>IPL_D0_0_busQ ); GATE_T_414_I_1: AND2 port map ( O=>T_414, - I1=>IPL_0XPIN, + I1=>IPL_1XPIN, I0=>GATE_T_414_A ); GATE_T_414_I_2: INV port map ( O=>GATE_T_414_A, - I0=>IPL_1XPIN ); + I0=>IPL_0XPIN ); GATE_T_415_I_1: AND2 port map ( O=>T_415, I1=>RSTPIN, I0=>GATE_T_415_A ); GATE_T_415_I_2: INV port map ( O=>GATE_T_415_A, I0=>IPL_2XPIN ); - GATE_T_416_I_1: NOR2 port map ( O=>T_416, - I1=>IPL_D0_1_busQ, - I0=>IPL_D0_0_busQ ); - GATE_T_417_I_1: NOR2 port map ( O=>T_417, + GATE_T_416_I_1: AND2 port map ( O=>T_416, + I1=>IPL_D0_0_busQ, + I0=>GATE_T_416_A ); + GATE_T_416_I_2: INV port map ( O=>GATE_T_416_A, + I0=>IPL_D0_1_busQ ); + GATE_T_417_I_1: AND2 port map ( O=>T_417, I1=>IPL_0XPIN, + I0=>GATE_T_417_A ); + GATE_T_417_I_2: INV port map ( O=>GATE_T_417_A, I0=>IPL_1XPIN ); GATE_T_418_I_1: AND2 port map ( O=>T_418, I1=>RSTPIN, I0=>GATE_T_418_A ); GATE_T_418_I_2: INV port map ( O=>GATE_T_418_A, I0=>IPL_2XPIN ); - GATE_T_419_I_14: NOR4 port map ( O=>T_419, - I3=>AHIGH_30XPIN, - I2=>AHIGH_29XPIN, - I1=>AHIGH_28XPIN, - I0=>AHIGH_27XPIN ); - GATE_T_420_I_14: NOR4 port map ( O=>T_420, - I3=>AHIGH_26XPIN, - I2=>AHIGH_25XPIN, - I1=>AHIGH_24XPIN, - I0=>inst_AS_030_D0Q ); - GATE_T_421_I_1: AND4 port map ( O=>T_421, - I3=>A_DECODE_20XPIN, - I2=>A_DECODE_21XPIN, - I1=>A_DECODE_22XPIN, - I0=>A_DECODE_23XPIN ); + GATE_T_419_I_1: NOR2 port map ( O=>T_419, + I1=>IPL_D0_1_busQ, + I0=>IPL_D0_0_busQ ); + GATE_T_420_I_1: NOR2 port map ( O=>T_420, + I1=>IPL_0XPIN, + I0=>IPL_1XPIN ); + GATE_T_421_I_1: AND2 port map ( O=>T_421, + I1=>RSTPIN, + I0=>GATE_T_421_A ); + GATE_T_421_I_2: INV port map ( O=>GATE_T_421_A, + I0=>IPL_2XPIN ); GATE_T_422_I_14: NOR4 port map ( O=>T_422, I3=>AHIGH_30XPIN, I2=>AHIGH_29XPIN, @@ -3937,28 +3915,21 @@ begin I2=>A_DECODE_21XPIN, I1=>A_DECODE_22XPIN, I0=>A_DECODE_23XPIN ); - GATE_T_425_I_1: INV port map ( I0=>AS_030PIN, - O=>GATE_T_425_A ); - GATE_T_425_I_2: INV port map ( I0=>A_DECODE_16XPIN, - O=>GATE_T_425_B ); - GATE_T_425_I_3: AND3 port map ( O=>T_425, - I0=>FC_0XPIN, - I2=>GATE_T_425_A, - I1=>GATE_T_425_B ); - GATE_T_426_I_1: INV port map ( I0=>A_DECODE_18XPIN, - O=>GATE_T_426_A ); - GATE_T_426_I_2: INV port map ( I0=>A_DECODE_19XPIN, - O=>GATE_T_426_B ); - GATE_T_426_I_3: AND3 port map ( O=>T_426, - I0=>A_DECODE_17XPIN, - I2=>GATE_T_426_A, - I1=>GATE_T_426_B ); - GATE_T_427_I_1: INV port map ( I0=>FPU_SENSEPIN, - O=>GATE_T_427_A ); - GATE_T_427_I_2: AND3 port map ( O=>T_427, - I2=>BGACK_000PIN, - I1=>FC_1XPIN, - I0=>GATE_T_427_A ); + GATE_T_425_I_14: NOR4 port map ( O=>T_425, + I3=>AHIGH_30XPIN, + I2=>AHIGH_29XPIN, + I1=>AHIGH_28XPIN, + I0=>AHIGH_27XPIN ); + GATE_T_426_I_14: NOR4 port map ( O=>T_426, + I3=>AHIGH_26XPIN, + I2=>AHIGH_25XPIN, + I1=>AHIGH_24XPIN, + I0=>inst_AS_030_D0Q ); + GATE_T_427_I_1: AND4 port map ( O=>T_427, + I3=>A_DECODE_20XPIN, + I2=>A_DECODE_21XPIN, + I1=>A_DECODE_22XPIN, + I0=>A_DECODE_23XPIN ); GATE_T_428_I_1: INV port map ( I0=>AS_030PIN, O=>GATE_T_428_A ); GATE_T_428_I_2: INV port map ( I0=>A_DECODE_16XPIN, @@ -3975,7 +3946,29 @@ begin I0=>A_DECODE_17XPIN, I2=>GATE_T_429_A, I1=>GATE_T_429_B ); - GATE_T_430_I_1: AND3 port map ( O=>T_430, + GATE_T_430_I_1: INV port map ( I0=>FPU_SENSEPIN, + O=>GATE_T_430_A ); + GATE_T_430_I_2: AND3 port map ( O=>T_430, + I2=>BGACK_000PIN, + I1=>FC_1XPIN, + I0=>GATE_T_430_A ); + GATE_T_431_I_1: INV port map ( I0=>AS_030PIN, + O=>GATE_T_431_A ); + GATE_T_431_I_2: INV port map ( I0=>A_DECODE_16XPIN, + O=>GATE_T_431_B ); + GATE_T_431_I_3: AND3 port map ( O=>T_431, + I0=>FC_0XPIN, + I2=>GATE_T_431_A, + I1=>GATE_T_431_B ); + GATE_T_432_I_1: INV port map ( I0=>A_DECODE_18XPIN, + O=>GATE_T_432_A ); + GATE_T_432_I_2: INV port map ( I0=>A_DECODE_19XPIN, + O=>GATE_T_432_B ); + GATE_T_432_I_3: AND3 port map ( O=>T_432, + I0=>A_DECODE_17XPIN, + I2=>GATE_T_432_A, + I1=>GATE_T_432_B ); + GATE_T_433_I_1: AND3 port map ( O=>T_433, I2=>BGACK_000PIN, I1=>FC_1XPIN, I0=>FPU_SENSEPIN ); diff --git a/Logic/68030_tk.xrf b/Logic/68030_tk.xrf index eedb248..bbafc7e 100644 --- a/Logic/68030_tk.xrf +++ b/Logic/68030_tk.xrf @@ -2,7 +2,7 @@ Signal Name Cross Reference File ispLEVER Classic 2.0.00.17.20.15 -Design '68030_tk' created Fri Aug 19 00:39:35 2016 +Design '68030_tk' created Wed Aug 24 22:17:49 2016 LEGEND: '>' Functional Block Port Separator diff --git a/Logic/BUS68030.bl0 b/Logic/BUS68030.bl0 index d82f5d4..7086ed9 100644 --- a/Logic/BUS68030.bl0 +++ b/Logic/BUS68030.bl0 @@ -1,255 +1,252 @@ -#$ DATE Fri Aug 19 00:39:35 2016 +#$ DATE Wed Aug 24 22:17:49 2016 #$ TOOL EDIF2BLIF version IspLever 1.0 #$ MODULE bus68030 -#$ PINS 75 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_030_2_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BG_000 SIZE_0_ BGACK_030 AHIGH_30_ BGACK_000 AHIGH_29_ CLK_030 AHIGH_28_ CLK_000 AHIGH_27_ CLK_OSZI AHIGH_26_ CLK_DIV_OUT AHIGH_25_ CLK_EXP AHIGH_24_ FPU_CS A_DECODE_22_ FPU_SENSE A_DECODE_21_ DSACK1 A_DECODE_20_ DTACK A_DECODE_19_ AVEC A_DECODE_18_ E A_DECODE_17_ VPA A_DECODE_16_ VMA A_DECODE_15_ RST A_DECODE_14_ RESET A_DECODE_13_ RW A_DECODE_12_ AMIGA_ADDR_ENABLE A_DECODE_11_ AMIGA_BUS_DATA_DIR A_DECODE_10_ AMIGA_BUS_ENABLE_LOW A_DECODE_9_ AMIGA_BUS_ENABLE_HIGH A_DECODE_8_ CIIN A_DECODE_7_ A_DECODE_6_ A_DECODE_5_ A_DECODE_4_ A_DECODE_3_ A_DECODE_2_ A_0_ IPL_030_1_ IPL_030_0_ IPL_1_ IPL_0_ FC_0_ A_1_ -#$ NODES 662 N_28 N_246_i bgack_030_int_0_un1_n N_17 sm_amiga_nss_i_0_0__n bgack_030_int_0_un0_n N_19 dsack1_int_0_un3_n N_23 N_220_i \ -# dsack1_int_0_un1_n N_24 N_219_i dsack1_int_0_un0_n N_25 N_218_i cpu_est_0_3__un3_n un1_amiga_bus_enable_low_i cpu_est_0_3__un1_n un21_fpu_cs_i \ -# N_224_i cpu_est_0_3__un0_n inst_BGACK_030_INTreg BGACK_030_INT_i N_222_i cpu_est_0_2__un3_n vcc_n_n AMIGA_BUS_ENABLE_DMA_LOW_i N_223_i cpu_est_0_2__un1_n \ -# inst_VMA_INTreg UDS_000_INT_i N_322_i cpu_est_0_2__un0_n gnd_n_n LDS_000_INT_i N_312_i cpu_est_0_1__un3_n un1_amiga_bus_enable_low N_131_i \ -# N_139_0 cpu_est_0_1__un1_n un6_as_030 N_132_i N_108_i cpu_est_0_1__un0_n un3_size RW_000_i N_258_i vma_int_0_un3_n \ -# un4_size a_i_1__n N_257_i vma_int_0_un1_n un4_uds_000 clk_000_d_i_11__n vma_int_0_un0_n un4_lds_000 sm_amiga_i_6__n N_245_i \ -# ipl_030_0_0__un3_n un4_as_000 clk_000_d_i_1__n nEXP_SPACE_c_i ipl_030_0_0__un1_n un10_ciin AS_030_000_SYNC_i un1_as_030_i ipl_030_0_0__un0_n un21_fpu_cs \ -# sm_amiga_i_0__n pos_clk_un3_as_030_d0_0_n ds_000_dma_0_un3_n un22_berr sm_amiga_i_3__n N_107_0 ds_000_dma_0_un1_n un6_ds_030 sm_amiga_i_i_7__n N_115_i \ -# ds_000_dma_0_un0_n cpu_est_3_ sm_amiga_i_5__n N_63_0 as_000_dma_0_un3_n cpu_est_0_ rst_dly_i_0__n N_278_0 as_000_dma_0_un1_n cpu_est_1_ \ -# rst_dly_i_1__n N_279_0 as_000_dma_0_un0_n cpu_est_2_ N_364_i_0 N_260_i a_decode_15__n inst_AS_000_INT cpu_est_i_0__n N_67_0 \ -# inst_AMIGA_BUS_ENABLE_DMA_LOW rst_dly_i_2__n pos_clk_rw_000_int_5_0_n a_decode_14__n inst_AS_030_D0 AS_030_i un1_SM_AMIGA_0_sqmuxa_1_0 inst_AS_030_000_SYNC FPU_SENSE_i un10_ciin_i \ -# a_decode_13__n inst_BGACK_030_INT_D N_157_i N_313_0 inst_AS_000_DMA a_decode_i_16__n N_4_i a_decode_12__n inst_DS_000_DMA a_decode_i_18__n \ -# N_48_0 CYCLE_DMA_0_ a_decode_i_19__n N_5_i a_decode_11__n CYCLE_DMA_1_ N_113_i N_47_0 SIZE_DMA_0_ N_114_i \ -# N_7_i a_decode_10__n SIZE_DMA_1_ AS_000_INT_i N_46_0 inst_VPA_D size_dma_i_1__n N_18_i a_decode_9__n inst_UDS_000_INT \ -# size_dma_i_0__n N_41_0 inst_LDS_000_INT RESET_OUT_i N_22_i a_decode_8__n inst_CLK_OUT_PRE_D cpu_est_i_1__n N_37_0 CLK_000_D_1_ \ -# cpu_est_i_2__n N_26_i a_decode_7__n CLK_000_D_10_ VPA_D_i N_33_0 CLK_000_D_11_ DTACK_D0_i BG_030_c_i a_decode_6__n \ -# inst_DTACK_D0 cpu_est_i_3__n pos_clk_un6_bg_030_i_n inst_RESET_OUT CLK_030_i pos_clk_un9_bg_030_0_n a_decode_5__n CLK_000_D_0_ clk_000_d_i_0__n N_10_i \ -# inst_CLK_OUT_PRE_50 clk_000_d_i_10__n N_43_0 a_decode_4__n IPL_D0_0_ AS_000_DMA_i VPA_c_i IPL_D0_1_ AS_000_i N_54_0 \ -# a_decode_3__n IPL_D0_2_ CLK_030_H_i un3_as_030_i CLK_000_D_2_ cycle_dma_i_0__n N_370_i a_decode_2__n CLK_000_D_3_ AS_030_D0_i \ -# pos_clk_un6_bgack_000_0_n CLK_000_D_4_ ahigh_i_30__n N_283_i CLK_000_D_5_ ahigh_i_31__n pos_clk_size_dma_6_0_0__n CLK_000_D_6_ ahigh_i_28__n N_345_i \ -# CLK_000_D_7_ ahigh_i_29__n pos_clk_size_dma_6_0_1__n CLK_000_D_8_ ahigh_i_26__n UDS_000_c_i CLK_000_D_9_ ahigh_i_27__n LDS_000_c_i CLK_000_D_12_ \ -# ahigh_i_24__n N_171_i pos_clk_un6_bg_030_n ahigh_i_25__n N_21_i inst_AMIGA_BUS_ENABLE_DMA_HIGH N_241_i N_38_0 inst_DSACK1_INTreg N_242_i \ -# DTACK_c_i pos_clk_ipl_n N_243_i N_55_0 inst_DS_000_ENABLE N_249_i SM_AMIGA_6_ un6_ds_030_i N_248_i SM_AMIGA_0_ \ -# DS_000_DMA_i pos_clk_un9_clk_000_pe_0_n SM_AMIGA_4_ un4_as_000_i N_250_i inst_RW_000_INT un6_as_030_i N_251_i inst_RW_000_DMA un4_lds_000_i \ -# cpu_est_2_0_1__n RST_DLY_0_ un4_uds_000_i N_253_i RST_DLY_1_ AS_030_c N_369_i RST_DLY_2_ cpu_est_2_0_2__n inst_A0_DMA \ -# AS_000_c N_254_i inst_CLK_030_H N_316_i SM_AMIGA_1_ RW_000_c N_256_i SM_AMIGA_5_ N_255_i SM_AMIGA_3_ \ -# N_317_i SM_AMIGA_2_ UDS_000_c N_267_i pos_clk_ds_000_dma_4_n N_266_i N_3 LDS_000_c N_57_0 N_8 \ -# N_151_0 size_c_0__n N_321_i N_158_i size_c_1__n VMA_INT_i N_361_i ahigh_c_24__n N_362_i N_27 \ -# N_169_i ahigh_c_25__n N_186_0 N_195_0 ahigh_c_26__n N_196_0 ahigh_c_27__n N_263_i N_262_i ahigh_c_28__n \ -# N_323_0 N_101_i ahigh_c_29__n N_366_i N_182_i ahigh_c_30__n pos_clk_un23_bgack_030_int_i_0_0_n N_310_i ahigh_c_31__n N_359_i \ -# N_144_0 CLK_OUT_PRE_D_i N_142_0 N_311_i N_319_i N_93_i N_272_0 N_290_i N_273_0 N_346_i \ -# pos_clk_ds_000_dma_4_0_n N_268_i N_269_i SM_AMIGA_i_7_ sm_amiga_nss_0_3__n N_341_i N_238_i N_239_i sm_amiga_nss_0_2__n N_263 \ -# N_235_i G_116 N_236_i G_117 sm_amiga_nss_0_4__n G_118 N_234_i pos_clk_un23_bgack_030_int_i_0_n sm_amiga_nss_0_5__n N_272 \ -# N_231_i N_273 N_232_i sm_amiga_nss_0_6__n N_313 N_230_i a_decode_c_16__n sm_amiga_nss_0_7__n N_226_i N_108 \ -# a_decode_c_17__n N_331_i N_319 N_142 a_decode_c_18__n un1_as_000_i N_144 N_27_i N_322 a_decode_c_19__n \ -# N_30_0 N_169 ipl_c_i_0__n N_195 a_decode_c_20__n N_51_0 N_323 N_3_i N_209 a_decode_c_21__n \ -# N_49_0 N_218 N_8_i N_224 a_decode_c_22__n N_45_0 N_226 sm_amiga_nss_i_0_1_0__n N_331 a_decode_c_23__n \ -# sm_amiga_nss_i_0_2_0__n N_229 sm_amiga_nss_i_0_3_0__n N_230 a_c_0__n sm_amiga_nss_i_0_4_0__n N_231 sm_amiga_nss_i_0_5_0__n N_232 a_c_1__n \ -# pos_clk_un10_sm_amiga_i_1_n N_233 un10_ciin_1 N_234 nEXP_SPACE_c un10_ciin_2 N_235 un10_ciin_3 N_236 BERR_c \ -# un10_ciin_4 N_238 un10_ciin_5 N_239 BG_030_c un10_ciin_6 N_240 un10_ciin_7 N_251 BG_000DFFreg \ -# un10_ciin_8 N_262 un10_ciin_9 N_341 un10_ciin_10 N_268 BGACK_000_c un10_ciin_11 N_269 pos_clk_un23_bgack_030_int_i_0_0_1_n \ -# N_282 CLK_030_c pos_clk_un23_bgack_030_int_i_0_0_2_n N_346 N_60_i_1 N_290 N_60_i_2 N_310 N_248_1 N_311 \ -# CLK_OSZI_c N_248_2 N_355 N_249_1 N_356 N_249_2 N_359 CLK_OUT_INTreg N_361_1 N_360 \ -# N_361_2 N_365 N_157_1 N_366 FPU_SENSE_c N_157_2 pos_clk_un23_bgack_030_int_i_0_o2_2_x2 N_157_3 pos_clk_CYCLE_DMA_5_1_i_0_x2 IPL_030DFF_0_reg \ -# N_157_4 N_248 N_260_1 N_249 IPL_030DFF_1_reg N_260_2 N_369 un21_fpu_cs_1 N_196 IPL_030DFF_2_reg \ -# un22_berr_1_0 N_186 N_275_i_1 N_361 ipl_c_0__n N_275_i_2 N_362 N_274_i_1 N_151 ipl_c_1__n \ -# N_274_i_2 N_321 N_115_1 N_266 ipl_c_2__n N_115_2 N_267 N_332_1 N_255 N_246_1 \ -# N_256 DTACK_c N_246_2 N_253 N_246_3 N_254 N_246_4 cpu_est_2_2__n N_332_4_1 cpu_est_2_1__n \ -# VPA_c N_332_4_2 N_250 N_273_0_1 pos_clk_un9_clk_000_pe_n N_276_i_1 N_364 RST_c N_277_i_1 N_21 \ -# N_314_i_1 N_171 N_356_1 pos_clk_size_dma_6_1__n RW_c N_282_1 N_345 N_251_1 pos_clk_size_dma_6_0__n fc_c_0__n \ -# pos_clk_un6_bg_030_1_n N_283 N_240_1 pos_clk_un6_bgack_000_n fc_c_1__n N_238_1 N_370 N_233_1 N_259 N_231_1 \ -# N_10 AMIGA_BUS_DATA_DIR_c N_224_1 pos_clk_un9_bg_030_n N_218_1 N_4 pos_clk_ipl_1_n N_114 rw_000_dma_0_un3_n N_278 \ -# rw_000_dma_0_un1_n N_5 N_25_i rw_000_dma_0_un0_n N_113 N_34_0 lds_000_int_0_un3_n N_279 N_24_i lds_000_int_0_un1_n \ -# N_6 N_35_0 lds_000_int_0_un0_n N_115 N_23_i ipl_030_0_1__un3_n N_63 N_36_0 ipl_030_0_1__un1_n N_7 \ -# N_19_i ipl_030_0_1__un0_n pos_clk_un3_as_030_d0_n N_40_0 amiga_bus_enable_dma_high_0_un3_n N_67 N_17_i amiga_bus_enable_dma_high_0_un1_n N_18 N_42_0 \ -# amiga_bus_enable_dma_high_0_un0_n pos_clk_rw_000_int_5_n ipl_c_i_1__n amiga_bus_enable_dma_low_0_un3_n un1_SM_AMIGA_0_sqmuxa_1 N_52_0 amiga_bus_enable_dma_low_0_un1_n N_22 ipl_c_i_2__n amiga_bus_enable_dma_low_0_un0_n \ -# pos_clk_a0_dma_3_n N_53_0 uds_000_int_0_un3_n N_363 N_28_i uds_000_int_0_un1_n N_26 N_31_0 uds_000_int_0_un0_n N_157 \ -# N_29_i ipl_030_0_2__un3_n N_260 N_32_0 ipl_030_0_2__un1_n un22_berr_1 a_c_i_0__n ipl_030_0_2__un0_n N_219 size_c_i_1__n \ -# un1_amiga_bus_enable_dma_high_i_m2_0__un3_n N_139 pos_clk_un10_sm_amiga_i_n un1_amiga_bus_enable_dma_high_i_m2_0__un1_n N_220 N_332_i un1_amiga_bus_enable_dma_high_i_m2_0__un0_n N_222 N_240_i as_000_int_0_un3_n \ -# N_223 N_315_0 as_000_int_0_un1_n N_368 N_281_0 as_000_int_0_un0_n N_257 N_270_i ds_000_enable_0_un3_n N_258 \ -# N_282_i ds_000_enable_0_un1_n N_312 AMIGA_BUS_DATA_DIR_c_0 ds_000_enable_0_un0_n N_143 RW_c_i as_030_000_sync_0_un3_n N_332 N_140_0 \ -# as_030_000_sync_0_un1_n N_332_4 N_353_i as_030_000_sync_0_un0_n N_246 N_143_0 rw_000_int_0_un3_n N_180 sm_amiga_i_1__n rw_000_int_0_un1_n \ -# N_320 N_320_i rw_000_int_0_un0_n N_244 N_357_i a0_dma_0_un3_n N_334 N_356_i a0_dma_0_un1_n N_335 \ -# N_156_0 a0_dma_0_un0_n N_159 sm_amiga_i_4__n bg_000_0_un3_n N_156 N_159_i bg_000_0_un1_n N_357 sm_amiga_i_2__n \ -# bg_000_0_un0_n N_353 N_180_i size_dma_0_1__un3_n N_140 N_334_i size_dma_0_1__un1_n N_270 N_335_i size_dma_0_1__un0_n \ -# N_281 N_244_i size_dma_0_0__un3_n N_131 N_233_i size_dma_0_0__un1_n N_132 N_355_i size_dma_0_0__un0_n N_29 \ -# N_229_i bgack_030_int_0_un3_n +#$ PINS 75 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_030_2_ IPL_2_ FC_1_ AS_030 SIZE_0_ AS_000 AHIGH_30_ RW_000 AHIGH_29_ DS_030 AHIGH_28_ UDS_000 AHIGH_27_ LDS_000 AHIGH_26_ nEXP_SPACE AHIGH_25_ BERR AHIGH_24_ BG_030 A_DECODE_22_ BG_000 A_DECODE_21_ BGACK_030 A_DECODE_20_ BGACK_000 A_DECODE_19_ CLK_030 A_DECODE_18_ CLK_000 A_DECODE_17_ CLK_OSZI A_DECODE_16_ CLK_DIV_OUT A_DECODE_15_ CLK_EXP A_DECODE_14_ FPU_CS A_DECODE_13_ FPU_SENSE A_DECODE_12_ DSACK1 A_DECODE_11_ DTACK A_DECODE_10_ AVEC A_DECODE_9_ E A_DECODE_8_ VPA A_DECODE_7_ VMA A_DECODE_6_ RST A_DECODE_5_ RESET A_DECODE_4_ RW A_DECODE_3_ AMIGA_ADDR_ENABLE A_DECODE_2_ AMIGA_BUS_DATA_DIR A_0_ AMIGA_BUS_ENABLE_LOW IPL_030_1_ AMIGA_BUS_ENABLE_HIGH IPL_030_0_ CIIN IPL_1_ IPL_0_ FC_0_ A_1_ +#$ NODES 653 N_28 ipl_030_0_0__un1_n N_17 N_190_i ipl_030_0_0__un0_n N_23 N_188_i ipl_030_0_2__un3_n N_6 N_189_i \ +# ipl_030_0_2__un1_n un1_amiga_bus_enable_low_i N_173_0 ipl_030_0_2__un0_n un21_fpu_cs_i N_170_0 ds_000_dma_0_un3_n UDS_000_INT_i N_255_i ds_000_dma_0_un1_n \ +# LDS_000_INT_i N_256_i ds_000_dma_0_un0_n inst_BGACK_030_INTreg AS_030_i N_161_i dsack1_int_0_un3_n vcc_n_n AS_000_INT_i VMA_INT_i \ +# dsack1_int_0_un1_n inst_VMA_INTreg RESET_OUT_i N_152_i dsack1_int_0_un0_n gnd_n_n sm_amiga_i_3__n N_151_0 as_000_int_0_un3_n un1_amiga_bus_enable_low \ +# sm_amiga_i_0__n N_251_i as_000_int_0_un1_n un6_as_030 cpu_est_i_1__n N_250_i as_000_int_0_un0_n un3_size cpu_est_i_3__n N_147_i \ +# as_030_000_sync_0_un3_n un4_size VPA_D_i N_146_i as_030_000_sync_0_un1_n un4_uds_000 rst_dly_i_0__n N_145_i as_030_000_sync_0_un0_n un4_lds_000 \ +# rst_dly_i_1__n N_397_i a_decode_15__n un4_as_000 cpu_est_i_0__n N_142_0 un10_ciin clk_000_d_i_1__n N_136_i a_decode_14__n \ +# un21_fpu_cs cpu_est_i_2__n N_248_i un22_berr DTACK_D0_i N_227_i a_decode_13__n un6_ds_030 clk_000_d_i_9__n N_226_i \ +# cpu_est_3_ N_258_i_0 N_291_i a_decode_12__n cpu_est_0_ rst_dly_i_2__n N_224_i cpu_est_1_ FPU_SENSE_i N_225_i \ +# a_decode_11__n cpu_est_2_ AS_030_000_SYNC_i N_230_i inst_AS_000_INT sm_amiga_i_i_7__n N_267_i a_decode_10__n inst_AMIGA_BUS_ENABLE_DMA_LOW BGACK_030_INT_i \ +# cpu_est_2_0_2__n inst_AS_030_D0 AMIGA_BUS_ENABLE_DMA_LOW_i N_222_i a_decode_9__n inst_AS_030_000_SYNC N_102_i N_223_i inst_BGACK_030_INT_D N_103_i \ +# cpu_est_2_0_1__n a_decode_8__n inst_AS_000_DMA size_dma_i_1__n N_221_i inst_DS_000_DMA size_dma_i_0__n N_220_i a_decode_7__n CYCLE_DMA_0_ \ +# RW_000_i pos_clk_un9_clk_000_pe_0_n CYCLE_DMA_1_ a_i_1__n N_216_i a_decode_6__n SIZE_DMA_0_ N_124_i N_215_i SIZE_DMA_1_ \ +# CLK_030_i a_decode_5__n inst_VPA_D clk_000_d_i_0__n N_199_i inst_UDS_000_INT clk_000_d_i_8__n N_198_i a_decode_4__n inst_LDS_000_INT \ +# AS_000_DMA_i sm_amiga_nss_0_6__n inst_CLK_OUT_PRE_D AS_000_i N_21_i a_decode_3__n CLK_000_D_8_ CLK_030_H_i N_39_0 CLK_000_D_9_ \ +# AS_030_D0_i nEXP_SPACE_c_i a_decode_2__n inst_DTACK_D0 cycle_dma_i_0__n un1_as_030_i inst_RESET_OUT a_decode_i_16__n N_133_0 CLK_000_D_1_ \ +# a_decode_i_18__n N_214_i CLK_000_D_0_ a_decode_i_19__n N_213_i inst_CLK_OUT_PRE_50 ahigh_i_30__n N_306_0 inst_CLK_OUT_PRE_25 ahigh_i_31__n \ +# N_26_i IPL_D0_0_ ahigh_i_28__n N_34_0 IPL_D0_1_ ahigh_i_29__n BG_030_c_i IPL_D0_2_ ahigh_i_26__n pos_clk_un6_bg_030_i_n \ +# CLK_000_D_2_ ahigh_i_27__n pos_clk_un9_bg_030_0_n CLK_000_D_3_ ahigh_i_24__n N_25_i CLK_000_D_4_ ahigh_i_25__n N_35_0 CLK_000_D_5_ \ +# N_244_i N_24_i CLK_000_D_6_ N_245_i N_36_0 CLK_000_D_7_ N_246_i N_22_i CLK_000_D_10_ N_38_0 \ +# pos_clk_un6_bg_030_n N_85_i N_19_i inst_AMIGA_BUS_ENABLE_DMA_HIGH N_86_i N_41_0 inst_DSACK1_INTreg un6_ds_030_i N_18_i pos_clk_ipl_n \ +# DS_000_DMA_i N_42_0 inst_DS_000_ENABLE un4_as_000_i N_10_i SM_AMIGA_6_ un6_as_030_i N_44_0 SM_AMIGA_4_ un4_lds_000_i \ +# N_311_0 SM_AMIGA_0_ un4_uds_000_i un10_ciin_i inst_RW_000_INT AS_030_c N_310_0 inst_RW_000_DMA N_207_i RST_DLY_0_ \ +# AS_000_c N_208_i RST_DLY_1_ AMIGA_BUS_DATA_DIR_c_0 RST_DLY_2_ RW_000_c N_209_i inst_A0_DMA pos_clk_size_dma_6_0_0__n inst_CLK_030_H \ +# N_210_i SM_AMIGA_1_ UDS_000_c pos_clk_size_dma_6_0_1__n SM_AMIGA_5_ N_268_i SM_AMIGA_3_ LDS_000_c pos_clk_un6_bgack_000_0_n SM_AMIGA_2_ \ +# un1_SM_AMIGA_0_sqmuxa_1_0 pos_clk_un3_as_030_d0_n size_c_0__n RW_c_i pos_clk_ds_000_dma_4_n pos_clk_rw_000_int_5_0_n N_3 size_c_1__n UDS_000_c_i N_4 \ +# LDS_000_c_i N_5 ahigh_c_24__n N_164_i N_7 N_8 ahigh_c_25__n N_113_i N_195_i ahigh_c_26__n \ +# N_174_0 N_169_i ahigh_c_27__n N_260_i N_168_i N_27 ahigh_c_28__n pos_clk_un3_as_030_d0_i_n N_29 pos_clk_un21_bgack_030_int_i_0_0_n \ +# CLK_OUT_PRE_25_0 ahigh_c_29__n CLK_OUT_PRE_D_i N_143_0 ahigh_c_30__n N_396_i N_137_i ahigh_c_31__n N_372_i N_236_i \ +# N_237_i N_280_0 N_281_0 N_229_i N_66_0 N_371_i N_305_0 N_212_i N_307_0 N_211_i \ +# pos_clk_ds_000_dma_4_0_n N_205_i N_206_i sm_amiga_nss_0_2__n N_200_i sm_amiga_nss_0_5__n N_197_i N_29_i SM_AMIGA_i_7_ N_33_0 \ +# N_27_i N_31_0 ipl_c_i_2__n N_54_0 ipl_c_i_1__n N_53_0 N_113 a_decode_c_16__n ipl_c_i_0__n G_117 \ +# N_52_0 G_118 a_decode_c_17__n N_3_i G_119 N_50_0 pos_clk_un21_bgack_030_int_i_0_n a_decode_c_18__n N_4_i N_280 \ +# N_49_0 N_281 a_decode_c_19__n N_5_i N_85 N_48_0 N_86 a_decode_c_20__n N_7_i N_305 \ +# N_47_0 a_decode_c_21__n N_8_i N_307 N_46_0 N_310 a_decode_c_22__n sm_amiga_nss_i_0_1_0__n N_66 sm_amiga_nss_i_0_2_0__n \ +# a_decode_c_23__n sm_amiga_nss_i_0_3_0__n N_136 sm_amiga_nss_i_0_4_0__n N_137 a_c_0__n sm_amiga_nss_i_0_5_0__n N_143 N_373_i_1 N_147 \ +# a_c_1__n pos_clk_un10_sm_amiga_i_1_n N_161 N_124_1 nEXP_SPACE_c N_124_2 N_174 N_124_3 N_178 BERR_c \ +# N_124_4 N_184 un10_ciin_1 N_190 BG_030_c un10_ciin_2 N_193 un10_ciin_3 N_195 BG_000DFFreg \ +# un10_ciin_4 N_197 un10_ciin_5 N_200 un10_ciin_6 N_205 BGACK_000_c un10_ciin_7 N_206 un10_ciin_8 \ +# N_208 CLK_030_c un10_ciin_9 N_211 un10_ciin_10 N_212 un10_ciin_11 N_213 pos_clk_un21_bgack_030_int_i_0_0_1_n N_223 \ +# CLK_OSZI_c pos_clk_un21_bgack_030_int_i_0_0_2_n N_229 N_309_i_1 N_236 N_309_i_2 N_237 CLK_OUT_INTreg N_229_1 N_243 \ +# N_229_2 N_396 N_214_1_0 N_250 FPU_SENSE_c un21_fpu_cs_1 N_253 un22_berr_1_0 N_254 IPL_030DFF_0_reg \ +# N_255_1 N_257 N_255_2 N_259 IPL_030DFF_1_reg N_151_0_1 N_260 N_277_i_1 pos_clk_un21_bgack_030_int_i_0_o2_2_x2 IPL_030DFF_2_reg \ +# N_277_i_2 pos_clk_CYCLE_DMA_5_1_i_0_x2 N_276_i_1 un22_berr_1 ipl_c_0__n N_276_i_2 N_124 N_221_1 N_164 ipl_c_1__n \ +# N_221_2 pos_clk_rw_000_int_5_n N_220_1 un1_SM_AMIGA_0_sqmuxa_1 ipl_c_2__n N_220_2 pos_clk_un6_bgack_000_n N_194_1 N_268 N_194_2 \ +# pos_clk_size_dma_6_1__n DTACK_c N_194_3 N_210 N_278_i_1 pos_clk_size_dma_6_0__n N_307_0_1 N_209 N_308_i_1 N_207 \ +# VPA_c N_40_i_1 N_311 N_250_1 N_102 N_223_1 N_103 RST_c pos_clk_un6_bg_030_1_n N_228 \ +# N_213_1 pos_clk_a0_dma_3_n N_208_1 N_10 RW_c N_205_1 N_18 N_193_1 N_19 fc_c_0__n \ +# N_190_1 N_22 N_184_1 N_24 fc_c_1__n pos_clk_ipl_1_n N_25 ipl_030_0_1__un3_n pos_clk_un9_bg_030_n ipl_030_0_1__un1_n \ +# N_26 AMIGA_BUS_DATA_DIR_c ipl_030_0_1__un0_n N_214 uds_000_int_0_un3_n N_214_1 uds_000_int_0_un1_n N_21 uds_000_int_0_un0_n pos_clk_un9_clk_000_pe_n \ +# lds_000_int_0_un3_n cpu_est_2_1__n N_23_i lds_000_int_0_un1_n cpu_est_2_2__n N_37_0 lds_000_int_0_un0_n N_185 N_17_i ds_000_enable_0_un3_n \ +# N_142 N_43_0 ds_000_enable_0_un1_n N_258 VPA_c_i ds_000_enable_0_un0_n N_186 N_55_0 vma_int_0_un3_n N_188 \ +# DTACK_c_i vma_int_0_un1_n N_189 N_56_0 vma_int_0_un0_n N_266 N_28_i cpu_est_0_1__un3_n N_198 N_32_0 \ +# cpu_est_0_1__un1_n N_261 a_c_i_0__n cpu_est_0_1__un0_n N_199 size_c_i_1__n cpu_est_0_2__un3_n N_215 pos_clk_un10_sm_amiga_i_n cpu_est_0_2__un1_n \ +# N_216 N_201_i cpu_est_0_2__un0_n N_222 N_202_i cpu_est_0_3__un3_n N_224 sm_amiga_nss_0_4__n cpu_est_0_3__un1_n N_146 \ +# N_204_i cpu_est_0_3__un0_n N_225 N_203_i amiga_bus_enable_dma_high_0_un3_n N_173 sm_amiga_nss_0_3__n amiga_bus_enable_dma_high_0_un1_n N_226 N_45_i \ +# amiga_bus_enable_dma_high_0_un0_n N_170 un1_SM_AMIGA_0_sqmuxa_2_i amiga_bus_enable_dma_low_0_un3_n N_227 N_279_0 amiga_bus_enable_dma_low_0_un1_n N_145 N_235_i amiga_bus_enable_dma_low_0_un0_n \ +# N_151 N_234_i a0_dma_0_un3_n N_397 N_58_0 a0_dma_0_un1_n N_251 N_243_i a0_dma_0_un0_n N_255 \ +# N_254_i rw_000_dma_0_un3_n N_256 N_144_0 rw_000_dma_0_un1_n N_267 N_249_i rw_000_dma_0_un0_n N_221 N_247_i \ +# rw_000_int_0_un3_n N_220 sm_amiga_nss_0_7__n rw_000_int_0_un1_n N_194 sm_amiga_i_4__n rw_000_int_0_un0_n N_373 N_252_i bgack_030_int_0_un3_n \ +# N_398 N_153_0 bgack_030_int_0_un1_n N_191 sm_amiga_i_6__n bgack_030_int_0_un0_n N_192 sm_amiga_i_2__n bg_000_0_un3_n N_172 \ +# N_373_i bg_000_0_un1_n N_171 N_171_0 bg_000_0_un0_n N_153 N_253_i size_dma_0_1__un3_n N_252 N_172_0 \ +# size_dma_0_1__un1_n N_247 N_192_i size_dma_0_1__un0_n N_249 N_191_i size_dma_0_0__un3_n N_144 N_193_i size_dma_0_0__un1_n \ +# N_234 N_398_i size_dma_0_0__un0_n N_235 N_261_i un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un3_n N_279 N_194_i un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un1_n un1_SM_AMIGA_0_sqmuxa_2 \ +# sm_amiga_nss_i_0_0__n un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un0_n N_203 as_000_dma_0_un3_n N_204 N_186_i as_000_dma_0_un1_n N_201 N_185_i as_000_dma_0_un0_n \ +# N_202 N_184_i ipl_030_0_0__un3_n .model bus68030 .inputs A_DECODE_23_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF \ FPU_SENSE.BLIF DTACK.BLIF VPA.BLIF RST.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF A_DECODE_20_.BLIF A_DECODE_19_.BLIF A_DECODE_18_.BLIF \ A_DECODE_17_.BLIF A_DECODE_16_.BLIF A_DECODE_15_.BLIF A_DECODE_14_.BLIF A_DECODE_13_.BLIF A_DECODE_12_.BLIF A_DECODE_11_.BLIF A_DECODE_10_.BLIF A_DECODE_9_.BLIF \ A_DECODE_8_.BLIF A_DECODE_7_.BLIF A_DECODE_6_.BLIF A_DECODE_5_.BLIF A_DECODE_4_.BLIF A_DECODE_3_.BLIF A_DECODE_2_.BLIF IPL_1_.BLIF IPL_0_.BLIF \ - FC_0_.BLIF A_1_.BLIF SIZE_1_.BLIF AHIGH_31_.BLIF AS_030.BLIF AS_000.BLIF RW_000.BLIF UDS_000.BLIF LDS_000.BLIF BERR.BLIF RW.BLIF SIZE_0_.BLIF AHIGH_30_.BLIF AHIGH_29_.BLIF AHIGH_28_.BLIF AHIGH_27_.BLIF AHIGH_26_.BLIF AHIGH_25_.BLIF AHIGH_24_.BLIF A_0_.BLIF N_28.BLIF N_246_i.BLIF bgack_030_int_0_un1_n.BLIF N_17.BLIF sm_amiga_nss_i_0_0__n.BLIF bgack_030_int_0_un0_n.BLIF N_19.BLIF \ - dsack1_int_0_un3_n.BLIF N_23.BLIF N_220_i.BLIF dsack1_int_0_un1_n.BLIF N_24.BLIF N_219_i.BLIF dsack1_int_0_un0_n.BLIF N_25.BLIF N_218_i.BLIF \ - cpu_est_0_3__un3_n.BLIF un1_amiga_bus_enable_low_i.BLIF cpu_est_0_3__un1_n.BLIF un21_fpu_cs_i.BLIF N_224_i.BLIF cpu_est_0_3__un0_n.BLIF inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i.BLIF N_222_i.BLIF \ - cpu_est_0_2__un3_n.BLIF vcc_n_n.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF N_223_i.BLIF cpu_est_0_2__un1_n.BLIF inst_VMA_INTreg.BLIF UDS_000_INT_i.BLIF N_322_i.BLIF cpu_est_0_2__un0_n.BLIF \ - gnd_n_n.BLIF LDS_000_INT_i.BLIF N_312_i.BLIF cpu_est_0_1__un3_n.BLIF un1_amiga_bus_enable_low.BLIF N_131_i.BLIF N_139_0.BLIF cpu_est_0_1__un1_n.BLIF un6_as_030.BLIF \ - N_132_i.BLIF N_108_i.BLIF cpu_est_0_1__un0_n.BLIF un3_size.BLIF RW_000_i.BLIF N_258_i.BLIF vma_int_0_un3_n.BLIF un4_size.BLIF a_i_1__n.BLIF \ - N_257_i.BLIF vma_int_0_un1_n.BLIF un4_uds_000.BLIF clk_000_d_i_11__n.BLIF vma_int_0_un0_n.BLIF un4_lds_000.BLIF sm_amiga_i_6__n.BLIF N_245_i.BLIF ipl_030_0_0__un3_n.BLIF \ - un4_as_000.BLIF clk_000_d_i_1__n.BLIF nEXP_SPACE_c_i.BLIF ipl_030_0_0__un1_n.BLIF un10_ciin.BLIF AS_030_000_SYNC_i.BLIF un1_as_030_i.BLIF ipl_030_0_0__un0_n.BLIF un21_fpu_cs.BLIF \ - sm_amiga_i_0__n.BLIF pos_clk_un3_as_030_d0_0_n.BLIF ds_000_dma_0_un3_n.BLIF un22_berr.BLIF sm_amiga_i_3__n.BLIF N_107_0.BLIF ds_000_dma_0_un1_n.BLIF un6_ds_030.BLIF sm_amiga_i_i_7__n.BLIF \ - N_115_i.BLIF ds_000_dma_0_un0_n.BLIF cpu_est_3_.BLIF sm_amiga_i_5__n.BLIF N_63_0.BLIF as_000_dma_0_un3_n.BLIF cpu_est_0_.BLIF rst_dly_i_0__n.BLIF N_278_0.BLIF \ - as_000_dma_0_un1_n.BLIF cpu_est_1_.BLIF rst_dly_i_1__n.BLIF N_279_0.BLIF as_000_dma_0_un0_n.BLIF cpu_est_2_.BLIF N_364_i_0.BLIF N_260_i.BLIF a_decode_15__n.BLIF \ - inst_AS_000_INT.BLIF cpu_est_i_0__n.BLIF N_67_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF rst_dly_i_2__n.BLIF pos_clk_rw_000_int_5_0_n.BLIF a_decode_14__n.BLIF inst_AS_030_D0.BLIF AS_030_i.BLIF \ - un1_SM_AMIGA_0_sqmuxa_1_0.BLIF inst_AS_030_000_SYNC.BLIF FPU_SENSE_i.BLIF un10_ciin_i.BLIF a_decode_13__n.BLIF inst_BGACK_030_INT_D.BLIF N_157_i.BLIF N_313_0.BLIF inst_AS_000_DMA.BLIF \ - a_decode_i_16__n.BLIF N_4_i.BLIF a_decode_12__n.BLIF inst_DS_000_DMA.BLIF a_decode_i_18__n.BLIF N_48_0.BLIF CYCLE_DMA_0_.BLIF a_decode_i_19__n.BLIF N_5_i.BLIF \ - a_decode_11__n.BLIF CYCLE_DMA_1_.BLIF N_113_i.BLIF N_47_0.BLIF SIZE_DMA_0_.BLIF N_114_i.BLIF N_7_i.BLIF a_decode_10__n.BLIF SIZE_DMA_1_.BLIF \ - AS_000_INT_i.BLIF N_46_0.BLIF inst_VPA_D.BLIF size_dma_i_1__n.BLIF N_18_i.BLIF a_decode_9__n.BLIF inst_UDS_000_INT.BLIF size_dma_i_0__n.BLIF N_41_0.BLIF \ - inst_LDS_000_INT.BLIF RESET_OUT_i.BLIF N_22_i.BLIF a_decode_8__n.BLIF inst_CLK_OUT_PRE_D.BLIF cpu_est_i_1__n.BLIF N_37_0.BLIF CLK_000_D_1_.BLIF cpu_est_i_2__n.BLIF \ - N_26_i.BLIF a_decode_7__n.BLIF CLK_000_D_10_.BLIF VPA_D_i.BLIF N_33_0.BLIF CLK_000_D_11_.BLIF DTACK_D0_i.BLIF BG_030_c_i.BLIF a_decode_6__n.BLIF \ - inst_DTACK_D0.BLIF cpu_est_i_3__n.BLIF pos_clk_un6_bg_030_i_n.BLIF inst_RESET_OUT.BLIF CLK_030_i.BLIF pos_clk_un9_bg_030_0_n.BLIF a_decode_5__n.BLIF CLK_000_D_0_.BLIF clk_000_d_i_0__n.BLIF \ - N_10_i.BLIF inst_CLK_OUT_PRE_50.BLIF clk_000_d_i_10__n.BLIF N_43_0.BLIF a_decode_4__n.BLIF IPL_D0_0_.BLIF AS_000_DMA_i.BLIF VPA_c_i.BLIF IPL_D0_1_.BLIF \ - AS_000_i.BLIF N_54_0.BLIF a_decode_3__n.BLIF IPL_D0_2_.BLIF CLK_030_H_i.BLIF un3_as_030_i.BLIF CLK_000_D_2_.BLIF cycle_dma_i_0__n.BLIF N_370_i.BLIF \ - a_decode_2__n.BLIF CLK_000_D_3_.BLIF AS_030_D0_i.BLIF pos_clk_un6_bgack_000_0_n.BLIF CLK_000_D_4_.BLIF ahigh_i_30__n.BLIF N_283_i.BLIF CLK_000_D_5_.BLIF ahigh_i_31__n.BLIF \ - pos_clk_size_dma_6_0_0__n.BLIF CLK_000_D_6_.BLIF ahigh_i_28__n.BLIF N_345_i.BLIF CLK_000_D_7_.BLIF ahigh_i_29__n.BLIF pos_clk_size_dma_6_0_1__n.BLIF CLK_000_D_8_.BLIF ahigh_i_26__n.BLIF \ - UDS_000_c_i.BLIF CLK_000_D_9_.BLIF ahigh_i_27__n.BLIF LDS_000_c_i.BLIF CLK_000_D_12_.BLIF ahigh_i_24__n.BLIF N_171_i.BLIF pos_clk_un6_bg_030_n.BLIF ahigh_i_25__n.BLIF \ - N_21_i.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF N_241_i.BLIF N_38_0.BLIF inst_DSACK1_INTreg.BLIF N_242_i.BLIF DTACK_c_i.BLIF pos_clk_ipl_n.BLIF N_243_i.BLIF \ - N_55_0.BLIF inst_DS_000_ENABLE.BLIF N_249_i.BLIF SM_AMIGA_6_.BLIF un6_ds_030_i.BLIF N_248_i.BLIF SM_AMIGA_0_.BLIF DS_000_DMA_i.BLIF pos_clk_un9_clk_000_pe_0_n.BLIF \ - SM_AMIGA_4_.BLIF un4_as_000_i.BLIF N_250_i.BLIF inst_RW_000_INT.BLIF un6_as_030_i.BLIF N_251_i.BLIF inst_RW_000_DMA.BLIF un4_lds_000_i.BLIF cpu_est_2_0_1__n.BLIF \ - RST_DLY_0_.BLIF un4_uds_000_i.BLIF N_253_i.BLIF RST_DLY_1_.BLIF AS_030_c.BLIF N_369_i.BLIF RST_DLY_2_.BLIF cpu_est_2_0_2__n.BLIF inst_A0_DMA.BLIF \ - AS_000_c.BLIF N_254_i.BLIF inst_CLK_030_H.BLIF N_316_i.BLIF SM_AMIGA_1_.BLIF RW_000_c.BLIF N_256_i.BLIF SM_AMIGA_5_.BLIF N_255_i.BLIF \ - SM_AMIGA_3_.BLIF N_317_i.BLIF SM_AMIGA_2_.BLIF UDS_000_c.BLIF N_267_i.BLIF pos_clk_ds_000_dma_4_n.BLIF N_266_i.BLIF N_3.BLIF LDS_000_c.BLIF \ - N_57_0.BLIF N_8.BLIF N_151_0.BLIF size_c_0__n.BLIF N_321_i.BLIF N_158_i.BLIF size_c_1__n.BLIF VMA_INT_i.BLIF N_361_i.BLIF \ - ahigh_c_24__n.BLIF N_362_i.BLIF N_27.BLIF N_169_i.BLIF ahigh_c_25__n.BLIF N_186_0.BLIF N_195_0.BLIF ahigh_c_26__n.BLIF N_196_0.BLIF \ - ahigh_c_27__n.BLIF N_263_i.BLIF N_262_i.BLIF ahigh_c_28__n.BLIF N_323_0.BLIF N_101_i.BLIF ahigh_c_29__n.BLIF N_366_i.BLIF N_182_i.BLIF \ - ahigh_c_30__n.BLIF pos_clk_un23_bgack_030_int_i_0_0_n.BLIF N_310_i.BLIF ahigh_c_31__n.BLIF N_359_i.BLIF N_144_0.BLIF CLK_OUT_PRE_D_i.BLIF N_142_0.BLIF N_311_i.BLIF \ - N_319_i.BLIF N_93_i.BLIF N_272_0.BLIF N_290_i.BLIF N_273_0.BLIF N_346_i.BLIF pos_clk_ds_000_dma_4_0_n.BLIF N_268_i.BLIF N_269_i.BLIF \ - SM_AMIGA_i_7_.BLIF sm_amiga_nss_0_3__n.BLIF N_341_i.BLIF N_238_i.BLIF N_239_i.BLIF sm_amiga_nss_0_2__n.BLIF N_263.BLIF N_235_i.BLIF G_116.BLIF \ - N_236_i.BLIF G_117.BLIF sm_amiga_nss_0_4__n.BLIF G_118.BLIF N_234_i.BLIF pos_clk_un23_bgack_030_int_i_0_n.BLIF sm_amiga_nss_0_5__n.BLIF N_272.BLIF N_231_i.BLIF \ - N_273.BLIF N_232_i.BLIF sm_amiga_nss_0_6__n.BLIF N_313.BLIF N_230_i.BLIF a_decode_c_16__n.BLIF sm_amiga_nss_0_7__n.BLIF N_226_i.BLIF N_108.BLIF \ - a_decode_c_17__n.BLIF N_331_i.BLIF N_319.BLIF N_142.BLIF a_decode_c_18__n.BLIF un1_as_000_i.BLIF N_144.BLIF N_27_i.BLIF N_322.BLIF \ - a_decode_c_19__n.BLIF N_30_0.BLIF N_169.BLIF ipl_c_i_0__n.BLIF N_195.BLIF a_decode_c_20__n.BLIF N_51_0.BLIF N_323.BLIF N_3_i.BLIF \ - N_209.BLIF a_decode_c_21__n.BLIF N_49_0.BLIF N_218.BLIF N_8_i.BLIF N_224.BLIF a_decode_c_22__n.BLIF N_45_0.BLIF N_226.BLIF \ - sm_amiga_nss_i_0_1_0__n.BLIF N_331.BLIF a_decode_c_23__n.BLIF sm_amiga_nss_i_0_2_0__n.BLIF N_229.BLIF sm_amiga_nss_i_0_3_0__n.BLIF N_230.BLIF a_c_0__n.BLIF sm_amiga_nss_i_0_4_0__n.BLIF \ - N_231.BLIF sm_amiga_nss_i_0_5_0__n.BLIF N_232.BLIF a_c_1__n.BLIF pos_clk_un10_sm_amiga_i_1_n.BLIF N_233.BLIF un10_ciin_1.BLIF N_234.BLIF nEXP_SPACE_c.BLIF \ - un10_ciin_2.BLIF N_235.BLIF un10_ciin_3.BLIF N_236.BLIF BERR_c.BLIF un10_ciin_4.BLIF N_238.BLIF un10_ciin_5.BLIF N_239.BLIF \ - BG_030_c.BLIF un10_ciin_6.BLIF N_240.BLIF un10_ciin_7.BLIF N_251.BLIF BG_000DFFreg.BLIF un10_ciin_8.BLIF N_262.BLIF un10_ciin_9.BLIF \ - N_341.BLIF un10_ciin_10.BLIF N_268.BLIF BGACK_000_c.BLIF un10_ciin_11.BLIF N_269.BLIF pos_clk_un23_bgack_030_int_i_0_0_1_n.BLIF N_282.BLIF CLK_030_c.BLIF \ - pos_clk_un23_bgack_030_int_i_0_0_2_n.BLIF N_346.BLIF N_60_i_1.BLIF N_290.BLIF N_60_i_2.BLIF N_310.BLIF N_248_1.BLIF N_311.BLIF CLK_OSZI_c.BLIF \ - N_248_2.BLIF N_355.BLIF N_249_1.BLIF N_356.BLIF N_249_2.BLIF N_359.BLIF CLK_OUT_INTreg.BLIF N_361_1.BLIF N_360.BLIF \ - N_361_2.BLIF N_365.BLIF N_157_1.BLIF N_366.BLIF FPU_SENSE_c.BLIF N_157_2.BLIF pos_clk_un23_bgack_030_int_i_0_o2_2_x2.BLIF N_157_3.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF \ - IPL_030DFF_0_reg.BLIF N_157_4.BLIF N_248.BLIF N_260_1.BLIF N_249.BLIF IPL_030DFF_1_reg.BLIF N_260_2.BLIF N_369.BLIF un21_fpu_cs_1.BLIF \ - N_196.BLIF IPL_030DFF_2_reg.BLIF un22_berr_1_0.BLIF N_186.BLIF N_275_i_1.BLIF N_361.BLIF ipl_c_0__n.BLIF N_275_i_2.BLIF N_362.BLIF \ - N_274_i_1.BLIF N_151.BLIF ipl_c_1__n.BLIF N_274_i_2.BLIF N_321.BLIF N_115_1.BLIF N_266.BLIF ipl_c_2__n.BLIF N_115_2.BLIF \ - N_267.BLIF N_332_1.BLIF N_255.BLIF N_246_1.BLIF N_256.BLIF DTACK_c.BLIF N_246_2.BLIF N_253.BLIF N_246_3.BLIF \ - N_254.BLIF N_246_4.BLIF cpu_est_2_2__n.BLIF N_332_4_1.BLIF cpu_est_2_1__n.BLIF VPA_c.BLIF N_332_4_2.BLIF N_250.BLIF N_273_0_1.BLIF \ - pos_clk_un9_clk_000_pe_n.BLIF N_276_i_1.BLIF N_364.BLIF RST_c.BLIF N_277_i_1.BLIF N_21.BLIF N_314_i_1.BLIF N_171.BLIF N_356_1.BLIF \ - pos_clk_size_dma_6_1__n.BLIF RW_c.BLIF N_282_1.BLIF N_345.BLIF N_251_1.BLIF pos_clk_size_dma_6_0__n.BLIF fc_c_0__n.BLIF pos_clk_un6_bg_030_1_n.BLIF N_283.BLIF \ - N_240_1.BLIF pos_clk_un6_bgack_000_n.BLIF fc_c_1__n.BLIF N_238_1.BLIF N_370.BLIF N_233_1.BLIF N_259.BLIF N_231_1.BLIF N_10.BLIF \ - AMIGA_BUS_DATA_DIR_c.BLIF N_224_1.BLIF pos_clk_un9_bg_030_n.BLIF N_218_1.BLIF N_4.BLIF pos_clk_ipl_1_n.BLIF N_114.BLIF rw_000_dma_0_un3_n.BLIF N_278.BLIF \ - rw_000_dma_0_un1_n.BLIF N_5.BLIF N_25_i.BLIF rw_000_dma_0_un0_n.BLIF N_113.BLIF N_34_0.BLIF lds_000_int_0_un3_n.BLIF N_279.BLIF N_24_i.BLIF \ - lds_000_int_0_un1_n.BLIF N_6.BLIF N_35_0.BLIF lds_000_int_0_un0_n.BLIF N_115.BLIF N_23_i.BLIF ipl_030_0_1__un3_n.BLIF N_63.BLIF N_36_0.BLIF \ - ipl_030_0_1__un1_n.BLIF N_7.BLIF N_19_i.BLIF ipl_030_0_1__un0_n.BLIF pos_clk_un3_as_030_d0_n.BLIF N_40_0.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF N_67.BLIF N_17_i.BLIF \ - amiga_bus_enable_dma_high_0_un1_n.BLIF N_18.BLIF N_42_0.BLIF amiga_bus_enable_dma_high_0_un0_n.BLIF pos_clk_rw_000_int_5_n.BLIF ipl_c_i_1__n.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF N_52_0.BLIF \ - amiga_bus_enable_dma_low_0_un1_n.BLIF N_22.BLIF ipl_c_i_2__n.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF pos_clk_a0_dma_3_n.BLIF N_53_0.BLIF uds_000_int_0_un3_n.BLIF N_363.BLIF N_28_i.BLIF \ - uds_000_int_0_un1_n.BLIF N_26.BLIF N_31_0.BLIF uds_000_int_0_un0_n.BLIF N_157.BLIF N_29_i.BLIF ipl_030_0_2__un3_n.BLIF N_260.BLIF N_32_0.BLIF \ - ipl_030_0_2__un1_n.BLIF un22_berr_1.BLIF a_c_i_0__n.BLIF ipl_030_0_2__un0_n.BLIF N_219.BLIF size_c_i_1__n.BLIF un1_amiga_bus_enable_dma_high_i_m2_0__un3_n.BLIF N_139.BLIF pos_clk_un10_sm_amiga_i_n.BLIF \ - un1_amiga_bus_enable_dma_high_i_m2_0__un1_n.BLIF N_220.BLIF N_332_i.BLIF un1_amiga_bus_enable_dma_high_i_m2_0__un0_n.BLIF N_222.BLIF N_240_i.BLIF as_000_int_0_un3_n.BLIF N_223.BLIF N_315_0.BLIF \ - as_000_int_0_un1_n.BLIF N_368.BLIF N_281_0.BLIF as_000_int_0_un0_n.BLIF N_257.BLIF N_270_i.BLIF ds_000_enable_0_un3_n.BLIF N_258.BLIF N_282_i.BLIF \ - ds_000_enable_0_un1_n.BLIF N_312.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF ds_000_enable_0_un0_n.BLIF N_143.BLIF RW_c_i.BLIF as_030_000_sync_0_un3_n.BLIF N_332.BLIF N_140_0.BLIF \ - as_030_000_sync_0_un1_n.BLIF N_332_4.BLIF N_353_i.BLIF as_030_000_sync_0_un0_n.BLIF N_246.BLIF N_143_0.BLIF rw_000_int_0_un3_n.BLIF N_180.BLIF sm_amiga_i_1__n.BLIF \ - rw_000_int_0_un1_n.BLIF N_320.BLIF N_320_i.BLIF rw_000_int_0_un0_n.BLIF N_244.BLIF N_357_i.BLIF a0_dma_0_un3_n.BLIF N_334.BLIF N_356_i.BLIF \ - a0_dma_0_un1_n.BLIF N_335.BLIF N_156_0.BLIF a0_dma_0_un0_n.BLIF N_159.BLIF sm_amiga_i_4__n.BLIF bg_000_0_un3_n.BLIF N_156.BLIF N_159_i.BLIF \ - bg_000_0_un1_n.BLIF N_357.BLIF sm_amiga_i_2__n.BLIF bg_000_0_un0_n.BLIF N_353.BLIF N_180_i.BLIF size_dma_0_1__un3_n.BLIF N_140.BLIF N_334_i.BLIF \ - size_dma_0_1__un1_n.BLIF N_270.BLIF N_335_i.BLIF size_dma_0_1__un0_n.BLIF N_281.BLIF N_244_i.BLIF size_dma_0_0__un3_n.BLIF N_131.BLIF N_233_i.BLIF \ - size_dma_0_0__un1_n.BLIF N_132.BLIF N_355_i.BLIF size_dma_0_0__un0_n.BLIF N_29.BLIF N_229_i.BLIF bgack_030_int_0_un3_n.BLIF AS_030.PIN AS_000.PIN \ + FC_0_.BLIF A_1_.BLIF SIZE_1_.BLIF AHIGH_31_.BLIF AS_030.BLIF AS_000.BLIF RW_000.BLIF UDS_000.BLIF LDS_000.BLIF BERR.BLIF RW.BLIF SIZE_0_.BLIF AHIGH_30_.BLIF AHIGH_29_.BLIF AHIGH_28_.BLIF AHIGH_27_.BLIF AHIGH_26_.BLIF AHIGH_25_.BLIF AHIGH_24_.BLIF A_0_.BLIF N_28.BLIF ipl_030_0_0__un1_n.BLIF N_17.BLIF N_190_i.BLIF ipl_030_0_0__un0_n.BLIF N_23.BLIF N_188_i.BLIF \ + ipl_030_0_2__un3_n.BLIF N_6.BLIF N_189_i.BLIF ipl_030_0_2__un1_n.BLIF un1_amiga_bus_enable_low_i.BLIF N_173_0.BLIF ipl_030_0_2__un0_n.BLIF un21_fpu_cs_i.BLIF N_170_0.BLIF \ + ds_000_dma_0_un3_n.BLIF UDS_000_INT_i.BLIF N_255_i.BLIF ds_000_dma_0_un1_n.BLIF LDS_000_INT_i.BLIF N_256_i.BLIF ds_000_dma_0_un0_n.BLIF inst_BGACK_030_INTreg.BLIF AS_030_i.BLIF \ + N_161_i.BLIF dsack1_int_0_un3_n.BLIF vcc_n_n.BLIF AS_000_INT_i.BLIF VMA_INT_i.BLIF dsack1_int_0_un1_n.BLIF inst_VMA_INTreg.BLIF RESET_OUT_i.BLIF N_152_i.BLIF \ + dsack1_int_0_un0_n.BLIF gnd_n_n.BLIF sm_amiga_i_3__n.BLIF N_151_0.BLIF as_000_int_0_un3_n.BLIF un1_amiga_bus_enable_low.BLIF sm_amiga_i_0__n.BLIF N_251_i.BLIF as_000_int_0_un1_n.BLIF \ + un6_as_030.BLIF cpu_est_i_1__n.BLIF N_250_i.BLIF as_000_int_0_un0_n.BLIF un3_size.BLIF cpu_est_i_3__n.BLIF N_147_i.BLIF as_030_000_sync_0_un3_n.BLIF un4_size.BLIF \ + VPA_D_i.BLIF N_146_i.BLIF as_030_000_sync_0_un1_n.BLIF un4_uds_000.BLIF rst_dly_i_0__n.BLIF N_145_i.BLIF as_030_000_sync_0_un0_n.BLIF un4_lds_000.BLIF rst_dly_i_1__n.BLIF \ + N_397_i.BLIF a_decode_15__n.BLIF un4_as_000.BLIF cpu_est_i_0__n.BLIF N_142_0.BLIF un10_ciin.BLIF clk_000_d_i_1__n.BLIF N_136_i.BLIF a_decode_14__n.BLIF \ + un21_fpu_cs.BLIF cpu_est_i_2__n.BLIF N_248_i.BLIF un22_berr.BLIF DTACK_D0_i.BLIF N_227_i.BLIF a_decode_13__n.BLIF un6_ds_030.BLIF clk_000_d_i_9__n.BLIF \ + N_226_i.BLIF cpu_est_3_.BLIF N_258_i_0.BLIF N_291_i.BLIF a_decode_12__n.BLIF cpu_est_0_.BLIF rst_dly_i_2__n.BLIF N_224_i.BLIF cpu_est_1_.BLIF \ + FPU_SENSE_i.BLIF N_225_i.BLIF a_decode_11__n.BLIF cpu_est_2_.BLIF AS_030_000_SYNC_i.BLIF N_230_i.BLIF inst_AS_000_INT.BLIF sm_amiga_i_i_7__n.BLIF N_267_i.BLIF \ + a_decode_10__n.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF BGACK_030_INT_i.BLIF cpu_est_2_0_2__n.BLIF inst_AS_030_D0.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF N_222_i.BLIF a_decode_9__n.BLIF inst_AS_030_000_SYNC.BLIF \ + N_102_i.BLIF N_223_i.BLIF inst_BGACK_030_INT_D.BLIF N_103_i.BLIF cpu_est_2_0_1__n.BLIF a_decode_8__n.BLIF inst_AS_000_DMA.BLIF size_dma_i_1__n.BLIF N_221_i.BLIF \ + inst_DS_000_DMA.BLIF size_dma_i_0__n.BLIF N_220_i.BLIF a_decode_7__n.BLIF CYCLE_DMA_0_.BLIF RW_000_i.BLIF pos_clk_un9_clk_000_pe_0_n.BLIF CYCLE_DMA_1_.BLIF a_i_1__n.BLIF \ + N_216_i.BLIF a_decode_6__n.BLIF SIZE_DMA_0_.BLIF N_124_i.BLIF N_215_i.BLIF SIZE_DMA_1_.BLIF CLK_030_i.BLIF a_decode_5__n.BLIF inst_VPA_D.BLIF \ + clk_000_d_i_0__n.BLIF N_199_i.BLIF inst_UDS_000_INT.BLIF clk_000_d_i_8__n.BLIF N_198_i.BLIF a_decode_4__n.BLIF inst_LDS_000_INT.BLIF AS_000_DMA_i.BLIF sm_amiga_nss_0_6__n.BLIF \ + inst_CLK_OUT_PRE_D.BLIF AS_000_i.BLIF N_21_i.BLIF a_decode_3__n.BLIF CLK_000_D_8_.BLIF CLK_030_H_i.BLIF N_39_0.BLIF CLK_000_D_9_.BLIF AS_030_D0_i.BLIF \ + nEXP_SPACE_c_i.BLIF a_decode_2__n.BLIF inst_DTACK_D0.BLIF cycle_dma_i_0__n.BLIF un1_as_030_i.BLIF inst_RESET_OUT.BLIF a_decode_i_16__n.BLIF N_133_0.BLIF CLK_000_D_1_.BLIF \ + a_decode_i_18__n.BLIF N_214_i.BLIF CLK_000_D_0_.BLIF a_decode_i_19__n.BLIF N_213_i.BLIF inst_CLK_OUT_PRE_50.BLIF ahigh_i_30__n.BLIF N_306_0.BLIF inst_CLK_OUT_PRE_25.BLIF \ + ahigh_i_31__n.BLIF N_26_i.BLIF IPL_D0_0_.BLIF ahigh_i_28__n.BLIF N_34_0.BLIF IPL_D0_1_.BLIF ahigh_i_29__n.BLIF BG_030_c_i.BLIF IPL_D0_2_.BLIF \ + ahigh_i_26__n.BLIF pos_clk_un6_bg_030_i_n.BLIF CLK_000_D_2_.BLIF ahigh_i_27__n.BLIF pos_clk_un9_bg_030_0_n.BLIF CLK_000_D_3_.BLIF ahigh_i_24__n.BLIF N_25_i.BLIF CLK_000_D_4_.BLIF \ + ahigh_i_25__n.BLIF N_35_0.BLIF CLK_000_D_5_.BLIF N_244_i.BLIF N_24_i.BLIF CLK_000_D_6_.BLIF N_245_i.BLIF N_36_0.BLIF CLK_000_D_7_.BLIF \ + N_246_i.BLIF N_22_i.BLIF CLK_000_D_10_.BLIF N_38_0.BLIF pos_clk_un6_bg_030_n.BLIF N_85_i.BLIF N_19_i.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF N_86_i.BLIF \ + N_41_0.BLIF inst_DSACK1_INTreg.BLIF un6_ds_030_i.BLIF N_18_i.BLIF pos_clk_ipl_n.BLIF DS_000_DMA_i.BLIF N_42_0.BLIF inst_DS_000_ENABLE.BLIF un4_as_000_i.BLIF \ + N_10_i.BLIF SM_AMIGA_6_.BLIF un6_as_030_i.BLIF N_44_0.BLIF SM_AMIGA_4_.BLIF un4_lds_000_i.BLIF N_311_0.BLIF SM_AMIGA_0_.BLIF un4_uds_000_i.BLIF \ + un10_ciin_i.BLIF inst_RW_000_INT.BLIF AS_030_c.BLIF N_310_0.BLIF inst_RW_000_DMA.BLIF N_207_i.BLIF RST_DLY_0_.BLIF AS_000_c.BLIF N_208_i.BLIF \ + RST_DLY_1_.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF RST_DLY_2_.BLIF RW_000_c.BLIF N_209_i.BLIF inst_A0_DMA.BLIF pos_clk_size_dma_6_0_0__n.BLIF inst_CLK_030_H.BLIF N_210_i.BLIF \ + SM_AMIGA_1_.BLIF UDS_000_c.BLIF pos_clk_size_dma_6_0_1__n.BLIF SM_AMIGA_5_.BLIF N_268_i.BLIF SM_AMIGA_3_.BLIF LDS_000_c.BLIF pos_clk_un6_bgack_000_0_n.BLIF SM_AMIGA_2_.BLIF \ + un1_SM_AMIGA_0_sqmuxa_1_0.BLIF pos_clk_un3_as_030_d0_n.BLIF size_c_0__n.BLIF RW_c_i.BLIF pos_clk_ds_000_dma_4_n.BLIF pos_clk_rw_000_int_5_0_n.BLIF N_3.BLIF size_c_1__n.BLIF UDS_000_c_i.BLIF \ + N_4.BLIF LDS_000_c_i.BLIF N_5.BLIF ahigh_c_24__n.BLIF N_164_i.BLIF N_7.BLIF N_8.BLIF ahigh_c_25__n.BLIF N_113_i.BLIF \ + N_195_i.BLIF ahigh_c_26__n.BLIF N_174_0.BLIF N_169_i.BLIF ahigh_c_27__n.BLIF N_260_i.BLIF N_168_i.BLIF N_27.BLIF ahigh_c_28__n.BLIF \ + pos_clk_un3_as_030_d0_i_n.BLIF N_29.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF CLK_OUT_PRE_25_0.BLIF ahigh_c_29__n.BLIF CLK_OUT_PRE_D_i.BLIF N_143_0.BLIF ahigh_c_30__n.BLIF N_396_i.BLIF \ + N_137_i.BLIF ahigh_c_31__n.BLIF N_372_i.BLIF N_236_i.BLIF N_237_i.BLIF N_280_0.BLIF N_281_0.BLIF N_229_i.BLIF N_66_0.BLIF \ + N_371_i.BLIF N_305_0.BLIF N_212_i.BLIF N_307_0.BLIF N_211_i.BLIF pos_clk_ds_000_dma_4_0_n.BLIF N_205_i.BLIF N_206_i.BLIF sm_amiga_nss_0_2__n.BLIF \ + N_200_i.BLIF sm_amiga_nss_0_5__n.BLIF N_197_i.BLIF N_29_i.BLIF SM_AMIGA_i_7_.BLIF N_33_0.BLIF N_27_i.BLIF N_31_0.BLIF ipl_c_i_2__n.BLIF \ + N_54_0.BLIF ipl_c_i_1__n.BLIF N_53_0.BLIF N_113.BLIF a_decode_c_16__n.BLIF ipl_c_i_0__n.BLIF G_117.BLIF N_52_0.BLIF G_118.BLIF \ + a_decode_c_17__n.BLIF N_3_i.BLIF G_119.BLIF N_50_0.BLIF pos_clk_un21_bgack_030_int_i_0_n.BLIF a_decode_c_18__n.BLIF N_4_i.BLIF N_280.BLIF N_49_0.BLIF \ + N_281.BLIF a_decode_c_19__n.BLIF N_5_i.BLIF N_85.BLIF N_48_0.BLIF N_86.BLIF a_decode_c_20__n.BLIF N_7_i.BLIF N_305.BLIF \ + N_47_0.BLIF a_decode_c_21__n.BLIF N_8_i.BLIF N_307.BLIF N_46_0.BLIF N_310.BLIF a_decode_c_22__n.BLIF sm_amiga_nss_i_0_1_0__n.BLIF N_66.BLIF \ + sm_amiga_nss_i_0_2_0__n.BLIF a_decode_c_23__n.BLIF sm_amiga_nss_i_0_3_0__n.BLIF N_136.BLIF sm_amiga_nss_i_0_4_0__n.BLIF N_137.BLIF a_c_0__n.BLIF sm_amiga_nss_i_0_5_0__n.BLIF N_143.BLIF \ + N_373_i_1.BLIF N_147.BLIF a_c_1__n.BLIF pos_clk_un10_sm_amiga_i_1_n.BLIF N_161.BLIF N_124_1.BLIF nEXP_SPACE_c.BLIF N_124_2.BLIF N_174.BLIF \ + N_124_3.BLIF N_178.BLIF BERR_c.BLIF N_124_4.BLIF N_184.BLIF un10_ciin_1.BLIF N_190.BLIF BG_030_c.BLIF un10_ciin_2.BLIF \ + N_193.BLIF un10_ciin_3.BLIF N_195.BLIF BG_000DFFreg.BLIF un10_ciin_4.BLIF N_197.BLIF un10_ciin_5.BLIF N_200.BLIF un10_ciin_6.BLIF \ + N_205.BLIF BGACK_000_c.BLIF un10_ciin_7.BLIF N_206.BLIF un10_ciin_8.BLIF N_208.BLIF CLK_030_c.BLIF un10_ciin_9.BLIF N_211.BLIF \ + un10_ciin_10.BLIF N_212.BLIF un10_ciin_11.BLIF N_213.BLIF pos_clk_un21_bgack_030_int_i_0_0_1_n.BLIF N_223.BLIF CLK_OSZI_c.BLIF pos_clk_un21_bgack_030_int_i_0_0_2_n.BLIF N_229.BLIF \ + N_309_i_1.BLIF N_236.BLIF N_309_i_2.BLIF N_237.BLIF CLK_OUT_INTreg.BLIF N_229_1.BLIF N_243.BLIF N_229_2.BLIF N_396.BLIF \ + N_214_1_0.BLIF N_250.BLIF FPU_SENSE_c.BLIF un21_fpu_cs_1.BLIF N_253.BLIF un22_berr_1_0.BLIF N_254.BLIF IPL_030DFF_0_reg.BLIF N_255_1.BLIF \ + N_257.BLIF N_255_2.BLIF N_259.BLIF IPL_030DFF_1_reg.BLIF N_151_0_1.BLIF N_260.BLIF N_277_i_1.BLIF pos_clk_un21_bgack_030_int_i_0_o2_2_x2.BLIF IPL_030DFF_2_reg.BLIF \ + N_277_i_2.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF N_276_i_1.BLIF un22_berr_1.BLIF ipl_c_0__n.BLIF N_276_i_2.BLIF N_124.BLIF N_221_1.BLIF N_164.BLIF \ + ipl_c_1__n.BLIF N_221_2.BLIF pos_clk_rw_000_int_5_n.BLIF N_220_1.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF ipl_c_2__n.BLIF N_220_2.BLIF pos_clk_un6_bgack_000_n.BLIF N_194_1.BLIF \ + N_268.BLIF N_194_2.BLIF pos_clk_size_dma_6_1__n.BLIF DTACK_c.BLIF N_194_3.BLIF N_210.BLIF N_278_i_1.BLIF pos_clk_size_dma_6_0__n.BLIF N_307_0_1.BLIF \ + N_209.BLIF N_308_i_1.BLIF N_207.BLIF VPA_c.BLIF N_40_i_1.BLIF N_311.BLIF N_250_1.BLIF N_102.BLIF N_223_1.BLIF \ + N_103.BLIF RST_c.BLIF pos_clk_un6_bg_030_1_n.BLIF N_228.BLIF N_213_1.BLIF pos_clk_a0_dma_3_n.BLIF N_208_1.BLIF N_10.BLIF RW_c.BLIF \ + N_205_1.BLIF N_18.BLIF N_193_1.BLIF N_19.BLIF fc_c_0__n.BLIF N_190_1.BLIF N_22.BLIF N_184_1.BLIF N_24.BLIF \ + fc_c_1__n.BLIF pos_clk_ipl_1_n.BLIF N_25.BLIF ipl_030_0_1__un3_n.BLIF pos_clk_un9_bg_030_n.BLIF ipl_030_0_1__un1_n.BLIF N_26.BLIF AMIGA_BUS_DATA_DIR_c.BLIF ipl_030_0_1__un0_n.BLIF \ + N_214.BLIF uds_000_int_0_un3_n.BLIF N_214_1.BLIF uds_000_int_0_un1_n.BLIF N_21.BLIF uds_000_int_0_un0_n.BLIF pos_clk_un9_clk_000_pe_n.BLIF lds_000_int_0_un3_n.BLIF cpu_est_2_1__n.BLIF \ + N_23_i.BLIF lds_000_int_0_un1_n.BLIF cpu_est_2_2__n.BLIF N_37_0.BLIF lds_000_int_0_un0_n.BLIF N_185.BLIF N_17_i.BLIF ds_000_enable_0_un3_n.BLIF N_142.BLIF \ + N_43_0.BLIF ds_000_enable_0_un1_n.BLIF N_258.BLIF VPA_c_i.BLIF ds_000_enable_0_un0_n.BLIF N_186.BLIF N_55_0.BLIF vma_int_0_un3_n.BLIF N_188.BLIF \ + DTACK_c_i.BLIF vma_int_0_un1_n.BLIF N_189.BLIF N_56_0.BLIF vma_int_0_un0_n.BLIF N_266.BLIF N_28_i.BLIF cpu_est_0_1__un3_n.BLIF N_198.BLIF \ + N_32_0.BLIF cpu_est_0_1__un1_n.BLIF N_261.BLIF a_c_i_0__n.BLIF cpu_est_0_1__un0_n.BLIF N_199.BLIF size_c_i_1__n.BLIF cpu_est_0_2__un3_n.BLIF N_215.BLIF \ + pos_clk_un10_sm_amiga_i_n.BLIF cpu_est_0_2__un1_n.BLIF N_216.BLIF N_201_i.BLIF cpu_est_0_2__un0_n.BLIF N_222.BLIF N_202_i.BLIF cpu_est_0_3__un3_n.BLIF N_224.BLIF \ + sm_amiga_nss_0_4__n.BLIF cpu_est_0_3__un1_n.BLIF N_146.BLIF N_204_i.BLIF cpu_est_0_3__un0_n.BLIF N_225.BLIF N_203_i.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF N_173.BLIF \ + sm_amiga_nss_0_3__n.BLIF amiga_bus_enable_dma_high_0_un1_n.BLIF N_226.BLIF N_45_i.BLIF amiga_bus_enable_dma_high_0_un0_n.BLIF N_170.BLIF un1_SM_AMIGA_0_sqmuxa_2_i.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF N_227.BLIF \ + N_279_0.BLIF amiga_bus_enable_dma_low_0_un1_n.BLIF N_145.BLIF N_235_i.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF N_151.BLIF N_234_i.BLIF a0_dma_0_un3_n.BLIF N_397.BLIF \ + N_58_0.BLIF a0_dma_0_un1_n.BLIF N_251.BLIF N_243_i.BLIF a0_dma_0_un0_n.BLIF N_255.BLIF N_254_i.BLIF rw_000_dma_0_un3_n.BLIF N_256.BLIF \ + N_144_0.BLIF rw_000_dma_0_un1_n.BLIF N_267.BLIF N_249_i.BLIF rw_000_dma_0_un0_n.BLIF N_221.BLIF N_247_i.BLIF rw_000_int_0_un3_n.BLIF N_220.BLIF \ + sm_amiga_nss_0_7__n.BLIF rw_000_int_0_un1_n.BLIF N_194.BLIF sm_amiga_i_4__n.BLIF rw_000_int_0_un0_n.BLIF N_373.BLIF N_252_i.BLIF bgack_030_int_0_un3_n.BLIF N_398.BLIF \ + N_153_0.BLIF bgack_030_int_0_un1_n.BLIF N_191.BLIF sm_amiga_i_6__n.BLIF bgack_030_int_0_un0_n.BLIF N_192.BLIF sm_amiga_i_2__n.BLIF bg_000_0_un3_n.BLIF N_172.BLIF \ + N_373_i.BLIF bg_000_0_un1_n.BLIF N_171.BLIF N_171_0.BLIF bg_000_0_un0_n.BLIF N_153.BLIF N_253_i.BLIF size_dma_0_1__un3_n.BLIF N_252.BLIF \ + N_172_0.BLIF size_dma_0_1__un1_n.BLIF N_247.BLIF N_192_i.BLIF size_dma_0_1__un0_n.BLIF N_249.BLIF N_191_i.BLIF size_dma_0_0__un3_n.BLIF N_144.BLIF \ + N_193_i.BLIF size_dma_0_0__un1_n.BLIF N_234.BLIF N_398_i.BLIF size_dma_0_0__un0_n.BLIF N_235.BLIF N_261_i.BLIF un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un3_n.BLIF N_279.BLIF \ + N_194_i.BLIF un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un1_n.BLIF un1_SM_AMIGA_0_sqmuxa_2.BLIF sm_amiga_nss_i_0_0__n.BLIF un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un0_n.BLIF N_203.BLIF as_000_dma_0_un3_n.BLIF N_204.BLIF N_186_i.BLIF \ + as_000_dma_0_un1_n.BLIF N_201.BLIF N_185_i.BLIF as_000_dma_0_un0_n.BLIF N_202.BLIF N_184_i.BLIF ipl_030_0_0__un3_n.BLIF AS_030.PIN AS_000.PIN \ RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN \ AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN .outputs IPL_030_2_ DS_030 BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 AVEC E VMA \ RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_i_7_.D SM_AMIGA_i_7_.C SM_AMIGA_6_.D \ SM_AMIGA_6_.C SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_1_.D SM_AMIGA_1_.C \ SM_AMIGA_0_.D SM_AMIGA_0_.C cpu_est_2_.D cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C IPL_030DFF_0_reg.D IPL_030DFF_0_reg.C IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D \ - IPL_030DFF_2_reg.C IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D IPL_D0_1_.C IPL_D0_2_.D IPL_D0_2_.C CLK_000_D_6_.D CLK_000_D_6_.C CLK_000_D_7_.D CLK_000_D_7_.C \ - CLK_000_D_8_.D CLK_000_D_8_.C CLK_000_D_9_.D CLK_000_D_9_.C CLK_000_D_10_.D CLK_000_D_10_.C CLK_000_D_11_.D CLK_000_D_11_.C CLK_000_D_12_.D CLK_000_D_12_.C CYCLE_DMA_0_.D \ + IPL_030DFF_2_reg.C IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D IPL_D0_1_.C IPL_D0_2_.D IPL_D0_2_.C CLK_000_D_4_.D CLK_000_D_4_.C CLK_000_D_5_.D CLK_000_D_5_.C \ + CLK_000_D_6_.D CLK_000_D_6_.C CLK_000_D_7_.D CLK_000_D_7_.C CLK_000_D_8_.D CLK_000_D_8_.C CLK_000_D_9_.D CLK_000_D_9_.C CLK_000_D_10_.D CLK_000_D_10_.C CYCLE_DMA_0_.D \ CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C \ RST_DLY_1_.D RST_DLY_1_.C RST_DLY_2_.D RST_DLY_2_.C CLK_000_D_0_.D CLK_000_D_0_.C CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D \ - CLK_000_D_3_.C CLK_000_D_4_.D CLK_000_D_4_.C CLK_000_D_5_.D CLK_000_D_5_.C RST_DLY_0_.D RST_DLY_0_.C inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C \ + CLK_000_D_3_.C RST_DLY_0_.D RST_DLY_0_.C inst_LDS_000_INT.D inst_LDS_000_INT.C inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C \ inst_AS_000_INT.D inst_AS_000_INT.C inst_DSACK1_INTreg.D inst_DSACK1_INTreg.C inst_DS_000_DMA.D inst_DS_000_DMA.C inst_AS_030_D0.D inst_AS_030_D0.C inst_VPA_D.D inst_VPA_D.C inst_DTACK_D0.D \ - inst_DTACK_D0.C inst_CLK_030_H.D inst_CLK_030_H.C inst_RESET_OUT.D inst_RESET_OUT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C BG_000DFFreg.D BG_000DFFreg.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.C \ - inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.D inst_UDS_000_INT.C inst_A0_DMA.D inst_A0_DMA.C inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_DMA.D inst_RW_000_DMA.C inst_RW_000_INT.D \ - inst_RW_000_INT.C inst_LDS_000_INT.D inst_LDS_000_INT.C inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C \ - inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C G_118.X1 G_118.X2 G_117.X1 G_117.X2 pos_clk_CYCLE_DMA_5_1_i_0_x2.X1 pos_clk_CYCLE_DMA_5_1_i_0_x2.X2 pos_clk_un23_bgack_030_int_i_0_o2_2_x2.X1 pos_clk_un23_bgack_030_int_i_0_o2_2_x2.X2 G_116.X1 \ - G_116.X2 SIZE_1_ AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR RW SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ N_28 N_246_i bgack_030_int_0_un1_n N_17 sm_amiga_nss_i_0_0__n bgack_030_int_0_un0_n N_19 dsack1_int_0_un3_n N_23 N_220_i \ - dsack1_int_0_un1_n N_24 N_219_i dsack1_int_0_un0_n N_25 N_218_i cpu_est_0_3__un3_n un1_amiga_bus_enable_low_i cpu_est_0_3__un1_n un21_fpu_cs_i N_224_i \ - cpu_est_0_3__un0_n BGACK_030_INT_i N_222_i cpu_est_0_2__un3_n vcc_n_n AMIGA_BUS_ENABLE_DMA_LOW_i N_223_i cpu_est_0_2__un1_n UDS_000_INT_i N_322_i cpu_est_0_2__un0_n \ - gnd_n_n LDS_000_INT_i N_312_i cpu_est_0_1__un3_n un1_amiga_bus_enable_low N_131_i N_139_0 cpu_est_0_1__un1_n un6_as_030 N_132_i N_108_i \ - cpu_est_0_1__un0_n un3_size RW_000_i N_258_i vma_int_0_un3_n un4_size a_i_1__n N_257_i vma_int_0_un1_n un4_uds_000 clk_000_d_i_11__n \ - vma_int_0_un0_n un4_lds_000 sm_amiga_i_6__n N_245_i ipl_030_0_0__un3_n un4_as_000 clk_000_d_i_1__n nEXP_SPACE_c_i ipl_030_0_0__un1_n un10_ciin AS_030_000_SYNC_i \ - un1_as_030_i ipl_030_0_0__un0_n un21_fpu_cs sm_amiga_i_0__n pos_clk_un3_as_030_d0_0_n ds_000_dma_0_un3_n un22_berr sm_amiga_i_3__n N_107_0 ds_000_dma_0_un1_n un6_ds_030 \ - sm_amiga_i_i_7__n N_115_i ds_000_dma_0_un0_n sm_amiga_i_5__n N_63_0 as_000_dma_0_un3_n rst_dly_i_0__n N_278_0 as_000_dma_0_un1_n rst_dly_i_1__n N_279_0 \ - as_000_dma_0_un0_n N_364_i_0 N_260_i a_decode_15__n cpu_est_i_0__n N_67_0 rst_dly_i_2__n pos_clk_rw_000_int_5_0_n a_decode_14__n AS_030_i un1_SM_AMIGA_0_sqmuxa_1_0 \ - FPU_SENSE_i un10_ciin_i a_decode_13__n N_157_i N_313_0 a_decode_i_16__n N_4_i a_decode_12__n a_decode_i_18__n N_48_0 a_decode_i_19__n \ - N_5_i a_decode_11__n N_113_i N_47_0 N_114_i N_7_i a_decode_10__n AS_000_INT_i N_46_0 size_dma_i_1__n N_18_i \ - a_decode_9__n size_dma_i_0__n N_41_0 RESET_OUT_i N_22_i a_decode_8__n cpu_est_i_1__n N_37_0 cpu_est_i_2__n N_26_i a_decode_7__n \ - VPA_D_i N_33_0 DTACK_D0_i BG_030_c_i a_decode_6__n cpu_est_i_3__n pos_clk_un6_bg_030_i_n CLK_030_i pos_clk_un9_bg_030_0_n a_decode_5__n clk_000_d_i_0__n \ - N_10_i clk_000_d_i_10__n N_43_0 a_decode_4__n AS_000_DMA_i VPA_c_i AS_000_i N_54_0 a_decode_3__n CLK_030_H_i un3_as_030_i \ - cycle_dma_i_0__n N_370_i a_decode_2__n AS_030_D0_i pos_clk_un6_bgack_000_0_n ahigh_i_30__n N_283_i ahigh_i_31__n pos_clk_size_dma_6_0_0__n ahigh_i_28__n N_345_i \ - ahigh_i_29__n pos_clk_size_dma_6_0_1__n ahigh_i_26__n UDS_000_c_i ahigh_i_27__n LDS_000_c_i ahigh_i_24__n N_171_i pos_clk_un6_bg_030_n ahigh_i_25__n N_21_i \ - N_241_i N_38_0 N_242_i DTACK_c_i pos_clk_ipl_n N_243_i N_55_0 N_249_i un6_ds_030_i N_248_i DS_000_DMA_i \ - pos_clk_un9_clk_000_pe_0_n un4_as_000_i N_250_i un6_as_030_i N_251_i un4_lds_000_i cpu_est_2_0_1__n un4_uds_000_i N_253_i AS_030_c N_369_i \ - cpu_est_2_0_2__n AS_000_c N_254_i N_316_i RW_000_c N_256_i N_255_i N_317_i UDS_000_c N_267_i pos_clk_ds_000_dma_4_n \ - N_266_i N_3 LDS_000_c N_57_0 N_8 N_151_0 size_c_0__n N_321_i N_158_i size_c_1__n VMA_INT_i \ - N_361_i ahigh_c_24__n N_362_i N_27 N_169_i ahigh_c_25__n N_186_0 N_195_0 ahigh_c_26__n N_196_0 ahigh_c_27__n \ - N_263_i N_262_i ahigh_c_28__n N_323_0 N_101_i ahigh_c_29__n N_366_i N_182_i ahigh_c_30__n pos_clk_un23_bgack_030_int_i_0_0_n N_310_i \ - ahigh_c_31__n N_359_i N_144_0 CLK_OUT_PRE_D_i N_142_0 N_311_i N_319_i N_93_i N_272_0 N_290_i N_273_0 \ - N_346_i pos_clk_ds_000_dma_4_0_n N_268_i N_269_i sm_amiga_nss_0_3__n N_341_i N_238_i N_239_i sm_amiga_nss_0_2__n N_263 N_235_i \ - N_236_i sm_amiga_nss_0_4__n N_234_i pos_clk_un23_bgack_030_int_i_0_n sm_amiga_nss_0_5__n N_272 N_231_i N_273 N_232_i sm_amiga_nss_0_6__n N_313 \ - N_230_i a_decode_c_16__n sm_amiga_nss_0_7__n N_226_i N_108 a_decode_c_17__n N_331_i N_319 N_142 a_decode_c_18__n un1_as_000_i \ - N_144 N_27_i N_322 a_decode_c_19__n N_30_0 N_169 ipl_c_i_0__n N_195 a_decode_c_20__n N_51_0 N_323 \ - N_3_i N_209 a_decode_c_21__n N_49_0 N_218 N_8_i N_224 a_decode_c_22__n N_45_0 N_226 sm_amiga_nss_i_0_1_0__n \ - N_331 a_decode_c_23__n sm_amiga_nss_i_0_2_0__n N_229 sm_amiga_nss_i_0_3_0__n N_230 a_c_0__n sm_amiga_nss_i_0_4_0__n N_231 sm_amiga_nss_i_0_5_0__n N_232 \ - a_c_1__n pos_clk_un10_sm_amiga_i_1_n N_233 un10_ciin_1 N_234 nEXP_SPACE_c un10_ciin_2 N_235 un10_ciin_3 N_236 BERR_c \ - un10_ciin_4 N_238 un10_ciin_5 N_239 BG_030_c un10_ciin_6 N_240 un10_ciin_7 N_251 un10_ciin_8 N_262 \ - un10_ciin_9 N_341 un10_ciin_10 N_268 BGACK_000_c un10_ciin_11 N_269 pos_clk_un23_bgack_030_int_i_0_0_1_n N_282 CLK_030_c pos_clk_un23_bgack_030_int_i_0_0_2_n \ - N_346 N_60_i_1 N_290 N_60_i_2 N_310 N_248_1 N_311 CLK_OSZI_c N_248_2 N_355 N_249_1 \ - N_356 N_249_2 N_359 N_361_1 N_360 N_361_2 N_365 N_157_1 N_366 FPU_SENSE_c N_157_2 \ - N_157_3 N_157_4 N_248 N_260_1 N_249 N_260_2 N_369 un21_fpu_cs_1 N_196 un22_berr_1_0 N_186 \ - N_275_i_1 N_361 ipl_c_0__n N_275_i_2 N_362 N_274_i_1 N_151 ipl_c_1__n N_274_i_2 N_321 N_115_1 \ - N_266 ipl_c_2__n N_115_2 N_267 N_332_1 N_255 N_246_1 N_256 DTACK_c N_246_2 N_253 \ - N_246_3 N_254 N_246_4 cpu_est_2_2__n N_332_4_1 cpu_est_2_1__n VPA_c N_332_4_2 N_250 N_273_0_1 pos_clk_un9_clk_000_pe_n \ - N_276_i_1 N_364 RST_c N_277_i_1 N_21 N_314_i_1 N_171 N_356_1 pos_clk_size_dma_6_1__n RW_c N_282_1 \ - N_345 N_251_1 pos_clk_size_dma_6_0__n fc_c_0__n pos_clk_un6_bg_030_1_n N_283 N_240_1 pos_clk_un6_bgack_000_n fc_c_1__n N_238_1 N_370 \ - N_233_1 N_259 N_231_1 N_10 AMIGA_BUS_DATA_DIR_c N_224_1 pos_clk_un9_bg_030_n N_218_1 N_4 pos_clk_ipl_1_n N_114 \ - rw_000_dma_0_un3_n N_278 rw_000_dma_0_un1_n N_5 N_25_i rw_000_dma_0_un0_n N_113 N_34_0 lds_000_int_0_un3_n N_279 N_24_i \ - lds_000_int_0_un1_n N_6 N_35_0 lds_000_int_0_un0_n N_115 N_23_i ipl_030_0_1__un3_n N_63 N_36_0 ipl_030_0_1__un1_n N_7 \ - N_19_i ipl_030_0_1__un0_n pos_clk_un3_as_030_d0_n N_40_0 amiga_bus_enable_dma_high_0_un3_n N_67 N_17_i amiga_bus_enable_dma_high_0_un1_n N_18 N_42_0 amiga_bus_enable_dma_high_0_un0_n \ - pos_clk_rw_000_int_5_n ipl_c_i_1__n amiga_bus_enable_dma_low_0_un3_n un1_SM_AMIGA_0_sqmuxa_1 N_52_0 amiga_bus_enable_dma_low_0_un1_n N_22 ipl_c_i_2__n amiga_bus_enable_dma_low_0_un0_n pos_clk_a0_dma_3_n N_53_0 \ - uds_000_int_0_un3_n N_363 N_28_i uds_000_int_0_un1_n N_26 N_31_0 uds_000_int_0_un0_n N_157 N_29_i ipl_030_0_2__un3_n N_260 \ - N_32_0 ipl_030_0_2__un1_n un22_berr_1 a_c_i_0__n ipl_030_0_2__un0_n N_219 size_c_i_1__n un1_amiga_bus_enable_dma_high_i_m2_0__un3_n N_139 pos_clk_un10_sm_amiga_i_n un1_amiga_bus_enable_dma_high_i_m2_0__un1_n \ - N_220 N_332_i un1_amiga_bus_enable_dma_high_i_m2_0__un0_n N_222 N_240_i as_000_int_0_un3_n N_223 N_315_0 as_000_int_0_un1_n N_368 N_281_0 \ - as_000_int_0_un0_n N_257 N_270_i ds_000_enable_0_un3_n N_258 N_282_i ds_000_enable_0_un1_n N_312 AMIGA_BUS_DATA_DIR_c_0 ds_000_enable_0_un0_n N_143 \ - RW_c_i as_030_000_sync_0_un3_n N_332 N_140_0 as_030_000_sync_0_un1_n N_332_4 N_353_i as_030_000_sync_0_un0_n N_246 N_143_0 rw_000_int_0_un3_n \ - N_180 sm_amiga_i_1__n rw_000_int_0_un1_n N_320 N_320_i rw_000_int_0_un0_n N_244 N_357_i a0_dma_0_un3_n N_334 N_356_i \ - a0_dma_0_un1_n N_335 N_156_0 a0_dma_0_un0_n N_159 sm_amiga_i_4__n bg_000_0_un3_n N_156 N_159_i bg_000_0_un1_n N_357 \ - sm_amiga_i_2__n bg_000_0_un0_n N_353 N_180_i size_dma_0_1__un3_n N_140 N_334_i size_dma_0_1__un1_n N_270 N_335_i size_dma_0_1__un0_n \ - N_281 N_244_i size_dma_0_0__un3_n N_131 N_233_i size_dma_0_0__un1_n N_132 N_355_i size_dma_0_0__un0_n N_29 N_229_i \ - bgack_030_int_0_un3_n AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE \ - AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE \ - RW.OE DS_030.OE DSACK1.OE RESET.OE CIIN.OE + inst_DTACK_D0.C inst_CLK_030_H.D inst_CLK_030_H.C inst_RESET_OUT.D inst_RESET_OUT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C inst_CLK_OUT_PRE_25.D inst_CLK_OUT_PRE_25.C BG_000DFFreg.D BG_000DFFreg.C \ + inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.D inst_UDS_000_INT.C inst_A0_DMA.D inst_A0_DMA.C inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_DMA.D \ + inst_RW_000_DMA.C inst_RW_000_INT.D inst_RW_000_INT.C inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C \ + pos_clk_un21_bgack_030_int_i_0_o2_2_x2.X1 pos_clk_un21_bgack_030_int_i_0_o2_2_x2.X2 pos_clk_CYCLE_DMA_5_1_i_0_x2.X1 pos_clk_CYCLE_DMA_5_1_i_0_x2.X2 CLK_OUT_PRE_25_0.X1 CLK_OUT_PRE_25_0.X2 G_117.X1 G_117.X2 G_118.X1 G_118.X2 G_119.X1 \ + G_119.X2 SIZE_1_ AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR RW SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ N_28 ipl_030_0_0__un1_n N_17 N_190_i ipl_030_0_0__un0_n N_23 N_188_i ipl_030_0_2__un3_n N_6 N_189_i \ + ipl_030_0_2__un1_n un1_amiga_bus_enable_low_i N_173_0 ipl_030_0_2__un0_n un21_fpu_cs_i N_170_0 ds_000_dma_0_un3_n UDS_000_INT_i N_255_i ds_000_dma_0_un1_n LDS_000_INT_i \ + N_256_i ds_000_dma_0_un0_n AS_030_i N_161_i dsack1_int_0_un3_n vcc_n_n AS_000_INT_i VMA_INT_i dsack1_int_0_un1_n RESET_OUT_i N_152_i \ + dsack1_int_0_un0_n gnd_n_n sm_amiga_i_3__n N_151_0 as_000_int_0_un3_n un1_amiga_bus_enable_low sm_amiga_i_0__n N_251_i as_000_int_0_un1_n un6_as_030 cpu_est_i_1__n \ + N_250_i as_000_int_0_un0_n un3_size cpu_est_i_3__n N_147_i as_030_000_sync_0_un3_n un4_size VPA_D_i N_146_i as_030_000_sync_0_un1_n un4_uds_000 \ + rst_dly_i_0__n N_145_i as_030_000_sync_0_un0_n un4_lds_000 rst_dly_i_1__n N_397_i a_decode_15__n un4_as_000 cpu_est_i_0__n N_142_0 un10_ciin \ + clk_000_d_i_1__n N_136_i a_decode_14__n un21_fpu_cs cpu_est_i_2__n N_248_i un22_berr DTACK_D0_i N_227_i a_decode_13__n un6_ds_030 \ + clk_000_d_i_9__n N_226_i N_258_i_0 N_291_i a_decode_12__n rst_dly_i_2__n N_224_i FPU_SENSE_i N_225_i a_decode_11__n AS_030_000_SYNC_i \ + N_230_i sm_amiga_i_i_7__n N_267_i a_decode_10__n BGACK_030_INT_i cpu_est_2_0_2__n AMIGA_BUS_ENABLE_DMA_LOW_i N_222_i a_decode_9__n N_102_i N_223_i \ + N_103_i cpu_est_2_0_1__n a_decode_8__n size_dma_i_1__n N_221_i size_dma_i_0__n N_220_i a_decode_7__n RW_000_i pos_clk_un9_clk_000_pe_0_n a_i_1__n \ + N_216_i a_decode_6__n N_124_i N_215_i CLK_030_i a_decode_5__n clk_000_d_i_0__n N_199_i clk_000_d_i_8__n N_198_i a_decode_4__n \ + AS_000_DMA_i sm_amiga_nss_0_6__n AS_000_i N_21_i a_decode_3__n CLK_030_H_i N_39_0 AS_030_D0_i nEXP_SPACE_c_i a_decode_2__n cycle_dma_i_0__n \ + un1_as_030_i a_decode_i_16__n N_133_0 a_decode_i_18__n N_214_i a_decode_i_19__n N_213_i ahigh_i_30__n N_306_0 ahigh_i_31__n N_26_i \ + ahigh_i_28__n N_34_0 ahigh_i_29__n BG_030_c_i ahigh_i_26__n pos_clk_un6_bg_030_i_n ahigh_i_27__n pos_clk_un9_bg_030_0_n ahigh_i_24__n N_25_i ahigh_i_25__n \ + N_35_0 N_244_i N_24_i N_245_i N_36_0 N_246_i N_22_i N_38_0 pos_clk_un6_bg_030_n N_85_i N_19_i \ + N_86_i N_41_0 un6_ds_030_i N_18_i pos_clk_ipl_n DS_000_DMA_i N_42_0 un4_as_000_i N_10_i un6_as_030_i N_44_0 \ + un4_lds_000_i N_311_0 un4_uds_000_i un10_ciin_i AS_030_c N_310_0 N_207_i AS_000_c N_208_i AMIGA_BUS_DATA_DIR_c_0 RW_000_c \ + N_209_i pos_clk_size_dma_6_0_0__n N_210_i UDS_000_c pos_clk_size_dma_6_0_1__n N_268_i LDS_000_c pos_clk_un6_bgack_000_0_n un1_SM_AMIGA_0_sqmuxa_1_0 pos_clk_un3_as_030_d0_n size_c_0__n \ + RW_c_i pos_clk_ds_000_dma_4_n pos_clk_rw_000_int_5_0_n N_3 size_c_1__n UDS_000_c_i N_4 LDS_000_c_i N_5 ahigh_c_24__n N_164_i \ + N_7 N_8 ahigh_c_25__n N_113_i N_195_i ahigh_c_26__n N_174_0 N_169_i ahigh_c_27__n N_260_i N_168_i \ + N_27 ahigh_c_28__n pos_clk_un3_as_030_d0_i_n N_29 pos_clk_un21_bgack_030_int_i_0_0_n ahigh_c_29__n CLK_OUT_PRE_D_i N_143_0 ahigh_c_30__n N_396_i N_137_i \ + ahigh_c_31__n N_372_i N_236_i N_237_i N_280_0 N_281_0 N_229_i N_66_0 N_371_i N_305_0 N_212_i \ + N_307_0 N_211_i pos_clk_ds_000_dma_4_0_n N_205_i N_206_i sm_amiga_nss_0_2__n N_200_i sm_amiga_nss_0_5__n N_197_i N_29_i N_33_0 \ + N_27_i N_31_0 ipl_c_i_2__n N_54_0 ipl_c_i_1__n N_53_0 N_113 a_decode_c_16__n ipl_c_i_0__n N_52_0 a_decode_c_17__n \ + N_3_i N_50_0 pos_clk_un21_bgack_030_int_i_0_n a_decode_c_18__n N_4_i N_280 N_49_0 N_281 a_decode_c_19__n N_5_i N_85 \ + N_48_0 N_86 a_decode_c_20__n N_7_i N_305 N_47_0 a_decode_c_21__n N_8_i N_307 N_46_0 N_310 \ + a_decode_c_22__n sm_amiga_nss_i_0_1_0__n N_66 sm_amiga_nss_i_0_2_0__n a_decode_c_23__n sm_amiga_nss_i_0_3_0__n N_136 sm_amiga_nss_i_0_4_0__n N_137 a_c_0__n sm_amiga_nss_i_0_5_0__n \ + N_143 N_373_i_1 N_147 a_c_1__n pos_clk_un10_sm_amiga_i_1_n N_161 N_124_1 nEXP_SPACE_c N_124_2 N_174 N_124_3 \ + N_178 BERR_c N_124_4 N_184 un10_ciin_1 N_190 BG_030_c un10_ciin_2 N_193 un10_ciin_3 N_195 \ + un10_ciin_4 N_197 un10_ciin_5 N_200 un10_ciin_6 N_205 BGACK_000_c un10_ciin_7 N_206 un10_ciin_8 N_208 \ + CLK_030_c un10_ciin_9 N_211 un10_ciin_10 N_212 un10_ciin_11 N_213 pos_clk_un21_bgack_030_int_i_0_0_1_n N_223 CLK_OSZI_c pos_clk_un21_bgack_030_int_i_0_0_2_n \ + N_229 N_309_i_1 N_236 N_309_i_2 N_237 N_229_1 N_243 N_229_2 N_396 N_214_1_0 N_250 \ + FPU_SENSE_c un21_fpu_cs_1 N_253 un22_berr_1_0 N_254 N_255_1 N_257 N_255_2 N_259 N_151_0_1 N_260 \ + N_277_i_1 N_277_i_2 N_276_i_1 un22_berr_1 ipl_c_0__n N_276_i_2 N_124 N_221_1 N_164 ipl_c_1__n N_221_2 \ + pos_clk_rw_000_int_5_n N_220_1 un1_SM_AMIGA_0_sqmuxa_1 ipl_c_2__n N_220_2 pos_clk_un6_bgack_000_n N_194_1 N_268 N_194_2 pos_clk_size_dma_6_1__n DTACK_c \ + N_194_3 N_210 N_278_i_1 pos_clk_size_dma_6_0__n N_307_0_1 N_209 N_308_i_1 N_207 VPA_c N_40_i_1 N_311 \ + N_250_1 N_102 N_223_1 N_103 RST_c pos_clk_un6_bg_030_1_n N_228 N_213_1 pos_clk_a0_dma_3_n N_208_1 N_10 \ + RW_c N_205_1 N_18 N_193_1 N_19 fc_c_0__n N_190_1 N_22 N_184_1 N_24 fc_c_1__n \ + pos_clk_ipl_1_n N_25 ipl_030_0_1__un3_n pos_clk_un9_bg_030_n ipl_030_0_1__un1_n N_26 AMIGA_BUS_DATA_DIR_c ipl_030_0_1__un0_n N_214 uds_000_int_0_un3_n N_214_1 \ + uds_000_int_0_un1_n N_21 uds_000_int_0_un0_n pos_clk_un9_clk_000_pe_n lds_000_int_0_un3_n cpu_est_2_1__n N_23_i lds_000_int_0_un1_n cpu_est_2_2__n N_37_0 lds_000_int_0_un0_n \ + N_185 N_17_i ds_000_enable_0_un3_n N_142 N_43_0 ds_000_enable_0_un1_n N_258 VPA_c_i ds_000_enable_0_un0_n N_186 N_55_0 \ + vma_int_0_un3_n N_188 DTACK_c_i vma_int_0_un1_n N_189 N_56_0 vma_int_0_un0_n N_266 N_28_i cpu_est_0_1__un3_n N_198 \ + N_32_0 cpu_est_0_1__un1_n N_261 a_c_i_0__n cpu_est_0_1__un0_n N_199 size_c_i_1__n cpu_est_0_2__un3_n N_215 pos_clk_un10_sm_amiga_i_n cpu_est_0_2__un1_n \ + N_216 N_201_i cpu_est_0_2__un0_n N_222 N_202_i cpu_est_0_3__un3_n N_224 sm_amiga_nss_0_4__n cpu_est_0_3__un1_n N_146 N_204_i \ + cpu_est_0_3__un0_n N_225 N_203_i amiga_bus_enable_dma_high_0_un3_n N_173 sm_amiga_nss_0_3__n amiga_bus_enable_dma_high_0_un1_n N_226 N_45_i amiga_bus_enable_dma_high_0_un0_n N_170 \ + un1_SM_AMIGA_0_sqmuxa_2_i amiga_bus_enable_dma_low_0_un3_n N_227 N_279_0 amiga_bus_enable_dma_low_0_un1_n N_145 N_235_i amiga_bus_enable_dma_low_0_un0_n N_151 N_234_i a0_dma_0_un3_n \ + N_397 N_58_0 a0_dma_0_un1_n N_251 N_243_i a0_dma_0_un0_n N_255 N_254_i rw_000_dma_0_un3_n N_256 N_144_0 \ + rw_000_dma_0_un1_n N_267 N_249_i rw_000_dma_0_un0_n N_221 N_247_i rw_000_int_0_un3_n N_220 sm_amiga_nss_0_7__n rw_000_int_0_un1_n N_194 \ + sm_amiga_i_4__n rw_000_int_0_un0_n N_373 N_252_i bgack_030_int_0_un3_n N_398 N_153_0 bgack_030_int_0_un1_n N_191 sm_amiga_i_6__n bgack_030_int_0_un0_n \ + N_192 sm_amiga_i_2__n bg_000_0_un3_n N_172 N_373_i bg_000_0_un1_n N_171 N_171_0 bg_000_0_un0_n N_153 N_253_i \ + size_dma_0_1__un3_n N_252 N_172_0 size_dma_0_1__un1_n N_247 N_192_i size_dma_0_1__un0_n N_249 N_191_i size_dma_0_0__un3_n N_144 \ + N_193_i size_dma_0_0__un1_n N_234 N_398_i size_dma_0_0__un0_n N_235 N_261_i un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un3_n N_279 N_194_i un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un1_n \ + un1_SM_AMIGA_0_sqmuxa_2 sm_amiga_nss_i_0_0__n un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un0_n N_203 as_000_dma_0_un3_n N_204 N_186_i as_000_dma_0_un1_n N_201 N_185_i as_000_dma_0_un0_n \ + N_202 N_184_i ipl_030_0_0__un3_n AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE \ + SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE \ + A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE RESET.OE CIIN.OE .names un6_as_030_i.BLIF AS_030 1 1 .names AS_030.PIN AS_030_c 1 1 -.names un3_as_030_i.BLIF AS_030.OE +.names N_45_i.BLIF AS_030.OE 1 1 .names un4_as_000_i.BLIF AS_000 1 1 .names AS_000.PIN AS_000_c 1 1 -.names un1_as_000_i.BLIF AS_000.OE +.names N_371_i.BLIF AS_000.OE 1 1 .names inst_RW_000_INT.BLIF RW_000 1 1 .names RW_000.PIN RW_000_c 1 1 -.names un1_as_000_i.BLIF RW_000.OE +.names N_371_i.BLIF RW_000.OE 1 1 .names un4_uds_000_i.BLIF UDS_000 1 1 .names UDS_000.PIN UDS_000_c 1 1 -.names un1_as_000_i.BLIF UDS_000.OE +.names N_371_i.BLIF UDS_000.OE 1 1 .names un4_lds_000_i.BLIF LDS_000 1 1 .names LDS_000.PIN LDS_000_c 1 1 -.names un1_as_000_i.BLIF LDS_000.OE +.names N_371_i.BLIF LDS_000.OE 1 1 .names un4_size.BLIF SIZE_0_ 1 1 @@ -267,55 +264,55 @@ 1 1 .names AHIGH_24_.PIN ahigh_c_24__n 1 1 -.names un3_as_030_i.BLIF AHIGH_24_.OE +.names N_45_i.BLIF AHIGH_24_.OE 1 1 .names gnd_n_n.BLIF AHIGH_25_ 1 1 .names AHIGH_25_.PIN ahigh_c_25__n 1 1 -.names un3_as_030_i.BLIF AHIGH_25_.OE +.names N_45_i.BLIF AHIGH_25_.OE 1 1 .names gnd_n_n.BLIF AHIGH_26_ 1 1 .names AHIGH_26_.PIN ahigh_c_26__n 1 1 -.names un3_as_030_i.BLIF AHIGH_26_.OE +.names N_45_i.BLIF AHIGH_26_.OE 1 1 .names gnd_n_n.BLIF AHIGH_27_ 1 1 .names AHIGH_27_.PIN ahigh_c_27__n 1 1 -.names un3_as_030_i.BLIF AHIGH_27_.OE +.names N_45_i.BLIF AHIGH_27_.OE 1 1 .names gnd_n_n.BLIF AHIGH_28_ 1 1 .names AHIGH_28_.PIN ahigh_c_28__n 1 1 -.names un3_as_030_i.BLIF AHIGH_28_.OE +.names N_45_i.BLIF AHIGH_28_.OE 1 1 .names gnd_n_n.BLIF AHIGH_29_ 1 1 .names AHIGH_29_.PIN ahigh_c_29__n 1 1 -.names un3_as_030_i.BLIF AHIGH_29_.OE +.names N_45_i.BLIF AHIGH_29_.OE 1 1 .names gnd_n_n.BLIF AHIGH_30_ 1 1 .names AHIGH_30_.PIN ahigh_c_30__n 1 1 -.names un3_as_030_i.BLIF AHIGH_30_.OE +.names N_45_i.BLIF AHIGH_30_.OE 1 1 .names gnd_n_n.BLIF AHIGH_31_ 1 1 .names AHIGH_31_.PIN ahigh_c_31__n 1 1 -.names un3_as_030_i.BLIF AHIGH_31_.OE +.names N_45_i.BLIF AHIGH_31_.OE 1 1 .names inst_A0_DMA.BLIF A_0_ 1 1 .names A_0_.PIN a_c_0__n 1 1 -.names un3_as_030_i.BLIF A_0_.OE +.names N_45_i.BLIF A_0_.OE 1 1 .names gnd_n_n.BLIF BERR 1 1 @@ -327,11 +324,11 @@ 1 1 .names RW.PIN RW_c 1 1 -.names N_93_i.BLIF RW.OE +.names N_372_i.BLIF RW.OE 1 1 .names un6_ds_030_i.BLIF DS_030 1 1 -.names un3_as_030_i.BLIF DS_030.OE +.names N_45_i.BLIF DS_030.OE 1 1 .names inst_DSACK1_INTreg.BLIF DSACK1 1 1 @@ -343,1484 +340,1466 @@ 1 1 .names un10_ciin.BLIF CIIN 1 1 -.names N_313.BLIF CIIN.OE -1 1 -.names N_157_4.BLIF N_157_3.BLIF N_157 -11 1 -.names N_272.BLIF as_000_dma_0_un3_n -0 1 -.names ahigh_i_28__n.BLIF ahigh_i_29__n.BLIF un10_ciin_3 -11 1 -.names pos_clk_un23_bgack_030_int_i_0_n.BLIF N_272.BLIF as_000_dma_0_un1_n -11 1 -.names ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF un10_ciin_4 -11 1 -.names pos_clk_ipl_n.BLIF ipl_030_0_2__un3_n -0 1 -.names inst_AS_000_DMA.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n -11 1 -.names CLK_OSZI_c.BLIF inst_DS_000_ENABLE.C -1 1 -.names a_decode_c_23__n.BLIF AS_030_D0_i.BLIF un10_ciin_5 -11 1 -.names ipl_c_2__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_2__un1_n -11 1 -.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF N_8 -1- 1 --1 1 -.names a_decode_c_20__n.BLIF a_decode_c_21__n.BLIF un10_ciin_6 -11 1 -.names IPL_030DFF_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n -11 1 -.names N_8_i.BLIF RST_c.BLIF N_45_0 -11 1 -.names un10_ciin_1.BLIF un10_ciin_2.BLIF un10_ciin_7 -11 1 -.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_29 -1- 1 --1 1 -.names N_3_i.BLIF RST_c.BLIF N_49_0 -11 1 -.names un10_ciin_3.BLIF un10_ciin_4.BLIF un10_ciin_8 -11 1 -.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n -0 1 -.names ipl_c_i_0__n.BLIF RST_c.BLIF N_51_0 -11 1 -.names CLK_OSZI_c.BLIF BG_000DFFreg.C +.names N_310.BLIF CIIN.OE 1 1 .names un10_ciin_5.BLIF un10_ciin_6.BLIF un10_ciin_9 11 1 -.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i -0 1 -.names N_27_i.BLIF RST_c.BLIF N_30_0 +.names pos_clk_un3_as_030_d0_i_n.BLIF un1_SM_AMIGA_0_sqmuxa_2_i.BLIF N_279_0 11 1 +.names gnd_n_n +.names CLK_OSZI_c.BLIF BG_000DFFreg.C +1 1 .names un10_ciin_7.BLIF un10_ciin_8.BLIF un10_ciin_10 11 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_1__n +.names inst_RESET_OUT.BLIF RESET_OUT_i 0 1 -.names vcc_n_n -1 -.names un10_ciin_9.BLIF a_decode_c_22__n.BLIF un10_ciin_11 -11 1 -.names inst_BGACK_030_INTreg.BLIF un1_amiga_bus_enable_dma_high_i_m2_0__un3_n -0 1 -.names gnd_n_n -.names un10_ciin_10.BLIF un10_ciin_11.BLIF un10_ciin -11 1 -.names inst_AS_030_000_SYNC.BLIF inst_BGACK_030_INTreg.BLIF un1_amiga_bus_enable_dma_high_i_m2_0__un1_n -11 1 .names A_DECODE_15_.BLIF a_decode_15__n 1 1 -.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.C -1 1 -.names AS_000_i.BLIF BGACK_030_INT_i.BLIF pos_clk_un23_bgack_030_int_i_0_0_1_n +.names un10_ciin_9.BLIF a_decode_c_22__n.BLIF un10_ciin_11 11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF un1_amiga_bus_enable_dma_high_i_m2_0__un3_n.BLIF un1_amiga_bus_enable_dma_high_i_m2_0__un0_n +.names N_224_i.BLIF N_267_i.BLIF cpu_est_2_0_2__n 11 1 .names A_DECODE_14_.BLIF a_decode_14__n 1 1 -.names pos_clk_un23_bgack_030_int_i_0_o2_2_x2.BLIF N_311_i.BLIF pos_clk_un23_bgack_030_int_i_0_0_2_n +.names un10_ciin_10.BLIF un10_ciin_11.BLIF un10_ciin +11 1 +.names N_224_i.BLIF N_225_i.BLIF N_230_i 11 1 -.names un1_amiga_bus_enable_dma_high_i_m2_0__un1_n.BLIF un1_amiga_bus_enable_dma_high_i_m2_0__un0_n.BLIF N_209 -1- 1 --1 1 .names A_DECODE_13_.BLIF a_decode_13__n 1 1 -.names pos_clk_un23_bgack_030_int_i_0_0_1_n.BLIF pos_clk_un23_bgack_030_int_i_0_0_2_n.BLIF pos_clk_un23_bgack_030_int_i_0_0_n +.names AS_000_i.BLIF BGACK_030_INT_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_1_n 11 1 -.names N_159_i.BLIF sm_amiga_i_2__n.BLIF N_180_i +.names N_226_i.BLIF N_227_i.BLIF N_291_i 11 1 .names A_DECODE_12_.BLIF a_decode_12__n 1 1 -.names AS_000_i.BLIF N_101_i.BLIF N_60_i_1 +.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.C +1 1 +.names pos_clk_un21_bgack_030_int_i_0_o2_2_x2.BLIF N_396_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_2_n 11 1 -.names sm_amiga_i_4__n.BLIF sm_amiga_i_6__n.BLIF N_159_i +.names N_258_i_0.BLIF RST_c.BLIF N_248_i 11 1 .names A_DECODE_11_.BLIF a_decode_11__n 1 1 -.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.C -1 1 -.names N_262_i.BLIF N_263_i.BLIF N_60_i_2 -11 1 -.names N_356_i.BLIF N_357_i.BLIF N_156_0 -11 1 +.names N_46_0.BLIF inst_AS_000_DMA.D +0 1 +.names CLK_000_D_1_.BLIF clk_000_d_i_1__n +0 1 .names A_DECODE_10_.BLIF a_decode_10__n 1 1 -.names N_51_0.BLIF IPL_D0_0_.D -0 1 -.names sm_amiga_i_1__n.BLIF sm_amiga_i_5__n.BLIF N_320_i +.names N_191_i.BLIF N_192_i.BLIF sm_amiga_nss_i_0_1_0__n +11 1 +.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_136_i 11 1 .names A_DECODE_9_.BLIF a_decode_9__n 1 1 -.names N_3.BLIF N_3_i -0 1 -.names N_159.BLIF N_353_i.BLIF N_143_0 +.names N_193_i.BLIF sm_amiga_nss_0_7__n.BLIF sm_amiga_nss_i_0_2_0__n +11 1 +.names N_397_i.BLIF RST_c.BLIF N_142_0 11 1 .names A_DECODE_8_.BLIF a_decode_8__n 1 1 -.names N_49_0.BLIF inst_DS_000_DMA.D -0 1 -.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n -0 1 +.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.C +1 1 +.names N_194_i.BLIF N_261_i.BLIF sm_amiga_nss_i_0_3_0__n +11 1 +.names cpu_est_3_.BLIF cpu_est_i_1__n.BLIF N_145_i +11 1 .names A_DECODE_7_.BLIF a_decode_7__n 1 1 -.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C -1 1 -.names N_8.BLIF N_8_i -0 1 -.names RW_c_i.BLIF SM_AMIGA_6_.BLIF N_140_0 -11 1 -.names A_DECODE_6_.BLIF a_decode_6__n -1 1 -.names N_45_0.BLIF inst_AS_000_DMA.D -0 1 -.names N_270_i.BLIF N_282_i.BLIF AMIGA_BUS_DATA_DIR_c_0 -11 1 -.names A_DECODE_5_.BLIF a_decode_5__n -1 1 -.names N_334_i.BLIF N_335_i.BLIF sm_amiga_nss_i_0_1_0__n -11 1 -.names BGACK_030_INT_i.BLIF RW_000_i.BLIF N_281_0 -11 1 -.names A_DECODE_4_.BLIF a_decode_4__n -1 1 -.names N_233_i.BLIF N_244_i.BLIF sm_amiga_nss_i_0_2_0__n -11 1 -.names N_240_i.BLIF N_332_i.BLIF N_315_0 -11 1 -.names A_DECODE_3_.BLIF a_decode_3__n -1 1 -.names CLK_OSZI_c.BLIF inst_A0_DMA.C -1 1 -.names N_246_i.BLIF N_229_i.BLIF sm_amiga_nss_i_0_3_0__n -11 1 -.names CLK_000_D_11_.BLIF clk_000_d_i_11__n -0 1 -.names A_DECODE_2_.BLIF a_decode_2__n -1 1 .names sm_amiga_nss_i_0_1_0__n.BLIF sm_amiga_nss_i_0_2_0__n.BLIF sm_amiga_nss_i_0_4_0__n 11 1 -.names N_364.BLIF N_364_i_0 +.names cpu_est_0_.BLIF cpu_est_i_0__n 0 1 -.names sm_amiga_nss_i_0_3_0__n.BLIF N_355_i.BLIF sm_amiga_nss_i_0_5_0__n +.names A_DECODE_6_.BLIF a_decode_6__n +1 1 +.names sm_amiga_nss_i_0_3_0__n.BLIF N_398_i.BLIF sm_amiga_nss_i_0_5_0__n 11 1 -.names N_108_i.BLIF N_364_i_0.BLIF N_312 +.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_146_i 11 1 +.names A_DECODE_5_.BLIF a_decode_5__n +1 1 .names sm_amiga_nss_i_0_4_0__n.BLIF sm_amiga_nss_i_0_5_0__n.BLIF sm_amiga_nss_i_0_0__n 11 1 -.names N_108_i.BLIF RST_c.BLIF N_360 +.names RST_DLY_0_.BLIF rst_dly_i_0__n +0 1 +.names A_DECODE_4_.BLIF a_decode_4__n +1 1 +.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C +1 1 +.names sm_amiga_i_2__n.BLIF sm_amiga_i_6__n.BLIF N_373_i_1 11 1 -.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C +.names RST_DLY_1_.BLIF rst_dly_i_1__n +0 1 +.names A_DECODE_3_.BLIF a_decode_3__n +1 1 +.names N_373_i_1.BLIF sm_amiga_i_4__n.BLIF N_373_i +11 1 +.names RST_DLY_0_.BLIF RST_DLY_1_.BLIF N_147_i +11 1 +.names A_DECODE_2_.BLIF a_decode_2__n 1 1 .names size_c_0__n.BLIF a_c_i_0__n.BLIF pos_clk_un10_sm_amiga_i_1_n 11 1 -.names N_322_i.BLIF RST_DLY_2_.BLIF N_364 +.names cpu_est_i_0__n.BLIF cpu_est_i_2__n.BLIF N_152_i 11 1 .names pos_clk_un10_sm_amiga_i_1_n.BLIF size_c_i_1__n.BLIF pos_clk_un10_sm_amiga_i_n 11 1 -.names N_108.BLIF RST_c.BLIF N_368 +.names N_255_i.BLIF N_256_i.BLIF N_161_i 11 1 -.names ahigh_i_24__n.BLIF ahigh_i_25__n.BLIF un10_ciin_1 +.names CLK_OSZI_c.BLIF inst_A0_DMA.C +1 1 +.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_124_1 11 1 -.names N_364_i_0.BLIF RST_c.BLIF N_245_i +.names N_258.BLIF N_258_i_0 +0 1 +.names a_decode_c_17__n.BLIF a_decode_i_16__n.BLIF N_124_2 11 1 -.names ahigh_i_26__n.BLIF ahigh_i_27__n.BLIF un10_ciin_2 +.names N_136_i.BLIF N_258_i_0.BLIF N_397 11 1 -.names N_257_i.BLIF N_258_i.BLIF cpu_est_0_.D +.names a_decode_i_18__n.BLIF a_decode_i_19__n.BLIF N_124_3 +11 1 +.names CLK_000_D_9_.BLIF clk_000_d_i_9__n +0 1 +.names N_124_1.BLIF N_124_2.BLIF N_124_4 +11 1 +.names CLK_000_D_10_.BLIF clk_000_d_i_9__n.BLIF N_251 +11 1 +.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C +1 1 +.names ipl_c_2__n.BLIF ipl_c_i_2__n +0 1 +.names N_136_i.BLIF RST_c.BLIF N_253 +11 1 +.names N_54_0.BLIF IPL_D0_2_.D +0 1 +.names inst_DTACK_D0.BLIF DTACK_D0_i +0 1 +.names ipl_c_1__n.BLIF ipl_c_i_1__n +0 1 +.names DTACK_D0_i.BLIF inst_VPA_D.BLIF N_256 +11 1 +.names N_53_0.BLIF IPL_D0_1_.D +0 1 +.names N_147_i.BLIF RST_DLY_2_.BLIF N_258 11 1 .names CLK_OSZI_c.BLIF inst_RW_000_DMA.C 1 1 -.names N_235.BLIF N_235_i -0 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_108_i -11 1 -.names N_236.BLIF N_236_i -0 1 -.names N_312_i.BLIF RST_c.BLIF N_139_0 -11 1 -.names sm_amiga_nss_0_4__n.BLIF SM_AMIGA_3_.D -0 1 -.names RST_DLY_0_.BLIF rst_dly_i_0__n -0 1 -.names N_234.BLIF N_234_i -0 1 -.names RST_DLY_1_.BLIF rst_dly_i_1__n -0 1 -.names CLK_OSZI_c.BLIF inst_RW_000_INT.C -1 1 -.names sm_amiga_nss_0_5__n.BLIF SM_AMIGA_2_.D -0 1 -.names RST_DLY_0_.BLIF RST_DLY_1_.BLIF N_322_i -11 1 -.names N_231.BLIF N_231_i -0 1 -.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n -0 1 -.names N_232.BLIF N_232_i -0 1 -.names SM_AMIGA_i_7_.BLIF sm_amiga_i_i_7__n -0 1 -.names sm_amiga_nss_0_6__n.BLIF SM_AMIGA_1_.D -0 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n -0 1 -.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C -1 1 -.names N_230.BLIF N_230_i -0 1 -.names BGACK_030_INT_i.BLIF nEXP_SPACE_c_i.BLIF un1_as_030_i -11 1 -.names sm_amiga_nss_0_7__n.BLIF SM_AMIGA_0_.D -0 1 -.names N_157.BLIF N_157_i -0 1 -.names N_226.BLIF N_226_i -0 1 -.names FPU_SENSE_c.BLIF FPU_SENSE_i -0 1 -.names N_331.BLIF N_331_i -0 1 -.names AS_030_c.BLIF AS_030_i -0 1 -.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C -1 1 -.names N_27.BLIF N_27_i -0 1 -.names AS_030_i.BLIF BGACK_000_c.BLIF un22_berr_1 -11 1 -.names N_30_0.BLIF IPL_030DFF_0_reg.D -0 1 -.names N_139.BLIF N_364.BLIF N_219 -11 1 .names ipl_c_0__n.BLIF ipl_c_i_0__n 0 1 -.names RST_DLY_2_.BLIF rst_dly_i_2__n -0 1 -.names N_142_0.BLIF N_142 -0 1 -.names N_108.BLIF rst_dly_i_2__n.BLIF N_220 +.names N_136.BLIF RST_c.BLIF N_266 11 1 -.names CLK_OSZI_c.BLIF inst_BGACK_030_INT_D.C -1 1 -.names N_311.BLIF N_311_i +.names N_52_0.BLIF IPL_D0_0_.D 0 1 -.names N_139.BLIF N_322_i.BLIF N_222 +.names cpu_est_2_.BLIF cpu_est_i_2__n +0 1 +.names N_3.BLIF N_3_i +0 1 +.names N_146_i.BLIF cpu_est_i_2__n.BLIF N_267 11 1 -.names N_319_i.BLIF N_319 +.names N_50_0.BLIF inst_DS_000_DMA.D 0 1 -.names N_368.BLIF rst_dly_i_1__n.BLIF N_223 +.names N_198_i.BLIF N_199_i.BLIF sm_amiga_nss_0_6__n 11 1 -.names N_272_0.BLIF N_272 -0 1 -.names N_139.BLIF RST_DLY_0_.BLIF N_226 -11 1 -.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_D.D -1 1 -.names N_290.BLIF N_290_i -0 1 -.names N_368.BLIF rst_dly_i_0__n.BLIF N_331 -11 1 -.names N_273_0.BLIF N_273 -0 1 -.names cpu_est_0_.BLIF cpu_est_i_0__n -0 1 -.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_D.C -1 1 -.names N_346.BLIF N_346_i -0 1 -.names N_108.BLIF cpu_est_i_0__n.BLIF N_257 -11 1 -.names pos_clk_ds_000_dma_4_0_n.BLIF pos_clk_ds_000_dma_4_n -0 1 -.names N_108_i.BLIF cpu_est_0_.BLIF N_258 -11 1 -.names N_268.BLIF N_268_i -0 1 -.names a_decode_c_19__n.BLIF a_decode_i_19__n -0 1 -.names inst_CLK_OUT_PRE_D.BLIF CLK_OUT_INTreg.D -1 1 -.names N_269.BLIF N_269_i -0 1 -.names a_decode_c_16__n.BLIF a_decode_i_16__n -0 1 -.names sm_amiga_nss_0_3__n.BLIF SM_AMIGA_4_.D -0 1 -.names N_319_i.BLIF SM_AMIGA_6_.BLIF N_113 -11 1 -.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C -1 1 -.names N_341.BLIF N_341_i -0 1 -.names N_363.BLIF RST_c.BLIF N_259 -11 1 -.names N_238.BLIF N_238_i -0 1 -.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF pos_clk_a0_dma_3_n -11 1 -.names N_239.BLIF N_239_i -0 1 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_363 -11 1 -.names sm_amiga_nss_0_2__n.BLIF SM_AMIGA_5_.D -0 1 -.names nEXP_SPACE_c_i.BLIF un10_ciin_i.BLIF N_313_0 -11 1 -.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_50.C -1 1 -.names N_362.BLIF N_362_i -0 1 -.names N_113_i.BLIF N_182_i.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_i_7_.C -1 1 -.names N_169_i.BLIF N_169 -0 1 -.names N_182_i.BLIF RW_c_i.BLIF pos_clk_rw_000_int_5_0_n -11 1 -.names N_186_0.BLIF N_186 -0 1 -.names N_260_i.BLIF pos_clk_un3_as_030_d0_0_n.BLIF N_67_0 -11 1 -.names IPL_D0_2_.BLIF G_118.X1 -1 1 -.names N_195_0.BLIF N_195 -0 1 -.names N_113_i.BLIF pos_clk_un3_as_030_d0_0_n.BLIF N_279_0 -11 1 -.names N_196_0.BLIF N_196 -0 1 -.names N_114_i.BLIF pos_clk_un3_as_030_d0_0_n.BLIF N_278_0 -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C -1 1 -.names ipl_c_2__n.BLIF G_118.X2 -1 1 -.names N_263.BLIF N_263_i -0 1 -.names N_115_i.BLIF pos_clk_un3_as_030_d0_0_n.BLIF N_63_0 -11 1 -.names N_262.BLIF N_262_i -0 1 -.names AS_030_i.BLIF RST_c.BLIF N_107_0 -11 1 -.names N_323_0.BLIF N_323 -0 1 -.names AS_030_D0_i.BLIF BERR_c.BLIF pos_clk_un3_as_030_d0_0_n -11 1 -.names IPL_D0_1_.BLIF G_117.X1 -1 1 -.names N_101_i.BLIF inst_BGACK_030_INT_D.D -0 1 -.names N_113.BLIF N_113_i -0 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C -1 1 -.names N_366.BLIF N_366_i -0 1 -.names N_279.BLIF as_000_int_0_un3_n -0 1 -.names ipl_c_1__n.BLIF G_117.X2 -1 1 -.names pos_clk_un23_bgack_030_int_i_0_0_n.BLIF pos_clk_un23_bgack_030_int_i_0_n -0 1 -.names N_113_i.BLIF N_279.BLIF as_000_int_0_un1_n -11 1 -.names N_310.BLIF N_310_i -0 1 -.names inst_AS_000_INT.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n -11 1 -.names N_359.BLIF N_359_i -0 1 -.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF N_5 -1- 1 --1 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C -1 1 -.names CYCLE_DMA_1_.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.X1 -1 1 -.names N_144_0.BLIF N_144 -0 1 -.names N_63.BLIF ds_000_enable_0_un3_n -0 1 -.names inst_CLK_OUT_PRE_D.BLIF CLK_OUT_PRE_D_i -0 1 -.names N_115.BLIF N_63.BLIF ds_000_enable_0_un1_n -11 1 -.names N_263.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.X2 -1 1 -.names N_251.BLIF N_251_i -0 1 -.names inst_DS_000_ENABLE.BLIF ds_000_enable_0_un3_n.BLIF ds_000_enable_0_un0_n -11 1 -.names cpu_est_2_0_1__n.BLIF cpu_est_2_1__n -0 1 -.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_6 -1- 1 --1 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C -1 1 -.names N_253.BLIF N_253_i -0 1 -.names N_67.BLIF as_030_000_sync_0_un3_n -0 1 -.names CYCLE_DMA_0_.BLIF pos_clk_un23_bgack_030_int_i_0_o2_2_x2.X1 -1 1 -.names N_369.BLIF N_369_i -0 1 -.names pos_clk_un3_as_030_d0_n.BLIF N_67.BLIF as_030_000_sync_0_un1_n -11 1 -.names cpu_est_2_0_2__n.BLIF cpu_est_2_2__n -0 1 -.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n -11 1 -.names CYCLE_DMA_1_.BLIF pos_clk_un23_bgack_030_int_i_0_o2_2_x2.X2 -1 1 -.names N_254.BLIF N_254_i -0 1 -.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_7 -1- 1 --1 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C -1 1 -.names N_256.BLIF N_256_i -0 1 -.names un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un3_n -0 1 -.names N_255.BLIF N_255_i -0 1 -.names pos_clk_rw_000_int_5_n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un1_n -11 1 -.names IPL_D0_0_.BLIF G_116.X1 -1 1 -.names N_267.BLIF N_267_i -0 1 -.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n -11 1 -.names N_266.BLIF N_266_i -0 1 -.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_18 -1- 1 --1 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C -1 1 -.names ipl_c_0__n.BLIF G_116.X2 -1 1 -.names N_57_0.BLIF inst_RESET_OUT.D -0 1 -.names N_363.BLIF a0_dma_0_un3_n -0 1 -.names N_151_0.BLIF N_151 -0 1 -.names inst_A0_DMA.BLIF N_363.BLIF a0_dma_0_un1_n -11 1 -.names N_321_i.BLIF N_321 -0 1 -.names pos_clk_a0_dma_3_n.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n -11 1 -.names CLK_000_D_5_.BLIF CLK_000_D_6_.D -1 1 -.names inst_VMA_INTreg.BLIF VMA_INT_i -0 1 -.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF N_22 -1- 1 --1 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C -1 1 -.names CLK_000_D_6_.BLIF CLK_000_D_7_.D -1 1 -.names N_361.BLIF N_361_i -0 1 -.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n -0 1 -.names CLK_000_D_7_.BLIF CLK_000_D_8_.D -1 1 -.names N_283.BLIF N_283_i -0 1 -.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n -11 1 -.names CLK_000_D_8_.BLIF CLK_000_D_9_.D -1 1 -.names pos_clk_size_dma_6_0_0__n.BLIF pos_clk_size_dma_6_0__n -0 1 -.names BG_000DFFreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n -11 1 -.names CLK_000_D_9_.BLIF CLK_000_D_10_.D -1 1 -.names N_345.BLIF N_345_i -0 1 -.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF N_26 -1- 1 --1 1 -.names CLK_OSZI_c.BLIF cpu_est_2_.C -1 1 -.names CLK_000_D_3_.BLIF CLK_000_D_4_.D -1 1 -.names pos_clk_size_dma_6_0_1__n.BLIF pos_clk_size_dma_6_1__n -0 1 -.names N_6.BLIF RST_c.BLIF inst_DS_000_ENABLE.D -11 1 -.names CLK_000_D_4_.BLIF CLK_000_D_5_.D -1 1 -.names UDS_000_c.BLIF UDS_000_c_i -0 1 -.names N_26_i.BLIF RST_c.BLIF N_33_0 -11 1 -.names LDS_000_c.BLIF LDS_000_c_i -0 1 -.names N_22_i.BLIF RST_c.BLIF N_37_0 -11 1 -.names N_171_i.BLIF N_171 -0 1 -.names N_18_i.BLIF RST_c.BLIF N_41_0 -11 1 -.names CLK_OSZI_c.BLIF cpu_est_3_.C -1 1 -.names N_21.BLIF N_21_i -0 1 -.names N_7_i.BLIF RST_c.BLIF N_46_0 -11 1 -.names N_38_0.BLIF inst_VMA_INTreg.D -0 1 -.names N_5_i.BLIF RST_c.BLIF N_47_0 -11 1 -.names DTACK_c.BLIF DTACK_c_i -0 1 -.names N_4_i.BLIF RST_c.BLIF N_48_0 -11 1 -.names N_55_0.BLIF inst_DTACK_D0.D -0 1 -.names a_decode_c_18__n.BLIF a_decode_i_18__n -0 1 -.names CLK_OSZI_c.BLIF IPL_030DFF_0_reg.C -1 1 -.names N_249.BLIF N_249_i -0 1 -.names BGACK_030_INT_i.BLIF N_171.BLIF N_283 -11 1 -.names N_248.BLIF N_248_i -0 1 -.names SIZE_DMA_0_.BLIF size_dma_i_0__n -0 1 -.names pos_clk_un9_clk_000_pe_0_n.BLIF pos_clk_un9_clk_000_pe_n -0 1 -.names SIZE_DMA_1_.BLIF size_dma_i_0__n.BLIF un3_size -11 1 -.names N_250.BLIF N_250_i -0 1 -.names SIZE_DMA_1_.BLIF size_dma_i_1__n -0 1 -.names CLK_OSZI_c.BLIF IPL_030DFF_1_reg.C -1 1 -.names N_18.BLIF N_18_i -0 1 -.names SIZE_DMA_0_.BLIF size_dma_i_1__n.BLIF un4_size -11 1 -.names N_41_0.BLIF inst_RW_000_INT.D -0 1 -.names N_259.BLIF size_dma_0_1__un3_n -0 1 -.names N_22.BLIF N_22_i -0 1 -.names SIZE_DMA_1_.BLIF N_259.BLIF size_dma_0_1__un1_n -11 1 -.names N_37_0.BLIF inst_A0_DMA.D -0 1 -.names pos_clk_size_dma_6_1__n.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un0_n -11 1 -.names CLK_OSZI_c.BLIF IPL_030DFF_2_reg.C -1 1 -.names N_26.BLIF N_26_i -0 1 -.names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D -1- 1 --1 1 -.names N_33_0.BLIF BG_000DFFreg.D -0 1 -.names N_259.BLIF size_dma_0_0__un3_n -0 1 -.names BG_030_c.BLIF BG_030_c_i -0 1 -.names SIZE_DMA_0_.BLIF N_259.BLIF size_dma_0_0__un1_n -11 1 -.names pos_clk_un6_bg_030_n.BLIF pos_clk_un6_bg_030_i_n -0 1 -.names pos_clk_size_dma_6_0__n.BLIF size_dma_0_0__un3_n.BLIF size_dma_0_0__un0_n -11 1 -.names CLK_OSZI_c.BLIF IPL_D0_0_.C -1 1 -.names pos_clk_un9_bg_030_0_n.BLIF pos_clk_un9_bg_030_n -0 1 -.names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D -1- 1 --1 1 -.names N_10.BLIF N_10_i -0 1 -.names RST_c.BLIF VPA_c_i.BLIF N_54_0 -11 1 -.names N_43_0.BLIF inst_BGACK_030_INTreg.D -0 1 -.names N_10_i.BLIF RST_c.BLIF N_43_0 -11 1 -.names VPA_c.BLIF VPA_c_i -0 1 -.names pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n -0 1 -.names CLK_OSZI_c.BLIF IPL_D0_1_.C -1 1 -.names N_54_0.BLIF inst_VPA_D.D -0 1 -.names BGACK_000_c.BLIF pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n -11 1 -.names N_370.BLIF N_370_i -0 1 -.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un0_n -11 1 -.names pos_clk_un6_bgack_000_0_n.BLIF pos_clk_un6_bgack_000_n -0 1 -.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_10 -1- 1 --1 1 -.names N_63_0.BLIF N_63 -0 1 -.names BG_030_c_i.BLIF pos_clk_un6_bg_030_i_n.BLIF pos_clk_un9_bg_030_0_n -11 1 -.names CLK_OSZI_c.BLIF IPL_D0_2_.C -1 1 -.names N_278_0.BLIF N_278 -0 1 -.names inst_AS_000_INT.BLIF AS_000_INT_i -0 1 -.names N_279_0.BLIF N_279 -0 1 -.names AS_000_INT_i.BLIF AS_030_i.BLIF un4_as_000 -11 1 -.names N_260.BLIF N_260_i -0 1 -.names N_114.BLIF N_114_i -0 1 -.names N_67_0.BLIF N_67 -0 1 -.names N_278.BLIF dsack1_int_0_un3_n -0 1 -.names CLK_OSZI_c.BLIF CLK_000_D_6_.C -1 1 -.names pos_clk_rw_000_int_5_0_n.BLIF pos_clk_rw_000_int_5_n -0 1 -.names N_114_i.BLIF N_278.BLIF dsack1_int_0_un1_n -11 1 -.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 -0 1 -.names inst_DSACK1_INTreg.BLIF dsack1_int_0_un3_n.BLIF dsack1_int_0_un0_n -11 1 -.names un10_ciin.BLIF un10_ciin_i -0 1 -.names dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF N_4 -1- 1 --1 1 -.names N_313_0.BLIF N_313 -0 1 -.names N_108.BLIF cpu_est_0_3__un3_n -0 1 -.names CLK_OSZI_c.BLIF CLK_000_D_7_.C +.names CLK_OSZI_c.BLIF inst_RW_000_INT.C 1 1 .names N_4.BLIF N_4_i 0 1 -.names cpu_est_3_.BLIF N_108.BLIF cpu_est_0_3__un1_n +.names N_215_i.BLIF N_216_i.BLIF cpu_est_0_.D 11 1 -.names N_48_0.BLIF inst_DSACK1_INTreg.D +.names N_49_0.BLIF inst_DSACK1_INTreg.D 0 1 -.names N_316_i.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n +.names N_220_i.BLIF N_221_i.BLIF pos_clk_un9_clk_000_pe_0_n 11 1 .names N_5.BLIF N_5_i 0 1 -.names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_.D -1- 1 --1 1 -.names N_47_0.BLIF inst_AS_000_INT.D +.names N_222_i.BLIF N_223_i.BLIF cpu_est_2_0_1__n +11 1 +.names N_48_0.BLIF inst_AS_000_INT.D 0 1 -.names N_108.BLIF cpu_est_0_2__un3_n -0 1 -.names CLK_OSZI_c.BLIF CLK_000_D_8_.C +.names N_136.BLIF rst_dly_i_2__n.BLIF N_186 +11 1 +.names CLK_OSZI_c.BLIF inst_BGACK_030_INT_D.C 1 1 .names N_7.BLIF N_7_i 0 1 -.names cpu_est_2_.BLIF N_108.BLIF cpu_est_0_2__un1_n +.names N_142.BLIF N_147_i.BLIF N_188 11 1 -.names N_46_0.BLIF inst_AS_030_000_SYNC.D +.names N_47_0.BLIF inst_AS_030_000_SYNC.D 0 1 -.names cpu_est_2_2__n.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n +.names N_266.BLIF rst_dly_i_1__n.BLIF N_189 11 1 -.names N_219.BLIF N_219_i +.names N_8.BLIF N_8_i 0 1 -.names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D -1- 1 --1 1 -.names N_218.BLIF N_218_i -0 1 -.names N_108.BLIF cpu_est_0_1__un3_n -0 1 -.names CLK_OSZI_c.BLIF CLK_000_D_9_.C -1 1 -.names N_224.BLIF N_224_i -0 1 -.names cpu_est_1_.BLIF N_108.BLIF cpu_est_0_1__un1_n +.names N_136.BLIF N_261.BLIF N_198 11 1 -.names N_222.BLIF N_222_i +.names inst_CLK_OUT_PRE_25.BLIF inst_CLK_OUT_PRE_D.D +1 1 +.names N_305_0.BLIF N_305 0 1 -.names cpu_est_2_1__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n +.names N_254.BLIF SM_AMIGA_2_.BLIF N_199 11 1 -.names N_223.BLIF N_223_i +.names N_212.BLIF N_212_i 0 1 -.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D -1- 1 --1 1 -.names A_DECODE_16_.BLIF a_decode_c_16__n -1 1 -.names N_322_i.BLIF N_322 -0 1 -.names DTACK_c_i.BLIF RST_c.BLIF N_55_0 +.names N_136.BLIF cpu_est_i_0__n.BLIF N_215 11 1 -.names CLK_OSZI_c.BLIF CLK_000_D_10_.C +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_D.C 1 1 -.names A_DECODE_17_.BLIF a_decode_c_17__n -1 1 -.names N_312.BLIF N_312_i +.names N_307_0.BLIF N_307 0 1 -.names N_21_i.BLIF RST_c.BLIF N_38_0 +.names N_136_i.BLIF cpu_est_0_.BLIF N_216 11 1 -.names A_DECODE_18_.BLIF a_decode_c_18__n -1 1 -.names N_139_0.BLIF N_139 +.names N_211.BLIF N_211_i 0 1 -.names cpu_est_1_.BLIF cpu_est_i_1__n +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_222 +11 1 +.names pos_clk_ds_000_dma_4_0_n.BLIF pos_clk_ds_000_dma_4_n 0 1 -.names A_DECODE_19_.BLIF a_decode_c_19__n +.names N_146.BLIF cpu_est_2_.BLIF N_224 +11 1 +.names N_205.BLIF N_205_i +0 1 +.names N_173.BLIF cpu_est_i_2__n.BLIF N_225 +11 1 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_50.C 1 1 -.names N_108_i.BLIF N_108 +.names N_206.BLIF N_206_i +0 1 +.names N_170.BLIF cpu_est_2_.BLIF N_226 +11 1 +.names sm_amiga_nss_0_2__n.BLIF SM_AMIGA_5_.D +0 1 +.names N_145.BLIF cpu_est_i_2__n.BLIF N_227 +11 1 +.names N_200.BLIF N_200_i +0 1 +.names N_151.BLIF SM_AMIGA_1_.BLIF N_86 +11 1 +.names inst_CLK_OUT_PRE_D.BLIF CLK_OUT_INTreg.D +1 1 +.names sm_amiga_nss_0_5__n.BLIF SM_AMIGA_2_.D +0 1 +.names N_142.BLIF RST_DLY_0_.BLIF N_236 +11 1 +.names N_197.BLIF N_197_i +0 1 +.names N_266.BLIF rst_dly_i_0__n.BLIF N_237 +11 1 +.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C +1 1 +.names N_29.BLIF N_29_i +0 1 +.names N_26_i.BLIF RST_c.BLIF N_34_0 +11 1 +.names N_33_0.BLIF IPL_030DFF_2_reg.D +0 1 +.names N_213_i.BLIF N_214_i.BLIF N_306_0 +11 1 +.names N_27.BLIF N_27_i +0 1 +.names AS_030_i.BLIF RST_c.BLIF N_133_0 +11 1 +.names CYCLE_DMA_0_.BLIF pos_clk_un21_bgack_030_int_i_0_o2_2_x2.X1 +1 1 +.names N_31_0.BLIF IPL_030DFF_0_reg.D +0 1 +.names BGACK_030_INT_i.BLIF nEXP_SPACE_c_i.BLIF un1_as_030_i +11 1 +.names N_174_0.BLIF N_174 +0 1 +.names SM_AMIGA_i_7_.BLIF sm_amiga_i_i_7__n +0 1 +.names CYCLE_DMA_1_.BLIF pos_clk_un21_bgack_030_int_i_0_o2_2_x2.X2 +1 1 +.names N_169_i.BLIF inst_BGACK_030_INT_D.D +0 1 +.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i +0 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_i_7_.C +1 1 +.names N_260.BLIF N_260_i +0 1 +.names AS_030_000_SYNC_i.BLIF nEXP_SPACE_c.BLIF N_214_1 +11 1 +.names pos_clk_un3_as_030_d0_i_n.BLIF pos_clk_un3_as_030_d0_n +0 1 +.names FPU_SENSE_c.BLIF FPU_SENSE_i +0 1 +.names CYCLE_DMA_1_.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.X1 +1 1 +.names pos_clk_un21_bgack_030_int_i_0_0_n.BLIF pos_clk_un21_bgack_030_int_i_0_n 0 1 .names pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un3_n 0 1 -.names CLK_000_D_10_.BLIF CLK_000_D_11_.D -1 1 -.names A_DECODE_20_.BLIF a_decode_c_20__n -1 1 -.names N_258.BLIF N_258_i +.names inst_CLK_OUT_PRE_D.BLIF CLK_OUT_PRE_D_i 0 1 .names cpu_est_i_1__n.BLIF pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un1_n 11 1 -.names A_DECODE_21_.BLIF a_decode_c_21__n +.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C 1 1 -.names N_257.BLIF N_257_i +.names N_113.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.X2 +1 1 +.names N_143_0.BLIF N_143 0 1 .names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n 11 1 -.names CLK_OSZI_c.BLIF CLK_000_D_11_.C -1 1 -.names A_DECODE_22_.BLIF a_decode_c_22__n -1 1 -.names nEXP_SPACE_c.BLIF nEXP_SPACE_c_i +.names N_396.BLIF N_396_i 0 1 .names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_21 1- 1 -1 1 -.names A_DECODE_23_.BLIF a_decode_c_23__n -1 1 -.names pos_clk_un3_as_030_d0_0_n.BLIF pos_clk_un3_as_030_d0_n +.names N_137_i.BLIF N_137 0 1 -.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_171_i +.names N_21_i.BLIF RST_c.BLIF N_39_0 11 1 -.names N_107_0.BLIF inst_AS_030_D0.D +.names inst_CLK_OUT_PRE_25.BLIF CLK_OUT_PRE_25_0.X1 +1 1 +.names N_236.BLIF N_236_i 0 1 -.names N_345_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n +.names N_136.BLIF cpu_est_0_1__un3_n +0 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C +1 1 +.names N_237.BLIF N_237_i +0 1 +.names cpu_est_1_.BLIF N_136.BLIF cpu_est_0_1__un1_n 11 1 -.names CLK_000_D_11_.BLIF CLK_000_D_12_.D +.names inst_CLK_OUT_PRE_50.BLIF CLK_OUT_PRE_25_0.X2 1 1 -.names A_1_.BLIF a_c_1__n -1 1 -.names N_115.BLIF N_115_i +.names N_280_0.BLIF N_280 0 1 -.names N_283_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n -11 1 -.names nEXP_SPACE.BLIF nEXP_SPACE_c -1 1 -.names N_356.BLIF N_356_i -0 1 -.names BGACK_000_c.BLIF N_370_i.BLIF pos_clk_un6_bgack_000_0_n -11 1 -.names CLK_OSZI_c.BLIF CLK_000_D_12_.C -1 1 -.names N_156_0.BLIF N_156 -0 1 -.names inst_RESET_OUT.BLIF RESET_OUT_i -0 1 -.names BG_030.BLIF BG_030_c -1 1 -.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n -0 1 -.names inst_RESET_OUT.BLIF un1_as_030_i.BLIF un3_as_030_i -11 1 -.names BG_000DFFreg.BLIF BG_000 -1 1 -.names N_159_i.BLIF N_159 -0 1 -.names AS_000_c.BLIF N_319_i.BLIF N_370 -11 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030 -1 1 -.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n -0 1 -.names BGACK_030_INT_i.BLIF N_171_i.BLIF N_345 -11 1 -.names CLK_OSZI_c.BLIF CYCLE_DMA_0_.C -1 1 -.names BGACK_000.BLIF BGACK_000_c -1 1 -.names N_180_i.BLIF N_180 -0 1 -.names N_253_i.BLIF N_369_i.BLIF cpu_est_2_0_2__n -11 1 -.names CLK_030.BLIF CLK_030_c -1 1 -.names N_334.BLIF N_334_i -0 1 -.names N_250_i.BLIF N_251_i.BLIF cpu_est_2_0_1__n -11 1 -.names CLK_000.BLIF CLK_000_D_0_.D -1 1 -.names N_335.BLIF N_335_i -0 1 -.names N_248_i.BLIF N_249_i.BLIF pos_clk_un9_clk_000_pe_0_n -11 1 -.names CLK_OSZI.BLIF CLK_OSZI_c -1 1 -.names N_244.BLIF N_244_i -0 1 -.names N_321_i.BLIF cpu_est_i_2__n.BLIF N_369 -11 1 -.names CLK_OSZI_c.BLIF CYCLE_DMA_1_.C -1 1 -.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT -1 1 -.names N_233.BLIF N_233_i -0 1 -.names inst_DTACK_D0.BLIF DTACK_D0_i -0 1 -.names CLK_OUT_INTreg.BLIF CLK_EXP -1 1 -.names N_355.BLIF N_355_i -0 1 -.names DTACK_D0_i.BLIF inst_VPA_D.BLIF N_362 -11 1 -.names un21_fpu_cs_i.BLIF FPU_CS -1 1 -.names N_229.BLIF N_229_i -0 1 -.names inst_VPA_D.BLIF VPA_D_i -0 1 -.names FPU_SENSE.BLIF FPU_SENSE_c -1 1 -.names N_246.BLIF N_246_i -0 1 -.names N_360.BLIF N_364.BLIF N_267 -11 1 -.names CLK_OSZI_c.BLIF SIZE_DMA_0_.C -1 1 -.names IPL_030DFF_0_reg.BLIF IPL_030_0_ -1 1 -.names sm_amiga_nss_i_0_0__n.BLIF SM_AMIGA_i_7_.D -0 1 -.names inst_RESET_OUT.BLIF RST_c.BLIF N_266 -11 1 -.names IPL_030DFF_1_reg.BLIF IPL_030_1_ -1 1 -.names N_220.BLIF N_220_i -0 1 -.names N_151.BLIF cpu_est_i_2__n.BLIF N_256 -11 1 -.names IPL_030DFF_2_reg.BLIF IPL_030_2_ -1 1 -.names size_c_1__n.BLIF size_c_i_1__n -0 1 -.names N_186.BLIF cpu_est_2_.BLIF N_255 -11 1 -.names IPL_0_.BLIF ipl_c_0__n -1 1 -.names N_332.BLIF N_332_i -0 1 -.names cpu_est_2_.BLIF cpu_est_i_2__n -0 1 -.names CLK_OSZI_c.BLIF SIZE_DMA_1_.C -1 1 -.names IPL_1_.BLIF ipl_c_1__n -1 1 -.names N_240.BLIF N_240_i -0 1 -.names N_196.BLIF cpu_est_i_2__n.BLIF N_254 -11 1 -.names IPL_2_.BLIF ipl_c_2__n -1 1 -.names N_315_0.BLIF SM_AMIGA_6_.D -0 1 -.names N_321.BLIF cpu_est_2_.BLIF N_253 +.names cpu_est_2_1__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n 11 1 .names N_281_0.BLIF N_281 0 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_250 -11 1 -.names DTACK.BLIF DTACK_c -1 1 -.names N_270.BLIF N_270_i +.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D +1- 1 +-1 1 +.names N_229.BLIF N_229_i 0 1 -.names N_366_i.BLIF SM_AMIGA_i_7_.BLIF N_182_i -11 1 -.names CLK_OSZI_c.BLIF cpu_est_0_.C -1 1 -.names vcc_n_n.BLIF AVEC -1 1 -.names N_282.BLIF N_282_i +.names N_136.BLIF cpu_est_0_2__un3_n 0 1 -.names BGACK_030_INT_i.BLIF RST_c.BLIF N_101_i -11 1 -.names N_317_i.BLIF E +.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C 1 1 +.names IPL_D0_0_.BLIF G_117.X1 +1 1 +.names N_66_0.BLIF N_66 +0 1 +.names cpu_est_2_.BLIF N_136.BLIF cpu_est_0_2__un1_n +11 1 .names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c 0 1 -.names AS_000_DMA_i.BLIF CLK_030_i.BLIF N_323_0 +.names cpu_est_2_2__n.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n 11 1 -.names VPA.BLIF VPA_c +.names ipl_c_0__n.BLIF G_117.X2 1 1 +.names N_209.BLIF N_209_i +0 1 +.names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D +1- 1 +-1 1 +.names pos_clk_size_dma_6_0_0__n.BLIF pos_clk_size_dma_6_0__n +0 1 +.names N_136.BLIF cpu_est_0_3__un3_n +0 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C +1 1 +.names N_210.BLIF N_210_i +0 1 +.names cpu_est_3_.BLIF N_136.BLIF cpu_est_0_3__un1_n +11 1 +.names IPL_D0_1_.BLIF G_118.X1 +1 1 +.names pos_clk_size_dma_6_0_1__n.BLIF pos_clk_size_dma_6_1__n +0 1 +.names N_230_i.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n +11 1 +.names N_268.BLIF N_268_i +0 1 +.names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_.D +1- 1 +-1 1 +.names ipl_c_1__n.BLIF G_118.X2 +1 1 +.names pos_clk_un6_bgack_000_0_n.BLIF pos_clk_un6_bgack_000_n +0 1 +.names N_142.BLIF N_258.BLIF N_185 +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C +1 1 +.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 +0 1 +.names RST_DLY_2_.BLIF rst_dly_i_2__n +0 1 .names RW_c.BLIF RW_c_i 0 1 -.names inst_VMA_INTreg.BLIF VMA -1 1 -.names N_140_0.BLIF N_140 -0 1 -.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF N_196_0 +.names N_24_i.BLIF RST_c.BLIF N_36_0 11 1 -.names CLK_OSZI_c.BLIF cpu_est_1_.C +.names IPL_D0_2_.BLIF G_119.X1 1 1 -.names RST.BLIF RST_c -1 1 -.names N_353.BLIF N_353_i +.names pos_clk_rw_000_int_5_0_n.BLIF pos_clk_rw_000_int_5_n 0 1 -.names N_108_i.BLIF N_169.BLIF N_195_0 +.names N_25_i.BLIF RST_c.BLIF N_35_0 11 1 -.names N_143_0.BLIF N_143 +.names UDS_000_c.BLIF UDS_000_c_i 0 1 -.names cpu_est_1_.BLIF cpu_est_i_3__n.BLIF N_186_0 -11 1 -.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +.names N_103.BLIF N_103_i 0 1 -.names N_361_i.BLIF N_362_i.BLIF N_169_i -11 1 -.names FC_0_.BLIF fc_c_0__n +.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C 1 1 -.names N_320_i.BLIF N_320 +.names ipl_c_2__n.BLIF G_119.X2 +1 1 +.names LDS_000_c.BLIF LDS_000_c_i 0 1 -.names cpu_est_i_0__n.BLIF cpu_est_i_2__n.BLIF N_158_i +.names N_257.BLIF amiga_bus_enable_dma_high_0_un3_n +0 1 +.names N_164_i.BLIF N_164 +0 1 +.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF N_257.BLIF amiga_bus_enable_dma_high_0_un1_n 11 1 -.names CLK_OSZI_c.BLIF RST_DLY_1_.C -1 1 -.names FC_1_.BLIF fc_c_1__n -1 1 -.names N_357.BLIF N_357_i +.names N_113.BLIF N_113_i 0 1 -.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_321_i +.names N_103_i.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF amiga_bus_enable_dma_high_0_un0_n 11 1 -.names gnd_n_n.BLIF AMIGA_ADDR_ENABLE +.names CLK_000_D_3_.BLIF CLK_000_D_4_.D 1 1 -.names N_23.BLIF N_23_i +.names N_195.BLIF N_195_i 0 1 -.names cpu_est_3_.BLIF cpu_est_i_3__n -0 1 -.names AMIGA_BUS_DATA_DIR_c.BLIF AMIGA_BUS_DATA_DIR +.names amiga_bus_enable_dma_high_0_un1_n.BLIF amiga_bus_enable_dma_high_0_un0_n.BLIF N_25 +1- 1 +-1 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C 1 1 -.names N_36_0.BLIF inst_UDS_000_INT.D +.names CLK_000_D_4_.BLIF CLK_000_D_5_.D +1 1 +.names N_24.BLIF N_24_i 0 1 -.names cpu_est_3_.BLIF cpu_est_i_1__n.BLIF N_151_0 +.names N_102.BLIF N_102_i +0 1 +.names CLK_000_D_5_.BLIF CLK_000_D_6_.D +1 1 +.names N_36_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D +0 1 +.names N_257.BLIF amiga_bus_enable_dma_low_0_un3_n +0 1 +.names CLK_000_D_6_.BLIF CLK_000_D_7_.D +1 1 +.names N_22.BLIF N_22_i +0 1 +.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF N_257.BLIF amiga_bus_enable_dma_low_0_un1_n 11 1 -.names un1_amiga_bus_enable_low_i.BLIF AMIGA_BUS_ENABLE_LOW +.names CLK_000_D_7_.BLIF CLK_000_D_8_.D +1 1 +.names N_38_0.BLIF inst_A0_DMA.D +0 1 +.names N_102_i.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF amiga_bus_enable_dma_low_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF cpu_est_2_.C +1 1 +.names CLK_000_D_2_.BLIF CLK_000_D_3_.D 1 1 .names N_19.BLIF N_19_i 0 1 -.names N_266_i.BLIF N_267_i.BLIF N_57_0 -11 1 -.names CLK_OSZI_c.BLIF RST_DLY_2_.C +.names amiga_bus_enable_dma_low_0_un1_n.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF N_24 +1- 1 +-1 1 +.names CLK_OUT_PRE_25_0.BLIF inst_CLK_OUT_PRE_25.D 1 1 -.names N_209.BLIF AMIGA_BUS_ENABLE_HIGH +.names N_41_0.BLIF inst_RW_000_DMA.D +0 1 +.names N_257.BLIF a0_dma_0_un3_n +0 1 +.names N_18.BLIF N_18_i +0 1 +.names inst_A0_DMA.BLIF N_257.BLIF a0_dma_0_un1_n +11 1 +.names N_42_0.BLIF inst_RW_000_INT.D +0 1 +.names pos_clk_a0_dma_3_n.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF cpu_est_3_.C 1 1 -.names N_40_0.BLIF inst_RW_000_DMA.D +.names N_10.BLIF N_10_i 0 1 -.names N_255_i.BLIF N_256_i.BLIF N_317_i -11 1 -.names N_17.BLIF N_17_i +.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF N_22 +1- 1 +-1 1 +.names N_44_0.BLIF inst_BGACK_030_INTreg.D 0 1 -.names N_253_i.BLIF N_254_i.BLIF N_316_i -11 1 -.names N_238_1.BLIF SM_AMIGA_5_.BLIF N_238 -11 1 -.names N_42_0.BLIF inst_LDS_000_INT.D +.names N_257.BLIF rw_000_dma_0_un3_n 0 1 -.names N_229_i.BLIF N_230_i.BLIF sm_amiga_nss_0_7__n -11 1 -.names N_169.BLIF N_360.BLIF N_233_1 -11 1 -.names ipl_c_1__n.BLIF ipl_c_i_1__n +.names N_311_0.BLIF N_311 0 1 -.names N_231_i.BLIF N_232_i.BLIF sm_amiga_nss_0_6__n +.names inst_RW_000_DMA.BLIF N_257.BLIF rw_000_dma_0_un1_n 11 1 -.names CLK_OSZI_c.BLIF CLK_000_D_0_.C +.names un10_ciin.BLIF un10_ciin_i +0 1 +.names N_311.BLIF rw_000_dma_0_un3_n.BLIF rw_000_dma_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF IPL_030DFF_0_reg.C 1 1 -.names N_233_1.BLIF SM_AMIGA_3_.BLIF N_233 -11 1 -.names N_52_0.BLIF IPL_D0_1_.D +.names N_310_0.BLIF N_310 0 1 -.names N_233_i.BLIF N_234_i.BLIF sm_amiga_nss_0_5__n -11 1 -.names N_108.BLIF N_310.BLIF N_231_1 -11 1 -.names ipl_c_2__n.BLIF ipl_c_i_2__n -0 1 -.names N_235_i.BLIF N_236_i.BLIF sm_amiga_nss_0_4__n -11 1 -.names N_231_1.BLIF SM_AMIGA_1_.BLIF N_231 -11 1 -.names N_53_0.BLIF IPL_D0_2_.D -0 1 -.names N_238_i.BLIF N_239_i.BLIF sm_amiga_nss_0_2__n -11 1 -.names CLK_000_D_0_.BLIF CLK_000_D_1_.D -1 1 -.names N_245_i.BLIF rst_dly_i_0__n.BLIF N_224_1 -11 1 -.names N_28.BLIF N_28_i -0 1 -.names N_268_i.BLIF N_269_i.BLIF sm_amiga_nss_0_3__n -11 1 -.names N_224_1.BLIF rst_dly_i_1__n.BLIF N_224 -11 1 -.names N_31_0.BLIF IPL_030DFF_1_reg.D -0 1 -.names N_346_i.BLIF pos_clk_un23_bgack_030_int_i_0_0_n.BLIF pos_clk_ds_000_dma_4_0_n -11 1 -.names CLK_OSZI_c.BLIF CLK_000_D_1_.C -1 1 -.names N_245_i.BLIF N_322.BLIF N_218_1 -11 1 -.names N_29.BLIF N_29_i -0 1 -.names CLK_030_i.BLIF pos_clk_un23_bgack_030_int_i_0_0_n.BLIF N_272_0 -11 1 -.names N_218_1.BLIF rst_dly_i_2__n.BLIF N_218 -11 1 -.names N_32_0.BLIF IPL_030DFF_2_reg.D -0 1 -.names BGACK_030_INT_i.BLIF inst_RESET_OUT.BLIF N_93_i -11 1 -.names N_243_i.BLIF N_241_i.BLIF pos_clk_ipl_1_n -11 1 -.names a_c_0__n.BLIF a_c_i_0__n -0 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_0__n -0 1 -.names CLK_000_D_1_.BLIF CLK_000_D_2_.D -1 1 -.names pos_clk_ipl_1_n.BLIF N_242_i.BLIF pos_clk_ipl_n -11 1 -.names N_25.BLIF N_25_i -0 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_319_i -11 1 -.names pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF AS_000_i.BLIF N_277_i_1 -11 1 -.names N_34_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D -0 1 -.names CLK_OSZI_c.BLIF CLK_000_D_2_.C -1 1 -.names N_277_i_1.BLIF N_101_i.BLIF CYCLE_DMA_1_.D -11 1 -.names N_24.BLIF N_24_i -0 1 -.names CLK_030_c.BLIF CLK_030_i -0 1 -.names N_226_i.BLIF N_331_i.BLIF N_314_i_1 -11 1 -.names N_35_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D -0 1 -.names CLK_030_c.BLIF CLK_OUT_PRE_D_i.BLIF N_142_0 -11 1 -.names N_314_i_1.BLIF RST_c.BLIF RST_DLY_0_.D -11 1 -.names N_363.BLIF rw_000_dma_0_un3_n -0 1 -.names N_310_i.BLIF N_359_i.BLIF N_144_0 -11 1 -.names CLK_000_D_2_.BLIF CLK_000_D_3_.D -1 1 -.names N_142.BLIF CLK_000_D_11_.BLIF N_356_1 -11 1 -.names inst_RW_000_DMA.BLIF N_363.BLIF rw_000_dma_0_un1_n -11 1 -.names CLK_030_H_i.BLIF N_323.BLIF N_341 -11 1 -.names N_356_1.BLIF clk_000_d_i_10__n.BLIF N_356 -11 1 -.names N_281.BLIF rw_000_dma_0_un3_n.BLIF rw_000_dma_0_un0_n -11 1 -.names N_365.BLIF SM_AMIGA_4_.BLIF N_268 -11 1 -.names CLK_OSZI_c.BLIF CLK_000_D_3_.C -1 1 -.names AS_000_i.BLIF RW_000_c.BLIF N_282_1 -11 1 .names rw_000_dma_0_un1_n.BLIF rw_000_dma_0_un0_n.BLIF N_19 1- 1 -1 1 -.names N_360.BLIF SM_AMIGA_5_.BLIF N_269 -11 1 -.names N_282_1.BLIF un1_as_030_i.BLIF N_282 -11 1 -.names SM_AMIGA_6_.BLIF lds_000_int_0_un3_n +.names N_207.BLIF N_207_i 0 1 -.names inst_AS_000_DMA.BLIF RW_000_i.BLIF N_346 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_251_1 -11 1 -.names pos_clk_un10_sm_amiga_i_n.BLIF SM_AMIGA_6_.BLIF lds_000_int_0_un1_n -11 1 -.names inst_CLK_030_H.BLIF CLK_030_c.BLIF N_290 -11 1 -.names N_251_1.BLIF cpu_est_i_3__n.BLIF N_251 -11 1 -.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n -11 1 -.names inst_AS_000_DMA.BLIF AS_000_DMA_i +.names un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un3_n 0 1 -.names CLK_OSZI_c.BLIF CLK_000_D_4_.C +.names N_208.BLIF N_208_i +0 1 +.names pos_clk_rw_000_int_5_n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un1_n +11 1 +.names sm_amiga_nss_0_6__n.BLIF SM_AMIGA_1_.D +0 1 +.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF IPL_030DFF_1_reg.C 1 1 -.names nEXP_SPACE_c.BLIF inst_AS_030_D0.BLIF pos_clk_un6_bg_030_1_n -11 1 -.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF N_17 +.names N_21.BLIF N_21_i +0 1 +.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_18 1- 1 -1 1 -.names AS_000_c.BLIF AS_000_i +.names N_39_0.BLIF inst_VMA_INTreg.D 0 1 -.names pos_clk_un6_bg_030_1_n.BLIF CLK_000_D_0_.BLIF pos_clk_un6_bg_030_n -11 1 -.names inst_LDS_000_INT.BLIF LDS_000_INT_i +.names pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n 0 1 -.names AS_000_DMA_i.BLIF AS_000_i.BLIF un6_as_030 -11 1 -.names N_365.BLIF SM_AMIGA_6_.BLIF N_240_1 -11 1 -.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un4_lds_000 -11 1 -.names LDS_000_c.BLIF UDS_000_c.BLIF N_311 -11 1 -.names N_240_1.BLIF SM_AMIGA_i_7_.BLIF N_240 -11 1 -.names inst_UDS_000_INT.BLIF UDS_000_INT_i +.names nEXP_SPACE_c.BLIF nEXP_SPACE_c_i 0 1 -.names N_310.BLIF SM_AMIGA_3_.BLIF N_355 +.names BGACK_000_c.BLIF pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n +11 1 +.names N_133_0.BLIF inst_AS_030_D0.D +0 1 +.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF IPL_030DFF_2_reg.C +1 1 +.names N_214.BLIF N_214_i +0 1 +.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_10 +1- 1 +-1 1 +.names N_213.BLIF N_213_i +0 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +0 1 +.names N_306_0.BLIF SM_AMIGA_6_.D +0 1 +.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i +0 1 +.names N_26.BLIF N_26_i +0 1 +.names AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF BGACK_030_INT_i.BLIF un1_amiga_bus_enable_low +11 1 +.names CLK_OSZI_c.BLIF IPL_D0_0_.C +1 1 +.names N_34_0.BLIF BG_000DFFreg.D +0 1 +.names BG_030_c_i.BLIF pos_clk_un6_bg_030_i_n.BLIF pos_clk_un9_bg_030_0_n +11 1 +.names BG_030_c.BLIF BG_030_c_i +0 1 +.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n +0 1 +.names pos_clk_un6_bg_030_n.BLIF pos_clk_un6_bg_030_i_n +0 1 +.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n +11 1 +.names pos_clk_un9_bg_030_0_n.BLIF pos_clk_un9_bg_030_n +0 1 +.names BG_000DFFreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF IPL_D0_1_.C +1 1 +.names N_25.BLIF N_25_i +0 1 +.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF N_26 +1- 1 +-1 1 +.names N_35_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D +0 1 +.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF pos_clk_a0_dma_3_n +11 1 +.names N_226.BLIF N_226_i +0 1 +.names BGACK_030_INT_i.BLIF N_164_i.BLIF N_210 +11 1 +.names N_224.BLIF N_224_i +0 1 +.names BGACK_030_INT_i.BLIF N_164.BLIF N_209 +11 1 +.names CLK_OSZI_c.BLIF IPL_D0_2_.C +1 1 +.names N_225.BLIF N_225_i +0 1 +.names RW_000_c.BLIF RW_000_i +0 1 +.names N_267.BLIF N_267_i +0 1 +.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF N_207 +11 1 +.names cpu_est_2_0_2__n.BLIF cpu_est_2_2__n +0 1 +.names SIZE_DMA_0_.BLIF size_dma_i_0__n +0 1 +.names N_222.BLIF N_222_i +0 1 +.names SIZE_DMA_1_.BLIF size_dma_i_0__n.BLIF un3_size +11 1 +.names CLK_OSZI_c.BLIF CLK_000_D_4_.C +1 1 +.names N_223.BLIF N_223_i +0 1 +.names SIZE_DMA_1_.BLIF size_dma_i_1__n +0 1 +.names cpu_est_2_0_1__n.BLIF cpu_est_2_1__n +0 1 +.names SIZE_DMA_0_.BLIF size_dma_i_1__n.BLIF un4_size +11 1 +.names N_221.BLIF N_221_i +0 1 +.names N_228.BLIF size_dma_0_1__un3_n +0 1 +.names N_220.BLIF N_220_i +0 1 +.names SIZE_DMA_1_.BLIF N_228.BLIF size_dma_0_1__un1_n 11 1 .names CLK_OSZI_c.BLIF CLK_000_D_5_.C 1 1 -.names N_108.BLIF N_310.BLIF N_238_1 +.names pos_clk_un9_clk_000_pe_0_n.BLIF pos_clk_un9_clk_000_pe_n +0 1 +.names pos_clk_size_dma_6_1__n.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un0_n +11 1 +.names N_216.BLIF N_216_i +0 1 +.names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D +1- 1 +-1 1 +.names N_215.BLIF N_215_i +0 1 +.names N_228.BLIF size_dma_0_0__un3_n +0 1 +.names N_199.BLIF N_199_i +0 1 +.names SIZE_DMA_0_.BLIF N_228.BLIF size_dma_0_0__un1_n +11 1 +.names CLK_OSZI_c.BLIF CLK_000_D_6_.C +1 1 +.names N_198.BLIF N_198_i +0 1 +.names pos_clk_size_dma_6_0__n.BLIF size_dma_0_0__un3_n.BLIF size_dma_0_0__un0_n +11 1 +.names N_170_0.BLIF N_170 +0 1 +.names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D +1- 1 +-1 1 +.names N_255.BLIF N_255_i +0 1 +.names N_10_i.BLIF RST_c.BLIF N_44_0 +11 1 +.names N_256.BLIF N_256_i +0 1 +.names N_18_i.BLIF RST_c.BLIF N_42_0 +11 1 +.names CLK_OSZI_c.BLIF CLK_000_D_7_.C +1 1 +.names N_161_i.BLIF N_161 +0 1 +.names N_19_i.BLIF RST_c.BLIF N_41_0 +11 1 +.names inst_VMA_INTreg.BLIF VMA_INT_i +0 1 +.names N_22_i.BLIF RST_c.BLIF N_38_0 +11 1 +.names N_151_0.BLIF N_151 +0 1 +.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_164_i +11 1 +.names N_251.BLIF N_251_i +0 1 +.names N_168_i.BLIF RW_c_i.BLIF pos_clk_rw_000_int_5_0_n +11 1 +.names CLK_OSZI_c.BLIF CLK_000_D_8_.C +1 1 +.names N_250.BLIF N_250_i +0 1 +.names N_85_i.BLIF N_168_i.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 +11 1 +.names N_147_i.BLIF N_147 +0 1 +.names BGACK_000_c.BLIF N_268_i.BLIF pos_clk_un6_bgack_000_0_n +11 1 +.names N_146_i.BLIF N_146 +0 1 +.names N_210_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n +11 1 +.names CLK_000_D_8_.BLIF CLK_000_D_9_.D +1 1 +.names N_145_i.BLIF N_145 +0 1 +.names N_209_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n +11 1 +.names N_397.BLIF N_397_i +0 1 +.names N_207_i.BLIF N_208_i.BLIF AMIGA_BUS_DATA_DIR_c_0 +11 1 +.names CLK_OSZI_c.BLIF CLK_000_D_9_.C +1 1 +.names N_142_0.BLIF N_142 +0 1 +.names nEXP_SPACE_c_i.BLIF un10_ciin_i.BLIF N_310_0 +11 1 +.names N_136_i.BLIF N_136 +0 1 +.names BGACK_030_INT_i.BLIF RW_000_i.BLIF N_311_0 +11 1 +.names A_DECODE_16_.BLIF a_decode_c_16__n +1 1 +.names N_227.BLIF N_227_i +0 1 +.names AS_000_c.BLIF N_137_i.BLIF N_268 +11 1 +.names CLK_000_D_9_.BLIF CLK_000_D_10_.D +1 1 +.names A_DECODE_17_.BLIF a_decode_c_17__n +1 1 +.names N_172_0.BLIF N_172 +0 1 +.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_257 +11 1 +.names A_DECODE_18_.BLIF a_decode_c_18__n +1 1 +.names N_192.BLIF N_192_i +0 1 +.names a_c_1__n.BLIF BGACK_030_INT_i.BLIF N_102 +11 1 +.names CLK_OSZI_c.BLIF CLK_000_D_10_.C +1 1 +.names A_DECODE_19_.BLIF a_decode_c_19__n +1 1 +.names N_191.BLIF N_191_i +0 1 +.names a_c_1__n.BLIF a_i_1__n +0 1 +.names A_DECODE_20_.BLIF a_decode_c_20__n +1 1 +.names N_193.BLIF N_193_i +0 1 +.names a_i_1__n.BLIF BGACK_030_INT_i.BLIF N_103 +11 1 +.names A_DECODE_21_.BLIF a_decode_c_21__n +1 1 +.names N_398.BLIF N_398_i +0 1 +.names N_257.BLIF RST_c.BLIF N_228 +11 1 +.names A_DECODE_22_.BLIF a_decode_c_22__n +1 1 +.names N_261.BLIF N_261_i +0 1 +.names N_86_i.BLIF pos_clk_un3_as_030_d0_i_n.BLIF N_280_0 +11 1 +.names CLK_OSZI_c.BLIF CYCLE_DMA_0_.C +1 1 +.names A_DECODE_23_.BLIF a_decode_c_23__n +1 1 +.names N_194.BLIF N_194_i +0 1 +.names BGACK_030_INT_i.BLIF inst_RESET_OUT.BLIF N_372_i +11 1 +.names sm_amiga_nss_i_0_0__n.BLIF SM_AMIGA_i_7_.D +0 1 +.names CLK_000_D_0_.BLIF clk_000_d_i_0__n +0 1 +.names A_1_.BLIF a_c_1__n +1 1 +.names N_186.BLIF N_186_i +0 1 +.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_137_i +11 1 +.names nEXP_SPACE.BLIF nEXP_SPACE_c +1 1 +.names N_185.BLIF N_185_i +0 1 +.names CLK_OSZI_c.BLIF CYCLE_DMA_1_.C +1 1 +.names N_184.BLIF N_184_i +0 1 +.names CLK_030_c.BLIF CLK_030_i +0 1 +.names BG_030.BLIF BG_030_c +1 1 +.names N_190.BLIF N_190_i +0 1 +.names CLK_030_c.BLIF CLK_OUT_PRE_D_i.BLIF N_143_0 +11 1 +.names BG_000DFFreg.BLIF BG_000 +1 1 +.names N_188.BLIF N_188_i +0 1 +.names AS_030_D0_i.BLIF BERR_c.BLIF pos_clk_un3_as_030_d0_i_n +11 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030 +1 1 +.names N_189.BLIF N_189_i +0 1 +.names N_260_i.BLIF SM_AMIGA_i_7_.BLIF N_168_i +11 1 +.names CLK_OSZI_c.BLIF SIZE_DMA_0_.C +1 1 +.names BGACK_000.BLIF BGACK_000_c +1 1 +.names N_173_0.BLIF N_173 +0 1 +.names BGACK_030_INT_i.BLIF RST_c.BLIF N_169_i +11 1 +.names CLK_030.BLIF CLK_030_c +1 1 +.names N_58_0.BLIF inst_RESET_OUT.D +0 1 +.names AS_000_DMA_i.BLIF CLK_030_i.BLIF N_174_0 +11 1 +.names CLK_000.BLIF CLK_000_D_0_.D +1 1 +.names N_243.BLIF N_243_i +0 1 +.names CLK_OSZI.BLIF CLK_OSZI_c +1 1 +.names N_254.BLIF N_254_i +0 1 +.names N_124.BLIF N_124_i +0 1 +.names CLK_OSZI_c.BLIF SIZE_DMA_1_.C +1 1 +.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT +1 1 +.names N_144_0.BLIF N_144 +0 1 +.names BGACK_000_c.BLIF N_124.BLIF un22_berr_1 +11 1 +.names CLK_OUT_INTreg.BLIF CLK_EXP +1 1 +.names N_249.BLIF N_249_i +0 1 +.names inst_BGACK_030_INTreg.BLIF un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un3_n +0 1 +.names un21_fpu_cs_i.BLIF FPU_CS +1 1 +.names N_247.BLIF N_247_i +0 1 +.names inst_AS_030_000_SYNC.BLIF inst_BGACK_030_INTreg.BLIF un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un1_n +11 1 +.names FPU_SENSE.BLIF FPU_SENSE_c +1 1 +.names sm_amiga_nss_0_7__n.BLIF SM_AMIGA_0_.D +0 1 +.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un3_n.BLIF un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un0_n +11 1 +.names CLK_OSZI_c.BLIF cpu_est_0_.C +1 1 +.names IPL_030DFF_0_reg.BLIF IPL_030_0_ +1 1 +.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n +0 1 +.names un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un1_n.BLIF un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un0_n.BLIF N_178 +1- 1 +-1 1 +.names IPL_030DFF_1_reg.BLIF IPL_030_1_ +1 1 +.names N_252.BLIF N_252_i +0 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_i +0 1 +.names IPL_030DFF_2_reg.BLIF IPL_030_2_ +1 1 +.names N_153_0.BLIF N_153 +0 1 +.names AS_000_c.BLIF AS_000_i +0 1 +.names IPL_0_.BLIF ipl_c_0__n +1 1 +.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n +0 1 +.names AS_000_DMA_i.BLIF AS_000_i.BLIF un6_as_030 +11 1 +.names CLK_OSZI_c.BLIF cpu_est_1_.C +1 1 +.names IPL_1_.BLIF ipl_c_1__n +1 1 +.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n +0 1 +.names N_137_i.BLIF SM_AMIGA_6_.BLIF N_85 +11 1 +.names IPL_2_.BLIF ipl_c_2__n +1 1 +.names N_373_i.BLIF N_373 +0 1 +.names LDS_000_c.BLIF UDS_000_c.BLIF N_396 +11 1 +.names N_171_0.BLIF N_171 +0 1 +.names CLK_000_D_8_.BLIF clk_000_d_i_8__n +0 1 +.names DTACK.BLIF DTACK_c +1 1 +.names N_253.BLIF N_253_i +0 1 +.names N_137_i.BLIF RST_c.BLIF N_254 +11 1 +.names CLK_OSZI_c.BLIF RST_DLY_1_.C +1 1 +.names vcc_n_n.BLIF AVEC +1 1 +.names N_56_0.BLIF inst_DTACK_D0.D +0 1 +.names N_137_i.BLIF SM_AMIGA_0_.BLIF N_260 +11 1 +.names N_291_i.BLIF E +1 1 +.names N_28.BLIF N_28_i +0 1 +.names N_193_i.BLIF N_200_i.BLIF sm_amiga_nss_0_5__n +11 1 +.names VPA.BLIF VPA_c +1 1 +.names N_32_0.BLIF IPL_030DFF_1_reg.D +0 1 +.names N_205_i.BLIF N_206_i.BLIF sm_amiga_nss_0_2__n +11 1 +.names inst_VMA_INTreg.BLIF VMA +1 1 +.names a_c_0__n.BLIF a_c_i_0__n +0 1 +.names N_211_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF pos_clk_ds_000_dma_4_0_n +11 1 +.names CLK_OSZI_c.BLIF RST_DLY_2_.C +1 1 +.names RST.BLIF RST_c +1 1 +.names size_c_1__n.BLIF size_c_i_1__n +0 1 +.names CLK_030_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF N_305_0 +11 1 +.names N_201.BLIF N_201_i +0 1 +.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF N_371_i +11 1 +.names N_202.BLIF N_202_i +0 1 +.names N_229_i.BLIF pos_clk_un3_as_030_d0_i_n.BLIF N_66_0 +11 1 +.names FC_0_.BLIF fc_c_0__n +1 1 +.names sm_amiga_nss_0_4__n.BLIF SM_AMIGA_3_.D +0 1 +.names N_85_i.BLIF pos_clk_un3_as_030_d0_i_n.BLIF N_281_0 +11 1 +.names CLK_OSZI_c.BLIF CLK_000_D_0_.C +1 1 +.names FC_1_.BLIF fc_c_1__n +1 1 +.names N_204.BLIF N_204_i +0 1 +.names a_decode_c_19__n.BLIF a_decode_i_19__n +0 1 +.names gnd_n_n.BLIF AMIGA_ADDR_ENABLE +1 1 +.names N_203.BLIF N_203_i +0 1 +.names AMIGA_BUS_DATA_DIR_c.BLIF AMIGA_BUS_DATA_DIR +1 1 +.names sm_amiga_nss_0_3__n.BLIF SM_AMIGA_4_.D +0 1 +.names CLK_000_D_0_.BLIF CLK_000_D_1_.D +1 1 +.names un1_amiga_bus_enable_low_i.BLIF AMIGA_BUS_ENABLE_LOW +1 1 +.names un1_SM_AMIGA_0_sqmuxa_2.BLIF un1_SM_AMIGA_0_sqmuxa_2_i +0 1 +.names N_178.BLIF AMIGA_BUS_ENABLE_HIGH +1 1 +.names N_279_0.BLIF N_279 +0 1 +.names CLK_OSZI_c.BLIF CLK_000_D_1_.C +1 1 +.names N_235.BLIF N_235_i +0 1 +.names a_decode_c_16__n.BLIF a_decode_i_16__n +0 1 +.names N_246_i.BLIF N_244_i.BLIF pos_clk_ipl_1_n +11 1 +.names N_234.BLIF N_234_i +0 1 +.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n +0 1 +.names pos_clk_ipl_1_n.BLIF N_245_i.BLIF pos_clk_ipl_n +11 1 +.names N_23.BLIF N_23_i +0 1 +.names cycle_dma_i_0__n.BLIF N_137.BLIF N_195 +11 1 +.names CLK_000_D_1_.BLIF CLK_000_D_2_.D +1 1 +.names N_223_1.BLIF cpu_est_i_3__n.BLIF N_223 +11 1 +.names N_37_0.BLIF inst_UDS_000_INT.D +0 1 +.names inst_AS_030_D0.BLIF AS_030_D0_i +0 1 +.names nEXP_SPACE_c.BLIF inst_AS_030_D0.BLIF pos_clk_un6_bg_030_1_n +11 1 +.names N_17.BLIF N_17_i +0 1 +.names inst_CLK_030_H.BLIF CLK_030_H_i +0 1 +.names CLK_OSZI_c.BLIF CLK_000_D_2_.C +1 1 +.names pos_clk_un6_bg_030_1_n.BLIF CLK_000_D_0_.BLIF pos_clk_un6_bg_030_n +11 1 +.names N_43_0.BLIF inst_LDS_000_INT.D +0 1 +.names CLK_030_H_i.BLIF N_174.BLIF N_197 +11 1 +.names N_259.BLIF SM_AMIGA_6_.BLIF N_213_1 +11 1 +.names VPA_c.BLIF VPA_c_i +0 1 +.names N_259.BLIF SM_AMIGA_2_.BLIF N_200 +11 1 +.names N_213_1.BLIF SM_AMIGA_i_7_.BLIF N_213 +11 1 +.names N_55_0.BLIF inst_VPA_D.D +0 1 +.names N_254.BLIF SM_AMIGA_6_.BLIF N_206 +11 1 +.names AS_000_i.BLIF RW_000_c.BLIF N_208_1 +11 1 +.names DTACK_c.BLIF DTACK_c_i +0 1 +.names inst_AS_000_DMA.BLIF RW_000_i.BLIF N_211 +11 1 +.names CLK_OSZI_c.BLIF CLK_000_D_3_.C +1 1 +.names N_208_1.BLIF un1_as_030_i.BLIF N_208 +11 1 +.names inst_AS_000_INT.BLIF AS_000_INT_i +0 1 +.names inst_CLK_030_H.BLIF CLK_030_c.BLIF N_212 +11 1 +.names N_136.BLIF N_243.BLIF N_205_1 +11 1 +.names AS_000_INT_i.BLIF AS_030_i.BLIF un4_as_000 +11 1 +.names CYCLE_DMA_0_.BLIF N_137_i.BLIF N_113 +11 1 +.names N_205_1.BLIF SM_AMIGA_5_.BLIF N_205 +11 1 +.names inst_LDS_000_INT.BLIF LDS_000_INT_i +0 1 +.names G_117.BLIF N_244_i +0 1 +.names N_161.BLIF N_253.BLIF N_193_1 +11 1 +.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un4_lds_000 +11 1 +.names G_118.BLIF N_245_i +0 1 +.names CLK_OSZI_c.BLIF RST_DLY_0_.C +1 1 +.names N_193_1.BLIF SM_AMIGA_3_.BLIF N_193 +11 1 +.names inst_UDS_000_INT.BLIF UDS_000_INT_i +0 1 +.names G_119.BLIF N_246_i +0 1 +.names N_248_i.BLIF rst_dly_i_0__n.BLIF N_190_1 11 1 .names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un4_uds_000 11 1 -.names CLK_000_D_10_.BLIF clk_000_d_i_10__n +.names ahigh_c_24__n.BLIF ahigh_i_24__n 0 1 -.names N_115_1.BLIF N_115_2.BLIF N_115 -11 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i -0 1 -.names N_319_i.BLIF RST_c.BLIF N_359 -11 1 -.names CLK_000_D_2_.BLIF N_332_4.BLIF N_332_1 -11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i -0 1 -.names N_310.BLIF N_319.BLIF N_365 -11 1 -.names N_332_1.BLIF sm_amiga_i_i_7__n.BLIF N_332 -11 1 -.names AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF BGACK_030_INT_i.BLIF un1_amiga_bus_enable_low -11 1 -.names N_319_i.BLIF SM_AMIGA_0_.BLIF N_366 -11 1 -.names CLK_OSZI_c.BLIF RST_DLY_0_.C -1 1 -.names sm_amiga_i_0__n.BLIF sm_amiga_i_3__n.BLIF N_246_1 +.names N_190_1.BLIF rst_dly_i_1__n.BLIF N_190 11 1 .names un1_amiga_bus_enable_low.BLIF un1_amiga_bus_enable_low_i 0 1 -.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF un1_as_000_i -11 1 -.names CLK_000_D_2_.BLIF N_180_i.BLIF N_246_2 +.names ahigh_c_25__n.BLIF ahigh_i_25__n +0 1 +.names N_147.BLIF N_248_i.BLIF N_184_1 11 1 .names un21_fpu_cs.BLIF un21_fpu_cs_i 0 1 +.names ahigh_c_26__n.BLIF ahigh_i_26__n +0 1 +.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C +1 1 +.names N_184_1.BLIF rst_dly_i_2__n.BLIF N_184 +11 1 +.names N_254.BLIF SM_AMIGA_4_.BLIF N_202 +11 1 +.names ahigh_c_27__n.BLIF ahigh_i_27__n +0 1 +.names N_214_1.BLIF N_253.BLIF N_194_1 +11 1 +.names N_171.BLIF N_398.BLIF N_201 +11 1 +.names ahigh_c_28__n.BLIF ahigh_i_28__n +0 1 +.names N_373_i.BLIF sm_amiga_i_0__n.BLIF N_194_2 +11 1 +.names N_144.BLIF N_373.BLIF N_192 +11 1 .names ahigh_c_29__n.BLIF ahigh_i_29__n 0 1 -.names N_320_i.BLIF N_332_4.BLIF N_246_3 +.names N_194_1.BLIF N_194_2.BLIF N_194_3 +11 1 +.names N_172.BLIF SM_AMIGA_5_.BLIF N_191 +11 1 +.names ahigh_c_30__n.BLIF ahigh_i_30__n +0 1 +.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C +1 1 +.names N_194_3.BLIF sm_amiga_i_3__n.BLIF N_194 11 1 .names pos_clk_ipl_n.BLIF ipl_030_0_1__un3_n 0 1 -.names ahigh_c_30__n.BLIF ahigh_i_30__n +.names ahigh_c_31__n.BLIF ahigh_i_31__n 0 1 -.names N_246_1.BLIF N_246_2.BLIF N_246_4 +.names N_236_i.BLIF N_237_i.BLIF N_278_i_1 11 1 .names ipl_c_1__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_1__un1_n 11 1 -.names ahigh_c_31__n.BLIF ahigh_i_31__n +.names a_decode_c_18__n.BLIF a_decode_i_18__n 0 1 -.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C -1 1 -.names N_246_4.BLIF N_246_3.BLIF N_246 +.names N_278_i_1.BLIF RST_c.BLIF RST_DLY_0_.D 11 1 .names IPL_030DFF_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n 11 1 -.names AS_030_000_SYNC_i.BLIF clk_000_d_i_1__n.BLIF N_332_4_1 +.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D +0 1 +.names N_212_i.BLIF RW_000_i.BLIF N_307_0_1 11 1 .names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF N_28 1- 1 -1 1 -.names inst_AS_030_D0.BLIF AS_030_D0_i +.names N_305.BLIF as_000_dma_0_un3_n 0 1 -.names RST_c.BLIF nEXP_SPACE_c.BLIF N_332_4_2 +.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C +1 1 +.names N_307_0_1.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF N_307_0 11 1 -.names N_29_i.BLIF RST_c.BLIF N_32_0 +.names N_28_i.BLIF RST_c.BLIF N_32_0 11 1 -.names N_365.BLIF SM_AMIGA_0_.BLIF N_229 +.names pos_clk_un21_bgack_030_int_i_0_n.BLIF N_305.BLIF as_000_dma_0_un1_n 11 1 -.names N_332_4_1.BLIF N_332_4_2.BLIF N_332_4 +.names N_197_i.BLIF RST_c.BLIF N_308_i_1 11 1 -.names N_28_i.BLIF RST_c.BLIF N_31_0 +.names DTACK_c_i.BLIF RST_c.BLIF N_56_0 11 1 -.names N_360.BLIF SM_AMIGA_1_.BLIF N_230 +.names inst_AS_000_DMA.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n +11 1 +.names N_308_i_1.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF inst_CLK_030_H.D +11 1 +.names RST_c.BLIF VPA_c_i.BLIF N_55_0 +11 1 +.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF N_8 +1- 1 +-1 1 +.names AS_000_i.BLIF N_169_i.BLIF N_40_i_1 +11 1 +.names N_17_i.BLIF RST_c.BLIF N_43_0 +11 1 +.names N_8_i.BLIF RST_c.BLIF N_46_0 11 1 .names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C 1 1 -.names N_290_i.BLIF RW_000_i.BLIF N_273_0_1 +.names N_40_i_1.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF CYCLE_DMA_1_.D 11 1 -.names ipl_c_i_2__n.BLIF RST_c.BLIF N_53_0 +.names N_23_i.BLIF RST_c.BLIF N_37_0 11 1 -.names N_359.BLIF SM_AMIGA_2_.BLIF N_232 +.names N_7_i.BLIF RST_c.BLIF N_47_0 11 1 -.names N_273_0_1.BLIF pos_clk_un23_bgack_030_int_i_0_0_n.BLIF N_273_0 +.names N_143.BLIF CLK_000_D_9_.BLIF N_250_1 11 1 -.names ipl_c_i_1__n.BLIF RST_c.BLIF N_52_0 +.names N_6.BLIF RST_c.BLIF inst_DS_000_ENABLE.D 11 1 -.names N_365.BLIF SM_AMIGA_2_.BLIF N_234 +.names N_5_i.BLIF RST_c.BLIF N_48_0 11 1 -.names N_341_i.BLIF RST_c.BLIF N_276_i_1 -11 1 -.names N_17_i.BLIF RST_c.BLIF N_42_0 -11 1 -.names N_195.BLIF N_355.BLIF N_235 -11 1 -.names N_276_i_1.BLIF pos_clk_un23_bgack_030_int_i_0_0_n.BLIF inst_CLK_030_H.D -11 1 -.names N_19_i.BLIF RST_c.BLIF N_40_0 -11 1 -.names N_359.BLIF SM_AMIGA_4_.BLIF N_236 -11 1 -.names CLK_OSZI_c.BLIF inst_AS_000_INT.C -1 1 -.names N_157_i.BLIF N_363.BLIF N_260_1 -11 1 -.names N_23_i.BLIF RST_c.BLIF N_36_0 -11 1 -.names N_359.BLIF SM_AMIGA_6_.BLIF N_239 -11 1 -.names sm_amiga_i_i_7__n.BLIF nEXP_SPACE_c.BLIF N_260_2 -11 1 -.names N_24_i.BLIF RST_c.BLIF N_35_0 -11 1 -.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n -0 1 -.names N_260_1.BLIF N_260_2.BLIF N_260 -11 1 -.names N_25_i.BLIF RST_c.BLIF N_34_0 -11 1 -.names cycle_dma_i_0__n.BLIF N_319.BLIF N_262 -11 1 -.names FPU_SENSE_i.BLIF N_157.BLIF un21_fpu_cs_1 -11 1 -.names N_132.BLIF N_132_i -0 1 -.names inst_CLK_030_H.BLIF CLK_030_H_i -0 1 -.names CLK_OSZI_c.BLIF inst_DSACK1_INTreg.C -1 1 -.names un21_fpu_cs_1.BLIF un22_berr_1.BLIF un21_fpu_cs -11 1 -.names N_363.BLIF amiga_bus_enable_dma_high_0_un3_n -0 1 -.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D -0 1 -.names un22_berr_1.BLIF FPU_SENSE_c.BLIF un22_berr_1_0 -11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF N_363.BLIF amiga_bus_enable_dma_high_0_un1_n -11 1 -.names CYCLE_DMA_0_.BLIF N_319_i.BLIF N_263 -11 1 -.names un22_berr_1_0.BLIF N_157.BLIF un22_berr -11 1 -.names N_132_i.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF amiga_bus_enable_dma_high_0_un0_n -11 1 -.names G_116.BLIF N_241_i -0 1 -.names N_222_i.BLIF N_223_i.BLIF N_275_i_1 -11 1 -.names amiga_bus_enable_dma_high_0_un1_n.BLIF amiga_bus_enable_dma_high_0_un0_n.BLIF N_25 -1- 1 --1 1 -.names G_117.BLIF N_242_i -0 1 -.names CLK_OSZI_c.BLIF inst_DS_000_DMA.C -1 1 -.names N_224_i.BLIF RST_c.BLIF N_275_i_2 -11 1 -.names N_131.BLIF N_131_i -0 1 -.names G_118.BLIF N_243_i -0 1 -.names N_275_i_1.BLIF N_275_i_2.BLIF RST_DLY_1_.D -11 1 -.names N_363.BLIF amiga_bus_enable_dma_low_0_un3_n -0 1 -.names ahigh_c_24__n.BLIF ahigh_i_24__n -0 1 -.names N_218_i.BLIF N_219_i.BLIF N_274_i_1 -11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF N_363.BLIF amiga_bus_enable_dma_low_0_un1_n -11 1 -.names ahigh_c_25__n.BLIF ahigh_i_25__n -0 1 -.names N_220_i.BLIF RST_c.BLIF N_274_i_2 -11 1 -.names N_131_i.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF amiga_bus_enable_dma_low_0_un0_n -11 1 -.names ahigh_c_26__n.BLIF ahigh_i_26__n -0 1 -.names CLK_OSZI_c.BLIF inst_AS_030_D0.C -1 1 -.names N_274_i_1.BLIF N_274_i_2.BLIF RST_DLY_2_.D -11 1 -.names amiga_bus_enable_dma_low_0_un1_n.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF N_24 -1- 1 --1 1 -.names ahigh_c_27__n.BLIF ahigh_i_27__n -0 1 -.names N_143.BLIF sm_amiga_i_0__n.BLIF N_115_1 +.names N_250_1.BLIF clk_000_d_i_8__n.BLIF N_250 11 1 .names SM_AMIGA_6_.BLIF uds_000_int_0_un3_n 0 1 -.names ahigh_c_28__n.BLIF ahigh_i_28__n -0 1 -.names sm_amiga_i_5__n.BLIF SM_AMIGA_i_7_.BLIF N_115_2 +.names N_4_i.BLIF RST_c.BLIF N_49_0 +11 1 +.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_223_1 11 1 .names a_c_0__n.BLIF SM_AMIGA_6_.BLIF uds_000_int_0_un1_n 11 1 -.names pos_clk_ipl_n.BLIF ipl_030_0_0__un3_n -0 1 -.names N_60_i_1.BLIF N_60_i_2.BLIF CYCLE_DMA_0_.D +.names N_3_i.BLIF RST_c.BLIF N_50_0 +11 1 +.names CLK_OSZI_c.BLIF inst_AS_000_INT.C +1 1 +.names N_255_1.BLIF N_255_2.BLIF N_255 11 1 .names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n 11 1 -.names ipl_c_0__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_0__un1_n +.names ipl_c_i_0__n.BLIF RST_c.BLIF N_52_0 11 1 -.names CLK_OSZI_c.BLIF inst_VPA_D.C -1 1 -.names N_158_i.BLIF N_319_i.BLIF N_248_1 +.names N_136.BLIF N_250_i.BLIF N_151_0_1 11 1 .names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_23 1- 1 -1 1 +.names ipl_c_i_1__n.BLIF RST_c.BLIF N_53_0 +11 1 +.names N_151_0_1.BLIF N_251_i.BLIF N_151_0 +11 1 +.names SM_AMIGA_6_.BLIF lds_000_int_0_un3_n +0 1 +.names ipl_c_i_2__n.BLIF RST_c.BLIF N_54_0 +11 1 +.names N_188_i.BLIF N_189_i.BLIF N_277_i_1 +11 1 +.names pos_clk_un10_sm_amiga_i_n.BLIF SM_AMIGA_6_.BLIF lds_000_int_0_un1_n +11 1 +.names N_27_i.BLIF RST_c.BLIF N_31_0 +11 1 +.names CLK_OSZI_c.BLIF inst_DSACK1_INTreg.C +1 1 +.names N_190_i.BLIF RST_c.BLIF N_277_i_2 +11 1 +.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n +11 1 +.names N_29_i.BLIF RST_c.BLIF N_33_0 +11 1 +.names N_277_i_1.BLIF N_277_i_2.BLIF RST_DLY_1_.D +11 1 +.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF N_17 +1- 1 +-1 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_0__un3_n +0 1 +.names N_184_i.BLIF N_185_i.BLIF N_276_i_1 +11 1 +.names N_279.BLIF ds_000_enable_0_un3_n +0 1 +.names ipl_c_0__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_0__un1_n +11 1 +.names N_186_i.BLIF RST_c.BLIF N_276_i_2 +11 1 +.names un1_SM_AMIGA_0_sqmuxa_2.BLIF N_279.BLIF ds_000_enable_0_un1_n +11 1 .names IPL_030DFF_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n 11 1 -.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_248_2 +.names CLK_OSZI_c.BLIF inst_DS_000_DMA.C +1 1 +.names N_276_i_1.BLIF N_276_i_2.BLIF RST_DLY_2_.D 11 1 -.names CLK_000_D_12_.BLIF clk_000_d_i_11__n.BLIF N_357 +.names inst_DS_000_ENABLE.BLIF ds_000_enable_0_un3_n.BLIF ds_000_enable_0_un0_n 11 1 .names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_27 1- 1 -1 1 -.names N_248_1.BLIF N_248_2.BLIF N_248 +.names N_136_i.BLIF N_267.BLIF N_221_1 11 1 -.names N_140.BLIF N_319_i.BLIF N_353 +.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_6 +1- 1 +-1 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_2__un3_n +0 1 +.names VPA_D_i.BLIF cpu_est_i_3__n.BLIF N_221_2 +11 1 +.names AS_030_c.BLIF AS_030_i +0 1 +.names ipl_c_2__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_2__un1_n +11 1 +.names N_221_1.BLIF N_221_2.BLIF N_221 +11 1 +.names inst_RESET_OUT.BLIF un1_as_030_i.BLIF N_45_i +11 1 +.names IPL_030DFF_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n +11 1 +.names CLK_OSZI_c.BLIF inst_AS_030_D0.C +1 1 +.names N_137_i.BLIF N_152_i.BLIF N_220_1 +11 1 +.names N_203_i.BLIF N_204_i.BLIF sm_amiga_nss_0_3__n +11 1 +.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_29 +1- 1 +-1 1 +.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_220_2 +11 1 +.names N_201_i.BLIF N_202_i.BLIF sm_amiga_nss_0_4__n 11 1 .names un4_uds_000.BLIF un4_uds_000_i 0 1 -.names N_108_i.BLIF N_369.BLIF N_249_1 +.names N_220_1.BLIF N_220_2.BLIF N_220 11 1 -.names BERR_c.BLIF RST_c.BLIF N_310 +.names N_243.BLIF SM_AMIGA_1_.BLIF N_261 11 1 .names un4_lds_000.BLIF un4_lds_000_i 0 1 -.names CLK_OSZI_c.BLIF inst_DTACK_D0.C -1 1 -.names VPA_D_i.BLIF cpu_est_i_3__n.BLIF N_249_2 +.names pos_clk_un21_bgack_030_int_i_0_0_1_n.BLIF pos_clk_un21_bgack_030_int_i_0_0_2_n.BLIF pos_clk_un21_bgack_030_int_i_0_0_n 11 1 -.names a_c_1__n.BLIF BGACK_030_INT_i.BLIF N_131 +.names N_137.BLIF N_243.BLIF N_259 11 1 .names un6_as_030.BLIF un6_as_030_i 0 1 -.names N_249_1.BLIF N_249_2.BLIF N_249 +.names CLK_OSZI_c.BLIF inst_VPA_D.C +1 1 +.names AS_000_i.BLIF N_113_i.BLIF N_309_i_1 +11 1 +.names RW_c.BLIF SM_AMIGA_6_.BLIF N_252 11 1 -.names a_c_1__n.BLIF a_i_1__n -0 1 .names un4_as_000.BLIF un4_as_000_i 0 1 -.names N_151_0.BLIF N_158_i.BLIF N_361_1 +.names N_169_i.BLIF N_195_i.BLIF N_309_i_2 11 1 -.names a_i_1__n.BLIF BGACK_030_INT_i.BLIF N_132 +.names N_259.BLIF SM_AMIGA_0_.BLIF N_249 11 1 .names inst_DS_000_DMA.BLIF DS_000_DMA_i 0 1 -.names VMA_INT_i.BLIF VPA_D_i.BLIF N_361_2 +.names N_309_i_1.BLIF N_309_i_2.BLIF CYCLE_DMA_0_.D +11 1 +.names N_253.BLIF SM_AMIGA_1_.BLIF N_247 11 1 -.names RW_000_c.BLIF RW_000_i -0 1 .names AS_000_i.BLIF DS_000_DMA_i.BLIF un6_ds_030 11 1 -.names CLK_OSZI_c.BLIF inst_CLK_030_H.C -1 1 -.names N_361_1.BLIF N_361_2.BLIF N_361 +.names N_124_i.BLIF N_257.BLIF N_229_1 11 1 -.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF N_270 +.names N_243.BLIF SM_AMIGA_3_.BLIF N_398 11 1 .names un6_ds_030.BLIF un6_ds_030_i 0 1 -.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_157_1 +.names CLK_OSZI_c.BLIF inst_DTACK_D0.C +1 1 +.names sm_amiga_i_i_7__n.BLIF nEXP_SPACE_c.BLIF N_229_2 11 1 -.names N_156.BLIF SM_AMIGA_1_.BLIF N_114 +.names BERR_c.BLIF RST_c.BLIF N_243 11 1 -.names N_273.BLIF ds_000_dma_0_un3_n +.names N_307.BLIF ds_000_dma_0_un3_n 0 1 -.names a_decode_c_17__n.BLIF a_decode_i_16__n.BLIF N_157_2 +.names N_229_1.BLIF N_229_2.BLIF N_229 11 1 -.names N_320.BLIF N_360.BLIF N_244 +.names N_253.BLIF N_258.BLIF N_235 11 1 -.names pos_clk_ds_000_dma_4_n.BLIF N_273.BLIF ds_000_dma_0_un1_n +.names pos_clk_ds_000_dma_4_n.BLIF N_307.BLIF ds_000_dma_0_un1_n 11 1 -.names a_decode_i_18__n.BLIF a_decode_i_19__n.BLIF N_157_3 +.names N_214_1.BLIF N_253.BLIF N_214_1_0 11 1 -.names N_310.BLIF N_320.BLIF N_335 +.names inst_RESET_OUT.BLIF RST_c.BLIF N_234 11 1 .names inst_DS_000_DMA.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n 11 1 -.names CLK_OSZI_c.BLIF inst_RESET_OUT.C -1 1 -.names N_157_1.BLIF N_157_2.BLIF N_157_4 +.names N_214_1_0.BLIF sm_amiga_i_i_7__n.BLIF N_214 11 1 -.names N_144.BLIF N_180.BLIF N_334 +.names N_137_i.BLIF N_153.BLIF un1_SM_AMIGA_0_sqmuxa_2 11 1 .names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF N_3 1- 1 -1 1 +.names CLK_OSZI_c.BLIF inst_CLK_030_H.C +1 1 +.names AS_030_i.BLIF FPU_SENSE_i.BLIF un21_fpu_cs_1 +11 1 +.names N_253.BLIF SM_AMIGA_5_.BLIF N_204 +11 1 +.names N_86.BLIF N_86_i +0 1 +.names un21_fpu_cs_1.BLIF un22_berr_1.BLIF un21_fpu_cs +11 1 +.names N_259.BLIF SM_AMIGA_4_.BLIF N_203 +11 1 +.names N_280.BLIF dsack1_int_0_un3_n +0 1 +.names un22_berr_1.BLIF AS_030_i.BLIF un22_berr_1_0 +11 1 +.names cpu_est_1_.BLIF cpu_est_i_3__n.BLIF N_170_0 +11 1 +.names N_86_i.BLIF N_280.BLIF dsack1_int_0_un1_n +11 1 +.names un22_berr_1_0.BLIF FPU_SENSE_c.BLIF un22_berr +11 1 +.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF N_173_0 +11 1 +.names inst_DSACK1_INTreg.BLIF dsack1_int_0_un3_n.BLIF dsack1_int_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF inst_RESET_OUT.C +1 1 +.names N_145_i.BLIF N_152_i.BLIF N_255_1 +11 1 +.names inst_VPA_D.BLIF VPA_D_i +0 1 +.names dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF N_4 +1- 1 +-1 1 +.names VMA_INT_i.BLIF VPA_D_i.BLIF N_255_2 +11 1 +.names cpu_est_1_.BLIF cpu_est_i_1__n +0 1 +.names N_85.BLIF N_85_i +0 1 +.names N_124_4.BLIF N_124_3.BLIF N_124 +11 1 +.names cpu_est_3_.BLIF cpu_est_i_3__n +0 1 +.names N_281.BLIF as_000_int_0_un3_n +0 1 +.names ahigh_i_24__n.BLIF ahigh_i_25__n.BLIF un10_ciin_1 +11 1 +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names N_85_i.BLIF N_281.BLIF as_000_int_0_un1_n +11 1 +.names CLK_OSZI_c.BLIF inst_DS_000_ENABLE.C +1 1 +.names ahigh_i_26__n.BLIF ahigh_i_27__n.BLIF un10_ciin_2 +11 1 +.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n +0 1 +.names inst_AS_000_INT.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n +11 1 +.names ahigh_i_28__n.BLIF ahigh_i_29__n.BLIF un10_ciin_3 +11 1 +.names N_243_i.BLIF N_253_i.BLIF N_172_0 +11 1 +.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF N_5 +1- 1 +-1 1 +.names ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF un10_ciin_4 +11 1 +.names N_136_i.BLIF N_161.BLIF N_171_0 +11 1 +.names N_66.BLIF as_030_000_sync_0_un3_n +0 1 +.names a_decode_c_23__n.BLIF AS_030_D0_i.BLIF un10_ciin_5 +11 1 +.names N_252_i.BLIF sm_amiga_i_4__n.BLIF N_153_0 +11 1 +.names pos_clk_un3_as_030_d0_n.BLIF N_66.BLIF as_030_000_sync_0_un1_n +11 1 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_25.C +1 1 +.names a_decode_c_20__n.BLIF a_decode_c_21__n.BLIF un10_ciin_6 +11 1 +.names N_247_i.BLIF N_249_i.BLIF sm_amiga_nss_0_7__n +11 1 +.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n +11 1 +.names un10_ciin_1.BLIF un10_ciin_2.BLIF un10_ciin_7 +11 1 +.names N_243_i.BLIF N_254_i.BLIF N_144_0 +11 1 +.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_7 +1- 1 +-1 1 +.names un10_ciin_3.BLIF un10_ciin_4.BLIF un10_ciin_8 +11 1 +.names N_234_i.BLIF N_235_i.BLIF N_58_0 +11 1 +.names vcc_n_n +1 .end diff --git a/Logic/BUS68030.bl1 b/Logic/BUS68030.bl1 index db003c3..3faa514 100644 --- a/Logic/BUS68030.bl1 +++ b/Logic/BUS68030.bl1 @@ -1,121 +1,120 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Fri Aug 19 00:39:35 2016 +#$ DATE Wed Aug 24 22:17:49 2016 #$ MODULE bus68030 -#$ PINS 75 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_030_2_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 \ -# DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BG_000 SIZE_0_ BGACK_030 AHIGH_30_ \ -# BGACK_000 AHIGH_29_ CLK_030 AHIGH_28_ CLK_000 AHIGH_27_ CLK_OSZI AHIGH_26_ CLK_DIV_OUT \ -# AHIGH_25_ CLK_EXP AHIGH_24_ FPU_CS A_DECODE_22_ FPU_SENSE A_DECODE_21_ DSACK1 \ -# A_DECODE_20_ DTACK A_DECODE_19_ AVEC A_DECODE_18_ E A_DECODE_17_ VPA A_DECODE_16_ VMA \ -# A_DECODE_15_ RST A_DECODE_14_ RESET A_DECODE_13_ RW A_DECODE_12_ AMIGA_ADDR_ENABLE \ -# A_DECODE_11_ AMIGA_BUS_DATA_DIR A_DECODE_10_ AMIGA_BUS_ENABLE_LOW A_DECODE_9_ \ -# AMIGA_BUS_ENABLE_HIGH A_DECODE_8_ CIIN A_DECODE_7_ A_DECODE_6_ A_DECODE_5_ \ -# A_DECODE_4_ A_DECODE_3_ A_DECODE_2_ A_0_ IPL_030_1_ IPL_030_0_ IPL_1_ IPL_0_ FC_0_ A_1_ -#$ NODES 662 N_28 N_246_i bgack_030_int_0_un1_n N_17 sm_amiga_nss_i_0_0__n \ -# bgack_030_int_0_un0_n N_19 dsack1_int_0_un3_n N_23 N_220_i dsack1_int_0_un1_n N_24 \ -# N_219_i dsack1_int_0_un0_n N_25 N_218_i cpu_est_0_3__un3_n \ -# un1_amiga_bus_enable_low_i cpu_est_0_3__un1_n un21_fpu_cs_i N_224_i \ -# cpu_est_0_3__un0_n inst_BGACK_030_INTreg BGACK_030_INT_i N_222_i \ -# cpu_est_0_2__un3_n vcc_n_n AMIGA_BUS_ENABLE_DMA_LOW_i N_223_i cpu_est_0_2__un1_n \ -# inst_VMA_INTreg UDS_000_INT_i N_322_i cpu_est_0_2__un0_n gnd_n_n LDS_000_INT_i \ -# N_312_i cpu_est_0_1__un3_n un1_amiga_bus_enable_low N_131_i N_139_0 \ -# cpu_est_0_1__un1_n un6_as_030 N_132_i N_108_i cpu_est_0_1__un0_n un3_size RW_000_i \ -# N_258_i vma_int_0_un3_n un4_size a_i_1__n N_257_i vma_int_0_un1_n un4_uds_000 \ -# clk_000_d_i_11__n vma_int_0_un0_n un4_lds_000 sm_amiga_i_6__n N_245_i \ -# ipl_030_0_0__un3_n un4_as_000 clk_000_d_i_1__n nEXP_SPACE_c_i ipl_030_0_0__un1_n \ -# un10_ciin AS_030_000_SYNC_i un1_as_030_i ipl_030_0_0__un0_n un21_fpu_cs \ -# sm_amiga_i_0__n pos_clk_un3_as_030_d0_0_n ds_000_dma_0_un3_n un22_berr \ -# sm_amiga_i_3__n N_107_0 ds_000_dma_0_un1_n un6_ds_030 sm_amiga_i_i_7__n N_115_i \ -# ds_000_dma_0_un0_n cpu_est_3_ sm_amiga_i_5__n N_63_0 as_000_dma_0_un3_n cpu_est_0_ \ -# rst_dly_i_0__n N_278_0 as_000_dma_0_un1_n cpu_est_1_ rst_dly_i_1__n N_279_0 \ -# as_000_dma_0_un0_n cpu_est_2_ N_364_i_0 N_260_i a_decode_15__n inst_AS_000_INT \ -# cpu_est_i_0__n N_67_0 inst_AMIGA_BUS_ENABLE_DMA_LOW rst_dly_i_2__n \ -# pos_clk_rw_000_int_5_0_n a_decode_14__n inst_AS_030_D0 AS_030_i \ -# un1_SM_AMIGA_0_sqmuxa_1_0 inst_AS_030_000_SYNC FPU_SENSE_i un10_ciin_i \ -# a_decode_13__n inst_BGACK_030_INT_D N_157_i N_313_0 inst_AS_000_DMA \ -# a_decode_i_16__n N_4_i a_decode_12__n inst_DS_000_DMA a_decode_i_18__n N_48_0 \ -# CYCLE_DMA_0_ a_decode_i_19__n N_5_i a_decode_11__n CYCLE_DMA_1_ N_113_i N_47_0 \ -# SIZE_DMA_0_ N_114_i N_7_i a_decode_10__n SIZE_DMA_1_ AS_000_INT_i N_46_0 inst_VPA_D \ -# size_dma_i_1__n N_18_i a_decode_9__n inst_UDS_000_INT size_dma_i_0__n N_41_0 \ -# inst_LDS_000_INT RESET_OUT_i N_22_i a_decode_8__n inst_CLK_OUT_PRE_D cpu_est_i_1__n \ -# N_37_0 CLK_000_D_1_ cpu_est_i_2__n N_26_i a_decode_7__n CLK_000_D_10_ VPA_D_i N_33_0 \ -# CLK_000_D_11_ DTACK_D0_i BG_030_c_i a_decode_6__n inst_DTACK_D0 cpu_est_i_3__n \ -# pos_clk_un6_bg_030_i_n inst_RESET_OUT CLK_030_i pos_clk_un9_bg_030_0_n \ -# a_decode_5__n CLK_000_D_0_ clk_000_d_i_0__n N_10_i inst_CLK_OUT_PRE_50 \ -# clk_000_d_i_10__n N_43_0 a_decode_4__n IPL_D0_0_ AS_000_DMA_i VPA_c_i IPL_D0_1_ \ -# AS_000_i N_54_0 a_decode_3__n IPL_D0_2_ CLK_030_H_i un3_as_030_i CLK_000_D_2_ \ -# cycle_dma_i_0__n N_370_i a_decode_2__n CLK_000_D_3_ AS_030_D0_i \ -# pos_clk_un6_bgack_000_0_n CLK_000_D_4_ ahigh_i_30__n N_283_i CLK_000_D_5_ \ -# ahigh_i_31__n pos_clk_size_dma_6_0_0__n CLK_000_D_6_ ahigh_i_28__n N_345_i \ -# CLK_000_D_7_ ahigh_i_29__n pos_clk_size_dma_6_0_1__n CLK_000_D_8_ ahigh_i_26__n \ -# UDS_000_c_i CLK_000_D_9_ ahigh_i_27__n LDS_000_c_i CLK_000_D_12_ ahigh_i_24__n \ -# N_171_i pos_clk_un6_bg_030_n ahigh_i_25__n N_21_i inst_AMIGA_BUS_ENABLE_DMA_HIGH \ -# N_241_i N_38_0 inst_DSACK1_INTreg N_242_i DTACK_c_i pos_clk_ipl_n N_243_i N_55_0 \ -# inst_DS_000_ENABLE N_249_i SM_AMIGA_6_ un6_ds_030_i N_248_i SM_AMIGA_0_ DS_000_DMA_i \ -# pos_clk_un9_clk_000_pe_0_n SM_AMIGA_4_ un4_as_000_i N_250_i inst_RW_000_INT \ -# un6_as_030_i N_251_i inst_RW_000_DMA un4_lds_000_i cpu_est_2_0_1__n RST_DLY_0_ \ -# un4_uds_000_i N_253_i RST_DLY_1_ AS_030_c N_369_i RST_DLY_2_ cpu_est_2_0_2__n \ -# inst_A0_DMA AS_000_c N_254_i inst_CLK_030_H N_316_i SM_AMIGA_1_ RW_000_c N_256_i \ -# SM_AMIGA_5_ N_255_i SM_AMIGA_3_ N_317_i SM_AMIGA_2_ UDS_000_c N_267_i \ -# pos_clk_ds_000_dma_4_n N_266_i N_3 LDS_000_c N_57_0 N_8 N_151_0 size_c_0__n N_321_i \ -# N_158_i size_c_1__n VMA_INT_i N_361_i ahigh_c_24__n N_362_i N_27 N_169_i ahigh_c_25__n \ -# N_186_0 N_195_0 ahigh_c_26__n N_196_0 ahigh_c_27__n N_263_i N_262_i ahigh_c_28__n \ -# N_323_0 N_101_i ahigh_c_29__n N_366_i N_182_i ahigh_c_30__n \ -# pos_clk_un23_bgack_030_int_i_0_0_n N_310_i ahigh_c_31__n N_359_i N_144_0 \ -# CLK_OUT_PRE_D_i N_142_0 N_311_i N_319_i N_93_i N_272_0 N_290_i N_273_0 N_346_i \ -# pos_clk_ds_000_dma_4_0_n N_268_i N_269_i SM_AMIGA_i_7_ sm_amiga_nss_0_3__n N_341_i \ -# N_238_i N_239_i sm_amiga_nss_0_2__n N_263 N_235_i G_116 N_236_i G_117 \ -# sm_amiga_nss_0_4__n G_118 N_234_i pos_clk_un23_bgack_030_int_i_0_n \ -# sm_amiga_nss_0_5__n N_272 N_231_i N_273 N_232_i sm_amiga_nss_0_6__n N_313 N_230_i \ -# a_decode_c_16__n sm_amiga_nss_0_7__n N_226_i N_108 a_decode_c_17__n N_331_i N_319 \ -# N_142 a_decode_c_18__n un1_as_000_i N_144 N_27_i N_322 a_decode_c_19__n N_30_0 N_169 \ -# ipl_c_i_0__n N_195 a_decode_c_20__n N_51_0 N_323 N_3_i N_209 a_decode_c_21__n N_49_0 \ -# N_218 N_8_i N_224 a_decode_c_22__n N_45_0 N_226 sm_amiga_nss_i_0_1_0__n N_331 \ -# a_decode_c_23__n sm_amiga_nss_i_0_2_0__n N_229 sm_amiga_nss_i_0_3_0__n N_230 \ -# a_c_0__n sm_amiga_nss_i_0_4_0__n N_231 sm_amiga_nss_i_0_5_0__n N_232 a_c_1__n \ -# pos_clk_un10_sm_amiga_i_1_n N_233 un10_ciin_1 N_234 nEXP_SPACE_c un10_ciin_2 N_235 \ -# un10_ciin_3 N_236 BERR_c un10_ciin_4 N_238 un10_ciin_5 N_239 BG_030_c un10_ciin_6 N_240 \ -# un10_ciin_7 N_251 BG_000DFFreg un10_ciin_8 N_262 un10_ciin_9 N_341 un10_ciin_10 N_268 \ -# BGACK_000_c un10_ciin_11 N_269 pos_clk_un23_bgack_030_int_i_0_0_1_n N_282 CLK_030_c \ -# pos_clk_un23_bgack_030_int_i_0_0_2_n N_346 N_60_i_1 N_290 N_60_i_2 N_310 N_248_1 \ -# N_311 CLK_OSZI_c N_248_2 N_355 N_249_1 N_356 N_249_2 N_359 CLK_OUT_INTreg N_361_1 N_360 \ -# N_361_2 N_365 N_157_1 N_366 FPU_SENSE_c N_157_2 \ -# pos_clk_un23_bgack_030_int_i_0_o2_2_x2 N_157_3 pos_clk_CYCLE_DMA_5_1_i_0_x2 \ -# IPL_030DFF_0_reg N_157_4 N_248 N_260_1 N_249 IPL_030DFF_1_reg N_260_2 N_369 \ -# un21_fpu_cs_1 N_196 IPL_030DFF_2_reg un22_berr_1_0 N_186 N_275_i_1 N_361 ipl_c_0__n \ -# N_275_i_2 N_362 N_274_i_1 N_151 ipl_c_1__n N_274_i_2 N_321 N_115_1 N_266 ipl_c_2__n \ -# N_115_2 N_267 N_332_1 N_255 N_246_1 N_256 DTACK_c N_246_2 N_253 N_246_3 N_254 N_246_4 \ -# cpu_est_2_2__n N_332_4_1 cpu_est_2_1__n VPA_c N_332_4_2 N_250 N_273_0_1 \ -# pos_clk_un9_clk_000_pe_n N_276_i_1 N_364 RST_c N_277_i_1 N_21 N_314_i_1 N_171 N_356_1 \ -# pos_clk_size_dma_6_1__n RW_c N_282_1 N_345 N_251_1 pos_clk_size_dma_6_0__n fc_c_0__n \ -# pos_clk_un6_bg_030_1_n N_283 N_240_1 pos_clk_un6_bgack_000_n fc_c_1__n N_238_1 N_370 \ -# N_233_1 N_259 N_231_1 N_10 AMIGA_BUS_DATA_DIR_c N_224_1 pos_clk_un9_bg_030_n N_218_1 \ -# N_4 pos_clk_ipl_1_n N_114 rw_000_dma_0_un3_n N_278 rw_000_dma_0_un1_n N_5 N_25_i \ -# rw_000_dma_0_un0_n N_113 N_34_0 lds_000_int_0_un3_n N_279 N_24_i lds_000_int_0_un1_n \ -# N_6 N_35_0 lds_000_int_0_un0_n N_115 N_23_i ipl_030_0_1__un3_n N_63 N_36_0 \ -# ipl_030_0_1__un1_n N_7 N_19_i ipl_030_0_1__un0_n pos_clk_un3_as_030_d0_n N_40_0 \ -# amiga_bus_enable_dma_high_0_un3_n N_67 N_17_i amiga_bus_enable_dma_high_0_un1_n \ -# N_18 N_42_0 amiga_bus_enable_dma_high_0_un0_n pos_clk_rw_000_int_5_n ipl_c_i_1__n \ -# amiga_bus_enable_dma_low_0_un3_n un1_SM_AMIGA_0_sqmuxa_1 N_52_0 \ -# amiga_bus_enable_dma_low_0_un1_n N_22 ipl_c_i_2__n \ -# amiga_bus_enable_dma_low_0_un0_n pos_clk_a0_dma_3_n N_53_0 uds_000_int_0_un3_n \ -# N_363 N_28_i uds_000_int_0_un1_n N_26 N_31_0 uds_000_int_0_un0_n N_157 N_29_i \ -# ipl_030_0_2__un3_n N_260 N_32_0 ipl_030_0_2__un1_n un22_berr_1 a_c_i_0__n \ -# ipl_030_0_2__un0_n N_219 size_c_i_1__n \ -# un1_amiga_bus_enable_dma_high_i_m2_0__un3_n N_139 pos_clk_un10_sm_amiga_i_n \ -# un1_amiga_bus_enable_dma_high_i_m2_0__un1_n N_220 N_332_i \ -# un1_amiga_bus_enable_dma_high_i_m2_0__un0_n N_222 N_240_i as_000_int_0_un3_n N_223 \ -# N_315_0 as_000_int_0_un1_n N_368 N_281_0 as_000_int_0_un0_n N_257 N_270_i \ -# ds_000_enable_0_un3_n N_258 N_282_i ds_000_enable_0_un1_n N_312 \ -# AMIGA_BUS_DATA_DIR_c_0 ds_000_enable_0_un0_n N_143 RW_c_i as_030_000_sync_0_un3_n \ -# N_332 N_140_0 as_030_000_sync_0_un1_n N_332_4 N_353_i as_030_000_sync_0_un0_n N_246 \ -# N_143_0 rw_000_int_0_un3_n N_180 sm_amiga_i_1__n rw_000_int_0_un1_n N_320 N_320_i \ -# rw_000_int_0_un0_n N_244 N_357_i a0_dma_0_un3_n N_334 N_356_i a0_dma_0_un1_n N_335 \ -# N_156_0 a0_dma_0_un0_n N_159 sm_amiga_i_4__n bg_000_0_un3_n N_156 N_159_i \ -# bg_000_0_un1_n N_357 sm_amiga_i_2__n bg_000_0_un0_n N_353 N_180_i \ -# size_dma_0_1__un3_n N_140 N_334_i size_dma_0_1__un1_n N_270 N_335_i \ -# size_dma_0_1__un0_n N_281 N_244_i size_dma_0_0__un3_n N_131 N_233_i \ -# size_dma_0_0__un1_n N_132 N_355_i size_dma_0_0__un0_n N_29 N_229_i \ -# bgack_030_int_0_un3_n +#$ PINS 75 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_030_2_ IPL_2_ FC_1_ AS_030 SIZE_0_ \ +# AS_000 AHIGH_30_ RW_000 AHIGH_29_ DS_030 AHIGH_28_ UDS_000 AHIGH_27_ LDS_000 AHIGH_26_ \ +# nEXP_SPACE AHIGH_25_ BERR AHIGH_24_ BG_030 A_DECODE_22_ BG_000 A_DECODE_21_ BGACK_030 \ +# A_DECODE_20_ BGACK_000 A_DECODE_19_ CLK_030 A_DECODE_18_ CLK_000 A_DECODE_17_ \ +# CLK_OSZI A_DECODE_16_ CLK_DIV_OUT A_DECODE_15_ CLK_EXP A_DECODE_14_ FPU_CS \ +# A_DECODE_13_ FPU_SENSE A_DECODE_12_ DSACK1 A_DECODE_11_ DTACK A_DECODE_10_ AVEC \ +# A_DECODE_9_ E A_DECODE_8_ VPA A_DECODE_7_ VMA A_DECODE_6_ RST A_DECODE_5_ RESET \ +# A_DECODE_4_ RW A_DECODE_3_ AMIGA_ADDR_ENABLE A_DECODE_2_ AMIGA_BUS_DATA_DIR A_0_ \ +# AMIGA_BUS_ENABLE_LOW IPL_030_1_ AMIGA_BUS_ENABLE_HIGH IPL_030_0_ CIIN IPL_1_ IPL_0_ \ +# FC_0_ A_1_ +#$ NODES 653 N_28 ipl_030_0_0__un1_n N_17 N_190_i ipl_030_0_0__un0_n N_23 N_188_i \ +# ipl_030_0_2__un3_n N_6 N_189_i ipl_030_0_2__un1_n un1_amiga_bus_enable_low_i \ +# N_173_0 ipl_030_0_2__un0_n un21_fpu_cs_i N_170_0 ds_000_dma_0_un3_n UDS_000_INT_i \ +# N_255_i ds_000_dma_0_un1_n LDS_000_INT_i N_256_i ds_000_dma_0_un0_n \ +# inst_BGACK_030_INTreg AS_030_i N_161_i dsack1_int_0_un3_n vcc_n_n AS_000_INT_i \ +# VMA_INT_i dsack1_int_0_un1_n inst_VMA_INTreg RESET_OUT_i N_152_i dsack1_int_0_un0_n \ +# gnd_n_n sm_amiga_i_3__n N_151_0 as_000_int_0_un3_n un1_amiga_bus_enable_low \ +# sm_amiga_i_0__n N_251_i as_000_int_0_un1_n un6_as_030 cpu_est_i_1__n N_250_i \ +# as_000_int_0_un0_n un3_size cpu_est_i_3__n N_147_i as_030_000_sync_0_un3_n un4_size \ +# VPA_D_i N_146_i as_030_000_sync_0_un1_n un4_uds_000 rst_dly_i_0__n N_145_i \ +# as_030_000_sync_0_un0_n un4_lds_000 rst_dly_i_1__n N_397_i a_decode_15__n \ +# un4_as_000 cpu_est_i_0__n N_142_0 un10_ciin clk_000_d_i_1__n N_136_i a_decode_14__n \ +# un21_fpu_cs cpu_est_i_2__n N_248_i un22_berr DTACK_D0_i N_227_i a_decode_13__n \ +# un6_ds_030 clk_000_d_i_9__n N_226_i cpu_est_3_ N_258_i_0 N_291_i a_decode_12__n \ +# cpu_est_0_ rst_dly_i_2__n N_224_i cpu_est_1_ FPU_SENSE_i N_225_i a_decode_11__n \ +# cpu_est_2_ AS_030_000_SYNC_i N_230_i inst_AS_000_INT sm_amiga_i_i_7__n N_267_i \ +# a_decode_10__n inst_AMIGA_BUS_ENABLE_DMA_LOW BGACK_030_INT_i cpu_est_2_0_2__n \ +# inst_AS_030_D0 AMIGA_BUS_ENABLE_DMA_LOW_i N_222_i a_decode_9__n \ +# inst_AS_030_000_SYNC N_102_i N_223_i inst_BGACK_030_INT_D N_103_i cpu_est_2_0_1__n \ +# a_decode_8__n inst_AS_000_DMA size_dma_i_1__n N_221_i inst_DS_000_DMA \ +# size_dma_i_0__n N_220_i a_decode_7__n CYCLE_DMA_0_ RW_000_i \ +# pos_clk_un9_clk_000_pe_0_n CYCLE_DMA_1_ a_i_1__n N_216_i a_decode_6__n SIZE_DMA_0_ \ +# N_124_i N_215_i SIZE_DMA_1_ CLK_030_i a_decode_5__n inst_VPA_D clk_000_d_i_0__n \ +# N_199_i inst_UDS_000_INT clk_000_d_i_8__n N_198_i a_decode_4__n inst_LDS_000_INT \ +# AS_000_DMA_i sm_amiga_nss_0_6__n inst_CLK_OUT_PRE_D AS_000_i N_21_i a_decode_3__n \ +# CLK_000_D_8_ CLK_030_H_i N_39_0 CLK_000_D_9_ AS_030_D0_i nEXP_SPACE_c_i \ +# a_decode_2__n inst_DTACK_D0 cycle_dma_i_0__n un1_as_030_i inst_RESET_OUT \ +# a_decode_i_16__n N_133_0 CLK_000_D_1_ a_decode_i_18__n N_214_i CLK_000_D_0_ \ +# a_decode_i_19__n N_213_i inst_CLK_OUT_PRE_50 ahigh_i_30__n N_306_0 \ +# inst_CLK_OUT_PRE_25 ahigh_i_31__n N_26_i IPL_D0_0_ ahigh_i_28__n N_34_0 IPL_D0_1_ \ +# ahigh_i_29__n BG_030_c_i IPL_D0_2_ ahigh_i_26__n pos_clk_un6_bg_030_i_n \ +# CLK_000_D_2_ ahigh_i_27__n pos_clk_un9_bg_030_0_n CLK_000_D_3_ ahigh_i_24__n N_25_i \ +# CLK_000_D_4_ ahigh_i_25__n N_35_0 CLK_000_D_5_ N_244_i N_24_i CLK_000_D_6_ N_245_i \ +# N_36_0 CLK_000_D_7_ N_246_i N_22_i CLK_000_D_10_ N_38_0 pos_clk_un6_bg_030_n N_85_i \ +# N_19_i inst_AMIGA_BUS_ENABLE_DMA_HIGH N_86_i N_41_0 inst_DSACK1_INTreg un6_ds_030_i \ +# N_18_i pos_clk_ipl_n DS_000_DMA_i N_42_0 inst_DS_000_ENABLE un4_as_000_i N_10_i \ +# SM_AMIGA_6_ un6_as_030_i N_44_0 SM_AMIGA_4_ un4_lds_000_i N_311_0 SM_AMIGA_0_ \ +# un4_uds_000_i un10_ciin_i inst_RW_000_INT AS_030_c N_310_0 inst_RW_000_DMA N_207_i \ +# RST_DLY_0_ AS_000_c N_208_i RST_DLY_1_ AMIGA_BUS_DATA_DIR_c_0 RST_DLY_2_ RW_000_c \ +# N_209_i inst_A0_DMA pos_clk_size_dma_6_0_0__n inst_CLK_030_H N_210_i SM_AMIGA_1_ \ +# UDS_000_c pos_clk_size_dma_6_0_1__n SM_AMIGA_5_ N_268_i SM_AMIGA_3_ LDS_000_c \ +# pos_clk_un6_bgack_000_0_n SM_AMIGA_2_ un1_SM_AMIGA_0_sqmuxa_1_0 \ +# pos_clk_un3_as_030_d0_n size_c_0__n RW_c_i pos_clk_ds_000_dma_4_n \ +# pos_clk_rw_000_int_5_0_n N_3 size_c_1__n UDS_000_c_i N_4 LDS_000_c_i N_5 \ +# ahigh_c_24__n N_164_i N_7 N_8 ahigh_c_25__n N_113_i N_195_i ahigh_c_26__n N_174_0 \ +# N_169_i ahigh_c_27__n N_260_i N_168_i N_27 ahigh_c_28__n pos_clk_un3_as_030_d0_i_n \ +# N_29 pos_clk_un21_bgack_030_int_i_0_0_n CLK_OUT_PRE_25_0 ahigh_c_29__n \ +# CLK_OUT_PRE_D_i N_143_0 ahigh_c_30__n N_396_i N_137_i ahigh_c_31__n N_372_i N_236_i \ +# N_237_i N_280_0 N_281_0 N_229_i N_66_0 N_371_i N_305_0 N_212_i N_307_0 N_211_i \ +# pos_clk_ds_000_dma_4_0_n N_205_i N_206_i sm_amiga_nss_0_2__n N_200_i \ +# sm_amiga_nss_0_5__n N_197_i N_29_i SM_AMIGA_i_7_ N_33_0 N_27_i N_31_0 ipl_c_i_2__n \ +# N_54_0 ipl_c_i_1__n N_53_0 N_113 a_decode_c_16__n ipl_c_i_0__n G_117 N_52_0 G_118 \ +# a_decode_c_17__n N_3_i G_119 N_50_0 pos_clk_un21_bgack_030_int_i_0_n \ +# a_decode_c_18__n N_4_i N_280 N_49_0 N_281 a_decode_c_19__n N_5_i N_85 N_48_0 N_86 \ +# a_decode_c_20__n N_7_i N_305 N_47_0 a_decode_c_21__n N_8_i N_307 N_46_0 N_310 \ +# a_decode_c_22__n sm_amiga_nss_i_0_1_0__n N_66 sm_amiga_nss_i_0_2_0__n \ +# a_decode_c_23__n sm_amiga_nss_i_0_3_0__n N_136 sm_amiga_nss_i_0_4_0__n N_137 \ +# a_c_0__n sm_amiga_nss_i_0_5_0__n N_143 N_373_i_1 N_147 a_c_1__n \ +# pos_clk_un10_sm_amiga_i_1_n N_161 N_124_1 nEXP_SPACE_c N_124_2 N_174 N_124_3 N_178 \ +# BERR_c N_124_4 N_184 un10_ciin_1 N_190 BG_030_c un10_ciin_2 N_193 un10_ciin_3 N_195 \ +# BG_000DFFreg un10_ciin_4 N_197 un10_ciin_5 N_200 un10_ciin_6 N_205 BGACK_000_c \ +# un10_ciin_7 N_206 un10_ciin_8 N_208 CLK_030_c un10_ciin_9 N_211 un10_ciin_10 N_212 \ +# un10_ciin_11 N_213 pos_clk_un21_bgack_030_int_i_0_0_1_n N_223 CLK_OSZI_c \ +# pos_clk_un21_bgack_030_int_i_0_0_2_n N_229 N_309_i_1 N_236 N_309_i_2 N_237 \ +# CLK_OUT_INTreg N_229_1 N_243 N_229_2 N_396 N_214_1_0 N_250 FPU_SENSE_c un21_fpu_cs_1 \ +# N_253 un22_berr_1_0 N_254 IPL_030DFF_0_reg N_255_1 N_257 N_255_2 N_259 \ +# IPL_030DFF_1_reg N_151_0_1 N_260 N_277_i_1 pos_clk_un21_bgack_030_int_i_0_o2_2_x2 \ +# IPL_030DFF_2_reg N_277_i_2 pos_clk_CYCLE_DMA_5_1_i_0_x2 N_276_i_1 un22_berr_1 \ +# ipl_c_0__n N_276_i_2 N_124 N_221_1 N_164 ipl_c_1__n N_221_2 pos_clk_rw_000_int_5_n \ +# N_220_1 un1_SM_AMIGA_0_sqmuxa_1 ipl_c_2__n N_220_2 pos_clk_un6_bgack_000_n N_194_1 \ +# N_268 N_194_2 pos_clk_size_dma_6_1__n DTACK_c N_194_3 N_210 N_278_i_1 \ +# pos_clk_size_dma_6_0__n N_307_0_1 N_209 N_308_i_1 N_207 VPA_c N_40_i_1 N_311 N_250_1 \ +# N_102 N_223_1 N_103 RST_c pos_clk_un6_bg_030_1_n N_228 N_213_1 pos_clk_a0_dma_3_n \ +# N_208_1 N_10 RW_c N_205_1 N_18 N_193_1 N_19 fc_c_0__n N_190_1 N_22 N_184_1 N_24 fc_c_1__n \ +# pos_clk_ipl_1_n N_25 ipl_030_0_1__un3_n pos_clk_un9_bg_030_n ipl_030_0_1__un1_n \ +# N_26 AMIGA_BUS_DATA_DIR_c ipl_030_0_1__un0_n N_214 uds_000_int_0_un3_n N_214_1 \ +# uds_000_int_0_un1_n N_21 uds_000_int_0_un0_n pos_clk_un9_clk_000_pe_n \ +# lds_000_int_0_un3_n cpu_est_2_1__n N_23_i lds_000_int_0_un1_n cpu_est_2_2__n N_37_0 \ +# lds_000_int_0_un0_n N_185 N_17_i ds_000_enable_0_un3_n N_142 N_43_0 \ +# ds_000_enable_0_un1_n N_258 VPA_c_i ds_000_enable_0_un0_n N_186 N_55_0 \ +# vma_int_0_un3_n N_188 DTACK_c_i vma_int_0_un1_n N_189 N_56_0 vma_int_0_un0_n N_266 \ +# N_28_i cpu_est_0_1__un3_n N_198 N_32_0 cpu_est_0_1__un1_n N_261 a_c_i_0__n \ +# cpu_est_0_1__un0_n N_199 size_c_i_1__n cpu_est_0_2__un3_n N_215 \ +# pos_clk_un10_sm_amiga_i_n cpu_est_0_2__un1_n N_216 N_201_i cpu_est_0_2__un0_n N_222 \ +# N_202_i cpu_est_0_3__un3_n N_224 sm_amiga_nss_0_4__n cpu_est_0_3__un1_n N_146 \ +# N_204_i cpu_est_0_3__un0_n N_225 N_203_i amiga_bus_enable_dma_high_0_un3_n N_173 \ +# sm_amiga_nss_0_3__n amiga_bus_enable_dma_high_0_un1_n N_226 N_45_i \ +# amiga_bus_enable_dma_high_0_un0_n N_170 un1_SM_AMIGA_0_sqmuxa_2_i \ +# amiga_bus_enable_dma_low_0_un3_n N_227 N_279_0 amiga_bus_enable_dma_low_0_un1_n \ +# N_145 N_235_i amiga_bus_enable_dma_low_0_un0_n N_151 N_234_i a0_dma_0_un3_n N_397 \ +# N_58_0 a0_dma_0_un1_n N_251 N_243_i a0_dma_0_un0_n N_255 N_254_i rw_000_dma_0_un3_n \ +# N_256 N_144_0 rw_000_dma_0_un1_n N_267 N_249_i rw_000_dma_0_un0_n N_221 N_247_i \ +# rw_000_int_0_un3_n N_220 sm_amiga_nss_0_7__n rw_000_int_0_un1_n N_194 \ +# sm_amiga_i_4__n rw_000_int_0_un0_n N_373 N_252_i bgack_030_int_0_un3_n N_398 N_153_0 \ +# bgack_030_int_0_un1_n N_191 sm_amiga_i_6__n bgack_030_int_0_un0_n N_192 \ +# sm_amiga_i_2__n bg_000_0_un3_n N_172 N_373_i bg_000_0_un1_n N_171 N_171_0 \ +# bg_000_0_un0_n N_153 N_253_i size_dma_0_1__un3_n N_252 N_172_0 size_dma_0_1__un1_n \ +# N_247 N_192_i size_dma_0_1__un0_n N_249 N_191_i size_dma_0_0__un3_n N_144 N_193_i \ +# size_dma_0_0__un1_n N_234 N_398_i size_dma_0_0__un0_n N_235 N_261_i \ +# un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un3_n N_279 N_194_i \ +# un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un1_n un1_SM_AMIGA_0_sqmuxa_2 \ +# sm_amiga_nss_i_0_0__n un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un0_n N_203 \ +# as_000_dma_0_un3_n N_204 N_186_i as_000_dma_0_un1_n N_201 N_185_i as_000_dma_0_un0_n \ +# N_202 N_184_i ipl_030_0_0__un3_n .model bus68030 .inputs A_DECODE_23_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF \ BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF \ @@ -128,171 +127,170 @@ A_DECODE_4_.BLIF A_DECODE_3_.BLIF A_DECODE_2_.BLIF IPL_1_.BLIF IPL_0_.BLIF \ FC_0_.BLIF A_1_.BLIF SIZE_1_.BLIF AHIGH_31_.BLIF AS_030.BLIF AS_000.BLIF \ RW_000.BLIF UDS_000.BLIF LDS_000.BLIF BERR.BLIF RW.BLIF SIZE_0_.BLIF \ AHIGH_30_.BLIF AHIGH_29_.BLIF AHIGH_28_.BLIF AHIGH_27_.BLIF AHIGH_26_.BLIF \ -AHIGH_25_.BLIF AHIGH_24_.BLIF A_0_.BLIF N_28.BLIF N_246_i.BLIF \ -bgack_030_int_0_un1_n.BLIF N_17.BLIF sm_amiga_nss_i_0_0__n.BLIF \ -bgack_030_int_0_un0_n.BLIF N_19.BLIF dsack1_int_0_un3_n.BLIF N_23.BLIF \ -N_220_i.BLIF dsack1_int_0_un1_n.BLIF N_24.BLIF N_219_i.BLIF \ -dsack1_int_0_un0_n.BLIF N_25.BLIF N_218_i.BLIF cpu_est_0_3__un3_n.BLIF \ -un1_amiga_bus_enable_low_i.BLIF cpu_est_0_3__un1_n.BLIF un21_fpu_cs_i.BLIF \ -N_224_i.BLIF cpu_est_0_3__un0_n.BLIF inst_BGACK_030_INTreg.BLIF \ -BGACK_030_INT_i.BLIF N_222_i.BLIF cpu_est_0_2__un3_n.BLIF vcc_n_n.BLIF \ -AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF N_223_i.BLIF cpu_est_0_2__un1_n.BLIF \ -inst_VMA_INTreg.BLIF UDS_000_INT_i.BLIF N_322_i.BLIF cpu_est_0_2__un0_n.BLIF \ -gnd_n_n.BLIF LDS_000_INT_i.BLIF N_312_i.BLIF cpu_est_0_1__un3_n.BLIF \ -un1_amiga_bus_enable_low.BLIF N_131_i.BLIF N_139_0.BLIF \ -cpu_est_0_1__un1_n.BLIF un6_as_030.BLIF N_132_i.BLIF N_108_i.BLIF \ -cpu_est_0_1__un0_n.BLIF un3_size.BLIF RW_000_i.BLIF N_258_i.BLIF \ -vma_int_0_un3_n.BLIF un4_size.BLIF a_i_1__n.BLIF N_257_i.BLIF \ -vma_int_0_un1_n.BLIF un4_uds_000.BLIF clk_000_d_i_11__n.BLIF \ -vma_int_0_un0_n.BLIF un4_lds_000.BLIF sm_amiga_i_6__n.BLIF N_245_i.BLIF \ -ipl_030_0_0__un3_n.BLIF un4_as_000.BLIF clk_000_d_i_1__n.BLIF \ -nEXP_SPACE_c_i.BLIF ipl_030_0_0__un1_n.BLIF un10_ciin.BLIF \ -AS_030_000_SYNC_i.BLIF un1_as_030_i.BLIF ipl_030_0_0__un0_n.BLIF \ -un21_fpu_cs.BLIF sm_amiga_i_0__n.BLIF pos_clk_un3_as_030_d0_0_n.BLIF \ -ds_000_dma_0_un3_n.BLIF un22_berr.BLIF sm_amiga_i_3__n.BLIF N_107_0.BLIF \ -ds_000_dma_0_un1_n.BLIF un6_ds_030.BLIF sm_amiga_i_i_7__n.BLIF N_115_i.BLIF \ -ds_000_dma_0_un0_n.BLIF cpu_est_3_.BLIF sm_amiga_i_5__n.BLIF N_63_0.BLIF \ -as_000_dma_0_un3_n.BLIF cpu_est_0_.BLIF rst_dly_i_0__n.BLIF N_278_0.BLIF \ -as_000_dma_0_un1_n.BLIF cpu_est_1_.BLIF rst_dly_i_1__n.BLIF N_279_0.BLIF \ -as_000_dma_0_un0_n.BLIF cpu_est_2_.BLIF N_364_i_0.BLIF N_260_i.BLIF \ -a_decode_15__n.BLIF inst_AS_000_INT.BLIF cpu_est_i_0__n.BLIF N_67_0.BLIF \ -inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF rst_dly_i_2__n.BLIF \ -pos_clk_rw_000_int_5_0_n.BLIF a_decode_14__n.BLIF inst_AS_030_D0.BLIF \ -AS_030_i.BLIF un1_SM_AMIGA_0_sqmuxa_1_0.BLIF inst_AS_030_000_SYNC.BLIF \ -FPU_SENSE_i.BLIF un10_ciin_i.BLIF a_decode_13__n.BLIF \ -inst_BGACK_030_INT_D.BLIF N_157_i.BLIF N_313_0.BLIF inst_AS_000_DMA.BLIF \ -a_decode_i_16__n.BLIF N_4_i.BLIF a_decode_12__n.BLIF inst_DS_000_DMA.BLIF \ -a_decode_i_18__n.BLIF N_48_0.BLIF CYCLE_DMA_0_.BLIF a_decode_i_19__n.BLIF \ -N_5_i.BLIF a_decode_11__n.BLIF CYCLE_DMA_1_.BLIF N_113_i.BLIF N_47_0.BLIF \ -SIZE_DMA_0_.BLIF N_114_i.BLIF N_7_i.BLIF a_decode_10__n.BLIF SIZE_DMA_1_.BLIF \ -AS_000_INT_i.BLIF N_46_0.BLIF inst_VPA_D.BLIF size_dma_i_1__n.BLIF N_18_i.BLIF \ -a_decode_9__n.BLIF inst_UDS_000_INT.BLIF size_dma_i_0__n.BLIF N_41_0.BLIF \ -inst_LDS_000_INT.BLIF RESET_OUT_i.BLIF N_22_i.BLIF a_decode_8__n.BLIF \ -inst_CLK_OUT_PRE_D.BLIF cpu_est_i_1__n.BLIF N_37_0.BLIF CLK_000_D_1_.BLIF \ -cpu_est_i_2__n.BLIF N_26_i.BLIF a_decode_7__n.BLIF CLK_000_D_10_.BLIF \ -VPA_D_i.BLIF N_33_0.BLIF CLK_000_D_11_.BLIF DTACK_D0_i.BLIF BG_030_c_i.BLIF \ -a_decode_6__n.BLIF inst_DTACK_D0.BLIF cpu_est_i_3__n.BLIF \ -pos_clk_un6_bg_030_i_n.BLIF inst_RESET_OUT.BLIF CLK_030_i.BLIF \ -pos_clk_un9_bg_030_0_n.BLIF a_decode_5__n.BLIF CLK_000_D_0_.BLIF \ -clk_000_d_i_0__n.BLIF N_10_i.BLIF inst_CLK_OUT_PRE_50.BLIF \ -clk_000_d_i_10__n.BLIF N_43_0.BLIF a_decode_4__n.BLIF IPL_D0_0_.BLIF \ -AS_000_DMA_i.BLIF VPA_c_i.BLIF IPL_D0_1_.BLIF AS_000_i.BLIF N_54_0.BLIF \ -a_decode_3__n.BLIF IPL_D0_2_.BLIF CLK_030_H_i.BLIF un3_as_030_i.BLIF \ -CLK_000_D_2_.BLIF cycle_dma_i_0__n.BLIF N_370_i.BLIF a_decode_2__n.BLIF \ -CLK_000_D_3_.BLIF AS_030_D0_i.BLIF pos_clk_un6_bgack_000_0_n.BLIF \ -CLK_000_D_4_.BLIF ahigh_i_30__n.BLIF N_283_i.BLIF CLK_000_D_5_.BLIF \ -ahigh_i_31__n.BLIF pos_clk_size_dma_6_0_0__n.BLIF CLK_000_D_6_.BLIF \ -ahigh_i_28__n.BLIF N_345_i.BLIF CLK_000_D_7_.BLIF ahigh_i_29__n.BLIF \ -pos_clk_size_dma_6_0_1__n.BLIF CLK_000_D_8_.BLIF ahigh_i_26__n.BLIF \ -UDS_000_c_i.BLIF CLK_000_D_9_.BLIF ahigh_i_27__n.BLIF LDS_000_c_i.BLIF \ -CLK_000_D_12_.BLIF ahigh_i_24__n.BLIF N_171_i.BLIF pos_clk_un6_bg_030_n.BLIF \ -ahigh_i_25__n.BLIF N_21_i.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF \ -N_241_i.BLIF N_38_0.BLIF inst_DSACK1_INTreg.BLIF N_242_i.BLIF DTACK_c_i.BLIF \ -pos_clk_ipl_n.BLIF N_243_i.BLIF N_55_0.BLIF inst_DS_000_ENABLE.BLIF \ -N_249_i.BLIF SM_AMIGA_6_.BLIF un6_ds_030_i.BLIF N_248_i.BLIF SM_AMIGA_0_.BLIF \ -DS_000_DMA_i.BLIF pos_clk_un9_clk_000_pe_0_n.BLIF SM_AMIGA_4_.BLIF \ -un4_as_000_i.BLIF N_250_i.BLIF inst_RW_000_INT.BLIF un6_as_030_i.BLIF \ -N_251_i.BLIF inst_RW_000_DMA.BLIF un4_lds_000_i.BLIF cpu_est_2_0_1__n.BLIF \ -RST_DLY_0_.BLIF un4_uds_000_i.BLIF N_253_i.BLIF RST_DLY_1_.BLIF AS_030_c.BLIF \ -N_369_i.BLIF RST_DLY_2_.BLIF cpu_est_2_0_2__n.BLIF inst_A0_DMA.BLIF \ -AS_000_c.BLIF N_254_i.BLIF inst_CLK_030_H.BLIF N_316_i.BLIF SM_AMIGA_1_.BLIF \ -RW_000_c.BLIF N_256_i.BLIF SM_AMIGA_5_.BLIF N_255_i.BLIF SM_AMIGA_3_.BLIF \ -N_317_i.BLIF SM_AMIGA_2_.BLIF UDS_000_c.BLIF N_267_i.BLIF \ -pos_clk_ds_000_dma_4_n.BLIF N_266_i.BLIF N_3.BLIF LDS_000_c.BLIF N_57_0.BLIF \ -N_8.BLIF N_151_0.BLIF size_c_0__n.BLIF N_321_i.BLIF N_158_i.BLIF \ -size_c_1__n.BLIF VMA_INT_i.BLIF N_361_i.BLIF ahigh_c_24__n.BLIF N_362_i.BLIF \ -N_27.BLIF N_169_i.BLIF ahigh_c_25__n.BLIF N_186_0.BLIF N_195_0.BLIF \ -ahigh_c_26__n.BLIF N_196_0.BLIF ahigh_c_27__n.BLIF N_263_i.BLIF N_262_i.BLIF \ -ahigh_c_28__n.BLIF N_323_0.BLIF N_101_i.BLIF ahigh_c_29__n.BLIF N_366_i.BLIF \ -N_182_i.BLIF ahigh_c_30__n.BLIF pos_clk_un23_bgack_030_int_i_0_0_n.BLIF \ -N_310_i.BLIF ahigh_c_31__n.BLIF N_359_i.BLIF N_144_0.BLIF CLK_OUT_PRE_D_i.BLIF \ -N_142_0.BLIF N_311_i.BLIF N_319_i.BLIF N_93_i.BLIF N_272_0.BLIF N_290_i.BLIF \ -N_273_0.BLIF N_346_i.BLIF pos_clk_ds_000_dma_4_0_n.BLIF N_268_i.BLIF \ -N_269_i.BLIF SM_AMIGA_i_7_.BLIF sm_amiga_nss_0_3__n.BLIF N_341_i.BLIF \ -N_238_i.BLIF N_239_i.BLIF sm_amiga_nss_0_2__n.BLIF N_263.BLIF N_235_i.BLIF \ -G_116.BLIF N_236_i.BLIF G_117.BLIF sm_amiga_nss_0_4__n.BLIF G_118.BLIF \ -N_234_i.BLIF pos_clk_un23_bgack_030_int_i_0_n.BLIF sm_amiga_nss_0_5__n.BLIF \ -N_272.BLIF N_231_i.BLIF N_273.BLIF N_232_i.BLIF sm_amiga_nss_0_6__n.BLIF \ -N_313.BLIF N_230_i.BLIF a_decode_c_16__n.BLIF sm_amiga_nss_0_7__n.BLIF \ -N_226_i.BLIF N_108.BLIF a_decode_c_17__n.BLIF N_331_i.BLIF N_319.BLIF \ -N_142.BLIF a_decode_c_18__n.BLIF un1_as_000_i.BLIF N_144.BLIF N_27_i.BLIF \ -N_322.BLIF a_decode_c_19__n.BLIF N_30_0.BLIF N_169.BLIF ipl_c_i_0__n.BLIF \ -N_195.BLIF a_decode_c_20__n.BLIF N_51_0.BLIF N_323.BLIF N_3_i.BLIF N_209.BLIF \ -a_decode_c_21__n.BLIF N_49_0.BLIF N_218.BLIF N_8_i.BLIF N_224.BLIF \ -a_decode_c_22__n.BLIF N_45_0.BLIF N_226.BLIF sm_amiga_nss_i_0_1_0__n.BLIF \ -N_331.BLIF a_decode_c_23__n.BLIF sm_amiga_nss_i_0_2_0__n.BLIF N_229.BLIF \ -sm_amiga_nss_i_0_3_0__n.BLIF N_230.BLIF a_c_0__n.BLIF \ -sm_amiga_nss_i_0_4_0__n.BLIF N_231.BLIF sm_amiga_nss_i_0_5_0__n.BLIF \ -N_232.BLIF a_c_1__n.BLIF pos_clk_un10_sm_amiga_i_1_n.BLIF N_233.BLIF \ -un10_ciin_1.BLIF N_234.BLIF nEXP_SPACE_c.BLIF un10_ciin_2.BLIF N_235.BLIF \ -un10_ciin_3.BLIF N_236.BLIF BERR_c.BLIF un10_ciin_4.BLIF N_238.BLIF \ -un10_ciin_5.BLIF N_239.BLIF BG_030_c.BLIF un10_ciin_6.BLIF N_240.BLIF \ -un10_ciin_7.BLIF N_251.BLIF BG_000DFFreg.BLIF un10_ciin_8.BLIF N_262.BLIF \ -un10_ciin_9.BLIF N_341.BLIF un10_ciin_10.BLIF N_268.BLIF BGACK_000_c.BLIF \ -un10_ciin_11.BLIF N_269.BLIF pos_clk_un23_bgack_030_int_i_0_0_1_n.BLIF \ -N_282.BLIF CLK_030_c.BLIF pos_clk_un23_bgack_030_int_i_0_0_2_n.BLIF N_346.BLIF \ -N_60_i_1.BLIF N_290.BLIF N_60_i_2.BLIF N_310.BLIF N_248_1.BLIF N_311.BLIF \ -CLK_OSZI_c.BLIF N_248_2.BLIF N_355.BLIF N_249_1.BLIF N_356.BLIF N_249_2.BLIF \ -N_359.BLIF CLK_OUT_INTreg.BLIF N_361_1.BLIF N_360.BLIF N_361_2.BLIF N_365.BLIF \ -N_157_1.BLIF N_366.BLIF FPU_SENSE_c.BLIF N_157_2.BLIF \ -pos_clk_un23_bgack_030_int_i_0_o2_2_x2.BLIF N_157_3.BLIF \ -pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF IPL_030DFF_0_reg.BLIF N_157_4.BLIF \ -N_248.BLIF N_260_1.BLIF N_249.BLIF IPL_030DFF_1_reg.BLIF N_260_2.BLIF \ -N_369.BLIF un21_fpu_cs_1.BLIF N_196.BLIF IPL_030DFF_2_reg.BLIF \ -un22_berr_1_0.BLIF N_186.BLIF N_275_i_1.BLIF N_361.BLIF ipl_c_0__n.BLIF \ -N_275_i_2.BLIF N_362.BLIF N_274_i_1.BLIF N_151.BLIF ipl_c_1__n.BLIF \ -N_274_i_2.BLIF N_321.BLIF N_115_1.BLIF N_266.BLIF ipl_c_2__n.BLIF N_115_2.BLIF \ -N_267.BLIF N_332_1.BLIF N_255.BLIF N_246_1.BLIF N_256.BLIF DTACK_c.BLIF \ -N_246_2.BLIF N_253.BLIF N_246_3.BLIF N_254.BLIF N_246_4.BLIF \ -cpu_est_2_2__n.BLIF N_332_4_1.BLIF cpu_est_2_1__n.BLIF VPA_c.BLIF \ -N_332_4_2.BLIF N_250.BLIF N_273_0_1.BLIF pos_clk_un9_clk_000_pe_n.BLIF \ -N_276_i_1.BLIF N_364.BLIF RST_c.BLIF N_277_i_1.BLIF N_21.BLIF N_314_i_1.BLIF \ -N_171.BLIF N_356_1.BLIF pos_clk_size_dma_6_1__n.BLIF RW_c.BLIF N_282_1.BLIF \ -N_345.BLIF N_251_1.BLIF pos_clk_size_dma_6_0__n.BLIF fc_c_0__n.BLIF \ -pos_clk_un6_bg_030_1_n.BLIF N_283.BLIF N_240_1.BLIF \ -pos_clk_un6_bgack_000_n.BLIF fc_c_1__n.BLIF N_238_1.BLIF N_370.BLIF \ -N_233_1.BLIF N_259.BLIF N_231_1.BLIF N_10.BLIF AMIGA_BUS_DATA_DIR_c.BLIF \ -N_224_1.BLIF pos_clk_un9_bg_030_n.BLIF N_218_1.BLIF N_4.BLIF \ -pos_clk_ipl_1_n.BLIF N_114.BLIF rw_000_dma_0_un3_n.BLIF N_278.BLIF \ -rw_000_dma_0_un1_n.BLIF N_5.BLIF N_25_i.BLIF rw_000_dma_0_un0_n.BLIF \ -N_113.BLIF N_34_0.BLIF lds_000_int_0_un3_n.BLIF N_279.BLIF N_24_i.BLIF \ -lds_000_int_0_un1_n.BLIF N_6.BLIF N_35_0.BLIF lds_000_int_0_un0_n.BLIF \ -N_115.BLIF N_23_i.BLIF ipl_030_0_1__un3_n.BLIF N_63.BLIF N_36_0.BLIF \ -ipl_030_0_1__un1_n.BLIF N_7.BLIF N_19_i.BLIF ipl_030_0_1__un0_n.BLIF \ -pos_clk_un3_as_030_d0_n.BLIF N_40_0.BLIF \ -amiga_bus_enable_dma_high_0_un3_n.BLIF N_67.BLIF N_17_i.BLIF \ -amiga_bus_enable_dma_high_0_un1_n.BLIF N_18.BLIF N_42_0.BLIF \ -amiga_bus_enable_dma_high_0_un0_n.BLIF pos_clk_rw_000_int_5_n.BLIF \ -ipl_c_i_1__n.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF \ -un1_SM_AMIGA_0_sqmuxa_1.BLIF N_52_0.BLIF amiga_bus_enable_dma_low_0_un1_n.BLIF \ -N_22.BLIF ipl_c_i_2__n.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF \ -pos_clk_a0_dma_3_n.BLIF N_53_0.BLIF uds_000_int_0_un3_n.BLIF N_363.BLIF \ -N_28_i.BLIF uds_000_int_0_un1_n.BLIF N_26.BLIF N_31_0.BLIF \ -uds_000_int_0_un0_n.BLIF N_157.BLIF N_29_i.BLIF ipl_030_0_2__un3_n.BLIF \ -N_260.BLIF N_32_0.BLIF ipl_030_0_2__un1_n.BLIF un22_berr_1.BLIF \ -a_c_i_0__n.BLIF ipl_030_0_2__un0_n.BLIF N_219.BLIF size_c_i_1__n.BLIF \ -un1_amiga_bus_enable_dma_high_i_m2_0__un3_n.BLIF N_139.BLIF \ -pos_clk_un10_sm_amiga_i_n.BLIF \ -un1_amiga_bus_enable_dma_high_i_m2_0__un1_n.BLIF N_220.BLIF N_332_i.BLIF \ -un1_amiga_bus_enable_dma_high_i_m2_0__un0_n.BLIF N_222.BLIF N_240_i.BLIF \ -as_000_int_0_un3_n.BLIF N_223.BLIF N_315_0.BLIF as_000_int_0_un1_n.BLIF \ -N_368.BLIF N_281_0.BLIF as_000_int_0_un0_n.BLIF N_257.BLIF N_270_i.BLIF \ -ds_000_enable_0_un3_n.BLIF N_258.BLIF N_282_i.BLIF ds_000_enable_0_un1_n.BLIF \ -N_312.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF ds_000_enable_0_un0_n.BLIF N_143.BLIF \ -RW_c_i.BLIF as_030_000_sync_0_un3_n.BLIF N_332.BLIF N_140_0.BLIF \ -as_030_000_sync_0_un1_n.BLIF N_332_4.BLIF N_353_i.BLIF \ -as_030_000_sync_0_un0_n.BLIF N_246.BLIF N_143_0.BLIF rw_000_int_0_un3_n.BLIF \ -N_180.BLIF sm_amiga_i_1__n.BLIF rw_000_int_0_un1_n.BLIF N_320.BLIF \ -N_320_i.BLIF rw_000_int_0_un0_n.BLIF N_244.BLIF N_357_i.BLIF \ -a0_dma_0_un3_n.BLIF N_334.BLIF N_356_i.BLIF a0_dma_0_un1_n.BLIF N_335.BLIF \ -N_156_0.BLIF a0_dma_0_un0_n.BLIF N_159.BLIF sm_amiga_i_4__n.BLIF \ -bg_000_0_un3_n.BLIF N_156.BLIF N_159_i.BLIF bg_000_0_un1_n.BLIF N_357.BLIF \ -sm_amiga_i_2__n.BLIF bg_000_0_un0_n.BLIF N_353.BLIF N_180_i.BLIF \ -size_dma_0_1__un3_n.BLIF N_140.BLIF N_334_i.BLIF size_dma_0_1__un1_n.BLIF \ -N_270.BLIF N_335_i.BLIF size_dma_0_1__un0_n.BLIF N_281.BLIF N_244_i.BLIF \ -size_dma_0_0__un3_n.BLIF N_131.BLIF N_233_i.BLIF size_dma_0_0__un1_n.BLIF \ -N_132.BLIF N_355_i.BLIF size_dma_0_0__un0_n.BLIF N_29.BLIF N_229_i.BLIF \ -bgack_030_int_0_un3_n.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF \ +AHIGH_25_.BLIF AHIGH_24_.BLIF A_0_.BLIF N_28.BLIF ipl_030_0_0__un1_n.BLIF \ +N_17.BLIF N_190_i.BLIF ipl_030_0_0__un0_n.BLIF N_23.BLIF N_188_i.BLIF \ +ipl_030_0_2__un3_n.BLIF N_6.BLIF N_189_i.BLIF ipl_030_0_2__un1_n.BLIF \ +un1_amiga_bus_enable_low_i.BLIF N_173_0.BLIF ipl_030_0_2__un0_n.BLIF \ +un21_fpu_cs_i.BLIF N_170_0.BLIF ds_000_dma_0_un3_n.BLIF UDS_000_INT_i.BLIF \ +N_255_i.BLIF ds_000_dma_0_un1_n.BLIF LDS_000_INT_i.BLIF N_256_i.BLIF \ +ds_000_dma_0_un0_n.BLIF inst_BGACK_030_INTreg.BLIF AS_030_i.BLIF N_161_i.BLIF \ +dsack1_int_0_un3_n.BLIF vcc_n_n.BLIF AS_000_INT_i.BLIF VMA_INT_i.BLIF \ +dsack1_int_0_un1_n.BLIF inst_VMA_INTreg.BLIF RESET_OUT_i.BLIF N_152_i.BLIF \ +dsack1_int_0_un0_n.BLIF gnd_n_n.BLIF sm_amiga_i_3__n.BLIF N_151_0.BLIF \ +as_000_int_0_un3_n.BLIF un1_amiga_bus_enable_low.BLIF sm_amiga_i_0__n.BLIF \ +N_251_i.BLIF as_000_int_0_un1_n.BLIF un6_as_030.BLIF cpu_est_i_1__n.BLIF \ +N_250_i.BLIF as_000_int_0_un0_n.BLIF un3_size.BLIF cpu_est_i_3__n.BLIF \ +N_147_i.BLIF as_030_000_sync_0_un3_n.BLIF un4_size.BLIF VPA_D_i.BLIF \ +N_146_i.BLIF as_030_000_sync_0_un1_n.BLIF un4_uds_000.BLIF rst_dly_i_0__n.BLIF \ +N_145_i.BLIF as_030_000_sync_0_un0_n.BLIF un4_lds_000.BLIF rst_dly_i_1__n.BLIF \ +N_397_i.BLIF a_decode_15__n.BLIF un4_as_000.BLIF cpu_est_i_0__n.BLIF \ +N_142_0.BLIF un10_ciin.BLIF clk_000_d_i_1__n.BLIF N_136_i.BLIF \ +a_decode_14__n.BLIF un21_fpu_cs.BLIF cpu_est_i_2__n.BLIF N_248_i.BLIF \ +un22_berr.BLIF DTACK_D0_i.BLIF N_227_i.BLIF a_decode_13__n.BLIF \ +un6_ds_030.BLIF clk_000_d_i_9__n.BLIF N_226_i.BLIF cpu_est_3_.BLIF \ +N_258_i_0.BLIF N_291_i.BLIF a_decode_12__n.BLIF cpu_est_0_.BLIF \ +rst_dly_i_2__n.BLIF N_224_i.BLIF cpu_est_1_.BLIF FPU_SENSE_i.BLIF N_225_i.BLIF \ +a_decode_11__n.BLIF cpu_est_2_.BLIF AS_030_000_SYNC_i.BLIF N_230_i.BLIF \ +inst_AS_000_INT.BLIF sm_amiga_i_i_7__n.BLIF N_267_i.BLIF a_decode_10__n.BLIF \ +inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF BGACK_030_INT_i.BLIF cpu_est_2_0_2__n.BLIF \ +inst_AS_030_D0.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF N_222_i.BLIF \ +a_decode_9__n.BLIF inst_AS_030_000_SYNC.BLIF N_102_i.BLIF N_223_i.BLIF \ +inst_BGACK_030_INT_D.BLIF N_103_i.BLIF cpu_est_2_0_1__n.BLIF \ +a_decode_8__n.BLIF inst_AS_000_DMA.BLIF size_dma_i_1__n.BLIF N_221_i.BLIF \ +inst_DS_000_DMA.BLIF size_dma_i_0__n.BLIF N_220_i.BLIF a_decode_7__n.BLIF \ +CYCLE_DMA_0_.BLIF RW_000_i.BLIF pos_clk_un9_clk_000_pe_0_n.BLIF \ +CYCLE_DMA_1_.BLIF a_i_1__n.BLIF N_216_i.BLIF a_decode_6__n.BLIF \ +SIZE_DMA_0_.BLIF N_124_i.BLIF N_215_i.BLIF SIZE_DMA_1_.BLIF CLK_030_i.BLIF \ +a_decode_5__n.BLIF inst_VPA_D.BLIF clk_000_d_i_0__n.BLIF N_199_i.BLIF \ +inst_UDS_000_INT.BLIF clk_000_d_i_8__n.BLIF N_198_i.BLIF a_decode_4__n.BLIF \ +inst_LDS_000_INT.BLIF AS_000_DMA_i.BLIF sm_amiga_nss_0_6__n.BLIF \ +inst_CLK_OUT_PRE_D.BLIF AS_000_i.BLIF N_21_i.BLIF a_decode_3__n.BLIF \ +CLK_000_D_8_.BLIF CLK_030_H_i.BLIF N_39_0.BLIF CLK_000_D_9_.BLIF \ +AS_030_D0_i.BLIF nEXP_SPACE_c_i.BLIF a_decode_2__n.BLIF inst_DTACK_D0.BLIF \ +cycle_dma_i_0__n.BLIF un1_as_030_i.BLIF inst_RESET_OUT.BLIF \ +a_decode_i_16__n.BLIF N_133_0.BLIF CLK_000_D_1_.BLIF a_decode_i_18__n.BLIF \ +N_214_i.BLIF CLK_000_D_0_.BLIF a_decode_i_19__n.BLIF N_213_i.BLIF \ +inst_CLK_OUT_PRE_50.BLIF ahigh_i_30__n.BLIF N_306_0.BLIF \ +inst_CLK_OUT_PRE_25.BLIF ahigh_i_31__n.BLIF N_26_i.BLIF IPL_D0_0_.BLIF \ +ahigh_i_28__n.BLIF N_34_0.BLIF IPL_D0_1_.BLIF ahigh_i_29__n.BLIF \ +BG_030_c_i.BLIF IPL_D0_2_.BLIF ahigh_i_26__n.BLIF pos_clk_un6_bg_030_i_n.BLIF \ +CLK_000_D_2_.BLIF ahigh_i_27__n.BLIF pos_clk_un9_bg_030_0_n.BLIF \ +CLK_000_D_3_.BLIF ahigh_i_24__n.BLIF N_25_i.BLIF CLK_000_D_4_.BLIF \ +ahigh_i_25__n.BLIF N_35_0.BLIF CLK_000_D_5_.BLIF N_244_i.BLIF N_24_i.BLIF \ +CLK_000_D_6_.BLIF N_245_i.BLIF N_36_0.BLIF CLK_000_D_7_.BLIF N_246_i.BLIF \ +N_22_i.BLIF CLK_000_D_10_.BLIF N_38_0.BLIF pos_clk_un6_bg_030_n.BLIF \ +N_85_i.BLIF N_19_i.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF N_86_i.BLIF \ +N_41_0.BLIF inst_DSACK1_INTreg.BLIF un6_ds_030_i.BLIF N_18_i.BLIF \ +pos_clk_ipl_n.BLIF DS_000_DMA_i.BLIF N_42_0.BLIF inst_DS_000_ENABLE.BLIF \ +un4_as_000_i.BLIF N_10_i.BLIF SM_AMIGA_6_.BLIF un6_as_030_i.BLIF N_44_0.BLIF \ +SM_AMIGA_4_.BLIF un4_lds_000_i.BLIF N_311_0.BLIF SM_AMIGA_0_.BLIF \ +un4_uds_000_i.BLIF un10_ciin_i.BLIF inst_RW_000_INT.BLIF AS_030_c.BLIF \ +N_310_0.BLIF inst_RW_000_DMA.BLIF N_207_i.BLIF RST_DLY_0_.BLIF AS_000_c.BLIF \ +N_208_i.BLIF RST_DLY_1_.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF RST_DLY_2_.BLIF \ +RW_000_c.BLIF N_209_i.BLIF inst_A0_DMA.BLIF pos_clk_size_dma_6_0_0__n.BLIF \ +inst_CLK_030_H.BLIF N_210_i.BLIF SM_AMIGA_1_.BLIF UDS_000_c.BLIF \ +pos_clk_size_dma_6_0_1__n.BLIF SM_AMIGA_5_.BLIF N_268_i.BLIF SM_AMIGA_3_.BLIF \ +LDS_000_c.BLIF pos_clk_un6_bgack_000_0_n.BLIF SM_AMIGA_2_.BLIF \ +un1_SM_AMIGA_0_sqmuxa_1_0.BLIF pos_clk_un3_as_030_d0_n.BLIF size_c_0__n.BLIF \ +RW_c_i.BLIF pos_clk_ds_000_dma_4_n.BLIF pos_clk_rw_000_int_5_0_n.BLIF N_3.BLIF \ +size_c_1__n.BLIF UDS_000_c_i.BLIF N_4.BLIF LDS_000_c_i.BLIF N_5.BLIF \ +ahigh_c_24__n.BLIF N_164_i.BLIF N_7.BLIF N_8.BLIF ahigh_c_25__n.BLIF \ +N_113_i.BLIF N_195_i.BLIF ahigh_c_26__n.BLIF N_174_0.BLIF N_169_i.BLIF \ +ahigh_c_27__n.BLIF N_260_i.BLIF N_168_i.BLIF N_27.BLIF ahigh_c_28__n.BLIF \ +pos_clk_un3_as_030_d0_i_n.BLIF N_29.BLIF \ +pos_clk_un21_bgack_030_int_i_0_0_n.BLIF CLK_OUT_PRE_25_0.BLIF \ +ahigh_c_29__n.BLIF CLK_OUT_PRE_D_i.BLIF N_143_0.BLIF ahigh_c_30__n.BLIF \ +N_396_i.BLIF N_137_i.BLIF ahigh_c_31__n.BLIF N_372_i.BLIF N_236_i.BLIF \ +N_237_i.BLIF N_280_0.BLIF N_281_0.BLIF N_229_i.BLIF N_66_0.BLIF N_371_i.BLIF \ +N_305_0.BLIF N_212_i.BLIF N_307_0.BLIF N_211_i.BLIF \ +pos_clk_ds_000_dma_4_0_n.BLIF N_205_i.BLIF N_206_i.BLIF \ +sm_amiga_nss_0_2__n.BLIF N_200_i.BLIF sm_amiga_nss_0_5__n.BLIF N_197_i.BLIF \ +N_29_i.BLIF SM_AMIGA_i_7_.BLIF N_33_0.BLIF N_27_i.BLIF N_31_0.BLIF \ +ipl_c_i_2__n.BLIF N_54_0.BLIF ipl_c_i_1__n.BLIF N_53_0.BLIF N_113.BLIF \ +a_decode_c_16__n.BLIF ipl_c_i_0__n.BLIF G_117.BLIF N_52_0.BLIF G_118.BLIF \ +a_decode_c_17__n.BLIF N_3_i.BLIF G_119.BLIF N_50_0.BLIF \ +pos_clk_un21_bgack_030_int_i_0_n.BLIF a_decode_c_18__n.BLIF N_4_i.BLIF \ +N_280.BLIF N_49_0.BLIF N_281.BLIF a_decode_c_19__n.BLIF N_5_i.BLIF N_85.BLIF \ +N_48_0.BLIF N_86.BLIF a_decode_c_20__n.BLIF N_7_i.BLIF N_305.BLIF N_47_0.BLIF \ +a_decode_c_21__n.BLIF N_8_i.BLIF N_307.BLIF N_46_0.BLIF N_310.BLIF \ +a_decode_c_22__n.BLIF sm_amiga_nss_i_0_1_0__n.BLIF N_66.BLIF \ +sm_amiga_nss_i_0_2_0__n.BLIF a_decode_c_23__n.BLIF \ +sm_amiga_nss_i_0_3_0__n.BLIF N_136.BLIF sm_amiga_nss_i_0_4_0__n.BLIF \ +N_137.BLIF a_c_0__n.BLIF sm_amiga_nss_i_0_5_0__n.BLIF N_143.BLIF \ +N_373_i_1.BLIF N_147.BLIF a_c_1__n.BLIF pos_clk_un10_sm_amiga_i_1_n.BLIF \ +N_161.BLIF N_124_1.BLIF nEXP_SPACE_c.BLIF N_124_2.BLIF N_174.BLIF N_124_3.BLIF \ +N_178.BLIF BERR_c.BLIF N_124_4.BLIF N_184.BLIF un10_ciin_1.BLIF N_190.BLIF \ +BG_030_c.BLIF un10_ciin_2.BLIF N_193.BLIF un10_ciin_3.BLIF N_195.BLIF \ +BG_000DFFreg.BLIF un10_ciin_4.BLIF N_197.BLIF un10_ciin_5.BLIF N_200.BLIF \ +un10_ciin_6.BLIF N_205.BLIF BGACK_000_c.BLIF un10_ciin_7.BLIF N_206.BLIF \ +un10_ciin_8.BLIF N_208.BLIF CLK_030_c.BLIF un10_ciin_9.BLIF N_211.BLIF \ +un10_ciin_10.BLIF N_212.BLIF un10_ciin_11.BLIF N_213.BLIF \ +pos_clk_un21_bgack_030_int_i_0_0_1_n.BLIF N_223.BLIF CLK_OSZI_c.BLIF \ +pos_clk_un21_bgack_030_int_i_0_0_2_n.BLIF N_229.BLIF N_309_i_1.BLIF N_236.BLIF \ +N_309_i_2.BLIF N_237.BLIF CLK_OUT_INTreg.BLIF N_229_1.BLIF N_243.BLIF \ +N_229_2.BLIF N_396.BLIF N_214_1_0.BLIF N_250.BLIF FPU_SENSE_c.BLIF \ +un21_fpu_cs_1.BLIF N_253.BLIF un22_berr_1_0.BLIF N_254.BLIF \ +IPL_030DFF_0_reg.BLIF N_255_1.BLIF N_257.BLIF N_255_2.BLIF N_259.BLIF \ +IPL_030DFF_1_reg.BLIF N_151_0_1.BLIF N_260.BLIF N_277_i_1.BLIF \ +pos_clk_un21_bgack_030_int_i_0_o2_2_x2.BLIF IPL_030DFF_2_reg.BLIF \ +N_277_i_2.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF N_276_i_1.BLIF \ +un22_berr_1.BLIF ipl_c_0__n.BLIF N_276_i_2.BLIF N_124.BLIF N_221_1.BLIF \ +N_164.BLIF ipl_c_1__n.BLIF N_221_2.BLIF pos_clk_rw_000_int_5_n.BLIF \ +N_220_1.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF ipl_c_2__n.BLIF N_220_2.BLIF \ +pos_clk_un6_bgack_000_n.BLIF N_194_1.BLIF N_268.BLIF N_194_2.BLIF \ +pos_clk_size_dma_6_1__n.BLIF DTACK_c.BLIF N_194_3.BLIF N_210.BLIF \ +N_278_i_1.BLIF pos_clk_size_dma_6_0__n.BLIF N_307_0_1.BLIF N_209.BLIF \ +N_308_i_1.BLIF N_207.BLIF VPA_c.BLIF N_40_i_1.BLIF N_311.BLIF N_250_1.BLIF \ +N_102.BLIF N_223_1.BLIF N_103.BLIF RST_c.BLIF pos_clk_un6_bg_030_1_n.BLIF \ +N_228.BLIF N_213_1.BLIF pos_clk_a0_dma_3_n.BLIF N_208_1.BLIF N_10.BLIF \ +RW_c.BLIF N_205_1.BLIF N_18.BLIF N_193_1.BLIF N_19.BLIF fc_c_0__n.BLIF \ +N_190_1.BLIF N_22.BLIF N_184_1.BLIF N_24.BLIF fc_c_1__n.BLIF \ +pos_clk_ipl_1_n.BLIF N_25.BLIF ipl_030_0_1__un3_n.BLIF \ +pos_clk_un9_bg_030_n.BLIF ipl_030_0_1__un1_n.BLIF N_26.BLIF \ +AMIGA_BUS_DATA_DIR_c.BLIF ipl_030_0_1__un0_n.BLIF N_214.BLIF \ +uds_000_int_0_un3_n.BLIF N_214_1.BLIF uds_000_int_0_un1_n.BLIF N_21.BLIF \ +uds_000_int_0_un0_n.BLIF pos_clk_un9_clk_000_pe_n.BLIF \ +lds_000_int_0_un3_n.BLIF cpu_est_2_1__n.BLIF N_23_i.BLIF \ +lds_000_int_0_un1_n.BLIF cpu_est_2_2__n.BLIF N_37_0.BLIF \ +lds_000_int_0_un0_n.BLIF N_185.BLIF N_17_i.BLIF ds_000_enable_0_un3_n.BLIF \ +N_142.BLIF N_43_0.BLIF ds_000_enable_0_un1_n.BLIF N_258.BLIF VPA_c_i.BLIF \ +ds_000_enable_0_un0_n.BLIF N_186.BLIF N_55_0.BLIF vma_int_0_un3_n.BLIF \ +N_188.BLIF DTACK_c_i.BLIF vma_int_0_un1_n.BLIF N_189.BLIF N_56_0.BLIF \ +vma_int_0_un0_n.BLIF N_266.BLIF N_28_i.BLIF cpu_est_0_1__un3_n.BLIF N_198.BLIF \ +N_32_0.BLIF cpu_est_0_1__un1_n.BLIF N_261.BLIF a_c_i_0__n.BLIF \ +cpu_est_0_1__un0_n.BLIF N_199.BLIF size_c_i_1__n.BLIF cpu_est_0_2__un3_n.BLIF \ +N_215.BLIF pos_clk_un10_sm_amiga_i_n.BLIF cpu_est_0_2__un1_n.BLIF N_216.BLIF \ +N_201_i.BLIF cpu_est_0_2__un0_n.BLIF N_222.BLIF N_202_i.BLIF \ +cpu_est_0_3__un3_n.BLIF N_224.BLIF sm_amiga_nss_0_4__n.BLIF \ +cpu_est_0_3__un1_n.BLIF N_146.BLIF N_204_i.BLIF cpu_est_0_3__un0_n.BLIF \ +N_225.BLIF N_203_i.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF N_173.BLIF \ +sm_amiga_nss_0_3__n.BLIF amiga_bus_enable_dma_high_0_un1_n.BLIF N_226.BLIF \ +N_45_i.BLIF amiga_bus_enable_dma_high_0_un0_n.BLIF N_170.BLIF \ +un1_SM_AMIGA_0_sqmuxa_2_i.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF \ +N_227.BLIF N_279_0.BLIF amiga_bus_enable_dma_low_0_un1_n.BLIF N_145.BLIF \ +N_235_i.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF N_151.BLIF N_234_i.BLIF \ +a0_dma_0_un3_n.BLIF N_397.BLIF N_58_0.BLIF a0_dma_0_un1_n.BLIF N_251.BLIF \ +N_243_i.BLIF a0_dma_0_un0_n.BLIF N_255.BLIF N_254_i.BLIF \ +rw_000_dma_0_un3_n.BLIF N_256.BLIF N_144_0.BLIF rw_000_dma_0_un1_n.BLIF \ +N_267.BLIF N_249_i.BLIF rw_000_dma_0_un0_n.BLIF N_221.BLIF N_247_i.BLIF \ +rw_000_int_0_un3_n.BLIF N_220.BLIF sm_amiga_nss_0_7__n.BLIF \ +rw_000_int_0_un1_n.BLIF N_194.BLIF sm_amiga_i_4__n.BLIF \ +rw_000_int_0_un0_n.BLIF N_373.BLIF N_252_i.BLIF bgack_030_int_0_un3_n.BLIF \ +N_398.BLIF N_153_0.BLIF bgack_030_int_0_un1_n.BLIF N_191.BLIF \ +sm_amiga_i_6__n.BLIF bgack_030_int_0_un0_n.BLIF N_192.BLIF \ +sm_amiga_i_2__n.BLIF bg_000_0_un3_n.BLIF N_172.BLIF N_373_i.BLIF \ +bg_000_0_un1_n.BLIF N_171.BLIF N_171_0.BLIF bg_000_0_un0_n.BLIF N_153.BLIF \ +N_253_i.BLIF size_dma_0_1__un3_n.BLIF N_252.BLIF N_172_0.BLIF \ +size_dma_0_1__un1_n.BLIF N_247.BLIF N_192_i.BLIF size_dma_0_1__un0_n.BLIF \ +N_249.BLIF N_191_i.BLIF size_dma_0_0__un3_n.BLIF N_144.BLIF N_193_i.BLIF \ +size_dma_0_0__un1_n.BLIF N_234.BLIF N_398_i.BLIF size_dma_0_0__un0_n.BLIF \ +N_235.BLIF N_261_i.BLIF un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un3_n.BLIF \ +N_279.BLIF N_194_i.BLIF un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un1_n.BLIF \ +un1_SM_AMIGA_0_sqmuxa_2.BLIF sm_amiga_nss_i_0_0__n.BLIF \ +un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un0_n.BLIF N_203.BLIF \ +as_000_dma_0_un3_n.BLIF N_204.BLIF N_186_i.BLIF as_000_dma_0_un1_n.BLIF \ +N_201.BLIF N_185_i.BLIF as_000_dma_0_un0_n.BLIF N_202.BLIF N_184_i.BLIF \ +ipl_030_0_0__un3_n.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF \ UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF \ AHIGH_24_.PIN.BLIF AHIGH_25_.PIN.BLIF AHIGH_26_.PIN.BLIF AHIGH_27_.PIN.BLIF \ AHIGH_28_.PIN.BLIF AHIGH_29_.PIN.BLIF AHIGH_30_.PIN.BLIF AHIGH_31_.PIN.BLIF \ @@ -306,137 +304,139 @@ SM_AMIGA_2_.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C \ cpu_est_2_.D cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C IPL_030DFF_0_reg.D \ IPL_030DFF_0_reg.C IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D \ IPL_030DFF_2_reg.C IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D IPL_D0_1_.C IPL_D0_2_.D \ -IPL_D0_2_.C CLK_000_D_6_.D CLK_000_D_6_.C CLK_000_D_7_.D CLK_000_D_7_.C \ -CLK_000_D_8_.D CLK_000_D_8_.C CLK_000_D_9_.D CLK_000_D_9_.C CLK_000_D_10_.D \ -CLK_000_D_10_.C CLK_000_D_11_.D CLK_000_D_11_.C CLK_000_D_12_.D \ -CLK_000_D_12_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C \ -SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C cpu_est_0_.D \ -cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C RST_DLY_1_.D RST_DLY_1_.C RST_DLY_2_.D \ -RST_DLY_2_.C CLK_000_D_0_.D CLK_000_D_0_.C CLK_000_D_1_.D CLK_000_D_1_.C \ -CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C CLK_000_D_4_.D \ -CLK_000_D_4_.C CLK_000_D_5_.D CLK_000_D_5_.C RST_DLY_0_.D RST_DLY_0_.C \ -inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_030_000_SYNC.D \ -inst_AS_030_000_SYNC.C inst_AS_000_INT.D inst_AS_000_INT.C \ -inst_DSACK1_INTreg.D inst_DSACK1_INTreg.C inst_DS_000_DMA.D inst_DS_000_DMA.C \ -inst_AS_030_D0.D inst_AS_030_D0.C inst_VPA_D.D inst_VPA_D.C inst_DTACK_D0.D \ -inst_DTACK_D0.C inst_CLK_030_H.D inst_CLK_030_H.C inst_RESET_OUT.D \ -inst_RESET_OUT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C BG_000DFFreg.D \ -BG_000DFFreg.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D \ -inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D \ -inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.D inst_UDS_000_INT.C \ -inst_A0_DMA.D inst_A0_DMA.C inst_VMA_INTreg.D inst_VMA_INTreg.C \ -inst_RW_000_DMA.D inst_RW_000_DMA.C inst_RW_000_INT.D inst_RW_000_INT.C \ +IPL_D0_2_.C CLK_000_D_4_.D CLK_000_D_4_.C CLK_000_D_5_.D CLK_000_D_5_.C \ +CLK_000_D_6_.D CLK_000_D_6_.C CLK_000_D_7_.D CLK_000_D_7_.C CLK_000_D_8_.D \ +CLK_000_D_8_.C CLK_000_D_9_.D CLK_000_D_9_.C CLK_000_D_10_.D CLK_000_D_10_.C \ +CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C SIZE_DMA_0_.D \ +SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C cpu_est_0_.D cpu_est_0_.C \ +cpu_est_1_.D cpu_est_1_.C RST_DLY_1_.D RST_DLY_1_.C RST_DLY_2_.D RST_DLY_2_.C \ +CLK_000_D_0_.D CLK_000_D_0_.C CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_2_.D \ +CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C RST_DLY_0_.D RST_DLY_0_.C \ inst_LDS_000_INT.D inst_LDS_000_INT.C inst_BGACK_030_INTreg.D \ -inst_BGACK_030_INTreg.C inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C \ -inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C \ -inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C SIZE_1_ AHIGH_31_ AS_030 AS_000 \ -RW_000 UDS_000 LDS_000 BERR RW SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ \ -AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ N_28 N_246_i bgack_030_int_0_un1_n N_17 \ -sm_amiga_nss_i_0_0__n bgack_030_int_0_un0_n N_19 dsack1_int_0_un3_n N_23 \ -N_220_i dsack1_int_0_un1_n N_24 N_219_i dsack1_int_0_un0_n N_25 N_218_i \ -cpu_est_0_3__un3_n un1_amiga_bus_enable_low_i cpu_est_0_3__un1_n un21_fpu_cs_i \ -N_224_i cpu_est_0_3__un0_n BGACK_030_INT_i N_222_i cpu_est_0_2__un3_n vcc_n_n \ -AMIGA_BUS_ENABLE_DMA_LOW_i N_223_i cpu_est_0_2__un1_n UDS_000_INT_i N_322_i \ -cpu_est_0_2__un0_n gnd_n_n LDS_000_INT_i N_312_i cpu_est_0_1__un3_n \ -un1_amiga_bus_enable_low N_131_i N_139_0 cpu_est_0_1__un1_n un6_as_030 N_132_i \ -N_108_i cpu_est_0_1__un0_n un3_size RW_000_i N_258_i vma_int_0_un3_n un4_size \ -a_i_1__n N_257_i vma_int_0_un1_n un4_uds_000 clk_000_d_i_11__n vma_int_0_un0_n \ -un4_lds_000 sm_amiga_i_6__n N_245_i ipl_030_0_0__un3_n un4_as_000 \ -clk_000_d_i_1__n nEXP_SPACE_c_i ipl_030_0_0__un1_n un10_ciin AS_030_000_SYNC_i \ -un1_as_030_i ipl_030_0_0__un0_n un21_fpu_cs sm_amiga_i_0__n \ -pos_clk_un3_as_030_d0_0_n ds_000_dma_0_un3_n un22_berr sm_amiga_i_3__n N_107_0 \ -ds_000_dma_0_un1_n un6_ds_030 sm_amiga_i_i_7__n N_115_i ds_000_dma_0_un0_n \ -sm_amiga_i_5__n N_63_0 as_000_dma_0_un3_n rst_dly_i_0__n N_278_0 \ -as_000_dma_0_un1_n rst_dly_i_1__n N_279_0 as_000_dma_0_un0_n N_364_i_0 N_260_i \ -a_decode_15__n cpu_est_i_0__n N_67_0 rst_dly_i_2__n pos_clk_rw_000_int_5_0_n \ -a_decode_14__n AS_030_i un1_SM_AMIGA_0_sqmuxa_1_0 FPU_SENSE_i un10_ciin_i \ -a_decode_13__n N_157_i N_313_0 a_decode_i_16__n N_4_i a_decode_12__n \ -a_decode_i_18__n N_48_0 a_decode_i_19__n N_5_i a_decode_11__n N_113_i N_47_0 \ -N_114_i N_7_i a_decode_10__n AS_000_INT_i N_46_0 size_dma_i_1__n N_18_i \ -a_decode_9__n size_dma_i_0__n N_41_0 RESET_OUT_i N_22_i a_decode_8__n \ -cpu_est_i_1__n N_37_0 cpu_est_i_2__n N_26_i a_decode_7__n VPA_D_i N_33_0 \ -DTACK_D0_i BG_030_c_i a_decode_6__n cpu_est_i_3__n pos_clk_un6_bg_030_i_n \ -CLK_030_i pos_clk_un9_bg_030_0_n a_decode_5__n clk_000_d_i_0__n N_10_i \ -clk_000_d_i_10__n N_43_0 a_decode_4__n AS_000_DMA_i VPA_c_i AS_000_i N_54_0 \ -a_decode_3__n CLK_030_H_i un3_as_030_i cycle_dma_i_0__n N_370_i a_decode_2__n \ -AS_030_D0_i pos_clk_un6_bgack_000_0_n ahigh_i_30__n N_283_i ahigh_i_31__n \ -pos_clk_size_dma_6_0_0__n ahigh_i_28__n N_345_i ahigh_i_29__n \ -pos_clk_size_dma_6_0_1__n ahigh_i_26__n UDS_000_c_i ahigh_i_27__n LDS_000_c_i \ -ahigh_i_24__n N_171_i pos_clk_un6_bg_030_n ahigh_i_25__n N_21_i N_241_i N_38_0 \ -N_242_i DTACK_c_i pos_clk_ipl_n N_243_i N_55_0 N_249_i un6_ds_030_i N_248_i \ -DS_000_DMA_i pos_clk_un9_clk_000_pe_0_n un4_as_000_i N_250_i un6_as_030_i \ -N_251_i un4_lds_000_i cpu_est_2_0_1__n un4_uds_000_i N_253_i AS_030_c N_369_i \ -cpu_est_2_0_2__n AS_000_c N_254_i N_316_i RW_000_c N_256_i N_255_i N_317_i \ -UDS_000_c N_267_i pos_clk_ds_000_dma_4_n N_266_i N_3 LDS_000_c N_57_0 N_8 \ -N_151_0 size_c_0__n N_321_i N_158_i size_c_1__n VMA_INT_i N_361_i \ -ahigh_c_24__n N_362_i N_27 N_169_i ahigh_c_25__n N_186_0 N_195_0 ahigh_c_26__n \ -N_196_0 ahigh_c_27__n N_263_i N_262_i ahigh_c_28__n N_323_0 N_101_i \ -ahigh_c_29__n N_366_i N_182_i ahigh_c_30__n pos_clk_un23_bgack_030_int_i_0_0_n \ -N_310_i ahigh_c_31__n N_359_i N_144_0 CLK_OUT_PRE_D_i N_142_0 N_311_i N_319_i \ -N_93_i N_272_0 N_290_i N_273_0 N_346_i pos_clk_ds_000_dma_4_0_n N_268_i \ -N_269_i sm_amiga_nss_0_3__n N_341_i N_238_i N_239_i sm_amiga_nss_0_2__n N_263 \ -N_235_i N_236_i sm_amiga_nss_0_4__n N_234_i pos_clk_un23_bgack_030_int_i_0_n \ -sm_amiga_nss_0_5__n N_272 N_231_i N_273 N_232_i sm_amiga_nss_0_6__n N_313 \ -N_230_i a_decode_c_16__n sm_amiga_nss_0_7__n N_226_i N_108 a_decode_c_17__n \ -N_331_i N_319 N_142 a_decode_c_18__n un1_as_000_i N_144 N_27_i N_322 \ -a_decode_c_19__n N_30_0 N_169 ipl_c_i_0__n N_195 a_decode_c_20__n N_51_0 N_323 \ -N_3_i N_209 a_decode_c_21__n N_49_0 N_218 N_8_i N_224 a_decode_c_22__n N_45_0 \ -N_226 sm_amiga_nss_i_0_1_0__n N_331 a_decode_c_23__n sm_amiga_nss_i_0_2_0__n \ -N_229 sm_amiga_nss_i_0_3_0__n N_230 a_c_0__n sm_amiga_nss_i_0_4_0__n N_231 \ -sm_amiga_nss_i_0_5_0__n N_232 a_c_1__n pos_clk_un10_sm_amiga_i_1_n N_233 \ -un10_ciin_1 N_234 nEXP_SPACE_c un10_ciin_2 N_235 un10_ciin_3 N_236 BERR_c \ -un10_ciin_4 N_238 un10_ciin_5 N_239 BG_030_c un10_ciin_6 N_240 un10_ciin_7 \ -N_251 un10_ciin_8 N_262 un10_ciin_9 N_341 un10_ciin_10 N_268 BGACK_000_c \ -un10_ciin_11 N_269 pos_clk_un23_bgack_030_int_i_0_0_1_n N_282 CLK_030_c \ -pos_clk_un23_bgack_030_int_i_0_0_2_n N_346 N_60_i_1 N_290 N_60_i_2 N_310 \ -N_248_1 N_311 CLK_OSZI_c N_248_2 N_355 N_249_1 N_356 N_249_2 N_359 N_361_1 \ -N_360 N_361_2 N_365 N_157_1 N_366 FPU_SENSE_c N_157_2 N_157_3 N_157_4 N_248 \ -N_260_1 N_249 N_260_2 N_369 un21_fpu_cs_1 N_196 un22_berr_1_0 N_186 N_275_i_1 \ -N_361 ipl_c_0__n N_275_i_2 N_362 N_274_i_1 N_151 ipl_c_1__n N_274_i_2 N_321 \ -N_115_1 N_266 ipl_c_2__n N_115_2 N_267 N_332_1 N_255 N_246_1 N_256 DTACK_c \ -N_246_2 N_253 N_246_3 N_254 N_246_4 cpu_est_2_2__n N_332_4_1 cpu_est_2_1__n \ -VPA_c N_332_4_2 N_250 N_273_0_1 pos_clk_un9_clk_000_pe_n N_276_i_1 N_364 RST_c \ -N_277_i_1 N_21 N_314_i_1 N_171 N_356_1 pos_clk_size_dma_6_1__n RW_c N_282_1 \ -N_345 N_251_1 pos_clk_size_dma_6_0__n fc_c_0__n pos_clk_un6_bg_030_1_n N_283 \ -N_240_1 pos_clk_un6_bgack_000_n fc_c_1__n N_238_1 N_370 N_233_1 N_259 N_231_1 \ -N_10 AMIGA_BUS_DATA_DIR_c N_224_1 pos_clk_un9_bg_030_n N_218_1 N_4 \ -pos_clk_ipl_1_n N_114 rw_000_dma_0_un3_n N_278 rw_000_dma_0_un1_n N_5 N_25_i \ -rw_000_dma_0_un0_n N_113 N_34_0 lds_000_int_0_un3_n N_279 N_24_i \ -lds_000_int_0_un1_n N_6 N_35_0 lds_000_int_0_un0_n N_115 N_23_i \ -ipl_030_0_1__un3_n N_63 N_36_0 ipl_030_0_1__un1_n N_7 N_19_i \ -ipl_030_0_1__un0_n pos_clk_un3_as_030_d0_n N_40_0 \ -amiga_bus_enable_dma_high_0_un3_n N_67 N_17_i \ -amiga_bus_enable_dma_high_0_un1_n N_18 N_42_0 \ -amiga_bus_enable_dma_high_0_un0_n pos_clk_rw_000_int_5_n ipl_c_i_1__n \ -amiga_bus_enable_dma_low_0_un3_n un1_SM_AMIGA_0_sqmuxa_1 N_52_0 \ -amiga_bus_enable_dma_low_0_un1_n N_22 ipl_c_i_2__n \ -amiga_bus_enable_dma_low_0_un0_n pos_clk_a0_dma_3_n N_53_0 uds_000_int_0_un3_n \ -N_363 N_28_i uds_000_int_0_un1_n N_26 N_31_0 uds_000_int_0_un0_n N_157 N_29_i \ -ipl_030_0_2__un3_n N_260 N_32_0 ipl_030_0_2__un1_n un22_berr_1 a_c_i_0__n \ -ipl_030_0_2__un0_n N_219 size_c_i_1__n \ -un1_amiga_bus_enable_dma_high_i_m2_0__un3_n N_139 pos_clk_un10_sm_amiga_i_n \ -un1_amiga_bus_enable_dma_high_i_m2_0__un1_n N_220 N_332_i \ -un1_amiga_bus_enable_dma_high_i_m2_0__un0_n N_222 N_240_i as_000_int_0_un3_n \ -N_223 N_315_0 as_000_int_0_un1_n N_368 N_281_0 as_000_int_0_un0_n N_257 \ -N_270_i ds_000_enable_0_un3_n N_258 N_282_i ds_000_enable_0_un1_n N_312 \ -AMIGA_BUS_DATA_DIR_c_0 ds_000_enable_0_un0_n N_143 RW_c_i \ -as_030_000_sync_0_un3_n N_332 N_140_0 as_030_000_sync_0_un1_n N_332_4 N_353_i \ -as_030_000_sync_0_un0_n N_246 N_143_0 rw_000_int_0_un3_n N_180 sm_amiga_i_1__n \ -rw_000_int_0_un1_n N_320 N_320_i rw_000_int_0_un0_n N_244 N_357_i \ -a0_dma_0_un3_n N_334 N_356_i a0_dma_0_un1_n N_335 N_156_0 a0_dma_0_un0_n N_159 \ -sm_amiga_i_4__n bg_000_0_un3_n N_156 N_159_i bg_000_0_un1_n N_357 \ -sm_amiga_i_2__n bg_000_0_un0_n N_353 N_180_i size_dma_0_1__un3_n N_140 N_334_i \ -size_dma_0_1__un1_n N_270 N_335_i size_dma_0_1__un0_n N_281 N_244_i \ -size_dma_0_0__un3_n N_131 N_233_i size_dma_0_0__un1_n N_132 N_355_i \ -size_dma_0_0__un0_n N_29 N_229_i bgack_030_int_0_un3_n AS_030.OE AS_000.OE \ +inst_BGACK_030_INTreg.C inst_AS_000_DMA.D inst_AS_000_DMA.C \ +inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_000_INT.D \ +inst_AS_000_INT.C inst_DSACK1_INTreg.D inst_DSACK1_INTreg.C inst_DS_000_DMA.D \ +inst_DS_000_DMA.C inst_AS_030_D0.D inst_AS_030_D0.C inst_VPA_D.D inst_VPA_D.C \ +inst_DTACK_D0.D inst_DTACK_D0.C inst_CLK_030_H.D inst_CLK_030_H.C \ +inst_RESET_OUT.D inst_RESET_OUT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C \ +inst_CLK_OUT_PRE_25.D inst_CLK_OUT_PRE_25.C BG_000DFFreg.D BG_000DFFreg.C \ +inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.C \ +inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AMIGA_BUS_ENABLE_DMA_LOW.C \ +inst_UDS_000_INT.D inst_UDS_000_INT.C inst_A0_DMA.D inst_A0_DMA.C \ +inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_DMA.D inst_RW_000_DMA.C \ +inst_RW_000_INT.D inst_RW_000_INT.C inst_BGACK_030_INT_D.D \ +inst_BGACK_030_INT_D.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C \ +inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C \ +SIZE_1_ AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR RW SIZE_0_ \ +AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ \ +N_28 ipl_030_0_0__un1_n N_17 N_190_i ipl_030_0_0__un0_n N_23 N_188_i \ +ipl_030_0_2__un3_n N_6 N_189_i ipl_030_0_2__un1_n un1_amiga_bus_enable_low_i \ +N_173_0 ipl_030_0_2__un0_n un21_fpu_cs_i N_170_0 ds_000_dma_0_un3_n \ +UDS_000_INT_i N_255_i ds_000_dma_0_un1_n LDS_000_INT_i N_256_i \ +ds_000_dma_0_un0_n AS_030_i N_161_i dsack1_int_0_un3_n vcc_n_n AS_000_INT_i \ +VMA_INT_i dsack1_int_0_un1_n RESET_OUT_i N_152_i dsack1_int_0_un0_n gnd_n_n \ +sm_amiga_i_3__n N_151_0 as_000_int_0_un3_n un1_amiga_bus_enable_low \ +sm_amiga_i_0__n N_251_i as_000_int_0_un1_n un6_as_030 cpu_est_i_1__n N_250_i \ +as_000_int_0_un0_n un3_size cpu_est_i_3__n N_147_i as_030_000_sync_0_un3_n \ +un4_size VPA_D_i N_146_i as_030_000_sync_0_un1_n un4_uds_000 rst_dly_i_0__n \ +N_145_i as_030_000_sync_0_un0_n un4_lds_000 rst_dly_i_1__n N_397_i \ +a_decode_15__n un4_as_000 cpu_est_i_0__n N_142_0 un10_ciin clk_000_d_i_1__n \ +N_136_i a_decode_14__n un21_fpu_cs cpu_est_i_2__n N_248_i un22_berr DTACK_D0_i \ +N_227_i a_decode_13__n un6_ds_030 clk_000_d_i_9__n N_226_i N_258_i_0 N_291_i \ +a_decode_12__n rst_dly_i_2__n N_224_i FPU_SENSE_i N_225_i a_decode_11__n \ +AS_030_000_SYNC_i N_230_i sm_amiga_i_i_7__n N_267_i a_decode_10__n \ +BGACK_030_INT_i cpu_est_2_0_2__n AMIGA_BUS_ENABLE_DMA_LOW_i N_222_i \ +a_decode_9__n N_102_i N_223_i N_103_i cpu_est_2_0_1__n a_decode_8__n \ +size_dma_i_1__n N_221_i size_dma_i_0__n N_220_i a_decode_7__n RW_000_i \ +pos_clk_un9_clk_000_pe_0_n a_i_1__n N_216_i a_decode_6__n N_124_i N_215_i \ +CLK_030_i a_decode_5__n clk_000_d_i_0__n N_199_i clk_000_d_i_8__n N_198_i \ +a_decode_4__n AS_000_DMA_i sm_amiga_nss_0_6__n AS_000_i N_21_i a_decode_3__n \ +CLK_030_H_i N_39_0 AS_030_D0_i nEXP_SPACE_c_i a_decode_2__n cycle_dma_i_0__n \ +un1_as_030_i a_decode_i_16__n N_133_0 a_decode_i_18__n N_214_i \ +a_decode_i_19__n N_213_i ahigh_i_30__n N_306_0 ahigh_i_31__n N_26_i \ +ahigh_i_28__n N_34_0 ahigh_i_29__n BG_030_c_i ahigh_i_26__n \ +pos_clk_un6_bg_030_i_n ahigh_i_27__n pos_clk_un9_bg_030_0_n ahigh_i_24__n \ +N_25_i ahigh_i_25__n N_35_0 N_244_i N_24_i N_245_i N_36_0 N_246_i N_22_i \ +N_38_0 pos_clk_un6_bg_030_n N_85_i N_19_i N_86_i N_41_0 un6_ds_030_i N_18_i \ +pos_clk_ipl_n DS_000_DMA_i N_42_0 un4_as_000_i N_10_i un6_as_030_i N_44_0 \ +un4_lds_000_i N_311_0 un4_uds_000_i un10_ciin_i AS_030_c N_310_0 N_207_i \ +AS_000_c N_208_i AMIGA_BUS_DATA_DIR_c_0 RW_000_c N_209_i \ +pos_clk_size_dma_6_0_0__n N_210_i UDS_000_c pos_clk_size_dma_6_0_1__n N_268_i \ +LDS_000_c pos_clk_un6_bgack_000_0_n un1_SM_AMIGA_0_sqmuxa_1_0 \ +pos_clk_un3_as_030_d0_n size_c_0__n RW_c_i pos_clk_ds_000_dma_4_n \ +pos_clk_rw_000_int_5_0_n N_3 size_c_1__n UDS_000_c_i N_4 LDS_000_c_i N_5 \ +ahigh_c_24__n N_164_i N_7 N_8 ahigh_c_25__n N_113_i N_195_i ahigh_c_26__n \ +N_174_0 N_169_i ahigh_c_27__n N_260_i N_168_i N_27 ahigh_c_28__n \ +pos_clk_un3_as_030_d0_i_n N_29 pos_clk_un21_bgack_030_int_i_0_0_n \ +ahigh_c_29__n CLK_OUT_PRE_D_i N_143_0 ahigh_c_30__n N_396_i N_137_i \ +ahigh_c_31__n N_372_i N_236_i N_237_i N_280_0 N_281_0 N_229_i N_66_0 N_371_i \ +N_305_0 N_212_i N_307_0 N_211_i pos_clk_ds_000_dma_4_0_n N_205_i N_206_i \ +sm_amiga_nss_0_2__n N_200_i sm_amiga_nss_0_5__n N_197_i N_29_i N_33_0 N_27_i \ +N_31_0 ipl_c_i_2__n N_54_0 ipl_c_i_1__n N_53_0 N_113 a_decode_c_16__n \ +ipl_c_i_0__n N_52_0 a_decode_c_17__n N_3_i N_50_0 \ +pos_clk_un21_bgack_030_int_i_0_n a_decode_c_18__n N_4_i N_280 N_49_0 N_281 \ +a_decode_c_19__n N_5_i N_85 N_48_0 N_86 a_decode_c_20__n N_7_i N_305 N_47_0 \ +a_decode_c_21__n N_8_i N_307 N_46_0 N_310 a_decode_c_22__n \ +sm_amiga_nss_i_0_1_0__n N_66 sm_amiga_nss_i_0_2_0__n a_decode_c_23__n \ +sm_amiga_nss_i_0_3_0__n N_136 sm_amiga_nss_i_0_4_0__n N_137 a_c_0__n \ +sm_amiga_nss_i_0_5_0__n N_143 N_373_i_1 N_147 a_c_1__n \ +pos_clk_un10_sm_amiga_i_1_n N_161 N_124_1 nEXP_SPACE_c N_124_2 N_174 N_124_3 \ +N_178 BERR_c N_124_4 N_184 un10_ciin_1 N_190 BG_030_c un10_ciin_2 N_193 \ +un10_ciin_3 N_195 un10_ciin_4 N_197 un10_ciin_5 N_200 un10_ciin_6 N_205 \ +BGACK_000_c un10_ciin_7 N_206 un10_ciin_8 N_208 CLK_030_c un10_ciin_9 N_211 \ +un10_ciin_10 N_212 un10_ciin_11 N_213 pos_clk_un21_bgack_030_int_i_0_0_1_n \ +N_223 CLK_OSZI_c pos_clk_un21_bgack_030_int_i_0_0_2_n N_229 N_309_i_1 N_236 \ +N_309_i_2 N_237 N_229_1 N_243 N_229_2 N_396 N_214_1_0 N_250 FPU_SENSE_c \ +un21_fpu_cs_1 N_253 un22_berr_1_0 N_254 N_255_1 N_257 N_255_2 N_259 N_151_0_1 \ +N_260 N_277_i_1 N_277_i_2 N_276_i_1 un22_berr_1 ipl_c_0__n N_276_i_2 N_124 \ +N_221_1 N_164 ipl_c_1__n N_221_2 pos_clk_rw_000_int_5_n N_220_1 \ +un1_SM_AMIGA_0_sqmuxa_1 ipl_c_2__n N_220_2 pos_clk_un6_bgack_000_n N_194_1 \ +N_268 N_194_2 pos_clk_size_dma_6_1__n DTACK_c N_194_3 N_210 N_278_i_1 \ +pos_clk_size_dma_6_0__n N_307_0_1 N_209 N_308_i_1 N_207 VPA_c N_40_i_1 N_311 \ +N_250_1 N_102 N_223_1 N_103 RST_c pos_clk_un6_bg_030_1_n N_228 N_213_1 \ +pos_clk_a0_dma_3_n N_208_1 N_10 RW_c N_205_1 N_18 N_193_1 N_19 fc_c_0__n \ +N_190_1 N_22 N_184_1 N_24 fc_c_1__n pos_clk_ipl_1_n N_25 ipl_030_0_1__un3_n \ +pos_clk_un9_bg_030_n ipl_030_0_1__un1_n N_26 AMIGA_BUS_DATA_DIR_c \ +ipl_030_0_1__un0_n N_214 uds_000_int_0_un3_n N_214_1 uds_000_int_0_un1_n N_21 \ +uds_000_int_0_un0_n pos_clk_un9_clk_000_pe_n lds_000_int_0_un3_n \ +cpu_est_2_1__n N_23_i lds_000_int_0_un1_n cpu_est_2_2__n N_37_0 \ +lds_000_int_0_un0_n N_185 N_17_i ds_000_enable_0_un3_n N_142 N_43_0 \ +ds_000_enable_0_un1_n N_258 VPA_c_i ds_000_enable_0_un0_n N_186 N_55_0 \ +vma_int_0_un3_n N_188 DTACK_c_i vma_int_0_un1_n N_189 N_56_0 vma_int_0_un0_n \ +N_266 N_28_i cpu_est_0_1__un3_n N_198 N_32_0 cpu_est_0_1__un1_n N_261 \ +a_c_i_0__n cpu_est_0_1__un0_n N_199 size_c_i_1__n cpu_est_0_2__un3_n N_215 \ +pos_clk_un10_sm_amiga_i_n cpu_est_0_2__un1_n N_216 N_201_i cpu_est_0_2__un0_n \ +N_222 N_202_i cpu_est_0_3__un3_n N_224 sm_amiga_nss_0_4__n cpu_est_0_3__un1_n \ +N_146 N_204_i cpu_est_0_3__un0_n N_225 N_203_i \ +amiga_bus_enable_dma_high_0_un3_n N_173 sm_amiga_nss_0_3__n \ +amiga_bus_enable_dma_high_0_un1_n N_226 N_45_i \ +amiga_bus_enable_dma_high_0_un0_n N_170 un1_SM_AMIGA_0_sqmuxa_2_i \ +amiga_bus_enable_dma_low_0_un3_n N_227 N_279_0 \ +amiga_bus_enable_dma_low_0_un1_n N_145 N_235_i \ +amiga_bus_enable_dma_low_0_un0_n N_151 N_234_i a0_dma_0_un3_n N_397 N_58_0 \ +a0_dma_0_un1_n N_251 N_243_i a0_dma_0_un0_n N_255 N_254_i rw_000_dma_0_un3_n \ +N_256 N_144_0 rw_000_dma_0_un1_n N_267 N_249_i rw_000_dma_0_un0_n N_221 \ +N_247_i rw_000_int_0_un3_n N_220 sm_amiga_nss_0_7__n rw_000_int_0_un1_n N_194 \ +sm_amiga_i_4__n rw_000_int_0_un0_n N_373 N_252_i bgack_030_int_0_un3_n N_398 \ +N_153_0 bgack_030_int_0_un1_n N_191 sm_amiga_i_6__n bgack_030_int_0_un0_n \ +N_192 sm_amiga_i_2__n bg_000_0_un3_n N_172 N_373_i bg_000_0_un1_n N_171 \ +N_171_0 bg_000_0_un0_n N_153 N_253_i size_dma_0_1__un3_n N_252 N_172_0 \ +size_dma_0_1__un1_n N_247 N_192_i size_dma_0_1__un0_n N_249 N_191_i \ +size_dma_0_0__un3_n N_144 N_193_i size_dma_0_0__un1_n N_234 N_398_i \ +size_dma_0_0__un0_n N_235 N_261_i \ +un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un3_n N_279 N_194_i \ +un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un1_n un1_SM_AMIGA_0_sqmuxa_2 \ +sm_amiga_nss_i_0_0__n un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un0_n N_203 \ +as_000_dma_0_un3_n N_204 N_186_i as_000_dma_0_un1_n N_201 N_185_i \ +as_000_dma_0_un0_n N_202 N_184_i ipl_030_0_0__un3_n AS_030.OE AS_000.OE \ RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE \ AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE \ -AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE RESET.OE CIIN.OE G_116 \ -G_117 G_118 pos_clk_un23_bgack_030_int_i_0_o2_2_x2 \ +AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE RESET.OE CIIN.OE \ +CLK_OUT_PRE_25_0 G_117 G_118 G_119 pos_clk_un21_bgack_030_int_i_0_o2_2_x2 \ pos_clk_CYCLE_DMA_5_1_i_0_x2 .names sm_amiga_nss_i_0_0__n.BLIF SM_AMIGA_i_7_.D 0 1 -.names N_315_0.BLIF SM_AMIGA_6_.D +.names N_306_0.BLIF SM_AMIGA_6_.D 0 1 .names sm_amiga_nss_0_2__n.BLIF SM_AMIGA_5_.D 0 1 @@ -456,21 +456,21 @@ pos_clk_CYCLE_DMA_5_1_i_0_x2 .names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_.D 1- 1 -1 1 -.names N_30_0.BLIF IPL_030DFF_0_reg.D +.names N_31_0.BLIF IPL_030DFF_0_reg.D 0 1 -.names N_31_0.BLIF IPL_030DFF_1_reg.D +.names N_32_0.BLIF IPL_030DFF_1_reg.D 0 1 -.names N_32_0.BLIF IPL_030DFF_2_reg.D +.names N_33_0.BLIF IPL_030DFF_2_reg.D 0 1 -.names N_51_0.BLIF IPL_D0_0_.D +.names N_52_0.BLIF IPL_D0_0_.D 0 1 -.names N_52_0.BLIF IPL_D0_1_.D +.names N_53_0.BLIF IPL_D0_1_.D 0 1 -.names N_53_0.BLIF IPL_D0_2_.D +.names N_54_0.BLIF IPL_D0_2_.D 0 1 -.names N_60_i_1.BLIF N_60_i_2.BLIF CYCLE_DMA_0_.D +.names N_309_i_1.BLIF N_309_i_2.BLIF CYCLE_DMA_0_.D 11 1 -.names N_277_i_1.BLIF N_101_i.BLIF CYCLE_DMA_1_.D +.names N_40_i_1.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF CYCLE_DMA_1_.D 11 1 .names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D 1- 1 @@ -478,1183 +478,1166 @@ pos_clk_CYCLE_DMA_5_1_i_0_x2 .names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D 1- 1 -1 1 -.names N_257_i.BLIF N_258_i.BLIF cpu_est_0_.D +.names N_215_i.BLIF N_216_i.BLIF cpu_est_0_.D 11 1 .names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D 1- 1 -1 1 -.names N_275_i_1.BLIF N_275_i_2.BLIF RST_DLY_1_.D +.names N_277_i_1.BLIF N_277_i_2.BLIF RST_DLY_1_.D 11 1 -.names N_274_i_1.BLIF N_274_i_2.BLIF RST_DLY_2_.D +.names N_276_i_1.BLIF N_276_i_2.BLIF RST_DLY_2_.D 11 1 -.names N_314_i_1.BLIF RST_c.BLIF RST_DLY_0_.D +.names N_278_i_1.BLIF RST_c.BLIF RST_DLY_0_.D 11 1 -.names N_45_0.BLIF inst_AS_000_DMA.D +.names N_43_0.BLIF inst_LDS_000_INT.D 0 1 -.names N_46_0.BLIF inst_AS_030_000_SYNC.D +.names N_44_0.BLIF inst_BGACK_030_INTreg.D 0 1 -.names N_47_0.BLIF inst_AS_000_INT.D +.names N_46_0.BLIF inst_AS_000_DMA.D 0 1 -.names N_48_0.BLIF inst_DSACK1_INTreg.D +.names N_47_0.BLIF inst_AS_030_000_SYNC.D 0 1 -.names N_49_0.BLIF inst_DS_000_DMA.D +.names N_48_0.BLIF inst_AS_000_INT.D 0 1 -.names N_107_0.BLIF inst_AS_030_D0.D +.names N_49_0.BLIF inst_DSACK1_INTreg.D 0 1 -.names N_54_0.BLIF inst_VPA_D.D +.names N_50_0.BLIF inst_DS_000_DMA.D 0 1 -.names N_55_0.BLIF inst_DTACK_D0.D +.names N_133_0.BLIF inst_AS_030_D0.D 0 1 -.names N_276_i_1.BLIF pos_clk_un23_bgack_030_int_i_0_0_n.BLIF inst_CLK_030_H.D +.names N_55_0.BLIF inst_VPA_D.D +0 1 +.names N_56_0.BLIF inst_DTACK_D0.D +0 1 +.names N_308_i_1.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF inst_CLK_030_H.D 11 1 -.names N_57_0.BLIF inst_RESET_OUT.D +.names N_58_0.BLIF inst_RESET_OUT.D 0 1 .names N_6.BLIF RST_c.BLIF inst_DS_000_ENABLE.D 11 1 -.names N_33_0.BLIF BG_000DFFreg.D +.names N_34_0.BLIF BG_000DFFreg.D 0 1 -.names N_34_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D +.names N_35_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D 0 1 -.names N_35_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D +.names N_36_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D 0 1 -.names N_36_0.BLIF inst_UDS_000_INT.D +.names N_37_0.BLIF inst_UDS_000_INT.D 0 1 -.names N_37_0.BLIF inst_A0_DMA.D +.names N_38_0.BLIF inst_A0_DMA.D 0 1 -.names N_38_0.BLIF inst_VMA_INTreg.D +.names N_39_0.BLIF inst_VMA_INTreg.D 0 1 -.names N_40_0.BLIF inst_RW_000_DMA.D +.names N_41_0.BLIF inst_RW_000_DMA.D 0 1 -.names N_41_0.BLIF inst_RW_000_INT.D +.names N_42_0.BLIF inst_RW_000_INT.D 0 1 -.names N_42_0.BLIF inst_LDS_000_INT.D -0 1 -.names N_43_0.BLIF inst_BGACK_030_INTreg.D -0 1 -.names N_101_i.BLIF inst_BGACK_030_INT_D.D +.names N_169_i.BLIF inst_BGACK_030_INT_D.D 0 1 .names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D 0 1 .names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF N_28 1- 1 -1 1 -.names N_246.BLIF N_246_i -0 1 -.names BGACK_000_c.BLIF pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n +.names ipl_c_0__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_0__un1_n 11 1 .names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF N_17 1- 1 -1 1 -.names sm_amiga_nss_i_0_4_0__n.BLIF sm_amiga_nss_i_0_5_0__n.BLIF \ -sm_amiga_nss_i_0_0__n +.names N_190.BLIF N_190_i +0 1 +.names IPL_030DFF_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n 11 1 -.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \ -bgack_030_int_0_un0_n +.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_23 +1- 1 +-1 1 +.names N_188.BLIF N_188_i +0 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_2__un3_n +0 1 +.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_6 +1- 1 +-1 1 +.names N_189.BLIF N_189_i +0 1 +.names ipl_c_2__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_2__un1_n +11 1 +.names un1_amiga_bus_enable_low.BLIF un1_amiga_bus_enable_low_i +0 1 +.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF N_173_0 +11 1 +.names IPL_030DFF_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n +11 1 +.names un21_fpu_cs.BLIF un21_fpu_cs_i +0 1 +.names cpu_est_1_.BLIF cpu_est_i_3__n.BLIF N_170_0 +11 1 +.names N_307.BLIF ds_000_dma_0_un3_n +0 1 +.names inst_UDS_000_INT.BLIF UDS_000_INT_i +0 1 +.names N_255.BLIF N_255_i +0 1 +.names pos_clk_ds_000_dma_4_n.BLIF N_307.BLIF ds_000_dma_0_un1_n +11 1 +.names inst_LDS_000_INT.BLIF LDS_000_INT_i +0 1 +.names N_256.BLIF N_256_i +0 1 +.names inst_DS_000_DMA.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n +11 1 +.names AS_030_c.BLIF AS_030_i +0 1 +.names N_255_i.BLIF N_256_i.BLIF N_161_i +11 1 +.names N_280.BLIF dsack1_int_0_un3_n +0 1 +.names vcc_n_n + 1 +.names inst_AS_000_INT.BLIF AS_000_INT_i +0 1 +.names inst_VMA_INTreg.BLIF VMA_INT_i +0 1 +.names N_86_i.BLIF N_280.BLIF dsack1_int_0_un1_n +11 1 +.names inst_RESET_OUT.BLIF RESET_OUT_i +0 1 +.names cpu_est_i_0__n.BLIF cpu_est_i_2__n.BLIF N_152_i +11 1 +.names inst_DSACK1_INTreg.BLIF dsack1_int_0_un3_n.BLIF dsack1_int_0_un0_n +11 1 +.names gnd_n_n +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names N_151_0_1.BLIF N_251_i.BLIF N_151_0 +11 1 +.names N_281.BLIF as_000_int_0_un3_n +0 1 +.names AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF BGACK_030_INT_i.BLIF \ +un1_amiga_bus_enable_low +11 1 +.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n +0 1 +.names N_251.BLIF N_251_i +0 1 +.names N_85_i.BLIF N_281.BLIF as_000_int_0_un1_n +11 1 +.names AS_000_DMA_i.BLIF AS_000_i.BLIF un6_as_030 +11 1 +.names cpu_est_1_.BLIF cpu_est_i_1__n +0 1 +.names N_250.BLIF N_250_i +0 1 +.names inst_AS_000_INT.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n +11 1 +.names SIZE_DMA_1_.BLIF size_dma_i_0__n.BLIF un3_size +11 1 +.names cpu_est_3_.BLIF cpu_est_i_3__n +0 1 +.names RST_DLY_0_.BLIF RST_DLY_1_.BLIF N_147_i +11 1 +.names N_66.BLIF as_030_000_sync_0_un3_n +0 1 +.names SIZE_DMA_0_.BLIF size_dma_i_1__n.BLIF un4_size +11 1 +.names inst_VPA_D.BLIF VPA_D_i +0 1 +.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_146_i +11 1 +.names pos_clk_un3_as_030_d0_n.BLIF N_66.BLIF as_030_000_sync_0_un1_n +11 1 +.names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un4_uds_000 +11 1 +.names RST_DLY_0_.BLIF rst_dly_i_0__n +0 1 +.names cpu_est_3_.BLIF cpu_est_i_1__n.BLIF N_145_i +11 1 +.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ +as_030_000_sync_0_un0_n +11 1 +.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un4_lds_000 +11 1 +.names RST_DLY_1_.BLIF rst_dly_i_1__n +0 1 +.names N_397.BLIF N_397_i +0 1 +.names AS_000_INT_i.BLIF AS_030_i.BLIF un4_as_000 +11 1 +.names cpu_est_0_.BLIF cpu_est_i_0__n +0 1 +.names N_397_i.BLIF RST_c.BLIF N_142_0 +11 1 +.names un10_ciin_10.BLIF un10_ciin_11.BLIF un10_ciin +11 1 +.names CLK_000_D_1_.BLIF clk_000_d_i_1__n +0 1 +.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_136_i +11 1 +.names un21_fpu_cs_1.BLIF un22_berr_1.BLIF un21_fpu_cs +11 1 +.names cpu_est_2_.BLIF cpu_est_i_2__n +0 1 +.names N_258_i_0.BLIF RST_c.BLIF N_248_i +11 1 +.names un22_berr_1_0.BLIF FPU_SENSE_c.BLIF un22_berr +11 1 +.names inst_DTACK_D0.BLIF DTACK_D0_i +0 1 +.names N_227.BLIF N_227_i +0 1 +.names AS_000_i.BLIF DS_000_DMA_i.BLIF un6_ds_030 +11 1 +.names CLK_000_D_9_.BLIF clk_000_d_i_9__n +0 1 +.names N_226.BLIF N_226_i +0 1 +.names N_258.BLIF N_258_i_0 +0 1 +.names N_226_i.BLIF N_227_i.BLIF N_291_i +11 1 +.names RST_DLY_2_.BLIF rst_dly_i_2__n +0 1 +.names N_224.BLIF N_224_i +0 1 +.names FPU_SENSE_c.BLIF FPU_SENSE_i +0 1 +.names N_225.BLIF N_225_i +0 1 +.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i +0 1 +.names N_224_i.BLIF N_225_i.BLIF N_230_i +11 1 +.names SM_AMIGA_i_7_.BLIF sm_amiga_i_i_7__n +0 1 +.names N_267.BLIF N_267_i +0 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +0 1 +.names N_224_i.BLIF N_267_i.BLIF cpu_est_2_0_2__n +11 1 +.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i +0 1 +.names N_222.BLIF N_222_i +0 1 +.names N_102.BLIF N_102_i +0 1 +.names N_223.BLIF N_223_i +0 1 +.names N_103.BLIF N_103_i +0 1 +.names N_222_i.BLIF N_223_i.BLIF cpu_est_2_0_1__n +11 1 +.names SIZE_DMA_1_.BLIF size_dma_i_1__n +0 1 +.names N_221.BLIF N_221_i +0 1 +.names SIZE_DMA_0_.BLIF size_dma_i_0__n +0 1 +.names N_220.BLIF N_220_i +0 1 +.names RW_000_c.BLIF RW_000_i +0 1 +.names N_220_i.BLIF N_221_i.BLIF pos_clk_un9_clk_000_pe_0_n +11 1 +.names a_c_1__n.BLIF a_i_1__n +0 1 +.names N_216.BLIF N_216_i +0 1 +.names N_124.BLIF N_124_i +0 1 +.names N_215.BLIF N_215_i +0 1 +.names CLK_030_c.BLIF CLK_030_i +0 1 +.names CLK_000_D_0_.BLIF clk_000_d_i_0__n +0 1 +.names N_199.BLIF N_199_i +0 1 +.names CLK_000_D_8_.BLIF clk_000_d_i_8__n +0 1 +.names N_198.BLIF N_198_i +0 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_i +0 1 +.names N_198_i.BLIF N_199_i.BLIF sm_amiga_nss_0_6__n +11 1 +.names AS_000_c.BLIF AS_000_i +0 1 +.names N_21.BLIF N_21_i +0 1 +.names inst_CLK_030_H.BLIF CLK_030_H_i +0 1 +.names N_21_i.BLIF RST_c.BLIF N_39_0 +11 1 +.names inst_AS_030_D0.BLIF AS_030_D0_i +0 1 +.names nEXP_SPACE_c.BLIF nEXP_SPACE_c_i +0 1 +.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n +0 1 +.names BGACK_030_INT_i.BLIF nEXP_SPACE_c_i.BLIF un1_as_030_i +11 1 +.names a_decode_c_16__n.BLIF a_decode_i_16__n +0 1 +.names AS_030_i.BLIF RST_c.BLIF N_133_0 +11 1 +.names a_decode_c_18__n.BLIF a_decode_i_18__n +0 1 +.names N_214.BLIF N_214_i +0 1 +.names a_decode_c_19__n.BLIF a_decode_i_19__n +0 1 +.names N_213.BLIF N_213_i +0 1 +.names ahigh_c_30__n.BLIF ahigh_i_30__n +0 1 +.names N_213_i.BLIF N_214_i.BLIF N_306_0 +11 1 +.names ahigh_c_31__n.BLIF ahigh_i_31__n +0 1 +.names N_26.BLIF N_26_i +0 1 +.names ahigh_c_28__n.BLIF ahigh_i_28__n +0 1 +.names N_26_i.BLIF RST_c.BLIF N_34_0 +11 1 +.names ahigh_c_29__n.BLIF ahigh_i_29__n +0 1 +.names BG_030_c.BLIF BG_030_c_i +0 1 +.names ahigh_c_26__n.BLIF ahigh_i_26__n +0 1 +.names pos_clk_un6_bg_030_n.BLIF pos_clk_un6_bg_030_i_n +0 1 +.names ahigh_c_27__n.BLIF ahigh_i_27__n +0 1 +.names BG_030_c_i.BLIF pos_clk_un6_bg_030_i_n.BLIF pos_clk_un9_bg_030_0_n +11 1 +.names ahigh_c_24__n.BLIF ahigh_i_24__n +0 1 +.names N_25.BLIF N_25_i +0 1 +.names ahigh_c_25__n.BLIF ahigh_i_25__n +0 1 +.names N_25_i.BLIF RST_c.BLIF N_35_0 +11 1 +.names G_117.BLIF N_244_i +0 1 +.names N_24.BLIF N_24_i +0 1 +.names G_118.BLIF N_245_i +0 1 +.names N_24_i.BLIF RST_c.BLIF N_36_0 +11 1 +.names G_119.BLIF N_246_i +0 1 +.names N_22.BLIF N_22_i +0 1 +.names N_22_i.BLIF RST_c.BLIF N_38_0 +11 1 +.names pos_clk_un6_bg_030_1_n.BLIF CLK_000_D_0_.BLIF pos_clk_un6_bg_030_n +11 1 +.names N_85.BLIF N_85_i +0 1 +.names N_19.BLIF N_19_i +0 1 +.names N_86.BLIF N_86_i +0 1 +.names N_19_i.BLIF RST_c.BLIF N_41_0 +11 1 +.names un6_ds_030.BLIF un6_ds_030_i +0 1 +.names N_18.BLIF N_18_i +0 1 +.names pos_clk_ipl_1_n.BLIF N_245_i.BLIF pos_clk_ipl_n +11 1 +.names inst_DS_000_DMA.BLIF DS_000_DMA_i +0 1 +.names N_18_i.BLIF RST_c.BLIF N_42_0 +11 1 +.names un4_as_000.BLIF un4_as_000_i +0 1 +.names N_10.BLIF N_10_i +0 1 +.names un6_as_030.BLIF un6_as_030_i +0 1 +.names N_10_i.BLIF RST_c.BLIF N_44_0 +11 1 +.names un4_lds_000.BLIF un4_lds_000_i +0 1 +.names BGACK_030_INT_i.BLIF RW_000_i.BLIF N_311_0 +11 1 +.names un4_uds_000.BLIF un4_uds_000_i +0 1 +.names un10_ciin.BLIF un10_ciin_i +0 1 +.names nEXP_SPACE_c_i.BLIF un10_ciin_i.BLIF N_310_0 +11 1 +.names N_207.BLIF N_207_i +0 1 +.names N_208.BLIF N_208_i +0 1 +.names N_207_i.BLIF N_208_i.BLIF AMIGA_BUS_DATA_DIR_c_0 +11 1 +.names N_209.BLIF N_209_i +0 1 +.names N_209_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n +11 1 +.names N_210.BLIF N_210_i +0 1 +.names N_210_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n +11 1 +.names N_268.BLIF N_268_i +0 1 +.names BGACK_000_c.BLIF N_268_i.BLIF pos_clk_un6_bgack_000_0_n +11 1 +.names N_85_i.BLIF N_168_i.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 +11 1 +.names pos_clk_un3_as_030_d0_i_n.BLIF pos_clk_un3_as_030_d0_n +0 1 +.names RW_c.BLIF RW_c_i +0 1 +.names pos_clk_ds_000_dma_4_0_n.BLIF pos_clk_ds_000_dma_4_n +0 1 +.names N_168_i.BLIF RW_c_i.BLIF pos_clk_rw_000_int_5_0_n +11 1 +.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF N_3 +1- 1 +-1 1 +.names UDS_000_c.BLIF UDS_000_c_i +0 1 +.names dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF N_4 +1- 1 +-1 1 +.names LDS_000_c.BLIF LDS_000_c_i +0 1 +.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF N_5 +1- 1 +-1 1 +.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_164_i +11 1 +.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_7 +1- 1 +-1 1 +.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF N_8 +1- 1 +-1 1 +.names N_113.BLIF N_113_i +0 1 +.names N_195.BLIF N_195_i +0 1 +.names AS_000_DMA_i.BLIF CLK_030_i.BLIF N_174_0 +11 1 +.names BGACK_030_INT_i.BLIF RST_c.BLIF N_169_i +11 1 +.names N_260.BLIF N_260_i +0 1 +.names N_260_i.BLIF SM_AMIGA_i_7_.BLIF N_168_i +11 1 +.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_27 +1- 1 +-1 1 +.names AS_030_D0_i.BLIF BERR_c.BLIF pos_clk_un3_as_030_d0_i_n +11 1 +.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_29 +1- 1 +-1 1 +.names pos_clk_un21_bgack_030_int_i_0_0_1_n.BLIF \ +pos_clk_un21_bgack_030_int_i_0_0_2_n.BLIF pos_clk_un21_bgack_030_int_i_0_0_n +11 1 +.names inst_CLK_OUT_PRE_D.BLIF CLK_OUT_PRE_D_i +0 1 +.names CLK_030_c.BLIF CLK_OUT_PRE_D_i.BLIF N_143_0 +11 1 +.names N_396.BLIF N_396_i +0 1 +.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_137_i +11 1 +.names BGACK_030_INT_i.BLIF inst_RESET_OUT.BLIF N_372_i +11 1 +.names N_236.BLIF N_236_i +0 1 +.names N_237.BLIF N_237_i +0 1 +.names N_86_i.BLIF pos_clk_un3_as_030_d0_i_n.BLIF N_280_0 +11 1 +.names N_85_i.BLIF pos_clk_un3_as_030_d0_i_n.BLIF N_281_0 +11 1 +.names N_229.BLIF N_229_i +0 1 +.names N_229_i.BLIF pos_clk_un3_as_030_d0_i_n.BLIF N_66_0 +11 1 +.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF N_371_i +11 1 +.names CLK_030_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF N_305_0 +11 1 +.names N_212.BLIF N_212_i +0 1 +.names N_307_0_1.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF N_307_0 +11 1 +.names N_211.BLIF N_211_i +0 1 +.names N_211_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF \ +pos_clk_ds_000_dma_4_0_n +11 1 +.names N_205.BLIF N_205_i +0 1 +.names N_206.BLIF N_206_i +0 1 +.names N_205_i.BLIF N_206_i.BLIF sm_amiga_nss_0_2__n +11 1 +.names N_200.BLIF N_200_i +0 1 +.names N_193_i.BLIF N_200_i.BLIF sm_amiga_nss_0_5__n +11 1 +.names N_197.BLIF N_197_i +0 1 +.names N_29.BLIF N_29_i +0 1 +.names N_29_i.BLIF RST_c.BLIF N_33_0 +11 1 +.names N_27.BLIF N_27_i +0 1 +.names N_27_i.BLIF RST_c.BLIF N_31_0 +11 1 +.names ipl_c_2__n.BLIF ipl_c_i_2__n +0 1 +.names ipl_c_i_2__n.BLIF RST_c.BLIF N_54_0 +11 1 +.names ipl_c_1__n.BLIF ipl_c_i_1__n +0 1 +.names ipl_c_i_1__n.BLIF RST_c.BLIF N_53_0 +11 1 +.names CYCLE_DMA_0_.BLIF N_137_i.BLIF N_113 +11 1 +.names ipl_c_0__n.BLIF ipl_c_i_0__n +0 1 +.names ipl_c_i_0__n.BLIF RST_c.BLIF N_52_0 +11 1 +.names N_3.BLIF N_3_i +0 1 +.names N_3_i.BLIF RST_c.BLIF N_50_0 +11 1 +.names pos_clk_un21_bgack_030_int_i_0_0_n.BLIF \ +pos_clk_un21_bgack_030_int_i_0_n +0 1 +.names N_4.BLIF N_4_i +0 1 +.names N_280_0.BLIF N_280 +0 1 +.names N_4_i.BLIF RST_c.BLIF N_49_0 +11 1 +.names N_281_0.BLIF N_281 +0 1 +.names N_5.BLIF N_5_i +0 1 +.names N_137_i.BLIF SM_AMIGA_6_.BLIF N_85 +11 1 +.names N_5_i.BLIF RST_c.BLIF N_48_0 +11 1 +.names N_151.BLIF SM_AMIGA_1_.BLIF N_86 +11 1 +.names N_7.BLIF N_7_i +0 1 +.names N_305_0.BLIF N_305 +0 1 +.names N_7_i.BLIF RST_c.BLIF N_47_0 +11 1 +.names N_8.BLIF N_8_i +0 1 +.names N_307_0.BLIF N_307 +0 1 +.names N_8_i.BLIF RST_c.BLIF N_46_0 +11 1 +.names N_310_0.BLIF N_310 +0 1 +.names N_191_i.BLIF N_192_i.BLIF sm_amiga_nss_i_0_1_0__n +11 1 +.names N_66_0.BLIF N_66 +0 1 +.names N_193_i.BLIF sm_amiga_nss_0_7__n.BLIF sm_amiga_nss_i_0_2_0__n +11 1 +.names N_194_i.BLIF N_261_i.BLIF sm_amiga_nss_i_0_3_0__n +11 1 +.names N_136_i.BLIF N_136 +0 1 +.names sm_amiga_nss_i_0_1_0__n.BLIF sm_amiga_nss_i_0_2_0__n.BLIF \ +sm_amiga_nss_i_0_4_0__n +11 1 +.names N_137_i.BLIF N_137 +0 1 +.names sm_amiga_nss_i_0_3_0__n.BLIF N_398_i.BLIF sm_amiga_nss_i_0_5_0__n +11 1 +.names N_143_0.BLIF N_143 +0 1 +.names sm_amiga_i_2__n.BLIF sm_amiga_i_6__n.BLIF N_373_i_1 +11 1 +.names N_147_i.BLIF N_147 +0 1 +.names size_c_0__n.BLIF a_c_i_0__n.BLIF pos_clk_un10_sm_amiga_i_1_n +11 1 +.names N_161_i.BLIF N_161 +0 1 +.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_124_1 +11 1 +.names a_decode_c_17__n.BLIF a_decode_i_16__n.BLIF N_124_2 +11 1 +.names N_174_0.BLIF N_174 +0 1 +.names a_decode_i_18__n.BLIF a_decode_i_19__n.BLIF N_124_3 +11 1 +.names un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un1_n.BLIF \ +un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un0_n.BLIF N_178 +1- 1 +-1 1 +.names N_124_1.BLIF N_124_2.BLIF N_124_4 +11 1 +.names N_184_1.BLIF rst_dly_i_2__n.BLIF N_184 +11 1 +.names ahigh_i_24__n.BLIF ahigh_i_25__n.BLIF un10_ciin_1 +11 1 +.names N_190_1.BLIF rst_dly_i_1__n.BLIF N_190 +11 1 +.names ahigh_i_26__n.BLIF ahigh_i_27__n.BLIF un10_ciin_2 +11 1 +.names N_193_1.BLIF SM_AMIGA_3_.BLIF N_193 +11 1 +.names ahigh_i_28__n.BLIF ahigh_i_29__n.BLIF un10_ciin_3 +11 1 +.names cycle_dma_i_0__n.BLIF N_137.BLIF N_195 +11 1 +.names ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF un10_ciin_4 +11 1 +.names CLK_030_H_i.BLIF N_174.BLIF N_197 +11 1 +.names a_decode_c_23__n.BLIF AS_030_D0_i.BLIF un10_ciin_5 +11 1 +.names N_259.BLIF SM_AMIGA_2_.BLIF N_200 +11 1 +.names a_decode_c_20__n.BLIF a_decode_c_21__n.BLIF un10_ciin_6 +11 1 +.names N_205_1.BLIF SM_AMIGA_5_.BLIF N_205 +11 1 +.names un10_ciin_1.BLIF un10_ciin_2.BLIF un10_ciin_7 +11 1 +.names N_254.BLIF SM_AMIGA_6_.BLIF N_206 +11 1 +.names un10_ciin_3.BLIF un10_ciin_4.BLIF un10_ciin_8 +11 1 +.names N_208_1.BLIF un1_as_030_i.BLIF N_208 +11 1 +.names un10_ciin_5.BLIF un10_ciin_6.BLIF un10_ciin_9 +11 1 +.names inst_AS_000_DMA.BLIF RW_000_i.BLIF N_211 +11 1 +.names un10_ciin_7.BLIF un10_ciin_8.BLIF un10_ciin_10 +11 1 +.names inst_CLK_030_H.BLIF CLK_030_c.BLIF N_212 +11 1 +.names un10_ciin_9.BLIF a_decode_c_22__n.BLIF un10_ciin_11 +11 1 +.names N_213_1.BLIF SM_AMIGA_i_7_.BLIF N_213 +11 1 +.names AS_000_i.BLIF BGACK_030_INT_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_1_n +11 1 +.names N_223_1.BLIF cpu_est_i_3__n.BLIF N_223 +11 1 +.names pos_clk_un21_bgack_030_int_i_0_o2_2_x2.BLIF N_396_i.BLIF \ +pos_clk_un21_bgack_030_int_i_0_0_2_n +11 1 +.names N_229_1.BLIF N_229_2.BLIF N_229 +11 1 +.names AS_000_i.BLIF N_113_i.BLIF N_309_i_1 +11 1 +.names N_142.BLIF RST_DLY_0_.BLIF N_236 +11 1 +.names N_169_i.BLIF N_195_i.BLIF N_309_i_2 +11 1 +.names N_266.BLIF rst_dly_i_0__n.BLIF N_237 +11 1 +.names N_124_i.BLIF N_257.BLIF N_229_1 +11 1 +.names BERR_c.BLIF RST_c.BLIF N_243 +11 1 +.names sm_amiga_i_i_7__n.BLIF nEXP_SPACE_c.BLIF N_229_2 +11 1 +.names LDS_000_c.BLIF UDS_000_c.BLIF N_396 +11 1 +.names N_214_1.BLIF N_253.BLIF N_214_1_0 +11 1 +.names N_250_1.BLIF clk_000_d_i_8__n.BLIF N_250 +11 1 +.names AS_030_i.BLIF FPU_SENSE_i.BLIF un21_fpu_cs_1 +11 1 +.names N_136_i.BLIF RST_c.BLIF N_253 +11 1 +.names un22_berr_1.BLIF AS_030_i.BLIF un22_berr_1_0 +11 1 +.names N_137_i.BLIF RST_c.BLIF N_254 +11 1 +.names N_145_i.BLIF N_152_i.BLIF N_255_1 +11 1 +.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_257 +11 1 +.names VMA_INT_i.BLIF VPA_D_i.BLIF N_255_2 +11 1 +.names N_137.BLIF N_243.BLIF N_259 +11 1 +.names N_136.BLIF N_250_i.BLIF N_151_0_1 +11 1 +.names N_137_i.BLIF SM_AMIGA_0_.BLIF N_260 +11 1 +.names N_188_i.BLIF N_189_i.BLIF N_277_i_1 +11 1 +.names N_190_i.BLIF RST_c.BLIF N_277_i_2 +11 1 +.names N_184_i.BLIF N_185_i.BLIF N_276_i_1 +11 1 +.names BGACK_000_c.BLIF N_124.BLIF un22_berr_1 +11 1 +.names N_186_i.BLIF RST_c.BLIF N_276_i_2 +11 1 +.names N_124_4.BLIF N_124_3.BLIF N_124 +11 1 +.names N_136_i.BLIF N_267.BLIF N_221_1 +11 1 +.names N_164_i.BLIF N_164 +0 1 +.names VPA_D_i.BLIF cpu_est_i_3__n.BLIF N_221_2 +11 1 +.names pos_clk_rw_000_int_5_0_n.BLIF pos_clk_rw_000_int_5_n +0 1 +.names N_137_i.BLIF N_152_i.BLIF N_220_1 +11 1 +.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 +0 1 +.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_220_2 +11 1 +.names pos_clk_un6_bgack_000_0_n.BLIF pos_clk_un6_bgack_000_n +0 1 +.names N_214_1.BLIF N_253.BLIF N_194_1 +11 1 +.names AS_000_c.BLIF N_137_i.BLIF N_268 +11 1 +.names N_373_i.BLIF sm_amiga_i_0__n.BLIF N_194_2 +11 1 +.names pos_clk_size_dma_6_0_1__n.BLIF pos_clk_size_dma_6_1__n +0 1 +.names N_194_1.BLIF N_194_2.BLIF N_194_3 +11 1 +.names BGACK_030_INT_i.BLIF N_164_i.BLIF N_210 +11 1 +.names N_236_i.BLIF N_237_i.BLIF N_278_i_1 +11 1 +.names pos_clk_size_dma_6_0_0__n.BLIF pos_clk_size_dma_6_0__n +0 1 +.names N_212_i.BLIF RW_000_i.BLIF N_307_0_1 +11 1 +.names BGACK_030_INT_i.BLIF N_164.BLIF N_209 +11 1 +.names N_197_i.BLIF RST_c.BLIF N_308_i_1 +11 1 +.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF N_207 +11 1 +.names AS_000_i.BLIF N_169_i.BLIF N_40_i_1 +11 1 +.names N_311_0.BLIF N_311 +0 1 +.names N_143.BLIF CLK_000_D_9_.BLIF N_250_1 +11 1 +.names a_c_1__n.BLIF BGACK_030_INT_i.BLIF N_102 +11 1 +.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_223_1 +11 1 +.names a_i_1__n.BLIF BGACK_030_INT_i.BLIF N_103 +11 1 +.names nEXP_SPACE_c.BLIF inst_AS_030_D0.BLIF pos_clk_un6_bg_030_1_n +11 1 +.names N_257.BLIF RST_c.BLIF N_228 +11 1 +.names N_259.BLIF SM_AMIGA_6_.BLIF N_213_1 +11 1 +.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF pos_clk_a0_dma_3_n +11 1 +.names AS_000_i.BLIF RW_000_c.BLIF N_208_1 +11 1 +.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_10 +1- 1 +-1 1 +.names N_136.BLIF N_243.BLIF N_205_1 +11 1 +.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_18 +1- 1 +-1 1 +.names N_161.BLIF N_253.BLIF N_193_1 11 1 .names rw_000_dma_0_un1_n.BLIF rw_000_dma_0_un0_n.BLIF N_19 1- 1 -1 1 -.names N_278.BLIF dsack1_int_0_un3_n -0 1 -.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_23 +.names N_248_i.BLIF rst_dly_i_0__n.BLIF N_190_1 +11 1 +.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF N_22 1- 1 -1 1 -.names N_220.BLIF N_220_i -0 1 -.names N_114_i.BLIF N_278.BLIF dsack1_int_0_un1_n +.names N_147.BLIF N_248_i.BLIF N_184_1 11 1 .names amiga_bus_enable_dma_low_0_un1_n.BLIF \ amiga_bus_enable_dma_low_0_un0_n.BLIF N_24 1- 1 -1 1 -.names N_219.BLIF N_219_i -0 1 -.names inst_DSACK1_INTreg.BLIF dsack1_int_0_un3_n.BLIF dsack1_int_0_un0_n +.names N_246_i.BLIF N_244_i.BLIF pos_clk_ipl_1_n 11 1 .names amiga_bus_enable_dma_high_0_un1_n.BLIF \ amiga_bus_enable_dma_high_0_un0_n.BLIF N_25 1- 1 -1 1 -.names N_218.BLIF N_218_i -0 1 -.names N_108.BLIF cpu_est_0_3__un3_n -0 1 -.names un1_amiga_bus_enable_low.BLIF un1_amiga_bus_enable_low_i -0 1 -.names cpu_est_3_.BLIF N_108.BLIF cpu_est_0_3__un1_n -11 1 -.names un21_fpu_cs.BLIF un21_fpu_cs_i -0 1 -.names N_224.BLIF N_224_i -0 1 -.names N_316_i.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n -11 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i -0 1 -.names N_222.BLIF N_222_i -0 1 -.names N_108.BLIF cpu_est_0_2__un3_n -0 1 -.names vcc_n_n - 1 -.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i -0 1 -.names N_223.BLIF N_223_i -0 1 -.names cpu_est_2_.BLIF N_108.BLIF cpu_est_0_2__un1_n -11 1 -.names inst_UDS_000_INT.BLIF UDS_000_INT_i -0 1 -.names RST_DLY_0_.BLIF RST_DLY_1_.BLIF N_322_i -11 1 -.names cpu_est_2_2__n.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n -11 1 -.names gnd_n_n -.names inst_LDS_000_INT.BLIF LDS_000_INT_i -0 1 -.names N_312.BLIF N_312_i -0 1 -.names N_108.BLIF cpu_est_0_1__un3_n -0 1 -.names AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF BGACK_030_INT_i.BLIF \ -un1_amiga_bus_enable_low -11 1 -.names N_131.BLIF N_131_i -0 1 -.names N_312_i.BLIF RST_c.BLIF N_139_0 -11 1 -.names cpu_est_1_.BLIF N_108.BLIF cpu_est_0_1__un1_n -11 1 -.names AS_000_DMA_i.BLIF AS_000_i.BLIF un6_as_030 -11 1 -.names N_132.BLIF N_132_i -0 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_108_i -11 1 -.names cpu_est_2_1__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n -11 1 -.names SIZE_DMA_1_.BLIF size_dma_i_0__n.BLIF un3_size -11 1 -.names RW_000_c.BLIF RW_000_i -0 1 -.names N_258.BLIF N_258_i -0 1 -.names pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un3_n -0 1 -.names SIZE_DMA_0_.BLIF size_dma_i_1__n.BLIF un4_size -11 1 -.names a_c_1__n.BLIF a_i_1__n -0 1 -.names N_257.BLIF N_257_i -0 1 -.names cpu_est_i_1__n.BLIF pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un1_n -11 1 -.names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un4_uds_000 -11 1 -.names CLK_000_D_11_.BLIF clk_000_d_i_11__n -0 1 -.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n -11 1 -.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un4_lds_000 -11 1 -.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n -0 1 -.names N_364_i_0.BLIF RST_c.BLIF N_245_i -11 1 -.names pos_clk_ipl_n.BLIF ipl_030_0_0__un3_n -0 1 -.names AS_000_INT_i.BLIF AS_030_i.BLIF un4_as_000 -11 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_1__n -0 1 -.names nEXP_SPACE_c.BLIF nEXP_SPACE_c_i -0 1 -.names ipl_c_0__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_0__un1_n -11 1 -.names un10_ciin_10.BLIF un10_ciin_11.BLIF un10_ciin -11 1 -.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i -0 1 -.names BGACK_030_INT_i.BLIF nEXP_SPACE_c_i.BLIF un1_as_030_i -11 1 -.names IPL_030DFF_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n -11 1 -.names un21_fpu_cs_1.BLIF un22_berr_1.BLIF un21_fpu_cs -11 1 -.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n -0 1 -.names AS_030_D0_i.BLIF BERR_c.BLIF pos_clk_un3_as_030_d0_0_n -11 1 -.names N_273.BLIF ds_000_dma_0_un3_n -0 1 -.names un22_berr_1_0.BLIF N_157.BLIF un22_berr -11 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n -0 1 -.names AS_030_i.BLIF RST_c.BLIF N_107_0 -11 1 -.names pos_clk_ds_000_dma_4_n.BLIF N_273.BLIF ds_000_dma_0_un1_n -11 1 -.names AS_000_i.BLIF DS_000_DMA_i.BLIF un6_ds_030 -11 1 -.names SM_AMIGA_i_7_.BLIF sm_amiga_i_i_7__n -0 1 -.names N_115.BLIF N_115_i -0 1 -.names inst_DS_000_DMA.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n -11 1 -.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n -0 1 -.names N_115_i.BLIF pos_clk_un3_as_030_d0_0_n.BLIF N_63_0 -11 1 -.names N_272.BLIF as_000_dma_0_un3_n -0 1 -.names RST_DLY_0_.BLIF rst_dly_i_0__n -0 1 -.names N_114_i.BLIF pos_clk_un3_as_030_d0_0_n.BLIF N_278_0 -11 1 -.names pos_clk_un23_bgack_030_int_i_0_n.BLIF N_272.BLIF as_000_dma_0_un1_n -11 1 -.names RST_DLY_1_.BLIF rst_dly_i_1__n -0 1 -.names N_113_i.BLIF pos_clk_un3_as_030_d0_0_n.BLIF N_279_0 -11 1 -.names inst_AS_000_DMA.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n -11 1 -.names N_364.BLIF N_364_i_0 -0 1 -.names N_260.BLIF N_260_i -0 1 -.names cpu_est_0_.BLIF cpu_est_i_0__n -0 1 -.names N_260_i.BLIF pos_clk_un3_as_030_d0_0_n.BLIF N_67_0 -11 1 -.names RST_DLY_2_.BLIF rst_dly_i_2__n -0 1 -.names N_182_i.BLIF RW_c_i.BLIF pos_clk_rw_000_int_5_0_n -11 1 -.names AS_030_c.BLIF AS_030_i -0 1 -.names N_113_i.BLIF N_182_i.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 -11 1 -.names FPU_SENSE_c.BLIF FPU_SENSE_i -0 1 -.names un10_ciin.BLIF un10_ciin_i -0 1 -.names N_157.BLIF N_157_i -0 1 -.names nEXP_SPACE_c_i.BLIF un10_ciin_i.BLIF N_313_0 -11 1 -.names a_decode_c_16__n.BLIF a_decode_i_16__n -0 1 -.names N_4.BLIF N_4_i -0 1 -.names a_decode_c_18__n.BLIF a_decode_i_18__n -0 1 -.names N_4_i.BLIF RST_c.BLIF N_48_0 -11 1 -.names a_decode_c_19__n.BLIF a_decode_i_19__n -0 1 -.names N_5.BLIF N_5_i -0 1 -.names N_113.BLIF N_113_i -0 1 -.names N_5_i.BLIF RST_c.BLIF N_47_0 -11 1 -.names N_114.BLIF N_114_i -0 1 -.names N_7.BLIF N_7_i -0 1 -.names inst_AS_000_INT.BLIF AS_000_INT_i -0 1 -.names N_7_i.BLIF RST_c.BLIF N_46_0 -11 1 -.names SIZE_DMA_1_.BLIF size_dma_i_1__n -0 1 -.names N_18.BLIF N_18_i -0 1 -.names SIZE_DMA_0_.BLIF size_dma_i_0__n -0 1 -.names N_18_i.BLIF RST_c.BLIF N_41_0 -11 1 -.names inst_RESET_OUT.BLIF RESET_OUT_i -0 1 -.names N_22.BLIF N_22_i -0 1 -.names cpu_est_1_.BLIF cpu_est_i_1__n -0 1 -.names N_22_i.BLIF RST_c.BLIF N_37_0 -11 1 -.names cpu_est_2_.BLIF cpu_est_i_2__n -0 1 -.names N_26.BLIF N_26_i -0 1 -.names inst_VPA_D.BLIF VPA_D_i -0 1 -.names N_26_i.BLIF RST_c.BLIF N_33_0 -11 1 -.names inst_DTACK_D0.BLIF DTACK_D0_i -0 1 -.names BG_030_c.BLIF BG_030_c_i -0 1 -.names cpu_est_3_.BLIF cpu_est_i_3__n -0 1 -.names pos_clk_un6_bg_030_n.BLIF pos_clk_un6_bg_030_i_n -0 1 -.names CLK_030_c.BLIF CLK_030_i -0 1 -.names BG_030_c_i.BLIF pos_clk_un6_bg_030_i_n.BLIF pos_clk_un9_bg_030_0_n -11 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_0__n -0 1 -.names N_10.BLIF N_10_i -0 1 -.names CLK_000_D_10_.BLIF clk_000_d_i_10__n -0 1 -.names N_10_i.BLIF RST_c.BLIF N_43_0 -11 1 -.names inst_AS_000_DMA.BLIF AS_000_DMA_i -0 1 -.names VPA_c.BLIF VPA_c_i -0 1 -.names AS_000_c.BLIF AS_000_i -0 1 -.names RST_c.BLIF VPA_c_i.BLIF N_54_0 -11 1 -.names inst_CLK_030_H.BLIF CLK_030_H_i -0 1 -.names inst_RESET_OUT.BLIF un1_as_030_i.BLIF un3_as_030_i -11 1 -.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n -0 1 -.names N_370.BLIF N_370_i -0 1 -.names inst_AS_030_D0.BLIF AS_030_D0_i -0 1 -.names BGACK_000_c.BLIF N_370_i.BLIF pos_clk_un6_bgack_000_0_n -11 1 -.names ahigh_c_30__n.BLIF ahigh_i_30__n -0 1 -.names N_283.BLIF N_283_i -0 1 -.names ahigh_c_31__n.BLIF ahigh_i_31__n -0 1 -.names N_283_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n -11 1 -.names ahigh_c_28__n.BLIF ahigh_i_28__n -0 1 -.names N_345.BLIF N_345_i -0 1 -.names ahigh_c_29__n.BLIF ahigh_i_29__n -0 1 -.names N_345_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n -11 1 -.names ahigh_c_26__n.BLIF ahigh_i_26__n -0 1 -.names UDS_000_c.BLIF UDS_000_c_i -0 1 -.names ahigh_c_27__n.BLIF ahigh_i_27__n -0 1 -.names LDS_000_c.BLIF LDS_000_c_i -0 1 -.names ahigh_c_24__n.BLIF ahigh_i_24__n -0 1 -.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_171_i -11 1 -.names pos_clk_un6_bg_030_1_n.BLIF CLK_000_D_0_.BLIF pos_clk_un6_bg_030_n -11 1 -.names ahigh_c_25__n.BLIF ahigh_i_25__n -0 1 -.names N_21.BLIF N_21_i -0 1 -.names G_116.BLIF N_241_i -0 1 -.names N_21_i.BLIF RST_c.BLIF N_38_0 -11 1 -.names G_117.BLIF N_242_i -0 1 -.names DTACK_c.BLIF DTACK_c_i -0 1 -.names pos_clk_ipl_1_n.BLIF N_242_i.BLIF pos_clk_ipl_n -11 1 -.names G_118.BLIF N_243_i -0 1 -.names DTACK_c_i.BLIF RST_c.BLIF N_55_0 -11 1 -.names N_249.BLIF N_249_i -0 1 -.names un6_ds_030.BLIF un6_ds_030_i -0 1 -.names N_248.BLIF N_248_i -0 1 -.names inst_DS_000_DMA.BLIF DS_000_DMA_i -0 1 -.names N_248_i.BLIF N_249_i.BLIF pos_clk_un9_clk_000_pe_0_n -11 1 -.names un4_as_000.BLIF un4_as_000_i -0 1 -.names N_250.BLIF N_250_i -0 1 -.names un6_as_030.BLIF un6_as_030_i -0 1 -.names N_251.BLIF N_251_i -0 1 -.names un4_lds_000.BLIF un4_lds_000_i -0 1 -.names N_250_i.BLIF N_251_i.BLIF cpu_est_2_0_1__n -11 1 -.names un4_uds_000.BLIF un4_uds_000_i -0 1 -.names N_253.BLIF N_253_i -0 1 -.names N_369.BLIF N_369_i -0 1 -.names N_253_i.BLIF N_369_i.BLIF cpu_est_2_0_2__n -11 1 -.names N_254.BLIF N_254_i -0 1 -.names N_253_i.BLIF N_254_i.BLIF N_316_i -11 1 -.names N_256.BLIF N_256_i -0 1 -.names N_255.BLIF N_255_i -0 1 -.names N_255_i.BLIF N_256_i.BLIF N_317_i -11 1 -.names N_267.BLIF N_267_i -0 1 -.names pos_clk_ds_000_dma_4_0_n.BLIF pos_clk_ds_000_dma_4_n -0 1 -.names N_266.BLIF N_266_i -0 1 -.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF N_3 -1- 1 --1 1 -.names N_266_i.BLIF N_267_i.BLIF N_57_0 -11 1 -.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF N_8 -1- 1 --1 1 -.names cpu_est_3_.BLIF cpu_est_i_1__n.BLIF N_151_0 -11 1 -.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_321_i -11 1 -.names cpu_est_i_0__n.BLIF cpu_est_i_2__n.BLIF N_158_i -11 1 -.names inst_VMA_INTreg.BLIF VMA_INT_i -0 1 -.names N_361.BLIF N_361_i -0 1 -.names N_362.BLIF N_362_i -0 1 -.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_27 -1- 1 --1 1 -.names N_361_i.BLIF N_362_i.BLIF N_169_i -11 1 -.names cpu_est_1_.BLIF cpu_est_i_3__n.BLIF N_186_0 -11 1 -.names N_108_i.BLIF N_169.BLIF N_195_0 -11 1 -.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF N_196_0 -11 1 -.names N_263.BLIF N_263_i -0 1 -.names N_262.BLIF N_262_i -0 1 -.names AS_000_DMA_i.BLIF CLK_030_i.BLIF N_323_0 -11 1 -.names BGACK_030_INT_i.BLIF RST_c.BLIF N_101_i -11 1 -.names N_366.BLIF N_366_i -0 1 -.names N_366_i.BLIF SM_AMIGA_i_7_.BLIF N_182_i -11 1 -.names pos_clk_un23_bgack_030_int_i_0_0_1_n.BLIF \ -pos_clk_un23_bgack_030_int_i_0_0_2_n.BLIF pos_clk_un23_bgack_030_int_i_0_0_n -11 1 -.names N_310.BLIF N_310_i -0 1 -.names N_359.BLIF N_359_i -0 1 -.names N_310_i.BLIF N_359_i.BLIF N_144_0 -11 1 -.names inst_CLK_OUT_PRE_D.BLIF CLK_OUT_PRE_D_i -0 1 -.names CLK_030_c.BLIF CLK_OUT_PRE_D_i.BLIF N_142_0 -11 1 -.names N_311.BLIF N_311_i -0 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_319_i -11 1 -.names BGACK_030_INT_i.BLIF inst_RESET_OUT.BLIF N_93_i -11 1 -.names CLK_030_i.BLIF pos_clk_un23_bgack_030_int_i_0_0_n.BLIF N_272_0 -11 1 -.names N_290.BLIF N_290_i -0 1 -.names N_273_0_1.BLIF pos_clk_un23_bgack_030_int_i_0_0_n.BLIF N_273_0 -11 1 -.names N_346.BLIF N_346_i -0 1 -.names N_346_i.BLIF pos_clk_un23_bgack_030_int_i_0_0_n.BLIF \ -pos_clk_ds_000_dma_4_0_n -11 1 -.names N_268.BLIF N_268_i -0 1 -.names N_269.BLIF N_269_i -0 1 -.names N_268_i.BLIF N_269_i.BLIF sm_amiga_nss_0_3__n -11 1 -.names N_341.BLIF N_341_i -0 1 -.names N_238.BLIF N_238_i -0 1 -.names N_239.BLIF N_239_i -0 1 -.names N_238_i.BLIF N_239_i.BLIF sm_amiga_nss_0_2__n -11 1 -.names CYCLE_DMA_0_.BLIF N_319_i.BLIF N_263 -11 1 -.names N_235.BLIF N_235_i -0 1 -.names N_236.BLIF N_236_i -0 1 -.names N_235_i.BLIF N_236_i.BLIF sm_amiga_nss_0_4__n -11 1 -.names N_234.BLIF N_234_i -0 1 -.names pos_clk_un23_bgack_030_int_i_0_0_n.BLIF \ -pos_clk_un23_bgack_030_int_i_0_n -0 1 -.names N_233_i.BLIF N_234_i.BLIF sm_amiga_nss_0_5__n -11 1 -.names N_272_0.BLIF N_272 -0 1 -.names N_231.BLIF N_231_i -0 1 -.names N_273_0.BLIF N_273 -0 1 -.names N_232.BLIF N_232_i -0 1 -.names N_231_i.BLIF N_232_i.BLIF sm_amiga_nss_0_6__n -11 1 -.names N_313_0.BLIF N_313 -0 1 -.names N_230.BLIF N_230_i -0 1 -.names N_229_i.BLIF N_230_i.BLIF sm_amiga_nss_0_7__n -11 1 -.names N_226.BLIF N_226_i -0 1 -.names N_108_i.BLIF N_108 -0 1 -.names N_331.BLIF N_331_i -0 1 -.names N_319_i.BLIF N_319 -0 1 -.names N_142_0.BLIF N_142 -0 1 -.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF un1_as_000_i -11 1 -.names N_144_0.BLIF N_144 -0 1 -.names N_27.BLIF N_27_i -0 1 -.names N_322_i.BLIF N_322 -0 1 -.names N_27_i.BLIF RST_c.BLIF N_30_0 -11 1 -.names N_169_i.BLIF N_169 -0 1 -.names ipl_c_0__n.BLIF ipl_c_i_0__n -0 1 -.names N_195_0.BLIF N_195 -0 1 -.names ipl_c_i_0__n.BLIF RST_c.BLIF N_51_0 -11 1 -.names N_323_0.BLIF N_323 -0 1 -.names N_3.BLIF N_3_i -0 1 -.names un1_amiga_bus_enable_dma_high_i_m2_0__un1_n.BLIF \ -un1_amiga_bus_enable_dma_high_i_m2_0__un0_n.BLIF N_209 -1- 1 --1 1 -.names N_3_i.BLIF RST_c.BLIF N_49_0 -11 1 -.names N_218_1.BLIF rst_dly_i_2__n.BLIF N_218 -11 1 -.names N_8.BLIF N_8_i -0 1 -.names N_224_1.BLIF rst_dly_i_1__n.BLIF N_224 -11 1 -.names N_8_i.BLIF RST_c.BLIF N_45_0 -11 1 -.names N_139.BLIF RST_DLY_0_.BLIF N_226 -11 1 -.names N_334_i.BLIF N_335_i.BLIF sm_amiga_nss_i_0_1_0__n -11 1 -.names N_368.BLIF rst_dly_i_0__n.BLIF N_331 -11 1 -.names N_233_i.BLIF N_244_i.BLIF sm_amiga_nss_i_0_2_0__n -11 1 -.names N_365.BLIF SM_AMIGA_0_.BLIF N_229 -11 1 -.names N_246_i.BLIF N_229_i.BLIF sm_amiga_nss_i_0_3_0__n -11 1 -.names N_360.BLIF SM_AMIGA_1_.BLIF N_230 -11 1 -.names sm_amiga_nss_i_0_1_0__n.BLIF sm_amiga_nss_i_0_2_0__n.BLIF \ -sm_amiga_nss_i_0_4_0__n -11 1 -.names N_231_1.BLIF SM_AMIGA_1_.BLIF N_231 -11 1 -.names sm_amiga_nss_i_0_3_0__n.BLIF N_355_i.BLIF sm_amiga_nss_i_0_5_0__n -11 1 -.names N_359.BLIF SM_AMIGA_2_.BLIF N_232 -11 1 -.names size_c_0__n.BLIF a_c_i_0__n.BLIF pos_clk_un10_sm_amiga_i_1_n -11 1 -.names N_233_1.BLIF SM_AMIGA_3_.BLIF N_233 -11 1 -.names ahigh_i_24__n.BLIF ahigh_i_25__n.BLIF un10_ciin_1 -11 1 -.names N_365.BLIF SM_AMIGA_2_.BLIF N_234 -11 1 -.names ahigh_i_26__n.BLIF ahigh_i_27__n.BLIF un10_ciin_2 -11 1 -.names N_195.BLIF N_355.BLIF N_235 -11 1 -.names ahigh_i_28__n.BLIF ahigh_i_29__n.BLIF un10_ciin_3 -11 1 -.names N_359.BLIF SM_AMIGA_4_.BLIF N_236 -11 1 -.names ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF un10_ciin_4 -11 1 -.names N_238_1.BLIF SM_AMIGA_5_.BLIF N_238 -11 1 -.names a_decode_c_23__n.BLIF AS_030_D0_i.BLIF un10_ciin_5 -11 1 -.names N_359.BLIF SM_AMIGA_6_.BLIF N_239 -11 1 -.names a_decode_c_20__n.BLIF a_decode_c_21__n.BLIF un10_ciin_6 -11 1 -.names N_240_1.BLIF SM_AMIGA_i_7_.BLIF N_240 -11 1 -.names un10_ciin_1.BLIF un10_ciin_2.BLIF un10_ciin_7 -11 1 -.names N_251_1.BLIF cpu_est_i_3__n.BLIF N_251 -11 1 -.names un10_ciin_3.BLIF un10_ciin_4.BLIF un10_ciin_8 -11 1 -.names cycle_dma_i_0__n.BLIF N_319.BLIF N_262 -11 1 -.names un10_ciin_5.BLIF un10_ciin_6.BLIF un10_ciin_9 -11 1 -.names CLK_030_H_i.BLIF N_323.BLIF N_341 -11 1 -.names un10_ciin_7.BLIF un10_ciin_8.BLIF un10_ciin_10 -11 1 -.names N_365.BLIF SM_AMIGA_4_.BLIF N_268 -11 1 -.names un10_ciin_9.BLIF a_decode_c_22__n.BLIF un10_ciin_11 -11 1 -.names N_360.BLIF SM_AMIGA_5_.BLIF N_269 -11 1 -.names AS_000_i.BLIF BGACK_030_INT_i.BLIF pos_clk_un23_bgack_030_int_i_0_0_1_n -11 1 -.names N_282_1.BLIF un1_as_030_i.BLIF N_282 -11 1 -.names pos_clk_un23_bgack_030_int_i_0_o2_2_x2.BLIF N_311_i.BLIF \ -pos_clk_un23_bgack_030_int_i_0_0_2_n -11 1 -.names inst_AS_000_DMA.BLIF RW_000_i.BLIF N_346 -11 1 -.names AS_000_i.BLIF N_101_i.BLIF N_60_i_1 -11 1 -.names inst_CLK_030_H.BLIF CLK_030_c.BLIF N_290 -11 1 -.names N_262_i.BLIF N_263_i.BLIF N_60_i_2 -11 1 -.names BERR_c.BLIF RST_c.BLIF N_310 -11 1 -.names N_158_i.BLIF N_319_i.BLIF N_248_1 -11 1 -.names LDS_000_c.BLIF UDS_000_c.BLIF N_311 -11 1 -.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_248_2 -11 1 -.names N_310.BLIF SM_AMIGA_3_.BLIF N_355 -11 1 -.names N_108_i.BLIF N_369.BLIF N_249_1 -11 1 -.names N_356_1.BLIF clk_000_d_i_10__n.BLIF N_356 -11 1 -.names VPA_D_i.BLIF cpu_est_i_3__n.BLIF N_249_2 -11 1 -.names N_319_i.BLIF RST_c.BLIF N_359 -11 1 -.names N_151_0.BLIF N_158_i.BLIF N_361_1 -11 1 -.names N_108_i.BLIF RST_c.BLIF N_360 -11 1 -.names VMA_INT_i.BLIF VPA_D_i.BLIF N_361_2 -11 1 -.names N_310.BLIF N_319.BLIF N_365 -11 1 -.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_157_1 -11 1 -.names N_319_i.BLIF SM_AMIGA_0_.BLIF N_366 -11 1 -.names a_decode_c_17__n.BLIF a_decode_i_16__n.BLIF N_157_2 -11 1 -.names a_decode_i_18__n.BLIF a_decode_i_19__n.BLIF N_157_3 -11 1 -.names N_157_1.BLIF N_157_2.BLIF N_157_4 -11 1 -.names N_248_1.BLIF N_248_2.BLIF N_248 -11 1 -.names N_157_i.BLIF N_363.BLIF N_260_1 -11 1 -.names N_249_1.BLIF N_249_2.BLIF N_249 -11 1 -.names sm_amiga_i_i_7__n.BLIF nEXP_SPACE_c.BLIF N_260_2 -11 1 -.names N_321_i.BLIF cpu_est_i_2__n.BLIF N_369 -11 1 -.names FPU_SENSE_i.BLIF N_157.BLIF un21_fpu_cs_1 -11 1 -.names N_196_0.BLIF N_196 -0 1 -.names un22_berr_1.BLIF FPU_SENSE_c.BLIF un22_berr_1_0 -11 1 -.names N_186_0.BLIF N_186 -0 1 -.names N_222_i.BLIF N_223_i.BLIF N_275_i_1 -11 1 -.names N_361_1.BLIF N_361_2.BLIF N_361 -11 1 -.names N_224_i.BLIF RST_c.BLIF N_275_i_2 -11 1 -.names DTACK_D0_i.BLIF inst_VPA_D.BLIF N_362 -11 1 -.names N_218_i.BLIF N_219_i.BLIF N_274_i_1 -11 1 -.names N_151_0.BLIF N_151 -0 1 -.names N_220_i.BLIF RST_c.BLIF N_274_i_2 -11 1 -.names N_321_i.BLIF N_321 -0 1 -.names N_143.BLIF sm_amiga_i_0__n.BLIF N_115_1 -11 1 -.names inst_RESET_OUT.BLIF RST_c.BLIF N_266 -11 1 -.names sm_amiga_i_5__n.BLIF SM_AMIGA_i_7_.BLIF N_115_2 -11 1 -.names N_360.BLIF N_364.BLIF N_267 -11 1 -.names CLK_000_D_2_.BLIF N_332_4.BLIF N_332_1 -11 1 -.names N_186.BLIF cpu_est_2_.BLIF N_255 -11 1 -.names sm_amiga_i_0__n.BLIF sm_amiga_i_3__n.BLIF N_246_1 -11 1 -.names N_151.BLIF cpu_est_i_2__n.BLIF N_256 -11 1 -.names CLK_000_D_2_.BLIF N_180_i.BLIF N_246_2 -11 1 -.names N_321.BLIF cpu_est_2_.BLIF N_253 -11 1 -.names N_320_i.BLIF N_332_4.BLIF N_246_3 -11 1 -.names N_196.BLIF cpu_est_i_2__n.BLIF N_254 -11 1 -.names N_246_1.BLIF N_246_2.BLIF N_246_4 -11 1 -.names cpu_est_2_0_2__n.BLIF cpu_est_2_2__n -0 1 -.names AS_030_000_SYNC_i.BLIF clk_000_d_i_1__n.BLIF N_332_4_1 -11 1 -.names cpu_est_2_0_1__n.BLIF cpu_est_2_1__n -0 1 -.names RST_c.BLIF nEXP_SPACE_c.BLIF N_332_4_2 -11 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_250 -11 1 -.names N_290_i.BLIF RW_000_i.BLIF N_273_0_1 -11 1 -.names pos_clk_un9_clk_000_pe_0_n.BLIF pos_clk_un9_clk_000_pe_n -0 1 -.names N_341_i.BLIF RST_c.BLIF N_276_i_1 -11 1 -.names N_322_i.BLIF RST_DLY_2_.BLIF N_364 -11 1 -.names pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF AS_000_i.BLIF N_277_i_1 -11 1 -.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_21 -1- 1 --1 1 -.names N_226_i.BLIF N_331_i.BLIF N_314_i_1 -11 1 -.names N_171_i.BLIF N_171 -0 1 -.names N_142.BLIF CLK_000_D_11_.BLIF N_356_1 -11 1 -.names pos_clk_size_dma_6_0_1__n.BLIF pos_clk_size_dma_6_1__n -0 1 -.names AS_000_i.BLIF RW_000_c.BLIF N_282_1 -11 1 -.names BGACK_030_INT_i.BLIF N_171_i.BLIF N_345 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_251_1 -11 1 -.names pos_clk_size_dma_6_0_0__n.BLIF pos_clk_size_dma_6_0__n -0 1 -.names nEXP_SPACE_c.BLIF inst_AS_030_D0.BLIF pos_clk_un6_bg_030_1_n -11 1 -.names BGACK_030_INT_i.BLIF N_171.BLIF N_283 -11 1 -.names N_365.BLIF SM_AMIGA_6_.BLIF N_240_1 -11 1 -.names pos_clk_un6_bgack_000_0_n.BLIF pos_clk_un6_bgack_000_n -0 1 -.names N_108.BLIF N_310.BLIF N_238_1 -11 1 -.names AS_000_c.BLIF N_319_i.BLIF N_370 -11 1 -.names N_169.BLIF N_360.BLIF N_233_1 -11 1 -.names N_363.BLIF RST_c.BLIF N_259 -11 1 -.names N_108.BLIF N_310.BLIF N_231_1 -11 1 -.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_10 -1- 1 --1 1 -.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c -0 1 -.names N_245_i.BLIF rst_dly_i_0__n.BLIF N_224_1 -11 1 -.names pos_clk_un9_bg_030_0_n.BLIF pos_clk_un9_bg_030_n -0 1 -.names N_245_i.BLIF N_322.BLIF N_218_1 -11 1 -.names dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF N_4 -1- 1 --1 1 -.names N_243_i.BLIF N_241_i.BLIF pos_clk_ipl_1_n -11 1 -.names N_156.BLIF SM_AMIGA_1_.BLIF N_114 -11 1 -.names N_363.BLIF rw_000_dma_0_un3_n -0 1 -.names N_278_0.BLIF N_278 -0 1 -.names inst_RW_000_DMA.BLIF N_363.BLIF rw_000_dma_0_un1_n -11 1 -.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF N_5 -1- 1 --1 1 -.names N_25.BLIF N_25_i -0 1 -.names N_281.BLIF rw_000_dma_0_un3_n.BLIF rw_000_dma_0_un0_n -11 1 -.names N_319_i.BLIF SM_AMIGA_6_.BLIF N_113 -11 1 -.names N_25_i.BLIF RST_c.BLIF N_34_0 -11 1 -.names SM_AMIGA_6_.BLIF lds_000_int_0_un3_n -0 1 -.names N_279_0.BLIF N_279 -0 1 -.names N_24.BLIF N_24_i -0 1 -.names pos_clk_un10_sm_amiga_i_n.BLIF SM_AMIGA_6_.BLIF lds_000_int_0_un1_n -11 1 -.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_6 -1- 1 --1 1 -.names N_24_i.BLIF RST_c.BLIF N_35_0 -11 1 -.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n -11 1 -.names N_115_1.BLIF N_115_2.BLIF N_115 -11 1 -.names N_23.BLIF N_23_i -0 1 .names pos_clk_ipl_n.BLIF ipl_030_0_1__un3_n 0 1 -.names N_63_0.BLIF N_63 +.names pos_clk_un9_bg_030_0_n.BLIF pos_clk_un9_bg_030_n 0 1 -.names N_23_i.BLIF RST_c.BLIF N_36_0 -11 1 .names ipl_c_1__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_1__un1_n 11 1 -.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_7 -1- 1 --1 1 -.names N_19.BLIF N_19_i -0 1 -.names IPL_030DFF_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n -11 1 -.names pos_clk_un3_as_030_d0_0_n.BLIF pos_clk_un3_as_030_d0_n -0 1 -.names N_19_i.BLIF RST_c.BLIF N_40_0 -11 1 -.names N_363.BLIF amiga_bus_enable_dma_high_0_un3_n -0 1 -.names N_67_0.BLIF N_67 -0 1 -.names N_17.BLIF N_17_i -0 1 -.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF N_363.BLIF \ -amiga_bus_enable_dma_high_0_un1_n -11 1 -.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_18 -1- 1 --1 1 -.names N_17_i.BLIF RST_c.BLIF N_42_0 -11 1 -.names N_132_i.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF \ -amiga_bus_enable_dma_high_0_un0_n -11 1 -.names pos_clk_rw_000_int_5_0_n.BLIF pos_clk_rw_000_int_5_n -0 1 -.names ipl_c_1__n.BLIF ipl_c_i_1__n -0 1 -.names N_363.BLIF amiga_bus_enable_dma_low_0_un3_n -0 1 -.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 -0 1 -.names ipl_c_i_1__n.BLIF RST_c.BLIF N_52_0 -11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF N_363.BLIF \ -amiga_bus_enable_dma_low_0_un1_n -11 1 -.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF N_22 -1- 1 --1 1 -.names ipl_c_2__n.BLIF ipl_c_i_2__n -0 1 -.names N_131_i.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF \ -amiga_bus_enable_dma_low_0_un0_n -11 1 -.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF pos_clk_a0_dma_3_n -11 1 -.names ipl_c_i_2__n.BLIF RST_c.BLIF N_53_0 -11 1 -.names SM_AMIGA_6_.BLIF uds_000_int_0_un3_n -0 1 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_363 -11 1 -.names N_28.BLIF N_28_i -0 1 -.names a_c_0__n.BLIF SM_AMIGA_6_.BLIF uds_000_int_0_un1_n -11 1 .names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF N_26 1- 1 -1 1 -.names N_28_i.BLIF RST_c.BLIF N_31_0 +.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c +0 1 +.names IPL_030DFF_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n 11 1 +.names N_214_1_0.BLIF sm_amiga_i_i_7__n.BLIF N_214 +11 1 +.names SM_AMIGA_6_.BLIF uds_000_int_0_un3_n +0 1 +.names AS_030_000_SYNC_i.BLIF nEXP_SPACE_c.BLIF N_214_1 +11 1 +.names a_c_0__n.BLIF SM_AMIGA_6_.BLIF uds_000_int_0_un1_n +11 1 +.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_21 +1- 1 +-1 1 .names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n 11 1 -.names N_157_4.BLIF N_157_3.BLIF N_157 -11 1 -.names N_29.BLIF N_29_i +.names pos_clk_un9_clk_000_pe_0_n.BLIF pos_clk_un9_clk_000_pe_n 0 1 -.names pos_clk_ipl_n.BLIF ipl_030_0_2__un3_n +.names SM_AMIGA_6_.BLIF lds_000_int_0_un3_n 0 1 -.names N_260_1.BLIF N_260_2.BLIF N_260 -11 1 -.names N_29_i.BLIF RST_c.BLIF N_32_0 -11 1 -.names ipl_c_2__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_2__un1_n -11 1 -.names AS_030_i.BLIF BGACK_000_c.BLIF un22_berr_1 -11 1 -.names a_c_0__n.BLIF a_c_i_0__n +.names cpu_est_2_0_1__n.BLIF cpu_est_2_1__n 0 1 -.names IPL_030DFF_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n -11 1 -.names N_139.BLIF N_364.BLIF N_219 -11 1 -.names size_c_1__n.BLIF size_c_i_1__n +.names N_23.BLIF N_23_i 0 1 -.names inst_BGACK_030_INTreg.BLIF un1_amiga_bus_enable_dma_high_i_m2_0__un3_n +.names pos_clk_un10_sm_amiga_i_n.BLIF SM_AMIGA_6_.BLIF lds_000_int_0_un1_n +11 1 +.names cpu_est_2_0_2__n.BLIF cpu_est_2_2__n 0 1 -.names N_139_0.BLIF N_139 +.names N_23_i.BLIF RST_c.BLIF N_37_0 +11 1 +.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n +11 1 +.names N_142.BLIF N_258.BLIF N_185 +11 1 +.names N_17.BLIF N_17_i 0 1 -.names pos_clk_un10_sm_amiga_i_1_n.BLIF size_c_i_1__n.BLIF \ -pos_clk_un10_sm_amiga_i_n -11 1 -.names inst_AS_030_000_SYNC.BLIF inst_BGACK_030_INTreg.BLIF \ -un1_amiga_bus_enable_dma_high_i_m2_0__un1_n -11 1 -.names N_108.BLIF rst_dly_i_2__n.BLIF N_220 -11 1 -.names N_332.BLIF N_332_i +.names N_279.BLIF ds_000_enable_0_un3_n 0 1 -.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF \ -un1_amiga_bus_enable_dma_high_i_m2_0__un3_n.BLIF \ -un1_amiga_bus_enable_dma_high_i_m2_0__un0_n -11 1 -.names N_139.BLIF N_322_i.BLIF N_222 -11 1 -.names N_240.BLIF N_240_i +.names N_142_0.BLIF N_142 0 1 -.names N_279.BLIF as_000_int_0_un3_n +.names N_17_i.BLIF RST_c.BLIF N_43_0 +11 1 +.names un1_SM_AMIGA_0_sqmuxa_2.BLIF N_279.BLIF ds_000_enable_0_un1_n +11 1 +.names N_147_i.BLIF RST_DLY_2_.BLIF N_258 +11 1 +.names VPA_c.BLIF VPA_c_i 0 1 -.names N_368.BLIF rst_dly_i_1__n.BLIF N_223 -11 1 -.names N_240_i.BLIF N_332_i.BLIF N_315_0 -11 1 -.names N_113_i.BLIF N_279.BLIF as_000_int_0_un1_n -11 1 -.names N_108.BLIF RST_c.BLIF N_368 -11 1 -.names BGACK_030_INT_i.BLIF RW_000_i.BLIF N_281_0 -11 1 -.names inst_AS_000_INT.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n -11 1 -.names N_108.BLIF cpu_est_i_0__n.BLIF N_257 -11 1 -.names N_270.BLIF N_270_i -0 1 -.names N_63.BLIF ds_000_enable_0_un3_n -0 1 -.names N_108_i.BLIF cpu_est_0_.BLIF N_258 -11 1 -.names N_282.BLIF N_282_i -0 1 -.names N_115.BLIF N_63.BLIF ds_000_enable_0_un1_n -11 1 -.names N_108_i.BLIF N_364_i_0.BLIF N_312 -11 1 -.names N_270_i.BLIF N_282_i.BLIF AMIGA_BUS_DATA_DIR_c_0 -11 1 .names inst_DS_000_ENABLE.BLIF ds_000_enable_0_un3_n.BLIF \ ds_000_enable_0_un0_n 11 1 -.names N_143_0.BLIF N_143 +.names N_136.BLIF rst_dly_i_2__n.BLIF N_186 +11 1 +.names RST_c.BLIF VPA_c_i.BLIF N_55_0 +11 1 +.names pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un3_n 0 1 -.names RW_c.BLIF RW_c_i +.names N_142.BLIF N_147_i.BLIF N_188 +11 1 +.names DTACK_c.BLIF DTACK_c_i 0 1 -.names N_67.BLIF as_030_000_sync_0_un3_n +.names cpu_est_i_1__n.BLIF pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un1_n +11 1 +.names N_266.BLIF rst_dly_i_1__n.BLIF N_189 +11 1 +.names DTACK_c_i.BLIF RST_c.BLIF N_56_0 +11 1 +.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n +11 1 +.names N_136.BLIF RST_c.BLIF N_266 +11 1 +.names N_28.BLIF N_28_i 0 1 -.names N_332_1.BLIF sm_amiga_i_i_7__n.BLIF N_332 -11 1 -.names RW_c_i.BLIF SM_AMIGA_6_.BLIF N_140_0 -11 1 -.names pos_clk_un3_as_030_d0_n.BLIF N_67.BLIF as_030_000_sync_0_un1_n -11 1 -.names N_332_4_1.BLIF N_332_4_2.BLIF N_332_4 -11 1 -.names N_353.BLIF N_353_i +.names N_136.BLIF cpu_est_0_1__un3_n 0 1 -.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ -as_030_000_sync_0_un0_n +.names N_136.BLIF N_261.BLIF N_198 11 1 -.names N_246_4.BLIF N_246_3.BLIF N_246 +.names N_28_i.BLIF RST_c.BLIF N_32_0 11 1 -.names N_159.BLIF N_353_i.BLIF N_143_0 +.names cpu_est_1_.BLIF N_136.BLIF cpu_est_0_1__un1_n 11 1 +.names N_243.BLIF SM_AMIGA_1_.BLIF N_261 +11 1 +.names a_c_0__n.BLIF a_c_i_0__n +0 1 +.names cpu_est_2_1__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n +11 1 +.names N_254.BLIF SM_AMIGA_2_.BLIF N_199 +11 1 +.names size_c_1__n.BLIF size_c_i_1__n +0 1 +.names N_136.BLIF cpu_est_0_2__un3_n +0 1 +.names N_136.BLIF cpu_est_i_0__n.BLIF N_215 +11 1 +.names pos_clk_un10_sm_amiga_i_1_n.BLIF size_c_i_1__n.BLIF \ +pos_clk_un10_sm_amiga_i_n +11 1 +.names cpu_est_2_.BLIF N_136.BLIF cpu_est_0_2__un1_n +11 1 +.names N_136_i.BLIF cpu_est_0_.BLIF N_216 +11 1 +.names N_201.BLIF N_201_i +0 1 +.names cpu_est_2_2__n.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n +11 1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_222 +11 1 +.names N_202.BLIF N_202_i +0 1 +.names N_136.BLIF cpu_est_0_3__un3_n +0 1 +.names N_146.BLIF cpu_est_2_.BLIF N_224 +11 1 +.names N_201_i.BLIF N_202_i.BLIF sm_amiga_nss_0_4__n +11 1 +.names cpu_est_3_.BLIF N_136.BLIF cpu_est_0_3__un1_n +11 1 +.names N_146_i.BLIF N_146 +0 1 +.names N_204.BLIF N_204_i +0 1 +.names N_230_i.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n +11 1 +.names N_173.BLIF cpu_est_i_2__n.BLIF N_225 +11 1 +.names N_203.BLIF N_203_i +0 1 +.names N_257.BLIF amiga_bus_enable_dma_high_0_un3_n +0 1 +.names N_173_0.BLIF N_173 +0 1 +.names N_203_i.BLIF N_204_i.BLIF sm_amiga_nss_0_3__n +11 1 +.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF N_257.BLIF \ +amiga_bus_enable_dma_high_0_un1_n +11 1 +.names N_170.BLIF cpu_est_2_.BLIF N_226 +11 1 +.names inst_RESET_OUT.BLIF un1_as_030_i.BLIF N_45_i +11 1 +.names N_103_i.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF \ +amiga_bus_enable_dma_high_0_un0_n +11 1 +.names N_170_0.BLIF N_170 +0 1 +.names un1_SM_AMIGA_0_sqmuxa_2.BLIF un1_SM_AMIGA_0_sqmuxa_2_i +0 1 +.names N_257.BLIF amiga_bus_enable_dma_low_0_un3_n +0 1 +.names N_145.BLIF cpu_est_i_2__n.BLIF N_227 +11 1 +.names pos_clk_un3_as_030_d0_i_n.BLIF un1_SM_AMIGA_0_sqmuxa_2_i.BLIF N_279_0 +11 1 +.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF N_257.BLIF \ +amiga_bus_enable_dma_low_0_un1_n +11 1 +.names N_145_i.BLIF N_145 +0 1 +.names N_235.BLIF N_235_i +0 1 +.names N_102_i.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF \ +amiga_bus_enable_dma_low_0_un0_n +11 1 +.names N_151_0.BLIF N_151 +0 1 +.names N_234.BLIF N_234_i +0 1 +.names N_257.BLIF a0_dma_0_un3_n +0 1 +.names N_136_i.BLIF N_258_i_0.BLIF N_397 +11 1 +.names N_234_i.BLIF N_235_i.BLIF N_58_0 +11 1 +.names inst_A0_DMA.BLIF N_257.BLIF a0_dma_0_un1_n +11 1 +.names CLK_000_D_10_.BLIF clk_000_d_i_9__n.BLIF N_251 +11 1 +.names N_243.BLIF N_243_i +0 1 +.names pos_clk_a0_dma_3_n.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n +11 1 +.names N_255_1.BLIF N_255_2.BLIF N_255 +11 1 +.names N_254.BLIF N_254_i +0 1 +.names N_257.BLIF rw_000_dma_0_un3_n +0 1 +.names DTACK_D0_i.BLIF inst_VPA_D.BLIF N_256 +11 1 +.names N_243_i.BLIF N_254_i.BLIF N_144_0 +11 1 +.names inst_RW_000_DMA.BLIF N_257.BLIF rw_000_dma_0_un1_n +11 1 +.names N_146_i.BLIF cpu_est_i_2__n.BLIF N_267 +11 1 +.names N_249.BLIF N_249_i +0 1 +.names N_311.BLIF rw_000_dma_0_un3_n.BLIF rw_000_dma_0_un0_n +11 1 +.names N_221_1.BLIF N_221_2.BLIF N_221 +11 1 +.names N_247.BLIF N_247_i +0 1 .names un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un3_n 0 1 -.names N_180_i.BLIF N_180 -0 1 -.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n -0 1 +.names N_220_1.BLIF N_220_2.BLIF N_220 +11 1 +.names N_247_i.BLIF N_249_i.BLIF sm_amiga_nss_0_7__n +11 1 .names pos_clk_rw_000_int_5_n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF \ rw_000_int_0_un1_n 11 1 -.names N_320_i.BLIF N_320 -0 1 -.names sm_amiga_i_1__n.BLIF sm_amiga_i_5__n.BLIF N_320_i +.names N_194_3.BLIF sm_amiga_i_3__n.BLIF N_194 11 1 -.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n -11 1 -.names N_320.BLIF N_360.BLIF N_244 -11 1 -.names N_357.BLIF N_357_i -0 1 -.names N_363.BLIF a0_dma_0_un3_n -0 1 -.names N_144.BLIF N_180.BLIF N_334 -11 1 -.names N_356.BLIF N_356_i -0 1 -.names inst_A0_DMA.BLIF N_363.BLIF a0_dma_0_un1_n -11 1 -.names N_310.BLIF N_320.BLIF N_335 -11 1 -.names N_356_i.BLIF N_357_i.BLIF N_156_0 -11 1 -.names pos_clk_a0_dma_3_n.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n -11 1 -.names N_159_i.BLIF N_159 -0 1 .names SM_AMIGA_4_.BLIF sm_amiga_i_4__n 0 1 -.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n -0 1 -.names N_156_0.BLIF N_156 -0 1 -.names sm_amiga_i_4__n.BLIF sm_amiga_i_6__n.BLIF N_159_i +.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n 11 1 -.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n +.names N_373_i.BLIF N_373 +0 1 +.names N_252.BLIF N_252_i +0 1 +.names pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n +0 1 +.names N_243.BLIF SM_AMIGA_3_.BLIF N_398 11 1 -.names CLK_000_D_12_.BLIF clk_000_d_i_11__n.BLIF N_357 +.names N_252_i.BLIF sm_amiga_i_4__n.BLIF N_153_0 +11 1 +.names BGACK_000_c.BLIF pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n +11 1 +.names N_172.BLIF SM_AMIGA_5_.BLIF N_191 +11 1 +.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n +0 1 +.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \ +bgack_030_int_0_un0_n +11 1 +.names N_144.BLIF N_373.BLIF N_192 11 1 .names SM_AMIGA_2_.BLIF sm_amiga_i_2__n 0 1 +.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n +0 1 +.names N_172_0.BLIF N_172 +0 1 +.names N_373_i_1.BLIF sm_amiga_i_4__n.BLIF N_373_i +11 1 +.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n +11 1 +.names N_171_0.BLIF N_171 +0 1 +.names N_136_i.BLIF N_161.BLIF N_171_0 +11 1 .names BG_000DFFreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n 11 1 -.names N_140.BLIF N_319_i.BLIF N_353 -11 1 -.names N_159_i.BLIF sm_amiga_i_2__n.BLIF N_180_i -11 1 -.names N_259.BLIF size_dma_0_1__un3_n +.names N_153_0.BLIF N_153 0 1 -.names N_140_0.BLIF N_140 +.names N_253.BLIF N_253_i 0 1 -.names N_334.BLIF N_334_i +.names N_228.BLIF size_dma_0_1__un3_n 0 1 -.names SIZE_DMA_1_.BLIF N_259.BLIF size_dma_0_1__un1_n +.names RW_c.BLIF SM_AMIGA_6_.BLIF N_252 11 1 -.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF N_270 +.names N_243_i.BLIF N_253_i.BLIF N_172_0 11 1 -.names N_335.BLIF N_335_i +.names SIZE_DMA_1_.BLIF N_228.BLIF size_dma_0_1__un1_n +11 1 +.names N_253.BLIF SM_AMIGA_1_.BLIF N_247 +11 1 +.names N_192.BLIF N_192_i 0 1 .names pos_clk_size_dma_6_1__n.BLIF size_dma_0_1__un3_n.BLIF \ size_dma_0_1__un0_n 11 1 -.names N_281_0.BLIF N_281 -0 1 -.names N_244.BLIF N_244_i -0 1 -.names N_259.BLIF size_dma_0_0__un3_n -0 1 -.names a_c_1__n.BLIF BGACK_030_INT_i.BLIF N_131 +.names N_259.BLIF SM_AMIGA_0_.BLIF N_249 11 1 -.names N_233.BLIF N_233_i +.names N_191.BLIF N_191_i 0 1 -.names SIZE_DMA_0_.BLIF N_259.BLIF size_dma_0_0__un1_n +.names N_228.BLIF size_dma_0_0__un3_n +0 1 +.names N_144_0.BLIF N_144 +0 1 +.names N_193.BLIF N_193_i +0 1 +.names SIZE_DMA_0_.BLIF N_228.BLIF size_dma_0_0__un1_n 11 1 -.names a_i_1__n.BLIF BGACK_030_INT_i.BLIF N_132 +.names inst_RESET_OUT.BLIF RST_c.BLIF N_234 11 1 -.names N_355.BLIF N_355_i +.names N_398.BLIF N_398_i 0 1 .names pos_clk_size_dma_6_0__n.BLIF size_dma_0_0__un3_n.BLIF \ size_dma_0_0__un0_n 11 1 -.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_29 -1- 1 --1 1 -.names N_229.BLIF N_229_i +.names N_253.BLIF N_258.BLIF N_235 +11 1 +.names N_261.BLIF N_261_i 0 1 -.names pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n +.names inst_BGACK_030_INTreg.BLIF \ +un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un3_n +0 1 +.names N_279_0.BLIF N_279 +0 1 +.names N_194.BLIF N_194_i +0 1 +.names inst_AS_030_000_SYNC.BLIF inst_BGACK_030_INTreg.BLIF \ +un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un1_n +11 1 +.names N_137_i.BLIF N_153.BLIF un1_SM_AMIGA_0_sqmuxa_2 +11 1 +.names sm_amiga_nss_i_0_4_0__n.BLIF sm_amiga_nss_i_0_5_0__n.BLIF \ +sm_amiga_nss_i_0_0__n +11 1 +.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF \ +un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un3_n.BLIF \ +un1_amiga_bus_enable_dma_high_i_m2_i_m2_0__un0_n +11 1 +.names N_259.BLIF SM_AMIGA_4_.BLIF N_203 +11 1 +.names N_305.BLIF as_000_dma_0_un3_n +0 1 +.names N_253.BLIF SM_AMIGA_5_.BLIF N_204 +11 1 +.names N_186.BLIF N_186_i +0 1 +.names pos_clk_un21_bgack_030_int_i_0_n.BLIF N_305.BLIF as_000_dma_0_un1_n +11 1 +.names N_171.BLIF N_398.BLIF N_201 +11 1 +.names N_185.BLIF N_185_i +0 1 +.names inst_AS_000_DMA.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n +11 1 +.names N_254.BLIF SM_AMIGA_4_.BLIF N_202 +11 1 +.names N_184.BLIF N_184_i +0 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_0__un3_n 0 1 .names IPL_030DFF_2_reg.BLIF IPL_030_2_ 1 1 @@ -1683,7 +1666,7 @@ size_dma_0_0__un0_n .names vcc_n_n.BLIF AVEC 1 1 0 0 -.names N_317_i.BLIF E +.names N_291_i.BLIF E 1 1 0 0 .names inst_VMA_INTreg.BLIF VMA @@ -1701,7 +1684,7 @@ size_dma_0_0__un0_n .names un1_amiga_bus_enable_low_i.BLIF AMIGA_BUS_ENABLE_LOW 1 1 0 0 -.names N_209.BLIF AMIGA_BUS_ENABLE_HIGH +.names N_178.BLIF AMIGA_BUS_ENABLE_HIGH 1 1 0 0 .names un10_ciin.BLIF CIIN @@ -1761,6 +1744,18 @@ size_dma_0_0__un0_n .names CLK_OSZI_c.BLIF IPL_D0_2_.C 1 1 0 0 +.names CLK_000_D_3_.BLIF CLK_000_D_4_.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF CLK_000_D_4_.C +1 1 +0 0 +.names CLK_000_D_4_.BLIF CLK_000_D_5_.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF CLK_000_D_5_.C +1 1 +0 0 .names CLK_000_D_5_.BLIF CLK_000_D_6_.D 1 1 0 0 @@ -1791,18 +1786,6 @@ size_dma_0_0__un0_n .names CLK_OSZI_c.BLIF CLK_000_D_10_.C 1 1 0 0 -.names CLK_000_D_10_.BLIF CLK_000_D_11_.D -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_000_D_11_.C -1 1 -0 0 -.names CLK_000_D_11_.BLIF CLK_000_D_12_.D -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_000_D_12_.C -1 1 -0 0 .names CLK_OSZI_c.BLIF CYCLE_DMA_0_.C 1 1 0 0 @@ -1851,21 +1834,15 @@ size_dma_0_0__un0_n .names CLK_OSZI_c.BLIF CLK_000_D_3_.C 1 1 0 0 -.names CLK_000_D_3_.BLIF CLK_000_D_4_.D -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_000_D_4_.C -1 1 -0 0 -.names CLK_000_D_4_.BLIF CLK_000_D_5_.D -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_000_D_5_.C -1 1 -0 0 .names CLK_OSZI_c.BLIF RST_DLY_0_.C 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C +1 1 +0 0 .names CLK_OSZI_c.BLIF inst_AS_000_DMA.C 1 1 0 0 @@ -1899,6 +1876,12 @@ size_dma_0_0__un0_n .names CLK_OSZI_c.BLIF inst_DS_000_ENABLE.C 1 1 0 0 +.names CLK_OUT_PRE_25_0.BLIF inst_CLK_OUT_PRE_25.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_25.C +1 1 +0 0 .names CLK_OSZI_c.BLIF BG_000DFFreg.C 1 1 0 0 @@ -1923,30 +1906,24 @@ size_dma_0_0__un0_n .names CLK_OSZI_c.BLIF inst_RW_000_INT.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C -1 1 -0 0 .names CLK_OSZI_c.BLIF inst_BGACK_030_INT_D.C 1 1 0 0 -.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_D.D +.names inst_CLK_OUT_PRE_25.BLIF inst_CLK_OUT_PRE_D.D 1 1 0 0 .names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_D.C 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_50.C +1 1 +0 0 .names inst_CLK_OUT_PRE_D.BLIF CLK_OUT_INTreg.D 1 1 0 0 .names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_50.C -1 1 -0 0 .names un3_size.BLIF SIZE_1_ 1 1 0 0 @@ -2166,19 +2143,19 @@ size_dma_0_0__un0_n .names FC_1_.BLIF fc_c_1__n 1 1 0 0 -.names un3_as_030_i.BLIF AS_030.OE +.names N_45_i.BLIF AS_030.OE 1 1 0 0 -.names un1_as_000_i.BLIF AS_000.OE +.names N_371_i.BLIF AS_000.OE 1 1 0 0 -.names un1_as_000_i.BLIF RW_000.OE +.names N_371_i.BLIF RW_000.OE 1 1 0 0 -.names un1_as_000_i.BLIF UDS_000.OE +.names N_371_i.BLIF UDS_000.OE 1 1 0 0 -.names un1_as_000_i.BLIF LDS_000.OE +.names N_371_i.BLIF LDS_000.OE 1 1 0 0 .names un1_as_030_i.BLIF SIZE_0_.OE @@ -2187,40 +2164,40 @@ size_dma_0_0__un0_n .names un1_as_030_i.BLIF SIZE_1_.OE 1 1 0 0 -.names un3_as_030_i.BLIF AHIGH_24_.OE +.names N_45_i.BLIF AHIGH_24_.OE 1 1 0 0 -.names un3_as_030_i.BLIF AHIGH_25_.OE +.names N_45_i.BLIF AHIGH_25_.OE 1 1 0 0 -.names un3_as_030_i.BLIF AHIGH_26_.OE +.names N_45_i.BLIF AHIGH_26_.OE 1 1 0 0 -.names un3_as_030_i.BLIF AHIGH_27_.OE +.names N_45_i.BLIF AHIGH_27_.OE 1 1 0 0 -.names un3_as_030_i.BLIF AHIGH_28_.OE +.names N_45_i.BLIF AHIGH_28_.OE 1 1 0 0 -.names un3_as_030_i.BLIF AHIGH_29_.OE +.names N_45_i.BLIF AHIGH_29_.OE 1 1 0 0 -.names un3_as_030_i.BLIF AHIGH_30_.OE +.names N_45_i.BLIF AHIGH_30_.OE 1 1 0 0 -.names un3_as_030_i.BLIF AHIGH_31_.OE +.names N_45_i.BLIF AHIGH_31_.OE 1 1 0 0 -.names un3_as_030_i.BLIF A_0_.OE +.names N_45_i.BLIF A_0_.OE 1 1 0 0 .names un22_berr.BLIF BERR.OE 1 1 0 0 -.names N_93_i.BLIF RW.OE +.names N_372_i.BLIF RW.OE 1 1 0 0 -.names un3_as_030_i.BLIF DS_030.OE +.names N_45_i.BLIF DS_030.OE 1 1 0 0 .names nEXP_SPACE_c.BLIF DSACK1.OE @@ -2229,31 +2206,36 @@ size_dma_0_0__un0_n .names RESET_OUT_i.BLIF RESET.OE 1 1 0 0 -.names N_313.BLIF CIIN.OE +.names N_310.BLIF CIIN.OE 1 1 0 0 -.names IPL_D0_0_.BLIF ipl_c_0__n.BLIF G_116 +.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_25.BLIF CLK_OUT_PRE_25_0 01 1 10 1 11 0 00 0 -.names IPL_D0_1_.BLIF ipl_c_1__n.BLIF G_117 +.names IPL_D0_0_.BLIF ipl_c_0__n.BLIF G_117 01 1 10 1 11 0 00 0 -.names IPL_D0_2_.BLIF ipl_c_2__n.BLIF G_118 +.names IPL_D0_1_.BLIF ipl_c_1__n.BLIF G_118 +01 1 +10 1 +11 0 +00 0 +.names IPL_D0_2_.BLIF ipl_c_2__n.BLIF G_119 01 1 10 1 11 0 00 0 .names CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF \ -pos_clk_un23_bgack_030_int_i_0_o2_2_x2 +pos_clk_un21_bgack_030_int_i_0_o2_2_x2 01 1 10 1 11 0 00 0 -.names CYCLE_DMA_1_.BLIF N_263.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2 +.names CYCLE_DMA_1_.BLIF N_113.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2 01 1 10 1 11 0 diff --git a/Logic/BUS68030.edi b/Logic/BUS68030.edi index b146d36..97ab0d9 100644 --- a/Logic/BUS68030.edi +++ b/Logic/BUS68030.edi @@ -4,7 +4,7 @@ (keywordMap (keywordLevel 0)) (status (written - (timeStamp 2016 8 19 0 39 30) + (timeStamp 2016 8 24 22 17 44) (author "Synopsys, Inc.") (program "Synplify Pro" (version "I-2014.03LC , mapper maplat, Build 923R")) ) @@ -172,6 +172,10 @@ ) (instance (rename IPL_D0_2 "IPL_D0[2]") (viewRef prim (cellRef DFF (libraryRef mach))) ) + (instance (rename CLK_000_D_4 "CLK_000_D[4]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_000_D_5 "CLK_000_D[5]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) (instance (rename CLK_000_D_6 "CLK_000_D[6]") (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance (rename CLK_000_D_7 "CLK_000_D[7]") (viewRef prim (cellRef DFF (libraryRef mach))) @@ -182,10 +186,6 @@ ) (instance (rename CLK_000_D_10 "CLK_000_D[10]") (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance (rename CLK_000_D_11 "CLK_000_D[11]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_D_12 "CLK_000_D[12]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) (instance (rename CYCLE_DMA_0 "CYCLE_DMA[0]") (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance (rename CYCLE_DMA_1 "CYCLE_DMA[1]") (viewRef prim (cellRef DFF (libraryRef mach))) @@ -210,12 +210,12 @@ ) (instance (rename CLK_000_D_3 "CLK_000_D[3]") (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance (rename CLK_000_D_4 "CLK_000_D[4]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_D_5 "CLK_000_D[5]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) (instance (rename RST_DLY_0 "RST_DLY[0]") (viewRef prim (cellRef DFF (libraryRef mach))) ) + (instance LDS_000_INT (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance BGACK_030_INT (viewRef prim (cellRef DFF (libraryRef mach))) + ) (instance AS_000_DMA (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance AS_030_000_SYNC (viewRef prim (cellRef DFF (libraryRef mach))) @@ -238,6 +238,8 @@ ) (instance DS_000_ENABLE (viewRef prim (cellRef DFF (libraryRef mach))) ) + (instance CLK_OUT_PRE_25 (viewRef prim (cellRef DFF (libraryRef mach))) + ) (instance BG_000DFF (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance AMIGA_BUS_ENABLE_DMA_HIGH (viewRef prim (cellRef DFF (libraryRef mach))) @@ -254,18 +256,14 @@ ) (instance RW_000_INT (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance LDS_000_INT (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance BGACK_030_INT (viewRef prim (cellRef DFF (libraryRef mach))) - ) (instance BGACK_030_INT_D (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance CLK_OUT_PRE_D (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance CLK_OUT_INT (viewRef prim (cellRef DFF (libraryRef mach))) - ) (instance CLK_OUT_PRE_50 (viewRef prim (cellRef DFF (libraryRef mach))) ) + (instance CLK_OUT_INT (viewRef prim (cellRef DFF (libraryRef mach))) + ) (instance AS_030 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) (instance AS_000 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) (instance RW_000 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) @@ -341,435 +339,448 @@ (instance AMIGA_BUS_ENABLE_LOW (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance AMIGA_BUS_ENABLE_HIGH (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance CIIN (viewRef prim (cellRef BUFTH (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a3_5 "SM_AMIGA_srsts_0_0_a3[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a3_1_2 "SM_AMIGA_srsts_0_0_a3_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a3_2 "SM_AMIGA_srsts_0_0_a3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a3_1_1 "SM_AMIGA_srsts_0_0_a3_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a3_1 "SM_AMIGA_srsts_0_0_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_120_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_120 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_a3_1_1 "cpu_est_2_0_0_a3_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un6_bg_030_0_a2_0_a3_1 "pos_clk.un6_bg_030_0_a2_0_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un6_bg_030_0_a2_0_a3 "pos_clk.un6_bg_030_0_a2_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_i_0_a3_1_6 "SM_AMIGA_srsts_i_i_0_a3_1[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_i_0_a3_6 "SM_AMIGA_srsts_i_i_0_a3[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_0_0_a3_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_0_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_a3_1_5 "SM_AMIGA_srsts_0_0_0_a3_1[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_a3_5 "SM_AMIGA_srsts_0_0_0_a3[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a3_1_1_0 "SM_AMIGA_nss_i_0_0_0_a3_1_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a3_1_0 "SM_AMIGA_nss_i_0_0_0_a3_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance RST_DLY_e1_i_0_a3_1_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance RST_DLY_e1_i_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance RST_DLY_e2_i_0_a3_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance RST_DLY_e2_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance G_119_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance G_119 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_1_i_0_1 "pos_clk.CYCLE_DMA_5_1_i_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_1_i_0 "pos_clk.CYCLE_DMA_5_1_i_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e0_i_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e0_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_1_sqmuxa_i_0_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_1_sqmuxa_i_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_0_0_0_a3_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_0_0_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_a3_1_1_1 "cpu_est_2_0_0_a3_1_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_a3_1_1 "cpu_est_2_0_0_a3_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un6_bg_030_0_a3_1 "pos_clk.un6_bg_030_0_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un6_bg_030_0_a3 "pos_clk.un6_bg_030_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_i_a3_1_6 "SM_AMIGA_srsts_i_i_a3_1[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_i_a3_6 "SM_AMIGA_srsts_i_i_a3[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a3_1_5 "SM_AMIGA_srsts_0_0_a3_1[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_SM_AMIGA_1_i_a2_3_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_i_a3_0_1_6 "SM_AMIGA_srsts_i_i_a3_0_1[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_i_a3_0_6 "SM_AMIGA_srsts_i_i_a3_0[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_a3_2_1_0 "SM_AMIGA_nss_i_0_0_a3_2_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_a3_2_2_0 "SM_AMIGA_nss_i_0_0_a3_2_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_a3_2_3_0 "SM_AMIGA_nss_i_0_0_a3_2_3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_a3_2_4_0 "SM_AMIGA_nss_i_0_0_a3_2_4[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_a3_2_0 "SM_AMIGA_nss_i_0_0_a3_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_a3_2_5_1_0 "SM_AMIGA_nss_i_0_0_a3_2_5_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_a3_2_5_2_0 "SM_AMIGA_nss_i_0_0_a3_2_5_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_a3_2_5_0 "SM_AMIGA_nss_i_0_0_a3_2_5[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a3_2_1_0_0 "SM_AMIGA_nss_i_0_0_0_a3_2_1_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a3_2_2_0 "SM_AMIGA_nss_i_0_0_0_a3_2_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a3_2_3_0 "SM_AMIGA_nss_i_0_0_0_a3_2_3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a3_2_0 "SM_AMIGA_nss_i_0_0_0_a3_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e0_i_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e0_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance DS_000_DMA_2_sqmuxa_i_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance DS_000_DMA_2_sqmuxa_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance CLK_030_H_2_i_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance CLK_030_H_2_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un37_as_030_d0_i_i_a3_1 "pos_clk.un37_as_030_d0_i_i_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un37_as_030_d0_i_i_a3_2 "pos_clk.un37_as_030_d0_i_i_a3_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un37_as_030_d0_i_i_a3 "pos_clk.un37_as_030_d0_i_i_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un21_fpu_cs_0_a2_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un21_fpu_cs_0_a2_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un22_berr_0_a2_0_a3_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un22_berr_0_a2_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_CYCLE_DMA_5_1_i_0_1 "pos_clk.CYCLE_DMA_5_1_i_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_CYCLE_DMA_5_1_i_0 "pos_clk.CYCLE_DMA_5_1_i_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_1_sqmuxa_1_i_0_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_1_sqmuxa_1_i_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_a3_1_1_1 "cpu_est_2_0_0_a3_1_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a2_4_0 "SM_AMIGA_nss_i_0_0_0_a2_4[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_1_sqmuxa_1_i_0_o2_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_1_sqmuxa_1_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance RST_DLY_e1_i_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance RST_DLY_e1_i_0_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance RST_DLY_e1_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance RST_DLY_e2_i_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance RST_DLY_e2_i_0_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance RST_DLY_e2_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_SM_AMIGA_1_i_a2_3_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_SM_AMIGA_1_i_a2_3_a3_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_0_i_0 "pos_clk.CYCLE_DMA_5_0_i_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_0_a3_1 "pos_clk.un9_clk_000_pe_0_0_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_0_a3_2 "pos_clk.un9_clk_000_pe_0_0_a3_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_0_a3 "pos_clk.un9_clk_000_pe_0_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename pos_clk_un9_clk_000_pe_0_0_a3_0_1 "pos_clk.un9_clk_000_pe_0_0_a3_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename pos_clk_un9_clk_000_pe_0_0_a3_0_2 "pos_clk.un9_clk_000_pe_0_0_a3_0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename pos_clk_un9_clk_000_pe_0_0_a3_0 "pos_clk.un9_clk_000_pe_0_0_a3_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a2_1_2 "SM_AMIGA_srsts_0_0_a2_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a2_2_2 "SM_AMIGA_srsts_0_0_a2_2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a2_2 "SM_AMIGA_srsts_0_0_a2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_0_a3_1 "pos_clk.un9_clk_000_pe_0_0_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_0_a3_2 "pos_clk.un9_clk_000_pe_0_0_a3_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_0_a3 "pos_clk.un9_clk_000_pe_0_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un21_bgack_030_int_i_0_o2_2_o3 "pos_clk.un21_bgack_030_int_i_0_o2_2_o3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_CYCLE_DMA_5_0_i_0_1 "pos_clk.CYCLE_DMA_5_0_i_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_CYCLE_DMA_5_0_i_0_2 "pos_clk.CYCLE_DMA_5_0_i_0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_CYCLE_DMA_5_0_i_0 "pos_clk.CYCLE_DMA_5_0_i_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un37_as_030_d0_i_i_a3_1 "pos_clk.un37_as_030_d0_i_i_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un37_as_030_d0_i_i_a3_2 "pos_clk.un37_as_030_d0_i_i_a3_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un37_as_030_d0_i_i_a3 "pos_clk.un37_as_030_d0_i_i_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_i_0_a3_0_1_6 "SM_AMIGA_srsts_i_i_0_a3_0_1[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_i_0_a3_0_6 "SM_AMIGA_srsts_i_i_0_a3_0[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un21_fpu_cs_0_a2_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un21_fpu_cs_0_a2_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un22_berr_0_a2_0_a3_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un22_berr_0_a2_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a2_4_1_0 "SM_AMIGA_nss_i_0_0_0_a2_4_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a2_4_2_0 "SM_AMIGA_nss_i_0_0_0_a2_4_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un37_as_030_d0_i_a2_1 "pos_clk.un37_as_030_d0_i_a2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a3_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a3_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a3_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a3_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a3_6 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a3_7 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a3_8 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a3_9 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a3_10 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a3_11 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un21_bgack_030_int_i_0_o2_2_o3_1 "pos_clk.un21_bgack_030_int_i_0_o2_2_o3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un21_bgack_030_int_i_0_o2_2_o3_2 "pos_clk.un21_bgack_030_int_i_0_o2_2_o3_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_DMA_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_1_0 "SM_AMIGA_nss_i_0_0_0_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_2_0 "SM_AMIGA_nss_i_0_0_0_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_3_0 "SM_AMIGA_nss_i_0_0_0_3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_4_0 "SM_AMIGA_nss_i_0_0_0_4[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_5_0 "SM_AMIGA_nss_i_0_0_0_5[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_0 "SM_AMIGA_nss_i_0_0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_o2_0_1_0 "SM_AMIGA_nss_i_0_0_0_o2_0_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_o2_0_0 "SM_AMIGA_nss_i_0_0_0_o2_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un10_sm_amiga_1 "pos_clk.un10_sm_amiga_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un10_sm_amiga "pos_clk.un10_sm_amiga") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename pos_clk_un37_as_030_d0_i_a2_1_1 "pos_clk.un37_as_030_d0_i_a2_1_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename pos_clk_un37_as_030_d0_i_a2_1_2 "pos_clk.un37_as_030_d0_i_a2_1_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename pos_clk_un37_as_030_d0_i_a2_1_3 "pos_clk.un37_as_030_d0_i_a2_1_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename pos_clk_un37_as_030_d0_i_a2_1_4 "pos_clk.un37_as_030_d0_i_a2_1_4") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un37_as_030_d0_i_a2_1 "pos_clk.un37_as_030_d0_i_a2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_0_a3_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_0_a3_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_0_a3_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_0_a3_6 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_0_a3_7 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_0_a3_8 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_0_a3_9 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_0_a3_10 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_0_a3_11 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un23_bgack_030_int_i_0_o2_2_o3_1 "pos_clk.un23_bgack_030_int_i_0_o2_2_o3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un23_bgack_030_int_i_0_o2_2_o3_2 "pos_clk.un23_bgack_030_int_i_0_o2_2_o3_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un23_bgack_030_int_i_0_o2_2_o3 "pos_clk.un23_bgack_030_int_i_0_o2_2_o3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_0_i_0_1 "pos_clk.CYCLE_DMA_5_0_i_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_0_i_0_2 "pos_clk.CYCLE_DMA_5_0_i_0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_c_i_2 "IPL_c_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_D0_0_i_2 "IPL_D0_0_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_c_i_1 "IPL_c_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_D0_0_i_1 "IPL_D0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_c_i_0 "IPL_c_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename IPL_D0_0_i_0 "IPL_D0_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_3_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance DS_000_DMA_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_8_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_000_DMA_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_1_0 "SM_AMIGA_nss_i_0_0_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_2_0 "SM_AMIGA_nss_i_0_0_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_3_0 "SM_AMIGA_nss_i_0_0_3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_4_0 "SM_AMIGA_nss_i_0_0_4[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_5_0 "SM_AMIGA_nss_i_0_0_5[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_0 "SM_AMIGA_nss_i_0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un10_sm_amiga_1 "pos_clk.un10_sm_amiga_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un10_sm_amiga "pos_clk.un10_sm_amiga") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_ciin_0_a3_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_235_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_236_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_i_3 "SM_AMIGA_srsts_0_0_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_234_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_i_2 "SM_AMIGA_srsts_0_0_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_231_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_232_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_i_1 "SM_AMIGA_srsts_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_230_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_i_0 "SM_AMIGA_srsts_0_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_226_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_331_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_27_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_030_1_i_0 "IPL_030_1_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_c_i_0 "IPL_c_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DSACK1_INT_1_sqmuxa_i_0_o2_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_311_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_88_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_000_DMA_1_sqmuxa_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_290_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DS_000_DMA_2_sqmuxa_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_346_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_DS_000_DMA_4_f0_0_0_i "pos_clk.DS_000_DMA_4_f0_0_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_268_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_269_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_0_i_4 "SM_AMIGA_srsts_0_0_0_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_341_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_238_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_239_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_i_5 "SM_AMIGA_srsts_0_0_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_362_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_o2_i_2 "SM_AMIGA_srsts_0_0_o2_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un5_e_0_i_o2_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_o2_i_3 "SM_AMIGA_srsts_0_0_o2_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_2_i_i_i_o2_i_3 "cpu_est_2_i_i_i_o2_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_263_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_262_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_030_H_2_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_1_i_o2_0_o3_i "pos_clk.CYCLE_DMA_5_1_i_o2_0_o3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_366_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un23_bgack_030_int_i_0_o2_2_o3_i "pos_clk.un23_bgack_030_int_i_0_o2_2_o3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_310_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_359_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_o2_i_0 "SM_AMIGA_nss_i_0_0_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_OUT_PRE_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_251_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_i_1 "cpu_est_2_0_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_253_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_369_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_i_2 "cpu_est_2_0_0_0_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_254_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_256_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_255_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_267_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_266_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RESET_OUT_2_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un5_e_0_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_o2_i_2 "cpu_est_2_0_0_0_o2_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VMA_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_361_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_283_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_0_i_0 "pos_clk.SIZE_DMA_6_0_0_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_345_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_0_i_1 "pos_clk.SIZE_DMA_6_0_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance UDS_000_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance LDS_000_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_0_o2_i_0 "pos_clk.SIZE_DMA_6_0_0_0_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_21_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VMA_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DTACK_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DTACK_D0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_249_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_248_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_0_i "pos_clk.un9_clk_000_pe_0_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_250_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_18_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RW_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_22_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance A0_DMA_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_26_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance BG_000_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance BG_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un6_bg_030_i "pos_clk.un6_bg_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un9_bg_030_i "pos_clk.un9_bg_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_10_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance BGACK_030_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VPA_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VPA_D_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_370_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un6_bgack_000_0_i "pos_clk.un6_bgack_000_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DS_000_ENABLE_1_sqmuxa_1_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DSACK1_INT_1_sqmuxa_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_000_INT_1_sqmuxa_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_260_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un37_as_030_d0_i_i_i "pos_clk.un37_as_030_d0_i_i_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_RW_000_INT_5_0_i "pos_clk.RW_000_INT_5_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_sqmuxa_1_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un10_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un13_ciin_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_4_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance DSACK1_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_5_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance AS_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_7_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance AS_030_000_SYNC_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_219_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_218_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_224_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_222_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_223_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_o2_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_312_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_170_i_0_o2_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_258_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_257_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance nEXP_SPACE_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un3_as_030_d0_0_o2_0_o3_i "pos_clk.un3_as_030_d0_0_o2_0_o3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_030_D0_0_i_a2_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_115_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_356_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DSACK1_INT_1_sqmuxa_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_o2_2_i_0 "SM_AMIGA_nss_i_0_0_o2_2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_o2_1_i_0 "SM_AMIGA_nss_i_0_0_o2_1_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_334_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_335_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_244_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_233_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_355_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_229_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_246_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_i_0 "SM_AMIGA_nss_i_0_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_220_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SIZE_c_i_1 "SIZE_c_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_332_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_240_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_i_i_6 "SM_AMIGA_srsts_i_i_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un14_amiga_bus_data_dir_i_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_270_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_282_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_0_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RW_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_SM_AMIGA_1_i_a2_3_o2_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_353_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_SM_AMIGA_1_i_a2_3_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_o2_0_i_0 "SM_AMIGA_nss_i_0_0_o2_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_357_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_23_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance UDS_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_19_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RW_000_DMA_2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_17_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance LDS_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_c_i_1 "IPL_c_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_D0_0_i_1 "IPL_D0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_c_i_2 "IPL_c_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_D0_0_i_2 "IPL_D0_0_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_28_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_030_1_i_1 "IPL_030_1_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_8_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_000_DMA_1_sqmuxa_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_212_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DS_000_DMA_2_sqmuxa_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_211_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_DS_000_DMA_4_f0_0_0_i "pos_clk.DS_000_DMA_4_f0_0_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_205_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_206_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_i_5 "SM_AMIGA_srsts_0_0_0_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_200_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_i_2 "SM_AMIGA_srsts_0_0_0_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_197_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_29_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename IPL_030_1_i_2 "IPL_030_1_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_c_i_0 "A_c_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_25_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_DMA_HIGH_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_27_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_030_1_i_0 "IPL_030_1_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_030_H_2_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_CYCLE_DMA_5_1_i_0_o3_i "pos_clk.CYCLE_DMA_5_1_i_0_o3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_260_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un3_as_030_d0_0_o3_i "pos_clk.un3_as_030_d0_0_o3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un21_bgack_030_int_i_0_o2_2_o3_i "pos_clk.un21_bgack_030_int_i_0_o2_2_o3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_OUT_PRE_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DSACK1_INT_1_sqmuxa_1_i_0_o2_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_396_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_312_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_236_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_237_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DSACK1_INT_1_sqmuxa_1_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_000_INT_1_sqmuxa_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_229_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un37_as_030_d0_i_i_i "pos_clk.un37_as_030_d0_i_i_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_209_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_0_i_0 "pos_clk.SIZE_DMA_6_0_0_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_210_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_0_i_1 "pos_clk.SIZE_DMA_6_0_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_268_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un6_bgack_000_0_0_i "pos_clk.un6_bgack_000_0_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_SM_AMIGA_0_sqmuxa_1_0_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RW_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_RW_000_INT_5_0_0_i "pos_clk.RW_000_INT_5_0_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance UDS_000_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance LDS_000_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_0_o2_i_0 "pos_clk.SIZE_DMA_6_0_0_0_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_113_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_195_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_24_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance AMIGA_BUS_ENABLE_DMA_LOW_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename RW_000_DMA_0_r "RW_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename RW_000_DMA_0_m "RW_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_DMA_0_n "RW_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_DMA_0_p "RW_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename LDS_000_INT_0_r "LDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename LDS_000_INT_0_m "LDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename LDS_000_INT_0_n "LDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename LDS_000_INT_0_p "LDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance N_22_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance A0_DMA_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_19_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RW_000_DMA_2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_18_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RW_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_10_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance BGACK_030_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un14_amiga_bus_data_dir_i_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un10_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un13_ciin_i_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_207_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_208_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_i_1 "SM_AMIGA_srsts_0_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_21_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VMA_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance nEXP_SPACE_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_030_D0_0_i_a2_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_214_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_213_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_i_0_i_6 "SM_AMIGA_srsts_i_i_0_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_26_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance BG_000_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance BG_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un6_bg_030_i "pos_clk.un6_bg_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un9_bg_030_i "pos_clk.un9_bg_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_25_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_DMA_HIGH_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_226_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_224_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_225_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_267_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_i_2 "cpu_est_2_0_0_0_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_222_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_223_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_i_1 "cpu_est_2_0_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_221_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_220_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_0_i "pos_clk.un9_clk_000_pe_0_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_216_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_215_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_199_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_198_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un5_e_i_0_o2_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_255_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_256_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_o2_2_i_0 "SM_AMIGA_nss_i_0_0_0_o2_2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VMA_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DSACK1_INT_1_sqmuxa_1_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_251_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_250_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RST_DLY_e2_i_0_o2_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_o2_i_2 "cpu_est_2_0_0_0_o2_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un5_e_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_397_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RST_DLY_e2_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_000_NE_0_o2_i_o2_i_o2_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_227_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_o2_1_i_0 "SM_AMIGA_nss_i_0_0_0_o2_1_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_192_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_191_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_193_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_398_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_261_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_194_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_i_0 "SM_AMIGA_nss_i_0_0_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_186_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_185_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_184_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_190_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_188_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_189_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_i_0_0_o2_i_3 "cpu_est_2_i_0_0_o2_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RESET_OUT_2_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_243_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_254_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_o2_i_0 "SM_AMIGA_nss_i_0_0_0_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_249_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_247_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_o3_i_0 "SM_AMIGA_nss_i_0_0_0_o3_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_252_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DS_000_ENABLE_1_sqmuxa_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_o2_0_i_0 "SM_AMIGA_nss_i_0_0_0_o2_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_o2_i_3 "SM_AMIGA_srsts_0_0_0_o2_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_253_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DTACK_D0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_28_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_030_1_i_1 "IPL_030_1_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_c_i_0 "A_c_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SIZE_c_i_1 "SIZE_c_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_201_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_202_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_i_3 "SM_AMIGA_srsts_0_0_0_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_204_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_203_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_i_4 "SM_AMIGA_srsts_0_0_0_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_SM_AMIGA_0_sqmuxa_2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DS_000_ENABLE_1_sqmuxa_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_235_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_234_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_23_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance UDS_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_17_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance LDS_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VPA_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VPA_D_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DTACK_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un4_as_000 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance LDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance un4_lds_000 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance UDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance un4_uds_000 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance BGACK_030_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_DMA_LOW_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_amiga_bus_enable_low (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un1_amiga_bus_enable_low_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance un21_fpu_cs_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_a3_0_3 "SM_AMIGA_srsts_0_0_0_a3_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_a3_3 "SM_AMIGA_srsts_0_0_0_a3[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a3_0_0 "SM_AMIGA_nss_i_0_0_0_a3_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a3_0 "SM_AMIGA_nss_i_0_0_0_a3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_0_1__r "IPL_030_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename IPL_030_0_1__m "IPL_030_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_0_1__n "IPL_030_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_0_1__p "IPL_030_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename IPL_030_1_2 "IPL_030_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_1_1 "IPL_030_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_D0_0_2 "IPL_D0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_D0_0_1 "IPL_D0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DTACK_D0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_D_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance LDS_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RW_000_DMA_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance UDS_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_DMA_LOW_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_DMA_HIGH_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_132_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_r "AMIGA_BUS_ENABLE_DMA_HIGH_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_m "AMIGA_BUS_ENABLE_DMA_HIGH_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_n "AMIGA_BUS_ENABLE_DMA_HIGH_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_p "AMIGA_BUS_ENABLE_DMA_HIGH_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance N_131_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_r "AMIGA_BUS_ENABLE_DMA_LOW_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_m "AMIGA_BUS_ENABLE_DMA_LOW_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_n "AMIGA_BUS_ENABLE_DMA_LOW_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_p "AMIGA_BUS_ENABLE_DMA_LOW_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance DS_000_ENABLE_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename UDS_000_INT_0_r "UDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename UDS_000_INT_0_m "UDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename UDS_000_INT_0_n "UDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename UDS_000_INT_0_p "UDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance DSACK1_INT_1_sqmuxa_i_0_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_SM_AMIGA_1_i_a2_3_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a2_1 "SM_AMIGA_srsts_0_0_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i_a2_0_a3 "pos_clk.AMIGA_BUS_ENABLE_DMA_LOW_3_i_a2_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename A_i_1 "A_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i_a2_0_a3 "pos_clk.AMIGA_BUS_ENABLE_DMA_HIGH_3_i_a2_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance I_226 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_0_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_1_sqmuxa_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_a3_1_0 "SM_AMIGA_nss_i_0_0_a3_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_a3_0_0 "SM_AMIGA_nss_i_0_0_a3_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_a3_0 "SM_AMIGA_nss_i_0_0_a3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance G_118 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance G_117 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance (rename IPL_030_0_2__r "IPL_030_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_030_0_2__m "IPL_030_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_2__n "IPL_030_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_2__p "IPL_030_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_030_000_SYNC_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename CLK_000_D_i_1 "CLK_000_D_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__r "un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__m "un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__n "un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__p "un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_o2_1_0 "SM_AMIGA_nss_i_0_0_o2_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_o2_2_0 "SM_AMIGA_nss_i_0_0_o2_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_1_sqmuxa_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_o2_0_0 "SM_AMIGA_nss_i_0_0_o2_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_SM_AMIGA_1_i_a2_3_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_SM_AMIGA_1_i_a2_3_o2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_0_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un14_amiga_bus_data_dir_i_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_i_6 "SM_AMIGA_srsts_i_i[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename CLK_000_D_i_11 "CLK_000_D_i[11]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_364_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a2_0 "SM_AMIGA_srsts_0_0_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_1_sqmuxa_i_0_126_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_1_sqmuxa_i_0_126_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_i_i_0 "cpu_est_0_i_i[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_170_i_0_o2_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RST_DLY_i_0 "RST_DLY_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename RST_DLY_i_1 "RST_DLY_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_o2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_i_7 "SM_AMIGA_i_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_as_030_0_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_157_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance FPU_SENSE_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_227 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un22_berr_0_a2_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RST_DLY_i_2 "RST_DLY_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e1_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e1_i_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e0_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e0_i_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_i_0 "cpu_est_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_0_i_i_a3_0 "cpu_est_0_i_i_a3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_i_i_a3_0_0 "cpu_est_0_i_i_a3_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename A_DECODE_i_19 "A_DECODE_i[19]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_DECODE_i_16 "A_DECODE_i[16]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_sqmuxa_1_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SIZE_DMA_3_sqmuxa_i_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_A0_DMA_3_0_a2_0_a3 "pos_clk.A0_DMA_3_0_a2_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SIZE_DMA_3_sqmuxa_i_o2_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un13_ciin_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_sqmuxa_1_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_RW_000_INT_5_0 "pos_clk.RW_000_INT_5_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un37_as_030_d0_i_i "pos_clk.un37_as_030_d0_i_i") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_INT_1_sqmuxa_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_1_sqmuxa_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_ENABLE_1_sqmuxa_1_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_D0_0_i_a2_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un3_as_030_d0_0_o2_0_o3 "pos_clk.un3_as_030_d0_0_o2_0_o3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_113_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_INT_0_r "AS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_INT_0_m "AS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_INT_0_n "AS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_INT_0_p "AS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename LDS_000_INT_0_r "LDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename LDS_000_INT_0_m "LDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename LDS_000_INT_0_n "LDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename LDS_000_INT_0_p "LDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (instance (rename DS_000_ENABLE_0_r "DS_000_ENABLE_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename DS_000_ENABLE_0_m "DS_000_ENABLE_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename DS_000_ENABLE_0_n "DS_000_ENABLE_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename DS_000_ENABLE_0_p "DS_000_ENABLE_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_r "AS_030_000_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_m "AS_030_000_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_n "AS_030_000_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_p "AS_030_000_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename RW_000_INT_0_r "RW_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename RW_000_INT_0_m "RW_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_INT_0_n "RW_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_INT_0_p "RW_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance I_226 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un3_as_030_i_a2_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_4 "SM_AMIGA_srsts_0_0_0[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_3 "SM_AMIGA_srsts_0_0_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a2_2_0 "SM_AMIGA_nss_i_0_0_0_a2_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_a2_2 "SM_AMIGA_srsts_0_0_0_a2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_ENABLE_1_sqmuxa_i_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a2_1_0 "SM_AMIGA_nss_i_0_0_0_a2_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a2_0_0 "SM_AMIGA_nss_i_0_0_0_a2_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a2_0 "SM_AMIGA_nss_i_0_0_0_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_a2_5 "SM_AMIGA_srsts_0_0_0_a2[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RESET_OUT_2_0_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RESET_OUT_2_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_ENABLE_1_sqmuxa_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_a3_0_4 "SM_AMIGA_srsts_0_0_0_a3_0[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_a3_4 "SM_AMIGA_srsts_0_0_0_a3[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_e_i_0_o2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_i_0_0_o2_3 "cpu_est_2_i_0_0_o2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_i_1 "cpu_est_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_i_3 "cpu_est_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_o2_1_0 "SM_AMIGA_nss_i_0_0_0_o2_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_o2_3 "SM_AMIGA_srsts_0_0_0_o2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_ENABLE_1_sqmuxa_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_o3_0 "SM_AMIGA_nss_i_0_0_0_o3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_o2_0 "SM_AMIGA_nss_i_0_0_0_o2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RESET_OUT_2_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_ENABLE_1_sqmuxa_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RESET_OUT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_2 "cpu_est_2_0_0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_i_0_0_3 "cpu_est_2_i_0_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_e_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RESET_OUT_1_sqmuxa_i_0_127_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename CLK_000_D_i_1 "CLK_000_D_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_000_NE_0_o2_i_o2_i_o2_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e2_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_e_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_i_0 "cpu_est_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_o2_2 "cpu_est_2_0_0_0_o2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RST_DLY_i_0 "RST_DLY_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename RST_DLY_i_1 "RST_DLY_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RST_DLY_e2_i_0_o2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_0_o2 "pos_clk.un9_clk_000_pe_0_0_o2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_o2_2_0 "SM_AMIGA_nss_i_0_0_0_o2_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance N_258_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RST_DLY_e2_i_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename CLK_000_D_i_9 "CLK_000_D_i[9]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DSACK1_INT_1_sqmuxa_1_i_0_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a2_3_0 "SM_AMIGA_nss_i_0_0_0_a2_3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DTACK_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a2_5_0 "SM_AMIGA_nss_i_0_0_0_a2_5[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RESET_OUT_1_sqmuxa_i_0_127_1_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e2_i_0_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_i_2 "cpu_est_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_a2_2 "cpu_est_2_0_0_0_a2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_1 "SM_AMIGA_srsts_0_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_0_0_0 "cpu_est_0_0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_0 "pos_clk.un9_clk_000_pe_0_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_1 "cpu_est_2_0_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e2_i_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e1_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e1_i_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_a3_1 "SM_AMIGA_srsts_0_0_0_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_a3_0_1 "SM_AMIGA_srsts_0_0_0_a3_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_0_0_a3_0 "cpu_est_0_0_0_a3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_0_0_a3_0_0 "cpu_est_0_0_0_a3_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_a3_1 "cpu_est_2_0_0_0_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_0_a3_2 "cpu_est_2_0_0_0_a3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_i_0_0_a3_3 "cpu_est_2_i_0_0_a3[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_e_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_e_i_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_1_sqmuxa_1_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e0_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e0_i_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance BG_000_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_i_0_6 "SM_AMIGA_srsts_i_i_0[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_D0_0_i_a2_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_as_030_0_0_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_i_7 "SM_AMIGA_i_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_030_000_SYNC_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_0_0_0_a3_2_1_0 "SM_AMIGA_nss_i_0_0_0_a3_2_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance FPU_SENSE_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename VMA_INT_0_r "VMA_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename VMA_INT_0_m "VMA_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename VMA_INT_0_n "VMA_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename VMA_INT_0_p "VMA_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance VMA_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_1__r "cpu_est_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_0_1__m "cpu_est_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_1__n "cpu_est_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_1__p "cpu_est_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename cpu_est_0_2__r "cpu_est_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_0_2__m "cpu_est_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_2__n "cpu_est_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_2__p "cpu_est_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename cpu_est_0_3__r "cpu_est_0_3_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_0_3__m "cpu_est_0_3_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_3__n "cpu_est_0_3_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_3__p "cpu_est_0_3_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance RST_DLY_e2_i_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RST_DLY_i_2 "RST_DLY_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_DMA_LOW_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_DMA_HIGH_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance N_103_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_r "AMIGA_BUS_ENABLE_DMA_HIGH_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_m "AMIGA_BUS_ENABLE_DMA_HIGH_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_n "AMIGA_BUS_ENABLE_DMA_HIGH_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_p "AMIGA_BUS_ENABLE_DMA_HIGH_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance N_102_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_r "AMIGA_BUS_ENABLE_DMA_LOW_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_m "AMIGA_BUS_ENABLE_DMA_LOW_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_n "AMIGA_BUS_ENABLE_DMA_LOW_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_p "AMIGA_BUS_ENABLE_DMA_LOW_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (instance (rename A0_DMA_0_r "A0_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A0_DMA_0_m "A0_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename A0_DMA_0_n "A0_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename A0_DMA_0_p "A0_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename RW_000_DMA_0_r "RW_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename RW_000_DMA_0_m "RW_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RW_000_DMA_0_n "RW_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RW_000_DMA_0_p "RW_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename RW_000_INT_0_r "RW_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename RW_000_INT_0_m "RW_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RW_000_INT_0_n "RW_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RW_000_INT_0_p "RW_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename BGACK_030_INT_0_r "BGACK_030_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename BGACK_030_INT_0_m "BGACK_030_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BGACK_030_INT_0_n "BGACK_030_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BGACK_030_INT_0_p "BGACK_030_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance BGACK_030_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_DMA_LOW_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_amiga_bus_enable_low (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_bg_030 "pos_clk.un9_bg_030") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename BG_000_0_r "BG_000_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename BG_000_0_m "BG_000_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename BG_000_0_n "BG_000_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename BG_000_0_p "BG_000_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance DS_000_ENABLE_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance BG_000_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance A0_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RW_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename A_DECODE_i_18 "A_DECODE_i[18]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_A0_DMA_3_0_a2_0_a3 "pos_clk.A0_DMA_3_0_a2_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_0_a3_1 "pos_clk.SIZE_DMA_6_0_0_0_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename pos_clk_SIZE_DMA_6_0_0_0_a3_0 "pos_clk.SIZE_DMA_6_0_0_0_a3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance I_228 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename SIZE_DMA_i_0 "SIZE_DMA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance un3_size (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename SIZE_DMA_i_1 "SIZE_DMA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) @@ -782,136 +793,109 @@ (instance (rename SIZE_DMA_0_0__m "SIZE_DMA_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename SIZE_DMA_0_0__n "SIZE_DMA_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename SIZE_DMA_0_0__p "SIZE_DMA_0_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance VPA_D_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance BGACK_030_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BGACK_030_INT_0_r "BGACK_030_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename BGACK_030_INT_0_m "BGACK_030_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BGACK_030_INT_0_n "BGACK_030_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BGACK_030_INT_0_p "BGACK_030_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_bg_030 "pos_clk.un9_bg_030") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un4_as_000 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_114_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DSACK1_INT_0_r "DSACK1_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DSACK1_INT_0_m "DSACK1_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DSACK1_INT_0_n "DSACK1_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DSACK1_INT_0_p "DSACK1_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename cpu_est_0_3__r "cpu_est_0_3_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_0_3__m "cpu_est_0_3_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_3__n "cpu_est_0_3_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_3__p "cpu_est_0_3_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename cpu_est_0_2__r "cpu_est_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_0_2__m "cpu_est_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_2__n "cpu_est_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_2__p "cpu_est_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename cpu_est_0_1__r "cpu_est_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_0_1__m "cpu_est_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_1__n "cpu_est_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_1__p "cpu_est_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance DTACK_D0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VMA_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_i_1 "cpu_est_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename VMA_INT_0_r "VMA_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename VMA_INT_0_m "VMA_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename VMA_INT_0_n "VMA_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename VMA_INT_0_p "VMA_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance RW_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RW_000_DMA_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance A0_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename pos_clk_SIZE_DMA_6_0_0_0_o2_0 "pos_clk.SIZE_DMA_6_0_0_0_o2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_RW_000_INT_5_0_0 "pos_clk.RW_000_INT_5_0_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_SM_AMIGA_0_sqmuxa_1_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un6_bgack_000_0_0 "pos_clk.un6_bgack_000_0_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename pos_clk_SIZE_DMA_6_0_0_0_1 "pos_clk.SIZE_DMA_6_0_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename pos_clk_SIZE_DMA_6_0_0_0_0 "pos_clk.SIZE_DMA_6_0_0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un6_bgack_000_0 "pos_clk.un6_bgack_000_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un3_as_030_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un6_bgack_000_0_a2 "pos_clk.un6_bgack_000_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_0_a3_1 "pos_clk.SIZE_DMA_6_0_0_0_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_2 "cpu_est_2_0_0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_1 "cpu_est_2_0_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_0 "pos_clk.un9_clk_000_pe_0_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_a2_2 "cpu_est_2_0_0_0_a2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DTACK_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a2_0_2 "SM_AMIGA_srsts_0_0_a2_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RESET_OUT_2_0_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_2_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_e_0_i_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_e_0_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_i_2 "cpu_est_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_2_i_i_i_a3_3 "cpu_est_2_i_i_i_a3[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_a3_2 "cpu_est_2_0_0_0_a3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_a3_1 "cpu_est_2_0_0_0_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_sqmuxa_1_0_0_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_1_i_o2_0_o3 "pos_clk.CYCLE_DMA_5_1_i_o2_0_o3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_030_H_2_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_1_i_0_x2 "pos_clk.CYCLE_DMA_5_1_i_0_x2") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance (rename cpu_est_2_i_i_i_o2_3 "cpu_est_2_i_i_i_o2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_o2_3 "SM_AMIGA_srsts_0_0_o2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_e_0_i_o2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_o2_2 "SM_AMIGA_srsts_0_0_o2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_0_o2 "pos_clk.un9_clk_000_pe_0_0_o2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_o2_2 "cpu_est_2_0_0_0_o2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_i_3 "cpu_est_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un5_e_0_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_2_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_e_0_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_i_i_i_3 "cpu_est_2_i_i_i[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_0 "SM_AMIGA_srsts_0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_1 "SM_AMIGA_srsts_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_2 "SM_AMIGA_srsts_0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_3 "SM_AMIGA_srsts_0_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_5 "SM_AMIGA_srsts_0_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_0_4 "SM_AMIGA_srsts_0_0_0[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_DS_000_DMA_4_f0_0_0 "pos_clk.DS_000_DMA_4_f0_0_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_DMA_1_sqmuxa_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un13_ciin_i_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un14_amiga_bus_data_dir_i_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un6_bgack_000_0_0_a2 "pos_clk.un6_bgack_000_0_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SIZE_DMA_3_sqmuxa_i_o2_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i_a2_0_a3 "pos_clk.AMIGA_BUS_ENABLE_DMA_LOW_3_i_a2_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename A_i_1 "A_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i_a2_0_a3 "pos_clk.AMIGA_BUS_ENABLE_DMA_HIGH_3_i_a2_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SIZE_DMA_3_sqmuxa_i_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_1_sqmuxa_1_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un1_rw_i_a2_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename CLK_000_D_i_0 "CLK_000_D_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_88_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un23_bgack_030_int_i_0_o2_2_x2 "pos_clk.un23_bgack_030_int_i_0_o2_2_x2") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance N_312_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un21_bgack_030_int_i_0_o2_2_x2 "pos_clk.un21_bgack_030_int_i_0_o2_2_x2") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) (instance CLK_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DSACK1_INT_1_sqmuxa_i_0_o2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_o2_0 "SM_AMIGA_nss_i_0_0_o2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_030_H_2_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_0_a3_4 "SM_AMIGA_srsts_0_0_0_a3[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_0_a3_0_4 "SM_AMIGA_srsts_0_0_0_a3_0[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_DS_000_DMA_4_f0_0_0_a3 "pos_clk.DS_000_DMA_4_f0_0_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_DMA_2_sqmuxa_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_1_sqmuxa_1_i_0_o2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un3_as_030_d0_0_o3 "pos_clk.un3_as_030_d0_0_o3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_SM_AMIGA_0_sqmuxa_1_0_1_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_CYCLE_DMA_5_1_i_0_o3 "pos_clk.CYCLE_DMA_5_1_i_0_o3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance CLK_030_H_2_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_CYCLE_DMA_5_1_i_0_x2 "pos_clk.CYCLE_DMA_5_1_i_0_x2") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance N_124_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un22_berr_0_a2_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__r "un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__m "un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__n "un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__p "un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (instance AS_000_DMA_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_229 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un6_as_030_0_a2_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un23_bgack_030_int_i_0_o2_2_a2 "pos_clk.un23_bgack_030_int_i_0_o2_2_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_0_0_a2_0 "SM_AMIGA_nss_i_0_0_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename CLK_000_D_i_10 "CLK_000_D_i[10]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a2_0_1 "SM_AMIGA_srsts_0_0_a2_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a2_0_0 "SM_AMIGA_srsts_0_0_a2_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_sqmuxa_1_0_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_as_000_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance I_233 (viewRef prim (cellRef INV (libraryRef mach))) ) (instance I_230 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_231 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance G_116 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance AS_030_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a3_0 "SM_AMIGA_srsts_0_0_a3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a3_0_0 "SM_AMIGA_srsts_0_0_a3_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a3_0_1 "SM_AMIGA_srsts_0_0_a3_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a3_0_2 "SM_AMIGA_srsts_0_0_a3_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a3_3 "SM_AMIGA_srsts_0_0_a3[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a3_0_3 "SM_AMIGA_srsts_0_0_a3_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_0_0_a3_0_5 "SM_AMIGA_srsts_0_0_a3_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un6_as_030_0_a2_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_INT_1_sqmuxa_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un21_bgack_030_int_i_0_o2_2_a2 "pos_clk.un21_bgack_030_int_i_0_o2_2_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename CLK_000_D_i_8 "CLK_000_D_i[8]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_a2_1 "SM_AMIGA_srsts_0_0_0_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_SM_AMIGA_0_sqmuxa_1_0_1_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_2 "SM_AMIGA_srsts_0_0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_5 "SM_AMIGA_srsts_0_0_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_DS_000_DMA_4_f0_0_0 "pos_clk.DS_000_DMA_4_f0_0_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_DMA_1_sqmuxa_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_as_000_i_a2_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un37_as_030_d0_i_i "pos_clk.un37_as_030_d0_i_i") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_INT_1_sqmuxa_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename A_DECODE_i_19 "A_DECODE_i[19]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_OUT_PRE_25_0 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance G_117 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance G_118 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance G_119 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance (rename A_DECODE_i_16 "A_DECODE_i[16]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename CYCLE_DMA_i_0 "CYCLE_DMA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename pos_clk_CYCLE_DMA_5_0_i_0_a3 "pos_clk.CYCLE_DMA_5_0_i_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance CLK_030_H_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_OUT_PRE_50_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance G_111 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_241_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_242_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_243_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_236 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_030_H_2_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_a3_2 "SM_AMIGA_srsts_0_0_0_a3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_0_0_0_a3_0_5 "SM_AMIGA_srsts_0_0_0_a3_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_DS_000_DMA_4_f0_0_0_a3 "pos_clk.DS_000_DMA_4_f0_0_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_DMA_2_sqmuxa_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_112 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance N_244_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_245_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_246_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance I_237 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_234 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_238 (viewRef prim (cellRef INV (libraryRef mach))) ) (instance I_235 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_236 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_233 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_234 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_231 (viewRef prim (cellRef INV (libraryRef mach))) ) (instance I_232 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_DECODE_i_18 "A_DECODE_i[18]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_OUT_PRE_50_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_r "AS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_m "AS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_n "AS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_p "AS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance AS_000_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_D0_0_0 "IPL_D0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_D0_0_1 "IPL_D0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_D0_0_2 "IPL_D0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_1_0 "IPL_030_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_1_2 "IPL_030_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_0_0__r "IPL_030_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename IPL_030_0_0__m "IPL_030_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_0_0__n "IPL_030_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_0_0__p "IPL_030_0_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename IPL_030_0_2__r "IPL_030_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_030_0_2__m "IPL_030_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_2__n "IPL_030_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_2__p "IPL_030_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (instance un4_uds_000_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance un4_lds_000_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance un6_as_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) @@ -923,23 +907,29 @@ (instance (rename DS_000_DMA_0_m "DS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename DS_000_DMA_0_n "DS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename DS_000_DMA_0_p "DS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_r "AS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_m "AS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_n "AS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_p "AS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance AS_000_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_D0_0_0 "IPL_D0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_1_0 "IPL_030_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance N_86_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DSACK1_INT_0_r "DSACK1_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DSACK1_INT_0_m "DSACK1_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DSACK1_INT_0_n "DSACK1_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DSACK1_INT_0_p "DSACK1_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance N_85_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_000_INT_0_r "AS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_000_INT_0_m "AS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_INT_0_n "AS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_INT_0_p "AS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_r "AS_030_000_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_m "AS_030_000_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_n "AS_030_000_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_p "AS_030_000_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (net BGACK_030_INT (joined (portRef Q (instanceRef BGACK_030_INT)) - (portRef I0 (instanceRef un1_as_000_0)) - (portRef I0 (instanceRef BGACK_030_INT_0_n)) + (portRef I0 (instanceRef un1_as_000_i_a2_i)) + (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__m)) + (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__r)) (portRef I0 (instanceRef SIZE_DMA_3_sqmuxa_i_o2_i_a2)) - (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__m)) - (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__r)) (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_0_0_a3)) (portRef I0 (instanceRef BGACK_030_INT_i)) + (portRef I0 (instanceRef BGACK_030_INT_0_n)) (portRef I0 (instanceRef BGACK_030)) )) (net VCC (joined @@ -993,7 +983,7 @@ (portRef I0 (instanceRef un4_as_000_i)) )) (net un10_ciin (joined - (portRef O (instanceRef un10_ciin_0_a3)) + (portRef O (instanceRef un13_ciin_i_0_0_a3)) (portRef I0 (instanceRef un10_ciin_i)) (portRef I0 (instanceRef CIIN)) )) @@ -1011,52 +1001,52 @@ )) (net (rename cpu_est_3 "cpu_est[3]") (joined (portRef Q (instanceRef cpu_est_3)) - (portRef I0 (instanceRef un5_e_0_i_o2)) - (portRef I0 (instanceRef cpu_est_i_3)) - (portRef I0 (instanceRef cpu_est_2_i_i_i_o2_3)) (portRef I0 (instanceRef cpu_est_0_3__m)) + (portRef I0 (instanceRef un5_e_i_0_o2)) + (portRef I0 (instanceRef cpu_est_i_3)) + (portRef I0 (instanceRef cpu_est_2_i_0_0_o2_3)) )) (net (rename cpu_est_0 "cpu_est[0]") (joined (portRef Q (instanceRef cpu_est_0)) + (portRef I1 (instanceRef cpu_est_0_0_0_a3_0_0)) (portRef I0 (instanceRef cpu_est_2_0_0_0_o2_2)) - (portRef I1 (instanceRef cpu_est_0_i_i_a3_0_0)) (portRef I0 (instanceRef cpu_est_i_0)) (portRef I0 (instanceRef cpu_est_2_0_0_a3_1_1_1)) )) (net (rename cpu_est_1 "cpu_est[1]") (joined (portRef Q (instanceRef cpu_est_1)) - (portRef I1 (instanceRef cpu_est_2_0_0_0_o2_2)) - (portRef I0 (instanceRef un5_e_0_i_o2_0)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_a3_1)) - (portRef I0 (instanceRef cpu_est_i_1)) (portRef I0 (instanceRef cpu_est_0_1__m)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_a3_1)) + (portRef I1 (instanceRef cpu_est_2_0_0_0_o2_2)) + (portRef I0 (instanceRef cpu_est_i_1)) + (portRef I0 (instanceRef un5_e_i_0_o2_0)) )) (net (rename cpu_est_2 "cpu_est[2]") (joined (portRef Q (instanceRef cpu_est_2)) + (portRef I0 (instanceRef cpu_est_0_2__m)) + (portRef I1 (instanceRef un5_e_i_0_a3)) (portRef I1 (instanceRef cpu_est_2_0_0_0_a3_2)) (portRef I0 (instanceRef cpu_est_i_2)) - (portRef I1 (instanceRef un5_e_0_i_a3)) - (portRef I0 (instanceRef cpu_est_0_2__m)) )) (net AS_000_INT (joined (portRef Q (instanceRef AS_000_INT)) - (portRef I0 (instanceRef AS_000_INT_i)) (portRef I0 (instanceRef AS_000_INT_0_n)) + (portRef I0 (instanceRef AS_000_INT_i)) )) (net AMIGA_BUS_ENABLE_DMA_LOW (joined (portRef Q (instanceRef AMIGA_BUS_ENABLE_DMA_LOW)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_m)) (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_i)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_m)) )) (net AS_030_D0 (joined (portRef Q (instanceRef AS_030_D0)) (portRef I0 (instanceRef AS_030_D0_i)) - (portRef I1 (instanceRef pos_clk_un6_bg_030_0_a3_1)) + (portRef I1 (instanceRef pos_clk_un6_bg_030_0_a2_0_a3_1)) )) (net AS_030_000_SYNC (joined (portRef Q (instanceRef AS_030_000_SYNC)) (portRef I0 (instanceRef AS_030_000_SYNC_0_n)) - (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__m)) + (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__m)) (portRef I0 (instanceRef AS_030_000_SYNC_i)) )) (net BGACK_030_INT_D (joined @@ -1066,8 +1056,8 @@ (net AS_000_DMA (joined (portRef Q (instanceRef AS_000_DMA)) (portRef I0 (instanceRef AS_000_DMA_0_n)) - (portRef I0 (instanceRef AS_000_DMA_i)) (portRef I0 (instanceRef pos_clk_DS_000_DMA_4_f0_0_0_a3)) + (portRef I0 (instanceRef AS_000_DMA_i)) )) (net DS_000_DMA (joined (portRef Q (instanceRef DS_000_DMA)) @@ -1076,14 +1066,14 @@ )) (net (rename CYCLE_DMA_0 "CYCLE_DMA[0]") (joined (portRef Q (instanceRef CYCLE_DMA_0)) - (portRef I0 (instanceRef G_111)) + (portRef I0 (instanceRef G_112)) (portRef I0 (instanceRef CYCLE_DMA_i_0)) - (portRef I0 (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_x2)) + (portRef I0 (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_x2)) )) (net (rename CYCLE_DMA_1 "CYCLE_DMA[1]") (joined (portRef Q (instanceRef CYCLE_DMA_1)) - (portRef I1 (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_x2)) (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_x2)) + (portRef I1 (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_x2)) )) (net (rename SIZE_DMA_0 "SIZE_DMA[0]") (joined (portRef Q (instanceRef SIZE_DMA_0)) @@ -1099,8 +1089,8 @@ )) (net VPA_D (joined (portRef Q (instanceRef VPA_D)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_5_0)) (portRef I0 (instanceRef VPA_D_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a2_0_2)) )) (net UDS_000_INT (joined (portRef Q (instanceRef UDS_000_INT)) @@ -1109,30 +1099,24 @@ )) (net LDS_000_INT (joined (portRef Q (instanceRef LDS_000_INT)) - (portRef I0 (instanceRef LDS_000_INT_i)) (portRef I0 (instanceRef LDS_000_INT_0_n)) + (portRef I0 (instanceRef LDS_000_INT_i)) )) (net CLK_OUT_PRE_D (joined (portRef Q (instanceRef CLK_OUT_PRE_D)) (portRef I0 (instanceRef CLK_OUT_PRE_D_i)) (portRef D (instanceRef CLK_OUT_INT)) )) - (net (rename CLK_000_D_1 "CLK_000_D[1]") (joined - (portRef Q (instanceRef CLK_000_D_1)) - (portRef I0 (instanceRef N_170_i_0_o2_i_o2)) - (portRef I0 (instanceRef CLK_000_D_i_1)) - (portRef D (instanceRef CLK_000_D_2)) + (net (rename CLK_000_D_8 "CLK_000_D[8]") (joined + (portRef Q (instanceRef CLK_000_D_8)) + (portRef I0 (instanceRef CLK_000_D_i_8)) + (portRef D (instanceRef CLK_000_D_9)) )) - (net (rename CLK_000_D_10 "CLK_000_D[10]") (joined - (portRef Q (instanceRef CLK_000_D_10)) - (portRef I0 (instanceRef CLK_000_D_i_10)) - (portRef D (instanceRef CLK_000_D_11)) - )) - (net (rename CLK_000_D_11 "CLK_000_D[11]") (joined - (portRef Q (instanceRef CLK_000_D_11)) - (portRef I0 (instanceRef CLK_000_D_i_11)) - (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_i_0_a2_1)) - (portRef D (instanceRef CLK_000_D_12)) + (net (rename CLK_000_D_9 "CLK_000_D[9]") (joined + (portRef Q (instanceRef CLK_000_D_9)) + (portRef I0 (instanceRef CLK_000_D_i_9)) + (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_a2_1)) + (portRef D (instanceRef CLK_000_D_10)) )) (net DTACK_D0 (joined (portRef Q (instanceRef DTACK_D0)) @@ -1140,40 +1124,49 @@ )) (net RESET_OUT (joined (portRef Q (instanceRef RESET_OUT)) - (portRef I1 (instanceRef un1_as_000_0)) + (portRef I1 (instanceRef un1_as_000_i_a2_i)) (portRef I1 (instanceRef un1_rw_i_a2_i)) - (portRef I0 (instanceRef RESET_OUT_2_0_0_a3)) - (portRef I0 (instanceRef un3_as_030_0)) (portRef I0 (instanceRef RESET_OUT_i)) + (portRef I0 (instanceRef RESET_OUT_2_0_0_a3)) + (portRef I0 (instanceRef un3_as_030_i_a2_i)) + )) + (net (rename CLK_000_D_1 "CLK_000_D[1]") (joined + (portRef Q (instanceRef CLK_000_D_1)) + (portRef I0 (instanceRef CLK_000_NE_0_o2_i_o2_i_o2_i_o2)) + (portRef I0 (instanceRef CLK_000_D_i_1)) + (portRef D (instanceRef CLK_000_D_2)) )) (net (rename CLK_000_D_0 "CLK_000_D[0]") (joined (portRef Q (instanceRef CLK_000_D_0)) - (portRef I0 (instanceRef N_88_i_0_o2)) + (portRef I0 (instanceRef N_312_i_0_o2)) (portRef I0 (instanceRef CLK_000_D_i_0)) - (portRef I1 (instanceRef pos_clk_un6_bg_030_0_a3)) + (portRef I1 (instanceRef pos_clk_un6_bg_030_0_a2_0_a3)) (portRef D (instanceRef CLK_000_D_1)) )) (net CLK_OUT_PRE_50 (joined (portRef Q (instanceRef CLK_OUT_PRE_50)) (portRef I0 (instanceRef CLK_OUT_PRE_50_i)) + (portRef I1 (instanceRef CLK_OUT_PRE_25_0)) + )) + (net CLK_OUT_PRE_25 (joined + (portRef Q (instanceRef CLK_OUT_PRE_25)) + (portRef I0 (instanceRef CLK_OUT_PRE_25_0)) (portRef D (instanceRef CLK_OUT_PRE_D)) )) (net (rename IPL_D0_0 "IPL_D0[0]") (joined (portRef Q (instanceRef IPL_D0_0)) - (portRef I0 (instanceRef G_116)) + (portRef I0 (instanceRef G_117)) )) (net (rename IPL_D0_1 "IPL_D0[1]") (joined (portRef Q (instanceRef IPL_D0_1)) - (portRef I0 (instanceRef G_117)) + (portRef I0 (instanceRef G_118)) )) (net (rename IPL_D0_2 "IPL_D0[2]") (joined (portRef Q (instanceRef IPL_D0_2)) - (portRef I0 (instanceRef G_118)) + (portRef I0 (instanceRef G_119)) )) (net (rename CLK_000_D_2 "CLK_000_D[2]") (joined (portRef Q (instanceRef CLK_000_D_2)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_a3_2_2_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_a3_0_1_6)) (portRef D (instanceRef CLK_000_D_3)) )) (net (rename CLK_000_D_3 "CLK_000_D[3]") (joined @@ -1196,25 +1189,17 @@ (portRef Q (instanceRef CLK_000_D_7)) (portRef D (instanceRef CLK_000_D_8)) )) - (net (rename CLK_000_D_8 "CLK_000_D[8]") (joined - (portRef Q (instanceRef CLK_000_D_8)) - (portRef D (instanceRef CLK_000_D_9)) - )) - (net (rename CLK_000_D_9 "CLK_000_D[9]") (joined - (portRef Q (instanceRef CLK_000_D_9)) - (portRef D (instanceRef CLK_000_D_10)) - )) - (net (rename CLK_000_D_12 "CLK_000_D[12]") (joined - (portRef Q (instanceRef CLK_000_D_12)) - (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_i_0_a2_0)) + (net (rename CLK_000_D_10 "CLK_000_D[10]") (joined + (portRef Q (instanceRef CLK_000_D_10)) + (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_a2_0)) )) (net (rename pos_clk_un6_bg_030 "pos_clk.un6_bg_030") (joined - (portRef O (instanceRef pos_clk_un6_bg_030_0_a3)) + (portRef O (instanceRef pos_clk_un6_bg_030_0_a2_0_a3)) (portRef I0 (instanceRef pos_clk_un6_bg_030_i)) )) (net AMIGA_BUS_ENABLE_DMA_HIGH (joined (portRef Q (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH)) - (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__n)) + (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__n)) (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_m)) )) (net DSACK1_INT (joined @@ -1223,11 +1208,11 @@ (portRef I0 (instanceRef DSACK1)) )) (net (rename pos_clk_ipl "pos_clk.ipl") (joined - (portRef O (instanceRef G_119)) - (portRef I1 (instanceRef IPL_030_0_0__m)) - (portRef I0 (instanceRef IPL_030_0_0__r)) + (portRef O (instanceRef G_120)) (portRef I1 (instanceRef IPL_030_0_2__m)) (portRef I0 (instanceRef IPL_030_0_2__r)) + (portRef I1 (instanceRef IPL_030_0_0__m)) + (portRef I0 (instanceRef IPL_030_0_0__r)) (portRef I1 (instanceRef IPL_030_0_1__m)) (portRef I0 (instanceRef IPL_030_0_1__r)) )) @@ -1239,28 +1224,28 @@ )) (net (rename SM_AMIGA_6 "SM_AMIGA[6]") (joined (portRef Q (instanceRef SM_AMIGA_6)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a3_0_5)) - (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_0_a3)) - (portRef I1 (instanceRef un1_SM_AMIGA_1_i_a2_3_o2_0)) - (portRef I0 (instanceRef SM_AMIGA_i_6)) - (portRef I1 (instanceRef UDS_000_INT_0_m)) - (portRef I0 (instanceRef UDS_000_INT_0_r)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_a3_0_5)) + (portRef I1 (instanceRef AS_000_INT_1_sqmuxa_i_0_a3)) + (portRef I1 (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_a2)) (portRef I1 (instanceRef LDS_000_INT_0_m)) (portRef I0 (instanceRef LDS_000_INT_0_r)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_i_a3_1_6)) - )) - (net (rename SM_AMIGA_0 "SM_AMIGA[0]") (joined - (portRef Q (instanceRef SM_AMIGA_0)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a3_0)) - (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_0_a2)) - (portRef I0 (instanceRef SM_AMIGA_i_0)) + (portRef I1 (instanceRef UDS_000_INT_0_m)) + (portRef I0 (instanceRef UDS_000_INT_0_r)) + (portRef I0 (instanceRef SM_AMIGA_i_6)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_i_0_a3_1_6)) )) (net (rename SM_AMIGA_4 "SM_AMIGA[4]") (joined (portRef Q (instanceRef SM_AMIGA_4)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a3_0_3)) (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_a3_4)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_a3_0_3)) (portRef I0 (instanceRef SM_AMIGA_i_4)) )) + (net (rename SM_AMIGA_0 "SM_AMIGA[0]") (joined + (portRef Q (instanceRef SM_AMIGA_0)) + (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_a2)) + (portRef I0 (instanceRef SM_AMIGA_i_0)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_1_0)) + )) (net RW_000_INT (joined (portRef Q (instanceRef RW_000_INT)) (portRef I0 (instanceRef RW_000_INT_0_n)) @@ -1273,7 +1258,7 @@ )) (net (rename RST_DLY_0 "RST_DLY[0]") (joined (portRef Q (instanceRef RST_DLY_0)) - (portRef I1 (instanceRef RST_DLY_e0_i_a3)) + (portRef I1 (instanceRef RST_DLY_e0_i_0_a3)) (portRef I0 (instanceRef RST_DLY_e2_i_0_o2_0)) (portRef I0 (instanceRef RST_DLY_i_0)) )) @@ -1285,7 +1270,7 @@ (net (rename RST_DLY_2 "RST_DLY[2]") (joined (portRef Q (instanceRef RST_DLY_2)) (portRef I0 (instanceRef RST_DLY_i_2)) - (portRef I1 (instanceRef RESET_OUT_1_sqmuxa_i_0_126_0_a2)) + (portRef I1 (instanceRef RESET_OUT_1_sqmuxa_i_0_127_1_a2)) )) (net A0_DMA (joined (portRef Q (instanceRef A0_DMA)) @@ -1294,34 +1279,37 @@ )) (net CLK_030_H (joined (portRef Q (instanceRef CLK_030_H)) - (portRef I0 (instanceRef CLK_030_H_i)) (portRef I0 (instanceRef DS_000_DMA_2_sqmuxa_i_0_a3)) + (portRef I0 (instanceRef CLK_030_H_i)) )) (net (rename SM_AMIGA_1 "SM_AMIGA[1]") (joined (portRef Q (instanceRef SM_AMIGA_1)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a3_0_0)) - (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_i_0_a3)) - (portRef I0 (instanceRef SM_AMIGA_i_1)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a3_1)) + (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_a3)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_0_0)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_2_0)) )) (net (rename SM_AMIGA_5 "SM_AMIGA[5]") (joined (portRef Q (instanceRef SM_AMIGA_5)) (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_a3_0_4)) - (portRef I0 (instanceRef SM_AMIGA_i_5)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a3_5)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_0)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_a3_5)) )) (net (rename SM_AMIGA_3 "SM_AMIGA[3]") (joined (portRef Q (instanceRef SM_AMIGA_3)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_a2_0)) (portRef I0 (instanceRef SM_AMIGA_i_3)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a3_2)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_0)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_1_0)) )) (net (rename SM_AMIGA_2 "SM_AMIGA[2]") (joined (portRef Q (instanceRef SM_AMIGA_2)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a3_0_2)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a3_0_1)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_a3_2)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_a3_0_1)) (portRef I0 (instanceRef SM_AMIGA_i_2)) )) + (net (rename pos_clk_un3_as_030_d0 "pos_clk.un3_as_030_d0") (joined + (portRef O (instanceRef pos_clk_un3_as_030_d0_0_o3_i)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_m)) + )) (net (rename pos_clk_DS_000_DMA_4 "pos_clk.DS_000_DMA_4") (joined (portRef O (instanceRef pos_clk_DS_000_DMA_4_f0_0_0_i)) (portRef I0 (instanceRef DS_000_DMA_0_m)) @@ -1330,6 +1318,18 @@ (portRef O (instanceRef DS_000_DMA_0_p)) (portRef I0 (instanceRef N_3_i)) )) + (net N_4 (joined + (portRef O (instanceRef DSACK1_INT_0_p)) + (portRef I0 (instanceRef N_4_i)) + )) + (net N_5 (joined + (portRef O (instanceRef AS_000_INT_0_p)) + (portRef I0 (instanceRef N_5_i)) + )) + (net N_7 (joined + (portRef O (instanceRef AS_030_000_SYNC_0_p)) + (portRef I0 (instanceRef N_7_i)) + )) (net N_8 (joined (portRef O (instanceRef AS_000_DMA_0_p)) (portRef I0 (instanceRef N_8_i)) @@ -1358,119 +1358,126 @@ (portRef O (instanceRef IPL_030_0_0__p)) (portRef I0 (instanceRef N_27_i)) )) + (net N_29 (joined + (portRef O (instanceRef IPL_030_0_2__p)) + (portRef I0 (instanceRef N_29_i)) + )) (net N_30 (joined + (portRef O (instanceRef CLK_OUT_PRE_25_0)) + (portRef D (instanceRef CLK_OUT_PRE_25)) + )) + (net N_31 (joined (portRef O (instanceRef IPL_030_1_i_0)) (portRef D (instanceRef IPL_030DFF_0)) )) - (net N_31 (joined + (net N_32 (joined (portRef O (instanceRef IPL_030_1_i_1)) (portRef D (instanceRef IPL_030DFF_1)) )) - (net N_32 (joined + (net N_33 (joined (portRef O (instanceRef IPL_030_1_i_2)) (portRef D (instanceRef IPL_030DFF_2)) )) - (net N_33 (joined + (net N_34 (joined (portRef O (instanceRef BG_000_1_i)) (portRef D (instanceRef BG_000DFF)) )) - (net N_34 (joined + (net N_35 (joined (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1_i)) (portRef D (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH)) )) - (net N_35 (joined + (net N_36 (joined (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1_i)) (portRef D (instanceRef AMIGA_BUS_ENABLE_DMA_LOW)) )) - (net N_36 (joined + (net N_37 (joined (portRef O (instanceRef UDS_000_INT_1_i)) (portRef D (instanceRef UDS_000_INT)) )) - (net N_37 (joined + (net N_38 (joined (portRef O (instanceRef A0_DMA_1_i)) (portRef D (instanceRef A0_DMA)) )) - (net N_38 (joined + (net N_39 (joined (portRef O (instanceRef VMA_INT_1_i)) (portRef D (instanceRef VMA_INT)) )) - (net N_40 (joined + (net N_41 (joined (portRef O (instanceRef RW_000_DMA_2_i)) (portRef D (instanceRef RW_000_DMA)) )) - (net N_41 (joined + (net N_42 (joined (portRef O (instanceRef RW_000_INT_1_i)) (portRef D (instanceRef RW_000_INT)) )) - (net N_42 (joined + (net N_43 (joined (portRef O (instanceRef LDS_000_INT_1_i)) (portRef D (instanceRef LDS_000_INT)) )) - (net N_43 (joined + (net N_44 (joined (portRef O (instanceRef BGACK_030_INT_1_i)) (portRef D (instanceRef BGACK_030_INT)) )) - (net N_45 (joined + (net N_46 (joined (portRef O (instanceRef AS_000_DMA_1_i)) (portRef D (instanceRef AS_000_DMA)) )) - (net N_46 (joined + (net N_47 (joined (portRef O (instanceRef AS_030_000_SYNC_1_i)) (portRef D (instanceRef AS_030_000_SYNC)) )) - (net N_47 (joined + (net N_48 (joined (portRef O (instanceRef AS_000_INT_1_i)) (portRef D (instanceRef AS_000_INT)) )) - (net N_48 (joined + (net N_49 (joined (portRef O (instanceRef DSACK1_INT_1_i)) (portRef D (instanceRef DSACK1_INT)) )) - (net N_49 (joined + (net N_50 (joined (portRef O (instanceRef DS_000_DMA_1_i)) (portRef D (instanceRef DS_000_DMA)) )) - (net N_51 (joined + (net N_52 (joined (portRef O (instanceRef IPL_D0_0_i_0)) (portRef D (instanceRef IPL_D0_0)) )) - (net N_52 (joined + (net N_53 (joined (portRef O (instanceRef IPL_D0_0_i_1)) (portRef D (instanceRef IPL_D0_1)) )) - (net N_53 (joined + (net N_54 (joined (portRef O (instanceRef IPL_D0_0_i_2)) (portRef D (instanceRef IPL_D0_2)) )) - (net N_54 (joined + (net N_55 (joined (portRef O (instanceRef VPA_D_0_i)) (portRef D (instanceRef VPA_D)) )) - (net N_55 (joined + (net N_56 (joined (portRef O (instanceRef DTACK_D0_0_i)) (portRef D (instanceRef DTACK_D0)) )) - (net N_57 (joined + (net N_58 (joined (portRef O (instanceRef RESET_OUT_2_0_0_i)) (portRef D (instanceRef RESET_OUT)) )) - (net N_58 (joined + (net N_59 (joined (portRef O (instanceRef DS_000_ENABLE_1)) (portRef D (instanceRef DS_000_ENABLE)) )) (net (rename SM_AMIGA_nss_i_0 "SM_AMIGA_nss_i[0]") (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_i_0)) + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_i_0)) (portRef D (instanceRef SM_AMIGA_i_7)) )) (net (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (joined (portRef Q (instanceRef SM_AMIGA_i_7)) - (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_0_o3)) + (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_o3)) (portRef I0 (instanceRef SM_AMIGA_i_i_7)) - (portRef I1 (instanceRef un1_SM_AMIGA_1_i_a2_3_a3_2)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_i_a3_6)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_i_0_a3_6)) )) (net (rename SM_AMIGA_nss_2 "SM_AMIGA_nss[2]") (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_i_5)) + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_i_5)) (portRef D (instanceRef SM_AMIGA_5)) )) (net (rename SM_AMIGA_nss_3 "SM_AMIGA_nss[3]") (joined @@ -1478,635 +1485,351 @@ (portRef D (instanceRef SM_AMIGA_4)) )) (net (rename SM_AMIGA_nss_4 "SM_AMIGA_nss[4]") (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_i_3)) + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_i_3)) (portRef D (instanceRef SM_AMIGA_3)) )) (net (rename SM_AMIGA_nss_5 "SM_AMIGA_nss[5]") (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_i_2)) + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_i_2)) (portRef D (instanceRef SM_AMIGA_2)) )) (net (rename SM_AMIGA_nss_6 "SM_AMIGA_nss[6]") (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_i_1)) + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_i_1)) (portRef D (instanceRef SM_AMIGA_1)) )) (net (rename SM_AMIGA_nss_7 "SM_AMIGA_nss[7]") (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_i_0)) + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_o3_i_0)) (portRef D (instanceRef SM_AMIGA_0)) )) - (net N_263 (joined - (portRef O (instanceRef G_111)) + (net N_113 (joined + (portRef O (instanceRef G_112)) (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_x2)) - (portRef I0 (instanceRef N_263_i)) + (portRef I0 (instanceRef N_113_i)) )) - (net N_241 (joined - (portRef O (instanceRef G_116)) - (portRef I0 (instanceRef N_241_i)) - )) - (net N_242 (joined + (net N_244 (joined (portRef O (instanceRef G_117)) - (portRef I0 (instanceRef N_242_i)) + (portRef I0 (instanceRef N_244_i)) )) - (net N_243 (joined + (net N_245 (joined (portRef O (instanceRef G_118)) - (portRef I0 (instanceRef N_243_i)) + (portRef I0 (instanceRef N_245_i)) )) - (net (rename pos_clk_un23_bgack_030_int_i_0 "pos_clk.un23_bgack_030_int_i_0") (joined - (portRef O (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_o3_i)) + (net N_246 (joined + (portRef O (instanceRef G_119)) + (portRef I0 (instanceRef N_246_i)) + )) + (net (rename pos_clk_un21_bgack_030_int_i_0 "pos_clk.un21_bgack_030_int_i_0") (joined + (portRef O (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_o3_i)) (portRef I0 (instanceRef AS_000_DMA_0_m)) )) - (net N_272 (joined - (portRef O (instanceRef AS_000_DMA_1_sqmuxa_i_0_i)) - (portRef I1 (instanceRef AS_000_DMA_0_m)) - (portRef I0 (instanceRef AS_000_DMA_0_r)) - )) - (net N_273 (joined - (portRef O (instanceRef DS_000_DMA_2_sqmuxa_i_0_i)) - (portRef I1 (instanceRef DS_000_DMA_0_m)) - (portRef I0 (instanceRef DS_000_DMA_0_r)) - )) - (net N_101 (joined - (portRef O (instanceRef pos_clk_CYCLE_DMA_5_1_i_o2_0_o3_i)) - (portRef D (instanceRef BGACK_030_INT_D)) - )) - (net N_313 (joined - (portRef O (instanceRef un13_ciin_i_0_i)) - (portRef OE (instanceRef CIIN)) - )) - (net N_315 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_i_i_6)) - (portRef D (instanceRef SM_AMIGA_6)) - )) - (net N_107 (joined - (portRef O (instanceRef AS_030_D0_0_i_a2_i_i)) - (portRef D (instanceRef AS_030_D0)) - )) - (net N_108 (joined - (portRef O (instanceRef N_170_i_0_o2_i_o2_i)) - (portRef I1 (instanceRef cpu_est_0_1__m)) - (portRef I0 (instanceRef cpu_est_0_1__r)) - (portRef I1 (instanceRef cpu_est_0_2__m)) - (portRef I0 (instanceRef cpu_est_0_2__r)) - (portRef I1 (instanceRef cpu_est_0_3__m)) - (portRef I0 (instanceRef cpu_est_0_3__r)) - (portRef I0 (instanceRef cpu_est_0_i_i_a3_0)) - (portRef I0 (instanceRef RST_DLY_e2_i_0_a3_1)) - (portRef I0 (instanceRef RST_DLY_e2_i_0_a2_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a3_1_5)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a3_1_1)) - )) - (net N_319 (joined - (portRef O (instanceRef N_88_i_0_o2_i)) - (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_a3)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a2_0_0)) - )) - (net N_142 (joined - (portRef O (instanceRef DSACK1_INT_1_sqmuxa_i_0_o2_0_i)) - (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_i_0_a2_1)) - )) - (net N_144 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_o2_i_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_a3_0)) - )) - (net N_322 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_o2_0_i)) - (portRef I1 (instanceRef RST_DLY_e2_i_0_a3_1_0)) - )) - (net N_169 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_o2_i_2)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_o2_3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a3_1_2)) - )) - (net N_195 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_o2_i_3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a3_3)) - )) - (net N_323 (joined - (portRef O (instanceRef CLK_030_H_2_i_0_o2_i)) - (portRef I1 (instanceRef CLK_030_H_2_i_0_a3)) - )) - (net N_209 (joined - (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__p)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_HIGH)) - )) - (net N_218 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_a3)) - (portRef I0 (instanceRef N_218_i)) - )) - (net N_224 (joined - (portRef O (instanceRef RST_DLY_e1_i_0_a3_1)) - (portRef I0 (instanceRef N_224_i)) - )) - (net N_226 (joined - (portRef O (instanceRef RST_DLY_e0_i_a3)) - (portRef I0 (instanceRef N_226_i)) - )) - (net N_331 (joined - (portRef O (instanceRef RST_DLY_e0_i_a3_0)) - (portRef I0 (instanceRef N_331_i)) - )) - (net N_229 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a3_0)) - (portRef I0 (instanceRef N_229_i)) - )) - (net N_230 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a3_0_0)) - (portRef I0 (instanceRef N_230_i)) - )) - (net N_231 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a3_1)) - (portRef I0 (instanceRef N_231_i)) - )) - (net N_232 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a3_0_1)) - (portRef I0 (instanceRef N_232_i)) - )) - (net N_233 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a3_2)) - (portRef I0 (instanceRef N_233_i)) - )) - (net N_234 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a3_0_2)) - (portRef I0 (instanceRef N_234_i)) - )) - (net N_235 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a3_3)) - (portRef I0 (instanceRef N_235_i)) - )) - (net N_236 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a3_0_3)) - (portRef I0 (instanceRef N_236_i)) - )) - (net N_238 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a3_5)) - (portRef I0 (instanceRef N_238_i)) - )) - (net N_239 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a3_0_5)) - (portRef I0 (instanceRef N_239_i)) - )) - (net N_240 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_i_a3_6)) - (portRef I0 (instanceRef N_240_i)) - )) - (net N_251 (joined - (portRef O (instanceRef cpu_est_2_0_0_a3_1_1)) - (portRef I0 (instanceRef N_251_i)) - )) - (net N_262 (joined - (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_a3)) - (portRef I0 (instanceRef N_262_i)) - )) - (net N_341 (joined - (portRef O (instanceRef CLK_030_H_2_i_0_a3)) - (portRef I0 (instanceRef N_341_i)) - )) - (net N_268 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_a3_4)) - (portRef I0 (instanceRef N_268_i)) - )) - (net N_269 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_a3_0_4)) - (portRef I0 (instanceRef N_269_i)) - )) - (net N_282 (joined - (portRef O (instanceRef AMIGA_BUS_DATA_DIR_0_0_0_a3_0)) - (portRef I0 (instanceRef N_282_i)) - )) - (net N_346 (joined - (portRef O (instanceRef pos_clk_DS_000_DMA_4_f0_0_0_a3)) - (portRef I0 (instanceRef N_346_i)) - )) - (net N_290 (joined - (portRef O (instanceRef DS_000_DMA_2_sqmuxa_i_0_a3)) - (portRef I0 (instanceRef N_290_i)) - )) - (net N_310 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a2_1)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a2_0_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_a2_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_a3_0_0)) - (portRef I0 (instanceRef N_310_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a3_1_5)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a3_1_1)) - )) - (net N_311 (joined - (portRef O (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_a2)) - (portRef I0 (instanceRef N_311_i)) - )) - (net N_355 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_a2_0)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a3_3)) - (portRef I0 (instanceRef N_355_i)) - )) - (net N_356 (joined - (portRef O (instanceRef DSACK1_INT_1_sqmuxa_i_0_a2)) - (portRef I0 (instanceRef N_356_i)) - )) - (net N_359 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a2_0_1)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a3_0_5)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a3_0_3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a3_0_1)) - (portRef I0 (instanceRef N_359_i)) - )) - (net N_360 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a2_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a3_0_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_a3_0_4)) - (portRef I0 (instanceRef RESET_OUT_2_0_0_a3_0)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_a3_1_0)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a3_1_2)) - )) - (net N_365 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a2_0_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a3_0_2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a3_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_a3_4)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_a3_1_6)) - )) - (net N_366 (joined - (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_0_a2)) - (portRef I0 (instanceRef N_366_i)) - )) - (net N_110_i (joined - (portRef O (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_x2)) - (portRef I0 (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_o3_2)) - )) - (net N_210_i (joined - (portRef O (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_x2)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_1)) - )) - (net N_248 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3)) - (portRef I0 (instanceRef N_248_i)) - )) - (net N_249 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0)) - (portRef I0 (instanceRef N_249_i)) - )) - (net N_369 (joined - (portRef O (instanceRef cpu_est_2_0_0_0_a2_2)) - (portRef I0 (instanceRef N_369_i)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_1)) - )) - (net N_196 (joined - (portRef O (instanceRef cpu_est_2_i_i_i_o2_i_3)) - (portRef I0 (instanceRef cpu_est_2_i_i_i_a3_3)) - )) - (net N_186 (joined - (portRef O (instanceRef un5_e_0_i_o2_0_i)) - (portRef I0 (instanceRef un5_e_0_i_a3)) - )) - (net N_361 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a2_2)) - (portRef I0 (instanceRef N_361_i)) - )) - (net N_362 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a2_0_2)) - (portRef I0 (instanceRef N_362_i)) - )) - (net N_151 (joined - (portRef O (instanceRef un5_e_0_i_o2_i)) - (portRef I0 (instanceRef un5_e_0_i_a3_0)) - )) - (net N_321 (joined - (portRef O (instanceRef cpu_est_2_0_0_0_o2_i_2)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_a3_2)) - )) - (net N_266 (joined - (portRef O (instanceRef RESET_OUT_2_0_0_a3)) - (portRef I0 (instanceRef N_266_i)) - )) - (net N_267 (joined - (portRef O (instanceRef RESET_OUT_2_0_0_a3_0)) - (portRef I0 (instanceRef N_267_i)) - )) - (net N_255 (joined - (portRef O (instanceRef un5_e_0_i_a3)) - (portRef I0 (instanceRef N_255_i)) - )) - (net N_256 (joined - (portRef O (instanceRef un5_e_0_i_a3_0)) - (portRef I0 (instanceRef N_256_i)) - )) - (net N_253 (joined - (portRef O (instanceRef cpu_est_2_0_0_0_a3_2)) - (portRef I0 (instanceRef N_253_i)) - )) - (net N_254 (joined - (portRef O (instanceRef cpu_est_2_i_i_i_a3_3)) - (portRef I0 (instanceRef N_254_i)) - )) - (net (rename cpu_est_2_2 "cpu_est_2[2]") (joined - (portRef O (instanceRef cpu_est_2_0_0_0_i_2)) - (portRef I0 (instanceRef cpu_est_0_2__n)) - )) - (net (rename cpu_est_2_1 "cpu_est_2[1]") (joined - (portRef O (instanceRef cpu_est_2_0_0_0_i_1)) - (portRef I0 (instanceRef cpu_est_0_1__n)) - )) - (net N_250 (joined - (portRef O (instanceRef cpu_est_2_0_0_0_a3_1)) - (portRef I0 (instanceRef N_250_i)) - )) - (net (rename pos_clk_un9_clk_000_pe "pos_clk.un9_clk_000_pe") (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_i)) - (portRef I1 (instanceRef VMA_INT_0_m)) - (portRef I0 (instanceRef VMA_INT_0_r)) - )) - (net N_364 (joined - (portRef O (instanceRef RESET_OUT_1_sqmuxa_i_0_126_0_a2)) - (portRef I1 (instanceRef RESET_OUT_2_0_0_a3_0)) - (portRef I1 (instanceRef RST_DLY_e2_i_0_a3_0)) - (portRef I0 (instanceRef N_364_i)) - )) - (net N_21 (joined - (portRef O (instanceRef VMA_INT_0_p)) - (portRef I0 (instanceRef N_21_i)) - )) - (net N_171 (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_o2_i_0)) - (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_0)) - )) - (net (rename pos_clk_SIZE_DMA_6_1 "pos_clk.SIZE_DMA_6[1]") (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_i_1)) - (portRef I0 (instanceRef SIZE_DMA_0_1__n)) - )) - (net N_345 (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_1)) - (portRef I0 (instanceRef N_345_i)) - )) - (net (rename pos_clk_SIZE_DMA_6_0 "pos_clk.SIZE_DMA_6[0]") (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_i_0)) - (portRef I0 (instanceRef SIZE_DMA_0_0__n)) - )) - (net N_283 (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_0)) - (portRef I0 (instanceRef N_283_i)) - )) - (net (rename pos_clk_un6_bgack_000 "pos_clk.un6_bgack_000") (joined - (portRef O (instanceRef pos_clk_un6_bgack_000_0_i)) - (portRef I1 (instanceRef BGACK_030_INT_0_m)) - (portRef I0 (instanceRef BGACK_030_INT_0_r)) - )) - (net N_370 (joined - (portRef O (instanceRef pos_clk_un6_bgack_000_0_a2)) - (portRef I0 (instanceRef N_370_i)) - )) - (net N_259 (joined - (portRef O (instanceRef SIZE_DMA_3_sqmuxa_i_i_a3)) - (portRef I1 (instanceRef SIZE_DMA_0_0__m)) - (portRef I0 (instanceRef SIZE_DMA_0_0__r)) - (portRef I1 (instanceRef SIZE_DMA_0_1__m)) - (portRef I0 (instanceRef SIZE_DMA_0_1__r)) - )) - (net N_10 (joined - (portRef O (instanceRef BGACK_030_INT_0_p)) - (portRef I0 (instanceRef N_10_i)) - )) - (net (rename pos_clk_un9_bg_030 "pos_clk.un9_bg_030") (joined - (portRef O (instanceRef pos_clk_un9_bg_030_i)) - (portRef I1 (instanceRef BG_000_0_m)) - (portRef I0 (instanceRef BG_000_0_r)) - )) - (net N_4 (joined - (portRef O (instanceRef DSACK1_INT_0_p)) - (portRef I0 (instanceRef N_4_i)) - )) - (net N_114 (joined - (portRef O (instanceRef DSACK1_INT_1_sqmuxa_i_0_a3)) - (portRef I0 (instanceRef N_114_i)) - )) - (net N_278 (joined - (portRef O (instanceRef DSACK1_INT_1_sqmuxa_i_0_i)) + (net N_280 (joined + (portRef O (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_i)) (portRef I1 (instanceRef DSACK1_INT_0_m)) (portRef I0 (instanceRef DSACK1_INT_0_r)) )) - (net N_5 (joined - (portRef O (instanceRef AS_000_INT_0_p)) - (portRef I0 (instanceRef N_5_i)) - )) - (net N_113 (joined - (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_0_a3)) - (portRef I0 (instanceRef N_113_i)) - )) - (net N_279 (joined + (net N_281 (joined (portRef O (instanceRef AS_000_INT_1_sqmuxa_i_0_i)) (portRef I1 (instanceRef AS_000_INT_0_m)) (portRef I0 (instanceRef AS_000_INT_0_r)) )) - (net N_6 (joined - (portRef O (instanceRef DS_000_ENABLE_0_p)) - (portRef I0 (instanceRef DS_000_ENABLE_1)) + (net N_85 (joined + (portRef O (instanceRef AS_000_INT_1_sqmuxa_i_0_a3)) + (portRef I0 (instanceRef N_85_i)) )) - (net N_115 (joined - (portRef O (instanceRef un1_SM_AMIGA_1_i_a2_3_a3)) - (portRef I0 (instanceRef DS_000_ENABLE_0_m)) - (portRef I0 (instanceRef N_115_i)) + (net N_86 (joined + (portRef O (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_a3)) + (portRef I0 (instanceRef N_86_i)) )) - (net N_63 (joined - (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa_1_i_0_i)) - (portRef I1 (instanceRef DS_000_ENABLE_0_m)) - (portRef I0 (instanceRef DS_000_ENABLE_0_r)) + (net N_305 (joined + (portRef O (instanceRef AS_000_DMA_1_sqmuxa_i_0_i)) + (portRef I1 (instanceRef AS_000_DMA_0_m)) + (portRef I0 (instanceRef AS_000_DMA_0_r)) )) - (net N_7 (joined - (portRef O (instanceRef AS_030_000_SYNC_0_p)) - (portRef I0 (instanceRef N_7_i)) + (net N_306 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_i_0_i_6)) + (portRef D (instanceRef SM_AMIGA_6)) )) - (net (rename pos_clk_un3_as_030_d0 "pos_clk.un3_as_030_d0") (joined - (portRef O (instanceRef pos_clk_un3_as_030_d0_0_o2_0_o3_i)) - (portRef I0 (instanceRef AS_030_000_SYNC_0_m)) + (net N_307 (joined + (portRef O (instanceRef DS_000_DMA_2_sqmuxa_i_0_i)) + (portRef I1 (instanceRef DS_000_DMA_0_m)) + (portRef I0 (instanceRef DS_000_DMA_0_r)) )) - (net N_67 (joined + (net N_310 (joined + (portRef O (instanceRef un13_ciin_i_0_0_i)) + (portRef OE (instanceRef CIIN)) + )) + (net N_66 (joined (portRef O (instanceRef pos_clk_un37_as_030_d0_i_i_i)) (portRef I1 (instanceRef AS_030_000_SYNC_0_m)) (portRef I0 (instanceRef AS_030_000_SYNC_0_r)) )) - (net N_18 (joined - (portRef O (instanceRef RW_000_INT_0_p)) - (portRef I0 (instanceRef N_18_i)) + (net N_133 (joined + (portRef O (instanceRef AS_030_D0_0_i_a2_i_i)) + (portRef D (instanceRef AS_030_D0)) )) - (net (rename pos_clk_RW_000_INT_5 "pos_clk.RW_000_INT_5") (joined - (portRef O (instanceRef pos_clk_RW_000_INT_5_0_i)) - (portRef I0 (instanceRef RW_000_INT_0_m)) + (net N_136 (joined + (portRef O (instanceRef CLK_000_NE_0_o2_i_o2_i_o2_i_o2_i)) + (portRef I1 (instanceRef cpu_est_0_3__m)) + (portRef I0 (instanceRef cpu_est_0_3__r)) + (portRef I1 (instanceRef cpu_est_0_2__m)) + (portRef I0 (instanceRef cpu_est_0_2__r)) + (portRef I1 (instanceRef cpu_est_0_1__m)) + (portRef I0 (instanceRef cpu_est_0_1__r)) + (portRef I0 (instanceRef cpu_est_0_0_0_a3_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_a3_1)) + (portRef I0 (instanceRef RST_DLY_e2_i_0_a3_1)) + (portRef I0 (instanceRef RST_DLY_e2_i_0_a2_0)) + (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_o2_1_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_a3_1_5)) )) - (net un1_SM_AMIGA_0_sqmuxa_1 (joined - (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_0_i)) - (portRef I1 (instanceRef RW_000_INT_0_m)) - (portRef I0 (instanceRef RW_000_INT_0_r)) + (net N_137 (joined + (portRef O (instanceRef N_312_i_0_o2_i)) + (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_a3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_a2_2)) )) - (net N_22 (joined - (portRef O (instanceRef A0_DMA_0_p)) - (portRef I0 (instanceRef N_22_i)) + (net N_143 (joined + (portRef O (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_o2_1_i)) + (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_a2_1)) )) - (net (rename pos_clk_A0_DMA_3 "pos_clk.A0_DMA_3") (joined - (portRef O (instanceRef pos_clk_A0_DMA_3_0_a2_0_a3)) - (portRef I0 (instanceRef A0_DMA_0_n)) + (net N_147 (joined + (portRef O (instanceRef RST_DLY_e2_i_0_o2_0_i)) + (portRef I0 (instanceRef RST_DLY_e2_i_0_a3_1_0)) )) - (net N_363 (joined + (net N_161 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_o2_2_i_0)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_o2_3)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_1_1_0)) + )) + (net N_169 (joined + (portRef O (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_o3_i)) + (portRef D (instanceRef BGACK_030_INT_D)) + )) + (net N_174 (joined + (portRef O (instanceRef CLK_030_H_2_i_0_o2_i)) + (portRef I1 (instanceRef CLK_030_H_2_i_0_a3)) + )) + (net N_178 (joined + (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__p)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_HIGH)) + )) + (net N_184 (joined + (portRef O (instanceRef RST_DLY_e2_i_0_a3)) + (portRef I0 (instanceRef N_184_i)) + )) + (net N_190 (joined + (portRef O (instanceRef RST_DLY_e1_i_0_a3_1)) + (portRef I0 (instanceRef N_190_i)) + )) + (net N_193 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a3_1_0)) + (portRef I0 (instanceRef N_193_i)) + )) + (net N_195 (joined + (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_a3)) + (portRef I0 (instanceRef N_195_i)) + )) + (net N_197 (joined + (portRef O (instanceRef CLK_030_H_2_i_0_a3)) + (portRef I0 (instanceRef N_197_i)) + )) + (net N_200 (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_a3_2)) + (portRef I0 (instanceRef N_200_i)) + )) + (net N_205 (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_a3_5)) + (portRef I0 (instanceRef N_205_i)) + )) + (net N_206 (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_a3_0_5)) + (portRef I0 (instanceRef N_206_i)) + )) + (net N_208 (joined + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_0_0_0_a3_0)) + (portRef I0 (instanceRef N_208_i)) + )) + (net N_211 (joined + (portRef O (instanceRef pos_clk_DS_000_DMA_4_f0_0_0_a3)) + (portRef I0 (instanceRef N_211_i)) + )) + (net N_212 (joined + (portRef O (instanceRef DS_000_DMA_2_sqmuxa_i_0_a3)) + (portRef I0 (instanceRef N_212_i)) + )) + (net N_213 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_i_0_a3_6)) + (portRef I0 (instanceRef N_213_i)) + )) + (net N_223 (joined + (portRef O (instanceRef cpu_est_2_0_0_a3_1_1)) + (portRef I0 (instanceRef N_223_i)) + )) + (net N_229 (joined + (portRef O (instanceRef pos_clk_un37_as_030_d0_i_i_a3)) + (portRef I0 (instanceRef N_229_i)) + )) + (net N_236 (joined + (portRef O (instanceRef RST_DLY_e0_i_0_a3)) + (portRef I0 (instanceRef N_236_i)) + )) + (net N_237 (joined + (portRef O (instanceRef RST_DLY_e0_i_0_a3_0)) + (portRef I0 (instanceRef N_237_i)) + )) + (net N_243 (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_a2_5)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_0)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_a2_2)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_2_0)) + (portRef I0 (instanceRef N_243_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_a3_1_5)) + )) + (net N_396 (joined + (portRef O (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_a2)) + (portRef I0 (instanceRef N_396_i)) + )) + (net N_250 (joined + (portRef O (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_a2)) + (portRef I0 (instanceRef N_250_i)) + )) + (net N_253 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a2_3_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_a3_0_4)) + (portRef I0 (instanceRef RESET_OUT_2_0_0_a3_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_0_0)) + (portRef I0 (instanceRef N_253_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_i_0_a3_0_1_6)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_2_1_0_0)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_1_1_0)) + )) + (net N_254 (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_a2_1)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_a3_0_5)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_a3_0_1)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_a3_0_3)) + (portRef I0 (instanceRef N_254_i)) + )) + (net N_257 (joined (portRef O (instanceRef SIZE_DMA_3_sqmuxa_i_o2_i_a2)) + (portRef I0 (instanceRef SIZE_DMA_3_sqmuxa_i_i_a3)) + (portRef I1 (instanceRef RW_000_DMA_0_m)) + (portRef I0 (instanceRef RW_000_DMA_0_r)) (portRef I1 (instanceRef A0_DMA_0_m)) (portRef I0 (instanceRef A0_DMA_0_r)) - (portRef I0 (instanceRef SIZE_DMA_3_sqmuxa_i_i_a3)) (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_m)) (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_r)) (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_m)) (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_r)) - (portRef I1 (instanceRef RW_000_DMA_0_m)) - (portRef I0 (instanceRef RW_000_DMA_0_r)) (portRef I1 (instanceRef pos_clk_un37_as_030_d0_i_i_a3_1)) )) - (net N_26 (joined - (portRef O (instanceRef BG_000_0_p)) - (portRef I0 (instanceRef N_26_i)) - )) - (net N_157 (joined - (portRef O (instanceRef pos_clk_un37_as_030_d0_i_a2_1)) - (portRef I0 (instanceRef N_157_i)) - (portRef I1 (instanceRef un22_berr_0_a2_0_a3)) - (portRef I1 (instanceRef un21_fpu_cs_0_a2_0_a3_1)) + (net N_259 (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_a2_2)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_a3_2)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_a3_4)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_1_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_0_a3_1_6)) )) (net N_260 (joined - (portRef O (instanceRef pos_clk_un37_as_030_d0_i_i_a3)) + (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_a2)) (portRef I0 (instanceRef N_260_i)) )) + (net N_138_i (joined + (portRef O (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_x2)) + (portRef I0 (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_o3_2)) + )) + (net N_402 (joined + (portRef O (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_x2)) + (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0)) + )) (net un22_berr_1 (joined (portRef O (instanceRef un22_berr_0_a2_0_a3_1)) (portRef I0 (instanceRef un22_berr_0_a2_0_a3_1_0)) (portRef I1 (instanceRef un21_fpu_cs_0_a2_0_a3)) )) - (net N_219 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_a3_0)) - (portRef I0 (instanceRef N_219_i)) + (net N_124 (joined + (portRef O (instanceRef pos_clk_un37_as_030_d0_i_a2_1)) + (portRef I1 (instanceRef un22_berr_0_a2_0_a3_1)) + (portRef I0 (instanceRef N_124_i)) )) - (net N_139 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_o2_i)) - (portRef I0 (instanceRef RST_DLY_e0_i_a3)) - (portRef I0 (instanceRef RST_DLY_e1_i_0_a3)) - (portRef I0 (instanceRef RST_DLY_e2_i_0_a3_0)) + (net N_164 (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_o2_i_0)) + (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_0)) )) - (net N_220 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_a3_1)) - (portRef I0 (instanceRef N_220_i)) + (net (rename pos_clk_RW_000_INT_5 "pos_clk.RW_000_INT_5") (joined + (portRef O (instanceRef pos_clk_RW_000_INT_5_0_0_i)) + (portRef I0 (instanceRef RW_000_INT_0_m)) )) - (net N_222 (joined - (portRef O (instanceRef RST_DLY_e1_i_0_a3)) - (portRef I0 (instanceRef N_222_i)) + (net un1_SM_AMIGA_0_sqmuxa_1 (joined + (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_i)) + (portRef I1 (instanceRef RW_000_INT_0_m)) + (portRef I0 (instanceRef RW_000_INT_0_r)) )) - (net N_223 (joined - (portRef O (instanceRef RST_DLY_e1_i_0_a3_0)) - (portRef I0 (instanceRef N_223_i)) + (net (rename pos_clk_un6_bgack_000 "pos_clk.un6_bgack_000") (joined + (portRef O (instanceRef pos_clk_un6_bgack_000_0_0_i)) + (portRef I1 (instanceRef BGACK_030_INT_0_m)) + (portRef I0 (instanceRef BGACK_030_INT_0_r)) )) - (net N_368 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_a2_0)) - (portRef I0 (instanceRef RST_DLY_e0_i_a3_0)) - (portRef I0 (instanceRef RST_DLY_e1_i_0_a3_0)) + (net N_268 (joined + (portRef O (instanceRef pos_clk_un6_bgack_000_0_0_a2)) + (portRef I0 (instanceRef N_268_i)) )) - (net N_257 (joined - (portRef O (instanceRef cpu_est_0_i_i_a3_0)) - (portRef I0 (instanceRef N_257_i)) + (net (rename pos_clk_SIZE_DMA_6_1 "pos_clk.SIZE_DMA_6[1]") (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_i_1)) + (portRef I0 (instanceRef SIZE_DMA_0_1__n)) )) - (net N_258 (joined - (portRef O (instanceRef cpu_est_0_i_i_a3_0_0)) - (portRef I0 (instanceRef N_258_i)) + (net N_210 (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_1)) + (portRef I0 (instanceRef N_210_i)) )) - (net N_312 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_a2)) - (portRef I0 (instanceRef N_312_i)) + (net (rename pos_clk_SIZE_DMA_6_0 "pos_clk.SIZE_DMA_6[0]") (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_i_0)) + (portRef I0 (instanceRef SIZE_DMA_0_0__n)) )) - (net N_143 (joined - (portRef O (instanceRef un1_SM_AMIGA_1_i_a2_3_o2_i)) - (portRef I0 (instanceRef un1_SM_AMIGA_1_i_a2_3_a3_1)) + (net N_209 (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_0)) + (portRef I0 (instanceRef N_209_i)) )) - (net N_332 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_i_a3_0_6)) - (portRef I0 (instanceRef N_332_i)) - )) - (net N_332_4 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_a3_2_5_0)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_a3_2_3_0)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_i_a3_0_1_6)) - )) - (net N_246 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_a3_2_0)) - (portRef I0 (instanceRef N_246_i)) - )) - (net N_180 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_o2_1_i_0)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_a3_0)) - )) - (net N_320 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_o2_0_i_0)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_a3_0_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_a3_1_0)) - )) - (net N_244 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_a3_1_0)) - (portRef I0 (instanceRef N_244_i)) - )) - (net N_334 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_a3_0)) - (portRef I0 (instanceRef N_334_i)) - )) - (net N_335 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_a3_0_0)) - (portRef I0 (instanceRef N_335_i)) - )) - (net N_159 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_o2_2_i_0)) - (portRef I0 (instanceRef un1_SM_AMIGA_1_i_a2_3_o2)) - )) - (net N_156 (joined - (portRef O (instanceRef DSACK1_INT_1_sqmuxa_i_0_o2_i)) - (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_i_0_a3)) - )) - (net N_357 (joined - (portRef O (instanceRef DSACK1_INT_1_sqmuxa_i_0_a2_0)) - (portRef I0 (instanceRef N_357_i)) - )) - (net N_353 (joined - (portRef O (instanceRef un1_SM_AMIGA_1_i_a2_3_a2)) - (portRef I0 (instanceRef N_353_i)) - )) - (net N_140 (joined - (portRef O (instanceRef un1_SM_AMIGA_1_i_a2_3_o2_0_i)) - (portRef I0 (instanceRef un1_SM_AMIGA_1_i_a2_3_a2)) - )) - (net N_270 (joined + (net N_207 (joined (portRef O (instanceRef AMIGA_BUS_DATA_DIR_0_0_0_a3)) - (portRef I0 (instanceRef N_270_i)) + (portRef I0 (instanceRef N_207_i)) )) - (net N_281 (joined + (net N_311 (joined (portRef O (instanceRef un14_amiga_bus_data_dir_i_0_0_i)) (portRef I0 (instanceRef RW_000_DMA_0_n)) )) - (net N_131 (joined + (net N_102 (joined (portRef O (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i_a2_0_a3)) - (portRef I0 (instanceRef N_131_i)) + (portRef I0 (instanceRef N_102_i)) )) - (net N_132 (joined + (net N_103 (joined (portRef O (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i_a2_0_a3)) - (portRef I0 (instanceRef N_132_i)) + (portRef I0 (instanceRef N_103_i)) )) - (net N_29 (joined - (portRef O (instanceRef IPL_030_0_2__p)) - (portRef I0 (instanceRef N_29_i)) + (net N_228 (joined + (portRef O (instanceRef SIZE_DMA_3_sqmuxa_i_i_a3)) + (portRef I1 (instanceRef SIZE_DMA_0_0__m)) + (portRef I0 (instanceRef SIZE_DMA_0_0__r)) + (portRef I1 (instanceRef SIZE_DMA_0_1__m)) + (portRef I0 (instanceRef SIZE_DMA_0_1__r)) )) - (net N_28 (joined - (portRef O (instanceRef IPL_030_0_1__p)) - (portRef I0 (instanceRef N_28_i)) + (net (rename pos_clk_A0_DMA_3 "pos_clk.A0_DMA_3") (joined + (portRef O (instanceRef pos_clk_A0_DMA_3_0_a2_0_a3)) + (portRef I0 (instanceRef A0_DMA_0_n)) )) - (net N_17 (joined - (portRef O (instanceRef LDS_000_INT_0_p)) - (portRef I0 (instanceRef N_17_i)) + (net N_10 (joined + (portRef O (instanceRef BGACK_030_INT_0_p)) + (portRef I0 (instanceRef N_10_i)) + )) + (net N_18 (joined + (portRef O (instanceRef RW_000_INT_0_p)) + (portRef I0 (instanceRef N_18_i)) )) (net N_19 (joined (portRef O (instanceRef RW_000_DMA_0_p)) (portRef I0 (instanceRef N_19_i)) )) - (net N_23 (joined - (portRef O (instanceRef UDS_000_INT_0_p)) - (portRef I0 (instanceRef N_23_i)) + (net N_22 (joined + (portRef O (instanceRef A0_DMA_0_p)) + (portRef I0 (instanceRef N_22_i)) )) (net N_24 (joined (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_p)) @@ -2116,6 +1839,263 @@ (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_p)) (portRef I0 (instanceRef N_25_i)) )) + (net (rename pos_clk_un9_bg_030 "pos_clk.un9_bg_030") (joined + (portRef O (instanceRef pos_clk_un9_bg_030_i)) + (portRef I1 (instanceRef BG_000_0_m)) + (portRef I0 (instanceRef BG_000_0_r)) + )) + (net N_26 (joined + (portRef O (instanceRef BG_000_0_p)) + (portRef I0 (instanceRef N_26_i)) + )) + (net N_214 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_i_0_a3_0_6)) + (portRef I0 (instanceRef N_214_i)) + )) + (net N_214_1 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a3_2_1_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_0_a3_0_1_6)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_2_1_0_0)) + )) + (net N_21 (joined + (portRef O (instanceRef VMA_INT_0_p)) + (portRef I0 (instanceRef N_21_i)) + )) + (net (rename pos_clk_un9_clk_000_pe "pos_clk.un9_clk_000_pe") (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_i)) + (portRef I1 (instanceRef VMA_INT_0_m)) + (portRef I0 (instanceRef VMA_INT_0_r)) + )) + (net (rename cpu_est_2_1 "cpu_est_2[1]") (joined + (portRef O (instanceRef cpu_est_2_0_0_0_i_1)) + (portRef I0 (instanceRef cpu_est_0_1__n)) + )) + (net (rename cpu_est_2_2 "cpu_est_2[2]") (joined + (portRef O (instanceRef cpu_est_2_0_0_0_i_2)) + (portRef I0 (instanceRef cpu_est_0_2__n)) + )) + (net N_185 (joined + (portRef O (instanceRef RST_DLY_e2_i_0_a3_0)) + (portRef I0 (instanceRef N_185_i)) + )) + (net N_142 (joined + (portRef O (instanceRef RST_DLY_e2_i_0_o2_i)) + (portRef I0 (instanceRef RST_DLY_e2_i_0_a3_0)) + (portRef I0 (instanceRef RST_DLY_e0_i_0_a3)) + (portRef I0 (instanceRef RST_DLY_e1_i_0_a3)) + )) + (net N_258 (joined + (portRef O (instanceRef RESET_OUT_1_sqmuxa_i_0_127_1_a2)) + (portRef I1 (instanceRef RST_DLY_e2_i_0_a3_0)) + (portRef I0 (instanceRef N_258_i)) + (portRef I1 (instanceRef RESET_OUT_2_0_0_a3_0)) + )) + (net N_186 (joined + (portRef O (instanceRef RST_DLY_e2_i_0_a3_1)) + (portRef I0 (instanceRef N_186_i)) + )) + (net N_188 (joined + (portRef O (instanceRef RST_DLY_e1_i_0_a3)) + (portRef I0 (instanceRef N_188_i)) + )) + (net N_189 (joined + (portRef O (instanceRef RST_DLY_e1_i_0_a3_0)) + (portRef I0 (instanceRef N_189_i)) + )) + (net N_266 (joined + (portRef O (instanceRef RST_DLY_e2_i_0_a2_0)) + (portRef I0 (instanceRef RST_DLY_e0_i_0_a3_0)) + (portRef I0 (instanceRef RST_DLY_e1_i_0_a3_0)) + )) + (net N_198 (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_a3_1)) + (portRef I0 (instanceRef N_198_i)) + )) + (net N_261 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a2_2_0)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_a3_1)) + (portRef I0 (instanceRef N_261_i)) + )) + (net N_199 (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_a3_0_1)) + (portRef I0 (instanceRef N_199_i)) + )) + (net N_215 (joined + (portRef O (instanceRef cpu_est_0_0_0_a3_0)) + (portRef I0 (instanceRef N_215_i)) + )) + (net N_216 (joined + (portRef O (instanceRef cpu_est_0_0_0_a3_0_0)) + (portRef I0 (instanceRef N_216_i)) + )) + (net N_222 (joined + (portRef O (instanceRef cpu_est_2_0_0_0_a3_1)) + (portRef I0 (instanceRef N_222_i)) + )) + (net N_224 (joined + (portRef O (instanceRef cpu_est_2_0_0_0_a3_2)) + (portRef I0 (instanceRef N_224_i)) + )) + (net N_146 (joined + (portRef O (instanceRef cpu_est_2_0_0_0_o2_i_2)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_a3_2)) + )) + (net N_225 (joined + (portRef O (instanceRef cpu_est_2_i_0_0_a3_3)) + (portRef I0 (instanceRef N_225_i)) + )) + (net N_173 (joined + (portRef O (instanceRef cpu_est_2_i_0_0_o2_i_3)) + (portRef I0 (instanceRef cpu_est_2_i_0_0_a3_3)) + )) + (net N_226 (joined + (portRef O (instanceRef un5_e_i_0_a3)) + (portRef I0 (instanceRef N_226_i)) + )) + (net N_170 (joined + (portRef O (instanceRef un5_e_i_0_o2_0_i)) + (portRef I0 (instanceRef un5_e_i_0_a3)) + )) + (net N_227 (joined + (portRef O (instanceRef un5_e_i_0_a3_0)) + (portRef I0 (instanceRef N_227_i)) + )) + (net N_145 (joined + (portRef O (instanceRef un5_e_i_0_o2_i)) + (portRef I0 (instanceRef un5_e_i_0_a3_0)) + )) + (net N_151 (joined + (portRef O (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_o2_i)) + (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_a3)) + )) + (net N_397 (joined + (portRef O (instanceRef RST_DLY_e2_i_0_a2)) + (portRef I0 (instanceRef N_397_i)) + )) + (net N_251 (joined + (portRef O (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_a2_0)) + (portRef I0 (instanceRef N_251_i)) + )) + (net N_255 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a2_4_0)) + (portRef I0 (instanceRef N_255_i)) + )) + (net N_256 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a2_5_0)) + (portRef I0 (instanceRef N_256_i)) + )) + (net N_267 (joined + (portRef O (instanceRef cpu_est_2_0_0_0_a2_2)) + (portRef I0 (instanceRef N_267_i)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_1)) + )) + (net N_221 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0)) + (portRef I0 (instanceRef N_221_i)) + )) + (net N_220 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3)) + (portRef I0 (instanceRef N_220_i)) + )) + (net N_194 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a3_2_0)) + (portRef I0 (instanceRef N_194_i)) + )) + (net N_373 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_o2_0_i_0)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_0_0)) + )) + (net N_398 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a2_0)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_a3_3)) + (portRef I0 (instanceRef N_398_i)) + )) + (net N_191 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a3_0)) + (portRef I0 (instanceRef N_191_i)) + )) + (net N_192 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a3_0_0)) + (portRef I0 (instanceRef N_192_i)) + )) + (net N_172 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_o2_1_i_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_0)) + )) + (net N_171 (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_o2_i_3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_a3_3)) + )) + (net N_153 (joined + (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_o2_i)) + (portRef I1 (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_a3)) + )) + (net N_252 (joined + (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_a2)) + (portRef I0 (instanceRef N_252_i)) + )) + (net N_247 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a2_0_0)) + (portRef I0 (instanceRef N_247_i)) + )) + (net N_249 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a2_1_0)) + (portRef I0 (instanceRef N_249_i)) + )) + (net N_144 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_o2_i_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_0_0)) + )) + (net N_234 (joined + (portRef O (instanceRef RESET_OUT_2_0_0_a3)) + (portRef I0 (instanceRef N_234_i)) + )) + (net N_235 (joined + (portRef O (instanceRef RESET_OUT_2_0_0_a3_0)) + (portRef I0 (instanceRef N_235_i)) + )) + (net N_279 (joined + (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_i)) + (portRef I1 (instanceRef DS_000_ENABLE_0_m)) + (portRef I0 (instanceRef DS_000_ENABLE_0_r)) + )) + (net un1_SM_AMIGA_0_sqmuxa_2 (joined + (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_a3)) + (portRef I0 (instanceRef DS_000_ENABLE_0_m)) + (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_2_i)) + )) + (net N_203 (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_a3_4)) + (portRef I0 (instanceRef N_203_i)) + )) + (net N_204 (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_a3_0_4)) + (portRef I0 (instanceRef N_204_i)) + )) + (net N_201 (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_a3_3)) + (portRef I0 (instanceRef N_201_i)) + )) + (net N_202 (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_a3_0_3)) + (portRef I0 (instanceRef N_202_i)) + )) + (net N_28 (joined + (portRef O (instanceRef IPL_030_0_1__p)) + (portRef I0 (instanceRef N_28_i)) + )) + (net N_17 (joined + (portRef O (instanceRef LDS_000_INT_0_p)) + (portRef I0 (instanceRef N_17_i)) + )) + (net N_23 (joined + (portRef O (instanceRef UDS_000_INT_0_p)) + (portRef I0 (instanceRef N_23_i)) + )) + (net N_6 (joined + (portRef O (instanceRef DS_000_ENABLE_0_p)) + (portRef I0 (instanceRef DS_000_ENABLE_1)) + )) (net un1_amiga_bus_enable_low_i (joined (portRef O (instanceRef un1_amiga_bus_enable_low_i)) (portRef I0 (instanceRef AMIGA_BUS_ENABLE_LOW)) @@ -2124,24 +2104,6 @@ (portRef O (instanceRef un21_fpu_cs_i)) (portRef I0 (instanceRef FPU_CS)) )) - (net BGACK_030_INT_i (joined - (portRef O (instanceRef BGACK_030_INT_i)) - (portRef I0 (instanceRef un1_rw_i_a2_i)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_1_i_o2_0_o3)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_1)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_0)) - (portRef I0 (instanceRef pos_clk_A0_DMA_3_0_a2_0_a3)) - (portRef I0 (instanceRef un1_as_030_0_o3)) - (portRef I0 (instanceRef un14_amiga_bus_data_dir_i_0_0)) - (portRef I1 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i_a2_0_a3)) - (portRef I1 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i_a2_0_a3)) - (portRef I1 (instanceRef un1_amiga_bus_enable_low)) - (portRef I1 (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_o3_1)) - )) - (net AMIGA_BUS_ENABLE_DMA_LOW_i (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_i)) - (portRef I0 (instanceRef un1_amiga_bus_enable_low)) - )) (net UDS_000_INT_i (joined (portRef O (instanceRef UDS_000_INT_i)) (portRef I1 (instanceRef un4_uds_000)) @@ -2150,16 +2112,143 @@ (portRef O (instanceRef LDS_000_INT_i)) (portRef I1 (instanceRef un4_lds_000)) )) - (net N_131_i (joined - (portRef O (instanceRef N_131_i)) + (net AS_030_i (joined + (portRef O (instanceRef I_226)) + (portRef I0 (instanceRef AS_030_D0_0_i_a2_i)) + (portRef I1 (instanceRef un4_as_000)) + (portRef I1 (instanceRef un22_berr_0_a2_0_a3_1_0)) + (portRef I0 (instanceRef un21_fpu_cs_0_a2_0_a3_1)) + )) + (net AS_000_INT_i (joined + (portRef O (instanceRef AS_000_INT_i)) + (portRef I0 (instanceRef un4_as_000)) + )) + (net RESET_OUT_i (joined + (portRef O (instanceRef RESET_OUT_i)) + (portRef OE (instanceRef RESET)) + )) + (net (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (joined + (portRef O (instanceRef SM_AMIGA_i_3)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_2_0)) + )) + (net (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (joined + (portRef O (instanceRef SM_AMIGA_i_0)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_2_2_0)) + )) + (net (rename cpu_est_i_1 "cpu_est_i[1]") (joined + (portRef O (instanceRef cpu_est_i_1)) + (portRef I0 (instanceRef VMA_INT_0_m)) + (portRef I1 (instanceRef un5_e_i_0_o2)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_2)) + (portRef I1 (instanceRef cpu_est_2_0_0_a3_1_1_1)) + )) + (net (rename cpu_est_i_3 "cpu_est_i[3]") (joined + (portRef O (instanceRef cpu_est_i_3)) + (portRef I1 (instanceRef un5_e_i_0_o2_0)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_2)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_2)) + (portRef I1 (instanceRef cpu_est_2_0_0_a3_1_1)) + )) + (net VPA_D_i (joined + (portRef O (instanceRef VPA_D_i)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_4_2_0)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_2)) + )) + (net (rename RST_DLY_i_0 "RST_DLY_i[0]") (joined + (portRef O (instanceRef RST_DLY_i_0)) + (portRef I1 (instanceRef RST_DLY_e0_i_0_a3_0)) + (portRef I1 (instanceRef RST_DLY_e1_i_0_a3_1_1)) + )) + (net (rename RST_DLY_i_1 "RST_DLY_i[1]") (joined + (portRef O (instanceRef RST_DLY_i_1)) + (portRef I1 (instanceRef RST_DLY_e1_i_0_a3_0)) + (portRef I1 (instanceRef RST_DLY_e1_i_0_a3_1)) + )) + (net (rename cpu_est_i_0 "cpu_est_i[0]") (joined + (portRef O (instanceRef cpu_est_i_0)) + (portRef I1 (instanceRef cpu_est_2_0_0_0_a3_1)) + (portRef I1 (instanceRef cpu_est_0_0_0_a3_0)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_o2)) + (portRef I1 (instanceRef cpu_est_2_i_0_0_o2_3)) + )) + (net (rename CLK_000_D_i_1 "CLK_000_D_i[1]") (joined + (portRef O (instanceRef CLK_000_D_i_1)) + (portRef I1 (instanceRef N_312_i_0_o2)) + )) + (net (rename cpu_est_i_2 "cpu_est_i[2]") (joined + (portRef O (instanceRef cpu_est_i_2)) + (portRef I1 (instanceRef un5_e_i_0_a3_0)) + (portRef I1 (instanceRef cpu_est_2_i_0_0_a3_3)) + (portRef I1 (instanceRef cpu_est_2_0_0_0_a2_2)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_o2)) + )) + (net DTACK_D0_i (joined + (portRef O (instanceRef DTACK_D0_i)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_5_0)) + )) + (net (rename CLK_000_D_i_9 "CLK_000_D_i[9]") (joined + (portRef O (instanceRef CLK_000_D_i_9)) + (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_a2_0)) + )) + (net N_258_i_0 (joined + (portRef O (instanceRef N_258_i)) + (portRef I1 (instanceRef RST_DLY_e2_i_0_a2)) + (portRef I0 (instanceRef RESET_OUT_1_sqmuxa_i_0_127_1)) + )) + (net (rename RST_DLY_i_2 "RST_DLY_i[2]") (joined + (portRef O (instanceRef RST_DLY_i_2)) + (portRef I1 (instanceRef RST_DLY_e2_i_0_a3_1)) + (portRef I1 (instanceRef RST_DLY_e2_i_0_a3)) + )) + (net FPU_SENSE_i (joined + (portRef O (instanceRef FPU_SENSE_i)) + (portRef I1 (instanceRef un21_fpu_cs_0_a2_0_a3_1)) + )) + (net AS_030_000_SYNC_i (joined + (portRef O (instanceRef AS_030_000_SYNC_i)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_2_1_0)) + )) + (net (rename SM_AMIGA_i_i_7 "SM_AMIGA_i_i[7]") (joined + (portRef O (instanceRef SM_AMIGA_i_i_7)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_i_0_a3_0_6)) + (portRef I0 (instanceRef pos_clk_un37_as_030_d0_i_i_a3_2)) + )) + (net BGACK_030_INT_i (joined + (portRef O (instanceRef BGACK_030_INT_i)) + (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_o3)) + (portRef I0 (instanceRef un1_rw_i_a2_i)) + (portRef I1 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i_a2_0_a3)) + (portRef I1 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i_a2_0_a3)) + (portRef I0 (instanceRef un14_amiga_bus_data_dir_i_0_0)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_0)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_1)) + (portRef I0 (instanceRef pos_clk_A0_DMA_3_0_a2_0_a3)) + (portRef I1 (instanceRef un1_amiga_bus_enable_low)) + (portRef I0 (instanceRef un1_as_030_0_0_o3)) + (portRef I1 (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_o3_1)) + )) + (net AMIGA_BUS_ENABLE_DMA_LOW_i (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_i)) + (portRef I0 (instanceRef un1_amiga_bus_enable_low)) + )) + (net N_102_i (joined + (portRef O (instanceRef N_102_i)) (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_n)) )) - (net N_132_i (joined - (portRef O (instanceRef N_132_i)) + (net N_103_i (joined + (portRef O (instanceRef N_103_i)) (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_n)) )) + (net (rename SIZE_DMA_i_1 "SIZE_DMA_i[1]") (joined + (portRef O (instanceRef SIZE_DMA_i_1)) + (portRef I1 (instanceRef un4_size)) + )) + (net (rename SIZE_DMA_i_0 "SIZE_DMA_i[0]") (joined + (portRef O (instanceRef SIZE_DMA_i_0)) + (portRef I1 (instanceRef un3_size)) + )) (net RW_000_i (joined - (portRef O (instanceRef I_226)) + (portRef O (instanceRef I_228)) (portRef I1 (instanceRef pos_clk_DS_000_DMA_4_f0_0_0_a3)) (portRef I1 (instanceRef un14_amiga_bus_data_dir_i_0_0)) (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_0_0_0_a3)) @@ -2169,83 +2258,50 @@ (portRef O (instanceRef A_i_1)) (portRef I0 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i_a2_0_a3)) )) - (net (rename CLK_000_D_i_11 "CLK_000_D_i[11]") (joined - (portRef O (instanceRef CLK_000_D_i_11)) - (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_i_0_a2_0)) - )) - (net (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (joined - (portRef O (instanceRef SM_AMIGA_i_6)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_o2_2_0)) - )) - (net (rename CLK_000_D_i_1 "CLK_000_D_i[1]") (joined - (portRef O (instanceRef CLK_000_D_i_1)) - (portRef I1 (instanceRef N_88_i_0_o2)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_a3_2_5_1_0)) - )) - (net AS_030_000_SYNC_i (joined - (portRef O (instanceRef AS_030_000_SYNC_i)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_a3_2_5_1_0)) - )) - (net (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (joined - (portRef O (instanceRef SM_AMIGA_i_0)) - (portRef I1 (instanceRef un1_SM_AMIGA_1_i_a2_3_a3_1)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_a3_2_1_0)) - )) - (net (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (joined - (portRef O (instanceRef SM_AMIGA_i_3)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_a3_2_1_0)) - )) - (net (rename SM_AMIGA_i_i_7 "SM_AMIGA_i_i[7]") (joined - (portRef O (instanceRef SM_AMIGA_i_i_7)) - (portRef I0 (instanceRef pos_clk_un37_as_030_d0_i_i_a3_2)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_i_a3_0_6)) - )) - (net (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (joined - (portRef O (instanceRef SM_AMIGA_i_5)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_o2_0_0)) - (portRef I0 (instanceRef un1_SM_AMIGA_1_i_a2_3_a3_2)) - )) - (net (rename RST_DLY_i_0 "RST_DLY_i[0]") (joined - (portRef O (instanceRef RST_DLY_i_0)) - (portRef I1 (instanceRef RST_DLY_e0_i_a3_0)) - (portRef I1 (instanceRef RST_DLY_e1_i_0_a3_1_1)) - )) - (net (rename RST_DLY_i_1 "RST_DLY_i[1]") (joined - (portRef O (instanceRef RST_DLY_i_1)) - (portRef I1 (instanceRef RST_DLY_e1_i_0_a3_0)) - (portRef I1 (instanceRef RST_DLY_e1_i_0_a3_1)) - )) - (net N_364_i_0 (joined - (portRef O (instanceRef N_364_i)) - (portRef I0 (instanceRef RESET_OUT_1_sqmuxa_i_0_126_0)) - (portRef I1 (instanceRef RST_DLY_e2_i_0_a2)) - )) - (net (rename cpu_est_i_0 "cpu_est_i[0]") (joined - (portRef O (instanceRef cpu_est_i_0)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_o2)) - (portRef I1 (instanceRef cpu_est_2_i_i_i_o2_3)) - (portRef I1 (instanceRef cpu_est_2_0_0_0_a3_1)) - (portRef I1 (instanceRef cpu_est_0_i_i_a3_0)) - )) - (net (rename RST_DLY_i_2 "RST_DLY_i[2]") (joined - (portRef O (instanceRef RST_DLY_i_2)) - (portRef I1 (instanceRef RST_DLY_e2_i_0_a3_1)) - (portRef I1 (instanceRef RST_DLY_e2_i_0_a3)) - )) - (net AS_030_i (joined - (portRef O (instanceRef I_227)) - (portRef I1 (instanceRef un4_as_000)) - (portRef I0 (instanceRef AS_030_D0_0_i_a2_i)) - (portRef I0 (instanceRef un22_berr_0_a2_0_a3_1)) - )) - (net FPU_SENSE_i (joined - (portRef O (instanceRef FPU_SENSE_i)) - (portRef I0 (instanceRef un21_fpu_cs_0_a2_0_a3_1)) - )) - (net N_157_i (joined - (portRef O (instanceRef N_157_i)) + (net N_124_i (joined + (portRef O (instanceRef N_124_i)) (portRef I0 (instanceRef pos_clk_un37_as_030_d0_i_i_a3_1)) )) + (net CLK_030_i (joined + (portRef O (instanceRef CLK_030_i)) + (portRef I0 (instanceRef AS_000_DMA_1_sqmuxa_i_0)) + (portRef I1 (instanceRef CLK_030_H_2_i_0_o2)) + )) + (net (rename CLK_000_D_i_0 "CLK_000_D_i[0]") (joined + (portRef O (instanceRef CLK_000_D_i_0)) + (portRef I1 (instanceRef CLK_000_NE_0_o2_i_o2_i_o2_i_o2)) + )) + (net (rename CLK_000_D_i_8 "CLK_000_D_i[8]") (joined + (portRef O (instanceRef CLK_000_D_i_8)) + (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_a2)) + )) + (net AS_000_DMA_i (joined + (portRef O (instanceRef AS_000_DMA_i)) + (portRef I0 (instanceRef un6_as_030_0_a2_0_a3)) + (portRef I0 (instanceRef CLK_030_H_2_i_0_o2)) + )) + (net AS_000_i (joined + (portRef O (instanceRef I_230)) + (portRef I0 (instanceRef un6_ds_030)) + (portRef I1 (instanceRef un6_as_030_0_a2_0_a3)) + (portRef I0 (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_o3_1)) + (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_1)) + (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_1)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_0_0_a3_0_1)) + )) + (net CLK_030_H_i (joined + (portRef O (instanceRef CLK_030_H_i)) + (portRef I0 (instanceRef CLK_030_H_2_i_0_a3)) + )) + (net AS_030_D0_i (joined + (portRef O (instanceRef AS_030_D0_i)) + (portRef I0 (instanceRef pos_clk_un3_as_030_d0_0_o3)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a3_5)) + )) + (net (rename CYCLE_DMA_i_0 "CYCLE_DMA_i[0]") (joined + (portRef O (instanceRef CYCLE_DMA_i_0)) + (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_a3)) + )) (net (rename A_DECODE_i_16 "A_DECODE_i[16]") (joined (portRef O (instanceRef A_DECODE_i_16)) (portRef I1 (instanceRef pos_clk_un37_as_030_d0_i_a2_1_2)) @@ -2258,151 +2314,65 @@ (portRef O (instanceRef A_DECODE_i_19)) (portRef I1 (instanceRef pos_clk_un37_as_030_d0_i_a2_1_3)) )) - (net N_113_i (joined - (portRef O (instanceRef N_113_i)) - (portRef I0 (instanceRef AS_000_INT_0_m)) - (portRef I0 (instanceRef AS_000_INT_1_sqmuxa_i_0)) - (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_0)) - )) - (net N_114_i (joined - (portRef O (instanceRef N_114_i)) - (portRef I0 (instanceRef DSACK1_INT_0_m)) - (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_i_0)) - )) - (net AS_000_INT_i (joined - (portRef O (instanceRef AS_000_INT_i)) - (portRef I0 (instanceRef un4_as_000)) - )) - (net (rename SIZE_DMA_i_1 "SIZE_DMA_i[1]") (joined - (portRef O (instanceRef SIZE_DMA_i_1)) - (portRef I1 (instanceRef un4_size)) - )) - (net (rename SIZE_DMA_i_0 "SIZE_DMA_i[0]") (joined - (portRef O (instanceRef SIZE_DMA_i_0)) - (portRef I1 (instanceRef un3_size)) - )) - (net RESET_OUT_i (joined - (portRef O (instanceRef RESET_OUT_i)) - (portRef OE (instanceRef RESET)) - )) - (net (rename cpu_est_i_1 "cpu_est_i[1]") (joined - (portRef O (instanceRef cpu_est_i_1)) - (portRef I1 (instanceRef un5_e_0_i_o2)) - (portRef I0 (instanceRef VMA_INT_0_m)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_2)) - (portRef I1 (instanceRef cpu_est_2_0_0_a3_1_1_1)) - )) - (net (rename cpu_est_i_2 "cpu_est_i[2]") (joined - (portRef O (instanceRef cpu_est_i_2)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_o2)) - (portRef I1 (instanceRef cpu_est_2_i_i_i_a3_3)) - (portRef I1 (instanceRef un5_e_0_i_a3_0)) - (portRef I1 (instanceRef cpu_est_2_0_0_0_a2_2)) - )) - (net VPA_D_i (joined - (portRef O (instanceRef VPA_D_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a2_2_2)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_2)) - )) - (net DTACK_D0_i (joined - (portRef O (instanceRef DTACK_D0_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a2_0_2)) - )) - (net (rename cpu_est_i_3 "cpu_est_i[3]") (joined - (portRef O (instanceRef cpu_est_i_3)) - (portRef I1 (instanceRef un5_e_0_i_o2_0)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_2)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_2)) - (portRef I1 (instanceRef cpu_est_2_0_0_a3_1_1)) - )) - (net CLK_030_i (joined - (portRef O (instanceRef CLK_030_i)) - (portRef I0 (instanceRef AS_000_DMA_1_sqmuxa_i_0)) - (portRef I1 (instanceRef CLK_030_H_2_i_0_o2)) - )) - (net (rename CLK_000_D_i_0 "CLK_000_D_i[0]") (joined - (portRef O (instanceRef CLK_000_D_i_0)) - (portRef I1 (instanceRef N_170_i_0_o2_i_o2)) - )) - (net (rename CLK_000_D_i_10 "CLK_000_D_i[10]") (joined - (portRef O (instanceRef CLK_000_D_i_10)) - (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_i_0_a2)) - )) - (net AS_000_DMA_i (joined - (portRef O (instanceRef AS_000_DMA_i)) - (portRef I0 (instanceRef un6_as_030_0_a2_0_a3)) - (portRef I0 (instanceRef CLK_030_H_2_i_0_o2)) - )) - (net AS_000_i (joined - (portRef O (instanceRef I_229)) - (portRef I0 (instanceRef un6_ds_030)) - (portRef I1 (instanceRef un6_as_030_0_a2_0_a3)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_1)) - (portRef I0 (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_o3_1)) - (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_0_0_a3_0_1)) - (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_1)) - )) - (net CLK_030_H_i (joined - (portRef O (instanceRef CLK_030_H_i)) - (portRef I0 (instanceRef CLK_030_H_2_i_0_a3)) - )) - (net (rename CYCLE_DMA_i_0 "CYCLE_DMA_i[0]") (joined - (portRef O (instanceRef CYCLE_DMA_i_0)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_a3)) - )) - (net AS_030_D0_i (joined - (portRef O (instanceRef AS_030_D0_i)) - (portRef I0 (instanceRef pos_clk_un3_as_030_d0_0_o2_0_o3)) - (portRef I1 (instanceRef un10_ciin_0_a3_5)) - )) (net (rename AHIGH_i_30 "AHIGH_i[30]") (joined - (portRef O (instanceRef I_230)) - (portRef I0 (instanceRef un10_ciin_0_a3_4)) + (portRef O (instanceRef I_231)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a3_4)) )) (net (rename AHIGH_i_31 "AHIGH_i[31]") (joined - (portRef O (instanceRef I_231)) - (portRef I1 (instanceRef un10_ciin_0_a3_4)) + (portRef O (instanceRef I_232)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a3_4)) )) (net (rename AHIGH_i_28 "AHIGH_i[28]") (joined - (portRef O (instanceRef I_232)) - (portRef I0 (instanceRef un10_ciin_0_a3_3)) + (portRef O (instanceRef I_233)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a3_3)) )) (net (rename AHIGH_i_29 "AHIGH_i[29]") (joined - (portRef O (instanceRef I_233)) - (portRef I1 (instanceRef un10_ciin_0_a3_3)) + (portRef O (instanceRef I_234)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a3_3)) )) (net (rename AHIGH_i_26 "AHIGH_i[26]") (joined - (portRef O (instanceRef I_234)) - (portRef I0 (instanceRef un10_ciin_0_a3_2)) + (portRef O (instanceRef I_235)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a3_2)) )) (net (rename AHIGH_i_27 "AHIGH_i[27]") (joined - (portRef O (instanceRef I_235)) - (portRef I1 (instanceRef un10_ciin_0_a3_2)) + (portRef O (instanceRef I_236)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a3_2)) )) (net (rename AHIGH_i_24 "AHIGH_i[24]") (joined - (portRef O (instanceRef I_236)) - (portRef I0 (instanceRef un10_ciin_0_a3_1)) + (portRef O (instanceRef I_237)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a3_1)) )) (net (rename AHIGH_i_25 "AHIGH_i[25]") (joined - (portRef O (instanceRef I_237)) - (portRef I1 (instanceRef un10_ciin_0_a3_1)) + (portRef O (instanceRef I_238)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a3_1)) )) - (net N_241_i (joined - (portRef O (instanceRef N_241_i)) - (portRef I1 (instanceRef G_119_1)) + (net N_244_i (joined + (portRef O (instanceRef N_244_i)) + (portRef I1 (instanceRef G_120_1)) )) - (net N_242_i (joined - (portRef O (instanceRef N_242_i)) - (portRef I1 (instanceRef G_119)) + (net N_245_i (joined + (portRef O (instanceRef N_245_i)) + (portRef I1 (instanceRef G_120)) )) - (net N_243_i (joined - (portRef O (instanceRef N_243_i)) - (portRef I0 (instanceRef G_119_1)) + (net N_246_i (joined + (portRef O (instanceRef N_246_i)) + (portRef I0 (instanceRef G_120_1)) )) (net CLK_OUT_PRE_50_i (joined (portRef O (instanceRef CLK_OUT_PRE_50_i)) (portRef D (instanceRef CLK_OUT_PRE_50)) )) + (net N_85_i (joined + (portRef O (instanceRef N_85_i)) + (portRef I0 (instanceRef AS_000_INT_0_m)) + (portRef I0 (instanceRef AS_000_INT_1_sqmuxa_i_0)) + (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1)) + )) + (net N_86_i (joined + (portRef O (instanceRef N_86_i)) + (portRef I0 (instanceRef DSACK1_INT_0_m)) + (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0)) + )) (net un6_ds_030_i (joined (portRef O (instanceRef un6_ds_030_i)) (portRef I0 (instanceRef DS_030)) @@ -2429,7 +2399,7 @@ )) (net AS_030_c (joined (portRef O (instanceRef AS_030)) - (portRef I0 (instanceRef I_227)) + (portRef I0 (instanceRef I_226)) )) (net AS_030 (joined (portRef AS_030) @@ -2437,8 +2407,8 @@ )) (net AS_000_c (joined (portRef O (instanceRef AS_000)) - (portRef I0 (instanceRef I_229)) - (portRef I0 (instanceRef pos_clk_un6_bgack_000_0_a2)) + (portRef I0 (instanceRef I_230)) + (portRef I0 (instanceRef pos_clk_un6_bgack_000_0_0_a2)) )) (net AS_000 (joined (portRef AS_000) @@ -2446,7 +2416,7 @@ )) (net RW_000_c (joined (portRef O (instanceRef RW_000)) - (portRef I0 (instanceRef I_226)) + (portRef I0 (instanceRef I_228)) (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_0_0_0_a3_0_1)) )) (net RW_000 (joined @@ -2459,7 +2429,7 @@ )) (net UDS_000_c (joined (portRef O (instanceRef UDS_000)) - (portRef I1 (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_a2)) + (portRef I1 (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_a2)) (portRef I1 (instanceRef pos_clk_A0_DMA_3_0_a2_0_a3)) (portRef I0 (instanceRef UDS_000_c_i)) )) @@ -2469,7 +2439,7 @@ )) (net LDS_000_c (joined (portRef O (instanceRef LDS_000)) - (portRef I0 (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_a2)) + (portRef I0 (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_a2)) (portRef I0 (instanceRef LDS_000_c_i)) )) (net LDS_000 (joined @@ -2494,7 +2464,7 @@ )) (net (rename AHIGH_c_24 "AHIGH_c[24]") (joined (portRef O (instanceRef AHIGH_24)) - (portRef I0 (instanceRef I_236)) + (portRef I0 (instanceRef I_237)) )) (net (rename AHIGH_24 "AHIGH[24]") (joined (portRef IO (instanceRef AHIGH_24)) @@ -2502,7 +2472,7 @@ )) (net (rename AHIGH_c_25 "AHIGH_c[25]") (joined (portRef O (instanceRef AHIGH_25)) - (portRef I0 (instanceRef I_237)) + (portRef I0 (instanceRef I_238)) )) (net (rename AHIGH_25 "AHIGH[25]") (joined (portRef IO (instanceRef AHIGH_25)) @@ -2510,7 +2480,7 @@ )) (net (rename AHIGH_c_26 "AHIGH_c[26]") (joined (portRef O (instanceRef AHIGH_26)) - (portRef I0 (instanceRef I_234)) + (portRef I0 (instanceRef I_235)) )) (net (rename AHIGH_26 "AHIGH[26]") (joined (portRef IO (instanceRef AHIGH_26)) @@ -2518,7 +2488,7 @@ )) (net (rename AHIGH_c_27 "AHIGH_c[27]") (joined (portRef O (instanceRef AHIGH_27)) - (portRef I0 (instanceRef I_235)) + (portRef I0 (instanceRef I_236)) )) (net (rename AHIGH_27 "AHIGH[27]") (joined (portRef IO (instanceRef AHIGH_27)) @@ -2526,7 +2496,7 @@ )) (net (rename AHIGH_c_28 "AHIGH_c[28]") (joined (portRef O (instanceRef AHIGH_28)) - (portRef I0 (instanceRef I_232)) + (portRef I0 (instanceRef I_233)) )) (net (rename AHIGH_28 "AHIGH[28]") (joined (portRef IO (instanceRef AHIGH_28)) @@ -2534,7 +2504,7 @@ )) (net (rename AHIGH_c_29 "AHIGH_c[29]") (joined (portRef O (instanceRef AHIGH_29)) - (portRef I0 (instanceRef I_233)) + (portRef I0 (instanceRef I_234)) )) (net (rename AHIGH_29 "AHIGH[29]") (joined (portRef IO (instanceRef AHIGH_29)) @@ -2542,7 +2512,7 @@ )) (net (rename AHIGH_c_30 "AHIGH_c[30]") (joined (portRef O (instanceRef AHIGH_30)) - (portRef I0 (instanceRef I_230)) + (portRef I0 (instanceRef I_231)) )) (net (rename AHIGH_30 "AHIGH[30]") (joined (portRef IO (instanceRef AHIGH_30)) @@ -2550,7 +2520,7 @@ )) (net (rename AHIGH_c_31 "AHIGH_c[31]") (joined (portRef O (instanceRef AHIGH_31)) - (portRef I0 (instanceRef I_231)) + (portRef I0 (instanceRef I_232)) )) (net (rename AHIGH_31 "AHIGH[31]") (joined (portRef (member ahigh 0)) @@ -2688,7 +2658,7 @@ )) (net (rename A_DECODE_c_20 "A_DECODE_c[20]") (joined (portRef O (instanceRef A_DECODE_20)) - (portRef I0 (instanceRef un10_ciin_0_a3_6)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a3_6)) )) (net (rename A_DECODE_20 "A_DECODE[20]") (joined (portRef (member a_decode 3)) @@ -2696,7 +2666,7 @@ )) (net (rename A_DECODE_c_21 "A_DECODE_c[21]") (joined (portRef O (instanceRef A_DECODE_21)) - (portRef I1 (instanceRef un10_ciin_0_a3_6)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a3_6)) )) (net (rename A_DECODE_21 "A_DECODE[21]") (joined (portRef (member a_decode 2)) @@ -2704,7 +2674,7 @@ )) (net (rename A_DECODE_c_22 "A_DECODE_c[22]") (joined (portRef O (instanceRef A_DECODE_22)) - (portRef I1 (instanceRef un10_ciin_0_a3_11)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a3_11)) )) (net (rename A_DECODE_22 "A_DECODE[22]") (joined (portRef (member a_decode 1)) @@ -2712,7 +2682,7 @@ )) (net (rename A_DECODE_c_23 "A_DECODE_c[23]") (joined (portRef O (instanceRef A_DECODE_23)) - (portRef I0 (instanceRef un10_ciin_0_a3_5)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a3_5)) )) (net (rename A_DECODE_23 "A_DECODE[23]") (joined (portRef (member a_decode 0)) @@ -2738,10 +2708,10 @@ )) (net nEXP_SPACE_c (joined (portRef O (instanceRef nEXP_SPACE)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_2_1_0)) (portRef I0 (instanceRef nEXP_SPACE_c_i)) (portRef I1 (instanceRef pos_clk_un37_as_030_d0_i_i_a3_2)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_a3_2_5_2_0)) - (portRef I0 (instanceRef pos_clk_un6_bg_030_0_a3_1)) + (portRef I0 (instanceRef pos_clk_un6_bg_030_0_a2_0_a3_1)) (portRef OE (instanceRef DSACK1)) )) (net nEXP_SPACE (joined @@ -2750,8 +2720,8 @@ )) (net BERR_c (joined (portRef O (instanceRef BERR)) - (portRef I1 (instanceRef pos_clk_un3_as_030_d0_0_o2_0_o3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a2_1)) + (portRef I1 (instanceRef pos_clk_un3_as_030_d0_0_o3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_a2_5)) )) (net BERR (joined (portRef BERR) @@ -2781,9 +2751,9 @@ )) (net BGACK_000_c (joined (portRef O (instanceRef BGACK_000)) - (portRef I0 (instanceRef pos_clk_un6_bgack_000_0)) + (portRef I0 (instanceRef un22_berr_0_a2_0_a3_1)) + (portRef I0 (instanceRef pos_clk_un6_bgack_000_0_0)) (portRef I0 (instanceRef BGACK_030_INT_0_m)) - (portRef I1 (instanceRef un22_berr_0_a2_0_a3_1)) )) (net BGACK_000 (joined (portRef BGACK_000) @@ -2792,7 +2762,7 @@ (net CLK_030_c (joined (portRef O (instanceRef CLK_030)) (portRef I1 (instanceRef DS_000_DMA_2_sqmuxa_i_0_a3)) - (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_i_0_o2_0)) + (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_o2_1)) (portRef I0 (instanceRef CLK_030_i)) )) (net CLK_030 (joined @@ -2830,10 +2800,9 @@ (portRef CLK (instanceRef CLK_000_D_8)) (portRef CLK (instanceRef CLK_000_D_9)) (portRef CLK (instanceRef CLK_000_D_10)) - (portRef CLK (instanceRef CLK_000_D_11)) - (portRef CLK (instanceRef CLK_000_D_12)) (portRef CLK (instanceRef CLK_030_H)) (portRef CLK (instanceRef CLK_OUT_INT)) + (portRef CLK (instanceRef CLK_OUT_PRE_25)) (portRef CLK (instanceRef CLK_OUT_PRE_50)) (portRef CLK (instanceRef CLK_OUT_PRE_D)) (portRef CLK (instanceRef CYCLE_DMA_0)) @@ -2897,7 +2866,7 @@ (net FPU_SENSE_c (joined (portRef O (instanceRef FPU_SENSE)) (portRef I0 (instanceRef FPU_SENSE_i)) - (portRef I1 (instanceRef un22_berr_0_a2_0_a3_1_0)) + (portRef I1 (instanceRef un22_berr_0_a2_0_a3)) )) (net FPU_SENSE (joined (portRef FPU_SENSE) @@ -2933,7 +2902,7 @@ (net (rename IPL_c_0 "IPL_c[0]") (joined (portRef O (instanceRef IPL_0)) (portRef I0 (instanceRef IPL_030_0_0__m)) - (portRef I1 (instanceRef G_116)) + (portRef I1 (instanceRef G_117)) (portRef I0 (instanceRef IPL_c_i_0)) )) (net (rename IPL_0 "IPL[0]") (joined @@ -2942,7 +2911,7 @@ )) (net (rename IPL_c_1 "IPL_c[1]") (joined (portRef O (instanceRef IPL_1)) - (portRef I1 (instanceRef G_117)) + (portRef I1 (instanceRef G_118)) (portRef I0 (instanceRef IPL_030_0_1__m)) (portRef I0 (instanceRef IPL_c_i_1)) )) @@ -2953,7 +2922,7 @@ (net (rename IPL_c_2 "IPL_c[2]") (joined (portRef O (instanceRef IPL_2)) (portRef I0 (instanceRef IPL_030_0_2__m)) - (portRef I1 (instanceRef G_118)) + (portRef I1 (instanceRef G_119)) (portRef I0 (instanceRef IPL_c_i_2)) )) (net (rename IPL_2 "IPL[2]") (joined @@ -2994,47 +2963,46 @@ )) (net RST_c (joined (portRef O (instanceRef RST)) + (portRef I1 (instanceRef IPL_030_1_2)) (portRef I1 (instanceRef IPL_030_1_0)) + (portRef I1 (instanceRef IPL_D0_0_2)) + (portRef I1 (instanceRef IPL_D0_0_1)) (portRef I1 (instanceRef IPL_D0_0_0)) (portRef I1 (instanceRef DS_000_DMA_1)) - (portRef I1 (instanceRef AS_000_DMA_1)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a2_0_1)) - (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_1_i_o2_0_o3)) - (portRef I1 (instanceRef RESET_OUT_2_0_0_a3)) - (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_0)) - (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_1)) - (portRef I1 (instanceRef VMA_INT_1)) - (portRef I1 (instanceRef DTACK_D0_0)) - (portRef I1 (instanceRef BGACK_030_INT_1)) - (portRef I0 (instanceRef VPA_D_0)) (portRef I1 (instanceRef DSACK1_INT_1)) (portRef I1 (instanceRef AS_000_INT_1)) (portRef I1 (instanceRef AS_030_000_SYNC_1)) - (portRef I1 (instanceRef RW_000_INT_1)) - (portRef I1 (instanceRef A0_DMA_1)) - (portRef I1 (instanceRef BG_000_1)) - (portRef I1 (instanceRef DS_000_ENABLE_1)) - (portRef I1 (instanceRef AS_030_D0_0_i_a2_i)) + (portRef I1 (instanceRef AS_000_DMA_1)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_a2_1)) + (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_o3)) (portRef I1 (instanceRef SIZE_DMA_3_sqmuxa_i_i_a3)) - (portRef I1 (instanceRef RST_DLY_e2_i_0_o2)) - (portRef I1 (instanceRef RESET_OUT_1_sqmuxa_i_0_126_0)) - (portRef I1 (instanceRef RST_DLY_e2_i_0_a2_0)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a2_0)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a2_1)) + (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_0)) + (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_1)) + (portRef I1 (instanceRef A0_DMA_1)) + (portRef I1 (instanceRef RW_000_DMA_2)) + (portRef I1 (instanceRef RW_000_INT_1)) + (portRef I1 (instanceRef BGACK_030_INT_1)) (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1)) (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1)) + (portRef I1 (instanceRef VMA_INT_1)) + (portRef I1 (instanceRef AS_030_D0_0_i_a2_i)) + (portRef I1 (instanceRef BG_000_1)) + (portRef I1 (instanceRef RST_DLY_e2_i_0_a2_0)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_3_0)) + (portRef I1 (instanceRef RST_DLY_e2_i_0_o2)) + (portRef I1 (instanceRef RESET_OUT_1_sqmuxa_i_0_127_1)) + (portRef I1 (instanceRef RESET_OUT_2_0_0_a3)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_a2_5)) + (portRef I1 (instanceRef DS_000_ENABLE_1)) (portRef I1 (instanceRef UDS_000_INT_1)) - (portRef I1 (instanceRef RW_000_DMA_2)) (portRef I1 (instanceRef LDS_000_INT_1)) - (portRef I1 (instanceRef IPL_D0_0_1)) - (portRef I1 (instanceRef IPL_D0_0_2)) + (portRef I0 (instanceRef VPA_D_0)) + (portRef I1 (instanceRef DTACK_D0_0)) (portRef I1 (instanceRef IPL_030_1_1)) - (portRef I1 (instanceRef IPL_030_1_2)) (portRef I1 (instanceRef RST_DLY_e2_i_0_2)) (portRef I1 (instanceRef RST_DLY_e1_i_0_2)) (portRef I1 (instanceRef CLK_030_H_2_i_0_1)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_a3_2_5_2_0)) - (portRef I1 (instanceRef RST_DLY_e0_i)) + (portRef I1 (instanceRef RST_DLY_e0_i_0)) )) (net RST (joined (portRef RST) @@ -3046,6 +3014,7 @@ )) (net RW_c (joined (portRef O (instanceRef RW)) + (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_a2)) (portRef I0 (instanceRef RW_c_i)) )) (net RW (joined @@ -3092,78 +3061,46 @@ (portRef O (instanceRef CIIN)) (portRef CIIN) )) - (net N_25_i (joined - (portRef O (instanceRef N_25_i)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1)) - )) - (net N_34_0 (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1_i)) - )) - (net N_24_i (joined - (portRef O (instanceRef N_24_i)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1)) - )) - (net N_35_0 (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1_i)) - )) (net N_23_i (joined (portRef O (instanceRef N_23_i)) (portRef I0 (instanceRef UDS_000_INT_1)) )) - (net N_36_0 (joined + (net N_37_0 (joined (portRef O (instanceRef UDS_000_INT_1)) (portRef I0 (instanceRef UDS_000_INT_1_i)) )) - (net N_19_i (joined - (portRef O (instanceRef N_19_i)) - (portRef I0 (instanceRef RW_000_DMA_2)) - )) - (net N_40_0 (joined - (portRef O (instanceRef RW_000_DMA_2)) - (portRef I0 (instanceRef RW_000_DMA_2_i)) - )) (net N_17_i (joined (portRef O (instanceRef N_17_i)) (portRef I0 (instanceRef LDS_000_INT_1)) )) - (net N_42_0 (joined + (net N_43_0 (joined (portRef O (instanceRef LDS_000_INT_1)) (portRef I0 (instanceRef LDS_000_INT_1_i)) )) - (net (rename IPL_c_i_1 "IPL_c_i[1]") (joined - (portRef O (instanceRef IPL_c_i_1)) - (portRef I0 (instanceRef IPL_D0_0_1)) + (net VPA_c_i (joined + (portRef O (instanceRef VPA_c_i)) + (portRef I1 (instanceRef VPA_D_0)) )) - (net N_52_0 (joined - (portRef O (instanceRef IPL_D0_0_1)) - (portRef I0 (instanceRef IPL_D0_0_i_1)) + (net N_55_0 (joined + (portRef O (instanceRef VPA_D_0)) + (portRef I0 (instanceRef VPA_D_0_i)) )) - (net (rename IPL_c_i_2 "IPL_c_i[2]") (joined - (portRef O (instanceRef IPL_c_i_2)) - (portRef I0 (instanceRef IPL_D0_0_2)) + (net DTACK_c_i (joined + (portRef O (instanceRef DTACK_c_i)) + (portRef I0 (instanceRef DTACK_D0_0)) )) - (net N_53_0 (joined - (portRef O (instanceRef IPL_D0_0_2)) - (portRef I0 (instanceRef IPL_D0_0_i_2)) + (net N_56_0 (joined + (portRef O (instanceRef DTACK_D0_0)) + (portRef I0 (instanceRef DTACK_D0_0_i)) )) (net N_28_i (joined (portRef O (instanceRef N_28_i)) (portRef I0 (instanceRef IPL_030_1_1)) )) - (net N_31_0 (joined + (net N_32_0 (joined (portRef O (instanceRef IPL_030_1_1)) (portRef I0 (instanceRef IPL_030_1_i_1)) )) - (net N_29_i (joined - (portRef O (instanceRef N_29_i)) - (portRef I0 (instanceRef IPL_030_1_2)) - )) - (net N_32_0 (joined - (portRef O (instanceRef IPL_030_1_2)) - (portRef I0 (instanceRef IPL_030_1_i_2)) - )) (net (rename A_c_i_0 "A_c_i[0]") (joined (portRef O (instanceRef A_c_i_0)) (portRef I1 (instanceRef pos_clk_un10_sm_amiga_1)) @@ -3176,305 +3113,390 @@ (portRef O (instanceRef pos_clk_un10_sm_amiga)) (portRef I0 (instanceRef LDS_000_INT_0_m)) )) - (net N_332_i (joined - (portRef O (instanceRef N_332_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_i_6)) + (net N_201_i (joined + (portRef O (instanceRef N_201_i)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_3)) )) - (net N_240_i (joined - (portRef O (instanceRef N_240_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_6)) + (net N_202_i (joined + (portRef O (instanceRef N_202_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_3)) )) - (net N_315_0 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_i_6)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_i_6)) + (net (rename SM_AMIGA_nss_0_4 "SM_AMIGA_nss_0[4]") (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_i_3)) )) - (net N_281_0 (joined - (portRef O (instanceRef un14_amiga_bus_data_dir_i_0_0)) - (portRef I0 (instanceRef un14_amiga_bus_data_dir_i_0_0_i)) + (net N_204_i (joined + (portRef O (instanceRef N_204_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_4)) )) - (net N_270_i (joined - (portRef O (instanceRef N_270_i)) - (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_0_0)) + (net N_203_i (joined + (portRef O (instanceRef N_203_i)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_4)) )) - (net N_282_i (joined - (portRef O (instanceRef N_282_i)) - (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_0_0_0)) + (net (rename SM_AMIGA_nss_0_3 "SM_AMIGA_nss_0[3]") (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_4)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_i_4)) )) - (net AMIGA_BUS_DATA_DIR_c_0 (joined - (portRef O (instanceRef AMIGA_BUS_DATA_DIR_0_0_0)) - (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_0_0_i)) + (net N_45_i (joined + (portRef O (instanceRef un3_as_030_i_a2_i)) + (portRef OE (instanceRef AHIGH_24)) + (portRef OE (instanceRef AHIGH_25)) + (portRef OE (instanceRef AHIGH_26)) + (portRef OE (instanceRef AHIGH_27)) + (portRef OE (instanceRef AHIGH_28)) + (portRef OE (instanceRef AHIGH_29)) + (portRef OE (instanceRef AHIGH_30)) + (portRef OE (instanceRef AHIGH_31)) + (portRef OE (instanceRef AS_030)) + (portRef OE (instanceRef A_0)) + (portRef OE (instanceRef DS_030)) )) - (net RW_c_i (joined - (portRef O (instanceRef RW_c_i)) - (portRef I1 (instanceRef pos_clk_RW_000_INT_5_0)) - (portRef I0 (instanceRef un1_SM_AMIGA_1_i_a2_3_o2_0)) + (net un1_SM_AMIGA_0_sqmuxa_2_i (joined + (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_2_i)) + (portRef I1 (instanceRef DS_000_ENABLE_1_sqmuxa_i_0)) )) - (net N_140_0 (joined - (portRef O (instanceRef un1_SM_AMIGA_1_i_a2_3_o2_0)) - (portRef I0 (instanceRef un1_SM_AMIGA_1_i_a2_3_o2_0_i)) + (net N_279_0 (joined + (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa_i_0)) + (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_i)) )) - (net N_353_i (joined - (portRef O (instanceRef N_353_i)) - (portRef I1 (instanceRef un1_SM_AMIGA_1_i_a2_3_o2)) + (net N_235_i (joined + (portRef O (instanceRef N_235_i)) + (portRef I1 (instanceRef RESET_OUT_2_0_0)) )) - (net N_143_0 (joined - (portRef O (instanceRef un1_SM_AMIGA_1_i_a2_3_o2)) - (portRef I0 (instanceRef un1_SM_AMIGA_1_i_a2_3_o2_i)) + (net N_234_i (joined + (portRef O (instanceRef N_234_i)) + (portRef I0 (instanceRef RESET_OUT_2_0_0)) )) - (net (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (joined - (portRef O (instanceRef SM_AMIGA_i_1)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_o2_0_0)) + (net N_58_0 (joined + (portRef O (instanceRef RESET_OUT_2_0_0)) + (portRef I0 (instanceRef RESET_OUT_2_0_0_i)) )) - (net N_320_i (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_o2_0_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_o2_0_i_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_a3_2_3_0)) + (net N_243_i (joined + (portRef O (instanceRef N_243_i)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_o2_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_o2_1_0)) )) - (net N_357_i (joined - (portRef O (instanceRef N_357_i)) - (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_i_0_o2)) + (net N_254_i (joined + (portRef O (instanceRef N_254_i)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_o2_0)) )) - (net N_356_i (joined - (portRef O (instanceRef N_356_i)) - (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_i_0_o2)) + (net N_144_0 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_o2_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_o2_i_0)) )) - (net N_156_0 (joined - (portRef O (instanceRef DSACK1_INT_1_sqmuxa_i_0_o2)) - (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_i_0_o2_i)) + (net N_249_i (joined + (portRef O (instanceRef N_249_i)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_o3_0)) + )) + (net N_247_i (joined + (portRef O (instanceRef N_247_i)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_o3_0)) + )) + (net (rename SM_AMIGA_nss_0_7 "SM_AMIGA_nss_0[7]") (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_o3_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_o3_i_0)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_2_0)) )) (net (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (joined (portRef O (instanceRef SM_AMIGA_i_4)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_o2_2_0)) + (portRef I1 (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_o2)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_o2_0_0)) )) - (net N_159_i (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_o2_2_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_o2_1_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_o2_2_i_0)) + (net N_252_i (joined + (portRef O (instanceRef N_252_i)) + (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_o2)) + )) + (net N_153_0 (joined + (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_o2)) + (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_o2_i)) + )) + (net (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (joined + (portRef O (instanceRef SM_AMIGA_i_6)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_o2_0_1_0)) )) (net (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (joined (portRef O (instanceRef SM_AMIGA_i_2)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_o2_1_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_o2_0_1_0)) )) - (net N_180_i (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_o2_1_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_o2_1_i_0)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_a3_2_2_0)) + (net N_373_i (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_o2_0_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_o2_0_i_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_2_2_0)) )) - (net N_334_i (joined - (portRef O (instanceRef N_334_i)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_1_0)) + (net N_171_0 (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_o2_3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_o2_i_3)) )) - (net N_335_i (joined - (portRef O (instanceRef N_335_i)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_1_0)) + (net N_253_i (joined + (portRef O (instanceRef N_253_i)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_o2_1_0)) )) - (net N_244_i (joined - (portRef O (instanceRef N_244_i)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_2_0)) + (net N_172_0 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_o2_1_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_o2_1_i_0)) )) - (net N_233_i (joined - (portRef O (instanceRef N_233_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_2)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_2_0)) + (net N_192_i (joined + (portRef O (instanceRef N_192_i)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_1_0)) )) - (net N_355_i (joined - (portRef O (instanceRef N_355_i)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_5_0)) + (net N_191_i (joined + (portRef O (instanceRef N_191_i)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_1_0)) )) - (net N_229_i (joined - (portRef O (instanceRef N_229_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_3_0)) + (net N_193_i (joined + (portRef O (instanceRef N_193_i)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_2)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_2_0)) )) - (net N_246_i (joined - (portRef O (instanceRef N_246_i)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_3_0)) + (net N_398_i (joined + (portRef O (instanceRef N_398_i)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_5_0)) + )) + (net N_261_i (joined + (portRef O (instanceRef N_261_i)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_3_0)) + )) + (net N_194_i (joined + (portRef O (instanceRef N_194_i)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_3_0)) )) (net (rename SM_AMIGA_nss_i_0_0 "SM_AMIGA_nss_i_0[0]") (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_i_0)) + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_i_0)) )) - (net N_274_i (joined + (net N_276_i (joined (portRef O (instanceRef RST_DLY_e2_i_0)) (portRef D (instanceRef RST_DLY_2)) )) - (net N_220_i (joined - (portRef O (instanceRef N_220_i)) + (net N_186_i (joined + (portRef O (instanceRef N_186_i)) (portRef I0 (instanceRef RST_DLY_e2_i_0_2)) )) - (net N_219_i (joined - (portRef O (instanceRef N_219_i)) + (net N_185_i (joined + (portRef O (instanceRef N_185_i)) (portRef I1 (instanceRef RST_DLY_e2_i_0_1)) )) - (net N_218_i (joined - (portRef O (instanceRef N_218_i)) + (net N_184_i (joined + (portRef O (instanceRef N_184_i)) (portRef I0 (instanceRef RST_DLY_e2_i_0_1)) )) - (net N_275_i (joined + (net N_277_i (joined (portRef O (instanceRef RST_DLY_e1_i_0)) (portRef D (instanceRef RST_DLY_1)) )) - (net N_224_i (joined - (portRef O (instanceRef N_224_i)) + (net N_190_i (joined + (portRef O (instanceRef N_190_i)) (portRef I0 (instanceRef RST_DLY_e1_i_0_2)) )) - (net N_222_i (joined - (portRef O (instanceRef N_222_i)) + (net N_188_i (joined + (portRef O (instanceRef N_188_i)) (portRef I0 (instanceRef RST_DLY_e1_i_0_1)) )) - (net N_223_i (joined - (portRef O (instanceRef N_223_i)) + (net N_189_i (joined + (portRef O (instanceRef N_189_i)) (portRef I1 (instanceRef RST_DLY_e1_i_0_1)) )) - (net N_322_i (joined + (net N_173_0 (joined + (portRef O (instanceRef cpu_est_2_i_0_0_o2_3)) + (portRef I0 (instanceRef cpu_est_2_i_0_0_o2_i_3)) + )) + (net N_170_0 (joined + (portRef O (instanceRef un5_e_i_0_o2_0)) + (portRef I0 (instanceRef un5_e_i_0_o2_0_i)) + )) + (net N_255_i (joined + (portRef O (instanceRef N_255_i)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_o2_2_0)) + )) + (net N_256_i (joined + (portRef O (instanceRef N_256_i)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_o2_2_0)) + )) + (net N_161_i (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_o2_2_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_o2_2_i_0)) + )) + (net VMA_INT_i (joined + (portRef O (instanceRef VMA_INT_i)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_4_2_0)) + )) + (net N_152_i (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_o2)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_4_1_0)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_1)) + )) + (net N_151_0 (joined + (portRef O (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_o2)) + (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_o2_i)) + )) + (net N_251_i (joined + (portRef O (instanceRef N_251_i)) + (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_o2)) + )) + (net N_250_i (joined + (portRef O (instanceRef N_250_i)) + (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_o2_1_0)) + )) + (net N_147_i (joined (portRef O (instanceRef RST_DLY_e2_i_0_o2_0)) (portRef I1 (instanceRef RST_DLY_e1_i_0_a3)) - (portRef I0 (instanceRef RESET_OUT_1_sqmuxa_i_0_126_0_a2)) + (portRef I0 (instanceRef RESET_OUT_1_sqmuxa_i_0_127_1_a2)) (portRef I0 (instanceRef RST_DLY_e2_i_0_o2_0_i)) )) - (net N_312_i (joined - (portRef O (instanceRef N_312_i)) + (net N_146_i (joined + (portRef O (instanceRef cpu_est_2_0_0_0_o2_2)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_a2_2)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_o2_i_2)) + )) + (net N_145_i (joined + (portRef O (instanceRef un5_e_i_0_o2)) + (portRef I0 (instanceRef un5_e_i_0_o2_i)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_4_1_0)) + )) + (net N_397_i (joined + (portRef O (instanceRef N_397_i)) (portRef I0 (instanceRef RST_DLY_e2_i_0_o2)) )) - (net N_139_0 (joined + (net N_142_0 (joined (portRef O (instanceRef RST_DLY_e2_i_0_o2)) (portRef I0 (instanceRef RST_DLY_e2_i_0_o2_i)) )) - (net N_108_i (joined - (portRef O (instanceRef N_170_i_0_o2_i_o2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_o2_3)) - (portRef I0 (instanceRef cpu_est_0_i_i_a3_0_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a2_0)) + (net N_136_i (joined + (portRef O (instanceRef CLK_000_NE_0_o2_i_o2_i_o2_i_o2)) + (portRef I0 (instanceRef cpu_est_0_0_0_a3_0_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_3_0)) (portRef I0 (instanceRef RST_DLY_e2_i_0_a2)) - (portRef I0 (instanceRef N_170_i_0_o2_i_o2_i)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_o2_3)) + (portRef I0 (instanceRef CLK_000_NE_0_o2_i_o2_i_o2_i_o2_i)) (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_1)) )) - (net N_258_i (joined - (portRef O (instanceRef N_258_i)) - (portRef I1 (instanceRef cpu_est_0_i_i_0)) + (net N_248_i (joined + (portRef O (instanceRef RESET_OUT_1_sqmuxa_i_0_127_1)) + (portRef I1 (instanceRef RST_DLY_e2_i_0_a3_1_0)) + (portRef I0 (instanceRef RST_DLY_e1_i_0_a3_1_1)) )) - (net N_257_i (joined - (portRef O (instanceRef N_257_i)) - (portRef I0 (instanceRef cpu_est_0_i_i_0)) + (net N_227_i (joined + (portRef O (instanceRef N_227_i)) + (portRef I1 (instanceRef un5_e_i_0)) )) - (net N_318_i (joined - (portRef O (instanceRef cpu_est_0_i_i_0)) + (net N_226_i (joined + (portRef O (instanceRef N_226_i)) + (portRef I0 (instanceRef un5_e_i_0)) + )) + (net N_291_i (joined + (portRef O (instanceRef un5_e_i_0)) + (portRef I0 (instanceRef E)) + )) + (net N_224_i (joined + (portRef O (instanceRef N_224_i)) + (portRef I0 (instanceRef cpu_est_2_i_0_0_3)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_2)) + )) + (net N_225_i (joined + (portRef O (instanceRef N_225_i)) + (portRef I1 (instanceRef cpu_est_2_i_0_0_3)) + )) + (net N_230_i (joined + (portRef O (instanceRef cpu_est_2_i_0_0_3)) + (portRef I0 (instanceRef cpu_est_0_3__n)) + )) + (net N_267_i (joined + (portRef O (instanceRef N_267_i)) + (portRef I1 (instanceRef cpu_est_2_0_0_0_2)) + )) + (net (rename cpu_est_2_0_2 "cpu_est_2_0[2]") (joined + (portRef O (instanceRef cpu_est_2_0_0_0_2)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_i_2)) + )) + (net N_222_i (joined + (portRef O (instanceRef N_222_i)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_1)) + )) + (net N_223_i (joined + (portRef O (instanceRef N_223_i)) + (portRef I1 (instanceRef cpu_est_2_0_0_0_1)) + )) + (net (rename cpu_est_2_0_1 "cpu_est_2_0[1]") (joined + (portRef O (instanceRef cpu_est_2_0_0_0_1)) + (portRef I0 (instanceRef cpu_est_2_0_0_0_i_1)) + )) + (net N_221_i (joined + (portRef O (instanceRef N_221_i)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0)) + )) + (net N_220_i (joined + (portRef O (instanceRef N_220_i)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0)) + )) + (net (rename pos_clk_un9_clk_000_pe_0 "pos_clk.un9_clk_000_pe_0") (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_i)) + )) + (net N_216_i (joined + (portRef O (instanceRef N_216_i)) + (portRef I1 (instanceRef cpu_est_0_0_0_0)) + )) + (net N_215_i (joined + (portRef O (instanceRef N_215_i)) + (portRef I0 (instanceRef cpu_est_0_0_0_0)) + )) + (net N_270_i (joined + (portRef O (instanceRef cpu_est_0_0_0_0)) (portRef D (instanceRef cpu_est_0)) )) - (net N_245_i (joined - (portRef O (instanceRef RESET_OUT_1_sqmuxa_i_0_126_0)) - (portRef I0 (instanceRef RST_DLY_e2_i_0_a3_1_0)) - (portRef I0 (instanceRef RST_DLY_e1_i_0_a3_1_1)) + (net N_199_i (joined + (portRef O (instanceRef N_199_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_1)) + )) + (net N_198_i (joined + (portRef O (instanceRef N_198_i)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_1)) + )) + (net (rename SM_AMIGA_nss_0_6 "SM_AMIGA_nss_0[6]") (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_1)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_i_1)) + )) + (net N_21_i (joined + (portRef O (instanceRef N_21_i)) + (portRef I0 (instanceRef VMA_INT_1)) + )) + (net N_39_0 (joined + (portRef O (instanceRef VMA_INT_1)) + (portRef I0 (instanceRef VMA_INT_1_i)) )) (net nEXP_SPACE_c_i (joined (portRef O (instanceRef nEXP_SPACE_c_i)) - (portRef I0 (instanceRef un13_ciin_i_0)) - (portRef I1 (instanceRef un1_as_030_0_o3)) + (portRef I0 (instanceRef un13_ciin_i_0_0)) + (portRef I1 (instanceRef un1_as_030_0_0_o3)) )) (net un1_as_030_i (joined - (portRef O (instanceRef un1_as_030_0_o3)) - (portRef I1 (instanceRef un3_as_030_0)) + (portRef O (instanceRef un1_as_030_0_0_o3)) + (portRef I1 (instanceRef un3_as_030_i_a2_i)) (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_0_0_0_a3_0)) (portRef OE (instanceRef SIZE_0)) (portRef OE (instanceRef SIZE_1)) )) - (net (rename pos_clk_un3_as_030_d0_0 "pos_clk.un3_as_030_d0_0") (joined - (portRef O (instanceRef pos_clk_un3_as_030_d0_0_o2_0_o3)) - (portRef I1 (instanceRef DS_000_ENABLE_1_sqmuxa_1_i_0)) - (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_i_0)) - (portRef I1 (instanceRef AS_000_INT_1_sqmuxa_i_0)) - (portRef I1 (instanceRef pos_clk_un37_as_030_d0_i_i)) - (portRef I0 (instanceRef pos_clk_un3_as_030_d0_0_o2_0_o3_i)) - )) - (net N_107_0 (joined + (net N_133_0 (joined (portRef O (instanceRef AS_030_D0_0_i_a2_i)) (portRef I0 (instanceRef AS_030_D0_0_i_a2_i_i)) )) - (net N_115_i (joined - (portRef O (instanceRef N_115_i)) - (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa_1_i_0)) + (net N_214_i (joined + (portRef O (instanceRef N_214_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_i_0_6)) )) - (net N_63_0 (joined - (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa_1_i_0)) - (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa_1_i_0_i)) + (net N_213_i (joined + (portRef O (instanceRef N_213_i)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_0_6)) )) - (net N_278_0 (joined - (portRef O (instanceRef DSACK1_INT_1_sqmuxa_i_0)) - (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_i_0_i)) - )) - (net N_279_0 (joined - (portRef O (instanceRef AS_000_INT_1_sqmuxa_i_0)) - (portRef I0 (instanceRef AS_000_INT_1_sqmuxa_i_0_i)) - )) - (net N_260_i (joined - (portRef O (instanceRef N_260_i)) - (portRef I0 (instanceRef pos_clk_un37_as_030_d0_i_i)) - )) - (net N_67_0 (joined - (portRef O (instanceRef pos_clk_un37_as_030_d0_i_i)) - (portRef I0 (instanceRef pos_clk_un37_as_030_d0_i_i_i)) - )) - (net (rename pos_clk_RW_000_INT_5_0 "pos_clk.RW_000_INT_5_0") (joined - (portRef O (instanceRef pos_clk_RW_000_INT_5_0)) - (portRef I0 (instanceRef pos_clk_RW_000_INT_5_0_i)) - )) - (net un1_SM_AMIGA_0_sqmuxa_1_0 (joined - (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_0)) - (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_0_i)) - )) - (net un10_ciin_i (joined - (portRef O (instanceRef un10_ciin_i)) - (portRef I1 (instanceRef un13_ciin_i_0)) - )) - (net N_313_0 (joined - (portRef O (instanceRef un13_ciin_i_0)) - (portRef I0 (instanceRef un13_ciin_i_0_i)) - )) - (net N_4_i (joined - (portRef O (instanceRef N_4_i)) - (portRef I0 (instanceRef DSACK1_INT_1)) - )) - (net N_48_0 (joined - (portRef O (instanceRef DSACK1_INT_1)) - (portRef I0 (instanceRef DSACK1_INT_1_i)) - )) - (net N_5_i (joined - (portRef O (instanceRef N_5_i)) - (portRef I0 (instanceRef AS_000_INT_1)) - )) - (net N_47_0 (joined - (portRef O (instanceRef AS_000_INT_1)) - (portRef I0 (instanceRef AS_000_INT_1_i)) - )) - (net N_7_i (joined - (portRef O (instanceRef N_7_i)) - (portRef I0 (instanceRef AS_030_000_SYNC_1)) - )) - (net N_46_0 (joined - (portRef O (instanceRef AS_030_000_SYNC_1)) - (portRef I0 (instanceRef AS_030_000_SYNC_1_i)) - )) - (net N_18_i (joined - (portRef O (instanceRef N_18_i)) - (portRef I0 (instanceRef RW_000_INT_1)) - )) - (net N_41_0 (joined - (portRef O (instanceRef RW_000_INT_1)) - (portRef I0 (instanceRef RW_000_INT_1_i)) - )) - (net N_22_i (joined - (portRef O (instanceRef N_22_i)) - (portRef I0 (instanceRef A0_DMA_1)) - )) - (net N_37_0 (joined - (portRef O (instanceRef A0_DMA_1)) - (portRef I0 (instanceRef A0_DMA_1_i)) + (net N_306_0 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_i_0_6)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_0_i_6)) )) (net N_26_i (joined (portRef O (instanceRef N_26_i)) (portRef I0 (instanceRef BG_000_1)) )) - (net N_33_0 (joined + (net N_34_0 (joined (portRef O (instanceRef BG_000_1)) (portRef I0 (instanceRef BG_000_1_i)) )) @@ -3490,60 +3512,114 @@ (portRef O (instanceRef pos_clk_un9_bg_030)) (portRef I0 (instanceRef pos_clk_un9_bg_030_i)) )) + (net N_25_i (joined + (portRef O (instanceRef N_25_i)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1)) + )) + (net N_35_0 (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1_i)) + )) + (net N_24_i (joined + (portRef O (instanceRef N_24_i)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1)) + )) + (net N_36_0 (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1_i)) + )) + (net N_22_i (joined + (portRef O (instanceRef N_22_i)) + (portRef I0 (instanceRef A0_DMA_1)) + )) + (net N_38_0 (joined + (portRef O (instanceRef A0_DMA_1)) + (portRef I0 (instanceRef A0_DMA_1_i)) + )) + (net N_19_i (joined + (portRef O (instanceRef N_19_i)) + (portRef I0 (instanceRef RW_000_DMA_2)) + )) + (net N_41_0 (joined + (portRef O (instanceRef RW_000_DMA_2)) + (portRef I0 (instanceRef RW_000_DMA_2_i)) + )) + (net N_18_i (joined + (portRef O (instanceRef N_18_i)) + (portRef I0 (instanceRef RW_000_INT_1)) + )) + (net N_42_0 (joined + (portRef O (instanceRef RW_000_INT_1)) + (portRef I0 (instanceRef RW_000_INT_1_i)) + )) (net N_10_i (joined (portRef O (instanceRef N_10_i)) (portRef I0 (instanceRef BGACK_030_INT_1)) )) - (net N_43_0 (joined + (net N_44_0 (joined (portRef O (instanceRef BGACK_030_INT_1)) (portRef I0 (instanceRef BGACK_030_INT_1_i)) )) - (net VPA_c_i (joined - (portRef O (instanceRef VPA_c_i)) - (portRef I1 (instanceRef VPA_D_0)) + (net N_311_0 (joined + (portRef O (instanceRef un14_amiga_bus_data_dir_i_0_0)) + (portRef I0 (instanceRef un14_amiga_bus_data_dir_i_0_0_i)) )) - (net N_54_0 (joined - (portRef O (instanceRef VPA_D_0)) - (portRef I0 (instanceRef VPA_D_0_i)) + (net un10_ciin_i (joined + (portRef O (instanceRef un10_ciin_i)) + (portRef I1 (instanceRef un13_ciin_i_0_0)) )) - (net un3_as_030_i (joined - (portRef O (instanceRef un3_as_030_0)) - (portRef OE (instanceRef AHIGH_24)) - (portRef OE (instanceRef AHIGH_25)) - (portRef OE (instanceRef AHIGH_26)) - (portRef OE (instanceRef AHIGH_27)) - (portRef OE (instanceRef AHIGH_28)) - (portRef OE (instanceRef AHIGH_29)) - (portRef OE (instanceRef AHIGH_30)) - (portRef OE (instanceRef AHIGH_31)) - (portRef OE (instanceRef AS_030)) - (portRef OE (instanceRef A_0)) - (portRef OE (instanceRef DS_030)) + (net N_310_0 (joined + (portRef O (instanceRef un13_ciin_i_0_0)) + (portRef I0 (instanceRef un13_ciin_i_0_0_i)) )) - (net N_370_i (joined - (portRef O (instanceRef N_370_i)) - (portRef I1 (instanceRef pos_clk_un6_bgack_000_0)) + (net N_207_i (joined + (portRef O (instanceRef N_207_i)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_0_0)) )) - (net (rename pos_clk_un6_bgack_000_0 "pos_clk.un6_bgack_000_0") (joined - (portRef O (instanceRef pos_clk_un6_bgack_000_0)) - (portRef I0 (instanceRef pos_clk_un6_bgack_000_0_i)) + (net N_208_i (joined + (portRef O (instanceRef N_208_i)) + (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_0_0_0)) )) - (net N_283_i (joined - (portRef O (instanceRef N_283_i)) + (net AMIGA_BUS_DATA_DIR_c_0 (joined + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_0_0_0)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_0_0_i)) + )) + (net N_209_i (joined + (portRef O (instanceRef N_209_i)) (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_0)) )) (net (rename pos_clk_SIZE_DMA_6_0_0 "pos_clk.SIZE_DMA_6_0[0]") (joined (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_0)) (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_i_0)) )) - (net N_345_i (joined - (portRef O (instanceRef N_345_i)) + (net N_210_i (joined + (portRef O (instanceRef N_210_i)) (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_1)) )) (net (rename pos_clk_SIZE_DMA_6_0_1 "pos_clk.SIZE_DMA_6_0[1]") (joined (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_1)) (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_i_1)) )) + (net N_268_i (joined + (portRef O (instanceRef N_268_i)) + (portRef I1 (instanceRef pos_clk_un6_bgack_000_0_0)) + )) + (net (rename pos_clk_un6_bgack_000_0 "pos_clk.un6_bgack_000_0") (joined + (portRef O (instanceRef pos_clk_un6_bgack_000_0_0)) + (portRef I0 (instanceRef pos_clk_un6_bgack_000_0_0_i)) + )) + (net un1_SM_AMIGA_0_sqmuxa_1_0 (joined + (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1)) + (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_i)) + )) + (net RW_c_i (joined + (portRef O (instanceRef RW_c_i)) + (portRef I1 (instanceRef pos_clk_RW_000_INT_5_0_0)) + )) + (net (rename pos_clk_RW_000_INT_5_0 "pos_clk.RW_000_INT_5_0") (joined + (portRef O (instanceRef pos_clk_RW_000_INT_5_0_0)) + (portRef I0 (instanceRef pos_clk_RW_000_INT_5_0_0_i)) + )) (net UDS_000_c_i (joined (portRef O (instanceRef UDS_000_c_i)) (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_o2_0)) @@ -3552,345 +3628,209 @@ (portRef O (instanceRef LDS_000_c_i)) (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_o2_0)) )) - (net N_171_i (joined + (net N_164_i (joined (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_o2_0)) (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_1)) (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_o2_i_0)) )) - (net N_21_i (joined - (portRef O (instanceRef N_21_i)) - (portRef I0 (instanceRef VMA_INT_1)) - )) - (net N_38_0 (joined - (portRef O (instanceRef VMA_INT_1)) - (portRef I0 (instanceRef VMA_INT_1_i)) - )) - (net DTACK_c_i (joined - (portRef O (instanceRef DTACK_c_i)) - (portRef I0 (instanceRef DTACK_D0_0)) - )) - (net N_55_0 (joined - (portRef O (instanceRef DTACK_D0_0)) - (portRef I0 (instanceRef DTACK_D0_0_i)) - )) - (net N_249_i (joined - (portRef O (instanceRef N_249_i)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0)) - )) - (net N_248_i (joined - (portRef O (instanceRef N_248_i)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0)) - )) - (net (rename pos_clk_un9_clk_000_pe_0 "pos_clk.un9_clk_000_pe_0") (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_i)) - )) - (net N_250_i (joined - (portRef O (instanceRef N_250_i)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_1)) - )) - (net N_251_i (joined - (portRef O (instanceRef N_251_i)) - (portRef I1 (instanceRef cpu_est_2_0_0_0_1)) - )) - (net (rename cpu_est_2_0_1 "cpu_est_2_0[1]") (joined - (portRef O (instanceRef cpu_est_2_0_0_0_1)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_i_1)) - )) - (net N_253_i (joined - (portRef O (instanceRef N_253_i)) - (portRef I0 (instanceRef cpu_est_2_i_i_i_3)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_2)) - )) - (net N_369_i (joined - (portRef O (instanceRef N_369_i)) - (portRef I1 (instanceRef cpu_est_2_0_0_0_2)) - )) - (net (rename cpu_est_2_0_2 "cpu_est_2_0[2]") (joined - (portRef O (instanceRef cpu_est_2_0_0_0_2)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_i_2)) - )) - (net N_254_i (joined - (portRef O (instanceRef N_254_i)) - (portRef I1 (instanceRef cpu_est_2_i_i_i_3)) - )) - (net N_316_i (joined - (portRef O (instanceRef cpu_est_2_i_i_i_3)) - (portRef I0 (instanceRef cpu_est_0_3__n)) - )) - (net N_256_i (joined - (portRef O (instanceRef N_256_i)) - (portRef I1 (instanceRef un5_e_0_i)) - )) - (net N_255_i (joined - (portRef O (instanceRef N_255_i)) - (portRef I0 (instanceRef un5_e_0_i)) - )) - (net N_317_i (joined - (portRef O (instanceRef un5_e_0_i)) - (portRef I0 (instanceRef E)) - )) - (net N_267_i (joined - (portRef O (instanceRef N_267_i)) - (portRef I1 (instanceRef RESET_OUT_2_0_0)) - )) - (net N_266_i (joined - (portRef O (instanceRef N_266_i)) - (portRef I0 (instanceRef RESET_OUT_2_0_0)) - )) - (net N_57_0 (joined - (portRef O (instanceRef RESET_OUT_2_0_0)) - (portRef I0 (instanceRef RESET_OUT_2_0_0_i)) - )) - (net N_151_0 (joined - (portRef O (instanceRef un5_e_0_i_o2)) - (portRef I0 (instanceRef un5_e_0_i_o2_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a2_1_2)) - )) - (net N_321_i (joined - (portRef O (instanceRef cpu_est_2_0_0_0_o2_2)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_a2_2)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_o2_i_2)) - )) - (net N_158_i (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_o2)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a2_1_2)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_1)) - )) - (net VMA_INT_i (joined - (portRef O (instanceRef VMA_INT_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a2_2_2)) - )) - (net N_361_i (joined - (portRef O (instanceRef N_361_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_o2_2)) - )) - (net N_362_i (joined - (portRef O (instanceRef N_362_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_o2_2)) - )) - (net N_169_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_o2_2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_o2_i_2)) - )) - (net N_186_0 (joined - (portRef O (instanceRef un5_e_0_i_o2_0)) - (portRef I0 (instanceRef un5_e_0_i_o2_0_i)) - )) - (net N_195_0 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_o2_3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_o2_i_3)) - )) - (net N_196_0 (joined - (portRef O (instanceRef cpu_est_2_i_i_i_o2_3)) - (portRef I0 (instanceRef cpu_est_2_i_i_i_o2_i_3)) - )) - (net N_60_i (joined + (net N_309_i (joined (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i_0)) (portRef D (instanceRef CYCLE_DMA_0)) )) - (net N_263_i (joined - (portRef O (instanceRef N_263_i)) + (net N_113_i (joined + (portRef O (instanceRef N_113_i)) + (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_1)) + )) + (net N_195_i (joined + (portRef O (instanceRef N_195_i)) (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_2)) )) - (net N_262_i (joined - (portRef O (instanceRef N_262_i)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_2)) - )) - (net N_323_0 (joined + (net N_174_0 (joined (portRef O (instanceRef CLK_030_H_2_i_0_o2)) (portRef I0 (instanceRef CLK_030_H_2_i_0_o2_i)) )) - (net N_101_i (joined - (portRef O (instanceRef pos_clk_CYCLE_DMA_5_1_i_o2_0_o3)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_1_i_o2_0_o3_i)) - (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_1)) - (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0)) + (net N_169_i (joined + (portRef O (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_o3)) + (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_o3_i)) + (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_2)) + (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_1)) )) - (net N_366_i (joined - (portRef O (instanceRef N_366_i)) - (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_0_o3)) + (net N_260_i (joined + (portRef O (instanceRef N_260_i)) + (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_o3)) )) - (net N_182_i (joined - (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_0_o3)) - (portRef I0 (instanceRef pos_clk_RW_000_INT_5_0)) - (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_0)) + (net N_168_i (joined + (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_o3)) + (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1)) + (portRef I0 (instanceRef pos_clk_RW_000_INT_5_0_0)) )) - (net (rename pos_clk_un23_bgack_030_int_i_0_0 "pos_clk.un23_bgack_030_int_i_0_0") (joined - (portRef O (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_o3)) + (net (rename pos_clk_un3_as_030_d0_i "pos_clk.un3_as_030_d0_i") (joined + (portRef O (instanceRef pos_clk_un3_as_030_d0_0_o3)) + (portRef I1 (instanceRef AS_000_INT_1_sqmuxa_i_0)) + (portRef I1 (instanceRef pos_clk_un37_as_030_d0_i_i)) + (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0)) + (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa_i_0)) + (portRef I0 (instanceRef pos_clk_un3_as_030_d0_0_o3_i)) + )) + (net (rename pos_clk_un21_bgack_030_int_i_0_0 "pos_clk.un21_bgack_030_int_i_0_0") (joined + (portRef O (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_o3)) (portRef I1 (instanceRef AS_000_DMA_1_sqmuxa_i_0)) (portRef I1 (instanceRef pos_clk_DS_000_DMA_4_f0_0_0)) - (portRef I0 (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_o3_i)) + (portRef I0 (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_o3_i)) (portRef I1 (instanceRef CLK_030_H_2_i_0)) (portRef I1 (instanceRef DS_000_DMA_2_sqmuxa_i_0)) )) - (net N_310_i (joined - (portRef O (instanceRef N_310_i)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_o2_0)) - )) - (net N_359_i (joined - (portRef O (instanceRef N_359_i)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_o2_0)) - )) - (net N_144_0 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_o2_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_o2_i_0)) - )) (net CLK_OUT_PRE_D_i (joined (portRef O (instanceRef CLK_OUT_PRE_D_i)) - (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_i_0_o2_0)) + (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_o2_1)) )) - (net N_142_0 (joined - (portRef O (instanceRef DSACK1_INT_1_sqmuxa_i_0_o2_0)) - (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_i_0_o2_0_i)) + (net N_143_0 (joined + (portRef O (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_o2_1)) + (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_o2_1_i)) )) - (net N_311_i (joined - (portRef O (instanceRef N_311_i)) - (portRef I1 (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_o3_2)) + (net N_396_i (joined + (portRef O (instanceRef N_396_i)) + (portRef I1 (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_o3_2)) )) - (net N_319_i (joined - (portRef O (instanceRef N_88_i_0_o2)) - (portRef I1 (instanceRef G_111)) - (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_0_a2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a2_0_1)) - (portRef I1 (instanceRef pos_clk_un6_bgack_000_0_a2)) - (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_0_a3)) - (portRef I1 (instanceRef un1_SM_AMIGA_1_i_a2_3_a2)) - (portRef I0 (instanceRef N_88_i_0_o2_i)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_1)) + (net N_137_i (joined + (portRef O (instanceRef N_312_i_0_o2)) + (portRef I1 (instanceRef G_112)) + (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_a2)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_a2_1)) + (portRef I0 (instanceRef AS_000_INT_1_sqmuxa_i_0_a3)) + (portRef I1 (instanceRef pos_clk_un6_bgack_000_0_0_a2)) + (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_a3)) + (portRef I0 (instanceRef N_312_i_0_o2_i)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_1)) )) - (net N_93_i (joined + (net N_372_i (joined (portRef O (instanceRef un1_rw_i_a2_i)) (portRef OE (instanceRef RW)) )) - (net N_272_0 (joined + (net N_236_i (joined + (portRef O (instanceRef N_236_i)) + (portRef I0 (instanceRef RST_DLY_e0_i_0_1)) + )) + (net N_237_i (joined + (portRef O (instanceRef N_237_i)) + (portRef I1 (instanceRef RST_DLY_e0_i_0_1)) + )) + (net N_278_i (joined + (portRef O (instanceRef RST_DLY_e0_i_0)) + (portRef D (instanceRef RST_DLY_0)) + )) + (net N_280_0 (joined + (portRef O (instanceRef DSACK1_INT_1_sqmuxa_1_i_0)) + (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_i)) + )) + (net N_281_0 (joined + (portRef O (instanceRef AS_000_INT_1_sqmuxa_i_0)) + (portRef I0 (instanceRef AS_000_INT_1_sqmuxa_i_0_i)) + )) + (net N_229_i (joined + (portRef O (instanceRef N_229_i)) + (portRef I0 (instanceRef pos_clk_un37_as_030_d0_i_i)) + )) + (net N_66_0 (joined + (portRef O (instanceRef pos_clk_un37_as_030_d0_i_i)) + (portRef I0 (instanceRef pos_clk_un37_as_030_d0_i_i_i)) + )) + (net N_371_i (joined + (portRef O (instanceRef un1_as_000_i_a2_i)) + (portRef OE (instanceRef AS_000)) + (portRef OE (instanceRef LDS_000)) + (portRef OE (instanceRef RW_000)) + (portRef OE (instanceRef UDS_000)) + )) + (net N_305_0 (joined (portRef O (instanceRef AS_000_DMA_1_sqmuxa_i_0)) (portRef I0 (instanceRef AS_000_DMA_1_sqmuxa_i_0_i)) )) - (net N_290_i (joined - (portRef O (instanceRef N_290_i)) + (net N_212_i (joined + (portRef O (instanceRef N_212_i)) (portRef I0 (instanceRef DS_000_DMA_2_sqmuxa_i_0_1)) )) - (net N_273_0 (joined + (net N_307_0 (joined (portRef O (instanceRef DS_000_DMA_2_sqmuxa_i_0)) (portRef I0 (instanceRef DS_000_DMA_2_sqmuxa_i_0_i)) )) - (net N_346_i (joined - (portRef O (instanceRef N_346_i)) + (net N_211_i (joined + (portRef O (instanceRef N_211_i)) (portRef I0 (instanceRef pos_clk_DS_000_DMA_4_f0_0_0)) )) (net (rename pos_clk_DS_000_DMA_4_0 "pos_clk.DS_000_DMA_4_0") (joined (portRef O (instanceRef pos_clk_DS_000_DMA_4_f0_0_0)) (portRef I0 (instanceRef pos_clk_DS_000_DMA_4_f0_0_0_i)) )) - (net N_268_i (joined - (portRef O (instanceRef N_268_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_4)) + (net N_205_i (joined + (portRef O (instanceRef N_205_i)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_5)) )) - (net N_269_i (joined - (portRef O (instanceRef N_269_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_4)) + (net N_206_i (joined + (portRef O (instanceRef N_206_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_5)) )) - (net (rename SM_AMIGA_nss_0_3 "SM_AMIGA_nss_0[3]") (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_4)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_i_4)) + (net (rename SM_AMIGA_nss_0_2 "SM_AMIGA_nss_0[2]") (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_5)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_i_5)) )) - (net N_341_i (joined - (portRef O (instanceRef N_341_i)) + (net N_200_i (joined + (portRef O (instanceRef N_200_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0_2)) + )) + (net (rename SM_AMIGA_nss_0_5 "SM_AMIGA_nss_0[5]") (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_2)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_i_2)) + )) + (net N_197_i (joined + (portRef O (instanceRef N_197_i)) (portRef I0 (instanceRef CLK_030_H_2_i_0_1)) )) - (net N_276_i (joined + (net N_308_i (joined (portRef O (instanceRef CLK_030_H_2_i_0)) (portRef D (instanceRef CLK_030_H)) )) - (net N_277_i (joined + (net N_40_i (joined (portRef O (instanceRef pos_clk_CYCLE_DMA_5_1_i_0)) (portRef D (instanceRef CYCLE_DMA_1)) )) - (net N_238_i (joined - (portRef O (instanceRef N_238_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_5)) + (net N_29_i (joined + (portRef O (instanceRef N_29_i)) + (portRef I0 (instanceRef IPL_030_1_2)) )) - (net N_239_i (joined - (portRef O (instanceRef N_239_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_5)) - )) - (net (rename SM_AMIGA_nss_0_2 "SM_AMIGA_nss_0[2]") (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_5)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_i_5)) - )) - (net N_235_i (joined - (portRef O (instanceRef N_235_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_3)) - )) - (net N_236_i (joined - (portRef O (instanceRef N_236_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_3)) - )) - (net (rename SM_AMIGA_nss_0_4 "SM_AMIGA_nss_0[4]") (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_i_3)) - )) - (net N_234_i (joined - (portRef O (instanceRef N_234_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_2)) - )) - (net (rename SM_AMIGA_nss_0_5 "SM_AMIGA_nss_0[5]") (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_i_2)) - )) - (net N_231_i (joined - (portRef O (instanceRef N_231_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_1)) - )) - (net N_232_i (joined - (portRef O (instanceRef N_232_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_1)) - )) - (net (rename SM_AMIGA_nss_0_6 "SM_AMIGA_nss_0[6]") (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_1)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_i_1)) - )) - (net N_230_i (joined - (portRef O (instanceRef N_230_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_0)) - )) - (net (rename SM_AMIGA_nss_0_7 "SM_AMIGA_nss_0[7]") (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_i_0)) - )) - (net N_226_i (joined - (portRef O (instanceRef N_226_i)) - (portRef I0 (instanceRef RST_DLY_e0_i_1)) - )) - (net N_331_i (joined - (portRef O (instanceRef N_331_i)) - (portRef I1 (instanceRef RST_DLY_e0_i_1)) - )) - (net N_314_i (joined - (portRef O (instanceRef RST_DLY_e0_i)) - (portRef D (instanceRef RST_DLY_0)) - )) - (net un1_as_000_i (joined - (portRef O (instanceRef un1_as_000_0)) - (portRef OE (instanceRef AS_000)) - (portRef OE (instanceRef LDS_000)) - (portRef OE (instanceRef RW_000)) - (portRef OE (instanceRef UDS_000)) + (net N_33_0 (joined + (portRef O (instanceRef IPL_030_1_2)) + (portRef I0 (instanceRef IPL_030_1_i_2)) )) (net N_27_i (joined (portRef O (instanceRef N_27_i)) (portRef I0 (instanceRef IPL_030_1_0)) )) - (net N_30_0 (joined + (net N_31_0 (joined (portRef O (instanceRef IPL_030_1_0)) (portRef I0 (instanceRef IPL_030_1_i_0)) )) + (net (rename IPL_c_i_2 "IPL_c_i[2]") (joined + (portRef O (instanceRef IPL_c_i_2)) + (portRef I0 (instanceRef IPL_D0_0_2)) + )) + (net N_54_0 (joined + (portRef O (instanceRef IPL_D0_0_2)) + (portRef I0 (instanceRef IPL_D0_0_i_2)) + )) + (net (rename IPL_c_i_1 "IPL_c_i[1]") (joined + (portRef O (instanceRef IPL_c_i_1)) + (portRef I0 (instanceRef IPL_D0_0_1)) + )) + (net N_53_0 (joined + (portRef O (instanceRef IPL_D0_0_1)) + (portRef I0 (instanceRef IPL_D0_0_i_1)) + )) (net (rename IPL_c_i_0 "IPL_c_i[0]") (joined (portRef O (instanceRef IPL_c_i_0)) (portRef I0 (instanceRef IPL_D0_0_0)) )) - (net N_51_0 (joined + (net N_52_0 (joined (portRef O (instanceRef IPL_D0_0_0)) (portRef I0 (instanceRef IPL_D0_0_i_0)) )) @@ -3898,150 +3838,158 @@ (portRef O (instanceRef N_3_i)) (portRef I0 (instanceRef DS_000_DMA_1)) )) - (net N_49_0 (joined + (net N_50_0 (joined (portRef O (instanceRef DS_000_DMA_1)) (portRef I0 (instanceRef DS_000_DMA_1_i)) )) + (net N_4_i (joined + (portRef O (instanceRef N_4_i)) + (portRef I0 (instanceRef DSACK1_INT_1)) + )) + (net N_49_0 (joined + (portRef O (instanceRef DSACK1_INT_1)) + (portRef I0 (instanceRef DSACK1_INT_1_i)) + )) + (net N_5_i (joined + (portRef O (instanceRef N_5_i)) + (portRef I0 (instanceRef AS_000_INT_1)) + )) + (net N_48_0 (joined + (portRef O (instanceRef AS_000_INT_1)) + (portRef I0 (instanceRef AS_000_INT_1_i)) + )) + (net N_7_i (joined + (portRef O (instanceRef N_7_i)) + (portRef I0 (instanceRef AS_030_000_SYNC_1)) + )) + (net N_47_0 (joined + (portRef O (instanceRef AS_030_000_SYNC_1)) + (portRef I0 (instanceRef AS_030_000_SYNC_1_i)) + )) (net N_8_i (joined (portRef O (instanceRef N_8_i)) (portRef I0 (instanceRef AS_000_DMA_1)) )) - (net N_45_0 (joined + (net N_46_0 (joined (portRef O (instanceRef AS_000_DMA_1)) (portRef I0 (instanceRef AS_000_DMA_1_i)) )) (net (rename SM_AMIGA_nss_i_0_1_0 "SM_AMIGA_nss_i_0_1[0]") (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_1_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_4_0)) + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_1_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_4_0)) )) (net (rename SM_AMIGA_nss_i_0_2_0 "SM_AMIGA_nss_i_0_2[0]") (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_2_0)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_4_0)) + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_2_0)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_4_0)) )) (net (rename SM_AMIGA_nss_i_0_3_0 "SM_AMIGA_nss_i_0_3[0]") (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_3_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_5_0)) + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_3_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_5_0)) )) (net (rename SM_AMIGA_nss_i_0_4_0 "SM_AMIGA_nss_i_0_4[0]") (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_4_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0)) + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_4_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_0)) )) (net (rename SM_AMIGA_nss_i_0_5_0 "SM_AMIGA_nss_i_0_5[0]") (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_5_0)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0)) + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_5_0)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_0)) + )) + (net N_373_i_1 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_o2_0_1_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_o2_0_0)) )) (net (rename pos_clk_un10_sm_amiga_i_1 "pos_clk.un10_sm_amiga_i_1") (joined (portRef O (instanceRef pos_clk_un10_sm_amiga_1)) (portRef I0 (instanceRef pos_clk_un10_sm_amiga)) )) - (net un10_ciin_1 (joined - (portRef O (instanceRef un10_ciin_0_a3_1)) - (portRef I0 (instanceRef un10_ciin_0_a3_7)) - )) - (net un10_ciin_2 (joined - (portRef O (instanceRef un10_ciin_0_a3_2)) - (portRef I1 (instanceRef un10_ciin_0_a3_7)) - )) - (net un10_ciin_3 (joined - (portRef O (instanceRef un10_ciin_0_a3_3)) - (portRef I0 (instanceRef un10_ciin_0_a3_8)) - )) - (net un10_ciin_4 (joined - (portRef O (instanceRef un10_ciin_0_a3_4)) - (portRef I1 (instanceRef un10_ciin_0_a3_8)) - )) - (net un10_ciin_5 (joined - (portRef O (instanceRef un10_ciin_0_a3_5)) - (portRef I0 (instanceRef un10_ciin_0_a3_9)) - )) - (net un10_ciin_6 (joined - (portRef O (instanceRef un10_ciin_0_a3_6)) - (portRef I1 (instanceRef un10_ciin_0_a3_9)) - )) - (net un10_ciin_7 (joined - (portRef O (instanceRef un10_ciin_0_a3_7)) - (portRef I0 (instanceRef un10_ciin_0_a3_10)) - )) - (net un10_ciin_8 (joined - (portRef O (instanceRef un10_ciin_0_a3_8)) - (portRef I1 (instanceRef un10_ciin_0_a3_10)) - )) - (net un10_ciin_9 (joined - (portRef O (instanceRef un10_ciin_0_a3_9)) - (portRef I0 (instanceRef un10_ciin_0_a3_11)) - )) - (net un10_ciin_10 (joined - (portRef O (instanceRef un10_ciin_0_a3_10)) - (portRef I0 (instanceRef un10_ciin_0_a3)) - )) - (net un10_ciin_11 (joined - (portRef O (instanceRef un10_ciin_0_a3_11)) - (portRef I1 (instanceRef un10_ciin_0_a3)) - )) - (net (rename pos_clk_un23_bgack_030_int_i_0_0_1 "pos_clk.un23_bgack_030_int_i_0_0_1") (joined - (portRef O (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_o3_1)) - (portRef I0 (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_o3)) - )) - (net (rename pos_clk_un23_bgack_030_int_i_0_0_2 "pos_clk.un23_bgack_030_int_i_0_0_2") (joined - (portRef O (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_o3_2)) - (portRef I1 (instanceRef pos_clk_un23_bgack_030_int_i_0_o2_2_o3)) - )) - (net N_60_i_1 (joined - (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_1)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0)) - )) - (net N_60_i_2 (joined - (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_2)) - (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0)) - )) - (net N_248_1 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_1)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3)) - )) - (net N_248_2 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_2)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3)) - )) - (net N_249_1 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_1)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0)) - )) - (net N_249_2 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_2)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0)) - )) - (net N_361_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a2_1_2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a2_2)) - )) - (net N_361_2 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a2_2_2)) - (portRef I1 (instanceRef SM_AMIGA_srsts_0_0_a2_2)) - )) - (net N_157_1 (joined + (net N_124_1 (joined (portRef O (instanceRef pos_clk_un37_as_030_d0_i_a2_1_1)) (portRef I0 (instanceRef pos_clk_un37_as_030_d0_i_a2_1_4)) )) - (net N_157_2 (joined + (net N_124_2 (joined (portRef O (instanceRef pos_clk_un37_as_030_d0_i_a2_1_2)) (portRef I1 (instanceRef pos_clk_un37_as_030_d0_i_a2_1_4)) )) - (net N_157_3 (joined + (net N_124_3 (joined (portRef O (instanceRef pos_clk_un37_as_030_d0_i_a2_1_3)) (portRef I1 (instanceRef pos_clk_un37_as_030_d0_i_a2_1)) )) - (net N_157_4 (joined + (net N_124_4 (joined (portRef O (instanceRef pos_clk_un37_as_030_d0_i_a2_1_4)) (portRef I0 (instanceRef pos_clk_un37_as_030_d0_i_a2_1)) )) - (net N_260_1 (joined + (net un10_ciin_1 (joined + (portRef O (instanceRef un13_ciin_i_0_0_a3_1)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a3_7)) + )) + (net un10_ciin_2 (joined + (portRef O (instanceRef un13_ciin_i_0_0_a3_2)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a3_7)) + )) + (net un10_ciin_3 (joined + (portRef O (instanceRef un13_ciin_i_0_0_a3_3)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a3_8)) + )) + (net un10_ciin_4 (joined + (portRef O (instanceRef un13_ciin_i_0_0_a3_4)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a3_8)) + )) + (net un10_ciin_5 (joined + (portRef O (instanceRef un13_ciin_i_0_0_a3_5)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a3_9)) + )) + (net un10_ciin_6 (joined + (portRef O (instanceRef un13_ciin_i_0_0_a3_6)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a3_9)) + )) + (net un10_ciin_7 (joined + (portRef O (instanceRef un13_ciin_i_0_0_a3_7)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a3_10)) + )) + (net un10_ciin_8 (joined + (portRef O (instanceRef un13_ciin_i_0_0_a3_8)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a3_10)) + )) + (net un10_ciin_9 (joined + (portRef O (instanceRef un13_ciin_i_0_0_a3_9)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a3_11)) + )) + (net un10_ciin_10 (joined + (portRef O (instanceRef un13_ciin_i_0_0_a3_10)) + (portRef I0 (instanceRef un13_ciin_i_0_0_a3)) + )) + (net un10_ciin_11 (joined + (portRef O (instanceRef un13_ciin_i_0_0_a3_11)) + (portRef I1 (instanceRef un13_ciin_i_0_0_a3)) + )) + (net (rename pos_clk_un21_bgack_030_int_i_0_0_1 "pos_clk.un21_bgack_030_int_i_0_0_1") (joined + (portRef O (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_o3_1)) + (portRef I0 (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_o3)) + )) + (net (rename pos_clk_un21_bgack_030_int_i_0_0_2 "pos_clk.un21_bgack_030_int_i_0_0_2") (joined + (portRef O (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_o3_2)) + (portRef I1 (instanceRef pos_clk_un21_bgack_030_int_i_0_o2_2_o3)) + )) + (net N_309_i_1 (joined + (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_1)) + (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0)) + )) + (net N_309_i_2 (joined + (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_2)) + (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0)) + )) + (net N_229_1 (joined (portRef O (instanceRef pos_clk_un37_as_030_d0_i_i_a3_1)) (portRef I0 (instanceRef pos_clk_un37_as_030_d0_i_i_a3)) )) - (net N_260_2 (joined + (net N_229_2 (joined (portRef O (instanceRef pos_clk_un37_as_030_d0_i_i_a3_2)) (portRef I1 (instanceRef pos_clk_un37_as_030_d0_i_i_a3)) )) + (net N_214_1_0 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_i_0_a3_0_1_6)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_0_a3_0_6)) + )) (net un21_fpu_cs_1 (joined (portRef O (instanceRef un21_fpu_cs_0_a2_0_a3_1)) (portRef I0 (instanceRef un21_fpu_cs_0_a2_0_a3)) @@ -4050,129 +3998,141 @@ (portRef O (instanceRef un22_berr_0_a2_0_a3_1_0)) (portRef I0 (instanceRef un22_berr_0_a2_0_a3)) )) - (net N_275_i_1 (joined + (net N_255_1 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a2_4_1_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_4_0)) + )) + (net N_255_2 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a2_4_2_0)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a2_4_0)) + )) + (net N_151_0_1 (joined + (portRef O (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_o2_1_0)) + (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_o2)) + )) + (net N_277_i_1 (joined (portRef O (instanceRef RST_DLY_e1_i_0_1)) (portRef I0 (instanceRef RST_DLY_e1_i_0)) )) - (net N_275_i_2 (joined + (net N_277_i_2 (joined (portRef O (instanceRef RST_DLY_e1_i_0_2)) (portRef I1 (instanceRef RST_DLY_e1_i_0)) )) - (net N_274_i_1 (joined + (net N_276_i_1 (joined (portRef O (instanceRef RST_DLY_e2_i_0_1)) (portRef I0 (instanceRef RST_DLY_e2_i_0)) )) - (net N_274_i_2 (joined + (net N_276_i_2 (joined (portRef O (instanceRef RST_DLY_e2_i_0_2)) (portRef I1 (instanceRef RST_DLY_e2_i_0)) )) - (net N_115_1 (joined - (portRef O (instanceRef un1_SM_AMIGA_1_i_a2_3_a3_1)) - (portRef I0 (instanceRef un1_SM_AMIGA_1_i_a2_3_a3)) + (net N_221_1 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_1)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0)) )) - (net N_115_2 (joined - (portRef O (instanceRef un1_SM_AMIGA_1_i_a2_3_a3_2)) - (portRef I1 (instanceRef un1_SM_AMIGA_1_i_a2_3_a3)) + (net N_221_2 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_2)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0)) )) - (net N_332_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_i_a3_0_1_6)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_a3_0_6)) + (net N_220_1 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_1)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3)) )) - (net N_246_1 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_a3_2_1_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_a3_2_4_0)) + (net N_220_2 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_2)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3)) )) - (net N_246_2 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_a3_2_2_0)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_a3_2_4_0)) + (net N_194_1 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a3_2_1_0_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_2_3_0)) )) - (net N_246_3 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_a3_2_3_0)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_a3_2_0)) + (net N_194_2 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a3_2_2_0)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_2_3_0)) )) - (net N_246_4 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_a3_2_4_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_a3_2_0)) + (net N_194_3 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a3_2_3_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_2_0)) )) - (net N_332_4_1 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_a3_2_5_1_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_a3_2_5_0)) + (net N_278_i_1 (joined + (portRef O (instanceRef RST_DLY_e0_i_0_1)) + (portRef I0 (instanceRef RST_DLY_e0_i_0)) )) - (net N_332_4_2 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_0_0_a3_2_5_2_0)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_0_0_a3_2_5_0)) - )) - (net N_273_0_1 (joined + (net N_307_0_1 (joined (portRef O (instanceRef DS_000_DMA_2_sqmuxa_i_0_1)) (portRef I0 (instanceRef DS_000_DMA_2_sqmuxa_i_0)) )) - (net N_276_i_1 (joined + (net N_308_i_1 (joined (portRef O (instanceRef CLK_030_H_2_i_0_1)) (portRef I0 (instanceRef CLK_030_H_2_i_0)) )) - (net N_277_i_1 (joined + (net N_40_i_1 (joined (portRef O (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_1)) (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0)) )) - (net N_314_i_1 (joined - (portRef O (instanceRef RST_DLY_e0_i_1)) - (portRef I0 (instanceRef RST_DLY_e0_i)) + (net N_250_1 (joined + (portRef O (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_a2_1)) + (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_1_i_0_a2)) )) - (net N_356_1 (joined - (portRef O (instanceRef DSACK1_INT_1_sqmuxa_i_0_a2_1)) - (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_i_0_a2)) - )) - (net N_282_1 (joined - (portRef O (instanceRef AMIGA_BUS_DATA_DIR_0_0_0_a3_0_1)) - (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_0_0_a3_0)) - )) - (net N_251_1 (joined + (net N_223_1 (joined (portRef O (instanceRef cpu_est_2_0_0_a3_1_1_1)) (portRef I0 (instanceRef cpu_est_2_0_0_a3_1_1)) )) (net (rename pos_clk_un6_bg_030_1 "pos_clk.un6_bg_030_1") (joined - (portRef O (instanceRef pos_clk_un6_bg_030_0_a3_1)) - (portRef I0 (instanceRef pos_clk_un6_bg_030_0_a3)) + (portRef O (instanceRef pos_clk_un6_bg_030_0_a2_0_a3_1)) + (portRef I0 (instanceRef pos_clk_un6_bg_030_0_a2_0_a3)) )) - (net N_240_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_i_a3_1_6)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_a3_6)) + (net N_213_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_i_0_a3_1_6)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_0_a3_6)) )) - (net N_238_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a3_1_5)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a3_5)) + (net N_208_1 (joined + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_0_0_0_a3_0_1)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_0_0_a3_0)) )) - (net N_233_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a3_1_2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a3_2)) + (net N_205_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_0_0_0_a3_1_5)) + (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_0_a3_5)) )) - (net N_231_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_0_0_a3_1_1)) - (portRef I0 (instanceRef SM_AMIGA_srsts_0_0_a3_1)) + (net N_193_1 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_0_0_0_a3_1_1_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_0_0_0_a3_1_0)) )) - (net N_224_1 (joined + (net N_190_1 (joined (portRef O (instanceRef RST_DLY_e1_i_0_a3_1_1)) (portRef I0 (instanceRef RST_DLY_e1_i_0_a3_1)) )) - (net N_218_1 (joined + (net N_184_1 (joined (portRef O (instanceRef RST_DLY_e2_i_0_a3_1_0)) (portRef I0 (instanceRef RST_DLY_e2_i_0_a3)) )) (net (rename pos_clk_ipl_1 "pos_clk.ipl_1") (joined - (portRef O (instanceRef G_119_1)) - (portRef I0 (instanceRef G_119)) + (portRef O (instanceRef G_120_1)) + (portRef I0 (instanceRef G_120)) )) - (net (rename RW_000_DMA_0_un3 "RW_000_DMA_0.un3") (joined - (portRef O (instanceRef RW_000_DMA_0_r)) - (portRef I1 (instanceRef RW_000_DMA_0_n)) + (net (rename IPL_030_0_1__un3 "IPL_030_0_1_.un3") (joined + (portRef O (instanceRef IPL_030_0_1__r)) + (portRef I1 (instanceRef IPL_030_0_1__n)) )) - (net (rename RW_000_DMA_0_un1 "RW_000_DMA_0.un1") (joined - (portRef O (instanceRef RW_000_DMA_0_m)) - (portRef I0 (instanceRef RW_000_DMA_0_p)) + (net (rename IPL_030_0_1__un1 "IPL_030_0_1_.un1") (joined + (portRef O (instanceRef IPL_030_0_1__m)) + (portRef I0 (instanceRef IPL_030_0_1__p)) )) - (net (rename RW_000_DMA_0_un0 "RW_000_DMA_0.un0") (joined - (portRef O (instanceRef RW_000_DMA_0_n)) - (portRef I1 (instanceRef RW_000_DMA_0_p)) + (net (rename IPL_030_0_1__un0 "IPL_030_0_1_.un0") (joined + (portRef O (instanceRef IPL_030_0_1__n)) + (portRef I1 (instanceRef IPL_030_0_1__p)) + )) + (net (rename UDS_000_INT_0_un3 "UDS_000_INT_0.un3") (joined + (portRef O (instanceRef UDS_000_INT_0_r)) + (portRef I1 (instanceRef UDS_000_INT_0_n)) + )) + (net (rename UDS_000_INT_0_un1 "UDS_000_INT_0.un1") (joined + (portRef O (instanceRef UDS_000_INT_0_m)) + (portRef I0 (instanceRef UDS_000_INT_0_p)) + )) + (net (rename UDS_000_INT_0_un0 "UDS_000_INT_0.un0") (joined + (portRef O (instanceRef UDS_000_INT_0_n)) + (portRef I1 (instanceRef UDS_000_INT_0_p)) )) (net (rename LDS_000_INT_0_un3 "LDS_000_INT_0.un3") (joined (portRef O (instanceRef LDS_000_INT_0_r)) @@ -4186,17 +4146,65 @@ (portRef O (instanceRef LDS_000_INT_0_n)) (portRef I1 (instanceRef LDS_000_INT_0_p)) )) - (net (rename IPL_030_0_1__un3 "IPL_030_0_1_.un3") (joined - (portRef O (instanceRef IPL_030_0_1__r)) - (portRef I1 (instanceRef IPL_030_0_1__n)) + (net (rename DS_000_ENABLE_0_un3 "DS_000_ENABLE_0.un3") (joined + (portRef O (instanceRef DS_000_ENABLE_0_r)) + (portRef I1 (instanceRef DS_000_ENABLE_0_n)) )) - (net (rename IPL_030_0_1__un1 "IPL_030_0_1_.un1") (joined - (portRef O (instanceRef IPL_030_0_1__m)) - (portRef I0 (instanceRef IPL_030_0_1__p)) + (net (rename DS_000_ENABLE_0_un1 "DS_000_ENABLE_0.un1") (joined + (portRef O (instanceRef DS_000_ENABLE_0_m)) + (portRef I0 (instanceRef DS_000_ENABLE_0_p)) )) - (net (rename IPL_030_0_1__un0 "IPL_030_0_1_.un0") (joined - (portRef O (instanceRef IPL_030_0_1__n)) - (portRef I1 (instanceRef IPL_030_0_1__p)) + (net (rename DS_000_ENABLE_0_un0 "DS_000_ENABLE_0.un0") (joined + (portRef O (instanceRef DS_000_ENABLE_0_n)) + (portRef I1 (instanceRef DS_000_ENABLE_0_p)) + )) + (net (rename VMA_INT_0_un3 "VMA_INT_0.un3") (joined + (portRef O (instanceRef VMA_INT_0_r)) + (portRef I1 (instanceRef VMA_INT_0_n)) + )) + (net (rename VMA_INT_0_un1 "VMA_INT_0.un1") (joined + (portRef O (instanceRef VMA_INT_0_m)) + (portRef I0 (instanceRef VMA_INT_0_p)) + )) + (net (rename VMA_INT_0_un0 "VMA_INT_0.un0") (joined + (portRef O (instanceRef VMA_INT_0_n)) + (portRef I1 (instanceRef VMA_INT_0_p)) + )) + (net (rename cpu_est_0_1__un3 "cpu_est_0_1_.un3") (joined + (portRef O (instanceRef cpu_est_0_1__r)) + (portRef I1 (instanceRef cpu_est_0_1__n)) + )) + (net (rename cpu_est_0_1__un1 "cpu_est_0_1_.un1") (joined + (portRef O (instanceRef cpu_est_0_1__m)) + (portRef I0 (instanceRef cpu_est_0_1__p)) + )) + (net (rename cpu_est_0_1__un0 "cpu_est_0_1_.un0") (joined + (portRef O (instanceRef cpu_est_0_1__n)) + (portRef I1 (instanceRef cpu_est_0_1__p)) + )) + (net (rename cpu_est_0_2__un3 "cpu_est_0_2_.un3") (joined + (portRef O (instanceRef cpu_est_0_2__r)) + (portRef I1 (instanceRef cpu_est_0_2__n)) + )) + (net (rename cpu_est_0_2__un1 "cpu_est_0_2_.un1") (joined + (portRef O (instanceRef cpu_est_0_2__m)) + (portRef I0 (instanceRef cpu_est_0_2__p)) + )) + (net (rename cpu_est_0_2__un0 "cpu_est_0_2_.un0") (joined + (portRef O (instanceRef cpu_est_0_2__n)) + (portRef I1 (instanceRef cpu_est_0_2__p)) + )) + (net (rename cpu_est_0_3__un3 "cpu_est_0_3_.un3") (joined + (portRef O (instanceRef cpu_est_0_3__r)) + (portRef I1 (instanceRef cpu_est_0_3__n)) + )) + (net (rename cpu_est_0_3__un1 "cpu_est_0_3_.un1") (joined + (portRef O (instanceRef cpu_est_0_3__m)) + (portRef I0 (instanceRef cpu_est_0_3__p)) + )) + (net (rename cpu_est_0_3__un0 "cpu_est_0_3_.un0") (joined + (portRef O (instanceRef cpu_est_0_3__n)) + (portRef I1 (instanceRef cpu_est_0_3__p)) )) (net (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_un3 "AMIGA_BUS_ENABLE_DMA_HIGH_0.un3") (joined (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_r)) @@ -4222,77 +4230,29 @@ (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_n)) (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_p)) )) - (net (rename UDS_000_INT_0_un3 "UDS_000_INT_0.un3") (joined - (portRef O (instanceRef UDS_000_INT_0_r)) - (portRef I1 (instanceRef UDS_000_INT_0_n)) + (net (rename A0_DMA_0_un3 "A0_DMA_0.un3") (joined + (portRef O (instanceRef A0_DMA_0_r)) + (portRef I1 (instanceRef A0_DMA_0_n)) )) - (net (rename UDS_000_INT_0_un1 "UDS_000_INT_0.un1") (joined - (portRef O (instanceRef UDS_000_INT_0_m)) - (portRef I0 (instanceRef UDS_000_INT_0_p)) + (net (rename A0_DMA_0_un1 "A0_DMA_0.un1") (joined + (portRef O (instanceRef A0_DMA_0_m)) + (portRef I0 (instanceRef A0_DMA_0_p)) )) - (net (rename UDS_000_INT_0_un0 "UDS_000_INT_0.un0") (joined - (portRef O (instanceRef UDS_000_INT_0_n)) - (portRef I1 (instanceRef UDS_000_INT_0_p)) + (net (rename A0_DMA_0_un0 "A0_DMA_0.un0") (joined + (portRef O (instanceRef A0_DMA_0_n)) + (portRef I1 (instanceRef A0_DMA_0_p)) )) - (net (rename IPL_030_0_2__un3 "IPL_030_0_2_.un3") (joined - (portRef O (instanceRef IPL_030_0_2__r)) - (portRef I1 (instanceRef IPL_030_0_2__n)) + (net (rename RW_000_DMA_0_un3 "RW_000_DMA_0.un3") (joined + (portRef O (instanceRef RW_000_DMA_0_r)) + (portRef I1 (instanceRef RW_000_DMA_0_n)) )) - (net (rename IPL_030_0_2__un1 "IPL_030_0_2_.un1") (joined - (portRef O (instanceRef IPL_030_0_2__m)) - (portRef I0 (instanceRef IPL_030_0_2__p)) + (net (rename RW_000_DMA_0_un1 "RW_000_DMA_0.un1") (joined + (portRef O (instanceRef RW_000_DMA_0_m)) + (portRef I0 (instanceRef RW_000_DMA_0_p)) )) - (net (rename IPL_030_0_2__un0 "IPL_030_0_2_.un0") (joined - (portRef O (instanceRef IPL_030_0_2__n)) - (portRef I1 (instanceRef IPL_030_0_2__p)) - )) - (net (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__un3 "un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0_.un3") (joined - (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__r)) - (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__n)) - )) - (net (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__un1 "un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0_.un1") (joined - (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__m)) - (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__p)) - )) - (net (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__un0 "un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0_.un0") (joined - (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__n)) - (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_0__p)) - )) - (net (rename AS_000_INT_0_un3 "AS_000_INT_0.un3") (joined - (portRef O (instanceRef AS_000_INT_0_r)) - (portRef I1 (instanceRef AS_000_INT_0_n)) - )) - (net (rename AS_000_INT_0_un1 "AS_000_INT_0.un1") (joined - (portRef O (instanceRef AS_000_INT_0_m)) - (portRef I0 (instanceRef AS_000_INT_0_p)) - )) - (net (rename AS_000_INT_0_un0 "AS_000_INT_0.un0") (joined - (portRef O (instanceRef AS_000_INT_0_n)) - (portRef I1 (instanceRef AS_000_INT_0_p)) - )) - (net (rename DS_000_ENABLE_0_un3 "DS_000_ENABLE_0.un3") (joined - (portRef O (instanceRef DS_000_ENABLE_0_r)) - (portRef I1 (instanceRef DS_000_ENABLE_0_n)) - )) - (net (rename DS_000_ENABLE_0_un1 "DS_000_ENABLE_0.un1") (joined - (portRef O (instanceRef DS_000_ENABLE_0_m)) - (portRef I0 (instanceRef DS_000_ENABLE_0_p)) - )) - (net (rename DS_000_ENABLE_0_un0 "DS_000_ENABLE_0.un0") (joined - (portRef O (instanceRef DS_000_ENABLE_0_n)) - (portRef I1 (instanceRef DS_000_ENABLE_0_p)) - )) - (net (rename AS_030_000_SYNC_0_un3 "AS_030_000_SYNC_0.un3") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_r)) - (portRef I1 (instanceRef AS_030_000_SYNC_0_n)) - )) - (net (rename AS_030_000_SYNC_0_un1 "AS_030_000_SYNC_0.un1") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_m)) - (portRef I0 (instanceRef AS_030_000_SYNC_0_p)) - )) - (net (rename AS_030_000_SYNC_0_un0 "AS_030_000_SYNC_0.un0") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_n)) - (portRef I1 (instanceRef AS_030_000_SYNC_0_p)) + (net (rename RW_000_DMA_0_un0 "RW_000_DMA_0.un0") (joined + (portRef O (instanceRef RW_000_DMA_0_n)) + (portRef I1 (instanceRef RW_000_DMA_0_p)) )) (net (rename RW_000_INT_0_un3 "RW_000_INT_0.un3") (joined (portRef O (instanceRef RW_000_INT_0_r)) @@ -4306,17 +4266,17 @@ (portRef O (instanceRef RW_000_INT_0_n)) (portRef I1 (instanceRef RW_000_INT_0_p)) )) - (net (rename A0_DMA_0_un3 "A0_DMA_0.un3") (joined - (portRef O (instanceRef A0_DMA_0_r)) - (portRef I1 (instanceRef A0_DMA_0_n)) + (net (rename BGACK_030_INT_0_un3 "BGACK_030_INT_0.un3") (joined + (portRef O (instanceRef BGACK_030_INT_0_r)) + (portRef I1 (instanceRef BGACK_030_INT_0_n)) )) - (net (rename A0_DMA_0_un1 "A0_DMA_0.un1") (joined - (portRef O (instanceRef A0_DMA_0_m)) - (portRef I0 (instanceRef A0_DMA_0_p)) + (net (rename BGACK_030_INT_0_un1 "BGACK_030_INT_0.un1") (joined + (portRef O (instanceRef BGACK_030_INT_0_m)) + (portRef I0 (instanceRef BGACK_030_INT_0_p)) )) - (net (rename A0_DMA_0_un0 "A0_DMA_0.un0") (joined - (portRef O (instanceRef A0_DMA_0_n)) - (portRef I1 (instanceRef A0_DMA_0_p)) + (net (rename BGACK_030_INT_0_un0 "BGACK_030_INT_0.un0") (joined + (portRef O (instanceRef BGACK_030_INT_0_n)) + (portRef I1 (instanceRef BGACK_030_INT_0_p)) )) (net (rename BG_000_0_un3 "BG_000_0.un3") (joined (portRef O (instanceRef BG_000_0_r)) @@ -4354,101 +4314,17 @@ (portRef O (instanceRef SIZE_DMA_0_0__n)) (portRef I1 (instanceRef SIZE_DMA_0_0__p)) )) - (net (rename BGACK_030_INT_0_un3 "BGACK_030_INT_0.un3") (joined - (portRef O (instanceRef BGACK_030_INT_0_r)) - (portRef I1 (instanceRef BGACK_030_INT_0_n)) + (net (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__un3 "un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0_.un3") (joined + (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__r)) + (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__n)) )) - (net (rename BGACK_030_INT_0_un1 "BGACK_030_INT_0.un1") (joined - (portRef O (instanceRef BGACK_030_INT_0_m)) - (portRef I0 (instanceRef BGACK_030_INT_0_p)) + (net (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__un1 "un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0_.un1") (joined + (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__m)) + (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__p)) )) - (net (rename BGACK_030_INT_0_un0 "BGACK_030_INT_0.un0") (joined - (portRef O (instanceRef BGACK_030_INT_0_n)) - (portRef I1 (instanceRef BGACK_030_INT_0_p)) - )) - (net (rename DSACK1_INT_0_un3 "DSACK1_INT_0.un3") (joined - (portRef O (instanceRef DSACK1_INT_0_r)) - (portRef I1 (instanceRef DSACK1_INT_0_n)) - )) - (net (rename DSACK1_INT_0_un1 "DSACK1_INT_0.un1") (joined - (portRef O (instanceRef DSACK1_INT_0_m)) - (portRef I0 (instanceRef DSACK1_INT_0_p)) - )) - (net (rename DSACK1_INT_0_un0 "DSACK1_INT_0.un0") (joined - (portRef O (instanceRef DSACK1_INT_0_n)) - (portRef I1 (instanceRef DSACK1_INT_0_p)) - )) - (net (rename cpu_est_0_3__un3 "cpu_est_0_3_.un3") (joined - (portRef O (instanceRef cpu_est_0_3__r)) - (portRef I1 (instanceRef cpu_est_0_3__n)) - )) - (net (rename cpu_est_0_3__un1 "cpu_est_0_3_.un1") (joined - (portRef O (instanceRef cpu_est_0_3__m)) - (portRef I0 (instanceRef cpu_est_0_3__p)) - )) - (net (rename cpu_est_0_3__un0 "cpu_est_0_3_.un0") (joined - (portRef O (instanceRef cpu_est_0_3__n)) - (portRef I1 (instanceRef cpu_est_0_3__p)) - )) - (net (rename cpu_est_0_2__un3 "cpu_est_0_2_.un3") (joined - (portRef O (instanceRef cpu_est_0_2__r)) - (portRef I1 (instanceRef cpu_est_0_2__n)) - )) - (net (rename cpu_est_0_2__un1 "cpu_est_0_2_.un1") (joined - (portRef O (instanceRef cpu_est_0_2__m)) - (portRef I0 (instanceRef cpu_est_0_2__p)) - )) - (net (rename cpu_est_0_2__un0 "cpu_est_0_2_.un0") (joined - (portRef O (instanceRef cpu_est_0_2__n)) - (portRef I1 (instanceRef cpu_est_0_2__p)) - )) - (net (rename cpu_est_0_1__un3 "cpu_est_0_1_.un3") (joined - (portRef O (instanceRef cpu_est_0_1__r)) - (portRef I1 (instanceRef cpu_est_0_1__n)) - )) - (net (rename cpu_est_0_1__un1 "cpu_est_0_1_.un1") (joined - (portRef O (instanceRef cpu_est_0_1__m)) - (portRef I0 (instanceRef cpu_est_0_1__p)) - )) - (net (rename cpu_est_0_1__un0 "cpu_est_0_1_.un0") (joined - (portRef O (instanceRef cpu_est_0_1__n)) - (portRef I1 (instanceRef cpu_est_0_1__p)) - )) - (net (rename VMA_INT_0_un3 "VMA_INT_0.un3") (joined - (portRef O (instanceRef VMA_INT_0_r)) - (portRef I1 (instanceRef VMA_INT_0_n)) - )) - (net (rename VMA_INT_0_un1 "VMA_INT_0.un1") (joined - (portRef O (instanceRef VMA_INT_0_m)) - (portRef I0 (instanceRef VMA_INT_0_p)) - )) - (net (rename VMA_INT_0_un0 "VMA_INT_0.un0") (joined - (portRef O (instanceRef VMA_INT_0_n)) - (portRef I1 (instanceRef VMA_INT_0_p)) - )) - (net (rename IPL_030_0_0__un3 "IPL_030_0_0_.un3") (joined - (portRef O (instanceRef IPL_030_0_0__r)) - (portRef I1 (instanceRef IPL_030_0_0__n)) - )) - (net (rename IPL_030_0_0__un1 "IPL_030_0_0_.un1") (joined - (portRef O (instanceRef IPL_030_0_0__m)) - (portRef I0 (instanceRef IPL_030_0_0__p)) - )) - (net (rename IPL_030_0_0__un0 "IPL_030_0_0_.un0") (joined - (portRef O (instanceRef IPL_030_0_0__n)) - (portRef I1 (instanceRef IPL_030_0_0__p)) - )) - (net (rename DS_000_DMA_0_un3 "DS_000_DMA_0.un3") (joined - (portRef O (instanceRef DS_000_DMA_0_r)) - (portRef I1 (instanceRef DS_000_DMA_0_n)) - )) - (net (rename DS_000_DMA_0_un1 "DS_000_DMA_0.un1") (joined - (portRef O (instanceRef DS_000_DMA_0_m)) - (portRef I0 (instanceRef DS_000_DMA_0_p)) - )) - (net (rename DS_000_DMA_0_un0 "DS_000_DMA_0.un0") (joined - (portRef O (instanceRef DS_000_DMA_0_n)) - (portRef I1 (instanceRef DS_000_DMA_0_p)) + (net (rename un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__un0 "un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0_.un0") (joined + (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__n)) + (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_DMA_HIGH_i_m2_i_m2_0__p)) )) (net (rename AS_000_DMA_0_un3 "AS_000_DMA_0.un3") (joined (portRef O (instanceRef AS_000_DMA_0_r)) @@ -4462,6 +4338,78 @@ (portRef O (instanceRef AS_000_DMA_0_n)) (portRef I1 (instanceRef AS_000_DMA_0_p)) )) + (net (rename IPL_030_0_0__un3 "IPL_030_0_0_.un3") (joined + (portRef O (instanceRef IPL_030_0_0__r)) + (portRef I1 (instanceRef IPL_030_0_0__n)) + )) + (net (rename IPL_030_0_0__un1 "IPL_030_0_0_.un1") (joined + (portRef O (instanceRef IPL_030_0_0__m)) + (portRef I0 (instanceRef IPL_030_0_0__p)) + )) + (net (rename IPL_030_0_0__un0 "IPL_030_0_0_.un0") (joined + (portRef O (instanceRef IPL_030_0_0__n)) + (portRef I1 (instanceRef IPL_030_0_0__p)) + )) + (net (rename IPL_030_0_2__un3 "IPL_030_0_2_.un3") (joined + (portRef O (instanceRef IPL_030_0_2__r)) + (portRef I1 (instanceRef IPL_030_0_2__n)) + )) + (net (rename IPL_030_0_2__un1 "IPL_030_0_2_.un1") (joined + (portRef O (instanceRef IPL_030_0_2__m)) + (portRef I0 (instanceRef IPL_030_0_2__p)) + )) + (net (rename IPL_030_0_2__un0 "IPL_030_0_2_.un0") (joined + (portRef O (instanceRef IPL_030_0_2__n)) + (portRef I1 (instanceRef IPL_030_0_2__p)) + )) + (net (rename DS_000_DMA_0_un3 "DS_000_DMA_0.un3") (joined + (portRef O (instanceRef DS_000_DMA_0_r)) + (portRef I1 (instanceRef DS_000_DMA_0_n)) + )) + (net (rename DS_000_DMA_0_un1 "DS_000_DMA_0.un1") (joined + (portRef O (instanceRef DS_000_DMA_0_m)) + (portRef I0 (instanceRef DS_000_DMA_0_p)) + )) + (net (rename DS_000_DMA_0_un0 "DS_000_DMA_0.un0") (joined + (portRef O (instanceRef DS_000_DMA_0_n)) + (portRef I1 (instanceRef DS_000_DMA_0_p)) + )) + (net (rename DSACK1_INT_0_un3 "DSACK1_INT_0.un3") (joined + (portRef O (instanceRef DSACK1_INT_0_r)) + (portRef I1 (instanceRef DSACK1_INT_0_n)) + )) + (net (rename DSACK1_INT_0_un1 "DSACK1_INT_0.un1") (joined + (portRef O (instanceRef DSACK1_INT_0_m)) + (portRef I0 (instanceRef DSACK1_INT_0_p)) + )) + (net (rename DSACK1_INT_0_un0 "DSACK1_INT_0.un0") (joined + (portRef O (instanceRef DSACK1_INT_0_n)) + (portRef I1 (instanceRef DSACK1_INT_0_p)) + )) + (net (rename AS_000_INT_0_un3 "AS_000_INT_0.un3") (joined + (portRef O (instanceRef AS_000_INT_0_r)) + (portRef I1 (instanceRef AS_000_INT_0_n)) + )) + (net (rename AS_000_INT_0_un1 "AS_000_INT_0.un1") (joined + (portRef O (instanceRef AS_000_INT_0_m)) + (portRef I0 (instanceRef AS_000_INT_0_p)) + )) + (net (rename AS_000_INT_0_un0 "AS_000_INT_0.un0") (joined + (portRef O (instanceRef AS_000_INT_0_n)) + (portRef I1 (instanceRef AS_000_INT_0_p)) + )) + (net (rename AS_030_000_SYNC_0_un3 "AS_030_000_SYNC_0.un3") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_r)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_n)) + )) + (net (rename AS_030_000_SYNC_0_un1 "AS_030_000_SYNC_0.un1") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_m)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_p)) + )) + (net (rename AS_030_000_SYNC_0_un0 "AS_030_000_SYNC_0.un0") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_n)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_p)) + )) ) (property orig_inst_of (string "BUS68030")) ) diff --git a/Logic/BUS68030.fse b/Logic/BUS68030.fse index d7c403b..ab314ce 100644 --- a/Logic/BUS68030.fse +++ b/Logic/BUS68030.fse @@ -1,20 +1,20 @@ -fsm_encoding {7130381301} onehot +fsm_encoding {7131381311} onehot -fsm_state_encoding {7130381301} idle_p {00000000} +fsm_state_encoding {7131381311} idle_p {00000000} -fsm_state_encoding {7130381301} idle_n {00000011} +fsm_state_encoding {7131381311} idle_n {00000011} -fsm_state_encoding {7130381301} as_set_p {00000101} +fsm_state_encoding {7131381311} as_set_p {00000101} -fsm_state_encoding {7130381301} as_set_n {00001001} +fsm_state_encoding {7131381311} as_set_n {00001001} -fsm_state_encoding {7130381301} sample_dtack_p {00010001} +fsm_state_encoding {7131381311} sample_dtack_p {00010001} -fsm_state_encoding {7130381301} data_fetch_n {00100001} +fsm_state_encoding {7131381311} data_fetch_n {00100001} -fsm_state_encoding {7130381301} data_fetch_p {01000001} +fsm_state_encoding {7131381311} data_fetch_p {01000001} -fsm_state_encoding {7130381301} end_cycle_n {10000001} +fsm_state_encoding {7131381311} end_cycle_n {10000001} -fsm_registers {7130381301} {SM_AMIGA[0]} {SM_AMIGA[1]} {SM_AMIGA[2]} {SM_AMIGA[3]} {SM_AMIGA[4]} {SM_AMIGA[5]} {SM_AMIGA[6]} {SM_AMIGA_i[7]} +fsm_registers {7131381311} {SM_AMIGA[0]} {SM_AMIGA[1]} {SM_AMIGA[2]} {SM_AMIGA[3]} {SM_AMIGA[4]} {SM_AMIGA[5]} {SM_AMIGA[6]} {SM_AMIGA_i[7]} diff --git a/Logic/BUS68030.prj b/Logic/BUS68030.prj index 2c7c9c7..7708c08 100644 --- a/Logic/BUS68030.prj +++ b/Logic/BUS68030.prj @@ -1,6 +1,6 @@ #-- Lattice Semiconductor Corporation Ltd. #-- Synplify OEM project file c:/users/matze/documents/github/68030tk/logic\BUS68030.prj -#-- Written on Fri Aug 19 00:39:21 2016 +#-- Written on Wed Aug 24 22:17:35 2016 #device options diff --git a/Logic/BUS68030.srm b/Logic/BUS68030.srm index 7238bae..885cdf5 100644 --- a/Logic/BUS68030.srm +++ b/Logic/BUS68030.srm @@ -187,9 +187,8 @@ NR#3H_8PED;R4 RNP3ONsEDVHC;R( RNP38lFkVDCHRDC(N; P#R3$VM_lRNb"sIF "R\B\:\ks#C#l\\NC0x\F\8OCklM\0#\0oHE\kL\jnUd j0\F\Do\HO\jnUdnj-Ujjj-#Lk38PE\M"\"N; -POR3DMCNk#b_0.Cb_l0HC3RjjUcn(;6j +POR3DMCNk#b_0.Cb_l0HC3Rjj.d46;jj RNP3CODNbMk_C#0b04_HRlCj43j66n.jN; -POR3F0M#N_M0sRCo"qAtBji_dQj_hua_)4 R"N; P#R30Dl0H0#0HRlCjj3jjjjj;P NRHFsoM_H#F0_VAR"zU1nj"dj;P NRs3FHNohl"CRAnz1Ujjd"N; @@ -202,8 +201,8 @@ PVR3D_FIDbFF#s_LFM CR j;}N; P$R#M#_HlCHG8MDNo;R4 RNP3M#$_#lV_FoskHb_8;Rj -RNP3M#$_lMkOsEN#dRUc -j;N3PR#_$MD HMC8sHRd"{BB nn-cwq4g(-.c4A4-gqU6-g4( 7.Ajj}UU"N; +RNP3M#$_lMkOsEN#dRUU +U;N3PR#_$MD HMC8sHRB"{dnc7j-c(j4jj-qcj4n-q.q.-(U.gggUw7}Bq"N; POR38#L_NRPC{P NRM#$_VsCCMsCOOC_D FORN{ P$R1#l0CRN{ @@ -378,129 +377,129 @@ n;okMRM8n_#d_jjN; M#R3N_PCM_C0VoDN#.4R6 n;ohMR_ d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMh;_U +RoMh;_c RNM3P#NCC_M0D_VN4o#Rn.6;M -oR4h_4N; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;4. -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR4h_cN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;46 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR4h_nN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;.( -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_jN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;d4 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_.N; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;dd -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_cN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;d6 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_nN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;d( -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_UN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;cj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRch_4N; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;c. -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRch_dN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;c6 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRch_nN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;c( -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRch_UN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;cg -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR6h_4N; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;6. -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR6h_dN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;6c -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR6h_6N; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;6( -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR6h_UN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;(j -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR(h_4N; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;(. -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR(h_dN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;(c -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR(h_6N; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;(n -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR(h_(N; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_4.c;M +oR6h_;M NRN3#PMC_CV0_D#No46R.no; -M_Rh.;c. +M_Rh(N; +M#R3N_PCM_C0VoDN#.4R6 +n;ohMR_ +U;N3MR#CNP_0MC_NVDoR#4.;6n +RoMh4_4;M +NRN3#PMC_CV0_D#No46R.no; +M_Rh4 +.;N3MR#CNP_0MC_NVDoR#4.;6n +RoMhc_4;M +NRN3#PMC_CV0_D#No46R.no; +M_Rh4 +6;N3MR#CNP_0MC_NVDoR#4.;6n +RoMhn_4;M +NRN3#PMC_CV0_D#No46R.no; +M_Rh. +(;N3MR#CNP_0MC_NVDoR#4.;6n +RoMhg_.;M +NRN3#PMC_CV0_D#No46R.no; +M_Rhd +j;N3MR#CNP_0MC_NVDoR#4.;6n +RoMh4_d;M +NRN3#PMC_CV0_D#No46R.no; +M_Rhd +.;N3MR#CNP_0MC_NVDoR#4.;6n +RoMhd_d;M +NRN3#PMC_CV0_D#No46R.no; +M_Rhd +c;N3MR#CNP_0MC_NVDoR#4.;6n +RoMh6_d;M +NRN3#PMC_CV0_D#No46R.no; +M_Rhd +n;N3MR#CNP_0MC_NVDoR#4.;6n +RoMh(_d;M +NRN3#PMC_CV0_D#No46R.no; +M_Rhd +U;N3MR#CNP_0MC_NVDoR#4.;6n +RoMhg_d;M +NRN3#PMC_CV0_D#No46R.no; +M_Rhc +4;N3MR#CNP_0MC_NVDoR#4.;6n +RoMh._c;M +NRN3#PMC_CV0_D#No46R.no; +M_Rhc +d;N3MR#CNP_0MC_NVDoR#4.;6n +RoMhc_c;M +NRN3#PMC_CV0_D#No46R.no; +M_Rhc +n;N3MR#CNP_0MC_NVDoR#4.;6n +RoMh(_c;M +NRN3#PMC_CV0_D#No46R.no; +M_Rhc +U;N3MR#CNP_0MC_NVDoR#4.;6n +RoMhg_c;M +NRN3#PMC_CV0_D#No46R.no; +M_Rh6 +j;N3MR#CNP_0MC_NVDoR#4.;6n +RoMh._6;M +NRN3#PMC_CV0_D#No46R.no; +M_Rh6 +d;N3MR#CNP_0MC_NVDoR#4.;6n +RoMhc_6;M +NRN3#PMC_CV0_D#No46R.no; +M_Rh6 +6;N3MR#CNP_0MC_NVDoR#4.;6n +RoMhn_6;M +NRN3#PMC_CV0_D#No46R.no; +M_Rh6 +U;N3MR#CNP_0MC_NVDoR#4.;6n +RoMhg_6;M +NRN3#PMC_CV0_D#No46R.no; +M_Rh( +4;N3MR#CNP_0MC_NVDoR#4.;6n +RoMh._(;M +NRN3#PMC_CV0_D#No46R.no; +M_Rh( +d;N3MR#CNP_0MC_NVDoR#4.;6n +RoMhc_(;M +NRN3#PMC_CV0_D#No46R.no; +M_Rh( +6;N3MR#CNP_0MC_NVDoR#4.;6n +RoMhn_(;M +NRN3#PMC_CV0_D#No46R.no; +M_Rh( +(;N3MR#CNP_0MC_NVDoR#4.;6n +RoMhU_(;M +NRN3#PMC_CV0_D#No46R.no; +M_Rh.;cc RNM3P#NCC_M0D_VN4o#Rn.6;M oR.h_c -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMh(_..N; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_d.(;M -NRN3#PMC_CV0_D#No46R.no; -M_Rhd;4d -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_4 6;N3MR#CNP_0MC_NVDoR#4.;6n -RoMh4_dgN; +RoMhc_.nN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_.d.;M +n;ohMR_j.U;M NRN3#PMC_CV0_D#No46R.no; -M_Rhd;.d +M_Rh.;U4 RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_d -4;N3MR#CNP_0MC_NVDoR#4.;6n -RoMhc_d4N; +oRdh_j +6;N3MR#CNP_0MC_NVDoR#4.;6n +RoMhj_dnN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_ndc;M +n;ohMR_(dj;M NRN3#PMC_CV0_D#No46R.no; -M_Rhd;66 +M_Rhd;4j RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_6 +oRdh_g n;N3MR#CNP_0MC_NVDoR#4.;6n -RoMh6_dgN; +RoMhj_c.N; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_jdn;M -NRN3#PMC_CV0_D#No46R.no; -M_Rhd;n6 +n;oQMRujp_djj__34_k;Md RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_n -n;N3MR#CNP_0MC_NVDoR#4.;6n -RoM)jW_j7j_vjq_3dkM;M -NRN3#PMC_CV0_D#No46R.no; -MWR)_jjj_q7v_kj3M -4;N3MR#CNP_0MC_NVDoR#4.;6n -RoM)jW_j7j_vjq_3jkM;M +oRpQu_jjd_4j__M3k4N; +M#R3N_PCM_C0VoDN#.4R6 +n;oQMRujp_djj__34_k;Mj +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR1z7_jjj_aQh_kj3M +d;N3MR#CNP_0MC_NVDoR#4.;6n +RoMz_71j_jjQ_hajM3k4N; +M#R3N_PCM_C0VoDN#.4R6 +n;ozMR7j1_jQj_hja_3jkM;M NRN3#PMC_CV0_D#No46R.no; M7Rp1j_jjh_Qa3_jk;Md RNM3P#NCC_M0D_VN4o#Rn.6;M @@ -508,11 +507,35 @@ oR1p7_jjj_aQh_kj3M 4;N3MR#CNP_0MC_NVDoR#4.;6n RoMp_71j_jjQ_hajM3kjN; M#R3N_PCM_C0VoDN#.4R6 -n;oQMRujp_djj__34_k;Md +n;o7MR1j_jjh_ q Ap_kj3M +d;N3MR#CNP_0MC_NVDoR#4.;6n +RoM7j1_j j_hpqA 3_jk;M4 RNM3P#NCC_M0D_VN4o#Rn.6;M -oRpQu_jjd_4j__M3k4N; +oR_71j_jj Ahqpj _3jkM;M +NRN3#PMC_CV0_D#No46R.no; +MvReqh_Qa3_jk;Md +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRqev_aQh_kj3M +4;N3MR#CNP_0MC_NVDoR#4.;6n +RoMe_vqQ_hajM3kjN; M#R3N_PCM_C0VoDN#.4R6 -n;oQMRujp_djj__34_k;Mj +n;oOMRbCk_#j0__34_k;Md +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRkOb_0C#_4j__M3k4N; +M#R3N_PCM_C0VoDN#.4R6 +n;oOMRbCk_#j0__34_k;Mj +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRkOb_0C#_.j__M3kdN; +M#R3N_PCM_C0VoDN#.4R6 +n;oOMRbCk_#j0__3._k;M4 +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRkOb_0C#_.j__M3kjN; +M#R3N_PCM_C0VoDN#.4R6 +n;oOMRbCk_#j0__3d_k;Md +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRkOb_0C#_dj__M3k4N; +M#R3N_PCM_C0VoDN#.4R6 +n;oOMRbCk_#j0__3d_k;Mj RNM3P#NCC_M0D_VN4o#Rn.6;M oRQqvtAq_z 1_hpqA v_7qQ_]tj]_3dkM;M NRN3#PMC_CV0_D#No46R.no; @@ -526,71 +549,23 @@ RoMqtvQqz_A1h_ q Ap_q7v_Wpm_kj3M 4;N3MR#CNP_0MC_NVDoR#4.;6n RoMqtvQqz_A1h_ q Ap_q7v_Wpm_kj3M j;N3MR#CNP_0MC_NVDoR#4.;6n -RoMz_71j_jjQ_hajM3kdN; -M#R3N_PCM_C0VoDN#.4R6 -n;ozMR7j1_jQj_hja_34kM;M -NRN3#PMC_CV0_D#No46R.no; -M7Rz1j_jjh_Qa3_jk;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRpQu_jjd_.j__M3kdN; -M#R3N_PCM_C0VoDN#.4R6 -n;oQMRujp_djj__3._k;M4 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRpQu_jjd_.j__M3kjN; -M#R3N_PCM_C0VoDN#.4R6 -n;okMRMq4_vqQt_1Az_q hA_p 7_vq]]Qt_lH_.__j3dkM;M -NRN3#PMC_CV0_D#No46R.no; -MMRk4v_qQ_tqA_z1 Ahqp7 _v]q_Q_t]H._l_3j_k;M4 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR4kM_QqvtAq_z 1_hpqA v_7qQ_]tH]___l.jk_3M -j;N3MR#CNP_0MC_NVDoR#4.;6n -RoMqj1_jQj_hja_3dkM;M -NRN3#PMC_CV0_D#No46R.no; -M1Rq_jjj_aQh_kj3M -4;N3MR#CNP_0MC_NVDoR#4.;6n -RoMqj1_jQj_hja_3jkM;M -NRN3#PMC_CV0_D#No46R.no; -M1R7_jjj_q hA_p jM3kdN; -M#R3N_PCM_C0VoDN#.4R6 -n;o7MR1j_jjh_ q Ap_kj3M -4;N3MR#CNP_0MC_NVDoR#4.;6n -RoM7j1_j j_hpqA 3_jk;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_q1j_djj_jj1BYh_kj3M -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMqj1_djj_j1j_Y_hBjM3k4N; -M#R3N_PCM_C0VoDN#.4R6 -n;oqMR1d_jjj_jjY_1hjB_3jkM;M -NRN3#PMC_CV0_D#No46R.no; -MWR)_jjj_aQh_kj3M -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoM)jW_jQj_hja_34kM;M -NRN3#PMC_CV0_D#No46R.no; -MWR)_jjj_aQh_kj3M -j;N3MR#CNP_0MC_NVDoR#4.;6n RoMq7j_vjq_3dkM;M NRN3#PMC_CV0_D#No46R.no; MjRq_q7v_kj3M 4;N3MR#CNP_0MC_NVDoR#4.;6n RoMq7j_vjq_3jkM;M NRN3#PMC_CV0_D#No46R.no; -MtRA_jjj_kj3M +MWR)_jjj_q7v_kj3M d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMAjt_jjj_34kM;M +RoM)jW_j7j_vjq_34kM;M NRN3#PMC_CV0_D#No46R.no; -MtRA_jjj_kj3M +MWR)_jjj_q7v_kj3M j;N3MR#CNP_0MC_NVDoR#4.;6n -RoM1 QZ_q7v_4j__M3kdN; -M#R3N_PCM_C0VoDN#.4R6 -n;o1MRQ_Z 7_vqj__434kM;M +RoM)jW_jQj_hja_3dkM;M NRN3#PMC_CV0_D#No46R.no; -MQR1Z7 _vjq__34_k;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRZ1Q v_7q__jjk_3M -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoM1 QZ_q7v_jj__M3k4N; -M#R3N_PCM_C0VoDN#.4R6 -n;o1MRQ_Z 7_vqj__j3jkM;M +MWR)_jjj_aQh_kj3M +4;N3MR#CNP_0MC_NVDoR#4.;6n +RoM)jW_jQj_hja_3jkM;M NRN3#PMC_CV0_D#No46R.no; MtRAq_Bij_djQ_hajM3kdN; M#R3N_PCM_C0VoDN#.4R6 @@ -598,116 +573,121 @@ n;oAMRtiqB_jjd_aQh_kj3M 4;N3MR#CNP_0MC_NVDoR#4.;6n RoMABtqid_jjh_Qa3_jk;Mj RNM3P#NCC_M0D_VN4o#Rn.6;M +oR_Atj_jjjM3kdN; +M#R3N_PCM_C0VoDN#.4R6 +n;oAMRtj_jj3_jk;M4 +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR_Atj_jjjM3kjN; +M#R3N_PCM_C0VoDN#.4R6 +n;o1MRQ_Z 7_vqj__43dkM;M +NRN3#PMC_CV0_D#No46R.no; +MQR1Z7 _vjq__34_k;M4 +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRZ1Q v_7q__j4k_3M +j;N3MR#CNP_0MC_NVDoR#4.;6n +RoM1 QZ_q7v_jj__M3kdN; +M#R3N_PCM_C0VoDN#.4R6 +n;o1MRQ_Z 7_vqj__j34kM;M +NRN3#PMC_CV0_D#No46R.no; +MQR1Z7 _vjq__3j_k;Mj +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR4kM_QqvtAq_z 1_hpqA v_7qQ_]tH]___l.H._l_3j_k;Md +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR4kM_QqvtAq_z 1_hpqA v_7qQ_]tH]___l.H._l_3j_k;M4 +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR4kM_QqvtAq_z 1_hpqA v_7qQ_]tH]___l.H._l_3j_k;Mj +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR_q1j_jj7_vqjM3kdN; +M#R3N_PCM_C0VoDN#.4R6 +n;oqMR1j_jjv_7q3_jk;M4 +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR_q1j_jj7_vqjM3kjN; +M#R3N_PCM_C0VoDN#.4R6 +n;oQMRujp_djj__3j_k;Md +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRpQu_jjd_jj__M3k4N; +M#R3N_PCM_C0VoDN#.4R6 +n;oQMRujp_djj__3j_k;Mj +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRpQu_jjd_.j__M3kdN; +M#R3N_PCM_C0VoDN#.4R6 +n;oQMRujp_djj__3._k;M4 +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRpQu_jjd_.j__M3kjN; +M#R3N_PCM_C0VoDN#.4R6 +n;o7MR1j_jjv_7q3_jk;Md +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR_71j_jj7_vqjM3k4N; +M#R3N_PCM_C0VoDN#.4R6 +n;o7MR1j_jjv_7q3_jk;Mj +RNM3P#NCC_M0D_VN4o#Rn.6;M oRq71B_i4Q_hajM3kdN; M#R3N_PCM_C0VoDN#.4R6 n;o7MR1iqB4h_Qa3_jk;M4 RNM3P#NCC_M0D_VN4o#Rn.6;M oRq71B_i4Q_hajM3kjN; M#R3N_PCM_C0VoDN#.4R6 -n;oOMRbCk_#j0__3d_k;Md +n;oqMR1j_jjh_Qa3_jk;Md RNM3P#NCC_M0D_VN4o#Rn.6;M -oRkOb_0C#_dj__M3k4N; +oR_q1j_jjQ_hajM3k4N; M#R3N_PCM_C0VoDN#.4R6 -n;oOMRbCk_#j0__3d_k;Mj +n;oqMR1j_jjh_Qa3_jk;Mj RNM3P#NCC_M0D_VN4o#Rn.6;M -oRkOb_0C#_.j__M3kdN; -M#R3N_PCM_C0VoDN#.4R6 -n;oOMRbCk_#j0__3._k;M4 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRkOb_0C#_.j__M3kjN; -M#R3N_PCM_C0VoDN#.4R6 -n;oOMRbCk_#j0__34_k;Md -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRkOb_0C#_4j__M3k4N; -M#R3N_PCM_C0VoDN#.4R6 -n;oOMRbCk_#j0__34_k;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRqev_aQh_kj3M +oR_q1j_djj_jj1BYh_kj3M d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMe_vqQ_hajM3k4N; +RoMqj1_djj_j1j_Y_hBjM3k4N; M#R3N_PCM_C0VoDN#.4R6 -n;oeMRvQq_hja_3jkM;M -NRN3#PMC_CV0_D#No46R.no; -MuRQpd_jj__jjk_3M -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMQ_upj_djj__j34kM;M -NRN3#PMC_CV0_D#No46R.no; -MuRQpd_jj__jjk_3M -j;N3MR#CNP_0MC_NVDoR#4.;6n -RoM7j1_j7j_vjq_3dkM;M -NRN3#PMC_CV0_D#No46R.no; -M1R7_jjj_q7v_kj3M -4;N3MR#CNP_0MC_NVDoR#4.;6n -RoM7j1_j7j_vjq_3jkM;M -NRN3#PMC_CV0_D#No46R.no; -M1Rq_jjj_q7v_kj3M -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMqj1_j7j_vjq_34kM;M -NRN3#PMC_CV0_D#No46R.no; -M1Rq_jjj_q7v_kj3M -j;N3MR#CNP_0MC_NVDoR#4.;6n -@bR@4j::44::4.+js:0kfCRjR:j0CskRk0sCBReBb; -Rj@@:44::.4:+:4jV#NDCjRf:VjRNCD#RDVN#tCRh -7;b@R@(d:4jU:d:j4d:+cj41j:vv_qQrtqj9:(R:fjjERoFR#01qv_vqQtr(j:9_Rh(hj,_,(4h._(,(h_d_,h(hc,_,(6hn_(,(h_(o; -brRmj -9;N#bR$bM_FVs0D#NoR;nc -Robm9r4;b +n;oqMR1d_jjj_jjY_1hjB_3jkM;M +NRN3#PMC_CV0_D#No46R.nb; +Rj@@:44::.4:+:4j0CskR:fjjsR0k0CRsRkCe;BB +@bR@4j::44::4.+jN:VDR#Cfjj:RDVN#VCRNCD#R7th;R +b@:@(4:d4d4U:dc4:jj+4:_1vqtvQq:rj(f9RjR:jo#EF0vR1_Qqvtjqr:R(9h4_(,(h_._,h(hd,_,(ch6_(,(h_n_,h(h(,_;(U +Robm9rj;b NRM#$_sbF0NVDon#Rco; -brRm. +brRm4 9;N#bR$bM_FVs0D#NoR;nc -Robm9rd;b +Robm9r.;b NRM#$_sbF0NVDon#Rco; -brRmc +brRmd 9;N#bR$bM_FVs0D#NoR;nc -Robm9r6;b +Robm9rc;b NRM#$_sbF0NVDon#Rco; -brRmn +brRm6 9;N#bR$bM_FVs0D#NoR;nc -Robm9r(;b -NRM#$_sbF0NVDon#RcN; -HsR30_DC04FR;H -NRM#$_lV#_RH8"d(4j4dUd"j4;H -NR03sDs_FHNoMl"CR1qv_vqQt"N; -HVR3#Vl_s#Fl01R"vv_qQRtqd -";N3HRV_#l00F#Rv"1_QqvtUqR"N; -HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; -HVR3#Fl_sMHoNRlC"_1vqtvQq -";N3HRV_#l#00NCosCR -4;N3HR#00NCN_lbMbHoRR"RjRjjjjjj-4R>jRjjjjjjMj\RjRRjjjjjR4j-j>Rjjjjj\44MRRRjjjjjj4jRR->jjjjj44j\RMRRjjjjj4jj>R-Rjjjjj4j4R\MRjRjjj4jj-jR>jRjjj4jjM4\RjRRjj4jjRjj-j>Rjj4jj\j4MRRRjj4jjjjjRR->jj4jj4jj\RMRRj4jjjjjj>R-Rj4jjjjj4"\M;R -s@:@(4:djd4U:dcj:jj+4:_1vqtvQq:rj(f9RjR:jlENORw7wRHbslvR1_QqvtHq_r -(9S1T=vv_qQ_tqH9r( -=S71qv_vqQt_#M#_jHr9B -SpBi=pmi_1_ZQON; -HsR30_DC04FR;H -NRM#$_lV#_RH8"d(4j4dUd"j4;H -NR03sDs_FHNoMl"CR1qv_vqQt"N; -HVR3#Vl_s#Fl01R"vv_qQRtqd -";N3HRV_#l00F#Rv"1_QqvtUqR"N; -HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; -HVR3#Fl_sMHoNRlC"_1vqtvQq -";N3HRV_#l#00NCosCR -4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;H -NRM3HPF_#kCsORv'1_Qqvt(qr9 -';N3HR#_$MH0MHPRND";j" -@sR@4(:ddj:Ud:4jj:c+:4j1qv_vqQtr(j:9jRf:ljRNROE7RwwblsHR_1vqtvQq9rn -=ST1qv_vqQtr -n9Sh7=_6d4 -pSBip=Bi1_mZOQ_;H -NR03sD0C_F;R4 -RNH#_$MV_#lH"8R(j4dddU4j;4" -RNH3Ds0_HFsolMNC1R"vv_qQ"tq;H -NR#3Vls_VF0l#Rv"1_QqvtdqR"N; -HVR3#0l_FR#0"_1vqtvQq"RU;H -NR#3VlN_0L#DC0jR"j4jRjjjjjsjjjRj4jj4jjjjjsjj4R4jjjjjjj4sj4jRjjj4jj4jsjjjRj4jjjsjj4Rj4jjjjjj4jsj44Rjjjj4jjj4s44jRjjjjjj"4s;H -NR#3Vls_FHNoMl"CR1qv_vqQt"N; -HVR3##l_0CN0sRCo4N; -HFR3sHHoMM#0NRlC'_1vqtvQq:rj(;9' -@sR@4(:ddj:Ud:4jj:c+:4j1qv_vqQtr(j:9jRf:ljRNROE7RwwblsHR_1vqtvQq9r6 -=ST1qv_vqQtr -69S17=vv_qQ_tqMr##.S9 +Robm9rn;b +NRM#$_sbF0NVDon#Rco; +brRm( +9;N#bR$bM_FVs0D#NoR;nc +RNH3Ds0CF_0R +4;N#HR$VM_#Hl_8(R"4dd4U44d4 +";N3HRs_0DFosHMCNlRv"1_Qqvt;q" +RNH3lV#_FVslR#0"_1vqtvQq"Rd;H +NR#3VlF_0#"0R1qv_vqQtR;U" +RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" +RNH3lV#_HFsolMNC1R"vv_qQ"tq;H +NR#3Vl0_#Ns0CC4oR;H +NR03#N_0ClbNbHRMo"RRRjjjjj4jjRR->jjjjjjjj\RMRRjjjj4jjj>R-Rjjjj4jj4R\MRjRjj4jjj-jR>jRjj4jjjM4\RjRRj4jjjRjj-j>Rj4jjj\j4MRRRj4jjjjjjRR->j4jjj4jj\RMRR4jjjjjjj>R-R4jjjjjj4R\MR4Rjjjjjj-jR>4RjjjjjjM4\R4RRjjjjjRjj-4>Rjjjjj\j4M +";s@R@(d:44U:d:44d:+cj41j:vv_qQrtqj9:(R:fjjNRlO7ERwbwRsRHl1qv_vqQt_(Hr9T +S=_1vqtvQqr_H(S9 +7v=1_QqvtMq_#H#_r +j9SiBp=iBp_Zm1Q;_O +RNH3Ds0CF_0R +4;N#HR$VM_#Hl_8(R"4dd4U44d4 +";N3HRs_0DFosHMCNlRv"1_Qqvt;q" +RNH3lV#_FVslR#0"_1vqtvQq"Rd;H +NR#3VlF_0#"0R1qv_vqQtR;U" +RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" +RNH3lV#_HFsolMNC1R"vv_qQ"tq;H +NR#3Vl0_#Ns0CC4oR;H +NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 +';N3HRH_MP#sFkO'CR1qv_vqQtr'(9;H +NR$3#MM_HHN0PDjR""s; +R(@@:44d::dU4:d4c4j+jv:1_Qqvtjqr:R(9fjj:ROlNEwR7wsRbH1lRvv_qQrtqnS9 +Tv=1_Qqvtnqr97 +S=dh_jSn B=piB_pimQ1Z_ O;N3HRsC0D_R0F4N; -H$R#M#_Vl8_HR4"(dUjd44dj"N; +H$R#M#_Vl8_HR4"(dU4d44d4"N; HsR30FD_sMHoNRlC"_1vqtvQq ";N3HRV_#lVlsF#"0R1qv_vqQtR;d" RNH3lV#_#0F01R"vv_qQRtqU @@ -715,12 +695,12 @@ RNH3lV#_#0F01R"vv_qQRtqU ";N3HRV_#lFosHMCNlRv"1_Qqvt;q" RNH3lV#_N#00CCso;R4 RNH3HFso#HM0lMNC1R'vv_qQrtqj9:('s; -R(@@:j4d::dU4:djc4j+jv:1_Qqvtjqr:R(9fjj:ROlNEwR7wsRbH1lRvv_qQrtqcS9 -Tv=1_Qqvtcqr97 -S=_1vqtvQq#_M#9rd +R(@@:44d::dU4:d4c4j+jv:1_Qqvtjqr:R(9fjj:ROlNEwR7wsRbH1lRvv_qQrtq6S9 +Tv=1_Qqvt6qr97 +S=_1vqtvQq#_M#9r. pSBip=Bi1_mZOQ_;H NR03sD0C_F;R4 -RNH#_$MV_#lH"8R(j4dddU4j;4" +RNH#_$MV_#lH"8R(44dddU44;4" RNH3Ds0_HFsolMNC1R"vv_qQ"tq;H NR#3Vls_VF0l#Rv"1_QqvtdqR"N; HVR3#0l_FR#0"_1vqtvQq"RU;H @@ -728,12 +708,12 @@ NR#3VlN_0L#DC0jR"j4jRjjjjjsjjjRj4jj4jjjjjsjj4R4jjjjjjj4sj4jRjjj4jj4jsjjjRj4jjjsj NR#3Vls_FHNoMl"CR1qv_vqQt"N; HVR3##l_0CN0sRCo4N; HFR3sHHoMM#0NRlC'_1vqtvQq:rj(;9' -@sR@4(:ddj:Ud:4jj:c+:4j1qv_vqQtr(j:9jRf:ljRNROE7RwwblsHR_1vqtvQq9rd +@sR@4(:dd4:Ud:44j:c+:4j1qv_vqQtr(j:9jRf:ljRNROE7RwwblsHR_1vqtvQq9rc =ST1qv_vqQtr -d9S17=vv_qQ_tqMr##cS9 +c9S17=vv_qQ_tqMr##dS9 B=piB_pimQ1Z_ O;N3HRsC0D_R0F4N; -H$R#M#_Vl8_HR4"(dUjd44dj"N; +H$R#M#_Vl8_HR4"(dU4d44d4"N; HsR30FD_sMHoNRlC"_1vqtvQq ";N3HRV_#lVlsF#"0R1qv_vqQtR;d" RNH3lV#_#0F01R"vv_qQRtqU @@ -741,12 +721,12 @@ RNH3lV#_#0F01R"vv_qQRtqU ";N3HRV_#lFosHMCNlRv"1_Qqvt;q" RNH3lV#_N#00CCso;R4 RNH3HFso#HM0lMNC1R'vv_qQrtqj9:('s; -R(@@:j4d::dU4:djc4j+jv:1_Qqvtjqr:R(9fjj:ROlNEwR7wsRbH1lRvv_qQrtq.S9 -Tv=1_Qqvt.qr97 -S=_1vqtvQq#_M#9r6 +R(@@:44d::dU4:d4c4j+jv:1_Qqvtjqr:R(9fjj:ROlNEwR7wsRbH1lRvv_qQrtqdS9 +Tv=1_Qqvtdqr97 +S=_1vqtvQq#_M#9rc pSBip=Bi1_mZOQ_;H NR03sD0C_F;R4 -RNH#_$MV_#lH"8R(j4dddU4j;4" +RNH#_$MV_#lH"8R(44dddU44;4" RNH3Ds0_HFsolMNC1R"vv_qQ"tq;H NR#3Vls_VF0l#Rv"1_QqvtdqR"N; HVR3#0l_FR#0"_1vqtvQq"RU;H @@ -754,12 +734,12 @@ NR#3VlN_0L#DC0jR"j4jRjjjjjsjjjRj4jj4jjjjjsjj4R4jjjjjjj4sj4jRjjj4jj4jsjjjRj4jjjsj NR#3Vls_FHNoMl"CR1qv_vqQt"N; HVR3##l_0CN0sRCo4N; HFR3sHHoMM#0NRlC'_1vqtvQq:rj(;9' -@sR@4(:ddj:Ud:4jj:c+:4j1qv_vqQtr(j:9jRf:ljRNROE7RwwblsHR_1vqtvQq9r4 +@sR@4(:dd4:Ud:44j:c+:4j1qv_vqQtr(j:9jRf:ljRNROE7RwwblsHR_1vqtvQq9r. =ST1qv_vqQtr -49S17=vv_qQ_tqMr##nS9 +.9S17=vv_qQ_tqMr##6S9 B=piB_pimQ1Z_ O;N3HRsC0D_R0F4N; -H$R#M#_Vl8_HR4"(dUjd44dj"N; +H$R#M#_Vl8_HR4"(dU4d44d4"N; HsR30FD_sMHoNRlC"_1vqtvQq ";N3HRV_#lVlsF#"0R1qv_vqQtR;d" RNH3lV#_#0F01R"vv_qQRtqU @@ -767,12 +747,12 @@ RNH3lV#_#0F01R"vv_qQRtqU ";N3HRV_#lFosHMCNlRv"1_Qqvt;q" RNH3lV#_N#00CCso;R4 RNH3HFso#HM0lMNC1R'vv_qQrtqj9:('s; -R(@@:j4d::dU4:djc4j+jv:1_Qqvtjqr:R(9fjj:ROlNEwR7wsRbH1lRvv_qQrtqjS9 -Tv=1_Qqvtjqr97 -S=_1vqtvQq#_M#9r( +R(@@:44d::dU4:d4c4j+jv:1_Qqvtjqr:R(9fjj:ROlNEwR7wsRbH1lRvv_qQrtq4S9 +Tv=1_Qqvt4qr97 +S=_1vqtvQq#_M#9rn pSBip=Bi1_mZOQ_;H NR03sD0C_F;R4 -RNH#_$MV_#lH"8R(j4dddU4j;4" +RNH#_$MV_#lH"8R(44dddU44;4" RNH3Ds0_HFsolMNC1R"vv_qQ"tq;H NR#3Vls_VF0l#Rv"1_QqvtdqR"N; HVR3#0l_FR#0"_1vqtvQq"RU;H @@ -780,384 +760,392 @@ NR#3VlN_0L#DC0jR"j4jRjjjjjsjjjRj4jj4jjjjjsjj4R4jjjjjjj4sj4jRjjj4jj4jsjjjRj4jjjsj NR#3Vls_FHNoMl"CR1qv_vqQt"N; HVR3##l_0CN0sRCo4N; HFR3sHHoMM#0NRlC'_1vqtvQq:rj(;9' -@sR@4(:ddj:Ud:4jj:c+:4jO_bkCr#0d9:jR:fjjNRlO7ERwbwRsRHlO_bkCr#0.S9 -Tb=Ok#_C09r. -=S7h6_4 -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRO_bkC"#0;H -NRM3kVOsN_8HMC.GR;R -s@:@(4:djd4U:dcj:jj+4:kOb_0C#rjd:9jRf:ljRNROE7RwwblsHRkOb_0C#r -d9SOT=bCk_#d0r97 -S=4h_nB -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"kOb_0C#"N; -HkR3MNVsOM_H8RCGds; -R(@@:j4d::dU4:djc4j+ju:Qpd_jj:r.jf9RjR:jlENORw7wRHbsluRQpd_jjw7wr -j9SQT=ujp_dOj_r -j9Sh7=_ -djSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCQR"ujp_d;j" -RNH3VkMs_NOHCM8G;Rj -@sR@4(:ddj:Ud:4jj:c+:4jQ_upjrdj.9:jR:fjjNRlO7ERwbwRsRHlQ_upj7djw4wr9T -S=pQu_jjd_4Or97 +@sR@4(:dd4:Ud:44j:c+:4j1qv_vqQtr(j:9jRf:ljRNROE7RwwblsHR_1vqtvQq9rj +=ST1qv_vqQtr +j9S17=vv_qQ_tqMr##(S9 +B=piB_pimQ1Z_ +O;N3HRsC0D_R0F4N; +H$R#M#_Vl8_HR4"(dU4d44d4"N; +HsR30FD_sMHoNRlC"_1vqtvQq +";N3HRV_#lVlsF#"0R1qv_vqQtR;d" +RNH3lV#_#0F01R"vv_qQRtqU +";N3HRV_#l0DNLCR#0"jjjRj4jjjjjjjsj44Rjjjjjjjjs4jjRjj4jjsjjjR44j4jjjjjjsj4jRjjjjj4jjjs44jRjj4jjj4js4jjRjjjjjs4j4R44jjjjj4jjs +";N3HRV_#lFosHMCNlRv"1_Qqvt;q" +RNH3lV#_N#00CCso;R4 +RNH3HFso#HM0lMNC1R'vv_qQrtqj9:('s; +R(@@:44d::dU4:d4c4j+jb:Ok#_C0:rdjf9RjR:jlENORw7wRHbslbROk#_C09r. +=STO_bkCr#0.S9 +7_=h4S6 +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRb"Ok#_C0 +";N3HRksMVNHO_MG8CR +.;s@R@(d:44U:d:44d:+cj4Oj:bCk_#d0r:Rj9fjj:ROlNEwR7wsRbHOlRbCk_#d0r9T +S=kOb_0C#r +d9Sh7=_ +4nSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCOR"bCk_#;0" +RNH3VkMs_NOHCM8G;Rd +@sR@4(:dd4:Ud:44j:c+:4jQ_upjrdj.9:jR:fjjNRlO7ERwbwRsRHlQ_upj7djwjwr9T +S=pQu_jjd_jOr97 S=dh_4B SpBi=pmi_1_ZQON; HsR30FD_sMHoNRlC"pQu_jjd"N; -HkR3MNVsOM_H8RCG4s; -R(@@:j4d::dU4:djc4j+ju:Qpd_jj:r.jf9RjR:jlENORw7wRHbsluRQpd_jjw7wr -.9SQT=ujp_dOj_r -.9Sh7=_ +HkR3MNVsOM_H8RCGjs; +R(@@:44d::dU4:d4c4j+ju:Qpd_jj:r.jf9RjR:jlENORw7wRHbsluRQpd_jjw7wr +49SQT=ujp_dOj_r +49Sh7=_ d.SiBp=iBp_Zm1Q;_O RNH3Ds0_HFsolMNCQR"ujp_d;j" -RNH3VkMs_NOHCM8G;R. -@sR@4(:ddj:Ud:4jj:c+:4jQ_up7.jr:Rj9fjj:ROlNEwR7wsRbHQlRu7p_j9rj -=STQ_up7jjr97 -S=6h_4B +RNH3VkMs_NOHCM8G;R4 +@sR@4(:dd4:Ud:44j:c+:4jQ_upjrdj.9:jR:fjjNRlO7ERwbwRsRHlQ_upj7djw.wr9T +S=pQu_jjd_.Or97 +S=dh_dB SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"pQu_"7j;H -NRM3kVOsN_8HMCjGR;H -NR$3#MM_HHN0PD4R""s; -R(@@:j4d::dU4:djc4j+ju:Qpj_7rj.:9jRf:ljRNROE7RwwblsHRpQu_r7j4S9 +HsR30FD_sMHoNRlC"pQu_jjd"N; +HkR3MNVsOM_H8RCG.s; +R(@@:44d::dU4:d4c4j+ju:Qpj_7rj.:9jRf:ljRNROE7RwwblsHRpQu_r7jjS9 Tu=Qpj_7r -49Sh7=_ +j9Sh7=_ 6.SiBp=iBp_Zm1Q;_O RNH3Ds0_HFsolMNCQR"u7p_j ";N3HRksMVNHO_MG8CR -4;N3HR#_$MH0MHPRND";4" -@sR@4(:ddj:Ud:4jj:c+:4jQ_up7.jr:Rj9fjj:ROlNEwR7wsRbHQlRu7p_j9r. -=STQ_up7.jr97 +j;N3HR#_$MH0MHPRND";4" +@sR@4(:dd4:Ud:44j:c+:4jQ_up7.jr:Rj9fjj:ROlNEwR7wsRbHQlRu7p_j9r4 +=STQ_up74jr97 S=6h_dB SpBi=pmi_1_ZQON; HsR30FD_sMHoNRlC"pQu_"7j;H -NRM3kVOsN_8HMC.GR;H +NRM3kVOsN_8HMC4GR;H NR$3#MM_HHN0PD4R""s; -R(@@:j4d::dU4:djc4j+jp:Bij_jjr_74j.:9jRf:ljRNROE7RwwblsHRiBp_jjj_n7r9T -S=iBp_jjj_n7r97 -S=iBp_jjj_67r9B -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"iBp_jjj_;7" -RNH3VkMs_NOHCM8G;Rn -@sR@4(:ddj:Ud:4jj:c+:4jB_pij_jj7.r4:Rj9fjj:ROlNEwR7wsRbHBlRpji_j7j_r -(9SBT=pji_j7j_r -(9SB7=pji_j7j_r -n9SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCBR"pji_j7j_"N; -HkR3MNVsOM_H8RCG(s; -R(@@:j4d::dU4:djc4j+jp:Bij_jjr_74j.:9jRf:ljRNROE7RwwblsHRiBp_jjj_U7r9T -S=iBp_jjj_U7r97 -S=iBp_jjj_(7r9B -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"iBp_jjj_;7" -RNH3VkMs_NOHCM8G;RU -@sR@4(:ddj:Ud:4jj:c+:4jB_pij_jj7.r4:Rj9fjj:ROlNEwR7wsRbHBlRpji_j7j_r -g9SBT=pji_j7j_r -g9SB7=pji_j7j_r -U9SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCBR"pji_j7j_"N; -HkR3MNVsOM_H8RCGgs; -R(@@:j4d::dU4:djc4j+jp:Bij_jjr_74j.:9jRf:ljRNROE7RwwblsHRiBp_jjj_47rjS9 -Tp=Bij_jjr_74 -j9SB7=pji_j7j_r -g9SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCBR"pji_j7j_"N; -HkR3MNVsOM_H8RCG4 -j;s@R@(d:4jU:d:j4d:+cj4Bj:pji_j7j_r:4.jf9RjR:jlENORw7wRHbslpRBij_jjr_74 -49SBT=pji_j7j_r944 -=S7B_pij_jj7jr49B -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"iBp_jjj_;7" -RNH3VkMs_NOHCM8G4R4;R -s@:@(4:djd4U:dcj:jj+4:iBp_jjj_47r.9:jR:fjjNRlO7ERwbwRsRHlB_pij_jj7.r49T -S=iBp_jjj_47r.S9 -7p=Bij_jjr_74 -49SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCBR"pji_j7j_"N; -HkR3MNVsOM_H8RCG4 -.;s@R@(d:4jU:d:j4d:+cj4Bj:Y Bp_q7vrj4:9jRf:ljRNROE7RwwblsHRBBYp7 _vjqr9T -S=BBYp7 _vjqr97 -S=nh_j -_HSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCBR"Y Bp_q7v"N; -HkR3MNVsOM_H8RCGjN; -H#R3$HM_MPH0N"DRj -";s@R@(d:4jU:d:j4d:+cj4Bj:Y Bp_q7vrj4:9jRf:ljRNROE7RwwblsHRBBYp7 _v4qr9T -S=BBYp7 _v4qr97 -S=.h_(H(_ -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRBpYB v_7q +R(@@:44d::dU4:d4c4j+ju:Qpj_7rj.:9jRf:ljRNROE7RwwblsHRpQu_r7j.S9 +Tu=Qpj_7r +.9Sh7=_ +6cSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCQR"u7p_j ";N3HRksMVNHO_MG8CR -4;N3HR#_$MH0MHPRND";j" -@sR@4(:ddj:Ud:4jj:c+:4j1 QZ_q7vrj4:9jRf:ljRNROE7RwwblsHRZ1Q v_7q9rj -=ST1 QZ_q7vr -j9Sh7=_ -44SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNC1R"Q_Z 7"vq;H -NRM3kVOsN_8HMCjGR;H -NR$3#MM_HHN0PD4R""s; -R(@@:j4d::dU4:djc4j+jQ:1Z7 _v4qr:Rj9fjj:ROlNEwR7wsRbH1lRQ_Z 7rvq4S9 -TQ=1Z7 _v4qr97 -S=4h_.B -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"Z1Q v_7q -";N3HRksMVNHO_MG8CR -4;N3HR#_$MH0MHPRND";4" -@sR@4(:ddj:Ud:4jj:c+:4jO_bkCr#0d9:jR:fjjNRlO7ERwbwRsRHlO_bkCr#0jS9 -Tb=Ok#_C09rj -=S7h4_dU -_HSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCOR"bCk_#;0" -RNH3VkMs_NOHCM8G;Rj -@sR@4(:ddj:Ud:4jj:c+:4jO_bkCr#0d9:jR:fjjNRlO7ERwbwRsRHlO_bkCr#04S9 -Tb=Ok#_C09r4 -=S7hc_4 -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRO_bkC"#0;H -NRM3kVOsN_8HMC4GR;R -s@:@(4:djd4U:dcj:jj+4:a)1_Y7prj.:9jRf:ljRNROE7RwwblsHRa)1_Y7pr -49S)T=17a_p4Yr97 -S=.h_(H6_ -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CR)_1a7"pY;H -NR$3#MM_HHN0PDjR""s; -R(@@:j4d::dU4:djc4j+j1:)ap_7Y:r.jf9RjR:jlENORw7wRHbsl1R)ap_7Y9r. -=ST)_1a7rpY.S9 -7_=h._(cHB -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"a)1_Y7p"N; -H#R3$HM_MPH0N"DRj -";s@R@(d:4jU:d:j4d:+cj4Bj:pji_j7j_r:4.jf9RjR:jlENORw7wRHbslpRBij_jjr_7jS9 -Tp=Bij_jjr_7jS9 -7p=Bij_jj -_OSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCBR"pji_j7j_"N; -HkR3MNVsOM_H8RCGjs; -R(@@:j4d::dU4:djc4j+jp:Bij_jjr_74j.:9jRf:ljRNROE7RwwblsHRiBp_jjj_47r9T -S=iBp_jjj_47r97 -S=iBp_jjj_j7r9B -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"iBp_jjj_;7" -RNH3VkMs_NOHCM8G;R4 -@sR@4(:ddj:Ud:4jj:c+:4jB_pij_jj7.r4:Rj9fjj:ROlNEwR7wsRbHBlRpji_j7j_r -.9SBT=pji_j7j_r -.9SB7=pji_j7j_r -49SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCBR"pji_j7j_"N; -HkR3MNVsOM_H8RCG.s; -R(@@:j4d::dU4:djc4j+jp:Bij_jjr_74j.:9jRf:ljRNROE7RwwblsHRiBp_jjj_d7r9T -S=iBp_jjj_d7r97 -S=iBp_jjj_.7r9B -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"iBp_jjj_;7" -RNH3VkMs_NOHCM8G;Rd -@sR@4(:ddj:Ud:4jj:c+:4jB_pij_jj7.r4:Rj9fjj:ROlNEwR7wsRbHBlRpji_j7j_r +.;N3HR#_$MH0MHPRND";4" +@sR@4(:dd4:Ud:44j:c+:4jB_pij_jj7jr4:Rj9fjj:ROlNEwR7wsRbHBlRpji_j7j_r c9SBT=pji_j7j_r c9SB7=pji_j7j_r d9SiBp=iBp_Zm1Q;_O RNH3Ds0_HFsolMNCBR"pji_j7j_"N; HkR3MNVsOM_H8RCGcs; -R(@@:j4d::dU4:djc4j+jp:Bij_jjr_74j.:9jRf:ljRNROE7RwwblsHRiBp_jjj_67r9T +R(@@:44d::dU4:d4c4j+jp:Bij_jjr_74jj:9jRf:ljRNROE7RwwblsHRiBp_jjj_67r9T S=iBp_jjj_67r97 S=iBp_jjj_c7r9B SpBi=pmi_1_ZQON; HsR30FD_sMHoNRlC"iBp_jjj_;7" RNH3VkMs_NOHCM8G;R6 -@sR@4(:ddj:Ud:4jj:c+:4j)_1a7rpY.9:jR:fjjNRlO7ERwbwRsRHl)_1a7rpYjS9 -T1=)ap_7Y9rj -=S7h4_dc +@sR@4(:dd4:Ud:44j:c+:4jB_pij_jj7jr4:Rj9fjj:ROlNEwR7wsRbHBlRpji_j7j_r +n9SBT=pji_j7j_r +n9SB7=pji_j7j_r +69SiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCBR"pji_j7j_"N; +HkR3MNVsOM_H8RCGns; +R(@@:44d::dU4:d4c4j+jp:Bij_jjr_74jj:9jRf:ljRNROE7RwwblsHRiBp_jjj_(7r9T +S=iBp_jjj_(7r97 +S=iBp_jjj_n7r9B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"iBp_jjj_;7" +RNH3VkMs_NOHCM8G;R( +@sR@4(:dd4:Ud:44j:c+:4jB_pij_jj7jr4:Rj9fjj:ROlNEwR7wsRbHBlRpji_j7j_r +U9SBT=pji_j7j_r +U9SB7=pji_j7j_r +(9SiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCBR"pji_j7j_"N; +HkR3MNVsOM_H8RCGUs; +R(@@:44d::dU4:d4c4j+jp:Bij_jjr_74jj:9jRf:ljRNROE7RwwblsHRiBp_jjj_g7r9T +S=iBp_jjj_g7r97 +S=iBp_jjj_U7r9B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"iBp_jjj_;7" +RNH3VkMs_NOHCM8G;Rg +@sR@4(:dd4:Ud:44j:c+:4jB_pij_jj7jr4:Rj9fjj:ROlNEwR7wsRbHBlRpji_j7j_r94j +=STB_pij_jj7jr497 +S=iBp_jjj_g7r9B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"iBp_jjj_;7" +RNH3VkMs_NOHCM8GjR4;R +s@:@(4:d4d4U:dc4:jj+4:BBYp7 _v4qr:Rj9fjj:ROlNEwR7wsRbHBlRY Bp_q7vr +j9SBT=Y Bp_q7vr +j9Sh7=_gdj_SH +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRY"BB_p 7"vq;H +NRM3kVOsN_8HMCjGR;H +NR$3#MM_HHN0PDjR""s; +R(@@:44d::dU4:d4c4j+jY:BB_p 7rvq49:jR:fjjNRlO7ERwbwRsRHlBpYB v_7q9r4 +=STBpYB v_7q9r4 +=S7hj_c_SH +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRY"BB_p 7"vq;H +NRM3kVOsN_8HMC4GR;H +NR$3#MM_HHN0PDjR""s; +R(@@:44d::dU4:d4c4j+jQ:1Z7 _v4qr:Rj9fjj:ROlNEwR7wsRbH1lRQ_Z 7rvqjS9 +TQ=1Z7 _vjqr97 +S=4h_4B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"Z1Q v_7q +";N3HRksMVNHO_MG8CR +j;N3HR#_$MH0MHPRND";4" +@sR@4(:dd4:Ud:44j:c+:4j1 QZ_q7vrj4:9jRf:ljRNROE7RwwblsHRZ1Q v_7q9r4 +=ST1 QZ_q7vr +49Sh7=_ +4.SiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNC1R"Q_Z 7"vq;H +NRM3kVOsN_8HMC4GR;H +NR$3#MM_HHN0PD4R""s; +R(@@:44d::dU4:d4c4j+jb:Ok#_C0:rdjf9RjR:jlENORw7wRHbslbROk#_C09rj +=STO_bkCr#0jS9 +7_=h._(jHB +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"kOb_0C#"N; +HkR3MNVsOM_H8RCGjs; +R(@@:44d::dU4:d4c4j+jb:Ok#_C0:rdjf9RjR:jlENORw7wRHbslbROk#_C09r4 +=STO_bkCr#04S9 +7_=h4Sc +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRb"Ok#_C0 +";N3HRksMVNHO_MG8CR +4;s@R@(d:44U:d:44d:+cj4)j:17a_p.Yr:Rj9fjj:ROlNEwR7wsRbH)lR17a_p4Yr9T +S=a)1_Y7pr +49Sh7=_(.(_SH +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlR1")ap_7Y +";N3HR#_$MH0MHPRND";j" +@sR@4(:dd4:Ud:44j:c+:4j)_1a7rpY.9:jR:fjjNRlO7ERwbwRsRHl)_1a7rpY.S9 +T1=)ap_7Y9r. +=S7h(_.n _HSiBp=iBp_Zm1Q;_O RNH3Ds0_HFsolMNC)R"17a_p;Y" RNH3M#$_HHM0DPNR""j;R -s@:@(4:djd4U:dcj:jj+4:_q1j_jj7Rvqfjj:ROlNEwR7wsRbHqlR1j_jjv_7qT -S=_q1j_jj7 -vqSh7=_ -c6SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCqR"1j_jjv_7q -";N3HR#_$MH0MHPRND";4" -@sR@4(:ddj:Ud:4jj:c+:4jqj1_djj_j1j_YRhBfjj:ROlNEwR7wsRbHqlR1d_jjj_jjY_1hSB -T1=q_jjd_jjj_h1YB7 -S=ch_nB +s@:@(4:d4d4U:dc4:jj+4:iBp_jjj_47rj9:jR:fjjNRlO7ERwbwRsRHlB_pij_jj79rj +=STB_pij_jj79rj +=S7B_pij_jjOB SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"_q1j_djj_jj1BYh"N; -H#R3$HM_MPH0N"DR4 -";s@R@(d:4jU:d:j4d:+cj4qj:1j_jjh_QajRf:ljRNROE7RwwblsHR_q1j_jjQ -haSqT=1j_jjh_Qa7 -S=ch_(B +HsR30FD_sMHoNRlC"iBp_jjj_;7" +RNH3VkMs_NOHCM8G;Rj +@sR@4(:dd4:Ud:44j:c+:4jB_pij_jj7jr4:Rj9fjj:ROlNEwR7wsRbHBlRpji_j7j_r +49SBT=pji_j7j_r +49SB7=pji_j7j_r +j9SiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCBR"pji_j7j_"N; +HkR3MNVsOM_H8RCG4s; +R(@@:44d::dU4:d4c4j+jp:Bij_jjr_74jj:9jRf:ljRNROE7RwwblsHRiBp_jjj_.7r9T +S=iBp_jjj_.7r97 +S=iBp_jjj_47r9B SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"_q1j_jjQ"ha;H +HsR30FD_sMHoNRlC"iBp_jjj_;7" +RNH3VkMs_NOHCM8G;R. +@sR@4(:dd4:Ud:44j:c+:4jB_pij_jj7jr4:Rj9fjj:ROlNEwR7wsRbHBlRpji_j7j_r +d9SBT=pji_j7j_r +d9SB7=pji_j7j_r +.9SiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCBR"pji_j7j_"N; +HkR3MNVsOM_H8RCGds; +R(@@:44d::dU4:d4c4j+j1:)ap_7Y:r.jf9RjR:jlENORw7wRHbsl1R)ap_7Y9rj +=ST)_1a7rpYjS9 +7_=h._(UHB +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"a)1_Y7p"N; +H#R3$HM_MPH0N"DRj +";s@R@(d:44U:d:44d:+cj4pj:7j1_jQj_hfaRjR:jlENORw7wRHbsl7Rp1j_jjh_QaT +S=1p7_jjj_aQh +=S7hd_c +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRp_71j_jjQ"ha;H NR$3#MM_HHN0PD4R""s; -R(@@:j4d::dU4:djc4j+j1:7q4Bi_aQhR:fjjNRlO7ERwbwRsRHl7B1qiQ4_hSa -T1=7q4Bi_aQh +R(@@:44d::dU4:d4c4j+jt:Aq_Bij_djQRhafjj:ROlNEwR7wsRbHAlRtiqB_jjd_aQh +=STABtqid_jjh_Qa7 +S=ch_cB +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"qAtBji_dQj_h;a" +RNH3_HMDbFFR +4;N3HR#_$MH0MHPRND";4" +@sR@4(:dd4:Ud:44j:c+:4jqj1_j7j_vfqRjR:jlENORw7wRHbsl1Rq_jjj_q7v +=STqj1_j7j_vSq +7_=hcSn +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlR1"q_jjj_q7v"N; +H#R3$HM_MPH0N"DR4 +";s@R@(d:44U:d:44d:+cj4qj:1d_jjj_jjY_1hfBRjR:jlENORw7wRHbsl1Rq_jjd_jjj_h1YBT +S=_q1j_djj_jj1BYh +=S7h(_c +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRqj1_djj_j1j_Y"hB;H +NR$3#MM_HHN0PD4R""s; +R(@@:44d::dU4:d4c4j+j1:q_jjj_aQhR:fjjNRlO7ERwbwRsRHlqj1_jQj_hSa +T1=q_jjj_aQh =S7hU_c pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CR7B1qiQ4_h;a" +NR03sDs_FHNoMl"CRqj1_jQj_h;a" RNH3M#$_HHM0DPNR""4;R -s@:@(4:djd4U:dcj:jj+4:_71j_jj7Rvqfjj:ROlNEwR7wsRbH7lR1j_jjv_7qT -S=_71j_jj7 -vqSh7=_ +s@:@(4:d4d4U:dc4:jj+4:q71B_i4QRhafjj:ROlNEwR7wsRbH7lR1iqB4h_QaT +S=q71B_i4Q +haSh7=_ cgSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNC7R"1j_jjv_7q +RNH3Ds0_HFsolMNC7R"1iqB4h_Qa ";N3HR#_$MH0MHPRND";4" -@sR@4(:ddj:Ud:4jj:c+:4jqj1_d7j_jjRf:ljRNROE7RwwblsHR_q1j_dj7Sj -T1=q_jjd_ -7jSh7=_(4j -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRqj1_d7j_j -";N3HR#_$MH0MHPRND";4" -@sR@4(:ddj:Ud:4jj:c+:4je_uq7jRf:ljRNROE7RwwblsHRqeu_S7 -Tu=eq -_7Sh7=_ -6cSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCeR"u7q_"N; +@sR@4(:dd4:Ud:44j:c+:4j7j1_j7j_vfqRjR:jlENORw7wRHbsl1R7_jjj_q7v +=ST7j1_j7j_vSq +7_=h6Sj +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlR1"7_jjj_q7v"N; H#R3$HM_MPH0N"DR4 -";s@R@(d:4jU:d:j4d:+cj47j:aiqB_R7jfjj:ROlNEwR7wsRbH7lRaiqB_ -7jS7T=aiqB_ -7jSh7=_ -66SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNC7R"aiqB_"7j;H +";s@R@(d:44U:d:44d:+cj4qj:1d_jjj_7R:fjjNRlO7ERwbwRsRHlqj1_d7j_jT +S=_q1j_dj7Sj +7_=h4 +ddSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCqR"1d_jjj_7"N; +H#R3$HM_MPH0N"DR4 +";s@R@(d:44U:d:44d:+cj4ej:u7q_R:fjjNRlO7ERwbwRsRHle_uq7T +S=qeu_S7 +7_=h6S6 +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRu"eq"_7;H NR$3#MM_HHN0PD4R""s; -R(@@:j4d::dU4:djc4j+jp:Bid_jjR_]fjj:ROlNEwR7wsRbHBlRpji_d]j_ -=STB_pij_dj]7 -S=.h_(Hn_ -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRB_pij_dj] -";N3HR#_$MH0MHPRND";4" -@sR@4(:ddj:Ud:4jj:c+:4j) 1az_majRf:ljRNROE7RwwblsHR1) ma_zSa -T =)1_ am -zaSh7=_ -6(SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNC)R" a1 _amz"N; -H#R3$HM_MPH0N"DRj -";s@R@(d:4jU:d:j4d:+cj47j:1j_jjh_ q ApR:fjjNRlO7ERwbwRsRHl7j1_j j_hpqA T -S=_71j_jj AhqpS +R(@@:44d::dU4:d4c4j+ja:7q_Bi7fjRjR:jlENORw7wRHbslaR7q_Bi7Sj +Ta=7q_Bi7Sj +7_=h6Sn +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRa"7q_Bi7;j" +RNH3M#$_HHM0DPNR""4;R +s@:@(4:d4d4U:dc4:jj+4:iBp_jjd_f]RjR:jlENORw7wRHbslpRBid_jj +_]SBT=pji_d]j_ +=S7hj_dU +_HSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCBR"pji_d]j_"N; +H#R3$HM_MPH0N"DR4 +";s@R@(d:44U:d:44d:+cj4)j: a1 _amzR:fjjNRlO7ERwbwRsRHl) 1az_maT +S=1) ma_zSa 7_=h6SU B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlR1"7_jjj_q hA"p ;H +O;N3HRs_0DFosHMCNlR ")1_ am"za;H NR$3#MM_HHN0PDjR""s; -R(@@:j4d::dU4:djc4j+jt:A_jjjR:fjjNRlO7ERwbwRsRHlAjt_jwj7wT -S=_Atj_jjO7 -S=dh_dB +R(@@:44d::dU4:d4c4j+j1:7_jjj_q hARp fjj:ROlNEwR7wsRbH7lR1j_jjh_ q Ap +=ST7j1_j j_hpqA 7 +S=6h_gB SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"_Atj"jj;H -NRM3H_FDFb;Rj -@sR@4(:ddj:Ud:4jj:c+:4jqtvQqz_A1h_ q Ap_q7v_t]Q]jRf:ljRNROE7RwwblsHRQqvtAq_z 1_hpqA v_7qQ_]tS] -Tv=qQ_tqA_z1 Ahqp7 _v]q_Q -t]Sh7=_ -dcSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCqR"vqQt_1Az_q hA_p 7_vq]]Qt"N; +HsR30FD_sMHoNRlC"_71j_jj Ahqp; " +RNH3M#$_HHM0DPNR""j;R +s@:@(4:.nd4n:.dn:Uj+4:iBp_amz_ u)_R.6fjj:ROlNEwR7wsRbHBlRpmi_zua_). _6T +S=iBp_amz_ u)_ +.6Sh7=_ +djSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCBR"pmi_zua_). _6 +";N3HRHDM_FRFb.N; H#R3$HM_MPH0N"DR4 -";s@R@(d:4jU:d:j4d:+cj4qj:vqQt_1Az_q hA_p 7_vqpRmWfjj:ROlNEwR7wsRbHqlRvqQt_1Az_q hA_p 7_vqp -mWSqT=vqQt_1Az_q hA_p 7_vqp -mWSh7=_ -d6SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCqR"vqQt_1Az_q hA_p 7_vqp"mW;H -NR$3#MM_HHN0PD4R""s; -R(@@:j4d::dU4:djc4j+j7:z1j_jjh_QajRf:ljRNROE7RwwblsHR1z7_jjj_aQh -=STz_71j_jjQ -haSh7=_ -dnSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCzR"7j1_jQj_h;a" -RNH3M#$_HHM0DPNR""4;R -s@:@(4:djd4U:dcj:jj+4:_qj7Rvqfjj:ROlNEwR7wsRbHqlRjv_7qT -S=_qj7 -vqSh7=_ -d(SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCqR"jv_7q -";N3HR#_$MH0MHPRND";4" -@sR@4(:ddj:Ud:4jj:c+:4je_vqQRhafjj:ROlNEwR7wsRbHelRvQq_hSa -Tv=eqh_Qa7 -S=dh_UB -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"qev_aQh"N; -HHR3MF_DFdbR;H -NR$3#MM_HHN0PD4R""s; -R(@@:j4d::dU4:djc4j+jW:)_jjj_q7vR:fjjNRlO7ERwbwRsRHl)jW_j7j_vSq -TW=)_jjj_q7v -=S7hj_c -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CR)jW_j7j_v;q" -RNH3M#$_HHM0DPNR""4;R -s@:@(4:djd4U:dcj:jj+4:_)Wj_jjQRhafjj:ROlNEwR7wsRbH)lRWj_jjh_QaT -S=_)Wj_jjQ -haSh7=_ -c4SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNC)R"Wj_jjh_Qa -";N3HR#_$MH0MHPRND";4" -@sR@4(:ddj:Ud:4jj:c+:4jp_71j_jjQRhafjj:ROlNEwR7wsRbHplR7j1_jQj_hSa -T7=p1j_jjh_Qa7 -S=ch_.B -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"1p7_jjj_aQh"N; -H#R3$HM_MPH0N"DR4 -";s@R@(d:4jU:d:j4d:+cj4Aj:tiqB_jjd_aQhR:fjjNRlO7ERwbwRsRHlABtqid_jjh_QaT -S=qAtBji_dQj_hSa -7_=hcSd +";s@R@(d:44U:d:44d:+cj4Aj:tj_jjjRf:ljRNROE7RwwblsHR_Atj7jjwSw +Tt=A_jjj_SO +7_=hdSc B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRt"Aq_Bij_djQ"ha;H -NRM3H_FDFb;R4 +O;N3HRs_0DFosHMCNlRt"A_jjj"N; +HHR3MF_DFjbR;R +s@:@(4:d4d4U:dc4:jj+4:QqvtAq_z 1_hpqA v_7qQ_]tf]RjR:jlENORw7wRHbslvRqQ_tqA_z1 Ahqp7 _v]q_Q +t]SqT=vqQt_1Az_q hA_p 7_vq]]Qt +=S7h6_d +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRqtvQqz_A1h_ q Ap_q7v_t]Q] +";N3HR#_$MH0MHPRND";4" +@sR@4(:dd4:Ud:44j:c+:4jqtvQqz_A1h_ q Ap_q7v_WpmR:fjjNRlO7ERwbwRsRHlqtvQqz_A1h_ q Ap_q7v_Wpm +=STqtvQqz_A1h_ q Ap_q7v_Wpm +=S7hn_d +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRqtvQqz_A1h_ q Ap_q7v_Wpm"N; +H#R3$HM_MPH0N"DR4 +";s@R@(d:44U:d:44d:+cj4zj:7j1_jQj_hfaRjR:jlENORw7wRHbsl7Rz1j_jjh_QaT +S=1z7_jjj_aQh +=S7h(_d +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRz_71j_jjQ"ha;H +NR$3#MM_HHN0PD4R""s; +R(@@:44d::dU4:d4c4j+jj:q_q7vR:fjjNRlO7ERwbwRsRHlq7j_vSq +Tj=q_q7v +=S7hU_d +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRq7j_v;q" RNH3M#$_HHM0DPNR""4;R -s@:@(4:djd4U:dcj:jj+4:qAtBji_dQj_h7a_R:fjjNRlO7ERwbwRsRHlABtqid_jjh_Qa +s@:@(4:d4d4U:dc4:jj+4:qev_aQhR:fjjNRlO7ERwbwRsRHle_vqQ +haSeT=vQq_hSa +7_=hdSg +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRv"eqh_Qa +";N3HRHDM_FRFbdN; +H#R3$HM_MPH0N"DR4 +";s@R@(d:44U:d:44d:+cj4)j:Wj_jjv_7qjRf:ljRNROE7RwwblsHR_)Wj_jj7 +vqS)T=Wj_jjv_7q7 +S=ch_4B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"_)Wj_jj7"vq;H +NR$3#MM_HHN0PD4R""s; +R(@@:44d::dU4:d4c4j+jW:)_jjj_aQhR:fjjNRlO7ERwbwRsRHl)jW_jQj_hSa +TW=)_jjj_aQh +=S7h._c +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CR)jW_jQj_h;a" +RNH3M#$_HHM0DPNR""4;R +s@:@(4:d4d4U:dc4:jj+4:qAtBji_dQj_h7a_R:fjjNRlO7ERwbwRsRHlABtqid_jjh_Qa _7SAT=tiqB_jjd_aQh_S7 7_=h4 -j4SiBp=iBp_Zm1Q;_O +ngSiBp=iBp_Zm1Q;_O RNH3Ds0_HFsolMNCAR"tiqB_jjd_aQh_;7" RNH3M#$_HHM0DPNR""4;R -s@:@(4:.6d4n:.d6:Uj+4:iBp_amz_ u)_f7RjR:jlENORw7wRHbslpRBiz_ma)_u +s@:@(4:.nd4n:.dn:Uj+4:iBp_amz_ u)_f7RjR:jlENORw7wRHbslpRBiz_ma)_u _7SBT=pmi_zua_)7 _ -=S7B_pim_zau_) 6Sj +=S7B_pim_zau_) .S6 B=piB_pimQ1Z_ O;N3HRs_0DFosHMCNlRp"Biz_ma)_u "_7;H NR$3#MM_HHN0PD4R""s; -R(@@:U4.::d64:.Ud4(+jp:Biz_mah_QajRf:ljRNROE7RwwblsHRiBp_amz_aQh -=STB_pi _XuO7 -S=iBp_amz_ u)_S7 -B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRp"Biz_mah_Qa -";N3HR#_$MH0MHPRND";4" -@sR@4(:dd(:cd:4(n:d+:4jB_pim_zau_) 6fjRjR:jlENORw7wRHbslpRBiz_ma)_u j_6 -=STB_pim_zau_) 6Sj -7p=Biz_ma)_u j_6_SH -B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRp"Biz_ma)_u j_6"N; +R(@@:U4d::dc4:dUd4n+jp:Biz_ma)_u j_6R:fjjNRlO7ERwbwRsRHlB_pim_zau_) 6Sj +Tp=Biz_ma)_u j_6 +=S7B_pim_zau_) 6Hj_ +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRB_pim_zau_) 6;j" +RNH3M#$_HHM0DPNR""4;R +s@:@(4:.gd46:.dg:(j+4:iBp_amz_aQhR:fjjNRlO7ERwbwRsRHlB_pim_zaQ +haSBT=p i_XOu_ +=S7B_pim_zau_) 7B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"iBp_amz_aQh"N; H#R3$HM_MPH0N"DR4 ";sjRf:ljRNROEA7Q_Qb)RsRHlqj1_dSj m1=q_jjd_SO Qkj=MNn_#d_jj _HS=Qmqj1_dSj -mk =MNd_#d_jj;_H -RobQ -m;N#bR$bM_FVs0D#NoR -U;sjRf:ljRNROEA7Q_Qb)RsRHlqj1_jSj -m1=q_jjj_SO -Qkj=MNc_#j_jj -_HS=Qmqj1_jSj -mk =MN4_#j_jj;_H -RobQ -m;N#bR$bM_FVs0D#NoR -U;sjRf:ljRNROEA7Q_Qb)RsRHl)jW_jSj -mW=)_jjj_SO -Q)j=Wj_jjh_QaQ -SmW=)_jjj - Sm=4kM__N#j_jjHo; +mh =__c6Ho; +bmRQ;b +NRM#$_sbF0NVDoU#R;R +sfjj:ROlNEQRA_)7QRHbsl1Rq_jjj +=Smqj1_jOj_ +jSQ=ckM__N#j_jjHQ +Sm1=q_jjj + Sm=dh_(H4_;b +oR;Qm +RNb#_$Mb0FsVoDN#;RU +fsRjR:jlENOR_AQ7RQ)blsHR_)Wj +jjS)m=Wj_jj +_OS=Qj)jW_jQj_hSa +Q)m=Wj_jjm +S _=hd_(4Ho; bmRQ;b NRM#$_sbF0NVDoU#R;R sfjj:ROlNEzRAwRa]blsHR_71j djS7m=1d_jjQ SjM=kn#_8_jjd_SH -mk =MNd_#d_jj;_H -RobmN; -b$R#MF_bsD0VNRo#Us; -R:fjjNRlOAERQQ_7)sRbHzlR7j1_jSj -m7=z1j_jj -_OS=Qjk_Mck_8#j_jjHQ -Sm7=z1j_jjm -S M=k4#_N_jjj_ -H;oQbRmN; -b$R#MF_bsD0VNRo#Us; -R:fjjNRlOAERQQ_7)sRbHplR7j1_jSj -m7=p1j_jj -_OS=Qjk_McD_8#j_jjHQ -Sm7=p1j_jjm -S M=k4#_N_jjj_ +mh =__c6Ho; +b;Rm +RNb#_$Mb0FsVoDN#;RU +fsRjR:jlENOR_AQ7RQ)blsHR1z7_jjj +=Smz_71j_jjOQ +SjM=kc8_k#j_jj +_HS=Qmz_71j +jjS=m h(_d4;_H +RobQ +m;N#bR$bM_FVs0D#NoR +U;sjRf:ljRNROEA7Q_Qb)RsRHlp_71j +jjSpm=7j1_jOj_ +jSQ=ckM_#D8_jjj_SH +Qpm=7j1_jSj +mh =_4d(_ H;oQbRmN; b$R#MF_bsD0VNRo#Us; R:fjjNRlOAERQQ_7)sRbH1lRQrZ jS9 @@ -1178,56 +1166,56 @@ fsRjR:jlENOR_AQ7RQ)blsHRQq]t.]rcS9 m]=qQ_t]Ocr.9Q Sjh=t7Q Sm]=qQrt]. -c9S=m k_MdNj#_dHj_;b -oR;Qm -RNb#_$Mb0FsVoDN#;RU -fsRjR:jlENOR_AQ7RQ)blsHRQq]t.]r6S9 -m]=qQ_t]O6r.9Q -Sjh=t7Q -Sm]=qQrt]. -69S=m k_MdNj#_dHj_;b +c9S=m h6_c_ +H;oQbRmN; +b$R#MF_bsD0VNRo#Us; +R:fjjNRlOAERQQ_7)sRbHqlR]]Qtr9.6 +=Smqt]Q]r_O. +69S=Qjt +h7S=Qmqt]Q]6r.9m +S _=hcH6_;b oR;Qm RNb#_$Mb0FsVoDN#;RU fsRjR:jlENOR_AQ7RQ)blsHRQq]t.]rnS9 m]=qQ_t]Onr.9Q Sjh=t7Q Sm]=qQrt]. -n9S=m k_MdNj#_dHj_;b -oR;Qm -RNb#_$Mb0FsVoDN#;RU -fsRjR:jlENOR_AQ7RQ)blsHRQq]t.]r(S9 -m]=qQ_t]O(r.9Q -Sjh=t7Q -Sm]=qQrt]. -(9S=m k_MdNj#_dHj_;b +n9S=m h6_c_ +H;oQbRmN; +b$R#MF_bsD0VNRo#Us; +R:fjjNRlOAERQQ_7)sRbHqlR]]Qtr9.( +=Smqt]Q]r_O. +(9S=Qjt +h7S=Qmqt]Q](r.9m +S _=hcH6_;b oR;Qm RNb#_$Mb0FsVoDN#;RU fsRjR:jlENOR_AQ7RQ)blsHRQq]t.]rUS9 m]=qQ_t]OUr.9Q Sjh=t7Q Sm]=qQrt]. -U9S=m k_MdNj#_dHj_;b -oR;Qm -RNb#_$Mb0FsVoDN#;RU -fsRjR:jlENOR_AQ7RQ)blsHRQq]t.]rgS9 -m]=qQ_t]Ogr.9Q -Sjh=t7Q -Sm]=qQrt]. -g9S=m k_MdNj#_dHj_;b +U9S=m h6_c_ +H;oQbRmN; +b$R#MF_bsD0VNRo#Us; +R:fjjNRlOAERQQ_7)sRbHqlR]]Qtr9.g +=Smqt]Q]r_O. +g9S=Qjt +h7S=Qmqt]Q]gr.9m +S _=hcH6_;b oR;Qm RNb#_$Mb0FsVoDN#;RU fsRjR:jlENOR_AQ7RQ)blsHRQq]td]rjS9 m]=qQ_t]Ojrd9Q Sjh=t7Q Sm]=qQrt]d -j9S=m k_MdNj#_dHj_;b -oR;Qm -RNb#_$Mb0FsVoDN#;RU -fsRjR:jlENOR_AQ7RQ)blsHRQq]td]r4S9 -m]=qQ_t]O4rd9Q -Sjh=t7Q -Sm]=qQrt]d -49S=m k_MdNj#_dHj_;b +j9S=m h6_c_ +H;oQbRmN; +b$R#MF_bsD0VNRo#Us; +R:fjjNRlOAERQQ_7)sRbHqlR]]Qtr9d4 +=Smqt]Q]r_Od +49S=Qjt +h7S=Qmqt]Q]4rd9m +S _=hcH6_;b oR;Qm RNb#_$Mb0FsVoDN#;RU fsRjR:jlENORzQAwsRbHqlR_B7 mr7 .S9 @@ -1300,776 +1288,756 @@ R:fjjNRlOAERQQ_7)sRbHqlRr j9Sqm=_jOr9Q Sjj=q_q7v mSQ=jqr9m -S M=kd#_N_jjd_ -H;oQbRmN; -b$R#MF_bsD0VNRo#Us; -R:fjjNRlOQERARzwblsHR4qr9m -S=Oq_r -49S=Qjq9r4;R -sfjj:ROlNEARQzbwRsRHlMu X_q1uBS -m =MX1u_u qB_SO -QMj= _Xu1Buq s; -R:fjjNRlOAERQQ_7)sRbHAlR -))SAm= _))OQ -Sjh=t7Q -Sm =A)S) -mk =M_..LsCs;b +S _=hcH6_;b oR;Qm RNb#_$Mb0FsVoDN#;RU -fsRjR:jlENORzQAwsRbHAlRtd_jjm -S=_Atj_djOQ -Sjt=A_jjd;R -sfjj:ROlNEARmzbwRsRHlAjt_jSj -mt=A_jjj -jSQ=_Atj_jjOs; -R:fjjNRlOmERARzwblsHRqAtBji_dSj -mt=Aq_Bij -djS=QjABtqid_jjh_Qas; -R:fjjNRlOQERARzwblsHRqAtBji_jSj -mt=Aq_Bij_jjOQ -Sjt=Aq_Bij;jj -fsRjR:jlENORzQAwsRbHBlRpji_dSj -mp=Bid_jj -_OS=QjB_pij;dj -fsRjR:jlENORzQAwsRbHBlRpji_jSj -mp=Bij_jj -_OS=QjB_pij;jj -fsRjR:jlENORzQAwsRbHBlRpmi_1 -ZQSBm=pmi_1_ZQOQ -Sjp=Bi1_mZ -Q;sjRf:ljRNROEmwAzRHbslpRBiQ_7ez_mam -S=iBp_e7Q_amz -jSQ=iBp_u X_ -O;sjRf:ljRNROEmwAzRHbslpRBiX_ um -S=iBp_u X -jSQ=iBp_u X_ -O;sjRf:ljRNROEmwAzRHbsluRwz1_B -=Smw_uzBS1 -Qkj=M_.4V_bkOH#_;R -sfjj:ROlNEARQzbwRsRHlw_uz11 h m -S=zwu_h1 1O _ -jSQ=zwu_h1 1 - ;sjRf:ljRNROEmwAzRHbsluRQpd_jj9rj -=SmQ_upjrdjjS9 -QQj=ujp_dOj_r;j9 -fsRjR:jlENORzmAwsRbHQlRujp_d4jr9m -S=pQu_jjdr -49S=QjQ_upj_djO9r4;R -sfjj:ROlNEARmzbwRsRHlQ_upjrdj.S9 -mu=Qpd_jj9r. -jSQ=pQu_jjd_.Or9s; +fsRjR:jlENORzQAwsRbHqlRr +49Sqm=_4Or9Q +Sjr=q4 +9;sjRf:ljRNROEQwAzRHbsl RMX1u_u qB +=SmMu X_q1uBO _ +jSQ=XM uu_1q;B +fsRjR:jlENOR_AQ7RQ)blsHR)A )m +S=)A ) +_OS=Qjt +h7S=QmA) ) + Sm=.kM.C_Ls +s;oQbRmN; +b$R#MF_bsD0VNRo#Us; +R:fjjNRlOQERARzwblsHR_Atj +djSAm=td_jj +_OS=QjAjt_d +j;sjRf:ljRNROEmwAzRHbsltRA_jjj +=SmAjt_jSj +QAj=tj_jj;_O +fsRjR:jlENORzmAwsRbHAlRtiqB_jjd +=SmABtqid_jjQ +Sjt=Aq_Bij_djQ;ha +fsRjR:jlENORzQAwsRbHAlRtiqB_jjj +=SmABtqij_jj +_OS=QjABtqij_jjs; +R:fjjNRlOQERARzwblsHRiBp_jjd +=SmB_pij_djOQ +Sjp=Bid_jjs; +R:fjjNRlOQERARzwblsHRiBp_jjj +=SmB_pij_jjOQ +Sjp=Bij_jjs; +R:fjjNRlOQERARzwblsHRiBp_Zm1Qm +S=iBp_Zm1Q +_OS=QjB_pimQ1Z;R +sfjj:ROlNEARmzbwRsRHlB_pi7_Qem +zaSBm=p7i_Qme_zSa +QBj=p i_XOu_;R +sfjj:ROlNEARmzbwRsRHlB_pi +XuSBm=p i_XSu +QBj=p i_XOu_;R +sfjj:ROlNEARmzbwRsRHlw_uzBS1 +mu=wz1_B +jSQ=.kM4b_Vk#_O_ +H;sjRf:ljRNROEQwAzRHbsluRwz _1h +1 Swm=u1z_ h1_SO +Qwj=u1z_ h1;R +sfjj:ROlNEARmzbwRsRHlQ_upjrdjjS9 +mu=Qpd_jj9rj +jSQ=pQu_jjd_jOr9s; +R:fjjNRlOmERARzwblsHRpQu_jjdr +49SQm=ujp_d4jr9Q +Sju=Qpd_jjr_O4 +9;sjRf:ljRNROEmwAzRHbsluRQpd_jj9r. +=SmQ_upjrdj.S9 +QQj=ujp_dOj_r;.9 +fsRjR:jlENORzQAwsRbHQlRujpr9m +S=pQu_jOr9Q +Sju=Qp9rj;R +sfjj:ROlNEARQzbwRsRHlQrup4S9 +mu=Qpr_O4S9 +QQj=u4pr9s; R:fjjNRlOQERARzwblsHRpQur -j9SQm=uOp_r -j9S=QjQrupj -9;sjRf:ljRNROEQwAzRHbsluRQp9r4 -=SmQ_upO9r4 -jSQ=pQur;49 -fsRjR:jlENORzQAwsRbHQlRu.pr9m -S=pQu_.Or9Q -Sju=Qp9r.;R -sfjj:ROlNEzRAwRa]blsHRq71B -i4S7m=1iqB4Q -Sj1=7q4Bi_aQh - Sm=XM uu_1q_B Oo; -b;Rm -RNb#_$Mb0FsVoDN#;RU -fsRjR:jlENORzQAwsRbH7lRaiqB -=Sm7Baqi -_OS=Qj7Baqis; -R:fjjNRlOmERARzwblsHR qeBm -S= qeBQ -SjB=eBs; -R:fjjNRlOmERARzwblsHRS -m -= S=Qjh4_d(;_H -fsRjR:jlENORzQAwsRbHelRuSq -mu=eq -_OS=Qje;uq -fsRjR:jlENORzmAwsRbHelRvSq -mv=eqQ -Sjv=eqh_Qas; -R:fjjNRlOQERARzwblsHRa)1 -=Sm)_1aOQ -Sj1=)as; -R:fjjNRlOAERz]waRHbsl R)1 - aS)m= a1 -jSQ=7th - Sm=1) ma_zHa_;b +.9SQm=uOp_r +.9S=QjQrup. +9;sjRf:ljRNROEAazw]sRbH7lR1iqB4m +S=q71B +i4S=Qj7B1qiQ4_hSa +mM = _Xu1Buq ;_O +RobmN; +b$R#MF_bsD0VNRo#Us; +R:fjjNRlOQERARzwblsHRq7aBSi +ma=7q_BiOQ +Sja=7q;Bi +fsRjR:jlENORzmAwsRbHqlRe + BSqm=e + BS=Qje;BB +fsRjR:jlENORzmAwsRbH lR +=Sm Q +Sj_=h._g4Hs; +R:fjjNRlOQERARzwblsHRqeu +=Sme_uqOQ +Sju=eqs; +R:fjjNRlOmERARzwblsHRqev +=Sme +vqS=Qje_vqQ;ha +fsRjR:jlENORzQAwsRbH)lR1Sa +m1=)a +_OS=Qj);1a +fsRjR:jlENORwAzab]RsRHl) 1am +S=1) Sa +Qtj=hS7 +m) = a1 _amz_ +H;ombR;b +NRM#$_sbF0NVDoU#R;R +sfjj:ROlNEQRA_)7QRHbslWR) +=Sm)OW_ +jSQ=_)Wj_jj7 +vqS=Qm)SW +mh =_.d(_ +H;oQbRmN; +b$R#MF_bsD0VNRo#Us; +R:fjjNRlOQERARzwblsHRrwBjS9 +mB=w_jOr9Q +SjB=wr;j9 +fsRjR:jlENORzQAwsRbHwlRB9r4 +=SmwOB_r +49S=Qjw4Br9s; +R:fjjNRlOmERARzwblsHRQqvtqq_7_7) AhqpS +mv=qQ_tqq)77_q hA +p S=Qjt;h7 +fsRjR:jlENORzmAwsRbHqlRvqQt_1Az_a7qqQ_7)m +S=QqvtAq_z71_q_aq7 +Q)S=QjqtvQqz_A1q_7a7q_QO)_;R +sfjj:ROlNEARmzbwRsRHlqtvQqz_A1h_ q Ap_Wpm +=SmqtvQqz_A1h_ q Ap_Wpm +jSQ=4kM_HNloLN_kC#_MDNLCF_DI;_H +fsRjR:jlENORzmAwsRbHqlRvqQt_1Az_q hA_p ]]Qt +=SmqtvQqz_A1h_ q Ap_t]Q]Q +Sj_=h4;(U +fsRjR:jlENORwAzab]RsRHlBhQQ +=SmBhQQ +jSQ=4kMjH_OHSM +mh =_jd4;b oR m;N#bR$bM_FVs0D#NoR -U;sjRf:ljRNROEA7Q_Qb)RsRHl)SW -mW=)_SO -Q)j=Wj_jjv_7qQ -SmW=) - Sm=gh_d;_H -RobQ -m;N#bR$bM_FVs0D#NoR -U;sjRf:ljRNROEQwAzRHbslBRwr -j9Swm=Br_OjS9 -Qwj=B9rj;R -sfjj:ROlNEARQzbwRsRHlw4Br9m -S=_wBO9r4 -jSQ=rwB4 -9;sjRf:ljRNROEmwAzRHbslvRqQ_tqq)77_q hA -p Sqm=vqQt_7q7)h_ q Ap -jSQ=7th;R -sfjj:ROlNEARmzbwRsRHlqtvQqz_A1q_7a7q_QS) -mv=qQ_tqA_z17qqa_)7Q -jSQ=QqvtAq_z71_q_aq7_Q)Os; -R:fjjNRlOmERARzwblsHRQqvtAq_z 1_hpqA m_pWm -S=QqvtAq_z 1_hpqA m_pWQ -SjM=k4l_NH_oNL_k#CLMNDDC_FHI_;R -sfjj:ROlNEARmzbwRsRHlqtvQqz_A1h_ q Ap_t]Q]m -S=QqvtAq_z 1_hpqA Q_]tS] -Qhj=_g.j;R -sfjj:ROlNEzRAwRa]blsHRQBQhm -S=QBQhQ -SjM=k4Oj_H -HMS=m h4_ddo; -b;Rm -RNb#_$Mb0FsVoDN#;RU -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__jjd_Nr -69Shm=_U.d -jSQ=.h_d4U_ -4SQ=_1vqtvQq9r6;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__Nj_dr_4.S9 -m_=h._dd4Q -Sj_=h4 -ngS=Q4hn_djs; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#j__jN.dr9m -S=.h_dSd -Qhj=_d.d_S4 -Q14=vv_qQrtqd -9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jj___Nd49r4 -=Smhd_.4 -_4S=Qjhj_4UQ -S4_=hd;4j -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__jjd_Nr -49Shm=_4.d -jSQ=.h_d44_ -4SQ=_1vqtvQq9r4;R -sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH4__Nj_d__44m -S=.h_.4c_ -jSQ=.h_cH6_ -4SQ=a)1_Y7p_jHr9s; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__C4H__jN4d_ -=Smh._.cQ -Sj_=h._.c4Q -S41=)ap_7Yr_H4 -9;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y._C_jH___Nd4 -_jShm=_U.4_S4 -Qhj=_6.c_SH -Qh4=_.d.;R -sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH.__Nj_dm -S=.h_4SU -Qhj=_U.4_S4 -Q)4=17a_pHY_r;.9 -fsRjR:jlENOR7qh.sRbHtlR_g44_S4 -mF=b#D_O H\3b4D_ -jSQ=.h_cHd_ -4SQ=.h_cH4_;R -sfjj:ROlNEhRq7b.RsRHlt4_4gm -S=#bF_ OD\b3HDQ -SjF=b#D_O H\3b4D_ -4SQ=.h_cH._;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3BBYp7 _v6q__H4__4j_ -=Smh(_.(__H4Q -Sj_=h._4jHQ -S41=q_jjj_ -H;sjRf:ljRNROEq.h7RHbslFRb#D_O B\3Y Bp_q7v_46__jH_ -=Smh(_.( -_HS=Qjh(_.(__H4Q -S4_=h4_j4Hs; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__CjH -_4Shm=_cd4_4H_ -jSQ=.h_.Hn_ -4SQ=dh_dH4_;R -sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCHj_ -=Smh4_dc -_HS=Qjh4_dc__H4Q -S41=)a;_O -fsRjR:jlENOR7qh.sRbH7lR1iqB4h_Qa__4#kJlGHN__Nj_. -_4Shm=_nd6_S4 -Qhj=_.4c -4SQ=iBp_jjj_47r4 -9;sjRf:ljRNROEq.h7RHbsl1R7q4Bi_aQh_#4_JGlkN__Hj._N -=Smh6_dnQ -Sj_=hd_6n4Q -S4p=Bij_jj__7Hjr49s; -R:fjjNRlOqERhR7.blsHRQqvtAq_z71_q_aq7_Q)j__jjd_N_4j_ -=SmhU_.. -_4S=Qjqj1_jHj_ -4SQ=_)Wj_jjOs; -R:fjjNRlOqERhR7.blsHRQqvtAq_z71_q_aq7_Q)j__jjd_N_Sj +U;sjRf:ljRNROEq.h7RHbsl_Rt4_.j4m +S=#bF_ OD\b3HD +_4S=Qjhc_.n +_HS=Q4hc_.c;_H +fsRjR:jlENOR7qh.sRbHtlR_j4. +=Smb_F#O\D 3DHb +jSQ=#bF_ OD\b3HD +_4S=Q4hc_.6;_H +fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__jj___Nd49r4 +=Smh._.dQ +Sj_=h._.d4Q +S4b=Ok#_C0r_Hd +9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MLn_od_jj__jNj.___Nd4m +S=#bF_ OD\M3kno_L_jjd_S4 +QMj= _Xu1Buq +_OS=Q4qj1_d7j_js; +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kno_L_jjd_Nj_.__jNSd +mF=b#D_O k\3MLn_od_jjQ +SjF=b#D_O k\3MLn_od_jj +_4S=Q4B_pij_jj79rj;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__jH___Nd49rn +=Smh4_.d +_4S=Qjh6_.gQ +S4v=1_Qqvtnqr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__Hjd_Nr +n9Shm=_d.4 +jSQ=.h_44d_ +4SQ=_1vqtvQqr_H( +9;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z17qqa_)7Q_jj__Nj_d__j4m +S=.h_j4U_ +jSQ=_q1j_jjHQ +S4W=)_jjj_ +O;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z17qqa_)7Q_jj__Nj_d +_jShm=_U.j +jSQ=.h_j4U_ +4SQ=4kM__N#j_djHs; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#j__jjd_N_64r9m +S=.h_j46_ +jSQ=4h_dSn +Qh4=_d.c;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__jj__rNd6S9 m_=h. -U.S=QjhU_.. -_4S=Q4k_M4Nj#_dHj_;R -sfjj:ROlNEhRq7b.RsRHlO_bkC_#0.__jjd_N_44_r -49Shm=_4.6_S4 -QOj=bCk_#j0r9Q -S4b=Ok#_C0r_H4 -9;sjRf:ljRNROEq.h7RHbslbROk#_C0__.j__jN4d_r -49Shm=_4.6 -jSQ=.h_644_ -4SQ=kOb_0C#_dHr9s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kno_L_jjd_Nj_d -_4Sbm=FO#_D3 \k_MnLjo_d4j_ -jSQ=XM uu_1q_B OQ -S41=q_jjd_;7j -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MnLjo_djj__ -NdSbm=FO#_D3 \k_MnLjo_dSj -Qbj=FO#_D3 \k_MnLjo_d4j_ -4SQ=iBp_jjj_j7r9s; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__HN4d_r -n9Shm=_j.c_S4 -Qhj=_6dn -4SQ=_1vqtvQq9rn;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__NH_d9rn -=Smhc_.jQ -Sj_=h._cj4Q -S4v=1_QqvtHq_r;(9 -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__jjd_N_64r9m -S=.h_d4U_ -jSQ=4h_jSU -Qh4=_jd4;R -sfjj:ROlNEhRq7b.RsRHlk_M41qv_vqQt_H4___N.dd_N -=Smh4_46Q -Sj_=h4_464Q -S4_=h4_46.s; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__HNjd__n4r9m -S=dh_d4._ -jSQ=iBp_jjj_.7r9Q -S4_=hd_d.cs; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__HNjd_r -n9Shm=_.dd -jSQ=dh_d4._ -4SQ=_1vqtvQq__HH9r(;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_jH__Nj_d__.49rj -=Smhc_.n -_4S=Qj1qv_vqQt_jHr9Q -S4v=1_QqvtHq_r;d9 -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqM_##H__jjd_N_.._r -j9Shm=_n.c_S. -QBj=pji_j7j_r -.9S=Q4hU_4j;_H -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqM_##H__jjd_N_d._r -j9Shm=_n.c_Sd -Qhj=_jd._SH -Qh4=_.dd_ -c;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jj___Nd.r_cjS9 -m_=h._cncQ -Sj_=h._cn4Q -S4_=h._cn.s; -R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__Hj__jN.d_r -j9Shm=_n.c -jSQ=.h_ccn_ -4SQ=.h_cdn_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_jH__Nj_d__.6r_4jS9 -m_=hd_d.c -_4S=Qjqj1_djj_j1j_Y_hBHQ -S4p=Bij_jj__7H9r4;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_jH__Nj_d__.6r_.jS9 -m_=hd_d.c -_.S=Qj)_1aOQ -S4 =MX1u_u qB_ -O;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jj___Nd.r_6jS9 -m_=hd_d.cQ -Sj_=hd_d.c -_4S=Q4hd_d.__c.s; -R:fjjNRlOqERhR7.blsHR_71j_jj7_vq.J_#lNkG_jH__S4 -m_=h._(dj -_4S=Qjhg_.j -_HS=Q4)jW_jHj_;R -sfjj:ROlNEhRq7b.RsRHl7j1_j7j_v.q__l#Jk_GNH -_jShm=_d.(_Sj -Qhj=_d.(_4j_ -4SQ=#bF_ OD\M3k.Ld_o NO_jjd_0HM_jH__ -j;sjRf:ljRNROEq.h7RHbslpRBid_jj__].__Hj -_4Shm=_n.(_4H_ -jSQ=dh_cH4_ +j6S=Qjhj_.6 +_4S=Q41qv_vqQtr;69 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqM_##H__jj__jN4d__j4r9m +S=4h_g4d_ +jSQ=4h_nS4 +Qh4=_d.6;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_jH__jj___Nd49rj +=Smhg_4dQ +Sj_=h4_gd4Q +S4v=1_Qqvtdqr9s; +R:fjjNRlOqERhR7.blsHRa)1_Y7p__C4H__jN4d__S4 +m_=h4_gj4Q +Sj_=h._cUHQ +S41=)ap_7Yr_Hj +9;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y4_C_jH___Nd4m +S=4h_gSj +Qhj=_j4g_S4 +Q)4=17a_pHY_r;49 +fsRjR:jlENOR7qh.sRbH)lR17a_pCY_.__Hjd_N_j4_ +=SmhU_4c +_4S=Qjhc_4(Q +S4_=h._cUHs; +R:fjjNRlOqERhR7.blsHRa)1_Y7p__C.H__jNSd +m_=h4 +UcS=QjhU_4c +_4S=Q4)_1a7_pYH9r.;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_jH__jj___Nd.__4j9rj +=Smhg_4c +_4S=Qjh4_.c +_4S=Q4h6_.ds; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__Hj__jjd_N_.._r +j9Shm=_c4g_S. +Qhj=_dd(_SH +Q14=vv_qQ_tqH9rj;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_jH__jj___Nd.r_djS9 +m_=h4_gcdQ +Sj_=h4_gc4Q +S4_=h4_gc.s; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__Hj__jjd_N_j.r9m +S=4h_gSc +Qhj=_c4g_Sd +Q14=vv_qQ_tqH9rd;R +sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCHj__4j_ +=Smh(_.U__H4Q +Sj_=h._dnHQ +S4_=h._d(Hs; +R:fjjNRlOqERhR7.blsHRa)1_Y7p__CjH +_jShm=_U.(_SH +Qhj=_U.(_4H_ 4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbslpRBid_jj__].__Hjm -S=.h_(Hn_ -jSQ=.h_(Hn__S4 -Qb4=FO#_D3 \kdM._NLoOj _dHj_MH0__jj_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkM(#_N_jjd__8jH__HN4d_ -=Smhn_.j -_4S=Qjh6_4( -_HS=Q4hn_dds; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdN(_#d_jjj_8_HH___Nd.m -S=.h_n.j_ -jSQ=_1vqtvQq__HH9r( -4SQ=XM uu_1q_B Os; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdN(_#d_jjj_8_HH__ -NdShm=_j.n -jSQ=.h_n4j_ -4SQ=.h_n.j_;R -sfjj:ROlNEhRq7b.RsRHlk4M._kVb__O#j._N_Nj_d -_4Skm=M_.4V_bkO4#_ -jSQ=zwu_h1 1H _ -4SQ=4h_6 -(;sjRf:ljRNROEq.h7RHbslMRk.V4_bOk_#__jNj.__ -NdSkm=M_.4V_bkOS# -Qkj=M_.4V_bkO4#_ -4SQ=.kM.C_Ls4s_;R -sfjj:ROlNEhRq7b.RsRHlk.M._sLCs__jNj.___Nd4 -_jSkm=M_..LsCs_j4_ -jSQ=.kM.C_Ls4s_ -4SQ=zwu_h1 1O _;R -sfjj:ROlNEhRq7b.RsRHlk.M._sLCs__jNj.__ -NdSkm=M_..LsCs -jSQ=.kM.C_Ls4s__Sj -Qh4=_(46;R +O;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q7v_#._JGlkN__Hj +_4Shm=_(dj_4j_ +jSQ=.h_4H._ +4SQ=_)Wj_jjHs; +R:fjjNRlOqERhR7.blsHR_71j_jj7_vq.J_#lNkG_jH_ +=Smhj_d( +_jS=Qjhj_d(__j4Q +S4F=b#D_O k\3M_.4LOoN d_jjM_H0__Hj;_j +fsRjR:jlENOR7qh.sRbHBlRpji_d]j__H.__4j_ +=Smhj_dU__H4Q +Sj_=h4_g(HQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbHBlRpji_d]j__H.__Sj +m_=hd_jUHQ +Sj_=hd_jUH +_4S=Q4b_F#O\D 3.kM4o_LN_O j_djH_M0H__jjs; +R:fjjNRlOqERhR7.blsHR#bF_ OD\Y3BB_p 7_vq6__4H__j4m +S=ch_j__H4Q +Sj1=q_jjj_SH +Qh4=_g4n_ +H;sjRf:ljRNROEq.h7RHbslFRb#D_O B\3Y Bp_q7v_46__jH_ +=Smhj_c_SH +Qhj=__cjH +_4S=Q4hj_c.s; +R:fjjNRlOqERhR7.blsHRq71B_i4Q_ha4J_#lNkG_H4__Nj_. +_4Shm=_j.6_S4 +Qhj=_d4c +4SQ=iBp_jjj_g7r9s; +R:fjjNRlOqERhR7.blsHRq71B_i4Q_ha4J_#lNkG_H4__Nj_.m +S=.h_6Sj +Qhj=_j.6_S4 +QB4=pji_j7j__UHr9s; +R:fjjNRlOqERhR7.blsHRkOb_0C#_j.__Nj_d__449r4 +=Smh._.d +_4S=QjO_bkCr#0jS9 +QO4=bCk_#H0_r;49 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqM_##H__jj__jNc._r +j9Shm=_6.6 +jSQ=.h_646_ +4SQ=.h_6.6_;R +sfjj:ROlNEhRq7b.RsRHl7B1qiQ4_h4a__l#Jk_GN4__Hj._F_j4_ +=Smh6_44__j4Q +Sj_=h4 +dnS=Q4h6_.j;_H +fsRjR:jlENOR7qh.sRbH7lR1iqB4h_Qa__4#kJlG4N__jH__ +F.Shm=_446_Sj +Qhj=_446_4j_ +4SQ=.h_6H4_;R sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH4__4j_ -=Smh(_.6__H4Q -Sj_=h._..HQ -S4_=h._.dHs; +=Smh(_.(__H4Q +Sj_=h4_UUHQ +S4_=h4_UgHs; R:fjjNRlOqERhR7.blsHRa)1_Y7p__C4H__j.m -S=.h_(H6__S. -Qhj=_c.._SH +S=.h_(H(__S. +Qhj=_j4g_SH Q)4=1Oa_;R sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH4__Sj -m_=h._(6HQ -Sj_=h._(6H -_4S=Q4h(_.6__H.s; +m_=h._((HQ +Sj_=h._((H +_4S=Q4h(_.(__H.s; R:fjjNRlOqERhR7.blsHRa)1_Y7p__C.H__j4m -S=.h_(Hc__S4 -Qhj=_U.4_SH -Qh4=_g.4_ +S=.h_(Hn__S4 +Qhj=_c4U_SH +Qh4=_64U_ H;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y._C_jH__S. -m_=h._(cH -_.S=Qjh._.j +m_=h._(nH +_.S=QjhU_4n _HS=Q4)_1aOs; R:fjjNRlOqERhR7.blsHRa)1_Y7p__C.H -_jShm=_c.(_SH -Qhj=_c.(_4H_ -4SQ=.h_(Hc__ -.;sjRf:ljRNROEq.h7RHbslMRk4v_1_Qqvt4q__NH_.__dN4d_ -=Smh4_46 -_4S=Qjhc_4dQ -S4v=1_QqvtHq_r;j9 -fsRjR:jlENOR7qh.sRbHklRM14_vv_qQ_tq4__HNd.___Nd.m -S=4h_4.6_ -jSQ=_1vqtvQqr_H6S9 -Q14=vv_qQ_tqH9r(;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3BBYp7 _v6q__Hj__Sj -m_=hnHj_ -jSQ=nh_j__H4Q -S4_=hnHj__ -.;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MOg_Dj _jbj_C__jjd_N_S4 -m_=h._cU4Q -Sj_=h4_6UHQ -S4_=hd_4gHs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kgD_O j_jjC_b_jj___Nd.m -S=.h_c.U_ -jSQ=kOb_0C#_4Hr9Q -S4b=Ok#_C0r_Hd -9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MOg_Dj _jbj_C__jjd_N -=Smhc_.UQ -Sj_=h._cU4Q -S4_=h._cU.s; +_jShm=_n.(_SH +Qhj=_n.(_4H_ +4SQ=.h_(Hn__ +.;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MOg_Dj _jbj_C__jjd_N_4j_ +=Smh._.4 +_4S=Qjhd_4n +_HS=Q4hn_.(s; R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kgD_O j_jjC_b_jj___Ndj -_4Shm=_g.c_S4 -Qhj=_U4j_SH -Qh4=_gdn;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3gkM_ OD_jjj__bCj__jNjd__S. -m_=h._cg.Q -Sju=eq__7HQ -S4b=Ok#_C0r_Hd -9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MOg_Dj _jbj_C__jjd_N_Sj +_.Shm=_4.._S. +Qej=u7q__SH +QO4=bCk_#H0_r;d9 +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MgO_D j_jjbjC__Nj_d +_jShm=_4.. +jSQ=.h_.44_ +4SQ=.h_..4_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3gkM_ OD_jjj__bCj__jN4d_ +=Smh._.j +_4S=Qjhd_4( +_HS=Q4h6_4.;_H +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MgO_D j_jjbjC__Nj_d +_.Shm=_j.._S. +QOj=bCk_#H0_r +49S=Q4O_bkC_#0H9rd;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3gkM_ OD_jjj__bCj__jNSd m_=h. -cgS=Qjhc_.g -_4S=Q4hc_.g;_. -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__jj._N_.4r9m -S=dh_n44_ -jSQ=4h_6j4_ -4SQ=4h_6HU_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__Nj_.r_..S9 -m_=hd_n4.Q -Sjv=eqh_Qa -_HS=Q4e_uq7;_H -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__jj._Nr -.9Shm=_4dn -jSQ=dh_n44_ -4SQ=dh_n.4_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkM(#_N_jjd__8jH._N_44_ -=Smh6_4( -_4S=QjwOB_r -j9S=Q4wOB_r;49 -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k(Md__N#j_dj8Hj___N.4 -_.Shm=_(46_S. -Qqj=_B7 m_7 O(r49Q -S4_=q7m B7H _r94n;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkM(#_N_jjd__8jH._N_d4_ -=Smh6_4( -_dS=Qjq _7B m7_4HrUS9 -Qq4=_B7 m_7 Hgr49s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdN(_#d_jjj_8_NH_.__4cm -S=4h_6c(_ -jSQ=4h_64(_ -4SQ=4h_6.(_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkM(#_N_jjd__8jH._N_S4 -m_=h4 -6(S=Qjh6_4( -_cS=Q4h6_4(;_d -fsRjR:jlENOR7qh.sRbHklRM_4jOMHH_Nj_d -_dSkm=M_4jOMHH_Sd -Qqj=]]Qt_.HrUS9 -Qq4=]]Qt_.Hrg -9;sjRf:ljRNROEq.h7RHbslMRk4Oj_H_HMjd_N_Sc -mM=k4Oj_H_HMcQ -Sj]=qQ_t]Hjrd9Q -S4]=qQ_t]H4rd9s; -R:fjjNRlOqERhR7.blsHR4kMjH_OHjM___Nd6m -S=4kMjH_OH6M_ -jSQ=7q_ 7Bm r_O. -d9S=Q4qj1_d7j_j;_H -fsRjR:jlENOR7qh.sRbHklRM_4jOMHH_Nj_d -_nSkm=M_4jOMHH_Sn -Qqj=_B7 m_7 Ojr.9Q -S4_=q7m B7O _r9.4;R -sfjj:ROlNEhRq7b.RsRHlkjM4_HOHM__jN(d_ -=SmkjM4_HOHM -_(S=QjkjM4_HOHM -_4S=Q4kjM4_HOHM;_. -fsRjR:jlENOR7qh.sRbHklRM_4jOMHH_Nj_d -_USkm=M_4jOMHH_SU -Qkj=M_4jOMHH_Sd -Qk4=M_4jOMHH_ -c;sjRf:ljRNROEq.h7RHbslMRk4Oj_H_HMjd_N_Sg -mM=k4Oj_H_HMgQ -SjM=k4Oj_H_HM6Q -S4M=k4Oj_H_HMns; -R:fjjNRlOqERhR7.blsHR4kMjH_OHjM___Nd4Sj -mM=k4Oj_H_HM4Sj -Qkj=M_4jOMHH_S( -Qk4=M_4jOMHH_ -U;sjRf:ljRNROEq.h7RHbslMRk4Oj_H_HMjd_N_ -44Skm=M_4jOMHH_ -44S=QjkjM4_HOHM -_gS=Q4q _7B m7_.Or. -9;sjRf:ljRNROEq.h7RHbslMRk4Oj_H_HMjd_N -=SmkjM4_HOHMQ -SjM=k4Oj_H_HM4Sj -Qk4=M_4jOMHH_;44 -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kdM._NLoOj _dHj_MH0__Fj_.__.F4d_ -=Smb_F#O\D 3.kMdo_LN_O j_djH_M0H__jj -_4S=Qjqj1_jHj_ -4SQ=qAtBji_dQj_hHa_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3.kMdo_LN_O j_djH_M0H__jF..___Fd.m -S=#bF_ OD\M3k.Ld_o NO_jjd_0HM_jH__.j_ -jSQ=4h_4Hj_ -4SQ=dh_4H4_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3.kMdo_LN_O j_djH_M0H__jF..__ -FdSbm=FO#_D3 \kdM._NLoOj _dHj_MH0__jj_ -jSQ=#bF_ OD\M3k.Ld_o NO_jjd_0HM_jH__4j_ -4SQ=#bF_ OD\M3k.Ld_o NO_jjd_0HM_jH__.j_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3BBYp7 _v6q__Hj__4j_ -=Smhj_n_4H_ +.jS=Qjh._.j +_4S=Q4h._.j;_. +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k4M._NLoOj _dHj_MH0__Fj_.__.FSd +mF=b#D_O k\3M_.4LOoN d_jjM_H0__Hj +_jS=Qjb_F#O\D 3.kM4o_LN_O j_djH_M0H__jj +_4S=Q4b_F#O\D 3.kM4o_LN_O j_djH_M0H__jj;_. +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \BpYB v_7q__6j__Hj +_4Shm=_gdj_4H_ jSQ=_q1j_jjHQ -S4_=h4_j4Hs; +S4_=h4_4dHs; R:fjjNRlOqERhR7.blsHR#bF_ OD\Y3BB_p 7_vq6__jH__j.m -S=nh_j__H.Q -Sj_=h._n.HQ -S4_=h._ndHs; +S=dh_jHg__S. +Qhj=_g4n_SH +Qh4=_64g_ +H;sjRf:ljRNROEq.h7RHbslFRb#D_O B\3Y Bp_q7v_j6__jH_ +=Smhj_dg +_HS=Qjhj_dg__H4Q +S4_=hd_jgH;_. +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k(Md__N#j_dj8Hj__NH_d +_4Shm=_g.._S4 +Qhj=_c4._SH +Qh4=_(.6;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkM(#_N_jjd__8jH__HN.d_ +=Smh._.g +_.S=Qj1qv_vqQt_HH_r +(9S=Q4Mu X_q1uBO _;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkM(#_N_jjd__8jH__HNSd +m_=h. +.gS=Qjh._.g +_4S=Q4h._.g;_. +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__HH__jNjd__n4r9m +S=.h_44c__Sj +Qhj=_c.4_S4 +Qh4=_d.6;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__jH___Ndj9rn +=Smh4_.cQ +Sj_=h._4c4 +_jS=Q41qv_vqQt_HH_r;(9 +fsRjR:jlENOR7qh.sRbHklRM_.4V_bkOj#___N.jd_N_S4 +mM=k.V4_bOk_# +_4S=Qjqj1_dHj_ +4SQ=zwu_h1 1H _;R +sfjj:ROlNEhRq7b.RsRHlk4M._kVb__O#j._N_Nj_dm +S=.kM4b_Vk#_O +jSQ=.kM4b_Vk#_O_S4 +Qk4=M_..LsCs_ +4;sjRf:ljRNROEq.h7RHbslMRk.L._C_ssj._N_Nj_d__4jm +S=.kM.C_Ls4s__Sj +Qkj=M_..LsCs_S4 +Qq4=1d_jj;_H +fsRjR:jlENOR7qh.sRbHklRM_..LsCs_Nj_.__jNSd +mM=k.L._C +ssS=Qjk.M._sLCs__4jQ +S4u=wz _1h_1 Os; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__Hj__jj._N_4c_r +j9Shm=_6.6_S4 +Qhj=_64c_SH +Qh4=_.46_ +H;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jj__Nj_.__c.9rj +=Smh6_.6 +_.S=Qje_vqQ_haHQ +S4u=eq__7Hs; +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdN(_#d_jjj_8_NH_. +_4Shm=_c4. +jSQ=4h_.cc_ +4SQ=4h_.dc_;R +sfjj:ROlNEhRq7b.RsRHlkdM4_HOHM__Hj__jN4d_ +=SmkjM4_HOHM +_4S=Qjqt]Q]r_H. +c9S=Q4qt]Q]r_H.;69 +fsRjR:jlENOR7qh.sRbHklRM_4dOMHH_jH__Nj_d +_.Skm=M_4jOMHH_S. +Qqj=]]Qt_.HrnS9 +Qq4=]]Qt_.Hr( +9;sjRf:ljRNROEq.h7RHbslMRk4Od_H_HMH__jjd_N_Sd +mM=k4Oj_H_HMdQ +Sj]=qQ_t]HUr.9Q +S4]=qQ_t]Hgr.9s; +R:fjjNRlOqERhR7.blsHR4kMdH_OHHM__jj___Ndcm +S=4kMjH_OHcM_ +jSQ=Qq]tH]_r9dj +4SQ=Qq]tH]_r9d4;R +sfjj:ROlNEhRq7b.RsRHlkdM4_HOHM__Hj__jN6d_ +=SmkjM4_HOHM +_6S=Qjq _7B m7_.OrdS9 +Qq4=1d_jjj_7_ +H;sjRf:ljRNROEq.h7RHbslMRk4Od_H_HMH__jjd_N_Sn +mM=k4Oj_H_HMnQ +Sj_=q7m B7O _r9.j +4SQ=7q_ 7Bm r_O.;49 +fsRjR:jlENOR7qh.sRbHklRM_4dOMHH_jH__Nj_d +_(Skm=M_4jOMHH_S( +Qkj=M_4jOMHH_S4 +Qk4=M_4jOMHH_ +.;sjRf:ljRNROEq.h7RHbslMRk4Od_H_HMH__jjd_N_SU +mM=k4Oj_H_HMUQ +SjM=k4Oj_H_HMdQ +S4M=k4Oj_H_HMcs; +R:fjjNRlOqERhR7.blsHR4kMdH_OHHM__jj___Ndgm +S=4kMjH_OHgM_ +jSQ=4kMjH_OH6M_ +4SQ=4kMjH_OHnM_;R +sfjj:ROlNEhRq7b.RsRHlkdM4_HOHM__Hj__jN4d_jm +S=4kMjH_OH4M_jQ +SjM=k4Oj_H_HM(Q +S4M=k4Oj_H_HMUs; +R:fjjNRlOqERhR7.blsHR4kMdH_OHHM__jj___Nd4S4 +mM=k4Oj_H_HM4S4 +Qkj=M_4jOMHH_Sg +Qq4=_B7 m_7 O.r.9s; +R:fjjNRlOqERhR7.blsHR4kMdH_OHHM__jj__ +NdSkm=M_4jOMHH +jSQ=4kMjH_OH4M_jQ +S4M=k4Oj_H_HM4 +4;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_.4LOoN d_jjM_H0__Hj._F_F._d +_4Sbm=FO#_D3 \k4M._NLoOj _dHj_MH0__jj__S4 +Qqj=1j_jj +_HS=Q4ABtqid_jjh_Qa;_H +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k4M._NLoOj _dHj_MH0__Fj_.__.F.d_ +=Smb_F#O\D 3.kM4o_LN_O j_djH_M0H__jj +_.S=Qjhd_4U +_HS=Q4hg_dn;_H +fsRjR:jlENOReQhRHbsl1Rq_jjj_q7v_H4_ +=Smhn_c +jSQ=ch_n;_j +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqM_##H__jj__j49rj +=Sm1qv_vqQt_#M#_jH__j4r9Q +Sj_=h4_g4HQ +S4_=h4_g.Hs; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__Hj__jjr_.jS9 +mv=1_QqvtMq_#H#__.j_r +j9S=Qjhg_4d +_HS=Q41qv_vqQt_#M#_(jr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__Hj__jjr_djS9 +mv=1_QqvtMq_#H#__dj_r +j9S=Qjhg_4c +_HS=Q4hn_.4;_H +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqM_##H__jj__jc9rj +=Sm1qv_vqQt_#M#_jH__jcr9Q +Sjv=1_QqvtMq_#H#__4j_r +j9S=Q41qv_vqQt_#M#_jH__j.r9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__Hj__jjr_6jS9 +mv=1_QqvtMq_#H#__6j_r +j9S=Qj1qv_vqQt_#M#_jH__jdr9Q +S4_=hd_gUHs; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__Hj__jj9rj +=Sm1qv_vqQt_#M#_jH_r +j9S=Qj1qv_vqQt_#M#_jH__jcr9Q +S4v=1_QqvtMq_#H#__6j_r;j9 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqM_##H__jj__jFj.__j4r9m +S=dh_(Hd__S4 +Q1j=vv_qQ_tqH9r. +4SQ=_1vqtvQqr_Hn +9;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jj__Fj_.r_jjS9 +m_=hd_(dHQ +Sj_=hd_(dH +_4S=Q41qv_vqQt_cHr9s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k4#j_ll_NH_oN4m +S=#bF_ OD\M3k4#j_ll_NH_oNH +_4S=Qj1 QZ_jOr9Q +S4_=qOr_Hj +9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_4j#Nl_lNHo +=Smb_F#O\D 34kMjl_#_HNloHN_ +jSQ=#bF_ OD\M3k4#j_ll_NH_oNH +_4S=Q41 QZ_HO_r;49 +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k(Md__N#j_dj8Hj___N.4 +_4Shm=_c4._S4 +Qwj=Br_OjS9 +Qw4=Br_O4 +9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_d(Nj#_d8j_j__HN4.__S. +m_=h4_.c.Q +Sj_=q7m B7O _r94( +4SQ=7q_ 7Bm r_H4;n9 +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k(Md__N#j_dj8Hj___N.4 +_dShm=_c4._Sd +Qqj=_B7 m_7 HUr49Q +S4_=q7m B7H _r94g;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkM(#_N_jjd__8jH._N_c4_ +=Smh._4c +_cS=Qjh._4c +_4S=Q4h._4c;_. +fsRjR:jlENOReQhRHbsluRQp__OH9r. +=SmQ_upOr_H.S9 +QQj=uOp_r;.9 +fsRjR:jlENOReQhRHbsluRQpj_7_Hj_r +.9Shm=_ +6cS=Qjhc_6_ +j;sjRf:ljRNROEQRheblsHRpQu_HO_r +49SQm=uOp__4Hr9Q +Sju=Qpr_O4 +9;sjRf:ljRNROEQRheblsHRpQu__7jjr_H4S9 +m_=h6Sd +Qhj=__6djs; +R:fjjNRlOQERhbeRsRHlQ_upOr_HjS9 +mu=Qp__OH9rj +jSQ=pQu_jOr9s; R:fjjNRlOQERhbeRsRHlQ_up7jj__jHr9m -S=6h_4Q -Sj_=h6j4_;R +S=6h_.Q +Sj_=h6j._;R sfjj:ROlNEhRQesRbHhlR_Hd_ =Smh__dHQ Sj_=hds; R:fjjNRlOQERhbeRsRHl7j1_j7j_v4q__SH -m_=hcSg -Qhj=__cgjs; +m_=h6Sj +Qhj=__6jjs; +R:fjjNRlOQERhbeRsRHlh__cHm +S=ch__SH +Qhj=_ +c;sjRf:ljRNROEQRheblsHRq71B_i4Q_ha4 +_HShm=_ +cgS=Qjhg_c_ +j;sjRf:ljRNROEQRheblsHR6h__SH +m_=h6 +_HS=Qjh;_6 +fsRjR:jlENOReQhRHbsl1Rq_jjj_aQh_H4_ +=SmhU_c +jSQ=ch_U;_j +fsRjR:jlENOReQhRHbsl_Rh( +_HShm=_H(_ +jSQ=(h_;R +sfjj:ROlNEhRQesRbHqlR1d_jjj_jjY_1h4B__SH +m_=hcS( +Qhj=__c(js; R:fjjNRlOQERhbeRsRHlh__UHm S=Uh__SH Qhj=_ -U;sjRf:ljRNROEQRheblsHR_q1j_jj7_vq4 -_HShm=_ -c6S=Qjh6_c_ -j;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jj__j4r9m -S=_1vqtvQq#_M#__Hjr_4jS9 -Qhj=_cdd_SH -Qh4=_6dd_ -H;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jj__j.r9m -S=_1vqtvQq#_M#__Hjr_.jS9 -Qhj=_d.d_SH -Qh4=_c.c_ -H;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jj__jdr9m -S=_1vqtvQq#_M#__Hjr_djS9 -Qhj=_n.c_SH -Qh4=_g.._ -H;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jj__jcr9m -S=_1vqtvQq#_M#__Hjr_cjS9 -Q1j=vv_qQ_tqM_##H__j49rj -4SQ=_1vqtvQq#_M#__Hjr_.j -9;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jj__j6r9m -S=_1vqtvQq#_M#__Hjr_6jS9 -Q1j=vv_qQ_tqM_##H__jd9rj -4SQ=dh_6H6_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_jH__jjr9m -S=_1vqtvQq#_M#__Hj9rj -jSQ=_1vqtvQq#_M#__Hjr_cjS9 -Q14=vv_qQ_tqM_##H__j69rj;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 34kMjl_#_HNlo4N_ -=Smb_F#O\D 34kMjl_#_HNloHN__S4 -Q1j=Q_Z O9rj -4SQ=Oq__jHr9s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k4#j_ll_NH -oNSbm=FO#_D3 \kjM4__#lNolHN -_HS=Qjb_F#O\D 34kMjl_#_HNloHN__S4 -Q14=Q_Z Or_H4 -9;sjRf:ljRNROEq.h7RHbslMRk4Oj_H_HMjd_N_S4 -mM=k4Oj_H_HM4Q -Sj]=qQ_t]Hcr.9Q -S4]=qQ_t]H6r.9s; -R:fjjNRlOqERhR7.blsHR4kMjH_OHjM___Nd.m -S=4kMjH_OH.M_ -jSQ=Qq]tH]_r9.n -4SQ=Qq]tH]_r9.(;R -sfjj:ROlNEhRQesRbHhlR_6.d_SH -m_=h._d6HQ -Sj_=h.;d6 -fsRjR:jlENOReQhRHbsl_Rh._dnHm -S=.h_dHn_ -jSQ=.h_d -n;sjRf:ljRNROEQRheblsHR_1vqtvQqs_##_0#j__jH9rd -=Sm1qv_vqQt_#M#r -c9S=Qj1qv_vqQt_#M#_cjr9s; -R:fjjNRlOQERhbeRsRHlhd_.c -_HShm=_c.d_SH -Qhj=_c.d;R -sfjj:ROlNEhRQesRbH1lRvv_qQ_tq#0s##__jjr_H.S9 -mv=1_QqvtMq_#6#r9Q -Sjv=1_QqvtMq_#j#_r;69 -fsRjR:jlENOReQhRHbsl_Rh._d4Hm -S=.h_dH4_ -jSQ=.h_d -4;sjRf:ljRNROEQRheblsHR.h_dH._ -=Smhd_.. -_HS=Qjhd_..s; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_##s0j#__Hj_r -49S1m=vv_qQ_tqMr##nS9 -Q1j=vv_qQ_tqM_##j9rn;R -sfjj:ROlNEhRQesRbHhlR_j.d_SH -m_=h._djHQ -Sj_=h.;dj -fsRjR:jlENOReQhRHbslvR1_Qqvt#q_s##0_jj__jHr9m -S=_1vqtvQq#_M#9r( -jSQ=_1vqtvQq#_M#r_j( -9;sjRf:ljRNROEQRheblsHR.h_.Hn_ -=Smh._.n -_HS=Qjh._.ns; -R:fjjNRlOQERhbeRsRHlhd_d4 -_HShm=_4dd_SH -Qhj=_4dd;R -sfjj:ROlNEhRQesRbHhlR__.(Hm -S=.h_( -_HS=Qjh(_.;R -sfjj:ROlNEhRQesRbHQlRujp_d4j__jHr9m -S=dh_jQ -Sj_=hdjj_;R -sfjj:ROlNEhRQesRbHQlRuOp__jHr9m -S=pQu_HO_r -j9S=QjQ_upO9rj;R -sfjj:ROlNEhRQesRbH7lR1iqB4h_Qa__4#kJlGHN__Fj_.__jHm -S=4h_cS. -Qhj=_.4c_ -j;sjRf:ljRNROEQRheblsHRdh_4H4_ -=Smh4_d4 -_HS=Qjh4_d4s; -R:fjjNRlOQERhbeRsRHlhU_U_jH___F.Hm -S=dh_4Sg -Qhj=_gd4_ -H;sjRf:ljRNROEQRheblsHR_q1j_jj7_vq4J_#lNkG_jH__SH -m_=h. -(.S=Qjh(_..;_j -fsRjR:jlENOReQhRHbsl_Rh._gjHm -S=.h_gHj_ -jSQ=.h_g -j;sjRf:ljRNROEQRheblsHR_71j_jj7_vq.J_#lNkG_jH__SH -m_=h. -(dS=Qjh(_.d;_j -fsRjR:jlENOReQhRHbsl_Rhd_cnHm -S=dh_cHn_ -jSQ=dh_c -n;sjRf:ljRNROEQRheblsHR#bF_ OD\137_jjj_q7v_Vc_j__jj +U;sjRf:ljRNROEQRheblsHR_q1j_jj7_vq4J_#lNkG_jH__SH +m_=hd +j6S=Qjhj_d6;_j +fsRjR:jlENOReQhRHbsl_Rh._4.Hm +S=.h_4H._ +jSQ=.h_4 +.;sjRf:ljRNROEQRheblsHR_71j_jj7_vq.J_#lNkG_jH__SH +m_=hd +j(S=Qjhj_d(;_j +fsRjR:jlENOReQhRHbsl_Rh._44Hm +S=.h_4H4_ +jSQ=.h_4 +4;sjRf:ljRNROEQRheblsHR#bF_ OD\137_jjj_q7v_Vc_j__jj _HSbm=FO#_D3 \7j1_j7j_vcq_ jSQ=#bF_ OD\137_jjj_q7v_jc_;R -sfjj:ROlNEhRQesRbHhlR_U.n_SH -m_=h._nUHQ -Sj_=h.;nU -fsRjR:jlENOReQhRHbsl_Rh._ngHm -S=.h_nHg_ -jSQ=.h_n -g;sjRf:ljRNROEQRheblsHR_1vqtvQqs_##_0#j__jjr_HcS9 -mv=1_QqvtMq_#d#r9Q -Sjv=1_QqvtMq_#j#_r;d9 -fsRjR:jlENOReQhRHbsl_Rhd_c4Hm -S=dh_cH4_ -jSQ=dh_c -4;sjRf:ljRNROEQRheblsHR.h_dHU_ -=Smhd_.U -_HS=Qjhd_.Us; -R:fjjNRlOQERhbeRsRHlhd_.g -_HShm=_g.d_SH -Qhj=_g.d;R -sfjj:ROlNEhRQesRbH1lRvv_qQ_tq#0s##__jjr_H6S9 +sfjj:ROlNEhRQesRbHhlR_6.j_SH +m_=h._j6HQ +Sj_=h.;j6 +fsRjR:jlENOReQhRHbsl_Rh._jnHm +S=.h_jHn_ +jSQ=.h_j +n;sjRf:ljRNROEQRheblsHR_1vqtvQqs_##_0#j__jjr_H6S9 mv=1_QqvtMq_#.#r9Q Sjv=1_QqvtMq_#j#_r;.9 -fsRjR:jlENOReQhRHbsl_Rhd_n.Hm -S=dh_nH._ -jSQ=dh_n -.;sjRf:ljRNROEQRheblsHR_1vqtvQqs_##_0#j__jFH._r -.9Shm=_g4n -jSQ=4h_nHg_;R -sfjj:ROlNEhRQesRbHklRMC6__Hj___F.j -_HShm=_n4U -jSQ=4h_Ujn_;R -sfjj:ROlNEhRQesRbH1lRvv_qQ_tq#0s##__jj._F_dHr9m -S=4h_gS6 -Qhj=_64g_ -j;sjRf:ljRNROEQRheblsHRkOb_0C#_H.__HH___F.H9rd -=Smhg_4nQ -Sj_=h4_gnjs; -R:fjjNRlOQERhbeRsRHlhn_.d -_HShm=_d.n_SH -Qhj=_d.n;R -sfjj:ROlNEhRQesRbHhlR_..n_SH -m_=h._n.HQ -Sj_=h.;n. -fsRjR:jlENOReQhRHbslpRBid_jj__].__Hj._F_SH -m_=hd -.dS=Qjh._dd;_j -fsRjR:jlENOReQhRHbslFRb#D_O B\3Y Bp_q7v_46__FH_.__jFHd_ -=Smhj_44Q -Sj_=h4_j4Hs; -R:fjjNRlOQERhbeRsRHlhn_dn -_HShm=_ndn_SH -Qhj=_ndn;R -sfjj:ROlNEhRQesRbHblRFO#_D3 \kdM._NLoOj _dHj_MH0__Fj_.__.FHd_ -=Smb_F#O\D 3.kMdo_LN_O j_djH_M0H -_jS=Qjb_F#O\D 3.kMdo_LN_O j_djH_M0H__jjs; -R:fjjNRlOQERhbeRsRHlh4_dj -_HShm=_jd4_SH -Qhj=_jd4;R -sfjj:ROlNEhRQesRbHhlR_gd6_SH -m_=hd_6gHQ -Sj_=hd;6g -fsRjR:jlENOReQhRHbslvR1_QqvtMq_#H#__jj___F.H9rj -=Smhc_4cQ -Sj_=h4_ccjs; -R:fjjNRlOQERhbeRsRHlB_pim_zau_) 7 -_HSBm=pmi_zua_)7 __SH -QBj=pmi_zua_)7 _;R -sfjj:ROlNEhRQesRbHhlR_4.6_SH -m_=h._64HQ -Sj_=h.;64 -fsRjR:jlENOReQhRHbslbROk#_C0__.j__jjr_H4S9 -mb=Ok#_C0r_.4S9 -QOj=bCk_#.0__4jr9s; -R:fjjNRlOQERhbeRsRHlh6_.d -_HShm=_d.6_SH -Qhj=_d.6;R -sfjj:ROlNEhRQesRbHhlR_gdn_SH -m_=hd_ngHQ -Sj_=hd;ng -fsRjR:jlENOReQhRHbslbROk#_C0__.j__jjr_H.S9 -mb=Ok#_C0r_..S9 -QOj=bCk_#.0__.jr9s; -R:fjjNRlOQERhbeRsRHlh6_.c -_HShm=_c.6_SH -Qhj=_c.6;R -sfjj:ROlNEhRQesRbHhlR_n.6_SH -m_=h._6nHQ -Sj_=h.;6n -fsRjR:jlENOReQhRHbsl_Rh._66Hm -S=.h_6H6_ -jSQ=.h_6 -6;sjRf:ljRNROEQRheblsHR.h_nH(_ -=Smhn_.( -_HS=Qjhn_.(s; -R:fjjNRlOQERhbeRsRHlhn_.n -_HShm=_n.n_SH -Qhj=_n.n;R -sfjj:ROlNEhRQesRbH)lR a1 _amz_j.__Hj_ -=Smh(_6 -jSQ=6h_(;_j -fsRjR:jlENOReQhRHbslMRk6__Cj__HFH._ -=Smh6_44Q -Sj_=h4_64js; -R:fjjNRlOQERhbeRsRHlO_bkC_#0.__jj__jFH._r -.9Shm=_4d. -jSQ=dh_.H4_;R -sfjj:ROlNEhRQesRbHelRvQq_hHa_ -=Sme_vqQ_haHQ -Sjv=eqh_Qas; -R:fjjNRlOQERhbeRsRHlhn_d4 -_HShm=_4dn_SH -Qhj=_4dn;R -sfjj:ROlNEhRQesRbHhlR_d.U_SH -m_=h._UdHQ -Sj_=h.;Ud +fsRjR:jlENOReQhRHbsl_Rh._jjHm +S=.h_jHj_ +jSQ=.h_j +j;sjRf:ljRNROEQRheblsHR_1vqtvQqs_##_0#j__jjr_H.S9 +mv=1_QqvtMq_#6#r9Q +Sjv=1_QqvtMq_#j#_r;69 +fsRjR:jlENOReQhRHbsl_Rh4_g(Hm +S=4h_gH(_ +jSQ=4h_g +(;sjRf:ljRNROEQRheblsHR.h_g +_HShm=__.gHQ +Sj_=h. +g;sjRf:ljRNROEQRheblsHRpQu_jjd_H4_r +.9Shm=_ +ddS=Qjhd_d_ +j;sjRf:ljRNROEQRheblsHR.h_( +_HShm=__.(HQ +Sj_=h. +(;sjRf:ljRNROEQRheblsHRpQu_jjd_H4_r +j9Shm=_ +d4S=Qjh4_d_ +j;sjRf:ljRNROEQRheblsHRiBp_jjd_.]__jH___F.Hm +S=4h_(Sc +Qhj=_c4(_ +j;sjRf:ljRNROEQRheblsHR#bF_ OD\Y3BB_p 7_vq6__4H__jFHd_ +=Smhn_4gQ +Sj_=h4_ngHs; +R:fjjNRlOQERhbeRsRHlhn_.j +_HShm=_j.n_SH +Qhj=_j.n;R +sfjj:ROlNEhRQesRbHblRFO#_D3 \k_MdNj#_d8j_j__jFHd_ +=Smb_F#O\D 3dkM__N#j_dj8Sj +Qbj=FO#_D3 \k_MdNj#_d8j_j;_H +fsRjR:jlENOReQhRHbslFRb#D_O k\3M_.4LOoN d_jjM_H0__Hj._F_F._d +_HSbm=FO#_D3 \k4M._NLoOj _dHj_MH0__Sj +Qbj=FO#_D3 \k4M._NLoOj _dHj_MH0__jj_;R +sfjj:ROlNEhRQesRbHBlRpmi_zua_)7 __SH +mp=Biz_ma)_u __7HQ +Sjp=Biz_ma)_u ;_7 +fsRjR:jlENOReQhRHbsl1R7q4Bi_aQh_#4_JGlkN__4H__jF4.__SH +m_=h4 +cdS=Qjhc_4d;_j +fsRjR:jlENOReQhRHbsl_Rhd_gnHm +S=dh_gHn_ +jSQ=dh_g +n;sjRf:ljRNROEQRheblsHRdh_4H.__Fj_. +_HShm=_(4d +jSQ=4h_dH(_;R +sfjj:ROlNEhRQesRbHhlR_n.d_SH +m_=h._dnHQ +Sj_=h.;dn +fsRjR:jlENOReQhRHbsl_Rh._d(Hm +S=.h_dH(_ +jSQ=.h_d +(;sjRf:ljRNROEQRheblsHRq71B_i4Q_ha4J_#lNkG_H4__Hj_ +=SmhU_.jQ +Sj_=h._Ujjs; +R:fjjNRlOQERhbeRsRHlqj1_jQj_h4a__l#Jk_GNH__jHm +S=.h_US4 +Qhj=_4.U_ +j;sjRf:ljRNROEQRheblsHR.h_.Hg_ +=Smh._.g +_HS=Qjh._.gs; +R:fjjNRlOQERhbeRsRHlb_F#O\D 3dkM(#_N_jjd__8jH__HHm +S=nh_nQ +Sj_=hnjn_;R +sfjj:ROlNEhRQesRbHqlRvqQt_1Az_a7qqQ_7)__jj__jHm +S=QqvtAq_z71_q_aq7_Q)OQ +Sjv=qQ_tqA_z17qqa_)7Q_jO_;R +sfjj:ROlNEhRQesRbHhlR_g.j_SH +m_=h._jgHQ +Sj_=h.;jg fsRjR:jlENOReQhRHbslFRb#D_O 1\3Q_Z 7_vqn__jj__jH9rj =Smb_F#O\D 3Z1Q v_7qr_njS9 Qbj=FO#_D3 \1 QZ_q7v_jn_r;j9 -fsRjR:jlENOReQhRHbsl_Rhd_c6Hm -S=dh_cH6_ -jSQ=dh_c -6;sjRf:ljRNROEQRheblsHR#bF_ OD\Q31Z7 _vnq__jj__Hj_r +fsRjR:jlENOReQhRHbsl_Rh._4jHm +S=.h_4Hj_ +jSQ=.h_4 +j;sjRf:ljRNROEQRheblsHR#bF_ OD\Q31Z7 _vnq__jj__Hj_r 49Sbm=FO#_D3 \1 QZ_q7v_4nr9Q SjF=b#D_O 1\3Q_Z 7_vqnr_j4 -9;sjRf:ljRNROEQRheblsHR1z7_jjj_HO_ -=Smz_71j_jjO -_HS=Qjz_71j_jjOs; -R:fjjNRlOQERhbeRsRHlp_71j_jjO -_HSpm=7j1_jOj__SH -Qpj=7j1_jOj_;R -sfjj:ROlNEhRQesRbHblRFO#_D3 \1 QZ_q7v_jn__jj___F.H9rj -=Smh(_44Q -Sj_=h4_(4Hs; -R:fjjNRlOQERhbeRsRHlh4_._SH -m_=h.H4_ -jSQ=.h_4s; -R:fjjNRlOQERhbeRsRHle_vqQ_ha4 +9;sjRf:ljRNROEQRheblsHR.h_nHU_ +=Smhn_.U +_HS=Qjhn_.Us; +R:fjjNRlOQERhbeRsRHlb_F#O\D 3nkM_NLoOj _jjj__Hj_ +=Smb_F#O\D 3nkM_NLoOj _jSj +Qbj=FO#_D3 \k_MnLOoN j_jj;_j +fsRjR:jlENOReQhRHbslMRk4v_1_Qqvtjq__l#Jk_GN4__j4 +_HSkm=M14_vv_qQ_tqjJ_#lNkG_S4 +Qkj=M14_vv_qQ_tqjJ_#lNkG_j4_;R +sfjj:ROlNEhRQesRbH)lRW__OHm +S=_)WO +_HS=Qj)OW_;R +sfjj:ROlNEhRQesRbHblRFO#_D3 \)jW_jQj_h6a__jj__SH +mF=b#D_O )\3Wj_jjh_Qa +_6S=Qjb_F#O\D 3_)Wj_jjQ_ha6;_j +fsRjR:jlENOReQhRHbsl7Rz1j_jj__OHm +S=1z7_jjj_HO_ +jSQ=1z7_jjj_ +O;sjRf:ljRNROEQRheblsHR1p7_jjj_HO_ +=Smp_71j_jjO +_HS=Qjp_71j_jjOs; +R:fjjNRlOQERhbeRsRHlb_F#O\D 3Z1Q v_7q__nj__jj._F_jHr9m +S=4h_nSc +Qhj=_c4n_ +H;sjRf:ljRNROEQRheblsHR4h_4Hd_ +=Smh4_4d +_HS=Qjh4_4ds; +R:fjjNRlOQERhbeRsRHlhg_46 +_HShm=_64g_SH +Qhj=_64g;R +sfjj:ROlNEhRQesRbHhlR__.cHm +S=.h_c +_HS=Qjhc_.;R +sfjj:ROlNEhRQesRbHqlRvqQt_1Az_q hA_p 7_vqp_mW4 +_HShm=_ +dnS=Qjhn_d_ +j;sjRf:ljRNROEQRheblsHR.h_. +_HShm=__..HQ +Sj_=h. +.;sjRf:ljRNROEQRheblsHR_qj7_vq4 _HShm=_ dUS=QjhU_d_ -j;sjRf:ljRNROEQRheblsHRq7aBOi__SH -ma=7q_BiO -_HS=Qj7Baqi;_O -fsRjR:jlENOReQhRHbslaR7q_Bi7jj__SH -m_=h6S6 -Qhj=__66js; -R:fjjNRlOQERhbeRsRHlhc_.g -_HShm=_g.c_SH -Qhj=_g.c;R -sfjj:ROlNEhRQesRbHhlR_U.c_SH -m_=h._cUHQ -Sj_=h.;cU -fsRjR:jlENOReQhRHbslFRb#D_O k\3MOg_Dj _jbj_C__jj -_HSbm=FO#_D3 \k_MgO_D j_jjbSC -Qbj=FO#_D3 \k_MgO_D j_jjbjC_;R -sfjj:ROlNEhRQesRbHhlR_j.6_SH -m_=h._6jHQ -Sj_=h.;6j -fsRjR:jlENOReQhRHbsl_Rh4HU_ -=SmhU_4_SH -Qhj=_;4U -fsRjR:jlENOReQhRHbslWR)_jjj_aQh_H4_ -=Smh4_c -jSQ=ch_4;_j -fsRjR:jlENOReQhRHbsl_Rh.H._ -=Smh._._SH -Qhj=_;.. -fsRjR:jlENOReQhRHbsljRq_q7v_H4_ -=Smh(_d -jSQ=dh_(;_j +j;sjRf:ljRNROEQRheblsHR4h_g +_HShm=__4gHQ +Sj_=h4 +g;sjRf:ljRNROEQRheblsHR_)Wj_jj7_vq. +_HShm=_ +c4S=Qjh4_c_ +j;sjRf:ljRNROEQRheblsHR4h_U +_HShm=__4UHQ +Sj_=h4 +U;sjRf:ljRNROEQRheblsHR_)Wj_jjQ_ha4 +_HShm=_ +c.S=Qjh._c_ +j;sjRf:ljRNROEQRheblsHR4h_j +_HShm=__4jHQ +Sj_=h4 +j;sjRf:ljRNROEQRheblsHRqAtBji_dQj_h4a__SH +m_=hcSc +Qhj=__ccjs; +R:fjjNRlOQERhbeRsRHlkcM4_HNloLN_k8#_N_0N8_HsH__jj +_HShm=_4d4 +jSQ=dh_4j4_;R +sfjj:ROlNEhRQesRbHklRM_4jOMHH_SH +mM=k4Oj_H_HMHQ +SjM=k4Oj_H;HM +fsRjR:jlENOReQhRHbslMRk4Od_H_HMH__jj +_HShm=_jd4 +jSQ=dh_4jj_;R +sfjj:ROlNEhRQesRbHhlR_(.j_SH +m_=h._j(HQ +Sj_=h.;j( +fsRjR:jlENOReQhRHbsl_Rh._jUHm +S=.h_jHU_ +jSQ=.h_j +U;sjRf:ljRNROEQRheblsHR_1vqtvQqs_##_0#j__jjr_H4S9 +mv=1_QqvtMq_#n#r9Q +Sjv=1_QqvtMq_#j#_r;n9 +fsRjR:jlENOReQhRHbsl_Rh.H4_ +=Smh4_._SH +Qhj=_;.4 +fsRjR:jlENOReQhRHbslvReqh_Qa__4Hm +S=dh_gQ +Sj_=hdjg_;R +sfjj:ROlNEhRQesRbHMlR _Xu1Buq __OHm +S=XM uu_1q_B O +_HS=QjMu X_q1uBO _;R +sfjj:ROlNEhRQesRbHqlR1d_jjj_7_Hj___N.H +_HShm=_d4d +jSQ=4h_djd_;R +sfjj:ROlNEhRQesRbHhlR_c.4_SH +m_=h._4cHQ +Sj_=h.;4c +fsRjR:jlENOReQhRHbsl_Rh._4dHm +S=.h_4Hd_ +jSQ=.h_4 +d;sjRf:ljRNROEQRheblsHR_1vqtvQqs_##_0#H__Hjr_HnS9 +m_=hd +jnS=Qjhj_dn;_j fsRjR:jlENOReQhRHbsl_Rh.Hn_ =Smhn_._SH Qhj=_;.n fsRjR:jlENOReQhRHbsltRA_jjj_H4_ -=Smhd_d -jSQ=dh_d;_j +=Smhc_d +jSQ=dh_c;_j fsRjR:jlENOReQhRHbsltRA_jjd_HO_ =SmAjt_dOj__SH QAj=td_jj;_O @@ -2079,276 +2047,355 @@ jSQ=#bF_ OD\M3kno_L_jjd;R sfjj:ROlNEhRQesRbHblRFO#_D3 \k_MgLjo_dHj_ =Smb_F#O\D 3gkM__Loj djS=Qjb_F#O\D 3gkM__Loj_djjs; -R:fjjNRlOQERhbeRsRHlhj_4_SH -m_=h4Hj_ -jSQ=4h_js; -R:fjjNRlOQERhbeRsRHlABtqid_jjh_Qa__4Hm -S=ch_dQ -Sj_=hcjd_;R -sfjj:ROlNEhRQesRbHelRuOq__SH -mu=eq__OHQ -Sju=eq;_O -fsRjR:jlENOReQhRHbsluReq__7j -_HShm=_ -6cS=Qjhc_6_ -j;sjRf:ljRNROEQRheblsHRdh_(Hj_ -=Smh(_dj -_HS=Qjh(_djs; -R:fjjNRlOQERhbeRsRHlb_F#O\D 3nkM_NLoOj _jjj__SH -mF=b#D_O k\3MLn_o NO_jjj -jSQ=#bF_ OD\M3kno_LN_O j_jjjs; -R:fjjNRlOQERhbeRsRHl7j1_j j_hpqA __4#kJlG4N__jH__SH -m_=hnSd -Qhj=__ndjs; -R:fjjNRlOQERhbeRsRHl7B1qiQ4_h4a__l#Jk_GNH__jHm -S=.h_(SU -Qhj=_U.(_ -j;sjRf:ljRNROEQRheblsHR_q1j_jjQ_ha4J_#lNkG_jH__SH -m_=h. -(gS=Qjh(_.g;_j -fsRjR:jlENOReQhRHbsl_Rh._njHm -S=.h_nHj_ -jSQ=.h_n -j;sjRf:ljRNROEQRheblsHR#bF_ OD\M3kdN(_#d_jjj_8_HH__SH -m_=hnS( -Qhj=__n(js; -R:fjjNRlOQERhbeRsRHlb_F#O\D 3_)Wj_jjQ_ha6__jHm -S=#bF_ OD\W3)_jjj_aQh_S6 -Qbj=FO#_D3 \)jW_jQj_h6a__ -j;sjRf:ljRNROEQRheblsHR4kM__1vqtvQq__j#kJlG4N__jj__SH -mM=k4v_1_Qqvtjq__l#Jk_GN4Q -SjM=k4v_1_Qqvtjq__l#Jk_GN4;_j -fsRjR:jlENOReQhRHbslMRk4Oj_H_HMHm -S=4kMjH_OHHM_ -jSQ=4kMjH_OH -M;sjRf:ljRNROEQRheblsHR4kMdH_OHHM__Hj_ -=Smh4_ddQ -Sj_=hd_4djs; -R:fjjNRlOQERhbeRsRHlh__cHm -S=ch__SH -Qhj=_ -c;sjRf:ljRNROEQRheblsHRq71B_i4Q_ha4 -_HShm=_ -cUS=QjhU_c_ -j;sjRf:ljRNROEQRheblsHR6h__SH -m_=h6 -_HS=Qjh;_6 -fsRjR:jlENOReQhRHbsl1Rq_jjj_aQh_H4_ -=Smh(_c -jSQ=ch_(;_j -fsRjR:jlENOReQhRHbsl_Rh( -_HShm=_H(_ -jSQ=(h_;R -sfjj:ROlNEhRQesRbHqlR1d_jjj_jjY_1h4B__SH -m_=hcSn -Qhj=__cnjs; -R:fjjNRlOQERhbeRsRHlh4_.g -_HShm=_g.4_SH -Qhj=_g.4;R -sfjj:ROlNEhRQesRbHhlR_U.4_SH -m_=h._4UHQ -Sj_=h.;4U +R:fjjNRlOQERhbeRsRHlh6_._SH +m_=h.H6_ +jSQ=.h_6s; +R:fjjNRlOQERhbeRsRHlqtvQqz_A1h_ q Ap_q7v_t]Q]__4Hm +S=dh_6Q +Sj_=hdj6_;R +sfjj:ROlNEhRQesRbHhlR_n.._SH +m_=h._.nHQ +Sj_=h.;.n fsRjR:jlENOReQhRHbsl_Rh._.cHm S=.h_.Hc_ jSQ=.h_. -c;sjRf:ljRNROEQRheblsHR.h_.H._ +c;sjRf:ljRNROEQRheblsHR.h_.H6_ +=Smh._.6 +_HS=Qjh._.6s; +R:fjjNRlOQERhbeRsRHlhn_.( +_HShm=_(.n_SH +Qhj=_(.n;R +sfjj:ROlNEhRQesRbHOlRbCk_#.0__jj__Hj_r +.9SOm=bCk_#.0_r +.9S=QjO_bkC_#0.r_j. +9;sjRf:ljRNROEQRheblsHR.h_.H._ =Smh._.. _HS=Qjh._..s; R:fjjNRlOQERhbeRsRHlh._.d _HShm=_d.._SH Qhj=_d..;R -sfjj:ROlNEhRQesRbH)lR17a_pCY_.__Hj._F_Hj_ -=Smh._d.Q -Sj_=hd_..Hs; -R:fjjNRlOQERhbeRsRHlh4_d. -_HShm=_.d4_SH -Qhj=_.d4;R -sfjj:ROlNEhRQesRbH)lR17a_pCY_.__Hj._F_SH +sfjj:ROlNEhRQesRbHOlRbCk_#.0__jj__Hj_r +49SOm=bCk_#.0_r +49S=QjO_bkC_#0.r_j4 +9;sjRf:ljRNROEQRheblsHR.h_.H4_ +=Smh._.4 +_HS=Qjh._.4s; +R:fjjNRlOQERhbeRsRHlh._.j +_HShm=_j.._SH +Qhj=_j..;R +sfjj:ROlNEhRQesRbHblRFO#_D3 \k_MgO_D j_jjbjC__Hj_ +=Smb_F#O\D 3gkM_ OD_jjj_ +bCS=Qjb_F#O\D 3gkM_ OD_jjj__bCjs; +R:fjjNRlOQERhbeRsRHlh4_.n +_HShm=_n.4_SH +Qhj=_n.4;R +sfjj:ROlNEhRQesRbHhlR_6.4_SH +m_=h._46HQ +Sj_=h.;46 +fsRjR:jlENOReQhRHbsl_Rh4_ggHm +S=4h_gHg_ +jSQ=4h_g +g;sjRf:ljRNROEQRheblsHR4h_gHU_ +=Smhg_4U +_HS=Qjhg_4Us; +R:fjjNRlOQERhbeRsRHlk_M6C__Hj._F_Hj_ +=Smh(_4jQ +Sj_=h4_(jjs; +R:fjjNRlOQERhbeRsRHlh6_.6 +_HShm=_6.6_SH +Qhj=_6.6;R +sfjj:ROlNEhRQesRbHhlR_n.6_SH +m_=h._6nHQ +Sj_=h.;6n +fsRjR:jlENOReQhRHbslvR1_QqvtMq_#H#__jj__Fj_.__.H9rj +=Smhn_44Q +Sj_=h4_n4Hs; +R:fjjNRlOQERhbeRsRHle_vqQ_haHm +S=qev_aQh_SH +Qej=vQq_h +a;sjRf:ljRNROEQRheblsHRq71B_i4Q_ha4J_#lNkG_H4__Fj_. +_HShm=_446 +jSQ=4h_6j4_;R +sfjj:ROlNEhRQesRbHhlR_4.6_SH +m_=h._64HQ +Sj_=h.;64 +fsRjR:jlENOReQhRHbsl_Rh._6jHm +S=.h_6Hj_ +jSQ=.h_6 +j;sjRf:ljRNROEQRheblsHRa)1_Y7p__C.H__jFj.__SH m_=h4 -dgS=Qjhd_4g;_j -fsRjR:jlENOReQhRHbsl_Rh4_(jH__jFH.___F.Hm -S=4h_jSU -Qhj=_U4j_ -H;sjRf:ljRNROEQRheblsHR.h_6HU_ -=Smh6_.U -_HS=Qjh6_.Us; -R:fjjNRlOQERhbeRsRHlh6_.( -_HShm=_(.6_SH -Qhj=_(.6;R -sfjj:ROlNEhRQesRbHMlR _Xu1Buq __OHm -S=XM uu_1q_B O -_HS=QjMu X_q1uBO _;R -sfjj:ROlNEhRQesRbHblRFO#_D3 \k_MdNj#_d8j_j__jFj.___FdHm -S=#bF_ OD\M3kd#_N_jjd_ -8jS=Qjb_F#O\D 3dkM__N#j_dj8jj_;R -sfjj:ROlNEhRQesRbHqlR1d_jjj_7_Hj___N.H -_HShm=_(4j -jSQ=4h_jj(_;R -sfjj:ROlNEhRQesRbHhlR_644_SH -m_=h4_46HQ -Sj_=h4;46 -fsRjR:jlENOReQhRHbsl_Rhd_6nHm -S=dh_6Hn_ -jSQ=dh_6 -n;sjRf:ljRNROEQRheblsHRq71B_i4Q_ha4J_#lNkG_jH___F.Hm -S=4h_6Sn -Qhj=_n46_ -j;sjRf:ljRNROEQRheblsHR_1vqtvQqr_HcS9 +c(S=Qjhc_4(;_H +fsRjR:jlENOReQhRHbslbROk#_C0__.j__jj._F_.Hr9m +S=4h_cSn +Qhj=_n4c_ +H;sjRf:ljRNROEQRheblsHR6kM_HC__Fj_. +_HShm=_64c +jSQ=4h_cH6_;R +sfjj:ROlNEhRQesRbHhlR_(dg_SH +m_=hd_g(HQ +Sj_=hd;g( +fsRjR:jlENOReQhRHbsl1R)ap_7Y._C_jH___F.Hm +S=4h_cS. +Qhj=_.4c_ +j;sjRf:ljRNROEQRheblsHRiBp_jjj__h j._F_FH_.__HFH.___F.Hm +S=4h_dSn +Qhj=_n4d_ +H;sjRf:ljRNROEQRheblsHR.h_.H(_ +=Smh._.( +_HS=Qjh._.(s; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_#M#_jH__jj___F.4r_HjS9 +m_=h4 +(.S=Qjh(_4.;_j +fsRjR:jlENOReQhRHbsl_Rh4_g.Hm +S=4h_gH._ +jSQ=4h_g +.;sjRf:ljRNROEQRheblsHR4h_gH4_ +=Smhg_44 +_HS=Qjhg_44s; +R:fjjNRlOQERhbeRsRHlhg_4d +_HShm=_d4g_SH +Qhj=_d4g;R +sfjj:ROlNEhRQesRbHhlR_Udg_SH +m_=hd_gUHQ +Sj_=hd;gU +fsRjR:jlENOReQhRHbsl_Rh._n4Hm +S=.h_nH4_ +jSQ=.h_n +4;sjRf:ljRNROEQRheblsHR4h_gHc_ +=Smhg_4c +_HS=Qjhg_4cs; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_#M#_jH__jj__jHr9m +S=_1vqtvQq#_M#r_HjS9 +Q1j=vv_qQ_tqM_##Hr_jj +9;sjRf:ljRNROEQRheblsHR4h_UHn_ +=SmhU_4n +_HS=QjhU_4ns; +R:fjjNRlOQERhbeRsRHlhU_46 +_HShm=_64U_SH +Qhj=_64U;R +sfjj:ROlNEhRQesRbHhlR_c4U_SH +m_=h4_UcHQ +Sj_=h4;Uc +fsRjR:jlENOReQhRHbsl_Rh4_gjHm +S=4h_gHj_ +jSQ=4h_g +j;sjRf:ljRNROEQRheblsHR4h_UHU_ +=SmhU_4U +_HS=QjhU_4Us; +R:fjjNRlOQERhbeRsRHlhU_4g +_HShm=_g4U_SH +Qhj=_g4U;R +sfjj:ROlNEhRQesRbHOlRbCk_#.0__jH__Fj_.r_HdS9 +m_=h4 +(dS=Qjh(_4d;_j +fsRjR:jlENOReQhRHbsl R)1_ am_za.__jj +_HShm=_ +6US=QjhU_6_ +j;sjRf:ljRNROEQRheblsHR.h_cHd_ +=Smhc_.d +_HS=Qjhc_.ds; +R:fjjNRlOQERhbeRsRHlh6_.c +_HShm=_c.6_SH +Qhj=_c.6;R +sfjj:ROlNEhRQesRbH1lRvv_qQ_tqM_##H__jj__jFH._r +j9Shm=_c4c +jSQ=4h_cjc_;R +sfjj:ROlNEhRQesRbHhlR_g.c_SH +m_=h._cgHQ +Sj_=h.;cg +fsRjR:jlENOReQhRHbsl_Rh._c(Hm +S=.h_cH(_ +jSQ=.h_c +(;sjRf:ljRNROEQRheblsHR_1vqtvQq#_M#__Hj__jjd_F_jHr9m +S=_1vqtvQq#_M#9r( +jSQ=_1vqtvQq#_M#r_j( +9;sjRf:ljRNROEQRheblsHR_1vqtvQqr_HcS9 mv=1_QqvtHq_r c9S=Qj1qv_vqQtr;c9 -fsRjR:jlENOReQhRHbslvR1_QqvtMq_#H#__jj___F..r_HjS9 -m_=h4 -6gS=Qjh6_4g;_H -fsRjR:jlENOReQhRHbslvR1_QqvtHq_r -.9S1m=vv_qQ_tqH9r. -jSQ=_1vqtvQq9r.;R -sfjj:ROlNEhRQesRbH1lRvv_qQ_tqM_##H__jj._F_H4_r -j9Shm=_j4U -jSQ=4h_UHj_;R -sfjj:ROlNEhRQesRbHhlR_cdd_SH -m_=hd_dcHQ -Sj_=hd;dc -fsRjR:jlENOReQhRHbsl_Rhd_d6Hm -S=dh_dH6_ -jSQ=dh_d -6;sjRf:ljRNROEQRheblsHR.h_cHc_ -=Smhc_.c -_HS=Qjhc_.cs; -R:fjjNRlOQERhbeRsRHlhd_.d -_HShm=_d.d_SH -Qhj=_d.d;R -sfjj:ROlNEhRQesRbHhlR_6d6_SH -m_=hd_66HQ -Sj_=hd;66 -fsRjR:jlENOReQhRHbsl_Rh._.gHm -S=.h_.Hg_ -jSQ=.h_. -g;sjRf:ljRNROEQRheblsHR.h_cHn_ -=Smhc_.n -_HS=Qjhc_.ns; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_#M#_jH__Hj_r -j9S1m=vv_qQ_tqM_##H9rj -jSQ=_1vqtvQq#_M#__Hj9rj;R -sfjj:ROlNEhRQesRbHhlR_j.._SH -m_=h._.jHQ -Sj_=h.;.j -fsRjR:jlENOReQhRHbslQR1ZO __4Hr9m -S=Z1Q __OH9r4 -jSQ=Z1Q r_O4 -9;sjRf:ljRNROEQRheblsHRdh_dH._ -=Smhd_d. -_HS=Qjhd_d.s; -R:fjjNRlOQERhbeRsRHlhc_.j -_HShm=_j.c_SH -Qhj=_j.c;R -sfjj:ROlNEhRQesRbH1lRvv_qQ_tq#0s##__HHr_HnS9 -m_=hd -46S=Qjh4_d6;_j -fsRjR:jlENOReQhRHbslMRk4Nc_lNHo_#Lk_08NNH_8s__Hj__jHm -S=.h_US4 -Qhj=_4.U_ -j;sjRf:ljRNROEQRheblsHR.h_(Hj_ -=Smh(_.j -_HS=Qjh(_.js; -R:fjjNRlOQERhbeRsRHlhU_.. -_HShm=_..U_SH -Qhj=_..U;R -sfjj:ROlNEhRQesRbHqlRvqQt_1Az_a7qqQ_7)__jj__jHm -S=QqvtAq_z71_q_aq7_Q)OQ -Sjv=qQ_tqA_z17qqa_)7Q_jO_;R -sfjj:ROlNEhRQesRbH)lRW__OHm -S=_)WO -_HS=Qj)OW_;R -sfjj:ROlNEhRQesRbHklRM14_vv_qQ_tq4__HNd.___F.j -_HShm=_j4c -jSQ=4h_cjj_;R -sfjj:ROlNEhRQesRbHhlR_dd6_SH -m_=hd_6dHQ -Sj_=hd;6d -fsRjR:jlENOReQhRHbslMRk4v_1_Qqvt4q__NH_.__dFH._ -=Smhc_4dQ -Sj_=h4_cdjs; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_4Hr9m -S=_1vqtvQqr_H4S9 -Q1j=vv_qQrtq4 -9;sjRf:ljRNROEQRheblsHR_1vqtvQq#_M#__Hj__jFj.__jHr9m -S=dh_.Sj -Qhj=_jd._ -H;sjRf:ljRNROEQRheblsHRdh_6H(_ -=Smh6_d( -_HS=Qjh6_d(s; -R:fjjNRlOQERhbeRsRHlhd_._SH -m_=h.Hd_ -jSQ=.h_ds; -R:fjjNRlOQERhbeRsRHlz_71j_jjQ_ha4 +fsRjR:jlENOReQhRHbsl_Rh._6.Hm +S=.h_6H._ +jSQ=.h_6 +.;sjRf:ljRNROEQRheblsHR_71j_jj Ahqp4 __l#Jk_GNH__jFH._ +=Smh6_4dQ +Sj_=h4_6djs; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_nHr9m +S=_1vqtvQqr_HnS9 +Q1j=vv_qQrtqn +9;sjRf:ljRNROEQRheblsHR_1vqtvQqr_H.S9 +mv=1_QqvtHq_r +.9S=Qj1qv_vqQtr;.9 +fsRjR:jlENOReQhRHbslvR1_QqvtMq_#H#__jj__Fj_.__jH9rj +=Smh(_ddQ +Sj_=hd_(dHs; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_##s0j#__jj___F.H9rd +=Smh(_44Q +Sj_=h4_(4js; +R:fjjNRlOQERhbeRsRHlh6_.d +_HShm=_d.6_SH +Qhj=_d.6;R +sfjj:ROlNEhRQesRbH7lRaiqB__7jj _HShm=_ -dnS=Qjhn_d_ -j;sjRf:ljRNROEQRheblsHR4h_g -_HShm=__4gHQ -Sj_=h4 -g;sjRf:ljRNROEQRheblsHR_)Wj_jj7_vq. -_HShm=_ -cjS=Qjhj_c_ -j;sjRf:ljRNROEQRheblsHR4h_( -_HShm=__4(HQ -Sj_=h4 -(;sjRf:ljRNROEQRheblsHR1p7_jjj_aQh_H4_ -=Smh._c -jSQ=ch_.;_j -fsRjR:jlENOReQhRHbsluRQp__OH9r4 -=SmQ_upOr_H4S9 -QQj=uOp_r;49 -fsRjR:jlENOReQhRHbsluRQpj_7_Hj_r -49Shm=_ -6.S=Qjh._6_ -j;sjRf:ljRNROEQRheblsHRpQu_HO_r -.9SQm=uOp__.Hr9Q -Sju=Qpr_O. -9;sjRf:ljRNROEQRheblsHRpQu__7jjr_H.S9 -m_=h6Sd -Qhj=__6djs; -R:fjjNRlOQERhbeRsRHlhU_._SH -m_=h.HU_ -jSQ=.h_Us; -R:fjjNRlOQERhbeRsRHlQ_upj_dj4r_H4S9 -m_=hdS4 -Qhj=__d4js; -R:fjjNRlOQERhbeRsRHlhg_._SH -m_=h.Hg_ -jSQ=.h_gs; -R:fjjNRlOQERhbeRsRHlQ_upj_dj4r_H.S9 -m_=hdS. -Qhj=__d.js; -R:fjjNRlOQERhbeRsRHlq__OH9rj -=Smq__OH9rj -jSQ=Oq_r;j9 -fsRjR:jlENOReQhRHbsl_Rh.H6_ -=Smh6_._SH -Qhj=_;.6 -fsRjR:jlENOReQhRHbslvRqQ_tqA_z1 Ahqp7 _v]q_Q_t]4 -_HShm=_ -dcS=Qjhc_d_ -j;sjRf:ljRNROEQRheblsHR.h_c -_HShm=__.cHQ +6nS=Qjhn_6_ +j;sjRf:ljRNROEQRheblsHR.h_U +_HShm=__.UHQ Sj_=h. -c;sjRf:ljRNROEQRheblsHRQqvtAq_z 1_hpqA v_7qm_pW__4Hm -S=dh_6Q -Sj_=hdj6_;R -sfjj:ROlNEhRQesRbH)lRWj_jjv_7q3_jsm -S=_)Wj_jj7_vqjM3kdQ -Sj_=hd;nd -fsRjR:jlENOR7qh.sRbH)lRWj_jjv_7q3_jlm -S=_)Wj_jj7_vqjM3k4Q -SjW=)_jjj_q7v -4SQ=dh_n -d;sjRf:ljRNROEq.h7RHbslWR)_jjj_q7v_Mj3 -=Sm)jW_j7j_vjq_3jkM -jSQ=.h_US4 -Q)4=Wj_jjv_7q3_jk;Md -fsRjR:jlENOR.m)RHbslWR)_jjj_q7v_bj3 -=Smhg_4 -jSQ=_)Wj_jj7_vqjM3k4Q -S4W=)_jjj_q7v_kj3M +U;sjRf:ljRNROEQRheblsHRpQu_jjd_H4_r +49Shm=_ +d.S=Qjh._d_ +j;sjRf:ljRNROEQRheblsHROq__jHr9m +S=Oq__jHr9Q +Sj_=qO9rj;R +sfjj:ROlNEhRQesRbH1lRQ_Z Or_H4S9 +mQ=1ZO __4Hr9Q +SjQ=1ZO _r;49 +fsRjR:jlENOReQhRHbsl_Rh._j4Hm +S=.h_jH4_ +jSQ=.h_j +4;sjRf:ljRNROEQRheblsHR.h_jH._ +=Smhj_.. +_HS=Qjhj_..s; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_##s0j#__jj__dHr9m +S=_1vqtvQq#_M#9rc +jSQ=_1vqtvQq#_M#r_jc +9;sjRf:ljRNROEQRheblsHR.h_jHc_ +=Smhj_.c +_HS=Qjhj_.cs; +R:fjjNRlOQERhbeRsRHlhj_.d +_HShm=_d.j_SH +Qhj=_d.j;R +sfjj:ROlNEhRQesRbH1lRvv_qQ_tq#0s##__jj__jH9rc +=Sm1qv_vqQt_#M#r +d9S=Qj1qv_vqQt_#M#_djr9s; +R:fjjNRlOQERhbeRsRHlk_M41qv_vqQt_#j_JGlkN__.Hm +S=4kM__1vqtvQq__j#kJlG.N__SH +Qkj=M14_vv_qQ_tqjJ_#lNkG_ +.;sjRf:ljRNROEQRheblsHR_71j_jj Ahqp4 __l#Jk_GNH__jHm +S=.h_(Sg +Qhj=_g.(_ +j;sjRf:ljRNROEQRheblsHR.h_dH6_ +=Smhd_.6 +_HS=Qjhd_.6s; +R:fjjNRlOQERhbeRsRHlhd_.c +_HShm=_c.d_SH +Qhj=_c.d;R +sfjj:ROlNEhRQesRbHhlR__.dHm +S=.h_d +_HS=Qjhd_.;R +sfjj:ROlNEhRQesRbHzlR7j1_jQj_h4a__SH +m_=hdS( +Qhj=__d(js; +R:fjjNRlOQERhbeRsRHlh(_4_SH +m_=h4H(_ +jSQ=4h_(s; +R:fjjNRlOQERhbeRsRHlp_71j_jjQ_ha4 +_HShm=_ +cdS=Qjhd_c_ +j;sjRf:ljRNROEQRheblsHRqeu_HO_ +=Sme_uqO +_HS=Qje_uqOs; +R:fjjNRlOQERhbeRsRHle_uq7__jHm +S=6h_6Q +Sj_=h6j6_;R +sfjj:ROlNEhRQesRbH7lRaiqB_HO_ +=Sm7Baqi__OHQ +Sja=7q_BiOs; +R:fjjNRlOQERhbeRsRHlqj1_jQj_hHa_ +=Smqj1_jQj_hHa_ +jSQ=_q1j_jjQ;ha +fsRjR:jlENOR7qh.sRbHklRMNc_#j_jjm +S=ckM__N#j +jjS=Qjqj1_jQj_hHa_ +4SQ=_q1j_djHs; +R:fjjNRlOQERhbeRsRHlp_71j_jjQ_haHm +S=1p7_jjj_aQh_SH +Qpj=7j1_jQj_h +a;sjRf:ljRNROEq.h7RHbslMRkc8_D#j_jjm +S=ckM_#D8_jjj +jSQ=_71j_jj AhqpS +Qp4=7j1_jQj_hHa_;R +sfjj:ROlNEhRQesRbHzlR7j1_jQj_hHa_ +=Smz_71j_jjQ_haHQ +Sj7=z1j_jjh_Qas; +R:fjjNRlOqERhR7.blsHRckM_#k8_jjj +=Smk_Mck_8#j +jjS=Qj7j1_j j_hpqA Q +S47=z1j_jjh_Qa;_H +fsRjR:jlENOReQhRHbslMRk4l_NH_oNL_k#CLMNDDC_FHI_ +=Smk_M4NolHNk_L#M_CNCLD_IDF_SH +Qkj=MN4_lNHo_#Lk_NCML_DCD;FI +fsRjR:jlENOReQhRHbslMRk.V4_bOk_# +_HSkm=M_.4V_bkOH#_ +jSQ=.kM4b_Vk#_O;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__jj___Ndj9rd +=Smhj_..Q +Sj_=h. +6cS=Q41qv_vqQtr;c9 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__jj__jNddr9m +S=.h_jS4 +Qhj=_44( +4SQ=dh_g +U;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jj__Nj_dr_jjS9 +m_=h4 +g.S=Qjhc_4cQ +S4_=hd;(d +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqM_##H__jj__jNjdr9m +S=4h_gS4 +Qhj=_.4( +4SQ=_1vqtvQq9r6;R +sfjj:ROlNEhRQesRbHQlRujp_djj__34_sm +S=pQu_jjd_4j__M3kdQ +SjF=b#D_O H\3b +D;sjRf:ljRNROEq.h7RHbsluRQpd_jj__j4l_3 +=SmQ_upj_djj__434kM +jSQ=pQu_4Or9Q +S4F=b#D_O H\3b +D;sjRf:ljRNROEq.h7RHbsluRQpd_jj__j4M_3 +=SmQ_upj_djj__43jkM +jSQ=pQu_jjd_4Or9Q +S4u=Qpd_jj__j4k_3M +d;sjRf:ljRNROEmR).blsHRpQu_jjd_4j__ +3bShm=_ +.US=QjQ_upj_djj__434kM +4SQ=pQu_jjd_4j__M3kjs; +R:fjjNRlOqERhR7.blsHRpQu_jjd_44r9m +S=dh_. +_jS=QjhU_._SH +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHl7Baqij_7_Sj +m_=h6jn_ +jSQ=q7aBOi__SH +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHle_uq7 +_jShm=__66jQ +Sj1=)a +_OS=Q4e_uqO;_H +fsRjR:jlENOR7qh.sRbHplR7j1_jQj_h4a_ +=Smhd_c_Sj +Qhj=__4(HQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbHzlR7j1_jQj_h4a_ +=Smh(_d_Sj +Qhj=__.dHQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbH7lR1j_jjh_ q Ap_S4 +m_=h6Sg +Qhj=_Sn +Q)4=1Oa_;R +sfjj:ROlNEhRQesRbHzlR7j1_jQj_hja_3Ss +m7=z1j_jjh_Qa3_jk +MdS=Qj1qv_vqQtr;n9 +fsRjR:jlENOR7qh.sRbHzlR7j1_jQj_hja_3Sl +m7=z1j_jjh_Qa3_jk +M4S=Qjqr_OjS9 +Q14=vv_qQrtqn +9;sjRf:ljRNROEq.h7RHbsl7Rz1j_jjh_Qa3_jMm +S=1z7_jjj_aQh_kj3MSj +Qzj=7j1_jQj_hSa +Qz4=7j1_jQj_hja_3dkM;R +sfjj:ROlNE)Rm.sRbHzlR7j1_jQj_hja_3Sb +m_=h.Sd +Qzj=7j1_jQj_hja_34kM +4SQ=1z7_jjj_aQh_kj3M j;sjRf:ljRNROEQRheblsHR1p7_jjj_aQh_sj3 =Smp_71j_jjQ_hajM3kdQ Sjv=1_Qqvtnqr9s; @@ -2364,701 +2411,365 @@ sfjj:ROlNE)Rm.sRbHplR7j1_jQj_hja_3Sb m_=h4S( Qpj=7j1_jQj_hja_34kM 4SQ=1p7_jjj_aQh_kj3M -j;sjRf:ljRNROEQRheblsHR1p7_jjj_aQh_SH -m7=p1j_jjh_Qa -_HS=Qjp_71j_jjQ;ha -fsRjR:jlENOR7qh.sRbHklRMDc_8j#_jSj -mM=kc8_D#j_jjQ +j;sjRf:ljRNROEQRheblsHR_71j_jj Ahqpj _3Ss +m1=7_jjj_q hA_p jM3kdQ +Sj_=h.;(g +fsRjR:jlENOR7qh.sRbH7lR1j_jjh_ q Ap_lj3 +=Sm7j1_j j_hpqA 3_jk +M4S=Qjk_M41qv_vqQt_#j_JGlkN +_.S=Q4h(_.gs; +R:fjjNRlOqERhR7.blsHR_71j_jj Ahqpj _3SM +m1=7_jjj_q hA_p jM3kjQ Sj1=7_jjj_q hA -p S=Q4p_71j_jjQ_haHs; -R:fjjNRlOQERhbeRsRHlz_71j_jjQ_haHm -S=1z7_jjj_aQh_SH -Qzj=7j1_jQj_h -a;sjRf:ljRNROEq.h7RHbslMRkc8_k#j_jjm -S=ckM_#k8_jjj -jSQ=_71j_jj AhqpS -Qz4=7j1_jQj_hHa_;R -sfjj:ROlNEhRQesRbHAlRtiqB_jjd_aQh_SH -mt=Aq_Bij_djQ_haHQ -Sjt=Aq_Bij_djQ;ha -fsRjR:jlENOReQhRHbslvRqQ_tqA_z1 Ahqp7 _vpq_mHW_ -=SmqtvQqz_A1h_ q Ap_q7v_Wpm_SH -Qqj=vqQt_1Az_q hA_p 7_vqp;mW -fsRjR:jlENOR7qh.sRbHklRMN4_lNHo_#Lk_NCML_DCD -FISkm=MN4_lNHo_#Lk_NCML_DCD -FIS=QjqtvQqz_A1h_ q Ap_q7v_Wpm_SH -QA4=tiqB_jjd_aQh_ -H;sjRf:ljRNROEQRheblsHR4kM_HNloLN_kC#_MDNLCF_DI -_HSkm=MN4_lNHo_#Lk_NCML_DCD_FIHQ -SjM=k4l_NH_oNL_k#CLMNDDC_F -I;sjRf:ljRNROEQRheblsHR.kM4b_Vk#_O_SH -mM=k.V4_bOk_# -_HS=Qjk4M._kVb_;O# -fsRjR:jlENOReQhRHbsluRQpd_jj__j4s_3 -=SmQ_upj_djj__43dkM -jSQ=#bF_ OD\b3HDs; -R:fjjNRlOqERhR7.blsHRpQu_jjd_4j__ -3lSQm=ujp_djj__34_k -M4S=QjQ_upO9r4 -4SQ=#bF_ OD\b3HDs; -R:fjjNRlOqERhR7.blsHRpQu_jjd_4j__ -3MSQm=ujp_djj__34_k -MjS=QjQ_upj_djO9r4 -4SQ=pQu_jjd_4j__M3kds; -R:fjjNRlOmER)b.RsRHlQ_upj_djj__43Sb -m_=h.SU -QQj=ujp_djj__34_k -M4S=Q4Q_upj_djj__43jkM;R -sfjj:ROlNEhRq7b.RsRHlQ_upj_dj49r. -=Smh._d_Sj -Qhj=__.gHQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbHQlRujp_d4j_r -49Shm=__d4jQ -Sj_=h.HU_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbsluRQpj_7_.jr9m -S=6h_d -_jS=QjQ_upOr_H.S9 -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHlQ_up7jj_r -49Shm=__6.jQ -Sju=Qp__OH9r4 -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbsl7Rp1j_jjh_Qa -_4Shm=__c.jQ -Sj_=h4H(_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbslWR)_jjj_q7v_S. -m_=hcjj_ -jSQ=4h_g -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHR1z7_jjj_aQh_S4 -m_=hdjn_ -jSQ=.h_d -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHRQqvtAq_z 1_hpqA v_7qm_pW -_4Shm=__d6jQ -Sj_=h.Hc_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z1 Ahqp7 _v]q_Q_t]4m -S=dh_c -_jS=Qjh6_._SH -Q)4=1Oa_;R -sfjj:ROlNEhRQesRbHhlR_.4d_SH -m_=h4_d.HQ -Sj_=h4;d. -fsRjR:jlENOReQhRHbslvRqQ_tqA_z1 Ahqp7 _v]q_Q_t]j -3sSqm=vqQt_1Az_q hA_p 7_vq]]Qt_kj3MSd -Qhj=_ddn;R -sfjj:ROlNEhRq7b.RsRHlqtvQqz_A1h_ q Ap_q7v_t]Q]3_jlm -S=QqvtAq_z 1_hpqA v_7qQ_]tj]_34kM -jSQ=QqvtAq_z 1_hpqA v_7qQ_]tS] -Qh4=_ddn;R -sfjj:ROlNEhRq7b.RsRHlqtvQqz_A1h_ q Ap_q7v_t]Q]3_jMm -S=QqvtAq_z 1_hpqA v_7qQ_]tj]_3jkM -jSQ=4h_dH._ -4SQ=QqvtAq_z 1_hpqA v_7qQ_]tj]_3dkM;R -sfjj:ROlNE)Rm.sRbHqlRvqQt_1Az_q hA_p 7_vq]]Qt_bj3 -=Smh6_. -jSQ=QqvtAq_z 1_hpqA v_7qQ_]tj]_34kM -4SQ=QqvtAq_z 1_hpqA v_7qQ_]tj]_3jkM;R -sfjj:ROlNEhRQesRbHhlR_44d_SH -m_=h4_d4HQ -Sj_=h4;d4 -fsRjR:jlENOReQhRHbslvRqQ_tqA_z1 Ahqp7 _vpq_mjW_3Ss -mv=qQ_tqA_z1 Ahqp7 _vpq_mjW_3dkM -jSQ=dh_n -d;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z1 Ahqp7 _vpq_mjW_3Sl -mv=qQ_tqA_z1 Ahqp7 _vpq_mjW_34kM -jSQ=QqvtAq_z 1_hpqA v_7qm_pWQ -S4_=hd;nd -fsRjR:jlENOR7qh.sRbHqlRvqQt_1Az_q hA_p 7_vqp_mWj -3MSqm=vqQt_1Az_q hA_p 7_vqp_mWjM3kjQ -Sj_=h4_d4HQ -S4v=qQ_tqA_z1 Ahqp7 _vpq_mjW_3dkM;R -sfjj:ROlNE)Rm.sRbHqlRvqQt_1Az_q hA_p 7_vqp_mWj -3bShm=_ -.cS=QjqtvQqz_A1h_ q Ap_q7v_Wpm_kj3MS4 -Qq4=vqQt_1Az_q hA_p 7_vqp_mWjM3kjs; -R:fjjNRlOQERhbeRsRHlz_71j_jjQ_haj -3sSzm=7j1_jQj_hja_3dkM -jSQ=_1vqtvQq9rn;R -sfjj:ROlNEhRq7b.RsRHlz_71j_jjQ_haj -3lSzm=7j1_jQj_hja_34kM -jSQ=Oq_r -j9S=Q41qv_vqQtr;n9 -fsRjR:jlENOR7qh.sRbHzlR7j1_jQj_hja_3SM -m7=z1j_jjh_Qa3_jk -MjS=Qjz_71j_jjQ -haS=Q4z_71j_jjQ_hajM3kds; -R:fjjNRlOmER)b.RsRHlz_71j_jjQ_haj -3bShm=_ -.dS=Qjz_71j_jjQ_hajM3k4Q -S47=z1j_jjh_Qa3_jk;Mj -fsRjR:jlENOR7qh.sRbH7lR1iqB4h_Qa__4#kJlGHN__Nj_. -_jShm=_(d6 -jSQ=iBp_jjj_47r.S9 -QB4=pji_j7j__4Hr4 -9;sjRf:ljRNROEq.h7RHbslMRk4v_1_Qqvt4q__NH_.__dNS. -m_=hd -6dS=Qjhc_4jQ -S4_=hd_4gHs; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#j__jN4.r9m -S=dh_4Sj -QAj= _))OQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \qtvQqz_A1h_ q Ap_q7v_Wpm_Hd___N.jd_N -=Smhd_44Q -Sj_=qO9r4 -4SQ=qAtBji_dQj_hHa_;R -sfjj:ROlNEhRQesRbHqlR_4Hr9m -S=Hq_r -49S=Qjqr_O4 -9;sjRf:ljRNROEq.h7RHbslFRb#D_O q\3vqQt_1Az_q hA_p 7_vq]]Qt_Hd___N.jd_N -=Smhd_4.Q -Sj_=qH9r4 -4SQ=qAtBji_dQj_hHa_;R -sfjj:ROlNEhRQesRbHQlR_n.. -=Sm)jW_jHj_ -jSQ=_)Wj_jjOs; -R:fjjNRlOqERhR7.blsHRQqvtAq_z71_q_aq7_Q)j__jjd_N -=Smh(_.jQ -Sjt=Aq_Bij_djQ -haS=Q4)jW_jHj_;R -sfjj:ROlNEhRq7b.RsRHl7B1qiQ4_h4a__l#Jk_GNH__jNSd -m_=h4 -4cS=Qjh6_4nQ -S4v=1_Qqvt4qr9s; -R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__Hj__jN4d_r -j9Shm=_c.c -jSQ=dh_.Sj -Qh4=_jdn;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_jH__Nj_dr_jjS9 -m_=hd -d6S=Qjh4_djQ -S4_=hd;.j -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqM_##H__jjd_Nr -j9Shm=_cdd -jSQ=4h_cSc -Qh4=_j4U;R -sfjj:ROlNEmRX)b.RsRHlt4_4Um -S=.h_cSd -QQj=u7p_j9r. -4SQ=pQu_.Or9s; -R:fjjNRlOXERmR).blsHR4t_4S( +p S=Q47j1_j j_hpqA 3_jk;Md +fsRjR:jlENOR.m)RHbsl1R7_jjj_q hA_p j +3bShm=_Sn +Q7j=1j_jjh_ q Ap_kj3MS4 +Q74=1j_jjh_ q Ap_kj3M +j;sjRf:ljRNROEQRheblsHR.Q_.Sn +m1=q_jjd_SH +Qqj=1d_jj;_O +fsRjR:jlENOR7qh.sRbHklRMNd_#d_jj__HNH._ +=Smh6_c_SH +Q)j= a1 _amz +4SQ=4kM__N#j_djHs; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#j__jj9rc +=Sm1qv_vqQt_#M#_djr9Q +Sj_=h._jdHQ +S4_=h._jcHs; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#j__jj9rd +=Sm1qv_vqQt_#M#_cjr9Q +Sj_=h._j4HQ +S4_=h._j.Hs; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__Hj__jj._N_j.r9m +S=.h_nS4 +Qhj=_d.c +4SQ=_1vqtvQq9r4;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__jj__rN..S9 m_=h. -c.S=QjQ_up74jr9Q -S4u=Qpr_O4 -9;sjRf:ljRNROEQRheblsHRpQu_jjd_.j__ -3sSQm=ujp_djj__3._k -MdS=Qjb_F#O\D 3DHb;R -sfjj:ROlNEhRq7b.RsRHlQ_upj_djj__.3Sl -mu=Qpd_jj__j.k_3MS4 -QQj=uOp_r -.9S=Q4b_F#O\D 3DHb;R -sfjj:ROlNEhRq7b.RsRHlQ_upj_djj__.3SM -mu=Qpd_jj__j.k_3MSj -QQj=ujp_dOj_r -.9S=Q4Q_upj_djj__.3dkM;R -sfjj:ROlNE)Rm.sRbHQlRujp_djj__3._bm -S=.h_gQ -Sju=Qpd_jj__j.k_3MS4 -QQ4=ujp_djj__3._k;Mj +6gS=Qjhd_4(Q +S4_=h.;cd +fsRjR:jlENOR7qh.sRbH7lR1j_jjh_ q Ap_#4_JGlkN__Hj._N +=Smh6_..Q +SjW=)_SO +Q14=vv_qQrtqn +9;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jj__Nj_.r_4jS9 +m_=h. +cgS=Qjh6_.gQ +S4v=1_Qqvtjqr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__Hj__jj._N_jjr9m +S=.h_cS( +Qhj=_d.6 +4SQ=_1vqtvQq9r4;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_jH__jj__rN.jS9 +m_=hd +gUS=Qjhc_.dQ +S4v=1_Qqvtdqr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#j__jj._Nr +69Shm=_d.c +jSQ=)A ) +_OS=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHR1) ma_z.a__jj___Ndjm +S=.h_dS6 +Qhj=_d.6 +4SQ=.h_6 +U;sjRf:ljRNROEq.h7RHbsl R)1_ am_za.__jjd_N +=Smhd_.cQ +Sj =)1_ am +zaS=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHR_71j_jj Ahqp4 __l#Jk_GNH__jNSd +mM=k4v_1_Qqvtjq__l#Jk_GN.Q +Sj_=h4_d(HQ +S4_=h4;6d +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__jj__jNjd_r +c9Shm=_c.j +jSQ=.h_6Sd +Q14=vv_qQrtq6 +9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jj__Nj_d9rc +=Smhj_.dQ +Sj_=h. +6gS=Q41qv_vqQtr;c9 +fsRjR:jlENOR7qh.sRbHklRMC6__jH___F.jm +S=4h_(jj_ +jSQ=kOb_0C#r +49S=Q4O_bkC_#0H9rd;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0.__Hj__jFd.r9m +S=4h_(jd_ +jSQ=kOb_0C#r +d9S=Q4O_bkC_#0H9rj;R +sfjj:ROlNEhRQesRbHelRu7q__SH +mu=eq__7HQ +Sju=eq;_7 +fsRjR:jlENOReQhRHbslbROk#_C0r_H4S9 +mb=Ok#_C0r_H4S9 +QOj=bCk_#40r9s; +R:fjjNRlOQERhbeRsRHlO_bkC_#0H9rd +=SmO_bkC_#0H9rd +jSQ=kOb_0C#r;d9 fsRjR:jlENOReQhRHbslvR1_QqvtHq_r -j9S1m=vv_qQ_tqH9rj -jSQ=_1vqtvQq9rj;R -sfjj:ROlNEhRQesRbHqlR1d_jjj_jjY_1hHB_ -=Smqj1_djj_j1j_Y_hBHQ -Sj1=q_jjd_jjj_h1YBs; +d9S1m=vv_qQ_tqH9rd +jSQ=_1vqtvQq9rd;R +sfjj:ROlNEhRQesRbH1lRvv_qQ_tqH9rj +=Sm1qv_vqQt_jHr9Q +Sjv=1_Qqvtjqr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__Hj__jj._F_j4r9m +S=4h_(j._ +jSQ=.h_cHd_ +4SQ=.h_6Hd_;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__jj__rF.dS9 +m_=h4_(4jQ +Sj_=h4_dnHQ +S4_=h4;n4 +fsRjR:jlENOR7qh.sRbH7lR1j_jjh_ q Ap_#4_JGlkN__Hj._F +=Smh6_4d +_jS=Qjh6_.. +_HS=Q41qv_vqQt_cHr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__Hj__jjd_Fr +j9S1m=vv_qQ_tqM_##j9r( +jSQ=.h_cH(_ +4SQ=.h_cHg_;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_jH__jj__rF.jS9 +m_=h4_ccjQ +Sj_=h._cdHQ +S4_=h._6cHs; +R:fjjNRlOqERhR7.blsHR1) ma_z.a__jj_ +=SmhU_6_Sj +Qhj=_c.d_SH +Qh4=_6.d_ +H;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q hA_p 4J_#lNkG_jH_ +=Smh(_.g +_jS=Qjb_F#O\D 3dkM__N#j_dj8Hj_ +4SQ=4kM__1vqtvQq__j#kJlG.N__ +H;sjRf:ljRNROEQRheblsHR1) ma_zHa_ +=Sm) 1az_ma +_HS=Qj) 1az_mas; +R:fjjNRlOqERhR7.blsHRkOb_0C#_j.__jj_r +.9SOm=bCk_#.0__.jr9Q +Sj_=h._.cHQ +S4_=h._n(Hs; +R:fjjNRlOqERhR7.blsHRkOb_0C#_H.__jj_r +d9Shm=_j.d_SH +Qhj=_c.._SH +Qh4=_6.._ +H;sjRf:ljRNROEq.h7RHbslMRk6__CH +_jShm=_4.g_SH +Qhj=_n.._SH +Qh4=_(.._ +H;sjRf:ljRNROEq.h7RHbsl R)1_ am_za4J_#lNkG_jH__(4._S4 +m_=h._cUHQ +Sj_=h._6UH +_jS=Q4)_1aOs; R:fjjNRlOQERhbeRsRHlB_pij_jj7r_H4S9 mp=Bij_jj__7H9r4 jSQ=iBp_jjj_47r9s; -R:fjjNRlOQERhbeRsRHlk_M4qtvQqz_A1h_ q Ap_q7v_t]Q]__Hlj.__ -3sSkm=Mq4_vqQt_1Az_q hA_p 7_vq]]Qt_lH_.__j3dkM -jSQ=qAtBji_dQj_h -a;sjRf:ljRNROEq.h7RHbslMRk4v_qQ_tqA_z1 Ahqp7 _v]q_Q_t]H._l_3j_lm -S=4kM_QqvtAq_z 1_hpqA v_7qQ_]tH]___l.jk_3MS4 -Qqj=1d_jjj_jjY_1hSB -QA4=tiqB_jjd_aQh;R -sfjj:ROlNEhRq7b.RsRHlk_M4qtvQqz_A1h_ q Ap_q7v_t]Q]__Hlj.__ -3MSkm=Mq4_vqQt_1Az_q hA_p 7_vq]]Qt_lH_.__j3jkM -jSQ=QqvtAq_z 1_hpqA v_7qQ_]tS] -Qk4=Mq4_vqQt_1Az_q hA_p 7_vq]]Qt_lH_.__j3dkM;R -sfjj:ROlNE)Rm.sRbHklRMq4_vqQt_1Az_q hA_p 7_vq]]Qt_lH_.__j3Sb -m_=h. -jgS=Qjk_M4qtvQqz_A1h_ q Ap_q7v_t]Q]__Hlj.__M3k4Q -S4M=k4v_qQ_tqA_z1 Ahqp7 _v]q_Q_t]H._l_3j_k;Mj -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqM_##H__jj._F_j4r9m -S=4h_UHj_ -jSQ=4h_6Hg_ -4SQ=_1vqtvQqr_H. -9;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jj___F..9rj -=Smh6_4g -_HS=Qj1qv_vqQt_cHr9Q -S4v=1_QqvtHq_r;n9 -fsRjR:jlENOR7qh.sRbH7lR1iqB4h_Qa__4#kJlGHN__Fj_.m -S=4h_6jn_ -jSQ=dh_6Hn_ -4SQ=dh_6H(_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_jH__Fj_.r_jjS9 -m_=hd_.jHQ -Sjv=1_QqvtHq_r -49S=Q41qv_vqQt_6Hr9s; -R:fjjNRlOqERhR7.blsHR4kM__1vqtvQq__4H._N_Fd_.m -S=4h_cjd_ -jSQ=4h_6Sg -Qh4=_dd6_ -H;sjRf:ljRNROEQRheblsHR_1vqtvQqr_HnS9 -mv=1_QqvtHq_r -n9S=Qj1qv_vqQtr;n9 -fsRjR:jlENOR7qh.sRbHklRM14_vv_qQ_tq4__HNd.___F.jm -S=4h_cjj_ -jSQ=_)WO -_HS=Q41qv_vqQtr;n9 -fsRjR:jlENOR7qh.sRbHqlRvqQt_1Az_a7qqQ_7)__jj -_jSqm=vqQt_1Az_a7qqQ_7)__OjQ -Sj_=h._(jHQ -S4_=h._U.Hs; -R:fjjNRlOqERhR7.blsHR4kMcl_NH_oNL_k#8NN0_s8H_jH__Sj -m_=h._U4jQ -Sjt=Aq_Bij_djQ_haHQ -S4W=)_jjj_ -H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_HH_r -n9Shm=_6d4_Sj -Qhj=_j.c_SH -Qh4=_.dd_ -H;sjRf:ljRNROEQRheblsHRiBp_jjj_H7_r944 -=SmB_pij_jj7r_H4 -49S=QjB_pij_jj74r49s; -R:fjjNRlOQERhbeRsRHlhn_dc -_HShm=_cdn_jH_ -jSQ=dh_n -c;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y._C_jH__ -N.Shm=_.d4 -jSQ=4h_jHU_ -4SQ=dh_nHc__ -j;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jj__rN.jS9 -m_=hd -njS=Qjhj_4U -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHR1) ma_z4a__l#Jk_GNH__j4_.nj._N -=Smhn_dcQ -Sj_=hd_..HQ -S41=)ap_7Y9r.;R -sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH.__Nj_. -_jShm=_Udn -jSQ=4h_jSU -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHl) 1az_ma__4#kJlGHN__4j_.jn_ -=Smhc_.6 -_HS=Qjhn_dc__HjQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbHOlRbCk_#j0__HH_r -j9Shm=_Ud4_SH -Qhj=_(.6_SH -Qh4=_U.6_ -H;sjRf:ljRNROEq.h7RHbsl_Rh4_(jH__jFH.__ -F.Shm=_U4j_SH +R:fjjNRlOqERhR7.blsHRiBp_jjj__h j._F_FH_.__HFH.__ +F.Shm=_n4d_SH QBj=pji_j7j_r 49S=Q4B_pij_jj7r_Hj 9;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y._C_jH__ -F.Shm=_g4d_Sj -Qhj=_.d4_SH +F.Shm=_.4c_Sj +Qhj=_(dg_SH Q)4=1Oa_;R -sfjj:ROlNEhRQesRbH)lR17a_pHY_r -j9S)m=17a_pHY_r -j9S=Qj)_1a7rpYj -9;sjRf:ljRNROEQRheblsHRa)1_Y7p_4Hr9m -S=a)1_Y7p_4Hr9Q -Sj1=)ap_7Y9r4;R -sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH.__Fj_. -_jShm=_.d._SH -Q)j=17a_pjYr9Q -S41=)ap_7Y9r4;R -sfjj:ROlNEhRQesRbH1lRvv_qQ_tqH9r6 -=Sm1qv_vqQt_6Hr9Q -Sjv=1_Qqvt6qr9s; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_HH_r -(9S1m=vv_qQ_tqHr_H(S9 -Q1j=vv_qQ_tqH9r(;R -sfjj:ROlNEhRQesRbH1lRvv_qQ_tqH9rd -=Sm1qv_vqQt_dHr9Q -Sjv=1_Qqvtdqr9s; -R:fjjNRlOqERhR7.blsHR4kM__N#j_djjd_F -=Smk_M4Nj#_dHj_ -jSQ=qAtBji_dQj_hHa_ -4SQ=XM uu_1q_B O;_H -fsRjR:jlENOReQhRHbsl_Rh4_6(Hm -S=4h_6H(_ -jSQ=4h_6 -(;sjRf:ljRNROEQRheblsHRzwu_h1 1H _ -=Smw_uz11 h -_HS=Qjw_uz11 h ;_O -fsRjR:jlENOReQhRHbsl_RQ. -.(Sqm=1d_jj -_HS=Qjqj1_dOj_;R -sfjj:ROlNEhRq7b.RsRHlk.M._sLCs__jNj.___Nd4m -S=.kM.C_Ls4s_ -jSQ=_q1j_djHQ -S4t=Aq_Bij_jjOs; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__C.H__jNjd_ -=Smh4_.gQ -Sj_=h4 -dgS=Q4hn_dcs; -R:fjjNRlOQERhbeRsRHl)_1a7_pYH9r. -=Sm)_1a7_pYH9r. -jSQ=a)1_Y7pr;.9 -fsRjR:jlENOR7qh.sRbH)lR17a_pCY_.__Hjd_N_S4 -m_=h. -.jS=Qjhj_4UQ -S41=)ap_7Yr_H. -9;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y4_C_jH__ -NdShm=_... -jSQ=4h_dSg -Qh4=_.d._ -H;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y4_C_jH___Ndjm -S=.h_.Sd -Qhj=_Udn -4SQ=a)1_Y7p_4Hr9s; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__CjHd_N -=Smh._.nQ -Sj_=h4 -dgS=Q4)_1a7rpYj -9;sjRf:ljRNROEq.h7RHbsl1R)ap_7Yj_C_NH_d -_jShm=_4dd -jSQ=dh_nSU -Q)4=17a_pHY_r;j9 +sfjj:ROlNEhRq7b.RsRHlk_M6C__Hj._F +=Smhc_46 +_HS=QjO_bkCr#0dS9 +QO4=bCk_#H0_r;49 fsRjR:jlENOReQhRHbslbROk#_C0r_HjS9 mb=Ok#_C0r_HjS9 QOj=bCk_#j0r9s; -R:fjjNRlOqERhR7.blsHRkOb_0C#_Hj__NH_d9rj -=Smh6_.(Q +R:fjjNRlOqERhR7.blsHRkOb_0C#_j.__jj__rF..S9 +m_=h4_cnHQ +Sjb=Ok#_C09rj +4SQ=kOb_0C#r;49 +fsRjR:jlENOReQhRHbsl1R)ap_7Yr_HjS9 +m1=)ap_7Yr_HjS9 +Q)j=17a_pjYr9s; +R:fjjNRlOQERhbeRsRHl)_1a7_pYH9r4 +=Sm)_1a7_pYH9r4 +jSQ=a)1_Y7pr;49 +fsRjR:jlENOR7qh.sRbH)lR17a_pCY_.__Hj._F_Sj +m_=h4_c(HQ +Sj1=)ap_7Y9rj +4SQ=a)1_Y7pr;49 +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MgO_D j_jjbjC__Fj_.m +S=4h_6H._ +jSQ=kOb_0C#_jHr9Q +S4b=Ok#_C0r_H. +9;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jj__Fj_.r_.jS9 +m_=h4_n4HQ +Sj_=h._66HQ +S4_=h._6nHs; +R:fjjNRlOQERhbeRsRHlh6_.U +_HShm=_U.6_jH_ +jSQ=.h_6 +U;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y._C_jH__ +N.Shm=_(dg +jSQ=4h_dHn_ +4SQ=.h_6HU__ +j;sjRf:ljRNROEQRheblsHRiBp_jjj_H7_r +g9SBm=pji_j7j__gHr9Q +Sjp=Bij_jjr_7g +9;sjRf:ljRNROEq.h7RHbsl1R7q4Bi_aQh_#4_JGlkN__4H__jNj._ +=Smh6_.4Q +Sjp=Bij_jjr_74 +j9S=Q4B_pij_jj7r_Hg +9;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jj__Nj_.r_djS9 +m_=h. +6dS=Qjhd_4n +_HS=Q4)_1aOs; +R:fjjNRlOQERhbeRsRHl7Baqij_7_SH +ma=7q_Bi7Hj_ +jSQ=q7aB7i_js; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__Hj__jj._N_j6r9m +S=.h_6Sn +Q7j=aiqB__7jHQ +S4u=eq;_7 +fsRjR:jlENOR7qh.sRbH)lR a1 _amz_#4_JGlkN__Hj._4(__4NS. +m_=h. +6US=Qjhc_4( +_HS=Q4)_1a7rpY. +9;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y._C_jH___N.jm +S=.h_nSn +Qhj=_n4d +4SQ=a)1_ +O;sjRf:ljRNROEQRheblsHRkOb_0C#_.Hr9m +S=kOb_0C#_.Hr9Q +Sjb=Ok#_C09r.;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0.__jj__jN..r9m +S=.h_nS( +Qhj=_n4c_SH +QO4=bCk_#H0_r;.9 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__jjr_j4S9 +mv=1_QqvtMq_#j#_r +n9S=Qjhg_4U +_HS=Q4hg_4g;_H +fsRjR:jlENOR7qh.sRbHOlRbCk_#j0__jj_r +j9Shm=_j.(_SH +Qhj=_6.4_SH +Qh4=_n.4_ +H;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MOg_Dj _jbj_C__jjm +S=#bF_ OD\M3kgD_O j_jjC_b_Sj +Qhj=_j.._SH +Qh4=_4.._ +H;sjRf:ljRNROEq.h7RHbslbROk#_C0__.j__jj9r4 +=SmO_bkC_#0.r_j4S9 +Qhj=_..._SH +Qh4=_d.._ +H;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y._C_jH___Nd4m +S=4h_USn +Qhj=_n4d +4SQ=a)1_Y7p_.Hr9s; +R:fjjNRlOqERhR7.blsHRa)1_Y7p__C4H__jNSd +m_=h4 +UUS=Qjhc_4.Q +S4_=h4_c(Hs; +R:fjjNRlOqERhR7.blsHRa)1_Y7p__C4H__jNjd_ +=SmhU_4gQ +Sj_=h. +nnS=Q4)_1a7_pYH9r4;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__jj__rNd4S9 +m_=h4 +gUS=Qjhd_4nQ +S4_=h.;n4 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__jj__jNjd_r +49Shm=_g4g +jSQ=.h_6Sc +Q14=vv_qQrtq. +9;sjRf:ljRNROEq.h7RHbslbROk#_C0__jj__jNjdr9m +S=.h_4S6 +Qhj=_n4d +4SQ=kOb_0C#_jHr9s; +R:fjjNRlOqERhR7.blsHRkOb_0C#_jj__Nj_dr_jjS9 +m_=h. +4nS=Qjhd_4n +_HS=Q4O_bkCr#0j +9;sjRf:ljRNROEq.h7RHbslbROk#_C0__.j__jjd_Nr +49Shm=_... +jSQ=kOb_0C#r +49S=Q4O_bkC_#0H9rj;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0.__jj__jN.dr9m +S=.h_.Sc +Qhj=_n4c +4SQ=kOb_0C#r;.9 +fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__jH__Nj_d9rd +=Smh._.6Q Sj_=h4 -jUS=Q4O_bkC_#0H9rj;R -sfjj:ROlNEhRq7b.RsRHlO_bkC_#0j__HHd_N_jjr9m -S=.h_6SU -Qhj=_U4j_SH -QO4=bCk_#j0r9s; -R:fjjNRlOQERhbeRsRHlq _7B m7_4HrgS9 -m_=q7m B7H _r94g -jSQ=7q_ 7Bm r_O4;g9 -fsRjR:jlENOReQhRHbsl_Rq7m B7H _r94n -=Smq _7B m7_4HrnS9 -Qqj=_B7 m_7 Onr49s; -R:fjjNRlOqERhR7.blsHR4kM__1vqtvQq__j#kJlG4N__jj__ -NdShm=_d44 -jSQ=dh_4Hg_ -4SQ=_1vqtvQq9rn;R -sfjj:ROlNEhRq7b.RsRHl1 QZ_q7v_#d_JGlkN__HHd_N -=Smh6_.gQ -Sj_=hd -ndS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\j3q_q7v_jd___N.jd_N -=Smb_F#O\D 3_qj7_vqdQ -Sjt=Aq_Bij_djQ_haHQ -S47=z1j_jj;_O -fsRjR:jlENOR7qh.sRbH1lRQ_Z 7_vqdJ_#lNkG_FH_.__HNS. -m_=hd -ndS=QjABtqid_jjh_QaQ -S4t=Aq_Bij_djQ_ha7s; -R:fjjNRlOqERhR7.blsHR4kMdH_OHHM__Sj -m_=hd_4djQ -Sj =MX1u_u qB_HO_ -4SQ=4kMjH_OHHM_;R -sfjj:ROlNEhRq7b.RsRHlk_M41qv_vqQt_#j_JGlkN__4j -_jSkm=M14_vv_qQ_tqjJ_#lNkG_j4_ -jSQ=4h_4Hd_ -4SQ=4h_UH._;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3_)Wj_jjQ_ha6 -_jSbm=FO#_D3 \)jW_jQj_h6a__Sj -Qhj=_.4U_SH -Q)4=W__OHs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdN(_#d_jjj_8_HH_ -=Smh(_n_Sj -Qhj=_j.n_SH -Qb4=FO#_D3 \k_MdNj#_d8j_j;_j -fsRjR:jlENOR7qh.sRbHqlR1j_jjh_Qa__4#kJlGHN__Sj -m_=h._(gjQ -Sj_=h4_4dHQ -S4F=b#D_O k\3MNd_#d_jjj_8_ -j;sjRf:ljRNROEq.h7RHbsl1R7q4Bi_aQh_#4_JGlkN__Hjm -S=.h_(jU_ -jSQ=4h_4Hc_ -4SQ=#bF_ OD\M3kd#_N_jjd__8jjs; -R:fjjNRlOqERhR7.blsHR_71j_jj Ahqp4 __l#Jk_GN4__Hjm -S=nh_d -_jS=Qjh4_46 -_HS=Q4b_F#O\D 3dkM__N#j_dj8jj_;R -sfjj:ROlNEhRq7b.RsRHlqj1_d7j_j__jH._N_SH -m_=h4_j(jQ -Sj1=q_jjd_SH -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkM__N#j_dj8jj___F.jd_F -=Smb_F#O\D 3dkM__N#j_dj8jj_ -jSQ=_q1j_dj7Hj_ -4SQ=)A );_O -fsRjR:jlENOReQhRHbsl_Rh4_4dHm -S=4h_4Hd_ -jSQ=4h_4 -d;sjRf:ljRNROEQRheblsHR_q1j_jjQ_haj -3sSqm=1j_jjh_Qa3_jk -MdS=Qjh(_.gs; -R:fjjNRlOqERhR7.blsHR_q1j_jjQ_haj -3lSqm=1j_jjh_Qa3_jk -M4S=Qjh4_4d -_HS=Q4h(_.gs; -R:fjjNRlOqERhR7.blsHR_q1j_jjQ_haj -3MSqm=1j_jjh_Qa3_jk -MjS=Qjqj1_jQj_hSa -Qq4=1j_jjh_Qa3_jk;Md -fsRjR:jlENOR.m)RHbsl1Rq_jjj_aQh_bj3 -=Smh -_6S=Qjqj1_jQj_hja_34kM -4SQ=_q1j_jjQ_hajM3kjs; -R:fjjNRlOQERhbeRsRHl7j1_j j_hpqA 3_jsm -S=_71j_jj Ahqpj _3dkM -jSQ=nh_ds; -R:fjjNRlOqERhR7.blsHR_71j_jj Ahqpj _3Sl -m1=7_jjj_q hA_p jM3k4Q +(dS=Q4O_bkC_#0H9r.;R +sfjj:ROlNEhRq7b.RsRHlk_M6C__Hjd_N +=Smh._.nQ Sj_=h4 -46S=Q4hd_n;R -sfjj:ROlNEhRq7b.RsRHl7j1_j j_hpqA 3_jMm -S=_71j_jj Ahqpj _3jkM -jSQ=_71j_jj AhqpS -Q74=1j_jjh_ q Ap_kj3M -d;sjRf:ljRNROEmR).blsHR_71j_jj Ahqpj _3Sb -m_=hnQ -Sj1=7_jjj_q hA_p jM3k4Q -S41=7_jjj_q hA_p jM3kjs; -R:fjjNRlOQERhbeRsRHlqj1_djj_j1j_Y_hBj -3sSqm=1d_jjj_jjY_1hjB_3dkM -jSQ=nh_(s; -R:fjjNRlOqERhR7.blsHR_q1j_djj_jj1BYh_lj3 -=Smqj1_djj_j1j_Y_hBjM3k4Q -SjF=b#D_O k\3MNd_#d_jjj_8 -4SQ=nh_(s; -R:fjjNRlOqERhR7.blsHR_q1j_djj_jj1BYh_Mj3 -=Smqj1_djj_j1j_Y_hBjM3kjQ -Sj1=q_jjd_jjj_h1YBQ -S41=q_jjd_jjj_h1YB3_jk;Md -fsRjR:jlENOR.m)RHbsl1Rq_jjd_jjj_h1YB3_jbm -S=(h_ -jSQ=_q1j_djj_jj1BYh_kj3MS4 -Qq4=1d_jjj_jjY_1hjB_3jkM;R -sfjj:ROlNEhRQesRbH)lRWj_jjh_Qa3_jsm -S=_)Wj_jjQ_hajM3kdQ -SjM=k4v_1_Qqvtjq__l#Jk_GN4s; -R:fjjNRlOqERhR7.blsHR_)Wj_jjQ_haj -3lS)m=Wj_jjh_Qa3_jk -M4S=Qjb_F#O\D 3_)Wj_jjQ_ha6Q -S4M=k4v_1_Qqvtjq__l#Jk_GN4s; -R:fjjNRlOqERhR7.blsHR_)Wj_jjQ_haj -3MS)m=Wj_jjh_Qa3_jk -MjS=Qj)jW_jQj_hSa -Q)4=Wj_jjh_Qa3_jk;Md -fsRjR:jlENOR.m)RHbslWR)_jjj_aQh_bj3 -=SmhU_4 -jSQ=_)Wj_jjQ_hajM3k4Q -S4W=)_jjj_aQh_kj3M -j;sjRf:ljRNROEQRheblsHR_qj7_vqj -3sSqm=jv_7q3_jk -MdS=Qjhn_dds; -R:fjjNRlOqERhR7.blsHR_qj7_vqj -3lSqm=jv_7q3_jk -M4S=Qjq7j_vSq -Qh4=_ddn;R -sfjj:ROlNEhRq7b.RsRHlq7j_vjq_3SM -mj=q_q7v_kj3MSj -Qbj=FO#_D3 \q7j_vdq_ -4SQ=_qj7_vqjM3kds; -R:fjjNRlOmER)b.RsRHlq7j_vjq_3Sb -m_=h.S. -Qqj=jv_7q3_jk -M4S=Q4q7j_vjq_3jkM;R -sfjj:ROlNEhRQesRbHAlRtj_jj3_jsm -S=_Atj_jjjM3kdQ -SjF=b#D_O k\3MLg_od_jjs; -R:fjjNRlOqERhR7.blsHR_Atj_jjj -3lSAm=tj_jj3_jk -M4S=QjAjt_dOj_ -4SQ=#bF_ OD\M3kgo_L_jjd;R -sfjj:ROlNEhRq7b.RsRHlAjt_jjj_3SM -mt=A_jjj_kj3MSj -QAj=tj_jj -_OS=Q4Ajt_jjj_3dkM;R -sfjj:ROlNE)Rm.sRbHAlRtj_jj3_jbm -S=.h_nQ -Sjt=A_jjj_kj3MS4 -QA4=tj_jj3_jk;Mj -fsRjR:jlENOR7qh.sRbH7lR1j_jjh_ q Ap_S4 -m_=h6SU -Qhj=_Sn -Q)4=1Oa_;R +(jS=Q4O_bkCr#0. +9;sjRf:ljRNROEq.h7RHbslMRk6__CH__jNjd_ +=Smh._.(Q +Sj_=h4 +c6S=Q4O_bkC_#0H9r.;R +sfjj:ROlNEhRq7b.RsRHl7B1qiQ4_h4a__l#Jk_GN4__Hjd_N +=Smhn_U +jSQ=4h_6S4 +Q14=vv_qQrtq4 +9;sjRf:ljRNROEq.h7RHbsl1R)ap_7Yj_C_jH__ +NdShm=_n.d +jSQ=4h_cS. +Q)4=17a_pjYr9s; +R:fjjNRlOqERhR7.blsHRa)1_Y7p__CjH__jNjd_ +=Smhd_.(Q +Sj_=h. +nnS=Q4)_1a7_pYH9rj;R sfjj:ROlNEhRq7b.RsRHlAjt_j4j_ -=Smhd_d_Sj +=Smhc_d_Sj Qhj=__.nHQ S41=)a;_O -fsRjR:jlENOR7qh.sRbHqlRjv_7q -_4Shm=__d(jQ -Sj_=h.H._ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbslWR)_jjj_aQh_S4 -m_=hcj4_ -jSQ=4h_U +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__HHr_jnS9 +m_=hd_jnjQ +Sj_=h._4dHQ +S4_=h._4cHs; +R:fjjNRlOqERhR7.blsHR_q1j_dj7jj__NH_. +_HShm=_d4d_Sj +Qqj=1d_jj _HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHR_q1j_djj_jj1BYh_S4 -m_=hcjn_ -jSQ=(h__SH -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHlqj1_jQj_h4a_ -=Smh(_c_Sj -Qhj=_H6_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbsl1R7q4Bi_aQh_S4 -m_=hcjU_ -jSQ=ch__SH -Q)4=1Oa_;R -sfjj:ROlNEhRQesRbHqlR_B7 m_7 HUr49m -S=7q_ 7Bm r_H4 -U9S=Qjq _7B m7_4OrU -9;sjRf:ljRNROEq.h7RHbslFRb#D_O 1\3Q_Z 7_vqn__jj__jNjdr9m -S=.h_USd +R:fjjNRlOqERhR7.blsHR4kM__N#j_djj__jFSd +mM=k4#_N_jjd_SH QAj=tiqB_jjd_aQh_SH -Qh4=_44(;R -sfjj:ROlNEhRQesRbH1lRQ_Z 7_vqH9rj -=Sm1 QZ_q7v_jHr9Q -SjQ=1Z7 _vjqr9s; -R:fjjNRlOqERhR7.blsHRdkM_x#HCm -S=dkM_x#HCQ -SjQ=1Z7 _v4qr9Q -S4Q=1Z7 _vHq_r;j9 -fsRjR:jlENOReQhRHbslQR1Z7 _vHq_r -49S1m=Q_Z 7_vqH9r4 -jSQ=Z1Q v_7q9r4;R -sfjj:ROlNEhRq7b.RsRHlk_Mc#CHx -=Smk_Mc#CHx -jSQ=Z1Q v_7q9rj -4SQ=Z1Q v_7qr_H4 -9;sjRf:ljRNROEQRheblsHRZ1Q v_7q__j4s_3 -=Sm1 QZ_q7v_4j__M3kdQ -Sj_=h.;6g -fsRjR:jlENOR7qh.sRbH1lRQ_Z 7_vqj__43Sl -mQ=1Z7 _vjq__34_k -M4S=Qj1 QZ_q7vr -49S=Q4h6_.gs; -R:fjjNRlOqERhR7.blsHRZ1Q v_7q__j4M_3 -=Sm1 QZ_q7v_4j__M3kjQ -SjF=b#D_O 1\3Q_Z 7_vqn9r4 -4SQ=Z1Q v_7q__j4k_3M -d;sjRf:ljRNROEmR).blsHRZ1Q v_7q__j4b_3 -=Smh._4 -jSQ=Z1Q v_7q__j4k_3MS4 -Q14=Q_Z 7_vqj__43jkM;R -sfjj:ROlNEhRQesRbH1lRQ_Z 7_vqj__j3Ss -mQ=1Z7 _vjq__3j_k -MdS=Qjh6_.gs; -R:fjjNRlOqERhR7.blsHRZ1Q v_7q__jjl_3 -=Sm1 QZ_q7v_jj__M3k4Q -SjQ=1Z7 _vjqr9Q -S4_=h.;6g -fsRjR:jlENOR7qh.sRbH1lRQ_Z 7_vqj__j3SM -mQ=1Z7 _vjq__3j_k -MjS=Qjb_F#O\D 3Z1Q v_7qr_njS9 -Q14=Q_Z 7_vqj__j3dkM;R -sfjj:ROlNE)Rm.sRbH1lRQ_Z 7_vqj__j3Sb -m_=h4S4 -Q1j=Q_Z 7_vqj__j34kM -4SQ=Z1Q v_7q__jjk_3M -j;sjRf:ljRNROEq.h7RHbsluReq__7jm -S=6h_c -_jS=Qj)_1aOQ -S4u=eq__OHs; -R:fjjNRlOqERhR7.blsHRqAtBji_dQj_h4a_ -=Smhd_c_Sj -Qhj=__4jHQ -S41=)a;_O -fsRjR:jlENOReQhRHbsltRAq_Bij_djQ_haj -3sSAm=tiqB_jjd_aQh_kj3MSd -Qbj=FO#_D3 \k_MnLOoN j_jjs; -R:fjjNRlOqERhR7.blsHRqAtBji_dQj_hja_3Sl -mt=Aq_Bij_djQ_hajM3k4Q -Sjt=Aq_Bij_jjOQ -S4F=b#D_O k\3MLn_o NO_jjj;R -sfjj:ROlNEhRq7b.RsRHlABtqid_jjh_Qa3_jMm -S=qAtBji_dQj_hja_3jkM -jSQ=qAtBji_dQj_hSa -QA4=tiqB_jjd_aQh_kj3M -d;sjRf:ljRNROEmR).blsHRqAtBji_dQj_hja_3Sb -m_=h4Sj -QAj=tiqB_jjd_aQh_kj3MS4 -QA4=tiqB_jjd_aQh_kj3M -j;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MLg_od_jjm -S=#bF_ OD\M3kgo_L_jjd_Sj -QAj=td_jj__OHQ -S4F=b#D_O k\3MLn_od_jj;_H -fsRjR:jlENOReQhRHbsl1Rq_jjj_aQh_SH -m1=q_jjj_aQh_SH -Qqj=1j_jjh_Qas; -R:fjjNRlOqERhR7.blsHRckM__N#j -jjSkm=MNc_#j_jjQ -Sj1=q_jjj_aQh_SH -Qq4=1d_jj;_H -fsRjR:jlENOReQhRHbsl_Rh4_4cHm -S=4h_4Hc_ -jSQ=4h_4 -c;sjRf:ljRNROEQRheblsHRq71B_i4Q_haj -3sS7m=1iqB4h_Qa3_jk -MdS=Qjh(_.Us; -R:fjjNRlOqERhR7.blsHRq71B_i4Q_haj -3lS7m=1iqB4h_Qa3_jk -M4S=Qjh4_4c -_HS=Q4h(_.Us; -R:fjjNRlOqERhR7.blsHRq71B_i4Q_haj -3MS7m=1iqB4h_Qa3_jk -MjS=Qj7B1qiQ4_hSa -Q74=1iqB4h_Qa3_jk;Md -fsRjR:jlENOR.m)RHbsl1R7q4Bi_aQh_bj3 -=Smh -_cS=Qj7B1qiQ4_hja_34kM -4SQ=q71B_i4Q_hajM3kjs; -R:fjjNRlOQERhbeRsRHlO_bkC_#0j__d3Ss -mb=Ok#_C0__jdk_3MSd -Qhj=_U4j;R -sfjj:ROlNEhRq7b.RsRHlO_bkC_#0j__d3Sl -mb=Ok#_C0__jdk_3MS4 -QOj=bCk_#d0r9Q -S4_=h4;jU -fsRjR:jlENOR7qh.sRbHOlRbCk_#j0__3d_Mm -S=kOb_0C#_dj__M3kjQ -Sj_=hd_4nHQ -S4b=Ok#_C0__jdk_3M -d;sjRf:ljRNROEmR).blsHRkOb_0C#_dj__ -3bShm=_ -4nS=QjO_bkC_#0j__d34kM -4SQ=kOb_0C#_dj__M3kjs; -R:fjjNRlOQERhbeRsRHlO_bkC_#0j__.3Ss -mb=Ok#_C0__j.k_3MSd -Qhj=_U4j;R -sfjj:ROlNEhRq7b.RsRHlO_bkC_#0j__.3Sl -mb=Ok#_C0__j.k_3MS4 -QOj=bCk_#.0r9Q -S4_=h4;jU -fsRjR:jlENOR7qh.sRbHOlRbCk_#j0__3._Mm -S=kOb_0C#_.j__M3kjQ -Sjb=Ok#_C0r_..S9 -QO4=bCk_#j0__3._k;Md -fsRjR:jlENOR.m)RHbslbROk#_C0__j.b_3 -=Smh6_4 -jSQ=kOb_0C#_.j__M3k4Q -S4b=Ok#_C0__j.k_3M -j;sjRf:ljRNROEQRheblsHRkOb_0C#_4j__ +QM4= _Xu1Buq __OHs; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_HH_r +(9S1m=vv_qQ_tqHr_H(S9 +Q1j=vv_qQ_tqH9r(;R +sfjj:ROlNEhRQesRbHqlR1d_jjj_jjY_1hHB_ +=Smqj1_djj_j1j_Y_hBHQ +Sj1=q_jjd_jjj_h1YBs; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__Hj__jjd_N_4._r +j9Shm=_c.4_S4 +Qqj=1d_jjj_jjY_1hHB_ +4SQ=XM uu_1q_B Os; +R:fjjNRlOQERhbeRsRHlw_uz11 h +_HSwm=u1z_ h1_SH +Qwj=u1z_ h1_ +O;sjRf:ljRNROEQRheblsHRqev_aQh_sj3 +=Sme_vqQ_hajM3kdQ +SjF=b#D_O k\3MOg_Dj _jbj_Cs; +R:fjjNRlOqERhR7.blsHRqev_aQh_lj3 +=Sme_vqQ_hajM3k4Q +Sjb=Ok#_C0r_H4S9 +Qb4=FO#_D3 \k_MgO_D j_jjb +C;sjRf:ljRNROEq.h7RHbslvReqh_Qa3_jMm +S=qev_aQh_kj3MSj +Qej=vQq_hSa +Qe4=vQq_hja_3dkM;R +sfjj:ROlNE)Rm.sRbHelRvQq_hja_3Sb +m_=h.S4 +Qej=vQq_hja_34kM +4SQ=qev_aQh_kj3M +j;sjRf:ljRNROEq.h7RHbslvReqh_Qa +_4Shm=__dgjQ +Sj_=h.H4_ +4SQ=a)1_ +O;sjRf:ljRNROEQRheblsHRkOb_0C#_4j__ 3sSOm=bCk_#j0__34_k -MdS=Qjhj_4Us; +MdS=Qjhd_4ns; R:fjjNRlOqERhR7.blsHRkOb_0C#_4j__ 3lSOm=bCk_#j0__34_k M4S=QjO_bkCr#04S9 -Qh4=_U4j;R +Qh4=_n4d;R sfjj:ROlNEhRq7b.RsRHlO_bkC_#0j__43SM mb=Ok#_C0__j4k_3MSj QOj=bCk_#.0_r @@ -3067,394 +2778,622 @@ sfjj:ROlNE)Rm.sRbHOlRbCk_#j0__34_bm S=4h_cQ Sjb=Ok#_C0__j4k_3MS4 QO4=bCk_#j0__34_k;Mj -fsRjR:jlENOR7qh.sRbH7lRaiqB__7jjm -S=6h_6 -_jS=Qj7Baqi__OHQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbHelRvQq_h4a_ -=SmhU_d_Sj -Qhj=__.4HQ -S41=)a;_O -fsRjR:jlENOReQhRHbslbROk#_C0r_H4S9 -mb=Ok#_C0r_H4S9 -QOj=bCk_#40r9s; -R:fjjNRlOQERhbeRsRHle_vqQ_haj -3sSem=vQq_hja_3dkM -jSQ=#bF_ OD\M3kgD_O j_jjC_b;R -sfjj:ROlNEhRq7b.RsRHle_vqQ_haj -3lSem=vQq_hja_34kM -jSQ=kOb_0C#_4Hr9Q -S4F=b#D_O k\3MOg_Dj _jbj_Cs; -R:fjjNRlOqERhR7.blsHRqev_aQh_Mj3 -=Sme_vqQ_hajM3kjQ -Sjv=eqh_QaQ -S4v=eqh_Qa3_jk;Md -fsRjR:jlENOR.m)RHbslvReqh_Qa3_jbm -S=.h_4Q -Sjv=eqh_Qa3_jk -M4S=Q4e_vqQ_hajM3kjs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\Q31Z7 _vnq__jj__Fj_.9rj -=Smh(_44 -_HS=Qjp_71j_jjO -_HS=Q4z_71j_jjO;_H -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \1 QZ_q7v_jn__jj_r -49Sbm=FO#_D3 \1 QZ_q7v_jn_r -49S=Qjhc_d6 -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\Q31Z7 _vnq__jj__jjr9m -S=#bF_ OD\Q31Z7 _vnq__jjr9Q -Sj_=h._UdHQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MnLOoN j_jj -_jSbm=FO#_D3 \k_MnLOoN j_jj -_jS=QjABtqij_jj -_OS=Q4h(_dj;_H -fsRjR:jlENOReQhRHbsl R)1_ am_zaHm -S=1) ma_zHa_ -jSQ=1) ma_z -a;sjRf:ljRNROEq.h7RHbslMRkd#_N_jjd_Sj -mM=kd#_N_jjd_SH -Q)j= a1 _amz -4SQ=4kM__N#j_djHs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kno_LN_O j_jjj._N -=Smh(_djQ -Sj1=q_jjj_SO -Qh4=_gd4_ -H;sjRf:ljRNROEq.h7RHbslFRb#D_O 1\3Q_Z 7_vqn__jj__jN4dr9m -S=dh_cS6 -QAj=tiqB_jjd_aQh_SH -Qh4=_44(_ -H;sjRf:ljRNROEq.h7RHbslbROk#_C0__.j__jj9r. -=SmO_bkC_#0.r_j.S9 -Qhj=_d.6_SH -Qh4=_gdn_ -H;sjRf:ljRNROEq.h7RHbslbROk#_C0__.j__jj9r4 -=SmO_bkC_#0.r_j4S9 -Qhj=_j.6_SH -Qh4=_4.6_ -H;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MOg_Dj _jbj_C__jjm -S=#bF_ OD\M3kgD_O j_jjC_b_Sj -Qhj=_U.c_SH -Qh4=_g.c_ -H;sjRf:ljRNROEq.h7RHbslbROk#_C0__.j__jj._Nr -.9Shm=_gdn -jSQ=dh_.H4_ -4SQ=kOb_0C#_.Hr9s; -R:fjjNRlOQERhbeRsRHl7Baqij_7_SH -ma=7q_Bi7Hj_ -jSQ=q7aB7i_js; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#j__jNj._r -.9Shm=_.dn -jSQ=q7aB7i_j -_HS=Q4e_uq7s; -R:fjjNRlOQERhbeRsRHle_uq7 -_HSem=u7q__SH -Qej=u7q_;R -sfjj:ROlNEhRq7b.RsRHl) 1az_ma__.j__jNjd_ -=Smhn_.(Q -Sj_=hd -njS=Q4hn_dcs; -R:fjjNRlOqERhR7.blsHR1) ma_z.a__jj__ -NdShm=_n.n -jSQ=1) ma_zSa -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHlk_M6C__jHd_N_Sj -m_=h. -6nS=Qjh6_44Q -S4b=Ok#_C0r_H. -9;sjRf:ljRNROEq.h7RHbslMRk6__Cj__HNSd -m_=h. -66S=QjhU_4nQ -S4b=Ok#_C09r.;R -sfjj:ROlNEhRQesRbHOlRbCk_#H0_r -.9SOm=bCk_#H0_r -.9S=QjO_bkCr#0. -9;sjRf:ljRNROEq.h7RHbslbROk#_C0__.H__HHd_Nr -d9Shm=_c.6 -jSQ=4h_gSn -QO4=bCk_#H0_r;.9 -fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__jj__Nj_d9r. -=Smh6_.dQ -Sj_=hd -.4S=Q4O_bkCr#0. -9;sjRf:ljRNROEq.h7RHbslbROk#_C0__.j__jjd_Nr -49Shm=_j.6 +fsRjR:jlENOReQhRHbslbROk#_C0__j.s_3 +=SmO_bkC_#0j__.3dkM +jSQ=4h_d +n;sjRf:ljRNROEq.h7RHbslbROk#_C0__j.l_3 +=SmO_bkC_#0j__.34kM jSQ=kOb_0C#r -49S=Q4O_bkC_#0H9rj;R -sfjj:ROlNEhRq7b.RsRHlk_M41qv_vqQt_#j_JGlkN__4j__jFSd -m_=h4_U.HQ -Sj_=hd_nnHQ -S4v=1_QqvtHq_r;(9 -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \BpYB v_7q__64__HFj.__ -FdShm=_44j_SH -QAj=tiqB_jjd_aQh_SH +.9S=Q4hd_4ns; +R:fjjNRlOqERhR7.blsHRkOb_0C#_.j__ +3MSOm=bCk_#j0__3._k +MjS=QjO_bkC_#0.9r. +4SQ=kOb_0C#_.j__M3kds; +R:fjjNRlOmER)b.RsRHlO_bkC_#0j__.3Sb +m_=h4S6 +QOj=bCk_#j0__3._k +M4S=Q4O_bkC_#0j__.3jkM;R +sfjj:ROlNEhRQesRbHOlRbCk_#j0__3d_sm +S=kOb_0C#_dj__M3kdQ +Sj_=h4;dn +fsRjR:jlENOR7qh.sRbHOlRbCk_#j0__3d_lm +S=kOb_0C#_dj__M3k4Q +Sjb=Ok#_C09rd +4SQ=4h_d +n;sjRf:ljRNROEq.h7RHbslbROk#_C0__jdM_3 +=SmO_bkC_#0j__d3jkM +jSQ=.h_dHj_ +4SQ=kOb_0C#_dj__M3kds; +R:fjjNRlOmER)b.RsRHlO_bkC_#0j__d3Sb +m_=h4Sn +QOj=bCk_#j0__3d_k +M4S=Q4O_bkC_#0j__d3jkM;R +sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH.__Nj_d +_jShm=_64U +jSQ=4h_cS. +Qh4=_U.6;R +sfjj:ROlNEhRQesRbH)lR17a_pHY_r +.9S)m=17a_pHY_r +.9S=Qj)_1a7rpY. +9;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z1 Ahqp7 _vpq_m4W_ +=Smhn_d_Sj +Qhj=__.cHQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbHqlRvqQt_1Az_q hA_p 7_vq]]Qt_S4 +m_=hdj6_ +jSQ=.h_6 +_HS=Q4)_1aOs; +R:fjjNRlOQERhbeRsRHlhj_4d +_HShm=_d4j_SH +Qhj=_d4j;R +sfjj:ROlNEhRQesRbHqlRvqQt_1Az_q hA_p 7_vq]]Qt_sj3 +=SmqtvQqz_A1h_ q Ap_q7v_t]Q]3_jk +MdS=Qjh6_.(s; +R:fjjNRlOqERhR7.blsHRQqvtAq_z 1_hpqA v_7qQ_]tj]_3Sl +mv=qQ_tqA_z1 Ahqp7 _v]q_Q_t]jM3k4Q +Sjv=qQ_tqA_z1 Ahqp7 _v]q_Q +t]S=Q4h6_.(s; +R:fjjNRlOqERhR7.blsHRQqvtAq_z 1_hpqA v_7qQ_]tj]_3SM +mv=qQ_tqA_z1 Ahqp7 _v]q_Q_t]jM3kjQ +Sj_=h4_jdHQ +S4v=qQ_tqA_z1 Ahqp7 _v]q_Q_t]jM3kds; +R:fjjNRlOmER)b.RsRHlqtvQqz_A1h_ q Ap_q7v_t]Q]3_jbm +S=.h_6Q +Sjv=qQ_tqA_z1 Ahqp7 _v]q_Q_t]jM3k4Q +S4v=qQ_tqA_z1 Ahqp7 _v]q_Q_t]jM3kjs; +R:fjjNRlOQERhbeRsRHlhj_4. +_HShm=_.4j_SH +Qhj=_.4j;R +sfjj:ROlNEhRQesRbHqlRvqQt_1Az_q hA_p 7_vqp_mWj +3sSqm=vqQt_1Az_q hA_p 7_vqp_mWjM3kdQ +Sj_=h.;6( +fsRjR:jlENOR7qh.sRbHqlRvqQt_1Az_q hA_p 7_vqp_mWj +3lSqm=vqQt_1Az_q hA_p 7_vqp_mWjM3k4Q +Sjv=qQ_tqA_z1 Ahqp7 _vpq_mSW +Qh4=_(.6;R +sfjj:ROlNEhRq7b.RsRHlqtvQqz_A1h_ q Ap_q7v_Wpm_Mj3 +=SmqtvQqz_A1h_ q Ap_q7v_Wpm_kj3MSj +Qhj=_.4j_SH +Qq4=vqQt_1Az_q hA_p 7_vqp_mWjM3kds; +R:fjjNRlOmER)b.RsRHlqtvQqz_A1h_ q Ap_q7v_Wpm_bj3 +=Smhc_. +jSQ=QqvtAq_z 1_hpqA v_7qm_pW3_jk +M4S=Q4qtvQqz_A1h_ q Ap_q7v_Wpm_kj3M +j;sjRf:ljRNROEQRheblsHR_qj7_vqj +3sSqm=jv_7q3_jk +MdS=Qjh6_.(s; +R:fjjNRlOqERhR7.blsHR_qj7_vqj +3lSqm=jv_7q3_jk +M4S=Qjq7j_vSq +Qh4=_(.6;R +sfjj:ROlNEhRq7b.RsRHlq7j_vjq_3SM +mj=q_q7v_kj3MSj +Qbj=FO#_D3 \q7j_vdq_ +4SQ=_qj7_vqjM3kds; +R:fjjNRlOmER)b.RsRHlq7j_vjq_3Sb +m_=h.S. +Qqj=jv_7q3_jk +M4S=Q4q7j_vjq_3jkM;R +sfjj:ROlNEhRQesRbH)lRWj_jjv_7q3_jsm +S=_)Wj_jj7_vqjM3kdQ +Sj_=h.;6( +fsRjR:jlENOR7qh.sRbH)lRWj_jjv_7q3_jlm +S=_)Wj_jj7_vqjM3k4Q +SjW=)_jjj_q7v +4SQ=.h_6 +(;sjRf:ljRNROEq.h7RHbslWR)_jjj_q7v_Mj3 +=Sm)jW_j7j_vjq_3jkM +jSQ=dh_4S4 +Q)4=Wj_jjv_7q3_jk;Md +fsRjR:jlENOR.m)RHbslWR)_jjj_q7v_bj3 +=Smhg_4 +jSQ=_)Wj_jj7_vqjM3k4Q +S4W=)_jjj_q7v_kj3M +j;sjRf:ljRNROEQRheblsHR_)Wj_jjQ_haj +3sS)m=Wj_jjh_Qa3_jk +MdS=Qjk_M41qv_vqQt_#j_JGlkN;_4 +fsRjR:jlENOR7qh.sRbH)lRWj_jjh_Qa3_jlm +S=_)Wj_jjQ_hajM3k4Q +SjF=b#D_O )\3Wj_jjh_Qa +_6S=Q4k_M41qv_vqQt_#j_JGlkN;_4 +fsRjR:jlENOR7qh.sRbH)lRWj_jjh_Qa3_jMm +S=_)Wj_jjQ_hajM3kjQ +SjW=)_jjj_aQh +4SQ=_)Wj_jjQ_hajM3kds; +R:fjjNRlOmER)b.RsRHl)jW_jQj_hja_3Sb +m_=h4SU +Q)j=Wj_jjh_Qa3_jk +M4S=Q4)jW_jQj_hja_3jkM;R +sfjj:ROlNEhRQesRbHAlRtiqB_jjd_aQh_sj3 +=SmABtqid_jjh_Qa3_jk +MdS=Qjb_F#O\D 3nkM_NLoOj _j +j;sjRf:ljRNROEq.h7RHbsltRAq_Bij_djQ_haj +3lSAm=tiqB_jjd_aQh_kj3MS4 +QAj=tiqB_jjj_SO +Qb4=FO#_D3 \k_MnLOoN j_jjs; +R:fjjNRlOqERhR7.blsHRqAtBji_dQj_hja_3SM +mt=Aq_Bij_djQ_hajM3kjQ +Sjt=Aq_Bij_djQ +haS=Q4ABtqid_jjh_Qa3_jk;Md +fsRjR:jlENOR.m)RHbsltRAq_Bij_djQ_haj +3bShm=_ +4jS=QjABtqid_jjh_Qa3_jk +M4S=Q4ABtqid_jjh_Qa3_jk;Mj +fsRjR:jlENOReQhRHbsltRAq_Bij_djQ_haHm +S=qAtBji_dQj_hHa_ +jSQ=qAtBji_dQj_h +a;sjRf:ljRNROEQRheblsHRQqvtAq_z 1_hpqA v_7qm_pW +_HSqm=vqQt_1Az_q hA_p 7_vqp_mWHQ +Sjv=qQ_tqA_z1 Ahqp7 _vpq_m +W;sjRf:ljRNROEq.h7RHbslMRk4l_NH_oNL_k#CLMNDDC_FSI +mM=k4l_NH_oNL_k#CLMNDDC_FSI +Qqj=vqQt_1Az_q hA_p 7_vqp_mWHQ +S4t=Aq_Bij_djQ_haHs; +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kgo_L_jjd +=Smb_F#O\D 3gkM__Loj_djjQ +Sjt=A_jjd_HO_ +4SQ=#bF_ OD\M3kno_L_jjd_ +H;sjRf:ljRNROEQRheblsHR_Atj_jjj +3sSAm=tj_jj3_jk +MdS=Qjb_F#O\D 3gkM__Loj;dj +fsRjR:jlENOR7qh.sRbHAlRtj_jj3_jlm +S=_Atj_jjjM3k4Q +Sjt=A_jjd_SO +Qb4=FO#_D3 \k_MgLjo_d +j;sjRf:ljRNROEq.h7RHbsltRA_jjj_Mj3 +=SmAjt_jjj_3jkM +jSQ=_Atj_jjOQ +S4t=A_jjj_kj3M +d;sjRf:ljRNROEmR).blsHR_Atj_jjj +3bShm=_ +.nS=QjAjt_jjj_34kM +4SQ=_Atj_jjjM3kjs; +R:fjjNRlOqERhR7.blsHR#bF_ OD\j3q_q7v_jd___N.jd_N +=Smb_F#O\D 3_qj7_vqdQ +Sjt=Aq_Bij_djQ_haHQ +S47=z1j_jj;_O +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \1 QZ_q7v_jn__jj__rNd4S9 +m_=h. +4jS=QjABtqid_jjh_Qa +_HS=Q4hn_4c;_H +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \1 QZ_q7v_jn__jj__rNdjS9 +m_=h. +jgS=QjABtqid_jjh_Qa +_HS=Q4hn_4cs; +R:fjjNRlOQERhbeRsRHlQ._.Um +S=_)Wj_jjHQ +SjW=)_jjj_ +O;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z17qqa_)7Q_jj__Nj_dm +S=.h_jS( +QAj=tiqB_jjd_aQh +4SQ=_)Wj_jjHs; +R:fjjNRlOQERhbeRsRHl1 QZ_q7v_jHr9m +S=Z1Q v_7qr_HjS9 +Q1j=Q_Z 7rvqj +9;sjRf:ljRNROEq.h7RHbslMRkdH_#xSC +mM=kdH_#xSC +Q1j=Q_Z 7rvq4S9 +Q14=Q_Z 7_vqH9rj;R +sfjj:ROlNEhRQesRbH1lRQ_Z 7_vqH9r4 +=Sm1 QZ_q7v_4Hr9Q +SjQ=1Z7 _v4qr9s; +R:fjjNRlOqERhR7.blsHRckM_x#HCm +S=ckM_x#HCQ +SjQ=1Z7 _vjqr9Q +S4Q=1Z7 _vHq_r;49 +fsRjR:jlENOReQhRHbslQR1Z7 _vjq__34_sm +S=Z1Q v_7q__j4k_3MSd +Qhj=_U..;R +sfjj:ROlNEhRq7b.RsRHl1 QZ_q7v_4j__ +3lS1m=Q_Z 7_vqj__434kM +jSQ=Z1Q v_7q9r4 +4SQ=.h_. +U;sjRf:ljRNROEq.h7RHbslQR1Z7 _vjq__34_Mm +S=Z1Q v_7q__j4k_3MSj +Qbj=FO#_D3 \1 QZ_q7v_4nr9Q +S4Q=1Z7 _vjq__34_k;Md +fsRjR:jlENOR.m)RHbslQR1Z7 _vjq__34_bm +S=4h_.Q +SjQ=1Z7 _vjq__34_k +M4S=Q41 QZ_q7v_4j__M3kjs; +R:fjjNRlOQERhbeRsRHl1 QZ_q7v_jj__ +3sS1m=Q_Z 7_vqj__j3dkM +jSQ=.h_. +U;sjRf:ljRNROEq.h7RHbslQR1Z7 _vjq__3j_lm +S=Z1Q v_7q__jjk_3MS4 +Q1j=Q_Z 7rvqjS9 +Qh4=_U..;R +sfjj:ROlNEhRq7b.RsRHl1 QZ_q7v_jj__ +3MS1m=Q_Z 7_vqj__j3jkM +jSQ=#bF_ OD\Q31Z7 _vnq_r +j9S=Q41 QZ_q7v_jj__M3kds; +R:fjjNRlOmER)b.RsRHl1 QZ_q7v_jj__ +3bShm=_ +44S=Qj1 QZ_q7v_jj__M3k4Q +S4Q=1Z7 _vjq__3j_k;Mj +fsRjR:jlENOR7qh.sRbHAlRtiqB_jjd_aQh_S4 +m_=hcjc_ +jSQ=4h_j +_HS=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHR_)Wj_jjQ_ha4m +S=ch_. +_jS=QjhU_4_SH Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHlB_pij_dj]__.H__jFS. -m_=hd_.djQ -Sj1=q_jjj_q7v_SH -QB4=pji_dHj_;R -sfjj:ROlNEmRX)b.RsRHlb_F#O\D 3BBYp7 _v6q__H4__Gj_.m -S=.h_4Hj_ -jSQ=BBYp7 _v4qr9Q -S4_=h.;nd -fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__HH__FH_.9rd -=Smhg_4n -_jS=QjO_bkCr#0dS9 -QO4=bCk_#H0_r;j9 -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__jj._Fr -d9Shm=_64g_Sj -Qhj=_U4j_SH -Qh4=_g4n;R -sfjj:ROlNEhRq7b.RsRHlk_M6C__jH._F_Sj -m_=h4_UnjQ -Sjb=Ok#_C09r4 -4SQ=kOb_0C#_dHr9s; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#j__jF..r9m -S=4h_nHg_ -jSQ=dh_nH4_ -4SQ=dh_nH._;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3gkM_ OD_jjj__bCj__jFS. -m_=h4_6UHQ -Sjb=Ok#_C0r_HjS9 -QO4=bCk_#H0_r;.9 -fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__jj__Fj_.9r. -=Smh._d4 -_HS=QjO_bkCr#0jS9 -QO4=bCk_#40r9s; -R:fjjNRlOQERhbeRsRHlO_bkC_#0H9rd -=SmO_bkC_#0H9rd -jSQ=kOb_0C#r;d9 -fsRjR:jlENOR7qh.sRbHklRMC6__Hj__ -F.Shm=_446_Sj -QOj=bCk_#d0r9Q -S4b=Ok#_C0r_H4 -9;sjRf:ljRNROEq.h7RHbsl R)1_ am_za.__jjm -S=6h_( -_jS=Qjhn_.n -_HS=Q4hn_.(;_H -fsRjR:jlENOR7qh.sRbHklRMC6__Hj_ -=Smh4_d( -_HS=Qjh6_.6 -_HS=Q4h6_.n;_H -fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__HH__dHr9m -S=dh_4Hn_ -jSQ=.h_6Hd_ -4SQ=.h_6Hc_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__jjr9m -S=_1vqtvQq#_M#r_j(S9 -Qhj=_g.._SH -Qh4=_j.d_ -H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jj_r -49S1m=vv_qQ_tqM_##j9rn -jSQ=.h_dH4_ -4SQ=.h_dH._;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__.jr9m -S=_1vqtvQq#_M#r_j6S9 -Qhj=_d.d_SH -Qh4=_c.d_ -H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jj_r -d9S1m=vv_qQ_tqM_##j9rc -jSQ=.h_dH6_ -4SQ=.h_dHn_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__6jr9m -S=_1vqtvQq#_M#r_j.S9 -Qhj=_U.d_SH -Qh4=_g.d_ -H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jj__cjr9m -S=_1vqtvQq#_M#r_jdS9 -Qhj=_U.n_SH -Qh4=_g.n_ -H;sjRf:ljRNROEq.h7RHbslFRb#D_O 7\31j_jjv_7q__cVjj__Sj -mF=b#D_O 7\31j_jjv_7q__cjQ -Sj_=hd_cnHQ -S4F=b#D_O k\3M_.dLOoN d_jjM_H0__Hj;_j -fsRjR:jlENOR7qh.sRbHqlR1j_jjv_7q__4#kJlGHN__Sj -m_=h._(.jQ -Sjp=Bid_jj -_HS=Q4b_F#O\D 3.kMdo_LN_O j_djH_M0H__jjs; -R:fjjNRlOqERhR7.blsHR4kM__sIH._N_SH -m_=hgHd_ -jSQ=qAtBji_dQj_hHa_ -4SQ=1) ma_z -a;sjRf:ljRNROEQRheblsHRiBp_jjj_H7_r -j9SBm=pji_j7j__jHr9Q -Sjp=Bij_jjr_7j -9;sjRf:ljRNROEq.h7RHbsl_RhUHU__Fj_.m -S=dh_4Hg_ +sfjj:ROlNEhRq7b.RsRHl)jW_j7j_v.q_ +=Smh4_c_Sj +Qhj=__4gHQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbHqlRjv_7q +_4Shm=__dUjQ +Sj_=h.H._ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbslFRb#D_O 1\3Q_Z 7_vqn__jj__jFj.r9m +S=4h_nHc_ +jSQ=1p7_jjj_HO_ +4SQ=1z7_jjj_HO_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3_)Wj_jjQ_ha6__jjm +S=#bF_ OD\W3)_jjj_aQh_j6_ +jSQ=4h_nHU_ +4SQ=_)WO;_H +fsRjR:jlENOR7qh.sRbHklRM14_vv_qQ_tqjJ_#lNkG_j4__S4 +mM=k4v_1_Qqvtjq__l#Jk_GN4 +_jS=Qjh6_U_SH +Qh4=_U4n_ +H;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MLn_o NO_jjj_jj_ +=Smb_F#O\D 3nkM_NLoOj _jjj_ +jSQ=qAtBji_jOj_ +4SQ=.h_nHU_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3Z1Q v_7q__nj__jj9r4 +=Smb_F#O\D 3Z1Q v_7q__nj9r4 +jSQ=.h_4Hj_ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbslFRb#D_O 1\3Q_Z 7_vqn__jjr_jjS9 +mF=b#D_O 1\3Q_Z 7_vqnr_jjS9 +Qhj=_g.j_SH +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHlqtvQqz_A1q_7a7q_Qj)__jj_ +=SmqtvQqz_A1q_7a7q_QO)__Sj +Qhj=_(.j_SH +Qh4=_U.j_ +H;sjRf:ljRNROEq.h7RHbslMRk4Od_H_HMH__jjm +S=dh_4jj_ +jSQ=XM uu_1q_B O +_HS=Q4kjM4_HOHM;_H +fsRjR:jlENOR7qh.sRbHklRM_4cNolHNk_L#N_808N_HHs__jj_ +=Smh4_d4 +_jS=QjABtqid_jjh_Qa +_HS=Q4)jW_jHj_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3nkM_NLoOj _jjj__Nj_.m +S=.h_nSU +Qqj=1j_jj +_OS=Q4hd_4(;_H +fsRjR:jlENOR7qh.sRbH1lRQ_Z 7_vqdJ_#lNkG_FH_.__HNS. +m_=h. +6(S=QjABtqid_jjh_QaQ +S4t=Aq_Bij_djQ_ha7s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\v3qQ_tqA_z1 Ahqp7 _vpq_mdW__NH_.__jNSd +m_=h4 +j.S=Qjqr_O4S9 +QA4=tiqB_jjd_aQh_ +H;sjRf:ljRNROEQRheblsHRHq_r +49Sqm=_4Hr9Q +Sj_=qO9r4;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3QqvtAq_z 1_hpqA v_7qQ_]td]__NH_.__jNSd +m_=h4 +jdS=Qjqr_H4S9 +QA4=tiqB_jjd_aQh_ +H;sjRf:ljRNROEq.h7RHbslQR1Z7 _vdq__l#Jk_GNH__HNSd +m_=h. +.US=Qjh6_.(Q +S41=)a;_O +fsRjR:jlENOR7qh.sRbH7lR1iqB4h_Qa__4#kJlG4N__jH_ +=SmhU_.j +_jS=Qjhn_U_SH +Qb4=FO#_D3 \k_MdNj#_d8j_j;_H +fsRjR:jlENOR7qh.sRbHklRMs4_I__HNH._ +=Smh(_d. +_HS=QjABtqid_jjh_Qa +_HS=Q4) 1az_mas; +R:fjjNRlOQERhbeRsRHlB_pij_jj7r_HjS9 +mp=Bij_jj__7H9rj +jSQ=iBp_jjj_j7r9s; +R:fjjNRlOqERhR7.blsHRdh_4H.__Fj_.m +S=4h_dH(_ jSQ=iBp_jjj_j7r9Q S4p=Bij_jj__7H9r4;R -sfjj:ROlNEmRX)b.RsRHlb_F#O\D 3.kMdo_LN_O j_djH_M0H__jF..__ -G.Shm=_j44_SH +sfjj:ROlNEmRX)b.RsRHlb_F#O\D 3.kM4o_LN_O j_djH_M0H__jF..__ +G.Shm=_U4d_SH QBj=Y Bp_q7vr j9S=Q4BpYB v_7q9r4;R sfjj:ROlNEhRQesRbHBlRpji_dHj_ =SmB_pij_djHQ Sjp=Bid_jj;_O -fsRjR:jlENOR7qh.sRbH7lR1iqB4h_Qa__4#kJlGHN__Fj_. -_jShm=_.4c_Sj -QBj=pji_dOj_ -4SQ=iBp_amz_ u)_H7_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_jH__Fj_.9rj -=Smhc_4c -_jS=Qjh4_dj -_HS=Q4h6_dg;_H -fsRjR:jlENOR7qh.sRbHBlRpji_d]j__H.__Nj_dm -S=dh_cS4 -QBj=pji_d]j__SH -Qh4=_dd.;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__jj__rNdcS9 -m_=h. -nUS=Qjhn_d6Q -S4v=1_Qqvtcqr9s; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#j__jjd_N_cjr9m -S=.h_nSg -Qhj=_jdn -4SQ=_1vqtvQq9r6;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3_71j_jj7_vqcj_V_jj__ -NdShm=_ndc -jSQ=_q1j_jj7 -vqS=Q4)jW_jHj_;R -sfjj:ROlNEhRq7b.RsRHl7j1_j7j_v.q__l#Jk_GNH__jNSd -m_=h. -gjS=QjB_pij_dj]Q -S4p=Bid_jj;_O +fsRjR:jlENOR7qh.sRbH7lR1iqB4h_Qa__4#kJlG4N__jH___F.4m +S=4h_cjd_ +jSQ=iBp_jjd_SO +QB4=pmi_zua_)7 __ +H;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MNd_#d_jjj_8_Fj_dm +S=#bF_ OD\M3kd#_N_jjd__8jHQ +Sj1=q_jjd__7jHQ +S4 =A)O)_;R +sfjj:ROlNEhRq7b.RsRHlk_M41qv_vqQt_#j_JGlkN__4j__4FSd +m_=h4_nUHQ +Sj_=h._njHQ +S4v=1_QqvtHq_r;(9 +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \BpYB v_7q__64__Hjd_F +=Smhn_4g +_HS=QjABtqid_jjh_Qa +_HS=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHRiBp_jjd_.]__jH__ +F.Shm=_c4(_Sj +Qqj=1j_jjv_7q +_HS=Q4B_pij_djHs; +R:fjjNRlOXERmR).blsHR#bF_ OD\Y3BB_p 7_vq6__4H__jGS. +m_=hc +j.S=QjBpYB v_7q9r4 +4SQ=4h_4 +d;sjRf:ljRNROEQRheblsHR4h_.Hc_ +=Smh._4c +_HS=Qjh._4cs; +R:fjjNRlOqERhR7.blsHR.kM.C_Lsjs___N.jd_N_S4 +mM=k.L._C_ss4Q +Sjt=Aq_Bij_jjOQ +S4_=h4;.c +fsRjR:jlENOReQhRHbslMRk4v_qQ_tqA_z1 Ahqp7 _v]q_Q_t]H._l_lH_.__j3Ss +mM=k4v_qQ_tqA_z1 Ahqp7 _v]q_Q_t]H._l_lH_.__j3dkM +jSQ=qAtBji_dQj_h +a;sjRf:ljRNROEq.h7RHbslMRk4v_qQ_tqA_z1 Ahqp7 _v]q_Q_t]H._l_lH_.__j3Sl +mM=k4v_qQ_tqA_z1 Ahqp7 _v]q_Q_t]H._l_lH_.__j34kM +jSQ=_q1j_djj_jj1BYh +4SQ=qAtBji_dQj_h +a;sjRf:ljRNROEq.h7RHbslMRk4v_qQ_tqA_z1 Ahqp7 _v]q_Q_t]H._l_lH_.__j3SM +mM=k4v_qQ_tqA_z1 Ahqp7 _v]q_Q_t]H._l_lH_.__j3jkM +jSQ=QqvtAq_z 1_hpqA v_7qQ_]tS] +Qk4=Mq4_vqQt_1Az_q hA_p 7_vq]]Qt_lH_.__Hlj.__M3kds; +R:fjjNRlOmER)b.RsRHlk_M4qtvQqz_A1h_ q Ap_q7v_t]Q]__HlH.___l.jb_3 +=Smh(_4UQ +SjM=k4v_qQ_tqA_z1 Ahqp7 _v]q_Q_t]H._l_lH_.__j34kM +4SQ=4kM_QqvtAq_z 1_hpqA v_7qQ_]tH]___l.H._l_3j_k;Mj fsRjR:jlENOReQhRHbsl1Rq_jjj_q7v_SH m1=q_jjj_q7v_SH Qqj=1j_jjv_7qs; -R:fjjNRlOQERhbeRsRHlQ._.gm +R:fjjNRlOQERhbeRsRHlQd_.jm S=_q1j_jjHQ Sj1=q_jjj_ O;sjRf:ljRNROEq.h7RHbslMRkn#_N_jjd_Nj_.__jNSd mM=kn#_N_jjd jSQ=_q1j_jj7_vqHQ S41=q_jjj_ -H;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_.dLOoN d_jjM_H0__Hj._F_N._.m -S=dh_4S4 -Qpj=7j1_jOj_ -4SQ=1z7_jjj_ -O;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jj__rN.jS9 -m_=hd -66S=Qjh4_djQ -S4v=1_Qqvtdqr9s; -R:fjjNRlOQERhbeRsRHlB_pij_jj7r_H4 -j9SBm=pji_j7j__4HrjS9 -QBj=pji_j7j_r94j;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__Nj_.r_j4S9 -m_=hd -6gS=Qjh4_dg +H;sjRf:ljRNROEq.h7RHbsl1Rq_jjj_aQh_#4_JGlkN__Hjd_N +=Smh6_U +jSQ=4h_dH(_ +4SQ=_1vqtvQq9rn;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3.kM4o_LN_O j_djH_M0H__jF..__ +N.Shm=_ndg +jSQ=1p7_jjj_SO +Qz4=7j1_jOj_;R +sfjj:ROlNEhRQesRbHBlRpji_j7j__UHr9m +S=iBp_jjj_H7_r +U9S=QjB_pij_jj79rU;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__jj__rN.4S9 +m_=h. +6cS=Qjhd_4( _HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#j__jNj._r -j9Shm=_6dn -jSQ=dh_4Sj -Qh4=_gd4;R -sfjj:ROlNEhRq7b.RsRHlk_M41qv_vqQt_#j_JGlkN__4j__jNS. -m_=hd -nnS=Qjh4_dg -_HS=Q41qv_vqQtr;j9 -fsRjR:jlENOR7qh.sRbHklRMN4_#j_jj -_jSkm=MN4_#j_jj +R:fjjNRlOqERhR7.blsHR4kM__1vqtvQq__j#kJlG4N__4j__ +N.Shm=_j.n +jSQ=4h_dH(_ +4SQ=_1vqtvQq9rj;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__jj_r +.9S1m=vv_qQ_tqM_##j9r6 +jSQ=4h_gHd_ +4SQ=.h_jHj_;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__jj_r +69S1m=vv_qQ_tqM_##j9r. +jSQ=.h_jH6_ +4SQ=.h_jHn_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3_71j_jj7_vqcj_V_jj_ +=Smb_F#O\D 3_71j_jj7_vqc +_jS=Qjh4_.4 +_HS=Q4b_F#O\D 3.kM4o_LN_O j_djH_M0H__jjs; +R:fjjNRlOqERhR7.blsHR_q1j_jj7_vq4J_#lNkG_jH_ +=Smhj_d6 +_jS=QjB_pij_djHQ +S4F=b#D_O k\3M_.4LOoN d_jjM_H0__Hj;_j +fsRjR:jlENOR7qh.sRbHklRMN4_#j_jj__HNH._ +=Smh(_d4 _HS=QjABtqid_jjh_QaQ S4 =)1_ am;za -fsRjR:jlENOReQhRHbsl_RQ. -ddSqm=]]Qt_.HrgS9 -Qqj=]]Qt_.Org -9;sjRf:ljRNROEQRheblsHR.Q_dSj -m]=qQ_t]Hjrd9Q -Sj]=qQ_t]Ojrd9s; -R:fjjNRlOQERhbeRsRHlQd_.4m -S=Qq]tH]_r9d4 -jSQ=Qq]tO]_r9d4;R -sfjj:ROlNEmRX)b.RsRHlt4_4nm -S=.h_cS4 -QQj=u7p_j9rj -4SQ=pQu_jOr9s; -R:fjjNRlOQERhbeRsRHlqj1_d7j_j -_HSqm=1d_jjj_7_SH -Qqj=1d_jjj_7;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__Nj_d9rj -=Smh._.gQ -Sj_=hd -n6S=Q41qv_vqQtr;j9 -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__jjd_N_jjr9m -S=.h_dSj -Qhj=_jdn -4SQ=_1vqtvQq9r4;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__Nj_dr_j4S9 +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k(Md__N#j_dj8Hj__SH +m_=hnjn_ +jSQ=.h_.Hg_ +4SQ=#bF_ OD\M3kd#_N_jjd__8jHs; +R:fjjNRlOqERhR7.blsHR_q1j_jjQ_ha4J_#lNkG_jH_ +=SmhU_.4 +_jS=Qjh6_U_SH +Qb4=FO#_D3 \k_MdNj#_d8j_j;_H +fsRjR:jlENOReQhRHbsl_Rq7m B7H _r94g +=Smq _7B m7_4HrgS9 +Qqj=_B7 m_7 Ogr49s; +R:fjjNRlOXERmR).blsHRiBp_amz_ u)__.6jm +S=dh_jQ +Sjp=Biz_ma)_u 6_. +4SQ=iBp_amz_ u)_;6j +fsRjR:jlENOR)Xm.sRbHtlR_(44 +=Smhc_.cQ +Sju=Qpj_7r +j9S=Q4Q_upO9rj;R +sfjj:ROlNEmRX)b.RsRHlt4_4Um +S=.h_cS6 +QQj=u7p_j9r4 +4SQ=pQu_4Or9s; +R:fjjNRlOXERmR).blsHR4t_4Sg m_=h. -d.S=Qjh6_dgQ -S4v=1_Qqvt.qr9s; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#j__jNjd_r -.9Shm=_c.d -jSQ=dh_nS6 -Q14=vv_qQrtq. -9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jj__rNddS9 -m_=h. -d6S=Qjhg_46Q -S4_=hd;66 -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__jjd_N_djr9m -S=.h_dSn -Qhj=_gd6 -4SQ=_1vqtvQq9rc;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0j#__Nj_dr_j6S9 -m_=h. -dgS=Qjh6_dgQ -S4v=1_Qqvtnqr9s; -R:fjjNRlOQERhbeRsRHlBpYB v_7qr_HjS9 -mY=BB_p 7_vqH9rj -jSQ=BBYp7 _vjqr9s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\Y3BB_p 7_vq6__jH__jNSd -m_=h. -n.S=QjBpYB v_7qr_HjS9 -Qh4=_gd4;R -sfjj:ROlNEhRQesRbHBlRpji_d]j__SH -mp=Bid_jj__]HQ -Sjp=Bid_jj;_] -fsRjR:jlENOReQhRHbslpRBiz_ma)_u j_6_SH -mp=Biz_ma)_u j_6_SH -QBj=pmi_zua_)6 _js; -R:fjjNRlOqERhR7.blsHR4t_4S4 -m_=h. -ndS=QjBpYB v_7q9rj -4SQ=dh_4Hg_;R -sfjj:ROlNEhRQesRbHhlR_4.c_SH -m_=h._c4HQ -Sj_=h.;c4 -fsRjR:jlENOReQhRHbsl_Rh._c.Hm -S=.h_cH._ +cnS=QjQ_up7.jr9Q +S4u=Qpr_O. +9;sjRf:ljRNROEQRheblsHR7q_ 7Bm r_H4 +n9Sqm=_B7 m_7 Hnr49Q +Sj_=q7m B7O _r94n;R +sfjj:ROlNEhRQesRbHBlRY Bp_q7v_jHr9m +S=BBYp7 _vHq_r +j9S=QjBpYB v_7q9rj;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3BBYp7 _v6q__Hj__Nj_dm +S=4h_gS6 +QBj=Y Bp_q7v_jHr9Q +S4_=h4;d( +fsRjR:jlENOReQhRHbsl1Rq_jjd__7jHm +S=_q1j_dj7Hj_ +jSQ=_q1j_dj7 +j;sjRf:ljRNROEQRheblsHRiBp_jjd_H]_ +=SmB_pij_dj] +_HS=QjB_pij_dj]s; +R:fjjNRlOqERhR7.blsHRiBp_jjd_.]__jH__ +NdShm=_(4g +jSQ=iBp_jjd_H]_ +4SQ=4h_( +c;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jj__Nj_d9r. +=Smhj_.jQ +Sj_=h. +6gS=Q41qv_vqQtr;.9 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__jj__jNjd_r +69Shm=_n.j +jSQ=.h_6Sc +Q14=vv_qQrtqn +9;sjRf:ljRNROEq.h7RHbslFRb#D_O 7\31j_jjv_7q__cVjj__Nj_dm +S=.h_4S4 +Qqj=1j_jjv_7qQ +S4W=)_jjj_ +H;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q7v_#._JGlkN__Hjd_N +=Smh4_..Q +Sjp=Bid_jj +_]S=Q4B_pij_djOs; +R:fjjNRlOqERhR7.blsHR4t_4S. +m_=h4 +4dS=QjBpYB v_7q9rj +4SQ=4h_dH(_;R +sfjj:ROlNEhRQesRbHhlR_c.c_SH +m_=h._ccHQ +Sj_=h.;cc +fsRjR:jlENOReQhRHbsl_Rh._c6Hm +S=.h_cH6_ jSQ=.h_c -.;sjRf:ljRNROEQRheblsHR.h_cHd_ -=Smhc_.d -_HS=Qjhc_.ds; -R:fjjNRlOQERhbeRsRHlQd_.nm +6;sjRf:ljRNROEQRheblsHR.h_cHn_ +=Smhc_.n +_HS=Qjhc_.ns; +R:fjjNRlOQERhbeRsRHlQd_.(m S=Qq]tH]_r9.c jSQ=Qq]tO]_r9.c;R -sfjj:ROlNEhRQesRbHQlR_(.d +sfjj:ROlNEhRQesRbHQlR_U.d =Smqt]Q]r_H. 69S=Qjqt]Q]r_O.;69 fsRjR:jlENOReQhRHbsl_RQ. -dcSqm=]]Qt_.HrnS9 +d6Sqm=]]Qt_.HrnS9 Qqj=]]Qt_.Orn -9;sjRf:ljRNROEQRheblsHR.Q_dS6 +9;sjRf:ljRNROEQRheblsHR.Q_dSn m]=qQ_t]H(r.9Q Sj]=qQ_t]O(r.9s; -R:fjjNRlOQERhbeRsRHlQd_..m +R:fjjNRlOQERhbeRsRHlQd_.dm S=Qq]tH]_r9.U jSQ=Qq]tO]_r9.U;R -sfjj:ROlNEhRQesRbHQlRujp_djj__3j_sm -S=pQu_jjd_jj__M3kdQ +sfjj:ROlNEhRQesRbHQlR_c.d +=Smqt]Q]r_H. +g9S=Qjqt]Q]r_O.;g9 +fsRjR:jlENOReQhRHbsl_RQ. +d4Sqm=]]Qt_dHrjS9 +Qqj=]]Qt_dOrj +9;sjRf:ljRNROEQRheblsHR.Q_dS. +m]=qQ_t]H4rd9Q +Sj]=qQ_t]O4rd9s; +R:fjjNRlOQERhbeRsRHlq _7B m7_4HrUS9 +m_=q7m B7H _r94U +jSQ=7q_ 7Bm r_O4;U9 +fsRjR:jlENOReQhRHbslpRBiz_ma)_u j_6_SH +mp=Biz_ma)_u j_6_SH +QBj=pmi_zua_)6 _js; +R:fjjNRlOQERhbeRsRHlqj1_j7j_vjq_3Ss +m1=q_jjj_q7v_kj3MSd +Qhj=_6dj;R +sfjj:ROlNEhRq7b.RsRHlqj1_j7j_vjq_3Sl +m1=q_jjj_q7v_kj3MS4 +Qbj=FO#_D3 \k4M._NLoOj _dHj_MH0__Sj +Qh4=_6dj;R +sfjj:ROlNEhRq7b.RsRHlqj1_j7j_vjq_3SM +m1=q_jjj_q7v_kj3MSj +Qqj=1j_jjv_7qQ +S41=q_jjj_q7v_kj3M +d;sjRf:ljRNROEmR).blsHR_q1j_jj7_vqj +3bShm=_SU +Qqj=1j_jjv_7q3_jk +M4S=Q4qj1_j7j_vjq_3jkM;R +sfjj:ROlNEhRq7b.RsRHlqj1_j7j_v4q_ +=Smhn_c_Sj +Qhj=_HU_ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbsl1Rq_jjd_jjj_h1YB +_4Shm=__c(jQ +Sj_=h( +_HS=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHR_q1j_jjQ_ha4m +S=ch_U +_jS=Qjh__6HQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbH7lR1iqB4h_Qa +_4Shm=__cgjQ +Sj_=hc +_HS=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHR_71j_jj7_vq4m +S=6h_j +_jS=Qjh__dHQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbHQlRu7p_jr_jjS9 +m_=h6j._ +jSQ=pQu_HO_r +j9S=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHRpQu__7jj9r4 +=Smhd_6_Sj +QQj=uOp__4Hr9Q +S41=)a;_O +fsRjR:jlENOR7qh.sRbHQlRu7p_jr_j.S9 +m_=h6jc_ +jSQ=pQu_HO_r +.9S=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHRpQu_jjd_j4r9m +S=dh_4 +_jS=Qjh(_._SH +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHlQ_upj_dj49r. +=Smhd_d_Sj +Qhj=__.gHQ +S41=)a;_O +fsRjR:jlENOReQhRHbsluRQpd_jj__jjs_3 +=SmQ_upj_djj__j3dkM +jSQ=#bF_ OD\b3HDs; +R:fjjNRlOqERhR7.blsHRpQu_jjd_jj__ +3lSQm=ujp_djj__3j_k +M4S=QjQ_upO9rj +4SQ=#bF_ OD\b3HDs; +R:fjjNRlOqERhR7.blsHRpQu_jjd_jj__ +3MSQm=ujp_djj__3j_k +MjS=QjQ_upj_djO9rj +4SQ=pQu_jjd_jj__M3kds; +R:fjjNRlOmER)b.RsRHlQ_upj_djj__j3Sb +m_=h.S( +QQj=ujp_djj__3j_k +M4S=Q4Q_upj_djj__j3jkM;R +sfjj:ROlNEhRQesRbHQlRujp_djj__3._sm +S=pQu_jjd_.j__M3kdQ SjF=b#D_O H\3b -D;sjRf:ljRNROEq.h7RHbsluRQpd_jj__jjl_3 -=SmQ_upj_djj__j34kM -jSQ=pQu_jOr9Q +D;sjRf:ljRNROEq.h7RHbsluRQpd_jj__j.l_3 +=SmQ_upj_djj__.34kM +jSQ=pQu_.Or9Q S4F=b#D_O H\3b -D;sjRf:ljRNROEq.h7RHbsluRQpd_jj__jjM_3 -=SmQ_upj_djj__j3jkM -jSQ=pQu_jjd_jOr9Q -S4u=Qpd_jj__jjk_3M -d;sjRf:ljRNROEmR).blsHRpQu_jjd_jj__ +D;sjRf:ljRNROEq.h7RHbsluRQpd_jj__j.M_3 +=SmQ_upj_djj__.3jkM +jSQ=pQu_jjd_.Or9Q +S4u=Qpd_jj__j.k_3M +d;sjRf:ljRNROEmR).blsHRpQu_jjd_.j__ 3bShm=_ -.(S=QjQ_upj_djj__j34kM -4SQ=pQu_jjd_jj__M3kjs; +.gS=QjQ_upj_djj__.34kM +4SQ=pQu_jjd_.j__M3kjs; R:fjjNRlOQERhbeRsRHlk_Mck_8#j_jjHm S=ckM_#k8_jjj_SH Qkj=Mkc_8j#_j @@ -3479,12 +3418,12 @@ mM=kn#_8_jjd_SH Qkj=M8n_#d_jjs; R:fjjNRlOQERhbeRsRHl7j1_j7j_vjq_3Ss m1=7_jjj_q7v_kj3MSd -Qhj=_d.(;R +Qhj=_(dj;R sfjj:ROlNEhRq7b.RsRHl7j1_j7j_vjq_3Sl m1=7_jjj_q7v_kj3MS4 Qbj=FO#_D3 \7j1_j7j_vcq_ -4SQ=.h_( -d;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q7v_Mj3 +4SQ=dh_j +(;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q7v_Mj3 =Sm7j1_j7j_vjq_3jkM jSQ=_71j_jj7 vqS=Q47j1_j7j_vjq_3dkM;R @@ -3492,37 +3431,58 @@ sfjj:ROlNE)Rm.sRbH7lR1j_jjv_7q3_jbm S=dh_ jSQ=_71j_jj7_vqjM3k4Q S41=7_jjj_q7v_kj3M -j;sjRf:ljRNROEQRheblsHR_q1j_jj7_vqj -3sSqm=1j_jjv_7q3_jk -MdS=Qjh(_..s; -R:fjjNRlOqERhR7.blsHR_q1j_jj7_vqj -3lSqm=1j_jjv_7q3_jk -M4S=Qjb_F#O\D 3.kMdo_LN_O j_djH_M0H -_jS=Q4h(_..s; -R:fjjNRlOqERhR7.blsHR_q1j_jj7_vqj -3MSqm=1j_jjv_7q3_jk -MjS=Qjqj1_j7j_vSq -Qq4=1j_jjv_7q3_jk;Md -fsRjR:jlENOR.m)RHbsl1Rq_jjj_q7v_bj3 -=Smh -_US=Qjqj1_j7j_vjq_34kM -4SQ=_q1j_jj7_vqjM3kjs; -R:fjjNRlOqERhR7.blsHR_q1j_jj7_vq4m -S=ch_6 -_jS=Qjh__UHQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbH7lR1j_jjv_7q -_4Shm=__cgjQ -Sj_=hd -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHRpQu__7jj9rj -=Smh4_6_Sj -QQj=uOp__jHr9Q -S41=)a;_O -fsRjR:jlENOR7qh.sRbHQlRujp_d4j_r -j9Shm=__djjQ -Sj_=h.H(_ -4SQ=a)1_ -O; +j;sjRf:ljRNROEQRheblsHRUh_n +_HShm=__UnHQ +Sj_=hU +n;sjRf:ljRNROEQRheblsHRq71B_i4Q_haj +3sS7m=1iqB4h_Qa3_jk +MdS=QjhU_.js; +R:fjjNRlOqERhR7.blsHRq71B_i4Q_haj +3lS7m=1iqB4h_Qa3_jk +M4S=Qjhn_U_SH +Qh4=_j.U;R +sfjj:ROlNEhRq7b.RsRHl7B1qiQ4_hja_3SM +m1=7q4Bi_aQh_kj3MSj +Q7j=1iqB4h_QaQ +S41=7q4Bi_aQh_kj3M +d;sjRf:ljRNROEmR).blsHRq71B_i4Q_haj +3bShm=_Sc +Q7j=1iqB4h_Qa3_jk +M4S=Q47B1qiQ4_hja_3jkM;R +sfjj:ROlNEhRQesRbHhlR__U6Hm +S=Uh_6 +_HS=Qjh6_U;R +sfjj:ROlNEhRQesRbHqlR1j_jjh_Qa3_jsm +S=_q1j_jjQ_hajM3kdQ +Sj_=h.;U4 +fsRjR:jlENOR7qh.sRbHqlR1j_jjh_Qa3_jlm +S=_q1j_jjQ_hajM3k4Q +Sj_=hUH6_ +4SQ=.h_U +4;sjRf:ljRNROEq.h7RHbsl1Rq_jjj_aQh_Mj3 +=Smqj1_jQj_hja_3jkM +jSQ=_q1j_jjQ +haS=Q4qj1_jQj_hja_3dkM;R +sfjj:ROlNE)Rm.sRbHqlR1j_jjh_Qa3_jbm +S=6h_ +jSQ=_q1j_jjQ_hajM3k4Q +S41=q_jjj_aQh_kj3M +j;sjRf:ljRNROEQRheblsHR_q1j_djj_jj1BYh_sj3 +=Smqj1_djj_j1j_Y_hBjM3kdQ +Sj_=hn +n;sjRf:ljRNROEq.h7RHbsl1Rq_jjd_jjj_h1YB3_jlm +S=_q1j_djj_jj1BYh_kj3MS4 +Qbj=FO#_D3 \k_MdNj#_d8j_jQ +S4_=hn +n;sjRf:ljRNROEq.h7RHbsl1Rq_jjd_jjj_h1YB3_jMm +S=_q1j_djj_jj1BYh_kj3MSj +Qqj=1d_jjj_jjY_1hSB +Qq4=1d_jjj_jjY_1hjB_3dkM;R +sfjj:ROlNE)Rm.sRbHqlR1d_jjj_jjY_1hjB_3Sb +m_=h(Q +Sj1=q_jjd_jjj_h1YB3_jk +M4S=Q4qj1_djj_j1j_Y_hBjM3kj +; + @ diff --git a/Logic/BUS68030.srr b/Logic/BUS68030.srr index 70cd89e..ab51d4f 100644 --- a/Logic/BUS68030.srr +++ b/Logic/BUS68030.srr @@ -6,7 +6,7 @@ #Implementation: logic $ Start of Compile -#Fri Aug 19 00:39:28 2016 +#Wed Aug 24 22:17:42 2016 Synopsys VHDL Compiler, version comp201403rcp1, Build 060R, built May 27 2014 @N|Running in 64-bit mode @@ -18,17 +18,16 @@ File C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd changed - VHDL syntax check successful! File C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd changed - recompiling @N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral -@N: CD233 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":69:10:69:11|Using sequential encoding for type sm_e -@N: CD233 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":86:14:86:15|Using sequential encoding for type sm_68000 -@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":127:7:127:17|Signal clk_out_pre is undriven +@N: CD233 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":70:10:70:11|Using sequential encoding for type sm_e +@N: CD233 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":87:14:87:15|Using sequential encoding for type sm_68000 +@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":128:7:128:17|Signal clk_out_pre is undriven Post processing for work.bus68030.behavioral -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":130:38:130:40|Pruning register DS_030_D0_3 -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":130:38:130:40|Pruning register nEXP_SPACE_D0_3 -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":129:34:129:36|Pruning register CLK_OUT_EXP_INT_1 -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":125:36:125:38|Pruning register CLK_OUT_PRE_25_3 -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":153:2:153:3|Pruning register CLK_030_D0_2 -@W: CL189 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":130:38:130:40|Register bit BGACK_030_INT_PRE is always 1, optimizing ... -@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":130:38:130:40|Trying to extract state machine for register SM_AMIGA +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register DS_030_D0_3 +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register nEXP_SPACE_D0_3 +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register BGACK_030_INT_PRE_2 +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":130:34:130:36|Pruning register CLK_OUT_EXP_INT_2 +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":154:2:154:3|Pruning register CLK_030_D0_2 +@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:38:131:40|Trying to extract state machine for register SM_AMIGA Extracted state machine for register SM_AMIGA State machine has 8 reachable states with original encodings of: 000 @@ -39,14 +38,14 @@ State machine has 8 reachable states with original encodings of: 101 110 111 -@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":130:38:130:40|Trying to extract state machine for register cpu_est +@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:38:131:40|Trying to extract state machine for register cpu_est @W: CL246 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":24:1:24:8|Input port bits 15 to 2 of a_decode(23 downto 2) are unused @END At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 71MB peak: 72MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Fri Aug 19 00:39:28 2016 +# Wed Aug 24 22:17:43 2016 ###########################################################] Synopsys Netlist Linker, version comp201403rcp1, Build 060R, built May 27 2014 @@ -56,7 +55,7 @@ File C:\users\matze\documents\github\68030tk\logic\synwork\BUS68030_comp.srs cha At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Fri Aug 19 00:39:29 2016 +# Wed Aug 24 22:17:44 2016 ###########################################################] Map & Optimize Report @@ -65,7 +64,7 @@ Synopsys CPLD Technology Mapper, Version maplat, Build 923R, Built May 6 2014 Copyright (C) 1994-2013, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use or distribution of the software is strictly prohibited. Product Version I-2014.03LC @N: MF248 |Running in 64-bit mode. -@N:"c:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":130:38:130:40|Found counter in view:work.BUS68030(behavioral) inst RST_DLY[2:0] +@N:"c:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:38:131:40|Found counter in view:work.BUS68030(behavioral) inst RST_DLY[2:0] Encoding state machine SM_AMIGA[0:7] (view:work.BUS68030(behavioral)) original code -> new code 000 -> 00000000 @@ -80,15 +79,15 @@ original code -> new code Resource Usage Report Simple gate primitives: -DFF 63 uses +DFF 62 uses BI_DIR 18 uses BUFTH 4 uses IBUF 38 uses OBUF 15 uses -AND2 295 uses -INV 265 uses +AND2 289 uses +INV 262 uses OR2 25 uses -XOR2 5 uses +XOR2 6 uses @N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis. @@ -98,6 +97,6 @@ Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 39MB peak: 105MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Fri Aug 19 00:39:30 2016 +# Wed Aug 24 22:17:44 2016 ###########################################################] diff --git a/Logic/BUS68030.srs b/Logic/BUS68030.srs index de3b191..b5456ec 100644 Binary files a/Logic/BUS68030.srs and b/Logic/BUS68030.srs differ diff --git a/Logic/Programming.xcf b/Logic/Programming.xcf index 89bbd7c..1aed60e 100644 --- a/Logic/Programming.xcf +++ b/Logic/Programming.xcf @@ -19,8 +19,8 @@ 0 C:\Users\Matze\Documents\GitHub\68030tk\Logic\68030_tk.jed - 08/17/16 17:45:51 - 0x2728 + 08/19/16 00:39:40 + 0x4245 Erase,Program,Verify