diff --git a/Logic/68030-68000-bus.vhd b/Logic/68030-68000-bus.vhd index dc6ffef..1dd697a 100644 --- a/Logic/68030-68000-bus.vhd +++ b/Logic/68030-68000-bus.vhd @@ -22,6 +22,7 @@ port( SIZE: inout std_logic_vector ( 1 downto 0 ); A: in std_logic_vector ( 31 downto 16 ); A0: inout std_logic; + A1: in std_logic; nEXP_SPACE: in std_logic ; BERR: inout std_logic ; BG_030: in std_logic ; @@ -98,7 +99,10 @@ signal SM_AMIGA : AMIGA_STATE; signal AS_000_INT:STD_LOGIC := '1'; signal RW_000_INT:STD_LOGIC := '1'; signal AMIGA_BUS_ENABLE_INT:STD_LOGIC := '1'; +signal AMIGA_BUS_ENABLE_DMA_HIGH:STD_LOGIC := '1'; +signal AMIGA_BUS_ENABLE_DMA_LOW:STD_LOGIC := '1'; signal AS_030_D0:STD_LOGIC := '1'; +signal nEXP_SPACE_D0:STD_LOGIC := '1'; signal DS_030_D0:STD_LOGIC := '1'; signal AS_030_000_SYNC:STD_LOGIC := '1'; signal BGACK_030_INT:STD_LOGIC := '1'; @@ -114,8 +118,6 @@ signal UDS_000_INT: STD_LOGIC := '1'; signal LDS_000_INT: STD_LOGIC := '1'; signal DS_000_ENABLE: STD_LOGIC := '0'; signal DSACK1_INT: STD_LOGIC := '1'; -signal CLK_CNT_P: STD_LOGIC_VECTOR ( 1 downto 0 ) := "00"; -signal CLK_CNT_N: STD_LOGIC_VECTOR ( 1 downto 0 ) := "00"; signal CLK_REF: STD_LOGIC_VECTOR ( 1 downto 0 ) := "10"; signal CLK_OUT_PRE_50: STD_LOGIC := '1'; signal CLK_OUT_PRE_50_D: STD_LOGIC := '1'; @@ -142,19 +144,6 @@ signal DTACK_D0: STD_LOGIC := '1'; begin - - --the clocks - neg_clk: process(CLK_OSZI) - begin - if(falling_edge(CLK_OSZI)) then - if(CLK_CNT_N = "10" or RST = '0') then - CLK_CNT_N <= "00"; - else - CLK_CNT_N <= CLK_CNT_N+1; - end if; - end if; - end process neg_clk; - --pos edge clock pos_clk: process(CLK_OSZI) begin @@ -163,11 +152,6 @@ begin CLK_OUT_PRE_50 <= not CLK_OUT_PRE_50; CLK_OUT_PRE_50_D<= CLK_OUT_PRE_50; - if(CLK_CNT_P = "10" or RST = '0') then - CLK_CNT_P <= "00"; - else - CLK_CNT_P <= CLK_CNT_P+1; - end if; if(CLK_OUT_PRE_50='1' and CLK_OUT_PRE_50_D='0')then CLK_OUT_PRE_25 <= not CLK_OUT_PRE_25; @@ -233,17 +217,6 @@ begin end if; end process pos_clk; - CLK_PRE_66 <= (not CLK_CNT_N(0) and CLK_CNT_P(0)) or - (CLK_CNT_N(1) and CLK_CNT_P(1)); - - process_33_clk:process(CLK_PRE_66) - begin - if(rising_edge(CLK_PRE_66)) then - CLK_OUT_PRE_33 <= not CLK_OUT_PRE_33; - CLK_OUT_PRE_33_D <= CLK_OUT_PRE_33; - end if; - end process process_33_clk; - --output clock assignment CLK_DIV_OUT <= CLK_OUT_PRE_D; CLK_EXP <= CLK_OUT_PRE_D; @@ -276,7 +249,10 @@ begin SIZE_DMA <= "11"; A0_DMA <= '1'; AMIGA_BUS_ENABLE_INT <= '1'; + AMIGA_BUS_ENABLE_DMA_HIGH <= '1'; + AMIGA_BUS_ENABLE_DMA_LOW <= '1'; AS_030_D0 <= '1'; + nEXP_SPACE_D0 <= '1'; DS_030_D0 <= '1'; CLK_030_H <= '0'; elsif(rising_edge(CLK_OSZI)) then @@ -287,6 +263,7 @@ begin --buffering signals AS_030_D0 <= AS_030; + nEXP_SPACE_D0 <= nEXP_SPACE; DS_030_D0 <= DS_030; DTACK_D0 <= DTACK; VPA_D <= VPA; @@ -309,7 +286,7 @@ begin if(BG_030= '1')then BG_000 <= '1'; elsif( BG_030= '0' --AND (SM_AMIGA = IDLE_P) - and nEXP_SPACE = '1' and AS_030_D0='1' + and nEXP_SPACE_D0 = '1' and AS_030_D0='1' and CLK_000_D0='1' --and CLK_000_D0='1' AND CLK_000_D1='0' ) then --bus granted no local access and no AS_030 running! @@ -336,7 +313,7 @@ begin AS_030_D0 = '0' AND --as set BGACK_000='1' AND --no dma -cycle NOT (FC(1)='1' and FC(0)='1' and A(19)='0' and A(18)='0' and A(17)='1' and A(16)='0') AND --FPU-Select - nEXP_SPACE ='1' and --not an expansion space cycle + nEXP_SPACE_D0 ='1' and --not an expansion space cycle SM_AMIGA = IDLE_P --last amiga cycle terminated ) then AS_030_000_SYNC <= '0'; @@ -375,7 +352,7 @@ begin case (SM_AMIGA) is when IDLE_P => --68000:S0 wait for a falling edge RW_000_INT <= '1'; - if( CLK_000_D0='0' and CLK_000_D1= '1' and AS_030_000_SYNC = '0' and nEXP_SPACE ='1')then -- if this a delayed expansion space detection, do not start an amiga cycle! + if( CLK_000_D0='0' and CLK_000_D1= '1' and AS_030_000_SYNC = '0' and nEXP_SPACE_D0 ='1')then -- if this a delayed expansion space detection, do not start an amiga cycle! AMIGA_BUS_ENABLE_INT <= '0' ;--for now: allways on for amiga SM_AMIGA<=IDLE_N; --go to s1 else @@ -477,13 +454,18 @@ begin A0_DMA <= UDS_000; --A1 is set by the amiga side + --here we determine the upper or lower half of the databus + AMIGA_BUS_ENABLE_DMA_HIGH <= A1; + AMIGA_BUS_ENABLE_DMA_LOW <= not A1; else AS_000_DMA <= '1'; DS_000_DMA <= '1'; SIZE_DMA <= "11"; A0_DMA <= '0'; RW_000_DMA <= '1'; - CLK_030_H <= '0'; + CLK_030_H <= '0'; + AMIGA_BUS_ENABLE_DMA_HIGH <= '1'; + AMIGA_BUS_ENABLE_DMA_LOW <= '1'; end if; end if; end process state_machine; @@ -494,26 +476,37 @@ begin -- bus drivers AMIGA_ADDR_ENABLE <= AMIGA_BUS_ENABLE_INT; - AMIGA_BUS_ENABLE_HIGH <= AMIGA_BUS_ENABLE_INT; - AMIGA_BUS_ENABLE_LOW <= '1'; + AMIGA_BUS_ENABLE_HIGH <= '0' WHEN BGACK_030_INT ='1' AND AMIGA_BUS_ENABLE_INT ='0' ELSE + '0' WHEN BGACK_030_INT ='0' AND AMIGA_BUS_ENABLE_DMA_HIGH = '0' ELSE + '1'; + AMIGA_BUS_ENABLE_LOW <= '0' WHEN BGACK_030_INT ='0' AND AMIGA_BUS_ENABLE_DMA_LOW = '0' ELSE + '1'; + + AMIGA_BUS_DATA_DIR <= '1' WHEN (RW_000='0' AND BGACK_030_INT ='1') ELSE --Amiga WRITE '0' WHEN (RW_000='1' AND BGACK_030_INT ='1') ELSE --Amiga READ - '1' WHEN (RW_000='1' AND BGACK_030_INT ='0' AND nEXP_SPACE = '0' AND AS_000 = '0') ELSE --DMA READ to expansion space - '0' WHEN (RW_000='0' AND BGACK_030_INT ='0' AND nEXP_SPACE = '0' AND AS_000 = '0') ELSE --DMA WRITE to expansion space + '1' WHEN (RW_000='1' AND BGACK_030_INT ='0' AND nEXP_SPACE_D0 = '0' AND AS_000 = '0') ELSE --DMA READ to expansion space + '0' WHEN (RW_000='0' AND BGACK_030_INT ='0' AND nEXP_SPACE_D0 = '0' AND AS_000 = '0') ELSE --DMA WRITE to expansion space '0'; --Point towarts TK --dma stuff - DTACK <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' OR AS_000_DMA ='1' else - DSACK1; - AS_030 <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' OR AS_000_DMA ='1' else - AS_000_DMA; - DS_030 <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' OR AS_000_DMA ='1' else - DS_000_DMA; - A0 <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' OR AS_000_DMA ='1' else - A0_DMA; - SIZE <= "ZZ" when BGACK_030_INT ='1' OR nEXP_SPACE = '1' OR AS_000_DMA ='1' else - SIZE_DMA; + DTACK <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE_D0 = '1' OR AS_000_DMA ='1' else + '0' when DSACK1 ='0' else + '1'; + AS_030 <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE_D0 = '1' OR AS_000_DMA ='1' else + '0' when AS_000_DMA ='0' else + '1'; + DS_030 <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE_D0 = '1' OR AS_000_DMA ='1' else + '0' when DS_000_DMA ='0' else + '1'; + A0 <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE_D0 = '1' OR AS_000_DMA ='1' else + '0' when A0_DMA ='0' else + '1'; + SIZE <= "ZZ" when BGACK_030_INT ='1' OR nEXP_SPACE_D0 = '1' OR AS_000_DMA ='1' else + "10" when SIZE_DMA ="10" else + "01" when SIZE_DMA ="01" else + "11"; --fpu FPU_CS <= '0' when AS_030 ='0' and FC(1)='1' and FC(0)='1' and A(19)='0' and A(18)='0' and A(17)='1' and A(16)='0' AND BGACK_000='1' AND FPU_SENSE ='0' @@ -528,7 +521,7 @@ begin --cache inhibit: Tristate for expansion (it decides) and off for the Amiga CIIN <= '1' WHEN A(31 downto 20) = x"00F" and AS_030_D0 ='0' ELSE -- Enable for Kick-rom - 'Z' WHEN (not(A(31 downto 24) = x"00") and AS_030 ='0') OR nEXP_SPACE = '0' ELSE --Tristate for expansion (it decides) + 'Z' WHEN (not(A(31 downto 24) = x"00") and AS_030 ='0') OR nEXP_SPACE_D0 = '0' ELSE --Tristate for expansion (it decides) '0'; --off for the Amiga @@ -541,24 +534,31 @@ begin AVEC <= '1'; --as and uds/lds - AS_000 <= 'Z' when BGACK_030_INT ='0' else - AS_000_INT; - RW_000 <= 'Z' when BGACK_030_INT ='0' else - RW_000_INT; + AS_000 <= 'Z' when BGACK_030_INT ='0' else + '0' when AS_000_INT ='0' and AS_030 ='0' else + '1'; + RW_000 <= 'Z' when BGACK_030_INT ='0' else + '0' when RW_000_INT ='0' else + '1'; - UDS_000 <= 'Z' when BGACK_030_INT ='0' else -- output on cpu cycle - '1' when DS_000_ENABLE ='0' else -- datastrobe not ready jet - UDS_000_INT; - LDS_000 <= 'Z' when BGACK_030_INT ='0' else -- output on cpu cycle - '1' when DS_000_ENABLE ='0' else -- datastrobe not ready jet - LDS_000_INT; + UDS_000 <= 'Z' when BGACK_030_INT ='0' else -- output on cpu cycle + --'1' when DS_000_ENABLE ='0' else + '0' when UDS_000_INT ='0' and DS_000_ENABLE ='1' and DS_030 ='0' else -- datastrobe not ready jet + '1'; + LDS_000 <= 'Z' when BGACK_030_INT ='0' else -- output on cpu cycle + --'1' when DS_000_ENABLE ='0' else + '0' when LDS_000_INT ='0' and DS_000_ENABLE ='1' and DS_030 ='0' else -- datastrobe not ready jet + '1'; --dsack - DSACK1 <= 'Z' when nEXP_SPACE = '0' else -- output on amiga cycle - DSACK1_INT; + DSACK1 <= 'Z' when nEXP_SPACE_D0 = '0' else -- output on amiga cycle + '0' when DSACK1_INT ='0' else + '1'; + --rw - RW <= 'Z' when BGACK_030_INT ='1' else - RW_000_DMA; + RW <= 'Z' when BGACK_030_INT ='1' else + '0' when RW_000_DMA ='0' else + '1'; BGACK_030 <= BGACK_030_INT; end Behavioral; \ No newline at end of file diff --git a/Logic/68030_TK.STY b/Logic/68030_TK.STY index 87b50cc..7115a64 100644 --- a/Logic/68030_TK.STY +++ b/Logic/68030_TK.STY @@ -1,6 +1,6 @@ [STRATEGY-LIST] Normal=True, 1385910337 [TOUCHED-REPORT] -Design.tt4File=1407940994 +Design.tt4File=1410033670 [synthesis-type] tool=Synplify diff --git a/Logic/68030_TK.cmi b/Logic/68030_TK.cmi index 77ae322..beff0c4 100644 --- a/Logic/68030_TK.cmi +++ b/Logic/68030_TK.cmi @@ -1,15 +1,15 @@ [WINDOWS] -MAIN_WINDOW_POSITION=0,0,1920,1200 +MAIN_WINDOW_POSITION=0,185,1920,1200 LEFT_PANE_WIDTH=634 CHILD_FRAME_STATE=Maximal -CHILD_WINDOW_SIZE=1920,974 +CHILD_WINDOW_SIZE=1920,790 CHILD_WINDOW_POS=-8,-30 [GUI SETTING] Remember_Setting=1 Open_PV_Opt=2 Open_PV=0 PV_IS_ACTIVE=0 -ACTIVE_SHEET=Global Constraints +ACTIVE_SHEET=Pin Attributes Show_Def_Opt=2 Show_Def_Val=1 Expand_All_Column=0 @@ -28,7 +28,7 @@ Pin=32,no Power=50,no Slewrate=64,no [Global Constraints] -Constraint Name=117,no +Constraint Name=199,no Constraint Value=115,no [Resource Reservation] Segment=66,no diff --git a/Logic/68030_TK.lci b/Logic/68030_TK.lci index 7ac63ab..43ecab7 100644 --- a/Logic/68030_TK.lci +++ b/Logic/68030_TK.lci @@ -12,8 +12,8 @@ EN_PinMacrocell = Yes; [Revision] Parent = m4a5.lci; -DATE = 08/13/2014; -TIME = 16:43:14; +DATE = 09/06/2014; +TIME = 22:01:10; Source_Format = Pure_VHDL; Synthesis = Synplify; @@ -33,6 +33,7 @@ Max_fanin = 32; Set_reset_dont_care = Yes; Balanced_partitioning = Yes; Max_macrocell_percent = 100; +Dt_synthesis = No; [Location Assignments] layer = OFF; @@ -96,6 +97,7 @@ AMIGA_ADDR_ENABLE = Pin, 33, -, D, -; AMIGA_BUS_ENABLE_HIGH = Pin, 34, -, D, -; A_23_ = Pin, 85, -, H, -; FPU_SENSE = Pin, 91, -, A, -; +A1 = Pin, 60, -, F, -; [Group Assignments] layer = OFF; @@ -127,6 +129,8 @@ layer = OFF; Default = UP; [Slewrate] +FAST = CLK_DIV_OUT, CLK_EXP, FPU_CS, AMIGA_BUS_DATA_DIR, AMIGA_BUS_ENABLE_LOW, + AMIGA_ADDR_ENABLE, AMIGA_BUS_ENABLE_HIGH; Default = Slow; [Region] diff --git a/Logic/68030_TK.lct b/Logic/68030_TK.lct index 7ac63ab..43ecab7 100644 --- a/Logic/68030_TK.lct +++ b/Logic/68030_TK.lct @@ -12,8 +12,8 @@ EN_PinMacrocell = Yes; [Revision] Parent = m4a5.lci; -DATE = 08/13/2014; -TIME = 16:43:14; +DATE = 09/06/2014; +TIME = 22:01:10; Source_Format = Pure_VHDL; Synthesis = Synplify; @@ -33,6 +33,7 @@ Max_fanin = 32; Set_reset_dont_care = Yes; Balanced_partitioning = Yes; Max_macrocell_percent = 100; +Dt_synthesis = No; [Location Assignments] layer = OFF; @@ -96,6 +97,7 @@ AMIGA_ADDR_ENABLE = Pin, 33, -, D, -; AMIGA_BUS_ENABLE_HIGH = Pin, 34, -, D, -; A_23_ = Pin, 85, -, H, -; FPU_SENSE = Pin, 91, -, A, -; +A1 = Pin, 60, -, F, -; [Group Assignments] layer = OFF; @@ -127,6 +129,8 @@ layer = OFF; Default = UP; [Slewrate] +FAST = CLK_DIV_OUT, CLK_EXP, FPU_CS, AMIGA_BUS_DATA_DIR, AMIGA_BUS_ENABLE_LOW, + AMIGA_ADDR_ENABLE, AMIGA_BUS_ENABLE_HIGH; Default = Slow; [Region] diff --git a/Logic/68030_TK.tcl b/Logic/68030_TK.tcl index dd22922..87de3c0 100644 --- a/Logic/68030_TK.tcl +++ b/Logic/68030_TK.tcl @@ -265220,3 +265220,7642 @@ if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 6 ########## Tcl recorder end at 08/26/14 20:07:08 ########### + +########## Tcl recorder starts at 09/01/14 22:35:38 ########## + +# Commands to make the Process: +# Constraint Editor +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +# Application to view the Process: +# Constraint Editor +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -lci \"68030_tk.lct\" -touch \"68030_tk.tt4\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/01/14 22:35:38 ########### + + +########## Tcl recorder starts at 09/01/14 22:37:06 ########## + +# Commands to make the Process: +# Optimization Constraint +# - none - +# Application to view the Process: +# Optimization Constraint +if [catch {open opt_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file opt_cmd.rs2: $rspFile" +} else { + puts $rspFile "-global -lci 68030_tk.lct -touch 68030_tk.imp +" + close $rspFile +} +if [runCmd "\"$cpld_bin/optedit\" @opt_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/01/14 22:37:06 ########### + + +########## Tcl recorder starts at 09/01/14 22:37:40 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/01/14 22:37:40 ########### + + +########## Tcl recorder starts at 09/01/14 22:41:38 ########## + +# Commands to make the Process: +# Optimization Constraint +# - none - +# Application to view the Process: +# Optimization Constraint +if [catch {open opt_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file opt_cmd.rs2: $rspFile" +} else { + puts $rspFile "-global -lci 68030_tk.lct -touch 68030_tk.imp +" + close $rspFile +} +if [runCmd "\"$cpld_bin/optedit\" @opt_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/01/14 22:41:38 ########### + + +########## Tcl recorder starts at 09/01/14 22:43:03 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/01/14 22:43:03 ########### + + +########## Tcl recorder starts at 09/01/14 22:44:20 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/01/14 22:44:20 ########### + + +########## Tcl recorder starts at 09/01/14 22:47:56 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/01/14 22:47:56 ########### + + +########## Tcl recorder starts at 09/01/14 22:52:28 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/01/14 22:52:28 ########### + + +########## Tcl recorder starts at 09/01/14 22:52:28 ########## + +# Commands to make the Process: +# ISC-1532 File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2i "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/01/14 22:52:28 ########### + + +########## Tcl recorder starts at 09/01/14 22:53:33 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/01/14 22:53:33 ########### + + +########## Tcl recorder starts at 09/01/14 22:53:33 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/01/14 22:53:33 ########### + + +########## Tcl recorder starts at 09/01/14 22:54:45 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/01/14 22:54:45 ########### + + +########## Tcl recorder starts at 09/01/14 22:54:45 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/01/14 22:54:45 ########### + + +########## Tcl recorder starts at 09/01/14 23:02:16 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/01/14 23:02:16 ########### + + +########## Tcl recorder starts at 09/01/14 23:02:16 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/01/14 23:02:16 ########### + + +########## Tcl recorder starts at 09/04/14 21:24:43 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/04/14 21:24:43 ########### + + +########## Tcl recorder starts at 09/04/14 21:24:44 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/04/14 21:24:44 ########### + + +########## Tcl recorder starts at 09/04/14 21:25:06 ########## + +# Commands to make the Process: +# Constraint Editor +# - none - +# Application to view the Process: +# Constraint Editor +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -lci \"68030_tk.lct\" -touch \"68030_tk.tt4\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/04/14 21:25:07 ########### + + +########## Tcl recorder starts at 09/04/14 21:25:20 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/04/14 21:25:20 ########### + + +########## Tcl recorder starts at 09/04/14 21:35:23 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/04/14 21:35:23 ########### + + +########## Tcl recorder starts at 09/04/14 21:35:23 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/04/14 21:35:23 ########### + + +########## Tcl recorder starts at 09/06/14 20:57:15 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/06/14 20:57:15 ########### + + +########## Tcl recorder starts at 09/06/14 20:57:16 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/06/14 20:57:16 ########### + + +########## Tcl recorder starts at 09/06/14 21:01:03 ########## + +# Commands to make the Process: +# Constraint Editor +# - none - +# Application to view the Process: +# Constraint Editor +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -lci \"68030_tk.lct\" -touch \"68030_tk.tt4\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/06/14 21:01:03 ########### + + +########## Tcl recorder starts at 09/06/14 21:01:28 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/06/14 21:01:28 ########### + + +########## Tcl recorder starts at 09/06/14 21:07:04 ########## + +# Commands to make the Process: +# Constraint Editor +# - none - +# Application to view the Process: +# Constraint Editor +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -lci \"68030_tk.lct\" -touch \"68030_tk.tt4\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/06/14 21:07:04 ########### + + +########## Tcl recorder starts at 09/06/14 21:07:14 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/06/14 21:07:14 ########### + + +########## Tcl recorder starts at 09/06/14 21:59:45 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/06/14 21:59:45 ########### + + +########## Tcl recorder starts at 09/06/14 21:59:45 ########## + +# Commands to make the Process: +# Constraint Editor +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +# Application to view the Process: +# Constraint Editor +if [catch {open lattice_cmd.rs2 w} rspFile] { + puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile" +} else { + puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -lci \"68030_tk.lct\" -touch \"68030_tk.tt4\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/06/14 21:59:45 ########### + + +########## Tcl recorder starts at 09/06/14 22:01:13 ########## + +# Commands to make the Process: +# JEDEC File +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/06/14 22:01:13 ########### + + +########## Tcl recorder starts at 09/12/14 15:53:00 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 15:53:00 ########### + + +########## Tcl recorder starts at 09/12/14 15:53:00 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 15:53:00 ########### + + +########## Tcl recorder starts at 09/12/14 16:09:28 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 16:09:28 ########### + + +########## Tcl recorder starts at 09/12/14 16:09:28 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 16:09:28 ########### + + +########## Tcl recorder starts at 09/12/14 16:10:48 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 16:10:48 ########### + + +########## Tcl recorder starts at 09/12/14 16:10:48 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 16:10:48 ########### + + +########## Tcl recorder starts at 09/12/14 16:11:25 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 16:11:25 ########### + + +########## Tcl recorder starts at 09/12/14 16:11:26 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 16:11:26 ########### + + +########## Tcl recorder starts at 09/12/14 16:15:21 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 16:15:21 ########### + + +########## Tcl recorder starts at 09/12/14 16:15:21 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 16:15:21 ########### + + +########## Tcl recorder starts at 09/12/14 16:15:40 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 16:15:40 ########### + + +########## Tcl recorder starts at 09/12/14 16:15:41 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 16:15:41 ########### + + +########## Tcl recorder starts at 09/12/14 18:44:41 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 18:44:41 ########### + + +########## Tcl recorder starts at 09/12/14 18:44:41 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 18:44:41 ########### + + +########## Tcl recorder starts at 09/12/14 18:45:13 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 18:45:13 ########### + + +########## Tcl recorder starts at 09/12/14 18:45:14 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 18:45:14 ########### + + +########## Tcl recorder starts at 09/12/14 18:46:53 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 18:46:53 ########### + + +########## Tcl recorder starts at 09/12/14 18:46:53 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/12/14 18:46:53 ########### + + +########## Tcl recorder starts at 09/14/14 16:37:34 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 16:37:34 ########### + + +########## Tcl recorder starts at 09/14/14 16:37:34 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 16:37:34 ########### + + +########## Tcl recorder starts at 09/14/14 16:45:56 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 16:45:56 ########### + + +########## Tcl recorder starts at 09/14/14 16:45:56 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 16:45:56 ########### + + +########## Tcl recorder starts at 09/14/14 16:47:26 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 16:47:26 ########### + + +########## Tcl recorder starts at 09/14/14 16:47:26 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 16:47:26 ########### + + +########## Tcl recorder starts at 09/14/14 16:50:17 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 16:50:17 ########### + + +########## Tcl recorder starts at 09/14/14 16:50:17 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 16:50:17 ########### + + +########## Tcl recorder starts at 09/14/14 16:53:04 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 16:53:04 ########### + + +########## Tcl recorder starts at 09/14/14 16:53:05 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 16:53:05 ########### + + +########## Tcl recorder starts at 09/14/14 16:54:42 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 16:54:42 ########### + + +########## Tcl recorder starts at 09/14/14 16:54:43 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 16:54:43 ########### + + +########## Tcl recorder starts at 09/14/14 18:48:52 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 18:48:52 ########### + + +########## Tcl recorder starts at 09/14/14 18:48:52 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 18:48:52 ########### + + +########## Tcl recorder starts at 09/14/14 19:11:29 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 19:11:29 ########### + + +########## Tcl recorder starts at 09/14/14 19:11:30 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 19:11:30 ########### + + +########## Tcl recorder starts at 09/14/14 19:13:08 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 19:13:08 ########### + + +########## Tcl recorder starts at 09/14/14 19:13:08 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 19:13:08 ########### + + +########## Tcl recorder starts at 09/14/14 19:23:00 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 19:23:00 ########### + + +########## Tcl recorder starts at 09/14/14 19:23:00 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 19:23:00 ########### + + +########## Tcl recorder starts at 09/14/14 21:39:18 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 21:39:18 ########### + + +########## Tcl recorder starts at 09/14/14 21:39:18 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 21:39:18 ########### + + +########## Tcl recorder starts at 09/14/14 21:44:54 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 21:44:54 ########### + + +########## Tcl recorder starts at 09/14/14 21:44:55 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 21:44:55 ########### + + +########## Tcl recorder starts at 09/14/14 21:45:30 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 21:45:30 ########### + + +########## Tcl recorder starts at 09/14/14 21:45:30 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 21:45:30 ########### + + +########## Tcl recorder starts at 09/14/14 22:02:07 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 22:02:07 ########### + + +########## Tcl recorder starts at 09/14/14 22:02:08 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/14/14 22:02:08 ########### + + +########## Tcl recorder starts at 09/15/14 19:08:22 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/15/14 19:08:22 ########### + + +########## Tcl recorder starts at 09/15/14 19:08:22 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/15/14 19:08:22 ########### + + +########## Tcl recorder starts at 09/15/14 19:11:50 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/15/14 19:11:50 ########### + + +########## Tcl recorder starts at 09/15/14 19:11:50 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/15/14 19:11:50 ########### + + +########## Tcl recorder starts at 09/15/14 21:01:52 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/15/14 21:01:52 ########### + + +########## Tcl recorder starts at 09/15/14 21:01:52 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/15/14 21:01:52 ########### + + +########## Tcl recorder starts at 09/15/14 21:22:01 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/15/14 21:22:01 ########### + + +########## Tcl recorder starts at 09/15/14 21:53:27 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/15/14 21:53:27 ########### + + +########## Tcl recorder starts at 09/15/14 21:53:27 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/15/14 21:53:27 ########### + + +########## Tcl recorder starts at 09/16/14 14:49:27 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/16/14 14:49:27 ########### + + +########## Tcl recorder starts at 09/16/14 14:49:27 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 09/16/14 14:49:27 ########### + diff --git a/Logic/68030_tk.crf b/Logic/68030_tk.crf index 985340c..4a6c15f 100644 --- a/Logic/68030_tk.crf +++ b/Logic/68030_tk.crf @@ -1,7 +1,7 @@ // Signal Name Cross Reference File // ispLEVER Classic 1.7.00.05.28.13 -// Design '68030_tk' created Tue Aug 26 20:07:15 2014 +// Design '68030_tk' created Tue Sep 16 14:49:34 2014 // LEGEND: '>' Functional Block Port Separator diff --git a/Logic/68030_tk.grp b/Logic/68030_tk.grp deleted file mode 100644 index e1e8fbe..0000000 --- a/Logic/68030_tk.grp +++ /dev/null @@ -1,25 +0,0 @@ - -GROUP MACH_SEG_A DS_030 RN_DS_030 inst_LDS_000_INT inst_UDS_000_INT AVEC - CLK_000_P_SYNC_4_ CLK_000_P_SYNC_8_ CLK_000_N_SYNC_2_ -GROUP MACH_SEG_B IPL_030_1_ RN_IPL_030_1_ IPL_030_0_ RN_IPL_030_0_ IPL_030_2_ - RN_IPL_030_2_ RESET CLK_EXP CIIN_0 inst_CLK_000_NE CLK_000_P_SYNC_5_ - CLK_000_P_SYNC_7_ CLK_000_N_SYNC_4_ CLK_OUT_PRE_Dreg inst_CLK_OUT_PRE - inst_CLK_000_NE_D0 -GROUP MACH_SEG_C SM_AMIGA_3_ SM_AMIGA_2_ inst_DS_000_ENABLE inst_DS_030_D0 - inst_VPA_D AMIGA_BUS_ENABLE_LOW state_machine_un15_clk_000_ne_i_n - cpu_est_2_ CLK_000_P_SYNC_1_ CLK_000_P_SYNC_3_ CLK_000_N_SYNC_1_ - CLK_000_N_SYNC_3_ -GROUP MACH_SEG_D AMIGA_ADDR_ENABLE RN_AMIGA_ADDR_ENABLE VMA RN_VMA BG_000 - RN_BG_000 DTACK LDS_000 UDS_000 AMIGA_BUS_ENABLE_HIGH cpu_est_1_ - cpu_est_0_ CLK_000_P_SYNC_0_ CLK_000_N_SYNC_11_ inst_CLK_000_D1 -GROUP MACH_SEG_E AS_000 RN_AS_000 inst_AS_030_D0 inst_BGACK_030_INT_D CIIN - BERR AMIGA_BUS_DATA_DIR un14_ciin_0 -GROUP MACH_SEG_F SM_AMIGA_7_ inst_AS_030_000_SYNC SM_AMIGA_6_ SM_AMIGA_4_ - SM_AMIGA_0_ SM_AMIGA_1_ SM_AMIGA_5_ CLK_000_N_SYNC_0_ inst_CLK_000_D0 - CLK_000_P_SYNC_9_ -GROUP MACH_SEG_G RW RN_RW A0 SIZE_0_ inst_CLK_030_H inst_DTACK_D0 E RN_E - CLK_DIV_OUT inst_CLK_000_PE CLK_000_P_SYNC_6_ CLK_000_N_SYNC_6_ CLK_000_N_SYNC_7_ - CLK_000_N_SYNC_8_ inst_CLK_OUT_PRE_50 -GROUP MACH_SEG_H DSACK1 RN_DSACK1 RW_000 RN_RW_000 AS_030 RN_AS_030 SIZE_1_ - BGACK_030 RN_BGACK_030 FPU_CS CLK_000_P_SYNC_2_ CLK_000_N_SYNC_5_ - CLK_000_N_SYNC_9_ CLK_000_N_SYNC_10_ \ No newline at end of file diff --git a/Logic/68030_tk.ipr b/Logic/68030_tk.ipr index 44a0dd3..0e46cea 100644 --- a/Logic/68030_tk.ipr +++ b/Logic/68030_tk.ipr @@ -1 +1 @@ -526535?).6 ;Pd] \ No newline at end of file +46523=62:%g@U \ No newline at end of file diff --git a/Logic/68030_tk.jed b/Logic/68030_tk.jed deleted file mode 100644 index 2461627..0000000 --- a/Logic/68030_tk.jed +++ /dev/null @@ -1,1109 +0,0 @@ -|--------------------------------------------| -|- ispLEVER Fitter Report File -| -|- Version 1.7.00.05.28.13 -| -|- (c)Copyright, Lattice Semiconductor 2002 -| -|--------------------------------------------| - - -TITLE: -AUTHOR: -PATTERN: -COMPANY: -REVISION: -DATE: Tue Aug 26 20:07:19 2014 - -ABEL mach447a - * -QP100* -QF54096* -G0*F0* -NOTE Part Number : M4A5-128/64-10VC * -NOTE Handling of Preplacements No Change * -NOTE Use placement data from 68030_tk.vct * -NOTE Global clocks routable as PT clocks? N * -NOTE 22V10/MACH1XX/2XX S/R Compatibility? Y * -NOTE SET/RESET treated as DONT_CARE? Y * -NOTE Reduce Unforced Global Clocks? N * -NOTE Iterate between partitioning and place/route? Y * -NOTE Balanced partitioning? Y * -NOTE Reduce Routes Per Placement? N * -NOTE Spread Placement? Y * -NOTE Run Time Upper Bound in 15 minutes 0 * -NOTE Zero Hold Time For Input Registers? Y * -NOTE Table of pin names and numbers* -NOTE PINS A_29_:6 A_28_:15 A_27_:16 A_26_:17 A_31_:4 A_25_:18* -NOTE PINS A_24_:19 A_23_:85 A_22_:84 IPL_2_:68 A_21_:94 A_20_:93* -NOTE PINS FC_1_:58 A_19_:97 A_18_:95 A_17_:59 A_16_:96 UDS_000:32* -NOTE PINS LDS_000:31 IPL_1_:56 IPL_0_:67 nEXP_SPACE:14 FC_0_:57* -NOTE PINS BERR:41 BG_030:21 BGACK_000:28 CLK_030:64 CLK_000:11* -NOTE PINS CLK_OSZI:61 CLK_DIV_OUT:65 CLK_EXP:10 FPU_CS:78* -NOTE PINS FPU_SENSE:91 DTACK:30 AVEC:92 VPA:36 RST:86 AMIGA_ADDR_ENABLE:33* -NOTE PINS AMIGA_BUS_DATA_DIR:48 AMIGA_BUS_ENABLE_LOW:20 AMIGA_BUS_ENABLE_HIGH:34* -NOTE PINS CIIN:47 A_30_:5 SIZE_1_:79 IPL_030_2_:9 AS_030:82* -NOTE PINS AS_000:42 RW_000:80 DS_030:98 IPL_030_1_:7 IPL_030_0_:8* -NOTE PINS A0:69 BG_000:29 BGACK_030:83 DSACK1:81 E:66 VMA:35* -NOTE PINS RESET:3 RW:71 SIZE_0_:70 * -NOTE Table of node names and numbers* -NOTE NODES RN_UDS_000:185 RN_LDS_000:191 RN_BERR:197 RN_DTACK:173 * -NOTE NODES RN_AMIGA_ADDR_ENABLE:179 RN_SIZE_1_:271 RN_IPL_030_2_:131 * -NOTE NODES RN_AS_030:281 RN_AS_000:203 RN_RW_000:269 RN_DS_030:101 * -NOTE NODES RN_IPL_030_1_:143 RN_IPL_030_0_:137 RN_A0:257 * -NOTE NODES RN_BG_000:193 RN_BGACK_030:275 RN_DSACK1:287 * -NOTE NODES RN_E:251 RN_VMA:175 RN_RW:245 RN_SIZE_0_:263 * -NOTE NODES cpu_est_0_:176 cpu_est_1_:187 inst_AS_030_D0:209 * -NOTE NODES inst_DS_030_D0:170 inst_AS_030_000_SYNC:233 inst_BGACK_030_INT_D:211 * -NOTE NODES inst_VPA_D:157 inst_DTACK_D0:250 inst_CLK_OUT_PRE_50:265 * -NOTE NODES inst_CLK_000_D1:182 inst_CLK_000_D0:235 SM_AMIGA_7_:227 * -NOTE NODES inst_CLK_OUT_PRE:130 inst_CLK_000_PE:253 CLK_000_P_SYNC_9_:230 * -NOTE NODES inst_CLK_000_NE:133 CLK_000_N_SYNC_11_:194 cpu_est_2_:155 * -NOTE NODES inst_CLK_000_NE_D0:145 SM_AMIGA_6_:221 SM_AMIGA_4_:229 * -NOTE NODES SM_AMIGA_0_:223 inst_CLK_030_H:259 inst_LDS_000_INT:119 * -NOTE NODES inst_DS_000_ENABLE:151 inst_UDS_000_INT:113 CLK_000_P_SYNC_0_:188 * -NOTE NODES CLK_000_P_SYNC_1_:164 CLK_000_P_SYNC_2_:278 CLK_000_P_SYNC_3_:158 * -NOTE NODES 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+++ /dev/null @@ -1,238 +0,0 @@ -[DEVICE] -Family = M4A5; -PartType = M4A5-128/64; -Package = 100TQFP; -PartNumber = M4A5-128/64-10VC; -Speed = -10; -Operating_condition = COM; -EN_Segment = No; -Pin_MC_1to1 = No; -EN_PinReserve_IO = Yes; -EN_PinReserve_BIDIR = Yes; -Voltage = 5.0; - -[REVISION] -RCS = "$Revision: 1.2 $"; -Parent = m4a5.lci; -SDS_File = m4a5.sds; -Design = 68030_tk.tt4; -DATE = 8/26/14; -TIME = 20:07:19; -Source_Format = Pure_VHDL; -Type = TT2; -Pre_Fit_Time = 1; - -[IGNORE ASSIGNMENTS] -Pin_Assignments = No; -Pin_Keep_Block = No; -Pin_Keep_Segment = No; -Group_Assignments = No; -Macrocell_Assignments = No; -Macrocell_Keep_Block = No; -Macrocell_Keep_Segment = No; -Pin_Reservation = No; -Block_Reservation = No; -Segment_Reservation = No; -Timing_Constraints = No; - -[CLEAR ASSIGNMENTS] -Pin_Assignments = No; -Pin_Keep_Block = No; -Pin_Keep_Segment = No; -Group_Assignments = No; -Macrocell_Assignments = No; -Macrocell_Keep_Block = No; -Macrocell_Keep_Segment = No; -Pin_Reservation = No; -Block_Reservation = No; -Segment_Reservation = No; -Timing_Constraints = No; - -[BACKANNOTATE ASSIGNMENTS] -Pin_Block = No; -Pin_Macrocell_Block = No; -Routing = No; - -[GLOBAL CONSTRAINTS] -Max_PTerm_Split = 16; -Max_PTerm_Collapse = 16; -Max_Pin_Percent = 100; -Max_Macrocell_Percent = 100; -Max_GLB_Input_Percent = 100; -Max_Seg_In_Percent = 100; -Logic_Reduction = Yes; -XOR_Synthesis = Yes; -DT_Synthesis = Yes; -Node_Collapse = Yes; -Run_Time = 0; -Set_Reset_Dont_Care = Yes; -Clock_Optimize = No; -In_Reg_Optimize = Yes; -Balanced_Partitioning = Yes; -Device_max_fanin = 33; -Device_max_pterms = 20; -Usercode = 0; -Usercode_Format = Hex; - -[LOCATION ASSIGNMENTS] -Layer = OFF; -A_29_ = pin,6,-,B,-; -A_28_ = pin,15,-,C,-; -A_27_ = pin,16,-,C,-; -A_26_ = pin,17,-,C,-; -A_31_ = pin,4,-,B,-; -A_25_ = pin,18,-,C,-; -A_24_ = pin,19,-,C,-; -A_23_ = pin,85,-,H,-; -A_22_ = pin,84,-,H,-; -IPL_2_ = pin,68,-,G,-; -A_21_ = pin,94,-,A,-; -A_20_ = pin,93,-,A,-; -FC_1_ = pin,58,-,F,-; -A_19_ = pin,97,-,A,-; -A_18_ = pin,95,-,A,-; -A_17_ = pin,59,-,F,-; -A_16_ = pin,96,-,A,-; -UDS_000 = pin,32,-,D,-; -LDS_000 = pin,31,-,D,-; -IPL_1_ = pin,56,-,F,-; -IPL_0_ = pin,67,-,G,-; -nEXP_SPACE = pin,14,-,-,-; -FC_0_ = pin,57,-,F,-; -BERR = pin,41,-,E,-; -BG_030 = pin,21,-,C,-; -BGACK_000 = pin,28,-,D,-; -CLK_030 = pin,64,-,-,-; -CLK_000 = pin,11,-,-,-; -CLK_OSZI = pin,61,-,-,-; -CLK_DIV_OUT = pin,65,-,G,-; -CLK_EXP = pin,10,-,B,-; -FPU_CS = pin,78,-,H,-; -FPU_SENSE = pin,91,-,A,-; -DTACK = pin,30,-,D,-; -AVEC = pin,92,-,A,-; -VPA = pin,36,-,-,-; -RST = pin,86,-,-,-; -AMIGA_ADDR_ENABLE = pin,33,-,D,-; -AMIGA_BUS_DATA_DIR = pin,48,-,E,-; -AMIGA_BUS_ENABLE_LOW = pin,20,-,C,-; -AMIGA_BUS_ENABLE_HIGH = pin,34,-,D,-; -CIIN = pin,47,-,E,-; -A_30_ = pin,5,-,B,-; -SIZE_1_ = pin,79,-,H,-; -IPL_030_2_ = pin,9,-,B,-; -AS_030 = pin,82,-,H,-; -AS_000 = pin,42,-,E,-; -RW_000 = pin,80,-,H,-; -DS_030 = pin,98,-,A,-; -IPL_030_1_ = pin,7,-,B,-; -IPL_030_0_ = pin,8,-,B,-; -A0 = pin,69,-,G,-; -BG_000 = pin,29,-,D,-; -BGACK_030 = pin,83,-,H,-; -DSACK1 = pin,81,-,H,-; -E = pin,66,-,G,-; -VMA = pin,35,-,D,-; -RESET = pin,3,-,B,-; -RW = pin,71,-,G,-; -SIZE_0_ = pin,70,-,G,-; -cpu_est_0_ = node,-,-,D,2; -cpu_est_1_ = node,-,-,D,9; -inst_AS_030_D0 = node,-,-,E,8; -inst_DS_030_D0 = node,-,-,C,14; -inst_AS_030_000_SYNC = node,-,-,F,8; -inst_BGACK_030_INT_D = node,-,-,E,9; -inst_VPA_D = node,-,-,C,5; -inst_DTACK_D0 = node,-,-,G,3; -inst_CLK_OUT_PRE_50 = node,-,-,G,13; -inst_CLK_000_D1 = node,-,-,D,6; -inst_CLK_000_D0 = node,-,-,F,9; -SM_AMIGA_7_ = node,-,-,F,4; -inst_CLK_OUT_PRE = node,-,-,B,3; -inst_CLK_000_PE = node,-,-,G,5; -CLK_000_P_SYNC_9_ = node,-,-,F,6; -inst_CLK_000_NE = node,-,-,B,5; -CLK_000_N_SYNC_11_ = node,-,-,D,14; -cpu_est_2_ = node,-,-,C,4; -inst_CLK_000_NE_D0 = node,-,-,B,13; -SM_AMIGA_6_ = node,-,-,F,0; -SM_AMIGA_4_ = node,-,-,F,5; -SM_AMIGA_0_ = node,-,-,F,1; -inst_CLK_030_H = node,-,-,G,9; -inst_LDS_000_INT = node,-,-,A,12; -inst_DS_000_ENABLE = node,-,-,C,1; -inst_UDS_000_INT = node,-,-,A,8; -CLK_000_P_SYNC_0_ = node,-,-,D,10; -CLK_000_P_SYNC_1_ = node,-,-,C,10; -CLK_000_P_SYNC_2_ = node,-,-,H,6; -CLK_000_P_SYNC_3_ = node,-,-,C,6; -CLK_000_P_SYNC_4_ = node,-,-,A,9; -CLK_000_P_SYNC_5_ = node,-,-,B,14; -CLK_000_P_SYNC_6_ = node,-,-,G,14; -CLK_000_P_SYNC_7_ = node,-,-,B,10; -CLK_000_P_SYNC_8_ = node,-,-,A,5; -CLK_000_N_SYNC_0_ = node,-,-,F,2; -CLK_000_N_SYNC_1_ = node,-,-,C,2; -CLK_000_N_SYNC_2_ = node,-,-,A,1; -CLK_000_N_SYNC_3_ = node,-,-,C,13; -CLK_000_N_SYNC_4_ = node,-,-,B,6; -CLK_000_N_SYNC_5_ = node,-,-,H,2; -CLK_000_N_SYNC_6_ = node,-,-,G,10; -CLK_000_N_SYNC_7_ = node,-,-,G,6; -CLK_000_N_SYNC_8_ = node,-,-,G,2; -CLK_000_N_SYNC_9_ = node,-,-,H,13; -CLK_000_N_SYNC_10_ = node,-,-,H,9; -CLK_OUT_PRE_Dreg = node,-,-,B,9; -SM_AMIGA_1_ = node,-,-,F,12; -SM_AMIGA_5_ = node,-,-,F,13; -SM_AMIGA_3_ = node,-,-,C,8; -SM_AMIGA_2_ = node,-,-,C,12; -un14_ciin_0 = node,-,-,E,5; -state_machine_un15_clk_000_ne_i_n = node,-,-,C,9; -CIIN_0 = node,-,-,B,2; - -[GROUP ASSIGNMENTS] -Layer = OFF; - -[RESOURCE RESERVATIONS] -Layer = OFF; - -[SLEWRATE] -Default = SLOW; - -[PULLUP] -Default = Up; - -[NETLIST/DELAY FORMAT] -Delay_File = SDF; -Netlist = VHDL; - -[OSM BYPASS] - -[FITTER REPORT FORMAT] -Fitter_Options = Yes; -Pinout_Diagram = No; -Pinout_Listing = Yes; -Detailed_Block_Segment_Summary = Yes; -Input_Signal_List = Yes; -Output_Signal_List = Yes; -Bidir_Signal_List = Yes; -Node_Signal_List = Yes; -Signal_Fanout_List = Yes; -Block_Segment_Fanin_List = Yes; -Postfit_Eqn = Yes; -Prefit_Eqn = Yes; -Page_Break = Yes; - -[POWER] -Powerlevel = Low,High; -Default = High; -Low = H,G,F,E,D,C,B,A; -Type = GLB; - -[SOURCE CONSTRAINT OPTION] - -[TIMING ANALYZER] -Last_source=; -Last_source_type=Fmax; - diff --git a/Logic/68030_tk.plc b/Logic/68030_tk.plc deleted file mode 100644 index e6524f0..0000000 --- a/Logic/68030_tk.plc +++ /dev/null @@ -1,150 +0,0 @@ -|--------------------------------------------| -|- ispLEVER Fitter Report File -| -|- Version 1.7.00.05.28.13 -| -|- (c)Copyright, Lattice Semiconductor 2002 -| -|--------------------------------------------| - - -; Source file 68030_tk.tt4 -; FITTER-generated Placements. -; DEVICE mach447a -; DATE Tue Aug 26 20:07:19 2014 - - -Pin 6 A_29_ -Pin 15 A_28_ -Pin 16 A_27_ -Pin 17 A_26_ -Pin 4 A_31_ -Pin 18 A_25_ -Pin 19 A_24_ -Pin 85 A_23_ -Pin 84 A_22_ -Pin 68 IPL_2_ -Pin 94 A_21_ -Pin 93 A_20_ -Pin 58 FC_1_ -Pin 97 A_19_ -Pin 95 A_18_ -Pin 59 A_17_ -Pin 96 A_16_ -Pin 32 UDS_000 Comb ; S6=1 S9=1 Pair 185 -Pin 31 LDS_000 Comb ; S6=1 S9=1 Pair 191 -Pin 56 IPL_1_ -Pin 67 IPL_0_ -Pin 14 nEXP_SPACE -Pin 57 FC_0_ -Pin 41 BERR Comb ; S6=1 S9=1 Pair 197 -Pin 21 BG_030 -Pin 28 BGACK_000 -Pin 64 CLK_030 -Pin 11 CLK_000 -Pin 61 CLK_OSZI -Pin 65 CLK_DIV_OUT Comb ; S6=1 S9=1 Pair 247 -Pin 10 CLK_EXP Comb ; S6=1 S9=1 Pair 125 -Pin 78 FPU_CS Comb ; S6=1 S9=1 Pair 277 -Pin 91 FPU_SENSE -Pin 30 DTACK Comb ; S6=1 S9=1 Pair 173 -Pin 92 AVEC Comb ; S6=1 S9=1 Pair 107 -Pin 36 VPA -Pin 86 RST -Pin 33 AMIGA_ADDR_ENABLE Reg ; S6=1 S9=1 Pair 179 -Pin 48 AMIGA_BUS_DATA_DIR Comb ; S6=1 S9=1 Pair 199 -Pin 20 AMIGA_BUS_ENABLE_LOW Comb ; S6=1 S9=1 Pair 149 -Pin 34 AMIGA_BUS_ENABLE_HIGH Comb ; S6=1 S9=1 Pair 181 -Pin 47 CIIN Comb ; S6=1 S9=1 Pair 215 -Pin 5 A_30_ -Pin 79 SIZE_1_ Reg ; S6=1 S9=1 Pair 271 -Pin 9 IPL_030_2_ Reg ; S6=1 S9=1 Pair 131 -Pin 82 AS_030 Reg ; S6=1 S9=1 Pair 281 -Pin 42 AS_000 Reg ; S6=1 S9=1 Pair 203 -Pin 80 RW_000 Reg ; S6=1 S9=1 Pair 269 -Pin 98 DS_030 Reg ; S6=1 S9=1 Pair 101 -Pin 7 IPL_030_1_ Reg ; S6=1 S9=1 Pair 143 -Pin 8 IPL_030_0_ Reg ; S6=1 S9=1 Pair 137 -Pin 69 A0 Reg ; S6=1 S9=1 Pair 257 -Pin 29 BG_000 Reg ; S6=1 S9=1 Pair 193 -Pin 83 BGACK_030 Reg ; S6=1 S9=1 Pair 275 -Pin 81 DSACK1 Reg ; S6=1 S9=1 Pair 287 -Pin 66 E Reg ; S6=1 S9=1 Pair 251 -Pin 35 VMA Reg ; S6=1 S9=1 Pair 175 -Pin 3 RESET Reg ; S6=0 S9=1 Pair 127 -Pin 71 RW Reg ; S6=1 S9=1 Pair 245 -Pin 70 SIZE_0_ Reg ; S6=1 S9=1 Pair 263 -Node 185 RN_UDS_000 Comb ; S6=1 S9=1 -Node 191 RN_LDS_000 Comb ; S6=1 S9=1 -Node 197 RN_BERR Comb ; S6=1 S9=1 -Node 173 RN_DTACK Comb ; S6=1 S9=1 -Node 179 RN_AMIGA_ADDR_ENABLE Reg ; S6=1 S9=1 -Node 271 RN_SIZE_1_ Reg ; S6=1 S9=1 -Node 131 RN_IPL_030_2_ Reg ; S6=1 S9=1 -Node 281 RN_AS_030 Reg ; S6=1 S9=1 -Node 203 RN_AS_000 Reg ; S6=1 S9=1 -Node 269 RN_RW_000 Reg ; S6=1 S9=1 -Node 101 RN_DS_030 Reg ; S6=1 S9=1 -Node 143 RN_IPL_030_1_ Reg ; S6=1 S9=1 -Node 137 RN_IPL_030_0_ Reg ; S6=1 S9=1 -Node 257 RN_A0 Reg ; S6=1 S9=1 -Node 193 RN_BG_000 Reg ; S6=1 S9=1 -Node 275 RN_BGACK_030 Reg ; S6=1 S9=1 -Node 287 RN_DSACK1 Reg ; S6=1 S9=1 -Node 251 RN_E Reg ; S6=1 S9=1 -Node 175 RN_VMA Reg ; S6=1 S9=1 -Node 245 RN_RW Reg ; S6=1 S9=1 -Node 263 RN_SIZE_0_ Reg ; S6=1 S9=1 -Node 176 cpu_est_0_ Reg ; S6=1 S9=1 -Node 187 cpu_est_1_ Reg ; S6=1 S9=1 -Node 209 inst_AS_030_D0 Reg ; S6=1 S9=1 -Node 170 inst_DS_030_D0 Reg ; S6=0 S9=1 -Node 233 inst_AS_030_000_SYNC Reg ; S6=1 S9=1 -Node 211 inst_BGACK_030_INT_D Reg ; S6=1 S9=1 -Node 157 inst_VPA_D Reg ; S6=0 S9=1 -Node 250 inst_DTACK_D0 Reg ; S6=1 S9=1 -Node 265 inst_CLK_OUT_PRE_50 Reg ; S6=1 S9=1 -Node 182 inst_CLK_000_D1 Reg ; S6=1 S9=1 -Node 235 inst_CLK_000_D0 Reg ; S6=1 S9=1 -Node 227 SM_AMIGA_7_ Reg ; S6=1 S9=1 -Node 130 inst_CLK_OUT_PRE Reg ; S6=1 S9=1 -Node 253 inst_CLK_000_PE Reg ; S6=1 S9=1 -Node 230 CLK_000_P_SYNC_9_ Reg ; S6=1 S9=1 -Node 133 inst_CLK_000_NE Reg ; S6=1 S9=1 -Node 194 CLK_000_N_SYNC_11_ Reg ; S6=1 S9=1 -Node 155 cpu_est_2_ Reg ; S6=1 S9=1 -Node 145 inst_CLK_000_NE_D0 Reg ; S6=1 S9=1 -Node 221 SM_AMIGA_6_ Reg ; S6=0 S9=1 -Node 229 SM_AMIGA_4_ Reg ; S6=0 S9=1 -Node 223 SM_AMIGA_0_ Reg ; S6=0 S9=1 -Node 259 inst_CLK_030_H Reg ; S6=0 S9=1 -Node 119 inst_LDS_000_INT Reg ; S6=1 S9=1 -Node 151 inst_DS_000_ENABLE Reg ; S6=1 S9=1 -Node 113 inst_UDS_000_INT Reg ; S6=1 S9=1 -Node 188 CLK_000_P_SYNC_0_ Reg ; S6=1 S9=1 -Node 164 CLK_000_P_SYNC_1_ Reg ; S6=1 S9=1 -Node 278 CLK_000_P_SYNC_2_ Reg ; S6=1 S9=1 -Node 158 CLK_000_P_SYNC_3_ Reg ; S6=1 S9=1 -Node 115 CLK_000_P_SYNC_4_ Reg ; S6=1 S9=1 -Node 146 CLK_000_P_SYNC_5_ Reg ; S6=1 S9=1 -Node 266 CLK_000_P_SYNC_6_ Reg ; S6=1 S9=1 -Node 140 CLK_000_P_SYNC_7_ Reg ; S6=1 S9=1 -Node 109 CLK_000_P_SYNC_8_ Reg ; S6=1 S9=1 -Node 224 CLK_000_N_SYNC_0_ Reg ; S6=1 S9=1 -Node 152 CLK_000_N_SYNC_1_ Reg ; S6=1 S9=1 -Node 103 CLK_000_N_SYNC_2_ Reg ; S6=1 S9=1 -Node 169 CLK_000_N_SYNC_3_ Reg ; S6=1 S9=1 -Node 134 CLK_000_N_SYNC_4_ Reg ; S6=1 S9=1 -Node 272 CLK_000_N_SYNC_5_ Reg ; S6=1 S9=1 -Node 260 CLK_000_N_SYNC_6_ Reg ; S6=1 S9=1 -Node 254 CLK_000_N_SYNC_7_ Reg ; S6=1 S9=1 -Node 248 CLK_000_N_SYNC_8_ Reg ; S6=1 S9=1 -Node 289 CLK_000_N_SYNC_9_ Reg ; S6=1 S9=1 -Node 283 CLK_000_N_SYNC_10_ Reg ; S6=1 S9=1 -Node 139 CLK_OUT_PRE_Dreg Reg ; S6=1 S9=1 -Node 239 SM_AMIGA_1_ Reg ; S6=0 S9=1 -Node 241 SM_AMIGA_5_ Reg ; S6=0 S9=1 -Node 161 SM_AMIGA_3_ Reg ; S6=1 S9=1 -Node 167 SM_AMIGA_2_ Reg ; S6=1 S9=1 -Node 205 un14_ciin_0 Comb ; S6=1 S9=1 -Node 163 state_machine_un15_clk_000_ne_i_n Comb ; S6=1 S9=1 -Node 128 CIIN_0 Comb ; S6=1 S9=1 -; Unused Pins & Nodes -; -> None Found. diff --git a/Logic/68030_tk.prd b/Logic/68030_tk.prd deleted file mode 100644 index 56f9901..0000000 --- a/Logic/68030_tk.prd +++ /dev/null @@ -1,1970 +0,0 @@ -|--------------------------------------------| -|- ispLEVER Fitter Report File -| -|- Version 1.7.00.05.28.13 -| -|- (c)Copyright, Lattice Semiconductor 2002 -| -|--------------------------------------------| - - -Start: Tue Aug 26 20:07:19 2014 -End : Tue Aug 26 20:07:19 2014 $$$ Elapsed time: 00:00:00 -=========================================================================== -Part [C:/Program Files (x86)/ispLever/ispcpld/dat/mach4a/mach447a] Design [68030_tk.tt4] - -* Place/Route options (keycode = 540674) - = Spread Placement: ON - = No. Routing Attempts/Placement 2 - -* Placement Completion - - +- Block +------- IO Pins Available - | +- Macrocells Available | +-- IO Pins Used - | | +- Signals to Place | | +----- Logic Array Inputs - | | | +- Placed | | | +- Array Inputs Used -_|____|____|____|_______________|____|_____________|___|________________ - 0 | 16 | 7 | 7 => 100% | 8 | 8 => 100% | 33 | 21 => 63% - 1 | 16 | 13 | 13 => 100% | 8 | 8 => 100% | 33 | 29 => 87% - 2 | 16 | 12 | 12 => 100% | 8 | 7 => 87% | 33 | 25 => 75% - 3 | 16 | 12 | 12 => 100% | 8 | 8 => 100% | 33 | 27 => 81% - 4 | 16 | 7 | 7 => 100% | 8 | 4 => 50% | 33 | 32 => 96% - 5 | 16 | 10 | 10 => 100% | 8 | 4 => 50% | 33 | 27 => 81% - 6 | 16 | 13 | 13 => 100% | 8 | 7 => 87% | 33 | 24 => 72% - 7 | 16 | 10 | 10 => 100% | 8 | 8 => 100% | 33 | 32 => 96% ----|----|----|------------|-------|------------|-----|------------------ - | Avg number of array inputs in used blocks : 27.13 => 82% - -* Input/Clock Signal count: 30 -> placed: 30 = 100% - - Resources Available Used ------------------------------------------------------------------ - Input Pins : 2 2 => 100% - I/O Pins : 64 54 => 84% - Clock Only Pins : 0 0 => 0% - Clock/Input Pins : 4 4 => 100% - Logic Blocks : 8 8 => 100% - Macrocells : 128 84 => 65% - PT Clusters : 128 40 => 31% - - Single PT Clusters : 128 49 => 38% - Input Registers : 0 - -* Routing Completion: 100% -* Attempts: Place [ 128] Route [ 0] -=========================================================================== - Signal Fanout Table -=========================================================================== - +- Signal Number - | +- Block Location ('+' for dedicated inputs) - | | +- Sig Type - | | | +- Signal-to-Pin Assignment - | | | | Fanout to Logic Blocks Signal Name -___|__|__|____|____________________________________________________________ - 1| 6| IO| 69|=> 0...|....| A0 - 2| 3| IO| 33|=> ....|....| AMIGA_ADDR_ENABLE - |=> Paired w/: RN_AMIGA_ADDR_ENABLE - 3| 4|OUT| 48|=> ....|....| AMIGA_BUS_DATA_DIR - 4| 3|OUT| 34|=> ....|....| AMIGA_BUS_ENABLE_HIGH - 5| 2|OUT| 20|=> ....|....| AMIGA_BUS_ENABLE_LOW - 6| 4| IO| 42|=> 0...|4.67| AS_000 - |=> Paired w/: RN_AS_000 - 7| 7| IO| 82|=> ....|4..7| AS_030 - |=> Paired w/: RN_AS_030 - 8| 0|OUT| 92|=> ....|....| AVEC - 9| 0|INP| 96|=> ....|45.7| A_16_ - 10| 5|INP| 59|=> ....|45.7| A_17_ - 11| 0|INP| 95|=> ....|45.7| A_18_ - 12| 0|INP| 97|=> ....|45.7| A_19_ - 13| 0|INP| 93|=> .1..|4...| A_20_ - 14| 0|INP| 94|=> .1..|4...| A_21_ - 15| 7|INP| 84|=> .1..|4...| A_22_ - 16| 7|INP| 85|=> .1..|4...| A_23_ - 17| 2|INP| 19|=> .1..|4...| A_24_ - 18| 2|INP| 18|=> .1..|4...| A_25_ - 19| 2|INP| 17|=> .1..|4...| A_26_ - 20| 2|INP| 16|=> .1..|4...| A_27_ - 21| 2|INP| 15|=> .1..|4...| A_28_ - 22| 1|INP| 6|=> .1..|4...| A_29_ - 23| 1|INP| 5|=> .1..|4...| A_30_ - 24| 1|INP| 4|=> .1..|4...| A_31_ - 25| 4| IO| 41|=> ..2.|45.7| BERR - 26| 3|INP| 28|=> ....|45.7| BGACK_000 - 27| 7| IO| 83|=> ....|....| BGACK_030 - |=> Paired w/: RN_BGACK_030 - 28| 3| IO| 29|=> ....|....| BG_000 - |=> Paired w/: RN_BG_000 - 29| 2|INP| 21|=> ...3|....| BG_030 - 30| 4|OUT| 47|=> ....|....| CIIN - 31| 1|NOD| . |=> ....|4...| CIIN_0 - 32| +|INP| 11|=> ....|.5..| CLK_000 - 33| 5|NOD| . |=> ..2.|....| CLK_000_N_SYNC_0_ - 34| 7|NOD| . |=> ...3|....| CLK_000_N_SYNC_10_ - 35| 3|NOD| . |=> .1..|....| CLK_000_N_SYNC_11_ - 36| 2|NOD| . |=> 0...|....| CLK_000_N_SYNC_1_ - 37| 0|NOD| . |=> ..2.|....| CLK_000_N_SYNC_2_ - 38| 2|NOD| . |=> .1..|....| CLK_000_N_SYNC_3_ - 39| 1|NOD| . |=> ....|...7| CLK_000_N_SYNC_4_ - 40| 7|NOD| . |=> ....|..6.| CLK_000_N_SYNC_5_ - 41| 6|NOD| . |=> ....|..6.| CLK_000_N_SYNC_6_ - 42| 6|NOD| . |=> ....|..6.| CLK_000_N_SYNC_7_ - 43| 6|NOD| . |=> ....|...7| CLK_000_N_SYNC_8_ - 44| 7|NOD| . |=> ....|...7| CLK_000_N_SYNC_9_ - 45| 3|NOD| . |=> ..2.|....| CLK_000_P_SYNC_0_ - 46| 2|NOD| . |=> ....|...7| CLK_000_P_SYNC_1_ - 47| 7|NOD| . |=> ..2.|....| CLK_000_P_SYNC_2_ - 48| 2|NOD| . |=> 0...|....| CLK_000_P_SYNC_3_ - 49| 0|NOD| . |=> .1..|....| CLK_000_P_SYNC_4_ - 50| 1|NOD| . |=> ....|..6.| CLK_000_P_SYNC_5_ - 51| 6|NOD| . |=> .1..|....| CLK_000_P_SYNC_6_ - 52| 1|NOD| . |=> 0...|....| CLK_000_P_SYNC_7_ - 53| 0|NOD| . |=> ....|.5..| CLK_000_P_SYNC_8_ - 54| 5|NOD| . |=> ....|..6.| CLK_000_P_SYNC_9_ - 55| +|INP| 64|=> 0...|..67| CLK_030 - 56| 6|OUT| 65|=> ....|....| CLK_DIV_OUT - 57| 1|OUT| 10|=> ....|....| CLK_EXP - 58| +|Cin| 61|=> ....|....| CLK_OSZI - 59| 1|NOD| . |=> .1..|..67| CLK_OUT_PRE_Dreg - 60| 7| IO| 81|=> ...3|....| DSACK1 - |=> Paired w/: RN_DSACK1 - 61| 0| IO| 98|=> ..2.|....| DS_030 - |=> Paired w/: RN_DS_030 - 62| 3| IO| 30|=> ....|..6.| DTACK - 63| 6| IO| 66|=> ....|....| E - |=> Paired w/: RN_E - 64| 5|INP| 57|=> ....|45.7| FC_0_ - 65| 5|INP| 58|=> ....|45.7| FC_1_ - 66| 7|OUT| 78|=> ....|....| FPU_CS - 67| 0|INP| 91|=> ....|4..7| FPU_SENSE - 68| 1| IO| 8|=> ....|....| IPL_030_0_ - |=> Paired w/: RN_IPL_030_0_ - 69| 1| IO| 7|=> ....|....| IPL_030_1_ - |=> Paired w/: RN_IPL_030_1_ - 70| 1| IO| 9|=> ....|....| IPL_030_2_ - |=> Paired w/: RN_IPL_030_2_ - 71| 6|INP| 67|=> .1..|....| IPL_0_ - 72| 5|INP| 56|=> .1..|....| IPL_1_ - 73| 6|INP| 68|=> .1..|....| IPL_2_ - 74| 3| IO| 31|=> 0...|..67| LDS_000 - 75| 1|OUT| 3|=> ....|....| RESET - 76| 3|NOD| . |=> ...3|....| RN_AMIGA_ADDR_ENABLE - |=> Paired w/: AMIGA_ADDR_ENABLE - 77| 4|NOD| . |=> ....|4...| RN_AS_000 - |=> Paired w/: AS_000 - 78| 7|NOD| . |=> 0..3|..67| RN_AS_030 - |=> Paired w/: AS_030 - 79| 7|NOD| . |=> 0..3|4.67| RN_BGACK_030 - |=> Paired w/: BGACK_030 - 80| 3|NOD| . |=> ...3|....| RN_BG_000 - |=> Paired w/: BG_000 - 81| 7|NOD| . |=> ....|...7| RN_DSACK1 - |=> Paired w/: DSACK1 - 82| 0|NOD| . |=> 0...|....| RN_DS_030 - |=> Paired w/: DS_030 - 83| 6|NOD| . |=> ..23|..6.| RN_E - |=> Paired w/: E - 84| 1|NOD| . |=> .1..|....| RN_IPL_030_0_ - |=> Paired w/: IPL_030_0_ - 85| 1|NOD| . |=> .1..|....| RN_IPL_030_1_ - |=> Paired w/: IPL_030_1_ - 86| 1|NOD| . |=> .1..|....| RN_IPL_030_2_ - |=> Paired w/: IPL_030_2_ - 87| 6|NOD| . |=> ....|..6.| RN_RW - |=> Paired w/: RW - 88| 7|NOD| . |=> ....|...7| RN_RW_000 - |=> Paired w/: RW_000 - 89| 3|NOD| . |=> ..23|....| RN_VMA - |=> Paired w/: VMA - 90| +|INP| 86|=> 0123|4567| RST - 91| 6| IO| 71|=> ..2.|...7| RW - |=> Paired w/: RN_RW - 92| 7| IO| 80|=> 0...|4.6.| RW_000 - |=> Paired w/: RN_RW_000 - 93| 6| IO| 70|=> 0...|....| SIZE_0_ - 94| 7| IO| 79|=> 0...|....| SIZE_1_ - 95| 5|NOD| . |=> ....|.5.7| SM_AMIGA_0_ - 96| 5|NOD| . |=> ....|.5.7| SM_AMIGA_1_ - 97| 2|NOD| . |=> ..2.|.5..| SM_AMIGA_2_ - 98| 2|NOD| . |=> ..2.|.5..| SM_AMIGA_3_ - 99| 5|NOD| . |=> ..2.|.5..| SM_AMIGA_4_ - 100| 5|NOD| . |=> ....|.5..| SM_AMIGA_5_ - 101| 5|NOD| . |=> 0.2.|45.7| SM_AMIGA_6_ - 102| 5|NOD| . |=> ...3|.5.7| SM_AMIGA_7_ - 103| 3| IO| 32|=> 0...|..67| UDS_000 - 104| 3| IO| 35|=> ....|....| VMA - |=> Paired w/: RN_VMA - 105| +|INP| 36|=> ..2.|....| VPA - 106| 3|NOD| . |=> ..23|..6.| cpu_est_0_ - 107| 3|NOD| . |=> ..23|..6.| cpu_est_1_ - 108| 2|NOD| . |=> ..23|..6.| cpu_est_2_ - 109| 5|NOD| . |=> ...3|.5..| inst_AS_030_000_SYNC - 110| 4|NOD| . |=> .123|45.7| inst_AS_030_D0 - 111| 4|NOD| . |=> ...3|....| inst_BGACK_030_INT_D - 112| 5|NOD| . |=> ...3|.5..| inst_CLK_000_D0 - 113| 3|NOD| . |=> ...3|.5..| inst_CLK_000_D1 - 114| 1|NOD| . |=> .123|.5..| inst_CLK_000_NE - 115| 1|NOD| . |=> ..23|..6.| inst_CLK_000_NE_D0 - 116| 6|NOD| . |=> ..23|45.7| inst_CLK_000_PE - 117| 6|NOD| . |=> 0...|..6.| inst_CLK_030_H - 118| 1|NOD| . |=> .1..|....| inst_CLK_OUT_PRE - 119| 6|NOD| . |=> .1..|..6.| inst_CLK_OUT_PRE_50 - 120| 2|NOD| . |=> ..23|....| inst_DS_000_ENABLE - 121| 2|NOD| . |=> 0...|....| inst_DS_030_D0 - 122| 6|NOD| . |=> ..2.|....| inst_DTACK_D0 - 123| 0|NOD| . |=> 0..3|....| inst_LDS_000_INT - 124| 0|NOD| . |=> 0..3|....| inst_UDS_000_INT - 125| 2|NOD| . |=> ..23|....| inst_VPA_D - 126| +|INP| 14|=> 0..3|4567| nEXP_SPACE - 127| 2|NOD| . |=> ....|.5..| state_machine_un15_clk_000_ne_i_n - 128| 4|NOD| . |=> .1..|....| un14_ciin_0 ---------------------------------------------------------------------------- -=========================================================================== - < C:/Program Files (x86)/ispLever/ispcpld/dat/mach4a/mach447a Device Pin Assignments > -=========================================================================== - +- Device Pin No - | Pin Type +- Signal Fixed (*) - | | | Signal Name -____|_____|_________|______________________________________________________ - 1 | GND | | | (pwr/test) - 2 | JTAG | | | (pwr/test) - 3 | I_O | 1_07|*| RESET - 4 | I_O | 1_06|*| A_31_ - 5 | I_O | 1_05|*| A_30_ - 6 | I_O | 1_04|*| A_29_ - 7 | I_O | 1_03|*| IPL_030_1_ - 8 | I_O | 1_02|*| IPL_030_0_ - 9 | I_O | 1_01|*| IPL_030_2_ - 10 | I_O | 1_00|*| CLK_EXP - 11 | CkIn | |*| CLK_000 - 12 | Vcc | | | (pwr/test) - 13 | GND | | | (pwr/test) - 14 | CkIn | |*| nEXP_SPACE - 15 | I_O | 2_00|*| A_28_ - 16 | I_O | 2_01|*| A_27_ - 17 | I_O | 2_02|*| A_26_ - 18 | I_O | 2_03|*| A_25_ - 19 | I_O | 2_04|*| A_24_ - 20 | I_O | 2_05|*| AMIGA_BUS_ENABLE_LOW - 21 | I_O | 2_06|*| BG_030 - 22 | I_O | 2_07| | - - 23 | JTAG | | | (pwr/test) - 24 | JTAG | | | (pwr/test) - 25 | GND | | | (pwr/test) - 26 | GND | | | (pwr/test) - 27 | GND | | | (pwr/test) - 28 | I_O | 3_07|*| BGACK_000 - 29 | I_O | 3_06|*| BG_000 - 30 | I_O | 3_05|*| DTACK - 31 | I_O | 3_04|*| LDS_000 - 32 | I_O | 3_03|*| UDS_000 - 33 | I_O | 3_02|*| AMIGA_ADDR_ENABLE - 34 | I_O | 3_01|*| AMIGA_BUS_ENABLE_HIGH - 35 | I_O | 3_00|*| VMA - 36 | Inp | |*| VPA - 37 | Vcc | | | (pwr/test) - 38 | GND | | | (pwr/test) - 39 | GND | | | (pwr/test) - 40 | Vcc | | | (pwr/test) - 41 | I_O | 4_00|*| BERR - 42 | I_O | 4_01|*| AS_000 - 43 | I_O | 4_02| | - - 44 | I_O | 4_03| | - - 45 | I_O | 4_04| | - - 46 | I_O | 4_05| | - - 47 | I_O | 4_06|*| CIIN - 48 | I_O | 4_07|*| AMIGA_BUS_DATA_DIR - 49 | GND | | | (pwr/test) - 50 | GND | | | (pwr/test) - 51 | GND | | | (pwr/test) - 52 | JTAG | | | (pwr/test) - 53 | I_O | 5_07| | - - 54 | I_O | 5_06| | - - 55 | I_O | 5_05| | - - 56 | I_O | 5_04|*| IPL_1_ - 57 | I_O | 5_03|*| FC_0_ - 58 | I_O | 5_02|*| FC_1_ - 59 | I_O | 5_01|*| A_17_ - 60 | I_O | 5_00| | - - 61 | CkIn | |*| CLK_OSZI - 62 | Vcc | | | (pwr/test) - 63 | GND | | | (pwr/test) - 64 | CkIn | |*| CLK_030 - 65 | I_O | 6_00|*| CLK_DIV_OUT - 66 | I_O | 6_01|*| E - 67 | I_O | 6_02|*| IPL_0_ - 68 | I_O | 6_03|*| IPL_2_ - 69 | I_O | 6_04|*| A0 - 70 | I_O | 6_05|*| SIZE_0_ - 71 | I_O | 6_06|*| RW - 72 | I_O | 6_07| | - - 73 | JTAG | | | (pwr/test) - 74 | JTAG | | | (pwr/test) - 75 | GND | | | (pwr/test) - 76 | GND | | | (pwr/test) - 77 | GND | | | (pwr/test) - 78 | I_O | 7_07|*| FPU_CS - 79 | I_O | 7_06|*| SIZE_1_ - 80 | I_O | 7_05|*| RW_000 - 81 | I_O | 7_04|*| DSACK1 - 82 | I_O | 7_03|*| AS_030 - 83 | I_O | 7_02|*| BGACK_030 - 84 | I_O | 7_01|*| A_22_ - 85 | I_O | 7_00|*| A_23_ - 86 | Inp | |*| RST - 87 | Vcc | | | (pwr/test) - 88 | GND | | | (pwr/test) - 89 | GND | | | (pwr/test) - 90 | Vcc | | | (pwr/test) - 91 | I_O | 0_00|*| FPU_SENSE - 92 | I_O | 0_01|*| AVEC - 93 | I_O | 0_02|*| A_20_ - 94 | I_O | 0_03|*| A_21_ - 95 | I_O | 0_04|*| A_18_ - 96 | I_O | 0_05|*| A_16_ - 97 | I_O | 0_06|*| A_19_ - 98 | I_O | 0_07|*| DS_030 - 99 | GND | | | (pwr/test) - 100 | GND | | | (pwr/test) ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 0] > Macrocell (MCell) Cluster Assignments -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size - | Sync/Async-------+ | | | Cluster to Mcell Assignment - | Node Fixed(*)----+ | | | | | +- XOR PT Size - | Sig Type-+ | | | | | | | XOR to Mcell Assignment - | Signal Name | | | | | | | | | -_|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| DS_030| IO| | S | 7 | 4 to [ 0]| 1 XOR to [ 0] as logic PT - 1|CLK_000_N_SYNC_2_|NOD| | S | 1 | 4 to [ 0]| 1 XOR to [ 1] for 1 PT sig - 2| | ? | | S | | 4 free | 1 XOR free - 3| | ? | | S | | 4 free | 1 XOR free - 4| AVEC|OUT| | S | 1 | 4 free | 1 XOR to [ 4] for 1 PT sig - 5|CLK_000_P_SYNC_8_|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig - 6| | ? | | S | | 4 free | 1 XOR free - 7| | ? | | S | | 4 free | 1 XOR free - 8|inst_UDS_000_INT|NOD| | S | 3 | 4 to [ 8]| 1 XOR free - 9|CLK_000_P_SYNC_4_|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig -10| | ? | | S | | 4 free | 1 XOR free -11| | ? | | S | | 4 free | 1 XOR free -12|inst_LDS_000_INT|NOD| | S | 3 | 4 to [12]| 1 XOR free -13| | ? | | S | | 4 free | 1 XOR free -14| | ? | | S | | 4 free | 1 XOR free -15| | ? | | S | | 4 free | 1 XOR free ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 0] > Maximum PT Capacity -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ - | Sync/Async-------+ | | - | Node Fixed(*)----+ | | | - | Sig Type-+ | | | | - | Signal Name | | | | | Maximum PT Capacity -_|_________________|__|__|___|_____|_______________________________________ - 0| DS_030| IO| | S | 7 |=> can support up to [ 14] logic PT(s) - 1|CLK_000_N_SYNC_2_|NOD| | S | 1 |=> can support up to [ 11] logic PT(s) - 2| | ? | | S | |=> can support up to [ 14] logic PT(s) - 3| | ? | | S | |=> can support up to [ 18] logic PT(s) - 4| AVEC|OUT| | S | 1 |=> can support up to [ 19] logic PT(s) - 5|CLK_000_P_SYNC_8_|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) - 6| | ? | | S | |=> can support up to [ 14] logic PT(s) - 7| | ? | | S | |=> can support up to [ 14] logic PT(s) - 8|inst_UDS_000_INT|NOD| | S | 3 |=> can support up to [ 19] logic PT(s) - 9|CLK_000_P_SYNC_4_|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) -10| | ? | | S | |=> can support up to [ 14] logic PT(s) -11| | ? | | S | |=> can support up to [ 15] logic PT(s) -12|inst_LDS_000_INT|NOD| | S | 3 |=> can support up to [ 20] logic PT(s) -13| | ? | | S | |=> can support up to [ 15] logic PT(s) -14| | ? | | S | |=> can support up to [ 15] logic PT(s) -15| | ? | | S | |=> can support up to [ 10] logic PT(s) ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 0] > Node-Pin Assignments -=========================================================================== - + Macrocell Number - | Node Fixed(*)------+ - | Sig Type---+ | to | Block [ 0] IO Pin | Device Pin - | Signal Name | | pin | Numbers | Numbers -_|_________________|__|_____|____________________|________________________ - 0| DS_030| IO| | => | 5 6 ( 7) 0 | 96 97 ( 98) 91 - 1|CLK_000_N_SYNC_2_|NOD| | => | 5 6 7 0 | 96 97 98 91 - 2| | | | => | 6 7 0 1 | 97 98 91 92 - 3| | | | => | 6 7 0 1 | 97 98 91 92 - 4| AVEC|OUT| | => | 7 0 ( 1) 2 | 98 91 ( 92) 93 - 5|CLK_000_P_SYNC_8_|NOD| | => | 7 0 1 2 | 98 91 92 93 - 6| | | | => | 0 1 2 3 | 91 92 93 94 - 7| | | | => | 0 1 2 3 | 91 92 93 94 - 8|inst_UDS_000_INT|NOD| | => | 1 2 3 4 | 92 93 94 95 - 9|CLK_000_P_SYNC_4_|NOD| | => | 1 2 3 4 | 92 93 94 95 -10| | | | => | 2 3 4 5 | 93 94 95 96 -11| | | | => | 2 3 4 5 | 93 94 95 96 -12|inst_LDS_000_INT|NOD| | => | 3 4 5 6 | 94 95 96 97 -13| | | | => | 3 4 5 6 | 94 95 96 97 -14| | | | => | 4 5 6 7 | 95 96 97 98 -15| | | | => | 4 5 6 7 | 95 96 97 98 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 0] > IO-to-Node Pin Mapping -=========================================================================== - +- Block IO Pin - | Device Pin No.--------+ - | Pin Fixed(*)----+ | - | Sig Type--+ | | | - | Signal Name | | | | Node Destinations Via Output Matrix -_|_________________|__|___|_____|___________________________________________ - 0| FPU_SENSE|INP|*| 91| => | 0 1 2 3 4 5 6 7 - 1| AVEC|OUT|*| 92| => | 2 3 ( 4) 5 6 7 8 9 - 2| A_20_|INP|*| 93| => | 4 5 6 7 8 9 10 11 - 3| A_21_|INP|*| 94| => | 6 7 8 9 10 11 12 13 - 4| A_18_|INP|*| 95| => | 8 9 10 11 12 13 14 15 - 5| A_16_|INP|*| 96| => | 10 11 12 13 14 15 0 1 - 6| A_19_|INP|*| 97| => | 12 13 14 15 0 1 2 3 - 7| DS_030| IO|*| 98| => | 14 15 ( 0) 1 2 3 4 5 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 0] > IO/Node and IO/Input Macrocell Pairing Table -=========================================================================== - +- Block IO Pin - | Device Pin No.--------+ - | Pin Fixed(*)----+ | - | Sig Type--+ | | | - | Signal Name | | | | Input Macrocell and Node Pairs -_|_________________|__|___|_____|__________________________________________ - 0| FPU_SENSE|INP|*| 91| => | Input macrocell [ -] - 1| AVEC|OUT|*| 92| => | Input macrocell [ -] - 2| A_20_|INP|*| 93| => | Input macrocell [ -] - 3| A_21_|INP|*| 94| => | Input macrocell [ -] - 4| A_18_|INP|*| 95| => | Input macrocell [ -] - 5| A_16_|INP|*| 96| => | Input macrocell [ -] - 6| A_19_|INP|*| 97| => | Input macrocell [ -] - 7| DS_030| IO|*| 98| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_DS_030] ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 0] > Input Multiplexer (IMX) Assignments -=========================================================================== - +----- IO pin/Input Register, or Macrocell -IMX No. | +---- Block IO Pin or Macrocell Number - | | | ABEL Node/ +-- Signal using the Pin or Macrocell - | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell - | | | | Sig Type | | +- Feedback Required (*) ----|-------|----|---|---|----------|------|-|------------------------------ - 0 [IOpin 0 | 91|INP FPU_SENSE|*|*] - [RegIn 0 |102| -| | ] - [MCell 0 |101|NOD RN_DS_030| |*] paired w/[ DS_030] - [MCell 1 |103|NOD CLK_000_N_SYNC_2_| |*] - - 1 [IOpin 1 | 92|OUT AVEC|*| ] - [RegIn 1 |105| -| | ] - [MCell 2 |104| -| | ] - [MCell 3 |106| -| | ] - - 2 [IOpin 2 | 93|INP A_20_|*|*] - [RegIn 2 |108| -| | ] - [MCell 4 |107|OUT AVEC| | ] - [MCell 5 |109|NOD CLK_000_P_SYNC_8_| |*] - - 3 [IOpin 3 | 94|INP A_21_|*|*] - [RegIn 3 |111| -| | ] - [MCell 6 |110| -| | ] - [MCell 7 |112| -| | ] - - 4 [IOpin 4 | 95|INP A_18_|*|*] - [RegIn 4 |114| -| | ] - [MCell 8 |113|NOD inst_UDS_000_INT| |*] - [MCell 9 |115|NOD CLK_000_P_SYNC_4_| |*] - - 5 [IOpin 5 | 96|INP A_16_|*|*] - [RegIn 5 |117| -| | ] - [MCell 10 |116| -| | ] - [MCell 11 |118| -| | ] - - 6 [IOpin 6 | 97|INP A_19_|*|*] - [RegIn 6 |120| -| | ] - [MCell 12 |119|NOD inst_LDS_000_INT| |*] - [MCell 13 |121| -| | ] - - 7 [IOpin 7 | 98| IO DS_030|*|*] paired w/[ RN_DS_030] - [RegIn 7 |123| -| | ] - [MCell 14 |122| -| | ] - [MCell 15 |124| -| | ] ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 0] > Logic Array Fan-in -=========================================================================== - +- Central Switch Matrix No. - | Src (ABEL Node/Pin#) Signal ---|--|--------------------|--------------------------------------------------- -Mux00| Input Pin ( 86)| RST -Mux01| ... | ... -Mux02| Mcel 1 10 ( 140)| CLK_000_P_SYNC_7_ -Mux03| Mcel 0 8 ( 113)| inst_UDS_000_INT -Mux04| Input Pin ( 64)| CLK_030 -Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| IOPin 7 6 ( 79)| SIZE_1_ -Mux07| Mcel 2 14 ( 170)| inst_DS_030_D0 -Mux08| IOPin 3 3 ( 32)| UDS_000 -Mux09| Mcel 2 6 ( 158)| CLK_000_P_SYNC_3_ -Mux10| Mcel 6 9 ( 259)| inst_CLK_030_H -Mux11| ... | ... -Mux12| ... | ... -Mux13| Mcel 7 8 ( 281)| RN_AS_030 -Mux14| IOPin 6 5 ( 70)| SIZE_0_ -Mux15| Mcel 0 0 ( 101)| RN_DS_030 -Mux16| IOPin 4 1 ( 42)| AS_000 -Mux17| ... | ... -Mux18| IOPin 6 4 ( 69)| A0 -Mux19| ... | ... -Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux21| IOPin 7 5 ( 80)| RW_000 -Mux22| Mcel 2 2 ( 152)| CLK_000_N_SYNC_1_ -Mux23| ... | ... -Mux24| Mcel 0 12 ( 119)| inst_LDS_000_INT -Mux25| Mcel 5 0 ( 221)| SM_AMIGA_6_ -Mux26| ... | ... -Mux27| IOPin 3 4 ( 31)| LDS_000 -Mux28| ... | ... -Mux29| ... | ... -Mux30| ... | ... -Mux31| ... | ... -Mux32| ... | ... ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 1] > Macrocell (MCell) Cluster Assignments -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size - | Sync/Async-------+ | | | Cluster to Mcell Assignment - | Node Fixed(*)----+ | | | | | +- XOR PT Size - | Sig Type-+ | | | | | | | XOR to Mcell Assignment - | Signal Name | | | | | | | | | -_|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| CLK_EXP|OUT| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig - 1| RESET|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig - 2| CIIN_0|NOD| | S | 2 | 4 to [ 2]| 1 XOR free - 3|inst_CLK_OUT_PRE|NOD| | S | 1 | 4 free | 1 XOR to [ 3] for 1 PT sig - 4| IPL_030_2_| IO| | S | 2 | 4 to [ 4]| 1 XOR free - 5|inst_CLK_000_NE|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig - 6|CLK_000_N_SYNC_4_|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig - 7| | ? | | S | | 4 free | 1 XOR free - 8| IPL_030_0_| IO| | S | 2 | 4 to [ 8]| 1 XOR free - 9|CLK_OUT_PRE_Dreg|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig -10|CLK_000_P_SYNC_7_|NOD| | S | 1 | 4 free | 1 XOR to [10] for 1 PT sig -11| | ? | | S | | 4 free | 1 XOR free -12| IPL_030_1_| IO| | S | 2 | 4 to [12]| 1 XOR free -13|inst_CLK_000_NE_D0|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig -14|CLK_000_P_SYNC_5_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig -15| | ? | | S | | 4 free | 1 XOR free ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 1] > Maximum PT Capacity -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ - | Sync/Async-------+ | | - | Node Fixed(*)----+ | | | - | Sig Type-+ | | | | - | Signal Name | | | | | Maximum PT Capacity -_|_________________|__|__|___|_____|_______________________________________ - 0| CLK_EXP|OUT| | S | 1 |=> can support up to [ 9] logic PT(s) - 1| RESET|OUT| | S | 1 |=> can support up to [ 13] logic PT(s) - 2| CIIN_0|NOD| | S | 2 |=> can support up to [ 13] logic PT(s) - 3|inst_CLK_OUT_PRE|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) - 4| IPL_030_2_| IO| | S | 2 |=> can support up to [ 17] logic PT(s) - 5|inst_CLK_000_NE|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) - 6|CLK_000_N_SYNC_4_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) - 7| | ? | | S | |=> can support up to [ 13] logic PT(s) - 8| IPL_030_0_| IO| | S | 2 |=> can support up to [ 18] logic PT(s) - 9|CLK_OUT_PRE_Dreg|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) -10|CLK_000_P_SYNC_7_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) -11| | ? | | S | |=> can support up to [ 13] logic PT(s) -12| IPL_030_1_| IO| | S | 2 |=> can support up to [ 18] logic PT(s) -13|inst_CLK_000_NE_D0|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) -14|CLK_000_P_SYNC_5_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) -15| | ? | | S | |=> can support up to [ 9] logic PT(s) ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 1] > Node-Pin Assignments -=========================================================================== - + Macrocell Number - | Node Fixed(*)------+ - | Sig Type---+ | to | Block [ 1] IO Pin | Device Pin - | Signal Name | | pin | Numbers | Numbers -_|_________________|__|_____|____________________|________________________ - 0| CLK_EXP|OUT| | => | 5 6 7 ( 0)| 5 4 3 ( 10) - 1| RESET|OUT| | => | 5 6 ( 7) 0 | 5 4 ( 3) 10 - 2| CIIN_0|NOD| | => | 6 7 0 1 | 4 3 10 9 - 3|inst_CLK_OUT_PRE|NOD| | => | 6 7 0 1 | 4 3 10 9 - 4| IPL_030_2_| IO| | => | 7 0 ( 1) 2 | 3 10 ( 9) 8 - 5|inst_CLK_000_NE|NOD| | => | 7 0 1 2 | 3 10 9 8 - 6|CLK_000_N_SYNC_4_|NOD| | => | 0 1 2 3 | 10 9 8 7 - 7| | | | => | 0 1 2 3 | 10 9 8 7 - 8| IPL_030_0_| IO| | => | 1 ( 2) 3 4 | 9 ( 8) 7 6 - 9|CLK_OUT_PRE_Dreg|NOD| | => | 1 2 3 4 | 9 8 7 6 -10|CLK_000_P_SYNC_7_|NOD| | => | 2 3 4 5 | 8 7 6 5 -11| | | | => | 2 3 4 5 | 8 7 6 5 -12| IPL_030_1_| IO| | => |( 3) 4 5 6 |( 7) 6 5 4 -13|inst_CLK_000_NE_D0|NOD| | => | 3 4 5 6 | 7 6 5 4 -14|CLK_000_P_SYNC_5_|NOD| | => | 4 5 6 7 | 6 5 4 3 -15| | | | => | 4 5 6 7 | 6 5 4 3 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 1] > IO-to-Node Pin Mapping -=========================================================================== - +- Block IO Pin - | Device Pin No.--------+ - | Pin Fixed(*)----+ | - | Sig Type--+ | | | - | Signal Name | | | | Node Destinations Via Output Matrix -_|_________________|__|___|_____|___________________________________________ - 0| CLK_EXP|OUT|*| 10| => | ( 0) 1 2 3 4 5 6 7 - 1| IPL_030_2_| IO|*| 9| => | 2 3 ( 4) 5 6 7 8 9 - 2| IPL_030_0_| IO|*| 8| => | 4 5 6 7 ( 8) 9 10 11 - 3| IPL_030_1_| IO|*| 7| => | 6 7 8 9 10 11 (12) 13 - 4| A_29_|INP|*| 6| => | 8 9 10 11 12 13 14 15 - 5| A_30_|INP|*| 5| => | 10 11 12 13 14 15 0 1 - 6| A_31_|INP|*| 4| => | 12 13 14 15 0 1 2 3 - 7| RESET|OUT|*| 3| => | 14 15 0 ( 1) 2 3 4 5 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 1] > IO/Node and IO/Input Macrocell Pairing Table -=========================================================================== - +- Block IO Pin - | Device Pin No.--------+ - | Pin Fixed(*)----+ | - | Sig Type--+ | | | - | Signal Name | | | | Input Macrocell and Node Pairs -_|_________________|__|___|_____|__________________________________________ - 0| CLK_EXP|OUT|*| 10| => | Input macrocell [ -] - 1| IPL_030_2_| IO|*| 9| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_IPL_030_2_] - 2| IPL_030_0_| IO|*| 8| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_IPL_030_0_] - 3| IPL_030_1_| IO|*| 7| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_IPL_030_1_] - 4| A_29_|INP|*| 6| => | Input macrocell [ -] - 5| A_30_|INP|*| 5| => | Input macrocell [ -] - 6| A_31_|INP|*| 4| => | Input macrocell [ -] - 7| RESET|OUT|*| 3| => | Input macrocell [ -] ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 1] > Input Multiplexer (IMX) Assignments -=========================================================================== - +----- IO pin/Input Register, or Macrocell -IMX No. | +---- Block IO Pin or Macrocell Number - | | | ABEL Node/ +-- Signal using the Pin or Macrocell - | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell - | | | | Sig Type | | +- Feedback Required (*) ----|-------|----|---|---|----------|------|-|------------------------------ - 0 [IOpin 0 | 10|OUT CLK_EXP|*| ] - [RegIn 0 |126| -| | ] - [MCell 0 |125|OUT CLK_EXP| | ] - [MCell 1 |127|OUT RESET| | ] - - 1 [IOpin 1 | 9| IO IPL_030_2_|*| ] paired w/[ RN_IPL_030_2_] - [RegIn 1 |129| -| | ] - [MCell 2 |128|NOD CIIN_0| |*] - [MCell 3 |130|NOD inst_CLK_OUT_PRE| |*] - - 2 [IOpin 2 | 8| IO IPL_030_0_|*| ] paired w/[ RN_IPL_030_0_] - [RegIn 2 |132| -| | ] - [MCell 4 |131|NOD RN_IPL_030_2_| |*] paired w/[ IPL_030_2_] - [MCell 5 |133|NOD inst_CLK_000_NE| |*] - - 3 [IOpin 3 | 7| IO IPL_030_1_|*| ] paired w/[ RN_IPL_030_1_] - [RegIn 3 |135| -| | ] - [MCell 6 |134|NOD CLK_000_N_SYNC_4_| |*] - [MCell 7 |136| -| | ] - - 4 [IOpin 4 | 6|INP A_29_|*|*] - [RegIn 4 |138| -| | ] - [MCell 8 |137|NOD RN_IPL_030_0_| |*] paired w/[ IPL_030_0_] - [MCell 9 |139|NOD CLK_OUT_PRE_Dreg| |*] - - 5 [IOpin 5 | 5|INP A_30_|*|*] - [RegIn 5 |141| -| | ] - [MCell 10 |140|NOD CLK_000_P_SYNC_7_| |*] - [MCell 11 |142| -| | ] - - 6 [IOpin 6 | 4|INP A_31_|*|*] - [RegIn 6 |144| -| | ] - [MCell 12 |143|NOD RN_IPL_030_1_| |*] paired w/[ IPL_030_1_] - [MCell 13 |145|NOD inst_CLK_000_NE_D0| |*] - - 7 [IOpin 7 | 3|OUT RESET|*| ] - [RegIn 7 |147| -| | ] - [MCell 14 |146|NOD CLK_000_P_SYNC_5_| |*] - [MCell 15 |148| -| | ] ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 1] > Logic Array Fan-in -=========================================================================== - +- Central Switch Matrix No. - | Src (ABEL Node/Pin#) Signal ---|--|--------------------|--------------------------------------------------- -Mux00| Input Pin ( 86)| RST -Mux01| IOPin 1 6 ( 4)| A_31_ -Mux02| Mcel 0 9 ( 115)| CLK_000_P_SYNC_4_ -Mux03| Mcel 4 5 ( 205)| un14_ciin_0 -Mux04| IOPin 6 3 ( 68)| IPL_2_ -Mux05| Mcel 1 3 ( 130)| inst_CLK_OUT_PRE -Mux06| Mcel 1 9 ( 139)| CLK_OUT_PRE_Dreg -Mux07| IOPin 2 0 ( 15)| A_28_ -Mux08| Mcel 4 8 ( 209)| inst_AS_030_D0 -Mux09| Mcel 6 13 ( 265)| inst_CLK_OUT_PRE_50 -Mux10| Mcel 3 14 ( 194)| CLK_000_N_SYNC_11_ -Mux11| IOPin 2 1 ( 16)| A_27_ -Mux12| Mcel 1 12 ( 143)| RN_IPL_030_1_ -Mux13| IOPin 1 4 ( 6)| A_29_ -Mux14| IOPin 2 4 ( 19)| A_24_ -Mux15| IOPin 0 3 ( 94)| A_21_ -Mux16| IOPin 6 2 ( 67)| IPL_0_ -Mux17| IOPin 2 2 ( 17)| A_26_ -Mux18| IOPin 7 0 ( 85)| A_23_ -Mux19| IOPin 1 5 ( 5)| A_30_ -Mux20| IOPin 7 1 ( 84)| A_22_ -Mux21| IOPin 5 4 ( 56)| IPL_1_ -Mux22| IOPin 2 3 ( 18)| A_25_ -Mux23| ... | ... -Mux24| ... | ... -Mux25| Mcel 1 8 ( 137)| RN_IPL_030_0_ -Mux26| Mcel 6 14 ( 266)| CLK_000_P_SYNC_6_ -Mux27| Mcel 1 4 ( 131)| RN_IPL_030_2_ -Mux28| Mcel 1 5 ( 133)| inst_CLK_000_NE -Mux29| IOPin 0 2 ( 93)| A_20_ -Mux30| Mcel 2 13 ( 169)| CLK_000_N_SYNC_3_ -Mux31| ... | ... -Mux32| ... | ... ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 2] > Macrocell (MCell) Cluster Assignments -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size - | Sync/Async-------+ | | | Cluster to Mcell Assignment - | Node Fixed(*)----+ | | | | | +- XOR PT Size - | Sig Type-+ | | | | | | | XOR to Mcell Assignment - | Signal Name | | | | | | | | | -_|_________________|__|__|___|_____|__|______|___|__________|______________ - 0|AMIGA_BUS_ENABLE_LOW|OUT| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig - 1|inst_DS_000_ENABLE|NOD| | S | 3 | 4 to [ 1]| 1 XOR free - 2|CLK_000_N_SYNC_1_|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig - 3| | ? | | S | | 4 free | 1 XOR free - 4| cpu_est_2_|NOD| | S | 4 | 4 to [ 4]| 1 XOR free - 5| inst_VPA_D|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig - 6|CLK_000_P_SYNC_3_|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig - 7| | ? | | S | | 4 free | 1 XOR free - 8| SM_AMIGA_3_|NOD| | S | 6 :+: 1| 4 to [ 8]| 1 XOR to [ 8] - 9|state_machine_un15_clk_000_ne_i_n|NOD| | S | 2 | 4 to [ 9]| 1 XOR free -10|CLK_000_P_SYNC_1_|NOD| | S | 1 | 4 to [ 8]| 1 XOR to [10] for 1 PT sig -11| | ? | | S | | 4 free | 1 XOR free -12| SM_AMIGA_2_|NOD| | S | 3 | 4 to [12]| 1 XOR free -13|CLK_000_N_SYNC_3_|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig -14|inst_DS_030_D0|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig -15| | ? | | S | | 4 free | 1 XOR free ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 2] > Maximum PT Capacity -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ - | Sync/Async-------+ | | - | Node Fixed(*)----+ | | | - | Sig Type-+ | | | | - | Signal Name | | | | | Maximum PT Capacity -_|_________________|__|__|___|_____|_______________________________________ - 0|AMIGA_BUS_ENABLE_LOW|OUT| | S | 1 |=> can support up to [ 9] logic PT(s) - 1|inst_DS_000_ENABLE|NOD| | S | 3 |=> can support up to [ 18] logic PT(s) - 2|CLK_000_N_SYNC_1_|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) - 3| | ? | | S | |=> can support up to [ 13] logic PT(s) - 4| cpu_est_2_|NOD| | S | 4 |=> can support up to [ 18] logic PT(s) - 5| inst_VPA_D|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) - 6|CLK_000_P_SYNC_3_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) - 7| | ? | | S | |=> can support up to [ 9] logic PT(s) - 8| SM_AMIGA_3_|NOD| | S | 6 :+: 1|=> can support up to [ 13] logic PT(s) - 9|state_machine_un15_clk_000_ne_i_n|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) -10|CLK_000_P_SYNC_1_|NOD| | S | 1 |=> can support up to [ 6] logic PT(s) -11| | ? | | S | |=> can support up to [ 9] logic PT(s) -12| SM_AMIGA_2_|NOD| | S | 3 |=> can support up to [ 18] logic PT(s) -13|CLK_000_N_SYNC_3_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) -14|inst_DS_030_D0|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) -15| | ? | | S | |=> can support up to [ 9] logic PT(s) ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 2] > Node-Pin Assignments -=========================================================================== - + Macrocell Number - | Node Fixed(*)------+ - | Sig Type---+ | to | Block [ 2] IO Pin | Device Pin - | Signal Name | | pin | Numbers | Numbers -_|_________________|__|_____|____________________|________________________ - 0|AMIGA_BUS_ENABLE_LOW|OUT| | => |( 5) 6 7 0 |( 20) 21 22 15 - 1|inst_DS_000_ENABLE|NOD| | => | 5 6 7 0 | 20 21 22 15 - 2|CLK_000_N_SYNC_1_|NOD| | => | 6 7 0 1 | 21 22 15 16 - 3| | | | => | 6 7 0 1 | 21 22 15 16 - 4| cpu_est_2_|NOD| | => | 7 0 1 2 | 22 15 16 17 - 5| inst_VPA_D|NOD| | => | 7 0 1 2 | 22 15 16 17 - 6|CLK_000_P_SYNC_3_|NOD| | => | 0 1 2 3 | 15 16 17 18 - 7| | | | => | 0 1 2 3 | 15 16 17 18 - 8| SM_AMIGA_3_|NOD| | => | 1 2 3 4 | 16 17 18 19 - 9|state_machine_un15_clk_000_ne_i_n|NOD| | => | 1 2 3 4 | 16 17 18 19 -10|CLK_000_P_SYNC_1_|NOD| | => | 2 3 4 5 | 17 18 19 20 -11| | | | => | 2 3 4 5 | 17 18 19 20 -12| SM_AMIGA_2_|NOD| | => | 3 4 5 6 | 18 19 20 21 -13|CLK_000_N_SYNC_3_|NOD| | => | 3 4 5 6 | 18 19 20 21 -14|inst_DS_030_D0|NOD| | => | 4 5 6 7 | 19 20 21 22 -15| | | | => | 4 5 6 7 | 19 20 21 22 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 2] > IO-to-Node Pin Mapping -=========================================================================== - +- Block IO Pin - | Device Pin No.--------+ - | Pin Fixed(*)----+ | - | Sig Type--+ | | | - | Signal Name | | | | Node Destinations Via Output Matrix -_|_________________|__|___|_____|___________________________________________ - 0| A_28_|INP|*| 15| => | 0 1 2 3 4 5 6 7 - 1| A_27_|INP|*| 16| => | 2 3 4 5 6 7 8 9 - 2| A_26_|INP|*| 17| => | 4 5 6 7 8 9 10 11 - 3| A_25_|INP|*| 18| => | 6 7 8 9 10 11 12 13 - 4| A_24_|INP|*| 19| => | 8 9 10 11 12 13 14 15 - 5|AMIGA_BUS_ENABLE_LOW|OUT|*| 20| => | 10 11 12 13 14 15 ( 0) 1 - 6| BG_030|INP|*| 21| => | 12 13 14 15 0 1 2 3 - 7| | | | 22| => | 14 15 0 1 2 3 4 5 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 2] > IO/Node and IO/Input Macrocell Pairing Table -=========================================================================== - +- Block IO Pin - | Device Pin No.--------+ - | Pin Fixed(*)----+ | - | Sig Type--+ | | | - | Signal Name | | | | Input Macrocell and Node Pairs -_|_________________|__|___|_____|__________________________________________ - 0| A_28_|INP|*| 15| => | Input macrocell [ -] - 1| A_27_|INP|*| 16| => | Input macrocell [ -] - 2| A_26_|INP|*| 17| => | Input macrocell [ -] - 3| A_25_|INP|*| 18| => | Input macrocell [ -] - 4| A_24_|INP|*| 19| => | Input macrocell [ -] - 5|AMIGA_BUS_ENABLE_LOW|OUT|*| 20| => | Input macrocell [ -] - 6| BG_030|INP|*| 21| => | Input macrocell [ -] - 7| | | | 22| => | Input macrocell [ -] ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 2] > Input Multiplexer (IMX) Assignments -=========================================================================== - +----- IO pin/Input Register, or Macrocell -IMX No. | +---- Block IO Pin or Macrocell Number - | | | ABEL Node/ +-- Signal using the Pin or Macrocell - | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell - | | | | Sig Type | | +- Feedback Required (*) ----|-------|----|---|---|----------|------|-|------------------------------ - 0 [IOpin 0 | 15|INP A_28_|*|*] - [RegIn 0 |150| -| | ] - [MCell 0 |149|OUT AMIGA_BUS_ENABLE_LOW| | ] - [MCell 1 |151|NOD inst_DS_000_ENABLE| |*] - - 1 [IOpin 1 | 16|INP A_27_|*|*] - [RegIn 1 |153| -| | ] - [MCell 2 |152|NOD CLK_000_N_SYNC_1_| |*] - [MCell 3 |154| -| | ] - - 2 [IOpin 2 | 17|INP A_26_|*|*] - [RegIn 2 |156| -| | ] - [MCell 4 |155|NOD cpu_est_2_| |*] - [MCell 5 |157|NOD inst_VPA_D| |*] - - 3 [IOpin 3 | 18|INP A_25_|*|*] - [RegIn 3 |159| -| | ] - [MCell 6 |158|NOD CLK_000_P_SYNC_3_| |*] - [MCell 7 |160| -| | ] - - 4 [IOpin 4 | 19|INP A_24_|*|*] - [RegIn 4 |162| -| | ] - [MCell 8 |161|NOD SM_AMIGA_3_| |*] - [MCell 9 |163|NOD state_machine_un15_clk_000_ne_i_n| |*] - - 5 [IOpin 5 | 20|OUT AMIGA_BUS_ENABLE_LOW|*| ] - [RegIn 5 |165| -| | ] - [MCell 10 |164|NOD CLK_000_P_SYNC_1_| |*] - [MCell 11 |166| -| | ] - - 6 [IOpin 6 | 21|INP BG_030|*|*] - [RegIn 6 |168| -| | ] - [MCell 12 |167|NOD SM_AMIGA_2_| |*] - [MCell 13 |169|NOD CLK_000_N_SYNC_3_| |*] - - 7 [IOpin 7 | 22| -| | ] - [RegIn 7 |171| -| | ] - [MCell 14 |170|NOD inst_DS_030_D0| |*] - [MCell 15 |172| -| | ] ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 2] > Logic Array Fan-in -=========================================================================== - +- Central Switch Matrix No. - | Src (ABEL Node/Pin#) Signal ---|--|--------------------|--------------------------------------------------- -Mux00| Input Pin ( 86)| RST -Mux01| IOPin 4 0 ( 41)| BERR -Mux02| Mcel 6 4 ( 251)| RN_E -Mux03| Mcel 6 5 ( 253)| inst_CLK_000_PE -Mux04| Mcel 2 12 ( 167)| SM_AMIGA_2_ -Mux05| Mcel 6 3 ( 250)| inst_DTACK_D0 -Mux06| Mcel 2 4 ( 155)| cpu_est_2_ -Mux07| Mcel 2 8 ( 161)| SM_AMIGA_3_ -Mux08| Mcel 4 8 ( 209)| inst_AS_030_D0 -Mux09| Mcel 5 2 ( 224)| CLK_000_N_SYNC_0_ -Mux10| Mcel 1 13 ( 145)| inst_CLK_000_NE_D0 -Mux11| IOPin 6 6 ( 71)| RW -Mux12| Mcel 0 1 ( 103)| CLK_000_N_SYNC_2_ -Mux13| Input Pin ( 36)| VPA -Mux14| Mcel 5 5 ( 229)| SM_AMIGA_4_ -Mux15| Mcel 2 5 ( 157)| inst_VPA_D -Mux16| Mcel 3 2 ( 176)| cpu_est_0_ -Mux17| Mcel 3 1 ( 175)| RN_VMA -Mux18| IOPin 0 7 ( 98)| DS_030 -Mux19| ... | ... -Mux20| Mcel 3 10 ( 188)| CLK_000_P_SYNC_0_ -Mux21| Mcel 7 6 ( 278)| CLK_000_P_SYNC_2_ -Mux22| Mcel 2 1 ( 151)| inst_DS_000_ENABLE -Mux23| ... | ... -Mux24| ... | ... -Mux25| Mcel 3 9 ( 187)| cpu_est_1_ -Mux26| ... | ... -Mux27| ... | ... -Mux28| Mcel 1 5 ( 133)| inst_CLK_000_NE -Mux29| ... | ... -Mux30| ... | ... -Mux31| Mcel 5 0 ( 221)| SM_AMIGA_6_ -Mux32| ... | ... ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 3] > Macrocell (MCell) Cluster Assignments -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size - | Sync/Async-------+ | | | Cluster to Mcell Assignment - | Node Fixed(*)----+ | | | | | +- XOR PT Size - | Sig Type-+ | | | | | | | XOR to Mcell Assignment - | Signal Name | | | | | | | | | -_|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| DTACK| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig - 1| VMA| IO| | S | 2 | 4 to [ 1]| 1 XOR free - 2| cpu_est_0_|NOD| | S | 2 | 4 to [ 2]| 1 XOR free - 3| | ? | | S | | 4 free | 1 XOR free - 4|AMIGA_ADDR_ENABLE| IO| | S | 3 | 4 to [ 4]| 1 XOR free - 5|AMIGA_BUS_ENABLE_HIGH|OUT| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig - 6|inst_CLK_000_D1|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig - 7| | ? | | S | | 4 free | 1 XOR free - 8| UDS_000| IO| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig - 9| cpu_est_1_|NOD| | S | 5 | 4 to [ 9]| 1 XOR to [ 9] as logic PT -10|CLK_000_P_SYNC_0_|NOD| | S | 1 | 4 free | 1 XOR to [10] for 1 PT sig -11| | ? | | S | | 4 free | 1 XOR free -12| LDS_000| IO| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig -13| BG_000| IO| | S | 2 | 4 to [13]| 1 XOR free -14|CLK_000_N_SYNC_11_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig -15| | ? | | S | | 4 free | 1 XOR free ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 3] > Maximum PT Capacity -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ - | Sync/Async-------+ | | - | Node Fixed(*)----+ | | | - | Sig Type-+ | | | | - | Signal Name | | | | | Maximum PT Capacity -_|_________________|__|__|___|_____|_______________________________________ - 0| DTACK| IO| | S | 1 |=> can support up to [ 5] logic PT(s) - 1| VMA| IO| | S | 2 |=> can support up to [ 14] logic PT(s) - 2| cpu_est_0_|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) - 3| | ? | | S | |=> can support up to [ 9] logic PT(s) - 4|AMIGA_ADDR_ENABLE| IO| | S | 3 |=> can support up to [ 18] logic PT(s) - 5|AMIGA_BUS_ENABLE_HIGH|OUT| | S | 1 |=> can support up to [ 14] logic PT(s) - 6|inst_CLK_000_D1|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) - 7| | ? | | S | |=> can support up to [ 13] logic PT(s) - 8| UDS_000| IO| | S | 1 |=> can support up to [ 14] logic PT(s) - 9| cpu_est_1_|NOD| | S | 5 |=> can support up to [ 18] logic PT(s) -10|CLK_000_P_SYNC_0_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) -11| | ? | | S | |=> can support up to [ 13] logic PT(s) -12| LDS_000| IO| | S | 1 |=> can support up to [ 14] logic PT(s) -13| BG_000| IO| | S | 2 |=> can support up to [ 18] logic PT(s) -14|CLK_000_N_SYNC_11_|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) -15| | ? | | S | |=> can support up to [ 9] logic PT(s) ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 3] > Node-Pin Assignments -=========================================================================== - + Macrocell Number - | Node Fixed(*)------+ - | Sig Type---+ | to | Block [ 3] IO Pin | Device Pin - | Signal Name | | pin | Numbers | Numbers -_|_________________|__|_____|____________________|________________________ - 0| DTACK| IO| | => |( 5) 6 7 0 |( 30) 29 28 35 - 1| VMA| IO| | => | 5 6 7 ( 0)| 30 29 28 ( 35) - 2| cpu_est_0_|NOD| | => | 6 7 0 1 | 29 28 35 34 - 3| | | | => | 6 7 0 1 | 29 28 35 34 - 4|AMIGA_ADDR_ENABLE| IO| | => | 7 0 1 ( 2)| 28 35 34 ( 33) - 5|AMIGA_BUS_ENABLE_HIGH|OUT| | => | 7 0 ( 1) 2 | 28 35 ( 34) 33 - 6|inst_CLK_000_D1|NOD| | => | 0 1 2 3 | 35 34 33 32 - 7| | | | => | 0 1 2 3 | 35 34 33 32 - 8| UDS_000| IO| | => | 1 2 ( 3) 4 | 34 33 ( 32) 31 - 9| cpu_est_1_|NOD| | => | 1 2 3 4 | 34 33 32 31 -10|CLK_000_P_SYNC_0_|NOD| | => | 2 3 4 5 | 33 32 31 30 -11| | | | => | 2 3 4 5 | 33 32 31 30 -12| LDS_000| IO| | => | 3 ( 4) 5 6 | 32 ( 31) 30 29 -13| BG_000| IO| | => | 3 4 5 ( 6)| 32 31 30 ( 29) -14|CLK_000_N_SYNC_11_|NOD| | => | 4 5 6 7 | 31 30 29 28 -15| | | | => | 4 5 6 7 | 31 30 29 28 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 3] > IO-to-Node Pin Mapping -=========================================================================== - +- Block IO Pin - | Device Pin No.--------+ - | Pin Fixed(*)----+ | - | Sig Type--+ | | | - | Signal Name | | | | Node Destinations Via Output Matrix -_|_________________|__|___|_____|___________________________________________ - 0| VMA| IO|*| 35| => | 0 ( 1) 2 3 4 5 6 7 - 1|AMIGA_BUS_ENABLE_HIGH|OUT|*| 34| => | 2 3 4 ( 5) 6 7 8 9 - 2|AMIGA_ADDR_ENABLE| IO|*| 33| => | ( 4) 5 6 7 8 9 10 11 - 3| UDS_000| IO|*| 32| => | 6 7 ( 8) 9 10 11 12 13 - 4| LDS_000| IO|*| 31| => | 8 9 10 11 (12) 13 14 15 - 5| DTACK| IO|*| 30| => | 10 11 12 13 14 15 ( 0) 1 - 6| BG_000| IO|*| 29| => | 12 (13) 14 15 0 1 2 3 - 7| BGACK_000|INP|*| 28| => | 14 15 0 1 2 3 4 5 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 3] > IO/Node and IO/Input Macrocell Pairing Table -=========================================================================== - +- Block IO Pin - | Device Pin No.--------+ - | Pin Fixed(*)----+ | - | Sig Type--+ | | | - | Signal Name | | | | Input Macrocell and Node Pairs -_|_________________|__|___|_____|__________________________________________ - 0| VMA| IO|*| 35| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_VMA] - 1|AMIGA_BUS_ENABLE_HIGH|OUT|*| 34| => | Input macrocell [ -] - 2|AMIGA_ADDR_ENABLE| IO|*| 33| => | Input macrocell [ -] - | | | | | | IO paired w/ node [RN_AMIGA_ADDR_ENABLE] - 3| UDS_000| IO|*| 32| => | Input macrocell [ -] - 4| LDS_000| IO|*| 31| => | Input macrocell [ -] - 5| DTACK| IO|*| 30| => | Input macrocell [ -] - 6| BG_000| IO|*| 29| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_BG_000] - 7| BGACK_000|INP|*| 28| => | Input macrocell [ -] ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 3] > Input Multiplexer (IMX) Assignments -=========================================================================== - +----- IO pin/Input Register, or Macrocell -IMX No. | +---- Block IO Pin or Macrocell Number - | | | ABEL Node/ +-- Signal using the Pin or Macrocell - | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell - | | | | Sig Type | | +- Feedback Required (*) ----|-------|----|---|---|----------|------|-|------------------------------ - 0 [IOpin 0 | 35| IO VMA|*| ] paired w/[ RN_VMA] - [RegIn 0 |174| -| | ] - [MCell 0 |173| IO DTACK| | ] - [MCell 1 |175|NOD RN_VMA| |*] paired w/[ VMA] - - 1 [IOpin 1 | 34|OUT AMIGA_BUS_ENABLE_HIGH|*| ] - [RegIn 1 |177| -| | ] - [MCell 2 |176|NOD cpu_est_0_| |*] - [MCell 3 |178| -| | ] - - 2 [IOpin 2 | 33| IO AMIGA_ADDR_ENABLE|*| ] paired w/[RN_AMIGA_ADDR_ENABLE] - [RegIn 2 |180| -| | ] - [MCell 4 |179|NOD RN_AMIGA_ADDR_ENABLE| |*] paired w/[AMIGA_ADDR_ENABLE] - [MCell 5 |181|OUT AMIGA_BUS_ENABLE_HIGH| | ] - - 3 [IOpin 3 | 32| IO UDS_000|*|*] - [RegIn 3 |183| -| | ] - [MCell 6 |182|NOD inst_CLK_000_D1| |*] - [MCell 7 |184| -| | ] - - 4 [IOpin 4 | 31| IO LDS_000|*|*] - [RegIn 4 |186| -| | ] - [MCell 8 |185| IO UDS_000| | ] - [MCell 9 |187|NOD cpu_est_1_| |*] - - 5 [IOpin 5 | 30| IO DTACK|*|*] - [RegIn 5 |189| -| | ] - [MCell 10 |188|NOD CLK_000_P_SYNC_0_| |*] - [MCell 11 |190| -| | ] - - 6 [IOpin 6 | 29| IO BG_000|*| ] paired w/[ RN_BG_000] - [RegIn 6 |192| -| | ] - [MCell 12 |191| IO LDS_000| | ] - [MCell 13 |193|NOD RN_BG_000| |*] paired w/[ BG_000] - - 7 [IOpin 7 | 28|INP BGACK_000|*|*] - [RegIn 7 |195| -| | ] - [MCell 14 |194|NOD CLK_000_N_SYNC_11_| |*] - [MCell 15 |196| -| | ] ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 3] > Logic Array Fan-in -=========================================================================== - +- Central Switch Matrix No. - | Src (ABEL Node/Pin#) Signal ---|--|--------------------|--------------------------------------------------- -Mux00| Input Pin ( 86)| RST -Mux01| Mcel 5 9 ( 235)| inst_CLK_000_D0 -Mux02| Mcel 4 9 ( 211)| inst_BGACK_030_INT_D -Mux03| Mcel 3 2 ( 176)| cpu_est_0_ -Mux04| IOPin 2 6 ( 21)| BG_030 -Mux05| Mcel 7 9 ( 283)| CLK_000_N_SYNC_10_ -Mux06| Mcel 2 4 ( 155)| cpu_est_2_ -Mux07| Mcel 2 5 ( 157)| inst_VPA_D -Mux08| Mcel 4 8 ( 209)| inst_AS_030_D0 -Mux09| Mcel 0 12 ( 119)| inst_LDS_000_INT -Mux10| IOPin 7 4 ( 81)| DSACK1 -Mux11| Mcel 6 4 ( 251)| RN_E -Mux12| Mcel 3 9 ( 187)| cpu_est_1_ -Mux13| Mcel 7 8 ( 281)| RN_AS_030 -Mux14| Mcel 5 4 ( 227)| SM_AMIGA_7_ -Mux15| Input Pin ( 14)| nEXP_SPACE -Mux16| Mcel 3 6 ( 182)| inst_CLK_000_D1 -Mux17| Mcel 3 1 ( 175)| RN_VMA -Mux18| Mcel 0 8 ( 113)| inst_UDS_000_INT -Mux19| ... | ... -Mux20| Mcel 5 8 ( 233)| inst_AS_030_000_SYNC -Mux21| Mcel 3 4 ( 179)| RN_AMIGA_ADDR_ENABLE -Mux22| Mcel 2 1 ( 151)| inst_DS_000_ENABLE -Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux24| ... | ... -Mux25| ... | ... -Mux26| ... | ... -Mux27| ... | ... -Mux28| Mcel 1 13 ( 145)| inst_CLK_000_NE_D0 -Mux29| Mcel 3 13 ( 193)| RN_BG_000 -Mux30| ... | ... -Mux31| Mcel 1 5 ( 133)| inst_CLK_000_NE -Mux32| Mcel 6 5 ( 253)| inst_CLK_000_PE ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 4] > Macrocell (MCell) Cluster Assignments -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size - | Sync/Async-------+ | | | Cluster to Mcell Assignment - | Node Fixed(*)----+ | | | | | +- XOR PT Size - | Sig Type-+ | | | | | | | XOR to Mcell Assignment - | Signal Name | | | | | | | | | -_|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| BERR| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig - 1|AMIGA_BUS_DATA_DIR|OUT| | S | 2 | 4 to [ 1]| 1 XOR free - 2| | ? | | S | | 4 free | 1 XOR free - 3| | ? | | S | | 4 free | 1 XOR free - 4| AS_000| IO| | S | 2 | 4 to [ 4]| 1 XOR free - 5| un14_ciin_0|NOD| | S | 2 | 4 to [ 5]| 1 XOR free - 6| | ? | | S | | 4 free | 1 XOR free - 7| | ? | | S | | 4 free | 1 XOR free - 8|inst_AS_030_D0|NOD| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig - 9|inst_BGACK_030_INT_D|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig -10| | ? | | S | | 4 free | 1 XOR free -11| | ? | | S | | 4 free | 1 XOR free -12| CIIN|OUT| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig -13| | ? | | S | | 4 free | 1 XOR free -14| | ? | | S | | 4 free | 1 XOR free -15| | ? | | S | | 4 free | 1 XOR free ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 4] > Maximum PT Capacity -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ - | Sync/Async-------+ | | - | Node Fixed(*)----+ | | | - | Sig Type-+ | | | | - | Signal Name | | | | | Maximum PT Capacity -_|_________________|__|__|___|_____|_______________________________________ - 0| BERR| IO| | S | 1 |=> can support up to [ 10] logic PT(s) - 1|AMIGA_BUS_DATA_DIR|OUT| | S | 2 |=> can support up to [ 19] logic PT(s) - 2| | ? | | S | |=> can support up to [ 10] logic PT(s) - 3| | ? | | S | |=> can support up to [ 10] logic PT(s) - 4| AS_000| IO| | S | 2 |=> can support up to [ 15] logic PT(s) - 5| un14_ciin_0|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) - 6| | ? | | S | |=> can support up to [ 14] logic PT(s) - 7| | ? | | S | |=> can support up to [ 18] logic PT(s) - 8|inst_AS_030_D0|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) - 9|inst_BGACK_030_INT_D|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) -10| | ? | | S | |=> can support up to [ 18] logic PT(s) -11| | ? | | S | |=> can support up to [ 19] logic PT(s) -12| CIIN|OUT| | S | 1 |=> can support up to [ 20] logic PT(s) -13| | ? | | S | |=> can support up to [ 19] logic PT(s) -14| | ? | | S | |=> can support up to [ 15] logic PT(s) -15| | ? | | S | |=> can support up to [ 10] logic PT(s) ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 4] > Node-Pin Assignments -=========================================================================== - + Macrocell Number - | Node Fixed(*)------+ - | Sig Type---+ | to | Block [ 4] IO Pin | Device Pin - | Signal Name | | pin | Numbers | Numbers -_|_________________|__|_____|____________________|________________________ - 0| BERR| IO| | => | 5 6 7 ( 0)| 46 47 48 ( 41) - 1|AMIGA_BUS_DATA_DIR|OUT| | => | 5 6 ( 7) 0 | 46 47 ( 48) 41 - 2| | | | => | 6 7 0 1 | 47 48 41 42 - 3| | | | => | 6 7 0 1 | 47 48 41 42 - 4| AS_000| IO| | => | 7 0 ( 1) 2 | 48 41 ( 42) 43 - 5| un14_ciin_0|NOD| | => | 7 0 1 2 | 48 41 42 43 - 6| | | | => | 0 1 2 3 | 41 42 43 44 - 7| | | | => | 0 1 2 3 | 41 42 43 44 - 8|inst_AS_030_D0|NOD| | => | 1 2 3 4 | 42 43 44 45 - 9|inst_BGACK_030_INT_D|NOD| | => | 1 2 3 4 | 42 43 44 45 -10| | | | => | 2 3 4 5 | 43 44 45 46 -11| | | | => | 2 3 4 5 | 43 44 45 46 -12| CIIN|OUT| | => | 3 4 5 ( 6)| 44 45 46 ( 47) -13| | | | => | 3 4 5 6 | 44 45 46 47 -14| | | | => | 4 5 6 7 | 45 46 47 48 -15| | | | => | 4 5 6 7 | 45 46 47 48 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 4] > IO-to-Node Pin Mapping -=========================================================================== - +- Block IO Pin - | Device Pin No.--------+ - | Pin Fixed(*)----+ | - | Sig Type--+ | | | - | Signal Name | | | | Node Destinations Via Output Matrix -_|_________________|__|___|_____|___________________________________________ - 0| BERR| IO|*| 41| => | ( 0) 1 2 3 4 5 6 7 - 1| AS_000| IO|*| 42| => | 2 3 ( 4) 5 6 7 8 9 - 2| | | | 43| => | 4 5 6 7 8 9 10 11 - 3| | | | 44| => | 6 7 8 9 10 11 12 13 - 4| | | | 45| => | 8 9 10 11 12 13 14 15 - 5| | | | 46| => | 10 11 12 13 14 15 0 1 - 6| CIIN|OUT|*| 47| => | (12) 13 14 15 0 1 2 3 - 7|AMIGA_BUS_DATA_DIR|OUT|*| 48| => | 14 15 0 ( 1) 2 3 4 5 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 4] > IO/Node and IO/Input Macrocell Pairing Table -=========================================================================== - +- Block IO Pin - | Device Pin No.--------+ - | Pin Fixed(*)----+ | - | Sig Type--+ | | | - | Signal Name | | | | Input Macrocell and Node Pairs -_|_________________|__|___|_____|__________________________________________ - 0| BERR| IO|*| 41| => | Input macrocell [ -] - 1| AS_000| IO|*| 42| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_AS_000] - 2| | | | 43| => | Input macrocell [ -] - 3| | | | 44| => | Input macrocell [ -] - 4| | | | 45| => | Input macrocell [ -] - 5| | | | 46| => | Input macrocell [ -] - 6| CIIN|OUT|*| 47| => | Input macrocell [ -] - 7|AMIGA_BUS_DATA_DIR|OUT|*| 48| => | Input macrocell [ -] ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 4] > Input Multiplexer (IMX) Assignments -=========================================================================== - +----- IO pin/Input Register, or Macrocell -IMX No. | +---- Block IO Pin or Macrocell Number - | | | ABEL Node/ +-- Signal using the Pin or Macrocell - | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell - | | | | Sig Type | | +- Feedback Required (*) ----|-------|----|---|---|----------|------|-|------------------------------ - 0 [IOpin 0 | 41| IO BERR|*|*] - [RegIn 0 |198| -| | ] - [MCell 0 |197| IO BERR| | ] - [MCell 1 |199|OUT AMIGA_BUS_DATA_DIR| | ] - - 1 [IOpin 1 | 42| IO AS_000|*|*] paired w/[ RN_AS_000] - [RegIn 1 |201| -| | ] - [MCell 2 |200| -| | ] - [MCell 3 |202| -| | ] - - 2 [IOpin 2 | 43| -| | ] - [RegIn 2 |204| -| | ] - [MCell 4 |203|NOD RN_AS_000| |*] paired w/[ AS_000] - [MCell 5 |205|NOD un14_ciin_0| |*] - - 3 [IOpin 3 | 44| -| | ] - [RegIn 3 |207| -| | ] - [MCell 6 |206| -| | ] - [MCell 7 |208| -| | ] - - 4 [IOpin 4 | 45| -| | ] - [RegIn 4 |210| -| | ] - [MCell 8 |209|NOD inst_AS_030_D0| |*] - [MCell 9 |211|NOD inst_BGACK_030_INT_D| |*] - - 5 [IOpin 5 | 46| -| | ] - [RegIn 5 |213| -| | ] - [MCell 10 |212| -| | ] - [MCell 11 |214| -| | ] - - 6 [IOpin 6 | 47|OUT CIIN|*| ] - [RegIn 6 |216| -| | ] - [MCell 12 |215|OUT CIIN| | ] - [MCell 13 |217| -| | ] - - 7 [IOpin 7 | 48|OUT AMIGA_BUS_DATA_DIR|*| ] - [RegIn 7 |219| -| | ] - [MCell 14 |218| -| | ] - [MCell 15 |220| -| | ] ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 4] > Logic Array Fan-in -=========================================================================== - +- Central Switch Matrix No. - | Src (ABEL Node/Pin#) Signal ---|--|--------------------|--------------------------------------------------- -Mux00| Input Pin ( 86)| RST -Mux01| IOPin 4 0 ( 41)| BERR -Mux02| IOPin 4 1 ( 42)| AS_000 -Mux03| IOPin 2 3 ( 18)| A_25_ -Mux04| IOPin 3 7 ( 28)| BGACK_000 -Mux05| Mcel 5 0 ( 221)| SM_AMIGA_6_ -Mux06| IOPin 0 5 ( 96)| A_16_ -Mux07| IOPin 2 0 ( 15)| A_28_ -Mux08| IOPin 5 1 ( 59)| A_17_ -Mux09| IOPin 1 5 ( 5)| A_30_ -Mux10| Mcel 1 2 ( 128)| CIIN_0 -Mux11| IOPin 2 1 ( 16)| A_27_ -Mux12| IOPin 5 2 ( 58)| FC_1_ -Mux13| IOPin 1 4 ( 6)| A_29_ -Mux14| IOPin 2 4 ( 19)| A_24_ -Mux15| IOPin 0 3 ( 94)| A_21_ -Mux16| Mcel 4 8 ( 209)| inst_AS_030_D0 -Mux17| IOPin 0 2 ( 93)| A_20_ -Mux18| IOPin 7 0 ( 85)| A_23_ -Mux19| IOPin 0 0 ( 91)| FPU_SENSE -Mux20| IOPin 7 1 ( 84)| A_22_ -Mux21| Input Pin ( 14)| nEXP_SPACE -Mux22| Mcel 6 5 ( 253)| inst_CLK_000_PE -Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux24| IOPin 5 3 ( 57)| FC_0_ -Mux25| IOPin 1 6 ( 4)| A_31_ -Mux26| IOPin 2 2 ( 17)| A_26_ -Mux27| IOPin 0 6 ( 97)| A_19_ -Mux28| IOPin 7 5 ( 80)| RW_000 -Mux29| Mcel 4 4 ( 203)| RN_AS_000 -Mux30| ... | ... -Mux31| IOPin 0 4 ( 95)| A_18_ -Mux32| IOPin 7 3 ( 82)| AS_030 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 5] > Macrocell (MCell) Cluster Assignments -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size - | Sync/Async-------+ | | | Cluster to Mcell Assignment - | Node Fixed(*)----+ | | | | | +- XOR PT Size - | Sig Type-+ | | | | | | | XOR to Mcell Assignment - | Signal Name | | | | | | | | | -_|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| SM_AMIGA_6_|NOD| | S | 2 | 4 to [ 0]| 1 XOR free - 1| SM_AMIGA_0_|NOD| | S | 2 | 4 to [ 1]| 1 XOR free - 2|CLK_000_N_SYNC_0_|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig - 3| | ? | | S | | 4 to [ 4]| 1 XOR free - 4| SM_AMIGA_7_|NOD| | S |13 | 4 to [ 4]| 1 XOR to [ 4] as logic PT - 5| SM_AMIGA_4_|NOD| | S | 2 | 4 to [ 5]| 1 XOR free - 6|CLK_000_P_SYNC_9_|NOD| | S | 1 | 4 to [ 4]| 1 XOR to [ 6] for 1 PT sig - 7| | ? | | S | | 4 free | 1 XOR free - 8|inst_AS_030_000_SYNC|NOD| | S | 6 | 4 to [ 8]| 1 XOR to [ 8] as logic PT - 9|inst_CLK_000_D0|NOD| | S | 1 | 4 to [ 8]| 1 XOR to [ 9] for 1 PT sig -10| | ? | | S | | 4 free | 1 XOR free -11| | ? | | S | | 4 free | 1 XOR free -12| SM_AMIGA_1_|NOD| | S | 2 | 4 to [12]| 1 XOR free -13| SM_AMIGA_5_|NOD| | S | 2 | 4 to [13]| 1 XOR free -14| | ? | | S | | 4 free | 1 XOR free -15| | ? | | S | | 4 free | 1 XOR free ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 5] > Maximum PT Capacity -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ - | Sync/Async-------+ | | - | Node Fixed(*)----+ | | | - | Sig Type-+ | | | | - | Signal Name | | | | | Maximum PT Capacity -_|_________________|__|__|___|_____|_______________________________________ - 0| SM_AMIGA_6_|NOD| | S | 2 |=> can support up to [ 9] logic PT(s) - 1| SM_AMIGA_0_|NOD| | S | 2 |=> can support up to [ 9] logic PT(s) - 2|CLK_000_N_SYNC_0_|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) - 3| | ? | | S | |=> can support up to [ 5] logic PT(s) - 4| SM_AMIGA_7_|NOD| | S |13 |=> can support up to [ 14] logic PT(s) - 5| SM_AMIGA_4_|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) - 6|CLK_000_P_SYNC_9_|NOD| | S | 1 |=> can support up to [ 6] logic PT(s) - 7| | ? | | S | |=> can support up to [ 5] logic PT(s) - 8|inst_AS_030_000_SYNC|NOD| | S | 6 |=> can support up to [ 19] logic PT(s) - 9|inst_CLK_000_D0|NOD| | S | 1 |=> can support up to [ 11] logic PT(s) -10| | ? | | S | |=> can support up to [ 10] logic PT(s) -11| | ? | | S | |=> can support up to [ 10] logic PT(s) -12| SM_AMIGA_1_|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) -13| SM_AMIGA_5_|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) -14| | ? | | S | |=> can support up to [ 10] logic PT(s) -15| | ? | | S | |=> can support up to [ 10] logic PT(s) ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 5] > Node-Pin Assignments -=========================================================================== - + Macrocell Number - | Node Fixed(*)------+ - | Sig Type---+ | to | Block [ 5] IO Pin | Device Pin - | Signal Name | | pin | Numbers | Numbers -_|_________________|__|_____|____________________|________________________ - 0| SM_AMIGA_6_|NOD| | => | 5 6 7 0 | 55 54 53 60 - 1| SM_AMIGA_0_|NOD| | => | 5 6 7 0 | 55 54 53 60 - 2|CLK_000_N_SYNC_0_|NOD| | => | 6 7 0 1 | 54 53 60 59 - 3| | | | => | 6 7 0 1 | 54 53 60 59 - 4| SM_AMIGA_7_|NOD| | => | 7 0 1 2 | 53 60 59 58 - 5| SM_AMIGA_4_|NOD| | => | 7 0 1 2 | 53 60 59 58 - 6|CLK_000_P_SYNC_9_|NOD| | => | 0 1 2 3 | 60 59 58 57 - 7| | | | => | 0 1 2 3 | 60 59 58 57 - 8|inst_AS_030_000_SYNC|NOD| | => | 1 2 3 4 | 59 58 57 56 - 9|inst_CLK_000_D0|NOD| | => | 1 2 3 4 | 59 58 57 56 -10| | | | => | 2 3 4 5 | 58 57 56 55 -11| | | | => | 2 3 4 5 | 58 57 56 55 -12| SM_AMIGA_1_|NOD| | => | 3 4 5 6 | 57 56 55 54 -13| SM_AMIGA_5_|NOD| | => | 3 4 5 6 | 57 56 55 54 -14| | | | => | 4 5 6 7 | 56 55 54 53 -15| | | | => | 4 5 6 7 | 56 55 54 53 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 5] > IO-to-Node Pin Mapping -=========================================================================== - +- Block IO Pin - | Device Pin No.--------+ - | Pin Fixed(*)----+ | - | Sig Type--+ | | | - | Signal Name | | | | Node Destinations Via Output Matrix -_|_________________|__|___|_____|___________________________________________ - 0| | | | 60| => | 0 1 2 3 4 5 6 7 - 1| A_17_|INP|*| 59| => | 2 3 4 5 6 7 8 9 - 2| FC_1_|INP|*| 58| => | 4 5 6 7 8 9 10 11 - 3| FC_0_|INP|*| 57| => | 6 7 8 9 10 11 12 13 - 4| IPL_1_|INP|*| 56| => | 8 9 10 11 12 13 14 15 - 5| | | | 55| => | 10 11 12 13 14 15 0 1 - 6| | | | 54| => | 12 13 14 15 0 1 2 3 - 7| | | | 53| => | 14 15 0 1 2 3 4 5 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 5] > IO/Node and IO/Input Macrocell Pairing Table -=========================================================================== - +- Block IO Pin - | Device Pin No.--------+ - | Pin Fixed(*)----+ | - | Sig Type--+ | | | - | Signal Name | | | | Input Macrocell and Node Pairs -_|_________________|__|___|_____|__________________________________________ - 0| | | | 60| => | Input macrocell [ -] - 1| A_17_|INP|*| 59| => | Input macrocell [ -] - 2| FC_1_|INP|*| 58| => | Input macrocell [ -] - 3| FC_0_|INP|*| 57| => | Input macrocell [ -] - 4| IPL_1_|INP|*| 56| => | Input macrocell [ -] - 5| | | | 55| => | Input macrocell [ -] - 6| | | | 54| => | Input macrocell [ -] - 7| | | | 53| => | Input macrocell [ -] ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 5] > Input Multiplexer (IMX) Assignments -=========================================================================== - +----- IO pin/Input Register, or Macrocell -IMX No. | +---- Block IO Pin or Macrocell Number - | | | ABEL Node/ +-- Signal using the Pin or Macrocell - | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell - | | | | Sig Type | | +- Feedback Required (*) ----|-------|----|---|---|----------|------|-|------------------------------ - 0 [IOpin 0 | 60| -| | ] - [RegIn 0 |222| -| | ] - [MCell 0 |221|NOD SM_AMIGA_6_| |*] - [MCell 1 |223|NOD SM_AMIGA_0_| |*] - - 1 [IOpin 1 | 59|INP A_17_|*|*] - [RegIn 1 |225| -| | ] - [MCell 2 |224|NOD CLK_000_N_SYNC_0_| |*] - [MCell 3 |226| -| | ] - - 2 [IOpin 2 | 58|INP FC_1_|*|*] - [RegIn 2 |228| -| | ] - [MCell 4 |227|NOD SM_AMIGA_7_| |*] - [MCell 5 |229|NOD SM_AMIGA_4_| |*] - - 3 [IOpin 3 | 57|INP FC_0_|*|*] - [RegIn 3 |231| -| | ] - [MCell 6 |230|NOD CLK_000_P_SYNC_9_| |*] - [MCell 7 |232| -| | ] - - 4 [IOpin 4 | 56|INP IPL_1_|*|*] - [RegIn 4 |234| -| | ] - [MCell 8 |233|NOD inst_AS_030_000_SYNC| |*] - [MCell 9 |235|NOD inst_CLK_000_D0| |*] - - 5 [IOpin 5 | 55| -| | ] - [RegIn 5 |237| -| | ] - [MCell 10 |236| -| | ] - [MCell 11 |238| -| | ] - - 6 [IOpin 6 | 54| -| | ] - [RegIn 6 |240| -| | ] - [MCell 12 |239|NOD SM_AMIGA_1_| |*] - [MCell 13 |241|NOD SM_AMIGA_5_| |*] - - 7 [IOpin 7 | 53| -| | ] - [RegIn 7 |243| -| | ] - [MCell 14 |242| -| | ] - [MCell 15 |244| -| | ] ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 5] > Logic Array Fan-in -=========================================================================== - +- Central Switch Matrix No. - | Src (ABEL Node/Pin#) Signal ---|--|--------------------|--------------------------------------------------- -Mux00| Input Pin ( 86)| RST -Mux01| IOPin 4 0 ( 41)| BERR -Mux02| Mcel 0 5 ( 109)| CLK_000_P_SYNC_8_ -Mux03| Input Pin ( 11)| CLK_000 -Mux04| IOPin 0 4 ( 95)| A_18_ -Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| IOPin 0 6 ( 97)| A_19_ -Mux07| Mcel 2 8 ( 161)| SM_AMIGA_3_ -Mux08| IOPin 5 1 ( 59)| A_17_ -Mux09| Mcel 5 5 ( 229)| SM_AMIGA_4_ -Mux10| Mcel 5 1 ( 223)| SM_AMIGA_0_ -Mux11| IOPin 0 5 ( 96)| A_16_ -Mux12| IOPin 5 2 ( 58)| FC_1_ -Mux13| Mcel 2 9 ( 163)| state_machine_un15_clk_000_ne_i_n -Mux14| Mcel 5 4 ( 227)| SM_AMIGA_7_ -Mux15| Mcel 5 13 ( 241)| SM_AMIGA_5_ -Mux16| Mcel 3 6 ( 182)| inst_CLK_000_D1 -Mux17| IOPin 5 3 ( 57)| FC_0_ -Mux18| IOPin 3 7 ( 28)| BGACK_000 -Mux19| ... | ... -Mux20| Mcel 5 8 ( 233)| inst_AS_030_000_SYNC -Mux21| ... | ... -Mux22| Mcel 6 5 ( 253)| inst_CLK_000_PE -Mux23| Mcel 2 12 ( 167)| SM_AMIGA_2_ -Mux24| ... | ... -Mux25| Mcel 5 0 ( 221)| SM_AMIGA_6_ -Mux26| ... | ... -Mux27| ... | ... -Mux28| Mcel 1 5 ( 133)| inst_CLK_000_NE -Mux29| ... | ... -Mux30| Mcel 4 8 ( 209)| inst_AS_030_D0 -Mux31| Mcel 5 12 ( 239)| SM_AMIGA_1_ -Mux32| Mcel 5 9 ( 235)| inst_CLK_000_D0 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 6] > Macrocell (MCell) Cluster Assignments -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size - | Sync/Async-------+ | | | Cluster to Mcell Assignment - | Node Fixed(*)----+ | | | | | +- XOR PT Size - | Sig Type-+ | | | | | | | XOR to Mcell Assignment - | Signal Name | | | | | | | | | -_|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| RW| IO| | S | 4 | 4 to [ 0]| 1 XOR free - 1| CLK_DIV_OUT|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig - 2|CLK_000_N_SYNC_8_|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig - 3| inst_DTACK_D0|NOD| | S | 1 | 4 free | 1 XOR to [ 3] for 1 PT sig - 4| E| IO| | S | 5 | 4 to [ 4]| 1 XOR to [ 4] as logic PT - 5|inst_CLK_000_PE|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig - 6|CLK_000_N_SYNC_7_|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig - 7| | ? | | S | | 4 free | 1 XOR free - 8| A0| IO| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig - 9|inst_CLK_030_H|NOD| | S | 4 | 4 to [ 9]| 1 XOR free -10|CLK_000_N_SYNC_6_|NOD| | S | 1 | 4 free | 1 XOR to [10] for 1 PT sig -11| | ? | | S | | 4 free | 1 XOR free -12| SIZE_0_| IO| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig -13|inst_CLK_OUT_PRE_50|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig -14|CLK_000_P_SYNC_6_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig -15| | ? | | S | | 4 free | 1 XOR free ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 6] > Maximum PT Capacity -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ - | Sync/Async-------+ | | - | Node Fixed(*)----+ | | | - | Sig Type-+ | | | | - | Signal Name | | | | | Maximum PT Capacity -_|_________________|__|__|___|_____|_______________________________________ - 0| RW| IO| | S | 4 |=> can support up to [ 13] logic PT(s) - 1| CLK_DIV_OUT|OUT| | S | 1 |=> can support up to [ 13] logic PT(s) - 2|CLK_000_N_SYNC_8_|NOD| | S | 1 |=> can support up to [ 13] logic PT(s) - 3| inst_DTACK_D0|NOD| | S | 1 |=> can support up to [ 13] logic PT(s) - 4| E| IO| | S | 5 |=> can support up to [ 17] logic PT(s) - 5|inst_CLK_000_PE|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) - 6|CLK_000_N_SYNC_7_|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) - 7| | ? | | S | |=> can support up to [ 13] logic PT(s) - 8| A0| IO| | S | 1 |=> can support up to [ 14] logic PT(s) - 9|inst_CLK_030_H|NOD| | S | 4 |=> can support up to [ 18] logic PT(s) -10|CLK_000_N_SYNC_6_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) -11| | ? | | S | |=> can support up to [ 17] logic PT(s) -12| SIZE_0_| IO| | S | 1 |=> can support up to [ 18] logic PT(s) -13|inst_CLK_OUT_PRE_50|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) -14|CLK_000_P_SYNC_6_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) -15| | ? | | S | |=> can support up to [ 9] logic PT(s) ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 6] > Node-Pin Assignments -=========================================================================== - + Macrocell Number - | Node Fixed(*)------+ - | Sig Type---+ | to | Block [ 6] IO Pin | Device Pin - | Signal Name | | pin | Numbers | Numbers -_|_________________|__|_____|____________________|________________________ - 0| RW| IO| | => | 5 ( 6) 7 0 | 70 ( 71) 72 65 - 1| CLK_DIV_OUT|OUT| | => | 5 6 7 ( 0)| 70 71 72 ( 65) - 2|CLK_000_N_SYNC_8_|NOD| | => | 6 7 0 1 | 71 72 65 66 - 3| inst_DTACK_D0|NOD| | => | 6 7 0 1 | 71 72 65 66 - 4| E| IO| | => | 7 0 ( 1) 2 | 72 65 ( 66) 67 - 5|inst_CLK_000_PE|NOD| | => | 7 0 1 2 | 72 65 66 67 - 6|CLK_000_N_SYNC_7_|NOD| | => | 0 1 2 3 | 65 66 67 68 - 7| | | | => | 0 1 2 3 | 65 66 67 68 - 8| A0| IO| | => | 1 2 3 ( 4)| 66 67 68 ( 69) - 9|inst_CLK_030_H|NOD| | => | 1 2 3 4 | 66 67 68 69 -10|CLK_000_N_SYNC_6_|NOD| | => | 2 3 4 5 | 67 68 69 70 -11| | | | => | 2 3 4 5 | 67 68 69 70 -12| SIZE_0_| IO| | => | 3 4 ( 5) 6 | 68 69 ( 70) 71 -13|inst_CLK_OUT_PRE_50|NOD| | => | 3 4 5 6 | 68 69 70 71 -14|CLK_000_P_SYNC_6_|NOD| | => | 4 5 6 7 | 69 70 71 72 -15| | | | => | 4 5 6 7 | 69 70 71 72 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 6] > IO-to-Node Pin Mapping -=========================================================================== - +- Block IO Pin - | Device Pin No.--------+ - | Pin Fixed(*)----+ | - | Sig Type--+ | | | - | Signal Name | | | | Node Destinations Via Output Matrix -_|_________________|__|___|_____|___________________________________________ - 0| CLK_DIV_OUT|OUT|*| 65| => | 0 ( 1) 2 3 4 5 6 7 - 1| E| IO|*| 66| => | 2 3 ( 4) 5 6 7 8 9 - 2| IPL_0_|INP|*| 67| => | 4 5 6 7 8 9 10 11 - 3| IPL_2_|INP|*| 68| => | 6 7 8 9 10 11 12 13 - 4| A0| IO|*| 69| => | ( 8) 9 10 11 12 13 14 15 - 5| SIZE_0_| IO|*| 70| => | 10 11 (12) 13 14 15 0 1 - 6| RW| IO|*| 71| => | 12 13 14 15 ( 0) 1 2 3 - 7| | | | 72| => | 14 15 0 1 2 3 4 5 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 6] > IO/Node and IO/Input Macrocell Pairing Table -=========================================================================== - +- Block IO Pin - | Device Pin No.--------+ - | Pin Fixed(*)----+ | - | Sig Type--+ | | | - | Signal Name | | | | Input Macrocell and Node Pairs -_|_________________|__|___|_____|__________________________________________ - 0| CLK_DIV_OUT|OUT|*| 65| => | Input macrocell [ -] - 1| E| IO|*| 66| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_E] - 2| IPL_0_|INP|*| 67| => | Input macrocell [ -] - 3| IPL_2_|INP|*| 68| => | Input macrocell [ -] - 4| A0| IO|*| 69| => | Input macrocell [ -] - 5| SIZE_0_| IO|*| 70| => | Input macrocell [ -] - 6| RW| IO|*| 71| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_RW] - 7| | | | 72| => | Input macrocell [ -] ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 6] > Input Multiplexer (IMX) Assignments -=========================================================================== - +----- IO pin/Input Register, or Macrocell -IMX No. | +---- Block IO Pin or Macrocell Number - | | | ABEL Node/ +-- Signal using the Pin or Macrocell - | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell - | | | | Sig Type | | +- Feedback Required (*) ----|-------|----|---|---|----------|------|-|------------------------------ - 0 [IOpin 0 | 65|OUT CLK_DIV_OUT|*| ] - [RegIn 0 |246| -| | ] - [MCell 0 |245|NOD RN_RW| |*] paired w/[ RW] - [MCell 1 |247|OUT CLK_DIV_OUT| | ] - - 1 [IOpin 1 | 66| IO E|*| ] paired w/[ RN_E] - [RegIn 1 |249| -| | ] - [MCell 2 |248|NOD CLK_000_N_SYNC_8_| |*] - [MCell 3 |250|NOD inst_DTACK_D0| |*] - - 2 [IOpin 2 | 67|INP IPL_0_|*|*] - [RegIn 2 |252| -| | ] - [MCell 4 |251|NOD RN_E| |*] paired w/[ E] - [MCell 5 |253|NOD inst_CLK_000_PE| |*] - - 3 [IOpin 3 | 68|INP IPL_2_|*|*] - [RegIn 3 |255| -| | ] - [MCell 6 |254|NOD CLK_000_N_SYNC_7_| |*] - [MCell 7 |256| -| | ] - - 4 [IOpin 4 | 69| IO A0|*|*] - [RegIn 4 |258| -| | ] - [MCell 8 |257| IO A0| | ] - [MCell 9 |259|NOD inst_CLK_030_H| |*] - - 5 [IOpin 5 | 70| IO SIZE_0_|*|*] - [RegIn 5 |261| -| | ] - [MCell 10 |260|NOD CLK_000_N_SYNC_6_| |*] - [MCell 11 |262| -| | ] - - 6 [IOpin 6 | 71| IO RW|*|*] paired w/[ RN_RW] - [RegIn 6 |264| -| | ] - [MCell 12 |263| IO SIZE_0_| | ] - [MCell 13 |265|NOD inst_CLK_OUT_PRE_50| |*] - - 7 [IOpin 7 | 72| -| | ] - [RegIn 7 |267| -| | ] - [MCell 14 |266|NOD CLK_000_P_SYNC_6_| |*] - [MCell 15 |268| -| | ] ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 6] > Logic Array Fan-in -=========================================================================== - +- Central Switch Matrix No. - | Src (ABEL Node/Pin#) Signal ---|--|--------------------|--------------------------------------------------- -Mux00| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux01| Mcel 5 6 ( 230)| CLK_000_P_SYNC_9_ -Mux02| Mcel 6 4 ( 251)| RN_E -Mux03| Mcel 3 2 ( 176)| cpu_est_0_ -Mux04| Input Pin ( 64)| CLK_030 -Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| Mcel 1 9 ( 139)| CLK_OUT_PRE_Dreg -Mux07| Mcel 3 9 ( 187)| cpu_est_1_ -Mux08| IOPin 3 3 ( 32)| UDS_000 -Mux09| IOPin 3 5 ( 30)| DTACK -Mux10| Mcel 1 13 ( 145)| inst_CLK_000_NE_D0 -Mux11| ... | ... -Mux12| Mcel 6 9 ( 259)| inst_CLK_030_H -Mux13| Mcel 7 8 ( 281)| RN_AS_030 -Mux14| Mcel 7 2 ( 272)| CLK_000_N_SYNC_5_ -Mux15| ... | ... -Mux16| IOPin 4 1 ( 42)| AS_000 -Mux17| Mcel 6 0 ( 245)| RN_RW -Mux18| ... | ... -Mux19| ... | ... -Mux20| Mcel 1 14 ( 146)| CLK_000_P_SYNC_5_ -Mux21| Input Pin ( 86)| RST -Mux22| Mcel 6 10 ( 260)| CLK_000_N_SYNC_6_ -Mux23| Mcel 6 6 ( 254)| CLK_000_N_SYNC_7_ -Mux24| IOPin 3 4 ( 31)| LDS_000 -Mux25| Mcel 6 13 ( 265)| inst_CLK_OUT_PRE_50 -Mux26| ... | ... -Mux27| ... | ... -Mux28| IOPin 7 5 ( 80)| RW_000 -Mux29| Mcel 2 4 ( 155)| cpu_est_2_ -Mux30| ... | ... -Mux31| ... | ... -Mux32| ... | ... ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 7] > Macrocell (MCell) Cluster Assignments -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size - | Sync/Async-------+ | | | Cluster to Mcell Assignment - | Node Fixed(*)----+ | | | | | +- XOR PT Size - | Sig Type-+ | | | | | | | XOR to Mcell Assignment - | Signal Name | | | | | | | | | -_|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| RW_000| IO| | S | 3 | 4 to [ 0]| 1 XOR free - 1| SIZE_1_| IO| | S | 2 | 4 to [ 1]| 1 XOR free - 2|CLK_000_N_SYNC_5_|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig - 3| | ? | | S | | 4 free | 1 XOR free - 4| BGACK_030| IO| | S | 2 | 4 to [ 4]| 1 XOR free - 5| FPU_CS|OUT| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig - 6|CLK_000_P_SYNC_2_|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig - 7| | ? | | S | | 4 free | 1 XOR free - 8| AS_030| IO| | S | 4 | 4 to [ 8]| 1 XOR free - 9|CLK_000_N_SYNC_10_|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig -10| | ? | | S | | 4 free | 1 XOR free -11| | ? | | S | | 4 free | 1 XOR free -12| DSACK1| IO| | S | 4 | 4 to [12]| 1 XOR free -13|CLK_000_N_SYNC_9_|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig -14| | ? | | S | | 4 free | 1 XOR free -15| | ? | | S | | 4 free | 1 XOR free ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 7] > Maximum PT Capacity -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ - | Sync/Async-------+ | | - | Node Fixed(*)----+ | | | - | Sig Type-+ | | | | - | Signal Name | | | | | Maximum PT Capacity -_|_________________|__|__|___|_____|_______________________________________ - 0| RW_000| IO| | S | 3 |=> can support up to [ 9] logic PT(s) - 1| SIZE_1_| IO| | S | 2 |=> can support up to [ 14] logic PT(s) - 2|CLK_000_N_SYNC_5_|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) - 3| | ? | | S | |=> can support up to [ 13] logic PT(s) - 4| BGACK_030| IO| | S | 2 |=> can support up to [ 18] logic PT(s) - 5| FPU_CS|OUT| | S | 1 |=> can support up to [ 14] logic PT(s) - 6|CLK_000_P_SYNC_2_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) - 7| | ? | | S | |=> can support up to [ 13] logic PT(s) - 8| AS_030| IO| | S | 4 |=> can support up to [ 19] logic PT(s) - 9|CLK_000_N_SYNC_10_|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) -10| | ? | | S | |=> can support up to [ 14] logic PT(s) -11| | ? | | S | |=> can support up to [ 14] logic PT(s) -12| DSACK1| IO| | S | 4 |=> can support up to [ 19] logic PT(s) -13|CLK_000_N_SYNC_9_|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) -14| | ? | | S | |=> can support up to [ 14] logic PT(s) -15| | ? | | S | |=> can support up to [ 10] logic PT(s) ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 7] > Node-Pin Assignments -=========================================================================== - + Macrocell Number - | Node Fixed(*)------+ - | Sig Type---+ | to | Block [ 7] IO Pin | Device Pin - | Signal Name | | pin | Numbers | Numbers -_|_________________|__|_____|____________________|________________________ - 0| RW_000| IO| | => |( 5) 6 7 0 |( 80) 79 78 85 - 1| SIZE_1_| IO| | => | 5 ( 6) 7 0 | 80 ( 79) 78 85 - 2|CLK_000_N_SYNC_5_|NOD| | => | 6 7 0 1 | 79 78 85 84 - 3| | | | => | 6 7 0 1 | 79 78 85 84 - 4| BGACK_030| IO| | => | 7 0 1 ( 2)| 78 85 84 ( 83) - 5| FPU_CS|OUT| | => |( 7) 0 1 2 |( 78) 85 84 83 - 6|CLK_000_P_SYNC_2_|NOD| | => | 0 1 2 3 | 85 84 83 82 - 7| | | | => | 0 1 2 3 | 85 84 83 82 - 8| AS_030| IO| | => | 1 2 ( 3) 4 | 84 83 ( 82) 81 - 9|CLK_000_N_SYNC_10_|NOD| | => | 1 2 3 4 | 84 83 82 81 -10| | | | => | 2 3 4 5 | 83 82 81 80 -11| | | | => | 2 3 4 5 | 83 82 81 80 -12| DSACK1| IO| | => | 3 ( 4) 5 6 | 82 ( 81) 80 79 -13|CLK_000_N_SYNC_9_|NOD| | => | 3 4 5 6 | 82 81 80 79 -14| | | | => | 4 5 6 7 | 81 80 79 78 -15| | | | => | 4 5 6 7 | 81 80 79 78 ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 7] > IO-to-Node Pin Mapping -=========================================================================== - +- Block IO Pin - | Device Pin No.--------+ - | Pin Fixed(*)----+ | - | Sig Type--+ | | | - | Signal Name | | | | Node Destinations Via Output Matrix -_|_________________|__|___|_____|___________________________________________ - 0| A_23_|INP|*| 85| => | 0 1 2 3 4 5 6 7 - 1| A_22_|INP|*| 84| => | 2 3 4 5 6 7 8 9 - 2| BGACK_030| IO|*| 83| => | ( 4) 5 6 7 8 9 10 11 - 3| AS_030| IO|*| 82| => | 6 7 ( 8) 9 10 11 12 13 - 4| DSACK1| IO|*| 81| => | 8 9 10 11 (12) 13 14 15 - 5| RW_000| IO|*| 80| => | 10 11 12 13 14 15 ( 0) 1 - 6| SIZE_1_| IO|*| 79| => | 12 13 14 15 0 ( 1) 2 3 - 7| FPU_CS|OUT|*| 78| => | 14 15 0 1 2 3 4 ( 5) ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 7] > IO/Node and IO/Input Macrocell Pairing Table -=========================================================================== - +- Block IO Pin - | Device Pin No.--------+ - | Pin Fixed(*)----+ | - | Sig Type--+ | | | - | Signal Name | | | | Input Macrocell and Node Pairs -_|_________________|__|___|_____|__________________________________________ - 0| A_23_|INP|*| 85| => | Input macrocell [ -] - 1| A_22_|INP|*| 84| => | Input macrocell [ -] - 2| BGACK_030| IO|*| 83| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_BGACK_030] - 3| AS_030| IO|*| 82| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_AS_030] - 4| DSACK1| IO|*| 81| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_DSACK1] - 5| RW_000| IO|*| 80| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_RW_000] - 6| SIZE_1_| IO|*| 79| => | Input macrocell [ -] - 7| FPU_CS|OUT|*| 78| => | Input macrocell [ -] ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 7] > Input Multiplexer (IMX) Assignments -=========================================================================== - +----- IO pin/Input Register, or Macrocell -IMX No. | +---- Block IO Pin or Macrocell Number - | | | ABEL Node/ +-- Signal using the Pin or Macrocell - | | | Pin Number | +- Signal Fixed (*) to Pin/Mcell - | | | | Sig Type | | +- Feedback Required (*) ----|-------|----|---|---|----------|------|-|------------------------------ - 0 [IOpin 0 | 85|INP A_23_|*|*] - [RegIn 0 |270| -| | ] - [MCell 0 |269|NOD RN_RW_000| |*] paired w/[ RW_000] - [MCell 1 |271| IO SIZE_1_| | ] - - 1 [IOpin 1 | 84|INP A_22_|*|*] - [RegIn 1 |273| -| | ] - [MCell 2 |272|NOD CLK_000_N_SYNC_5_| |*] - [MCell 3 |274| -| | ] - - 2 [IOpin 2 | 83| IO BGACK_030|*| ] paired w/[ RN_BGACK_030] - [RegIn 2 |276| -| | ] - [MCell 4 |275|NOD RN_BGACK_030| |*] paired w/[ BGACK_030] - [MCell 5 |277|OUT FPU_CS| | ] - - 3 [IOpin 3 | 82| IO AS_030|*|*] paired w/[ RN_AS_030] - [RegIn 3 |279| -| | ] - [MCell 6 |278|NOD CLK_000_P_SYNC_2_| |*] - [MCell 7 |280| -| | ] - - 4 [IOpin 4 | 81| IO DSACK1|*|*] paired w/[ RN_DSACK1] - [RegIn 4 |282| -| | ] - [MCell 8 |281|NOD RN_AS_030| |*] paired w/[ AS_030] - [MCell 9 |283|NOD CLK_000_N_SYNC_10_| |*] - - 5 [IOpin 5 | 80| IO RW_000|*|*] paired w/[ RN_RW_000] - [RegIn 5 |285| -| | ] - [MCell 10 |284| -| | ] - [MCell 11 |286| -| | ] - - 6 [IOpin 6 | 79| IO SIZE_1_|*|*] - [RegIn 6 |288| -| | ] - [MCell 12 |287|NOD RN_DSACK1| |*] paired w/[ DSACK1] - [MCell 13 |289|NOD CLK_000_N_SYNC_9_| |*] - - 7 [IOpin 7 | 78|OUT FPU_CS|*| ] - [RegIn 7 |291| -| | ] - [MCell 14 |290| -| | ] - [MCell 15 |292| -| | ] ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 7] > Logic Array Fan-in -=========================================================================== - +- Central Switch Matrix No. - | Src (ABEL Node/Pin#) Signal ---|--|--------------------|--------------------------------------------------- -Mux00| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux01| IOPin 4 0 ( 41)| BERR -Mux02| Mcel 1 6 ( 134)| CLK_000_N_SYNC_4_ -Mux03| Mcel 7 8 ( 281)| RN_AS_030 -Mux04| IOPin 0 4 ( 95)| A_18_ -Mux05| Mcel 5 0 ( 221)| SM_AMIGA_6_ -Mux06| IOPin 5 3 ( 57)| FC_0_ -Mux07| Mcel 7 13 ( 289)| CLK_000_N_SYNC_9_ -Mux08| Mcel 2 10 ( 164)| CLK_000_P_SYNC_1_ -Mux09| IOPin 7 3 ( 82)| AS_030 -Mux10| Mcel 5 1 ( 223)| SM_AMIGA_0_ -Mux11| IOPin 0 5 ( 96)| A_16_ -Mux12| IOPin 3 3 ( 32)| UDS_000 -Mux13| IOPin 5 1 ( 59)| A_17_ -Mux14| Mcel 5 4 ( 227)| SM_AMIGA_7_ -Mux15| Input Pin ( 14)| nEXP_SPACE -Mux16| Mcel 1 9 ( 139)| CLK_OUT_PRE_Dreg -Mux17| Mcel 5 12 ( 239)| SM_AMIGA_1_ -Mux18| IOPin 3 7 ( 28)| BGACK_000 -Mux19| IOPin 0 0 ( 91)| FPU_SENSE -Mux20| IOPin 5 2 ( 58)| FC_1_ -Mux21| Input Pin ( 86)| RST -Mux22| Mcel 6 5 ( 253)| inst_CLK_000_PE -Mux23| Mcel 7 0 ( 269)| RN_RW_000 -Mux24| IOPin 3 4 ( 31)| LDS_000 -Mux25| IOPin 6 6 ( 71)| RW -Mux26| IOPin 4 1 ( 42)| AS_000 -Mux27| IOPin 0 6 ( 97)| A_19_ -Mux28| Input Pin ( 64)| CLK_030 -Mux29| Mcel 7 12 ( 287)| RN_DSACK1 -Mux30| Mcel 4 8 ( 209)| inst_AS_030_D0 -Mux31| Mcel 6 2 ( 248)| CLK_000_N_SYNC_8_ -Mux32| ... | ... ---------------------------------------------------------------------------- \ No newline at end of file diff --git a/Logic/68030_tk.rpt b/Logic/68030_tk.rpt deleted file mode 100644 index 18b5f97..0000000 --- a/Logic/68030_tk.rpt +++ /dev/null @@ -1,1766 +0,0 @@ -|--------------------------------------------| -|- ispLEVER Fitter Report File -| -|- Version 1.7.00.05.28.13 -| -|- (c)Copyright, Lattice Semiconductor 2002 -| -|--------------------------------------------| - - - - -Project_Summary -~~~~~~~~~~~~~~~ - -Project Name : 68030_tk -Project Path : C:\Users\Matze\Documents\GitHub\68030tk\Logic -Project Fitted on : Tue Aug 26 20:07:19 2014 - -Device : M4A5-128/64 -Package : 100TQFP -Speed : -10 -Partnumber : M4A5-128/64-10VC -Source Format : Pure_VHDL - - -// Project '68030_tk' was Fitted Successfully! // - - -Compilation_Times -~~~~~~~~~~~~~~~~~ -Reading/DRC 0 sec -Partition 0 sec -Place 0 sec -Route 0 sec -Jedec/Report generation 0 sec - -------- -Fitter 00:00:00 - - -Design_Summary -~~~~~~~~~~~~~~ - Total Input Pins : 30 - Total Output Pins : 17 - Total Bidir I/O Pins : 13 - Total Flip-Flops : 69 - Total Product Terms : 165 - Total Reserved Pins : 0 - Total Reserved Blocks : 0 - - -Device_Resource_Summary -~~~~~~~~~~~~~~~~~~~~~~~ - Total - Available Used Available Utilization -Dedicated Pins - Input-Only Pins 2 2 0 --> 100% - Clock/Input Pins 4 4 0 --> 100% -I/O Pins 64 54 10 --> 84% -Logic Macrocells 128 84 44 --> 65% - Input Registers 64 0 64 --> 0% - Unusable Macrocells .. 0 .. - -CSM Outputs/Total Block Inputs 264 217 47 --> 82% -Logical Product Terms 640 166 474 --> 25% -Product Term Clusters 128 40 88 --> 31% - - -Blocks_Resource_Summary -~~~~~~~~~~~~~~~~~~~~~~~ - # of PT - I/O Inp Macrocells Macrocells logic clusters - Fanin Pins Reg Used Unusable available PTs available Pwr ---------------------------------------------------------------------------------- -Maximum 33 8 8 -- -- 16 80 16 - ---------------------------------------------------------------------------------- -Block A 21 8 0 7 0 9 17 12 Lo -Block B 29 8 0 13 0 3 17 12 Lo -Block C 25 7 0 12 0 4 26 10 Lo -Block D 27 8 0 12 0 4 21 11 Lo -Block E 32 4 0 7 0 9 10 13 Lo -Block F 27 4 0 10 0 6 32 6 Lo -Block G 24 7 0 13 0 3 23 13 Lo -Block H 32 8 0 10 0 6 20 11 Lo ---------------------------------------------------------------------------------- - - Four rightmost columns above reflect last status of the placement process. - Pwr (Power) : Hi = High - Lo = Low. - - -Optimizer_and_Fitter_Options -~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -Pin Assignment : Yes -Group Assignment : No -Pin Reservation : No (1) -Block Reservation : No - -@Ignore_Project_Constraints : - Pin Assignments : No - Keep Block Assignment -- - Keep Segment Assignment -- - Group Assignments : No - Macrocell Assignment : No - Keep Block Assignment -- - Keep Segment Assignment -- - -@Backannotate_Project_Constraints - Pin Assignments : No - Pin And Block Assignments : No - Pin, Macrocell and Block : No - -@Timing_Constraints : No - -@Global_Project_Optimization : - Balanced Partitioning : Yes - Spread Placement : Yes - - Note : - Pack Design : - Balanced Partitioning = No - Spread Placement = No - Spread Design : - Balanced Partitioning = Yes - Spread Placement = Yes - -@Logic_Synthesis : - Logic Reduction : Yes - Node Collapsing : Yes - D/T Synthesis : Yes - Clock Optimization : No - Input Register Optimization : Yes - XOR Synthesis : Yes - Max. P-Term for Collapsing : 16 - Max. P-Term for Splitting : 16 - Max. Equation Fanin : 32 - Keep Xor : Yes - -@Utilization_options - Max. % of macrocells used : 100 - Max. % of block inputs used : 100 - Max. % of segment lines used : --- - Max. % of macrocells used : --- - - -@Import_Source_Constraint_Option No - -@Zero_Hold_Time Yes - -@Pull_up Yes - -@User_Signature #H0 - -@Output_Slew_Rate Default = Slow(2) - -@Power Default = High(2) - - -Device Options: - 1 : Reserved unused I/Os can be independently driven to Low or High, and does not - follow the drive level set for the Global Configure Unused I/O Option. - 2 : For user-specified constraints on individual signals, refer to the Output, - Bidir and Burried Signal Lists. - - - - -Pinout_Listing -~~~~~~~~~~~~~~ - | Pin |Blk |Assigned| -Pin No| Type |Pad |Pin | Signal name ---------------------------------------------------------------- - 1 | GND | | | - 2 | JTAG | | | - 3 | I_O | B7 | * |RESET -4 | I_O | B6 | * |A_31_ -5 | I_O | B5 | * |A_30_ -6 | I_O | B4 | * |A_29_ -7 | I_O | B3 | * |IPL_030_1_ -8 | I_O | B2 | * |IPL_030_0_ -9 | I_O | B1 | * |IPL_030_2_ -10 | I_O | B0 | * |CLK_EXP -11 | CkIn | | * |CLK_000 -12 | Vcc | | | -13 | GND | | | -14 | CkIn | | * |nEXP_SPACE -15 | I_O | C0 | * |A_28_ -16 | I_O | C1 | * |A_27_ -17 | I_O | C2 | * |A_26_ -18 | I_O | C3 | * |A_25_ -19 | I_O | C4 | * |A_24_ -20 | I_O | C5 | * |AMIGA_BUS_ENABLE_LOW -21 | I_O | C6 | * |BG_030 -22 | I_O | C7 | | -23 | JTAG | | | -24 | JTAG | | | -25 | GND | | | -26 | GND | | | -27 | GND | | | -28 | I_O | D7 | * |BGACK_000 -29 | I_O | D6 | * |BG_000 -30 | I_O | D5 | * |DTACK -31 | I_O | D4 | * |LDS_000 -32 | I_O | D3 | * |UDS_000 -33 | I_O | D2 | * |AMIGA_ADDR_ENABLE -34 | I_O | D1 | * |AMIGA_BUS_ENABLE_HIGH -35 | I_O | D0 | * |VMA -36 | Inp | | * |VPA -37 | Vcc | | | -38 | GND | | | -39 | GND | | | -40 | Vcc | | | -41 | I_O | E0 | * |BERR -42 | I_O | E1 | * |AS_000 -43 | I_O | E2 | | -44 | I_O | E3 | | -45 | I_O | E4 | | -46 | I_O | E5 | | -47 | I_O | E6 | * |CIIN -48 | I_O | E7 | * |AMIGA_BUS_DATA_DIR -49 | GND | | | -50 | GND | | | -51 | GND | | | -52 | JTAG | | | -53 | I_O | F7 | | -54 | I_O | F6 | | -55 | I_O | F5 | | -56 | I_O | F4 | * |IPL_1_ -57 | I_O | F3 | * |FC_0_ -58 | I_O | F2 | * |FC_1_ -59 | I_O | F1 | * |A_17_ -60 | I_O | F0 | | -61 | CkIn | | * |CLK_OSZI -62 | Vcc | | | -63 | GND | | | -64 | CkIn | | * |CLK_030 -65 | I_O | G0 | * |CLK_DIV_OUT -66 | I_O | G1 | * |E -67 | I_O | G2 | * |IPL_0_ -68 | I_O | G3 | * |IPL_2_ -69 | I_O | G4 | * |A0 -70 | I_O | G5 | * |SIZE_0_ -71 | I_O | G6 | * |RW -72 | I_O | G7 | | -73 | JTAG | | | -74 | JTAG | | | -75 | GND | | | -76 | GND | | | -77 | GND | | | -78 | I_O | H7 | * |FPU_CS -79 | I_O | H6 | * |SIZE_1_ -80 | I_O | H5 | * |RW_000 -81 | I_O | H4 | * |DSACK1 -82 | I_O | H3 | * |AS_030 -83 | I_O | H2 | * |BGACK_030 -84 | I_O | H1 | * |A_22_ -85 | I_O | H0 | * |A_23_ -86 | Inp | | * |RST -87 | Vcc | | | -88 | GND | | | -89 | GND | | | -90 | Vcc | | | -91 | I_O | A0 | * |FPU_SENSE -92 | I_O | A1 | * |AVEC -93 | I_O | A2 | * |A_20_ -94 | I_O | A3 | * |A_21_ -95 | I_O | A4 | * |A_18_ -96 | I_O | A5 | * |A_16_ -97 | I_O | A6 | * |A_19_ -98 | I_O | A7 | * |DS_030 -99 | GND | | | -100 | GND | | | - ---------------------------------------------------------------------------- - - Blk Pad : This notation refers to the Block I/O pad number in the device. - Assigned Pin : user or dedicated input assignment (E.g. Clock pins). - Pin Type : - CkIn : Dedicated input or clock pin - CLK : Dedicated clock pin - INP : Dedicated input pin - JTAG : JTAG Control and test pin - NC : No connected - - - -Input_Signal_List -~~~~~~~~~~~~~~~~~ - P R - Pin r e O Input -Pin Blk PTs Type e s E Fanout Pwr Slew Signal ----------------------------------------------------------------------- - 96 A . I/O ----EF-H Low Slow A_16_ - 59 F . I/O ----EF-H Low Slow A_17_ - 95 A . I/O ----EF-H Low Slow A_18_ - 97 A . I/O ----EF-H Low Slow A_19_ - 93 A . I/O -B--E--- Low Slow A_20_ - 94 A . I/O -B--E--- Low Slow A_21_ - 84 H . I/O -B--E--- Low Slow A_22_ - 85 H . I/O -B--E--- Low Slow A_23_ - 19 C . I/O -B--E--- Low Slow A_24_ - 18 C . I/O -B--E--- Low Slow A_25_ - 17 C . I/O -B--E--- Low Slow A_26_ - 16 C . I/O -B--E--- Low Slow A_27_ - 15 C . I/O -B--E--- Low Slow A_28_ - 6 B . I/O -B--E--- Low Slow A_29_ - 5 B . I/O -B--E--- Low Slow A_30_ - 4 B . I/O -B--E--- Low Slow A_31_ - 28 D . I/O ----EF-H Low Slow BGACK_000 - 21 C . I/O ---D---- Low Slow BG_030 - 57 F . I/O ----EF-H Low Slow FC_0_ - 58 F . I/O ----EF-H Low Slow FC_1_ - 91 A . I/O ----E--H Low Slow FPU_SENSE - 67 G . I/O -B------ Low Slow IPL_0_ - 56 F . I/O -B------ Low Slow IPL_1_ - 68 G . I/O -B------ Low Slow IPL_2_ - 11 . . Ck/I -----F-- - Slow CLK_000 - 14 . . Ck/I A--DEFGH - Slow nEXP_SPACE - 36 . . Ded --C----- - Slow VPA - 61 . . Ck/I ABCDEFGH - Slow CLK_OSZI - 64 . . Ck/I A-----GH - Slow CLK_030 - 86 . . Ded ABCDEFGH - Slow RST ----------------------------------------------------------------------- - - Power : Hi = High - MH = Medium High - ML = Medium Low - Lo = Low - - - -Output_Signal_List -~~~~~~~~~~~~~~~~~~ - P R - Pin r e O Output -Pin Blk PTs Type e s E Fanout Pwr Slew Signal ----------------------------------------------------------------------- - 33 D 3 DFF * -------- Low Slow AMIGA_ADDR_ENABLE - 48 E 2 COM -------- Low Slow AMIGA_BUS_DATA_DIR - 34 D 1 COM -------- Low Slow AMIGA_BUS_ENABLE_HIGH - 20 C 1 COM -------- Low Slow AMIGA_BUS_ENABLE_LOW - 92 A 1 COM -------- Low Slow AVEC - 83 H 2 DFF * -------- Low Slow BGACK_030 - 29 D 2 DFF * -------- Low Slow BG_000 - 47 E 1 COM -------- Low Slow CIIN - 65 G 1 COM -------- Low Slow CLK_DIV_OUT - 10 B 1 COM -------- Low Slow CLK_EXP - 66 G 5 DFF -------- Low Slow E - 78 H 1 COM -------- Low Slow FPU_CS - 8 B 2 DFF * -------- Low Slow IPL_030_0_ - 7 B 2 DFF * -------- Low Slow IPL_030_1_ - 9 B 2 DFF * -------- Low Slow IPL_030_2_ - 3 B 1 DFF * -------- Low Slow RESET - 35 D 2 TFF * -------- Low Slow VMA ----------------------------------------------------------------------- - - Power : Hi = High - MH = Medium High - ML = Medium Low - Lo = Low - - - -Bidir_Signal_List -~~~~~~~~~~~~~~~~~ - P R - Pin r e O Bidir -Pin Blk PTs Type e s E Fanout Pwr Slew Signal ----------------------------------------------------------------------- - 69 G 1 DFF * A------- Low Slow A0 - 42 E 2 DFF * A---E-GH Low Slow AS_000 - 82 H 4 DFF * ----E--H Low Slow AS_030 - 41 E 1 COM --C-EF-H Low Slow BERR - 81 H 4 DFF * ---D---- Low Slow DSACK1 - 98 A 7 DFF * --C----- Low Slow DS_030 - 30 D 1 COM ------G- Low Slow DTACK - 31 D 1 COM A-----GH Low Slow LDS_000 - 71 G 4 DFF * --C----H Low Slow RW - 80 H 3 DFF * A---E-G- Low Slow RW_000 - 70 G 1 DFF * A------- Low Slow SIZE_0_ - 79 H 2 DFF * A------- Low Slow SIZE_1_ - 32 D 1 COM A-----GH Low Slow UDS_000 ----------------------------------------------------------------------- - - Power : Hi = High - MH = Medium High - ML = Medium Low - Lo = Low - - - -Buried_Signal_List -~~~~~~~~~~~~~~~~~~ - P R - Pin r e O Node -#Mc Blk PTs Type e s E Fanout Pwr Slew Signal ----------------------------------------------------------------------- - B2 B 2 COM ----E--- Low Slow CIIN_0 - F2 F 1 DFF --C----- Low Slow CLK_000_N_SYNC_0_ - H9 H 1 DFF ---D---- Low Slow CLK_000_N_SYNC_10_ - D14 D 1 DFF -B------ Low Slow CLK_000_N_SYNC_11_ - C2 C 1 DFF A------- Low Slow CLK_000_N_SYNC_1_ - A1 A 1 DFF --C----- Low Slow CLK_000_N_SYNC_2_ - C13 C 1 DFF -B------ Low Slow CLK_000_N_SYNC_3_ - B6 B 1 DFF -------H Low Slow CLK_000_N_SYNC_4_ - H2 H 1 DFF ------G- Low Slow CLK_000_N_SYNC_5_ - G10 G 1 DFF ------G- Low Slow CLK_000_N_SYNC_6_ - G6 G 1 DFF ------G- Low Slow CLK_000_N_SYNC_7_ - G2 G 1 DFF -------H Low Slow CLK_000_N_SYNC_8_ - H13 H 1 DFF -------H Low Slow CLK_000_N_SYNC_9_ - D10 D 1 DFF --C----- Low Slow CLK_000_P_SYNC_0_ - C10 C 1 DFF -------H Low Slow CLK_000_P_SYNC_1_ - H6 H 1 DFF --C----- Low Slow CLK_000_P_SYNC_2_ - C6 C 1 DFF A------- Low Slow CLK_000_P_SYNC_3_ - A9 A 1 DFF -B------ Low Slow CLK_000_P_SYNC_4_ - B14 B 1 DFF ------G- Low Slow CLK_000_P_SYNC_5_ - G14 G 1 DFF -B------ Low Slow CLK_000_P_SYNC_6_ - B10 B 1 DFF A------- Low Slow CLK_000_P_SYNC_7_ - A5 A 1 DFF -----F-- Low Slow CLK_000_P_SYNC_8_ - F6 F 1 DFF ------G- Low Slow CLK_000_P_SYNC_9_ - B9 B 1 DFF -B----GH Low Slow CLK_OUT_PRE_Dreg - D4 D 3 DFF * ---D---- Low - RN_AMIGA_ADDR_ENABLE --> AMIGA_ADDR_ENABLE - E4 E 2 DFF * ----E--- Low - RN_AS_000 --> AS_000 - H8 H 4 DFF * A--D--GH Low - RN_AS_030 --> AS_030 - H4 H 2 DFF * A--DE-GH Low - RN_BGACK_030 --> BGACK_030 - D13 D 2 DFF * ---D---- Low - RN_BG_000 --> BG_000 - H12 H 4 DFF * -------H Low - RN_DSACK1 --> DSACK1 - A0 A 7 DFF * A------- Low - RN_DS_030 --> DS_030 - G4 G 5 DFF --CD--G- Low - RN_E --> E - B8 B 2 DFF * -B------ Low - RN_IPL_030_0_ --> IPL_030_0_ - B12 B 2 DFF * -B------ Low - RN_IPL_030_1_ --> IPL_030_1_ - B4 B 2 DFF * -B------ Low - RN_IPL_030_2_ --> IPL_030_2_ - G0 G 4 DFF * ------G- Low - RN_RW --> RW - H0 H 3 DFF * -------H Low - RN_RW_000 --> RW_000 - D1 D 2 TFF * --CD---- Low - RN_VMA --> VMA - F1 F 2 DFF * -----F-H Low Slow SM_AMIGA_0_ - F12 F 2 DFF * -----F-H Low Slow SM_AMIGA_1_ - C12 C 3 DFF * --C--F-- Low Slow SM_AMIGA_2_ - C8 C 6 DFF * --C--F-- Low Slow SM_AMIGA_3_ - F5 F 2 DFF * --C--F-- Low Slow SM_AMIGA_4_ - F13 F 2 DFF * -----F-- Low Slow SM_AMIGA_5_ - F0 F 2 DFF * A-C-EF-H Low Slow SM_AMIGA_6_ - F4 F 13 DFF * ---D-F-H Low Slow SM_AMIGA_7_ - D2 D 2 DFF --CD--G- Low Slow cpu_est_0_ - D9 D 5 DFF --CD--G- Low Slow cpu_est_1_ - C4 C 4 DFF --CD--G- Low Slow cpu_est_2_ - F8 F 6 DFF * ---D-F-- Low Slow inst_AS_030_000_SYNC - E8 E 1 DFF * -BCDEF-H Low Slow inst_AS_030_D0 - E9 E 1 DFF * ---D---- Low Slow inst_BGACK_030_INT_D - F9 F 1 DFF ---D-F-- Low Slow inst_CLK_000_D0 - D6 D 1 DFF ---D-F-- Low Slow inst_CLK_000_D1 - B5 B 1 DFF -BCD-F-- Low Slow inst_CLK_000_NE - B13 B 1 DFF --CD--G- Low Slow inst_CLK_000_NE_D0 - G5 G 1 DFF --CDEF-H Low Slow inst_CLK_000_PE - G9 G 4 DFF * A-----G- Low Slow inst_CLK_030_H - B3 B 1 DFF -B------ Low Slow inst_CLK_OUT_PRE - G13 G 1 DFF -B----G- Low Slow inst_CLK_OUT_PRE_50 - C1 C 3 DFF * --CD---- Low Slow inst_DS_000_ENABLE - C14 C 1 DFF * A------- Low Slow inst_DS_030_D0 - G3 G 1 DFF * --C----- Low Slow inst_DTACK_D0 - A12 A 3 DFF * A--D---- Low Slow inst_LDS_000_INT - A8 A 3 DFF * A--D---- Low Slow inst_UDS_000_INT - C5 C 1 DFF * --CD---- Low Slow inst_VPA_D - C9 C 2 COM -----F-- Low Slow state_machine_un15_clk_000_ne_i_n - E5 E 2 COM -B------ Low Slow un14_ciin_0 ----------------------------------------------------------------------- - - Power : Hi = High - MH = Medium High - ML = Medium Low - Lo = Low - - - - -Signals_Fanout_List -~~~~~~~~~~~~~~~~~~~ -Signal Source : Fanout List ------------------------------------------------------------------------------ - A_29_{ C}: CIIN{ E} un14_ciin_0{ E} CIIN_0{ B} - A_28_{ D}: CIIN{ E} un14_ciin_0{ E} CIIN_0{ B} - A_27_{ D}: CIIN{ E} un14_ciin_0{ E} CIIN_0{ B} - A_26_{ D}: CIIN{ E} un14_ciin_0{ E} CIIN_0{ B} - A_31_{ C}: CIIN{ E} un14_ciin_0{ E} CIIN_0{ B} - A_25_{ D}: CIIN{ E} un14_ciin_0{ E} CIIN_0{ B} - A_24_{ D}: CIIN{ E} un14_ciin_0{ E} CIIN_0{ B} - A_23_{ I}: CIIN{ E} CIIN_0{ B} - A_22_{ I}: CIIN{ E} CIIN_0{ B} - IPL_2_{ H}: IPL_030_2_{ B} - A_21_{ B}: CIIN{ E} CIIN_0{ B} - A_20_{ B}: CIIN{ E} CIIN_0{ B} - FC_1_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} - A_19_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} - A_18_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} - A_17_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} - A_16_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} - UDS_000{ E}: SIZE_1_{ H} AS_030{ H} DS_030{ A} - : A0{ G} RW{ G} SIZE_0_{ G} - : inst_CLK_030_H{ G} - LDS_000{ E}: SIZE_1_{ H} AS_030{ H} DS_030{ A} - : A0{ G} RW{ G} SIZE_0_{ G} - : inst_CLK_030_H{ G} - IPL_1_{ G}: IPL_030_1_{ B} - IPL_0_{ H}: IPL_030_0_{ B} - nEXP_SPACE{. }: DTACK{ D}AMIGA_ADDR_ENABLE{ D}AMIGA_BUS_DATA_DIR{ E} - : SIZE_1_{ H} AS_030{ H} DS_030{ A} - : A0{ G} BG_000{ D} DSACK1{ H} - : SIZE_0_{ G}inst_AS_030_000_SYNC{ F} SM_AMIGA_7_{ F} - : SM_AMIGA_6_{ F} un14_ciin_0{ E} - FC_0_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} - BERR{ F}: AS_000{ E} DSACK1{ H}inst_AS_030_000_SYNC{ F} - : SM_AMIGA_7_{ F} SM_AMIGA_6_{ F} SM_AMIGA_4_{ F} - : SM_AMIGA_0_{ F}inst_DS_000_ENABLE{ C} SM_AMIGA_1_{ F} - : SM_AMIGA_5_{ F} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} - BG_030{ D}: BG_000{ D} - BGACK_000{ E}: BERR{ E} FPU_CS{ H} BGACK_030{ H} - :inst_AS_030_000_SYNC{ F} - CLK_030{. }: AS_030{ H} DS_030{ A} DSACK1{ H} - : RW{ G} inst_CLK_030_H{ G} - CLK_000{. }:inst_CLK_000_D0{ F} - FPU_SENSE{ B}: BERR{ E} FPU_CS{ H} - DTACK{ E}: inst_DTACK_D0{ G} - VPA{. }: inst_VPA_D{ C} - RST{. }:AMIGA_ADDR_ENABLE{ D} SIZE_1_{ H} IPL_030_2_{ B} - : AS_030{ H} AS_000{ E} RW_000{ H} - : DS_030{ A} IPL_030_1_{ B} IPL_030_0_{ B} - : A0{ G} BG_000{ D} BGACK_030{ H} - : DSACK1{ H} VMA{ D} RESET{ B} - : RW{ G} SIZE_0_{ G} inst_AS_030_D0{ E} - : inst_DS_030_D0{ C}inst_AS_030_000_SYNC{ F}inst_BGACK_030_INT_D{ E} - : inst_VPA_D{ C} inst_DTACK_D0{ G} SM_AMIGA_7_{ F} - : SM_AMIGA_6_{ F} SM_AMIGA_4_{ F} SM_AMIGA_0_{ F} - : inst_CLK_030_H{ G}inst_LDS_000_INT{ A}inst_DS_000_ENABLE{ C} - :inst_UDS_000_INT{ A} SM_AMIGA_1_{ F} SM_AMIGA_5_{ F} - : SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} -RN_AMIGA_ADDR_ENABLE{ E}:AMIGA_ADDR_ENABLE{ D}AMIGA_BUS_ENABLE_HIGH{ D} - A_30_{ C}: CIIN{ E} un14_ciin_0{ E} CIIN_0{ B} - SIZE_1_{ I}:inst_LDS_000_INT{ A} -RN_IPL_030_2_{ C}: IPL_030_2_{ B} - AS_030{ I}: BERR{ E} FPU_CS{ H} inst_AS_030_D0{ E} - : un14_ciin_0{ E} - RN_AS_030{ I}: DTACK{ D} SIZE_1_{ H} AS_030{ H} - : DS_030{ A} A0{ G} SIZE_0_{ G} - : inst_CLK_030_H{ G} - AS_000{ F}:AMIGA_BUS_DATA_DIR{ E} SIZE_1_{ H} AS_030{ H} - : DS_030{ A} A0{ G} RW{ G} - : SIZE_0_{ G} inst_CLK_030_H{ G} - RN_AS_000{ F}: AS_000{ E} - RW_000{ I}:AMIGA_BUS_DATA_DIR{ E} DS_030{ A} RW{ G} - RN_RW_000{ I}: RW_000{ H} - DS_030{ B}: inst_DS_030_D0{ C} - RN_DS_030{ B}: DS_030{ A} -RN_IPL_030_1_{ C}: IPL_030_1_{ B} -RN_IPL_030_0_{ C}: IPL_030_0_{ B} - A0{ H}:inst_LDS_000_INT{ A}inst_UDS_000_INT{ A} - RN_BG_000{ E}: BG_000{ D} -RN_BGACK_030{ I}: UDS_000{ D} LDS_000{ D} DTACK{ D} - :AMIGA_ADDR_ENABLE{ D}AMIGA_BUS_DATA_DIR{ E} SIZE_1_{ H} - : AS_030{ H} AS_000{ E} RW_000{ H} - : DS_030{ A} A0{ G} BGACK_030{ H} - : RW{ G} SIZE_0_{ G}inst_BGACK_030_INT_D{ E} - : inst_CLK_030_H{ G} - DSACK1{ I}: DTACK{ D} - RN_DSACK1{ I}: DSACK1{ H} - RN_E{ H}: E{ G} VMA{ D} cpu_est_1_{ D} - : cpu_est_2_{ C} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} - :state_machine_un15_clk_000_ne_i_n{ C} - RN_VMA{ E}: VMA{ D} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} - :state_machine_un15_clk_000_ne_i_n{ C} - RW{ H}: RW_000{ H}inst_DS_000_ENABLE{ C} - RN_RW{ H}: RW{ G} - SIZE_0_{ H}:inst_LDS_000_INT{ A} - cpu_est_0_{ E}: E{ G} VMA{ D} cpu_est_0_{ D} - : cpu_est_1_{ D} cpu_est_2_{ C} SM_AMIGA_3_{ C} - : SM_AMIGA_2_{ C}state_machine_un15_clk_000_ne_i_n{ C} - cpu_est_1_{ E}: E{ G} VMA{ D} cpu_est_1_{ D} - : cpu_est_2_{ C} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} - :state_machine_un15_clk_000_ne_i_n{ C} -inst_AS_030_D0{ F}: CIIN{ E} AS_000{ E} BG_000{ D} - : DSACK1{ H}inst_AS_030_000_SYNC{ F}inst_DS_000_ENABLE{ C} - : CIIN_0{ B} -inst_DS_030_D0{ D}:inst_LDS_000_INT{ A}inst_UDS_000_INT{ A} -inst_AS_030_000_SYNC{ G}:AMIGA_ADDR_ENABLE{ D}inst_AS_030_000_SYNC{ F} SM_AMIGA_7_{ F} - : SM_AMIGA_6_{ F} -inst_BGACK_030_INT_D{ F}:AMIGA_ADDR_ENABLE{ D} - inst_VPA_D{ D}: VMA{ D} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} - :state_machine_un15_clk_000_ne_i_n{ C} -inst_DTACK_D0{ H}: SM_AMIGA_3_{ C} SM_AMIGA_2_{ C}state_machine_un15_clk_000_ne_i_n{ C} -inst_CLK_OUT_PRE_50{ H}:inst_CLK_OUT_PRE_50{ G}inst_CLK_OUT_PRE{ B} -inst_CLK_000_D1{ E}:AMIGA_ADDR_ENABLE{ D} SM_AMIGA_7_{ F} SM_AMIGA_6_{ F} - :CLK_000_P_SYNC_0_{ D}CLK_000_N_SYNC_0_{ F} -inst_CLK_000_D0{ G}:AMIGA_ADDR_ENABLE{ D} BG_000{ D}inst_CLK_000_D1{ D} - : SM_AMIGA_7_{ F} SM_AMIGA_6_{ F}CLK_000_P_SYNC_0_{ D} - :CLK_000_N_SYNC_0_{ F} -SM_AMIGA_7_{ G}:AMIGA_ADDR_ENABLE{ D} RW_000{ H}inst_AS_030_000_SYNC{ F} - : SM_AMIGA_6_{ F} -inst_CLK_OUT_PRE{ C}:CLK_OUT_PRE_Dreg{ B} -inst_CLK_000_PE{ H}: AS_000{ E} RW_000{ H} BGACK_030{ H} - : VMA{ D} SM_AMIGA_7_{ F} SM_AMIGA_6_{ F} - : SM_AMIGA_4_{ F} SM_AMIGA_0_{ F}inst_DS_000_ENABLE{ C} - : SM_AMIGA_1_{ F} SM_AMIGA_5_{ F} SM_AMIGA_3_{ C} - : SM_AMIGA_2_{ C} -CLK_000_P_SYNC_9_{ G}:inst_CLK_000_PE{ G} -inst_CLK_000_NE{ C}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} - : VMA{ D} SM_AMIGA_7_{ F}inst_CLK_000_NE_D0{ B} - : SM_AMIGA_4_{ F} SM_AMIGA_0_{ F} SM_AMIGA_1_{ F} - : SM_AMIGA_5_{ F} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} -CLK_000_N_SYNC_11_{ E}:inst_CLK_000_NE{ B} - cpu_est_2_{ D}: E{ G} VMA{ D} cpu_est_1_{ D} - : cpu_est_2_{ C} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} - :state_machine_un15_clk_000_ne_i_n{ C} -inst_CLK_000_NE_D0{ C}: E{ G} cpu_est_0_{ D} cpu_est_1_{ D} - : cpu_est_2_{ C} -SM_AMIGA_6_{ G}: AS_000{ E} RW_000{ H} SM_AMIGA_7_{ F} - : SM_AMIGA_6_{ F}inst_LDS_000_INT{ A}inst_DS_000_ENABLE{ C} - :inst_UDS_000_INT{ A} SM_AMIGA_5_{ F} -SM_AMIGA_4_{ G}: SM_AMIGA_7_{ F} SM_AMIGA_4_{ F}inst_DS_000_ENABLE{ C} - : SM_AMIGA_3_{ C} -SM_AMIGA_0_{ G}: RW_000{ H} SM_AMIGA_7_{ F} SM_AMIGA_0_{ F} -inst_CLK_030_H{ H}: DS_030{ A} inst_CLK_030_H{ G} -inst_LDS_000_INT{ B}: LDS_000{ D}inst_LDS_000_INT{ A} -inst_DS_000_ENABLE{ D}: UDS_000{ D} LDS_000{ D}inst_DS_000_ENABLE{ C} -inst_UDS_000_INT{ B}: UDS_000{ D}inst_UDS_000_INT{ A} -CLK_000_P_SYNC_0_{ E}:CLK_000_P_SYNC_1_{ C} -CLK_000_P_SYNC_1_{ D}:CLK_000_P_SYNC_2_{ H} -CLK_000_P_SYNC_2_{ I}:CLK_000_P_SYNC_3_{ C} -CLK_000_P_SYNC_3_{ D}:CLK_000_P_SYNC_4_{ A} -CLK_000_P_SYNC_4_{ B}:CLK_000_P_SYNC_5_{ B} -CLK_000_P_SYNC_5_{ C}:CLK_000_P_SYNC_6_{ G} -CLK_000_P_SYNC_6_{ H}:CLK_000_P_SYNC_7_{ B} -CLK_000_P_SYNC_7_{ C}:CLK_000_P_SYNC_8_{ A} -CLK_000_P_SYNC_8_{ B}:CLK_000_P_SYNC_9_{ F} -CLK_000_N_SYNC_0_{ G}:CLK_000_N_SYNC_1_{ C} -CLK_000_N_SYNC_1_{ D}:CLK_000_N_SYNC_2_{ A} -CLK_000_N_SYNC_2_{ B}:CLK_000_N_SYNC_3_{ C} -CLK_000_N_SYNC_3_{ D}:CLK_000_N_SYNC_4_{ B} -CLK_000_N_SYNC_4_{ C}:CLK_000_N_SYNC_5_{ H} -CLK_000_N_SYNC_5_{ I}:CLK_000_N_SYNC_6_{ G} -CLK_000_N_SYNC_6_{ H}:CLK_000_N_SYNC_7_{ G} -CLK_000_N_SYNC_7_{ H}:CLK_000_N_SYNC_8_{ G} -CLK_000_N_SYNC_8_{ H}: DSACK1{ H}CLK_000_N_SYNC_9_{ H} -CLK_000_N_SYNC_9_{ I}: DSACK1{ H}CLK_000_N_SYNC_10_{ H} -CLK_000_N_SYNC_10_{ I}:CLK_000_N_SYNC_11_{ D} -CLK_OUT_PRE_Dreg{ C}: CLK_DIV_OUT{ G} CLK_EXP{ B} DSACK1{ H} -SM_AMIGA_1_{ G}: DSACK1{ H} SM_AMIGA_7_{ F} SM_AMIGA_0_{ F} - : SM_AMIGA_1_{ F} -SM_AMIGA_5_{ G}: SM_AMIGA_7_{ F} SM_AMIGA_4_{ F} SM_AMIGA_5_{ F} -SM_AMIGA_3_{ D}: SM_AMIGA_7_{ F} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} -SM_AMIGA_2_{ D}: SM_AMIGA_7_{ F} SM_AMIGA_1_{ F} SM_AMIGA_2_{ C} -un14_ciin_0{ F}: CIIN_0{ B} -state_machine_un15_clk_000_ne_i_n{ D}: SM_AMIGA_7_{ F} - CIIN_0{ C}: CIIN{ E} ------------------------------------------------------------------------------ - - {.} : Indicates block location of signal - - -Set_Reset_Summary -~~~~~~~~~~~~~~~~~ - -Block A -block level set pt : !RST -block level reset pt : -Equations : -| | |Block|Block| Signal -| Reg |Mode |Set |Reset| Name -+-----+-----+-----+-----+------------------------ -| * | S | BS | BR | DS_030 -| | | | | AVEC -| * | S | BS | BR | inst_UDS_000_INT -| * | S | BS | BR | inst_LDS_000_INT -| * | S | BS | BR | RN_DS_030 -| * | S | BR | BR | CLK_000_N_SYNC_2_ -| * | S | BR | BR | CLK_000_P_SYNC_8_ -| * | S | BR | BR | CLK_000_P_SYNC_4_ -| | | | | A_19_ -| | | | | A_16_ -| | | | | A_18_ -| | | | | A_21_ -| | | | | A_20_ -| | | | | FPU_SENSE - - -Block B -block level set pt : !RST -block level reset pt : -Equations : -| | |Block|Block| Signal -| Reg |Mode |Set |Reset| Name -+-----+-----+-----+-----+------------------------ -| * | S | BS | BR | IPL_030_2_ -| * | S | BS | BR | IPL_030_0_ -| * | S | BS | BR | IPL_030_1_ -| | | | | CLK_EXP -| * | S | BR | BS | RESET -| * | S | BR | BR | inst_CLK_000_NE -| * | S | BR | BR | CLK_OUT_PRE_Dreg -| * | S | BR | BR | inst_CLK_000_NE_D0 -| * | S | BS | BR | RN_IPL_030_0_ -| * | S | BS | BR | RN_IPL_030_1_ -| * | S | BS | BR | RN_IPL_030_2_ -| | | | | CIIN_0 -| * | S | BR | BR | CLK_000_N_SYNC_4_ -| * | S | BR | BR | CLK_000_P_SYNC_7_ -| * | S | BR | BR | CLK_000_P_SYNC_5_ -| * | S | BR | BR | inst_CLK_OUT_PRE -| | | | | A_29_ -| | | | | A_30_ -| | | | | A_31_ - - -Block C -block level set pt : -block level reset pt : !RST -Equations : -| | |Block|Block| Signal -| Reg |Mode |Set |Reset| Name -+-----+-----+-----+-----+------------------------ -| | | | | AMIGA_BUS_ENABLE_LOW -| * | S | BS | BS | cpu_est_2_ -| * | S | BS | BR | SM_AMIGA_3_ -| * | S | BS | BR | SM_AMIGA_2_ -| * | S | BS | BR | inst_DS_000_ENABLE -| * | S | BR | BS | inst_VPA_D -| | | | | state_machine_un15_clk_000_ne_i_n -| * | S | BS | BS | CLK_000_N_SYNC_3_ -| * | S | BS | BS | CLK_000_N_SYNC_1_ -| * | S | BS | BS | CLK_000_P_SYNC_3_ -| * | S | BS | BS | CLK_000_P_SYNC_1_ -| * | S | BR | BS | inst_DS_030_D0 -| | | | | A_24_ -| | | | | A_25_ -| | | | | A_26_ -| | | | | A_27_ -| | | | | A_28_ -| | | | | BG_030 - - -Block D -block level set pt : !RST -block level reset pt : -Equations : -| | |Block|Block| Signal -| Reg |Mode |Set |Reset| Name -+-----+-----+-----+-----+------------------------ -| | | | | UDS_000 -| | | | | LDS_000 -| | | | | DTACK -| * | S | BS | BR | AMIGA_ADDR_ENABLE -| * | S | BS | BR | VMA -| * | S | BS | BR | BG_000 -| | | | | AMIGA_BUS_ENABLE_HIGH -| * | S | BR | BR | cpu_est_1_ -| * | S | BR | BR | cpu_est_0_ -| * | S | BS | BR | RN_VMA -| * | S | BR | BR | inst_CLK_000_D1 -| * | S | BS | BR | RN_AMIGA_ADDR_ENABLE -| * | S | BS | BR | RN_BG_000 -| * | S | BR | BR | CLK_000_P_SYNC_0_ -| * | S | BR | BR | CLK_000_N_SYNC_11_ -| | | | | BGACK_000 - - -Block E -block level set pt : !RST -block level reset pt : -Equations : -| | |Block|Block| Signal -| Reg |Mode |Set |Reset| Name -+-----+-----+-----+-----+------------------------ -| * | S | BS | BR | AS_000 -| | | | | BERR -| | | | | AMIGA_BUS_DATA_DIR -| | | | | CIIN -| * | S | BS | BR | inst_AS_030_D0 -| * | S | BS | BR | RN_AS_000 -| | | | | un14_ciin_0 -| * | S | BS | BR | inst_BGACK_030_INT_D - - -Block F -block level set pt : !RST -block level reset pt : -Equations : -| | |Block|Block| Signal -| Reg |Mode |Set |Reset| Name -+-----+-----+-----+-----+------------------------ -| * | S | BR | BS | SM_AMIGA_6_ -| * | S | BS | BR | SM_AMIGA_7_ -| * | S | BS | BR | inst_AS_030_000_SYNC -| * | S | BR | BS | SM_AMIGA_1_ -| * | S | BR | BS | SM_AMIGA_0_ -| * | S | BR | BS | SM_AMIGA_4_ -| * | S | BR | BR | inst_CLK_000_D0 -| * | S | BR | BS | SM_AMIGA_5_ -| * | S | BR | BR | CLK_000_N_SYNC_0_ -| * | S | BR | BR | CLK_000_P_SYNC_9_ -| | | | | A_17_ -| | | | | FC_1_ -| | | | | FC_0_ -| | | | | IPL_1_ - - -Block G -block level set pt : !RST -block level reset pt : -Equations : -| | |Block|Block| Signal -| Reg |Mode |Set |Reset| Name -+-----+-----+-----+-----+------------------------ -| * | S | BS | BR | RW -| * | S | BS | BR | SIZE_0_ -| * | S | BS | BR | A0 -| * | S | BR | BR | E -| | | | | CLK_DIV_OUT -| * | S | BR | BR | inst_CLK_000_PE -| * | S | BR | BR | RN_E -| * | S | BR | BS | inst_CLK_030_H -| * | S | BR | BR | inst_CLK_OUT_PRE_50 -| * | S | BS | BR | RN_RW -| * | S | BR | BR | CLK_000_N_SYNC_8_ -| * | S | BR | BR | CLK_000_N_SYNC_7_ -| * | S | BR | BR | CLK_000_N_SYNC_6_ -| * | S | BR | BR | CLK_000_P_SYNC_6_ -| * | S | BS | BR | inst_DTACK_D0 -| | | | | IPL_2_ -| | | | | IPL_0_ - - -Block H -block level set pt : !RST -block level reset pt : -Equations : -| | |Block|Block| Signal -| Reg |Mode |Set |Reset| Name -+-----+-----+-----+-----+------------------------ -| * | S | BS | BR | RW_000 -| * | S | BS | BR | AS_030 -| * | S | BS | BR | DSACK1 -| * | S | BS | BR | SIZE_1_ -| * | S | BS | BR | BGACK_030 -| | | | | FPU_CS -| * | S | BS | BR | RN_BGACK_030 -| * | S | BS | BR | RN_AS_030 -| * | S | BS | BR | RN_DSACK1 -| * | S | BS | BR | RN_RW_000 -| * | S | BR | BR | CLK_000_N_SYNC_10_ -| * | S | BR | BR | CLK_000_N_SYNC_9_ -| * | S | BR | BR | CLK_000_N_SYNC_5_ -| * | S | BR | BR | CLK_000_P_SYNC_2_ -| | | | | A_23_ -| | | | | A_22_ - - - (S) means the macrocell is configured in synchronous mode - i.e. it uses the block-level set and reset pt. - (A) means the macrocell is configured in asynchronous mode - i.e. it can have its independant set or reset pt. - (BS) means the block-level set pt is selected. - (BR) means the block-level reset pt is selected. - - - - -BLOCK_A_LOGIC_ARRAY_FANIN -~~~~~~~~~~~~~~~~~~~~~~~~~ -CSM Signal Source CSM Signal Source ------------------------------------- ------------------------------------ -mx A0 RST pin 86 mx A17 ... ... -mx A1 ... ... mx A18 A0 pin 69 -mx A2CLK_000_P_SYNC_7_ mcell B10 mx A19 ... ... -mx A3inst_UDS_000_INT mcell A8 mx A20 RN_BGACK_030 mcell H4 -mx A4 CLK_030 pin 64 mx A21 RW_000 pin 80 -mx A5 nEXP_SPACE pin 14 mx A22CLK_000_N_SYNC_1_ mcell C2 -mx A6 SIZE_1_ pin 79 mx A23 ... ... -mx A7 inst_DS_030_D0 mcell C14 mx A24inst_LDS_000_INT mcell A12 -mx A8 UDS_000 pin 32 mx A25 SM_AMIGA_6_ mcell F0 -mx A9CLK_000_P_SYNC_3_ mcell C6 mx A26 ... ... -mx A10 inst_CLK_030_H mcell G9 mx A27 LDS_000 pin 31 -mx A11 ... ... mx A28 ... ... -mx A12 ... ... mx A29 ... ... -mx A13 RN_AS_030 mcell H8 mx A30 ... ... -mx A14 SIZE_0_ pin 70 mx A31 ... ... -mx A15 RN_DS_030 mcell A0 mx A32 ... ... -mx A16 AS_000 pin 42 ----------------------------------------------------------------------------- - - -BLOCK_B_LOGIC_ARRAY_FANIN -~~~~~~~~~~~~~~~~~~~~~~~~~ -CSM Signal Source CSM Signal Source ------------------------------------- ------------------------------------ -mx B0 RST pin 86 mx B17 A_26_ pin 17 -mx B1 A_31_ pin 4 mx B18 A_23_ pin 85 -mx B2CLK_000_P_SYNC_4_ mcell A9 mx B19 A_30_ pin 5 -mx B3 un14_ciin_0 mcell E5 mx B20 A_22_ pin 84 -mx B4 IPL_2_ pin 68 mx B21 IPL_1_ pin 56 -mx B5inst_CLK_OUT_PRE mcell B3 mx B22 A_25_ pin 18 -mx B6CLK_OUT_PRE_Dreg mcell B9 mx B23 ... ... -mx B7 A_28_ pin 15 mx B24 ... ... -mx B8 inst_AS_030_D0 mcell E8 mx B25 RN_IPL_030_0_ mcell B8 -mx B9inst_CLK_OUT_PRE_50 mcell G13 mx B26CLK_000_P_SYNC_6_ mcell G14 -mx B10CLK_000_N_SYNC_11_ mcell D14 mx B27 RN_IPL_030_2_ mcell B4 -mx B11 A_27_ pin 16 mx B28 inst_CLK_000_NE mcell B5 -mx B12 RN_IPL_030_1_ mcell B12 mx B29 A_20_ pin 93 -mx B13 A_29_ pin 6 mx B30CLK_000_N_SYNC_3_ mcell C13 -mx B14 A_24_ pin 19 mx B31 ... ... -mx B15 A_21_ pin 94 mx B32 ... ... -mx B16 IPL_0_ pin 67 ----------------------------------------------------------------------------- - - -BLOCK_C_LOGIC_ARRAY_FANIN -~~~~~~~~~~~~~~~~~~~~~~~~~ -CSM Signal Source CSM Signal Source ------------------------------------- ------------------------------------ -mx C0 RST pin 86 mx C17 RN_VMA mcell D1 -mx C1 BERR pin 41 mx C18 DS_030 pin 98 -mx C2 RN_E mcell G4 mx C19 ... ... -mx C3 inst_CLK_000_PE mcell G5 mx C20CLK_000_P_SYNC_0_ mcell D10 -mx C4 SM_AMIGA_2_ mcell C12 mx C21CLK_000_P_SYNC_2_ mcell H6 -mx C5 inst_DTACK_D0 mcell G3 mx C22inst_DS_000_ENABLE mcell C1 -mx C6 cpu_est_2_ mcell C4 mx C23 ... ... -mx C7 SM_AMIGA_3_ mcell C8 mx C24 ... ... -mx C8 inst_AS_030_D0 mcell E8 mx C25 cpu_est_1_ mcell D9 -mx C9CLK_000_N_SYNC_0_ mcell F2 mx C26 ... ... -mx C10inst_CLK_000_NE_D0 mcell B13 mx C27 ... ... -mx C11 RW pin 71 mx C28 inst_CLK_000_NE mcell B5 -mx C12CLK_000_N_SYNC_2_ mcell A1 mx C29 ... ... -mx C13 VPA pin 36 mx C30 ... ... -mx C14 SM_AMIGA_4_ mcell F5 mx C31 SM_AMIGA_6_ mcell F0 -mx C15 inst_VPA_D mcell C5 mx C32 ... ... -mx C16 cpu_est_0_ mcell D2 ----------------------------------------------------------------------------- - - -BLOCK_D_LOGIC_ARRAY_FANIN -~~~~~~~~~~~~~~~~~~~~~~~~~ -CSM Signal Source CSM Signal Source ------------------------------------- ------------------------------------ -mx D0 RST pin 86 mx D17 RN_VMA mcell D1 -mx D1 inst_CLK_000_D0 mcell F9 mx D18inst_UDS_000_INT mcell A8 -mx D2inst_BGACK_030_INT_D mcell E9 mx D19 ... ... -mx D3 cpu_est_0_ mcell D2 mx D20inst_AS_030_000_SYNC mcell F8 -mx D4 BG_030 pin 21 mx D21RN_AMIGA_ADDR_ENABLE mcell D4 -mx D5CLK_000_N_SYNC_10_ mcell H9 mx D22inst_DS_000_ENABLE mcell C1 -mx D6 cpu_est_2_ mcell C4 mx D23 RN_BGACK_030 mcell H4 -mx D7 inst_VPA_D mcell C5 mx D24 ... ... -mx D8 inst_AS_030_D0 mcell E8 mx D25 ... ... -mx D9inst_LDS_000_INT mcell A12 mx D26 ... ... -mx D10 DSACK1 pin 81 mx D27 ... ... -mx D11 RN_E mcell G4 mx D28inst_CLK_000_NE_D0 mcell B13 -mx D12 cpu_est_1_ mcell D9 mx D29 RN_BG_000 mcell D13 -mx D13 RN_AS_030 mcell H8 mx D30 ... ... -mx D14 SM_AMIGA_7_ mcell F4 mx D31 inst_CLK_000_NE mcell B5 -mx D15 nEXP_SPACE pin 14 mx D32 inst_CLK_000_PE mcell G5 -mx D16 inst_CLK_000_D1 mcell D6 ----------------------------------------------------------------------------- - - -BLOCK_E_LOGIC_ARRAY_FANIN -~~~~~~~~~~~~~~~~~~~~~~~~~ -CSM Signal Source CSM Signal Source ------------------------------------- ------------------------------------ -mx E0 RST pin 86 mx E17 A_20_ pin 93 -mx E1 BERR pin 41 mx E18 A_23_ pin 85 -mx E2 AS_000 pin 42 mx E19 FPU_SENSE pin 91 -mx E3 A_25_ pin 18 mx E20 A_22_ pin 84 -mx E4 BGACK_000 pin 28 mx E21 nEXP_SPACE pin 14 -mx E5 SM_AMIGA_6_ mcell F0 mx E22 inst_CLK_000_PE mcell G5 -mx E6 A_16_ pin 96 mx E23 RN_BGACK_030 mcell H4 -mx E7 A_28_ pin 15 mx E24 FC_0_ pin 57 -mx E8 A_17_ pin 59 mx E25 A_31_ pin 4 -mx E9 A_30_ pin 5 mx E26 A_26_ pin 17 -mx E10 CIIN_0 mcell B2 mx E27 A_19_ pin 97 -mx E11 A_27_ pin 16 mx E28 RW_000 pin 80 -mx E12 FC_1_ pin 58 mx E29 RN_AS_000 mcell E4 -mx E13 A_29_ pin 6 mx E30 ... ... -mx E14 A_24_ pin 19 mx E31 A_18_ pin 95 -mx E15 A_21_ pin 94 mx E32 AS_030 pin 82 -mx E16 inst_AS_030_D0 mcell E8 ----------------------------------------------------------------------------- - - -BLOCK_F_LOGIC_ARRAY_FANIN -~~~~~~~~~~~~~~~~~~~~~~~~~ -CSM Signal Source CSM Signal Source ------------------------------------- ------------------------------------ -mx F0 RST pin 86 mx F17 FC_0_ pin 57 -mx F1 BERR pin 41 mx F18 BGACK_000 pin 28 -mx F2CLK_000_P_SYNC_8_ mcell A5 mx F19 ... ... -mx F3 CLK_000 pin 11 mx F20inst_AS_030_000_SYNC mcell F8 -mx F4 A_18_ pin 95 mx F21 ... ... -mx F5 nEXP_SPACE pin 14 mx F22 inst_CLK_000_PE mcell G5 -mx F6 A_19_ pin 97 mx F23 SM_AMIGA_2_ mcell C12 -mx F7 SM_AMIGA_3_ mcell C8 mx F24 ... ... -mx F8 A_17_ pin 59 mx F25 SM_AMIGA_6_ mcell F0 -mx F9 SM_AMIGA_4_ mcell F5 mx F26 ... ... -mx F10 SM_AMIGA_0_ mcell F1 mx F27 ... ... -mx F11 A_16_ pin 96 mx F28 inst_CLK_000_NE mcell B5 -mx F12 FC_1_ pin 58 mx F29 ... ... -mx F13state_machine_un15_clk_000_ne_i_n mcell C9 mx F30 inst_AS_030_D0 mcell E8 -mx F14 SM_AMIGA_7_ mcell F4 mx F31 SM_AMIGA_1_ mcell F12 -mx F15 SM_AMIGA_5_ mcell F13 mx F32 inst_CLK_000_D0 mcell F9 -mx F16 inst_CLK_000_D1 mcell D6 ----------------------------------------------------------------------------- - - -BLOCK_G_LOGIC_ARRAY_FANIN -~~~~~~~~~~~~~~~~~~~~~~~~~ -CSM Signal Source CSM Signal Source ------------------------------------- ------------------------------------ -mx G0 RN_BGACK_030 mcell H4 mx G17 RN_RW mcell G0 -mx G1CLK_000_P_SYNC_9_ mcell F6 mx G18 ... ... -mx G2 RN_E mcell G4 mx G19 ... ... -mx G3 cpu_est_0_ mcell D2 mx G20CLK_000_P_SYNC_5_ mcell B14 -mx G4 CLK_030 pin 64 mx G21 RST pin 86 -mx G5 nEXP_SPACE pin 14 mx G22CLK_000_N_SYNC_6_ mcell G10 -mx G6CLK_OUT_PRE_Dreg mcell B9 mx G23CLK_000_N_SYNC_7_ mcell G6 -mx G7 cpu_est_1_ mcell D9 mx G24 LDS_000 pin 31 -mx G8 UDS_000 pin 32 mx G25inst_CLK_OUT_PRE_50 mcell G13 -mx G9 DTACK pin 30 mx G26 ... ... -mx G10inst_CLK_000_NE_D0 mcell B13 mx G27 ... ... -mx G11 ... ... mx G28 RW_000 pin 80 -mx G12 inst_CLK_030_H mcell G9 mx G29 cpu_est_2_ mcell C4 -mx G13 RN_AS_030 mcell H8 mx G30 ... ... -mx G14CLK_000_N_SYNC_5_ mcell H2 mx G31 ... ... -mx G15 ... ... mx G32 ... ... -mx G16 AS_000 pin 42 ----------------------------------------------------------------------------- - - -BLOCK_H_LOGIC_ARRAY_FANIN -~~~~~~~~~~~~~~~~~~~~~~~~~ -CSM Signal Source CSM Signal Source ------------------------------------- ------------------------------------ -mx H0 RN_BGACK_030 mcell H4 mx H17 SM_AMIGA_1_ mcell F12 -mx H1 BERR pin 41 mx H18 BGACK_000 pin 28 -mx H2CLK_000_N_SYNC_4_ mcell B6 mx H19 FPU_SENSE pin 91 -mx H3 RN_AS_030 mcell H8 mx H20 FC_1_ pin 58 -mx H4 A_18_ pin 95 mx H21 RST pin 86 -mx H5 SM_AMIGA_6_ mcell F0 mx H22 inst_CLK_000_PE mcell G5 -mx H6 FC_0_ pin 57 mx H23 RN_RW_000 mcell H0 -mx H7CLK_000_N_SYNC_9_ mcell H13 mx H24 LDS_000 pin 31 -mx H8CLK_000_P_SYNC_1_ mcell C10 mx H25 RW pin 71 -mx H9 AS_030 pin 82 mx H26 AS_000 pin 42 -mx H10 SM_AMIGA_0_ mcell F1 mx H27 A_19_ pin 97 -mx H11 A_16_ pin 96 mx H28 CLK_030 pin 64 -mx H12 UDS_000 pin 32 mx H29 RN_DSACK1 mcell H12 -mx H13 A_17_ pin 59 mx H30 inst_AS_030_D0 mcell E8 -mx H14 SM_AMIGA_7_ mcell F4 mx H31CLK_000_N_SYNC_8_ mcell G2 -mx H15 nEXP_SPACE pin 14 mx H32 ... ... -mx H16CLK_OUT_PRE_Dreg mcell B9 ----------------------------------------------------------------------------- - - CSM indicates the mux inputs from the Central Switch Matrix. - Source indicates where the signal comes from (pin or macrocell). - - - - -PostFit_Equations -~~~~~~~~~~~~~~~~~ - - - P-Terms Fan-in Fan-out Type Name (attributes) ---------- ------ ------- ---- ----------------- - 1 2 1 Pin UDS_000- - 1 1 1 Pin UDS_000.OE - 1 2 1 Pin LDS_000- - 1 1 1 Pin LDS_000.OE - 0 0 1 Pin BERR - 1 9 1 Pin BERR.OE - 1 1 1 Pin CLK_DIV_OUT - 1 1 1 Pin CLK_EXP - 1 9 1 Pin FPU_CS- - 1 1 1 Pin DTACK - 1 3 1 Pin DTACK.OE - 1 0 1 Pin AVEC - 3 8 1 Pin AMIGA_ADDR_ENABLE.D- - 1 1 1 Pin AMIGA_ADDR_ENABLE.AP - 1 1 1 Pin AMIGA_ADDR_ENABLE.C - 2 4 1 Pin AMIGA_BUS_DATA_DIR - 1 0 1 Pin AMIGA_BUS_ENABLE_LOW - 1 1 1 Pin AMIGA_BUS_ENABLE_HIGH - 1 13 1 Pin CIIN - 1 1 1 Pin CIIN.OE - 1 3 1 Pin SIZE_1_.OE - 2 4 1 Pin SIZE_1_.D- - 1 1 1 Pin SIZE_1_.AP - 1 1 1 Pin SIZE_1_.C - 2 3 1 Pin IPL_030_2_.D - 1 1 1 Pin IPL_030_2_.AP - 1 1 1 Pin IPL_030_2_.C - 1 3 1 Pin AS_030.OE - 4 6 1 Pin AS_030.D - 1 1 1 Pin AS_030.AP - 1 1 1 Pin AS_030.C - 1 1 1 Pin AS_000.OE - 2 5 1 Pin AS_000.D- - 1 1 1 Pin AS_000.AP - 1 1 1 Pin AS_000.C - 1 1 1 Pin RW_000.OE - 3 6 1 Pin RW_000.D- - 1 1 1 Pin RW_000.AP - 1 1 1 Pin RW_000.C - 1 3 1 Pin DS_030.OE - 7 9 1 Pin DS_030.D - 1 1 1 Pin DS_030.AP - 1 1 1 Pin DS_030.C - 2 3 1 Pin IPL_030_1_.D - 1 1 1 Pin IPL_030_1_.AP - 1 1 1 Pin IPL_030_1_.C - 2 3 1 Pin IPL_030_0_.D - 1 1 1 Pin IPL_030_0_.AP - 1 1 1 Pin IPL_030_0_.C - 1 3 1 Pin A0.OE - 1 4 1 Pin A0.D - 1 1 1 Pin A0.AP - 1 1 1 Pin A0.C - 2 5 1 Pin BG_000.D- - 1 1 1 Pin BG_000.AP - 1 1 1 Pin BG_000.C - 2 3 1 Pin BGACK_030.D - 1 1 1 Pin BGACK_030.AP - 1 1 1 Pin BGACK_030.C - 1 1 1 Pin DSACK1.OE - 4 8 1 Pin DSACK1.D- - 1 1 1 Pin DSACK1.AP - 1 1 1 Pin DSACK1.C - 5 5 1 Pin E.D - 1 1 1 Pin E.C - 1 1 1 Pin VMA.AP - 2 8 1 Pin VMA.T - 1 1 1 Pin VMA.C - 1 1 1 Pin RESET.AR - 1 0 1 Pin RESET.D - 1 1 1 Pin RESET.C - 1 1 1 Pin RW.OE - 4 7 1 Pin RW.D- - 1 1 1 Pin RW.AP - 1 1 1 Pin RW.C - 1 3 1 Pin SIZE_0_.OE - 1 4 1 Pin SIZE_0_.D- - 1 1 1 Pin SIZE_0_.AP - 1 1 1 Pin SIZE_0_.C - 2 2 1 Node cpu_est_0_.D - 1 1 1 Node cpu_est_0_.C - 5 5 1 Node cpu_est_1_.D- - 1 1 1 Node cpu_est_1_.C - 1 1 1 Node inst_AS_030_D0.D - 1 1 1 Node inst_AS_030_D0.AP - 1 1 1 Node inst_AS_030_D0.C - 1 1 1 Node inst_DS_030_D0.D - 1 1 1 Node inst_DS_030_D0.AP - 1 1 1 Node inst_DS_030_D0.C - 6 12 1 Node inst_AS_030_000_SYNC.D - 1 1 1 Node inst_AS_030_000_SYNC.AP - 1 1 1 Node inst_AS_030_000_SYNC.C - 1 1 1 Node inst_BGACK_030_INT_D.D - 1 1 1 Node inst_BGACK_030_INT_D.AP - 1 1 1 Node inst_BGACK_030_INT_D.C - 1 1 1 Node inst_VPA_D.D - 1 1 1 Node inst_VPA_D.AP - 1 1 1 Node inst_VPA_D.C - 1 1 1 Node inst_DTACK_D0.D - 1 1 1 Node inst_DTACK_D0.AP - 1 1 1 Node inst_DTACK_D0.C - 1 1 1 Node inst_CLK_OUT_PRE_50.D - 1 1 1 Node inst_CLK_OUT_PRE_50.C - 1 1 1 Node inst_CLK_000_D1.D - 1 1 1 Node inst_CLK_000_D1.C - 1 1 1 Node inst_CLK_000_D0.D - 1 1 1 Node inst_CLK_000_D0.C - 13 15 1 Node SM_AMIGA_7_.D - 1 1 1 Node SM_AMIGA_7_.AP - 1 1 1 Node SM_AMIGA_7_.C - 1 1 1 Node inst_CLK_OUT_PRE.D - 1 1 1 Node inst_CLK_OUT_PRE.C - 1 1 1 Node inst_CLK_000_PE.D - 1 1 1 Node inst_CLK_000_PE.C - 1 1 1 Node CLK_000_P_SYNC_9_.D - 1 1 1 Node CLK_000_P_SYNC_9_.C - 1 1 1 Node inst_CLK_000_NE.D - 1 1 1 Node inst_CLK_000_NE.C - 1 1 1 Node CLK_000_N_SYNC_11_.D - 1 1 1 Node CLK_000_N_SYNC_11_.C - 4 5 1 Node cpu_est_2_.D - 1 1 1 Node cpu_est_2_.C - 1 1 1 Node inst_CLK_000_NE_D0.D - 1 1 1 Node inst_CLK_000_NE_D0.C - 1 1 1 Node SM_AMIGA_6_.AR - 2 8 1 Node SM_AMIGA_6_.D - 1 1 1 Node SM_AMIGA_6_.C - 1 1 1 Node SM_AMIGA_4_.AR - 2 5 1 Node SM_AMIGA_4_.D - 1 1 1 Node SM_AMIGA_4_.C - 1 1 1 Node SM_AMIGA_0_.AR - 2 5 1 Node SM_AMIGA_0_.D - 1 1 1 Node SM_AMIGA_0_.C - 1 1 1 Node inst_CLK_030_H.AR - 4 7 1 Node inst_CLK_030_H.D - 1 1 1 Node inst_CLK_030_H.C - 3 6 1 Node inst_LDS_000_INT.D - 1 1 1 Node inst_LDS_000_INT.AP - 1 1 1 Node inst_LDS_000_INT.C - 1 1 1 Node inst_DS_000_ENABLE.AR - 3 7 1 Node inst_DS_000_ENABLE.D - 1 1 1 Node inst_DS_000_ENABLE.C - 3 4 1 Node inst_UDS_000_INT.D - 1 1 1 Node inst_UDS_000_INT.AP - 1 1 1 Node inst_UDS_000_INT.C - 1 2 1 Node CLK_000_P_SYNC_0_.D - 1 1 1 Node CLK_000_P_SYNC_0_.C - 1 1 1 Node CLK_000_P_SYNC_1_.D - 1 1 1 Node CLK_000_P_SYNC_1_.C - 1 1 1 Node CLK_000_P_SYNC_2_.D - 1 1 1 Node CLK_000_P_SYNC_2_.C - 1 1 1 Node CLK_000_P_SYNC_3_.D - 1 1 1 Node CLK_000_P_SYNC_3_.C - 1 1 1 Node CLK_000_P_SYNC_4_.D - 1 1 1 Node CLK_000_P_SYNC_4_.C - 1 1 1 Node CLK_000_P_SYNC_5_.D - 1 1 1 Node CLK_000_P_SYNC_5_.C - 1 1 1 Node CLK_000_P_SYNC_6_.D - 1 1 1 Node CLK_000_P_SYNC_6_.C - 1 1 1 Node CLK_000_P_SYNC_7_.D - 1 1 1 Node CLK_000_P_SYNC_7_.C - 1 1 1 Node CLK_000_P_SYNC_8_.D - 1 1 1 Node CLK_000_P_SYNC_8_.C - 1 2 1 Node CLK_000_N_SYNC_0_.D - 1 1 1 Node CLK_000_N_SYNC_0_.C - 1 1 1 Node CLK_000_N_SYNC_1_.D - 1 1 1 Node CLK_000_N_SYNC_1_.C - 1 1 1 Node CLK_000_N_SYNC_2_.D - 1 1 1 Node CLK_000_N_SYNC_2_.C - 1 1 1 Node CLK_000_N_SYNC_3_.D - 1 1 1 Node CLK_000_N_SYNC_3_.C - 1 1 1 Node CLK_000_N_SYNC_4_.D - 1 1 1 Node CLK_000_N_SYNC_4_.C - 1 1 1 Node CLK_000_N_SYNC_5_.D - 1 1 1 Node CLK_000_N_SYNC_5_.C - 1 1 1 Node CLK_000_N_SYNC_6_.D - 1 1 1 Node CLK_000_N_SYNC_6_.C - 1 1 1 Node CLK_000_N_SYNC_7_.D - 1 1 1 Node CLK_000_N_SYNC_7_.C - 1 1 1 Node CLK_000_N_SYNC_8_.D - 1 1 1 Node CLK_000_N_SYNC_8_.C - 1 1 1 Node CLK_000_N_SYNC_9_.D - 1 1 1 Node CLK_000_N_SYNC_9_.C - 1 1 1 Node CLK_000_N_SYNC_10_.D - 1 1 1 Node CLK_000_N_SYNC_10_.C - 1 1 1 Node CLK_OUT_PRE_Dreg.D - 1 1 1 Node CLK_OUT_PRE_Dreg.C - 1 1 1 Node SM_AMIGA_1_.AR - 2 5 1 Node SM_AMIGA_1_.D - 1 1 1 Node SM_AMIGA_1_.C - 1 1 1 Node SM_AMIGA_5_.AR - 2 5 1 Node SM_AMIGA_5_.D - 1 1 1 Node SM_AMIGA_5_.C - 6 12 1 NodeX1 SM_AMIGA_3_.D.X1 - 1 2 1 NodeX2 SM_AMIGA_3_.D.X2 - 1 1 1 Node SM_AMIGA_3_.AR - 1 1 1 Node SM_AMIGA_3_.C - 1 1 1 Node SM_AMIGA_2_.AR - 3 12 1 Node SM_AMIGA_2_.D - 1 1 1 Node SM_AMIGA_2_.C - 2 10 1 Node un14_ciin_0 - 2 7 1 Node state_machine_un15_clk_000_ne_i_n- - 2 14 1 Node CIIN_0 -========= - 283 P-Term Total: 283 - Total Pins: 60 - Total Nodes: 54 - Average P-Term/Output: 1 - - -Equations: - -!UDS_000 = (inst_DS_000_ENABLE.Q & !inst_UDS_000_INT.Q); - -UDS_000.OE = (BGACK_030.Q); - -!LDS_000 = (!inst_LDS_000_INT.Q & inst_DS_000_ENABLE.Q); - -LDS_000.OE = (BGACK_030.Q); - -BERR = (0); - -BERR.OE = (FC_1_ & BGACK_000 & FPU_SENSE & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & !AS_030.PIN); - -CLK_DIV_OUT = (CLK_OUT_PRE_Dreg.Q); - -CLK_EXP = (CLK_OUT_PRE_Dreg.Q); - -!FPU_CS = (FC_1_ & BGACK_000 & !FPU_SENSE & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & !AS_030.PIN); - -DTACK = (DSACK1.PIN); - -DTACK.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); - -AVEC = (1); - -!AMIGA_ADDR_ENABLE.D = (!BGACK_030.Q - # inst_BGACK_030_INT_D.Q & !SM_AMIGA_7_.Q & !AMIGA_ADDR_ENABLE - # nEXP_SPACE & !inst_AS_030_000_SYNC.Q & inst_BGACK_030_INT_D.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D0.Q & SM_AMIGA_7_.Q); - -AMIGA_ADDR_ENABLE.AP = (!RST); - -AMIGA_ADDR_ENABLE.C = (CLK_OSZI); - -AMIGA_BUS_DATA_DIR = (BGACK_030.Q & !RW_000.PIN - # !nEXP_SPACE & !BGACK_030.Q & !AS_000.PIN & RW_000.PIN); - -AMIGA_BUS_ENABLE_LOW = (1); - -AMIGA_BUS_ENABLE_HIGH = (AMIGA_ADDR_ENABLE); - -CIIN = (!A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_ & A_23_ & A_22_ & A_21_ & A_20_ & !inst_AS_030_D0.Q); - -CIIN.OE = (CIIN_0); - -SIZE_1_.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); - -!SIZE_1_.D = (!BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & LDS_000.PIN - # !BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN); - -SIZE_1_.AP = (!RST); - -SIZE_1_.C = (CLK_OSZI); - -IPL_030_2_.D = (IPL_2_ & inst_CLK_000_NE.Q - # !inst_CLK_000_NE.Q & IPL_030_2_.Q); - -IPL_030_2_.AP = (!RST); - -IPL_030_2_.C = (CLK_OSZI); - -AS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); - -AS_030.D = (BGACK_030.Q - # AS_000.PIN - # !CLK_030 & AS_030.Q - # UDS_000.PIN & LDS_000.PIN); - -AS_030.AP = (!RST); - -AS_030.C = (CLK_OSZI); - -AS_000.OE = (BGACK_030.Q); - -!AS_000.D = (inst_CLK_000_PE.Q & SM_AMIGA_6_.Q - # !inst_AS_030_D0.Q & !AS_000.Q & BERR.PIN); - -AS_000.AP = (!RST); - -AS_000.C = (CLK_OSZI); - -RW_000.OE = (BGACK_030.Q); - -!RW_000.D = (!SM_AMIGA_7_.Q & !inst_CLK_000_PE.Q & !RW_000.Q - # !SM_AMIGA_7_.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !RW_000.Q - # !SM_AMIGA_7_.Q & inst_CLK_000_PE.Q & SM_AMIGA_6_.Q & !SM_AMIGA_0_.Q & !RW.PIN); - -RW_000.AP = (!RST); - -RW_000.C = (CLK_OSZI); - -DS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); - -DS_030.D = (BGACK_030.Q - # AS_000.PIN - # AS_030.Q & RW_000.PIN - # UDS_000.PIN & LDS_000.PIN - # CLK_030 & AS_030.Q & inst_CLK_030_H.Q - # !CLK_030 & DS_030.Q & !RW_000.PIN - # !inst_CLK_030_H.Q & DS_030.Q & !RW_000.PIN); - -DS_030.AP = (!RST); - -DS_030.C = (CLK_OSZI); - -IPL_030_1_.D = (IPL_1_ & inst_CLK_000_NE.Q - # !inst_CLK_000_NE.Q & IPL_030_1_.Q); - -IPL_030_1_.AP = (!RST); - -IPL_030_1_.C = (CLK_OSZI); - -IPL_030_0_.D = (IPL_0_ & inst_CLK_000_NE.Q - # !inst_CLK_000_NE.Q & IPL_030_0_.Q); - -IPL_030_0_.AP = (!RST); - -IPL_030_0_.C = (CLK_OSZI); - -A0.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); - -A0.D = (!BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN); - -A0.AP = (!RST); - -A0.C = (CLK_OSZI); - -!BG_000.D = (!BG_030 & !BG_000.Q - # nEXP_SPACE & !BG_030 & inst_AS_030_D0.Q & inst_CLK_000_D0.Q); - -BG_000.AP = (!RST); - -BG_000.C = (CLK_OSZI); - -BGACK_030.D = (BGACK_000 & BGACK_030.Q - # BGACK_000 & inst_CLK_000_PE.Q); - -BGACK_030.AP = (!RST); - -BGACK_030.C = (CLK_OSZI); - -DSACK1.OE = (nEXP_SPACE); - -!DSACK1.D = (CLK_000_N_SYNC_9_.Q & SM_AMIGA_1_.Q - # !CLK_030 & CLK_000_N_SYNC_8_.Q & SM_AMIGA_1_.Q - # CLK_000_N_SYNC_8_.Q & CLK_OUT_PRE_Dreg.Q & SM_AMIGA_1_.Q - # !inst_AS_030_D0.Q & !DSACK1.Q & BERR.PIN); - -DSACK1.AP = (!RST); - -DSACK1.C = (CLK_OSZI); - -E.D = (E.Q & !cpu_est_0_.Q - # E.Q & !cpu_est_1_.Q - # E.Q & !inst_CLK_000_NE_D0.Q - # cpu_est_0_.Q & cpu_est_1_.Q & !cpu_est_2_.Q & inst_CLK_000_NE_D0.Q - # !cpu_est_0_.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & inst_CLK_000_NE_D0.Q); - -E.C = (CLK_OSZI); - -VMA.AP = (!RST); - -VMA.T = (!E.Q & !VMA.Q & !cpu_est_0_.Q & cpu_est_1_.Q & inst_CLK_000_PE.Q & cpu_est_2_.Q - # !E.Q & VMA.Q & cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & inst_CLK_000_NE.Q & cpu_est_2_.Q); - -VMA.C = (CLK_OSZI); - -RESET.AR = (!RST); - -RESET.D = (1); - -RESET.C = (CLK_OSZI); - -RW.OE = (!BGACK_030.Q); - -!RW.D = (!CLK_030 & !BGACK_030.Q & !RW.Q & !AS_000.PIN & !UDS_000.PIN - # CLK_030 & !BGACK_030.Q & !AS_000.PIN & !RW_000.PIN & !UDS_000.PIN - # !CLK_030 & !BGACK_030.Q & !RW.Q & !AS_000.PIN & !LDS_000.PIN - # CLK_030 & !BGACK_030.Q & !AS_000.PIN & !RW_000.PIN & !LDS_000.PIN); - -RW.AP = (!RST); - -RW.C = (CLK_OSZI); - -SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); - -!SIZE_0_.D = (!BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & !LDS_000.PIN); - -SIZE_0_.AP = (!RST); - -SIZE_0_.C = (CLK_OSZI); - -cpu_est_0_.D = (!cpu_est_0_.Q & inst_CLK_000_NE_D0.Q - # cpu_est_0_.Q & !inst_CLK_000_NE_D0.Q); - -cpu_est_0_.C = (CLK_OSZI); - -!cpu_est_1_.D = (!cpu_est_1_.Q & !inst_CLK_000_NE_D0.Q - # E.Q & cpu_est_0_.Q & !cpu_est_1_.Q - # !E.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & cpu_est_2_.Q - # E.Q & cpu_est_0_.Q & !cpu_est_2_.Q & inst_CLK_000_NE_D0.Q - # !E.Q & cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & inst_CLK_000_NE_D0.Q); - -cpu_est_1_.C = (CLK_OSZI); - -inst_AS_030_D0.D = (AS_030.PIN); - -inst_AS_030_D0.AP = (!RST); - -inst_AS_030_D0.C = (CLK_OSZI); - -inst_DS_030_D0.D = (DS_030.PIN); - -inst_DS_030_D0.AP = (!RST); - -inst_DS_030_D0.C = (CLK_OSZI); - -inst_AS_030_000_SYNC.D = (inst_AS_030_D0.Q - # !BERR.PIN - # !nEXP_SPACE & inst_AS_030_000_SYNC.Q - # !BGACK_000 & inst_AS_030_000_SYNC.Q - # inst_AS_030_000_SYNC.Q & !SM_AMIGA_7_.Q - # FC_1_ & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & inst_AS_030_000_SYNC.Q); - -inst_AS_030_000_SYNC.AP = (!RST); - -inst_AS_030_000_SYNC.C = (CLK_OSZI); - -inst_BGACK_030_INT_D.D = (BGACK_030.Q); - -inst_BGACK_030_INT_D.AP = (!RST); - -inst_BGACK_030_INT_D.C = (CLK_OSZI); - -inst_VPA_D.D = (VPA); - -inst_VPA_D.AP = (!RST); - -inst_VPA_D.C = (CLK_OSZI); - -inst_DTACK_D0.D = (DTACK.PIN); - -inst_DTACK_D0.AP = (!RST); - -inst_DTACK_D0.C = (CLK_OSZI); - -inst_CLK_OUT_PRE_50.D = (!inst_CLK_OUT_PRE_50.Q); - -inst_CLK_OUT_PRE_50.C = (CLK_OSZI); - -inst_CLK_000_D1.D = (inst_CLK_000_D0.Q); - -inst_CLK_000_D1.C = (CLK_OSZI); - -inst_CLK_000_D0.D = (CLK_000); - -inst_CLK_000_D0.C = (CLK_OSZI); - -SM_AMIGA_7_.D = (inst_CLK_000_PE.Q & SM_AMIGA_0_.Q - # SM_AMIGA_0_.Q & !BERR.PIN - # !inst_CLK_000_PE.Q & SM_AMIGA_6_.Q & !BERR.PIN - # !inst_CLK_000_PE.Q & SM_AMIGA_4_.Q & !BERR.PIN - # !inst_CLK_000_NE.Q & SM_AMIGA_1_.Q & !BERR.PIN - # !inst_CLK_000_NE.Q & SM_AMIGA_5_.Q & !BERR.PIN - # !inst_CLK_000_NE.Q & SM_AMIGA_3_.Q & !BERR.PIN - # !inst_CLK_000_PE.Q & SM_AMIGA_2_.Q & !BERR.PIN - # SM_AMIGA_3_.Q & state_machine_un15_clk_000_ne_i_n & !BERR.PIN - # !nEXP_SPACE & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q - # inst_AS_030_000_SYNC.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q - # !inst_CLK_000_D1.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q - # inst_CLK_000_D0.Q & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_0_.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q); - -SM_AMIGA_7_.AP = (!RST); - -SM_AMIGA_7_.C = (CLK_OSZI); - -inst_CLK_OUT_PRE.D = (inst_CLK_OUT_PRE_50.Q); - -inst_CLK_OUT_PRE.C = (CLK_OSZI); - -inst_CLK_000_PE.D = (CLK_000_P_SYNC_9_.Q); - -inst_CLK_000_PE.C = (CLK_OSZI); - -CLK_000_P_SYNC_9_.D = (CLK_000_P_SYNC_8_.Q); - -CLK_000_P_SYNC_9_.C = (CLK_OSZI); - -inst_CLK_000_NE.D = (CLK_000_N_SYNC_11_.Q); - -inst_CLK_000_NE.C = (CLK_OSZI); - -CLK_000_N_SYNC_11_.D = (CLK_000_N_SYNC_10_.Q); - -CLK_000_N_SYNC_11_.C = (CLK_OSZI); - -cpu_est_2_.D = (cpu_est_1_.Q & cpu_est_2_.Q - # cpu_est_2_.Q & !inst_CLK_000_NE_D0.Q - # E.Q & cpu_est_0_.Q & inst_CLK_000_NE_D0.Q - # !cpu_est_0_.Q & !cpu_est_1_.Q & inst_CLK_000_NE_D0.Q); - -cpu_est_2_.C = (CLK_OSZI); - -inst_CLK_000_NE_D0.D = (inst_CLK_000_NE.Q); - -inst_CLK_000_NE_D0.C = (CLK_OSZI); - -SM_AMIGA_6_.AR = (!RST); - -SM_AMIGA_6_.D = (!inst_CLK_000_PE.Q & SM_AMIGA_6_.Q & BERR.PIN - # nEXP_SPACE & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D0.Q & SM_AMIGA_7_.Q); - -SM_AMIGA_6_.C = (CLK_OSZI); - -SM_AMIGA_4_.AR = (!RST); - -SM_AMIGA_4_.D = (inst_CLK_000_NE.Q & SM_AMIGA_5_.Q - # !inst_CLK_000_PE.Q & SM_AMIGA_4_.Q & BERR.PIN); - -SM_AMIGA_4_.C = (CLK_OSZI); - -SM_AMIGA_0_.AR = (!RST); - -SM_AMIGA_0_.D = (inst_CLK_000_NE.Q & !SM_AMIGA_0_.Q & SM_AMIGA_1_.Q - # !inst_CLK_000_PE.Q & SM_AMIGA_0_.Q & BERR.PIN); - -SM_AMIGA_0_.C = (CLK_OSZI); - -inst_CLK_030_H.AR = (!RST); - -inst_CLK_030_H.D = (!BGACK_030.Q & inst_CLK_030_H.Q & !AS_000.PIN & !UDS_000.PIN - # !BGACK_030.Q & inst_CLK_030_H.Q & !AS_000.PIN & !LDS_000.PIN - # !CLK_030 & !BGACK_030.Q & !AS_030.Q & !AS_000.PIN & !UDS_000.PIN - # !CLK_030 & !BGACK_030.Q & !AS_030.Q & !AS_000.PIN & !LDS_000.PIN); - -inst_CLK_030_H.C = (CLK_OSZI); - -inst_LDS_000_INT.D = (inst_DS_030_D0.Q & inst_LDS_000_INT.Q - # !SM_AMIGA_6_.Q & inst_LDS_000_INT.Q - # !inst_DS_030_D0.Q & SM_AMIGA_6_.Q & SIZE_0_.PIN & !SIZE_1_.PIN & !A0.PIN); - -inst_LDS_000_INT.AP = (!RST); - -inst_LDS_000_INT.C = (CLK_OSZI); - -inst_DS_000_ENABLE.AR = (!RST); - -inst_DS_000_ENABLE.D = (inst_CLK_000_PE.Q & SM_AMIGA_4_.Q - # !inst_AS_030_D0.Q & inst_DS_000_ENABLE.Q & BERR.PIN - # inst_CLK_000_PE.Q & SM_AMIGA_6_.Q & RW.PIN); - -inst_DS_000_ENABLE.C = (CLK_OSZI); - -inst_UDS_000_INT.D = (inst_DS_030_D0.Q & inst_UDS_000_INT.Q - # !SM_AMIGA_6_.Q & inst_UDS_000_INT.Q - # !inst_DS_030_D0.Q & SM_AMIGA_6_.Q & A0.PIN); - -inst_UDS_000_INT.AP = (!RST); - -inst_UDS_000_INT.C = (CLK_OSZI); - -CLK_000_P_SYNC_0_.D = (!inst_CLK_000_D1.Q & inst_CLK_000_D0.Q); - -CLK_000_P_SYNC_0_.C = (CLK_OSZI); - -CLK_000_P_SYNC_1_.D = (CLK_000_P_SYNC_0_.Q); - -CLK_000_P_SYNC_1_.C = (CLK_OSZI); - -CLK_000_P_SYNC_2_.D = (CLK_000_P_SYNC_1_.Q); - -CLK_000_P_SYNC_2_.C = (CLK_OSZI); - -CLK_000_P_SYNC_3_.D = (CLK_000_P_SYNC_2_.Q); - -CLK_000_P_SYNC_3_.C = (CLK_OSZI); - -CLK_000_P_SYNC_4_.D = (CLK_000_P_SYNC_3_.Q); - -CLK_000_P_SYNC_4_.C = (CLK_OSZI); - -CLK_000_P_SYNC_5_.D = (CLK_000_P_SYNC_4_.Q); - -CLK_000_P_SYNC_5_.C = (CLK_OSZI); - -CLK_000_P_SYNC_6_.D = (CLK_000_P_SYNC_5_.Q); - -CLK_000_P_SYNC_6_.C = (CLK_OSZI); - -CLK_000_P_SYNC_7_.D = (CLK_000_P_SYNC_6_.Q); - -CLK_000_P_SYNC_7_.C = (CLK_OSZI); - -CLK_000_P_SYNC_8_.D = (CLK_000_P_SYNC_7_.Q); - -CLK_000_P_SYNC_8_.C = (CLK_OSZI); - -CLK_000_N_SYNC_0_.D = (inst_CLK_000_D1.Q & !inst_CLK_000_D0.Q); - -CLK_000_N_SYNC_0_.C = (CLK_OSZI); - -CLK_000_N_SYNC_1_.D = (CLK_000_N_SYNC_0_.Q); - -CLK_000_N_SYNC_1_.C = (CLK_OSZI); - -CLK_000_N_SYNC_2_.D = (CLK_000_N_SYNC_1_.Q); - -CLK_000_N_SYNC_2_.C = (CLK_OSZI); - -CLK_000_N_SYNC_3_.D = (CLK_000_N_SYNC_2_.Q); - -CLK_000_N_SYNC_3_.C = (CLK_OSZI); - -CLK_000_N_SYNC_4_.D = (CLK_000_N_SYNC_3_.Q); - -CLK_000_N_SYNC_4_.C = (CLK_OSZI); - -CLK_000_N_SYNC_5_.D = (CLK_000_N_SYNC_4_.Q); - -CLK_000_N_SYNC_5_.C = (CLK_OSZI); - -CLK_000_N_SYNC_6_.D = (CLK_000_N_SYNC_5_.Q); - -CLK_000_N_SYNC_6_.C = (CLK_OSZI); - -CLK_000_N_SYNC_7_.D = (CLK_000_N_SYNC_6_.Q); - -CLK_000_N_SYNC_7_.C = (CLK_OSZI); - -CLK_000_N_SYNC_8_.D = (CLK_000_N_SYNC_7_.Q); - -CLK_000_N_SYNC_8_.C = (CLK_OSZI); - -CLK_000_N_SYNC_9_.D = (CLK_000_N_SYNC_8_.Q); - -CLK_000_N_SYNC_9_.C = (CLK_OSZI); - -CLK_000_N_SYNC_10_.D = (CLK_000_N_SYNC_9_.Q); - -CLK_000_N_SYNC_10_.C = (CLK_OSZI); - -CLK_OUT_PRE_Dreg.D = (inst_CLK_OUT_PRE.Q); - -CLK_OUT_PRE_Dreg.C = (CLK_OSZI); - -SM_AMIGA_1_.AR = (!RST); - -SM_AMIGA_1_.D = (inst_CLK_000_PE.Q & SM_AMIGA_2_.Q - # !inst_CLK_000_NE.Q & SM_AMIGA_1_.Q & BERR.PIN); - -SM_AMIGA_1_.C = (CLK_OSZI); - -SM_AMIGA_5_.AR = (!RST); - -SM_AMIGA_5_.D = (inst_CLK_000_PE.Q & SM_AMIGA_6_.Q - # !inst_CLK_000_NE.Q & SM_AMIGA_5_.Q & BERR.PIN); - -SM_AMIGA_5_.C = (CLK_OSZI); - -SM_AMIGA_3_.D.X1 = (inst_CLK_000_PE.Q & SM_AMIGA_4_.Q & !SM_AMIGA_3_.Q - # inst_CLK_000_PE.Q & SM_AMIGA_4_.Q & !BERR.PIN - # inst_VPA_D.Q & !inst_DTACK_D0.Q & !inst_CLK_000_PE.Q & inst_CLK_000_NE.Q & SM_AMIGA_3_.Q & BERR.PIN - # inst_VPA_D.Q & !inst_DTACK_D0.Q & inst_CLK_000_NE.Q & !SM_AMIGA_4_.Q & SM_AMIGA_3_.Q & BERR.PIN - # E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & !inst_CLK_000_PE.Q & inst_CLK_000_NE.Q & cpu_est_2_.Q & SM_AMIGA_3_.Q & BERR.PIN - # E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & inst_CLK_000_NE.Q & cpu_est_2_.Q & !SM_AMIGA_4_.Q & SM_AMIGA_3_.Q & BERR.PIN); - -SM_AMIGA_3_.D.X2 = (SM_AMIGA_3_.Q & BERR.PIN); - -SM_AMIGA_3_.AR = (!RST); - -SM_AMIGA_3_.C = (CLK_OSZI); - -SM_AMIGA_2_.AR = (!RST); - -SM_AMIGA_2_.D = (!inst_CLK_000_PE.Q & SM_AMIGA_2_.Q & BERR.PIN - # inst_VPA_D.Q & !inst_DTACK_D0.Q & inst_CLK_000_NE.Q & SM_AMIGA_3_.Q - # E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & inst_CLK_000_NE.Q & cpu_est_2_.Q & SM_AMIGA_3_.Q); - -SM_AMIGA_2_.C = (CLK_OSZI); - -un14_ciin_0 = (nEXP_SPACE & AS_030.PIN - # !A_31_ & nEXP_SPACE & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_); - -!state_machine_un15_clk_000_ne_i_n = (inst_VPA_D.Q & !inst_DTACK_D0.Q - # E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & cpu_est_2_.Q); - -CIIN_0 = (un14_ciin_0 - # !A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_ & A_23_ & A_22_ & A_21_ & A_20_ & !inst_AS_030_D0.Q); - - -Reverse-Polarity Equations: - diff --git a/Logic/68030_tk.svl b/Logic/68030_tk.svl deleted file mode 100644 index 579ba2b..0000000 --- a/Logic/68030_tk.svl +++ /dev/null @@ -1,2 +0,0 @@ -Part Number: M4A5-128/64-10VC -Need not generate svf file according to the constraints, exit diff --git a/Logic/68030_tk.tal b/Logic/68030_tk.tal deleted file mode 100644 index 4835182..0000000 --- a/Logic/68030_tk.tal +++ /dev/null @@ -1,122 +0,0 @@ - - -Design Name = 68030_tk.tt4 -~~~~~~~~~~~~~~~~~~~~~~~~~~ - - -******************* -* TIMING ANALYSIS * -******************* - -Timing Analysis KEY: -One unit of delay time is equivalent to one pass - through the Central Switch Matrix. -.. Delay ( in this column ) not applicable to the indicated signal. -TSU, Set-Up Time ( 0 for input-paired signals ), - represents the number of switch matrix passes between - an input pin and a register setup before clock. - TSU is reported on the register. -TCO, Clocked Output-to-Pin Time ( 0 for output-paired signals ), - represents the number of switch matrix passes between - a clocked register and an output pin. - TCO is reported on the register. -TPD, Propagation Delay Time ( calculated only for combinatorial eqns.), - represents the number of switch matrix passes between - an input pin and an output pin. - TPD is reported on the output pin. -TCR, Clocked Output-to-Register Time, - represents the number of switch matrix passes between - a clocked register and the register it drives ( before clock ). - TCR is reported on the driving register. - - TSU TCO TPD TCR - #passes #passes #passes #passes -SIGNAL NAME min max min max min max min max - E .. .. 0 0 .. .. 1 2 - RN_E .. .. 0 0 .. .. 1 2 - VMA .. .. 0 0 .. .. 1 2 - RN_VMA .. .. 0 0 .. .. 1 2 - cpu_est_0_ .. .. .. .. .. .. 1 2 - cpu_est_1_ .. .. .. .. .. .. 1 2 - inst_VPA_D 1 1 .. .. .. .. 1 2 - inst_DTACK_D0 1 2 .. .. .. .. 1 2 - cpu_est_2_ .. .. .. .. .. .. 1 2 -inst_LDS_000_INT 1 1 1 1 .. .. 2 2 -inst_DS_000_ENABLE 1 1 1 1 .. .. 2 2 -inst_UDS_000_INT 1 1 1 1 .. .. 2 2 - CIIN_0 .. .. .. .. 1 2 .. .. - FPU_CS .. .. .. .. 1 1 .. .. - DTACK .. .. .. .. 1 1 .. .. -AMIGA_ADDR_ENABLE 1 1 0 1 .. .. 1 1 -RN_AMIGA_ADDR_ENABLE 1 1 0 1 .. .. 1 1 -AMIGA_BUS_DATA_DIR .. .. .. .. 1 1 .. .. - CIIN .. .. .. .. 1 1 .. .. - SIZE_1_ 1 1 0 0 .. .. .. .. - IPL_030_2_ 1 1 0 0 .. .. 1 1 - RN_IPL_030_2_ 1 1 0 0 .. .. 1 1 - AS_030 1 1 0 0 .. .. 1 1 - RN_AS_030 1 1 0 0 .. .. 1 1 - AS_000 1 1 0 0 .. .. 1 1 - RN_AS_000 1 1 0 0 .. .. 1 1 - RW_000 1 1 0 0 .. .. 1 1 - RN_RW_000 1 1 0 0 .. .. 1 1 - DS_030 1 1 0 0 .. .. 1 1 - RN_DS_030 1 1 0 0 .. .. 1 1 - IPL_030_1_ 1 1 0 0 .. .. 1 1 - RN_IPL_030_1_ 1 1 0 0 .. .. 1 1 - IPL_030_0_ 1 1 0 0 .. .. 1 1 - RN_IPL_030_0_ 1 1 0 0 .. .. 1 1 - A0 1 1 0 0 .. .. .. .. - BG_000 1 1 0 0 .. .. 1 1 - RN_BG_000 1 1 0 0 .. .. 1 1 - BGACK_030 1 1 0 1 .. .. 1 1 - RN_BGACK_030 1 1 0 1 .. .. 1 1 - DSACK1 1 1 0 0 .. .. 1 1 - RN_DSACK1 1 1 0 0 .. .. 1 1 - RW 1 1 0 0 .. .. 1 1 - RN_RW 1 1 0 0 .. .. 1 1 - SIZE_0_ 1 1 0 0 .. .. .. .. - inst_AS_030_D0 1 1 1 1 .. .. 1 1 - inst_DS_030_D0 1 1 .. .. .. .. 1 1 -inst_AS_030_000_SYNC 1 1 .. .. .. .. 1 1 -inst_BGACK_030_INT_D .. .. .. .. .. .. 1 1 -inst_CLK_OUT_PRE_50 .. .. .. .. .. .. 1 1 - inst_CLK_000_D1 .. .. .. .. .. .. 1 1 - inst_CLK_000_D0 1 1 .. .. .. .. 1 1 - SM_AMIGA_7_ 1 1 .. .. .. .. 1 1 -inst_CLK_OUT_PRE .. .. .. .. .. .. 1 1 - inst_CLK_000_PE .. .. .. .. .. .. 1 1 -CLK_000_P_SYNC_9_ .. .. .. .. .. .. 1 1 - inst_CLK_000_NE .. .. .. .. .. .. 1 1 -CLK_000_N_SYNC_11_ .. .. .. .. .. .. 1 1 -inst_CLK_000_NE_D0 .. .. .. .. .. .. 1 1 - SM_AMIGA_6_ 1 1 .. .. .. .. 1 1 - SM_AMIGA_4_ 1 1 .. .. .. .. 1 1 - SM_AMIGA_0_ 1 1 .. .. .. .. 1 1 - inst_CLK_030_H 1 1 .. .. .. .. 1 1 -CLK_000_P_SYNC_0_ .. .. .. .. .. .. 1 1 -CLK_000_P_SYNC_1_ .. .. .. .. .. .. 1 1 -CLK_000_P_SYNC_2_ .. .. .. .. .. .. 1 1 -CLK_000_P_SYNC_3_ .. .. .. .. .. .. 1 1 -CLK_000_P_SYNC_4_ .. .. .. .. .. .. 1 1 -CLK_000_P_SYNC_5_ .. .. .. .. .. .. 1 1 -CLK_000_P_SYNC_6_ .. .. .. .. .. .. 1 1 -CLK_000_P_SYNC_7_ .. .. .. .. .. .. 1 1 -CLK_000_P_SYNC_8_ .. .. .. .. .. .. 1 1 -CLK_000_N_SYNC_0_ .. .. .. .. .. .. 1 1 -CLK_000_N_SYNC_1_ .. .. .. .. .. .. 1 1 -CLK_000_N_SYNC_2_ .. .. .. .. .. .. 1 1 -CLK_000_N_SYNC_3_ .. .. .. .. .. .. 1 1 -CLK_000_N_SYNC_4_ .. .. .. .. .. .. 1 1 -CLK_000_N_SYNC_5_ .. .. .. .. .. .. 1 1 -CLK_000_N_SYNC_6_ .. .. .. .. .. .. 1 1 -CLK_000_N_SYNC_7_ .. .. .. .. .. .. 1 1 -CLK_000_N_SYNC_8_ .. .. .. .. .. .. 1 1 -CLK_000_N_SYNC_9_ .. .. .. .. .. .. 1 1 -CLK_000_N_SYNC_10_ .. .. .. .. .. .. 1 1 -CLK_OUT_PRE_Dreg .. .. 1 1 .. .. 1 1 - SM_AMIGA_1_ 1 1 .. .. .. .. 1 1 - SM_AMIGA_5_ 1 1 .. .. .. .. 1 1 - SM_AMIGA_3_ 1 1 .. .. .. .. 1 1 - SM_AMIGA_2_ 1 1 .. .. .. .. 1 1 - un14_ciin_0 .. .. .. .. 1 1 .. .. \ No newline at end of file diff --git a/Logic/68030_tk.vco b/Logic/68030_tk.vco deleted file mode 100644 index 9792f54..0000000 --- a/Logic/68030_tk.vco +++ /dev/null @@ -1,251 +0,0 @@ -[DEVICE] - -Family = M4A5; -PartType = M4A5-128/64; -Package = 100TQFP; -PartNumber = M4A5-128/64-10VC; -Speed = -10; -Operating_condition = COM; -EN_Segment = NO; -Pin_MC_1to1 = NO; -Voltage = 5.0; - -[REVISION] - -RCS = "$Revision: 1.2 $"; -Parent = m4a5.lci; -SDS_file = m4a5.sds; -Design = 68030_tk.tt4; -Rev = 0.01; -DATE = 8/26/14; -TIME = 20:07:19; -Type = TT2; -Pre_Fit_Time = 1; -Source_Format = Pure_VHDL; - -[IGNORE ASSIGNMENTS] - -Pin_Assignments = NO; -Pin_Keep_Block = NO; -Pin_Keep_Segment = NO; -Group_Assignments = NO; -Macrocell_Assignments = NO; -Macrocell_Keep_Block = NO; -Macrocell_Keep_Segment = NO; -Pin_Reservation = NO; -Timing_Constraints = NO; -Block_Reservation = NO; -Segment_Reservation = NO; -Ignore_Source_Location = NO; -Ignore_Source_Optimization = NO; -Ignore_Source_Timing = NO; - -[CLEAR ASSIGNMENTS] - -Pin_Assignments = NO; -Pin_Keep_Block = NO; -Pin_Keep_Segment = NO; -Group_Assignments = NO; -Macrocell_Assignments = NO; -Macrocell_Keep_Block = NO; -Macrocell_Keep_Segment = NO; -Pin_Reservation = NO; -Timing_Constraints = NO; -Block_Reservation = NO; -Segment_Reservation = NO; -Ignore_Source_Location = NO; -Ignore_Source_Optimization = NO; -Ignore_Source_Timing = NO; - -[BACKANNOTATE NETLIST] - -Netlist = VHDL; -Delay_File = SDF; -Generic_VCC = ; -Generic_GND = ; - -[BACKANNOTATE ASSIGNMENTS] - -Pin_Assignment = NO; -Pin_Block = NO; -Pin_Macrocell_Block = NO; -Routing = NO; - -[GLOBAL PROJECT OPTIMIZATION] - -Balanced_Partitioning = YES; -Spread_Placement = YES; -Max_Pin_Percent = 100; -Max_Macrocell_Percent = 100; -Max_Inter_Seg_Percent = 100; -Max_Seg_In_Percent = 100; -Max_Blk_In_Percent = 100; - -[FITTER REPORT FORMAT] - -Fitter_Options = YES; -Pinout_Diagram = NO; -Pinout_Listing = YES; -Detailed_Block_Segment_Summary = YES; -Input_Signal_List = YES; -Output_Signal_List = YES; -Bidir_Signal_List = YES; -Node_Signal_List = YES; -Signal_Fanout_List = YES; -Block_Segment_Fanin_List = YES; -Prefit_Eqn = YES; -Postfit_Eqn = YES; -Page_Break = YES; - -[OPTIMIZATION OPTIONS] - -Logic_Reduction = YES; -Max_PTerm_Split = 16; -Max_PTerm_Collapse = 16; -XOR_Synthesis = YES; -Node_Collapse = Yes; -DT_Synthesis = Yes; - -[FITTER GLOBAL OPTIONS] - -Run_Time = 0; -Set_Reset_Dont_Care = YES; -In_Reg_Optimize = YES; -Clock_Optimize = NO; -Conf_Unused_IOs = OUT_LOW; - -[POWER] -Powerlevel = Low, High; -Default = High; -Low = 8, H, G, F, E, D, C, B, A; -Type = GLB; - -[HARDWARE DEVICE OPTIONS] -Zero_Hold_Time = Yes; -Signature_Word = 0; -Pull_up = Yes; -Out_Slew_Rate = SLOW, FAST, 0; -Device_max_fanin = 33; -Device_max_pterms = 20; -Usercode_Format = Hex; - -[PIN RESERVATIONS] -layer = OFF; - -[LOCATION ASSIGNMENT] - -Layer = OFF; -A_29_ = INPUT,6, B,-; -A_28_ = INPUT,15, C,-; -A_27_ = INPUT,16, C,-; -A_26_ = INPUT,17, C,-; -A_31_ = INPUT,4, B,-; -A_25_ = INPUT,18, C,-; -A_24_ = INPUT,19, C,-; -A_23_ = INPUT,85, H,-; -A_22_ = INPUT,84, H,-; -IPL_2_ = INPUT,68, G,-; -A_21_ = INPUT,94, A,-; -A_20_ = INPUT,93, A,-; -FC_1_ = INPUT,58, F,-; -A_19_ = INPUT,97, A,-; -A_18_ = INPUT,95, A,-; -A_17_ = INPUT,59, F,-; -A_16_ = INPUT,96, A,-; -UDS_000 = BIDIR,32, D,-; -LDS_000 = BIDIR,31, D,-; -IPL_1_ = INPUT,56, F,-; -IPL_0_ = INPUT,67, G,-; -nEXP_SPACE = INPUT,14,-,-; -FC_0_ = INPUT,57, F,-; -BERR = BIDIR,41, E,-; -BG_030 = INPUT,21, C,-; -BGACK_000 = INPUT,28, D,-; -CLK_030 = INPUT,64,-,-; -CLK_000 = INPUT,11,-,-; -CLK_OSZI = INPUT,61,-,-; -CLK_DIV_OUT = OUTPUT,65, G,-; -CLK_EXP = OUTPUT,10, B,-; -FPU_CS = OUTPUT,78, H,-; -FPU_SENSE = INPUT,91, A,-; -DTACK = BIDIR,30, D,-; -AVEC = OUTPUT,92, A,-; -VPA = INPUT,36,-,-; -RST = INPUT,86,-,-; -AMIGA_ADDR_ENABLE = OUTPUT,33, D,-; -AMIGA_BUS_DATA_DIR = OUTPUT,48, E,-; -AMIGA_BUS_ENABLE_LOW = OUTPUT,20, C,-; -AMIGA_BUS_ENABLE_HIGH = OUTPUT,34, D,-; -CIIN = OUTPUT,47, E,-; -A_30_ = INPUT,5, B,-; -SIZE_1_ = BIDIR,79, H,-; -IPL_030_2_ = OUTPUT,9, B,-; -AS_030 = BIDIR,82, H,-; -AS_000 = BIDIR,42, E,-; -RW_000 = BIDIR,80, H,-; -DS_030 = BIDIR,98, A,-; -IPL_030_1_ = OUTPUT,7, B,-; -IPL_030_0_ = OUTPUT,8, B,-; -A0 = BIDIR,69, G,-; -BG_000 = OUTPUT,29, D,-; -BGACK_030 = OUTPUT,83, H,-; -DSACK1 = BIDIR,81, H,-; -E = OUTPUT,66, G,-; -VMA = OUTPUT,35, D,-; -RESET = OUTPUT,3, B,-; -RW = BIDIR,71, G,-; -SIZE_0_ = BIDIR,70, G,-; -cpu_est_0_ = NODE,2, D,-; -cpu_est_1_ = NODE,9, D,-; -inst_AS_030_D0 = NODE,8, E,-; -inst_DS_030_D0 = NODE,14, C,-; -inst_AS_030_000_SYNC = NODE,8, F,-; -inst_BGACK_030_INT_D = NODE,9, E,-; -inst_VPA_D = NODE,5, C,-; -inst_DTACK_D0 = NODE,3, G,-; -inst_CLK_OUT_PRE_50 = NODE,13, G,-; -inst_CLK_000_D1 = NODE,6, D,-; -inst_CLK_000_D0 = NODE,9, F,-; -SM_AMIGA_7_ = NODE,4, F,-; -inst_CLK_OUT_PRE = NODE,3, B,-; -inst_CLK_000_PE = NODE,5, G,-; -CLK_000_P_SYNC_9_ = NODE,6, F,-; -inst_CLK_000_NE = NODE,5, B,-; -CLK_000_N_SYNC_11_ = NODE,14, D,-; -cpu_est_2_ = NODE,4, C,-; -inst_CLK_000_NE_D0 = NODE,13, B,-; -SM_AMIGA_6_ = NODE,0, F,-; -SM_AMIGA_4_ = NODE,5, F,-; -SM_AMIGA_0_ = NODE,1, F,-; -inst_CLK_030_H = NODE,9, G,-; -inst_LDS_000_INT = NODE,12, A,-; -inst_DS_000_ENABLE = NODE,1, C,-; -inst_UDS_000_INT = NODE,8, A,-; -CLK_000_P_SYNC_0_ = NODE,10, D,-; -CLK_000_P_SYNC_1_ = NODE,10, C,-; -CLK_000_P_SYNC_2_ = NODE,6, H,-; -CLK_000_P_SYNC_3_ = NODE,6, C,-; -CLK_000_P_SYNC_4_ = NODE,9, A,-; -CLK_000_P_SYNC_5_ = NODE,14, B,-; -CLK_000_P_SYNC_6_ = NODE,14, G,-; -CLK_000_P_SYNC_7_ = NODE,10, B,-; -CLK_000_P_SYNC_8_ = NODE,5, A,-; -CLK_000_N_SYNC_0_ = NODE,2, F,-; -CLK_000_N_SYNC_1_ = NODE,2, C,-; -CLK_000_N_SYNC_2_ = NODE,1, A,-; -CLK_000_N_SYNC_3_ = NODE,13, C,-; -CLK_000_N_SYNC_4_ = NODE,6, B,-; -CLK_000_N_SYNC_5_ = NODE,2, H,-; -CLK_000_N_SYNC_6_ = NODE,10, G,-; -CLK_000_N_SYNC_7_ = NODE,6, G,-; -CLK_000_N_SYNC_8_ = NODE,2, G,-; -CLK_000_N_SYNC_9_ = NODE,13, H,-; -CLK_000_N_SYNC_10_ = NODE,9, H,-; -CLK_OUT_PRE_Dreg = NODE,9, B,-; -SM_AMIGA_1_ = NODE,12, F,-; -SM_AMIGA_5_ = NODE,13, F,-; -SM_AMIGA_3_ = NODE,8, C,-; -SM_AMIGA_2_ = NODE,12, C,-; -un14_ciin_0 = NODE,5, E,-; -state_machine_un15_clk_000_ne_i_n = NODE,9, C,-; -CIIN_0 = NODE,2, B,-; diff --git a/Logic/68030_tk.vct b/Logic/68030_tk.vct deleted file mode 100644 index 733b35a..0000000 --- a/Logic/68030_tk.vct +++ /dev/null @@ -1,218 +0,0 @@ -[DEVICE] -Family = M4A5; -PartType = M4A5-128/64; -Package = 100TQFP; -PartNumber = M4A5-128/64-10VC; -Speed = -10; -Operating_condition = COM; -EN_Segment = No; -Pin_MC_1to1 = No; -EN_PinReserve_IO = Yes; -EN_PinReserve_BIDIR = Yes; -Voltage = 5.0; - -[REVISION] -RCS = "$Revision: 1.2 $"; -Parent = m4a5.lci; -SDS_File = m4a5.sds; -DATE = 08/13/2014; -TIME = 16:43:14; -Source_Format = Pure_VHDL; -Type = TT2; -Pre_Fit_Time = 1; - -[IGNORE ASSIGNMENTS] -Pin_Assignments = No; -Pin_Keep_Block = No; -Pin_Keep_Segment = No; -Group_Assignments = No; -Macrocell_Assignments = No; -Macrocell_Keep_Block = No; -Macrocell_Keep_Segment = No; -Pin_Reservation = No; -Block_Reservation = No; -Segment_Reservation = No; -Timing_Constraints = No; - -[CLEAR ASSIGNMENTS] -Pin_Assignments = No; -Pin_Keep_Block = No; -Pin_Keep_Segment = No; -Group_Assignments = No; -Macrocell_Assignments = No; -Macrocell_Keep_Block = No; -Macrocell_Keep_Segment = No; -Pin_Reservation = No; -Block_Reservation = No; -Segment_Reservation = No; -Timing_Constraints = No; - -[BACKANNOTATE ASSIGNMENTS] -Pin_Block = No; -Pin_Macrocell_Block = No; -Routing = No; - -[GLOBAL PROJECT OPTIMIZATION] -Balanced_Partitioning = Yes; -Spread_Placement = Yes; -Max_Pin_Percent = 100; -Max_Macrocell_Percent = 100; -Max_Blk_In_Percent = 100; - -[OPTIMIZATION OPTIONS] -Logic_Reduction = Yes; -Max_PTerm_Split = 16; -Max_PTerm_Collapse = 16; -XOR_Synthesis = Yes; -EN_XOR_Synthesis = Yes; -XOR_Gate = Yes; -Node_Collapse = Yes; -Keep_XOR = Yes; -DT_Synthesis = Yes; -Clock_PTerm = Min; -Reset_PTerm = On; -Preset_PTerm = On; -Clock_Enable_PTerm = On; -Output_Enable_PTerm = On; -EN_DT_Synthesis = Yes; -Cluster_PTerm = 5; -FF_inv = No; -EN_Use_CE = No; -Use_CE = No; -Use_Internal_COM_FB = Yes; -EN_use_Internal_COM_FB = Yes; -Set_Reset_Swap = No; -EN_Set_Reset_Swap = No; -Density = No; -DeMorgan = Yes; -T_FF = Yes; -Max_Symbols = 32; - -[FITTER GLOBAL OPTIONS] -Run_Time = 0; -Set_Reset_Dont_Care = Yes; -EN_Set_Reset_Dont_Care = Yes; -In_Reg_Optimize = Yes; -EN_In_Reg_Optimize = No; -Clock_Optimize = No; -Global_Clock_As_Pterm = No; -Show_Iterations = No; -Routing_Attempts = 2; -Conf_Unused_IOs = Out_Low; - -[HARDWARE DEVICE OPTIONS] -Zero_Hold_Time = Yes; -Signature_Word = 0; -Pull_up = Yes; -Out_Slew_Rate = SLOW,FAST,0; -Device_max_fanin = 33; -Device_max_pterms = 20; -Usercode_Format = Hex; - -[PIN RESERVATIONS] -Layer = OFF; - -[LOCATION ASSIGNMENT] -Layer = OFF; -AS_030 = input,82,H,-; -A_16_ = input,96,A,-; -A_17_ = input,59,F,-; -A_18_ = input,95,A,-; -A_19_ = input,97,A,-; -BGACK_000 = input,28,D,-; -BG_030 = input,21,C,-; -CLK_000 = input,11,-,-; -CLK_030 = input,64,-,-; -CLK_OSZI = input,61,-,-; -FC_0_ = input,57,F,-; -FC_1_ = input,58,F,-; -IPL_0_ = input,67,G,-; -IPL_1_ = input,56,F,-; -IPL_2_ = input,68,G,-; -RST = input,86,-,-; -RW = input,71,G,-; -SIZE_1_ = input,79,H,-; -SIZE_0_ = input,70,G,-; -VPA = input,36,-,-; -AVEC = input,92,A,-; -BGACK_030 = input,83,H,-; -BG_000 = input,29,D,-; -CLK_DIV_OUT = input,65,G,-; -CLK_EXP = input,10,B,-; -E = input,66,G,-; -FPU_CS = input,78,H,-; -IPL_030_0_ = input,8,B,-; -IPL_030_1_ = input,7,B,-; -IPL_030_2_ = input,9,B,-; -LDS_000 = input,31,D,-; -UDS_000 = input,32,D,-; -VMA = input,35,D,-; -DTACK = input,30,D,-; -RESET = input,3,B,-; -AMIGA_BUS_DATA_DIR = input,48,E,-; -AMIGA_BUS_ENABLE_LOW = input,20,C,-; -CIIN = input,47,E,-; -A_20_ = input,93,A,-; -A_21_ = input,94,A,-; -A_22_ = input,84,H,-; -A_24_ = input,19,C,-; -A_25_ = input,18,C,-; -A_26_ = input,17,C,-; -A_27_ = input,16,C,-; -A_28_ = input,15,C,-; -A_29_ = input,6,B,-; -A_30_ = input,5,B,-; -A_31_ = input,4,B,-; -DS_030 = input,98,A,-; -BERR = input,41,E,-; -nEXP_SPACE = input,14,-,-; -A0 = input,69,G,-; -DSACK1 = input,81,H,-; -RW_000 = input,80,H,-; -AS_000 = input,42,E,-; -AMIGA_ADDR_ENABLE = input,33,D,-; -AMIGA_BUS_ENABLE_HIGH = input,34,D,-; -A_23_ = input,85,H,-; -FPU_SENSE = input,91,A,-; - -[GROUP ASSIGNMENT] -Layer = OFF; - -[SPACE RESERVATIONS] -Layer = OFF; - -[BACKANNOTATE NETLIST] -Delay_File = SDF; -Netlist = VHDL; -VCC_GND = Cell; - -[FITTER REPORT FORMAT] -Fitter_Options = Yes; -Pinout_Diagram = No; -Pinout_Listing = Yes; -Detailed_Block_Segment_Summary = Yes; -Input_Signal_List = Yes; -Output_Signal_List = Yes; -Bidir_Signal_List = Yes; -Node_Signal_List = Yes; -Signal_Fanout_List = Yes; -Block_Segment_Fanin_List = Yes; -Postfit_Eqn = Yes; -Page_Break = Yes; - -[POWER] -Powerlevel = Low,High; -Default = High; -Low = 8,H,G,F,E,D,C,B,A; -Type = GLB; - -[SOURCE CONSTRAINT OPTION] -Import_source_constraint = Yes; -Disable_warning_message = No; - -[TIMING ANALYZER] -Last_source=; -Last_source_type=Fmax; - -[INPUT REGISTERS] - diff --git a/Logic/68030_tk.xrf b/Logic/68030_tk.xrf deleted file mode 100644 index 0e1773e..0000000 --- a/Logic/68030_tk.xrf +++ /dev/null @@ -1,16 +0,0 @@ -Signal Name Cross Reference File - -ispLEVER Classic 1.7.00.05.28.13 - -Design '68030_tk' created Tue Aug 26 20:07:15 2014 - - - LEGEND: '>' Functional Block Port Separator - '/' Hierarchy Path Separator - '@' Automatically Generated Node - - -Short Name Hierarchical Name ----------- ----------------- - - *** Shortened names not required for this design. *** diff --git a/Logic/BUS68030.edi b/Logic/BUS68030.edi deleted file mode 100644 index a933437..0000000 --- a/Logic/BUS68030.edi +++ /dev/null @@ -1,3386 +0,0 @@ -(edif BUS68030 - (edifVersion 2 0 0) - (edifLevel 0) - (keywordMap (keywordLevel 0)) - (status - (written - (timeStamp 2014 8 26 20 7 10) - (author "Synopsys, Inc.") - (program "Synplify Pro" (version "G-2012.09LC-SP1 , mapper maplat, Build 621R")) - ) - ) - (external mach - (edifLevel 0) - (technology (numberDefinition )) - (cell AND2 (cellType GENERIC) - (view prim (viewType NETLIST) - (interface - (port O (direction OUTPUT)) - (port I0 (direction INPUT)) - (port I1 (direction INPUT)) - ) - ) - ) - (cell BI_DIR (cellType GENERIC) - (view prim (viewType NETLIST) - (interface - (port O (direction OUTPUT)) - (port I0 (direction INPUT)) - (port IO (direction INOUT)) - (port OE (direction INPUT)) - ) - ) - ) - (cell BUFTH (cellType GENERIC) - (view prim (viewType NETLIST) - (interface - (port O (direction OUTPUT)) - (port I0 (direction INPUT)) - (port OE (direction INPUT)) - ) - ) - ) - (cell DFF (cellType GENERIC) - (view prim (viewType NETLIST) - (interface - (port Q (direction OUTPUT)) - (port D (direction INPUT)) - (port CLK (direction INPUT)) - ) - ) - ) - (cell DFFRH (cellType GENERIC) - (view prim (viewType NETLIST) - (interface - (port Q (direction OUTPUT)) - (port D (direction INPUT)) - (port CLK (direction INPUT)) - (port R (direction INPUT)) - ) - ) - ) - (cell DFFSH (cellType GENERIC) - (view prim (viewType NETLIST) - (interface - (port Q (direction OUTPUT)) - (port D (direction INPUT)) - (port CLK (direction INPUT)) - (port S (direction INPUT)) - ) - ) - ) - (cell IBUF (cellType GENERIC) - (view prim (viewType NETLIST) - (interface - (port O (direction OUTPUT)) - (port I0 (direction INPUT)) - ) - ) - ) - (cell INV (cellType GENERIC) - (view prim (viewType NETLIST) - (interface - (port O (direction OUTPUT)) - (port I0 (direction INPUT)) - ) - ) - ) - (cell OBUF (cellType GENERIC) - (view prim (viewType NETLIST) - (interface - (port O (direction OUTPUT)) - (port I0 (direction INPUT)) - ) - ) - ) - (cell OR2 (cellType GENERIC) - (view prim (viewType NETLIST) - (interface - (port O (direction OUTPUT)) - (port I0 (direction INPUT)) - (port I1 (direction INPUT)) - ) - ) - ) - (cell XOR2 (cellType GENERIC) - (view prim (viewType NETLIST) - (interface - (port O (direction OUTPUT)) - (port I0 (direction INPUT)) - (port I1 (direction INPUT)) - ) - ) - ) - ) - (library work - (edifLevel 0) - (technology (numberDefinition )) - (cell BUS68030 (cellType GENERIC) - (view behavioral (viewType NETLIST) - (interface - (port (array (rename size "SIZE(1:0)") 2) (direction INOUT)) - (port (array (rename a "A(31:16)") 16) (direction INPUT)) - (port (array (rename ipl_030 "IPL_030(2:0)") 3) (direction OUTPUT)) - (port (array (rename ipl "IPL(2:0)") 3) (direction INPUT)) - (port (array (rename fc "FC(1:0)") 2) (direction INPUT)) - (port AS_030 (direction INOUT)) - (port AS_000 (direction INOUT)) - (port RW_000 (direction INOUT)) - (port DS_030 (direction INOUT)) - (port UDS_000 (direction INOUT)) - (port LDS_000 (direction INOUT)) - (port A0 (direction INOUT)) - (port nEXP_SPACE (direction INPUT)) - (port BERR (direction INOUT)) - (port BG_030 (direction INPUT)) - (port BG_000 (direction OUTPUT)) - (port BGACK_030 (direction OUTPUT)) - (port BGACK_000 (direction INPUT)) - (port CLK_030 (direction INPUT)) - (port CLK_000 (direction INPUT)) - (port CLK_OSZI (direction INPUT)) - (port CLK_DIV_OUT (direction OUTPUT)) - (port CLK_EXP (direction OUTPUT)) - (port FPU_CS (direction OUTPUT)) - (port FPU_SENSE (direction INPUT)) - (port DSACK1 (direction INOUT)) - (port DTACK (direction INOUT)) - (port AVEC (direction OUTPUT)) - (port E (direction OUTPUT)) - (port VPA (direction INPUT)) - (port VMA (direction OUTPUT)) - (port RST (direction INPUT)) - (port RESET (direction OUTPUT)) - (port RW (direction INOUT)) - (port AMIGA_ADDR_ENABLE (direction OUTPUT)) - (port AMIGA_BUS_DATA_DIR (direction OUTPUT)) - (port AMIGA_BUS_ENABLE_LOW (direction OUTPUT)) - (port AMIGA_BUS_ENABLE_HIGH (direction OUTPUT)) - (port CIIN (direction OUTPUT)) - ) - (contents - (instance (rename SM_AMIGA_7 "SM_AMIGA[7]") (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance (rename SM_AMIGA_6 "SM_AMIGA[6]") (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance (rename SM_AMIGA_5 "SM_AMIGA[5]") (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance (rename SM_AMIGA_4 "SM_AMIGA[4]") (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance (rename SM_AMIGA_3 "SM_AMIGA[3]") (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance (rename SM_AMIGA_2 "SM_AMIGA[2]") (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance (rename SM_AMIGA_1 "SM_AMIGA[1]") (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance (rename SM_AMIGA_0 "SM_AMIGA[0]") (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance (rename SIZE_DMA_1 "SIZE_DMA[1]") (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance (rename cpu_est_0 "cpu_est[0]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename cpu_est_1 "cpu_est[1]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename cpu_est_2 "cpu_est[2]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename cpu_est_3 "cpu_est[3]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename IPL_030DFFSH_0 "IPL_030DFFSH[0]") (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance (rename IPL_030DFFSH_1 "IPL_030DFFSH[1]") (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance (rename IPL_030DFFSH_2 "IPL_030DFFSH[2]") (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance (rename CLK_000_P_SYNC_8 "CLK_000_P_SYNC[8]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_P_SYNC_9 "CLK_000_P_SYNC[9]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_N_SYNC_0 "CLK_000_N_SYNC[0]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_N_SYNC_1 "CLK_000_N_SYNC[1]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_N_SYNC_2 "CLK_000_N_SYNC[2]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_N_SYNC_3 "CLK_000_N_SYNC[3]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_N_SYNC_4 "CLK_000_N_SYNC[4]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_N_SYNC_5 "CLK_000_N_SYNC[5]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_N_SYNC_6 "CLK_000_N_SYNC[6]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_N_SYNC_7 "CLK_000_N_SYNC[7]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_N_SYNC_8 "CLK_000_N_SYNC[8]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_N_SYNC_9 "CLK_000_N_SYNC[9]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_N_SYNC_10 "CLK_000_N_SYNC[10]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_N_SYNC_11 "CLK_000_N_SYNC[11]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename SIZE_DMA_0 "SIZE_DMA[0]") (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance (rename CLK_000_P_SYNC_0 "CLK_000_P_SYNC[0]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_P_SYNC_1 "CLK_000_P_SYNC[1]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_P_SYNC_2 "CLK_000_P_SYNC[2]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_P_SYNC_3 "CLK_000_P_SYNC[3]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_P_SYNC_4 "CLK_000_P_SYNC[4]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_P_SYNC_5 "CLK_000_P_SYNC[5]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_P_SYNC_6 "CLK_000_P_SYNC[6]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename CLK_000_P_SYNC_7 "CLK_000_P_SYNC[7]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance LDS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance RW_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance VMA_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance UDS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance BG_000DFFSH (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance BGACK_030_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance DS_000_ENABLE (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance DSACK1_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance AS_030_000_SYNC (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance RW_000_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance DS_000_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance AS_000_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance CLK_030_H (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance AMIGA_BUS_ENABLE_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance A0_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance AS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance DTACK_D0 (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance DS_030_D0 (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance AS_030_D0 (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance CLK_000_D1 (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance CLK_000_NE_D0 (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance RESETDFFRH (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) - (instance CLK_OUT_PRE (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance CLK_OUT_PRE_D (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance CLK_000_D0 (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance CLK_000_PE (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance CLK_000_NE (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance BGACK_030_INT_D (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance CLK_OUT_PRE_50 (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance VPA_D (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance AS_030 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) - (instance AS_000 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) - (instance RW_000 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) - (instance DS_030 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) - (instance UDS_000 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) - (instance LDS_000 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) - (instance (rename SIZE_0 "SIZE[0]") (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) - (instance (rename SIZE_1 "SIZE[1]") (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) - (instance (rename A_16 "A[16]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename A_17 "A[17]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename A_18 "A[18]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename A_19 "A[19]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename A_20 "A[20]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename A_21 "A[21]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename A_22 "A[22]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename A_23 "A[23]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename A_24 "A[24]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename A_25 "A[25]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename A_26 "A[26]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename A_27 "A[27]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename A_28 "A[28]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename A_29 "A[29]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename A_30 "A[30]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename A_31 "A[31]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance A0 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) - (instance nEXP_SPACE (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance BERR (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) - (instance BG_030 (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance BG_000 (viewRef prim (cellRef OBUF (libraryRef mach))) ) - (instance BGACK_030 (viewRef prim (cellRef OBUF (libraryRef mach))) ) - (instance BGACK_000 (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance CLK_030 (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance CLK_000 (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance CLK_OSZI (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance CLK_DIV_OUT (viewRef prim (cellRef OBUF (libraryRef mach))) ) - (instance CLK_EXP (viewRef prim (cellRef OBUF (libraryRef mach))) ) - (instance FPU_CS (viewRef prim (cellRef OBUF (libraryRef mach))) ) - (instance FPU_SENSE (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename IPL_030_0 "IPL_030[0]") (viewRef prim (cellRef OBUF (libraryRef mach))) ) - (instance (rename IPL_030_1 "IPL_030[1]") (viewRef prim (cellRef OBUF (libraryRef mach))) ) - (instance (rename IPL_030_2 "IPL_030[2]") (viewRef prim (cellRef OBUF (libraryRef mach))) ) - (instance (rename IPL_0 "IPL[0]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename IPL_1 "IPL[1]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename IPL_2 "IPL[2]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance DSACK1 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) - (instance DTACK (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) - (instance AVEC (viewRef prim (cellRef OBUF (libraryRef mach))) ) - (instance E (viewRef prim (cellRef OBUF (libraryRef mach))) ) - (instance VPA (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance VMA (viewRef prim (cellRef OBUF (libraryRef mach))) ) - (instance RST (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance RESET (viewRef prim (cellRef OBUF (libraryRef mach))) ) - (instance RW (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) - (instance (rename FC_0 "FC[0]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance (rename FC_1 "FC[1]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance AMIGA_ADDR_ENABLE (viewRef prim (cellRef OBUF (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR (viewRef prim (cellRef OBUF (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_LOW (viewRef prim (cellRef OBUF (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_HIGH (viewRef prim (cellRef OBUF (libraryRef mach))) ) - (instance CIIN (viewRef prim (cellRef BUFTH (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_i_0_a2_1_2 "pos_clk.cpu_est_11_i_0_a2_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_i_0_a2_2 "pos_clk.cpu_est_11_i_0_a2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un33_as_030_d0_1 "state_machine.un33_as_030_d0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un33_as_030_d0_2 "state_machine.un33_as_030_d0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un33_as_030_d0 "state_machine.un33_as_030_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un19_fpu_cs_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un19_fpu_cs_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un19_fpu_cs_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un19_fpu_cs_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un19_fpu_cs_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un19_fpu_cs (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_INT_1_sqmuxa_1_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_INT_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_1_3 "pos_clk.cpu_est_11_0_0_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_3 "pos_clk.cpu_est_11_0_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_i_0_a2_0_1_2 "pos_clk.cpu_est_11_i_0_a2_0_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_i_0_a2_0_2 "pos_clk.cpu_est_11_i_0_a2_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_1_1 "pos_clk.cpu_est_11_0_0_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_2_1 "pos_clk.cpu_est_11_0_0_2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_1 "pos_clk.cpu_est_11_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un10_clk_000_pe_0_a2_0_1 "state_machine.un10_clk_000_pe_0_a2_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un10_clk_000_pe_0_a2_0_2 "state_machine.un10_clk_000_pe_0_a2_0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un10_clk_000_pe_0_a2_0 "state_machine.un10_clk_000_pe_0_a2_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un10_clk_000_pe_0_a2_1 "state_machine.un10_clk_000_pe_0_a2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un10_clk_000_pe_0_a2_2 "state_machine.un10_clk_000_pe_0_a2_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un10_clk_000_pe_0_a2 "state_machine.un10_clk_000_pe_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un10_clk_000_d0_1 "state_machine.un10_clk_000_d0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un10_clk_000_d0 "state_machine.un10_clk_000_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un26_as_030_d0_1 "state_machine.un26_as_030_d0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un26_as_030_d0_2 "state_machine.un26_as_030_d0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un26_as_030_d0_3_0 "state_machine.un26_as_030_d0_3_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un26_as_030_d0 "state_machine.un26_as_030_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un12_ciin_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un12_ciin_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un12_ciin_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un12_ciin_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un12_ciin_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un12_ciin_6 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un12_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_ENABLE_0_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_ENABLE_0_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un19_clk_000_ne_1 "state_machine.un19_clk_000_ne_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un19_clk_000_ne_2 "state_machine.un19_clk_000_ne_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un19_clk_000_ne_3 "state_machine.un19_clk_000_ne_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un19_clk_000_ne "state_machine.un19_clk_000_ne") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un6_bg_030_1 "state_machine.un6_bg_030_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un6_bg_030 "state_machine.un6_bg_030") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_3_2_0 "SM_AMIGA_ns_a3_3_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_3_3_0 "SM_AMIGA_ns_a3_3_3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_3_0 "SM_AMIGA_ns_a3_3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_ciin_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_ciin_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_ciin_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_ciin_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_ciin_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_ciin_6 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_ciin_7 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_ciin_8 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_ciin_9 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_ciin_10 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_ciin_11 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un11_ds_030_d0_1 "state_machine.un11_ds_030_d0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un11_ds_030_d0 "state_machine.un11_ds_030_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_o3_2_1_0 "SM_AMIGA_ns_o3_2_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_o3_2_0 "SM_AMIGA_ns_o3_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_0_a3_0_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_1_4 "SM_AMIGA_ns_a3_1[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_4 "SM_AMIGA_ns_a3[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_1_0_0 "SM_AMIGA_ns_a3_1_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_0 "SM_AMIGA_ns_a3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_0_1_0 "SM_AMIGA_ns_a3_0_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_0_0 "SM_AMIGA_ns_a3_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_1_1_0 "SM_AMIGA_ns_a3_1_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_1_0 "SM_AMIGA_ns_a3_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_3_1_0 "SM_AMIGA_ns_a3_3_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_161_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_164_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un10_clk_000_pe_0_i "state_machine.un10_clk_000_pe_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance LDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_LDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance UDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_UDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance A0_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SIZE_c_i_1 "SIZE_c_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_1_0 "SM_AMIGA_ns_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_2_0 "SM_AMIGA_ns_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_3_0 "SM_AMIGA_ns_3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_0 "SM_AMIGA_ns[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un3_dtack_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un3_dtack (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un13_clk_000_ne_i "state_machine.un13_clk_000_ne_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un19_clk_000_ne_i "state_machine.un19_clk_000_ne_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un15_clk_000_ne_i_0 "state_machine.un15_clk_000_ne_i_0") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance BG_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un6_bg_030_i "state_machine.un6_bg_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un8_bg_030_i "state_machine.un8_bg_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_o2_i_3 "pos_clk.cpu_est_11_0_0_o2_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_o2_i_1 "pos_clk.cpu_est_11_0_0_o2_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_i_0_o2_i_2 "pos_clk.cpu_est_11_i_0_o2_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_171_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_172_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_173_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_i_3 "pos_clk.cpu_est_11_0_0_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_165_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_166_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_105_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_106_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_1 "SM_AMIGA_ns_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_0 "SM_AMIGA_ns_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_SIZE_DMA_5_i_1 "state_machine.SIZE_DMA_5_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_SIZE_DMA_5_i_0 "state_machine.SIZE_DMA_5_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_DS_000_DMA_3_i "state_machine.DS_000_DMA_3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un8_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un14_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un10_bgack_030_int_i "state_machine.un10_bgack_030_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename CLK_000_N_SYNC_i_9 "CLK_000_N_SYNC_i[9]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un13_clk_000_n_sync_i "state_machine.un13_clk_000_n_sync_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un18_clk_000_n_sync_i "state_machine.un18_clk_000_n_sync_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DS_000_ENABLE_0_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_sqmuxa_1_i_0 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_116_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_114_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_115_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_6 "SM_AMIGA_ns_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_112_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_113_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_5 "SM_AMIGA_ns_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_111_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGA_0_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_4 "SM_AMIGA_ns_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_109_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_110_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_3 "SM_AMIGA_ns_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_108_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_2 "SM_AMIGA_ns_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_104_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_101_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_102_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_100_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_103_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_120_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_121_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_o3_i_7 "SM_AMIGA_ns_i_o3_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_o3_1_i_0 "SM_AMIGA_ns_o3_1_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_o3_0_i_0 "SM_AMIGA_ns_o3_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_o3_i_0 "SM_AMIGA_ns_o3_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un4_bgack_000_i "state_machine.un4_bgack_000_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un3_bgack_030_int_d_i "state_machine.un3_bgack_030_int_d_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_INT_1_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_bgack_030_int_d_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RW_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_RW_000_INT_4_i "state_machine.RW_000_INT_4_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_RW_000_INT_0_sqmuxa_2_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_117_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_i_1 "pos_clk.cpu_est_11_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_170_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_175_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_168_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_169_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_o3_2_i_0 "SM_AMIGA_ns_o3_2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un3_bgack_030_int_d "state_machine.un3_bgack_030_int_d") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un4_bgack_000 "state_machine.un4_bgack_000") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_000_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_CLK_000_N_SYNC_2_0 "pos_clk.CLK_000_N_SYNC_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_000_D1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_CLK_000_P_SYNC_2_0 "pos_clk.CLK_000_P_SYNC_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename A_i_19 "A_i[19]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_18 "A_i[18]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un26_as_030_d0_3 "state_machine.un26_as_030_d0_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BGACK_030_INT_0_r "BGACK_030_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename BGACK_030_INT_0_m "BGACK_030_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BGACK_030_INT_0_n "BGACK_030_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BGACK_030_INT_0_p "BGACK_030_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename RW_000_INT_0_r "RW_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename RW_000_INT_0_m "RW_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_INT_0_n "RW_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_INT_0_p "RW_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_INT_0_r "AMIGA_BUS_ENABLE_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_INT_0_m "AMIGA_BUS_ENABLE_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_INT_0_n "AMIGA_BUS_ENABLE_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_INT_0_p "AMIGA_BUS_ENABLE_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance un1_AS_030_D0_2_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_r "AS_030_000_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_m "AS_030_000_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_n "AS_030_000_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_p "AS_030_000_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance un21_fpu_cs_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un33_as_030_d0_i "state_machine.un33_as_030_d0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_AS_030_D0_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_SM_AMIGA_2_0_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_RW_000_INT_0_sqmuxa_2_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_1 "SM_AMIGA_ns_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_RW_000_INT_4 "state_machine.RW_000_INT_4") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un22_berr (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance FPU_SENSE_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un21_fpu_cs (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_bgack_030_int_d (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un10_clk_000_d0_i "state_machine.un10_clk_000_d0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_INT_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance BGACK_030_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance BGACK_030_INT_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_25 "A_i[25]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_26 "A_i[26]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_27 "A_i[27]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_28 "A_i[28]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_29 "A_i[29]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_30 "A_i[30]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_31 "A_i[31]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VMA_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VPA_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_i_0 "cpu_est_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_i_3 "cpu_est_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_030_000_SYNC_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un26_as_030_d0_i "state_machine.un26_as_030_d0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_16 "A_i[16]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_148 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_0_a3_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance nEXP_SPACE_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_0_1_2 "SM_AMIGA_ns_a3_0_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_0_2 "SM_AMIGA_ns_a3_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_0_6 "SM_AMIGA_ns_a3_0[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_000_PE_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_000_NE_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_149 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_AS_030_D0_2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename un1_as_030_d0Z0Z_2 "un1_as_030_d0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un8_bgack_030_int "state_machine.un8_bgack_030_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_24 "A_i[24]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_5 "SM_AMIGA_ns[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_6 "SM_AMIGA_ns[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_7 "SM_AMIGA_ns_i[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_o3_0 "SM_AMIGA_ns_o3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_o3_0_0 "SM_AMIGA_ns_o3_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_o3_1_0 "SM_AMIGA_ns_o3_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_o3_7 "SM_AMIGA_ns_i_o3[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance I_151 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DS_000_DMA_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un24_bgack_030_int_i "state_machine.un24_bgack_030_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DS_000_DMA_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance I_150 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGA_0_sqmuxa_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_2_0 "SM_AMIGA_ns_a3_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_0_1 "SM_AMIGA_ns_a3_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_2 "SM_AMIGA_ns_a3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_3 "SM_AMIGA_ns_a3[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_0_3 "SM_AMIGA_ns_a3_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_5 "SM_AMIGA_ns_a3[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_0_5 "SM_AMIGA_ns_a3_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a3_6 "SM_AMIGA_ns_a3[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_a3_7 "SM_AMIGA_ns_i_a3[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_SM_AMIGA_2_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_1 "SM_AMIGA_ns[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_2 "SM_AMIGA_ns[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_3 "SM_AMIGA_ns[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_4 "SM_AMIGA_ns[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un16_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_000_DMA_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un14_bgack_030_int_i "state_machine.un14_bgack_030_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_030_H_0_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_107_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_000_INT_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_0_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DSACK1_INT_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_A0_DMA_2 "state_machine.A0_DMA_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_DS_000_DMA_3 "state_machine.DS_000_DMA_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un31_bgack_030_int_i "state_machine.un31_bgack_030_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_SIZE_DMA_5_0 "state_machine.SIZE_DMA_5[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un8_bgack_030_int_i "state_machine.un8_bgack_030_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_SIZE_DMA_5_1 "state_machine.SIZE_DMA_5[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un8_bg_030 "state_machine.un8_bg_030") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un15_clk_000_n_sync_i "state_machine.un15_clk_000_n_sync_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un13_clk_000_n_sync "state_machine.un13_clk_000_n_sync") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un15_clk_000_ne "state_machine.un15_clk_000_ne") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un18_clk_000_n_sync "state_machine.un18_clk_000_n_sync") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un12_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un8_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un10_bgack_030_int "state_machine.un10_bgack_030_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance I_152 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_153 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un31_bgack_030_int "state_machine.un31_bgack_030_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_0_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un14_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_i_2 "cpu_est_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_i_0_o2_2 "pos_clk.cpu_est_11_i_0_o2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_o2_1 "pos_clk.cpu_est_11_0_0_o2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_i_1 "cpu_est_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_o2_3 "pos_clk.cpu_est_11_0_0_o2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_0_x2_0 "cpu_est_0_0_x2[0]") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance (rename state_machine_un24_bgack_030_int "state_machine.un24_bgack_030_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_030_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un3_ds_030_d0 "state_machine.un3_ds_030_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DTACK_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un13_clk_000_ne "state_machine.un13_clk_000_ne") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_EXP_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un15_clk_000_n_sync "state_machine.un15_clk_000_n_sync") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_DMA_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un14_bgack_030_int "state_machine.un14_bgack_030_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_UDS_000_INT (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_LDS_000_INT (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_a2_1 "pos_clk.cpu_est_11_0_0_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_a2_0_1 "pos_clk.cpu_est_11_0_0_a2_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_a2_1_1 "pos_clk.cpu_est_11_0_0_a2_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_a2_3 "pos_clk.cpu_est_11_0_0_a2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_a2_0_3 "pos_clk.cpu_est_11_0_0_a2_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_a2_1_3 "pos_clk.cpu_est_11_0_0_a2_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_a4_1_0_a2_3 "pos_clk.cpu_est_11_0_a4_1_0_a2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_0_0_a2_2_1 "pos_clk.cpu_est_11_0_0_a2_2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un10_clk_000_pe_0 "state_machine.un10_clk_000_pe_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_cpu_est_11_i_0_2 "pos_clk.cpu_est_11_i_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_OUT_PRE_50_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_0_1__r "cpu_est_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_0_1__m "cpu_est_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_1__n "cpu_est_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_1__p "cpu_est_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename cpu_est_0_2__r "cpu_est_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_0_2__m "cpu_est_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_2__n "cpu_est_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_2__p "cpu_est_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename cpu_est_0_3__r "cpu_est_0_3_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_0_3__m "cpu_est_0_3_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_3__n "cpu_est_0_3_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_3__p "cpu_est_0_3_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename IPL_030_0_0__r "IPL_030_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_030_0_0__m "IPL_030_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_0__n "IPL_030_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_0__p "IPL_030_0_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename IPL_030_0_1__r "IPL_030_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_030_0_1__m "IPL_030_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_1__n "IPL_030_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_1__p "IPL_030_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename IPL_030_0_2__r "IPL_030_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_030_0_2__m "IPL_030_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_2__n "IPL_030_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_2__p "IPL_030_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance un16_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_INT_0_r "AS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_INT_0_m "AS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_INT_0_n "AS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_INT_0_p "AS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename DS_000_ENABLE_0_r "DS_000_ENABLE_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DS_000_ENABLE_0_m "DS_000_ENABLE_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_ENABLE_0_n "DS_000_ENABLE_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_ENABLE_0_p "DS_000_ENABLE_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename DSACK1_INT_0_r "DSACK1_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DSACK1_INT_0_m "DSACK1_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DSACK1_INT_0_n "DSACK1_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DSACK1_INT_0_p "DSACK1_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance DS_000_DMA_1_sqmuxa_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename RW_000_DMA_0_r "RW_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename RW_000_DMA_0_m "RW_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_DMA_0_n "RW_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_DMA_0_p "RW_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_r "DS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_m "DS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_n "DS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_p "DS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_r "AS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_m "AS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_n "AS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_p "AS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename CLK_030_H_0_r "CLK_030_H_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename CLK_030_H_0_m "CLK_030_H_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename CLK_030_H_0_n "CLK_030_H_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename CLK_030_H_0_p "CLK_030_H_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename LDS_000_INT_0_r "LDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename LDS_000_INT_0_m "LDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename LDS_000_INT_0_n "LDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename LDS_000_INT_0_p "LDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename VMA_INT_0_r "VMA_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename VMA_INT_0_m "VMA_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename VMA_INT_0_n "VMA_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename VMA_INT_0_p "VMA_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename UDS_000_INT_0_r "UDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename UDS_000_INT_0_m "UDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename UDS_000_INT_0_n "UDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename UDS_000_INT_0_p "UDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename BG_000_0_r "BG_000_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename BG_000_0_m "BG_000_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BG_000_0_n "BG_000_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BG_000_0_p "BG_000_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (net BGACK_030_INT (joined - (portRef Q (instanceRef BGACK_030_INT)) - (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_a3)) - (portRef I0 (instanceRef BGACK_030_INT_i)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_INT_1_sqmuxa)) - (portRef I0 (instanceRef BGACK_030_INT_0_n)) - (portRef I0 (instanceRef state_machine_un3_bgack_030_int_d)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_INT_1_sqmuxa_1_1)) - (portRef OE (instanceRef AS_000)) - (portRef I0 (instanceRef BGACK_030)) - (portRef D (instanceRef BGACK_030_INT_D)) - (portRef OE (instanceRef LDS_000)) - (portRef OE (instanceRef RW_000)) - (portRef OE (instanceRef UDS_000)) - )) - (net (rename cpu_est_3 "cpu_est[3]") (joined - (portRef Q (instanceRef cpu_est_3)) - (portRef I0 (instanceRef cpu_est_0_3__n)) - (portRef I1 (instanceRef pos_clk_cpu_est_11_0_0_a2_3)) - (portRef I1 (instanceRef pos_clk_cpu_est_11_0_0_a2_1_1)) - (portRef I0 (instanceRef cpu_est_i_3)) - (portRef I0 (instanceRef state_machine_un19_clk_000_ne_1)) - (portRef I0 (instanceRef E)) - )) - (net VMA_INT (joined - (portRef Q (instanceRef VMA_INT)) - (portRef I0 (instanceRef VMA_INT_0_n)) - (portRef I0 (instanceRef VMA_INT_i)) - (portRef I0 (instanceRef VMA)) - )) - (net (rename cpu_est_0 "cpu_est[0]") (joined - (portRef Q (instanceRef cpu_est_0)) - (portRef I1 (instanceRef pos_clk_cpu_est_11_0_0_a2_2_1)) - (portRef I1 (instanceRef cpu_est_0_0_x2_0)) - (portRef I0 (instanceRef pos_clk_cpu_est_11_0_0_o2_3)) - (portRef I0 (instanceRef cpu_est_i_0)) - (portRef I1 (instanceRef pos_clk_cpu_est_11_i_0_a2_1_2)) - )) - (net (rename cpu_est_1 "cpu_est[1]") (joined - (portRef Q (instanceRef cpu_est_1)) - (portRef I0 (instanceRef VMA_INT_0_m)) - (portRef I0 (instanceRef cpu_est_0_1__n)) - (portRef I1 (instanceRef pos_clk_cpu_est_11_0_0_o2_3)) - (portRef I0 (instanceRef cpu_est_i_1)) - (portRef I0 (instanceRef pos_clk_cpu_est_11_i_0_o2_2)) - (portRef I0 (instanceRef pos_clk_cpu_est_11_i_0_a2_0_1_2)) - )) - (net AS_030_D0 (joined - (portRef Q (instanceRef AS_030_D0)) - (portRef I0 (instanceRef AS_030_D0_i)) - (portRef I1 (instanceRef state_machine_un6_bg_030_1)) - )) - (net DS_030_D0 (joined - (portRef Q (instanceRef DS_030_D0)) - (portRef I0 (instanceRef DS_030_D0_i)) - )) - (net AS_030_000_SYNC (joined - (portRef Q (instanceRef AS_030_000_SYNC)) - (portRef I0 (instanceRef AS_030_000_SYNC_i)) - (portRef I0 (instanceRef AS_030_000_SYNC_0_m)) - )) - (net BGACK_030_INT_D (joined - (portRef Q (instanceRef BGACK_030_INT_D)) - (portRef I0 (instanceRef BGACK_030_INT_D_i)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_INT_1_sqmuxa_1_1)) - )) - (net AS_000_DMA (joined - (portRef Q (instanceRef AS_000_DMA)) - (portRef I0 (instanceRef AS_000_DMA_0_m)) - (portRef I0 (instanceRef AS_000_DMA_i)) - (portRef I0 (instanceRef AS_030)) - )) - (net VPA_D (joined - (portRef Q (instanceRef VPA_D)) - (portRef I1 (instanceRef state_machine_un13_clk_000_ne)) - (portRef I0 (instanceRef VPA_D_i)) - )) - (net DTACK_D0 (joined - (portRef Q (instanceRef DTACK_D0)) - (portRef I0 (instanceRef DTACK_D0_i)) - )) - (net CLK_OUT_PRE_50 (joined - (portRef Q (instanceRef CLK_OUT_PRE_50)) - (portRef I0 (instanceRef CLK_OUT_PRE_50_i)) - (portRef D (instanceRef CLK_OUT_PRE)) - )) - (net CLK_000_D1 (joined - (portRef Q (instanceRef CLK_000_D1)) - (portRef I0 (instanceRef CLK_000_D1_i)) - (portRef I1 (instanceRef pos_clk_CLK_000_N_SYNC_2_0)) - )) - (net CLK_000_D0 (joined - (portRef Q (instanceRef CLK_000_D0)) - (portRef I0 (instanceRef pos_clk_CLK_000_P_SYNC_2_0)) - (portRef I0 (instanceRef CLK_000_D0_i)) - (portRef I1 (instanceRef state_machine_un6_bg_030)) - (portRef D (instanceRef CLK_000_D1)) - )) - (net (rename SM_AMIGA_7 "SM_AMIGA[7]") (joined - (portRef Q (instanceRef SM_AMIGA_7)) - (portRef I0 (instanceRef SM_AMIGA_i_7)) - (portRef I0 (instanceRef SM_AMIGA_ns_a3_1)) - (portRef I1 (instanceRef state_machine_un33_as_030_d0_1)) - )) - (net VCC (joined - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_LOW)) - (portRef I0 (instanceRef AVEC)) - (portRef D (instanceRef RESETDFFRH)) - )) - (net GND (joined - (portRef I0 (instanceRef BERR)) - )) - (net CLK_OUT_PRE (joined - (portRef Q (instanceRef CLK_OUT_PRE)) - (portRef D (instanceRef CLK_OUT_PRE_D)) - )) - (net CLK_000_PE (joined - (portRef Q (instanceRef CLK_000_PE)) - (portRef I0 (instanceRef un1_SM_AMIGA_2_0_a3)) - (portRef I0 (instanceRef SM_AMIGA_ns_a3_6)) - (portRef I0 (instanceRef SM_AMIGA_ns_a3_2)) - (portRef I0 (instanceRef SM_AMIGA_0_sqmuxa_0_a3)) - (portRef I0 (instanceRef CLK_000_PE_i)) - (portRef I0 (instanceRef DS_000_ENABLE_0_sqmuxa_1)) - (portRef I0 (instanceRef state_machine_un10_clk_000_pe_0_a2_1)) - )) - (net (rename CLK_000_P_SYNC_9 "CLK_000_P_SYNC[9]") (joined - (portRef Q (instanceRef CLK_000_P_SYNC_9)) - (portRef D (instanceRef CLK_000_PE)) - )) - (net CLK_000_NE (joined - (portRef Q (instanceRef CLK_000_NE)) - (portRef I1 (instanceRef IPL_030_0_2__m)) - (portRef I0 (instanceRef IPL_030_0_2__r)) - (portRef I1 (instanceRef IPL_030_0_1__m)) - (portRef I0 (instanceRef IPL_030_0_1__r)) - (portRef I1 (instanceRef IPL_030_0_0__m)) - (portRef I0 (instanceRef IPL_030_0_0__r)) - (portRef I0 (instanceRef SM_AMIGA_ns_a3_3)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_o3_7)) - (portRef I0 (instanceRef SM_AMIGA_ns_o3_0_0)) - (portRef I0 (instanceRef CLK_000_NE_i)) - (portRef I0 (instanceRef state_machine_un10_clk_000_pe_0_a2_0_1)) - (portRef D (instanceRef CLK_000_NE_D0)) - )) - (net (rename CLK_000_N_SYNC_11 "CLK_000_N_SYNC[11]") (joined - (portRef Q (instanceRef CLK_000_N_SYNC_11)) - (portRef D (instanceRef CLK_000_NE)) - )) - (net (rename cpu_est_2 "cpu_est[2]") (joined - (portRef Q (instanceRef cpu_est_2)) - (portRef I0 (instanceRef cpu_est_0_2__n)) - (portRef I1 (instanceRef pos_clk_cpu_est_11_i_0_o2_2)) - (portRef I0 (instanceRef cpu_est_i_2)) - (portRef I1 (instanceRef state_machine_un19_clk_000_ne)) - (portRef I1 (instanceRef state_machine_un10_clk_000_pe_0_a2_0_2)) - )) - (net CLK_000_NE_D0 (joined - (portRef Q (instanceRef CLK_000_NE_D0)) - (portRef I1 (instanceRef cpu_est_0_3__m)) - (portRef I0 (instanceRef cpu_est_0_3__r)) - (portRef I1 (instanceRef cpu_est_0_2__m)) - (portRef I0 (instanceRef cpu_est_0_2__r)) - (portRef I1 (instanceRef cpu_est_0_1__m)) - (portRef I0 (instanceRef cpu_est_0_1__r)) - (portRef I0 (instanceRef cpu_est_0_0_x2_0)) - )) - (net (rename SM_AMIGA_6 "SM_AMIGA[6]") (joined - (portRef Q (instanceRef SM_AMIGA_6)) - (portRef I1 (instanceRef state_machine_un3_ds_030_d0)) - (portRef I1 (instanceRef SM_AMIGA_ns_a3_2)) - (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_1)) - (portRef I0 (instanceRef SM_AMIGA_i_6)) - (portRef I1 (instanceRef DS_000_ENABLE_0_sqmuxa)) - )) - (net (rename SM_AMIGA_4 "SM_AMIGA[4]") (joined - (portRef Q (instanceRef SM_AMIGA_4)) - (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_3)) - (portRef I1 (instanceRef SM_AMIGA_0_sqmuxa_0_a3)) - (portRef I0 (instanceRef SM_AMIGA_i_4)) - )) - (net (rename SM_AMIGA_0 "SM_AMIGA[0]") (joined - (portRef Q (instanceRef SM_AMIGA_0)) - (portRef I1 (instanceRef un1_SM_AMIGA_2_0_a3)) - (portRef I1 (instanceRef SM_AMIGA_ns_a3_2_0)) - (portRef I0 (instanceRef SM_AMIGA_i_0)) - )) - (net CLK_030_H (joined - (portRef Q (instanceRef CLK_030_H)) - (portRef I0 (instanceRef CLK_030_H_0_m)) - (portRef I0 (instanceRef state_machine_un24_bgack_030_int)) - )) - (net AS_000_INT (joined - (portRef Q (instanceRef AS_000_INT)) - (portRef I0 (instanceRef AS_000_INT_0_m)) - (portRef I0 (instanceRef AS_000)) - )) - (net RW_000_INT (joined - (portRef Q (instanceRef RW_000_INT)) - (portRef I0 (instanceRef RW_000_INT_0_n)) - (portRef I0 (instanceRef RW_000)) - )) - (net DSACK1_INT (joined - (portRef Q (instanceRef DSACK1_INT)) - (portRef I0 (instanceRef DSACK1_INT_0_m)) - (portRef I0 (instanceRef DSACK1)) - )) - (net (rename pos_clk_CLK_000_P_SYNC_2_0 "pos_clk.CLK_000_P_SYNC_2[0]") (joined - (portRef O (instanceRef pos_clk_CLK_000_P_SYNC_2_0)) - (portRef D (instanceRef CLK_000_P_SYNC_0)) - )) - (net (rename pos_clk_CLK_000_N_SYNC_2_0 "pos_clk.CLK_000_N_SYNC_2[0]") (joined - (portRef O (instanceRef pos_clk_CLK_000_N_SYNC_2_0)) - (portRef I0 (instanceRef state_machine_un10_clk_000_d0_1)) - (portRef D (instanceRef CLK_000_N_SYNC_0)) - )) - (net (rename state_machine_un3_ds_030_d0 "state_machine.un3_ds_030_d0") (joined - (portRef O (instanceRef state_machine_un3_ds_030_d0)) - (portRef I1 (instanceRef UDS_000_INT_0_m)) - (portRef I0 (instanceRef UDS_000_INT_0_r)) - (portRef I1 (instanceRef LDS_000_INT_0_m)) - (portRef I0 (instanceRef LDS_000_INT_0_r)) - )) - (net RW_000_DMA (joined - (portRef Q (instanceRef RW_000_DMA)) - (portRef I0 (instanceRef RW_000_DMA_0_m)) - (portRef I0 (instanceRef RW)) - )) - (net un1_LDS_000_INT (joined - (portRef O (instanceRef un1_LDS_000_INT_i)) - (portRef I0 (instanceRef LDS_000)) - )) - (net LDS_000_INT (joined - (portRef Q (instanceRef LDS_000_INT)) - (portRef I0 (instanceRef LDS_000_INT_0_n)) - (portRef I0 (instanceRef LDS_000_INT_i)) - )) - (net DS_000_ENABLE (joined - (portRef Q (instanceRef DS_000_ENABLE)) - (portRef I0 (instanceRef DS_000_ENABLE_0_m)) - (portRef I0 (instanceRef un1_LDS_000_INT)) - (portRef I0 (instanceRef un1_UDS_000_INT)) - )) - (net un1_UDS_000_INT (joined - (portRef O (instanceRef un1_UDS_000_INT_i)) - (portRef I0 (instanceRef UDS_000)) - )) - (net UDS_000_INT (joined - (portRef Q (instanceRef UDS_000_INT)) - (portRef I0 (instanceRef UDS_000_INT_0_n)) - (portRef I0 (instanceRef UDS_000_INT_i)) - )) - (net (rename state_machine_un8_bg_030 "state_machine.un8_bg_030") (joined - (portRef O (instanceRef state_machine_un8_bg_030_i)) - (portRef I1 (instanceRef BG_000_0_m)) - (portRef I0 (instanceRef BG_000_0_r)) - )) - (net (rename CLK_000_P_SYNC_0 "CLK_000_P_SYNC[0]") (joined - (portRef Q (instanceRef CLK_000_P_SYNC_0)) - (portRef D (instanceRef CLK_000_P_SYNC_1)) - )) - (net (rename CLK_000_P_SYNC_1 "CLK_000_P_SYNC[1]") (joined - (portRef Q (instanceRef CLK_000_P_SYNC_1)) - (portRef D (instanceRef CLK_000_P_SYNC_2)) - )) - (net (rename CLK_000_P_SYNC_2 "CLK_000_P_SYNC[2]") (joined - (portRef Q (instanceRef CLK_000_P_SYNC_2)) - (portRef D (instanceRef CLK_000_P_SYNC_3)) - )) - (net (rename CLK_000_P_SYNC_3 "CLK_000_P_SYNC[3]") (joined - (portRef Q (instanceRef CLK_000_P_SYNC_3)) - (portRef D (instanceRef CLK_000_P_SYNC_4)) - )) - (net (rename CLK_000_P_SYNC_4 "CLK_000_P_SYNC[4]") (joined - (portRef Q (instanceRef CLK_000_P_SYNC_4)) - (portRef D (instanceRef CLK_000_P_SYNC_5)) - )) - (net (rename CLK_000_P_SYNC_5 "CLK_000_P_SYNC[5]") (joined - (portRef Q (instanceRef CLK_000_P_SYNC_5)) - (portRef D (instanceRef CLK_000_P_SYNC_6)) - )) - (net (rename CLK_000_P_SYNC_6 "CLK_000_P_SYNC[6]") (joined - (portRef Q (instanceRef CLK_000_P_SYNC_6)) - (portRef D (instanceRef CLK_000_P_SYNC_7)) - )) - (net (rename CLK_000_P_SYNC_7 "CLK_000_P_SYNC[7]") (joined - (portRef Q (instanceRef CLK_000_P_SYNC_7)) - (portRef D (instanceRef CLK_000_P_SYNC_8)) - )) - (net (rename CLK_000_P_SYNC_8 "CLK_000_P_SYNC[8]") (joined - (portRef Q (instanceRef CLK_000_P_SYNC_8)) - (portRef D (instanceRef CLK_000_P_SYNC_9)) - )) - (net (rename CLK_000_N_SYNC_0 "CLK_000_N_SYNC[0]") (joined - (portRef Q (instanceRef CLK_000_N_SYNC_0)) - (portRef D (instanceRef CLK_000_N_SYNC_1)) - )) - (net (rename CLK_000_N_SYNC_1 "CLK_000_N_SYNC[1]") (joined - (portRef Q (instanceRef CLK_000_N_SYNC_1)) - (portRef D (instanceRef CLK_000_N_SYNC_2)) - )) - (net (rename CLK_000_N_SYNC_2 "CLK_000_N_SYNC[2]") (joined - (portRef Q (instanceRef CLK_000_N_SYNC_2)) - (portRef D (instanceRef CLK_000_N_SYNC_3)) - )) - (net (rename CLK_000_N_SYNC_3 "CLK_000_N_SYNC[3]") (joined - (portRef Q (instanceRef CLK_000_N_SYNC_3)) - (portRef D (instanceRef CLK_000_N_SYNC_4)) - )) - (net (rename CLK_000_N_SYNC_4 "CLK_000_N_SYNC[4]") (joined - (portRef Q (instanceRef CLK_000_N_SYNC_4)) - (portRef D (instanceRef CLK_000_N_SYNC_5)) - )) - (net (rename CLK_000_N_SYNC_5 "CLK_000_N_SYNC[5]") (joined - (portRef Q (instanceRef CLK_000_N_SYNC_5)) - (portRef D (instanceRef CLK_000_N_SYNC_6)) - )) - (net (rename CLK_000_N_SYNC_6 "CLK_000_N_SYNC[6]") (joined - (portRef Q (instanceRef CLK_000_N_SYNC_6)) - (portRef D (instanceRef CLK_000_N_SYNC_7)) - )) - (net (rename CLK_000_N_SYNC_7 "CLK_000_N_SYNC[7]") (joined - (portRef Q (instanceRef CLK_000_N_SYNC_7)) - (portRef D (instanceRef CLK_000_N_SYNC_8)) - )) - (net (rename CLK_000_N_SYNC_8 "CLK_000_N_SYNC[8]") (joined - (portRef Q (instanceRef CLK_000_N_SYNC_8)) - (portRef I0 (instanceRef state_machine_un13_clk_000_n_sync)) - (portRef D (instanceRef CLK_000_N_SYNC_9)) - )) - (net (rename CLK_000_N_SYNC_9 "CLK_000_N_SYNC[9]") (joined - (portRef Q (instanceRef CLK_000_N_SYNC_9)) - (portRef I0 (instanceRef CLK_000_N_SYNC_i_9)) - (portRef D (instanceRef CLK_000_N_SYNC_10)) - )) - (net (rename CLK_000_N_SYNC_10 "CLK_000_N_SYNC[10]") (joined - (portRef Q (instanceRef CLK_000_N_SYNC_10)) - (portRef D (instanceRef CLK_000_N_SYNC_11)) - )) - (net un5_ciin (joined - (portRef O (instanceRef un5_ciin)) - (portRef I0 (instanceRef un5_ciin_i)) - (portRef I0 (instanceRef CIIN)) - )) - (net DS_000_DMA (joined - (portRef Q (instanceRef DS_000_DMA)) - (portRef I0 (instanceRef DS_000_DMA_0_m)) - (portRef I0 (instanceRef DS_030)) - )) - (net (rename SIZE_DMA_0 "SIZE_DMA[0]") (joined - (portRef Q (instanceRef SIZE_DMA_0)) - (portRef I0 (instanceRef SIZE_0)) - )) - (net (rename SIZE_DMA_1 "SIZE_DMA[1]") (joined - (portRef Q (instanceRef SIZE_DMA_1)) - (portRef I0 (instanceRef SIZE_1)) - )) - (net A0_DMA (joined - (portRef Q (instanceRef A0_DMA)) - (portRef I0 (instanceRef A0)) - )) - (net (rename state_machine_un10_clk_000_pe "state_machine.un10_clk_000_pe") (joined - (portRef O (instanceRef state_machine_un10_clk_000_pe_0_i)) - (portRef I1 (instanceRef VMA_INT_0_m)) - (portRef I0 (instanceRef VMA_INT_0_r)) - )) - (net un1_SM_AMIGA_0_sqmuxa_1 (joined - (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_i_0)) - (portRef I0 (instanceRef DS_000_ENABLE_0_n)) - )) - (net (rename SM_AMIGA_1 "SM_AMIGA[1]") (joined - (portRef Q (instanceRef SM_AMIGA_1)) - (portRef I0 (instanceRef DSACK1_INT_0_sqmuxa)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_o3_7)) - (portRef I0 (instanceRef SM_AMIGA_i_1)) - (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_6)) - )) - (net (rename state_machine_un8_bgack_030_int "state_machine.un8_bgack_030_int") (joined - (portRef O (instanceRef state_machine_un8_bgack_030_int)) - (portRef I0 (instanceRef CLK_030_H_0_n)) - (portRef I0 (instanceRef state_machine_SIZE_DMA_5_1)) - (portRef I0 (instanceRef state_machine_un8_bgack_030_int_i)) - (portRef I0 (instanceRef state_machine_SIZE_DMA_5_0)) - (portRef I1 (instanceRef state_machine_DS_000_DMA_3)) - (portRef I1 (instanceRef state_machine_A0_DMA_2)) - (portRef I0 (instanceRef CLK_030_H_0_sqmuxa)) - (portRef I1 (instanceRef AS_000_DMA_1_sqmuxa)) - (portRef I1 (instanceRef DS_000_DMA_1_sqmuxa_1)) - )) - (net un21_fpu_cs (joined - (portRef O (instanceRef un21_fpu_cs)) - (portRef I0 (instanceRef un21_fpu_cs_i)) - )) - (net un22_berr (joined - (portRef O (instanceRef un22_berr)) - (portRef OE (instanceRef BERR)) - )) - (net un16_ciin (joined - (portRef O (instanceRef un16_ciin)) - (portRef I0 (instanceRef un16_ciin_i)) - )) - (net AS_000_DMA_1_sqmuxa (joined - (portRef O (instanceRef AS_000_DMA_1_sqmuxa)) - (portRef I1 (instanceRef AS_000_DMA_0_m)) - (portRef I0 (instanceRef AS_000_DMA_0_r)) - (portRef I1 (instanceRef RW_000_DMA_0_m)) - (portRef I0 (instanceRef RW_000_DMA_0_r)) - )) - (net CLK_030_H_0_sqmuxa (joined - (portRef O (instanceRef CLK_030_H_0_sqmuxa)) - (portRef I1 (instanceRef CLK_030_H_0_m)) - (portRef I0 (instanceRef CLK_030_H_0_r)) - )) - (net DS_000_DMA_1_sqmuxa (joined - (portRef O (instanceRef DS_000_DMA_1_sqmuxa)) - (portRef I1 (instanceRef DS_000_DMA_0_m)) - (portRef I0 (instanceRef DS_000_DMA_0_r)) - )) - (net (rename state_machine_A0_DMA_2 "state_machine.A0_DMA_2") (joined - (portRef O (instanceRef state_machine_A0_DMA_2)) - (portRef D (instanceRef A0_DMA)) - )) - (net (rename state_machine_DS_000_DMA_3 "state_machine.DS_000_DMA_3") (joined - (portRef O (instanceRef state_machine_DS_000_DMA_3_i)) - (portRef I0 (instanceRef DS_000_DMA_0_n)) - )) - (net (rename state_machine_SIZE_DMA_5_0 "state_machine.SIZE_DMA_5[0]") (joined - (portRef O (instanceRef state_machine_SIZE_DMA_5_i_0)) - (portRef D (instanceRef SIZE_DMA_0)) - )) - (net (rename state_machine_SIZE_DMA_5_1 "state_machine.SIZE_DMA_5[1]") (joined - (portRef O (instanceRef state_machine_SIZE_DMA_5_i_1)) - (portRef D (instanceRef SIZE_DMA_1)) - )) - (net (rename SM_AMIGA_5 "SM_AMIGA[5]") (joined - (portRef Q (instanceRef SM_AMIGA_5)) - (portRef I1 (instanceRef SM_AMIGA_ns_a3_3)) - (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_2)) - (portRef I0 (instanceRef SM_AMIGA_i_5)) - )) - (net (rename SM_AMIGA_3 "SM_AMIGA[3]") (joined - (portRef Q (instanceRef SM_AMIGA_3)) - (portRef I1 (instanceRef SM_AMIGA_ns_a3_5)) - (portRef I0 (instanceRef SM_AMIGA_i_3)) - (portRef I1 (instanceRef SM_AMIGA_ns_a3_1_0)) - (portRef I1 (instanceRef SM_AMIGA_ns_a3_4)) - )) - (net (rename SM_AMIGA_2 "SM_AMIGA[2]") (joined - (portRef Q (instanceRef SM_AMIGA_2)) - (portRef I1 (instanceRef SM_AMIGA_ns_a3_6)) - (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_5)) - (portRef I0 (instanceRef SM_AMIGA_i_2)) - )) - (net un1_as_030_d0_2 (joined - (portRef O (instanceRef un1_as_030_d0Z0Z_2)) - (portRef I1 (instanceRef DS_000_ENABLE_0_m)) - (portRef I0 (instanceRef DS_000_ENABLE_0_r)) - )) - (net AS_000_INT_1_sqmuxa (joined - (portRef O (instanceRef AS_000_INT_1_sqmuxa)) - (portRef I1 (instanceRef AS_000_INT_0_m)) - (portRef I0 (instanceRef AS_000_INT_0_r)) - )) - (net DSACK1_INT_1_sqmuxa (joined - (portRef O (instanceRef DSACK1_INT_1_sqmuxa)) - (portRef I1 (instanceRef DSACK1_INT_0_m)) - (portRef I0 (instanceRef DSACK1_INT_0_r)) - )) - (net N_1 (joined - (portRef O (instanceRef AS_000_INT_0_p)) - (portRef D (instanceRef AS_000_INT)) - )) - (net N_2 (joined - (portRef O (instanceRef DS_000_ENABLE_0_p)) - (portRef D (instanceRef DS_000_ENABLE)) - )) - (net N_3 (joined - (portRef O (instanceRef DSACK1_INT_0_p)) - (portRef D (instanceRef DSACK1_INT)) - )) - (net N_4 (joined - (portRef O (instanceRef AS_030_000_SYNC_0_p)) - (portRef D (instanceRef AS_030_000_SYNC)) - )) - (net N_5 (joined - (portRef O (instanceRef RW_000_DMA_0_p)) - (portRef D (instanceRef RW_000_DMA)) - )) - (net N_6 (joined - (portRef O (instanceRef DS_000_DMA_0_p)) - (portRef D (instanceRef DS_000_DMA)) - )) - (net N_7 (joined - (portRef O (instanceRef AS_000_DMA_0_p)) - (portRef D (instanceRef AS_000_DMA)) - )) - (net N_8 (joined - (portRef O (instanceRef CLK_030_H_0_p)) - (portRef D (instanceRef CLK_030_H)) - )) - (net N_9 (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_INT_0_p)) - (portRef D (instanceRef AMIGA_BUS_ENABLE_INT)) - )) - (net N_10 (joined - (portRef O (instanceRef LDS_000_INT_0_p)) - (portRef D (instanceRef LDS_000_INT)) - )) - (net N_11 (joined - (portRef O (instanceRef RW_000_INT_0_p)) - (portRef D (instanceRef RW_000_INT)) - )) - (net N_12 (joined - (portRef O (instanceRef VMA_INT_0_p)) - (portRef D (instanceRef VMA_INT)) - )) - (net N_13 (joined - (portRef O (instanceRef UDS_000_INT_0_p)) - (portRef D (instanceRef UDS_000_INT)) - )) - (net N_14 (joined - (portRef O (instanceRef BG_000_0_p)) - (portRef D (instanceRef BG_000DFFSH)) - )) - (net N_15 (joined - (portRef O (instanceRef BGACK_030_INT_0_p)) - (portRef D (instanceRef BGACK_030_INT)) - )) - (net N_17 (joined - (portRef O (instanceRef cpu_est_0_1__p)) - (portRef D (instanceRef cpu_est_1)) - )) - (net N_18 (joined - (portRef O (instanceRef cpu_est_0_2__p)) - (portRef D (instanceRef cpu_est_2)) - )) - (net N_19 (joined - (portRef O (instanceRef cpu_est_0_3__p)) - (portRef D (instanceRef cpu_est_3)) - )) - (net N_20 (joined - (portRef O (instanceRef IPL_030_0_0__p)) - (portRef D (instanceRef IPL_030DFFSH_0)) - )) - (net N_21 (joined - (portRef O (instanceRef IPL_030_0_1__p)) - (portRef D (instanceRef IPL_030DFFSH_1)) - )) - (net N_22 (joined - (portRef O (instanceRef IPL_030_0_2__p)) - (portRef D (instanceRef IPL_030DFFSH_2)) - )) - (net (rename SM_AMIGA_ns_0 "SM_AMIGA_ns[0]") (joined - (portRef O (instanceRef SM_AMIGA_ns_i_0)) - (portRef D (instanceRef SM_AMIGA_7)) - )) - (net (rename SM_AMIGA_ns_1 "SM_AMIGA_ns[1]") (joined - (portRef O (instanceRef SM_AMIGA_ns_i_1)) - (portRef D (instanceRef SM_AMIGA_6)) - )) - (net (rename SM_AMIGA_ns_2 "SM_AMIGA_ns[2]") (joined - (portRef O (instanceRef SM_AMIGA_ns_i_2)) - (portRef D (instanceRef SM_AMIGA_5)) - )) - (net (rename SM_AMIGA_ns_3 "SM_AMIGA_ns[3]") (joined - (portRef O (instanceRef SM_AMIGA_ns_i_3)) - (portRef D (instanceRef SM_AMIGA_4)) - )) - (net (rename SM_AMIGA_ns_4 "SM_AMIGA_ns[4]") (joined - (portRef O (instanceRef SM_AMIGA_ns_i_4)) - (portRef D (instanceRef SM_AMIGA_3)) - )) - (net (rename SM_AMIGA_ns_5 "SM_AMIGA_ns[5]") (joined - (portRef O (instanceRef SM_AMIGA_ns_i_5)) - (portRef D (instanceRef SM_AMIGA_2)) - )) - (net (rename SM_AMIGA_ns_6 "SM_AMIGA_ns[6]") (joined - (portRef O (instanceRef SM_AMIGA_ns_i_6)) - (portRef D (instanceRef SM_AMIGA_1)) - )) - (net (rename pos_clk_cpu_est_11_1 "pos_clk.cpu_est_11[1]") (joined - (portRef O (instanceRef pos_clk_cpu_est_11_0_0_i_1)) - (portRef I0 (instanceRef cpu_est_0_1__m)) - )) - (net (rename pos_clk_cpu_est_11_3 "pos_clk.cpu_est_11[3]") (joined - (portRef O (instanceRef pos_clk_cpu_est_11_0_0_i_3)) - (portRef I0 (instanceRef cpu_est_0_3__m)) - )) - (net N_13_i (joined - (portRef O (instanceRef cpu_est_0_0_x2_0)) - (portRef D (instanceRef cpu_est_0)) - )) - (net DS_000_DMA_1_sqmuxa_1 (joined - (portRef O (instanceRef DS_000_DMA_1_sqmuxa_1)) - (portRef I0 (instanceRef DS_000_DMA_1_sqmuxa_1_i)) - (portRef I0 (instanceRef DS_000_DMA_1_sqmuxa)) - )) - (net un1_AS_030_D0_2_1 (joined - (portRef O (instanceRef un1_AS_030_D0_2_1)) - (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa)) - (portRef I1 (instanceRef AS_000_INT_1_sqmuxa)) - (portRef I0 (instanceRef un1_as_030_d0Z0Z_2)) - (portRef I1 (instanceRef un1_AS_030_D0_2)) - (portRef I0 (instanceRef un1_AS_030_D0_2_1_i)) - )) - (net N_144_1 (joined - (portRef O (instanceRef pos_clk_cpu_est_11_0_a4_1_0_a2_3)) - (portRef I0 (instanceRef pos_clk_cpu_est_11_0_0_a2_1_3)) - (portRef I1 (instanceRef state_machine_un19_clk_000_ne_1)) - )) - (net N_165 (joined - (portRef O (instanceRef pos_clk_cpu_est_11_i_0_a2_2)) - (portRef I0 (instanceRef N_165_i)) - )) - (net N_157 (joined - (portRef O (instanceRef pos_clk_cpu_est_11_i_0_o2_i_2)) - (portRef I0 (instanceRef pos_clk_cpu_est_11_i_0_a2_1_2)) - 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(portRef I0 (instanceRef CLK_EXP)) - )) - (net CLK_EXP (joined - (portRef O (instanceRef CLK_EXP)) - (portRef CLK_EXP) - )) - (net FPU_CS (joined - (portRef O (instanceRef FPU_CS)) - (portRef FPU_CS) - )) - (net FPU_SENSE_c (joined - (portRef O (instanceRef FPU_SENSE)) - (portRef I0 (instanceRef FPU_SENSE_i)) - (portRef I0 (instanceRef un22_berr)) - )) - (net FPU_SENSE (joined - (portRef FPU_SENSE) - (portRef I0 (instanceRef FPU_SENSE)) - )) - (net (rename IPL_030_c_0 "IPL_030_c[0]") (joined - (portRef Q (instanceRef IPL_030DFFSH_0)) - (portRef I0 (instanceRef IPL_030_0_0__n)) - (portRef I0 (instanceRef IPL_030_0)) - )) - (net (rename IPL_030_0 "IPL_030[0]") (joined - (portRef O (instanceRef IPL_030_0)) - (portRef (member ipl_030 2)) - )) - (net (rename IPL_030_c_1 "IPL_030_c[1]") (joined - (portRef Q (instanceRef IPL_030DFFSH_1)) - (portRef I0 (instanceRef IPL_030_0_1__n)) - (portRef I0 (instanceRef IPL_030_1)) - )) - (net (rename IPL_030_1 "IPL_030[1]") (joined - (portRef O (instanceRef IPL_030_1)) - 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(net (rename state_machine_un3_bgack_030_int_d_i "state_machine.un3_bgack_030_int_d_i") (joined - (portRef O (instanceRef state_machine_un3_bgack_030_int_d_i)) - (portRef I1 (instanceRef un1_bgack_030_int_d)) - )) - (net AMIGA_BUS_ENABLE_INT_1_sqmuxa_i (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_INT_1_sqmuxa_i)) - (portRef I0 (instanceRef un1_bgack_030_int_d)) - )) - (net un1_bgack_030_int_d_0 (joined - (portRef O (instanceRef un1_bgack_030_int_d)) - (portRef I0 (instanceRef un1_bgack_030_int_d_i)) - )) - (net RW_c_i (joined - (portRef O (instanceRef RW_c_i)) - (portRef I1 (instanceRef state_machine_RW_000_INT_4)) - )) - (net (rename state_machine_RW_000_INT_4_0 "state_machine.RW_000_INT_4_0") (joined - (portRef O (instanceRef state_machine_RW_000_INT_4)) - (portRef I0 (instanceRef state_machine_RW_000_INT_4_i)) - )) - (net N_91_0 (joined - (portRef O (instanceRef un1_RW_000_INT_0_sqmuxa_2_i)) - (portRef I0 (instanceRef un1_RW_000_INT_0_sqmuxa_2_i_i)) - )) - (net N_117_i (joined - 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)) - (net (rename DSACK1_INT_0_un1 "DSACK1_INT_0.un1") (joined - (portRef O (instanceRef DSACK1_INT_0_m)) - (portRef I0 (instanceRef DSACK1_INT_0_p)) - )) - (net (rename DSACK1_INT_0_un0 "DSACK1_INT_0.un0") (joined - (portRef O (instanceRef DSACK1_INT_0_n)) - (portRef I1 (instanceRef DSACK1_INT_0_p)) - )) - (net (rename RW_000_DMA_0_un3 "RW_000_DMA_0.un3") (joined - (portRef O (instanceRef RW_000_DMA_0_r)) - (portRef I1 (instanceRef RW_000_DMA_0_n)) - )) - (net (rename RW_000_DMA_0_un1 "RW_000_DMA_0.un1") (joined - (portRef O (instanceRef RW_000_DMA_0_m)) - (portRef I0 (instanceRef RW_000_DMA_0_p)) - )) - (net (rename RW_000_DMA_0_un0 "RW_000_DMA_0.un0") (joined - (portRef O (instanceRef RW_000_DMA_0_n)) - (portRef I1 (instanceRef RW_000_DMA_0_p)) - )) - (net (rename DS_000_DMA_0_un3 "DS_000_DMA_0.un3") (joined - (portRef O (instanceRef DS_000_DMA_0_r)) - (portRef I1 (instanceRef DS_000_DMA_0_n)) - )) - (net (rename DS_000_DMA_0_un1 "DS_000_DMA_0.un1") (joined - (portRef O (instanceRef DS_000_DMA_0_m)) - (portRef I0 (instanceRef DS_000_DMA_0_p)) - )) - (net (rename DS_000_DMA_0_un0 "DS_000_DMA_0.un0") (joined - (portRef O (instanceRef DS_000_DMA_0_n)) - (portRef I1 (instanceRef DS_000_DMA_0_p)) - )) - (net (rename AS_000_DMA_0_un3 "AS_000_DMA_0.un3") (joined - (portRef O (instanceRef AS_000_DMA_0_r)) - (portRef I1 (instanceRef AS_000_DMA_0_n)) - )) - (net (rename AS_000_DMA_0_un1 "AS_000_DMA_0.un1") (joined - (portRef O (instanceRef AS_000_DMA_0_m)) - (portRef I0 (instanceRef AS_000_DMA_0_p)) - )) - (net (rename AS_000_DMA_0_un0 "AS_000_DMA_0.un0") (joined - (portRef O (instanceRef AS_000_DMA_0_n)) - (portRef I1 (instanceRef AS_000_DMA_0_p)) - )) - (net (rename CLK_030_H_0_un3 "CLK_030_H_0.un3") (joined - (portRef O (instanceRef CLK_030_H_0_r)) - (portRef I1 (instanceRef CLK_030_H_0_n)) - )) - (net (rename CLK_030_H_0_un1 "CLK_030_H_0.un1") (joined - (portRef O (instanceRef CLK_030_H_0_m)) - (portRef I0 (instanceRef CLK_030_H_0_p)) - )) - (net (rename CLK_030_H_0_un0 "CLK_030_H_0.un0") (joined - (portRef O (instanceRef CLK_030_H_0_n)) - (portRef I1 (instanceRef CLK_030_H_0_p)) - )) - (net (rename LDS_000_INT_0_un3 "LDS_000_INT_0.un3") (joined - (portRef O (instanceRef LDS_000_INT_0_r)) - (portRef I1 (instanceRef LDS_000_INT_0_n)) - )) - (net (rename LDS_000_INT_0_un1 "LDS_000_INT_0.un1") (joined - (portRef O (instanceRef LDS_000_INT_0_m)) - (portRef I0 (instanceRef LDS_000_INT_0_p)) - )) - (net (rename LDS_000_INT_0_un0 "LDS_000_INT_0.un0") (joined - (portRef O (instanceRef LDS_000_INT_0_n)) - (portRef I1 (instanceRef LDS_000_INT_0_p)) - )) - (net (rename VMA_INT_0_un3 "VMA_INT_0.un3") (joined - (portRef O (instanceRef VMA_INT_0_r)) - (portRef I1 (instanceRef VMA_INT_0_n)) - )) - (net (rename VMA_INT_0_un1 "VMA_INT_0.un1") (joined - (portRef O (instanceRef VMA_INT_0_m)) - (portRef I0 (instanceRef VMA_INT_0_p)) - )) - (net (rename VMA_INT_0_un0 "VMA_INT_0.un0") (joined - (portRef O (instanceRef VMA_INT_0_n)) - (portRef I1 (instanceRef VMA_INT_0_p)) - )) - (net (rename UDS_000_INT_0_un3 "UDS_000_INT_0.un3") (joined - (portRef O (instanceRef UDS_000_INT_0_r)) - (portRef I1 (instanceRef UDS_000_INT_0_n)) - )) - (net (rename UDS_000_INT_0_un1 "UDS_000_INT_0.un1") (joined - (portRef O (instanceRef UDS_000_INT_0_m)) - (portRef I0 (instanceRef UDS_000_INT_0_p)) - )) - (net (rename UDS_000_INT_0_un0 "UDS_000_INT_0.un0") (joined - (portRef O (instanceRef UDS_000_INT_0_n)) - (portRef I1 (instanceRef UDS_000_INT_0_p)) - )) - (net (rename BG_000_0_un3 "BG_000_0.un3") (joined - (portRef O (instanceRef BG_000_0_r)) - (portRef I1 (instanceRef BG_000_0_n)) - )) - (net (rename BG_000_0_un1 "BG_000_0.un1") (joined - (portRef O (instanceRef BG_000_0_m)) - (portRef I0 (instanceRef BG_000_0_p)) - )) - (net (rename BG_000_0_un0 "BG_000_0.un0") (joined - (portRef O (instanceRef BG_000_0_n)) - (portRef I1 (instanceRef BG_000_0_p)) - )) - ) - (property orig_inst_of (string "BUS68030")) - ) - ) - ) - (design BUS68030 (cellRef BUS68030 (libraryRef work))) -) diff --git a/Logic/BUS68030.fse b/Logic/BUS68030.fse index 639ee04..0e80150 100644 --- a/Logic/BUS68030.fse +++ b/Logic/BUS68030.fse @@ -1,20 +1,20 @@ -fsm_encoding {7141321411} onehot +fsm_encoding {7143321431} onehot -fsm_state_encoding {7141321411} idle_p {00000001} +fsm_state_encoding {7143321431} idle_p {00000001} -fsm_state_encoding {7141321411} idle_n {00000010} +fsm_state_encoding {7143321431} idle_n {00000010} -fsm_state_encoding {7141321411} as_set_p {00000100} +fsm_state_encoding {7143321431} as_set_p {00000100} -fsm_state_encoding {7141321411} as_set_n {00001000} +fsm_state_encoding {7143321431} as_set_n {00001000} -fsm_state_encoding {7141321411} sample_dtack_p {00010000} +fsm_state_encoding {7143321431} sample_dtack_p {00010000} -fsm_state_encoding {7141321411} data_fetch_n {00100000} +fsm_state_encoding {7143321431} data_fetch_n {00100000} -fsm_state_encoding {7141321411} data_fetch_p {01000000} +fsm_state_encoding {7143321431} data_fetch_p {01000000} -fsm_state_encoding {7141321411} end_cycle_n {10000000} +fsm_state_encoding {7143321431} end_cycle_n {10000000} -fsm_registers {7141321411} {SM_AMIGA[0]} {SM_AMIGA[1]} {SM_AMIGA[2]} {SM_AMIGA[3]} {SM_AMIGA[4]} {SM_AMIGA[5]} {SM_AMIGA[6]} {SM_AMIGA[7]} +fsm_registers {7143321431} {SM_AMIGA[0]} {SM_AMIGA[1]} {SM_AMIGA[2]} {SM_AMIGA[3]} {SM_AMIGA[4]} {SM_AMIGA[5]} {SM_AMIGA[6]} {SM_AMIGA[7]} diff --git a/Logic/BUS68030.naf b/Logic/BUS68030.naf deleted file mode 100644 index 4f2e455..0000000 --- a/Logic/BUS68030.naf +++ /dev/null @@ -1,60 +0,0 @@ -AS_030 b -AS_000 b -RW_000 b -DS_030 b -UDS_000 b -LDS_000 b -SIZE[1] b -SIZE[0] b -A[31] i -A[30] i -A[29] i -A[28] i -A[27] i -A[26] i -A[25] i -A[24] i -A[23] i -A[22] i -A[21] i -A[20] i -A[19] i -A[18] i -A[17] i -A[16] i -A0 b -nEXP_SPACE i -BERR b -BG_030 i -BG_000 o -BGACK_030 o -BGACK_000 i -CLK_030 i -CLK_000 i -CLK_OSZI i -CLK_DIV_OUT o -CLK_EXP o -FPU_CS o -FPU_SENSE i -IPL_030[2] o -IPL_030[1] o -IPL_030[0] o -IPL[2] i -IPL[1] i -IPL[0] i -DSACK1 b -DTACK b -AVEC o -E o -VPA i -VMA o -RST i -RESET o -RW b -FC[1] i -FC[0] i -AMIGA_ADDR_ENABLE o -AMIGA_BUS_DATA_DIR o -AMIGA_BUS_ENABLE_LOW o -AMIGA_BUS_ENABLE_HIGH o -CIIN o diff --git a/Logic/BUS68030.prj b/Logic/BUS68030.prj index 56bd6e7..dc1b84a 100644 --- a/Logic/BUS68030.prj +++ b/Logic/BUS68030.prj @@ -1,6 +1,6 @@ #-- Lattice Semiconductor Corporation Ltd. #-- Synplify OEM project file c:/users/matze/documents/github/68030tk/logic\BUS68030.prj -#-- Written on Tue Aug 26 20:07:08 2014 +#-- Written on Tue Sep 16 14:49:27 2014 #device options diff --git a/Logic/Programming.xcf b/Logic/Programming.xcf index de99a78..8f3c59f 100644 --- a/Logic/Programming.xcf +++ b/Logic/Programming.xcf @@ -19,8 +19,8 @@ 0 C:\Users\Matze\Documents\GitHub\68030tk\Logic\68030_tk.jed - 08/26/14 20:07:19 - 0x434A + 09/06/14 22:01:13 + 0x1CFA Erase,Program,Verify