From 1152df45a69229b8e5afabb844ba9755b68113f1 Mon Sep 17 00:00:00 2001 From: MHeinrichs Date: Wed, 30 Nov 2016 23:10:23 +0100 Subject: [PATCH] Better timing & Resetfix --- Logic/68030-68000-bus.vhd | 73 +- Logic/68030_TK.tcl | 10232 ++++++++++++++++ Logic/68030_tk.bl2 | 2823 +++-- Logic/68030_tk.bl3 | 1007 +- Logic/68030_tk.crf | 2 +- Logic/68030_tk.eq3 | 350 +- Logic/68030_tk.fti | 219 +- Logic/68030_tk.grp | 31 +- Logic/68030_tk.ipr | 2 +- Logic/68030_tk.jed | 955 +- Logic/68030_tk.lco | 131 +- Logic/68030_tk.out | 6701 +++++++++- Logic/68030_tk.plc | 152 +- Logic/68030_tk.prd | 1069 +- Logic/68030_tk.rpt | 1108 +- Logic/68030_tk.tal | 23 +- Logic/68030_tk.tt2 | 1005 +- Logic/68030_tk.tt3 | 1005 +- Logic/68030_tk.tt4 | 478 +- Logic/68030_tk.tte | 478 +- Logic/68030_tk.vcl | 73 +- Logic/68030_tk.vco | 135 +- Logic/68030_tk.xrf | 2 +- Logic/BUS68030.bl0 | 3018 ++--- Logic/BUS68030.bl1 | 2823 +++-- Logic/BUS68030.edi | 4909 ++++---- Logic/BUS68030.fse | 20 +- Logic/BUS68030.prj | 2 +- Logic/BUS68030.srm | 5268 ++++---- Logic/BUS68030.srr | 46 +- Logic/BUS68030.srs | Bin 12782 -> 13149 bytes Logic/bus68030.exf | 909 +- Logic/bus68030.srf | 28 +- Logic/dm/BUS68030_comp.xdm | 4 +- Logic/run_options.txt | 2 +- Logic/synlog/BUS68030_multi_srs_gen.srr | 2 +- Logic/synlog/bus68030_fpga_mapper.srr | 18 +- .../report/BUS68030_compiler_errors.txt | 4 +- .../synlog/report/BUS68030_compiler_notes.txt | 4 +- .../report/BUS68030_compiler_runstatus.xml | 4 +- .../report/BUS68030_compiler_warnings.txt | 18 +- .../report/BUS68030_fpga_mapper_runstatus.xml | 2 +- Logic/syntmp/BUS68030_srr.htm | 68 +- Logic/syntmp/BUS68030_toc.htm | 2 +- Logic/syntmp/run_option.xml | 2 +- Logic/syntmp/statusReport.html | 8 +- Logic/synwork/BUS68030_comp.fdep | 20 +- Logic/synwork/BUS68030_comp.fdeporig | 20 +- Logic/synwork/BUS68030_comp.srs | Bin 12441 -> 12720 bytes Logic/synwork/BUS68030_comp.tlg | 22 +- Logic/synwork/BUS68030_mult.srs | Bin 12782 -> 13149 bytes Logic/synwork/BUS68030_mult_srs/skeleton.srs | Bin 1215 -> 1282 bytes Logic/synwork/BUS68030_s.srs | Bin 12441 -> 12720 bytes 53 files changed, 31409 insertions(+), 13868 deletions(-) diff --git a/Logic/68030-68000-bus.vhd b/Logic/68030-68000-bus.vhd index 6a74d26..7cbd345 100644 --- a/Logic/68030-68000-bus.vhd +++ b/Logic/68030-68000-bus.vhd @@ -100,6 +100,7 @@ signal SM_AMIGA : SM_68000; --signal Dout:STD_LOGIC_VECTOR(3 downto 0) := "0000"; signal AS_000_INT:STD_LOGIC := '1'; +signal AS_000_D0:STD_LOGIC := '1'; signal RW_000_INT:STD_LOGIC := '1'; signal AMIGA_BUS_ENABLE_DMA_HIGH:STD_LOGIC := '1'; signal AMIGA_BUS_ENABLE_DMA_LOW:STD_LOGIC := '1'; @@ -137,7 +138,8 @@ signal DTACK_D0: STD_LOGIC := '1'; signal RESET_OUT: STD_LOGIC := '0'; signal CLK_030_D0: STD_LOGIC := '0'; signal RST_DLY: STD_LOGIC_VECTOR ( 2 downto 0 ) := "000"; - +signal CLK_030_PE: STD_LOGIC_VECTOR ( 1 downto 0 ) := "00"; +signal AMIGA_DS: STD_LOGIC := '1'; begin CLK_000_PE <= CLK_000_D(0) AND NOT CLK_000_D(1); @@ -166,7 +168,7 @@ begin -- the external clock to the processor is generated here CLK_OUT_INT <= CLK_OUT_PRE_D; --this way we know the clock of the next state: Its like looking in the future, cool! - CLK_OUT_EXP_INT <= CLK_OUT_PRE_50; + CLK_OUT_EXP_INT <= CLK_OUT_PRE_D; --delayed Clocks and signals for edge detection CLK_000_D(0) <= CLK_000; CLK_000_D(DS_SAMPLE downto 1) <= CLK_000_D((DS_SAMPLE-1) downto 0); @@ -217,10 +219,12 @@ begin AS_030_D0 <= '1'; nEXP_SPACE_D0 <= '1'; DS_030_D0 <= '1'; - CLK_030_H <= '0'; CYCLE_DMA <= "00"; RST_DLY <= "000"; RESET_OUT <= '0'; + AS_000_D0 <='1'; + AMIGA_DS <='1'; + CLK_030_PE <= "00"; else if(CLK_000_NE='1')then @@ -246,7 +250,7 @@ begin BGACK_030_INT <= '0'; --BGACK_030_INT_PRE<= '0'; elsif ( BGACK_000='1' - AND CLK_000_PE='1' + AND CLK_000_NE='1' AND AS_000 = '1' --the amiga AS can be still active while bgack is deasserted, so wait for this signal too! ) then -- BGACK_000 is high here! --BGACK_030_INT_PRE<= '1'; @@ -269,7 +273,7 @@ begin --interrupt buffering to avoid ghost interrupts IPL_D0<=IPL; - if(IPL = IPL_D0 and CLK_000_PE = '1')then + if(IPL = IPL_D0) then --and CLK_000_PE = '1')then IPL_030<=IPL; end if; @@ -374,10 +378,20 @@ begin end case; --dma stuff + AS_000_D0 <=AS_000; + if(UDS_000='0' or LDS_000='0') then + AMIGA_DS <='0'; + else + AMIGA_DS <='1'; + end if; + if(BGACK_030_INT='0')then --set some signals NOT linked to AS_000='0' RW_000_DMA <= RW_000; -- now determine the size: if both uds and lds is set its 16 bit else 8 bit! + + + if(UDS_000='0' and LDS_000='0') then SIZE_DMA <= "10"; --16bit else @@ -389,6 +403,7 @@ begin --therefore a1 = uds --great! life is simple here! A0_DMA <= UDS_000; + --A0_DMA <= '0'; --A1 is set by the amiga side --here we determine the upper or lower half of the databus AMIGA_BUS_ENABLE_DMA_HIGH <= A(1); @@ -403,8 +418,8 @@ begin end if; if(BGACK_030_INT='0' and AS_000='0')then - -- an 68000-memory cycle is three positive edges long! - if(CLK_000_PE='1')then + -- an 68000-memory cycle is three negative edges long! + if(CLK_000_NE='1' and CYCLE_DMA<"11")then CYCLE_DMA <= CYCLE_DMA+1; end if; else @@ -412,33 +427,33 @@ begin end if; --as can only be done if we know the uds/lds! - if( BGACK_030_INT='0' - and AS_000='0' - and(UDS_000='0' or LDS_000='0') + if( CYCLE_DMA >"00" + and AS_000 = '0' + and AMIGA_DS ='0' and ( - CYCLE_DMA ="01" - or CYCLE_DMA ="10" - ) + CYCLE_DMA < "11" + or RW_000 = '1') )then --set AS_000 - if( CLK_030='1') then - AS_000_DMA <= '0'; --sampled on rising edges! + if( not(CLK_OUT_INT='0' and CLK_OUT_PRE_D ='1')) then --sampled on rising edges, so we can set AS only if the next clock is not rising!! + AS_000_DMA <= '0'; + if(RW_000='1') then + DS_000_DMA <='0'; + end if; + end if; + + if( CLK_OUT_INT='0' and CLK_OUT_PRE_D ='1' and CLK_030_PE <"11" and AS_000_DMA = '0') then --sample rising edges + CLK_030_PE <= CLK_030_PE+1; end if; - --delayed clock for write cycle - if(AS_000_DMA = '0' and CLK_030='0')then - CLK_030_H <= '1'; - end if; - - if(RW_000='1') then - DS_000_DMA <='0'; - elsif(RW_000='0' and CLK_030_H = '1' and CLK_030='1')then - DS_000_DMA <=AS_000_DMA; -- write: one clock delayed! + if(RW_000='0' and CLK_030_PE="01" and CLK_030='1')then + DS_000_DMA <= '0'; -- write: one clock delayed! end if; + else + CLK_030_PE <= "00"; AS_000_DMA <= '1'; DS_000_DMA <= '1'; - CLK_030_H <= '0'; end if; end if; @@ -452,8 +467,8 @@ begin --CLK_EXP <= CLK_030; - - RESET <= 'Z' when RESET_OUT ='1' else '0'; + RESET <= 'Z'; + --RESET <= 'Z' when RESET_OUT ='1' else '0'; --RST <= '0' when RESET_OUT_AMIGA = '1' else 'Z'; --RESET <= RESET_OUT; @@ -474,7 +489,7 @@ begin --dma stuff - DTACK <= 'Z'; --DTACK will be generated by GARY! + DTACK <= 'Z' when AS_000_DMA='1' else '0'; --DTACK will be generated by GARY! AS_030 <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' or RESET_OUT ='0' else '0' when AS_000_DMA ='0' and AS_000 ='0' else @@ -485,7 +500,7 @@ begin A(0) <= 'Z' when BGACK_030_INT ='1' OR nEXP_SPACE = '1' or RESET_OUT ='0' --tristate on CPU-Cycle else A0_DMA; --drive on DMA-Cycle A(1) <= 'Z'; - AHIGH <= "ZZZZZZZZ" when BGACK_030_INT ='1' OR nEXP_SPACE = '1' or RESET_OUT ='0' else x"00"; + AHIGH <= "ZZZZZZZZ" when BGACK_030_INT ='1' OR nEXP_SPACE = '1' OR RESET = '0' else x"00"; SIZE <= "ZZ" when BGACK_030_INT ='1' OR nEXP_SPACE = '1' else SIZE_DMA; --rw diff --git a/Logic/68030_TK.tcl b/Logic/68030_TK.tcl index d516958..7f8bbe2 100644 --- a/Logic/68030_TK.tcl +++ b/Logic/68030_TK.tcl @@ -415428,3 +415428,10235 @@ if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 6 ########## Tcl recorder end at 10/26/16 22:25:56 ########### + +########## Tcl recorder starts at 10/26/16 23:09:11 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 10/26/16 23:09:11 ########### + + +########## Tcl recorder starts at 10/26/16 23:09:11 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 10/26/16 23:09:11 ########### + + +########## Tcl recorder starts at 10/28/16 22:45:57 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 10/28/16 22:45:57 ########### + + +########## Tcl recorder starts at 10/28/16 22:45:57 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 10/28/16 22:45:57 ########### + + +########## Tcl recorder starts at 10/28/16 22:51:43 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 10/28/16 22:51:43 ########### + + +########## Tcl recorder starts at 10/28/16 22:51:44 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 10/28/16 22:51:44 ########### + + +########## Tcl recorder starts at 10/28/16 23:01:17 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 10/28/16 23:01:17 ########### + + +########## Tcl recorder starts at 10/28/16 23:01:17 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 10/28/16 23:01:17 ########### + + +########## Tcl recorder starts at 10/28/16 23:02:46 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 10/28/16 23:02:46 ########### + + +########## Tcl recorder starts at 10/28/16 23:02:46 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 10/28/16 23:02:46 ########### + + +########## Tcl recorder starts at 10/28/16 23:20:15 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 10/28/16 23:20:15 ########### + + +########## Tcl recorder starts at 10/28/16 23:20:15 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 10/28/16 23:20:15 ########### + + +########## Tcl recorder starts at 10/28/16 23:21:35 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 10/28/16 23:21:35 ########### + + +########## Tcl recorder starts at 10/28/16 23:21:35 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 10/28/16 23:21:35 ########### + + +########## Tcl recorder starts at 11/12/16 23:06:24 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:06:24 ########### + + +########## Tcl recorder starts at 11/12/16 23:06:24 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:06:24 ########### + + +########## Tcl recorder starts at 11/12/16 23:08:02 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:08:02 ########### + + +########## Tcl recorder starts at 11/12/16 23:08:03 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:08:03 ########### + + +########## Tcl recorder starts at 11/12/16 23:11:20 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:11:20 ########### + + +########## Tcl recorder starts at 11/12/16 23:11:20 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:11:20 ########### + + +########## Tcl recorder starts at 11/12/16 23:12:45 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:12:45 ########### + + +########## Tcl recorder starts at 11/12/16 23:12:45 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:12:45 ########### + + +########## Tcl recorder starts at 11/12/16 23:33:58 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:33:58 ########### + + +########## Tcl recorder starts at 11/12/16 23:33:58 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:33:59 ########### + + +########## Tcl recorder starts at 11/12/16 23:35:19 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:35:19 ########### + + +########## Tcl recorder starts at 11/12/16 23:35:19 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:35:19 ########### + + +########## Tcl recorder starts at 11/12/16 23:37:28 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:37:28 ########### + + +########## Tcl recorder starts at 11/12/16 23:37:29 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:37:29 ########### + + +########## Tcl recorder starts at 11/12/16 23:39:20 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:39:20 ########### + + +########## Tcl recorder starts at 11/12/16 23:39:20 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:39:20 ########### + + +########## Tcl recorder starts at 11/12/16 23:41:29 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:41:29 ########### + + +########## Tcl recorder starts at 11/12/16 23:41:29 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:41:30 ########### + + +########## Tcl recorder starts at 11/12/16 23:43:42 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:43:42 ########### + + +########## Tcl recorder starts at 11/12/16 23:43:42 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:43:42 ########### + + +########## Tcl recorder starts at 11/12/16 23:45:26 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:45:26 ########### + + +########## Tcl recorder starts at 11/12/16 23:45:27 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:45:27 ########### + + +########## Tcl recorder starts at 11/12/16 23:46:04 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:46:04 ########### + + +########## Tcl recorder starts at 11/12/16 23:46:16 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:46:16 ########### + + +########## Tcl recorder starts at 11/12/16 23:48:00 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:48:00 ########### + + +########## Tcl recorder starts at 11/12/16 23:48:00 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:48:00 ########### + + +########## Tcl recorder starts at 11/12/16 23:49:59 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:49:59 ########### + + +########## Tcl recorder starts at 11/12/16 23:49:59 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:49:59 ########### + + +########## Tcl recorder starts at 11/12/16 23:51:56 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:51:56 ########### + + +########## Tcl recorder starts at 11/12/16 23:51:56 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:51:56 ########### + + +########## Tcl recorder starts at 11/12/16 23:53:05 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:53:05 ########### + + +########## Tcl recorder starts at 11/12/16 23:53:05 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:53:05 ########### + + +########## Tcl recorder starts at 11/12/16 23:55:46 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:55:46 ########### + + +########## Tcl recorder starts at 11/12/16 23:55:46 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:55:46 ########### + + +########## Tcl recorder starts at 11/12/16 23:56:04 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:56:04 ########### + + +########## Tcl recorder starts at 11/12/16 23:56:05 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:56:05 ########### + + +########## Tcl recorder starts at 11/12/16 23:59:37 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:59:37 ########### + + +########## Tcl recorder starts at 11/12/16 23:59:38 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/12/16 23:59:38 ########### + + +########## Tcl recorder starts at 11/13/16 00:00:49 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/13/16 00:00:49 ########### + + +########## Tcl recorder starts at 11/13/16 00:00:49 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/13/16 00:00:49 ########### + + +########## Tcl recorder starts at 11/13/16 00:01:16 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/13/16 00:01:16 ########### + + +########## Tcl recorder starts at 11/13/16 00:01:16 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/13/16 00:01:16 ########### + + +########## Tcl recorder starts at 11/13/16 00:02:59 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/13/16 00:02:59 ########### + + +########## Tcl recorder starts at 11/13/16 00:02:59 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/13/16 00:02:59 ########### + + +########## Tcl recorder starts at 11/13/16 00:04:04 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/13/16 00:04:04 ########### + + +########## Tcl recorder starts at 11/13/16 00:04:04 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/13/16 00:04:04 ########### + + +########## Tcl recorder starts at 11/13/16 12:42:34 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/13/16 12:42:34 ########### + + +########## Tcl recorder starts at 11/13/16 12:42:35 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/13/16 12:42:35 ########### + + +########## Tcl recorder starts at 11/13/16 12:59:34 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/13/16 12:59:34 ########### + + +########## Tcl recorder starts at 11/13/16 12:59:34 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/13/16 12:59:34 ########### + + +########## Tcl recorder starts at 11/13/16 13:06:26 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/13/16 13:06:26 ########### + + +########## Tcl recorder starts at 11/13/16 13:06:26 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/13/16 13:06:26 ########### + + +########## Tcl recorder starts at 11/13/16 13:08:56 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/13/16 13:08:56 ########### + + +########## Tcl recorder starts at 11/13/16 13:08:56 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/13/16 13:08:56 ########### + + +########## Tcl recorder starts at 11/14/16 18:19:11 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 18:19:11 ########### + + +########## Tcl recorder starts at 11/14/16 18:19:11 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 18:19:11 ########### + + +########## Tcl recorder starts at 11/14/16 18:29:15 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 18:29:15 ########### + + +########## Tcl recorder starts at 11/14/16 18:29:16 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 18:29:16 ########### + + +########## Tcl recorder starts at 11/14/16 18:34:23 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 18:34:23 ########### + + +########## Tcl recorder starts at 11/14/16 18:34:23 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 18:34:23 ########### + + +########## Tcl recorder starts at 11/14/16 18:38:00 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 18:38:00 ########### + + +########## Tcl recorder starts at 11/14/16 18:38:00 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 18:38:00 ########### + + +########## Tcl recorder starts at 11/14/16 18:46:23 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 18:46:23 ########### + + +########## Tcl recorder starts at 11/14/16 18:46:23 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 18:46:23 ########### + + +########## Tcl recorder starts at 11/14/16 18:48:41 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 18:48:41 ########### + + +########## Tcl recorder starts at 11/14/16 18:48:41 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 18:48:41 ########### + + +########## Tcl recorder starts at 11/14/16 18:49:07 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 18:49:07 ########### + + +########## Tcl recorder starts at 11/14/16 18:49:07 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 18:49:07 ########### + + +########## Tcl recorder starts at 11/14/16 18:53:39 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 18:53:39 ########### + + +########## Tcl recorder starts at 11/14/16 18:53:39 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 18:53:39 ########### + + +########## Tcl recorder starts at 11/14/16 19:47:53 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 19:47:53 ########### + + +########## Tcl recorder starts at 11/14/16 19:47:53 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 19:47:53 ########### + + +########## Tcl recorder starts at 11/14/16 19:49:48 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 19:49:48 ########### + + +########## Tcl recorder starts at 11/14/16 19:49:48 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 19:49:48 ########### + + +########## Tcl recorder starts at 11/14/16 19:50:48 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 19:50:48 ########### + + +########## Tcl recorder starts at 11/14/16 19:59:29 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 19:59:29 ########### + + +########## Tcl recorder starts at 11/14/16 19:59:30 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 19:59:30 ########### + + +########## Tcl recorder starts at 11/14/16 19:59:53 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 19:59:53 ########### + + +########## Tcl recorder starts at 11/14/16 19:59:53 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 19:59:53 ########### + + +########## Tcl recorder starts at 11/14/16 21:40:40 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 21:40:40 ########### + + +########## Tcl recorder starts at 11/14/16 21:40:40 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 21:40:40 ########### + + +########## Tcl recorder starts at 11/14/16 21:43:19 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 21:43:19 ########### + + +########## Tcl recorder starts at 11/14/16 21:43:20 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 21:43:20 ########### + + +########## Tcl recorder starts at 11/14/16 21:52:38 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 21:52:38 ########### + + +########## Tcl recorder starts at 11/14/16 21:52:39 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 21:52:39 ########### + + +########## Tcl recorder starts at 11/14/16 21:56:28 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 21:56:28 ########### + + +########## Tcl recorder starts at 11/14/16 21:56:28 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 21:56:28 ########### + + +########## Tcl recorder starts at 11/14/16 21:59:05 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 21:59:05 ########### + + +########## Tcl recorder starts at 11/14/16 21:59:05 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 21:59:05 ########### + + +########## Tcl recorder starts at 11/14/16 22:05:40 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 22:05:40 ########### + + +########## Tcl recorder starts at 11/14/16 22:05:40 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 22:05:40 ########### + + +########## Tcl recorder starts at 11/14/16 22:52:35 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 22:52:35 ########### + + +########## Tcl recorder starts at 11/14/16 22:52:35 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 22:52:35 ########### + + +########## Tcl recorder starts at 11/14/16 22:57:11 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 22:57:11 ########### + + +########## Tcl recorder starts at 11/14/16 22:57:12 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/14/16 22:57:12 ########### + + +########## Tcl recorder starts at 11/18/16 19:32:21 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/18/16 19:32:21 ########### + + +########## Tcl recorder starts at 11/18/16 19:32:22 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 11/18/16 19:32:22 ########### + diff --git a/Logic/68030_tk.bl2 b/Logic/68030_tk.bl2 index bcb7cd4..8a540c0 100644 --- a/Logic/68030_tk.bl2 +++ b/Logic/68030_tk.bl2 @@ -1,440 +1,486 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Wed Oct 26 22:26:25 2016 +#$ DATE Fri Nov 18 19:32:36 2016 #$ MODULE 68030_tk -#$ PINS 75 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_030_2_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 \ -# DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BG_000 SIZE_0_ BGACK_030 AHIGH_30_ \ -# BGACK_000 AHIGH_29_ CLK_030 AHIGH_28_ CLK_000 AHIGH_27_ CLK_OSZI AHIGH_26_ CLK_DIV_OUT \ -# AHIGH_25_ CLK_EXP AHIGH_24_ FPU_CS A_DECODE_22_ FPU_SENSE A_DECODE_21_ DSACK1 \ -# A_DECODE_20_ DTACK A_DECODE_19_ AVEC A_DECODE_18_ E A_DECODE_17_ VPA A_DECODE_16_ VMA \ -# A_DECODE_15_ RST A_DECODE_14_ RESET A_DECODE_13_ RW A_DECODE_12_ AMIGA_ADDR_ENABLE \ -# A_DECODE_11_ AMIGA_BUS_DATA_DIR A_DECODE_10_ AMIGA_BUS_ENABLE_LOW A_DECODE_9_ \ -# AMIGA_BUS_ENABLE_HIGH A_DECODE_8_ CIIN A_DECODE_7_ A_DECODE_6_ A_DECODE_5_ \ -# A_DECODE_4_ A_DECODE_3_ A_DECODE_2_ A_0_ IPL_030_1_ IPL_030_0_ IPL_1_ IPL_0_ FC_0_ A_1_ -#$ NODES 598 ipl_i_2__n N_233_0 ipl_i_1__n N_360_i ipl_i_0__n N_191_i_i a_i_1__n \ -# N_192_i_i AS_000_DMA_i AS_000_i N_199_i CLK_030_H_i N_204_i AS_030_000_SYNC_i \ -# inst_BGACK_030_INTreg AMIGA_BUS_ENABLE_DMA_HIGH_i N_282_i vcc_n_n cycle_dma_i_0__n \ -# N_278_i inst_VMA_INTreg ahigh_i_30__n N_186_i gnd_n_n ahigh_i_31__n N_185_i \ -# un1_amiga_bus_enable_low ahigh_i_28__n CLK_030_c_i un7_as_030 ahigh_i_29__n N_184_0 \ -# un1_LDS_000_INT ahigh_i_26__n N_179_0 un1_UDS_000_INT ahigh_i_27__n N_251_i \ -# un10_ciin ahigh_i_24__n LDS_000_c_i un21_fpu_cs ahigh_i_25__n UDS_000_c_i un21_berr \ -# N_172_i un6_ds_030 pos_clk_un21_bgack_030_int_i_0_0_n cpu_est_2_ N_163_i cpu_est_3_ \ -# clk_000_d_i_3__n cpu_est_0_ N_115_i N_350_i cpu_est_1_ N_114_i un1_rw_i \ -# inst_AMIGA_BUS_ENABLE_DMA_HIGH un6_ds_030_i N_126_0 inst_AMIGA_BUS_ENABLE_DMA_LOW \ -# DS_000_DMA_i N_313_i inst_AS_030_D0 N_132_i N_231_i inst_AS_030_000_SYNC N_133_i \ -# N_291_i inst_BGACK_030_INT_D un7_as_030_i inst_AS_000_DMA \ -# AMIGA_BUS_ENABLE_DMA_LOW_i N_288_i inst_DS_000_DMA AS_030_c CYCLE_DMA_0_ N_287_i \ -# CYCLE_DMA_1_ AS_000_c N_340_i inst_VPA_D CLK_000_D_3_ RW_000_c N_284_i inst_DTACK_D0 \ -# inst_RESET_OUT N_275_i CLK_000_D_1_ UDS_000_c pos_clk_size_dma_6_0_1__n \ -# CLK_000_D_0_ N_268_i inst_CLK_OUT_PRE_50 LDS_000_c pos_clk_size_dma_6_0_0__n \ -# inst_CLK_OUT_PRE_D N_265_i IPL_D0_0_ size_c_0__n N_267_i IPL_D0_1_ IPL_D0_2_ \ -# size_c_1__n N_337_i CLK_000_D_2_ N_338_i CLK_000_D_4_ ahigh_c_24__n N_55_0 \ -# inst_LDS_000_INT un1_as_000_i inst_DS_000_ENABLE ahigh_c_25__n N_245_0 \ -# inst_UDS_000_INT N_229_i pos_clk_un9_bg_030_n ahigh_c_26__n SM_AMIGA_6_ N_227_i \ -# SM_AMIGA_4_ ahigh_c_27__n SM_AMIGA_1_ N_226_i SM_AMIGA_0_ ahigh_c_28__n N_246_0 \ -# SIZE_DMA_0_ N_332_i SIZE_DMA_1_ ahigh_c_29__n pos_clk_ds_000_dma_4_0_n \ -# inst_RW_000_INT N_48_0 inst_RW_000_DMA ahigh_c_30__n pos_clk_rw_000_dma_3_0_n \ -# RST_DLY_0_ N_218_i RST_DLY_1_ ahigh_c_31__n RST_DLY_2_ inst_A0_DMA un10_ciin_i \ -# pos_clk_a0_dma_3_n N_62_0 pos_clk_rw_000_dma_3_n N_215_i inst_CLK_030_H N_216_i \ -# inst_DSACK1_INT un10_amiga_bus_enable_high_i inst_AS_000_INT N_214_i SM_AMIGA_5_ \ -# N_310_0 SM_AMIGA_3_ N_24_i SM_AMIGA_2_ N_33_0 pos_clk_ds_000_dma_4_n N_23_i N_3 N_32_0 \ -# N_4 N_22_i N_31_0 N_3_i N_45_0 N_4_i N_44_0 N_15 N_15_i N_19 N_40_0 N_20 N_19_i N_22 N_36_0 \ -# N_23 N_20_i N_24 N_35_0 N_25 N_25_i N_26 N_30_0 N_27 N_26_i N_29_0 N_27_i a_decode_c_16__n \ -# N_28_0 BG_030_c_i a_decode_c_17__n pos_clk_un9_bg_030_0_n N_235_i_1 \ -# a_decode_c_18__n N_235_i_2 N_156_i_1 a_decode_c_19__n N_156_i_2 N_156_i_3 \ -# a_decode_c_20__n N_156_i_4 pos_clk_un10_sm_amiga_i_1_n a_decode_c_21__n N_176_i_1 \ -# un10_ciin_1 a_decode_c_22__n un10_ciin_2 un10_ciin_3 a_decode_c_23__n un10_ciin_4 \ -# un10_ciin_5 a_c_0__n un10_ciin_6 un10_ciin_7 a_c_1__n un10_ciin_8 SM_AMIGA_i_7_ \ -# un10_ciin_9 pos_clk_size_dma_6_0__n nEXP_SPACE_c un10_ciin_10 \ -# pos_clk_size_dma_6_1__n un10_ciin_11 N_199 BERR_c N_163_i_1 \ -# pos_clk_un21_bgack_030_int_i_0_n N_163_i_2 N_231 BG_030_c \ -# pos_clk_un21_bgack_030_int_i_0_0_1_n N_233 pos_clk_un21_bgack_030_int_i_0_0_2_n \ -# N_111 BG_000DFFreg N_138_i_1 N_112 N_138_i_2 N_113 N_59_i_1 N_114 BGACK_000_c N_59_i_2 \ -# N_115 N_233_0_1 N_245 CLK_030_c N_233_0_2 N_246 N_214_1 N_62 N_214_2 N_214_3 N_132 \ -# CLK_OSZI_c un21_fpu_cs_1 N_133 un21_berr_1_0 N_310 N_182_0_1 N_126 CLK_OUT_INTreg \ -# N_234_i_1 N_149 N_234_i_2 N_150 N_206_1 N_158 FPU_SENSE_c N_206_2 N_160 N_205_1 N_163 \ -# IPL_030DFF_0_reg N_205_2 N_172 N_352_1 N_179 IPL_030DFF_1_reg N_352_2 N_184 N_231_i_1 \ -# N_185 IPL_030DFF_2_reg N_152_i_1 N_196 N_144_i_1 N_203 ipl_c_0__n N_142_i_1 N_204 \ -# N_312_i_1 N_209 ipl_c_1__n N_236_i_1 N_214 N_148_i_1 N_215 ipl_c_2__n N_136_i_1 N_216 \ -# N_246_0_1 N_218 N_249_i_1 N_224 DTACK_c N_57_i_1 N_332 N_338_1 N_226 N_224_1 N_227 \ -# N_216_1 N_229 VPA_c N_209_1 N_337 N_203_1 N_338 N_196_1 N_265 RST_c cpu_est_0_3__un3_n \ -# N_267 cpu_est_0_3__un1_n N_268 cpu_est_0_3__un0_n N_275 RW_c rw_000_int_0_un3_n N_278 \ -# rw_000_int_0_un1_n N_282 fc_c_0__n rw_000_int_0_un0_n N_284 vma_int_0_un3_n N_340 \ -# fc_c_1__n vma_int_0_un1_n N_287 vma_int_0_un0_n N_288 cpu_est_0_1__un3_n N_291 \ -# AMIGA_BUS_DATA_DIR_c cpu_est_0_1__un1_n N_293 cpu_est_0_1__un0_n N_350 \ -# cpu_est_0_2__un3_n N_355 cpu_est_0_2__un1_n \ -# pos_clk_un21_bgack_030_int_i_0_o3_0_x2 cpu_est_0_2__un0_n pos_clk_un1_ipl_i_0_x2 \ -# N_16_i uds_000_int_0_un3_n pos_clk_un1_ipl_i_0_x2_0 N_39_0 uds_000_int_0_un1_n \ -# pos_clk_un1_ipl_i_0_x2_1 VPA_c_i uds_000_int_0_un0_n pos_clk_CYCLE_DMA_5_1_i_0_x2 \ -# N_52_0 lds_000_int_0_un3_n N_156 DTACK_c_i lds_000_int_0_un1_n N_201 N_53_0 \ -# lds_000_int_0_un0_n N_202 N_210_i bgack_030_int_0_un3_n N_154 N_211_i \ -# bgack_030_int_0_un1_n un21_berr_1 N_189_i bgack_030_int_0_un0_n N_174 \ -# un1_SM_AMIGA_0_sqmuxa_1_0 ds_000_enable_0_un3_n N_223 RW_c_i ds_000_enable_0_un1_n \ -# N_221 N_311_0 ds_000_enable_0_un0_n N_222 N_336_i size_dma_0_0__un3_n N_219 N_244_i \ -# size_dma_0_0__un1_n N_220 size_dma_0_0__un0_n pos_clk_un6_bgack_000_n N_314_0 \ -# size_dma_0_1__un3_n N_359 N_159_i size_dma_0_1__un1_n N_8 VMA_INT_i \ -# size_dma_0_1__un0_n N_14 N_352_i ipl_030_0_0__un3_n N_21 N_353_i ipl_030_0_0__un1_n \ -# N_9 N_293_i ipl_030_0_0__un0_n un1_DS_000_ENABLE_0_sqmuxa N_175_i \ -# ipl_030_0_1__un3_n N_66 N_176_i ipl_030_0_1__un1_n N_171 ipl_030_0_1__un0_n N_354 \ -# N_198_i ipl_030_0_2__un3_n N_18 N_197_i ipl_030_0_2__un1_n pos_clk_un9_clk_000_pe_n \ -# N_196_i ipl_030_0_2__un0_n cpu_est_2_1__n N_183_0 a0_dma_0_un3_n cpu_est_2_2__n \ -# N_182_0 a0_dma_0_un1_n N_197 N_180_0 a0_dma_0_un0_n N_198 N_178_0 \ -# amiga_bus_enable_dma_low_0_un3_n N_208 N_82_i amiga_bus_enable_dma_low_0_un1_n \ -# N_210 N_315_i amiga_bus_enable_dma_low_0_un0_n N_315 N_351_i \ -# amiga_bus_enable_dma_high_0_un3_n N_212 N_154_0 amiga_bus_enable_dma_high_0_un1_n \ -# N_180 N_149_i amiga_bus_enable_dma_high_0_un0_n N_213 N_207_i bg_000_0_un3_n N_178 \ -# N_228_i bg_000_0_un1_n N_228 bg_000_0_un0_n N_182 N_213_i ds_000_dma_0_un3_n N_176 \ -# N_212_i ds_000_dma_0_un1_n N_183 N_309_i ds_000_dma_0_un0_n N_351 N_357_i \ -# as_000_dma_0_un3_n N_357 cpu_est_2_0_2__n as_000_dma_0_un1_n N_206 N_208_i \ -# as_000_dma_0_un0_n N_205 N_209_i as_030_000_sync_0_un3_n N_352 cpu_est_2_0_1__n \ -# as_030_000_sync_0_un1_n N_353 N_206_i as_030_000_sync_0_un0_n N_314 N_205_i \ -# rw_000_dma_0_un3_n N_244 pos_clk_un9_clk_000_pe_0_n rw_000_dma_0_un1_n N_336 N_18_i \ -# rw_000_dma_0_un0_n N_311 N_37_0 a_decode_15__n un1_SM_AMIGA_0_sqmuxa_1 N_171_i N_211 \ -# N_354_i a_decode_14__n N_16 un1_DS_000_ENABLE_0_sqmuxa_0 \ -# un1_amiga_bus_enable_low_i N_66_0 a_decode_13__n un21_fpu_cs_i UDS_000_INT_i \ -# cpu_est_i_2__n un1_UDS_000_INT_0 a_decode_12__n cpu_est_i_0__n LDS_000_INT_i \ -# VPA_D_i un1_LDS_000_INT_0 a_decode_11__n DTACK_D0_i N_21_i cpu_est_i_3__n N_34_0 \ -# a_decode_10__n sm_amiga_i_i_7__n N_14_i sm_amiga_i_5__n N_41_0 a_decode_9__n \ -# sm_amiga_i_3__n N_8_i cpu_est_i_1__n N_42_0 a_decode_8__n clk_000_d_i_1__n \ -# a_c_i_0__n N_355_i_0 size_c_i_1__n a_decode_7__n sm_amiga_i_4__n \ -# pos_clk_un10_sm_amiga_i_n sm_amiga_i_2__n N_359_i a_decode_6__n rst_dly_i_0__n \ -# pos_clk_un6_bgack_000_0_n rst_dly_i_2__n N_220_i a_decode_5__n a_decode_i_19__n \ -# N_219_i a_decode_i_18__n a_decode_4__n a_decode_i_16__n N_222_i RW_000_i N_221_i \ -# a_decode_3__n sm_amiga_i_0__n AS_030_i N_223_i a_decode_2__n AS_000_INT_i N_224_i \ -# DSACK1_INT_i AMIGA_BUS_DATA_DIR_c_0 clk_000_d_i_0__n N_150_i sm_amiga_i_6__n \ -# N_156_i sm_amiga_i_1__n N_160_i FPU_SENSE_i N_174_i rst_dly_i_1__n N_158_i \ -# AS_030_D0_i N_201_i BGACK_030_INT_i N_202_i nEXP_SPACE_i N_203_i RESET_OUT_i +#$ PINS 75 A_DECODE_2_ A_0_ SIZE_1_ IPL_030_1_ IPL_030_0_ AHIGH_31_ IPL_1_ IPL_0_ \ +# A_DECODE_23_ FC_0_ A_1_ IPL_030_2_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 DS_030 UDS_000 \ +# LDS_000 nEXP_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI \ +# CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 DTACK AVEC SIZE_0_ E AHIGH_30_ VPA AHIGH_29_ \ +# VMA AHIGH_28_ RST AHIGH_27_ RESET AHIGH_26_ RW AHIGH_25_ AMIGA_ADDR_ENABLE AHIGH_24_ \ +# AMIGA_BUS_DATA_DIR A_DECODE_22_ AMIGA_BUS_ENABLE_LOW A_DECODE_21_ \ +# AMIGA_BUS_ENABLE_HIGH A_DECODE_20_ CIIN A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ \ +# A_DECODE_16_ A_DECODE_15_ A_DECODE_14_ A_DECODE_13_ A_DECODE_12_ A_DECODE_11_ \ +# A_DECODE_10_ A_DECODE_9_ A_DECODE_8_ A_DECODE_7_ A_DECODE_6_ A_DECODE_5_ A_DECODE_4_ \ +# A_DECODE_3_ +#$ NODES 609 clk_000_d_i_1__n VPA_D_i N_125_i a_decode_2__n VMA_INT_i N_124_i \ +# sm_amiga_i_0__n N_53_0 rst_dly_i_2__n N_134_i rst_dly_i_1__n N_270_0 rst_dly_i_0__n \ +# N_77_i DSACK1_INT_i N_87_i inst_BGACK_030_INTreg N_137_i_0 N_112_i vcc_n_n DTACK_D0_i \ +# N_113_i inst_VMA_INTreg BGACK_030_INT_i N_114_i gnd_n_n nEXP_SPACE_i \ +# un1_amiga_bus_enable_low AS_000_DMA_i N_109_i un7_as_030 RW_000_i N_108_i \ +# un1_LDS_000_INT clk_030_pe_i_1__n N_111_i un1_UDS_000_INT DS_000_DMA_0_sqmuxa_i \ +# N_265_2_0 un1_SM_AMIGA_0_sqmuxa_1 pos_clk_un4_rw_000_i_n un10_ciin AS_000_i \ +# un1_as_000_i un21_fpu_cs AMIGA_DS_i VPA_c_i un21_berr pos_clk_un3_clk_out_int_i_n \ +# N_52_0 un6_ds_030 cycle_dma_i_0__n DTACK_c_i un13_ciin cycle_dma_i_1__n N_48_0 \ +# cpu_est_1_ pos_clk_as_000_dma6_i_n un3_ahigh_i cpu_est_2_ DS_000_DMA_i \ +# pos_clk_un4_bgack_000_i_n cpu_est_3_ CLK_EXP_i pos_clk_un6_bgack_000_0_n \ +# cpu_est_0_ AMIGA_BUS_ENABLE_DMA_LOW_i N_7_i inst_AMIGA_BUS_ENABLE_DMA_HIGH \ +# ahigh_i_25__n N_41_0 inst_AMIGA_BUS_ENABLE_DMA_LOW ahigh_i_24__n \ +# pos_clk_un1_bgack_030_int_0_n inst_AS_030_D0 ahigh_i_27__n \ +# pos_clk_un12_clk_out_int_0_n inst_AS_030_000_SYNC ahigh_i_26__n pos_clk_un3_0_n \ +# inst_BGACK_030_INT_D ahigh_i_29__n pos_clk_un15_bgack_030_int_i_n inst_AS_000_DMA \ +# ahigh_i_28__n N_3_i inst_DS_000_DMA ahigh_i_31__n N_43_0 inst_VPA_D ahigh_i_30__n \ +# N_4_i CLK_000_D_3_ a_i_1__n N_42_0 inst_DTACK_D0 AMIGA_BUS_ENABLE_DMA_HIGH_i \ +# un6_amiga_bus_data_dir_i inst_RESET_OUT AS_030_D0_i un12_amiga_bus_data_dir_m_i \ +# CLK_030_PE_1_ un10_ciin_i AMIGA_BUS_DATA_DIR_c_0 inst_AMIGA_DS FPU_SENSE_i N_22_i \ +# CLK_000_D_1_ AS_030_000_SYNC_i N_31_0 CLK_000_D_0_ a_decode_i_16__n N_21_i \ +# inst_CLK_OUT_PRE_50 a_decode_i_18__n N_32_0 inst_CLK_OUT_PRE_D a_decode_i_19__n \ +# N_19_i IPL_D0_0_ N_224_i N_34_0 IPL_D0_1_ N_225_i N_18_i IPL_D0_2_ N_226_i N_35_0 \ +# CLK_000_D_2_ pos_clk_un5_bgack_030_int_d_i_n CLK_000_D_4_ \ +# pos_clk_amiga_bus_enable_dma_high_3_0_n pos_clk_un6_bg_030_n \ +# pos_clk_amiga_bus_enable_dma_low_3_0_n pos_clk_ipl_n pos_clk_rw_000_dma_3_0_n \ +# inst_LDS_000_INT un13_ciin_i UDS_000_c_i inst_DS_000_ENABLE un6_ds_030_i \ +# LDS_000_c_i inst_UDS_000_INT N_123_i N_86_i SM_AMIGA_6_ N_122_i N_129_i SM_AMIGA_4_ \ +# un7_as_030_i N_130_i SM_AMIGA_1_ AS_030_c un11_amiga_bus_enable_high_i SM_AMIGA_0_ \ +# N_117_i SIZE_DMA_0_ AS_000_c N_46_0 SIZE_DMA_1_ N_107_i CYCLE_DMA_0_ RW_000_c \ +# pos_clk_size_dma_6_0_0__n CYCLE_DMA_1_ N_106_i CLK_030_PE_0_ \ +# pos_clk_size_dma_6_0_1__n inst_RW_000_INT UDS_000_c N_16_i inst_RW_000_DMA N_254_i \ +# RST_DLY_0_ LDS_000_c N_263_i RST_DLY_1_ N_250_i RST_DLY_2_ size_c_0__n N_256_i \ +# inst_A0_DMA N_189_i pos_clk_rw_000_int_5_n size_c_1__n N_101_i inst_DSACK1_INT \ +# inst_AS_000_INT ahigh_c_24__n N_103_i SM_AMIGA_5_ N_104_i SM_AMIGA_3_ ahigh_c_25__n \ +# SM_AMIGA_2_ N_105_i ahigh_c_26__n N_115_i ahigh_c_27__n N_116_i ahigh_c_28__n N_131_i \ +# N_277_i ahigh_c_29__n N_64_0 N_91_0 ahigh_c_30__n N_159_0 N_14 N_85_i N_15 \ +# ahigh_c_31__n un1_SM_AMIGA_0_sqmuxa_1_0 N_24 RW_c_i N_25 pos_clk_rw_000_int_5_0_n \ +# clk_000_d_i_3__n N_25_i N_28_0 N_24_i N_27_0 ipl_c_i_1__n N_50_0 ipl_c_i_0__n N_49_0 \ +# N_14_i N_39_0 N_15_i N_38_0 N_91_0_1 N_91_0_2 N_91_0_3 N_265_i_1 N_266_i_1 N_266_i_2 \ +# N_138_i_1 N_148_i_1 N_144_i_1 N_142_i_1 N_140_i_1 SM_AMIGA_i_7_ \ +# pos_clk_un10_sm_amiga_i_1_n N_76 N_85_i_1 G_122 N_85_i_2 G_123 a_decode_c_16__n \ +# N_277_1 G_124 N_277_2 un1_rst_2_1 a_decode_c_17__n N_277_3 cpu_est_0_0_ N_277_4 N_64 \ +# a_decode_c_18__n N_277_5 N_122 un10_ciin_1 N_123 a_decode_c_19__n un10_ciin_2 N_132 \ +# un10_ciin_3 N_133 a_decode_c_20__n un10_ciin_4 N_274 un10_ciin_5 N_276 \ +# a_decode_c_21__n un10_ciin_6 N_77 un10_ciin_7 N_79 a_decode_c_22__n un10_ciin_8 N_78 \ +# un10_ciin_9 N_263 a_decode_c_23__n un10_ciin_10 N_108 un10_ciin_11 N_114 a_c_0__n \ +# un6_amiga_bus_data_dir_1 N_85 un6_amiga_bus_data_dir_2 N_104 a_c_1__n \ +# pos_clk_as_000_dma6_1_n N_91 pos_clk_as_000_dma6_2_n N_131 nEXP_SPACE_c \ +# DS_000_DMA_1_sqmuxa_1 N_277 pos_clk_un4_rw_000_1_n N_130 BERR_c \ +# pos_clk_un4_rw_000_2_n N_115 pos_clk_un13_clk_out_int_1_n N_116 BG_030_c N_125_1 \ +# N_105 N_116_1 N_103 BG_000DFFreg pos_clk_un29_clk_000_ne_1_1_n N_101 \ +# pos_clk_un29_clk_000_ne_1_2_n N_259 pos_clk_un29_clk_000_ne_1_3_n N_255 \ +# BGACK_000_c N_261_1 N_256 N_261_2 N_254 CLK_030_c N_262_1 N_16 N_262_2 N_106 \ +# DS_000_ENABLE_0_sqmuxa_1_1 N_86 N_259_1 N_107 CLK_OSZI_c N_250_i_1 N_117 N_189_i_1 \ +# pos_clk_a0_dma_3_n pos_clk_un6_bg_030_1_n N_129 CLK_OUT_INTreg N_108_1 \ +# pos_clk_size_dma_6_1__n N_114_1 pos_clk_size_dma_6_0__n un21_berr_1 \ +# pos_clk_rw_000_dma_3_n FPU_SENSE_c un21_fpu_cs_1 \ +# pos_clk_amiga_bus_enable_dma_low_3_n N_130_1 \ +# pos_clk_amiga_bus_enable_dma_high_3_n IPL_030DFF_0_reg N_136_i_1 \ +# SIZE_DMA_3_sqmuxa N_152_i_1 pos_clk_un5_bgack_030_int_d_n IPL_030DFF_1_reg \ +# N_146_i_1 N_18 N_267_i_1 N_19 IPL_030DFF_2_reg pos_clk_ipl_1_n N_21 bg_000_0_un3_n \ +# N_22 ipl_c_0__n bg_000_0_un1_n un6_amiga_bus_data_dir bg_000_0_un0_n \ +# un12_amiga_bus_data_dir_m ipl_c_1__n uds_000_int_0_un3_n \ +# pos_clk_un3_clk_out_int_n uds_000_int_0_un1_n N_3 ipl_c_2__n uds_000_int_0_un0_n \ +# pos_clk_as_000_dma6_n lds_000_int_0_un3_n DS_000_DMA_1_sqmuxa lds_000_int_0_un1_n \ +# N_4 DTACK_c lds_000_int_0_un0_n AS_000_DMA_1_sqmuxa ds_000_enable_0_un3_n un1_rst_2 \ +# ds_000_enable_0_un1_n G_97 ds_000_enable_0_un0_n N_199 VPA_c ipl_030_0_2__un3_n \ +# pos_clk_un13_bgack_030_int_n ipl_030_0_2__un1_n N_205 ipl_030_0_2__un0_n \ +# pos_clk_un13_clk_out_int_n RST_c vma_int_0_un3_n pos_clk_un15_bgack_030_int_n \ +# vma_int_0_un1_n pos_clk_un3_n RESET_c vma_int_0_un0_n pos_clk_un12_clk_out_int_n \ +# cpu_est_0_1__un3_n pos_clk_un1_bgack_030_int_n RW_c cpu_est_0_1__un1_n \ +# DS_000_DMA_0_sqmuxa cpu_est_0_1__un0_n un1_rst_3 fc_c_0__n cpu_est_0_2__un3_n G_95 \ +# cpu_est_0_2__un1_n G_101 fc_c_1__n cpu_est_0_2__un0_n G_103 cpu_est_0_3__un3_n \ +# pos_clk_un4_rw_000_n cpu_est_0_3__un1_n N_7 AMIGA_BUS_DATA_DIR_c \ +# cpu_est_0_3__un0_n pos_clk_un6_bgack_000_n pos_clk_un31_clk_000_ne_1_i_m2_un3_n \ +# pos_clk_un4_bgack_000_n pos_clk_un31_clk_000_ne_1_i_m2_un1_n N_265_2 \ +# pos_clk_un31_clk_000_ne_1_i_m2_un0_n N_111 bgack_030_int_0_un3_n N_109 BG_030_c_i \ +# bgack_030_int_0_un1_n N_113 pos_clk_un6_bg_030_i_n bgack_030_int_0_un0_n N_112 \ +# pos_clk_un9_bg_030_0_n ds_000_dma_0_un3_n N_98 UDS_000_INT_i ds_000_dma_0_un1_n \ +# pos_clk_un29_clk_000_ne_1_n un1_UDS_000_INT_0 ds_000_dma_0_un0_n N_87 \ +# LDS_000_INT_i as_000_dma_0_un3_n N_270 un1_LDS_000_INT_0 as_000_dma_0_un1_n N_134 \ +# N_23_i as_000_dma_0_un0_n N_125 N_30_0 size_dma_0_1__un3_n N_124 N_20_i \ +# size_dma_0_1__un1_n N_121 N_33_0 size_dma_0_1__un0_n N_120 N_13_i \ +# size_dma_0_0__un3_n N_137 N_40_0 size_dma_0_0__un1_n pos_clk_un31_clk_000_ne_n \ +# ipl_c_i_2__n size_dma_0_0__un0_n N_17 N_51_0 amiga_bus_enable_dma_high_0_un3_n \ +# pos_clk_un9_clk_000_pe_n N_26_i amiga_bus_enable_dma_high_0_un1_n cpu_est_2_1__n \ +# N_29_0 amiga_bus_enable_dma_high_0_un0_n cpu_est_2_2__n a_c_i_0__n \ +# amiga_bus_enable_dma_low_0_un3_n N_261 size_c_i_1__n \ +# amiga_bus_enable_dma_low_0_un1_n N_262 pos_clk_un10_sm_amiga_i_n \ +# amiga_bus_enable_dma_low_0_un0_n N_251 DS_000_ENABLE_0_sqmuxa_1_i a0_dma_0_un3_n \ +# N_252 un1_DS_000_ENABLE_0_sqmuxa_i a0_dma_0_un1_n N_258 N_157_i a0_dma_0_un0_n N_257 \ +# N_160_0 rw_000_dma_0_un3_n DS_000_ENABLE_1_sqmuxa N_161_0 rw_000_dma_0_un1_n \ +# un1_DS_000_ENABLE_0_sqmuxa N_162_0 rw_000_dma_0_un0_n N_102 N_165_i \ +# ipl_030_0_0__un3_n N_118 ipl_030_0_0__un1_n N_119 N_167_i ipl_030_0_0__un0_n N_264 \ +# N_166_i ipl_030_0_1__un3_n DS_000_ENABLE_0_sqmuxa_1 ipl_030_0_1__un1_n N_164 \ +# N_168_i ipl_030_0_1__un0_n N_170 as_030_000_sync_0_un3_n N_168 N_170_i \ +# as_030_000_sync_0_un1_n N_166 as_030_000_sync_0_un0_n N_167 N_164_i \ +# rw_000_int_0_un3_n N_165 rw_000_int_0_un1_n N_162 N_102_i rw_000_int_0_un0_n N_161 \ +# N_264_i a_decode_15__n N_160 N_79_i N_157 N_78_i a_decode_14__n N_26 N_119_i N_13 \ +# N_118_i a_decode_13__n N_20 N_23 N_255_i a_decode_12__n N_8 N_257_i \ +# pos_clk_un9_bg_030_n cpu_est_2_0_2__n a_decode_11__n un1_amiga_bus_enable_low_i \ +# N_258_i un21_fpu_cs_i N_259_i a_decode_10__n sm_amiga_i_2__n cpu_est_2_0_1__n \ +# sm_amiga_i_1__n N_262_i a_decode_9__n sm_amiga_i_3__n N_261_i sm_amiga_i_4__n \ +# pos_clk_un9_clk_000_pe_0_n a_decode_8__n sm_amiga_i_6__n N_251_i sm_amiga_i_5__n \ +# N_252_0 a_decode_7__n clk_000_d_i_0__n N_76_i AS_000_INT_i N_17_i a_decode_6__n \ +# sm_amiga_i_i_7__n N_36_0 AS_030_i N_98_i a_decode_5__n cpu_est_i_2__n \ +# pos_clk_un31_clk_000_ne_i_n cpu_est_i_0__n N_228_i a_decode_4__n cpu_est_i_3__n \ +# N_121_i cpu_est_i_1__n N_120_i a_decode_3__n .model bus68030 .inputs A_DECODE_23_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF \ -BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF \ -DTACK.BLIF VPA.BLIF RST.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF \ -A_DECODE_20_.BLIF A_DECODE_19_.BLIF A_DECODE_18_.BLIF A_DECODE_17_.BLIF \ -A_DECODE_16_.BLIF A_DECODE_15_.BLIF A_DECODE_14_.BLIF A_DECODE_13_.BLIF \ -A_DECODE_12_.BLIF A_DECODE_11_.BLIF A_DECODE_10_.BLIF A_DECODE_9_.BLIF \ -A_DECODE_8_.BLIF A_DECODE_7_.BLIF A_DECODE_6_.BLIF A_DECODE_5_.BLIF \ -A_DECODE_4_.BLIF A_DECODE_3_.BLIF A_DECODE_2_.BLIF IPL_1_.BLIF IPL_0_.BLIF \ -FC_0_.BLIF A_1_.BLIF SIZE_1_.BLIF AHIGH_31_.BLIF AS_030.BLIF AS_000.BLIF \ -RW_000.BLIF UDS_000.BLIF LDS_000.BLIF BERR.BLIF RW.BLIF SIZE_0_.BLIF \ -AHIGH_30_.BLIF AHIGH_29_.BLIF AHIGH_28_.BLIF AHIGH_27_.BLIF AHIGH_26_.BLIF \ -AHIGH_25_.BLIF AHIGH_24_.BLIF A_0_.BLIF ipl_i_2__n.BLIF N_233_0.BLIF \ -ipl_i_1__n.BLIF N_360_i.BLIF ipl_i_0__n.BLIF N_191_i_i.BLIF a_i_1__n.BLIF \ -N_192_i_i.BLIF AS_000_DMA_i.BLIF AS_000_i.BLIF N_199_i.BLIF CLK_030_H_i.BLIF \ -N_204_i.BLIF AS_030_000_SYNC_i.BLIF inst_BGACK_030_INTreg.BLIF \ -AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF N_282_i.BLIF vcc_n_n.BLIF \ -cycle_dma_i_0__n.BLIF N_278_i.BLIF inst_VMA_INTreg.BLIF ahigh_i_30__n.BLIF \ -N_186_i.BLIF gnd_n_n.BLIF ahigh_i_31__n.BLIF N_185_i.BLIF \ -un1_amiga_bus_enable_low.BLIF ahigh_i_28__n.BLIF CLK_030_c_i.BLIF \ -un7_as_030.BLIF ahigh_i_29__n.BLIF N_184_0.BLIF un1_LDS_000_INT.BLIF \ -ahigh_i_26__n.BLIF N_179_0.BLIF un1_UDS_000_INT.BLIF ahigh_i_27__n.BLIF \ -N_251_i.BLIF un10_ciin.BLIF ahigh_i_24__n.BLIF LDS_000_c_i.BLIF \ -un21_fpu_cs.BLIF ahigh_i_25__n.BLIF UDS_000_c_i.BLIF un21_berr.BLIF \ -N_172_i.BLIF un6_ds_030.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF \ -cpu_est_2_.BLIF N_163_i.BLIF cpu_est_3_.BLIF clk_000_d_i_3__n.BLIF \ -cpu_est_0_.BLIF N_115_i.BLIF N_350_i.BLIF cpu_est_1_.BLIF N_114_i.BLIF \ -un1_rw_i.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF un6_ds_030_i.BLIF \ -N_126_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF DS_000_DMA_i.BLIF N_313_i.BLIF \ -inst_AS_030_D0.BLIF N_132_i.BLIF N_231_i.BLIF inst_AS_030_000_SYNC.BLIF \ -N_133_i.BLIF N_291_i.BLIF inst_BGACK_030_INT_D.BLIF un7_as_030_i.BLIF \ -inst_AS_000_DMA.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF N_288_i.BLIF \ -inst_DS_000_DMA.BLIF AS_030_c.BLIF CYCLE_DMA_0_.BLIF N_287_i.BLIF \ -CYCLE_DMA_1_.BLIF AS_000_c.BLIF N_340_i.BLIF inst_VPA_D.BLIF CLK_000_D_3_.BLIF \ -RW_000_c.BLIF N_284_i.BLIF inst_DTACK_D0.BLIF inst_RESET_OUT.BLIF N_275_i.BLIF \ -CLK_000_D_1_.BLIF UDS_000_c.BLIF pos_clk_size_dma_6_0_1__n.BLIF \ -CLK_000_D_0_.BLIF N_268_i.BLIF inst_CLK_OUT_PRE_50.BLIF LDS_000_c.BLIF \ -pos_clk_size_dma_6_0_0__n.BLIF inst_CLK_OUT_PRE_D.BLIF N_265_i.BLIF \ -IPL_D0_0_.BLIF size_c_0__n.BLIF N_267_i.BLIF IPL_D0_1_.BLIF IPL_D0_2_.BLIF \ -size_c_1__n.BLIF N_337_i.BLIF CLK_000_D_2_.BLIF N_338_i.BLIF CLK_000_D_4_.BLIF \ -ahigh_c_24__n.BLIF N_55_0.BLIF inst_LDS_000_INT.BLIF un1_as_000_i.BLIF \ -inst_DS_000_ENABLE.BLIF ahigh_c_25__n.BLIF N_245_0.BLIF inst_UDS_000_INT.BLIF \ -N_229_i.BLIF pos_clk_un9_bg_030_n.BLIF ahigh_c_26__n.BLIF SM_AMIGA_6_.BLIF \ -N_227_i.BLIF SM_AMIGA_4_.BLIF ahigh_c_27__n.BLIF SM_AMIGA_1_.BLIF N_226_i.BLIF \ -SM_AMIGA_0_.BLIF ahigh_c_28__n.BLIF N_246_0.BLIF SIZE_DMA_0_.BLIF N_332_i.BLIF \ -SIZE_DMA_1_.BLIF ahigh_c_29__n.BLIF pos_clk_ds_000_dma_4_0_n.BLIF \ -inst_RW_000_INT.BLIF N_48_0.BLIF inst_RW_000_DMA.BLIF ahigh_c_30__n.BLIF \ -pos_clk_rw_000_dma_3_0_n.BLIF RST_DLY_0_.BLIF N_218_i.BLIF RST_DLY_1_.BLIF \ -ahigh_c_31__n.BLIF RST_DLY_2_.BLIF inst_A0_DMA.BLIF un10_ciin_i.BLIF \ -pos_clk_a0_dma_3_n.BLIF N_62_0.BLIF pos_clk_rw_000_dma_3_n.BLIF N_215_i.BLIF \ -inst_CLK_030_H.BLIF N_216_i.BLIF inst_DSACK1_INT.BLIF \ -un10_amiga_bus_enable_high_i.BLIF inst_AS_000_INT.BLIF N_214_i.BLIF \ -SM_AMIGA_5_.BLIF N_310_0.BLIF SM_AMIGA_3_.BLIF N_24_i.BLIF SM_AMIGA_2_.BLIF \ -N_33_0.BLIF pos_clk_ds_000_dma_4_n.BLIF N_23_i.BLIF N_3.BLIF N_32_0.BLIF \ -N_4.BLIF N_22_i.BLIF N_31_0.BLIF N_3_i.BLIF N_45_0.BLIF N_4_i.BLIF N_44_0.BLIF \ -N_15.BLIF N_15_i.BLIF N_19.BLIF N_40_0.BLIF N_20.BLIF N_19_i.BLIF N_22.BLIF \ -N_36_0.BLIF N_23.BLIF N_20_i.BLIF N_24.BLIF N_35_0.BLIF N_25.BLIF N_25_i.BLIF \ -N_26.BLIF N_30_0.BLIF N_27.BLIF N_26_i.BLIF N_29_0.BLIF N_27_i.BLIF \ -a_decode_c_16__n.BLIF N_28_0.BLIF BG_030_c_i.BLIF a_decode_c_17__n.BLIF \ -pos_clk_un9_bg_030_0_n.BLIF N_235_i_1.BLIF a_decode_c_18__n.BLIF \ -N_235_i_2.BLIF N_156_i_1.BLIF a_decode_c_19__n.BLIF N_156_i_2.BLIF \ -N_156_i_3.BLIF a_decode_c_20__n.BLIF N_156_i_4.BLIF \ -pos_clk_un10_sm_amiga_i_1_n.BLIF a_decode_c_21__n.BLIF N_176_i_1.BLIF \ -un10_ciin_1.BLIF a_decode_c_22__n.BLIF un10_ciin_2.BLIF un10_ciin_3.BLIF \ -a_decode_c_23__n.BLIF un10_ciin_4.BLIF un10_ciin_5.BLIF a_c_0__n.BLIF \ -un10_ciin_6.BLIF un10_ciin_7.BLIF a_c_1__n.BLIF un10_ciin_8.BLIF \ -SM_AMIGA_i_7_.BLIF un10_ciin_9.BLIF pos_clk_size_dma_6_0__n.BLIF \ -nEXP_SPACE_c.BLIF un10_ciin_10.BLIF pos_clk_size_dma_6_1__n.BLIF \ -un10_ciin_11.BLIF N_199.BLIF BERR_c.BLIF N_163_i_1.BLIF \ -pos_clk_un21_bgack_030_int_i_0_n.BLIF N_163_i_2.BLIF N_231.BLIF BG_030_c.BLIF \ -pos_clk_un21_bgack_030_int_i_0_0_1_n.BLIF N_233.BLIF \ -pos_clk_un21_bgack_030_int_i_0_0_2_n.BLIF N_111.BLIF BG_000DFFreg.BLIF \ -N_138_i_1.BLIF N_112.BLIF N_138_i_2.BLIF N_113.BLIF N_59_i_1.BLIF N_114.BLIF \ -BGACK_000_c.BLIF N_59_i_2.BLIF N_115.BLIF N_233_0_1.BLIF N_245.BLIF \ -CLK_030_c.BLIF N_233_0_2.BLIF N_246.BLIF N_214_1.BLIF N_62.BLIF N_214_2.BLIF \ -N_214_3.BLIF N_132.BLIF CLK_OSZI_c.BLIF un21_fpu_cs_1.BLIF N_133.BLIF \ -un21_berr_1_0.BLIF N_310.BLIF N_182_0_1.BLIF N_126.BLIF CLK_OUT_INTreg.BLIF \ -N_234_i_1.BLIF N_149.BLIF N_234_i_2.BLIF N_150.BLIF N_206_1.BLIF N_158.BLIF \ -FPU_SENSE_c.BLIF N_206_2.BLIF N_160.BLIF N_205_1.BLIF N_163.BLIF \ -IPL_030DFF_0_reg.BLIF N_205_2.BLIF N_172.BLIF N_352_1.BLIF N_179.BLIF \ -IPL_030DFF_1_reg.BLIF N_352_2.BLIF N_184.BLIF N_231_i_1.BLIF N_185.BLIF \ -IPL_030DFF_2_reg.BLIF N_152_i_1.BLIF N_196.BLIF N_144_i_1.BLIF N_203.BLIF \ -ipl_c_0__n.BLIF N_142_i_1.BLIF N_204.BLIF N_312_i_1.BLIF N_209.BLIF \ -ipl_c_1__n.BLIF N_236_i_1.BLIF N_214.BLIF N_148_i_1.BLIF N_215.BLIF \ -ipl_c_2__n.BLIF N_136_i_1.BLIF N_216.BLIF N_246_0_1.BLIF N_218.BLIF \ -N_249_i_1.BLIF N_224.BLIF DTACK_c.BLIF N_57_i_1.BLIF N_332.BLIF N_338_1.BLIF \ -N_226.BLIF N_224_1.BLIF N_227.BLIF N_216_1.BLIF N_229.BLIF VPA_c.BLIF \ -N_209_1.BLIF N_337.BLIF N_203_1.BLIF N_338.BLIF N_196_1.BLIF N_265.BLIF \ -RST_c.BLIF cpu_est_0_3__un3_n.BLIF N_267.BLIF cpu_est_0_3__un1_n.BLIF \ -N_268.BLIF cpu_est_0_3__un0_n.BLIF N_275.BLIF RW_c.BLIF \ -rw_000_int_0_un3_n.BLIF N_278.BLIF rw_000_int_0_un1_n.BLIF N_282.BLIF \ -fc_c_0__n.BLIF rw_000_int_0_un0_n.BLIF N_284.BLIF vma_int_0_un3_n.BLIF \ -N_340.BLIF fc_c_1__n.BLIF vma_int_0_un1_n.BLIF N_287.BLIF vma_int_0_un0_n.BLIF \ -N_288.BLIF cpu_est_0_1__un3_n.BLIF N_291.BLIF AMIGA_BUS_DATA_DIR_c.BLIF \ -cpu_est_0_1__un1_n.BLIF N_293.BLIF cpu_est_0_1__un0_n.BLIF N_350.BLIF \ -cpu_est_0_2__un3_n.BLIF N_355.BLIF cpu_est_0_2__un1_n.BLIF \ -pos_clk_un21_bgack_030_int_i_0_o3_0_x2.BLIF cpu_est_0_2__un0_n.BLIF \ -pos_clk_un1_ipl_i_0_x2.BLIF N_16_i.BLIF uds_000_int_0_un3_n.BLIF \ -pos_clk_un1_ipl_i_0_x2_0.BLIF N_39_0.BLIF uds_000_int_0_un1_n.BLIF \ -pos_clk_un1_ipl_i_0_x2_1.BLIF VPA_c_i.BLIF uds_000_int_0_un0_n.BLIF \ -pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF N_52_0.BLIF lds_000_int_0_un3_n.BLIF \ -N_156.BLIF DTACK_c_i.BLIF lds_000_int_0_un1_n.BLIF N_201.BLIF N_53_0.BLIF \ -lds_000_int_0_un0_n.BLIF N_202.BLIF N_210_i.BLIF bgack_030_int_0_un3_n.BLIF \ -N_154.BLIF N_211_i.BLIF bgack_030_int_0_un1_n.BLIF un21_berr_1.BLIF \ -N_189_i.BLIF bgack_030_int_0_un0_n.BLIF N_174.BLIF \ -un1_SM_AMIGA_0_sqmuxa_1_0.BLIF ds_000_enable_0_un3_n.BLIF N_223.BLIF \ -RW_c_i.BLIF ds_000_enable_0_un1_n.BLIF N_221.BLIF N_311_0.BLIF \ -ds_000_enable_0_un0_n.BLIF N_222.BLIF N_336_i.BLIF size_dma_0_0__un3_n.BLIF \ -N_219.BLIF N_244_i.BLIF size_dma_0_0__un1_n.BLIF N_220.BLIF \ -size_dma_0_0__un0_n.BLIF pos_clk_un6_bgack_000_n.BLIF N_314_0.BLIF \ -size_dma_0_1__un3_n.BLIF N_359.BLIF N_159_i.BLIF size_dma_0_1__un1_n.BLIF \ -N_8.BLIF VMA_INT_i.BLIF size_dma_0_1__un0_n.BLIF N_14.BLIF N_352_i.BLIF \ -ipl_030_0_0__un3_n.BLIF N_21.BLIF N_353_i.BLIF ipl_030_0_0__un1_n.BLIF \ -N_9.BLIF N_293_i.BLIF ipl_030_0_0__un0_n.BLIF un1_DS_000_ENABLE_0_sqmuxa.BLIF \ -N_175_i.BLIF ipl_030_0_1__un3_n.BLIF N_66.BLIF N_176_i.BLIF \ -ipl_030_0_1__un1_n.BLIF N_171.BLIF ipl_030_0_1__un0_n.BLIF N_354.BLIF \ -N_198_i.BLIF ipl_030_0_2__un3_n.BLIF N_18.BLIF N_197_i.BLIF \ -ipl_030_0_2__un1_n.BLIF pos_clk_un9_clk_000_pe_n.BLIF N_196_i.BLIF \ -ipl_030_0_2__un0_n.BLIF cpu_est_2_1__n.BLIF N_183_0.BLIF a0_dma_0_un3_n.BLIF \ -cpu_est_2_2__n.BLIF N_182_0.BLIF a0_dma_0_un1_n.BLIF N_197.BLIF N_180_0.BLIF \ -a0_dma_0_un0_n.BLIF N_198.BLIF N_178_0.BLIF \ -amiga_bus_enable_dma_low_0_un3_n.BLIF N_208.BLIF N_82_i.BLIF \ -amiga_bus_enable_dma_low_0_un1_n.BLIF N_210.BLIF N_315_i.BLIF \ -amiga_bus_enable_dma_low_0_un0_n.BLIF N_315.BLIF N_351_i.BLIF \ -amiga_bus_enable_dma_high_0_un3_n.BLIF N_212.BLIF N_154_0.BLIF \ -amiga_bus_enable_dma_high_0_un1_n.BLIF N_180.BLIF N_149_i.BLIF \ -amiga_bus_enable_dma_high_0_un0_n.BLIF N_213.BLIF N_207_i.BLIF \ -bg_000_0_un3_n.BLIF N_178.BLIF N_228_i.BLIF bg_000_0_un1_n.BLIF N_228.BLIF \ -bg_000_0_un0_n.BLIF N_182.BLIF N_213_i.BLIF ds_000_dma_0_un3_n.BLIF N_176.BLIF \ -N_212_i.BLIF ds_000_dma_0_un1_n.BLIF N_183.BLIF N_309_i.BLIF \ -ds_000_dma_0_un0_n.BLIF N_351.BLIF N_357_i.BLIF as_000_dma_0_un3_n.BLIF \ -N_357.BLIF cpu_est_2_0_2__n.BLIF as_000_dma_0_un1_n.BLIF N_206.BLIF \ -N_208_i.BLIF as_000_dma_0_un0_n.BLIF N_205.BLIF N_209_i.BLIF \ -as_030_000_sync_0_un3_n.BLIF N_352.BLIF cpu_est_2_0_1__n.BLIF \ -as_030_000_sync_0_un1_n.BLIF N_353.BLIF N_206_i.BLIF \ -as_030_000_sync_0_un0_n.BLIF N_314.BLIF N_205_i.BLIF rw_000_dma_0_un3_n.BLIF \ -N_244.BLIF pos_clk_un9_clk_000_pe_0_n.BLIF rw_000_dma_0_un1_n.BLIF N_336.BLIF \ -N_18_i.BLIF rw_000_dma_0_un0_n.BLIF N_311.BLIF N_37_0.BLIF a_decode_15__n.BLIF \ -un1_SM_AMIGA_0_sqmuxa_1.BLIF N_171_i.BLIF N_211.BLIF N_354_i.BLIF \ -a_decode_14__n.BLIF N_16.BLIF un1_DS_000_ENABLE_0_sqmuxa_0.BLIF \ -un1_amiga_bus_enable_low_i.BLIF N_66_0.BLIF a_decode_13__n.BLIF \ -un21_fpu_cs_i.BLIF UDS_000_INT_i.BLIF cpu_est_i_2__n.BLIF \ -un1_UDS_000_INT_0.BLIF a_decode_12__n.BLIF cpu_est_i_0__n.BLIF \ -LDS_000_INT_i.BLIF VPA_D_i.BLIF un1_LDS_000_INT_0.BLIF a_decode_11__n.BLIF \ -DTACK_D0_i.BLIF N_21_i.BLIF cpu_est_i_3__n.BLIF N_34_0.BLIF \ -a_decode_10__n.BLIF sm_amiga_i_i_7__n.BLIF N_14_i.BLIF sm_amiga_i_5__n.BLIF \ -N_41_0.BLIF a_decode_9__n.BLIF sm_amiga_i_3__n.BLIF N_8_i.BLIF \ -cpu_est_i_1__n.BLIF N_42_0.BLIF a_decode_8__n.BLIF clk_000_d_i_1__n.BLIF \ -a_c_i_0__n.BLIF N_355_i_0.BLIF size_c_i_1__n.BLIF a_decode_7__n.BLIF \ -sm_amiga_i_4__n.BLIF pos_clk_un10_sm_amiga_i_n.BLIF sm_amiga_i_2__n.BLIF \ -N_359_i.BLIF a_decode_6__n.BLIF rst_dly_i_0__n.BLIF \ -pos_clk_un6_bgack_000_0_n.BLIF rst_dly_i_2__n.BLIF N_220_i.BLIF \ -a_decode_5__n.BLIF a_decode_i_19__n.BLIF N_219_i.BLIF a_decode_i_18__n.BLIF \ -a_decode_4__n.BLIF a_decode_i_16__n.BLIF N_222_i.BLIF RW_000_i.BLIF \ -N_221_i.BLIF a_decode_3__n.BLIF sm_amiga_i_0__n.BLIF AS_030_i.BLIF \ -N_223_i.BLIF a_decode_2__n.BLIF AS_000_INT_i.BLIF N_224_i.BLIF \ -DSACK1_INT_i.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF clk_000_d_i_0__n.BLIF \ -N_150_i.BLIF sm_amiga_i_6__n.BLIF N_156_i.BLIF sm_amiga_i_1__n.BLIF \ -N_160_i.BLIF FPU_SENSE_i.BLIF N_174_i.BLIF rst_dly_i_1__n.BLIF N_158_i.BLIF \ -AS_030_D0_i.BLIF N_201_i.BLIF BGACK_030_INT_i.BLIF N_202_i.BLIF \ -nEXP_SPACE_i.BLIF N_203_i.BLIF RESET_OUT_i.BLIF AS_030.PIN.BLIF \ -AS_000.PIN.BLIF RW_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ -SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF AHIGH_24_.PIN.BLIF AHIGH_25_.PIN.BLIF \ -AHIGH_26_.PIN.BLIF AHIGH_27_.PIN.BLIF AHIGH_28_.PIN.BLIF AHIGH_29_.PIN.BLIF \ -AHIGH_30_.PIN.BLIF AHIGH_31_.PIN.BLIF A_0_.PIN.BLIF BERR.PIN.BLIF RW.PIN.BLIF +BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF VPA.BLIF \ +RST.BLIF RESET.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF A_DECODE_20_.BLIF \ +A_DECODE_19_.BLIF A_DECODE_18_.BLIF A_DECODE_17_.BLIF A_DECODE_16_.BLIF \ +A_DECODE_15_.BLIF A_DECODE_14_.BLIF A_DECODE_13_.BLIF A_DECODE_12_.BLIF \ +A_DECODE_11_.BLIF A_DECODE_10_.BLIF A_DECODE_9_.BLIF A_DECODE_8_.BLIF \ +A_DECODE_7_.BLIF A_DECODE_6_.BLIF A_DECODE_5_.BLIF A_DECODE_4_.BLIF \ +A_DECODE_3_.BLIF A_DECODE_2_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF A_1_.BLIF \ +SIZE_1_.BLIF AHIGH_31_.BLIF AS_030.BLIF AS_000.BLIF RW_000.BLIF UDS_000.BLIF \ +LDS_000.BLIF BERR.BLIF DTACK.BLIF RW.BLIF SIZE_0_.BLIF AHIGH_30_.BLIF \ +AHIGH_29_.BLIF AHIGH_28_.BLIF AHIGH_27_.BLIF AHIGH_26_.BLIF AHIGH_25_.BLIF \ +AHIGH_24_.BLIF A_0_.BLIF clk_000_d_i_1__n.BLIF VPA_D_i.BLIF N_125_i.BLIF \ +a_decode_2__n.BLIF VMA_INT_i.BLIF N_124_i.BLIF sm_amiga_i_0__n.BLIF \ +N_53_0.BLIF rst_dly_i_2__n.BLIF N_134_i.BLIF rst_dly_i_1__n.BLIF N_270_0.BLIF \ +rst_dly_i_0__n.BLIF N_77_i.BLIF DSACK1_INT_i.BLIF N_87_i.BLIF \ +inst_BGACK_030_INTreg.BLIF N_137_i_0.BLIF N_112_i.BLIF vcc_n_n.BLIF \ +DTACK_D0_i.BLIF N_113_i.BLIF inst_VMA_INTreg.BLIF BGACK_030_INT_i.BLIF \ +N_114_i.BLIF gnd_n_n.BLIF nEXP_SPACE_i.BLIF un1_amiga_bus_enable_low.BLIF \ +AS_000_DMA_i.BLIF N_109_i.BLIF un7_as_030.BLIF RW_000_i.BLIF N_108_i.BLIF \ +un1_LDS_000_INT.BLIF clk_030_pe_i_1__n.BLIF N_111_i.BLIF un1_UDS_000_INT.BLIF \ +DS_000_DMA_0_sqmuxa_i.BLIF N_265_2_0.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF \ +pos_clk_un4_rw_000_i_n.BLIF un10_ciin.BLIF AS_000_i.BLIF un1_as_000_i.BLIF \ +un21_fpu_cs.BLIF AMIGA_DS_i.BLIF VPA_c_i.BLIF un21_berr.BLIF \ +pos_clk_un3_clk_out_int_i_n.BLIF N_52_0.BLIF un6_ds_030.BLIF \ +cycle_dma_i_0__n.BLIF DTACK_c_i.BLIF un13_ciin.BLIF cycle_dma_i_1__n.BLIF \ +N_48_0.BLIF cpu_est_1_.BLIF pos_clk_as_000_dma6_i_n.BLIF un3_ahigh_i.BLIF \ +cpu_est_2_.BLIF DS_000_DMA_i.BLIF pos_clk_un4_bgack_000_i_n.BLIF \ +cpu_est_3_.BLIF CLK_EXP_i.BLIF pos_clk_un6_bgack_000_0_n.BLIF cpu_est_0_.BLIF \ +AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF N_7_i.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF \ +ahigh_i_25__n.BLIF N_41_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF \ +ahigh_i_24__n.BLIF pos_clk_un1_bgack_030_int_0_n.BLIF inst_AS_030_D0.BLIF \ +ahigh_i_27__n.BLIF pos_clk_un12_clk_out_int_0_n.BLIF inst_AS_030_000_SYNC.BLIF \ +ahigh_i_26__n.BLIF pos_clk_un3_0_n.BLIF inst_BGACK_030_INT_D.BLIF \ +ahigh_i_29__n.BLIF pos_clk_un15_bgack_030_int_i_n.BLIF inst_AS_000_DMA.BLIF \ +ahigh_i_28__n.BLIF N_3_i.BLIF inst_DS_000_DMA.BLIF ahigh_i_31__n.BLIF \ +N_43_0.BLIF inst_VPA_D.BLIF ahigh_i_30__n.BLIF N_4_i.BLIF CLK_000_D_3_.BLIF \ +a_i_1__n.BLIF N_42_0.BLIF inst_DTACK_D0.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF \ +un6_amiga_bus_data_dir_i.BLIF inst_RESET_OUT.BLIF AS_030_D0_i.BLIF \ +un12_amiga_bus_data_dir_m_i.BLIF CLK_030_PE_1_.BLIF un10_ciin_i.BLIF \ +AMIGA_BUS_DATA_DIR_c_0.BLIF inst_AMIGA_DS.BLIF FPU_SENSE_i.BLIF N_22_i.BLIF \ +CLK_000_D_1_.BLIF AS_030_000_SYNC_i.BLIF N_31_0.BLIF CLK_000_D_0_.BLIF \ +a_decode_i_16__n.BLIF N_21_i.BLIF inst_CLK_OUT_PRE_50.BLIF \ +a_decode_i_18__n.BLIF N_32_0.BLIF inst_CLK_OUT_PRE_D.BLIF \ +a_decode_i_19__n.BLIF N_19_i.BLIF IPL_D0_0_.BLIF N_224_i.BLIF N_34_0.BLIF \ +IPL_D0_1_.BLIF N_225_i.BLIF N_18_i.BLIF IPL_D0_2_.BLIF N_226_i.BLIF \ +N_35_0.BLIF CLK_000_D_2_.BLIF pos_clk_un5_bgack_030_int_d_i_n.BLIF \ +CLK_000_D_4_.BLIF pos_clk_amiga_bus_enable_dma_high_3_0_n.BLIF \ +pos_clk_un6_bg_030_n.BLIF pos_clk_amiga_bus_enable_dma_low_3_0_n.BLIF \ +pos_clk_ipl_n.BLIF pos_clk_rw_000_dma_3_0_n.BLIF inst_LDS_000_INT.BLIF \ +un13_ciin_i.BLIF UDS_000_c_i.BLIF inst_DS_000_ENABLE.BLIF un6_ds_030_i.BLIF \ +LDS_000_c_i.BLIF inst_UDS_000_INT.BLIF N_123_i.BLIF N_86_i.BLIF \ +SM_AMIGA_6_.BLIF N_122_i.BLIF N_129_i.BLIF SM_AMIGA_4_.BLIF un7_as_030_i.BLIF \ +N_130_i.BLIF SM_AMIGA_1_.BLIF AS_030_c.BLIF un11_amiga_bus_enable_high_i.BLIF \ +SM_AMIGA_0_.BLIF N_117_i.BLIF SIZE_DMA_0_.BLIF AS_000_c.BLIF N_46_0.BLIF \ +SIZE_DMA_1_.BLIF N_107_i.BLIF CYCLE_DMA_0_.BLIF RW_000_c.BLIF \ +pos_clk_size_dma_6_0_0__n.BLIF CYCLE_DMA_1_.BLIF N_106_i.BLIF \ +CLK_030_PE_0_.BLIF pos_clk_size_dma_6_0_1__n.BLIF inst_RW_000_INT.BLIF \ +UDS_000_c.BLIF N_16_i.BLIF inst_RW_000_DMA.BLIF N_254_i.BLIF RST_DLY_0_.BLIF \ +LDS_000_c.BLIF N_263_i.BLIF RST_DLY_1_.BLIF N_250_i.BLIF RST_DLY_2_.BLIF \ +size_c_0__n.BLIF N_256_i.BLIF inst_A0_DMA.BLIF N_189_i.BLIF \ +pos_clk_rw_000_int_5_n.BLIF size_c_1__n.BLIF N_101_i.BLIF inst_DSACK1_INT.BLIF \ +inst_AS_000_INT.BLIF ahigh_c_24__n.BLIF N_103_i.BLIF SM_AMIGA_5_.BLIF \ +N_104_i.BLIF SM_AMIGA_3_.BLIF ahigh_c_25__n.BLIF SM_AMIGA_2_.BLIF N_105_i.BLIF \ +ahigh_c_26__n.BLIF N_115_i.BLIF ahigh_c_27__n.BLIF N_116_i.BLIF \ +ahigh_c_28__n.BLIF N_131_i.BLIF N_277_i.BLIF ahigh_c_29__n.BLIF N_64_0.BLIF \ +N_91_0.BLIF ahigh_c_30__n.BLIF N_159_0.BLIF N_14.BLIF N_85_i.BLIF N_15.BLIF \ +ahigh_c_31__n.BLIF un1_SM_AMIGA_0_sqmuxa_1_0.BLIF N_24.BLIF RW_c_i.BLIF \ +N_25.BLIF pos_clk_rw_000_int_5_0_n.BLIF clk_000_d_i_3__n.BLIF N_25_i.BLIF \ +N_28_0.BLIF N_24_i.BLIF N_27_0.BLIF ipl_c_i_1__n.BLIF N_50_0.BLIF \ +ipl_c_i_0__n.BLIF N_49_0.BLIF N_14_i.BLIF N_39_0.BLIF N_15_i.BLIF N_38_0.BLIF \ +N_91_0_1.BLIF N_91_0_2.BLIF N_91_0_3.BLIF N_265_i_1.BLIF N_266_i_1.BLIF \ +N_266_i_2.BLIF N_138_i_1.BLIF N_148_i_1.BLIF N_144_i_1.BLIF N_142_i_1.BLIF \ +N_140_i_1.BLIF SM_AMIGA_i_7_.BLIF pos_clk_un10_sm_amiga_i_1_n.BLIF N_76.BLIF \ +N_85_i_1.BLIF G_122.BLIF N_85_i_2.BLIF G_123.BLIF a_decode_c_16__n.BLIF \ +N_277_1.BLIF G_124.BLIF N_277_2.BLIF un1_rst_2_1.BLIF a_decode_c_17__n.BLIF \ +N_277_3.BLIF cpu_est_0_0_.BLIF N_277_4.BLIF N_64.BLIF a_decode_c_18__n.BLIF \ +N_277_5.BLIF N_122.BLIF un10_ciin_1.BLIF N_123.BLIF a_decode_c_19__n.BLIF \ +un10_ciin_2.BLIF N_132.BLIF un10_ciin_3.BLIF N_133.BLIF a_decode_c_20__n.BLIF \ +un10_ciin_4.BLIF N_274.BLIF un10_ciin_5.BLIF N_276.BLIF a_decode_c_21__n.BLIF \ +un10_ciin_6.BLIF N_77.BLIF un10_ciin_7.BLIF N_79.BLIF a_decode_c_22__n.BLIF \ +un10_ciin_8.BLIF N_78.BLIF un10_ciin_9.BLIF N_263.BLIF a_decode_c_23__n.BLIF \ +un10_ciin_10.BLIF N_108.BLIF un10_ciin_11.BLIF N_114.BLIF a_c_0__n.BLIF \ +un6_amiga_bus_data_dir_1.BLIF N_85.BLIF un6_amiga_bus_data_dir_2.BLIF \ +N_104.BLIF a_c_1__n.BLIF pos_clk_as_000_dma6_1_n.BLIF N_91.BLIF \ +pos_clk_as_000_dma6_2_n.BLIF N_131.BLIF nEXP_SPACE_c.BLIF \ +DS_000_DMA_1_sqmuxa_1.BLIF N_277.BLIF pos_clk_un4_rw_000_1_n.BLIF N_130.BLIF \ +BERR_c.BLIF pos_clk_un4_rw_000_2_n.BLIF N_115.BLIF \ +pos_clk_un13_clk_out_int_1_n.BLIF N_116.BLIF BG_030_c.BLIF N_125_1.BLIF \ +N_105.BLIF N_116_1.BLIF N_103.BLIF BG_000DFFreg.BLIF \ +pos_clk_un29_clk_000_ne_1_1_n.BLIF N_101.BLIF \ +pos_clk_un29_clk_000_ne_1_2_n.BLIF N_259.BLIF \ +pos_clk_un29_clk_000_ne_1_3_n.BLIF N_255.BLIF BGACK_000_c.BLIF N_261_1.BLIF \ +N_256.BLIF N_261_2.BLIF N_254.BLIF CLK_030_c.BLIF N_262_1.BLIF N_16.BLIF \ +N_262_2.BLIF N_106.BLIF DS_000_ENABLE_0_sqmuxa_1_1.BLIF N_86.BLIF N_259_1.BLIF \ +N_107.BLIF CLK_OSZI_c.BLIF N_250_i_1.BLIF N_117.BLIF N_189_i_1.BLIF \ +pos_clk_a0_dma_3_n.BLIF pos_clk_un6_bg_030_1_n.BLIF N_129.BLIF \ +CLK_OUT_INTreg.BLIF N_108_1.BLIF pos_clk_size_dma_6_1__n.BLIF N_114_1.BLIF \ +pos_clk_size_dma_6_0__n.BLIF un21_berr_1.BLIF pos_clk_rw_000_dma_3_n.BLIF \ +FPU_SENSE_c.BLIF un21_fpu_cs_1.BLIF pos_clk_amiga_bus_enable_dma_low_3_n.BLIF \ +N_130_1.BLIF pos_clk_amiga_bus_enable_dma_high_3_n.BLIF IPL_030DFF_0_reg.BLIF \ +N_136_i_1.BLIF SIZE_DMA_3_sqmuxa.BLIF N_152_i_1.BLIF \ +pos_clk_un5_bgack_030_int_d_n.BLIF IPL_030DFF_1_reg.BLIF N_146_i_1.BLIF \ +N_18.BLIF N_267_i_1.BLIF N_19.BLIF IPL_030DFF_2_reg.BLIF pos_clk_ipl_1_n.BLIF \ +N_21.BLIF bg_000_0_un3_n.BLIF N_22.BLIF ipl_c_0__n.BLIF bg_000_0_un1_n.BLIF \ +un6_amiga_bus_data_dir.BLIF bg_000_0_un0_n.BLIF un12_amiga_bus_data_dir_m.BLIF \ +ipl_c_1__n.BLIF uds_000_int_0_un3_n.BLIF pos_clk_un3_clk_out_int_n.BLIF \ +uds_000_int_0_un1_n.BLIF N_3.BLIF ipl_c_2__n.BLIF uds_000_int_0_un0_n.BLIF \ +pos_clk_as_000_dma6_n.BLIF lds_000_int_0_un3_n.BLIF DS_000_DMA_1_sqmuxa.BLIF \ +lds_000_int_0_un1_n.BLIF N_4.BLIF DTACK_c.BLIF lds_000_int_0_un0_n.BLIF \ +AS_000_DMA_1_sqmuxa.BLIF ds_000_enable_0_un3_n.BLIF un1_rst_2.BLIF \ +ds_000_enable_0_un1_n.BLIF G_97.BLIF ds_000_enable_0_un0_n.BLIF N_199.BLIF \ +VPA_c.BLIF ipl_030_0_2__un3_n.BLIF pos_clk_un13_bgack_030_int_n.BLIF \ +ipl_030_0_2__un1_n.BLIF N_205.BLIF ipl_030_0_2__un0_n.BLIF \ +pos_clk_un13_clk_out_int_n.BLIF RST_c.BLIF vma_int_0_un3_n.BLIF \ +pos_clk_un15_bgack_030_int_n.BLIF vma_int_0_un1_n.BLIF pos_clk_un3_n.BLIF \ +RESET_c.BLIF vma_int_0_un0_n.BLIF pos_clk_un12_clk_out_int_n.BLIF \ +cpu_est_0_1__un3_n.BLIF pos_clk_un1_bgack_030_int_n.BLIF RW_c.BLIF \ +cpu_est_0_1__un1_n.BLIF DS_000_DMA_0_sqmuxa.BLIF cpu_est_0_1__un0_n.BLIF \ +un1_rst_3.BLIF fc_c_0__n.BLIF cpu_est_0_2__un3_n.BLIF G_95.BLIF \ +cpu_est_0_2__un1_n.BLIF G_101.BLIF fc_c_1__n.BLIF cpu_est_0_2__un0_n.BLIF \ +G_103.BLIF cpu_est_0_3__un3_n.BLIF pos_clk_un4_rw_000_n.BLIF \ +cpu_est_0_3__un1_n.BLIF N_7.BLIF AMIGA_BUS_DATA_DIR_c.BLIF \ +cpu_est_0_3__un0_n.BLIF pos_clk_un6_bgack_000_n.BLIF \ +pos_clk_un31_clk_000_ne_1_i_m2_un3_n.BLIF pos_clk_un4_bgack_000_n.BLIF \ +pos_clk_un31_clk_000_ne_1_i_m2_un1_n.BLIF N_265_2.BLIF \ +pos_clk_un31_clk_000_ne_1_i_m2_un0_n.BLIF N_111.BLIF \ +bgack_030_int_0_un3_n.BLIF N_109.BLIF BG_030_c_i.BLIF \ +bgack_030_int_0_un1_n.BLIF N_113.BLIF pos_clk_un6_bg_030_i_n.BLIF \ +bgack_030_int_0_un0_n.BLIF N_112.BLIF pos_clk_un9_bg_030_0_n.BLIF \ +ds_000_dma_0_un3_n.BLIF N_98.BLIF UDS_000_INT_i.BLIF ds_000_dma_0_un1_n.BLIF \ +pos_clk_un29_clk_000_ne_1_n.BLIF un1_UDS_000_INT_0.BLIF \ +ds_000_dma_0_un0_n.BLIF N_87.BLIF LDS_000_INT_i.BLIF as_000_dma_0_un3_n.BLIF \ +N_270.BLIF un1_LDS_000_INT_0.BLIF as_000_dma_0_un1_n.BLIF N_134.BLIF \ +N_23_i.BLIF as_000_dma_0_un0_n.BLIF N_125.BLIF N_30_0.BLIF \ +size_dma_0_1__un3_n.BLIF N_124.BLIF N_20_i.BLIF size_dma_0_1__un1_n.BLIF \ +N_121.BLIF N_33_0.BLIF size_dma_0_1__un0_n.BLIF N_120.BLIF N_13_i.BLIF \ +size_dma_0_0__un3_n.BLIF N_137.BLIF N_40_0.BLIF size_dma_0_0__un1_n.BLIF \ +pos_clk_un31_clk_000_ne_n.BLIF ipl_c_i_2__n.BLIF size_dma_0_0__un0_n.BLIF \ +N_17.BLIF N_51_0.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF \ +pos_clk_un9_clk_000_pe_n.BLIF N_26_i.BLIF \ +amiga_bus_enable_dma_high_0_un1_n.BLIF cpu_est_2_1__n.BLIF N_29_0.BLIF \ +amiga_bus_enable_dma_high_0_un0_n.BLIF cpu_est_2_2__n.BLIF a_c_i_0__n.BLIF \ +amiga_bus_enable_dma_low_0_un3_n.BLIF N_261.BLIF size_c_i_1__n.BLIF \ +amiga_bus_enable_dma_low_0_un1_n.BLIF N_262.BLIF \ +pos_clk_un10_sm_amiga_i_n.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF \ +N_251.BLIF DS_000_ENABLE_0_sqmuxa_1_i.BLIF a0_dma_0_un3_n.BLIF N_252.BLIF \ +un1_DS_000_ENABLE_0_sqmuxa_i.BLIF a0_dma_0_un1_n.BLIF N_258.BLIF N_157_i.BLIF \ +a0_dma_0_un0_n.BLIF N_257.BLIF N_160_0.BLIF rw_000_dma_0_un3_n.BLIF \ +DS_000_ENABLE_1_sqmuxa.BLIF N_161_0.BLIF rw_000_dma_0_un1_n.BLIF \ +un1_DS_000_ENABLE_0_sqmuxa.BLIF N_162_0.BLIF rw_000_dma_0_un0_n.BLIF \ +N_102.BLIF N_165_i.BLIF ipl_030_0_0__un3_n.BLIF N_118.BLIF \ +ipl_030_0_0__un1_n.BLIF N_119.BLIF N_167_i.BLIF ipl_030_0_0__un0_n.BLIF \ +N_264.BLIF N_166_i.BLIF ipl_030_0_1__un3_n.BLIF DS_000_ENABLE_0_sqmuxa_1.BLIF \ +ipl_030_0_1__un1_n.BLIF N_164.BLIF N_168_i.BLIF ipl_030_0_1__un0_n.BLIF \ +N_170.BLIF as_030_000_sync_0_un3_n.BLIF N_168.BLIF N_170_i.BLIF \ +as_030_000_sync_0_un1_n.BLIF N_166.BLIF as_030_000_sync_0_un0_n.BLIF \ +N_167.BLIF N_164_i.BLIF rw_000_int_0_un3_n.BLIF N_165.BLIF \ +rw_000_int_0_un1_n.BLIF N_162.BLIF N_102_i.BLIF rw_000_int_0_un0_n.BLIF \ +N_161.BLIF N_264_i.BLIF a_decode_15__n.BLIF N_160.BLIF N_79_i.BLIF N_157.BLIF \ +N_78_i.BLIF a_decode_14__n.BLIF N_26.BLIF N_119_i.BLIF N_13.BLIF N_118_i.BLIF \ +a_decode_13__n.BLIF N_20.BLIF N_23.BLIF N_255_i.BLIF a_decode_12__n.BLIF \ +N_8.BLIF N_257_i.BLIF pos_clk_un9_bg_030_n.BLIF cpu_est_2_0_2__n.BLIF \ +a_decode_11__n.BLIF un1_amiga_bus_enable_low_i.BLIF N_258_i.BLIF \ +un21_fpu_cs_i.BLIF N_259_i.BLIF a_decode_10__n.BLIF sm_amiga_i_2__n.BLIF \ +cpu_est_2_0_1__n.BLIF sm_amiga_i_1__n.BLIF N_262_i.BLIF a_decode_9__n.BLIF \ +sm_amiga_i_3__n.BLIF N_261_i.BLIF sm_amiga_i_4__n.BLIF \ +pos_clk_un9_clk_000_pe_0_n.BLIF a_decode_8__n.BLIF sm_amiga_i_6__n.BLIF \ +N_251_i.BLIF sm_amiga_i_5__n.BLIF N_252_0.BLIF a_decode_7__n.BLIF \ +clk_000_d_i_0__n.BLIF N_76_i.BLIF AS_000_INT_i.BLIF N_17_i.BLIF \ +a_decode_6__n.BLIF sm_amiga_i_i_7__n.BLIF N_36_0.BLIF AS_030_i.BLIF \ +N_98_i.BLIF a_decode_5__n.BLIF cpu_est_i_2__n.BLIF \ +pos_clk_un31_clk_000_ne_i_n.BLIF cpu_est_i_0__n.BLIF N_228_i.BLIF \ +a_decode_4__n.BLIF cpu_est_i_3__n.BLIF N_121_i.BLIF cpu_est_i_1__n.BLIF \ +N_120_i.BLIF a_decode_3__n.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF \ +RW_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF \ +SIZE_1_.PIN.BLIF AHIGH_24_.PIN.BLIF AHIGH_25_.PIN.BLIF AHIGH_26_.PIN.BLIF \ +AHIGH_27_.PIN.BLIF AHIGH_28_.PIN.BLIF AHIGH_29_.PIN.BLIF AHIGH_30_.PIN.BLIF \ +AHIGH_31_.PIN.BLIF A_0_.PIN.BLIF BERR.PIN.BLIF DTACK.PIN.BLIF RW.PIN.BLIF .outputs IPL_030_2_ DS_030 BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 \ -AVEC E VMA RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ -AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ IPL_D0_0_.D IPL_D0_0_.C \ -IPL_D0_1_.D IPL_D0_1_.C IPL_D0_2_.D IPL_D0_2_.C SM_AMIGA_i_7_.D \ +AVEC E VMA AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ +AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_i_7_.D \ SM_AMIGA_i_7_.C SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_5_.D SM_AMIGA_5_.C \ SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_2_.D \ SM_AMIGA_2_.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C \ -cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C cpu_est_2_.D cpu_est_2_.C \ -cpu_est_3_.D cpu_est_3_.C IPL_030DFF_0_reg.D IPL_030DFF_0_reg.C \ -IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D IPL_030DFF_2_reg.C \ -RST_DLY_2_.D RST_DLY_2_.C CLK_000_D_0_.D CLK_000_D_0_.C CLK_000_D_1_.D \ -CLK_000_D_1_.C CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C \ -CLK_000_D_4_.D CLK_000_D_4_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D \ -CYCLE_DMA_1_.C SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C \ -RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.D RST_DLY_1_.C inst_RW_000_INT.D \ -inst_RW_000_INT.C inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C \ -inst_LDS_000_INT.D inst_LDS_000_INT.C inst_BGACK_030_INTreg.D \ -inst_BGACK_030_INTreg.C inst_AS_000_DMA.D inst_AS_000_DMA.C inst_DS_000_DMA.D \ -inst_DS_000_DMA.C inst_DSACK1_INT.D inst_DSACK1_INT.C inst_AS_000_INT.D \ -inst_AS_000_INT.C inst_AS_030_D0.D inst_AS_030_D0.C inst_VPA_D.D inst_VPA_D.C \ -inst_DTACK_D0.D inst_DTACK_D0.C inst_CLK_030_H.D inst_CLK_030_H.C \ -inst_RESET_OUT.D inst_RESET_OUT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C \ -BG_000DFFreg.D BG_000DFFreg.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D \ +cpu_est_2_.D cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C IPL_030DFF_0_reg.D \ +IPL_030DFF_0_reg.C IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D \ +IPL_030DFF_2_reg.C IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D IPL_D0_1_.C IPL_D0_2_.D \ +IPL_D0_2_.C CLK_000_D_0_.D CLK_000_D_0_.C CLK_000_D_1_.D CLK_000_D_1_.C \ +CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C CLK_000_D_4_.D \ +CLK_000_D_4_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C \ +CLK_030_PE_0_.D CLK_030_PE_0_.C CLK_030_PE_1_.D CLK_030_PE_1_.C SIZE_DMA_0_.D \ +SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C cpu_est_0_.D cpu_est_0_.C \ +cpu_est_1_.D cpu_est_1_.C RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.D RST_DLY_1_.C \ +RST_DLY_2_.D RST_DLY_2_.C inst_DS_000_DMA.D inst_DS_000_DMA.C \ +inst_DSACK1_INT.D inst_DSACK1_INT.C inst_AS_000_INT.D inst_AS_000_INT.C \ +inst_AMIGA_DS.D inst_AMIGA_DS.C inst_AS_030_D0.D inst_AS_030_D0.C \ +inst_DTACK_D0.D inst_DTACK_D0.C inst_VPA_D.D inst_VPA_D.C inst_RESET_OUT.D \ +inst_RESET_OUT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C BG_000DFFreg.D \ +BG_000DFFreg.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D \ inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D \ inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.D inst_UDS_000_INT.C \ inst_A0_DMA.D inst_A0_DMA.C inst_RW_000_DMA.D inst_RW_000_DMA.C \ -inst_VMA_INTreg.D inst_VMA_INTreg.C inst_BGACK_030_INT_D.D \ +inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_INT.D inst_RW_000_INT.C \ +inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_LDS_000_INT.D \ +inst_LDS_000_INT.C inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C \ +inst_AS_000_DMA.D inst_AS_000_DMA.C inst_BGACK_030_INT_D.D \ inst_BGACK_030_INT_D.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.D \ inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C SIZE_1_ \ -AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR RW SIZE_0_ AHIGH_30_ \ -AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ ipl_i_2__n \ -N_233_0 ipl_i_1__n N_360_i ipl_i_0__n N_191_i_i a_i_1__n N_192_i_i \ -AS_000_DMA_i AS_000_i N_199_i CLK_030_H_i N_204_i AS_030_000_SYNC_i \ -AMIGA_BUS_ENABLE_DMA_HIGH_i N_282_i vcc_n_n cycle_dma_i_0__n N_278_i \ -ahigh_i_30__n N_186_i gnd_n_n ahigh_i_31__n N_185_i un1_amiga_bus_enable_low \ -ahigh_i_28__n CLK_030_c_i un7_as_030 ahigh_i_29__n N_184_0 un1_LDS_000_INT \ -ahigh_i_26__n N_179_0 un1_UDS_000_INT ahigh_i_27__n N_251_i un10_ciin \ -ahigh_i_24__n LDS_000_c_i un21_fpu_cs ahigh_i_25__n UDS_000_c_i un21_berr \ -N_172_i un6_ds_030 pos_clk_un21_bgack_030_int_i_0_0_n N_163_i clk_000_d_i_3__n \ -N_115_i N_350_i N_114_i un1_rw_i un6_ds_030_i N_126_0 DS_000_DMA_i N_313_i \ -N_132_i N_231_i N_133_i N_291_i un7_as_030_i AMIGA_BUS_ENABLE_DMA_LOW_i \ -N_288_i AS_030_c N_287_i AS_000_c N_340_i RW_000_c N_284_i N_275_i UDS_000_c \ -pos_clk_size_dma_6_0_1__n N_268_i LDS_000_c pos_clk_size_dma_6_0_0__n N_265_i \ -size_c_0__n N_267_i size_c_1__n N_337_i N_338_i ahigh_c_24__n N_55_0 \ -un1_as_000_i ahigh_c_25__n N_245_0 N_229_i pos_clk_un9_bg_030_n ahigh_c_26__n \ -N_227_i ahigh_c_27__n N_226_i ahigh_c_28__n N_246_0 N_332_i ahigh_c_29__n \ -pos_clk_ds_000_dma_4_0_n N_48_0 ahigh_c_30__n pos_clk_rw_000_dma_3_0_n N_218_i \ -ahigh_c_31__n un10_ciin_i pos_clk_a0_dma_3_n N_62_0 pos_clk_rw_000_dma_3_n \ -N_215_i N_216_i un10_amiga_bus_enable_high_i N_214_i N_310_0 N_24_i N_33_0 \ -pos_clk_ds_000_dma_4_n N_23_i N_3 N_32_0 N_4 N_22_i N_31_0 N_3_i N_45_0 N_4_i \ -N_44_0 N_15 N_15_i N_19 N_40_0 N_20 N_19_i N_22 N_36_0 N_23 N_20_i N_24 N_35_0 \ -N_25 N_25_i N_26 N_30_0 N_27 N_26_i N_29_0 N_27_i a_decode_c_16__n N_28_0 \ -BG_030_c_i a_decode_c_17__n pos_clk_un9_bg_030_0_n N_235_i_1 a_decode_c_18__n \ -N_235_i_2 N_156_i_1 a_decode_c_19__n N_156_i_2 N_156_i_3 a_decode_c_20__n \ -N_156_i_4 pos_clk_un10_sm_amiga_i_1_n a_decode_c_21__n N_176_i_1 un10_ciin_1 \ -a_decode_c_22__n un10_ciin_2 un10_ciin_3 a_decode_c_23__n un10_ciin_4 \ -un10_ciin_5 a_c_0__n un10_ciin_6 un10_ciin_7 a_c_1__n un10_ciin_8 un10_ciin_9 \ -pos_clk_size_dma_6_0__n nEXP_SPACE_c un10_ciin_10 pos_clk_size_dma_6_1__n \ -un10_ciin_11 N_199 BERR_c N_163_i_1 pos_clk_un21_bgack_030_int_i_0_n N_163_i_2 \ -N_231 BG_030_c pos_clk_un21_bgack_030_int_i_0_0_1_n N_233 \ -pos_clk_un21_bgack_030_int_i_0_0_2_n N_111 N_138_i_1 N_112 N_138_i_2 N_113 \ -N_59_i_1 N_114 BGACK_000_c N_59_i_2 N_115 N_233_0_1 N_245 CLK_030_c N_233_0_2 \ -N_246 N_214_1 N_62 N_214_2 N_214_3 N_132 CLK_OSZI_c un21_fpu_cs_1 N_133 \ -un21_berr_1_0 N_310 N_182_0_1 N_126 N_234_i_1 N_149 N_234_i_2 N_150 N_206_1 \ -N_158 FPU_SENSE_c N_206_2 N_160 N_205_1 N_163 N_205_2 N_172 N_352_1 N_179 \ -N_352_2 N_184 N_231_i_1 N_185 N_152_i_1 N_196 N_144_i_1 N_203 ipl_c_0__n \ -N_142_i_1 N_204 N_312_i_1 N_209 ipl_c_1__n N_236_i_1 N_214 N_148_i_1 N_215 \ -ipl_c_2__n N_136_i_1 N_216 N_246_0_1 N_218 N_249_i_1 N_224 DTACK_c N_57_i_1 \ -N_332 N_338_1 N_226 N_224_1 N_227 N_216_1 N_229 VPA_c N_209_1 N_337 N_203_1 \ -N_338 N_196_1 N_265 RST_c cpu_est_0_3__un3_n N_267 cpu_est_0_3__un1_n N_268 \ -cpu_est_0_3__un0_n N_275 RW_c rw_000_int_0_un3_n N_278 rw_000_int_0_un1_n \ -N_282 fc_c_0__n rw_000_int_0_un0_n N_284 vma_int_0_un3_n N_340 fc_c_1__n \ -vma_int_0_un1_n N_287 vma_int_0_un0_n N_288 cpu_est_0_1__un3_n N_291 \ -AMIGA_BUS_DATA_DIR_c cpu_est_0_1__un1_n N_293 cpu_est_0_1__un0_n N_350 \ -cpu_est_0_2__un3_n N_355 cpu_est_0_2__un1_n cpu_est_0_2__un0_n N_16_i \ -uds_000_int_0_un3_n N_39_0 uds_000_int_0_un1_n VPA_c_i uds_000_int_0_un0_n \ -N_52_0 lds_000_int_0_un3_n N_156 DTACK_c_i lds_000_int_0_un1_n N_201 N_53_0 \ -lds_000_int_0_un0_n N_202 N_210_i bgack_030_int_0_un3_n N_154 N_211_i \ -bgack_030_int_0_un1_n un21_berr_1 N_189_i bgack_030_int_0_un0_n N_174 \ -un1_SM_AMIGA_0_sqmuxa_1_0 ds_000_enable_0_un3_n N_223 RW_c_i \ -ds_000_enable_0_un1_n N_221 N_311_0 ds_000_enable_0_un0_n N_222 N_336_i \ -size_dma_0_0__un3_n N_219 N_244_i size_dma_0_0__un1_n N_220 \ -size_dma_0_0__un0_n pos_clk_un6_bgack_000_n N_314_0 size_dma_0_1__un3_n N_359 \ -N_159_i size_dma_0_1__un1_n N_8 VMA_INT_i size_dma_0_1__un0_n N_14 N_352_i \ -ipl_030_0_0__un3_n N_21 N_353_i ipl_030_0_0__un1_n N_9 N_293_i \ -ipl_030_0_0__un0_n un1_DS_000_ENABLE_0_sqmuxa N_175_i ipl_030_0_1__un3_n N_66 \ -N_176_i ipl_030_0_1__un1_n N_171 ipl_030_0_1__un0_n N_354 N_198_i \ -ipl_030_0_2__un3_n N_18 N_197_i ipl_030_0_2__un1_n pos_clk_un9_clk_000_pe_n \ -N_196_i ipl_030_0_2__un0_n cpu_est_2_1__n N_183_0 a0_dma_0_un3_n \ -cpu_est_2_2__n N_182_0 a0_dma_0_un1_n N_197 N_180_0 a0_dma_0_un0_n N_198 \ -N_178_0 amiga_bus_enable_dma_low_0_un3_n N_208 N_82_i \ -amiga_bus_enable_dma_low_0_un1_n N_210 N_315_i \ -amiga_bus_enable_dma_low_0_un0_n N_315 N_351_i \ -amiga_bus_enable_dma_high_0_un3_n N_212 N_154_0 \ -amiga_bus_enable_dma_high_0_un1_n N_180 N_149_i \ -amiga_bus_enable_dma_high_0_un0_n N_213 N_207_i bg_000_0_un3_n N_178 N_228_i \ -bg_000_0_un1_n N_228 bg_000_0_un0_n N_182 N_213_i ds_000_dma_0_un3_n N_176 \ -N_212_i ds_000_dma_0_un1_n N_183 N_309_i ds_000_dma_0_un0_n N_351 N_357_i \ -as_000_dma_0_un3_n N_357 cpu_est_2_0_2__n as_000_dma_0_un1_n N_206 N_208_i \ -as_000_dma_0_un0_n N_205 N_209_i as_030_000_sync_0_un3_n N_352 \ -cpu_est_2_0_1__n as_030_000_sync_0_un1_n N_353 N_206_i as_030_000_sync_0_un0_n \ -N_314 N_205_i rw_000_dma_0_un3_n N_244 pos_clk_un9_clk_000_pe_0_n \ -rw_000_dma_0_un1_n N_336 N_18_i rw_000_dma_0_un0_n N_311 N_37_0 a_decode_15__n \ -un1_SM_AMIGA_0_sqmuxa_1 N_171_i N_211 N_354_i a_decode_14__n N_16 \ -un1_DS_000_ENABLE_0_sqmuxa_0 un1_amiga_bus_enable_low_i N_66_0 a_decode_13__n \ -un21_fpu_cs_i UDS_000_INT_i cpu_est_i_2__n un1_UDS_000_INT_0 a_decode_12__n \ -cpu_est_i_0__n LDS_000_INT_i VPA_D_i un1_LDS_000_INT_0 a_decode_11__n \ -DTACK_D0_i N_21_i cpu_est_i_3__n N_34_0 a_decode_10__n sm_amiga_i_i_7__n \ -N_14_i sm_amiga_i_5__n N_41_0 a_decode_9__n sm_amiga_i_3__n N_8_i \ -cpu_est_i_1__n N_42_0 a_decode_8__n clk_000_d_i_1__n a_c_i_0__n N_355_i_0 \ -size_c_i_1__n a_decode_7__n sm_amiga_i_4__n pos_clk_un10_sm_amiga_i_n \ -sm_amiga_i_2__n N_359_i a_decode_6__n rst_dly_i_0__n pos_clk_un6_bgack_000_0_n \ -rst_dly_i_2__n N_220_i a_decode_5__n a_decode_i_19__n N_219_i a_decode_i_18__n \ -a_decode_4__n a_decode_i_16__n N_222_i RW_000_i N_221_i a_decode_3__n \ -sm_amiga_i_0__n AS_030_i N_223_i a_decode_2__n AS_000_INT_i N_224_i \ -DSACK1_INT_i AMIGA_BUS_DATA_DIR_c_0 clk_000_d_i_0__n N_150_i sm_amiga_i_6__n \ -N_156_i sm_amiga_i_1__n N_160_i FPU_SENSE_i N_174_i rst_dly_i_1__n N_158_i \ -AS_030_D0_i N_201_i BGACK_030_INT_i N_202_i nEXP_SPACE_i N_203_i RESET_OUT_i \ -AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE \ -AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE \ -AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE RESET.OE \ -CIIN.OE pos_clk_un21_bgack_030_int_i_0_o3_0_x2 pos_clk_un1_ipl_i_0_x2 \ -pos_clk_un1_ipl_i_0_x2_0 pos_clk_un1_ipl_i_0_x2_1 pos_clk_CYCLE_DMA_5_1_i_0_x2 -.names N_113.BLIF IPL_D0_0_.D -0 1 -.names N_112.BLIF IPL_D0_1_.D -0 1 -.names N_111.BLIF IPL_D0_2_.D -0 1 +AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR DTACK RW SIZE_0_ AHIGH_30_ \ +AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ \ +clk_000_d_i_1__n VPA_D_i N_125_i a_decode_2__n VMA_INT_i N_124_i \ +sm_amiga_i_0__n N_53_0 rst_dly_i_2__n N_134_i rst_dly_i_1__n N_270_0 \ +rst_dly_i_0__n N_77_i DSACK1_INT_i N_87_i N_137_i_0 N_112_i vcc_n_n DTACK_D0_i \ +N_113_i BGACK_030_INT_i N_114_i gnd_n_n nEXP_SPACE_i un1_amiga_bus_enable_low \ +AS_000_DMA_i N_109_i un7_as_030 RW_000_i N_108_i un1_LDS_000_INT \ +clk_030_pe_i_1__n N_111_i un1_UDS_000_INT DS_000_DMA_0_sqmuxa_i N_265_2_0 \ +un1_SM_AMIGA_0_sqmuxa_1 pos_clk_un4_rw_000_i_n un10_ciin AS_000_i un1_as_000_i \ +un21_fpu_cs AMIGA_DS_i VPA_c_i un21_berr pos_clk_un3_clk_out_int_i_n N_52_0 \ +un6_ds_030 cycle_dma_i_0__n DTACK_c_i un13_ciin cycle_dma_i_1__n N_48_0 \ +pos_clk_as_000_dma6_i_n un3_ahigh_i DS_000_DMA_i pos_clk_un4_bgack_000_i_n \ +CLK_EXP_i pos_clk_un6_bgack_000_0_n AMIGA_BUS_ENABLE_DMA_LOW_i N_7_i \ +ahigh_i_25__n N_41_0 ahigh_i_24__n pos_clk_un1_bgack_030_int_0_n ahigh_i_27__n \ +pos_clk_un12_clk_out_int_0_n ahigh_i_26__n pos_clk_un3_0_n ahigh_i_29__n \ +pos_clk_un15_bgack_030_int_i_n ahigh_i_28__n N_3_i ahigh_i_31__n N_43_0 \ +ahigh_i_30__n N_4_i a_i_1__n N_42_0 AMIGA_BUS_ENABLE_DMA_HIGH_i \ +un6_amiga_bus_data_dir_i AS_030_D0_i un12_amiga_bus_data_dir_m_i un10_ciin_i \ +AMIGA_BUS_DATA_DIR_c_0 FPU_SENSE_i N_22_i AS_030_000_SYNC_i N_31_0 \ +a_decode_i_16__n N_21_i a_decode_i_18__n N_32_0 a_decode_i_19__n N_19_i \ +N_224_i N_34_0 N_225_i N_18_i N_226_i N_35_0 pos_clk_un5_bgack_030_int_d_i_n \ +pos_clk_amiga_bus_enable_dma_high_3_0_n pos_clk_un6_bg_030_n \ +pos_clk_amiga_bus_enable_dma_low_3_0_n pos_clk_ipl_n pos_clk_rw_000_dma_3_0_n \ +un13_ciin_i UDS_000_c_i un6_ds_030_i LDS_000_c_i N_123_i N_86_i N_122_i \ +N_129_i un7_as_030_i N_130_i AS_030_c un11_amiga_bus_enable_high_i N_117_i \ +AS_000_c N_46_0 N_107_i RW_000_c pos_clk_size_dma_6_0_0__n N_106_i \ +pos_clk_size_dma_6_0_1__n UDS_000_c N_16_i N_254_i LDS_000_c N_263_i N_250_i \ +size_c_0__n N_256_i N_189_i pos_clk_rw_000_int_5_n size_c_1__n N_101_i \ +ahigh_c_24__n N_103_i N_104_i ahigh_c_25__n N_105_i ahigh_c_26__n N_115_i \ +ahigh_c_27__n N_116_i ahigh_c_28__n N_131_i N_277_i ahigh_c_29__n N_64_0 \ +N_91_0 ahigh_c_30__n N_159_0 N_14 N_85_i N_15 ahigh_c_31__n \ +un1_SM_AMIGA_0_sqmuxa_1_0 N_24 RW_c_i N_25 pos_clk_rw_000_int_5_0_n \ +clk_000_d_i_3__n N_25_i N_28_0 N_24_i N_27_0 ipl_c_i_1__n N_50_0 ipl_c_i_0__n \ +N_49_0 N_14_i N_39_0 N_15_i N_38_0 N_91_0_1 N_91_0_2 N_91_0_3 N_265_i_1 \ +N_266_i_1 N_266_i_2 N_138_i_1 N_148_i_1 N_144_i_1 N_142_i_1 N_140_i_1 \ +pos_clk_un10_sm_amiga_i_1_n N_76 N_85_i_1 N_85_i_2 a_decode_c_16__n N_277_1 \ +N_277_2 un1_rst_2_1 a_decode_c_17__n N_277_3 N_277_4 N_64 a_decode_c_18__n \ +N_277_5 N_122 un10_ciin_1 N_123 a_decode_c_19__n un10_ciin_2 N_132 un10_ciin_3 \ +N_133 a_decode_c_20__n un10_ciin_4 N_274 un10_ciin_5 N_276 a_decode_c_21__n \ +un10_ciin_6 N_77 un10_ciin_7 N_79 a_decode_c_22__n un10_ciin_8 N_78 \ +un10_ciin_9 N_263 a_decode_c_23__n un10_ciin_10 N_108 un10_ciin_11 N_114 \ +a_c_0__n un6_amiga_bus_data_dir_1 N_85 un6_amiga_bus_data_dir_2 N_104 a_c_1__n \ +pos_clk_as_000_dma6_1_n N_91 pos_clk_as_000_dma6_2_n N_131 nEXP_SPACE_c \ +DS_000_DMA_1_sqmuxa_1 N_277 pos_clk_un4_rw_000_1_n N_130 BERR_c \ +pos_clk_un4_rw_000_2_n N_115 pos_clk_un13_clk_out_int_1_n N_116 BG_030_c \ +N_125_1 N_105 N_116_1 N_103 pos_clk_un29_clk_000_ne_1_1_n N_101 \ +pos_clk_un29_clk_000_ne_1_2_n N_259 pos_clk_un29_clk_000_ne_1_3_n N_255 \ +BGACK_000_c N_261_1 N_256 N_261_2 N_254 CLK_030_c N_262_1 N_16 N_262_2 N_106 \ +DS_000_ENABLE_0_sqmuxa_1_1 N_86 N_259_1 N_107 CLK_OSZI_c N_250_i_1 N_117 \ +N_189_i_1 pos_clk_a0_dma_3_n pos_clk_un6_bg_030_1_n N_129 N_108_1 \ +pos_clk_size_dma_6_1__n N_114_1 pos_clk_size_dma_6_0__n un21_berr_1 \ +pos_clk_rw_000_dma_3_n FPU_SENSE_c un21_fpu_cs_1 \ +pos_clk_amiga_bus_enable_dma_low_3_n N_130_1 \ +pos_clk_amiga_bus_enable_dma_high_3_n N_136_i_1 SIZE_DMA_3_sqmuxa N_152_i_1 \ +pos_clk_un5_bgack_030_int_d_n N_146_i_1 N_18 N_267_i_1 N_19 pos_clk_ipl_1_n \ +N_21 bg_000_0_un3_n N_22 ipl_c_0__n bg_000_0_un1_n un6_amiga_bus_data_dir \ +bg_000_0_un0_n un12_amiga_bus_data_dir_m ipl_c_1__n uds_000_int_0_un3_n \ +pos_clk_un3_clk_out_int_n uds_000_int_0_un1_n N_3 ipl_c_2__n \ +uds_000_int_0_un0_n pos_clk_as_000_dma6_n lds_000_int_0_un3_n \ +DS_000_DMA_1_sqmuxa lds_000_int_0_un1_n N_4 DTACK_c lds_000_int_0_un0_n \ +AS_000_DMA_1_sqmuxa ds_000_enable_0_un3_n un1_rst_2 ds_000_enable_0_un1_n \ +ds_000_enable_0_un0_n N_199 VPA_c ipl_030_0_2__un3_n \ +pos_clk_un13_bgack_030_int_n ipl_030_0_2__un1_n N_205 ipl_030_0_2__un0_n \ +pos_clk_un13_clk_out_int_n RST_c vma_int_0_un3_n pos_clk_un15_bgack_030_int_n \ +vma_int_0_un1_n pos_clk_un3_n RESET_c vma_int_0_un0_n \ +pos_clk_un12_clk_out_int_n cpu_est_0_1__un3_n pos_clk_un1_bgack_030_int_n RW_c \ +cpu_est_0_1__un1_n DS_000_DMA_0_sqmuxa cpu_est_0_1__un0_n un1_rst_3 fc_c_0__n \ +cpu_est_0_2__un3_n cpu_est_0_2__un1_n fc_c_1__n cpu_est_0_2__un0_n \ +cpu_est_0_3__un3_n pos_clk_un4_rw_000_n cpu_est_0_3__un1_n N_7 \ +AMIGA_BUS_DATA_DIR_c cpu_est_0_3__un0_n pos_clk_un6_bgack_000_n \ +pos_clk_un31_clk_000_ne_1_i_m2_un3_n pos_clk_un4_bgack_000_n \ +pos_clk_un31_clk_000_ne_1_i_m2_un1_n N_265_2 \ +pos_clk_un31_clk_000_ne_1_i_m2_un0_n N_111 bgack_030_int_0_un3_n N_109 \ +BG_030_c_i bgack_030_int_0_un1_n N_113 pos_clk_un6_bg_030_i_n \ +bgack_030_int_0_un0_n N_112 pos_clk_un9_bg_030_0_n ds_000_dma_0_un3_n N_98 \ +UDS_000_INT_i ds_000_dma_0_un1_n pos_clk_un29_clk_000_ne_1_n un1_UDS_000_INT_0 \ +ds_000_dma_0_un0_n N_87 LDS_000_INT_i as_000_dma_0_un3_n N_270 \ +un1_LDS_000_INT_0 as_000_dma_0_un1_n N_134 N_23_i as_000_dma_0_un0_n N_125 \ +N_30_0 size_dma_0_1__un3_n N_124 N_20_i size_dma_0_1__un1_n N_121 N_33_0 \ +size_dma_0_1__un0_n N_120 N_13_i size_dma_0_0__un3_n N_137 N_40_0 \ +size_dma_0_0__un1_n pos_clk_un31_clk_000_ne_n ipl_c_i_2__n size_dma_0_0__un0_n \ +N_17 N_51_0 amiga_bus_enable_dma_high_0_un3_n pos_clk_un9_clk_000_pe_n N_26_i \ +amiga_bus_enable_dma_high_0_un1_n cpu_est_2_1__n N_29_0 \ +amiga_bus_enable_dma_high_0_un0_n cpu_est_2_2__n a_c_i_0__n \ +amiga_bus_enable_dma_low_0_un3_n N_261 size_c_i_1__n \ +amiga_bus_enable_dma_low_0_un1_n N_262 pos_clk_un10_sm_amiga_i_n \ +amiga_bus_enable_dma_low_0_un0_n N_251 DS_000_ENABLE_0_sqmuxa_1_i \ +a0_dma_0_un3_n N_252 un1_DS_000_ENABLE_0_sqmuxa_i a0_dma_0_un1_n N_258 N_157_i \ +a0_dma_0_un0_n N_257 N_160_0 rw_000_dma_0_un3_n DS_000_ENABLE_1_sqmuxa N_161_0 \ +rw_000_dma_0_un1_n un1_DS_000_ENABLE_0_sqmuxa N_162_0 rw_000_dma_0_un0_n N_102 \ +N_165_i ipl_030_0_0__un3_n N_118 ipl_030_0_0__un1_n N_119 N_167_i \ +ipl_030_0_0__un0_n N_264 N_166_i ipl_030_0_1__un3_n DS_000_ENABLE_0_sqmuxa_1 \ +ipl_030_0_1__un1_n N_164 N_168_i ipl_030_0_1__un0_n N_170 \ +as_030_000_sync_0_un3_n N_168 N_170_i as_030_000_sync_0_un1_n N_166 \ +as_030_000_sync_0_un0_n N_167 N_164_i rw_000_int_0_un3_n N_165 \ +rw_000_int_0_un1_n N_162 N_102_i rw_000_int_0_un0_n N_161 N_264_i \ +a_decode_15__n N_160 N_79_i N_157 N_78_i a_decode_14__n N_26 N_119_i N_13 \ +N_118_i a_decode_13__n N_20 N_23 N_255_i a_decode_12__n N_8 N_257_i \ +pos_clk_un9_bg_030_n cpu_est_2_0_2__n a_decode_11__n \ +un1_amiga_bus_enable_low_i N_258_i un21_fpu_cs_i N_259_i a_decode_10__n \ +sm_amiga_i_2__n cpu_est_2_0_1__n sm_amiga_i_1__n N_262_i a_decode_9__n \ +sm_amiga_i_3__n N_261_i sm_amiga_i_4__n pos_clk_un9_clk_000_pe_0_n \ +a_decode_8__n sm_amiga_i_6__n N_251_i sm_amiga_i_5__n N_252_0 a_decode_7__n \ +clk_000_d_i_0__n N_76_i AS_000_INT_i N_17_i a_decode_6__n sm_amiga_i_i_7__n \ +N_36_0 AS_030_i N_98_i a_decode_5__n cpu_est_i_2__n \ +pos_clk_un31_clk_000_ne_i_n cpu_est_i_0__n N_228_i a_decode_4__n \ +cpu_est_i_3__n N_121_i cpu_est_i_1__n N_120_i a_decode_3__n AS_030.OE \ +AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE \ +AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE \ +AHIGH_31_.OE A_0_.OE BERR.OE DTACK.OE RW.OE DS_030.OE DSACK1.OE CIIN.OE G_122 \ +G_123 G_124 cpu_est_0_0_ G_97 G_95 G_101 G_103 .names N_152_i_1.BLIF RST_c.BLIF SM_AMIGA_i_7_.D 11 1 .names N_148_i_1.BLIF RST_c.BLIF SM_AMIGA_6_.D 11 1 -.names N_82_i.BLIF N_228_i.BLIF SM_AMIGA_5_.D +.names N_146_i_1.BLIF RST_c.BLIF SM_AMIGA_5_.D 11 1 .names N_144_i_1.BLIF RST_c.BLIF SM_AMIGA_4_.D 11 1 .names N_142_i_1.BLIF RST_c.BLIF SM_AMIGA_3_.D 11 1 -.names N_312_i_1.BLIF RST_c.BLIF SM_AMIGA_2_.D +.names N_140_i_1.BLIF RST_c.BLIF SM_AMIGA_2_.D 11 1 -.names N_138_i_1.BLIF N_138_i_2.BLIF SM_AMIGA_1_.D +.names N_138_i_1.BLIF RST_c.BLIF SM_AMIGA_1_.D 11 1 .names N_136_i_1.BLIF RST_c.BLIF SM_AMIGA_0_.D 11 1 -.names N_244_i.BLIF N_336_i.BLIF cpu_est_0_.D -11 1 -.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D -1- 1 --1 1 .names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D 1- 1 -1 1 .names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_.D 1- 1 -1 1 -.names N_31_0.BLIF IPL_030DFF_0_reg.D +.names N_27_0.BLIF IPL_030DFF_0_reg.D 0 1 -.names N_32_0.BLIF IPL_030DFF_1_reg.D +.names N_28_0.BLIF IPL_030DFF_1_reg.D 0 1 -.names N_33_0.BLIF IPL_030DFF_2_reg.D +.names N_29_0.BLIF IPL_030DFF_2_reg.D 0 1 -.names N_234_i_1.BLIF N_234_i_2.BLIF RST_DLY_2_.D +.names N_49_0.BLIF IPL_D0_0_.D +0 1 +.names N_50_0.BLIF IPL_D0_1_.D +0 1 +.names N_51_0.BLIF IPL_D0_2_.D +0 1 +.names G_95.BLIF un1_rst_2.BLIF CYCLE_DMA_0_.D 11 1 -.names N_59_i_1.BLIF N_59_i_2.BLIF CYCLE_DMA_0_.D +.names G_97.BLIF un1_rst_2.BLIF CYCLE_DMA_1_.D 11 1 -.names N_57_i_1.BLIF N_251_i.BLIF CYCLE_DMA_1_.D +.names G_101.BLIF un1_rst_3.BLIF CLK_030_PE_0_.D +11 1 +.names G_103.BLIF un1_rst_3.BLIF CLK_030_PE_1_.D 11 1 .names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D 1- 1 @@ -442,1073 +488,1131 @@ pos_clk_un1_ipl_i_0_x2_0 pos_clk_un1_ipl_i_0_x2_1 pos_clk_CYCLE_DMA_5_1_i_0_x2 .names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D 1- 1 -1 1 -.names N_236_i_1.BLIF RST_c.BLIF RST_DLY_0_.D +.names cpu_est_0_0_.BLIF cpu_est_0_.D +0 1 +.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D +1- 1 +-1 1 +.names N_267_i_1.BLIF RST_c.BLIF RST_DLY_0_.D 11 1 -.names N_235_i_1.BLIF N_235_i_2.BLIF RST_DLY_1_.D +.names N_266_i_1.BLIF N_266_i_2.BLIF RST_DLY_1_.D 11 1 -.names N_39_0.BLIF inst_RW_000_INT.D -0 1 -.names N_40_0.BLIF inst_AS_030_000_SYNC.D -0 1 -.names N_41_0.BLIF inst_LDS_000_INT.D -0 1 -.names N_42_0.BLIF inst_BGACK_030_INTreg.D -0 1 -.names N_44_0.BLIF inst_AS_000_DMA.D -0 1 -.names N_45_0.BLIF inst_DS_000_DMA.D -0 1 -.names N_219_i.BLIF N_220_i.BLIF inst_DSACK1_INT.D +.names N_265_i_1.BLIF N_265_2_0.BLIF RST_DLY_2_.D 11 1 -.names N_221_i.BLIF N_222_i.BLIF inst_AS_000_INT.D +.names N_43_0.BLIF inst_DS_000_DMA.D +0 1 +.names N_120_i.BLIF N_121_i.BLIF inst_DSACK1_INT.D 11 1 -.names N_48_0.BLIF inst_AS_030_D0.D +.names N_118_i.BLIF N_119_i.BLIF inst_AS_000_INT.D +11 1 +.names N_46_0.BLIF inst_AMIGA_DS.D +0 1 +.names N_274.BLIF inst_AS_030_D0.D +0 1 +.names N_48_0.BLIF inst_DTACK_D0.D 0 1 .names N_52_0.BLIF inst_VPA_D.D 0 1 -.names N_53_0.BLIF inst_DTACK_D0.D +.names N_53_0.BLIF inst_RESET_OUT.D 0 1 -.names N_249_i_1.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF inst_CLK_030_H.D +.names N_8.BLIF RST_c.BLIF inst_DS_000_ENABLE.D 11 1 -.names N_55_0.BLIF inst_RESET_OUT.D +.names N_30_0.BLIF BG_000DFFreg.D 0 1 -.names N_9.BLIF RST_c.BLIF inst_DS_000_ENABLE.D -11 1 -.names N_28_0.BLIF BG_000DFFreg.D +.names N_31_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D 0 1 -.names N_29_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D +.names N_32_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D 0 1 -.names N_30_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D +.names N_33_0.BLIF inst_UDS_000_INT.D 0 1 -.names N_34_0.BLIF inst_UDS_000_INT.D +.names N_34_0.BLIF inst_A0_DMA.D 0 1 -.names N_35_0.BLIF inst_A0_DMA.D +.names N_35_0.BLIF inst_RW_000_DMA.D 0 1 -.names N_36_0.BLIF inst_RW_000_DMA.D +.names N_36_0.BLIF inst_VMA_INTreg.D 0 1 -.names N_37_0.BLIF inst_VMA_INTreg.D +.names N_38_0.BLIF inst_RW_000_INT.D 0 1 -.names N_251_i.BLIF inst_BGACK_030_INT_D.D +.names N_39_0.BLIF inst_AS_030_000_SYNC.D +0 1 +.names N_40_0.BLIF inst_LDS_000_INT.D +0 1 +.names N_41_0.BLIF inst_BGACK_030_INTreg.D +0 1 +.names N_42_0.BLIF inst_AS_000_DMA.D +0 1 +.names un1_rst_2_1.BLIF inst_BGACK_030_INT_D.D 0 1 .names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D 0 1 -.names ipl_c_2__n.BLIF ipl_i_2__n +.names CLK_000_D_1_.BLIF clk_000_d_i_1__n 0 1 -.names N_233_0_1.BLIF N_233_0_2.BLIF N_233_0 +.names inst_VPA_D.BLIF VPA_D_i +0 1 +.names N_125.BLIF N_125_i +0 1 +.names inst_VMA_INTreg.BLIF VMA_INT_i +0 1 +.names N_124.BLIF N_124_i +0 1 +.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n +0 1 +.names N_124_i.BLIF N_125_i.BLIF N_53_0 11 1 -.names ipl_c_1__n.BLIF ipl_i_1__n +.names RST_DLY_2_.BLIF rst_dly_i_2__n 0 1 -.names pos_clk_un1_ipl_i_0_x2.BLIF N_360_i +.names N_134.BLIF N_134_i 0 1 -.names ipl_c_0__n.BLIF ipl_i_0__n +.names RST_DLY_1_.BLIF rst_dly_i_1__n 0 1 -.names pos_clk_un1_ipl_i_0_x2_0.BLIF N_191_i_i +.names N_134_i.BLIF RST_c.BLIF N_270_0 +11 1 +.names RST_DLY_0_.BLIF rst_dly_i_0__n 0 1 -.names a_c_1__n.BLIF a_i_1__n +.names RST_DLY_0_.BLIF RST_DLY_1_.BLIF N_77_i +11 1 +.names inst_DSACK1_INT.BLIF DSACK1_INT_i 0 1 -.names pos_clk_un1_ipl_i_0_x2_1.BLIF N_192_i_i +.names N_76_i.BLIF SM_AMIGA_1_.BLIF N_87_i +11 1 +.names N_137.BLIF N_137_i_0 0 1 -.names inst_AS_000_DMA.BLIF AS_000_DMA_i -0 1 -.names AS_000_c.BLIF AS_000_i -0 1 -.names N_199.BLIF N_199_i -0 1 -.names inst_CLK_030_H.BLIF CLK_030_H_i -0 1 -.names N_204.BLIF N_204_i -0 1 -.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i -0 1 -.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i -0 1 -.names N_282.BLIF N_282_i +.names N_112.BLIF N_112_i 0 1 .names vcc_n_n 1 -.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n +.names inst_DTACK_D0.BLIF DTACK_D0_i 0 1 -.names N_278.BLIF N_278_i +.names N_113.BLIF N_113_i 0 1 -.names ahigh_c_30__n.BLIF ahigh_i_30__n -0 1 -.names BGACK_030_INT_i.BLIF nEXP_SPACE_i.BLIF N_186_i -11 1 -.names gnd_n_n -.names ahigh_c_31__n.BLIF ahigh_i_31__n -0 1 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_185_i -11 1 -.names AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF BGACK_030_INT_i.BLIF \ -un1_amiga_bus_enable_low -11 1 -.names ahigh_c_28__n.BLIF ahigh_i_28__n -0 1 -.names CLK_030_c.BLIF CLK_030_c_i -0 1 -.names AS_000_DMA_i.BLIF AS_000_i.BLIF un7_as_030 -11 1 -.names ahigh_c_29__n.BLIF ahigh_i_29__n -0 1 -.names AS_000_DMA_i.BLIF CLK_030_c_i.BLIF N_184_0 -11 1 -.names un1_LDS_000_INT_0.BLIF un1_LDS_000_INT -0 1 -.names ahigh_c_26__n.BLIF ahigh_i_26__n -0 1 -.names N_163_i.BLIF sm_amiga_i_i_7__n.BLIF N_179_0 -11 1 -.names un1_UDS_000_INT_0.BLIF un1_UDS_000_INT -0 1 -.names ahigh_c_27__n.BLIF ahigh_i_27__n -0 1 -.names BGACK_030_INT_i.BLIF RST_c.BLIF N_251_i -11 1 -.names un10_ciin_10.BLIF un10_ciin_11.BLIF un10_ciin -11 1 -.names ahigh_c_24__n.BLIF ahigh_i_24__n -0 1 -.names LDS_000_c.BLIF LDS_000_c_i -0 1 -.names un21_fpu_cs_1.BLIF N_156_i.BLIF un21_fpu_cs -11 1 -.names ahigh_c_25__n.BLIF ahigh_i_25__n -0 1 -.names UDS_000_c.BLIF UDS_000_c_i -0 1 -.names un21_berr_1_0.BLIF N_156_i.BLIF un21_berr -11 1 -.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_172_i -11 1 -.names AS_000_i.BLIF DS_000_DMA_i.BLIF un6_ds_030 -11 1 -.names pos_clk_un21_bgack_030_int_i_0_0_1_n.BLIF \ -pos_clk_un21_bgack_030_int_i_0_0_2_n.BLIF pos_clk_un21_bgack_030_int_i_0_0_n -11 1 -.names N_163_i_1.BLIF N_163_i_2.BLIF N_163_i -11 1 -.names CLK_000_D_3_.BLIF clk_000_d_i_3__n -0 1 -.names N_115.BLIF N_115_i -0 1 -.names N_350.BLIF N_350_i +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i 0 1 .names N_114.BLIF N_114_i 0 1 -.names BGACK_030_INT_i.BLIF inst_RESET_OUT.BLIF un1_rw_i -11 1 -.names un6_ds_030.BLIF un6_ds_030_i +.names gnd_n_n +.names nEXP_SPACE_c.BLIF nEXP_SPACE_i 0 1 -.names N_185_i.BLIF RST_c.BLIF N_126_0 +.names AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF BGACK_030_INT_i.BLIF \ +un1_amiga_bus_enable_low +11 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_i +0 1 +.names N_109.BLIF N_109_i +0 1 +.names AS_000_DMA_i.BLIF AS_000_i.BLIF un7_as_030 +11 1 +.names RW_000_c.BLIF RW_000_i +0 1 +.names N_108.BLIF N_108_i +0 1 +.names un1_LDS_000_INT_0.BLIF un1_LDS_000_INT +0 1 +.names CLK_030_PE_1_.BLIF clk_030_pe_i_1__n +0 1 +.names N_111.BLIF N_111_i +0 1 +.names un1_UDS_000_INT_0.BLIF un1_UDS_000_INT +0 1 +.names DS_000_DMA_0_sqmuxa.BLIF DS_000_DMA_0_sqmuxa_i +0 1 +.names N_111_i.BLIF RST_c.BLIF N_265_2_0 +11 1 +.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 +0 1 +.names pos_clk_un4_rw_000_n.BLIF pos_clk_un4_rw_000_i_n +0 1 +.names un10_ciin_10.BLIF un10_ciin_11.BLIF un10_ciin +11 1 +.names AS_000_c.BLIF AS_000_i +0 1 +.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF un1_as_000_i +11 1 +.names un21_fpu_cs_1.BLIF FPU_SENSE_i.BLIF un21_fpu_cs +11 1 +.names inst_AMIGA_DS.BLIF AMIGA_DS_i +0 1 +.names VPA_c.BLIF VPA_c_i +0 1 +.names un21_berr_1.BLIF FPU_SENSE_c.BLIF un21_berr +11 1 +.names pos_clk_un3_clk_out_int_n.BLIF pos_clk_un3_clk_out_int_i_n +0 1 +.names RST_c.BLIF VPA_c_i.BLIF N_52_0 +11 1 +.names AS_000_i.BLIF DS_000_DMA_i.BLIF un6_ds_030 +11 1 +.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n +0 1 +.names DTACK_c.BLIF DTACK_c_i +0 1 +.names nEXP_SPACE_i.BLIF un10_ciin_i.BLIF un13_ciin +11 1 +.names CYCLE_DMA_1_.BLIF cycle_dma_i_1__n +0 1 +.names DTACK_c_i.BLIF RST_c.BLIF N_48_0 +11 1 +.names pos_clk_as_000_dma6_n.BLIF pos_clk_as_000_dma6_i_n +0 1 +.names N_276.BLIF RESET_c.BLIF un3_ahigh_i 11 1 .names inst_DS_000_DMA.BLIF DS_000_DMA_i 0 1 -.names N_186_i.BLIF inst_RESET_OUT.BLIF N_313_i +.names pos_clk_un4_bgack_000_n.BLIF pos_clk_un4_bgack_000_i_n +0 1 +.names CLK_OUT_INTreg.BLIF CLK_EXP_i +0 1 +.names BGACK_000_c.BLIF pos_clk_un4_bgack_000_i_n.BLIF \ +pos_clk_un6_bgack_000_0_n 11 1 -.names N_132.BLIF N_132_i -0 1 -.names N_231_i_1.BLIF nEXP_SPACE_c.BLIF N_231_i -11 1 -.names N_133.BLIF N_133_i -0 1 -.names N_291.BLIF N_291_i -0 1 -.names un7_as_030.BLIF un7_as_030_i -0 1 .names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i 0 1 -.names N_288.BLIF N_288_i +.names N_7.BLIF N_7_i 0 1 -.names N_287.BLIF N_287_i +.names ahigh_c_25__n.BLIF ahigh_i_25__n 0 1 -.names N_340.BLIF N_340_i -0 1 -.names N_284.BLIF N_284_i -0 1 -.names N_275.BLIF N_275_i -0 1 -.names N_275_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n +.names N_7_i.BLIF RST_c.BLIF N_41_0 11 1 -.names N_268.BLIF N_268_i +.names ahigh_c_24__n.BLIF ahigh_i_24__n 0 1 -.names N_268_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n +.names RW_000_i.BLIF pos_clk_un15_bgack_030_int_i_n.BLIF \ +pos_clk_un1_bgack_030_int_0_n 11 1 -.names N_265.BLIF N_265_i +.names ahigh_c_27__n.BLIF ahigh_i_27__n 0 1 -.names N_267.BLIF N_267_i -0 1 -.names N_337.BLIF N_337_i -0 1 -.names N_338.BLIF N_338_i -0 1 -.names N_337_i.BLIF N_338_i.BLIF N_55_0 +.names CLK_030_PE_0_.BLIF CLK_030_PE_1_.BLIF pos_clk_un12_clk_out_int_0_n 11 1 -.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF un1_as_000_i -11 1 -.names CLK_030_c_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF N_245_0 -11 1 -.names N_229.BLIF N_229_i +.names ahigh_c_26__n.BLIF ahigh_i_26__n 0 1 -.names pos_clk_un9_bg_030_0_n.BLIF pos_clk_un9_bg_030_n -0 1 -.names N_227.BLIF N_227_i -0 1 -.names N_226.BLIF N_226_i -0 1 -.names N_246_0_1.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF N_246_0 +.names cycle_dma_i_0__n.BLIF cycle_dma_i_1__n.BLIF pos_clk_un3_0_n 11 1 -.names N_332.BLIF N_332_i +.names ahigh_c_29__n.BLIF ahigh_i_29__n 0 1 -.names N_332_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF \ -pos_clk_ds_000_dma_4_0_n +.names CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF pos_clk_un15_bgack_030_int_i_n 11 1 -.names AS_030_i.BLIF RST_c.BLIF N_48_0 +.names ahigh_c_28__n.BLIF ahigh_i_28__n +0 1 +.names N_3.BLIF N_3_i +0 1 +.names ahigh_c_31__n.BLIF ahigh_i_31__n +0 1 +.names N_3_i.BLIF RST_c.BLIF N_43_0 11 1 -.names BGACK_030_INT_i.BLIF RW_000_i.BLIF pos_clk_rw_000_dma_3_0_n +.names ahigh_c_30__n.BLIF ahigh_i_30__n +0 1 +.names N_4.BLIF N_4_i +0 1 +.names a_c_1__n.BLIF a_i_1__n +0 1 +.names N_4_i.BLIF RST_c.BLIF N_42_0 11 1 -.names N_218.BLIF N_218_i +.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i +0 1 +.names un6_amiga_bus_data_dir.BLIF un6_amiga_bus_data_dir_i +0 1 +.names inst_AS_030_D0.BLIF AS_030_D0_i +0 1 +.names un12_amiga_bus_data_dir_m.BLIF un12_amiga_bus_data_dir_m_i 0 1 .names un10_ciin.BLIF un10_ciin_i 0 1 -.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF pos_clk_a0_dma_3_n +.names un6_amiga_bus_data_dir_i.BLIF un12_amiga_bus_data_dir_m_i.BLIF \ +AMIGA_BUS_DATA_DIR_c_0 11 1 -.names nEXP_SPACE_i.BLIF un10_ciin_i.BLIF N_62_0 +.names FPU_SENSE_c.BLIF FPU_SENSE_i +0 1 +.names N_22.BLIF N_22_i +0 1 +.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i +0 1 +.names N_22_i.BLIF RST_c.BLIF N_31_0 11 1 -.names pos_clk_rw_000_dma_3_0_n.BLIF pos_clk_rw_000_dma_3_n +.names a_decode_c_16__n.BLIF a_decode_i_16__n 0 1 -.names N_215.BLIF N_215_i +.names N_21.BLIF N_21_i 0 1 -.names N_216.BLIF N_216_i +.names a_decode_c_18__n.BLIF a_decode_i_18__n 0 1 -.names N_215_i.BLIF N_216_i.BLIF un10_amiga_bus_enable_high_i +.names N_21_i.BLIF RST_c.BLIF N_32_0 11 1 -.names N_214.BLIF N_214_i +.names a_decode_c_19__n.BLIF a_decode_i_19__n 0 1 -.names AS_030_i.BLIF N_214_i.BLIF N_310_0 +.names N_19.BLIF N_19_i +0 1 +.names G_122.BLIF N_224_i +0 1 +.names N_19_i.BLIF RST_c.BLIF N_34_0 +11 1 +.names G_123.BLIF N_225_i +0 1 +.names N_18.BLIF N_18_i +0 1 +.names G_124.BLIF N_226_i +0 1 +.names N_18_i.BLIF RST_c.BLIF N_35_0 +11 1 +.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ +pos_clk_un5_bgack_030_int_d_i_n +11 1 +.names a_i_1__n.BLIF BGACK_030_INT_i.BLIF \ +pos_clk_amiga_bus_enable_dma_high_3_0_n +11 1 +.names pos_clk_un6_bg_030_1_n.BLIF CLK_000_D_0_.BLIF pos_clk_un6_bg_030_n +11 1 +.names a_c_1__n.BLIF BGACK_030_INT_i.BLIF \ +pos_clk_amiga_bus_enable_dma_low_3_0_n +11 1 +.names pos_clk_ipl_1_n.BLIF N_225_i.BLIF pos_clk_ipl_n +11 1 +.names BGACK_030_INT_i.BLIF RW_000_i.BLIF pos_clk_rw_000_dma_3_0_n +11 1 +.names un13_ciin.BLIF un13_ciin_i +0 1 +.names UDS_000_c.BLIF UDS_000_c_i +0 1 +.names un6_ds_030.BLIF un6_ds_030_i +0 1 +.names LDS_000_c.BLIF LDS_000_c_i +0 1 +.names N_123.BLIF N_123_i +0 1 +.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_86_i +11 1 +.names N_122.BLIF N_122_i +0 1 +.names N_129.BLIF N_129_i +0 1 +.names un7_as_030.BLIF un7_as_030_i +0 1 +.names N_130.BLIF N_130_i +0 1 +.names N_129_i.BLIF N_130_i.BLIF un11_amiga_bus_enable_high_i +11 1 +.names N_117.BLIF N_117_i +0 1 +.names N_117_i.BLIF RST_c.BLIF N_46_0 +11 1 +.names N_107.BLIF N_107_i +0 1 +.names N_107_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n +11 1 +.names N_106.BLIF N_106_i +0 1 +.names N_106_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n +11 1 +.names N_16.BLIF N_16_i +0 1 +.names N_254.BLIF N_254_i +0 1 +.names N_263.BLIF N_263_i +0 1 +.names N_250_i_1.BLIF N_263_i.BLIF N_250_i +11 1 +.names N_256.BLIF N_256_i +0 1 +.names N_189_i_1.BLIF N_263_i.BLIF N_189_i +11 1 +.names pos_clk_rw_000_int_5_0_n.BLIF pos_clk_rw_000_int_5_n +0 1 +.names N_101.BLIF N_101_i +0 1 +.names N_103.BLIF N_103_i +0 1 +.names N_104.BLIF N_104_i +0 1 +.names N_105.BLIF N_105_i +0 1 +.names N_115.BLIF N_115_i +0 1 +.names N_116.BLIF N_116_i +0 1 +.names N_131.BLIF N_131_i +0 1 +.names N_277.BLIF N_277_i +0 1 +.names N_131_i.BLIF N_277_i.BLIF N_64_0 +11 1 +.names N_91_0_3.BLIF nEXP_SPACE_c.BLIF N_91_0 +11 1 +.names N_104_i.BLIF SM_AMIGA_i_7_.BLIF N_159_0 +11 1 +.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_14 +1- 1 +-1 1 +.names N_85_i_1.BLIF N_85_i_2.BLIF N_85_i +11 1 +.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_15 +1- 1 +-1 1 +.names N_79.BLIF N_159_0.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 +11 1 +.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_24 +1- 1 +-1 1 +.names RW_c.BLIF RW_c_i +0 1 +.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF N_25 +1- 1 +-1 1 +.names N_159_0.BLIF RW_c_i.BLIF pos_clk_rw_000_int_5_0_n +11 1 +.names CLK_000_D_3_.BLIF clk_000_d_i_3__n +0 1 +.names N_25.BLIF N_25_i +0 1 +.names N_25_i.BLIF RST_c.BLIF N_28_0 11 1 .names N_24.BLIF N_24_i 0 1 -.names N_24_i.BLIF RST_c.BLIF N_33_0 +.names N_24_i.BLIF RST_c.BLIF N_27_0 11 1 -.names pos_clk_ds_000_dma_4_0_n.BLIF pos_clk_ds_000_dma_4_n +.names ipl_c_1__n.BLIF ipl_c_i_1__n 0 1 -.names N_23.BLIF N_23_i +.names ipl_c_i_1__n.BLIF RST_c.BLIF N_50_0 +11 1 +.names ipl_c_0__n.BLIF ipl_c_i_0__n 0 1 +.names ipl_c_i_0__n.BLIF RST_c.BLIF N_49_0 +11 1 +.names N_14.BLIF N_14_i +0 1 +.names N_14_i.BLIF RST_c.BLIF N_39_0 +11 1 +.names N_15.BLIF N_15_i +0 1 +.names N_15_i.BLIF RST_c.BLIF N_38_0 +11 1 +.names inst_BGACK_030_INT_D.BLIF inst_BGACK_030_INTreg.BLIF N_91_0_1 +11 1 +.names AS_030_D0_i.BLIF sm_amiga_i_i_7__n.BLIF N_91_0_2 +11 1 +.names N_91_0_1.BLIF N_91_0_2.BLIF N_91_0_3 +11 1 +.names N_108_i.BLIF N_109_i.BLIF N_265_i_1 +11 1 +.names N_112_i.BLIF RST_c.BLIF N_266_i_1 +11 1 +.names N_113_i.BLIF N_114_i.BLIF N_266_i_2 +11 1 +.names N_164_i.BLIF N_264.BLIF N_138_i_1 +11 1 +.names N_79.BLIF N_170_i.BLIF N_148_i_1 +11 1 +.names N_78.BLIF N_168_i.BLIF N_144_i_1 +11 1 +.names N_166_i.BLIF N_167_i.BLIF N_142_i_1 +11 1 +.names N_165_i.BLIF N_264_i.BLIF N_140_i_1 +11 1 +.names size_c_0__n.BLIF a_c_i_0__n.BLIF pos_clk_un10_sm_amiga_i_1_n +11 1 +.names N_76_i.BLIF N_76 +0 1 +.names AS_030_000_SYNC_i.BLIF nEXP_SPACE_c.BLIF N_85_i_1 +11 1 +.names CLK_000_D_4_.BLIF clk_000_d_i_3__n.BLIF N_85_i_2 +11 1 +.names AS_030_i.BLIF a_decode_c_17__n.BLIF N_277_1 +11 1 +.names a_decode_i_16__n.BLIF a_decode_i_18__n.BLIF N_277_2 +11 1 +.names BGACK_030_INT_i.BLIF RST_c.BLIF un1_rst_2_1 +11 1 +.names fc_c_1__n.BLIF a_decode_i_19__n.BLIF N_277_3 +11 1 +.names N_277_1.BLIF N_277_2.BLIF N_277_4 +11 1 +.names N_64_0.BLIF N_64 +0 1 +.names N_277_3.BLIF fc_c_0__n.BLIF N_277_5 +11 1 +.names AS_000_INT_i.BLIF AS_030_i.BLIF N_122 +11 1 +.names ahigh_i_24__n.BLIF ahigh_i_25__n.BLIF un10_ciin_1 +11 1 +.names AS_030_i.BLIF DSACK1_INT_i.BLIF N_123 +11 1 +.names ahigh_i_26__n.BLIF ahigh_i_27__n.BLIF un10_ciin_2 +11 1 +.names N_276.BLIF inst_RESET_OUT.BLIF N_132 +11 1 +.names ahigh_i_28__n.BLIF ahigh_i_29__n.BLIF un10_ciin_3 +11 1 +.names BGACK_030_INT_i.BLIF inst_RESET_OUT.BLIF N_133 +11 1 +.names ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF un10_ciin_4 +11 1 +.names AS_030_i.BLIF RST_c.BLIF N_274 +11 1 +.names a_decode_c_23__n.BLIF AS_030_D0_i.BLIF un10_ciin_5 +11 1 +.names BGACK_030_INT_i.BLIF nEXP_SPACE_i.BLIF N_276 +11 1 +.names a_decode_c_20__n.BLIF a_decode_c_21__n.BLIF un10_ciin_6 +11 1 +.names N_77_i.BLIF N_77 +0 1 +.names un10_ciin_1.BLIF un10_ciin_2.BLIF un10_ciin_7 +11 1 +.names N_79_i.BLIF N_79 +0 1 +.names un10_ciin_3.BLIF un10_ciin_4.BLIF un10_ciin_8 +11 1 +.names N_78_i.BLIF N_78 +0 1 +.names un10_ciin_5.BLIF un10_ciin_6.BLIF un10_ciin_9 +11 1 +.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_263 +11 1 +.names un10_ciin_7.BLIF un10_ciin_8.BLIF un10_ciin_10 +11 1 +.names N_108_1.BLIF rst_dly_i_2__n.BLIF N_108 +11 1 +.names un10_ciin_9.BLIF a_decode_c_22__n.BLIF un10_ciin_11 +11 1 +.names N_114_1.BLIF rst_dly_i_1__n.BLIF N_114 +11 1 +.names AS_000_i.BLIF BGACK_030_INT_i.BLIF un6_amiga_bus_data_dir_1 +11 1 +.names N_85_i.BLIF N_85 +0 1 +.names RW_000_c.BLIF nEXP_SPACE_i.BLIF un6_amiga_bus_data_dir_2 +11 1 +.names N_78_i.BLIF SM_AMIGA_0_.BLIF N_104 +11 1 +.names AMIGA_DS_i.BLIF AS_000_i.BLIF pos_clk_as_000_dma6_1_n +11 1 +.names N_91_0.BLIF N_91 +0 1 +.names pos_clk_un1_bgack_030_int_n.BLIF pos_clk_un3_n.BLIF \ +pos_clk_as_000_dma6_2_n +11 1 +.names AS_030_i.BLIF N_91.BLIF N_131 +11 1 +.names DS_000_DMA_0_sqmuxa_i.BLIF pos_clk_as_000_dma6_n.BLIF \ +DS_000_DMA_1_sqmuxa_1 +11 1 +.names N_277_4.BLIF N_277_5.BLIF N_277 +11 1 +.names CLK_030_PE_0_.BLIF clk_030_pe_i_1__n.BLIF pos_clk_un4_rw_000_1_n +11 1 +.names N_130_1.BLIF AS_030_i.BLIF N_130 +11 1 +.names CLK_030_c.BLIF RW_000_i.BLIF pos_clk_un4_rw_000_2_n +11 1 +.names N_270.BLIF RST_DLY_0_.BLIF N_115 +11 1 +.names pos_clk_un12_clk_out_int_n.BLIF AS_000_DMA_i.BLIF \ +pos_clk_un13_clk_out_int_1_n +11 1 +.names N_116_1.BLIF RST_c.BLIF N_116 +11 1 +.names N_76_i.BLIF N_137.BLIF N_125_1 +11 1 +.names N_79.BLIF sm_amiga_i_5__n.BLIF N_105 +11 1 +.names N_76.BLIF rst_dly_i_0__n.BLIF N_116_1 +11 1 +.names N_85.BLIF sm_amiga_i_i_7__n.BLIF N_103 +11 1 +.names cpu_est_i_2__n.BLIF VMA_INT_i.BLIF pos_clk_un29_clk_000_ne_1_1_n +11 1 +.names N_87.BLIF sm_amiga_i_0__n.BLIF N_101 +11 1 +.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF pos_clk_un29_clk_000_ne_1_2_n +11 1 +.names N_259_1.BLIF cpu_est_i_3__n.BLIF N_259 +11 1 +.names pos_clk_un29_clk_000_ne_1_1_n.BLIF pos_clk_un29_clk_000_ne_1_2_n.BLIF \ +pos_clk_un29_clk_000_ne_1_3_n +11 1 +.names N_251.BLIF cpu_est_2_.BLIF N_255 +11 1 +.names N_78_i.BLIF N_263.BLIF N_261_1 +11 1 +.names cpu_est_0_.BLIF cpu_est_i_2__n.BLIF N_256 +11 1 +.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_261_2 +11 1 +.names N_252.BLIF cpu_est_2_.BLIF N_254 +11 1 +.names N_76_i.BLIF N_251_i.BLIF N_262_1 +11 1 +.names cpu_est_1_.BLIF cpu_est_i_2__n.BLIF N_16 +11 1 +.names N_263.BLIF VPA_D_i.BLIF N_262_2 +11 1 +.names BGACK_030_INT_i.BLIF N_86_i.BLIF N_106 +11 1 +.names N_78_i.BLIF RW_c.BLIF DS_000_ENABLE_0_sqmuxa_1_1 +11 1 +.names N_86_i.BLIF N_86 +0 1 +.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_259_1 +11 1 +.names BGACK_030_INT_i.BLIF N_86.BLIF N_107 +11 1 +.names N_16_i.BLIF N_254_i.BLIF N_250_i_1 +11 1 +.names LDS_000_c.BLIF UDS_000_c.BLIF N_117 +11 1 +.names N_255_i.BLIF N_256_i.BLIF N_189_i_1 +11 1 +.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF pos_clk_a0_dma_3_n +11 1 +.names nEXP_SPACE_c.BLIF inst_AS_030_D0.BLIF pos_clk_un6_bg_030_1_n +11 1 +.names AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF BGACK_030_INT_i.BLIF N_129 +11 1 +.names N_77.BLIF N_228_i.BLIF N_108_1 +11 1 +.names pos_clk_size_dma_6_0_1__n.BLIF pos_clk_size_dma_6_1__n +0 1 +.names N_228_i.BLIF rst_dly_i_0__n.BLIF N_114_1 +11 1 +.names pos_clk_size_dma_6_0_0__n.BLIF pos_clk_size_dma_6_0__n +0 1 +.names N_277.BLIF BGACK_000_c.BLIF un21_berr_1 +11 1 +.names pos_clk_rw_000_dma_3_0_n.BLIF pos_clk_rw_000_dma_3_n +0 1 +.names N_277.BLIF BGACK_000_c.BLIF un21_fpu_cs_1 +11 1 +.names pos_clk_amiga_bus_enable_dma_low_3_0_n.BLIF \ +pos_clk_amiga_bus_enable_dma_low_3_n +0 1 +.names inst_BGACK_030_INTreg.BLIF AS_030_000_SYNC_i.BLIF N_130_1 +11 1 +.names pos_clk_amiga_bus_enable_dma_high_3_0_n.BLIF \ +pos_clk_amiga_bus_enable_dma_high_3_n +0 1 +.names N_78.BLIF N_101_i.BLIF N_136_i_1 +11 1 +.names RST_c.BLIF pos_clk_un5_bgack_030_int_d_i_n.BLIF SIZE_DMA_3_sqmuxa +11 1 +.names N_103_i.BLIF N_104_i.BLIF N_152_i_1 +11 1 +.names pos_clk_un5_bgack_030_int_d_i_n.BLIF pos_clk_un5_bgack_030_int_d_n +0 1 +.names N_76.BLIF N_105_i.BLIF N_146_i_1 +11 1 +.names rw_000_dma_0_un1_n.BLIF rw_000_dma_0_un0_n.BLIF N_18 +1- 1 +-1 1 +.names N_115_i.BLIF N_116_i.BLIF N_267_i_1 +11 1 +.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF N_19 +1- 1 +-1 1 +.names N_226_i.BLIF N_224_i.BLIF pos_clk_ipl_1_n +11 1 +.names amiga_bus_enable_dma_low_0_un1_n.BLIF \ +amiga_bus_enable_dma_low_0_un0_n.BLIF N_21 +1- 1 +-1 1 +.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n +0 1 +.names amiga_bus_enable_dma_high_0_un1_n.BLIF \ +amiga_bus_enable_dma_high_0_un0_n.BLIF N_22 +1- 1 +-1 1 +.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n +11 1 +.names un6_amiga_bus_data_dir_1.BLIF un6_amiga_bus_data_dir_2.BLIF \ +un6_amiga_bus_data_dir +11 1 +.names BG_000DFFreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +11 1 +.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF un12_amiga_bus_data_dir_m +11 1 +.names SM_AMIGA_6_.BLIF uds_000_int_0_un3_n +0 1 +.names CLK_EXP_i.BLIF inst_CLK_OUT_PRE_D.BLIF pos_clk_un3_clk_out_int_n +11 1 +.names a_c_0__n.BLIF SM_AMIGA_6_.BLIF uds_000_int_0_un1_n +11 1 .names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF N_3 1- 1 -1 1 -.names N_23_i.BLIF RST_c.BLIF N_32_0 +.names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n +11 1 +.names pos_clk_as_000_dma6_1_n.BLIF pos_clk_as_000_dma6_2_n.BLIF \ +pos_clk_as_000_dma6_n +11 1 +.names SM_AMIGA_6_.BLIF lds_000_int_0_un3_n +0 1 +.names DS_000_DMA_1_sqmuxa_1.BLIF pos_clk_un4_rw_000_i_n.BLIF \ +DS_000_DMA_1_sqmuxa +11 1 +.names pos_clk_un10_sm_amiga_i_n.BLIF SM_AMIGA_6_.BLIF lds_000_int_0_un1_n 11 1 .names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF N_4 1- 1 -1 1 -.names N_22.BLIF N_22_i +.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n +11 1 +.names pos_clk_as_000_dma6_n.BLIF pos_clk_un3_clk_out_int_n.BLIF \ +AS_000_DMA_1_sqmuxa +11 1 +.names DS_000_ENABLE_1_sqmuxa.BLIF ds_000_enable_0_un3_n 0 1 -.names N_22_i.BLIF RST_c.BLIF N_31_0 +.names AS_000_i.BLIF un1_rst_2_1.BLIF un1_rst_2 11 1 -.names N_3.BLIF N_3_i +.names inst_DS_000_ENABLE.BLIF DS_000_ENABLE_1_sqmuxa.BLIF \ +ds_000_enable_0_un1_n +11 1 +.names un1_DS_000_ENABLE_0_sqmuxa.BLIF ds_000_enable_0_un3_n.BLIF \ +ds_000_enable_0_un0_n +11 1 +.names CYCLE_DMA_0_.BLIF pos_clk_un13_bgack_030_int_n.BLIF N_199 +11 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_2__un3_n 0 1 -.names N_3_i.BLIF RST_c.BLIF N_45_0 +.names N_76_i.BLIF pos_clk_un15_bgack_030_int_n.BLIF \ +pos_clk_un13_bgack_030_int_n 11 1 -.names N_4.BLIF N_4_i -0 1 -.names N_4_i.BLIF RST_c.BLIF N_44_0 +.names ipl_c_2__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_2__un1_n 11 1 -.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_15 -1- 1 --1 1 -.names N_15.BLIF N_15_i -0 1 -.names rw_000_dma_0_un1_n.BLIF rw_000_dma_0_un0_n.BLIF N_19 -1- 1 --1 1 -.names N_15_i.BLIF RST_c.BLIF N_40_0 +.names CLK_030_PE_0_.BLIF pos_clk_un13_clk_out_int_n.BLIF N_205 11 1 -.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF N_20 -1- 1 --1 1 -.names N_19.BLIF N_19_i -0 1 -.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_22 -1- 1 --1 1 -.names N_19_i.BLIF RST_c.BLIF N_36_0 +.names IPL_030DFF_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n 11 1 -.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF N_23 -1- 1 --1 1 -.names N_20.BLIF N_20_i -0 1 -.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_24 -1- 1 --1 1 -.names N_20_i.BLIF RST_c.BLIF N_35_0 -11 1 -.names amiga_bus_enable_dma_low_0_un1_n.BLIF \ -amiga_bus_enable_dma_low_0_un0_n.BLIF N_25 -1- 1 --1 1 -.names N_25.BLIF N_25_i -0 1 -.names amiga_bus_enable_dma_high_0_un1_n.BLIF \ -amiga_bus_enable_dma_high_0_un0_n.BLIF N_26 -1- 1 --1 1 -.names N_25_i.BLIF RST_c.BLIF N_30_0 -11 1 -.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF N_27 -1- 1 --1 1 -.names N_26.BLIF N_26_i -0 1 -.names N_26_i.BLIF RST_c.BLIF N_29_0 -11 1 -.names N_27.BLIF N_27_i -0 1 -.names N_27_i.BLIF RST_c.BLIF N_28_0 -11 1 -.names BG_030_c.BLIF BG_030_c_i -0 1 -.names BG_030_c_i.BLIF N_231.BLIF pos_clk_un9_bg_030_0_n -11 1 -.names N_201_i.BLIF N_202_i.BLIF N_235_i_1 -11 1 -.names N_203_i.BLIF RST_c.BLIF N_235_i_2 -11 1 -.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_156_i_1 -11 1 -.names a_decode_c_17__n.BLIF a_decode_i_16__n.BLIF N_156_i_2 -11 1 -.names a_decode_i_18__n.BLIF a_decode_i_19__n.BLIF N_156_i_3 -11 1 -.names N_156_i_1.BLIF N_156_i_2.BLIF N_156_i_4 -11 1 -.names size_c_0__n.BLIF a_c_i_0__n.BLIF pos_clk_un10_sm_amiga_i_1_n -11 1 -.names BERR_c.BLIF N_352_i.BLIF N_176_i_1 -11 1 -.names ahigh_i_24__n.BLIF ahigh_i_25__n.BLIF un10_ciin_1 -11 1 -.names ahigh_i_26__n.BLIF ahigh_i_27__n.BLIF un10_ciin_2 -11 1 -.names ahigh_i_28__n.BLIF ahigh_i_29__n.BLIF un10_ciin_3 -11 1 -.names ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF un10_ciin_4 -11 1 -.names a_decode_c_23__n.BLIF AS_030_D0_i.BLIF un10_ciin_5 -11 1 -.names a_decode_c_20__n.BLIF a_decode_c_21__n.BLIF un10_ciin_6 -11 1 -.names un10_ciin_1.BLIF un10_ciin_2.BLIF un10_ciin_7 -11 1 -.names un10_ciin_3.BLIF un10_ciin_4.BLIF un10_ciin_8 -11 1 -.names un10_ciin_5.BLIF un10_ciin_6.BLIF un10_ciin_9 -11 1 -.names pos_clk_size_dma_6_0_0__n.BLIF pos_clk_size_dma_6_0__n -0 1 -.names un10_ciin_7.BLIF un10_ciin_8.BLIF un10_ciin_10 -11 1 -.names pos_clk_size_dma_6_0_1__n.BLIF pos_clk_size_dma_6_1__n -0 1 -.names un10_ciin_9.BLIF a_decode_c_22__n.BLIF un10_ciin_11 -11 1 -.names CYCLE_DMA_0_.BLIF N_150_i.BLIF N_199 -11 1 -.names AS_030_000_SYNC_i.BLIF CLK_000_D_4_.BLIF N_163_i_1 -11 1 -.names pos_clk_un21_bgack_030_int_i_0_0_n.BLIF \ -pos_clk_un21_bgack_030_int_i_0_n -0 1 -.names clk_000_d_i_3__n.BLIF nEXP_SPACE_c.BLIF N_163_i_2 -11 1 -.names N_231_i.BLIF N_231 -0 1 -.names AS_000_i.BLIF BGACK_030_INT_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_1_n -11 1 -.names N_233_0.BLIF N_233 -0 1 -.names pos_clk_un21_bgack_030_int_i_0_o3_0_x2.BLIF N_350_i.BLIF \ -pos_clk_un21_bgack_030_int_i_0_0_2_n -11 1 -.names ipl_i_2__n.BLIF RST_c.BLIF N_111 -11 1 -.names N_149.BLIF N_278_i.BLIF N_138_i_1 -11 1 -.names ipl_i_1__n.BLIF RST_c.BLIF N_112 -11 1 -.names N_282_i.BLIF RST_c.BLIF N_138_i_2 -11 1 -.names ipl_i_0__n.BLIF RST_c.BLIF N_113 -11 1 -.names AS_000_i.BLIF N_199_i.BLIF N_59_i_1 -11 1 -.names a_c_1__n.BLIF BGACK_030_INT_i.BLIF N_114 -11 1 -.names N_204_i.BLIF N_251_i.BLIF N_59_i_2 -11 1 -.names a_i_1__n.BLIF BGACK_030_INT_i.BLIF N_115 -11 1 -.names N_150_i.BLIF N_191_i_i.BLIF N_233_0_1 -11 1 -.names N_245_0.BLIF N_245 -0 1 -.names N_192_i_i.BLIF N_360_i.BLIF N_233_0_2 -11 1 -.names N_246_0.BLIF N_246 -0 1 -.names AS_030_D0_i.BLIF N_156.BLIF N_214_1 -11 1 -.names N_62_0.BLIF N_62 -0 1 -.names N_185_i.BLIF sm_amiga_i_i_7__n.BLIF N_214_2 -11 1 -.names N_214_1.BLIF N_214_2.BLIF N_214_3 -11 1 -.names AS_030_i.BLIF DSACK1_INT_i.BLIF N_132 -11 1 -.names un21_berr_1.BLIF FPU_SENSE_i.BLIF un21_fpu_cs_1 -11 1 -.names AS_000_INT_i.BLIF AS_030_i.BLIF N_133 -11 1 -.names un21_berr_1.BLIF FPU_SENSE_c.BLIF un21_berr_1_0 -11 1 -.names N_310_0.BLIF N_310 -0 1 -.names N_149_i.BLIF N_176.BLIF N_182_0_1 -11 1 -.names N_126_0.BLIF N_126 -0 1 -.names N_196_i.BLIF N_197_i.BLIF N_234_i_1 -11 1 -.names N_149_i.BLIF N_149 -0 1 -.names N_198_i.BLIF RST_c.BLIF N_234_i_2 -11 1 -.names N_150_i.BLIF N_150 -0 1 -.names N_149_i.BLIF N_357.BLIF N_206_1 -11 1 -.names N_158_i.BLIF N_158 -0 1 -.names VPA_D_i.BLIF cpu_est_i_3__n.BLIF N_206_2 -11 1 -.names N_160_i.BLIF N_160 -0 1 -.names N_150_i.BLIF N_159_i.BLIF N_205_1 -11 1 -.names N_163_i.BLIF N_163 -0 1 -.names cpu_est_i_0__n.BLIF cpu_est_i_3__n.BLIF N_205_2 -11 1 -.names N_172_i.BLIF N_172 -0 1 -.names N_159_i.BLIF N_314_0.BLIF N_352_1 -11 1 -.names N_179_0.BLIF N_179 -0 1 -.names VMA_INT_i.BLIF VPA_D_i.BLIF N_352_2 -11 1 -.names N_184_0.BLIF N_184 -0 1 -.names inst_AS_030_D0.BLIF CLK_000_D_0_.BLIF N_231_i_1 -11 1 -.names N_185_i.BLIF N_185 -0 1 -.names N_291_i.BLIF N_293_i.BLIF N_152_i_1 -11 1 -.names N_196_1.BLIF rst_dly_i_2__n.BLIF N_196 -11 1 -.names N_150.BLIF N_288_i.BLIF N_144_i_1 -11 1 -.names N_203_1.BLIF rst_dly_i_1__n.BLIF N_203 -11 1 -.names N_287_i.BLIF N_340_i.BLIF N_142_i_1 -11 1 -.names cycle_dma_i_0__n.BLIF N_150.BLIF N_204 -11 1 -.names N_150.BLIF N_284_i.BLIF N_312_i_1 -11 1 -.names N_209_1.BLIF cpu_est_i_3__n.BLIF N_209 -11 1 -.names N_265_i.BLIF N_267_i.BLIF N_236_i_1 -11 1 -.names N_214_3.BLIF nEXP_SPACE_c.BLIF N_214 -11 1 -.names N_160.BLIF N_229_i.BLIF N_148_i_1 -11 1 -.names AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF BGACK_030_INT_i.BLIF N_215 -11 1 -.names N_150.BLIF N_227_i.BLIF N_136_i_1 -11 1 -.names N_216_1.BLIF AS_030_i.BLIF N_216 -11 1 -.names N_226_i.BLIF RW_000_i.BLIF N_246_0_1 -11 1 -.names CLK_030_H_i.BLIF N_184.BLIF N_218 -11 1 -.names N_218_i.BLIF RST_c.BLIF N_249_i_1 -11 1 -.names N_224_1.BLIF RW_000_c.BLIF N_224 -11 1 -.names AS_000_i.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF N_57_i_1 -11 1 -.names inst_AS_000_DMA.BLIF RW_000_i.BLIF N_332 -11 1 -.names N_149_i.BLIF N_355.BLIF N_338_1 -11 1 -.names inst_CLK_030_H.BLIF CLK_030_c.BLIF N_226 -11 1 -.names AS_000_i.BLIF N_186_i.BLIF N_224_1 -11 1 -.names N_174.BLIF sm_amiga_i_0__n.BLIF N_227 -11 1 -.names inst_BGACK_030_INTreg.BLIF AS_030_000_SYNC_i.BLIF N_216_1 -11 1 -.names N_179.BLIF sm_amiga_i_6__n.BLIF N_229 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_209_1 -11 1 -.names inst_RESET_OUT.BLIF RST_c.BLIF N_337 -11 1 -.names N_207_i.BLIF rst_dly_i_0__n.BLIF N_203_1 -11 1 -.names N_338_1.BLIF RST_c.BLIF N_338 -11 1 -.names N_158.BLIF N_207_i.BLIF N_196_1 -11 1 -.names N_154.BLIF RST_DLY_0_.BLIF N_265 -11 1 -.names N_149.BLIF cpu_est_0_3__un3_n -0 1 -.names N_82_i.BLIF rst_dly_i_0__n.BLIF N_267 -11 1 -.names cpu_est_3_.BLIF N_149.BLIF cpu_est_0_3__un1_n -11 1 -.names BGACK_030_INT_i.BLIF N_172.BLIF N_268 -11 1 -.names N_189_i.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n -11 1 -.names BGACK_030_INT_i.BLIF N_172_i.BLIF N_275 -11 1 -.names un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un3_n -0 1 -.names N_150.BLIF SM_AMIGA_2_.BLIF N_278 -11 1 -.names N_311.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un1_n -11 1 -.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_282 -11 1 -.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n -11 1 -.names N_182.BLIF sm_amiga_i_2__n.BLIF N_284 +.names pos_clk_un13_clk_out_int_1_n.BLIF pos_clk_un3_clk_out_int_n.BLIF \ +pos_clk_un13_clk_out_int_n 11 1 .names pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un3_n 0 1 -.names N_149_i.BLIF N_176.BLIF N_340 -11 1 +.names pos_clk_un15_bgack_030_int_i_n.BLIF pos_clk_un15_bgack_030_int_n +0 1 .names cpu_est_i_1__n.BLIF pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un1_n 11 1 -.names N_171.BLIF sm_amiga_i_3__n.BLIF N_287 -11 1 +.names pos_clk_un3_0_n.BLIF pos_clk_un3_n +0 1 .names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n 11 1 -.names N_183.BLIF sm_amiga_i_4__n.BLIF N_288 -11 1 -.names N_149.BLIF cpu_est_0_1__un3_n +.names pos_clk_un12_clk_out_int_0_n.BLIF pos_clk_un12_clk_out_int_n 0 1 -.names N_163.BLIF sm_amiga_i_i_7__n.BLIF N_291 -11 1 -.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c +.names N_76.BLIF cpu_est_0_1__un3_n 0 1 -.names cpu_est_1_.BLIF N_149.BLIF cpu_est_0_1__un1_n +.names pos_clk_un1_bgack_030_int_0_n.BLIF pos_clk_un1_bgack_030_int_n +0 1 +.names cpu_est_1_.BLIF N_76.BLIF cpu_est_0_1__un1_n 11 1 -.names N_150_i.BLIF SM_AMIGA_0_.BLIF N_293 +.names RW_000_c.BLIF pos_clk_un3_clk_out_int_i_n.BLIF DS_000_DMA_0_sqmuxa 11 1 .names cpu_est_2_1__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n 11 1 -.names LDS_000_c.BLIF UDS_000_c.BLIF N_350 +.names RST_c.BLIF pos_clk_as_000_dma6_n.BLIF un1_rst_3 11 1 -.names N_149.BLIF cpu_est_0_2__un3_n +.names N_76.BLIF cpu_est_0_2__un3_n 0 1 -.names N_158_i.BLIF RST_DLY_2_.BLIF N_355 -11 1 -.names cpu_est_2_.BLIF N_149.BLIF cpu_est_0_2__un1_n +.names cpu_est_2_.BLIF N_76.BLIF cpu_est_0_2__un1_n 11 1 .names cpu_est_2_2__n.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n 11 1 -.names N_16.BLIF N_16_i +.names N_76.BLIF cpu_est_0_3__un3_n 0 1 -.names SM_AMIGA_6_.BLIF uds_000_int_0_un3_n +.names pos_clk_un4_rw_000_1_n.BLIF pos_clk_un4_rw_000_2_n.BLIF \ +pos_clk_un4_rw_000_n +11 1 +.names cpu_est_3_.BLIF N_76.BLIF cpu_est_0_3__un1_n +11 1 +.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_7 +1- 1 +-1 1 +.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c 0 1 -.names N_16_i.BLIF RST_c.BLIF N_39_0 -11 1 -.names a_c_0__n.BLIF SM_AMIGA_6_.BLIF uds_000_int_0_un1_n -11 1 -.names VPA_c.BLIF VPA_c_i -0 1 -.names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n -11 1 -.names RST_c.BLIF VPA_c_i.BLIF N_52_0 -11 1 -.names SM_AMIGA_6_.BLIF lds_000_int_0_un3_n -0 1 -.names N_156_i.BLIF N_156 -0 1 -.names DTACK_c.BLIF DTACK_c_i -0 1 -.names pos_clk_un10_sm_amiga_i_n.BLIF SM_AMIGA_6_.BLIF lds_000_int_0_un1_n -11 1 -.names N_154.BLIF N_158_i.BLIF N_201 -11 1 -.names DTACK_c_i.BLIF RST_c.BLIF N_53_0 -11 1 -.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n -11 1 -.names N_82_i.BLIF rst_dly_i_1__n.BLIF N_202 -11 1 -.names N_210.BLIF N_210_i -0 1 -.names pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n -0 1 -.names N_154_0.BLIF N_154 -0 1 -.names N_211.BLIF N_211_i -0 1 -.names BGACK_000_c.BLIF pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n -11 1 -.names AS_030_i.BLIF BGACK_000_c.BLIF un21_berr_1 -11 1 -.names N_210_i.BLIF N_211_i.BLIF N_189_i -11 1 -.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \ -bgack_030_int_0_un0_n -11 1 -.names N_174_i.BLIF N_174 -0 1 -.names N_160.BLIF N_175_i.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 -11 1 -.names N_66.BLIF ds_000_enable_0_un3_n -0 1 -.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF N_223 -11 1 -.names RW_c.BLIF RW_c_i -0 1 -.names un1_DS_000_ENABLE_0_sqmuxa.BLIF N_66.BLIF ds_000_enable_0_un1_n -11 1 -.names N_133.BLIF RST_c.BLIF N_221 -11 1 -.names N_175_i.BLIF RW_c_i.BLIF N_311_0 -11 1 -.names inst_DS_000_ENABLE.BLIF ds_000_enable_0_un3_n.BLIF \ -ds_000_enable_0_un0_n -11 1 -.names N_160_i.BLIF RST_c.BLIF N_222 -11 1 -.names N_336.BLIF N_336_i -0 1 -.names N_126.BLIF size_dma_0_0__un3_n -0 1 -.names N_132.BLIF RST_c.BLIF N_219 -11 1 -.names N_244.BLIF N_244_i -0 1 -.names pos_clk_size_dma_6_0__n.BLIF N_126.BLIF size_dma_0_0__un1_n -11 1 -.names N_174_i.BLIF RST_c.BLIF N_220 -11 1 -.names SIZE_DMA_0_.BLIF size_dma_0_0__un3_n.BLIF size_dma_0_0__un0_n +.names N_189_i.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n 11 1 .names pos_clk_un6_bgack_000_0_n.BLIF pos_clk_un6_bgack_000_n 0 1 -.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF N_314_0 -11 1 -.names N_126.BLIF size_dma_0_1__un3_n +.names inst_VPA_D.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un3_n 0 1 -.names AS_000_c.BLIF N_150_i.BLIF N_359 +.names AS_000_c.BLIF N_76_i.BLIF pos_clk_un4_bgack_000_n 11 1 -.names cpu_est_i_1__n.BLIF cpu_est_i_2__n.BLIF N_159_i +.names DTACK_D0_i.BLIF inst_VPA_D.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un1_n 11 1 -.names pos_clk_size_dma_6_1__n.BLIF N_126.BLIF size_dma_0_1__un1_n +.names N_265_2_0.BLIF N_265_2 +0 1 +.names pos_clk_un29_clk_000_ne_1_n.BLIF \ +pos_clk_un31_clk_000_ne_1_i_m2_un3_n.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un0_n 11 1 -.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_8 +.names N_76.BLIF rst_dly_i_2__n.BLIF N_111 +11 1 +.names pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n +0 1 +.names N_137.BLIF N_265_2.BLIF N_109 +11 1 +.names BG_030_c.BLIF BG_030_c_i +0 1 +.names BGACK_000_c.BLIF pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n +11 1 +.names N_76.BLIF rst_dly_i_1__n.BLIF N_113 +11 1 +.names pos_clk_un6_bg_030_n.BLIF pos_clk_un6_bg_030_i_n +0 1 +.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \ +bgack_030_int_0_un0_n +11 1 +.names N_77_i.BLIF N_134.BLIF N_112 +11 1 +.names BG_030_c_i.BLIF pos_clk_un6_bg_030_i_n.BLIF pos_clk_un9_bg_030_0_n +11 1 +.names DS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un3_n +0 1 +.names pos_clk_un31_clk_000_ne_1_i_m2_un1_n.BLIF \ +pos_clk_un31_clk_000_ne_1_i_m2_un0_n.BLIF N_98 1- 1 -1 1 -.names inst_VMA_INTreg.BLIF VMA_INT_i +.names inst_UDS_000_INT.BLIF UDS_000_INT_i 0 1 -.names SIZE_DMA_1_.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un0_n +.names inst_DS_000_DMA.BLIF DS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un1_n 11 1 -.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF N_14 +.names pos_clk_un29_clk_000_ne_1_3_n.BLIF cpu_est_i_1__n.BLIF \ +pos_clk_un29_clk_000_ne_1_n +11 1 +.names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un1_UDS_000_INT_0 +11 1 +.names pos_clk_as_000_dma6_i_n.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n +11 1 +.names N_87_i.BLIF N_87 +0 1 +.names inst_LDS_000_INT.BLIF LDS_000_INT_i +0 1 +.names AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un3_n +0 1 +.names N_270_0.BLIF N_270 +0 1 +.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un1_LDS_000_INT_0 +11 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un1_n +11 1 +.names N_76_i.BLIF N_137_i_0.BLIF N_134 +11 1 +.names N_23.BLIF N_23_i +0 1 +.names pos_clk_as_000_dma6_i_n.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n +11 1 +.names N_125_1.BLIF RST_c.BLIF N_125 +11 1 +.names N_23_i.BLIF RST_c.BLIF N_30_0 +11 1 +.names SIZE_DMA_3_sqmuxa.BLIF size_dma_0_1__un3_n +0 1 +.names inst_RESET_OUT.BLIF RST_c.BLIF N_124 +11 1 +.names N_20.BLIF N_20_i +0 1 +.names SIZE_DMA_1_.BLIF SIZE_DMA_3_sqmuxa.BLIF size_dma_0_1__un1_n +11 1 +.names N_87_i.BLIF RST_c.BLIF N_121 +11 1 +.names N_20_i.BLIF RST_c.BLIF N_33_0 +11 1 +.names pos_clk_size_dma_6_1__n.BLIF size_dma_0_1__un3_n.BLIF \ +size_dma_0_1__un0_n +11 1 +.names DSACK1_INT_i.BLIF N_274.BLIF N_120 +11 1 +.names N_13.BLIF N_13_i +0 1 +.names SIZE_DMA_3_sqmuxa.BLIF size_dma_0_0__un3_n +0 1 +.names N_77_i.BLIF RST_DLY_2_.BLIF N_137 +11 1 +.names N_13_i.BLIF RST_c.BLIF N_40_0 +11 1 +.names SIZE_DMA_0_.BLIF SIZE_DMA_3_sqmuxa.BLIF size_dma_0_0__un1_n +11 1 +.names pos_clk_un31_clk_000_ne_i_n.BLIF pos_clk_un31_clk_000_ne_n +0 1 +.names ipl_c_2__n.BLIF ipl_c_i_2__n +0 1 +.names pos_clk_size_dma_6_0__n.BLIF size_dma_0_0__un3_n.BLIF \ +size_dma_0_0__un0_n +11 1 +.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_17 1- 1 -1 1 -.names N_352.BLIF N_352_i -0 1 -.names N_233.BLIF ipl_030_0_0__un3_n -0 1 -.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_21 -1- 1 --1 1 -.names N_353.BLIF N_353_i -0 1 -.names IPL_030DFF_0_reg.BLIF N_233.BLIF ipl_030_0_0__un1_n +.names ipl_c_i_2__n.BLIF RST_c.BLIF N_51_0 11 1 -.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_9 -1- 1 --1 1 -.names N_293.BLIF N_293_i +.names pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_high_0_un3_n 0 1 -.names ipl_c_0__n.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n -11 1 -.names un1_DS_000_ENABLE_0_sqmuxa_0.BLIF un1_DS_000_ENABLE_0_sqmuxa -0 1 -.names N_293_i.BLIF SM_AMIGA_i_7_.BLIF N_175_i -11 1 -.names N_233.BLIF ipl_030_0_1__un3_n -0 1 -.names N_66_0.BLIF N_66 -0 1 -.names N_176_i_1.BLIF N_353_i.BLIF N_176_i -11 1 -.names IPL_030DFF_1_reg.BLIF N_233.BLIF ipl_030_0_1__un1_n -11 1 -.names N_171_i.BLIF N_171 -0 1 -.names ipl_c_1__n.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n -11 1 -.names N_160_i.BLIF RW_c.BLIF N_354 -11 1 -.names N_198.BLIF N_198_i -0 1 -.names N_233.BLIF ipl_030_0_2__un3_n -0 1 -.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_18 -1- 1 --1 1 -.names N_197.BLIF N_197_i -0 1 -.names IPL_030DFF_2_reg.BLIF N_233.BLIF ipl_030_0_2__un1_n -11 1 .names pos_clk_un9_clk_000_pe_0_n.BLIF pos_clk_un9_clk_000_pe_n 0 1 -.names N_196.BLIF N_196_i +.names N_26.BLIF N_26_i 0 1 -.names ipl_c_2__n.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n +.names pos_clk_amiga_bus_enable_dma_high_3_n.BLIF \ +pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_high_0_un1_n 11 1 .names cpu_est_2_0_1__n.BLIF cpu_est_2_1__n 0 1 -.names N_149_i.BLIF SM_AMIGA_5_.BLIF N_183_0 -11 1 -.names N_185.BLIF a0_dma_0_un3_n -0 1 -.names cpu_est_2_0_2__n.BLIF cpu_est_2_2__n -0 1 -.names N_182_0_1.BLIF SM_AMIGA_3_.BLIF N_182_0 -11 1 -.names pos_clk_a0_dma_3_n.BLIF N_185.BLIF a0_dma_0_un1_n -11 1 -.names N_154.BLIF N_355.BLIF N_197 -11 1 -.names cpu_est_3_.BLIF cpu_est_i_1__n.BLIF N_180_0 -11 1 -.names inst_A0_DMA.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n -11 1 -.names N_149.BLIF rst_dly_i_2__n.BLIF N_198 -11 1 -.names cpu_est_1_.BLIF cpu_est_i_3__n.BLIF N_178_0 -11 1 -.names N_185.BLIF amiga_bus_enable_dma_low_0_un3_n -0 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_208 -11 1 -.names N_149.BLIF RST_c.BLIF N_82_i -11 1 -.names N_114_i.BLIF N_185.BLIF amiga_bus_enable_dma_low_0_un1_n -11 1 -.names N_315.BLIF cpu_est_2_.BLIF N_210 -11 1 -.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_315_i -11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF \ -amiga_bus_enable_dma_low_0_un3_n.BLIF amiga_bus_enable_dma_low_0_un0_n -11 1 -.names N_315_i.BLIF N_315 -0 1 -.names N_351.BLIF N_351_i -0 1 -.names N_185.BLIF amiga_bus_enable_dma_high_0_un3_n -0 1 -.names N_180.BLIF cpu_est_i_2__n.BLIF N_212 -11 1 -.names N_351_i.BLIF RST_c.BLIF N_154_0 -11 1 -.names N_115_i.BLIF N_185.BLIF amiga_bus_enable_dma_high_0_un1_n -11 1 -.names N_180_0.BLIF N_180 -0 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_149_i +.names N_26_i.BLIF RST_c.BLIF N_29_0 11 1 .names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF \ amiga_bus_enable_dma_high_0_un3_n.BLIF amiga_bus_enable_dma_high_0_un0_n 11 1 -.names N_178.BLIF cpu_est_2_.BLIF N_213 -11 1 -.names N_355_i_0.BLIF RST_c.BLIF N_207_i -11 1 -.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n -0 1 -.names N_178_0.BLIF N_178 -0 1 -.names N_228.BLIF N_228_i -0 1 -.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n -11 1 -.names N_160.BLIF sm_amiga_i_5__n.BLIF N_228 -11 1 -.names BG_000DFFreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n -11 1 -.names N_182_0.BLIF N_182 -0 1 -.names N_213.BLIF N_213_i -0 1 -.names N_246.BLIF ds_000_dma_0_un3_n -0 1 -.names N_176_i.BLIF N_176 -0 1 -.names N_212.BLIF N_212_i -0 1 -.names pos_clk_ds_000_dma_4_n.BLIF N_246.BLIF ds_000_dma_0_un1_n -11 1 -.names N_183_0.BLIF N_183 -0 1 -.names N_212_i.BLIF N_213_i.BLIF N_309_i -11 1 -.names inst_DS_000_DMA.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n -11 1 -.names N_149_i.BLIF N_355_i_0.BLIF N_351 -11 1 -.names N_357.BLIF N_357_i -0 1 -.names N_245.BLIF as_000_dma_0_un3_n -0 1 -.names N_315_i.BLIF cpu_est_i_2__n.BLIF N_357 -11 1 -.names N_210_i.BLIF N_357_i.BLIF cpu_est_2_0_2__n -11 1 -.names pos_clk_un21_bgack_030_int_i_0_n.BLIF N_245.BLIF as_000_dma_0_un1_n -11 1 -.names N_206_1.BLIF N_206_2.BLIF N_206 -11 1 -.names N_208.BLIF N_208_i -0 1 -.names inst_AS_000_DMA.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n -11 1 -.names N_205_1.BLIF N_205_2.BLIF N_205 -11 1 -.names N_209.BLIF N_209_i -0 1 -.names N_310.BLIF as_030_000_sync_0_un3_n -0 1 -.names N_352_1.BLIF N_352_2.BLIF N_352 -11 1 -.names N_208_i.BLIF N_209_i.BLIF cpu_est_2_0_1__n -11 1 -.names AS_030_c.BLIF N_310.BLIF as_030_000_sync_0_un1_n -11 1 -.names DTACK_D0_i.BLIF inst_VPA_D.BLIF N_353 -11 1 -.names N_206.BLIF N_206_i -0 1 -.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ -as_030_000_sync_0_un0_n -11 1 -.names N_314_0.BLIF N_314 -0 1 -.names N_205.BLIF N_205_i -0 1 -.names N_185.BLIF rw_000_dma_0_un3_n -0 1 -.names N_149_i.BLIF cpu_est_0_.BLIF N_244 -11 1 -.names N_205_i.BLIF N_206_i.BLIF pos_clk_un9_clk_000_pe_0_n -11 1 -.names pos_clk_rw_000_dma_3_n.BLIF N_185.BLIF rw_000_dma_0_un1_n -11 1 -.names N_149.BLIF cpu_est_i_0__n.BLIF N_336 -11 1 -.names N_18.BLIF N_18_i -0 1 -.names inst_RW_000_DMA.BLIF rw_000_dma_0_un3_n.BLIF rw_000_dma_0_un0_n -11 1 -.names N_311_0.BLIF N_311 -0 1 -.names N_18_i.BLIF RST_c.BLIF N_37_0 -11 1 -.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 -0 1 -.names N_150_i.BLIF SM_AMIGA_4_.BLIF N_171_i -11 1 -.names N_314.BLIF cpu_est_i_2__n.BLIF N_211 -11 1 -.names N_354.BLIF N_354_i -0 1 -.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_16 -1- 1 --1 1 -.names N_171.BLIF N_354_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_0 -11 1 -.names un1_amiga_bus_enable_low.BLIF un1_amiga_bus_enable_low_i -0 1 -.names AS_030_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_0.BLIF N_66_0 -11 1 -.names un21_fpu_cs.BLIF un21_fpu_cs_i -0 1 -.names inst_UDS_000_INT.BLIF UDS_000_INT_i -0 1 -.names cpu_est_2_.BLIF cpu_est_i_2__n -0 1 -.names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un1_UDS_000_INT_0 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_0__n -0 1 -.names inst_LDS_000_INT.BLIF LDS_000_INT_i -0 1 -.names inst_VPA_D.BLIF VPA_D_i -0 1 -.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un1_LDS_000_INT_0 -11 1 -.names inst_DTACK_D0.BLIF DTACK_D0_i -0 1 -.names N_21.BLIF N_21_i -0 1 -.names cpu_est_3_.BLIF cpu_est_i_3__n -0 1 -.names N_21_i.BLIF RST_c.BLIF N_34_0 -11 1 -.names SM_AMIGA_i_7_.BLIF sm_amiga_i_i_7__n -0 1 -.names N_14.BLIF N_14_i -0 1 -.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n -0 1 -.names N_14_i.BLIF RST_c.BLIF N_41_0 -11 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n -0 1 -.names N_8.BLIF N_8_i -0 1 -.names cpu_est_1_.BLIF cpu_est_i_1__n -0 1 -.names N_8_i.BLIF RST_c.BLIF N_42_0 -11 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_1__n +.names cpu_est_2_0_2__n.BLIF cpu_est_2_2__n 0 1 .names a_c_0__n.BLIF a_c_i_0__n 0 1 -.names N_355.BLIF N_355_i_0 +.names pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_low_0_un3_n 0 1 +.names N_261_1.BLIF N_261_2.BLIF N_261 +11 1 .names size_c_1__n.BLIF size_c_i_1__n 0 1 -.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n -0 1 +.names pos_clk_amiga_bus_enable_dma_low_3_n.BLIF \ +pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_low_0_un1_n +11 1 +.names N_262_1.BLIF N_262_2.BLIF N_262 +11 1 .names pos_clk_un10_sm_amiga_i_1_n.BLIF size_c_i_1__n.BLIF \ pos_clk_un10_sm_amiga_i_n 11 1 +.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF \ +amiga_bus_enable_dma_low_0_un3_n.BLIF amiga_bus_enable_dma_low_0_un0_n +11 1 +.names N_251_i.BLIF N_251 +0 1 +.names DS_000_ENABLE_0_sqmuxa_1.BLIF DS_000_ENABLE_0_sqmuxa_1_i +0 1 +.names pos_clk_un5_bgack_030_int_d_n.BLIF a0_dma_0_un3_n +0 1 +.names N_252_0.BLIF N_252 +0 1 +.names DS_000_ENABLE_0_sqmuxa_1_i.BLIF N_157.BLIF un1_DS_000_ENABLE_0_sqmuxa_i +11 1 +.names pos_clk_a0_dma_3_n.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF \ +a0_dma_0_un1_n +11 1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_258 +11 1 +.names N_78_i.BLIF SM_AMIGA_4_.BLIF N_157_i +11 1 +.names inst_A0_DMA.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n +11 1 +.names N_251_i.BLIF cpu_est_i_2__n.BLIF N_257 +11 1 +.names N_76_i.BLIF SM_AMIGA_5_.BLIF N_160_0 +11 1 +.names pos_clk_un5_bgack_030_int_d_n.BLIF rw_000_dma_0_un3_n +0 1 +.names AS_030_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_i.BLIF DS_000_ENABLE_1_sqmuxa +11 1 +.names SM_AMIGA_3_.BLIF pos_clk_un31_clk_000_ne_n.BLIF N_161_0 +11 1 +.names pos_clk_rw_000_dma_3_n.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF \ +rw_000_dma_0_un1_n +11 1 +.names un1_DS_000_ENABLE_0_sqmuxa_i.BLIF un1_DS_000_ENABLE_0_sqmuxa +0 1 +.names N_85_i.BLIF sm_amiga_i_i_7__n.BLIF N_162_0 +11 1 +.names inst_RW_000_DMA.BLIF rw_000_dma_0_un3_n.BLIF rw_000_dma_0_un0_n +11 1 +.names N_76.BLIF sm_amiga_i_2__n.BLIF N_102 +11 1 +.names N_165.BLIF N_165_i +0 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_0__un3_n +0 1 +.names AS_000_INT_i.BLIF N_274.BLIF N_118 +11 1 +.names ipl_c_0__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_0__un1_n +11 1 +.names N_79_i.BLIF RST_c.BLIF N_119 +11 1 +.names N_167.BLIF N_167_i +0 1 +.names IPL_030DFF_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n +11 1 +.names N_264_i.BLIF N_264 +0 1 +.names N_166.BLIF N_166_i +0 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_1__un3_n +0 1 +.names DS_000_ENABLE_0_sqmuxa_1_1.BLIF SM_AMIGA_6_.BLIF \ +DS_000_ENABLE_0_sqmuxa_1 +11 1 +.names ipl_c_1__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_1__un1_n +11 1 +.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_164 +11 1 +.names N_168.BLIF N_168_i +0 1 +.names IPL_030DFF_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n +11 1 +.names N_162.BLIF sm_amiga_i_6__n.BLIF N_170 +11 1 +.names N_64.BLIF as_030_000_sync_0_un3_n +0 1 +.names N_160.BLIF sm_amiga_i_4__n.BLIF N_168 +11 1 +.names N_170.BLIF N_170_i +0 1 +.names inst_AS_030_000_SYNC.BLIF N_64.BLIF as_030_000_sync_0_un1_n +11 1 +.names N_157.BLIF sm_amiga_i_3__n.BLIF N_166 +11 1 +.names AS_030_c.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n +11 1 +.names N_76_i.BLIF pos_clk_un31_clk_000_ne_n.BLIF N_167 +11 1 +.names N_164.BLIF N_164_i +0 1 +.names un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un3_n +0 1 +.names N_161.BLIF sm_amiga_i_2__n.BLIF N_165 +11 1 +.names pos_clk_rw_000_int_5_n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF \ +rw_000_int_0_un1_n +11 1 +.names N_162_0.BLIF N_162 +0 1 +.names N_102.BLIF N_102_i +0 1 +.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n +11 1 +.names N_161_0.BLIF N_161 +0 1 +.names N_78.BLIF N_102_i.BLIF N_264_i +11 1 +.names N_160_0.BLIF N_160 +0 1 +.names N_78_i.BLIF SM_AMIGA_6_.BLIF N_79_i +11 1 +.names N_157_i.BLIF N_157 +0 1 +.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_78_i +11 1 +.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_26 +1- 1 +-1 1 +.names N_119.BLIF N_119_i +0 1 +.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF N_13 +1- 1 +-1 1 +.names N_118.BLIF N_118_i +0 1 +.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_20 +1- 1 +-1 1 +.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF N_23 +1- 1 +-1 1 +.names N_255.BLIF N_255_i +0 1 +.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_8 +1- 1 +-1 1 +.names N_257.BLIF N_257_i +0 1 +.names pos_clk_un9_bg_030_0_n.BLIF pos_clk_un9_bg_030_n +0 1 +.names N_255_i.BLIF N_257_i.BLIF cpu_est_2_0_2__n +11 1 +.names un1_amiga_bus_enable_low.BLIF un1_amiga_bus_enable_low_i +0 1 +.names N_258.BLIF N_258_i +0 1 +.names un21_fpu_cs.BLIF un21_fpu_cs_i +0 1 +.names N_259.BLIF N_259_i +0 1 .names SM_AMIGA_2_.BLIF sm_amiga_i_2__n 0 1 -.names N_359.BLIF N_359_i -0 1 -.names RST_DLY_0_.BLIF rst_dly_i_0__n -0 1 -.names BGACK_000_c.BLIF N_359_i.BLIF pos_clk_un6_bgack_000_0_n -11 1 -.names RST_DLY_2_.BLIF rst_dly_i_2__n -0 1 -.names N_220.BLIF N_220_i -0 1 -.names a_decode_c_19__n.BLIF a_decode_i_19__n -0 1 -.names N_219.BLIF N_219_i -0 1 -.names a_decode_c_18__n.BLIF a_decode_i_18__n -0 1 -.names a_decode_c_16__n.BLIF a_decode_i_16__n -0 1 -.names N_222.BLIF N_222_i -0 1 -.names RW_000_c.BLIF RW_000_i -0 1 -.names N_221.BLIF N_221_i -0 1 -.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n -0 1 -.names AS_030_c.BLIF AS_030_i -0 1 -.names N_223.BLIF N_223_i -0 1 -.names inst_AS_000_INT.BLIF AS_000_INT_i -0 1 -.names N_224.BLIF N_224_i -0 1 -.names inst_DSACK1_INT.BLIF DSACK1_INT_i -0 1 -.names N_223_i.BLIF N_224_i.BLIF AMIGA_BUS_DATA_DIR_c_0 -11 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_0__n -0 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_150_i -11 1 -.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n -0 1 -.names N_156_i_4.BLIF N_156_i_3.BLIF N_156_i +.names N_258_i.BLIF N_259_i.BLIF cpu_est_2_0_1__n 11 1 .names SM_AMIGA_1_.BLIF sm_amiga_i_1__n 0 1 -.names N_150_i.BLIF SM_AMIGA_6_.BLIF N_160_i +.names N_262.BLIF N_262_i +0 1 +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names N_261.BLIF N_261_i +0 1 +.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n +0 1 +.names N_261_i.BLIF N_262_i.BLIF pos_clk_un9_clk_000_pe_0_n 11 1 -.names FPU_SENSE_c.BLIF FPU_SENSE_i +.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n 0 1 -.names N_149_i.BLIF SM_AMIGA_1_.BLIF N_174_i +.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_251_i 11 1 -.names RST_DLY_1_.BLIF rst_dly_i_1__n +.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n 0 1 -.names RST_DLY_0_.BLIF RST_DLY_1_.BLIF N_158_i +.names cpu_est_1_.BLIF cpu_est_i_3__n.BLIF N_252_0 11 1 -.names inst_AS_030_D0.BLIF AS_030_D0_i +.names CLK_000_D_0_.BLIF clk_000_d_i_0__n 0 1 -.names N_201.BLIF N_201_i +.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_76_i +11 1 +.names inst_AS_000_INT.BLIF AS_000_INT_i 0 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +.names N_17.BLIF N_17_i 0 1 -.names N_202.BLIF N_202_i +.names SM_AMIGA_i_7_.BLIF sm_amiga_i_i_7__n 0 1 -.names nEXP_SPACE_c.BLIF nEXP_SPACE_i +.names N_17_i.BLIF RST_c.BLIF N_36_0 +11 1 +.names AS_030_c.BLIF AS_030_i 0 1 -.names N_203.BLIF N_203_i +.names N_98.BLIF N_98_i 0 1 -.names inst_RESET_OUT.BLIF RESET_OUT_i +.names cpu_est_2_.BLIF cpu_est_i_2__n 0 1 -.names CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF \ -pos_clk_un21_bgack_030_int_i_0_o3_0_x2 +.names BERR_c.BLIF N_98_i.BLIF pos_clk_un31_clk_000_ne_i_n +11 1 +.names cpu_est_0_.BLIF cpu_est_i_0__n +0 1 +.names N_137_i_0.BLIF RST_c.BLIF N_228_i +11 1 +.names cpu_est_3_.BLIF cpu_est_i_3__n +0 1 +.names N_121.BLIF N_121_i +0 1 +.names cpu_est_1_.BLIF cpu_est_i_1__n +0 1 +.names N_120.BLIF N_120_i +0 1 +.names IPL_D0_0_.BLIF ipl_c_0__n.BLIF G_122 01 1 10 1 11 0 00 0 -.names IPL_D0_0_.BLIF ipl_c_0__n.BLIF pos_clk_un1_ipl_i_0_x2 +.names IPL_D0_1_.BLIF ipl_c_1__n.BLIF G_123 01 1 10 1 11 0 00 0 -.names IPL_D0_1_.BLIF ipl_c_1__n.BLIF pos_clk_un1_ipl_i_0_x2_0 +.names IPL_D0_2_.BLIF ipl_c_2__n.BLIF G_124 01 1 10 1 11 0 00 0 -.names IPL_D0_2_.BLIF ipl_c_2__n.BLIF pos_clk_un1_ipl_i_0_x2_1 +.names cpu_est_0_.BLIF N_76.BLIF cpu_est_0_0_ 01 1 10 1 11 0 00 0 -.names CYCLE_DMA_1_.BLIF N_199.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2 +.names CYCLE_DMA_1_.BLIF N_199.BLIF G_97 +01 1 +10 1 +11 0 +00 0 +.names CYCLE_DMA_0_.BLIF pos_clk_un13_bgack_030_int_n.BLIF G_95 +01 1 +10 1 +11 0 +00 0 +.names CLK_030_PE_0_.BLIF pos_clk_un13_clk_out_int_n.BLIF G_101 +01 1 +10 1 +11 0 +00 0 +.names CLK_030_PE_1_.BLIF N_205.BLIF G_103 01 1 10 1 11 0 @@ -1534,21 +1638,18 @@ pos_clk_un21_bgack_030_int_i_0_o3_0_x2 .names un21_fpu_cs_i.BLIF FPU_CS 1 1 0 0 -.names N_132_i.BLIF DSACK1 +.names N_123_i.BLIF DSACK1 1 1 0 0 .names vcc_n_n.BLIF AVEC 1 1 0 0 -.names N_309_i.BLIF E +.names N_250_i.BLIF E 1 1 0 0 .names inst_VMA_INTreg.BLIF VMA 1 1 0 0 -.names gnd_n_n.BLIF RESET -1 1 -0 0 .names gnd_n_n.BLIF AMIGA_ADDR_ENABLE 1 1 0 0 @@ -1558,7 +1659,7 @@ pos_clk_un21_bgack_030_int_i_0_o3_0_x2 .names un1_amiga_bus_enable_low_i.BLIF AMIGA_BUS_ENABLE_LOW 1 1 0 0 -.names un10_amiga_bus_enable_high_i.BLIF AMIGA_BUS_ENABLE_HIGH +.names un11_amiga_bus_enable_high_i.BLIF AMIGA_BUS_ENABLE_HIGH 1 1 0 0 .names un10_ciin.BLIF CIIN @@ -1570,15 +1671,6 @@ pos_clk_un21_bgack_030_int_i_0_o3_0_x2 .names IPL_030DFF_0_reg.BLIF IPL_030_0_ 1 1 0 0 -.names CLK_OSZI_c.BLIF IPL_D0_0_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF IPL_D0_1_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF IPL_D0_2_.C -1 1 -0 0 .names CLK_OSZI_c.BLIF SM_AMIGA_i_7_.C 1 1 0 0 @@ -1603,12 +1695,6 @@ pos_clk_un21_bgack_030_int_i_0_o3_0_x2 .names CLK_OSZI_c.BLIF SM_AMIGA_0_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF cpu_est_0_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF cpu_est_1_.C -1 1 -0 0 .names CLK_OSZI_c.BLIF cpu_est_2_.C 1 1 0 0 @@ -1624,7 +1710,13 @@ pos_clk_un21_bgack_030_int_i_0_o3_0_x2 .names CLK_OSZI_c.BLIF IPL_030DFF_2_reg.C 1 1 0 0 -.names CLK_OSZI_c.BLIF RST_DLY_2_.C +.names CLK_OSZI_c.BLIF IPL_D0_0_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF IPL_D0_1_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF IPL_D0_2_.C 1 1 0 0 .names CLK_000.BLIF CLK_000_D_0_.D @@ -1663,31 +1755,31 @@ pos_clk_un21_bgack_030_int_i_0_o3_0_x2 .names CLK_OSZI_c.BLIF CYCLE_DMA_1_.C 1 1 0 0 +.names CLK_OSZI_c.BLIF CLK_030_PE_0_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF CLK_030_PE_1_.C +1 1 +0 0 .names CLK_OSZI_c.BLIF SIZE_DMA_0_.C 1 1 0 0 .names CLK_OSZI_c.BLIF SIZE_DMA_1_.C 1 1 0 0 +.names CLK_OSZI_c.BLIF cpu_est_0_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF cpu_est_1_.C +1 1 +0 0 .names CLK_OSZI_c.BLIF RST_DLY_0_.C 1 1 0 0 .names CLK_OSZI_c.BLIF RST_DLY_1_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_RW_000_INT.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C +.names CLK_OSZI_c.BLIF RST_DLY_2_.C 1 1 0 0 .names CLK_OSZI_c.BLIF inst_DS_000_DMA.C @@ -1699,16 +1791,16 @@ pos_clk_un21_bgack_030_int_i_0_o3_0_x2 .names CLK_OSZI_c.BLIF inst_AS_000_INT.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_AS_030_D0.C +.names CLK_OSZI_c.BLIF inst_AMIGA_DS.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_VPA_D.C +.names CLK_OSZI_c.BLIF inst_AS_030_D0.C 1 1 0 0 .names CLK_OSZI_c.BLIF inst_DTACK_D0.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_CLK_030_H.C +.names CLK_OSZI_c.BLIF inst_VPA_D.C 1 1 0 0 .names CLK_OSZI_c.BLIF inst_RESET_OUT.C @@ -1738,6 +1830,21 @@ pos_clk_un21_bgack_030_int_i_0_o3_0_x2 .names CLK_OSZI_c.BLIF inst_VMA_INTreg.C 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_RW_000_INT.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C +1 1 +0 0 .names CLK_OSZI_c.BLIF inst_BGACK_030_INT_D.C 1 1 0 0 @@ -1765,7 +1872,7 @@ pos_clk_un21_bgack_030_int_i_0_o3_0_x2 .names un7_as_030_i.BLIF AS_030 1 1 0 0 -.names N_133_i.BLIF AS_000 +.names N_122_i.BLIF AS_000 1 1 0 0 .names inst_RW_000_INT.BLIF RW_000 @@ -1780,6 +1887,9 @@ pos_clk_un21_bgack_030_int_i_0_o3_0_x2 .names gnd_n_n.BLIF BERR 1 1 0 0 +.names gnd_n_n.BLIF DTACK +1 1 +0 0 .names inst_RW_000_DMA.BLIF RW 1 1 0 0 @@ -1810,6 +1920,9 @@ pos_clk_un21_bgack_030_int_i_0_o3_0_x2 .names inst_A0_DMA.BLIF A_0_ 1 1 0 0 +.names A_DECODE_2_.BLIF a_decode_2__n +1 1 +0 0 .names AS_030.PIN.BLIF AS_030_c 1 1 0 0 @@ -1915,7 +2028,7 @@ pos_clk_un21_bgack_030_int_i_0_o3_0_x2 .names IPL_2_.BLIF ipl_c_2__n 1 1 0 0 -.names DTACK.BLIF DTACK_c +.names DTACK.PIN.BLIF DTACK_c 1 1 0 0 .names VPA.BLIF VPA_c @@ -1924,6 +2037,9 @@ pos_clk_un21_bgack_030_int_i_0_o3_0_x2 .names RST.BLIF RST_c 1 1 0 0 +.names RESET.BLIF RESET_c +1 1 +0 0 .names RW.PIN.BLIF RW_c 1 1 0 0 @@ -1972,10 +2088,7 @@ pos_clk_un21_bgack_030_int_i_0_o3_0_x2 .names A_DECODE_3_.BLIF a_decode_3__n 1 1 0 0 -.names A_DECODE_2_.BLIF a_decode_2__n -1 1 -0 0 -.names N_313_i.BLIF AS_030.OE +.names N_132.BLIF AS_030.OE 1 1 0 0 .names un1_as_000_i.BLIF AS_000.OE @@ -1990,55 +2103,55 @@ pos_clk_un21_bgack_030_int_i_0_o3_0_x2 .names un1_as_000_i.BLIF LDS_000.OE 1 1 0 0 -.names N_186_i.BLIF SIZE_0_.OE +.names N_276.BLIF SIZE_0_.OE 1 1 0 0 -.names N_186_i.BLIF SIZE_1_.OE +.names N_276.BLIF SIZE_1_.OE 1 1 0 0 -.names N_313_i.BLIF AHIGH_24_.OE +.names un3_ahigh_i.BLIF AHIGH_24_.OE 1 1 0 0 -.names N_313_i.BLIF AHIGH_25_.OE +.names un3_ahigh_i.BLIF AHIGH_25_.OE 1 1 0 0 -.names N_313_i.BLIF AHIGH_26_.OE +.names un3_ahigh_i.BLIF AHIGH_26_.OE 1 1 0 0 -.names N_313_i.BLIF AHIGH_27_.OE +.names un3_ahigh_i.BLIF AHIGH_27_.OE 1 1 0 0 -.names N_313_i.BLIF AHIGH_28_.OE +.names un3_ahigh_i.BLIF AHIGH_28_.OE 1 1 0 0 -.names N_313_i.BLIF AHIGH_29_.OE +.names un3_ahigh_i.BLIF AHIGH_29_.OE 1 1 0 0 -.names N_313_i.BLIF AHIGH_30_.OE +.names un3_ahigh_i.BLIF AHIGH_30_.OE 1 1 0 0 -.names N_313_i.BLIF AHIGH_31_.OE +.names un3_ahigh_i.BLIF AHIGH_31_.OE 1 1 0 0 -.names N_313_i.BLIF A_0_.OE +.names N_132.BLIF A_0_.OE 1 1 0 0 .names un21_berr.BLIF BERR.OE 1 1 0 0 -.names un1_rw_i.BLIF RW.OE +.names AS_000_DMA_i.BLIF DTACK.OE 1 1 0 0 -.names N_313_i.BLIF DS_030.OE +.names N_133.BLIF RW.OE +1 1 +0 0 +.names N_132.BLIF DS_030.OE 1 1 0 0 .names nEXP_SPACE_c.BLIF DSACK1.OE 1 1 0 0 -.names RESET_OUT_i.BLIF RESET.OE -1 1 -0 0 -.names N_62.BLIF CIIN.OE +.names un13_ciin_i.BLIF CIIN.OE 1 1 0 0 .end diff --git a/Logic/68030_tk.bl3 b/Logic/68030_tk.bl3 index d808a6d..8737403 100644 --- a/Logic/68030_tk.bl3 +++ b/Logic/68030_tk.bl3 @@ -1,43 +1,43 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Wed Oct 26 22:26:25 2016 +#$ DATE Fri Nov 18 19:32:36 2016 #$ MODULE 68030_tk -#$ PINS 61 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_030_2_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 \ -# DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BG_000 SIZE_0_ BGACK_030 AHIGH_30_ \ -# BGACK_000 AHIGH_29_ CLK_030 AHIGH_28_ CLK_000 AHIGH_27_ CLK_OSZI AHIGH_26_ CLK_DIV_OUT \ -# AHIGH_25_ CLK_EXP AHIGH_24_ FPU_CS A_DECODE_22_ FPU_SENSE A_DECODE_21_ DSACK1 \ -# A_DECODE_20_ DTACK A_DECODE_19_ AVEC A_DECODE_18_ E A_DECODE_17_ VPA A_DECODE_16_ VMA \ -# RST RESET RW AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ -# AMIGA_BUS_ENABLE_HIGH CIIN A_0_ IPL_030_1_ IPL_030_0_ IPL_1_ IPL_0_ FC_0_ A_1_ -#$ NODES 55 inst_BGACK_030_INTreg inst_VMA_INTreg cpu_est_2_ cpu_est_3_ cpu_est_0_ \ -# cpu_est_1_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW \ +#$ PINS 61 A_0_ SIZE_1_ IPL_030_1_ IPL_030_0_ AHIGH_31_ IPL_1_ IPL_0_ A_DECODE_23_ \ +# FC_0_ A_1_ IPL_030_2_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 DS_030 UDS_000 LDS_000 nEXP_SPACE \ +# BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP \ +# FPU_CS FPU_SENSE DSACK1 DTACK AVEC SIZE_0_ E AHIGH_30_ VPA AHIGH_29_ VMA AHIGH_28_ RST \ +# AHIGH_27_ RESET AHIGH_26_ RW AHIGH_25_ AMIGA_ADDR_ENABLE AHIGH_24_ AMIGA_BUS_DATA_DIR \ +# A_DECODE_22_ AMIGA_BUS_ENABLE_LOW A_DECODE_21_ AMIGA_BUS_ENABLE_HIGH A_DECODE_20_ \ +# CIIN A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ +#$ NODES 57 inst_BGACK_030_INTreg inst_VMA_INTreg cpu_est_1_ cpu_est_2_ cpu_est_3_ \ +# cpu_est_0_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW \ # inst_AS_030_D0 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA \ -# inst_DS_000_DMA CYCLE_DMA_0_ CYCLE_DMA_1_ inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 \ -# inst_RESET_OUT CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D \ +# inst_DS_000_DMA inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_RESET_OUT CLK_030_PE_1_ \ +# inst_AMIGA_DS CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D \ # IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_LDS_000_INT \ # inst_DS_000_ENABLE inst_UDS_000_INT SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ \ -# SIZE_DMA_0_ SIZE_DMA_1_ inst_RW_000_INT inst_RW_000_DMA RST_DLY_0_ RST_DLY_1_ \ -# RST_DLY_2_ inst_A0_DMA inst_CLK_030_H inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ \ -# SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ BG_000DFFreg CLK_OUT_INTreg IPL_030DFF_0_reg \ -# IPL_030DFF_1_reg IPL_030DFF_2_reg +# SIZE_DMA_0_ SIZE_DMA_1_ CYCLE_DMA_0_ CYCLE_DMA_1_ CLK_030_PE_0_ inst_RW_000_INT \ +# inst_RW_000_DMA RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_A0_DMA inst_DSACK1_INT \ +# inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ BG_000DFFreg \ +# CLK_OUT_INTreg IPL_030DFF_0_reg IPL_030DFF_1_reg IPL_030DFF_2_reg .model bus68030 .inputs A_DECODE_23_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF \ -BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF \ -DTACK.BLIF VPA.BLIF RST.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF \ -A_DECODE_20_.BLIF A_DECODE_19_.BLIF A_DECODE_18_.BLIF A_DECODE_17_.BLIF \ -A_DECODE_16_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF A_1_.BLIF \ -inst_BGACK_030_INTreg.BLIF inst_VMA_INTreg.BLIF cpu_est_2_.BLIF \ -cpu_est_3_.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF \ -inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF \ -inst_AS_030_D0.BLIF inst_AS_030_000_SYNC.BLIF inst_BGACK_030_INT_D.BLIF \ -inst_AS_000_DMA.BLIF inst_DS_000_DMA.BLIF CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF \ -inst_VPA_D.BLIF CLK_000_D_3_.BLIF inst_DTACK_D0.BLIF inst_RESET_OUT.BLIF \ -CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF inst_CLK_OUT_PRE_50.BLIF \ -inst_CLK_OUT_PRE_D.BLIF IPL_D0_0_.BLIF IPL_D0_1_.BLIF IPL_D0_2_.BLIF \ -CLK_000_D_2_.BLIF CLK_000_D_4_.BLIF inst_LDS_000_INT.BLIF \ -inst_DS_000_ENABLE.BLIF inst_UDS_000_INT.BLIF SM_AMIGA_6_.BLIF \ -SM_AMIGA_4_.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF SIZE_DMA_0_.BLIF \ -SIZE_DMA_1_.BLIF inst_RW_000_INT.BLIF inst_RW_000_DMA.BLIF RST_DLY_0_.BLIF \ -RST_DLY_1_.BLIF RST_DLY_2_.BLIF inst_A0_DMA.BLIF inst_CLK_030_H.BLIF \ +BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF VPA.BLIF \ +RST.BLIF RESET.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF A_DECODE_20_.BLIF \ +A_DECODE_19_.BLIF A_DECODE_18_.BLIF A_DECODE_17_.BLIF A_DECODE_16_.BLIF \ +IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF A_1_.BLIF inst_BGACK_030_INTreg.BLIF \ +inst_VMA_INTreg.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF cpu_est_3_.BLIF \ +cpu_est_0_.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF \ +inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF inst_AS_030_D0.BLIF \ +inst_AS_030_000_SYNC.BLIF inst_BGACK_030_INT_D.BLIF inst_AS_000_DMA.BLIF \ +inst_DS_000_DMA.BLIF inst_VPA_D.BLIF CLK_000_D_3_.BLIF inst_DTACK_D0.BLIF \ +inst_RESET_OUT.BLIF CLK_030_PE_1_.BLIF inst_AMIGA_DS.BLIF CLK_000_D_1_.BLIF \ +CLK_000_D_0_.BLIF inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_D.BLIF \ +IPL_D0_0_.BLIF IPL_D0_1_.BLIF IPL_D0_2_.BLIF CLK_000_D_2_.BLIF \ +CLK_000_D_4_.BLIF inst_LDS_000_INT.BLIF inst_DS_000_ENABLE.BLIF \ +inst_UDS_000_INT.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_1_.BLIF \ +SM_AMIGA_0_.BLIF SIZE_DMA_0_.BLIF SIZE_DMA_1_.BLIF CYCLE_DMA_0_.BLIF \ +CYCLE_DMA_1_.BLIF CLK_030_PE_0_.BLIF inst_RW_000_INT.BLIF inst_RW_000_DMA.BLIF \ +RST_DLY_0_.BLIF RST_DLY_1_.BLIF RST_DLY_2_.BLIF inst_A0_DMA.BLIF \ inst_DSACK1_INT.BLIF inst_AS_000_INT.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_3_.BLIF \ SM_AMIGA_2_.BLIF SM_AMIGA_i_7_.BLIF BG_000DFFreg.BLIF CLK_OUT_INTreg.BLIF \ IPL_030DFF_0_reg.BLIF IPL_030DFF_1_reg.BLIF IPL_030DFF_2_reg.BLIF \ @@ -45,55 +45,44 @@ AS_030.PIN.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF UDS_000.PIN.BLIF \ LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF AHIGH_24_.PIN.BLIF \ AHIGH_25_.PIN.BLIF AHIGH_26_.PIN.BLIF AHIGH_27_.PIN.BLIF AHIGH_28_.PIN.BLIF \ AHIGH_29_.PIN.BLIF AHIGH_30_.PIN.BLIF AHIGH_31_.PIN.BLIF A_0_.PIN.BLIF \ -BERR.PIN.BLIF RW.PIN.BLIF +BERR.PIN.BLIF DTACK.PIN.BLIF RW.PIN.BLIF .outputs IPL_030_2_ DS_030 BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 \ -AVEC E VMA RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ -AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ IPL_D0_0_.D IPL_D0_0_.C \ -IPL_D0_1_.D IPL_D0_1_.C IPL_D0_2_.D IPL_D0_2_.C SM_AMIGA_i_7_.C SM_AMIGA_6_.D \ +AVEC E VMA AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ +AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_i_7_.C SM_AMIGA_6_.D \ SM_AMIGA_6_.C SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_4_.D SM_AMIGA_4_.C \ SM_AMIGA_3_.C SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_1_.D SM_AMIGA_1_.C \ -SM_AMIGA_0_.D SM_AMIGA_0_.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D \ -cpu_est_1_.C cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C IPL_030DFF_0_reg.D \ -IPL_030DFF_0_reg.C IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D \ -IPL_030DFF_2_reg.C RST_DLY_2_.D RST_DLY_2_.C CLK_000_D_0_.D CLK_000_D_0_.C \ +SM_AMIGA_0_.D SM_AMIGA_0_.C cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C \ +IPL_030DFF_0_reg.D IPL_030DFF_0_reg.C IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C \ +IPL_030DFF_2_reg.D IPL_030DFF_2_reg.C IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D \ +IPL_D0_1_.C IPL_D0_2_.D IPL_D0_2_.C CLK_000_D_0_.D CLK_000_D_0_.C \ CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D \ CLK_000_D_3_.C CLK_000_D_4_.D CLK_000_D_4_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C \ -CYCLE_DMA_1_.D CYCLE_DMA_1_.C SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_1_.D \ -SIZE_DMA_1_.C RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.C inst_RW_000_INT.D \ -inst_RW_000_INT.C inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C \ -inst_LDS_000_INT.D inst_LDS_000_INT.C inst_BGACK_030_INTreg.D \ -inst_BGACK_030_INTreg.C inst_AS_000_DMA.D inst_AS_000_DMA.C inst_DS_000_DMA.D \ -inst_DS_000_DMA.C inst_DSACK1_INT.D inst_DSACK1_INT.C inst_AS_000_INT.D \ -inst_AS_000_INT.C inst_AS_030_D0.D inst_AS_030_D0.C inst_VPA_D.D inst_VPA_D.C \ -inst_DTACK_D0.D inst_DTACK_D0.C inst_CLK_030_H.C inst_RESET_OUT.D \ +CYCLE_DMA_1_.D CYCLE_DMA_1_.C CLK_030_PE_0_.C CLK_030_PE_1_.D CLK_030_PE_1_.C \ +SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C cpu_est_0_.D \ +cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.C \ +RST_DLY_2_.D RST_DLY_2_.C inst_DS_000_DMA.D inst_DS_000_DMA.C \ +inst_DSACK1_INT.D inst_DSACK1_INT.C inst_AS_000_INT.D inst_AS_000_INT.C \ +inst_AMIGA_DS.D inst_AMIGA_DS.C inst_AS_030_D0.D inst_AS_030_D0.C \ +inst_DTACK_D0.D inst_DTACK_D0.C inst_VPA_D.D inst_VPA_D.C inst_RESET_OUT.D \ inst_RESET_OUT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C BG_000DFFreg.D \ BG_000DFFreg.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D \ inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D \ inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.D inst_UDS_000_INT.C \ inst_A0_DMA.D inst_A0_DMA.C inst_RW_000_DMA.D inst_RW_000_DMA.C \ -inst_VMA_INTreg.D inst_VMA_INTreg.C inst_BGACK_030_INT_D.D \ +inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_INT.D inst_RW_000_INT.C \ +inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_LDS_000_INT.D \ +inst_LDS_000_INT.C inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C \ +inst_AS_000_DMA.D inst_AS_000_DMA.C inst_BGACK_030_INT_D.D \ inst_BGACK_030_INT_D.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.D \ inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C SIZE_1_ \ -AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR RW SIZE_0_ AHIGH_30_ \ +AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR DTACK RW SIZE_0_ AHIGH_30_ \ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ AS_030.OE \ AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE \ AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE \ -AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE RESET.OE CIIN.OE \ -cpu_est_2_.D.X1 cpu_est_2_.D.X2 RST_DLY_1_.D.X1 RST_DLY_1_.D.X2 \ -inst_CLK_030_H.D.X1 inst_CLK_030_H.D.X2 SM_AMIGA_3_.D.X1 SM_AMIGA_3_.D.X2 \ +AHIGH_31_.OE A_0_.OE BERR.OE DTACK.OE RW.OE DS_030.OE DSACK1.OE CIIN.OE \ +cpu_est_2_.D.X1 cpu_est_2_.D.X2 CLK_030_PE_0_.D.X1 CLK_030_PE_0_.D.X2 \ +RST_DLY_1_.D.X1 RST_DLY_1_.D.X2 SM_AMIGA_3_.D.X1 SM_AMIGA_3_.D.X2 \ SM_AMIGA_i_7_.D.X1 SM_AMIGA_i_7_.D.X2 -.names RST.BLIF IPL_0_.BLIF IPL_D0_0_.D -0- 1 --1 1 -10 0 -.names RST.BLIF IPL_1_.BLIF IPL_D0_1_.D -0- 1 --1 1 -10 0 -.names IPL_2_.BLIF RST.BLIF IPL_D0_2_.D -1- 1 --0 1 -01 0 .names nEXP_SPACE.BLIF RST.BLIF inst_AS_030_000_SYNC.BLIF CLK_000_D_3_.BLIF \ CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF CLK_000_D_4_.BLIF SM_AMIGA_6_.BLIF \ SM_AMIGA_i_7_.BLIF SM_AMIGA_6_.D @@ -127,11 +116,11 @@ SM_AMIGA_5_.BLIF SM_AMIGA_4_.D -0-0- 0 0---- 0 ---00 0 -.names RST.BLIF inst_VMA_INTreg.BLIF cpu_est_2_.BLIF cpu_est_3_.BLIF \ -cpu_est_0_.BLIF cpu_est_1_.BLIF inst_VPA_D.BLIF inst_DTACK_D0.BLIF \ +.names RST.BLIF inst_VMA_INTreg.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF \ +cpu_est_3_.BLIF cpu_est_0_.BLIF inst_VPA_D.BLIF inst_DTACK_D0.BLIF \ CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF \ BERR.PIN.BLIF SM_AMIGA_2_.D -1001000-101-- 1 +1000100-101-- 1 1-----10101-- 1 1-------101-0 1 1--------0-1- 1 @@ -139,8 +128,8 @@ BERR.PIN.BLIF SM_AMIGA_2_.D ------11---01 0 --------01--- 0 -----10----01 0 -----1-0----01 0 ----0--0----01 0 +----0-0----01 0 +---1--0----01 0 --1---0----01 0 -1----0----01 0 ----------00- 0 @@ -167,153 +156,139 @@ SM_AMIGA_0_.BLIF SM_AMIGA_0_.D ---00 0 --1-0 0 -0--0 0 -.names cpu_est_0_.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF cpu_est_0_.D -010 1 -10- 1 -1-1 1 -110 0 -00- 0 -0-1 0 -.names cpu_est_3_.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF CLK_000_D_1_.BLIF \ -CLK_000_D_0_.BLIF cpu_est_1_.D -01010 1 --01-- 1 ---10- 1 ---1-1 1 -1-0-- 0 --1110 0 ---00- 0 --00-- 0 ---0-1 0 -.names cpu_est_2_.BLIF cpu_est_3_.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF \ +.names cpu_est_1_.BLIF cpu_est_2_.BLIF cpu_est_3_.BLIF cpu_est_0_.BLIF \ CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF cpu_est_3_.D -1-1110 1 -010--- 1 --1--0- 1 --1---1 1 ---1010 0 --00--- 0 -1-0-10 0 -0-1-10 0 --0--0- 0 --0---1 0 -.names IPL_2_.BLIF RST.BLIF IPL_1_.BLIF IPL_0_.BLIF CLK_000_D_1_.BLIF \ -CLK_000_D_0_.BLIF IPL_D0_0_.BLIF IPL_D0_1_.BLIF IPL_D0_2_.BLIF \ -IPL_030DFF_0_reg.BLIF IPL_030DFF_0_reg.D -0-0101100- 1 -0-1101110- 1 -1-0101101- 1 -1-1101111- 1 -1-------01 1 -0-------11 1 ---1----0-1 1 ---0----1-1 1 ----1-----1 1 -------1--1 1 --0-------- 1 ------0---1 1 -----1----1 1 -010001000- 0 -011001010- 0 -110001001- 0 -111001011- 0 -11------00 0 -01------10 0 --11----0-0 0 --10----1-0 0 --1---0---0 0 --1--1----0 0 --1----0--0 0 --1-0-----0 0 -.names IPL_2_.BLIF RST.BLIF IPL_1_.BLIF IPL_0_.BLIF CLK_000_D_1_.BLIF \ -CLK_000_D_0_.BLIF IPL_D0_0_.BLIF IPL_D0_1_.BLIF IPL_D0_2_.BLIF \ -IPL_030DFF_1_reg.BLIF IPL_030DFF_1_reg.D -0-1001010- 1 -0-1101110- 1 -1-1001011- 1 -1-1101111- 1 -1-------01 1 -0-------11 1 ---1------1 1 --------1-1 1 ----1--0--1 1 ----0--1--1 1 --0-------- 1 ------0---1 1 -----1----1 1 -010001000- 0 -010101100- 0 -110001001- 0 -110101101- 0 -11------00 0 -01------10 0 --1-1--0--0 0 --1-0--1--0 0 --1---0---0 0 --1--1----0 0 --1-----0-0 0 --10------0 0 -.names IPL_2_.BLIF RST.BLIF IPL_1_.BLIF IPL_0_.BLIF CLK_000_D_1_.BLIF \ -CLK_000_D_0_.BLIF IPL_D0_0_.BLIF IPL_D0_1_.BLIF IPL_D0_2_.BLIF \ -IPL_030DFF_2_reg.BLIF IPL_030DFF_2_reg.D -1-0001001- 1 -1-0101101- 1 -1-1001011- 1 -1-1101111- 1 -1--------1 1 ---------11 1 ---1----0-1 1 ---0----1-1 1 ----1--0--1 1 ----0--1--1 1 --0-------- 1 ------0---1 1 -----1----1 1 -010001000- 0 -010101100- 0 -011001010- 0 -011101110- 0 --11----0-0 0 --10----1-0 0 --1-1--0--0 0 --1-0--1--0 0 --1---0---0 0 --1--1----0 0 --1------00 0 -01-------0 0 -.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF RST_DLY_0_.BLIF \ -RST_DLY_1_.BLIF RST_DLY_2_.BLIF RST_DLY_2_.D -11011- 1 -1----1 1 -0----- 0 -----00 0 ----0-0 0 ---1--0 0 --0---0 0 -.names RST.BLIF inst_BGACK_030_INTreg.BLIF CYCLE_DMA_0_.BLIF CLK_000_D_1_.BLIF \ -CLK_000_D_0_.BLIF AS_000.PIN.BLIF CYCLE_DMA_0_.D -100010 1 -101-00 1 -1011-0 1 ---101- 0 +11-110 1 +-010-- 1 +--1-0- 1 +--1--1 1 +--00-- 0 +01--10 0 +-1-010 0 +-0-110 0 --0-0- 0 ---01-- 0 --1---- 0 -0----- 0 ------1 0 -.names RST.BLIF inst_BGACK_030_INTreg.BLIF CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF \ -CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF AS_000.PIN.BLIF CYCLE_DMA_1_.D -1010010 1 -10-1-00 1 +--0--1 0 +.names IPL_2_.BLIF RST.BLIF IPL_1_.BLIF IPL_0_.BLIF IPL_D0_0_.BLIF \ +IPL_D0_1_.BLIF IPL_D0_2_.BLIF IPL_030DFF_0_reg.BLIF IPL_030DFF_0_reg.D +0-01100- 1 +0-11110- 1 +1-01101- 1 +1-11111- 1 +1-----01 1 +0-----11 1 +--1--0-1 1 +--0--1-1 1 +---1---1 1 +----1--1 1 +-0------ 1 +0100000- 0 +0110010- 0 +1100001- 0 +1110011- 0 +11----00 0 +01----10 0 +-11--0-0 0 +-10--1-0 0 +-1--0--0 0 +-1-0---0 0 +.names IPL_2_.BLIF RST.BLIF IPL_1_.BLIF IPL_0_.BLIF IPL_D0_0_.BLIF \ +IPL_D0_1_.BLIF IPL_D0_2_.BLIF IPL_030DFF_1_reg.BLIF IPL_030DFF_1_reg.D +0-10010- 1 +0-11110- 1 +1-10011- 1 +1-11111- 1 +1-----01 1 +0-----11 1 +--1----1 1 +-----1-1 1 +---10--1 1 +---01--1 1 +-0------ 1 +0100000- 0 +0101100- 0 +1100001- 0 +1101101- 0 +11----00 0 +01----10 0 +-1-10--0 0 +-1-01--0 0 +-1---0-0 0 +-10----0 0 +.names IPL_2_.BLIF RST.BLIF IPL_1_.BLIF IPL_0_.BLIF IPL_D0_0_.BLIF \ +IPL_D0_1_.BLIF IPL_D0_2_.BLIF IPL_030DFF_2_reg.BLIF IPL_030DFF_2_reg.D +1-00001- 1 +1-01101- 1 +1-10011- 1 +1-11111- 1 +1------1 1 +------11 1 +--1--0-1 1 +--0--1-1 1 +---10--1 1 +---01--1 1 +-0------ 1 +0100000- 0 +0101100- 0 +0110010- 0 +0111110- 0 +-11--0-0 0 +-10--1-0 0 +-1-10--0 0 +-1-01--0 0 +-1----00 0 +01-----0 0 +.names RST.BLIF IPL_0_.BLIF IPL_D0_0_.D +0- 1 +-1 1 +10 0 +.names RST.BLIF IPL_1_.BLIF IPL_D0_1_.D +0- 1 +-1 1 +10 0 +.names IPL_2_.BLIF RST.BLIF IPL_D0_2_.D +1- 1 +-0 1 +01 0 +.names RST.BLIF inst_BGACK_030_INTreg.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF \ +CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF AS_000.PIN.BLIF CYCLE_DMA_0_.D +10--110 1 +10100-0 1 10-11-0 1 -1001--0 1 ---1101- 0 ----0-0- 0 ----01-- 0 ---00--- 0 +100-1-0 1 +--1010- 0 +---10-- 0 +--0-0-- 0 -1----- 0 0------ 0 ------1 0 +.names RST.BLIF inst_BGACK_030_INTreg.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF \ +CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF AS_000.PIN.BLIF CYCLE_DMA_1_.D +10101-0 1 +10---10 1 +----00- 0 +---1-0- 0 +--0--0- 0 +-1----- 0 +0------ 0 +------1 0 +.names RST.BLIF inst_AS_000_DMA.BLIF CLK_030_PE_1_.BLIF inst_AMIGA_DS.BLIF \ +inst_CLK_OUT_PRE_D.BLIF CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF CLK_030_PE_0_.BLIF \ +CLK_OUT_INTreg.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF CLK_030_PE_1_.D +10-01-11001 1 +1-10--1--01 1 +10-0101100- 1 +10-0110100- 1 +1-10-01--0- 1 +1-10-10--0- 1 +-----11---0 0 +-----00---- 0 +--0-----1-- 0 +--0----0--- 0 +--0-0------ 0 +-10-------- 0 +---------1- 0 +---1------- 0 +0---------- 0 .names RST.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ SIZE_DMA_0_.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_DMA_0_.D -111-- 1 @@ -332,6 +307,24 @@ SIZE_DMA_1_.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_DMA_1_.D 11-0-- 0 110--- 0 10---1 0 +.names cpu_est_0_.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF cpu_est_0_.D +010 1 +10- 1 +1-1 1 +110 0 +00- 0 +0-1 0 +.names cpu_est_1_.BLIF cpu_est_3_.BLIF cpu_est_0_.BLIF CLK_000_D_1_.BLIF \ +CLK_000_D_0_.BLIF cpu_est_1_.D +00110 1 +1-0-- 1 +1--0- 1 +1---1 1 +01--- 0 +1-110 0 +0--0- 0 +0-0-- 0 +0---1 0 .names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF RST_DLY_0_.BLIF \ RST_DLY_1_.BLIF RST_DLY_2_.BLIF RST_DLY_0_.D 1--111 1 @@ -343,6 +336,170 @@ RST_DLY_1_.BLIF RST_DLY_2_.BLIF RST_DLY_0_.D --10-- 0 -0-0-- 0 0----- 0 +.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF RST_DLY_0_.BLIF \ +RST_DLY_1_.BLIF RST_DLY_2_.BLIF RST_DLY_2_.D +11011- 1 +1----1 1 +0----- 0 +----00 0 +---0-0 0 +--1--0 0 +-0---0 0 +.names CLK_030.BLIF RST.BLIF inst_DS_000_DMA.BLIF CLK_030_PE_1_.BLIF \ +inst_AMIGA_DS.BLIF inst_CLK_OUT_PRE_D.BLIF CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF \ +CLK_030_PE_0_.BLIF CLK_OUT_INTreg.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF \ +inst_DS_000_DMA.D +--1--1---0-1 1 +--1-----0--0 1 +--11-------0 1 +0-1--------0 1 +------00---- 1 +------11---0 1 +----------1- 1 +----1------- 1 +-0---------- 1 +-10-0--1--01 0 +11-00-011-00 0 +11-00-101-00 0 +-10-0-01--0- 0 +-10-0-10--0- 0 +-1--0--1-101 0 +-1--0-1--101 0 +-1--00-1--01 0 +-1--001---01 0 +.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_1_.BLIF \ +inst_DSACK1_INT.BLIF AS_030.PIN.BLIF inst_DSACK1_INT.D +---01- 1 +--1-1- 1 +-0--1- 1 +0----- 1 +---0-1 1 +--1--1 1 +-0---1 1 +1101-- 0 +1---00 0 +.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_6_.BLIF \ +inst_AS_000_INT.BLIF AS_030.PIN.BLIF inst_AS_000_INT.D +---01- 1 +--0-1- 1 +-1--1- 1 +0----- 1 +---0-1 1 +--0--1 1 +-1---1 1 +1011-- 0 +1---00 0 +.names RST.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF inst_AMIGA_DS.D +0-- 1 +-11 1 +10- 0 +1-0 0 +.names RST.BLIF AS_030.PIN.BLIF inst_AS_030_D0.D +0- 1 +-1 1 +10 0 +.names RST.BLIF DTACK.PIN.BLIF inst_DTACK_D0.D +0- 1 +-1 1 +10 0 +.names VPA.BLIF RST.BLIF inst_VPA_D.D +1- 1 +-0 1 +01 0 +.names RST.BLIF inst_RESET_OUT.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF \ +RST_DLY_0_.BLIF RST_DLY_1_.BLIF RST_DLY_2_.BLIF inst_RESET_OUT.D +1-10111 1 +11----- 1 +0------ 0 +-0---0- 0 +-0--0-- 0 +-0-1--- 0 +-00---- 0 +-0----0 0 +.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF inst_DS_000_ENABLE.BLIF \ +SM_AMIGA_6_.BLIF SM_AMIGA_4_.BLIF AS_030.PIN.BLIF RW.PIN.BLIF \ +inst_DS_000_ENABLE.D +101--1-- 1 +101-1--1 1 +1--1--0- 1 +----001- 0 +---000-- 0 +-----010 0 +--0---1- 0 +-1----1- 0 +---0-0-0 0 +--00---- 0 +-1-0---- 0 +0------- 0 +.names nEXP_SPACE.BLIF BG_030.BLIF RST.BLIF inst_AS_030_D0.BLIF \ +CLK_000_D_0_.BLIF BG_000DFFreg.BLIF BG_000DFFreg.D +--0--- 1 +-1---- 1 +----01 1 +---0-1 1 +0----1 1 +10111- 0 +-01--0 0 +.names RST.BLIF A_1_.BLIF inst_BGACK_030_INTreg.BLIF \ +inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF inst_BGACK_030_INT_D.BLIF \ +inst_AMIGA_BUS_ENABLE_DMA_HIGH.D +--11- 1 +-10-- 1 +--1-0 1 +0---- 1 +1-101 0 +100-- 0 +.names RST.BLIF A_1_.BLIF inst_BGACK_030_INTreg.BLIF \ +inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF inst_BGACK_030_INT_D.BLIF \ +inst_AMIGA_BUS_ENABLE_DMA_LOW.D +--11- 1 +-00-- 1 +--1-0 1 +0---- 1 +1-101 0 +110-- 0 +.names RST.BLIF inst_UDS_000_INT.BLIF SM_AMIGA_6_.BLIF A_0_.PIN.BLIF \ +inst_UDS_000_INT.D +-10- 1 +0--- 1 +--11 1 +100- 0 +1-10 0 +.names RST.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ +inst_A0_DMA.BLIF UDS_000.PIN.BLIF inst_A0_DMA.D +-111- 1 +0---- 1 +-0--1 1 +11-0- 0 +110-- 0 +10--0 0 +.names RST.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ +inst_RW_000_DMA.BLIF RW_000.PIN.BLIF inst_RW_000_DMA.D +-1-1- 1 +-10-- 1 +0---- 1 +-0--1 1 +1110- 0 +10--0 0 +.names RST.BLIF inst_VMA_INTreg.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF \ +cpu_est_3_.BLIF cpu_est_0_.BLIF inst_VPA_D.BLIF CLK_000_D_1_.BLIF \ +CLK_000_D_0_.BLIF inst_VMA_INTreg.D +--0000-01 1 +-1----1-- 1 +-1------1 1 +-1-----0- 1 +-1---0--- 1 +-1--1---- 1 +-1-1----- 1 +-10------ 1 +0-------- 1 +1-1001010 0 +10--1---- 0 +10-1----- 0 +10-----1- 0 +10---1--- 0 +101------ 0 +10------0 0 .names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_6_.BLIF \ SM_AMIGA_0_.BLIF inst_RW_000_INT.BLIF SM_AMIGA_i_7_.BLIF RW.PIN.BLIF \ inst_RW_000_INT.D @@ -387,188 +544,31 @@ SIZE_1_.PIN.BLIF A_0_.PIN.BLIF inst_LDS_000_INT.D 1-1--1 0 .names BGACK_000.BLIF RST.BLIF inst_BGACK_030_INTreg.BLIF CLK_000_D_1_.BLIF \ CLK_000_D_0_.BLIF AS_000.PIN.BLIF inst_BGACK_030_INTreg.D -1--011 1 +1--101 1 1-1--- 1 -0---- 1 --10-0- 0 --101-- 0 +-10-1- 0 +-100-- 0 01---- 0 -10--0 0 -.names CLK_030.BLIF RST.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_000_DMA.BLIF \ -CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF \ -LDS_000.PIN.BLIF inst_AS_000_DMA.D +.names RST.BLIF inst_AS_000_DMA.BLIF inst_AMIGA_DS.BLIF \ +inst_CLK_OUT_PRE_D.BLIF CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF \ +CLK_OUT_INTreg.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF inst_AS_000_DMA.D +-1-1--0-- 1 +----11--0 1 ----00--- 1 -----11--- 1 -0--1----- 1 -------1-- 1 +-------1- 1 --1------ 1 --0------- 1 --------11 1 --1001000- 0 -110-1000- 0 --1000100- 0 -110-0100- 0 --100100-0 0 -110-100-0 0 --100010-0 0 -110-010-0 0 -.names CLK_030.BLIF RST.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_000_DMA.BLIF \ -inst_DS_000_DMA.BLIF CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF inst_CLK_030_H.BLIF \ -AS_000.PIN.BLIF RW_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ -inst_DS_000_DMA.D -1--1---1-0-- 1 -----1--0-0-- 1 -0---1----0-- 1 ------00----- 1 ------11----- 1 ---------1--- 1 ---1--------- 1 --0---------- 1 -----------11 1 -1100-1010-0- 0 -1100-0110-0- 0 -1100-1010--0 0 -1100-0110--0 0 --10-01000-0- 0 --10-00100-0- 0 -010-010-0-0- 0 -010-001-0-0- 0 --10-01000--0 0 --10-00100--0 0 -010-010-0--0 0 -010-001-0--0 0 --10--10-010- 0 --10--01-010- 0 --10--10-01-0 0 --10--01-01-0 0 -.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_1_.BLIF \ -inst_DSACK1_INT.BLIF AS_030.PIN.BLIF inst_DSACK1_INT.D ----01- 1 ---1-1- 1 --0--1- 1 -0----- 1 ----0-1 1 ---1--1 1 --0---1 1 -1101-- 0 -1---00 0 -.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_6_.BLIF \ -inst_AS_000_INT.BLIF AS_030.PIN.BLIF inst_AS_000_INT.D ----01- 1 ---0-1- 1 --1--1- 1 -0----- 1 ----0-1 1 ---0--1 1 --1---1 1 -1011-- 0 -1---00 0 -.names RST.BLIF AS_030.PIN.BLIF inst_AS_030_D0.D -0- 1 --1 1 -10 0 -.names VPA.BLIF RST.BLIF inst_VPA_D.D -1- 1 --0 1 -01 0 -.names DTACK.BLIF RST.BLIF inst_DTACK_D0.D -1- 1 --0 1 -01 0 -.names RST.BLIF inst_RESET_OUT.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF \ -RST_DLY_0_.BLIF RST_DLY_1_.BLIF RST_DLY_2_.BLIF inst_RESET_OUT.D -1-10111 1 -11----- 1 -0------ 0 --0---0- 0 --0--0-- 0 --0-1--- 0 --00---- 0 --0----0 0 -.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF inst_DS_000_ENABLE.BLIF \ -SM_AMIGA_6_.BLIF SM_AMIGA_4_.BLIF AS_030.PIN.BLIF RW.PIN.BLIF \ -inst_DS_000_ENABLE.D -101--1-- 1 -101-1--1 1 -1--1--0- 1 -----001- 0 ----000-- 0 ------010 0 ---0---1- 0 --1----1- 0 ----0-0-0 0 ---00---- 0 --1-0---- 0 -0------- 0 -.names nEXP_SPACE.BLIF BG_030.BLIF RST.BLIF inst_AS_030_D0.BLIF \ -CLK_000_D_0_.BLIF BG_000DFFreg.BLIF BG_000DFFreg.D -----01 1 ----0-1 1 -0----1 1 ---0--- 1 --1---- 1 -10111- 0 --01--0 0 -.names RST.BLIF A_1_.BLIF inst_BGACK_030_INTreg.BLIF \ -inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF inst_BGACK_030_INT_D.BLIF \ -inst_AMIGA_BUS_ENABLE_DMA_HIGH.D ---11- 1 --10-- 1 ---1-0 1 -0---- 1 -1-101 0 -100-- 0 -.names RST.BLIF A_1_.BLIF inst_BGACK_030_INTreg.BLIF \ -inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF inst_BGACK_030_INT_D.BLIF \ -inst_AMIGA_BUS_ENABLE_DMA_LOW.D ---11- 1 --00-- 1 ---1-0 1 -0---- 1 -1-101 0 -110-- 0 -.names RST.BLIF inst_UDS_000_INT.BLIF SM_AMIGA_6_.BLIF A_0_.PIN.BLIF \ -inst_UDS_000_INT.D --10- 1 -0--- 1 ---11 1 -100- 0 -1-10 0 -.names RST.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -inst_A0_DMA.BLIF UDS_000.PIN.BLIF inst_A0_DMA.D --111- 1 -0---- 1 --0--1 1 -11-0- 0 -110-- 0 -10--0 0 -.names RST.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -inst_RW_000_DMA.BLIF RW_000.PIN.BLIF inst_RW_000_DMA.D --1-1- 1 --10-- 1 -0---- 1 --0--1 1 -1110- 0 -10--0 0 -.names RST.BLIF inst_VMA_INTreg.BLIF cpu_est_2_.BLIF cpu_est_3_.BLIF \ -cpu_est_0_.BLIF cpu_est_1_.BLIF inst_VPA_D.BLIF CLK_000_D_1_.BLIF \ -CLK_000_D_0_.BLIF inst_VMA_INTreg.D ---0000-01 1 --1----1-- 1 --1------1 1 --1-----0- 1 --1---0--- 1 --1--0---- 1 --1-1----- 1 --11------ 1 0-------- 1 -1-0011010 0 -10-1----- 0 -101------ 0 -10-----1- 0 -10---1--- 0 -10--1---- 0 -10------0 0 +100--1-01 0 +1-00-1-01 0 +1-0--1101 0 +1-0-1010- 0 +1-0010-0- 0 +100-10-0- 0 +1-0-0110- 0 +1-0001-0- 0 +100-01-0- 0 .names RST.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.D 0- 1 -1 1 @@ -614,17 +614,15 @@ AS_030.PIN.BLIF FPU_CS 00 0 .names AVEC 1 -.names cpu_est_2_.BLIF cpu_est_3_.BLIF cpu_est_1_.BLIF E -010 1 -101 1 +.names cpu_est_1_.BLIF cpu_est_2_.BLIF cpu_est_3_.BLIF E +110 1 +001 1 -00 0 -0-1 0 -11- 0 +1-1 0 +01- 0 .names inst_VMA_INTreg.BLIF VMA 1 1 0 0 -.names RESET - 0 .names AMIGA_ADDR_ENABLE 0 .names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF AS_000.PIN.BLIF \ @@ -671,15 +669,6 @@ AHIGH_31_.PIN.BLIF CIIN .names IPL_030DFF_0_reg.BLIF IPL_030_0_ 1 1 0 0 -.names CLK_OSZI.BLIF IPL_D0_0_.C -1 1 -0 0 -.names CLK_OSZI.BLIF IPL_D0_1_.C -1 1 -0 0 -.names CLK_OSZI.BLIF IPL_D0_2_.C -1 1 -0 0 .names CLK_OSZI.BLIF SM_AMIGA_i_7_.C 1 1 0 0 @@ -704,12 +693,6 @@ AHIGH_31_.PIN.BLIF CIIN .names CLK_OSZI.BLIF SM_AMIGA_0_.C 1 1 0 0 -.names CLK_OSZI.BLIF cpu_est_0_.C -1 1 -0 0 -.names CLK_OSZI.BLIF cpu_est_1_.C -1 1 -0 0 .names CLK_OSZI.BLIF cpu_est_2_.C 1 1 0 0 @@ -725,7 +708,13 @@ AHIGH_31_.PIN.BLIF CIIN .names CLK_OSZI.BLIF IPL_030DFF_2_reg.C 1 1 0 0 -.names CLK_OSZI.BLIF RST_DLY_2_.C +.names CLK_OSZI.BLIF IPL_D0_0_.C +1 1 +0 0 +.names CLK_OSZI.BLIF IPL_D0_1_.C +1 1 +0 0 +.names CLK_OSZI.BLIF IPL_D0_2_.C 1 1 0 0 .names CLK_000.BLIF CLK_000_D_0_.D @@ -764,31 +753,31 @@ AHIGH_31_.PIN.BLIF CIIN .names CLK_OSZI.BLIF CYCLE_DMA_1_.C 1 1 0 0 +.names CLK_OSZI.BLIF CLK_030_PE_0_.C +1 1 +0 0 +.names CLK_OSZI.BLIF CLK_030_PE_1_.C +1 1 +0 0 .names CLK_OSZI.BLIF SIZE_DMA_0_.C 1 1 0 0 .names CLK_OSZI.BLIF SIZE_DMA_1_.C 1 1 0 0 +.names CLK_OSZI.BLIF cpu_est_0_.C +1 1 +0 0 +.names CLK_OSZI.BLIF cpu_est_1_.C +1 1 +0 0 .names CLK_OSZI.BLIF RST_DLY_0_.C 1 1 0 0 .names CLK_OSZI.BLIF RST_DLY_1_.C 1 1 0 0 -.names CLK_OSZI.BLIF inst_RW_000_INT.C -1 1 -0 0 -.names CLK_OSZI.BLIF inst_AS_030_000_SYNC.C -1 1 -0 0 -.names CLK_OSZI.BLIF inst_LDS_000_INT.C -1 1 -0 0 -.names CLK_OSZI.BLIF inst_BGACK_030_INTreg.C -1 1 -0 0 -.names CLK_OSZI.BLIF inst_AS_000_DMA.C +.names CLK_OSZI.BLIF RST_DLY_2_.C 1 1 0 0 .names CLK_OSZI.BLIF inst_DS_000_DMA.C @@ -800,16 +789,16 @@ AHIGH_31_.PIN.BLIF CIIN .names CLK_OSZI.BLIF inst_AS_000_INT.C 1 1 0 0 -.names CLK_OSZI.BLIF inst_AS_030_D0.C +.names CLK_OSZI.BLIF inst_AMIGA_DS.C 1 1 0 0 -.names CLK_OSZI.BLIF inst_VPA_D.C +.names CLK_OSZI.BLIF inst_AS_030_D0.C 1 1 0 0 .names CLK_OSZI.BLIF inst_DTACK_D0.C 1 1 0 0 -.names CLK_OSZI.BLIF inst_CLK_030_H.C +.names CLK_OSZI.BLIF inst_VPA_D.C 1 1 0 0 .names CLK_OSZI.BLIF inst_RESET_OUT.C @@ -839,6 +828,21 @@ AHIGH_31_.PIN.BLIF CIIN .names CLK_OSZI.BLIF inst_VMA_INTreg.C 1 1 0 0 +.names CLK_OSZI.BLIF inst_RW_000_INT.C +1 1 +0 0 +.names CLK_OSZI.BLIF inst_AS_030_000_SYNC.C +1 1 +0 0 +.names CLK_OSZI.BLIF inst_LDS_000_INT.C +1 1 +0 0 +.names CLK_OSZI.BLIF inst_BGACK_030_INTreg.C +1 1 +0 0 +.names CLK_OSZI.BLIF inst_AS_000_DMA.C +1 1 +0 0 .names CLK_OSZI.BLIF inst_BGACK_030_INT_D.C 1 1 0 0 @@ -883,6 +887,8 @@ AHIGH_31_.PIN.BLIF CIIN 01 0 .names BERR 0 +.names DTACK + 0 .names inst_RW_000_DMA.BLIF RW 1 1 0 0 @@ -936,54 +942,46 @@ AS_030.OE 00 1 1- 0 -1 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF \ -AHIGH_24_.OE -001 1 --1- 0 +.names nEXP_SPACE.BLIF RESET.BLIF inst_BGACK_030_INTreg.BLIF AHIGH_24_.OE +010 1 +-0- 0 1-- 0 ---0 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF \ -AHIGH_25_.OE -001 1 --1- 0 +--1 0 +.names nEXP_SPACE.BLIF RESET.BLIF inst_BGACK_030_INTreg.BLIF AHIGH_25_.OE +010 1 +-0- 0 1-- 0 ---0 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF \ -AHIGH_26_.OE -001 1 --1- 0 +--1 0 +.names nEXP_SPACE.BLIF RESET.BLIF inst_BGACK_030_INTreg.BLIF AHIGH_26_.OE +010 1 +-0- 0 1-- 0 ---0 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF \ -AHIGH_27_.OE -001 1 --1- 0 +--1 0 +.names nEXP_SPACE.BLIF RESET.BLIF inst_BGACK_030_INTreg.BLIF AHIGH_27_.OE +010 1 +-0- 0 1-- 0 ---0 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF \ -AHIGH_28_.OE -001 1 --1- 0 +--1 0 +.names nEXP_SPACE.BLIF RESET.BLIF inst_BGACK_030_INTreg.BLIF AHIGH_28_.OE +010 1 +-0- 0 1-- 0 ---0 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF \ -AHIGH_29_.OE -001 1 --1- 0 +--1 0 +.names nEXP_SPACE.BLIF RESET.BLIF inst_BGACK_030_INTreg.BLIF AHIGH_29_.OE +010 1 +-0- 0 1-- 0 ---0 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF \ -AHIGH_30_.OE -001 1 --1- 0 +--1 0 +.names nEXP_SPACE.BLIF RESET.BLIF inst_BGACK_030_INTreg.BLIF AHIGH_30_.OE +010 1 +-0- 0 1-- 0 ---0 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF \ -AHIGH_31_.OE -001 1 --1- 0 +--1 0 +.names nEXP_SPACE.BLIF RESET.BLIF inst_BGACK_030_INTreg.BLIF AHIGH_31_.OE +010 1 +-0- 0 1-- 0 ---0 0 +--1 0 .names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF A_0_.OE 001 1 -1- 0 @@ -1002,6 +1000,9 @@ AS_030.PIN.BLIF BERR.OE -0------- 0 0-------- 0 --------1 0 +.names inst_AS_000_DMA.BLIF DTACK.OE +0 1 +1 0 .names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF RW.OE 01 1 1- 0 @@ -1015,9 +1016,6 @@ DS_030.OE .names nEXP_SPACE.BLIF DSACK1.OE 1 1 0 0 -.names inst_RESET_OUT.BLIF RESET.OE -0 1 -1 0 .names A_DECODE_23_.BLIF nEXP_SPACE.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF \ A_DECODE_20_.BLIF inst_AS_030_D0.BLIF AHIGH_24_.PIN.BLIF AHIGH_25_.PIN.BLIF \ AHIGH_26_.PIN.BLIF AHIGH_27_.PIN.BLIF AHIGH_28_.PIN.BLIF AHIGH_29_.PIN.BLIF \ @@ -1040,13 +1038,45 @@ AHIGH_30_.PIN.BLIF AHIGH_31_.PIN.BLIF CIIN.OE .names cpu_est_2_.BLIF cpu_est_2_.D.X1 1 1 0 0 -.names cpu_est_2_.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF CLK_000_D_1_.BLIF \ +.names cpu_est_1_.BLIF cpu_est_2_.BLIF cpu_est_0_.BLIF CLK_000_D_1_.BLIF \ CLK_000_D_0_.BLIF cpu_est_2_.D.X2 --1110 1 --0--- 0 +1-110 1 +0---- 0 --0-- 0 ---0- 0 ----1 0 +.names RST.BLIF inst_AMIGA_DS.BLIF AS_000.PIN.BLIF CLK_030_PE_0_.D.X1 +100 1 +0-- 0 +-1- 0 +--1 0 +.names RST.BLIF inst_AS_000_DMA.BLIF CLK_030_PE_1_.BLIF inst_AMIGA_DS.BLIF \ +inst_CLK_OUT_PRE_D.BLIF CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF CLK_030_PE_0_.BLIF \ +CLK_OUT_INTreg.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF CLK_030_PE_0_.D.X2 +11-0---0-0- 1 +1--00--0-0- 1 +1--0-00--0- 1 +1--0---010- 1 +1--0-11--00 1 +10001--100- 1 +0---------- 0 +---1------- 0 +---------1- 0 +-1---011--- 0 +--1--011--- 0 +----0011--- 0 +-1---101--- 0 +--1--101--- 0 +----0101--- 0 +-----0111-- 0 +-----1011-- 0 +-1---1-1--1 0 +--1--1-1--1 0 +----01-1--1 0 +-----1-11-1 0 +-0--10100-- 0 +-0--11000-- 0 +-0--11-00-1 0 .names RST_DLY_1_.BLIF RST_DLY_1_.D.X1 1 1 0 0 @@ -1063,40 +1093,17 @@ RST_DLY_1_.BLIF RST_DLY_2_.BLIF RST_DLY_1_.D.X2 --1-0- 0 ---00- 0 1---11 0 -.names RST.BLIF inst_BGACK_030_INTreg.BLIF inst_CLK_030_H.D.X1 -10 1 -0- 0 --1 0 -.names CLK_030.BLIF RST.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_000_DMA.BLIF \ -CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF inst_CLK_030_H.BLIF AS_000.PIN.BLIF \ -UDS_000.PIN.BLIF LDS_000.PIN.BLIF inst_CLK_030_H.D.X2 --10-00---- 1 --10----1-- 1 -110---0--- 1 --101--0--- 1 --10-----11 1 --10-11---- 1 --0-------- 0 ---1------- 0 -----01100- 0 -----10100- 0 -----0110-0 0 -----1010-0 0 -0--001-00- 0 -0--010-00- 0 -0--001-0-0 0 -0--010-0-0 0 .names RST.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_3_.D.X1 11 1 0- 0 -0 0 -.names RST.BLIF inst_VMA_INTreg.BLIF cpu_est_2_.BLIF cpu_est_3_.BLIF \ -cpu_est_0_.BLIF cpu_est_1_.BLIF inst_VPA_D.BLIF inst_DTACK_D0.BLIF \ +.names RST.BLIF inst_VMA_INTreg.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF \ +cpu_est_3_.BLIF cpu_est_0_.BLIF inst_VPA_D.BLIF inst_DTACK_D0.BLIF \ CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_3_.BLIF \ BERR.PIN.BLIF SM_AMIGA_3_.D.X2 1-------0110- 1 1-------10-10 1 -1001000-10-1- 1 +1000100-10-1- 1 1-----1010-1- 1 0------------ 0 --------11--- 0 @@ -1106,8 +1113,8 @@ BERR.PIN.BLIF SM_AMIGA_3_.D.X2 --------1--0- 0 -1----0-1---1 0 --1---0-1---1 0 ----0--0-1---1 0 -----1-0-1---1 0 +---1--0-1---1 0 +----0-0-1---1 0 -----10-1---1 0 ------111---1 0 .names RST.BLIF SM_AMIGA_i_7_.BLIF SM_AMIGA_i_7_.D.X1 diff --git a/Logic/68030_tk.crf b/Logic/68030_tk.crf index 1439b80..aade194 100644 --- a/Logic/68030_tk.crf +++ b/Logic/68030_tk.crf @@ -1,7 +1,7 @@ // Signal Name Cross Reference File // ispLEVER Classic 2.0.00.17.20.15 -// Design '68030_tk' created Wed Oct 26 22:26:25 2016 +// Design '68030_tk' created Fri Nov 18 19:32:36 2016 // LEGEND: '>' Functional Block Port Separator diff --git a/Logic/68030_tk.eq3 b/Logic/68030_tk.eq3 index 89e3b87..43f1c17 100644 --- a/Logic/68030_tk.eq3 +++ b/Logic/68030_tk.eq3 @@ -2,7 +2,7 @@ Copyright(C), 1992-2015, Lattice Semiconductor Corp. All Rights Reserved. -Design bus68030 created Wed Oct 26 22:26:25 2016 +Design bus68030 created Fri Nov 18 19:32:36 2016 P-Terms Fan-in Fan-out Type Name (attributes) @@ -21,6 +21,15 @@ Design bus68030 created Wed Oct 26 22:26:25 2016 1 2 1 Pin LDS_000.OE 0 0 1 Pin BERR 1 9 1 Pin BERR.OE + 1 1 1 Pin CLK_DIV_OUT + 1 1 1 Pin CLK_EXP + 1 9 1 Pin FPU_CS- + 1 2 1 Pin DSACK1- + 1 1 1 Pin DSACK1.OE + 0 0 1 Pin DTACK + 1 1 1 Pin DTACK.OE + 1 0 1 Pin AVEC + 2 3 1 Pin E 0 0 1 Pin AHIGH_30_ 1 3 1 Pin AHIGH_30_.OE 0 0 1 Pin AHIGH_29_ @@ -31,54 +40,45 @@ Design bus68030 created Wed Oct 26 22:26:25 2016 1 3 1 Pin AHIGH_27_.OE 0 0 1 Pin AHIGH_26_ 1 3 1 Pin AHIGH_26_.OE - 1 1 1 Pin CLK_DIV_OUT.D - 1 1 1 Pin CLK_DIV_OUT.C 0 0 1 Pin AHIGH_25_ 1 3 1 Pin AHIGH_25_.OE + 0 0 1 Pin AMIGA_ADDR_ENABLE 0 0 1 Pin AHIGH_24_ 1 3 1 Pin AHIGH_24_.OE - 1 9 1 Pin FPU_CS- - 1 2 1 Pin DSACK1- - 1 1 1 Pin DSACK1.OE - 1 0 1 Pin AVEC - 2 3 1 Pin E - 0 0 1 Pin RESET - 1 1 1 Pin RESET.OE - 0 0 1 Pin AMIGA_ADDR_ENABLE 2 4 1 Pin AMIGA_BUS_DATA_DIR 1 2 1 Pin AMIGA_BUS_ENABLE_LOW- 2 4 1 Pin AMIGA_BUS_ENABLE_HIGH- 1 13 1 Pin CIIN 1 1 1 Pin CIIN.OE + 1 3 1 Pin A_0_.OE + 3 5 1 Pin A_0_.D + 1 1 1 Pin A_0_.C 1 2 1 Pin SIZE_1_.OE 3 6 1 Pin SIZE_1_.D 1 1 1 Pin SIZE_1_.C - 9 10 1 Pin IPL_030_2_.T + 10 8 1 Pin IPL_030_1_.D- + 1 1 1 Pin IPL_030_1_.C + 10 8 1 Pin IPL_030_0_.D- + 1 1 1 Pin IPL_030_0_.C + 10 8 1 Pin IPL_030_2_.D- 1 1 1 Pin IPL_030_2_.C 1 2 1 Pin RW_000.OE 4 8 1 Pin RW_000.D- 1 1 1 Pin RW_000.C 2 6 1 Pin BG_000.D- 1 1 1 Pin BG_000.C + 3 6 1 Pin BGACK_030.D + 1 1 1 Pin BGACK_030.C 1 2 1 Pin SIZE_0_.OE 3 6 1 Pin SIZE_0_.D- 1 1 1 Pin SIZE_0_.C - 3 6 1 Pin BGACK_030.D - 1 1 1 Pin BGACK_030.C - 1 1 1 Pin CLK_EXP.D - 1 1 1 Pin CLK_EXP.C 3 9 1 Pin VMA.T 1 1 1 Pin VMA.C 1 2 1 Pin RW.OE 2 5 1 Pin RW.D- 1 1 1 Pin RW.C - 1 3 1 Pin A_0_.OE - 3 5 1 Pin A_0_.D - 1 1 1 Pin A_0_.C - 9 10 1 Pin IPL_030_1_.T - 1 1 1 Pin IPL_030_1_.C - 9 10 1 Pin IPL_030_0_.T - 1 1 1 Pin IPL_030_0_.C + 4 5 1 Node cpu_est_1_.D + 1 1 1 Node cpu_est_1_.C 1 1 1 NodeX1 cpu_est_2_.D.X1 1 4 1 NodeX2 cpu_est_2_.D.X2 1 1 1 Node cpu_est_2_.C @@ -86,8 +86,6 @@ Design bus68030 created Wed Oct 26 22:26:25 2016 1 1 1 Node cpu_est_3_.C 3 3 1 Node cpu_est_0_.D 1 1 1 Node cpu_est_0_.C - 4 5 1 Node cpu_est_1_.D - 1 1 1 Node cpu_est_1_.C 2 5 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- 1 1 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.C 2 5 1 Node inst_AMIGA_BUS_ENABLE_DMA_LOW.D- @@ -98,14 +96,10 @@ Design bus68030 created Wed Oct 26 22:26:25 2016 1 1 1 Node inst_AS_030_000_SYNC.C 1 2 1 Node inst_BGACK_030_INT_D.D- 1 1 1 Node inst_BGACK_030_INT_D.C - 7 9 1 Node inst_AS_000_DMA.D + 6 9 1 Node inst_AS_000_DMA.D 1 1 1 Node inst_AS_000_DMA.C 9 12 1 Node inst_DS_000_DMA.D 1 1 1 Node inst_DS_000_DMA.C - 3 6 1 Node CYCLE_DMA_0_.D - 1 1 1 Node CYCLE_DMA_0_.C - 4 7 1 Node CYCLE_DMA_1_.D - 1 1 1 Node CYCLE_DMA_1_.C 1 2 1 Node inst_VPA_D.D- 1 1 1 Node inst_VPA_D.C 1 1 1 Node CLK_000_D_3_.D @@ -114,6 +108,10 @@ Design bus68030 created Wed Oct 26 22:26:25 2016 1 1 1 Node inst_DTACK_D0.C 2 7 1 Node inst_RESET_OUT.D 1 1 1 Node inst_RESET_OUT.C + 6 11 1 Node CLK_030_PE_1_.D + 1 1 1 Node CLK_030_PE_1_.C + 2 3 1 Node inst_AMIGA_DS.D + 1 1 1 Node inst_AMIGA_DS.C 1 1 1 Node CLK_000_D_1_.D 1 1 1 Node CLK_000_D_1_.C 1 1 1 Node CLK_000_D_0_.D @@ -146,6 +144,12 @@ Design bus68030 created Wed Oct 26 22:26:25 2016 1 1 1 Node SM_AMIGA_1_.C 3 5 1 Node SM_AMIGA_0_.D 1 1 1 Node SM_AMIGA_0_.C + 4 7 1 Node CYCLE_DMA_0_.D + 1 1 1 Node CYCLE_DMA_0_.C + 2 7 1 Node CYCLE_DMA_1_.D + 1 1 1 Node CYCLE_DMA_1_.C + 9 11 1 Node CLK_030_PE_0_.D- + 1 1 1 Node CLK_030_PE_0_.C 4 6 1 Node RST_DLY_0_.D 1 1 1 Node RST_DLY_0_.C 2 6 1 NodeX1 RST_DLY_1_.D.X1 @@ -153,8 +157,6 @@ Design bus68030 created Wed Oct 26 22:26:25 2016 1 1 1 Node RST_DLY_1_.C 2 6 1 Node RST_DLY_2_.D 1 1 1 Node RST_DLY_2_.C - 8 10 1 Node inst_CLK_030_H.D - 1 1 1 Node inst_CLK_030_H.C 2 6 1 Node inst_DSACK1_INT.D- 1 1 1 Node inst_DSACK1_INT.C 2 6 1 Node inst_AS_000_INT.D- @@ -168,11 +170,13 @@ Design bus68030 created Wed Oct 26 22:26:25 2016 3 9 1 NodeX1 SM_AMIGA_i_7_.T.X1 1 9 1 NodeX2 SM_AMIGA_i_7_.T.X2 1 1 1 Node SM_AMIGA_i_7_.C + 1 1 1 Node CLK_OUT_INTreg.D + 1 1 1 Node CLK_OUT_INTreg.C 2 14 1 Node CIIN_0 ========= - 269 P-Term Total: 269 + 281 P-Term Total: 281 Total Pins: 61 - Total Nodes: 44 + Total Nodes: 47 Average P-Term/Output: 2 @@ -180,7 +184,7 @@ Equations: AHIGH_31_ = (0); -AHIGH_31_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +AHIGH_31_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); !AS_030 = (!inst_AS_000_DMA.Q & !AS_000.PIN); @@ -206,37 +210,9 @@ BERR = (0); BERR.OE = (FC_1_ & BGACK_000 & FPU_SENSE & !A_DECODE_19_ & !A_DECODE_18_ & A_DECODE_17_ & !A_DECODE_16_ & FC_0_ & !AS_030.PIN); -AHIGH_30_ = (0); +CLK_DIV_OUT = (CLK_OUT_INTreg.Q); -AHIGH_30_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); - -AHIGH_29_ = (0); - -AHIGH_29_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); - -AHIGH_28_ = (0); - -AHIGH_28_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); - -AHIGH_27_ = (0); - -AHIGH_27_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); - -AHIGH_26_ = (0); - -AHIGH_26_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); - -CLK_DIV_OUT.D = (inst_CLK_OUT_PRE_D.Q); - -CLK_DIV_OUT.C = (CLK_OSZI); - -AHIGH_25_ = (0); - -AHIGH_25_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); - -AHIGH_24_ = (0); - -AHIGH_24_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +CLK_EXP = (CLK_OUT_INTreg.Q); !FPU_CS = (FC_1_ & BGACK_000 & !FPU_SENSE & !A_DECODE_19_ & !A_DECODE_18_ & A_DECODE_17_ & !A_DECODE_16_ & FC_0_ & !AS_030.PIN); @@ -244,17 +220,45 @@ AHIGH_24_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); DSACK1.OE = (nEXP_SPACE); +DTACK = (0); + +DTACK.OE = (!inst_AS_000_DMA.Q); + AVEC = (1); -E = (cpu_est_2_.Q & !cpu_est_3_.Q & cpu_est_1_.Q - # !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_1_.Q); +E = (!cpu_est_1_.Q & !cpu_est_2_.Q & cpu_est_3_.Q + # cpu_est_1_.Q & cpu_est_2_.Q & !cpu_est_3_.Q); -RESET = (0); +AHIGH_30_ = (0); -RESET.OE = (!inst_RESET_OUT.Q); +AHIGH_30_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); + +AHIGH_29_ = (0); + +AHIGH_29_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); + +AHIGH_28_ = (0); + +AHIGH_28_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); + +AHIGH_27_ = (0); + +AHIGH_27_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); + +AHIGH_26_ = (0); + +AHIGH_26_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); + +AHIGH_25_ = (0); + +AHIGH_25_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); AMIGA_ADDR_ENABLE = (0); +AHIGH_24_ = (0); + +AHIGH_24_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); + AMIGA_BUS_DATA_DIR = (BGACK_030.Q & !RW_000.PIN # !nEXP_SPACE & !BGACK_030.Q & !AS_000.PIN & RW_000.PIN); @@ -267,6 +271,14 @@ CIIN = (A_DECODE_23_ & A_DECODE_22_ & A_DECODE_21_ & A_DECODE_20_ & !inst_AS_030 CIIN.OE = (CIIN_0); +A_0_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); + +A_0_.D = (!RST + # !BGACK_030.Q & UDS_000.PIN + # BGACK_030.Q & inst_BGACK_030_INT_D.Q & A_0_.Q); + +A_0_.C = (CLK_OSZI); + SIZE_1_.OE = (!nEXP_SPACE & !BGACK_030.Q); SIZE_1_.D = (!RST @@ -275,15 +287,42 @@ SIZE_1_.D = (!RST SIZE_1_.C = (CLK_OSZI); -IPL_030_2_.T = (!RST & !IPL_030_2_.Q - # IPL_2_ & IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & IPL_D0_1_.Q & IPL_D0_2_.Q & !IPL_030_2_.Q - # IPL_2_ & IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & IPL_D0_1_.Q & IPL_D0_2_.Q & !IPL_030_2_.Q - # IPL_2_ & !IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q & !IPL_030_2_.Q - # IPL_2_ & !IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q & !IPL_030_2_.Q - # !IPL_2_ & RST & IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q & IPL_030_2_.Q - # !IPL_2_ & RST & IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q & IPL_030_2_.Q - # !IPL_2_ & RST & !IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q & IPL_030_2_.Q - # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q & IPL_030_2_.Q); +!IPL_030_1_.D = (RST & !IPL_1_ & !IPL_030_1_.Q + # RST & !IPL_D0_1_.Q & !IPL_030_1_.Q + # RST & !IPL_0_ & IPL_D0_0_.Q & !IPL_030_1_.Q + # RST & IPL_0_ & !IPL_D0_0_.Q & !IPL_030_1_.Q + # !IPL_2_ & RST & IPL_D0_2_.Q & !IPL_030_1_.Q + # IPL_2_ & RST & !IPL_D0_2_.Q & !IPL_030_1_.Q + # IPL_2_ & RST & !IPL_1_ & IPL_0_ & IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q + # IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q + # !IPL_2_ & RST & !IPL_1_ & IPL_0_ & IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q + # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q); + +IPL_030_1_.C = (CLK_OSZI); + +!IPL_030_0_.D = (RST & !IPL_0_ & !IPL_030_0_.Q + # RST & !IPL_D0_0_.Q & !IPL_030_0_.Q + # RST & !IPL_1_ & IPL_D0_1_.Q & !IPL_030_0_.Q + # RST & IPL_1_ & !IPL_D0_1_.Q & !IPL_030_0_.Q + # !IPL_2_ & RST & IPL_D0_2_.Q & !IPL_030_0_.Q + # IPL_2_ & RST & !IPL_D0_2_.Q & !IPL_030_0_.Q + # IPL_2_ & RST & IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & IPL_D0_1_.Q & IPL_D0_2_.Q + # IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q + # !IPL_2_ & RST & IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q + # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q); + +IPL_030_0_.C = (CLK_OSZI); + +!IPL_030_2_.D = (!IPL_2_ & RST & !IPL_030_2_.Q + # RST & !IPL_D0_2_.Q & !IPL_030_2_.Q + # RST & !IPL_0_ & IPL_D0_0_.Q & !IPL_030_2_.Q + # RST & IPL_0_ & !IPL_D0_0_.Q & !IPL_030_2_.Q + # RST & !IPL_1_ & IPL_D0_1_.Q & !IPL_030_2_.Q + # RST & IPL_1_ & !IPL_D0_1_.Q & !IPL_030_2_.Q + # !IPL_2_ & RST & IPL_1_ & IPL_0_ & IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q + # !IPL_2_ & RST & IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q + # !IPL_2_ & RST & !IPL_1_ & IPL_0_ & IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q + # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q); IPL_030_2_.C = (CLK_OSZI); @@ -301,6 +340,12 @@ RW_000.C = (CLK_OSZI); BG_000.C = (CLK_OSZI); +BGACK_030.D = (!RST + # BGACK_000 & BGACK_030.Q + # BGACK_000 & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & AS_000.PIN); + +BGACK_030.C = (CLK_OSZI); + SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q); !SIZE_0_.D = (RST & BGACK_030.Q & !inst_BGACK_030_INT_D.Q @@ -309,19 +354,9 @@ SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q); SIZE_0_.C = (CLK_OSZI); -BGACK_030.D = (!RST - # BGACK_000 & BGACK_030.Q - # BGACK_000 & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & AS_000.PIN); - -BGACK_030.C = (CLK_OSZI); - -CLK_EXP.D = (inst_CLK_OUT_PRE_D.Q); - -CLK_EXP.C = (CLK_OSZI); - VMA.T = (!RST & !VMA.Q - # !VMA.Q & !cpu_est_2_.Q & !cpu_est_3_.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !CLK_000_D_1_.Q & CLK_000_D_0_.Q - # RST & VMA.Q & !cpu_est_2_.Q & !cpu_est_3_.Q & cpu_est_0_.Q & cpu_est_1_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); + # !VMA.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !cpu_est_3_.Q & !cpu_est_0_.Q & !CLK_000_D_1_.Q & CLK_000_D_0_.Q + # RST & VMA.Q & cpu_est_1_.Q & !cpu_est_2_.Q & !cpu_est_3_.Q & cpu_est_0_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); VMA.C = (CLK_OSZI); @@ -332,48 +367,23 @@ RW.OE = (!BGACK_030.Q & inst_RESET_OUT.Q); RW.C = (CLK_OSZI); -A_0_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +cpu_est_1_.D = (cpu_est_1_.Q & !cpu_est_0_.Q + # cpu_est_1_.Q & !CLK_000_D_1_.Q + # cpu_est_1_.Q & CLK_000_D_0_.Q + # !cpu_est_1_.Q & !cpu_est_3_.Q & cpu_est_0_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); -A_0_.D = (!RST - # !BGACK_030.Q & UDS_000.PIN - # BGACK_030.Q & inst_BGACK_030_INT_D.Q & A_0_.Q); - -A_0_.C = (CLK_OSZI); - -IPL_030_1_.T = (!RST & !IPL_030_1_.Q - # IPL_2_ & IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & IPL_D0_1_.Q & IPL_D0_2_.Q & !IPL_030_1_.Q - # IPL_2_ & IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & IPL_D0_1_.Q & IPL_D0_2_.Q & !IPL_030_1_.Q - # !IPL_2_ & IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q & !IPL_030_1_.Q - # !IPL_2_ & IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q & !IPL_030_1_.Q - # IPL_2_ & RST & !IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q & IPL_030_1_.Q - # IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q & IPL_030_1_.Q - # !IPL_2_ & RST & !IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q & IPL_030_1_.Q - # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q & IPL_030_1_.Q); - -IPL_030_1_.C = (CLK_OSZI); - -IPL_030_0_.T = (!RST & !IPL_030_0_.Q - # IPL_2_ & IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & IPL_D0_1_.Q & IPL_D0_2_.Q & !IPL_030_0_.Q - # IPL_2_ & !IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q & !IPL_030_0_.Q - # !IPL_2_ & IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q & !IPL_030_0_.Q - # !IPL_2_ & !IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q & !IPL_030_0_.Q - # IPL_2_ & RST & IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & IPL_D0_1_.Q & IPL_D0_2_.Q & IPL_030_0_.Q - # IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q & IPL_030_0_.Q - # !IPL_2_ & RST & IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q & IPL_030_0_.Q - # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q & IPL_030_0_.Q); - -IPL_030_0_.C = (CLK_OSZI); +cpu_est_1_.C = (CLK_OSZI); cpu_est_2_.D.X1 = (cpu_est_2_.Q); -cpu_est_2_.D.X2 = (cpu_est_0_.Q & cpu_est_1_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); +cpu_est_2_.D.X2 = (cpu_est_1_.Q & cpu_est_0_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); cpu_est_2_.C = (CLK_OSZI); cpu_est_3_.D = (cpu_est_3_.Q & !CLK_000_D_1_.Q # cpu_est_3_.Q & CLK_000_D_0_.Q # !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_0_.Q - # cpu_est_2_.Q & cpu_est_0_.Q & cpu_est_1_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); + # cpu_est_1_.Q & cpu_est_2_.Q & cpu_est_0_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); cpu_est_3_.C = (CLK_OSZI); @@ -383,13 +393,6 @@ cpu_est_0_.D = (cpu_est_0_.Q & !CLK_000_D_1_.Q cpu_est_0_.C = (CLK_OSZI); -cpu_est_1_.D = (!cpu_est_0_.Q & cpu_est_1_.Q - # cpu_est_1_.Q & !CLK_000_D_1_.Q - # cpu_est_1_.Q & CLK_000_D_0_.Q - # !cpu_est_3_.Q & cpu_est_0_.Q & !cpu_est_1_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); - -cpu_est_1_.C = (CLK_OSZI); - !inst_AMIGA_BUS_ENABLE_DMA_HIGH.D = (RST & !A_1_ & !BGACK_030.Q # RST & BGACK_030.Q & !inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q & inst_BGACK_030_INT_D.Q); @@ -419,40 +422,26 @@ inst_AS_030_000_SYNC.C = (CLK_OSZI); inst_BGACK_030_INT_D.C = (CLK_OSZI); inst_AS_000_DMA.D = (!RST - # BGACK_030.Q + # inst_AMIGA_DS.Q # AS_000.PIN - # !CLK_030 & inst_AS_000_DMA.Q - # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q # !CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q - # UDS_000.PIN & LDS_000.PIN); + # inst_AS_000_DMA.Q & inst_CLK_OUT_PRE_D.Q & !CLK_OUT_INTreg.Q + # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !RW_000.PIN); inst_AS_000_DMA.C = (CLK_OSZI); inst_DS_000_DMA.D = (!RST - # BGACK_030.Q + # inst_AMIGA_DS.Q # AS_000.PIN - # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q # !CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q - # UDS_000.PIN & LDS_000.PIN # !CLK_030 & inst_DS_000_DMA.Q & !RW_000.PIN - # inst_DS_000_DMA.Q & !inst_CLK_030_H.Q & !RW_000.PIN - # CLK_030 & inst_AS_000_DMA.Q & inst_CLK_030_H.Q & !RW_000.PIN); + # inst_DS_000_DMA.Q & CLK_030_PE_1_.Q & !RW_000.PIN + # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !RW_000.PIN + # inst_DS_000_DMA.Q & !CLK_030_PE_0_.Q & !RW_000.PIN + # inst_DS_000_DMA.Q & inst_CLK_OUT_PRE_D.Q & !CLK_OUT_INTreg.Q & RW_000.PIN); inst_DS_000_DMA.C = (CLK_OSZI); -CYCLE_DMA_0_.D = (RST & !BGACK_030.Q & CYCLE_DMA_0_.Q & CLK_000_D_1_.Q & !AS_000.PIN - # RST & !BGACK_030.Q & CYCLE_DMA_0_.Q & !CLK_000_D_0_.Q & !AS_000.PIN - # RST & !BGACK_030.Q & !CYCLE_DMA_0_.Q & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !AS_000.PIN); - -CYCLE_DMA_0_.C = (CLK_OSZI); - -CYCLE_DMA_1_.D = (RST & !BGACK_030.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !AS_000.PIN - # RST & !BGACK_030.Q & CYCLE_DMA_1_.Q & CLK_000_D_1_.Q & !AS_000.PIN - # RST & !BGACK_030.Q & CYCLE_DMA_1_.Q & !CLK_000_D_0_.Q & !AS_000.PIN - # RST & !BGACK_030.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !AS_000.PIN); - -CYCLE_DMA_1_.C = (CLK_OSZI); - !inst_VPA_D.D = (!VPA & RST); inst_VPA_D.C = (CLK_OSZI); @@ -461,7 +450,7 @@ CLK_000_D_3_.D = (CLK_000_D_2_.Q); CLK_000_D_3_.C = (CLK_OSZI); -!inst_DTACK_D0.D = (!DTACK & RST); +!inst_DTACK_D0.D = (RST & !DTACK.PIN); inst_DTACK_D0.C = (CLK_OSZI); @@ -470,6 +459,20 @@ inst_RESET_OUT.D = (RST & inst_RESET_OUT.Q inst_RESET_OUT.C = (CLK_OSZI); +CLK_030_PE_1_.D = (RST & CLK_030_PE_1_.Q & !inst_AMIGA_DS.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !AS_000.PIN + # RST & CLK_030_PE_1_.Q & !inst_AMIGA_DS.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & !AS_000.PIN + # RST & CLK_030_PE_1_.Q & !inst_AMIGA_DS.Q & CYCLE_DMA_1_.Q & !AS_000.PIN & RW_000.PIN + # RST & !inst_AS_000_DMA.Q & !inst_AMIGA_DS.Q & inst_CLK_OUT_PRE_D.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & CLK_030_PE_0_.Q & !CLK_OUT_INTreg.Q & !AS_000.PIN + # RST & !inst_AS_000_DMA.Q & !inst_AMIGA_DS.Q & inst_CLK_OUT_PRE_D.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & CLK_030_PE_0_.Q & !CLK_OUT_INTreg.Q & !AS_000.PIN + # RST & !inst_AS_000_DMA.Q & !inst_AMIGA_DS.Q & inst_CLK_OUT_PRE_D.Q & CYCLE_DMA_1_.Q & CLK_030_PE_0_.Q & !CLK_OUT_INTreg.Q & !AS_000.PIN & RW_000.PIN); + +CLK_030_PE_1_.C = (CLK_OSZI); + +inst_AMIGA_DS.D = (!RST + # UDS_000.PIN & LDS_000.PIN); + +inst_AMIGA_DS.C = (CLK_OSZI); + CLK_000_D_1_.D = (CLK_000_D_0_.Q); CLK_000_D_1_.C = (CLK_OSZI); @@ -547,6 +550,30 @@ SM_AMIGA_0_.D = (RST & CLK_000_D_1_.Q & SM_AMIGA_0_.Q SM_AMIGA_0_.C = (CLK_OSZI); +CYCLE_DMA_0_.D = (RST & !BGACK_030.Q & !CLK_000_D_1_.Q & CYCLE_DMA_0_.Q & !AS_000.PIN + # RST & !BGACK_030.Q & CLK_000_D_0_.Q & CYCLE_DMA_0_.Q & !AS_000.PIN + # RST & !BGACK_030.Q & CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !AS_000.PIN + # RST & !BGACK_030.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & !CYCLE_DMA_0_.Q & !AS_000.PIN); + +CYCLE_DMA_0_.C = (CLK_OSZI); + +CYCLE_DMA_1_.D = (RST & !BGACK_030.Q & CYCLE_DMA_1_.Q & !AS_000.PIN + # RST & !BGACK_030.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & CYCLE_DMA_0_.Q & !AS_000.PIN); + +CYCLE_DMA_1_.C = (CLK_OSZI); + +!CLK_030_PE_0_.D = (!RST + # inst_AMIGA_DS.Q + # AS_000.PIN + # !CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q + # inst_AS_000_DMA.Q & !CLK_030_PE_0_.Q + # !inst_CLK_OUT_PRE_D.Q & !CLK_030_PE_0_.Q + # !CLK_030_PE_0_.Q & CLK_OUT_INTreg.Q + # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !RW_000.PIN + # !inst_AS_000_DMA.Q & !CLK_030_PE_1_.Q & inst_CLK_OUT_PRE_D.Q & CLK_030_PE_0_.Q & !CLK_OUT_INTreg.Q); + +CLK_030_PE_0_.C = (CLK_OSZI); + RST_DLY_0_.D = (RST & !CLK_000_D_1_.Q & RST_DLY_0_.Q # RST & CLK_000_D_0_.Q & RST_DLY_0_.Q # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & !RST_DLY_0_.Q @@ -566,17 +593,6 @@ RST_DLY_2_.D = (RST & RST_DLY_2_.Q RST_DLY_2_.C = (CLK_OSZI); -inst_CLK_030_H.D = (RST & !BGACK_030.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & inst_CLK_030_H.Q & !AS_000.PIN & !UDS_000.PIN - # RST & !BGACK_030.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & inst_CLK_030_H.Q & !AS_000.PIN & !UDS_000.PIN - # RST & !BGACK_030.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & inst_CLK_030_H.Q & !AS_000.PIN & !LDS_000.PIN - # RST & !BGACK_030.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & inst_CLK_030_H.Q & !AS_000.PIN & !LDS_000.PIN - # !CLK_030 & RST & !BGACK_030.Q & !inst_AS_000_DMA.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !AS_000.PIN & !UDS_000.PIN - # !CLK_030 & RST & !BGACK_030.Q & !inst_AS_000_DMA.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & !AS_000.PIN & !UDS_000.PIN - # !CLK_030 & RST & !BGACK_030.Q & !inst_AS_000_DMA.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !AS_000.PIN & !LDS_000.PIN - # !CLK_030 & RST & !BGACK_030.Q & !inst_AS_000_DMA.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & !AS_000.PIN & !LDS_000.PIN); - -inst_CLK_030_H.C = (CLK_OSZI); - !inst_DSACK1_INT.D = (RST & !inst_DSACK1_INT.Q & !AS_030.PIN # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_1_.Q); @@ -597,7 +613,7 @@ SM_AMIGA_3_.T = (!RST & SM_AMIGA_3_.Q # CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & !BERR.PIN # inst_VPA_D.Q & !inst_DTACK_D0.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_4_.Q & !SM_AMIGA_3_.Q - # !VMA.Q & !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); + # !VMA.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); SM_AMIGA_3_.C = (CLK_OSZI); @@ -605,7 +621,7 @@ SM_AMIGA_2_.D = (RST & CLK_000_D_1_.Q & SM_AMIGA_2_.Q # RST & !CLK_000_D_0_.Q & SM_AMIGA_2_.Q # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & !BERR.PIN # RST & inst_VPA_D.Q & !inst_DTACK_D0.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q - # RST & !VMA.Q & !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); + # RST & !VMA.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); SM_AMIGA_2_.C = (CLK_OSZI); @@ -617,6 +633,10 @@ SM_AMIGA_i_7_.T.X2 = (nEXP_SPACE & RST & !inst_AS_030_000_SYNC.Q & !CLK_000_D_3_ SM_AMIGA_i_7_.C = (CLK_OSZI); +CLK_OUT_INTreg.D = (inst_CLK_OUT_PRE_D.Q); + +CLK_OUT_INTreg.C = (CLK_OSZI); + CIIN_0 = (nEXP_SPACE # A_DECODE_23_ & A_DECODE_22_ & A_DECODE_21_ & A_DECODE_20_ & !inst_AS_030_D0.Q & !AHIGH_24_.PIN & !AHIGH_25_.PIN & !AHIGH_26_.PIN & !AHIGH_27_.PIN & !AHIGH_28_.PIN & !AHIGH_29_.PIN & !AHIGH_30_.PIN & !AHIGH_31_.PIN); diff --git a/Logic/68030_tk.fti b/Logic/68030_tk.fti index 64be994..ef0a635 100644 --- a/Logic/68030_tk.fti +++ b/Logic/68030_tk.fti @@ -11,9 +11,9 @@ DATA LOCATION AHIGH_28_:C_0_15 // IO DATA LOCATION AHIGH_29_:B_8_6 // IO DATA LOCATION AHIGH_30_:B_0_5 // IO DATA LOCATION AHIGH_31_:B_12_4 // IO -DATA LOCATION AMIGA_ADDR_ENABLE:D_5_33 // OUT +DATA LOCATION AMIGA_ADDR_ENABLE:D_9_33 // OUT DATA LOCATION AMIGA_BUS_DATA_DIR:E_1_48 // OUT -DATA LOCATION AMIGA_BUS_ENABLE_HIGH:D_4_34 // OUT +DATA LOCATION AMIGA_BUS_ENABLE_HIGH:D_5_34 // OUT DATA LOCATION AMIGA_BUS_ENABLE_LOW:C_1_20 // OUT DATA LOCATION AS_000:E_4_42 // IO DATA LOCATION AS_030:H_8_82 // IO @@ -34,22 +34,25 @@ DATA LOCATION BGACK_030:H_4_83 // IO {RN_BGACK_030} DATA LOCATION BG_000:D_1_29 // IO {RN_BG_000} DATA LOCATION BG_030:C_*_21 // INP DATA LOCATION CIIN:E_12_47 // OUT -DATA LOCATION CIIN_0:E_9 // NOD +DATA LOCATION CIIN_0:E_5 // NOD DATA LOCATION CLK_000:*_*_11 // INP -DATA LOCATION CLK_000_D_0_:C_9 // NOD +DATA LOCATION CLK_000_D_0_:D_13 // NOD DATA LOCATION CLK_000_D_1_:H_5 // NOD DATA LOCATION CLK_000_D_2_:H_6 // NOD -DATA LOCATION CLK_000_D_3_:D_10 // NOD -DATA LOCATION CLK_000_D_4_:B_10 // NOD +DATA LOCATION CLK_000_D_3_:F_13 // NOD +DATA LOCATION CLK_000_D_4_:C_14 // NOD DATA LOCATION CLK_030:*_*_64 // INP +DATA LOCATION CLK_030_PE_0_:A_9 // NOD +DATA LOCATION CLK_030_PE_1_:A_2 // NOD DATA LOCATION CLK_DIV_OUT:G_1_65 // OUT DATA LOCATION CLK_EXP:B_1_10 // OUT DATA LOCATION CLK_OSZI:*_*_61 // Cin -DATA LOCATION CYCLE_DMA_0_:A_10 // NOD -DATA LOCATION CYCLE_DMA_1_:A_6 // NOD +DATA LOCATION CLK_OUT_INTreg:D_10 // NOD +DATA LOCATION CYCLE_DMA_0_:A_6 // NOD +DATA LOCATION CYCLE_DMA_1_:A_10 // NOD DATA LOCATION DSACK1:H_9_81 // OUT DATA LOCATION DS_030:A_0_98 // OUT -DATA LOCATION DTACK:D_*_30 // INP +DATA LOCATION DTACK:D_0_30 // IO DATA LOCATION E:G_4_66 // OUT DATA LOCATION FC_0_:F_*_57 // INP DATA LOCATION FC_1_:F_*_58 // INP @@ -61,11 +64,11 @@ DATA LOCATION IPL_030_2_:B_4_9 // IO {RN_IPL_030_2_} DATA LOCATION IPL_0_:G_*_67 // INP DATA LOCATION IPL_1_:F_*_56 // INP DATA LOCATION IPL_2_:G_*_68 // INP -DATA LOCATION IPL_D0_0_:G_14 // NOD -DATA LOCATION IPL_D0_1_:D_14 // NOD -DATA LOCATION IPL_D0_2_:B_14 // NOD +DATA LOCATION IPL_D0_0_:B_10 // NOD +DATA LOCATION IPL_D0_1_:B_6 // NOD +DATA LOCATION IPL_D0_2_:B_2 // NOD DATA LOCATION LDS_000:D_12_31 // IO -DATA LOCATION RESET:B_2_3 // OUT +DATA LOCATION RESET:B_*_3 // INP DATA LOCATION RN_A_0_:G_8 // NOD {A_0_} DATA LOCATION RN_BGACK_030:H_4 // NOD {BGACK_030} DATA LOCATION RN_BG_000:D_1 // NOD {BG_000} @@ -76,48 +79,48 @@ DATA LOCATION RN_RW:G_0 // NOD {RW} DATA LOCATION RN_RW_000:H_0 // NOD {RW_000} DATA LOCATION RN_SIZE_0_:G_12 // NOD {SIZE_0_} DATA LOCATION RN_SIZE_1_:H_12 // NOD {SIZE_1_} -DATA LOCATION RN_VMA:D_0 // NOD {VMA} +DATA LOCATION RN_VMA:D_4 // NOD {VMA} DATA LOCATION RST:*_*_86 // INP -DATA LOCATION RST_DLY_0_:G_2 // NOD -DATA LOCATION RST_DLY_1_:G_10 // NOD -DATA LOCATION RST_DLY_2_:G_6 // NOD +DATA LOCATION RST_DLY_0_:G_6 // NOD +DATA LOCATION RST_DLY_1_:G_14 // NOD +DATA LOCATION RST_DLY_2_:G_10 // NOD DATA LOCATION RW:G_0_71 // IO {RN_RW} DATA LOCATION RW_000:H_0_80 // IO {RN_RW_000} DATA LOCATION SIZE_0_:G_12_70 // IO {RN_SIZE_0_} DATA LOCATION SIZE_1_:H_12_79 // IO {RN_SIZE_1_} -DATA LOCATION SM_AMIGA_0_:H_13 // NOD -DATA LOCATION SM_AMIGA_1_:F_4 // NOD -DATA LOCATION SM_AMIGA_2_:A_5 // NOD -DATA LOCATION SM_AMIGA_3_:D_13 // NOD -DATA LOCATION SM_AMIGA_4_:D_2 // NOD -DATA LOCATION SM_AMIGA_5_:C_6 // NOD -DATA LOCATION SM_AMIGA_6_:C_13 // NOD -DATA LOCATION SM_AMIGA_i_7_:C_2 // NOD +DATA LOCATION SM_AMIGA_0_:A_12 // NOD +DATA LOCATION SM_AMIGA_1_:F_8 // NOD +DATA LOCATION SM_AMIGA_2_:C_9 // NOD +DATA LOCATION SM_AMIGA_3_:C_6 // NOD +DATA LOCATION SM_AMIGA_4_:A_1 // NOD +DATA LOCATION SM_AMIGA_5_:G_13 // NOD +DATA LOCATION SM_AMIGA_6_:F_0 // NOD +DATA LOCATION SM_AMIGA_i_7_:F_4 // NOD DATA LOCATION UDS_000:D_8_32 // IO -DATA LOCATION VMA:D_0_35 // IO {RN_VMA} +DATA LOCATION VMA:D_4_35 // IO {RN_VMA} DATA LOCATION VPA:*_*_36 // INP DATA LOCATION cpu_est_0_:G_9 // NOD -DATA LOCATION cpu_est_1_:A_8 // NOD -DATA LOCATION cpu_est_2_:A_12 // NOD -DATA LOCATION cpu_est_3_:D_9 // NOD -DATA LOCATION inst_AMIGA_BUS_ENABLE_DMA_HIGH:C_14 // NOD -DATA LOCATION inst_AMIGA_BUS_ENABLE_DMA_LOW:F_1 // NOD -DATA LOCATION inst_AS_000_DMA:A_1 // NOD -DATA LOCATION inst_AS_000_INT:C_10 // NOD -DATA LOCATION inst_AS_030_000_SYNC:F_0 // NOD -DATA LOCATION inst_AS_030_D0:E_5 // NOD -DATA LOCATION inst_BGACK_030_INT_D:E_8 // NOD -DATA LOCATION inst_CLK_030_H:A_2 // NOD -DATA LOCATION inst_CLK_OUT_PRE_50:G_13 // NOD -DATA LOCATION inst_CLK_OUT_PRE_D:D_6 // NOD -DATA LOCATION inst_DSACK1_INT:H_2 // NOD +DATA LOCATION cpu_est_1_:D_6 // NOD +DATA LOCATION cpu_est_2_:D_14 // NOD +DATA LOCATION cpu_est_3_:D_2 // NOD +DATA LOCATION inst_AMIGA_BUS_ENABLE_DMA_HIGH:F_9 // NOD +DATA LOCATION inst_AMIGA_BUS_ENABLE_DMA_LOW:F_5 // NOD +DATA LOCATION inst_AMIGA_DS:C_10 // NOD +DATA LOCATION inst_AS_000_DMA:A_8 // NOD +DATA LOCATION inst_AS_000_INT:C_2 // NOD +DATA LOCATION inst_AS_030_000_SYNC:B_13 // NOD +DATA LOCATION inst_AS_030_D0:H_2 // NOD +DATA LOCATION inst_BGACK_030_INT_D:H_13 // NOD +DATA LOCATION inst_CLK_OUT_PRE_50:G_2 // NOD +DATA LOCATION inst_CLK_OUT_PRE_D:E_8 // NOD +DATA LOCATION inst_DSACK1_INT:A_5 // NOD DATA LOCATION inst_DS_000_DMA:A_13 // NOD -DATA LOCATION inst_DS_000_ENABLE:B_13 // NOD -DATA LOCATION inst_DTACK_D0:B_6 // NOD -DATA LOCATION inst_LDS_000_INT:F_8 // NOD +DATA LOCATION inst_DS_000_ENABLE:C_13 // NOD +DATA LOCATION inst_DTACK_D0:B_14 // NOD +DATA LOCATION inst_LDS_000_INT:F_12 // NOD DATA LOCATION inst_RESET_OUT:G_5 // NOD -DATA LOCATION inst_UDS_000_INT:F_12 // NOD -DATA LOCATION inst_VPA_D:A_9 // NOD +DATA LOCATION inst_UDS_000_INT:F_1 // NOD +DATA LOCATION inst_VPA_D:F_2 // NOD DATA LOCATION nEXP_SPACE:*_*_14 // INP DATA IO_DIR AHIGH_24_:BI DATA IO_DIR AHIGH_25_:BI @@ -157,7 +160,7 @@ DATA IO_DIR CLK_EXP:OUT DATA IO_DIR CLK_OSZI:IN DATA IO_DIR DSACK1:OUT DATA IO_DIR DS_030:OUT -DATA IO_DIR DTACK:IN +DATA IO_DIR DTACK:BI DATA IO_DIR E:OUT DATA IO_DIR FC_0_:IN DATA IO_DIR FC_1_:IN @@ -170,7 +173,7 @@ DATA IO_DIR IPL_0_:IN DATA IO_DIR IPL_1_:IN DATA IO_DIR IPL_2_:IN DATA IO_DIR LDS_000:BI -DATA IO_DIR RESET:OUT +DATA IO_DIR RESET:IN DATA IO_DIR RST:IN DATA IO_DIR RW:BI DATA IO_DIR RW_000:BI @@ -183,8 +186,16 @@ DATA IO_DIR nEXP_SPACE:IN DATA GLB_CLOCK CLK_OSZI DATA PW_LEVEL AHIGH_31_:1 DATA SLEW AHIGH_31_:0 +DATA PW_LEVEL IPL_1_:1 +DATA SLEW IPL_1_:1 +DATA PW_LEVEL IPL_0_:1 +DATA SLEW IPL_0_:1 DATA PW_LEVEL A_DECODE_23_:1 DATA SLEW A_DECODE_23_:1 +DATA PW_LEVEL FC_0_:1 +DATA SLEW FC_0_:1 +DATA PW_LEVEL A_1_:1 +DATA SLEW A_1_:1 DATA PW_LEVEL IPL_2_:1 DATA SLEW IPL_2_:1 DATA PW_LEVEL FC_1_:1 @@ -204,107 +215,99 @@ DATA PW_LEVEL BERR:1 DATA SLEW BERR:0 DATA PW_LEVEL BG_030:1 DATA SLEW BG_030:1 -DATA PW_LEVEL AHIGH_30_:1 -DATA SLEW AHIGH_30_:0 DATA PW_LEVEL BGACK_000:1 DATA SLEW BGACK_000:1 -DATA PW_LEVEL AHIGH_29_:1 -DATA SLEW AHIGH_29_:0 DATA SLEW CLK_030:1 -DATA PW_LEVEL AHIGH_28_:1 -DATA SLEW AHIGH_28_:0 DATA SLEW CLK_000:1 -DATA PW_LEVEL AHIGH_27_:1 -DATA SLEW AHIGH_27_:0 DATA SLEW CLK_OSZI:1 -DATA PW_LEVEL AHIGH_26_:1 -DATA SLEW AHIGH_26_:0 DATA PW_LEVEL CLK_DIV_OUT:1 DATA SLEW CLK_DIV_OUT:0 -DATA PW_LEVEL AHIGH_25_:1 -DATA SLEW AHIGH_25_:0 -DATA PW_LEVEL AHIGH_24_:1 -DATA SLEW AHIGH_24_:0 +DATA PW_LEVEL CLK_EXP:1 +DATA SLEW CLK_EXP:0 DATA PW_LEVEL FPU_CS:1 DATA SLEW FPU_CS:0 -DATA PW_LEVEL A_DECODE_22_:1 -DATA SLEW A_DECODE_22_:1 DATA PW_LEVEL FPU_SENSE:1 DATA SLEW FPU_SENSE:1 -DATA PW_LEVEL A_DECODE_21_:1 -DATA SLEW A_DECODE_21_:1 DATA PW_LEVEL DSACK1:1 DATA SLEW DSACK1:0 -DATA PW_LEVEL A_DECODE_20_:1 -DATA SLEW A_DECODE_20_:1 DATA PW_LEVEL DTACK:1 DATA SLEW DTACK:1 -DATA PW_LEVEL A_DECODE_19_:1 -DATA SLEW A_DECODE_19_:1 DATA PW_LEVEL AVEC:1 DATA SLEW AVEC:0 -DATA PW_LEVEL A_DECODE_18_:1 -DATA SLEW A_DECODE_18_:1 DATA PW_LEVEL E:1 DATA SLEW E:0 -DATA PW_LEVEL A_DECODE_17_:1 -DATA SLEW A_DECODE_17_:1 +DATA PW_LEVEL AHIGH_30_:1 +DATA SLEW AHIGH_30_:0 DATA SLEW VPA:1 -DATA PW_LEVEL A_DECODE_16_:1 -DATA SLEW A_DECODE_16_:1 +DATA PW_LEVEL AHIGH_29_:1 +DATA SLEW AHIGH_29_:0 +DATA PW_LEVEL AHIGH_28_:1 +DATA SLEW AHIGH_28_:0 DATA SLEW RST:1 +DATA PW_LEVEL AHIGH_27_:1 +DATA SLEW AHIGH_27_:0 DATA PW_LEVEL RESET:1 DATA SLEW RESET:0 +DATA PW_LEVEL AHIGH_26_:1 +DATA SLEW AHIGH_26_:0 +DATA PW_LEVEL AHIGH_25_:1 +DATA SLEW AHIGH_25_:0 DATA PW_LEVEL AMIGA_ADDR_ENABLE:1 DATA SLEW AMIGA_ADDR_ENABLE:0 +DATA PW_LEVEL AHIGH_24_:1 +DATA SLEW AHIGH_24_:0 DATA PW_LEVEL AMIGA_BUS_DATA_DIR:1 DATA SLEW AMIGA_BUS_DATA_DIR:0 +DATA PW_LEVEL A_DECODE_22_:1 +DATA SLEW A_DECODE_22_:1 DATA PW_LEVEL AMIGA_BUS_ENABLE_LOW:1 DATA SLEW AMIGA_BUS_ENABLE_LOW:0 +DATA PW_LEVEL A_DECODE_21_:1 +DATA SLEW A_DECODE_21_:1 DATA PW_LEVEL AMIGA_BUS_ENABLE_HIGH:1 DATA SLEW AMIGA_BUS_ENABLE_HIGH:0 +DATA PW_LEVEL A_DECODE_20_:1 +DATA SLEW A_DECODE_20_:1 DATA PW_LEVEL CIIN:1 DATA SLEW CIIN:0 -DATA PW_LEVEL IPL_1_:1 -DATA SLEW IPL_1_:1 -DATA PW_LEVEL IPL_0_:1 -DATA SLEW IPL_0_:1 -DATA PW_LEVEL FC_0_:1 -DATA SLEW FC_0_:1 -DATA PW_LEVEL A_1_:1 -DATA SLEW A_1_:1 +DATA PW_LEVEL A_DECODE_19_:1 +DATA SLEW A_DECODE_19_:1 +DATA PW_LEVEL A_DECODE_18_:1 +DATA SLEW A_DECODE_18_:1 +DATA PW_LEVEL A_DECODE_17_:1 +DATA SLEW A_DECODE_17_:1 +DATA PW_LEVEL A_DECODE_16_:1 +DATA SLEW A_DECODE_16_:1 +DATA PW_LEVEL A_0_:1 +DATA SLEW A_0_:0 DATA PW_LEVEL SIZE_1_:1 DATA SLEW SIZE_1_:0 +DATA PW_LEVEL IPL_030_1_:1 +DATA SLEW IPL_030_1_:0 +DATA PW_LEVEL IPL_030_0_:1 +DATA SLEW IPL_030_0_:0 DATA PW_LEVEL IPL_030_2_:1 DATA SLEW IPL_030_2_:0 DATA PW_LEVEL RW_000:1 DATA SLEW RW_000:0 DATA PW_LEVEL BG_000:1 DATA SLEW BG_000:0 -DATA PW_LEVEL SIZE_0_:1 -DATA SLEW SIZE_0_:0 DATA PW_LEVEL BGACK_030:1 DATA SLEW BGACK_030:0 -DATA PW_LEVEL CLK_EXP:1 -DATA SLEW CLK_EXP:0 +DATA PW_LEVEL SIZE_0_:1 +DATA SLEW SIZE_0_:0 DATA PW_LEVEL VMA:1 DATA SLEW VMA:0 DATA PW_LEVEL RW:1 DATA SLEW RW:0 -DATA PW_LEVEL A_0_:1 -DATA SLEW A_0_:0 -DATA PW_LEVEL IPL_030_1_:1 -DATA SLEW IPL_030_1_:0 -DATA PW_LEVEL IPL_030_0_:1 -DATA SLEW IPL_030_0_:0 +DATA PW_LEVEL cpu_est_1_:1 +DATA SLEW cpu_est_1_:1 DATA PW_LEVEL cpu_est_2_:1 DATA SLEW cpu_est_2_:1 DATA PW_LEVEL cpu_est_3_:1 DATA SLEW cpu_est_3_:1 DATA PW_LEVEL cpu_est_0_:1 DATA SLEW cpu_est_0_:1 -DATA PW_LEVEL cpu_est_1_:1 -DATA SLEW cpu_est_1_:1 DATA PW_LEVEL inst_AMIGA_BUS_ENABLE_DMA_HIGH:1 DATA SLEW inst_AMIGA_BUS_ENABLE_DMA_HIGH:1 DATA PW_LEVEL inst_AMIGA_BUS_ENABLE_DMA_LOW:1 @@ -319,10 +322,6 @@ DATA PW_LEVEL inst_AS_000_DMA:1 DATA SLEW inst_AS_000_DMA:1 DATA PW_LEVEL inst_DS_000_DMA:1 DATA SLEW inst_DS_000_DMA:1 -DATA PW_LEVEL CYCLE_DMA_0_:1 -DATA SLEW CYCLE_DMA_0_:1 -DATA PW_LEVEL CYCLE_DMA_1_:1 -DATA SLEW CYCLE_DMA_1_:1 DATA PW_LEVEL inst_VPA_D:1 DATA SLEW inst_VPA_D:1 DATA PW_LEVEL CLK_000_D_3_:1 @@ -331,6 +330,10 @@ DATA PW_LEVEL inst_DTACK_D0:1 DATA SLEW inst_DTACK_D0:1 DATA PW_LEVEL inst_RESET_OUT:1 DATA SLEW inst_RESET_OUT:1 +DATA PW_LEVEL CLK_030_PE_1_:1 +DATA SLEW CLK_030_PE_1_:1 +DATA PW_LEVEL inst_AMIGA_DS:1 +DATA SLEW inst_AMIGA_DS:1 DATA PW_LEVEL CLK_000_D_1_:1 DATA SLEW CLK_000_D_1_:1 DATA PW_LEVEL CLK_000_D_0_:1 @@ -363,14 +366,18 @@ DATA PW_LEVEL SM_AMIGA_1_:1 DATA SLEW SM_AMIGA_1_:1 DATA PW_LEVEL SM_AMIGA_0_:1 DATA SLEW SM_AMIGA_0_:1 +DATA PW_LEVEL CYCLE_DMA_0_:1 +DATA SLEW CYCLE_DMA_0_:1 +DATA PW_LEVEL CYCLE_DMA_1_:1 +DATA SLEW CYCLE_DMA_1_:1 +DATA PW_LEVEL CLK_030_PE_0_:1 +DATA SLEW CLK_030_PE_0_:1 DATA PW_LEVEL RST_DLY_0_:1 DATA SLEW RST_DLY_0_:1 DATA PW_LEVEL RST_DLY_1_:1 DATA SLEW RST_DLY_1_:1 DATA PW_LEVEL RST_DLY_2_:1 DATA SLEW RST_DLY_2_:1 -DATA PW_LEVEL inst_CLK_030_H:1 -DATA SLEW inst_CLK_030_H:1 DATA PW_LEVEL inst_DSACK1_INT:1 DATA SLEW inst_DSACK1_INT:1 DATA PW_LEVEL inst_AS_000_INT:1 @@ -383,17 +390,19 @@ DATA PW_LEVEL SM_AMIGA_2_:1 DATA SLEW SM_AMIGA_2_:1 DATA PW_LEVEL SM_AMIGA_i_7_:1 DATA SLEW SM_AMIGA_i_7_:1 +DATA PW_LEVEL CLK_OUT_INTreg:1 +DATA SLEW CLK_OUT_INTreg:1 DATA PW_LEVEL CIIN_0:1 DATA SLEW CIIN_0:1 +DATA PW_LEVEL RN_A_0_:1 DATA PW_LEVEL RN_SIZE_1_:1 +DATA PW_LEVEL RN_IPL_030_1_:1 +DATA PW_LEVEL RN_IPL_030_0_:1 DATA PW_LEVEL RN_IPL_030_2_:1 DATA PW_LEVEL RN_RW_000:1 DATA PW_LEVEL RN_BG_000:1 -DATA PW_LEVEL RN_SIZE_0_:1 DATA PW_LEVEL RN_BGACK_030:1 +DATA PW_LEVEL RN_SIZE_0_:1 DATA PW_LEVEL RN_VMA:1 DATA PW_LEVEL RN_RW:1 -DATA PW_LEVEL RN_A_0_:1 -DATA PW_LEVEL RN_IPL_030_1_:1 -DATA PW_LEVEL RN_IPL_030_0_:1 END diff --git a/Logic/68030_tk.grp b/Logic/68030_tk.grp index 5f92eba..6fb8d15 100644 --- a/Logic/68030_tk.grp +++ b/Logic/68030_tk.grp @@ -1,23 +1,24 @@ -GROUP MACH_SEG_A DS_030 AVEC SM_AMIGA_2_ inst_DS_000_DMA inst_CLK_030_H - inst_AS_000_DMA CYCLE_DMA_1_ CYCLE_DMA_0_ cpu_est_2_ cpu_est_1_ inst_VPA_D - +GROUP MACH_SEG_A DS_030 AVEC inst_DS_000_DMA CLK_030_PE_1_ CLK_030_PE_0_ + inst_AS_000_DMA CYCLE_DMA_0_ CYCLE_DMA_1_ inst_DSACK1_INT SM_AMIGA_4_ + SM_AMIGA_0_ GROUP MACH_SEG_B IPL_030_1_ RN_IPL_030_1_ IPL_030_0_ RN_IPL_030_0_ IPL_030_2_ - RN_IPL_030_2_ AHIGH_31_ AHIGH_30_ AHIGH_29_ CLK_EXP RESET inst_DS_000_ENABLE - inst_DTACK_D0 IPL_D0_2_ CLK_000_D_4_ + RN_IPL_030_2_ AHIGH_31_ AHIGH_30_ AHIGH_29_ CLK_EXP inst_AS_030_000_SYNC + inst_DTACK_D0 IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ GROUP MACH_SEG_C AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AMIGA_BUS_ENABLE_LOW - SM_AMIGA_i_7_ SM_AMIGA_6_ inst_AS_000_INT inst_AMIGA_BUS_ENABLE_DMA_HIGH - SM_AMIGA_5_ CLK_000_D_0_ + SM_AMIGA_2_ SM_AMIGA_3_ inst_DS_000_ENABLE inst_AS_000_INT inst_AMIGA_DS + CLK_000_D_4_ GROUP MACH_SEG_D VMA RN_VMA BG_000 RN_BG_000 AMIGA_BUS_ENABLE_HIGH LDS_000 - UDS_000 AMIGA_ADDR_ENABLE SM_AMIGA_3_ cpu_est_3_ SM_AMIGA_4_ IPL_D0_1_ - CLK_000_D_3_ inst_CLK_OUT_PRE_D -GROUP MACH_SEG_E CIIN BERR AMIGA_BUS_DATA_DIR AS_000 CIIN_0 inst_AS_030_D0 - inst_BGACK_030_INT_D -GROUP MACH_SEG_F inst_AS_030_000_SYNC inst_LDS_000_INT inst_AMIGA_BUS_ENABLE_DMA_LOW - SM_AMIGA_1_ inst_UDS_000_INT + UDS_000 DTACK AMIGA_ADDR_ENABLE cpu_est_3_ cpu_est_1_ cpu_est_2_ + CLK_000_D_0_ CLK_OUT_INTreg +GROUP MACH_SEG_E CIIN BERR AMIGA_BUS_DATA_DIR AS_000 CIIN_0 inst_CLK_OUT_PRE_D + +GROUP MACH_SEG_F SM_AMIGA_i_7_ SM_AMIGA_6_ inst_LDS_000_INT inst_AMIGA_BUS_ENABLE_DMA_HIGH + inst_AMIGA_BUS_ENABLE_DMA_LOW SM_AMIGA_1_ inst_UDS_000_INT inst_VPA_D + CLK_000_D_3_ GROUP MACH_SEG_G SIZE_0_ RN_SIZE_0_ A_0_ RN_A_0_ RW RN_RW E CLK_DIV_OUT - inst_RESET_OUT RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ cpu_est_0_ IPL_D0_0_ + inst_RESET_OUT RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ SM_AMIGA_5_ cpu_est_0_ inst_CLK_OUT_PRE_50 GROUP MACH_SEG_H RW_000 RN_RW_000 FPU_CS SIZE_1_ RN_SIZE_1_ BGACK_030 RN_BGACK_030 - AS_030 DSACK1 inst_DSACK1_INT SM_AMIGA_0_ CLK_000_D_2_ CLK_000_D_1_ + AS_030 DSACK1 inst_AS_030_D0 inst_BGACK_030_INT_D CLK_000_D_2_ CLK_000_D_1_ \ No newline at end of file diff --git a/Logic/68030_tk.ipr b/Logic/68030_tk.ipr index c4301ee..d075273 100644 --- a/Logic/68030_tk.ipr +++ b/Logic/68030_tk.ipr @@ -1 +1 @@ -5970501@qV_IP \ No newline at end of file +64;0=1?P_reM=E> \ No newline at end of file diff --git a/Logic/68030_tk.jed b/Logic/68030_tk.jed index b8c852a..0c900f7 100644 --- a/Logic/68030_tk.jed +++ b/Logic/68030_tk.jed @@ -10,7 +10,7 @@ AUTHOR: PATTERN: COMPANY: REVISION: -DATE: Wed Oct 26 22:26:30 2016 +DATE: Fri Nov 18 19:32:41 2016 ABEL mach447a * @@ -31,74 +31,75 @@ NOTE Spread Placement? Y * NOTE Run Time Upper Bound in 15 minutes 0 * NOTE Zero Hold Time For Input Registers? Y * NOTE Table of pin names and numbers* -NOTE PINS AHIGH_31_:4 A_DECODE_23_:85 IPL_2_:68 FC_1_:58* -NOTE PINS AS_030:82 AS_000:42 DS_030:98 UDS_000:32 LDS_000:31* -NOTE PINS nEXP_SPACE:14 BERR:41 BG_030:21 AHIGH_30_:5 BGACK_000:28* -NOTE PINS AHIGH_29_:6 CLK_030:64 AHIGH_28_:15 CLK_000:11* -NOTE PINS AHIGH_27_:16 CLK_OSZI:61 AHIGH_26_:17 CLK_DIV_OUT:65* -NOTE PINS AHIGH_25_:18 AHIGH_24_:19 FPU_CS:78 A_DECODE_22_:84* -NOTE PINS FPU_SENSE:91 A_DECODE_21_:94 DSACK1:81 A_DECODE_20_:93* -NOTE PINS DTACK:30 A_DECODE_19_:97 AVEC:92 A_DECODE_18_:95* -NOTE PINS E:66 A_DECODE_17_:59 VPA:36 A_DECODE_16_:96 RST:86* -NOTE PINS RESET:3 AMIGA_ADDR_ENABLE:33 AMIGA_BUS_DATA_DIR:48* -NOTE PINS AMIGA_BUS_ENABLE_LOW:20 AMIGA_BUS_ENABLE_HIGH:34* -NOTE PINS CIIN:47 IPL_1_:56 IPL_0_:67 FC_0_:57 A_1_:60 SIZE_1_:79* -NOTE PINS IPL_030_2_:9 RW_000:80 BG_000:29 SIZE_0_:70 BGACK_030:83* -NOTE PINS CLK_EXP:10 VMA:35 RW:71 A_0_:69 IPL_030_1_:7 IPL_030_0_:8* +NOTE PINS AHIGH_31_:4 IPL_1_:56 IPL_0_:67 A_DECODE_23_:85* +NOTE PINS FC_0_:57 A_1_:60 IPL_2_:68 FC_1_:58 AS_030:82 AS_000:42* +NOTE PINS DS_030:98 UDS_000:32 LDS_000:31 nEXP_SPACE:14 BERR:41* +NOTE PINS BG_030:21 BGACK_000:28 CLK_030:64 CLK_000:11 CLK_OSZI:61* +NOTE PINS CLK_DIV_OUT:65 CLK_EXP:10 FPU_CS:78 FPU_SENSE:91* +NOTE PINS DSACK1:81 DTACK:30 AVEC:92 E:66 AHIGH_30_:5 VPA:36* +NOTE PINS AHIGH_29_:6 AHIGH_28_:15 RST:86 AHIGH_27_:16 RESET:3* +NOTE PINS AHIGH_26_:17 AHIGH_25_:18 AMIGA_ADDR_ENABLE:33* +NOTE PINS AHIGH_24_:19 AMIGA_BUS_DATA_DIR:48 A_DECODE_22_:84* +NOTE PINS AMIGA_BUS_ENABLE_LOW:20 A_DECODE_21_:94 AMIGA_BUS_ENABLE_HIGH:34* +NOTE PINS A_DECODE_20_:93 CIIN:47 A_DECODE_19_:97 A_DECODE_18_:95* +NOTE PINS A_DECODE_17_:59 A_DECODE_16_:96 A_0_:69 SIZE_1_:79* +NOTE PINS IPL_030_1_:7 IPL_030_0_:8 IPL_030_2_:9 RW_000:80* +NOTE PINS BG_000:29 BGACK_030:83 SIZE_0_:70 VMA:35 RW:71* NOTE Table of node names and numbers* NOTE NODES RN_AHIGH_31_:143 RN_AS_030:281 RN_AS_000:203 * -NOTE NODES RN_UDS_000:185 RN_LDS_000:191 RN_BERR:197 RN_AHIGH_30_:125 * -NOTE NODES RN_AHIGH_29_:137 RN_AHIGH_28_:149 RN_AHIGH_27_:157 * -NOTE NODES RN_AHIGH_26_:155 RN_AHIGH_25_:167 RN_AHIGH_24_:161 * -NOTE NODES RN_SIZE_1_:287 RN_IPL_030_2_:131 RN_RW_000:269 * -NOTE NODES RN_BG_000:175 RN_SIZE_0_:263 RN_BGACK_030:275 * -NOTE NODES RN_VMA:173 RN_RW:245 RN_A_0_:257 RN_IPL_030_1_:139 * -NOTE NODES RN_IPL_030_0_:133 cpu_est_2_:119 cpu_est_3_:187 * -NOTE NODES cpu_est_0_:259 cpu_est_1_:113 inst_AMIGA_BUS_ENABLE_DMA_HIGH:170 * -NOTE NODES inst_AMIGA_BUS_ENABLE_DMA_LOW:223 inst_AS_030_D0:205 * -NOTE NODES inst_AS_030_000_SYNC:221 inst_BGACK_030_INT_D:209 * -NOTE NODES inst_AS_000_DMA:103 inst_DS_000_DMA:121 CYCLE_DMA_0_:116 * -NOTE NODES CYCLE_DMA_1_:110 inst_VPA_D:115 CLK_000_D_3_:188 * -NOTE NODES inst_DTACK_D0:134 inst_RESET_OUT:253 CLK_000_D_1_:277 * -NOTE NODES CLK_000_D_0_:163 inst_CLK_OUT_PRE_50:265 inst_CLK_OUT_PRE_D:182 * -NOTE NODES IPL_D0_0_:266 IPL_D0_1_:194 IPL_D0_2_:146 CLK_000_D_2_:278 * -NOTE NODES CLK_000_D_4_:140 inst_LDS_000_INT:233 inst_DS_000_ENABLE:145 * -NOTE NODES inst_UDS_000_INT:239 SM_AMIGA_6_:169 SM_AMIGA_4_:176 * -NOTE NODES SM_AMIGA_1_:227 SM_AMIGA_0_:289 RST_DLY_0_:248 * -NOTE NODES RST_DLY_1_:260 RST_DLY_2_:254 inst_CLK_030_H:104 * -NOTE NODES inst_DSACK1_INT:272 inst_AS_000_INT:164 SM_AMIGA_5_:158 * -NOTE NODES SM_AMIGA_3_:193 SM_AMIGA_2_:109 SM_AMIGA_i_7_:152 * -NOTE NODES CIIN_0:211 * +NOTE NODES RN_UDS_000:185 RN_LDS_000:191 RN_BERR:197 RN_DTACK:173 * +NOTE NODES RN_AHIGH_30_:125 RN_AHIGH_29_:137 RN_AHIGH_28_:149 * +NOTE NODES RN_AHIGH_27_:157 RN_AHIGH_26_:155 RN_AHIGH_25_:167 * +NOTE NODES RN_AHIGH_24_:161 RN_A_0_:257 RN_SIZE_1_:287 RN_IPL_030_1_:139 * +NOTE NODES RN_IPL_030_0_:133 RN_IPL_030_2_:131 RN_RW_000:269 * +NOTE NODES RN_BG_000:175 RN_BGACK_030:275 RN_SIZE_0_:263 * +NOTE NODES RN_VMA:179 RN_RW:245 cpu_est_1_:182 cpu_est_2_:194 * +NOTE NODES cpu_est_3_:176 cpu_est_0_:259 inst_AMIGA_BUS_ENABLE_DMA_HIGH:235 * +NOTE NODES inst_AMIGA_BUS_ENABLE_DMA_LOW:229 inst_AS_030_D0:272 * +NOTE NODES inst_AS_030_000_SYNC:145 inst_BGACK_030_INT_D:289 * +NOTE NODES inst_AS_000_DMA:113 inst_DS_000_DMA:121 inst_VPA_D:224 * +NOTE NODES CLK_000_D_3_:241 inst_DTACK_D0:146 inst_RESET_OUT:253 * +NOTE NODES CLK_030_PE_1_:104 inst_AMIGA_DS:164 CLK_000_D_1_:277 * +NOTE NODES CLK_000_D_0_:193 inst_CLK_OUT_PRE_50:248 inst_CLK_OUT_PRE_D:209 * +NOTE NODES IPL_D0_0_:140 IPL_D0_1_:134 IPL_D0_2_:128 CLK_000_D_2_:278 * +NOTE NODES CLK_000_D_4_:170 inst_LDS_000_INT:239 inst_DS_000_ENABLE:169 * +NOTE NODES inst_UDS_000_INT:223 SM_AMIGA_6_:221 SM_AMIGA_4_:103 * +NOTE NODES SM_AMIGA_1_:233 SM_AMIGA_0_:119 CYCLE_DMA_0_:110 * +NOTE NODES CYCLE_DMA_1_:116 CLK_030_PE_0_:115 RST_DLY_0_:254 * +NOTE NODES RST_DLY_1_:266 RST_DLY_2_:260 inst_DSACK1_INT:109 * +NOTE NODES inst_AS_000_INT:152 SM_AMIGA_5_:265 SM_AMIGA_3_:158 * +NOTE NODES SM_AMIGA_2_:163 SM_AMIGA_i_7_:227 CLK_OUT_INTreg:188 * +NOTE NODES CIIN_0:205 * NOTE BLOCK 0 * L000000 - 111111111011111111111111111111111111111111111111111111111111111111 - 111111111101111111111111101111111111111111111101111111111111111111 - 111111111111111111111101111111111111111111111111111111111111111111 + 111111111011111111111111101111111111111111111111111111111111111111 + 111111111101111101111111111111111111111111111111111111111111111111 + 111111111111111111111111111111111111111110111111111111111111111111 111111111111111111111111111111111111111111111111111111111111111110 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111111111111101111111111111011111010111111111111111 - 111101011111100111111111111111011111111111111111111111011111111111 - 111111111111111101111111111011111111011110111111111111111111111111 - 100111111111111111010111111111111010111111110111111111111111111111* + 110111111111111111111111111101011111111111111111110111111111011111 + 111101011111101111110111111111111011111111111111111111111111111111 + 111111111111111111111111111011111111011011111110111111111111111111 + 101111111111111111011111111111111111111111110111111110111111111111* L000594 000000000000000000000000000000000000000000000000000000000000000000* -L000660 111111111111111111111111111111111011111111111111111011111111111111* -L000726 101111111111111111111111111111111111111111111111111111111111111111* -L000792 111111111111111111111111111111111111111101111111111111111111111111* -L000858 111111111011111111011111111111111111111111111111111111111111111111* -L000924 111111111111111111111111111101011111111111111111111111111111111111* -L000990 111111111111111111111111111110101111111111111111111111111111111111* -L001056 111111111111111111111111111111110111111111111111111111111111111111* -L001122 111111111111111101111111111111111111111111111111111111011111111111* +L000660 111111111111111111111111111111111111111111111111111010111111111111* +L000726 000000000000000000000000000000000000000000000000000000000000000000* +L000792 000000000000000000000000000000000000000000000000000000000000000000* +L000858 000000000000000000000000000000000000000000000000000000000000000000* +L000924 000000000000000000000000000000000000000000000000000000000000000000* +L000990 011111111111111111011111110111111111111111111111111111111111111111* +L001056 011011111111111111011111111111111111111111111111111111111111111111* +L001122 011011111111111111111111010111111111111111111111111111111111111111* L001188 000000000000000000000000000000000000000000000000000000000000000000* L001254 000000000000000000000000000000000000000000000000000000000000000000* L001320 111111111111111111111111111111111111111111111111111111111111111111* -L001386 011111111011111110101111111110011011111110111111111111111111111111* -L001452 011111111011111110101111111101101011111110111111111111111111111111* -L001518 011111111111111110111111111110011011111110110111111111111111111111* -L001584 011111111111111110111111111101101011111110110111111111111111111111* -L001650 011111111011111111101111111110011011111110111111111111101111111111* +L001386 011111111111111110111011111101111111111111110111111110111111111111* +L001452 011111111111111110110111111110111111111111110111111110111111111111* +L001518 011101101111111110111011111101110111111111111111111110111111101111* +L001584 011101101111111110110111111110110111111111111111111110111111101111* +L001650 011111111111011110111111111101111111111111110111111110111111111111* L001716 111111111111111111111111111111111111111111111111111111111111111111* L001782 111111111111111111111111111111111111111111111111111111111111111111* L001848 111111111111111111111111111111111111111111111111111111111111111111* @@ -107,69 +108,69 @@ L001980 111111111111111111111111111111111111111111111111111111111111111111* L002046 000000000000000000000000000000000000000000000000000000000000000000* L002112 111111111111111111111111111111111111111111111111111111111111111111* -L002178 011111111011111111101111111101101011111110111111111111101111111111* -L002244 011111111111111111111111111110011011111110110111111111101111111111* -L002310 011111111111111111111111111101101011111110110111111111101111111111* +L002178 011101101111011110111111111101110111111111111111111110111111101111* +L002244 000000000000000000000000000000000000000000000000000000000000000000* +L002310 000000000000000000000000000000000000000000000000000000000000000000* L002376 000000000000000000000000000000000000000000000000000000000000000000* -L002442 011010101111110111111111100111111111111111011110101111111111111111* -L002508 011101111111111111111110110111111111111111011110111111111111111111* -L002574 011111111111111111111111110111111111011111111111111111111111111111* -L002640 011111111111111111111111111111111111011111111110111111111111111111* -L002706 011111111111111111111111110111111110111111011110111111111111111111* +L002442 011011111111111111111111110111111111111101111111111111111111111111* +L002508 011111111111111111111111111111111111101011111111111111111111111111* +L002574 000000000000000000000000000000000000000000000000000000000000000000* +L002640 000000000000000000000000000000000000000000000000000000000000000000* +L002706 000000000000000000000000000000000000000000000000000000000000000000* L002772 000000000000000000000000000000000000000000000000000000000000000000* -L002838 011111111111111111111111111110011011111110111111111111111111111111* -L002904 011111111111111111111111110111011011111110111111111111111111111111* -L002970 011111111111111111111111111001101011111110111101111111111111111111* -L003036 011111111111111111111111111111011011111110111110111111111111111111* +L002838 011111111111111111110111111011111111111111111110111110111111111111* +L002904 010111111111111111110111111111111111111111111110111110111111111111* +L002970 011011111111111111111011110111111111111111111110111110111111111111* +L003036 011111111111111111110111111101111111111111111110111110111111111111* L003102 000000000000000000000000000000000000000000000000000000000000000000* -L003168 111111111111111111111111111111111111111111111111111111111111111111* -L003234 111111111111111111111111111111111111111111111111111111111111111111* -L003300 111111111111111111111111111111111111111111111111111111111111111111* -L003366 111111111111111111111111111111111111111111111111111111111111111111* -L003432 111111111111111111111111111111111111111111111111111111111111111111* +L003168 101111111111111111111111111111111111111111111111111111111111111111* +L003234 111111111111111101111111111111111111111111111111111111111111111111* +L003300 111111111111111111111011111110111111111111111111111111111111111111* +L003366 111111011111111111111111111111110111111111111111111111111111101111* +L003432 111111111111111111111111111111111111111111111111111101111111111111* L003498 000000000000000000000000000000000000000000000000000000000000000000* -L003564 111111111111111111111111111111111111111111111111111111111111111111* -L003630 111111111111111111111111111111111111111111111111111111111111111111* -L003696 111111111111111111111111111111111111111111111111111111111111111111* -L003762 111111111111111111111111111111111111111111111111111111111111111111* -L003828 111111111111111111111111111111111111111111111111111111111111111111* -L003894 011111111111111111111011111111111111111111111111111111111111111111* -L003960 111111011111111111111111101111111111111111111111111111111111111111* -L004026 111111011111111111111111111011111111111111111111111111111111111111* -L004092 111111011111111111111111111111111111111111111101111111111111111111* -L004158 111111101111111011111111010111111111111111111110111111111111111111* +L003564 111111111111101111110111111101111111111111111111111111111111111111* +L003630 000000000000000000000000000000000000000000000000000000000000000000* +L003696 000000000000000000000000000000000000000000000000000000000000000000* +L003762 000000000000000000000000000000000000000000000000000000000000000000* +L003828 000000000000000000000000000000000000000000000000000000000000000000* +L003894 101111111111111111111111111111111111111111111111111111111111111111* +L003960 111111111111111101111111111111111111111111111111111111111111111111* +L004026 111111111111111111111011111110111111111111111111111111111111111111* +L004092 111111111111111111111111111111111111111111111111111101111111111111* +L004158 111111111111101111110111111101111111111111111111111111111111111111* L004224 000000000000000000000000000000000000000000000000000000000000000000* -L004290 011111111111111111111111110101111011111110111111111111111111111111* -L004356 011111111111111111111111111010111011111110111101111111111111111111* -L004422 011111111111111111111111111101111011111110111110111111111111111111* +L004290 011011111111111111110111110111111111111111111110111110111111111111* +L004356 011111111111111111111111111101111111111111111110111110111111111111* +L004422 000000000000000000000000000000000000000000000000000000000000000000* L004488 000000000000000000000000000000000000000000000000000000000000000000* L004554 000000000000000000000000000000000000000000000000000000000000000000* -L004620 111111111111111111111111111111111111111111111111111111111111111111* -L004686 111111111111111111111111111111111111111111111111111111111111111111* -L004752 111111111111111111111111111111111111111111111111111111111111111111* -L004818 111111111111111111111111111111111111111111111111111111111111111111* -L004884 111111111111111111111111111111111111111111111111111111111111111111* +L004620 111110011111111111111111111111111111111111111111111111111111111111* +L004686 111110111111111111111111111111111011111111111111111111111111111111* +L004752 111110111111111111111111111111111111111111111111111111111111011111* +L004818 111101101111111111111111111111110111111111111011111111111111101111* +L004884 000000000000000000000000000000000000000000000000000000000000000000* L004950 000000000000000000000000000000000000000000000000000000000000000000* -L005016 111111011111111111111111010111111111111111111110111111111111111111* -L005082 111111111111111111111111111111111111111111111111011111111111111111* -L005148 000000000000000000000000000000000000000000000000000000000000000000* +L005016 011011111111111111111111110111111111111101111111111111111111111111* +L005082 011111111111111111111111110111011111111111111111111111111111111111* +L005148 011011111111111111111111111111011111111111111111111111111111111111* L005214 000000000000000000000000000000000000000000000000000000000000000000* L005280 000000000000000000000000000000000000000000000000000000000000000000* L005346 101111111111111111111111111111111111111111111111111111111111111111* -L005412 111111111111111111111111111111111111111101111111111111111111111111* -L005478 111111111111111111111111111101011111111111111111111111111111111111* -L005544 111111111111111111111111111110101111111111111111111111111111111111* -L005610 111111111111111111111111111111110111111111111111111111111111111111* +L005412 111111111111111101111111111111111111111111111111111111111111111111* +L005478 111111111111111111111011111110111111111111111111111111111111111111* +L005544 111111111111111111111111111111111111111111111111111101111111111111* +L005610 111111111111101111110111111101111111111111111111111111111111111111* L005676 - 111111111110111111111111111111111111111110111111111111111111111101* -L005742 111111111111111101111111111111111111111111111111111111011111111111* + 111111111110111111111111111111111111111111111110111111111111111101* +L005742 111111111111011111111111111111110111111111111111110111111111101111* L005808 111111111011101111111111111111111111111111111111110111111111111111* -L005874 111111110111101111011111111111111111111111110111111111111111111111* -L005940 111111111111101111111111111111111111111111111011110111111111111111* +L005874 111111111111101111111111111111111111111111110111110111111111111111* +L005940 111110111111101111111111111111111111111111111111110111111111111111* L006006 000000000000000000000000000000000000000000000000000000000000000000* L006072 111111111111111111111111111111111111111111111111111111111111111111* L006138 111111111111111111111111111111111111111111111111111111111111111111* @@ -180,33 +181,33 @@ L006402 000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000* L006534 0010* -L006538 01010011111000* +L006538 01100011111000* L006552 10100110010011* L006566 10100110010101* L006580 11101011111111* L006594 00000011111000* -L006608 10100110010010* +L006608 11100110010010* L006622 10100110010001* -L006636 11101011110011* -L006650 10110110010000* -L006664 01110110010011* +L006636 11011011110011* +L006650 10100110010000* +L006664 11100110010011* L006678 10100110010001* -L006692 11100011110011* -L006706 00100110010000* +L006692 11000011110011* +L006706 10100110010000* L006720 10100110010010* L006734 11111011110101* L006748 11111111111111* NOTE BLOCK 1 * L006762 - 111111111111111111110110111111111111111101111111111111111111011111 - 111111111101011110111111111111111111111111111101111111111111111111 - 111111111111111111111111111111111111111111101011111111111111110111 - 111111101111111111111111111111111011111111111111111111011111111111 - 111111111111111111111111111111111101111111111111111111111111111111 - 111101111111111111111111111111111111111111111111111111111111111111 - 111111111111111111011111111111111111111111111111111111111111111111 - 101111110111111111111111111011111111111011111111111111111111111111 - 111111111111111111111111111111111111111111111111101111110111111111* + 111101111111111111110111111111111111111111111111111111111111111111 + 111111111101011111111111111111111111111111111111011111111111111111 + 111111101111111111111111111111111110111111111001111111110111111111 + 111011111111111110111111111111111011011111111111111111011110111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111111011111111011111111111111101111111111111111111111111 + 111111110111111111011101111111111111111111111111111111111111111111 + 101111111111111111111111111111111111111011111111111111111111111111 + 111111111111111111111111111110111111111111101111111111111111111111* L007356 111111111111111111111111111111111111111111111111111111111111111111* L007422 000000000000000000000000000000000000000000000000000000000000000000* @@ -214,90 +215,90 @@ L007488 000000000000000000000000000000000000000000000000000000000000000000* L007554 000000000000000000000000000000000000000000000000000000000000000000* L007620 000000000000000000000000000000000000000000000000000000000000000000* L007686 000000000000000000000000000000000000000000000000000000000000000000* -L007752 111111110111111111111111111111111111111111111111111111111111111111* +L007752 111111111111111111111111111111111111111101111111111111111111111111* L007818 000000000000000000000000000000000000000000000000000000000000000000* L007884 000000000000000000000000000000000000000000000000000000000000000000* L007950 000000000000000000000000000000000000000000000000000000000000000000* L008016 000000000000000000000000000000000000000000000000000000000000000000* L008082 111111111111111111111111111111111111111111111111111111111111111111* -L008148 000000000000000000000000000000000000000000000000000000000000000000* +L008148 111111111111111111111111111111111111111111011011111111111111111111* L008214 111111111111111111111111111111111111111111111111111111111111111111* L008280 111111111111111111111111111111111111111111111111111111111111111111* L008346 111111111111111111111111111111111111111111111111111111111111111111* L008412 111111111111111111111111111111111111111111111111111111111111111111* -L008478 111111111111111111111101111011110101111110011001011111011111111111* -L008544 111111111111111111111110111011111001111110011001011111011111111111* -L008610 111111111111111111111101111011110110111110101001011111011111111111* -L008676 111111111111111111111110111011111010111110101001011111011111111111* -L008742 111111111111111111111111111111111111111111111111101111101111111111* +L008478 111111101111111111111111111111110111101111011010011111111111111111* +L008544 111111101111111111111111111111111011101111011010101111111111111111* +L008610 111111011111111111111111111111111011101111011001101111111111111111* +L008676 111111011111111111111111111111110111101111011001011111111111111111* +L008742 111111111111111111111111111111111111111111011011111111101111111111* L008808 111111111111111111111111111111111111111111111111111111111111111111* -L008874 111111111111111111111101111011110101111101010101111111101111111111* -L008940 111111111111111111111110111011111001111101010101111111101111111111* -L009006 111111111111111111111101111011110110111101100101111111101111111111* -L009072 111111111111111111111110111011111010111101100101111111101111111111* -L009138 000000000000000000000000000000000000000000000000000000000000000000* -L009204 111111111111111111111110111011111001111101010101011111111111110111* -L009270 111111111111111111111110111011111010111101100101011111111111110111* -L009336 111111111111111111111110111011111001111110011001011111111111110111* -L009402 111111111111111111111110111011111010111110101001011111111111110111* -L009468 111111111111111111111111111111111111111111111111101111111111111011* +L008874 111111111111111111111111111111111011111111011111011111101111111111* +L008940 111111111111111111111111111111110111111111011111101111101111111111* +L009006 111111101111111111111111111111111111111111011101111111101111111111* +L009072 111111011111111111111111111111111111111111011110111111101111111111* +L009138 111111111111111111111111111111111111101111011111111111101111111111* +L009204 111111101111111111111111111111111011011111010110101111111111111111* +L009270 111111101111111111111111111111111011101111011010101111111111111111* +L009336 111111011111111111111111111111111011011111010101101111111111111111* +L009402 111111011111111111111111111111111011101111011001101111111111111111* +L009468 111111111111111111111111111111111011111111011111111111111011111111* L009534 111111111111111111111111111111111111111111111111111111111111111111* -L009600 111111111111111111101111111111111111111111111111011111111111111111* -L009666 111111111111111111111101111011110101111101010101111111111111111011* -L009732 111111111111111111111101111011110110111101100101111111111111111011* -L009798 111111111111111111111101111011110101111110011001111111111111111011* -L009864 111111111111111111111101111011110110111110101001111111111111111011* -L009930 111111111111111111111111111111111111111111111111111111111111111111* -L009996 111111111111111111111111111111111111111111111111111111111111111111* -L010062 111111111111111111111111111111111111111111111111111111111111111111* -L010128 111111111111111111111111111111111111111111111111111111111111111111* -L010194 111111111111111111111111111111111111111111111111111111111111111111* +L009600 111111101111111111111111111111111111111111011111111111111111111111* +L009666 111111111111111111111111111111111111111111011111101111111011111111* +L009732 111111101111111111111111111111111111111111011101111111111011111111* +L009798 111111011111111111111111111111111111111111011110111111111011111111* +L009864 111111111111111111111111111111111111011111011011111111111011111111* +L009930 111111111111111111111111111111111111101111010111111111111011111111* +L009996 000000000000000000000000000000000000000000000000000000000000000000* +L010062 000000000000000000000000000000000000000000000000000000000000000000* +L010128 000000000000000000000000000000000000000000000000000000000000000000* +L010194 000000000000000000000000000000000000000000000000000000000000000000* L010260 - 101111011110111111111111111111111111111111111111111111111111111111* + 101101111110111111111111111111111111111111111111111111111111111111* L010326 000000000000000000000000000000000000000000000000000000000000000000* L010392 111111111111111111111111111111111111111111111111111111111111111111* L010458 111111111111111111111111111111111111111111111111111111111111111111* L010524 111111111111111111111111111111111111111111111111111111111111111111* L010590 111111111111111111111111111111111111111111111111111111111111111111* -L010656 111111111111011111111101111011110110111101100101011111111111111111* -L010722 111111111111011111111110111011111010111101100101011111111111111111* -L010788 111111111111011111111101111011110110111110101001011111111111111111* -L010854 111111111111011111111110111011111010111110101001011111111111111111* -L010920 111111111111101111111111111111111111111111111111101111111111111111* +L010656 111111101111111111111111111111110111011111010110011111111111111111* +L010722 111111101111111111111111111111111011011111010110101111111111111111* +L010788 111111101111111111111111111111110111101111011010011111111111111111* +L010854 111111101111111111111111111111111011101111011010101111111111111111* +L010920 111111101111101111111111111111111111111111011111111111111111111111* L010986 - 101111011110111111111111111111111111111111111111111111111111111111* -L011052 111101111111111111111111111111111111111111111111111111111111111111* -L011118 111111111111101111111101111011110101111101010101111111111111111111* -L011184 111111111111101111111110111011111001111101010101111111111111111111* -L011250 111111111111101111111101111011110101111110011001111111111111111111* -L011316 111111111111101111111110111011111001111110011001111111111111111111* -L011382 111111111111111111111111111111111111111111111111111111111111111111* -L011448 111111111111111111111111111111111111111111111111111111111111111111* -L011514 111111111111111111111111111111111111111111111111111111111111111111* -L011580 111111111111111111111111111111111111111111111111111111111111111111* -L011646 111111111111111111111111111111111111111111111111111111111111111111* + 101101111110111111111111111111111111111111111111111111111111111111* +L011052 111111111111111111111111111111111011111111011111111111111111111111* +L011118 111111111111101111111111111111111011111111011111011111111111111111* +L011184 111111111111101111111111111111110111111111011111101111111111111111* +L011250 111111111111101111111111111111111111111111011110111111111111111111* +L011316 111111111111101111111111111111111111011111011011111111111111111111* +L011382 111111111111101111111111111111111111101111010111111111111111111111* +L011448 000000000000000000000000000000000000000000000000000000000000000000* +L011514 000000000000000000000000000000000000000000000000000000000000000000* +L011580 000000000000000000000000000000000000000000000000000000000000000000* +L011646 000000000000000000000000000000000000000000000000000000000000000000* L011712 - 101111011110111111111111111111111111111111111111111111111111111111* + 101101111110111111111111111111111111111111111111111111111111111111* L011778 000000000000000000000000000000000000000000000000000000000000000000* L011844 111111111111111111111111111111111111111111111111111111111111111111* L011910 111111111111111111111111111111111111111111111111111111111111111111* L011976 111111111111111111111111111111111111111111111111111111111111111111* L012042 111111111111111111111111111111111111111111111111111111111111111111* -L012108 111111111111111111111111111011111111111111111101011111110111111111* -L012174 111111111111111111110111111111111111111011111111011111111111111111* -L012240 111111111111111101111111111011111111111111111101011111111111011111* -L012306 000000000000000000000000000000000000000000000000000000000000000000* -L012372 000000000000000000000000000000000000000000000000000000000000000000* +L012108 111111111111111111111011111111111111111011011111111111111111111111* +L012174 011011111101110111111111111110111111111011011111111111111110111111* +L012240 011111111101110111111111011110111111111011011111111111111110111111* +L012306 011111110101110111111111111110111111111011011111111111111110111111* +L012372 011111111101110110111111111110111111111011011111111111111110111111* L012438 - 111111101111111111111111111111111111111111111111111111111111111111* -L012504 111111111111111111111111111111111111111111111011011111111111111111* -L012570 111111111111111111111111111111111111111111111111111111111111111111* -L012636 111111111111111111111111111111111111111111111111111111111111111111* -L012702 111111111111111111111111111111111111111111111111111111111111111111* -L012768 111111111111111111111111111111111111111111111111111111111111111111* + 000000000000000000000000000000000000000000000000000000000000000000* +L012504 111111111111111111101111111111111111111111011111111111111111111111* +L012570 011111111101110111111101111110111111111011011111111111111110111111* +L012636 011111111101110111111111111110111110111011011111111111111110111111* +L012702 000000000000000000000000000000000000000000000000000000000000000000* +L012768 000000000000000000000000000000000000000000000000000000000000000000* L012834 111111111111111111111111111111111111111111111111111111111111111111* L012900 111111111111111111111111111111111111111111111111111111111111111111* L012966 111111111111111111111111111111111111111111111111111111111111111111* @@ -308,50 +309,50 @@ L013164 000000000000000000000000000000000000000000000000000000000000000000* L013296 0010* L013300 00100011111000* -L013314 00100110011111* -L013328 00010011110101* -L013342 11011111111111* -L013356 10100111011000* -L013370 10100111011111* +L013314 00101111111111* +L013328 01010110010100* +L013342 11011111111110* +L013356 11100110011000* +L013370 11100110011111* L013384 01110110011100* -L013398 11101011111110* +L013398 11001011111110* L013412 00110011110000* -L013426 10100111010011* -L013440 00110110010111* -L013454 11101011110011* +L013426 11100110010011* +L013440 01110110010111* +L013454 11001011110011* L013468 00111111110000* -L013482 10100110010010* -L013496 01010110010011* -L013510 11100011111111* +L013482 11100110010010* +L013496 01110110010001* +L013510 11100011110011* NOTE BLOCK 2 * L013524 - 111111011111110111111111111111111111111111111111111111111111011111 - 111101111101111101111111110111111111111111111111111111111111111111 - 111111111111111111111111111111111111011111111111111111111111111111 - 111111111111111111111111111111111111111111110111111111111111111110 - 111111111111111111111010111111111111111111111111111011111111111111 - 111111111111111111111111111111111111111001111111111111111111111111 - 111111111111111111111111111111111011111111111111111111111111111111 - 111111111011111111101111111111111111111111111110111111111111111111 - 101111111111111111111111111111111111111111111111111111111111111111* + 011101111111101111111111111111111111111101111111111111111111111111 + 111111011101111111111110111111111111111111111111111111101111111111 + 111111111111111111101111111111111111011111111111111111111111111111 + 111111111111111111111111111111101111111111110111111111111111111111 + 111111111111111111110111111111111111111111111111111011111111111111 + 110111111111111111111111111111111111111111111111111111111111111111 + 111111111111111111111111111111111111111111111111011111111111111111 + 111111110111111101111111111001111111111011111110111111111111111111 + 111111111111111111111111011111110110111111101111111111111111111111* L014118 - 111111111110111111111111111111111111111111111110111111111111111101* + 111101111110111111111111111111111111111111111110111111111111111111* L014184 000000000000000000000000000000000000000000000000000000000000000000* L014250 000000000000000000000000000000000000000000000000000000000000000000* L014316 000000000000000000000000000000000000000000000000000000000000000000* L014382 000000000000000000000000000000000000000000000000000000000000000000* L014448 000000000000000000000000000000000000000000000000000000000000000000* -L014514 111111111111111111111011111111111111111111111110111111111111111111* +L014514 111111111111111111101111111111111111111111111110111111111111111111* L014580 000000000000000000000000000000000000000000000000000000000000000000* L014646 000000000000000000000000000000000000000000000000000000000000000000* L014712 000000000000000000000000000000000000000000000000000000000000000000* L014778 000000000000000000000000000000000000000000000000000000000000000000* L014844 - 111111111110111111111111111111111111111111111110111111111111111101* -L014910 011101111001111111111111110111111111110110111011111011111111111111* -L014976 101111111111111111111111111111111111111111110111111111111111111111* -L015042 011111111011111111111111110111111111110111110111111111111111111111* -L015108 011101111101111111111111111111111111111110111011111011111111111111* + 111101111110111111111111111111111111111111111110111111111111111111* +L014910 110111111111111111111111111011111111111111011111110111111111111111* +L014976 111111111111111111111111111111111111111011011011111111111111111111* +L015042 000000000000000000000000000000000000000000000000000000000000000000* +L015108 000000000000000000000000000000000000000000000000000000000000000000* L015174 000000000000000000000000000000000000000000000000000000000000000000* L015240 111111111111111111111111111111111111111111111111111111111111111111* L015306 111111111111111111111111111111111111111111111111111111111111111111* @@ -359,7 +360,7 @@ L015372 111111111111111111111111111111111111111111111111111111111111111111* L015438 111111111111111111111111111111111111111111111111111111111111111111* L015504 111111111111111111111111111111111111111111111111111111111111111111* L015570 - 111111111110111111111111111111111111111111111110111111111111111101* + 111101111110111111111111111111111111111111111110111111111111111111* L015636 000000000000000000000000000000000000000000000000000000000000000000* L015702 111111111111111111111111111111111111111111111111111111111111111111* L015768 111111111111111111111111111111111111111111111111111111111111111111* @@ -371,33 +372,33 @@ L016098 111111111111111111111111111111111111111111111111111111111111111111* L016164 111111111111111111111111111111111111111111111111111111111111111111* L016230 111111111111111111111111111111111111111111111111111111111111111111* L016296 - 111111111110111111111111111111111111111111111110111111111111111101* -L016362 011111111011111111111111110111111111111111111111111111111111011111* -L016428 011111111011111111111111111111111111011111111111111111111111111111* -L016494 011111111111111111111111110111111111011111111111111111111111111111* -L016560 000000000000000000000000000000000000000000000000000000000000000000* -L016626 000000000000000000000000000000000000000000000000000000000000000000* + 111101111110111111111111111111111111111111111110111111111111111111* +L016362 111111111111111111111111111111111111011111101111111111111111111111* +L016428 111011111011111111111011110110100111011111111111111111101111111111* +L016494 111011111111111111111111110111011111011110111111111111111111111111* +L016560 110111111111111111111111011011111111101111011111111111111111111111* +L016626 111011111111111111111111110111111110011111111111111111111111111111* L016692 111111111111111111111111111111111111111111111111111111111111111111* L016758 111111111111111111111111111111111111111111111111111111111111111111* L016824 111111111111111111111111111111111111111111111111111111111111111111* L016890 111111111111111111111111111111111111111111111111111111111111111111* L016956 111111111111111111111111111111111111111111111111111111111111111111* L017022 - 111111111110111111111111111111111111111111111110111111111111111101* + 111101111110111111111111111111111111111111111110111111111111111111* L017088 000000000000000000000000000000000000000000000000000000000000000000* L017154 111111111111111111111111111111111111111111111111111111111111111111* L017220 111111111111111111111111111111111111111111111111111111111111111111* L017286 111111111111111111111111111111111111111111111111111111111111111111* L017352 111111111111111111111111111111111111111111111111111111111111111111* -L017418 111111011111111111111111111111111111111111111111111111111111111111* -L017484 111111111111111111111111111111111111111111111111111111111111111111* -L017550 111111111111111111111111111111111111111111111111111111111111111111* -L017616 111111111111111111111111111111111111111111111111111111111111111111* -L017682 111111111111111111111111111111111111111111111111111111111111111111* +L017418 111011111011111111111011110110100111011111011111111111101111111111* +L017484 111011111111111111111111110111011111011110011111111111111111111111* +L017550 111111011111111111111111110111111111111111011111111111111111111111* +L017616 111011011111111111111111111111111111111111011111111111111111111111* +L017682 111011111111111111111111110111111110011111011111111111111111111111* L017748 111111111111111111111111111111111111111111111111111111111111111111* -L017814 011111111011111111111111110111111111111111111111111111111111011111* -L017880 011111111111111110101111111111111111111111111111111111111111111111* +L017814 111111111111111111111111111111111111111111101111111111111111111111* +L017880 111111111111111101111111111111111111111111111111011111111111111111* L017946 000000000000000000000000000000000000000000000000000000000000000000* L018012 000000000000000000000000000000000000000000000000000000000000000000* L018078 000000000000000000000000000000000000000000000000000000000000000000* @@ -413,18 +414,18 @@ L018606 111111111111111111111111111111111111111111111111111111111111111111* L018672 111111111111111111111111111111111111111111111111111111111111111111* L018738 111111111111111111111111111111111111111111111111111111111111111111* L018804 111111111111111111111111111111111111111111111111111111111111111111* -L018870 011111110111111111111111111111111111111111111111111111111111011111* -L018936 011111111111111111111111111011111111111111111111111111111111011111* -L019002 011101111101111111111111111111111111111110111011111011111111101111* +L018870 110111111111111111111111011011111111111111011111111111111111111111* +L018936 011111111111111111111111111111111111111011011111111111111111111111* +L019002 110111111111111111111101111011111111111111011111110111111111111111* L019068 000000000000000000000000000000000000000000000000000000000000000000* L019134 000000000000000000000000000000000000000000000000000000000000000000* L019200 000000000000000000000000000000000000000000000000000000000000000000* -L019266 011111111111111111111110111111111111111111111110111111111111111111* -L019332 011111111111111011111111111111110111111111111101111111111111111111* -L019398 000000000000000000000000000000000000000000000000000000000000000000* -L019464 000000000000000000000000000000000000000000000000000000000000000000* -L019530 000000000000000000000000000000000000000000000000000000000000000000* +L019266 111111111111011111111111111111111111111111111111111111111111111111* +L019332 111111111111111111111111111111111111111111111111111111111111111111* +L019398 111111111111111111111111111111111111111111111111111111111111111111* +L019464 111111111111111111111111111111111111111111111111111111111111111111* +L019530 111111111111111111111111111111111111111111111111111111111111111111* L019596 111111111111111111111111111111111111111111111111111111111111111111* L019662 111111111111111111111111111111111111111111111111111111111111111111* L019728 111111111111111111111111111111111111111111111111111111111111111111* @@ -436,49 +437,49 @@ L019926 L020058 0010* L020062 00100011110000* L020076 01101111110011* -L020090 00100111011100* +L020090 11100110011100* L020104 11101111110010* L020118 00111011110000* L020132 00000011110011* -L020146 10100110010110* +L020146 10100111010110* L020160 11100011110010* L020174 00111111110001* -L020188 00000110010011* -L020202 11100110011110* +L020188 10100110010011* +L020202 10100110011110* L020216 11100011111111* L020230 00111011111001* L020244 10100110010011* -L020258 11100110010000* +L020258 00010110010000* L020272 11101111111111* NOTE BLOCK 3 * L020286 - 111111111111111111111111101111111110011111111111111111110111111111 - 111111110111111111111011111111011111111111111101111111111111111111 - 111111111111111111111101111111111111111110111111111111011111111011 - 111111111111111111111111111111111111111111111011111111111111111111 - 111111111110111111111111111111111111111111111111111111111111111111 - 110111111111111111011111111111111111111111111111111111111111111111 - 111111011111110111111111111111111111110111111111111111111111111111 - 101111111111111111111111111010111111111111111111111111111111101110 - 111101111111111111111111111111110111111111101111111001111111111111* + 111111111111111111111101111101111110111111011111111111111111111111 + 111011110101111111111111101111111111111111111111111111111111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111111111101111111111111111111111111011111111111111111111 + 111111111111111111111111111111101111111111111111011111111111111111 + 111111111111111111111111111111111111111111111111111111111101111111 + 111111111111111110111111111111111111011111111111111111111111111111 + 111111111111111111110111111011110111111010111111111111111111111111 + 101101011111111111111111111111111111111111111111111111111011111111* L020880 111111111111111111111111111111111111111111111111111111111111111111* -L020946 111111111111111111111111111111111111111111101111111110111111111111* -L021012 111111101111111011101011111011111111111111111101111110111111111111* -L021078 111111011111111011100111110111111111111011011110111101111111111111* +L020946 000000000000000000000000000000000000000000000000000000000000000000* +L021012 000000000000000000000000000000000000000000000000000000000000000000* +L021078 000000000000000000000000000000000000000000000000000000000000000000* L021144 000000000000000000000000000000000000000000000000000000000000000000* L021210 000000000000000000000000000000000000000000000000000000000000000000* -L021276 111111111011111111111111111101011111111111011101111111111111111111* -L021342 111110111011111111111111111111111111111111011111111111111111111111* +L021276 011111111001111111111111111111111111111111111111111111110101111111* +L021342 011110111011111111111111111111111111111111111111111111111111111111* L021408 000000000000000000000000000000000000000000000000000000000000000000* L021474 000000000000000000000000000000000000000000000000000000000000000000* L021540 000000000000000000000000000000000000000000000000000000000000000000* L021606 111111111111111111111111111111111111111111111111111111111111111111* -L021672 111111111111111111111111110111110111111111011111111111111111111111* -L021738 111111111111111111111111111111110111111111011110111111111111111111* -L021804 111111111111111111111111110111111111111111011110111111011111111111* -L021870 000000000000000000000000000000000000000000000000000000000000000000* +L021672 111111011111111111111111101111111111111111111111101111111111111111* +L021738 111111011111111111111111111011111111111111111111111111111111111111* +L021804 111111011111111111111111111111111111111111111111111111111101111111* +L021870 111111111111111111111111010111110111111111111111011111111110111111* L021936 000000000000000000000000000000000000000000000000000000000000000000* L022002 111111111111111111111111111111111111111111111111111111111111111111* L022068 111111111111111111111111111111111111111111111111111111111111111111* @@ -487,43 +488,43 @@ L022200 111111111111111111111111111111111111111111111111111111111111111111* L022266 111111111111111111111111111111111111111111111111111111111111111111* L022332 111111111111111111111111111111111111111111111111111111111111111111* -L022398 101111111111111111111111111111111111101111111111111111111111111111* -L022464 011111111110111111111111111111111111111111111111111111111111111110* -L022530 000000000000000000000000000000000000000000000000000000000000000000* +L022398 101111111111111111111011111111111111111111111111111111111111111111* +L022464 111111101111111111111011101011111011111111111111101111111101111111* +L022530 011111101111111111100111010111110111111111111111101111111110111111* L022596 000000000000000000000000000000000000000000000000000000000000000000* L022662 000000000000000000000000000000000000000000000000000000000000000000* -L022728 000000000000000000000000000000000000000000000000000000000000000000* -L022794 111111111111111111111111111111111111111111111111111111111111111111* -L022860 111111111111111111111111111111111111111111111111111111111111111111* -L022926 111111111111111111111111111111111111111111111111111111111111111111* -L022992 111111111111111111111111111111111111111111111111111111111111111111* +L022728 111011111111111111111111111111111111111110111111111111111111111111* +L022794 111111111111111111111111111111111111111001101111111111111111111111* +L022860 000000000000000000000000000000000000000000000000000000000000000000* +L022926 000000000000000000000000000000000000000000000000000000000000000000* +L022992 000000000000000000000000000000000000000000000000000000000000000000* L023058 - 011111111111111111111111111111111111111111110111111111111111111111* -L023124 111111111111111111111111011111111111111111111111111111111111111111* -L023190 111111111111111111111111111111111111111111111111111111111111111111* -L023256 111111111111111111111111111111111111111111111111111111111111111111* -L023322 111111111111111111111111111111111111111111111111111111111111111111* -L023388 111111111111111111111111111111111111111111111111111111111111111111* + 111111111111111111111111111111111111111101110111111111111111111111* +L023124 111111111111111111111111101111110111111111111111111111111111111111* +L023190 111111111111111111111111111011110111111111111111111111111111111111* +L023256 111111111111111111111111111111110111111111111111111111111101111111* +L023322 111111101111111111111111010111111011111111111111111111111110111111* +L023388 000000000000000000000000000000000000000000000000000000000000000000* L023454 111111111111111111111111111111111111111111111111111111111111111111* L023520 111111111111111111111111111111111111111111111111111111111111111111* L023586 111111111111111111111111111111111111111111111111111111111111111111* L023652 111111111111111111111111111111111111111111111111111111111111111111* L023718 111111111111111111111111111111111111111111111111111111111111111111* L023784 - 011111111111111111111111111111111111111111110111111111111111111111* -L023850 111111111111111111111111111111111110111111111111111111110111111111* + 111111111111111111111111111111111111111101110111111111111111111111* +L023850 111111111111111111111101111111101111111111111111111111111111111111* L023916 111111111111111111111111111111111111111111111111111111111111111111* L023982 111111111111111111111111111111111111111111111111111111111111111111* L024048 111111111111111111111111111111111111111111111111111111111111111111* L024114 111111111111111111111111111111111111111111111111111111111111111111* -L024180 111111111111110111101011111111111111111111111111111111111111111111* -L024246 111111111111110111111111111011111111111111111111111111111111111111* -L024312 111111111111110111111111111111111111111111111101111111111111111111* -L024378 111111011111111111010111110111111111111111111110111111111111111111* -L024444 000000000000000000000000000000000000000000000000000000000000000000* +L024180 000000000000000000000000000000000000000000000000000000000000000000* +L024246 111111111111111111111111111111111111111111111111111111111111111111* +L024312 111111111111111111111111111111111111111111111111111111111111111111* +L024378 111111111111111111111111111111111111111111111111111111111111111111* +L024444 111111111111111111111111111111111111111111111111111111111111111111* L024510 - 000000000000000000000000000000000000000000000000000000000000000000* -L024576 111111111111111111111111111111111111111111111111111111111111011111* + 111111111111111111111111111111111111101111111111111111111111111111* +L024576 111111111111111101111111111111111111111111111111111111111111111111* L024642 111111111111111111111111111111111111111111111111111111111111111111* L024708 111111111111111111111111111111111111111111111111111111111111111111* L024774 111111111111111111111111111111111111111111111111111111111111111111* @@ -535,23 +536,23 @@ L025104 111111111111111111111111111111111111111111111111111111111111111111* L025170 111111111111111111111111111111111111111111111111111111111111111111* L025236 111111111111111111111111111111111111111111111111111111111111111111* -L025302 111111111111111111111111111111111111111110111111111111110111111111* +L025302 111111111111111111111101111111111110111111111111111111111111111111* L025368 111111111111111111111111111111111111111111111111111111111111111111* L025434 111111111111111111111111111111111111111111111111111111111111111111* L025500 111111111111111111111111111111111111111111111111111111111111111111* L025566 111111111111111111111111111111111111111111111111111111111111111111* -L025632 110111111111111111111111111111111111111111101111111111111111111111* -L025698 110111101111110111101011110111111111111011111110111110111111111111* -L025764 110111111111111111111110110111111111110111111110111111111111111111* -L025830 111011111111111111111111111011110111111111011101111111111111111111* -L025896 110111111111111111111111110111111111111111111110111011111111111111* +L025632 111111111111111111111111111101111111111111111111111111111111111111* +L025698 111111111111111111111111111111111111111111111111111111111111111111* +L025764 111111111111111111111111111111111111111111111111111111111111111111* +L025830 111111111111111111111111111111111111111111111111111111111111111111* +L025896 111111111111111111111111111111111111111111111111111111111111111111* L025962 000000000000000000000000000000000000000000000000000000000000000000* -L026028 111111111111111111111111111111111111111111011111111111111111111011* -L026094 111111111111111111111111111111111111111111111111111111111111111111* -L026160 111111111111111111111111111111111111111111111111111111111111111111* -L026226 111111111111111111111111111111111111111111111111111111111111111111* -L026292 111111111111111111111111111111111111111111111111111111111111111111* +L026028 111111111111111111111111010111110111111111111111111111111110111111* +L026094 111111111111111111111111111111111111111111111111011111111111111111* +L026160 000000000000000000000000000000000000000000000000000000000000000000* +L026226 000000000000000000000000000000000000000000000000000000000000000000* +L026292 000000000000000000000000000000000000000000000000000000000000000000* L026358 111111111111111111111111111111111111111111111111111111111111111111* L026424 111111111111111111111111111111111111111111111111111111111111111111* L026490 111111111111111111111111111111111111111111111111111111111111111111* @@ -561,47 +562,47 @@ L026688 000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000* L026820 0010* -L026824 10100111010000* -L026838 11100110011110* -L026852 10100110010100* -L026866 11100011111111* -L026880 11101111111001* -L026894 00001011111111* -L026908 00010110010100* +L026824 00100011110010* +L026838 11100110011111* +L026852 10100110011101* +L026866 11101011111111* +L026880 10100111011010* +L026894 11101011111110* +L026908 10100110010101* L026922 11101011110011* L026936 01110011110010* -L026950 10100110010010* -L026964 00010110010001* -L026978 11101011110011* -L026992 01111111111010* -L027006 10100111011110* -L027020 01010110010001* -L027034 11100011110011* +L026950 00001011110010* +L026964 00010110010111* +L026978 11101111110011* +L026992 01110011111010* +L027006 00000110011110* +L027020 00100110010001* +L027034 11101011110011* NOTE BLOCK 4 * L027048 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111101011111111111111111111111011111110111111111111111 - 111111111101111111111111010111111111111111111111101111111111111111 - 111011011111111111111111111111111101111111111011111111101111111111 + 111111111111111111111111111111011111110111111111110111111111111111 + 111111111101111111111111110111111111111111110111101111111111111111 + 111001111111111111111111111111111111111111011110111101101111111110 111111111111110111111111111111111111111111111111111111111111111111 - 111111111111011111111111111111111111011111111111111111111111111111 - 111110110111111111111111111111111111111111111111111101111011111111 - 111111111111111111111111111110011111111011111110111111111101111111 - 101111111111111111111101111111111011111110111111111111111111111110* + 111111110111111111111111011111111111111111111111111111111111111111 + 111111111111101111111101111111111101111111111111111111111111111111 + 101111011111111111101111111110111111111111111111111111111111110111 + 111111111111111101111111111111111011101110111111111111111011111111* L027642 - 110111111011101111111101111111111111011011111111011110011111111111* + 110111110111111101101110101111111110111111111111011111011111111111* L027708 000000000000000000000000000000000000000000000000000000000000000000* L027774 000000000000000000000000000000000000000000000000000000000000000000* L027840 000000000000000000000000000000000000000000000000000000000000000000* L027906 000000000000000000000000000000000000000000000000000000000000000000* L027972 000000000000000000000000000000000000000000000000000000000000000000* -L028038 111111111111111111111111111111111011111111101110111111110111111111* -L028104 111111111111111111111111111111111111111111111101111111111011111111* +L028038 101111111111011111111111111111101011111111111111111111111111111111* +L028104 011111111111101111111111111111111111111111111111111111111111111111* L028170 000000000000000000000000000000000000000000000000000000000000000000* L028236 000000000000000000000000000000000000000000000000000000000000000000* L028302 000000000000000000000000000000000000000000000000000000000000000000* L028368 - 111111111111111111111111111111111111111111110101111111111111111111* + 011111111111111111111111111111111111111111111111111111111111111101* L028434 111111111111111111111111111111111111111111111111111111111111111111* L028500 111111111111111111111111111111111111111111111111111111111111111111* L028566 111111111111111111111111111111111111111111111111111111111111111111* @@ -614,16 +615,16 @@ L028962 111111111111111111111111111111111111111111111111111111111111111111* L029028 111111111111111111111111111111111111111111111111111111111111111111* L029094 000000000000000000000000000000000000000000000000000000000000000000* -L029160 111111111111111110111111111111111111111011111111111111111111111111* +L029160 111110111111111111101111111111111111111111111111111111111111111111* L029226 111111111111111111111111111111111111111111111111111111111111111111* L029292 111111111111111111111111111111111111111111111111111111111111111111* L029358 111111111111111111111111111111111111111111111111111111111111111111* L029424 111111111111111111111111111111111111111111111111111111111111111111* -L029490 011111111111111111111111111111111111111011111111111111111111111111* -L029556 111111111111111111111111111111111111111111111111111111111111111111* -L029622 111111111111111111111111111111111111111111111111111111111111111111* -L029688 111111111111111111111111111111111111111111111111111111111111111111* -L029754 111111111111111111111111111111111111111111111111111111111111111111* +L029490 111111111111111111111111111111011111111111111111111111111111111111* +L029556 111111011110111011111111111011111111011001101011111010111011110111* +L029622 000000000000000000000000000000000000000000000000000000000000000000* +L029688 000000000000000000000000000000000000000000000000000000000000000000* +L029754 000000000000000000000000000000000000000000000000000000000000000000* L029820 000000000000000000000000000000000000000000000000000000000000000000* L029886 111111111111111111111111111111111111111111111111111111111111111111* @@ -638,16 +639,16 @@ L030414 111111111111111111111111111111111111111111111111111111111111111111* L030480 111111111111111111111111111111111111111111111111111111111111111111* L030546 000000000000000000000000000000000000000000000000000000000000000000* -L030612 011111111111111111111111111111111111111111111110111111111111111111* +L030612 111111111111111111111111111111111111111111111101111111111111111111* L030678 111111111111111111111111111111111111111111111111111111111111111111* L030744 111111111111111111111111111111111111111111111111111111111111111111* L030810 111111111111111111111111111111111111111111111111111111111111111111* L030876 111111111111111111111111111111111111111111111111111111111111111111* -L030942 111111111111111111111111111111111111111111011111111111111111111111* -L031008 111111101110111011101111101010011110111101111111111011111101111101* -L031074 000000000000000000000000000000000000000000000000000000000000000000* -L031140 000000000000000000000000000000000000000000000000000000000000000000* -L031206 000000000000000000000000000000000000000000000000000000000000000000* +L030942 111111111111111111111111111111111111111111111111111111111111111111* +L031008 111111111111111111111111111111111111111111111111111111111111111111* +L031074 111111111111111111111111111111111111111111111111111111111111111111* +L031140 111111111111111111111111111111111111111111111111111111111111111111* +L031206 111111111111111111111111111111111111111111111111111111111111111111* L031272 000000000000000000000000000000000000000000000000000000000000000000* L031338 111111111111111111111111111111111111111111111111111111111111111111* @@ -661,8 +662,8 @@ L031800 111111111111111111111111111111111111111111111111111111111111111111* L031866 111111111111111111111111111111111111111111111111111111111111111111* L031932 111111111111111111111111111111111111111111111111111111111111111111* L031998 - 111101111111111111111111111111111111111111111111111111111111111111* -L032064 111111101110111011101111101010011110111101111111111011111101111101* + 111111111111111111111111111101111111111111111111111111111111111111* +L032064 111111011110111011111111111011111111011001101011111010111011110111* L032130 111111111111111111111111111111111111111111111111111111111111111111* L032196 111111111111111111111111111111111111111111111111111111111111111111* L032262 111111111111111111111111111111111111111111111111111111111111111111* @@ -691,14 +692,14 @@ L033582 0010* L033586 00100011110000* L033600 10101111110011* L033614 11011011110100* -L033628 11110011110010* -L033642 01110111111001* -L033656 01000110011111* +L033628 11111111110010* +L033642 01111011111001* +L033656 10101111111110* L033670 11011011110000* -L033684 11111111111111* -L033698 01110110010001* -L033712 10101011111111* -L033726 11010111110000* +L033684 11111111111110* +L033698 00110110010001* +L033712 11001011111110* +L033726 11110111110000* L033740 11111111111110* L033754 00110011110001* L033768 11001011111110* @@ -706,34 +707,34 @@ L033782 11110111111100* L033796 11111111111110* NOTE BLOCK 5 * L033810 - 111111111111111111111111111111111110111111111111111111111111011111 - 101111111101111111111111111111111111111111111101111111111111111111 - 111110111111101111111111111111101111111111111111111111111111111111 - 111011111111111110111111111110111111111111110111111111111111111111 - 111111101111111111111011111111111111111111111111111011111111111111 - 111111111111111111111111011111111111111111111111111111101111111111 - 111111110111111111111101111111111011111111111111111111111111111111 - 111111111111111111101111111011111111011110111111111110111111111111 - 111111111111111111111111111111111111111111101111111111111111111111* + 111111111111100111111111111111111110111111011111111111111111111111 + 101111011101111111111111111111111111101111111111111111111111111111 + 111110111111111111111111111110101111111111111111111111111111111111 + 111111111111111111111111111111111111111111111111111111111110111111 + 111111111111111111111010111111111111111111111111111011111111111111 + 110111111111111111011111111111111111111011111111111111101111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111011111111111111111111111111111110111111111111111111101111 + 111111111111111111111111110111111111111111111111101111111111111111* L034404 000000000000000000000000000000000000000000000000000000000000000000* -L034470 111111111111111111101111111111111111111111011111111011111111111111* -L034536 111011111101111111101111111111110111111101011011111110111111111111* -L034602 111111111101111111101111011111110111111101011011111110111111111111* -L034668 111111110101111111101111111111110111111101011011111110111111111111* -L034734 111111111101111110101111111111110111111101011011111110111111111111* -L034800 111111011111111111111111111111111111111110011111111111111111111111* -L034866 111111111111111111111011111111110111111101011111111111111111111111* +L034470 111111110111111111111111111111111111111111111111010111111111111111* +L034536 111011111111111111111111111111111111111111111111010111111111111111* +L034602 111111111101100111111111111111111111111111101111011011111110111111* +L034668 000000000000000000000000000000000000000000000000000000000000000000* +L034734 000000000000000000000000000000000000000000000000000000000000000000* +L034800 111111111111111111111011111111111111111111111111011011111111111111* +L034866 111111111111111111111111111111101111111111111111010111111111111111* L034932 000000000000000000000000000000000000000000000000000000000000000000* L034998 000000000000000000000000000000000000000000000000000000000000000000* L035064 000000000000000000000000000000000000000000000000000000000000000000* L035130 000000000000000000000000000000000000000000000000000000000000000000* -L035196 111111111101111111101101111111110111111101011011111110111111111111* -L035262 111111111101101111101111111111110111111101011011111110111111111111* -L035328 000000000000000000000000000000000000000000000000000000000000000000* -L035394 000000000000000000000000000000000000000000000000000000000000000000* -L035460 000000000000000000000000000000000000000000000000000000000000000000* +L035196 111111111111111111111111111011111111111111111111011111111111111111* +L035262 111111111111111111111111111111111111111111111111111111111111111111* +L035328 111111111111111111111111111111111111111111111111111111111111111111* +L035394 111111111111111111111111111111111111111111111111111111111111111111* +L035460 111111111111111111111111111111111111111111111111111111111111111111* L035526 111111111111111111111111111111111111111111111111111111111111111111* L035592 111111111111111111111111111111111111111111111111111111111111111111* L035658 111111111111111111111111111111111111111111111111111111111111111111* @@ -741,16 +742,16 @@ L035724 111111111111111111111111111111111111111111111111111111111111111111* L035790 111111111111111111111111111111111111111111111111111111111111111111* L035856 000000000000000000000000000000000000000000000000000000000000000000* -L035922 111111111111111111111111111011111111011111011101111111111111111111* -L035988 111111111111111111111111111001111111101111011111111111111111111111* -L036054 111111111111111111111111111101111111101111011101111111111111111111* -L036120 000000000000000000000000000000000000000000000000000000000000000000* +L035922 110111111001100111011111111111111111111111101111011111111110111111* +L035988 111111111111111111111111111111111111111111111111101111111101111111* +L036054 110111111011111111011111111111111111111111111111011111111101111111* +L036120 111111111101100111111111111111111111111111101111011111111110111111* L036186 000000000000000000000000000000000000000000000000000000000000000000* -L036252 111111111111111111111111111111111111111111111111111111111111111111* -L036318 111111111111111111111111111111111111111111111111111111111111111111* -L036384 111111111111111111111111111111111111111111111111111111111111111111* -L036450 111111111111111111111111111111111111111111111111111111111111111111* -L036516 111111111111111111111111111111111111111111111111111111111111111111* +L036252 111111111111111111111101111111111111111110111111011111111111111111* +L036318 111111111111111111111111111110111111110101111111011111111111111111* +L036384 000000000000000000000000000000000000000000000000000000000000000000* +L036450 000000000000000000000000000000000000000000000000000000000000000000* +L036516 000000000000000000000000000000000000000000000000000000000000000000* L036582 000000000000000000000000000000000000000000000000000000000000000000* L036648 111111111111111111111111111111111111111111111111111111111111111111* @@ -765,16 +766,16 @@ L037176 111111111111111111111111111111111111111111111111111111111111111111* L037242 111111111111111111111111111111111111111111111111111111111111111111* L037308 000000000000000000000000000000000000000000000000000000000000000000* -L037374 111111111111111111111111111111111111111111101111111111111111111111* -L037440 111101111111111111111111111111111111111111111111111111111111101111* -L037506 011111111111111111111111111111101111111111111111111111101111011111* +L037374 110111011011111111111111111111111111111111111111011111111111111111* +L037440 111101101011111111111111111111111111111111111111011111111111111111* +L037506 110101101111111111111111111111111111111111111111011111111111111111* L037572 000000000000000000000000000000000000000000000000000000000000000000* L037638 000000000000000000000000000000000000000000000000000000000000000000* -L037704 111111111111111111111111111111111111111111111111111111111111111111* -L037770 111111111111111111111111111111111111111111111111111111111111111111* -L037836 111111111111111111111111111111111111111111111111111111111111111111* -L037902 111111111111111111111111111111111111111111111111111111111111111111* -L037968 111111111111111111111111111111111111111111111111111111111111111111* +L037704 111111111111111111111110111111111111111110111111011111111111111111* +L037770 111111111111111111111111111111111111100101111111011111111111111111* +L037836 000000000000000000000000000000000000000000000000000000000000000000* +L037902 000000000000000000000000000000000000000000000000000000000000000000* +L037968 000000000000000000000000000000000000000000000000000000000000000000* L038034 000000000000000000000000000000000000000000000000000000000000000000* L038100 111111111111111111111111111111111111111111111111111111111111111111* @@ -789,12 +790,12 @@ L038628 111111111111111111111111111111111111111111111111111111111111111111* L038694 111111111111111111111111111111111111111111111111111111111111111111* L038760 000000000000000000000000000000000000000000000000000000000000000000* -L038826 111111111111111111111111111111111110111111011111111111111111101111* -L038892 111111111111111111111111111111101111111111011111111111111111011111* -L038958 000000000000000000000000000000000000000000000000000000000000000000* +L038826 111111111111111111111111111111111111111111111111101111111111111111* +L038892 111111111111111111111111111111111101111111111111111011111111111111* +L038958 011111111111111111111111111111101111111111111111110111101111111111* L039024 000000000000000000000000000000000000000000000000000000000000000000* L039090 000000000000000000000000000000000000000000000000000000000000000000* -L039156 111111111111111111111111111111111111111111111111111111111111111111* +L039156 111111111111111111111111111111111111111111111111111111111111011111* L039222 111111111111111111111111111111111111111111111111111111111111111111* L039288 111111111111111111111111111111111111111111111111111111111111111111* L039354 111111111111111111111111111111111111111111111111111111111111111111* @@ -815,52 +816,52 @@ L040212 000000000000000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000000000000000* L040344 0010* -L040348 11100110011110* +L040348 10100110011110* L040362 11100110010010* -L040376 11001111111110* -L040390 11111011110011* -L040404 10100110011110* -L040418 11001011110010* -L040432 11110011111111* -L040446 11111111110011* -L040460 10100110011110* -L040474 11001011110010* -L040488 11111111111111* -L040502 11110011111111* -L040516 11100110011110* -L040530 11001011111111* -L040544 11110111111110* -L040558 11111111111110* +L040376 01010110011110* +L040390 11100011110011* +L040404 00100111011111* +L040418 11100110010011* +L040432 11011011111110* +L040446 11110011110011* +L040460 10100110011111* +L040474 11100110010011* +L040488 11011111111110* +L040502 11110011111110* +L040516 10100110011111* +L040530 00000110011111* +L040544 11011011111110* +L040558 11111111111111* NOTE BLOCK 6 * L040572 - 111111111111111011111111101111111111111111111111111111111111111111 - 111111011111111111111011111111011111111111111011111111111111111111 - 111111111110111111111111111011111111111111111111111111111111111111 - 101111111111111111111111111111111111111111111110111111111111111110 - 111111111111111111111111111111111110111111111111111111111111111111 - 111111111111111111011111111111111111111111111111111111111111111111 - 111111111111101111111111111111111011011111111111010111111111111111 - 111111110111111101111111111111111111111110111111111111101111111111 - 111111111111111111111111111111111111111111101111111111111111111111* + 111111111111111011101011111111111111111111111111111111111111111111 + 111111111101111111111111101111111111111111111011111111111111111111 + 111111111111111111111111111011111111111111111110111111111111111111 + 111111111011111111111111111111111111111111111111111111111111111110 + 111111111111111111111111111111111110111111111111011011111111111111 + 110101111111111111111111111111111111111011111111111111111111111111 + 011111111111101111111111111111111111111111111111111111111111111111 + 111111111111111101111111111111110111111110111111111111101111111111 + 111111011111111111111111111111111111111111101111111111111111111111* L041166 111111111111111111111111111111111111111111111111111111111111111111* -L041232 111111111111111111111111111111110110111101011111111111111111111111* +L041232 111111111111111111111111111111111110110101011111111111111111111111* L041298 111111111111101111111111111111111111111110011111111111111111111111* L041364 000000000000000000000000000000000000000000000000000000000000000000* L041430 000000000000000000000000000000000000000000000000000000000000000000* L041496 000000000000000000000000000000000000000000000000000000000000000000* -L041562 111111110111111111111111111111111111111111111111111111111111111111* +L041562 111101111111111111111111111111111111111111111111111111111111111111* L041628 000000000000000000000000000000000000000000000000000000000000000000* L041694 000000000000000000000000000000000000000000000000000000000000000000* L041760 000000000000000000000000000000000000000000000000000000000000000000* L041826 000000000000000000000000000000000000000000000000000000000000000000* L041892 111111111111111111111111111111111111111111111111111111111111111111* -L041958 111111111111111111111111111111111111111111011101111111101111111111* -L042024 111111011111111111111111111111111111111111011101111111111111111111* -L042090 111111101111111111111111111111111111111111011110111111011111111111* -L042156 111111111101111111111111111111111111111111010101111111111111111111* -L042222 000000000000000000000000000000000000000000000000000000000000000000* +L041958 111111111011111111111111111111111111111111111111111111111111111111* +L042024 111111111111111111111111111111111111111111111111111111111111111111* +L042090 111111111111111111111111111111111111111111111111111111111111111111* +L042156 111111111111111111111111111111111111111111111111111111111111111111* +L042222 111111111111111111111111111111111111111111111111111111111111111111* L042288 111111111111111111111111111111111111111111111111111111111111111111* L042354 111111111111111111111111111111111111111111111111111111111111111111* L042420 111111111111111111111111111111111111111111111111111111111111111111* @@ -868,22 +869,22 @@ L042486 111111111111111111111111111111111111111111111111111111111111111111* L042552 111111111111111111111111111111111111111111111111111111111111111111* L042618 000000000000000000000000000000000000000000000000000000000000000000* -L042684 111111111111111111011111111111111111011111111111111011111111111111* -L042750 111111111111111111101111111111111111101111111111110111111111111111* +L042684 111111011111111111111111111111111011111111111111101111111111111111* +L042750 111111101111111111111111111111110111111111111111011111111111111111* L042816 000000000000000000000000000000000000000000000000000000000000000000* L042882 000000000000000000000000000000000000000000000000000000000000000000* L042948 000000000000000000000000000000000000000000000000000000000000000000* L043014 111111111111111111111111111111111111111111011111111111111111111101* -L043080 111111101101111111111111111111111111111111010101111111011111111111* +L043080 111011111111111111110111111111111111111111010101111111011111111111* L043146 000000000000000000000000000000000000000000000000000000000000000000* L043212 000000000000000000000000000000000000000000000000000000000000000000* L043278 000000000000000000000000000000000000000000000000000000000000000000* L043344 000000000000000000000000000000000000000000000000000000000000000000* -L043410 111111101111111111111111111111111111111111010101111111011111111111* -L043476 111111111101111111111111111111111111111111011111111111111111111111* -L043542 000000000000000000000000000000000000000000000000000000000000000000* -L043608 000000000000000000000000000000000000000000000000000000000000000000* +L043410 111111111111111111111111111111111111111111011101111111101111111111* +L043476 110111111111111111111111111111111111111111011101111111111111111111* +L043542 111011111111111111111111111111111111111111011110111111011111111111* +L043608 111111111111111111110111111111111111111111010101111111111111111111* L043674 000000000000000000000000000000000000000000000000000000000000000000* L043740 111111111111111111111111111111111111111111111111111111111111111111* L043806 111111111111111111111111111111111111111111111111111111111111111111* @@ -891,22 +892,22 @@ L043872 111111111111111111111111111111111111111111111111111111111111111111* L043938 111111111111111111111111111111111111111111111111111111111111111111* L044004 111111111111111111111111111111111111111111111111111111111111111111* L044070 - 111111111111111111111111111111101111111110111111111111111111111101* + 111111111110111111111111111111111111111110111111111111111111111101* L044136 111111111111111111111111111111111111111111101111111111111111111111* -L044202 111111111111111111111111110111110111111101111111111111111111111111* +L044202 111111111111111111111111110111111111110101111111111111111111111111* L044268 111111111111111101111111111111111111111110111111111111111111111111* L044334 000000000000000000000000000000000000000000000000000000000000000000* L044400 000000000000000000000000000000000000000000000000000000000000000000* -L044466 111111111111111111110111111111111111111111111111111111101111111111* -L044532 111111011111111111110111111111111111111111111111111111111111111111* -L044598 111111101111111111111011111111111111111111111111111111011111111111* +L044466 111111111111111111111111011111111111111111111111111111101111111111* +L044532 110111111111111111111111011111111111111111111111111111111111111111* +L044598 111011111111111111111111101111111111111111111111111111011111111111* L044664 000000000000000000000000000000000000000000000000000000000000000000* L044730 000000000000000000000000000000000000000000000000000000000000000000* L044796 - 111111111111111111111111111111101111111110111111111111111111111111* -L044862 111111111111111111111111111111111111111111010111111111111111111111* -L044928 111111101110111111111111111111111111111111011101111111011111111111* -L044994 111111101111111111111111111111111111111111011001111111011111111111* + 111111111110111111111111111111111111111110111111111111111111111111* +L044862 111011111111111111110111111111111111111111011101111111011111111111* +L044928 111111111111111111111111111111111111111111010111111111111111111111* +L044994 000000000000000000000000000000000000000000000000000000000000000000* L045060 000000000000000000000000000000000000000000000000000000000000000000* L045126 000000000000000000000000000000000000000000000000000000000000000000* L045192 111111111111111111111111111111111111111111111111111111111111111111* @@ -916,23 +917,23 @@ L045390 111111111111111111111111111111111111111111111111111111111111111111* L045456 111111111111111111111111111111111111111111111111111111111111111111* L045522 111111111111111111111111111111111111111110111111111111111111111101* -L045588 111111111111111111111111111111111011111101011111111111111111111111* +L045588 111111111111111111111111111111111111111001011111111111111111111111* L045654 111111111111111011111111111111111111111101011111111111111111111111* -L045720 111111111111111110111111111111111111111110011111101111111111111111* +L045720 101111111111111110111111111111111111111110011111111111111111111111* L045786 000000000000000000000000000000000000000000000000000000000000000000* L045852 000000000000000000000000000000000000000000000000000000000000000000* -L045918 111111111111111111111111101111111111111111111111111111111111111111* -L045984 111111111111111111111111111111111111111111111111111111111111111111* -L046050 111111111111111111111111111111111111111111111111111111111111111111* -L046116 111111111111111111111111111111111111111111111111111111111111111111* -L046182 111111111111111111111111111111111111111111111111111111111111111111* +L045918 110111111111111111111111111111111111111111011111110111101111111111* +L045984 111111111111111111011111111111111111111111011111111111101111111111* +L046050 110111111111111111011111111111111111111111011111111111111111111111* +L046116 000000000000000000000000000000000000000000000000000000000000000000* +L046182 000000000000000000000000000000000000000000000000000000000000000000* L046248 000000000000000000000000000000000000000000000000000000000000000000* -L046314 101111111111111111111111111111111111111111011111111111111111111111* -L046380 111111111111111111111111111111111111111111111111111111111111111111* -L046446 111111111111111111111111111111111111111111111111111111111111111111* -L046512 111111111111111111111111111111111111111111111111111111111111111111* -L046578 111111111111111111111111111111111111111111111111111111111111111111* +L046314 111111111111111111110111111111111111111111011111111111111111111111* +L046380 111011111111111111111111111111111111111111011001111111011111111111* +L046446 111011111111111111111011111111111111111111011101111111011111111111* +L046512 000000000000000000000000000000000000000000000000000000000000000000* +L046578 000000000000000000000000000000000000000000000000000000000000000000* L046644 111111111111111111111111111111111111111111111111111111111111111111* L046710 111111111111111111111111111111111111111111111111111111111111111111* L046776 111111111111111111111111111111111111111111111111111111111111111111* @@ -943,51 +944,51 @@ L046974 000000000000000000000000000000000000000000000000000000000000000000* L047106 0010* L047110 11100110011000* -L047124 00100110011110* -L047138 10100110010100* -L047152 11100011111111* -L047166 10101111111001* -L047180 10100110010011* -L047194 10100110010000* -L047208 11100011110011* +L047124 00101011111110* +L047138 00010110010101* +L047152 11101011111111* +L047166 10100011111000* +L047180 10100110010010* +L047194 10100110010001* +L047208 11101011110011* L047222 10100110010000* -L047236 10100110010010* -L047250 00100110010100* -L047264 11101111110011* -L047278 11100110010011* -L047292 00000110010011* -L047306 01010110010000* -L047320 11100011111111* +L047236 10100110010011* +L047250 10100110010101* +L047264 11100011110011* +L047278 11100110010010* +L047292 10100110010010* +L047306 00100110010001* +L047320 11101011111111* NOTE BLOCK 7 * L047334 - 111111111111111111111111111111111111111111111111111111111111011111 - 111111011101111111111111111111111111111111111111111011111111111111 - 111111111111111111111111111111111110111111111111111111111111111111 - 111001111111111111111011111011111111111111111011111111111111111111 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111011111111011111101111011111111111111111111111111111 - 111111110111011111111111111111111011111111111111011111111111111111 - 111111111111111101111111111111111111111010111111111111101111111111 - 101111111111111111011101111110111111111111111110111110111111111111* + 111111111101111111111110111111111111111111111111111111111111111111 + 111111111111111111111111111111111110111111111111111111111111111111 + 111011111111111111111011111011111111111111111011111111111111111111 + 111111111111111111111111111111111111111111111111111011111111111111 + 111111111111111011111111011111011111011111011111111111111110111111 + 111111010111011111111111111111111111111111111111011111111111111111 + 111101111111111101101111111111111111111110111111111111101111111111 + 101111111111111111111111111111111011110111111110111111111111111111* L047928 000000000000000000000000000000000000000000000000000000000000000000* -L047994 011101111111111111111111111111111111111111111110111111011111111111* -L048060 011101101111111111111111111111111111111111111110111111111111111111* -L048126 011101111111111011111111111111111111111111111110111111111111101111* -L048192 011101011111111011111111111111111111111111111111111011101111011111* +L047994 011111111111111111110111111111111111111111111110111111011111111111* +L048060 011111111111111111110111111111111111111111101110111111111111111111* +L048126 011111111111111111110111111111101111111111111110111011111111111111* +L048192 011111111111111111110110111111101111111111011111110111101111111111* L048258 000000000000000000000000000000000000000000000000000000000000000000* -L048324 110111111011101111111110100111111101011011111111111111111111111111* +L048324 110111111011101111101111100111111101011011111111111111111111111111* L048390 000000000000000000000000000000000000000000000000000000000000000000* L048456 000000000000000000000000000000000000000000000000000000000000000000* L048522 000000000000000000000000000000000000000000000000000000000000000000* L048588 000000000000000000000000000000000000000000000000000000000000000000* L048654 000000000000000000000000000000000000000000000000000000000000000000* -L048720 011111101111111111110111111111111111111111111111111111011111111111* -L048786 011111111111111111111111111110111111111011111111111111111111111111* -L048852 000000000000000000000000000000000000000000000000000000000000000000* -L048918 000000000000000000000000000000000000000000000000000000000000000000* -L048984 000000000000000000000000000000000000000000000000000000000000000000* +L048720 011111111111111111101111111111111111111111111111111111111111111111* +L048786 111111111111111111111111111111111111111111111111111111111111111111* +L048852 111111111111111111111111111111111111111111111111111111111111111111* +L048918 111111111111111111111111111111111111111111111111111111111111111111* +L048984 111111111111111111111111111111111111111111111111111111111111111111* L049050 111111111111111111111111111111111111111111111111111111111111111111* L049116 111111111111111111111111111111111111111111111111111111111111111111* L049182 111111111111111111111111111111111111111111111111111111111111111111* @@ -997,10 +998,10 @@ L049380 111111111111111111111111111111111111111111111111111111111111111111* L049446 101111111111111111111111111111111111111111111111111111111111111111* L049512 111111111111111111111111111111111111011101111111111111111111111111* -L049578 111111011111111111111111111111111111011111111111111101101111111111* +L049578 111111111111111111111111111111110111011111101111111111011111111111* L049644 000000000000000000000000000000000000000000000000000000000000000000* L049710 000000000000000000000000000000000000000000000000000000000000000000* -L049776 111111011111111111111111111111111111111111111111111111111111111111* +L049776 111111111111111111111111111111111111111111011111111111111111111111* L049842 111111111111111111111111111111111111111111111111111111111111111111* L049908 111111111111111111111111111111111111111111111111111111111111111111* L049974 111111111111111111111111111111111111111111111111111111111111111111* @@ -1019,12 +1020,12 @@ L050700 111111111111111111111111111111111111111111111111111111111111111111* L050766 111111111111111111111111111111111111111111111111111111111111111111* L050832 111111111101111111111111111111111111111111111111111111111111111111* -L050898 111111111111111111101111111111111111111111111111111110111111111111* +L050898 111111101111111111111111111111111011111111111111111111111111111111* L050964 111111111111111111111111111111111111111111111111111111111111111111* L051030 111111111111111111111111111111111111111111111111111111111111111111* L051096 111111111111111111111111111111111111111111111111111111111111111111* L051162 111111111111111111111111111111111111111111111111111111111111111111* -L051228 111111111111111111111111111110111111111011111111111111111111111111* +L051228 111110111111111111101111111111111111111111111111111111111111111111* L051294 111111111111111111111111111111111111111111111111111111111111111111* L051360 111111111111111111111111111111111111111111111111111111111111111111* L051426 111111111111111111111111111111111111111111111111111111111111111111* @@ -1044,15 +1045,15 @@ L052218 111111111111111111111111111111111111111111111111111111111111111111* L052284 111111111110111111111111111111111111111110111111111111111111111111* L052350 101111111111111111111111111111111111111111111111111111111111111111* -L052416 111111111111111111111111111111010111111101111111111111111111111111* +L052416 111111111111110111111111111111111111111101111111111111111101111111* L052482 111111111111111110111111111111111111111110111111101111111111111111* L052548 000000000000000000000000000000000000000000000000000000000000000000* L052614 000000000000000000000000000000000000000000000000000000000000000000* -L052680 011111101111111111110111111111111111111111111111111111011111111111* -L052746 011111111111110111111111111111111111111111111111111111011111111111* -L052812 011111101111110111111111111111111111111111111111111111111111111111* -L052878 000000000000000000000000000000000000000000000000000000000000000000* -L052944 000000000000000000000000000000000000000000000000000000000000000000* +L052680 011111111111111111111111111111111111111110111111111111111111111111* +L052746 111111111111111111111111111111111111111111111111111111111111111111* +L052812 111111111111111111111111111111111111111111111111111111111111111111* +L052878 111111111111111111111111111111111111111111111111111111111111111111* +L052944 111111111111111111111111111111111111111111111111111111111111111111* L053010 111111111111111111111111111111111111111111111111111111111111111111* L053076 111111111111111111111111111111111111111111111111111111111111111111* @@ -1071,7 +1072,7 @@ L053736 L053868 0010* L053872 11100110011100* L053886 01101011110010* -L053900 11100110010001* +L053900 01010110010001* L053914 11101011110011* L053928 10100110010000* L053942 00000110011110* @@ -1082,7 +1083,7 @@ L053998 01000011111110* L054012 11011011110110* L054026 11111111110011* L054040 10100110010001* -L054054 10100110010011* +L054054 01000110010011* L054068 11010011111100* L054082 11111011111111* E1 @@ -1095,7 +1096,7 @@ E1 1 00000000 1 -00000000 +00100000 1 00000000 1 @@ -1104,6 +1105,6 @@ E1 00000000 0 * -C1315* +C55C9* U00000000000000000000000000000000* -988D +A829 diff --git a/Logic/68030_tk.lco b/Logic/68030_tk.lco index ae74bba..2b54089 100644 --- a/Logic/68030_tk.lco +++ b/Logic/68030_tk.lco @@ -16,8 +16,8 @@ RCS = "$Revision: 1.2 $"; Parent = m4a5.lci; SDS_File = m4a5.sds; Design = 68030_tk.tt4; -DATE = 10/26/16; -TIME = 22:26:30; +DATE = 11/18/16; +TIME = 19:32:41; Source_Format = Pure_VHDL; Type = TT2; Pre_Fit_Time = 1; @@ -77,7 +77,11 @@ Usercode_Format = Hex; [LOCATION ASSIGNMENTS] Layer = OFF; AHIGH_31_ = pin,4,-,B,-; +IPL_1_ = pin,56,-,F,-; +IPL_0_ = pin,67,-,G,-; A_DECODE_23_ = pin,85,-,H,-; +FC_0_ = pin,57,-,F,-; +A_1_ = pin,60,-,F,-; IPL_2_ = pin,68,-,G,-; FC_1_ = pin,58,-,F,-; AS_030 = pin,82,-,H,-; @@ -88,99 +92,98 @@ LDS_000 = pin,31,-,D,-; nEXP_SPACE = pin,14,-,-,-; BERR = pin,41,-,E,-; BG_030 = pin,21,-,C,-; -AHIGH_30_ = pin,5,-,B,-; BGACK_000 = pin,28,-,D,-; -AHIGH_29_ = pin,6,-,B,-; CLK_030 = pin,64,-,-,-; -AHIGH_28_ = pin,15,-,C,-; CLK_000 = pin,11,-,-,-; -AHIGH_27_ = pin,16,-,C,-; CLK_OSZI = pin,61,-,-,-; -AHIGH_26_ = pin,17,-,C,-; CLK_DIV_OUT = pin,65,-,G,-; -AHIGH_25_ = pin,18,-,C,-; -AHIGH_24_ = pin,19,-,C,-; +CLK_EXP = pin,10,-,B,-; FPU_CS = pin,78,-,H,-; -A_DECODE_22_ = pin,84,-,H,-; FPU_SENSE = pin,91,-,A,-; -A_DECODE_21_ = pin,94,-,A,-; DSACK1 = pin,81,-,H,-; -A_DECODE_20_ = pin,93,-,A,-; DTACK = pin,30,-,D,-; -A_DECODE_19_ = pin,97,-,A,-; AVEC = pin,92,-,A,-; -A_DECODE_18_ = pin,95,-,A,-; E = pin,66,-,G,-; -A_DECODE_17_ = pin,59,-,F,-; +AHIGH_30_ = pin,5,-,B,-; VPA = pin,36,-,-,-; -A_DECODE_16_ = pin,96,-,A,-; +AHIGH_29_ = pin,6,-,B,-; +AHIGH_28_ = pin,15,-,C,-; RST = pin,86,-,-,-; +AHIGH_27_ = pin,16,-,C,-; RESET = pin,3,-,B,-; +AHIGH_26_ = pin,17,-,C,-; +AHIGH_25_ = pin,18,-,C,-; AMIGA_ADDR_ENABLE = pin,33,-,D,-; +AHIGH_24_ = pin,19,-,C,-; AMIGA_BUS_DATA_DIR = pin,48,-,E,-; +A_DECODE_22_ = pin,84,-,H,-; AMIGA_BUS_ENABLE_LOW = pin,20,-,C,-; +A_DECODE_21_ = pin,94,-,A,-; AMIGA_BUS_ENABLE_HIGH = pin,34,-,D,-; +A_DECODE_20_ = pin,93,-,A,-; CIIN = pin,47,-,E,-; -IPL_1_ = pin,56,-,F,-; -IPL_0_ = pin,67,-,G,-; -FC_0_ = pin,57,-,F,-; -A_1_ = pin,60,-,F,-; +A_DECODE_19_ = pin,97,-,A,-; +A_DECODE_18_ = pin,95,-,A,-; +A_DECODE_17_ = pin,59,-,F,-; +A_DECODE_16_ = pin,96,-,A,-; +A_0_ = pin,69,-,G,-; SIZE_1_ = pin,79,-,H,-; +IPL_030_1_ = pin,7,-,B,-; +IPL_030_0_ = pin,8,-,B,-; IPL_030_2_ = pin,9,-,B,-; RW_000 = pin,80,-,H,-; BG_000 = pin,29,-,D,-; -SIZE_0_ = pin,70,-,G,-; BGACK_030 = pin,83,-,H,-; -CLK_EXP = pin,10,-,B,-; +SIZE_0_ = pin,70,-,G,-; VMA = pin,35,-,D,-; RW = pin,71,-,G,-; -A_0_ = pin,69,-,G,-; -IPL_030_1_ = pin,7,-,B,-; -IPL_030_0_ = pin,8,-,B,-; -cpu_est_2_ = node,-,-,A,12; -cpu_est_3_ = node,-,-,D,9; +cpu_est_1_ = node,-,-,D,6; +cpu_est_2_ = node,-,-,D,14; +cpu_est_3_ = node,-,-,D,2; cpu_est_0_ = node,-,-,G,9; -cpu_est_1_ = node,-,-,A,8; -inst_AMIGA_BUS_ENABLE_DMA_HIGH = node,-,-,C,14; -inst_AMIGA_BUS_ENABLE_DMA_LOW = node,-,-,F,1; -inst_AS_030_D0 = node,-,-,E,5; -inst_AS_030_000_SYNC = node,-,-,F,0; -inst_BGACK_030_INT_D = node,-,-,E,8; -inst_AS_000_DMA = node,-,-,A,1; +inst_AMIGA_BUS_ENABLE_DMA_HIGH = node,-,-,F,9; +inst_AMIGA_BUS_ENABLE_DMA_LOW = node,-,-,F,5; +inst_AS_030_D0 = node,-,-,H,2; +inst_AS_030_000_SYNC = node,-,-,B,13; +inst_BGACK_030_INT_D = node,-,-,H,13; +inst_AS_000_DMA = node,-,-,A,8; inst_DS_000_DMA = node,-,-,A,13; -CYCLE_DMA_0_ = node,-,-,A,10; -CYCLE_DMA_1_ = node,-,-,A,6; -inst_VPA_D = node,-,-,A,9; -CLK_000_D_3_ = node,-,-,D,10; -inst_DTACK_D0 = node,-,-,B,6; +inst_VPA_D = node,-,-,F,2; +CLK_000_D_3_ = node,-,-,F,13; +inst_DTACK_D0 = node,-,-,B,14; inst_RESET_OUT = node,-,-,G,5; +CLK_030_PE_1_ = node,-,-,A,2; +inst_AMIGA_DS = node,-,-,C,10; CLK_000_D_1_ = node,-,-,H,5; -CLK_000_D_0_ = node,-,-,C,9; -inst_CLK_OUT_PRE_50 = node,-,-,G,13; -inst_CLK_OUT_PRE_D = node,-,-,D,6; -IPL_D0_0_ = node,-,-,G,14; -IPL_D0_1_ = node,-,-,D,14; -IPL_D0_2_ = node,-,-,B,14; +CLK_000_D_0_ = node,-,-,D,13; +inst_CLK_OUT_PRE_50 = node,-,-,G,2; +inst_CLK_OUT_PRE_D = node,-,-,E,8; +IPL_D0_0_ = node,-,-,B,10; +IPL_D0_1_ = node,-,-,B,6; +IPL_D0_2_ = node,-,-,B,2; CLK_000_D_2_ = node,-,-,H,6; -CLK_000_D_4_ = node,-,-,B,10; -inst_LDS_000_INT = node,-,-,F,8; -inst_DS_000_ENABLE = node,-,-,B,13; -inst_UDS_000_INT = node,-,-,F,12; -SM_AMIGA_6_ = node,-,-,C,13; -SM_AMIGA_4_ = node,-,-,D,2; -SM_AMIGA_1_ = node,-,-,F,4; -SM_AMIGA_0_ = node,-,-,H,13; -RST_DLY_0_ = node,-,-,G,2; -RST_DLY_1_ = node,-,-,G,10; -RST_DLY_2_ = node,-,-,G,6; -inst_CLK_030_H = node,-,-,A,2; -inst_DSACK1_INT = node,-,-,H,2; -inst_AS_000_INT = node,-,-,C,10; -SM_AMIGA_5_ = node,-,-,C,6; -SM_AMIGA_3_ = node,-,-,D,13; -SM_AMIGA_2_ = node,-,-,A,5; -SM_AMIGA_i_7_ = node,-,-,C,2; -CIIN_0 = node,-,-,E,9; +CLK_000_D_4_ = node,-,-,C,14; +inst_LDS_000_INT = node,-,-,F,12; +inst_DS_000_ENABLE = node,-,-,C,13; +inst_UDS_000_INT = node,-,-,F,1; +SM_AMIGA_6_ = node,-,-,F,0; +SM_AMIGA_4_ = node,-,-,A,1; +SM_AMIGA_1_ = node,-,-,F,8; +SM_AMIGA_0_ = node,-,-,A,12; +CYCLE_DMA_0_ = node,-,-,A,6; +CYCLE_DMA_1_ = node,-,-,A,10; +CLK_030_PE_0_ = node,-,-,A,9; +RST_DLY_0_ = node,-,-,G,6; +RST_DLY_1_ = node,-,-,G,14; +RST_DLY_2_ = node,-,-,G,10; +inst_DSACK1_INT = node,-,-,A,5; +inst_AS_000_INT = node,-,-,C,2; +SM_AMIGA_5_ = node,-,-,G,13; +SM_AMIGA_3_ = node,-,-,C,6; +SM_AMIGA_2_ = node,-,-,C,9; +SM_AMIGA_i_7_ = node,-,-,F,4; +CLK_OUT_INTreg = node,-,-,D,10; +CIIN_0 = node,-,-,E,5; [GROUP ASSIGNMENTS] Layer = OFF; diff --git a/Logic/68030_tk.out b/Logic/68030_tk.out index c16a60b..e4e66e9 100644 --- a/Logic/68030_tk.out +++ b/Logic/68030_tk.out @@ -2195,4 +2195,6703 @@ 35 VPA 1 -1 -1 1 0 35 -1 29 DTACK 1 -1 -1 1 1 29 -1 20 BG_030 1 -1 -1 1 3 20 -1 - 10 CLK_000 1 -1 -1 1 2 10 -1 \ No newline at end of file + 10 CLK_000 1 -1 -1 1 2 10 -1 +115 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 2 3 4 6 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 4 5 7 41 -1 1 0 21 + 79 RW_000 5 339 7 3 4 5 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 3 5 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 5 6 7 30 -1 1 0 21 + 68 A_0_ 5 345 6 2 0 2 68 -1 3 0 21 + 70 RW 5 344 6 2 3 7 70 -1 2 0 21 + 78 SIZE_1_ 5 337 7 1 2 78 -1 3 0 21 + 69 SIZE_0_ 5 340 6 1 2 69 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 + 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 341 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 322 SM_AMIGA_6_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 3 0 21 + 309 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 311 CLK_000_D_0_ 3 -1 3 6 0 1 3 5 6 7 -1 -1 1 0 21 + 310 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 2 3 1 2 3 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 335 SM_AMIGA_i_7_ 3 -1 1 3 1 2 7 -1 -1 3 1 21 + 324 SM_AMIGA_1_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21 + 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 332 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 325 SM_AMIGA_0_ 3 -1 7 2 1 7 -1 -1 3 0 21 + 323 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 331 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 + 330 inst_DSACK1_INT 3 -1 6 2 6 7 -1 -1 2 0 21 + 321 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 313 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 307 CLK_000_D_3_ 3 -1 2 2 1 7 -1 -1 1 0 21 + 306 inst_VPA_D 3 -1 3 2 0 3 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 329 inst_CLK_030_H 3 -1 5 1 5 -1 -1 8 0 21 + 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 + 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 5 1 5 -1 -1 4 0 21 + 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 340 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 320 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 3 0 21 + 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 318 CLK_000_D_4_ 3 -1 7 1 1 -1 -1 1 0 21 + 317 CLK_000_D_2_ 3 -1 7 1 2 -1 -1 1 0 21 + 316 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 315 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 314 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 + 312 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 308 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 + 59 A_1_ 1 -1 -1 2 2 6 59 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 63 CLK_030 1 -1 -1 1 5 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 +112 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 + 81 AS_030 5 -1 7 4 3 4 5 7 81 -1 1 0 21 + 79 RW_000 5 338 7 3 2 4 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 2 6 7 30 -1 1 0 21 + 68 A_0_ 5 -1 6 2 1 2 68 -1 2 0 21 + 70 RW 5 -1 6 2 5 7 70 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 2 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 337 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 340 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 339 1 0 6 -1 9 0 21 + 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 341 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 308 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 310 CLK_000_D_0_ 3 -1 2 6 0 1 3 5 6 7 -1 -1 1 0 21 + 309 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 + 322 SM_AMIGA_6_ 3 -1 5 5 1 2 5 6 7 -1 -1 3 0 21 + 295 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 323 SM_AMIGA_4_ 3 -1 6 3 0 5 6 -1 -1 3 0 21 + 303 CYCLE_DMA_0_ 3 -1 0 3 0 1 2 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 + 302 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 301 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 + 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 334 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 5 0 21 + 326 RST_DLY_0_ 3 -1 0 2 0 6 -1 -1 4 0 21 + 304 CYCLE_DMA_1_ 3 -1 1 2 1 2 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 335 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 325 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 + 324 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 319 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 318 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 331 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 0 2 0 6 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 0 2 0 6 -1 -1 2 1 21 + 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 306 CLK_000_D_3_ 3 -1 6 2 3 5 -1 -1 1 0 21 + 305 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 + 340 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 339 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 337 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 329 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 + 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 338 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 332 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 3 0 21 + 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 336 N_147 3 -1 4 1 4 -1 -1 2 0 21 + 330 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 321 inst_BGACK_030_INT_D 3 -1 3 1 5 -1 -1 1 0 21 + 317 CLK_000_D_4_ 3 -1 3 1 5 -1 -1 1 0 21 + 316 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 315 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 314 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 307 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 3 1 2 -1 -1 1 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 63 CLK_030 1 -1 -1 1 2 63 -1 + 59 A_1_ 1 -1 -1 1 3 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 2 10 -1 +112 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 + 81 AS_030 5 -1 7 4 3 4 5 7 81 -1 1 0 21 + 79 RW_000 5 338 7 3 2 4 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 2 6 7 30 -1 1 0 21 + 68 A_0_ 5 -1 6 2 1 2 68 -1 2 0 21 + 70 RW 5 -1 6 2 5 7 70 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 2 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 2 69 -1 2 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 337 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 340 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 339 1 0 6 -1 9 0 21 + 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 341 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 306 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 308 CLK_000_D_0_ 3 -1 2 6 0 1 3 5 6 7 -1 -1 1 0 21 + 307 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 + 322 SM_AMIGA_6_ 3 -1 5 5 1 2 5 6 7 -1 -1 3 0 21 + 296 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 323 SM_AMIGA_4_ 3 -1 6 3 0 5 6 -1 -1 3 0 21 + 316 CYCLE_DMA_0_ 3 -1 0 3 0 1 2 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 + 302 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 8 0 21 + 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 301 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 6 0 21 + 334 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 5 0 21 + 326 RST_DLY_0_ 3 -1 0 2 0 6 -1 -1 4 0 21 + 317 CYCLE_DMA_1_ 3 -1 1 2 1 2 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 335 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 325 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 + 324 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 319 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 318 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 331 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 0 2 0 6 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 0 2 0 6 -1 -1 2 1 21 + 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 310 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 304 CLK_000_D_3_ 3 -1 6 2 3 5 -1 -1 1 0 21 + 303 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 + 340 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 339 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 337 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 338 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 329 inst_CLK_030_H 3 -1 2 1 2 -1 -1 4 1 21 + 332 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 3 0 21 + 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 336 N_235 3 -1 4 1 4 -1 -1 2 0 21 + 330 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 321 inst_BGACK_030_INT_D 3 -1 3 1 5 -1 -1 1 0 21 + 315 CLK_000_D_4_ 3 -1 3 1 5 -1 -1 1 0 21 + 314 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 313 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 312 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 311 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 + 309 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 305 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 3 1 2 -1 -1 1 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 63 CLK_030 1 -1 -1 1 2 63 -1 + 59 A_1_ 1 -1 -1 1 3 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 2 10 -1 +112 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 0 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 2 4 6 7 41 -1 1 0 21 + 79 RW_000 5 338 7 3 2 4 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 2 6 7 30 -1 1 0 21 + 68 A_0_ 5 -1 6 2 2 6 68 -1 2 0 21 + 70 RW 5 -1 6 2 5 7 70 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 6 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 6 69 -1 2 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 337 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 340 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 339 1 0 6 -1 9 0 21 + 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 341 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 306 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 308 CLK_000_D_0_ 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 307 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 320 SM_AMIGA_6_ 3 -1 1 6 0 1 2 5 6 7 -1 -1 3 0 21 + 300 inst_AS_030_000_SYNC 3 -1 5 3 1 3 5 -1 -1 7 0 21 + 296 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 335 SM_AMIGA_i_7_ 3 -1 1 3 1 5 7 -1 -1 3 1 21 + 321 SM_AMIGA_4_ 3 -1 1 3 0 1 5 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 5 3 0 3 5 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 302 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 8 0 21 + 334 SM_AMIGA_2_ 3 -1 0 2 0 2 -1 -1 5 0 21 + 328 CYCLE_DMA_1_ 3 -1 6 2 2 6 -1 -1 4 0 21 + 301 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 7 2 1 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 2 2 2 7 -1 -1 3 0 21 + 317 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 316 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 3 0 21 + 331 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 + 318 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 310 inst_CLK_OUT_PRE_D 3 -1 6 2 1 6 -1 -1 1 0 21 + 309 inst_CLK_OUT_PRE_50 3 -1 7 2 6 7 -1 -1 1 0 21 + 304 CLK_000_D_3_ 3 -1 3 2 1 6 -1 -1 1 0 21 + 303 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 + 340 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 339 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 337 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 338 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 329 inst_CLK_030_H 3 -1 2 1 2 -1 -1 4 0 21 + 324 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 + 332 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 3 0 21 + 327 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 3 0 21 + 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 336 N_235 3 -1 4 1 4 -1 -1 2 0 21 + 330 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 326 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 + 325 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 + 319 inst_BGACK_030_INT_D 3 -1 4 1 5 -1 -1 1 0 21 + 315 CLK_000_D_4_ 3 -1 6 1 1 -1 -1 1 0 21 + 314 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21 + 313 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 + 312 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 311 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 + 305 inst_DTACK_D0 3 -1 3 1 0 -1 -1 1 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 1 2 -1 -1 1 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 3 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 59 A_1_ 1 -1 -1 2 3 6 59 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 2 63 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 3 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 5 10 -1 +110 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 1 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 2 4 5 7 41 -1 1 0 21 + 31 UDS_000 5 -1 3 4 2 5 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 4 2 5 6 7 30 -1 1 0 21 + 79 RW_000 5 338 7 3 2 4 6 79 -1 4 0 21 + 68 A_0_ 5 -1 6 2 5 6 68 -1 2 0 21 + 70 RW 5 -1 6 2 5 7 70 -1 1 0 21 + 78 SIZE_1_ 5 -1 7 1 5 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 5 69 -1 2 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 337 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 336 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 335 1 0 6 -1 9 0 21 + 82 BGACK_030 5 340 7 0 82 -1 3 0 21 + 34 VMA 5 341 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 339 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 340 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 306 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 308 CLK_000_D_0_ 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 307 CLK_000_D_1_ 3 -1 0 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 320 SM_AMIGA_6_ 3 -1 2 4 2 5 6 7 -1 -1 3 0 21 + 300 inst_AS_030_000_SYNC 3 -1 1 3 1 2 3 -1 -1 7 0 21 + 301 inst_AS_000_DMA 3 -1 5 3 2 5 7 -1 -1 4 0 21 + 296 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 333 SM_AMIGA_i_7_ 3 -1 2 3 1 2 7 -1 -1 3 1 21 + 299 inst_AS_030_D0 3 -1 7 3 1 3 4 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 302 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 7 0 21 + 332 SM_AMIGA_2_ 3 -1 0 2 0 6 -1 -1 5 0 21 + 341 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 317 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 316 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 329 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 318 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 + 310 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 + 309 inst_CLK_OUT_PRE_50 3 -1 6 2 3 6 -1 -1 1 0 21 + 304 CLK_000_D_3_ 3 -1 6 2 2 6 -1 -1 1 0 21 + 303 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 + 337 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 336 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 335 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 331 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 338 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 327 inst_CLK_030_H 3 -1 2 1 2 -1 -1 4 0 21 + 324 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 + 330 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21 + 339 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 334 N_72 3 -1 4 1 4 -1 -1 2 0 21 + 328 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 326 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 + 325 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 + 319 inst_BGACK_030_INT_D 3 -1 1 1 1 -1 -1 1 0 21 + 315 CLK_000_D_4_ 3 -1 6 1 2 -1 -1 1 0 21 + 314 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 313 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 312 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 + 311 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 305 inst_DTACK_D0 3 -1 5 1 0 -1 -1 1 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 1 2 -1 -1 1 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 1 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 1 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 1 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 1 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 1 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 1 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 63 CLK_030 1 -1 -1 2 2 5 63 -1 + 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 59 A_1_ 1 -1 -1 1 5 59 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 5 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 4 10 -1 +116 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 1 2 3 4 5 7 81 -1 1 0 21 + 79 RW_000 5 339 7 3 0 4 6 79 -1 4 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 + 70 RW 5 344 6 2 1 7 70 -1 2 0 21 + 40 BERR 5 -1 4 2 0 3 40 -1 1 0 21 + 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 342 6 1 5 69 -1 3 0 21 + 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 + 82 BGACK_030 5 341 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 340 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 322 SM_AMIGA_6_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 5 3 2 3 5 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 335 SM_AMIGA_i_7_ 3 -1 2 3 2 5 7 -1 -1 3 1 21 + 294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 6 0 21 + 334 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 + 333 SM_AMIGA_3_ 3 -1 3 2 0 3 -1 -1 5 0 21 + 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 332 SM_AMIGA_5_ 3 -1 2 2 2 3 -1 -1 3 0 21 + 325 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 + 324 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 323 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 3 0 21 + 320 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 331 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 6 2 3 6 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 1 2 0 3 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 3 2 1 2 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 8 0 21 + 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 329 inst_CLK_030_H 3 -1 0 1 0 -1 -1 4 1 21 + 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 318 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 + 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 317 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 + 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 330 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 316 CLK_000_D_4_ 3 -1 1 1 2 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 + 59 A_1_ 1 -1 -1 2 2 5 59 -1 + 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 2 10 -1 +114 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 79 RW_000 5 338 7 3 0 4 6 79 -1 4 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 + 70 RW 5 345 6 2 5 7 70 -1 2 0 21 + 78 SIZE_1_ 5 335 7 1 1 78 -1 3 0 21 + 69 SIZE_0_ 5 336 6 1 1 69 -1 3 0 21 + 68 A_0_ 5 341 6 1 1 68 -1 3 0 21 + 40 BERR 5 -1 4 1 5 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 337 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 343 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 342 1 0 6 -1 9 0 21 + 82 BGACK_030 5 340 7 0 82 -1 3 0 21 + 34 VMA 5 344 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 339 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 340 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 0 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 320 SM_AMIGA_6_ 3 -1 0 5 0 1 2 5 7 -1 -1 3 0 21 + 300 inst_AS_030_000_SYNC 3 -1 2 3 0 2 3 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 333 SM_AMIGA_i_7_ 3 -1 2 3 0 2 7 -1 -1 3 1 21 + 323 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 0 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 1 1 21 + 324 RST_DLY_0_ 3 -1 6 2 0 6 -1 -1 4 0 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 4 0 21 + 344 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 330 SM_AMIGA_5_ 3 -1 2 2 2 5 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 + 329 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 328 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 + 326 RST_DLY_2_ 3 -1 6 2 0 6 -1 -1 2 0 21 + 325 RST_DLY_1_ 3 -1 0 2 0 6 -1 -1 2 1 21 + 319 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 0 2 0 2 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 3 2 3 4 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 1 2 0 2 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 + 343 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 342 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 337 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 7 0 21 + 332 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 + 331 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 + 338 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 327 inst_CLK_030_H 3 -1 0 1 0 -1 -1 4 0 21 + 341 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 336 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 335 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 5 1 5 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 5 1 5 -1 -1 3 0 21 + 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 339 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 334 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 2 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 2 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 0 10 -1 +115 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 1 4 5 7 41 -1 1 0 21 + 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 + 70 RW 5 344 6 2 5 7 70 -1 2 0 21 + 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 342 6 1 5 69 -1 3 0 21 + 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 + 82 BGACK_030 5 341 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 340 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 309 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 311 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 + 310 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 + 322 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 + 295 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 325 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 5 3 0 1 5 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 0 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 + 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 + 326 RST_DLY_0_ 3 -1 5 2 3 5 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 0 2 0 1 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 + 324 SM_AMIGA_1_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 323 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 320 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 331 inst_AS_000_INT 3 -1 7 2 4 7 -1 -1 2 0 21 + 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 3 2 3 5 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 5 2 3 5 -1 -1 2 1 21 + 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 313 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 306 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 + 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 + 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 + 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 318 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 + 317 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 316 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 315 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 314 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 312 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 308 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 307 CLK_000_D_3_ 3 -1 6 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 1 63 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +115 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 1 4 5 7 41 -1 1 0 21 + 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 + 70 RW 5 344 6 2 5 7 70 -1 2 0 21 + 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 342 6 1 5 69 -1 3 0 21 + 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 + 82 BGACK_030 5 341 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 340 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 309 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 311 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 + 310 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 + 322 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 + 295 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 325 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 5 3 0 1 5 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 0 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 + 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 + 326 RST_DLY_0_ 3 -1 5 2 3 5 -1 -1 4 0 21 + 305 CYCLE_DMA_1_ 3 -1 0 2 0 1 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 + 324 SM_AMIGA_1_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 323 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 320 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 331 inst_AS_000_INT 3 -1 7 2 4 7 -1 -1 2 0 21 + 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 3 2 3 5 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 5 2 3 5 -1 -1 2 1 21 + 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 313 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 306 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 + 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 + 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 + 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 318 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 + 317 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 316 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 315 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 314 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 312 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 308 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 307 CLK_000_D_3_ 3 -1 6 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 1 63 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +115 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 1 4 5 7 41 -1 1 0 21 + 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 + 70 RW 5 344 6 2 5 7 70 -1 2 0 21 + 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 342 6 1 5 69 -1 3 0 21 + 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 + 82 BGACK_030 5 341 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 340 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 308 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 310 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 + 309 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 + 322 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 + 295 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 325 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 5 3 0 1 5 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 0 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 8 0 21 + 302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 + 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 + 326 RST_DLY_0_ 3 -1 5 2 3 5 -1 -1 4 0 21 + 318 CYCLE_DMA_1_ 3 -1 0 2 0 1 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 + 324 SM_AMIGA_1_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 323 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 320 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 331 inst_AS_000_INT 3 -1 7 2 4 7 -1 -1 2 0 21 + 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 3 2 3 5 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 5 2 3 5 -1 -1 2 1 21 + 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 305 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 + 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 + 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 + 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 336 N_270 3 -1 4 1 4 -1 -1 2 0 21 + 317 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 + 316 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 315 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 314 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 313 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 307 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 306 CLK_000_D_3_ 3 -1 6 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 1 63 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +115 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 1 4 5 7 41 -1 1 0 21 + 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 + 70 RW 5 344 6 2 5 7 70 -1 2 0 21 + 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 342 6 1 5 69 -1 3 0 21 + 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 + 82 BGACK_030 5 341 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 340 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 308 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 310 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 + 309 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 + 322 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 + 295 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 325 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 318 CYCLE_DMA_0_ 3 -1 5 3 0 1 5 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 0 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 8 0 21 + 302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 7 0 21 + 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 + 326 RST_DLY_0_ 3 -1 5 2 3 5 -1 -1 4 0 21 + 304 CYCLE_DMA_1_ 3 -1 0 2 0 1 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 + 324 SM_AMIGA_1_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 323 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 320 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 331 inst_AS_000_INT 3 -1 7 2 4 7 -1 -1 2 0 21 + 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 3 2 3 5 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 5 2 3 5 -1 -1 2 1 21 + 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 305 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 8 0 21 + 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 + 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 + 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 336 N_270 3 -1 4 1 4 -1 -1 2 0 21 + 317 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 + 316 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 315 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 314 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 313 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 307 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 306 CLK_000_D_3_ 3 -1 6 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 1 63 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 2 4 5 7 41 -1 1 0 21 + 79 RW_000 5 348 7 4 2 4 5 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 4 2 5 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 4 2 5 6 7 30 -1 1 0 21 + 70 RW 5 355 6 2 5 7 70 -1 2 0 21 + 80 DSACK1 5 -1 7 2 2 5 80 -1 1 0 21 + 78 SIZE_1_ 5 345 7 1 1 78 -1 3 0 21 + 69 SIZE_0_ 5 346 6 1 1 69 -1 3 0 21 + 68 A_0_ 5 351 6 1 1 68 -1 3 0 21 + 40 BERR 5 -1 4 1 3 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 + 82 BGACK_030 5 350 7 0 82 -1 3 0 21 + 34 VMA 5 354 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 349 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 308 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 310 CLK_000_D_0_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 309 CLK_000_D_1_ 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 321 SM_AMIGA_6_ 3 -1 6 5 1 2 5 6 7 -1 -1 3 0 21 + 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 7 0 21 + 343 SM_AMIGA_i_7_ 3 -1 0 3 0 6 7 -1 -1 3 1 21 + 322 SM_AMIGA_4_ 3 -1 0 3 0 3 5 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 0 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 0 3 4 -1 -1 1 0 21 + 328 DMA_CYCLE_FINISHED_6_ 3 -1 2 2 2 5 -1 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 10 0 21 + 333 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 2 5 -1 -1 9 0 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 5 2 2 5 -1 -1 8 0 21 + 332 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 2 5 -1 -1 8 1 21 + 331 DMA_CYCLE_FINISHED_3_ 3 -1 2 2 2 5 -1 -1 8 1 21 + 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 8 0 21 + 341 SM_AMIGA_2_ 3 -1 3 2 2 3 -1 -1 5 0 21 + 335 CYCLE_DMA_1_ 3 -1 2 2 2 5 -1 -1 4 0 21 + 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 339 SM_AMIGA_5_ 3 -1 2 2 0 2 -1 -1 3 0 21 + 324 SM_AMIGA_0_ 3 -1 7 2 0 7 -1 -1 3 0 21 + 323 SM_AMIGA_1_ 3 -1 2 2 2 7 -1 -1 3 0 21 + 319 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 318 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 317 CLK_000_D_4_ 3 -1 0 2 0 6 -1 -1 1 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 306 CLK_000_D_3_ 3 -1 0 2 0 6 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 1 1 21 + 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 9 0 21 + 330 DMA_CYCLE_FINISHED_4_ 3 -1 5 1 5 -1 -1 8 1 21 + 329 DMA_CYCLE_FINISHED_5_ 3 -1 2 1 2 -1 -1 8 1 21 + 334 DMA_CYCLE_FINISHED_0_ 3 -1 5 1 5 -1 -1 7 0 21 + 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 325 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 + 354 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 327 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 + 326 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 + 316 CLK_000_D_2_ 3 -1 7 1 0 -1 -1 1 0 21 + 315 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 314 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 307 inst_DTACK_D0 3 -1 3 1 3 -1 -1 1 0 21 + 305 inst_VPA_D 3 -1 0 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 63 CLK_030 1 -1 -1 1 5 63 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 3 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 2 4 5 7 41 -1 1 0 21 + 79 RW_000 5 348 7 4 2 4 5 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 4 2 5 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 4 2 5 6 7 30 -1 1 0 21 + 70 RW 5 355 6 2 5 7 70 -1 2 0 21 + 80 DSACK1 5 -1 7 2 2 5 80 -1 1 0 21 + 78 SIZE_1_ 5 346 7 1 1 78 -1 3 0 21 + 69 SIZE_0_ 5 345 6 1 1 69 -1 3 0 21 + 68 A_0_ 5 351 6 1 1 68 -1 3 0 21 + 40 BERR 5 -1 4 1 3 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 + 82 BGACK_030 5 350 7 0 82 -1 3 0 21 + 34 VMA 5 354 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 349 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 308 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 310 CLK_000_D_0_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 309 CLK_000_D_1_ 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 321 SM_AMIGA_6_ 3 -1 6 5 1 2 5 6 7 -1 -1 3 0 21 + 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 7 0 21 + 343 SM_AMIGA_i_7_ 3 -1 0 3 0 6 7 -1 -1 3 1 21 + 322 SM_AMIGA_4_ 3 -1 0 3 0 3 5 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 0 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 0 3 4 -1 -1 1 0 21 + 328 DMA_CYCLE_FINISHED_6_ 3 -1 2 2 2 5 -1 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 10 0 21 + 333 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 2 5 -1 -1 9 0 21 + 332 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 2 5 -1 -1 8 1 21 + 331 DMA_CYCLE_FINISHED_3_ 3 -1 2 2 2 5 -1 -1 8 1 21 + 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 8 0 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 5 2 2 5 -1 -1 7 0 21 + 341 SM_AMIGA_2_ 3 -1 3 2 2 3 -1 -1 5 0 21 + 335 CYCLE_DMA_1_ 3 -1 2 2 2 5 -1 -1 4 0 21 + 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 339 SM_AMIGA_5_ 3 -1 2 2 0 2 -1 -1 3 0 21 + 324 SM_AMIGA_0_ 3 -1 7 2 0 7 -1 -1 3 0 21 + 323 SM_AMIGA_1_ 3 -1 2 2 2 7 -1 -1 3 0 21 + 319 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 318 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 317 CLK_000_D_4_ 3 -1 0 2 0 6 -1 -1 1 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 306 CLK_000_D_3_ 3 -1 0 2 0 6 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 1 1 21 + 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 9 0 21 + 330 DMA_CYCLE_FINISHED_4_ 3 -1 5 1 5 -1 -1 8 1 21 + 329 DMA_CYCLE_FINISHED_5_ 3 -1 2 1 2 -1 -1 8 1 21 + 334 DMA_CYCLE_FINISHED_0_ 3 -1 5 1 5 -1 -1 7 0 21 + 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 325 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 + 354 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 346 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 345 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 327 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 + 326 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 + 316 CLK_000_D_2_ 3 -1 7 1 0 -1 -1 1 0 21 + 315 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 314 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 307 inst_DTACK_D0 3 -1 3 1 3 -1 -1 1 0 21 + 305 inst_VPA_D 3 -1 0 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 63 CLK_030 1 -1 -1 1 5 63 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 3 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 + 81 AS_030 5 -1 7 5 0 2 3 4 7 81 -1 1 0 21 + 79 RW_000 5 347 7 4 0 4 5 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 4 0 5 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 4 0 5 6 7 30 -1 1 0 21 + 80 DSACK1 5 -1 7 3 0 5 6 80 -1 1 0 21 + 68 A_0_ 5 348 6 2 2 5 68 -1 3 0 21 + 70 RW 5 354 6 2 2 7 70 -1 2 0 21 + 78 SIZE_1_ 5 345 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 355 6 1 5 69 -1 3 0 21 + 40 BERR 5 -1 4 1 3 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 346 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 350 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 349 1 0 6 -1 9 0 21 + 82 BGACK_030 5 352 7 0 82 -1 3 0 21 + 34 VMA 5 353 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 351 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 352 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 1 6 0 1 2 3 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21 + 335 CYCLE_DMA_1_ 3 -1 2 4 0 2 5 6 -1 -1 4 0 21 + 320 SM_AMIGA_6_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 4 0 5 6 7 -1 -1 1 0 21 + 327 DMA_CYCLE_FINISHED_6_ 3 -1 6 3 0 5 6 -1 -1 9 0 21 + 300 inst_AS_030_000_SYNC 3 -1 7 3 2 3 7 -1 -1 7 0 21 + 323 SM_AMIGA_0_ 3 -1 1 3 1 2 7 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 1 3 1 2 3 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 7 -1 -1 1 0 21 + 331 DMA_CYCLE_FINISHED_2_ 3 -1 0 2 0 5 -1 -1 10 0 21 + 330 DMA_CYCLE_FINISHED_3_ 3 -1 5 2 5 6 -1 -1 10 0 21 + 329 DMA_CYCLE_FINISHED_4_ 3 -1 0 2 0 5 -1 -1 9 0 21 + 328 DMA_CYCLE_FINISHED_5_ 3 -1 5 2 0 5 -1 -1 9 0 21 + 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 9 0 21 + 332 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 0 5 -1 -1 8 0 21 + 333 DMA_CYCLE_FINISHED_0_ 3 -1 0 2 0 5 -1 -1 7 0 21 + 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21 + 341 SM_AMIGA_2_ 3 -1 3 2 0 3 -1 -1 5 0 21 + 324 RST_DLY_0_ 3 -1 1 2 1 6 -1 -1 4 0 21 + 296 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 343 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 + 322 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 + 326 RST_DLY_2_ 3 -1 6 2 1 6 -1 -1 2 0 21 + 325 RST_DLY_1_ 3 -1 1 2 1 6 -1 -1 2 1 21 + 319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 1 2 1 6 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 3 2 1 3 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 2 2 2 6 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 + 350 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 349 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 8 0 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 1 6 -1 -1 7 0 21 + 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 + 347 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 355 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 353 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 348 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 339 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 3 0 21 + 334 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21 + 354 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 6 1 2 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 2 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 2 1 3 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 4 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 59 A_1_ 1 -1 -1 2 0 5 59 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 5 63 -1 + 35 VPA 1 -1 -1 1 4 35 -1 + 29 DTACK 1 -1 -1 1 2 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 79 RW_000 5 348 7 5 0 1 4 5 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 1 4 5 7 41 -1 1 0 21 + 70 RW 5 354 6 2 5 7 70 -1 2 0 21 + 80 DSACK1 5 -1 7 2 1 5 80 -1 1 0 21 + 40 BERR 5 -1 4 2 0 3 40 -1 1 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 345 7 1 2 78 -1 3 0 21 + 69 SIZE_0_ 5 355 6 1 2 69 -1 3 0 21 + 68 A_0_ 5 347 6 1 2 68 -1 3 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 346 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 350 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 349 1 0 6 -1 9 0 21 + 82 BGACK_030 5 352 7 0 82 -1 3 0 21 + 34 VMA 5 353 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 351 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 352 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 2 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 7 0 21 + 302 inst_AS_000_DMA 3 -1 5 3 0 5 7 -1 -1 6 0 21 + 335 CYCLE_DMA_1_ 3 -1 0 3 0 1 5 -1 -1 4 0 21 + 333 DMA_CYCLE_FINISHED_0_ 3 -1 1 3 0 1 5 -1 -1 4 0 21 + 332 DMA_CYCLE_FINISHED_1_ 3 -1 5 3 0 1 5 -1 -1 4 0 21 + 331 DMA_CYCLE_FINISHED_2_ 3 -1 1 3 0 1 5 -1 -1 4 0 21 + 330 DMA_CYCLE_FINISHED_3_ 3 -1 1 3 0 1 5 -1 -1 4 0 21 + 296 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 343 SM_AMIGA_i_7_ 3 -1 5 3 2 5 7 -1 -1 3 1 21 + 323 SM_AMIGA_0_ 3 -1 6 3 5 6 7 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 2 3 2 3 5 -1 -1 3 0 21 + 320 SM_AMIGA_6_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 2 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 2 3 2 3 4 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 + 341 SM_AMIGA_2_ 3 -1 0 2 0 7 -1 -1 5 0 21 + 340 SM_AMIGA_3_ 3 -1 3 2 0 3 -1 -1 5 0 21 + 329 DMA_CYCLE_FINISHED_4_ 3 -1 5 2 1 5 -1 -1 4 1 21 + 327 DMA_CYCLE_FINISHED_6_ 3 -1 1 2 1 5 -1 -1 4 1 21 + 353 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 2 2 0 3 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 3 2 0 3 -1 -1 1 0 21 + 350 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 349 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 8 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 1 1 1 -1 -1 4 0 21 + 336 inst_CLK_030_H 3 -1 0 1 0 -1 -1 4 1 21 + 328 DMA_CYCLE_FINISHED_5_ 3 -1 1 1 1 -1 -1 4 1 21 + 324 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 355 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 347 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 339 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 3 0 21 + 334 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 3 0 21 + 354 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 326 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 325 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 316 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 1 1 3 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 3 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 + 63 CLK_030 1 -1 -1 2 0 5 63 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 2 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 2 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 0 1 3 4 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 2 4 5 7 41 -1 1 0 21 + 79 RW_000 5 347 7 4 2 4 5 6 79 -1 4 0 21 + 68 A_0_ 5 348 6 2 1 5 68 -1 3 0 21 + 70 RW 5 354 6 2 1 7 70 -1 2 0 21 + 80 DSACK1 5 -1 7 2 2 5 80 -1 1 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 345 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 355 6 1 5 69 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 346 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 351 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 349 1 0 6 -1 9 0 21 + 82 BGACK_030 5 352 7 0 82 -1 3 0 21 + 34 VMA 5 353 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 350 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 352 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 5 6 0 1 3 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 + 320 SM_AMIGA_6_ 3 -1 5 4 1 3 5 7 -1 -1 3 0 21 + 300 inst_AS_030_000_SYNC 3 -1 7 3 3 5 7 -1 -1 7 0 21 + 296 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 324 CYCLE_DMA_0_ 3 -1 7 3 2 5 7 -1 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 6 3 5 6 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 1 3 0 1 6 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 3 3 0 1 3 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 0 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 7 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 9 0 21 + 333 DMA_CYCLE_FINISHED_2_ 3 -1 5 2 2 5 -1 -1 8 0 21 + 332 DMA_CYCLE_FINISHED_3_ 3 -1 5 2 2 5 -1 -1 8 0 21 + 329 DMA_CYCLE_FINISHED_6_ 3 -1 2 2 2 5 -1 -1 8 0 21 + 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 7 0 21 + 334 DMA_CYCLE_FINISHED_1_ 3 -1 2 2 2 5 -1 -1 6 0 21 + 341 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 5 0 21 + 326 RST_DLY_0_ 3 -1 0 2 0 6 -1 -1 4 0 21 + 325 CYCLE_DMA_1_ 3 -1 5 2 2 5 -1 -1 4 0 21 + 353 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 343 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 318 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 0 2 0 6 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 6 2 0 6 -1 -1 2 1 21 + 319 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 6 2 4 6 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 5 2 4 5 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 3 2 0 3 -1 -1 1 0 21 + 351 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 349 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 336 inst_CLK_030_H 3 -1 2 1 2 -1 -1 8 0 21 + 331 DMA_CYCLE_FINISHED_4_ 3 -1 2 1 2 -1 -1 6 1 21 + 330 DMA_CYCLE_FINISHED_5_ 3 -1 5 1 5 -1 -1 6 1 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 2 1 2 -1 -1 5 0 21 + 340 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 335 DMA_CYCLE_FINISHED_0_ 3 -1 2 1 2 -1 -1 5 0 21 + 347 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 355 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 348 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 339 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21 + 354 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 350 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 4 1 5 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 7 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 59 A_1_ 1 -1 -1 2 0 6 59 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 2 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 7 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 5 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 0 1 2 3 4 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 2 4 5 7 41 -1 1 0 21 + 79 RW_000 5 348 7 4 2 4 5 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 4 2 5 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 4 2 5 6 7 30 -1 1 0 21 + 68 A_0_ 5 351 6 2 2 5 68 -1 3 0 21 + 70 RW 5 355 6 2 1 7 70 -1 2 0 21 + 80 DSACK1 5 -1 7 2 2 5 80 -1 1 0 21 + 78 SIZE_1_ 5 345 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 346 6 1 5 69 -1 3 0 21 + 40 BERR 5 -1 4 1 3 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 + 82 BGACK_030 5 350 7 0 82 -1 3 0 21 + 34 VMA 5 354 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 349 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 320 SM_AMIGA_6_ 3 -1 6 5 1 2 5 6 7 -1 -1 3 0 21 + 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 7 0 21 + 343 SM_AMIGA_i_7_ 3 -1 6 3 0 6 7 -1 -1 3 1 21 + 324 CYCLE_DMA_0_ 3 -1 7 3 2 5 7 -1 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 3 3 0 2 3 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 0 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 0 3 4 -1 -1 1 0 21 + 333 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 2 5 -1 -1 13 0 21 + 332 DMA_CYCLE_FINISHED_3_ 3 -1 2 2 2 5 -1 -1 13 0 21 + 334 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 2 5 -1 -1 11 0 21 + 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 10 0 21 + 331 DMA_CYCLE_FINISHED_4_ 3 -1 2 2 2 5 -1 -1 9 1 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 5 2 2 5 -1 -1 8 0 21 + 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 8 0 21 + 325 CYCLE_DMA_1_ 3 -1 2 2 2 5 -1 -1 4 0 21 + 296 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 339 SM_AMIGA_5_ 3 -1 5 2 5 6 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 1 2 5 6 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 + 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 9 0 21 + 330 DMA_CYCLE_FINISHED_5_ 3 -1 2 1 2 -1 -1 9 1 21 + 329 DMA_CYCLE_FINISHED_6_ 3 -1 2 1 2 -1 -1 9 1 21 + 335 DMA_CYCLE_FINISHED_0_ 3 -1 5 1 5 -1 -1 8 0 21 + 341 SM_AMIGA_2_ 3 -1 3 1 3 -1 -1 5 0 21 + 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 326 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 + 354 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 + 316 CLK_000_D_4_ 3 -1 5 1 6 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 4 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 0 1 3 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 6 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 4 67 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 5 63 -1 + 59 A_1_ 1 -1 -1 1 0 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 + 81 AS_030 5 -1 7 5 0 3 4 5 7 81 -1 1 0 21 + 79 RW_000 5 347 7 4 2 4 5 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 4 2 5 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 4 2 5 6 7 30 -1 1 0 21 + 70 RW 5 352 6 2 5 7 70 -1 2 0 21 + 80 DSACK1 5 -1 7 2 2 6 80 -1 1 0 21 + 78 SIZE_1_ 5 345 7 1 3 78 -1 3 0 21 + 69 SIZE_0_ 5 350 6 1 3 69 -1 3 0 21 + 68 A_0_ 5 353 6 1 3 68 -1 3 0 21 + 40 BERR 5 -1 4 1 1 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 346 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 355 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 354 1 0 6 -1 9 0 21 + 82 BGACK_030 5 349 7 0 82 -1 3 0 21 + 34 VMA 5 351 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 348 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 349 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 5 6 0 1 2 3 5 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 + 324 CYCLE_DMA_0_ 3 -1 0 4 0 2 5 6 -1 -1 3 0 21 + 320 SM_AMIGA_6_ 3 -1 2 4 2 3 5 7 -1 -1 3 0 21 + 334 DMA_CYCLE_FINISHED_1_ 3 -1 6 3 2 5 6 -1 -1 11 0 21 + 332 DMA_CYCLE_FINISHED_3_ 3 -1 6 3 2 5 6 -1 -1 10 0 21 + 300 inst_AS_030_000_SYNC 3 -1 0 3 0 2 3 -1 -1 7 0 21 + 325 CYCLE_DMA_1_ 3 -1 5 3 2 5 6 -1 -1 4 0 21 + 296 cpu_est_3_ 3 -1 1 3 1 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21 + 343 SM_AMIGA_i_7_ 3 -1 2 3 0 2 7 -1 -1 3 1 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 0 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 0 3 4 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 1 1 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 2 2 6 -1 -1 10 0 21 + 333 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 2 5 -1 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 10 0 21 + 335 DMA_CYCLE_FINISHED_0_ 3 -1 6 2 5 6 -1 -1 9 0 21 + 331 DMA_CYCLE_FINISHED_4_ 3 -1 2 2 2 6 -1 -1 8 1 21 + 330 DMA_CYCLE_FINISHED_5_ 3 -1 2 2 2 6 -1 -1 8 1 21 + 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 8 0 21 + 341 SM_AMIGA_2_ 3 -1 1 2 1 5 -1 -1 5 0 21 + 351 RN_VMA 3 34 3 2 1 3 34 -1 3 0 21 + 339 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 1 2 1 5 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 3 2 1 3 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 1 2 2 6 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 2 2 1 3 -1 -1 1 0 21 + 329 DMA_CYCLE_FINISHED_6_ 3 -1 2 1 2 -1 -1 12 0 21 + 355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 9 0 21 + 340 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21 + 347 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 326 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 + 353 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 350 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 + 352 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 + 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 6 1 2 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 0 1 1 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 + 59 A_1_ 1 -1 -1 2 0 6 59 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 5 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 2 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 5 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 + 81 AS_030 5 -1 7 5 0 3 4 5 7 81 -1 1 0 21 + 79 RW_000 5 347 7 4 2 4 5 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 4 2 5 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 4 2 5 6 7 30 -1 1 0 21 + 70 RW 5 352 6 2 5 7 70 -1 2 0 21 + 80 DSACK1 5 -1 7 2 2 6 80 -1 1 0 21 + 78 SIZE_1_ 5 345 7 1 3 78 -1 3 0 21 + 69 SIZE_0_ 5 350 6 1 3 69 -1 3 0 21 + 68 A_0_ 5 353 6 1 3 68 -1 3 0 21 + 40 BERR 5 -1 4 1 1 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 346 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 355 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 354 1 0 6 -1 9 0 21 + 82 BGACK_030 5 349 7 0 82 -1 3 0 21 + 34 VMA 5 351 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 348 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 349 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 5 6 0 1 2 3 5 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 + 324 CYCLE_DMA_0_ 3 -1 0 4 0 2 5 6 -1 -1 3 0 21 + 320 SM_AMIGA_6_ 3 -1 2 4 2 3 5 7 -1 -1 3 0 21 + 334 DMA_CYCLE_FINISHED_1_ 3 -1 6 3 2 5 6 -1 -1 11 0 21 + 332 DMA_CYCLE_FINISHED_3_ 3 -1 6 3 2 5 6 -1 -1 10 0 21 + 300 inst_AS_030_000_SYNC 3 -1 0 3 0 2 3 -1 -1 7 0 21 + 325 CYCLE_DMA_1_ 3 -1 5 3 2 5 6 -1 -1 4 0 21 + 296 cpu_est_3_ 3 -1 1 3 1 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21 + 343 SM_AMIGA_i_7_ 3 -1 2 3 0 2 7 -1 -1 3 1 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 0 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 0 3 4 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 1 1 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 2 2 6 -1 -1 10 0 21 + 333 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 2 5 -1 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 10 0 21 + 335 DMA_CYCLE_FINISHED_0_ 3 -1 6 2 5 6 -1 -1 9 0 21 + 331 DMA_CYCLE_FINISHED_4_ 3 -1 2 2 2 6 -1 -1 8 1 21 + 330 DMA_CYCLE_FINISHED_5_ 3 -1 2 2 2 6 -1 -1 8 1 21 + 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 8 0 21 + 341 SM_AMIGA_2_ 3 -1 1 2 1 5 -1 -1 5 0 21 + 351 RN_VMA 3 34 3 2 1 3 34 -1 3 0 21 + 339 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 1 2 1 5 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 3 2 1 3 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 1 2 2 6 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 2 2 1 3 -1 -1 1 0 21 + 329 DMA_CYCLE_FINISHED_6_ 3 -1 2 1 2 -1 -1 12 0 21 + 355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 9 0 21 + 340 SM_AMIGA_3_ 3 -1 1 1 1 -1 -1 5 0 21 + 347 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 326 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 + 353 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 350 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 + 352 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 348 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 + 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 6 1 2 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 0 1 1 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 + 59 A_1_ 1 -1 -1 2 0 6 59 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 5 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 2 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 5 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 7 0 1 2 4 5 6 7 41 -1 1 0 21 + 81 AS_030 5 -1 7 5 0 1 3 4 7 81 -1 1 0 21 + 79 RW_000 5 348 7 4 2 4 5 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 4 2 5 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 4 2 5 6 7 30 -1 1 0 21 + 80 DSACK1 5 -1 7 3 2 5 6 80 -1 1 0 21 + 68 A_0_ 5 351 6 2 5 6 68 -1 3 0 21 + 70 RW 5 355 6 2 1 7 70 -1 2 0 21 + 78 SIZE_1_ 5 345 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 346 6 1 5 69 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 + 82 BGACK_030 5 350 7 0 82 -1 3 0 21 + 34 VMA 5 354 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 349 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 308 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 310 CLK_000_D_0_ 3 -1 5 7 0 1 2 3 4 6 7 -1 -1 1 0 21 + 321 SM_AMIGA_6_ 3 -1 2 6 0 1 2 5 6 7 -1 -1 3 0 21 + 309 CLK_000_D_1_ 3 -1 4 6 0 1 2 3 6 7 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 3 5 0 3 5 6 7 -1 -1 1 0 21 + 304 CYCLE_DMA_0_ 3 -1 1 4 1 2 5 6 -1 -1 3 0 21 + 325 CYCLE_DMA_1_ 3 -1 6 3 2 5 6 -1 -1 4 0 21 + 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 343 SM_AMIGA_i_7_ 3 -1 2 3 2 3 7 -1 -1 3 1 21 + 294 cpu_est_0_ 3 -1 7 3 0 3 7 -1 -1 3 0 21 + 296 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 333 DMA_CYCLE_FINISHED_2_ 3 -1 5 2 2 5 -1 -1 11 0 21 + 331 DMA_CYCLE_FINISHED_4_ 3 -1 2 2 2 5 -1 -1 10 0 21 + 330 DMA_CYCLE_FINISHED_5_ 3 -1 2 2 2 5 -1 -1 10 0 21 + 329 DMA_CYCLE_FINISHED_6_ 3 -1 6 2 2 6 -1 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 10 0 21 + 335 DMA_CYCLE_FINISHED_0_ 3 -1 2 2 2 5 -1 -1 9 0 21 + 332 DMA_CYCLE_FINISHED_3_ 3 -1 5 2 5 6 -1 -1 8 1 21 + 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 8 0 21 + 300 inst_AS_030_000_SYNC 3 -1 3 2 2 3 -1 -1 7 0 21 + 341 SM_AMIGA_2_ 3 -1 0 2 0 2 -1 -1 5 0 21 + 354 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 324 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 + 323 SM_AMIGA_1_ 3 -1 2 2 2 7 -1 -1 3 0 21 + 322 SM_AMIGA_4_ 3 -1 0 2 0 1 -1 -1 3 0 21 + 319 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 + 318 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 305 inst_VPA_D 3 -1 2 2 0 3 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 3 2 3 4 -1 -1 1 0 21 + 334 DMA_CYCLE_FINISHED_1_ 3 -1 5 1 5 -1 -1 11 0 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 1 6 -1 -1 10 0 21 + 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 9 0 21 + 340 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 326 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 + 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 339 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 + 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 + 317 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 + 316 CLK_000_D_2_ 3 -1 1 1 0 -1 -1 1 0 21 + 315 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 314 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 307 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 306 CLK_000_D_3_ 3 -1 0 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 3 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 3 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 3 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 3 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 3 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 3 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 + 59 A_1_ 1 -1 -1 2 0 5 59 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 63 CLK_030 1 -1 -1 1 5 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 2 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 5 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 0 1 2 3 4 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 2 4 5 7 41 -1 1 0 21 + 79 RW_000 5 348 7 4 2 4 5 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 4 2 5 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 4 2 5 6 7 30 -1 1 0 21 + 68 A_0_ 5 353 6 2 2 5 68 -1 3 0 21 + 70 RW 5 352 6 2 1 7 70 -1 2 0 21 + 80 DSACK1 5 -1 7 2 2 5 80 -1 1 0 21 + 78 SIZE_1_ 5 345 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 347 6 1 5 69 -1 3 0 21 + 40 BERR 5 -1 4 1 3 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 346 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 355 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 354 1 0 6 -1 9 0 21 + 82 BGACK_030 5 350 7 0 82 -1 3 0 21 + 34 VMA 5 351 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 349 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 308 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 310 CLK_000_D_0_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 309 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 321 SM_AMIGA_6_ 3 -1 6 5 1 2 5 6 7 -1 -1 3 0 21 + 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 7 0 21 + 343 SM_AMIGA_i_7_ 3 -1 6 3 0 6 7 -1 -1 3 1 21 + 324 SM_AMIGA_0_ 3 -1 0 3 0 6 7 -1 -1 3 0 21 + 323 SM_AMIGA_1_ 3 -1 3 3 0 2 3 -1 -1 3 0 21 + 322 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 7 3 2 5 7 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 0 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 0 3 4 -1 -1 1 0 21 + 333 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 2 5 -1 -1 13 0 21 + 332 DMA_CYCLE_FINISHED_3_ 3 -1 2 2 2 5 -1 -1 13 0 21 + 334 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 2 5 -1 -1 11 0 21 + 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 10 0 21 + 331 DMA_CYCLE_FINISHED_4_ 3 -1 2 2 2 5 -1 -1 9 1 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 5 2 2 5 -1 -1 8 0 21 + 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 8 0 21 + 325 CYCLE_DMA_1_ 3 -1 2 2 2 5 -1 -1 4 0 21 + 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 339 SM_AMIGA_5_ 3 -1 5 2 5 6 -1 -1 3 0 21 + 319 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 + 318 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 0 2 1 6 -1 -1 1 0 21 + 306 CLK_000_D_3_ 3 -1 1 2 5 6 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 + 355 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 354 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 346 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 9 0 21 + 330 DMA_CYCLE_FINISHED_5_ 3 -1 2 1 2 -1 -1 9 1 21 + 329 DMA_CYCLE_FINISHED_6_ 3 -1 2 1 2 -1 -1 9 1 21 + 335 DMA_CYCLE_FINISHED_0_ 3 -1 5 1 5 -1 -1 8 0 21 + 341 SM_AMIGA_2_ 3 -1 3 1 3 -1 -1 5 0 21 + 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 326 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 + 353 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 351 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 347 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 352 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 + 317 CLK_000_D_4_ 3 -1 5 1 6 -1 -1 1 0 21 + 316 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 + 315 IPL_D0_2_ 3 -1 4 1 1 -1 -1 1 0 21 + 314 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 + 307 inst_DTACK_D0 3 -1 0 1 3 -1 -1 1 0 21 + 305 inst_VPA_D 3 -1 6 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 4 67 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 5 63 -1 + 59 A_1_ 1 -1 -1 1 0 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 + 81 AS_030 5 -1 7 5 0 2 3 4 7 81 -1 1 0 21 + 79 RW_000 5 348 7 4 0 4 5 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 4 0 5 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 4 0 5 6 7 30 -1 1 0 21 + 80 DSACK1 5 -1 7 3 0 5 6 80 -1 1 0 21 + 68 A_0_ 5 351 6 2 2 5 68 -1 3 0 21 + 70 RW 5 355 6 2 2 7 70 -1 2 0 21 + 78 SIZE_1_ 5 346 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 345 6 1 5 69 -1 3 0 21 + 40 BERR 5 -1 4 1 3 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 + 82 BGACK_030 5 350 7 0 82 -1 3 0 21 + 34 VMA 5 354 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 349 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 1 6 0 1 2 3 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21 + 335 CYCLE_DMA_1_ 3 -1 2 4 0 2 5 6 -1 -1 4 0 21 + 320 SM_AMIGA_6_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 4 0 5 6 7 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 7 3 2 3 7 -1 -1 7 0 21 + 327 DMA_CYCLE_FINISHED_6_ 3 -1 6 3 0 5 6 -1 -1 6 1 21 + 323 SM_AMIGA_0_ 3 -1 1 3 1 2 7 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 1 3 1 2 3 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 7 -1 -1 1 0 21 + 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 9 0 21 + 329 DMA_CYCLE_FINISHED_4_ 3 -1 0 2 0 5 -1 -1 7 1 21 + 328 DMA_CYCLE_FINISHED_5_ 3 -1 5 2 0 5 -1 -1 7 1 21 + 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21 + 333 DMA_CYCLE_FINISHED_0_ 3 -1 0 2 0 5 -1 -1 6 0 21 + 332 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 0 5 -1 -1 6 0 21 + 331 DMA_CYCLE_FINISHED_2_ 3 -1 0 2 0 5 -1 -1 6 0 21 + 330 DMA_CYCLE_FINISHED_3_ 3 -1 5 2 5 6 -1 -1 6 0 21 + 341 SM_AMIGA_2_ 3 -1 3 2 0 3 -1 -1 5 0 21 + 324 RST_DLY_0_ 3 -1 1 2 1 6 -1 -1 4 0 21 + 296 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 343 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 + 322 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 + 326 RST_DLY_2_ 3 -1 6 2 1 6 -1 -1 2 0 21 + 325 RST_DLY_1_ 3 -1 1 2 1 6 -1 -1 2 1 21 + 319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 1 2 1 6 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 3 2 1 3 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 2 2 2 6 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 + 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 1 6 -1 -1 6 0 21 + 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 4 1 21 + 354 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 346 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 345 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 339 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 3 0 21 + 334 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21 + 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 6 1 2 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 2 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 2 1 3 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 4 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 59 A_1_ 1 -1 -1 2 0 5 59 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 5 63 -1 + 35 VPA 1 -1 -1 1 4 35 -1 + 29 DTACK 1 -1 -1 1 2 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 + 81 AS_030 5 -1 7 5 0 2 3 4 7 81 -1 1 0 21 + 79 RW_000 5 348 7 4 0 4 5 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 4 0 5 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 4 0 5 6 7 30 -1 1 0 21 + 80 DSACK1 5 -1 7 3 0 5 6 80 -1 1 0 21 + 68 A_0_ 5 351 6 2 2 5 68 -1 3 0 21 + 70 RW 5 355 6 2 2 7 70 -1 2 0 21 + 78 SIZE_1_ 5 346 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 345 6 1 5 69 -1 3 0 21 + 40 BERR 5 -1 4 1 3 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 + 82 BGACK_030 5 350 7 0 82 -1 3 0 21 + 34 VMA 5 354 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 349 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 1 6 0 1 2 3 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 3 6 0 1 2 3 6 7 -1 -1 1 0 21 + 335 CYCLE_DMA_1_ 3 -1 2 4 0 2 5 6 -1 -1 4 0 21 + 320 SM_AMIGA_6_ 3 -1 2 4 1 2 5 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 4 0 5 6 7 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 7 3 2 3 7 -1 -1 7 0 21 + 327 DMA_CYCLE_FINISHED_6_ 3 -1 6 3 0 5 6 -1 -1 6 1 21 + 323 SM_AMIGA_0_ 3 -1 1 3 1 2 7 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 1 3 1 2 3 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 7 -1 -1 1 0 21 + 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 9 0 21 + 329 DMA_CYCLE_FINISHED_4_ 3 -1 0 2 0 5 -1 -1 7 1 21 + 328 DMA_CYCLE_FINISHED_5_ 3 -1 5 2 0 5 -1 -1 7 1 21 + 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21 + 333 DMA_CYCLE_FINISHED_0_ 3 -1 0 2 0 5 -1 -1 6 0 21 + 332 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 0 5 -1 -1 6 0 21 + 331 DMA_CYCLE_FINISHED_2_ 3 -1 0 2 0 5 -1 -1 6 0 21 + 330 DMA_CYCLE_FINISHED_3_ 3 -1 5 2 5 6 -1 -1 6 0 21 + 341 SM_AMIGA_2_ 3 -1 3 2 0 3 -1 -1 5 0 21 + 324 RST_DLY_0_ 3 -1 1 2 1 6 -1 -1 4 0 21 + 296 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 343 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 + 322 SM_AMIGA_1_ 3 -1 0 2 0 1 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 + 326 RST_DLY_2_ 3 -1 6 2 1 6 -1 -1 2 0 21 + 325 RST_DLY_1_ 3 -1 1 2 1 6 -1 -1 2 1 21 + 319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 1 2 1 6 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 3 2 1 3 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 2 2 2 6 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 + 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 1 6 -1 -1 6 0 21 + 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 4 1 21 + 354 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 351 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 346 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 345 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 339 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 3 0 21 + 334 CYCLE_DMA_0_ 3 -1 2 1 2 -1 -1 3 0 21 + 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 6 1 2 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 2 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 2 1 3 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 4 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 59 A_1_ 1 -1 -1 2 0 5 59 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 5 63 -1 + 35 VPA 1 -1 -1 1 4 35 -1 + 29 DTACK 1 -1 -1 1 2 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 1 4 5 7 41 -1 1 0 21 + 79 RW_000 5 350 7 4 0 4 5 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 4 2 3 4 7 81 -1 1 0 21 + 70 RW 5 354 6 2 2 7 70 -1 2 0 21 + 68 A_0_ 5 346 6 2 0 2 68 -1 2 0 21 + 80 DSACK1 5 -1 7 2 0 5 80 -1 1 0 21 + 31 UDS_000 5 -1 3 2 0 5 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 0 5 30 -1 1 0 21 + 78 SIZE_1_ 5 345 7 1 0 78 -1 2 0 21 + 69 SIZE_0_ 5 355 6 1 0 69 -1 2 0 21 + 40 BERR 5 -1 4 1 6 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 349 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 348 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 347 1 0 6 -1 9 0 21 + 82 BGACK_030 5 352 7 0 82 -1 3 0 21 + 34 VMA 5 353 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 351 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 352 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 3 6 1 2 3 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 1 6 1 2 3 5 6 7 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 7 3 2 3 7 -1 -1 7 0 21 + 335 CYCLE_DMA_1_ 3 -1 1 3 0 1 5 -1 -1 4 0 21 + 320 SM_AMIGA_6_ 3 -1 2 3 0 2 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 1 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 7 -1 -1 1 0 21 + 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 9 0 21 + 329 DMA_CYCLE_FINISHED_4_ 3 -1 0 2 0 5 -1 -1 7 1 21 + 328 DMA_CYCLE_FINISHED_5_ 3 -1 0 2 0 5 -1 -1 7 1 21 + 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21 + 332 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 0 5 -1 -1 6 0 21 + 331 DMA_CYCLE_FINISHED_2_ 3 -1 0 2 0 5 -1 -1 6 0 21 + 330 DMA_CYCLE_FINISHED_3_ 3 -1 5 2 0 5 -1 -1 6 0 21 + 341 SM_AMIGA_2_ 3 -1 6 2 5 6 -1 -1 5 0 21 + 324 RST_DLY_0_ 3 -1 1 2 1 6 -1 -1 4 0 21 + 296 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 353 RN_VMA 3 34 3 2 3 6 34 -1 3 0 21 + 343 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 + 323 SM_AMIGA_0_ 3 -1 2 2 2 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 2 2 2 6 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 + 326 RST_DLY_2_ 3 -1 6 2 1 6 -1 -1 2 0 21 + 325 RST_DLY_1_ 3 -1 6 2 1 6 -1 -1 2 1 21 + 319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 5 2 3 6 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 + 349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 0 1 0 -1 -1 6 0 21 + 333 DMA_CYCLE_FINISHED_0_ 3 -1 5 1 5 -1 -1 6 0 21 + 327 DMA_CYCLE_FINISHED_6_ 3 -1 0 1 0 -1 -1 6 1 21 + 340 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 5 0 21 + 350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 4 1 21 + 339 SM_AMIGA_5_ 3 -1 2 1 2 -1 -1 3 0 21 + 334 CYCLE_DMA_0_ 3 -1 1 1 1 -1 -1 3 0 21 + 355 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 354 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 346 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 3 1 3 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 4 1 6 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 3 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 5 63 -1 + 59 A_1_ 1 -1 -1 1 1 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 29 DTACK 1 -1 -1 1 4 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 79 RW_000 5 350 7 4 0 2 4 6 79 -1 4 0 21 + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 70 RW 5 354 6 2 2 7 70 -1 2 0 21 + 68 A_0_ 5 346 6 2 0 1 68 -1 2 0 21 + 80 DSACK1 5 -1 7 2 0 2 80 -1 1 0 21 + 78 SIZE_1_ 5 345 7 1 0 78 -1 2 0 21 + 69 SIZE_0_ 5 355 6 1 0 69 -1 2 0 21 + 40 BERR 5 -1 4 1 3 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 348 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 349 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 347 1 0 6 -1 9 0 21 + 82 BGACK_030 5 352 7 0 82 -1 3 0 21 + 34 VMA 5 353 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 351 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 31 UDS_000 0 3 0 31 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 352 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 320 SM_AMIGA_6_ 3 -1 5 6 0 1 2 5 6 7 -1 -1 3 0 21 + 309 CLK_000_D_0_ 3 -1 6 6 1 2 3 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 3 6 1 2 3 5 6 7 -1 -1 1 0 21 + 321 SM_AMIGA_4_ 3 -1 1 3 1 2 3 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 5 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 6 0 21 + 341 SM_AMIGA_2_ 3 -1 3 2 3 6 -1 -1 5 0 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 2 2 0 2 -1 -1 4 0 21 + 335 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 4 0 21 + 332 DMA_CYCLE_FINISHED_1_ 3 -1 0 2 0 2 -1 -1 4 0 21 + 331 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 0 2 -1 -1 4 0 21 + 330 DMA_CYCLE_FINISHED_3_ 3 -1 2 2 0 2 -1 -1 4 0 21 + 328 DMA_CYCLE_FINISHED_5_ 3 -1 0 2 0 2 -1 -1 4 1 21 + 296 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 343 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 339 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 3 0 21 + 334 CYCLE_DMA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 6 2 5 6 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 2 2 1 6 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 1 2 1 2 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 5 2 2 5 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 + 349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 348 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 8 0 21 + 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 + 350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 336 inst_CLK_030_H 3 -1 0 1 0 -1 -1 4 1 21 + 333 DMA_CYCLE_FINISHED_0_ 3 -1 0 1 0 -1 -1 4 0 21 + 329 DMA_CYCLE_FINISHED_4_ 3 -1 0 1 0 -1 -1 4 1 21 + 327 DMA_CYCLE_FINISHED_6_ 3 -1 0 1 0 -1 -1 4 1 21 + 324 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 + 353 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 355 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 354 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 346 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 326 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 + 325 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 + 316 CLK_000_D_4_ 3 -1 2 1 5 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 0 1 3 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 1 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +115 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 4 5 6 7 41 -1 1 0 21 + 79 RW_000 5 340 7 3 4 5 6 79 -1 4 0 21 + 70 RW 5 347 6 2 5 7 70 -1 2 0 21 + 68 A_0_ 5 344 6 2 3 5 68 -1 2 0 21 + 78 SIZE_1_ 5 337 7 1 5 78 -1 2 0 21 + 69 SIZE_0_ 5 339 6 1 5 69 -1 2 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 346 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 345 1 0 6 -1 9 0 21 + 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 341 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 31 UDS_000 0 3 0 31 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 308 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 310 CLK_000_D_0_ 3 -1 0 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 309 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 322 SM_AMIGA_6_ 3 -1 2 5 0 2 3 5 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 4 1 2 6 7 -1 -1 1 0 21 + 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 299 inst_AS_030_D0 3 -1 3 3 2 3 4 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 + 334 SM_AMIGA_2_ 3 -1 0 2 0 3 -1 -1 5 0 21 + 318 CYCLE_DMA_1_ 3 -1 6 2 5 6 -1 -1 4 0 21 + 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 4 0 21 + 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 + 325 SM_AMIGA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 + 324 SM_AMIGA_1_ 3 -1 3 2 3 7 -1 -1 3 0 21 + 323 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 320 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 6 2 5 6 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 331 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 305 inst_VPA_D 3 -1 5 2 0 3 -1 -1 1 0 21 + 346 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 345 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 329 inst_CLK_030_H 3 -1 5 1 5 -1 -1 4 0 21 + 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 + 347 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 344 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 + 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 339 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 + 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 330 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 321 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 317 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 + 316 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 + 315 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 314 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 313 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 307 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 + 306 CLK_000_D_3_ 3 -1 1 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 5 63 -1 + 59 A_1_ 1 -1 -1 1 1 59 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 0 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 4 5 6 7 41 -1 1 0 21 + 79 RW_000 5 350 7 3 4 5 6 79 -1 4 0 21 + 70 RW 5 354 6 2 0 7 70 -1 2 0 21 + 68 A_0_ 5 346 6 2 2 3 68 -1 2 0 21 + 80 DSACK1 5 -1 7 2 5 6 80 -1 1 0 21 + 78 SIZE_1_ 5 345 7 1 2 78 -1 2 0 21 + 69 SIZE_0_ 5 355 6 1 2 69 -1 2 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 349 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 348 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 347 1 0 6 -1 9 0 21 + 82 BGACK_030 5 352 7 0 82 -1 3 0 21 + 34 VMA 5 353 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 351 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 31 UDS_000 0 3 0 31 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 352 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 308 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 321 SM_AMIGA_6_ 3 -1 1 6 0 1 2 3 5 7 -1 -1 3 0 21 + 310 CLK_000_D_0_ 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 21 + 309 CLK_000_D_1_ 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 21 + 295 cpu_est_1_ 3 -1 5 4 0 3 5 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 0 4 0 3 5 6 -1 -1 4 0 21 + 300 inst_AS_030_000_SYNC 3 -1 2 3 1 2 3 -1 -1 7 0 21 + 343 SM_AMIGA_i_7_ 3 -1 1 3 1 2 7 -1 -1 3 1 21 + 294 cpu_est_0_ 3 -1 3 3 0 3 5 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 7 0 21 + 333 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 5 6 -1 -1 5 0 21 + 332 DMA_CYCLE_FINISHED_2_ 3 -1 6 2 5 6 -1 -1 5 0 21 + 331 DMA_CYCLE_FINISHED_3_ 3 -1 6 2 5 6 -1 -1 5 0 21 + 335 CYCLE_DMA_1_ 3 -1 6 2 5 6 -1 -1 4 0 21 + 328 DMA_CYCLE_FINISHED_6_ 3 -1 6 2 5 6 -1 -1 4 1 21 + 353 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 339 SM_AMIGA_5_ 3 -1 1 2 0 1 -1 -1 3 0 21 + 324 SM_AMIGA_0_ 3 -1 7 2 1 7 -1 -1 3 0 21 + 323 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21 + 319 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 + 318 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 6 2 5 6 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 305 inst_VPA_D 3 -1 0 2 0 3 -1 -1 1 0 21 + 349 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 336 inst_CLK_030_H 3 -1 5 1 5 -1 -1 8 0 21 + 341 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 + 340 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 1 6 -1 -1 4 0 21 + 334 DMA_CYCLE_FINISHED_0_ 3 -1 5 1 5 -1 -1 4 0 21 + 330 DMA_CYCLE_FINISHED_4_ 3 -1 5 1 5 -1 -1 4 1 21 + 329 DMA_CYCLE_FINISHED_5_ 3 -1 6 1 6 -1 -1 4 1 21 + 325 RST_DLY_0_ 3 -1 3 1 3 -1 -1 4 0 21 + 322 SM_AMIGA_4_ 3 -1 0 1 0 -1 -1 3 0 21 + 355 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 354 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 346 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 327 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 + 326 RST_DLY_1_ 3 -1 3 1 3 -1 -1 2 1 21 + 320 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 317 CLK_000_D_4_ 3 -1 1 1 1 -1 -1 1 0 21 + 316 CLK_000_D_2_ 3 -1 7 1 2 -1 -1 1 0 21 + 315 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 314 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 + 313 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 307 inst_DTACK_D0 3 -1 2 1 0 -1 -1 1 0 21 + 306 CLK_000_D_3_ 3 -1 2 1 1 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 5 63 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 2 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 79 RW_000 5 350 7 4 0 2 4 6 79 -1 4 0 21 + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 70 RW 5 354 6 2 2 7 70 -1 2 0 21 + 68 A_0_ 5 346 6 2 0 1 68 -1 2 0 21 + 80 DSACK1 5 -1 7 2 0 2 80 -1 1 0 21 + 78 SIZE_1_ 5 345 7 1 0 78 -1 2 0 21 + 69 SIZE_0_ 5 355 6 1 0 69 -1 2 0 21 + 40 BERR 5 -1 4 1 3 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 348 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 349 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 347 1 0 6 -1 9 0 21 + 82 BGACK_030 5 352 7 0 82 -1 3 0 21 + 34 VMA 5 353 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 351 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 31 UDS_000 0 3 0 31 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 352 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 320 SM_AMIGA_6_ 3 -1 5 6 0 1 2 5 6 7 -1 -1 3 0 21 + 309 CLK_000_D_0_ 3 -1 6 6 1 2 3 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 3 6 1 2 3 5 6 7 -1 -1 1 0 21 + 321 SM_AMIGA_4_ 3 -1 1 3 1 2 3 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 5 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 6 0 21 + 341 SM_AMIGA_2_ 3 -1 3 2 3 6 -1 -1 5 0 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 2 2 0 2 -1 -1 4 0 21 + 335 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 4 0 21 + 332 DMA_CYCLE_FINISHED_1_ 3 -1 0 2 0 2 -1 -1 4 0 21 + 331 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 0 2 -1 -1 4 0 21 + 330 DMA_CYCLE_FINISHED_3_ 3 -1 2 2 0 2 -1 -1 4 0 21 + 328 DMA_CYCLE_FINISHED_5_ 3 -1 0 2 0 2 -1 -1 4 1 21 + 296 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 343 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 339 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 3 0 21 + 334 CYCLE_DMA_0_ 3 -1 7 2 2 7 -1 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 6 2 5 6 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 2 2 1 6 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 1 2 1 2 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 5 2 2 5 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 + 349 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 348 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 8 0 21 + 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 + 350 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 336 inst_CLK_030_H 3 -1 0 1 0 -1 -1 4 1 21 + 333 DMA_CYCLE_FINISHED_0_ 3 -1 0 1 0 -1 -1 4 0 21 + 329 DMA_CYCLE_FINISHED_4_ 3 -1 0 1 0 -1 -1 4 1 21 + 327 DMA_CYCLE_FINISHED_6_ 3 -1 0 1 0 -1 -1 4 1 21 + 324 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 + 353 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 355 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 354 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 351 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 346 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 326 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 + 325 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 + 316 CLK_000_D_4_ 3 -1 2 1 5 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 0 1 3 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 1 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +124 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 6 0 2 4 5 6 7 41 -1 1 0 21 + 81 AS_030 5 -1 7 5 0 2 3 4 7 81 -1 1 0 21 + 79 RW_000 5 348 7 4 2 4 5 6 79 -1 4 0 21 + 70 RW 5 353 6 2 0 7 70 -1 2 0 21 + 80 DSACK1 5 -1 7 2 2 5 80 -1 1 0 21 + 78 SIZE_1_ 5 346 7 1 5 78 -1 2 0 21 + 69 SIZE_0_ 5 349 6 1 5 69 -1 2 0 21 + 68 A_0_ 5 354 6 1 5 68 -1 2 0 21 + 40 BERR 5 -1 4 1 3 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 356 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 355 1 0 6 -1 9 0 21 + 82 BGACK_030 5 351 7 0 82 -1 3 0 21 + 34 VMA 5 352 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 350 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 31 UDS_000 0 3 0 31 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 351 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 308 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 310 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 6 7 -1 -1 1 0 21 + 309 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 6 7 -1 -1 1 0 21 + 321 SM_AMIGA_6_ 3 -1 0 4 0 2 5 7 -1 -1 3 0 21 + 301 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 7 0 21 + 336 CYCLE_DMA_1_ 3 -1 6 3 2 5 6 -1 -1 4 0 21 + 324 SM_AMIGA_0_ 3 -1 6 3 0 6 7 -1 -1 3 0 21 + 302 inst_BGACK_030_INT_D 3 -1 2 3 1 6 7 -1 -1 1 0 21 + 300 inst_AS_030_D0 3 -1 4 3 3 4 7 -1 -1 1 0 21 + 304 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 8 0 21 + 343 DMA_CYCLE_FINISHED_i_7_ 3 -1 2 2 2 5 -1 -1 7 0 21 + 333 DMA_CYCLE_FINISHED_1_ 3 -1 5 2 2 5 -1 -1 7 0 21 + 332 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 2 5 -1 -1 7 0 21 + 331 DMA_CYCLE_FINISHED_3_ 3 -1 2 2 2 5 -1 -1 7 0 21 + 328 DMA_CYCLE_FINISHED_6_ 3 -1 5 2 2 5 -1 -1 7 0 21 + 303 inst_AS_000_DMA 3 -1 5 2 5 7 -1 -1 6 0 21 + 342 SM_AMIGA_2_ 3 -1 3 2 0 3 -1 -1 5 0 21 + 295 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 344 SM_AMIGA_i_7_ 3 -1 0 2 0 7 -1 -1 3 1 21 + 335 CYCLE_DMA_0_ 3 -1 2 2 2 6 -1 -1 3 0 21 + 323 SM_AMIGA_1_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 322 SM_AMIGA_4_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 319 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 + 318 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 339 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 338 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 299 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 1 2 1 2 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 306 CLK_000_D_3_ 3 -1 6 2 0 6 -1 -1 1 0 21 + 297 inst_AS_000_D0 3 -1 4 2 2 5 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 + 356 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 355 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 334 DMA_CYCLE_FINISHED_0_ 3 -1 5 1 5 -1 -1 8 0 21 + 330 DMA_CYCLE_FINISHED_4_ 3 -1 5 1 5 -1 -1 8 0 21 + 329 DMA_CYCLE_FINISHED_5_ 3 -1 2 1 2 -1 -1 8 0 21 + 337 inst_CLK_030_H 3 -1 5 1 5 -1 -1 7 0 21 + 341 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 325 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 + 352 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 340 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 + 354 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 + 353 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 350 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 349 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 346 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 + 345 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 327 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 + 326 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 + 317 CLK_000_D_4_ 3 -1 6 1 0 -1 -1 1 0 21 + 316 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 315 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 + 314 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 313 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 307 inst_DTACK_D0 3 -1 2 1 3 -1 -1 1 0 21 + 305 inst_VPA_D 3 -1 1 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 2 4 7 94 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 + 58 A_DECODE_17_ 1 -1 -1 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 2 4 7 56 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 5 63 -1 + 59 A_1_ 1 -1 -1 1 1 59 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 29 DTACK 1 -1 -1 1 2 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 + 79 RW_000 5 348 7 4 0 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 4 3 4 5 7 81 -1 1 0 21 + 70 RW 5 355 6 2 5 7 70 -1 2 0 21 + 68 A_0_ 5 351 6 2 2 6 68 -1 2 0 21 + 80 DSACK1 5 -1 7 2 0 2 80 -1 1 0 21 + 78 SIZE_1_ 5 345 7 1 6 78 -1 2 0 21 + 69 SIZE_0_ 5 346 6 1 6 69 -1 2 0 21 + 40 BERR 5 -1 4 1 3 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 + 82 BGACK_030 5 350 7 0 82 -1 3 0 21 + 34 VMA 5 354 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 349 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 31 UDS_000 0 3 0 31 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 6 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 0 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 320 SM_AMIGA_6_ 3 -1 5 5 0 2 5 6 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 + 325 CYCLE_DMA_1_ 3 -1 1 3 0 1 2 -1 -1 4 0 21 + 324 CYCLE_DMA_0_ 3 -1 2 3 0 1 2 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 1 3 1 3 5 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 + 333 DMA_CYCLE_FINISHED_2_ 3 -1 2 2 0 2 -1 -1 10 0 21 + 331 DMA_CYCLE_FINISHED_4_ 3 -1 2 2 0 2 -1 -1 10 0 21 + 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 334 DMA_CYCLE_FINISHED_1_ 3 -1 0 2 0 2 -1 -1 6 0 21 + 332 DMA_CYCLE_FINISHED_3_ 3 -1 2 2 0 2 -1 -1 6 0 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 6 0 21 + 341 SM_AMIGA_2_ 3 -1 3 2 1 3 -1 -1 5 0 21 + 296 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 343 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 339 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 6 2 3 6 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 6 2 1 6 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 7 2 6 7 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 1 2 3 5 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 + 335 DMA_CYCLE_FINISHED_0_ 3 -1 0 1 0 -1 -1 10 0 21 + 330 DMA_CYCLE_FINISHED_5_ 3 -1 2 1 2 -1 -1 10 0 21 + 329 DMA_CYCLE_FINISHED_6_ 3 -1 2 1 2 -1 -1 10 0 21 + 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 8 0 21 + 336 inst_CLK_030_H 3 -1 0 1 0 -1 -1 7 0 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 2 1 2 -1 -1 6 0 21 + 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 354 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 293 cpu_est_0_ 3 -1 3 1 3 -1 -1 3 0 21 + 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 351 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 + 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 3 1 5 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 1 1 3 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 1 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 1 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 4 5 6 7 41 -1 1 0 21 + 79 RW_000 5 348 7 3 0 4 6 79 -1 4 0 21 + 70 RW 5 355 6 2 3 7 70 -1 2 0 21 + 80 DSACK1 5 -1 7 2 0 6 80 -1 1 0 21 + 78 SIZE_1_ 5 345 7 1 1 78 -1 2 0 21 + 69 SIZE_0_ 5 346 6 1 1 69 -1 2 0 21 + 68 A_0_ 5 351 6 1 1 68 -1 2 0 21 + 40 BERR 5 -1 4 1 3 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 + 82 BGACK_030 5 350 7 0 82 -1 3 0 21 + 34 VMA 5 354 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 349 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 31 UDS_000 0 3 0 31 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 0 5 0 1 3 5 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 5 0 1 3 5 7 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 5 3 3 5 7 -1 -1 7 0 21 + 302 inst_AS_000_DMA 3 -1 0 3 0 6 7 -1 -1 6 0 21 + 324 CYCLE_DMA_0_ 3 -1 5 3 0 5 6 -1 -1 3 0 21 + 320 SM_AMIGA_6_ 3 -1 7 3 1 3 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 3 5 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 3 3 3 4 5 -1 -1 1 0 21 + 335 DMA_CYCLE_FINISHED_0_ 3 -1 0 2 0 6 -1 -1 10 0 21 + 333 DMA_CYCLE_FINISHED_2_ 3 -1 6 2 0 6 -1 -1 10 0 21 + 330 DMA_CYCLE_FINISHED_5_ 3 -1 0 2 0 6 -1 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 8 0 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 2 0 6 -1 -1 6 0 21 + 334 DMA_CYCLE_FINISHED_1_ 3 -1 0 2 0 6 -1 -1 6 0 21 + 332 DMA_CYCLE_FINISHED_3_ 3 -1 0 2 0 6 -1 -1 6 0 21 + 341 SM_AMIGA_2_ 3 -1 3 2 1 3 -1 -1 5 0 21 + 326 RST_DLY_0_ 3 -1 0 2 0 1 -1 -1 4 0 21 + 325 CYCLE_DMA_1_ 3 -1 0 2 0 6 -1 -1 4 0 21 + 296 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 343 SM_AMIGA_i_7_ 3 -1 7 2 5 7 -1 -1 3 1 21 + 322 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 1 2 0 1 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 1 2 0 1 -1 -1 2 1 21 + 319 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 7 2 1 6 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 6 2 6 7 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 + 331 DMA_CYCLE_FINISHED_4_ 3 -1 0 1 0 -1 -1 10 0 21 + 329 DMA_CYCLE_FINISHED_6_ 3 -1 0 1 0 -1 -1 10 0 21 + 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 336 inst_CLK_030_H 3 -1 6 1 6 -1 -1 7 0 21 + 340 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 354 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 339 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 3 1 3 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 3 1 3 -1 -1 3 0 21 + 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 351 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 + 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 7 1 7 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 0 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 6 1 3 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 0 1 7 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 0 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 63 CLK_030 1 -1 -1 2 0 6 63 -1 + 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 59 A_1_ 1 -1 -1 1 5 59 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 0 10 -1 +123 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 0 1 2 3 4 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 2 4 6 7 41 -1 1 0 21 + 79 RW_000 5 348 7 4 0 2 4 6 79 -1 4 0 21 + 70 RW 5 355 6 2 2 7 70 -1 2 0 21 + 68 A_0_ 5 351 6 2 3 5 68 -1 2 0 21 + 80 DSACK1 5 -1 7 2 0 6 80 -1 1 0 21 + 78 SIZE_1_ 5 345 7 1 5 78 -1 2 0 21 + 69 SIZE_0_ 5 346 6 1 5 69 -1 2 0 21 + 40 BERR 5 -1 4 1 5 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 + 82 BGACK_030 5 350 7 0 82 -1 3 0 21 + 34 VMA 5 354 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 349 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 31 UDS_000 0 3 0 31 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 1 6 0 1 2 3 5 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 + 320 SM_AMIGA_6_ 3 -1 7 5 1 2 3 5 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 4 0 5 6 7 -1 -1 1 0 21 + 333 DMA_CYCLE_FINISHED_2_ 3 -1 6 3 0 2 6 -1 -1 10 0 21 + 300 inst_AS_030_000_SYNC 3 -1 0 3 0 3 7 -1 -1 7 0 21 + 334 DMA_CYCLE_FINISHED_1_ 3 -1 0 3 0 2 6 -1 -1 6 0 21 + 332 DMA_CYCLE_FINISHED_3_ 3 -1 6 3 0 2 6 -1 -1 6 0 21 + 325 CYCLE_DMA_1_ 3 -1 2 3 0 2 6 -1 -1 4 0 21 + 296 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 5 3 3 5 6 -1 -1 4 0 21 + 324 CYCLE_DMA_0_ 3 -1 0 3 0 2 6 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 3 3 2 3 5 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 1 3 1 3 5 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 3 3 0 3 4 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 1 1 21 + 335 DMA_CYCLE_FINISHED_0_ 3 -1 0 2 0 2 -1 -1 10 0 21 + 331 DMA_CYCLE_FINISHED_4_ 3 -1 6 2 0 6 -1 -1 10 0 21 + 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 8 0 21 + 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 6 0 21 + 326 RST_DLY_0_ 3 -1 1 2 1 5 -1 -1 4 0 21 + 354 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 343 SM_AMIGA_i_7_ 3 -1 7 2 0 7 -1 -1 3 1 21 + 339 SM_AMIGA_5_ 3 -1 7 2 3 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 338 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 5 2 1 5 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 1 2 1 5 -1 -1 2 1 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 3 2 1 6 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 3 2 3 5 -1 -1 1 0 21 + 330 DMA_CYCLE_FINISHED_5_ 3 -1 6 1 6 -1 -1 10 0 21 + 329 DMA_CYCLE_FINISHED_6_ 3 -1 6 1 6 -1 -1 10 0 21 + 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 336 inst_CLK_030_H 3 -1 2 1 2 -1 -1 7 0 21 + 342 DMA_CYCLE_FINISHED_i_7_ 3 -1 6 1 6 -1 -1 6 0 21 + 341 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 + 340 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 323 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21 + 355 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 351 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 + 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 + 344 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 337 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 7 1 7 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 3 1 3 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 1 1 5 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 3 1 7 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 0 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 0 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 0 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 0 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 0 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 0 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 63 CLK_030 1 -1 -1 1 2 63 -1 + 59 A_1_ 1 -1 -1 1 5 59 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 1 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +121 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 3 4 5 6 7 81 -1 1 0 21 + 79 RW_000 5 345 7 4 0 2 4 6 79 -1 4 0 21 + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 70 RW 5 350 6 2 3 7 70 -1 2 0 21 + 78 SIZE_1_ 5 343 7 1 3 78 -1 2 0 21 + 69 SIZE_0_ 5 346 6 1 3 69 -1 2 0 21 + 68 A_0_ 5 351 6 1 3 68 -1 2 0 21 + 80 DSACK1 5 -1 7 1 2 80 -1 1 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 344 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 353 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 352 1 0 6 -1 9 0 21 + 82 BGACK_030 5 348 7 0 82 -1 3 0 21 + 34 VMA 5 349 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 347 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 31 UDS_000 0 3 0 31 -1 1 0 21 + 30 LDS_000 0 3 0 30 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 348 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 6 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 322 SM_AMIGA_6_ 3 -1 5 4 3 5 6 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 + 296 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 325 SM_AMIGA_0_ 3 -1 2 3 2 5 7 -1 -1 3 0 21 + 324 SM_AMIGA_1_ 3 -1 1 3 1 2 6 -1 -1 3 0 21 + 323 SM_AMIGA_4_ 3 -1 1 3 0 1 3 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 6 0 21 + 340 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 5 0 21 + 318 DMA_CYCLE_FINISHED_5_ 3 -1 2 2 0 2 -1 -1 5 0 21 + 317 CYCLE_DMA_1_ 3 -1 0 2 0 2 -1 -1 4 0 21 + 349 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 341 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 338 SM_AMIGA_5_ 3 -1 7 2 1 7 -1 -1 3 0 21 + 326 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 332 inst_AS_000_INT 3 -1 6 2 4 6 -1 -1 2 0 21 + 331 inst_DSACK1_INT 3 -1 6 2 6 7 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 6 2 1 6 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 0 2 0 6 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 1 2 5 6 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 + 353 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 352 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 337 DMA_CYCLE_FINISHED_4_ 3 -1 2 1 2 -1 -1 6 0 21 + 336 DMA_CYCLE_FINISHED_3_ 3 -1 2 1 2 -1 -1 6 0 21 + 335 DMA_CYCLE_FINISHED_2_ 3 -1 2 1 2 -1 -1 6 0 21 + 334 DMA_CYCLE_FINISHED_1_ 3 -1 2 1 2 -1 -1 6 0 21 + 333 DMA_CYCLE_FINISHED_0_ 3 -1 2 1 2 -1 -1 6 0 21 + 330 inst_CLK_030_H 3 -1 0 1 0 -1 -1 6 0 21 + 339 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 5 0 21 + 345 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 327 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 + 320 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 + 351 RN_A_0_ 3 68 6 1 6 68 -1 2 0 21 + 350 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 347 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 343 RN_SIZE_1_ 3 78 7 1 7 78 -1 2 0 21 + 342 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 329 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 + 328 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 + 321 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 6 1 5 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 7 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 5 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 7 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 59 A_1_ 1 -1 -1 2 2 5 59 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 5 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +121 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 79 RW_000 5 348 7 4 0 2 4 6 79 -1 4 0 21 + 81 AS_030 5 -1 7 4 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 2 4 7 41 -1 1 0 21 + 31 UDS_000 5 -1 3 4 0 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 4 0 2 6 7 30 -1 1 0 21 + 68 A_0_ 5 343 6 2 0 6 68 -1 3 0 21 + 70 RW 5 353 6 2 5 7 70 -1 2 0 21 + 78 SIZE_1_ 5 345 7 1 0 78 -1 3 0 21 + 69 SIZE_0_ 5 351 6 1 0 69 -1 3 0 21 + 80 DSACK1 5 -1 7 1 2 80 -1 1 0 21 + 40 BERR 5 -1 4 1 3 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 347 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 346 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 344 1 0 6 -1 9 0 21 + 82 BGACK_030 5 350 7 0 82 -1 3 0 21 + 34 VMA 5 352 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 349 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 350 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 322 SM_AMIGA_6_ 3 -1 1 6 0 1 2 5 6 7 -1 -1 3 0 21 + 309 CLK_000_D_0_ 3 -1 6 6 1 2 3 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 5 3 1 3 5 -1 -1 7 0 21 + 341 SM_AMIGA_i_7_ 3 -1 1 3 1 5 7 -1 -1 3 1 21 + 323 SM_AMIGA_4_ 3 -1 6 3 3 5 6 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 + 334 DMA_CYCLE_FINISHED_1_ 3 -1 2 2 0 2 -1 -1 10 0 21 + 318 DMA_CYCLE_FINISHED_5_ 3 -1 0 2 0 2 -1 -1 9 0 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 6 0 21 + 340 SM_AMIGA_2_ 3 -1 3 2 1 3 -1 -1 5 0 21 + 317 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 4 0 21 + 296 cpu_est_3_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 338 SM_AMIGA_5_ 3 -1 2 2 2 6 -1 -1 3 0 21 + 326 CYCLE_DMA_0_ 3 -1 2 2 0 2 -1 -1 3 0 21 + 325 SM_AMIGA_0_ 3 -1 1 2 1 7 -1 -1 3 0 21 + 324 SM_AMIGA_1_ 3 -1 1 2 1 5 -1 -1 3 0 21 + 320 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 332 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 331 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 + 321 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 3 2 3 5 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 + 337 DMA_CYCLE_FINISHED_4_ 3 -1 0 1 0 -1 -1 10 0 21 + 336 DMA_CYCLE_FINISHED_3_ 3 -1 0 1 0 -1 -1 10 0 21 + 335 DMA_CYCLE_FINISHED_2_ 3 -1 0 1 0 -1 -1 10 0 21 + 333 DMA_CYCLE_FINISHED_0_ 3 -1 2 1 2 -1 -1 10 0 21 + 347 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 346 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 344 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 8 0 21 + 330 inst_CLK_030_H 3 -1 0 1 0 -1 -1 7 0 21 + 339 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 + 348 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 327 RST_DLY_0_ 3 -1 1 1 1 -1 -1 4 0 21 + 352 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 351 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 345 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 343 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 353 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 349 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 342 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 329 RST_DLY_2_ 3 -1 1 1 1 -1 -1 2 0 21 + 328 RST_DLY_1_ 3 -1 1 1 1 -1 -1 2 1 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 1 1 1 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 0 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 2 1 3 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 0 1 1 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 5 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 29 DTACK 1 -1 -1 1 2 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +114 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 3 4 7 41 -1 1 0 21 + 79 RW_000 5 339 7 3 0 4 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 + 70 RW 5 344 6 2 2 7 70 -1 2 0 21 + 78 SIZE_1_ 5 337 7 1 1 78 -1 3 0 21 + 69 SIZE_0_ 5 342 6 1 1 69 -1 3 0 21 + 68 A_0_ 5 345 6 1 1 68 -1 3 0 21 + 40 BERR 5 -1 4 1 2 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 + 82 BGACK_030 5 341 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 340 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 308 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 310 CLK_000_D_0_ 3 -1 1 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 309 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 322 SM_AMIGA_6_ 3 -1 5 5 0 1 2 5 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 4 0 5 6 7 -1 -1 1 0 21 + 324 SM_AMIGA_1_ 3 -1 2 3 0 2 5 -1 -1 3 0 21 + 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 7 0 21 + 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 295 cpu_est_1_ 3 -1 3 2 2 3 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 2 2 3 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 + 335 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 332 SM_AMIGA_5_ 3 -1 2 2 2 6 -1 -1 3 0 21 + 325 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 323 SM_AMIGA_4_ 3 -1 6 2 2 6 -1 -1 3 0 21 + 320 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 304 CYCLE_DMA_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 3 0 21 + 331 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 + 330 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 + 321 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 305 inst_VPA_D 3 -1 6 2 2 3 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 3 2 2 3 -1 -1 1 1 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 329 inst_CLK_030_H 3 -1 0 1 0 -1 -1 8 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 8 0 21 + 334 SM_AMIGA_2_ 3 -1 2 1 2 -1 -1 5 0 21 + 333 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 + 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 326 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 318 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 + 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 317 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 + 316 CLK_000_D_2_ 3 -1 5 1 0 -1 -1 1 0 21 + 315 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 + 314 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 307 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21 + 306 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 59 A_1_ 1 -1 -1 2 0 6 59 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +115 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 1 4 5 7 41 -1 1 0 21 + 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 + 70 RW 5 344 6 2 5 7 70 -1 2 0 21 + 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 342 6 1 5 69 -1 3 0 21 + 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 + 82 BGACK_030 5 341 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 340 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 + 320 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 + 296 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 324 CYCLE_DMA_0_ 3 -1 5 3 0 1 5 -1 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 0 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 8 0 21 + 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 + 302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 6 0 21 + 326 RST_DLY_0_ 3 -1 5 2 3 5 -1 -1 4 0 21 + 325 CYCLE_DMA_1_ 3 -1 0 2 0 1 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 + 322 SM_AMIGA_1_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 331 inst_AS_000_INT 3 -1 7 2 4 7 -1 -1 2 0 21 + 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 3 2 3 5 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 5 2 3 5 -1 -1 2 1 21 + 319 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 4 2 1 6 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 + 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 4 1 21 + 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 + 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 336 N_67 3 -1 4 1 4 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 2 1 2 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 6 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 0 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 4 1 4 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 6 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 0 1 67 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 1 63 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 6 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +115 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 + 79 RW_000 5 339 7 3 1 4 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 + 70 RW 5 344 6 2 5 7 70 -1 2 0 21 + 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 342 6 1 5 69 -1 3 0 21 + 68 A_0_ 5 345 6 1 5 68 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 + 82 BGACK_030 5 341 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 340 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 307 inst_RESET_OUT 3 -1 5 8 0 1 2 3 4 5 6 7 -1 -1 2 0 21 + 341 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 308 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 4 5 7 -1 -1 1 0 21 + 309 CLK_000_D_0_ 3 -1 6 6 0 1 2 3 5 7 -1 -1 1 0 21 + 320 SM_AMIGA_6_ 3 -1 2 4 0 2 5 7 -1 -1 3 0 21 + 296 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 7 0 21 + 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 + 334 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 + 302 inst_AS_000_DMA 3 -1 1 2 1 7 -1 -1 5 0 21 + 326 RST_DLY_0_ 3 -1 5 2 3 5 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 + 324 CYCLE_DMA_0_ 3 -1 0 2 0 1 -1 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 2 2 2 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 5 2 2 5 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 331 inst_AS_000_INT 3 -1 7 2 4 7 -1 -1 2 0 21 + 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 3 2 3 5 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 3 2 3 5 -1 -1 2 1 21 + 319 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 5 2 1 6 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 6 2 5 6 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 6 2 2 7 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 329 inst_CLK_030_H 3 -1 1 1 1 -1 -1 6 0 21 + 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 325 CYCLE_DMA_1_ 3 -1 1 1 1 -1 -1 4 0 21 + 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 342 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 332 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 + 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 7 1 2 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 4 1 6 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 3 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 0 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 3 67 -1 + 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 + 59 A_1_ 1 -1 -1 2 2 6 59 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 1 63 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 0 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +116 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 1 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21 + 79 RW_000 5 343 7 3 0 4 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 + 70 RW 5 348 6 2 2 7 70 -1 2 0 21 + 78 SIZE_1_ 5 338 7 1 3 78 -1 3 0 21 + 69 SIZE_0_ 5 346 6 1 3 69 -1 3 0 21 + 68 A_0_ 5 339 6 1 3 68 -1 3 0 21 + 40 BERR 5 -1 4 1 2 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 342 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 341 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 340 1 0 6 -1 9 0 21 + 82 BGACK_030 5 345 7 0 82 -1 3 0 21 + 34 VMA 5 347 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 344 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 345 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 320 SM_AMIGA_6_ 3 -1 5 5 1 2 3 5 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 4 0 5 6 7 -1 -1 1 0 21 + 328 RST_DLY_0_ 3 -1 2 3 0 1 2 -1 -1 4 0 21 + 295 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 + 293 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21 + 323 SM_AMIGA_0_ 3 -1 1 3 1 5 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 5 3 1 3 5 -1 -1 3 0 21 + 296 cpu_est_0_ 3 -1 3 3 2 3 6 -1 -1 3 0 21 + 330 RST_DLY_2_ 3 -1 2 3 0 1 2 -1 -1 2 0 21 + 329 RST_DLY_1_ 3 -1 1 3 0 1 2 -1 -1 2 1 21 + 311 inst_CLK_OUT_PRE_D 3 -1 5 3 0 1 6 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 + 294 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 1 1 21 + 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 335 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 5 0 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 5 0 21 + 347 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 + 336 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 333 SM_AMIGA_5_ 3 -1 1 2 1 6 -1 -1 3 0 21 + 324 CYCLE_DMA_0_ 3 -1 6 2 0 6 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 6 2 2 6 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 332 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 331 inst_DSACK1_INT 3 -1 3 2 3 7 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 0 2 0 2 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 0 2 0 3 -1 -1 2 0 21 + 305 CLK_000_D_3_ 3 -1 5 2 5 6 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 5 2 2 3 -1 -1 1 0 21 + 342 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 341 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 340 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 327 CLK_030_PE_1_ 3 -1 0 1 0 -1 -1 7 0 21 + 326 CLK_030_PE_0_ 3 -1 0 1 0 -1 -1 7 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 6 0 21 + 334 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 + 343 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 325 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 4 0 21 + 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 339 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 338 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 3 1 3 -1 -1 3 0 21 + 348 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 344 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 337 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 6 1 5 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 5 1 5 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 2 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 59 A_1_ 1 -1 -1 1 0 59 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 29 DTACK 1 -1 -1 1 2 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 7 10 -1 +116 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 1 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 2 4 6 7 41 -1 1 0 21 + 79 RW_000 5 343 7 3 0 4 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 + 68 A_0_ 5 339 6 2 0 3 68 -1 3 0 21 + 70 RW 5 348 6 2 1 7 70 -1 2 0 21 + 78 SIZE_1_ 5 338 7 1 0 78 -1 3 0 21 + 69 SIZE_0_ 5 346 6 1 0 69 -1 3 0 21 + 40 BERR 5 -1 4 1 2 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 342 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 341 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 340 1 0 6 -1 9 0 21 + 82 BGACK_030 5 345 7 0 82 -1 3 0 21 + 34 VMA 5 347 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 344 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 345 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 0 6 1 2 3 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21 + 320 SM_AMIGA_6_ 3 -1 5 5 0 1 3 5 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 + 295 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 + 293 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 + 324 CYCLE_DMA_0_ 3 -1 6 3 0 2 6 -1 -1 3 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 0 3 0 1 6 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 + 294 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 1 1 21 + 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 335 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 5 0 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 5 0 21 + 325 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 4 0 21 + 347 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 + 336 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 323 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 1 2 1 2 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 + 296 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 3 0 21 + 332 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 3 2 0 3 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 3 2 2 3 -1 -1 1 0 21 + 342 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 341 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 340 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 327 CLK_030_PE_1_ 3 -1 0 1 0 -1 -1 7 0 21 + 326 CLK_030_PE_0_ 3 -1 0 1 0 -1 -1 7 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 6 0 21 + 334 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 + 343 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 328 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 339 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 338 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 333 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 3 0 21 + 348 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 344 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 337 N_81 3 -1 4 1 4 -1 -1 2 0 21 + 331 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 330 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 329 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 5 1 0 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 5 1 2 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 5 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 0 10 -1 +116 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 1 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 2 4 6 7 41 -1 1 0 21 + 79 RW_000 5 343 7 3 0 4 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 + 68 A_0_ 5 339 6 2 0 3 68 -1 3 0 21 + 70 RW 5 348 6 2 1 7 70 -1 2 0 21 + 78 SIZE_1_ 5 338 7 1 0 78 -1 3 0 21 + 69 SIZE_0_ 5 346 6 1 0 69 -1 3 0 21 + 40 BERR 5 -1 4 1 2 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 342 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 341 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 340 1 0 6 -1 9 0 21 + 82 BGACK_030 5 345 7 0 82 -1 3 0 21 + 34 VMA 5 347 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 344 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 345 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 0 6 1 2 3 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 6 1 2 3 5 6 7 -1 -1 1 0 21 + 320 SM_AMIGA_6_ 3 -1 5 5 0 1 3 5 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 4 2 5 6 7 -1 -1 1 0 21 + 295 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 + 293 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 + 324 CYCLE_DMA_0_ 3 -1 6 3 0 2 6 -1 -1 3 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 0 3 0 1 6 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 3 4 5 -1 -1 1 0 21 + 294 cpu_est_2_ 3 -1 2 3 2 3 6 -1 -1 1 1 21 + 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 335 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 5 0 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 5 0 21 + 325 CYCLE_DMA_1_ 3 -1 2 2 0 2 -1 -1 4 0 21 + 347 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 + 336 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 323 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 1 2 1 2 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 1 2 1 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21 + 296 cpu_est_0_ 3 -1 3 2 2 3 -1 -1 3 0 21 + 332 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 3 2 0 3 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 3 2 2 3 -1 -1 1 0 21 + 342 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 341 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 340 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 327 CLK_030_PE_1_ 3 -1 0 1 0 -1 -1 7 0 21 + 326 CLK_030_PE_0_ 3 -1 0 1 0 -1 -1 7 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 6 0 21 + 334 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 + 343 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 328 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 339 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 338 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 333 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 3 0 21 + 348 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 344 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 337 N_81 3 -1 4 1 4 -1 -1 2 0 21 + 331 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 330 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 329 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 5 1 0 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 5 1 2 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 0 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 29 DTACK 1 -1 -1 1 5 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 0 10 -1 +117 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 4 2 3 4 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 4 5 7 41 -1 1 0 21 + 79 RW_000 5 343 7 3 4 5 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 3 5 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 5 6 7 30 -1 1 0 21 + 70 RW 5 348 6 2 3 7 70 -1 2 0 21 + 78 SIZE_1_ 5 341 7 1 1 78 -1 3 0 21 + 69 SIZE_0_ 5 346 6 1 1 69 -1 3 0 21 + 68 A_0_ 5 349 6 1 1 68 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 342 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 340 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 339 1 0 6 -1 9 0 21 + 82 BGACK_030 5 345 7 0 82 -1 3 0 21 + 34 VMA 5 347 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 344 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 345 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 3 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 320 SM_AMIGA_6_ 3 -1 5 4 1 3 5 7 -1 -1 3 0 21 + 300 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 7 0 21 + 328 RST_DLY_0_ 3 -1 0 3 0 2 6 -1 -1 4 0 21 + 295 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 293 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 336 SM_AMIGA_i_7_ 3 -1 5 3 2 5 7 -1 -1 3 1 21 + 324 CYCLE_DMA_0_ 3 -1 0 3 0 5 6 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 0 3 0 2 5 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 5 3 0 3 5 -1 -1 3 0 21 + 296 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 21 + 330 RST_DLY_2_ 3 -1 6 3 0 2 6 -1 -1 2 0 21 + 329 RST_DLY_1_ 3 -1 2 3 0 2 6 -1 -1 2 1 21 + 337 CLK_OUT_INTreg 3 -1 3 3 1 5 6 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 4 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21 + 294 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 1 1 21 + 327 CLK_030_PE_1_ 3 -1 6 2 5 6 -1 -1 7 0 21 + 303 inst_DS_000_DMA 3 -1 5 2 0 5 -1 -1 6 0 21 + 302 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 5 0 21 + 325 CYCLE_DMA_1_ 3 -1 5 2 5 6 -1 -1 4 0 21 + 347 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 332 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21 + 331 inst_DSACK1_INT 3 -1 2 2 2 7 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 0 2 0 1 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 5 2 1 5 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 7 2 0 3 -1 -1 1 0 21 + 342 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 340 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 339 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 326 CLK_030_PE_0_ 3 -1 6 1 6 -1 -1 7 0 21 + 335 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 + 334 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 343 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 349 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 346 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 341 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 333 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 3 1 3 -1 -1 3 0 21 + 348 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 344 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 338 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 1 1 5 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 3 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 1 1 3 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 2 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 1 3 66 -1 + 63 CLK_030 1 -1 -1 2 5 6 63 -1 + 55 IPL_1_ 1 -1 -1 2 0 1 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 35 VPA 1 -1 -1 1 7 35 -1 + 29 DTACK 1 -1 -1 1 2 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 +117 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 79 RW_000 5 342 7 4 0 2 4 6 79 -1 4 0 21 + 31 UDS_000 5 -1 3 4 0 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 4 0 2 6 7 30 -1 1 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 70 RW 5 347 6 2 5 7 70 -1 2 0 21 + 40 BERR 5 -1 4 2 0 3 40 -1 1 0 21 + 78 SIZE_1_ 5 340 7 1 2 78 -1 3 0 21 + 69 SIZE_0_ 5 345 6 1 2 69 -1 3 0 21 + 68 A_0_ 5 348 6 1 2 68 -1 3 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 341 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 339 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 349 1 0 6 -1 9 0 21 + 82 BGACK_030 5 344 7 0 82 -1 3 0 21 + 34 VMA 5 346 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 343 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 344 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 309 CLK_000_D_1_ 3 -1 7 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 + 307 inst_RESET_OUT 3 -1 3 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 310 CLK_000_D_0_ 3 -1 6 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 337 CLK_OUT_INTreg 3 -1 1 4 0 1 2 6 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 6 4 1 5 6 7 -1 -1 1 0 21 + 296 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 321 SM_AMIGA_6_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 0 3 0 1 2 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 + 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 8 0 21 + 327 CLK_030_PE_0_ 3 -1 0 2 0 2 -1 -1 7 0 21 + 308 CLK_030_PE_1_ 3 -1 0 2 0 2 -1 -1 7 0 21 + 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 335 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 5 0 21 + 334 SM_AMIGA_3_ 3 -1 3 2 0 3 -1 -1 5 0 21 + 302 inst_AS_000_DMA 3 -1 2 2 2 7 -1 -1 5 0 21 + 325 CYCLE_DMA_0_ 3 -1 0 2 0 2 -1 -1 4 0 21 + 346 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 336 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 324 SM_AMIGA_0_ 3 -1 7 2 5 7 -1 -1 3 0 21 + 323 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21 + 322 SM_AMIGA_4_ 3 -1 5 2 3 5 -1 -1 3 0 21 + 319 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 318 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 332 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 326 CYCLE_DMA_1_ 3 -1 0 2 0 2 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 1 2 1 3 -1 -1 2 0 21 + 306 inst_DTACK_D0 3 -1 5 2 0 3 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 + 349 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 341 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 339 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 342 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 328 RST_DLY_0_ 3 -1 3 1 3 -1 -1 4 0 21 + 348 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 345 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 340 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 333 SM_AMIGA_5_ 3 -1 5 1 5 -1 -1 3 0 21 + 347 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 343 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 338 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 331 inst_DSACK1_INT 3 -1 7 1 7 -1 -1 2 0 21 + 330 RST_DLY_2_ 3 -1 3 1 3 -1 -1 2 0 21 + 329 RST_DLY_1_ 3 -1 3 1 3 -1 -1 2 1 21 + 317 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 + 316 CLK_000_D_2_ 3 -1 4 1 1 -1 -1 1 0 21 + 315 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 + 314 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 313 IPL_D0_0_ 3 -1 6 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_50 3 -1 0 1 0 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 1 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 6 66 -1 + 59 A_1_ 1 -1 -1 2 1 5 59 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 2 63 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 5 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +116 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 1 2 3 4 5 7 81 -1 1 0 21 + 79 RW_000 5 344 7 3 0 4 6 79 -1 4 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 31 UDS_000 5 -1 3 3 0 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 0 6 7 30 -1 1 0 21 + 68 A_0_ 5 340 6 2 1 5 68 -1 3 0 21 + 70 RW 5 349 6 2 5 7 70 -1 2 0 21 + 78 SIZE_1_ 5 339 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 347 6 1 5 69 -1 3 0 21 + 40 BERR 5 -1 4 1 3 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 343 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 342 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 341 1 0 6 -1 9 0 21 + 82 BGACK_030 5 346 7 0 82 -1 3 0 21 + 34 VMA 5 348 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 345 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 346 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 310 CLK_000_D_0_ 3 -1 2 6 0 1 3 5 6 7 -1 -1 1 0 21 + 309 CLK_000_D_1_ 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 2 3 2 3 5 -1 -1 7 0 21 + 336 SM_AMIGA_i_7_ 3 -1 5 3 2 5 7 -1 -1 3 1 21 + 322 SM_AMIGA_4_ 3 -1 0 3 0 3 5 -1 -1 3 0 21 + 321 SM_AMIGA_6_ 3 -1 5 3 1 5 7 -1 -1 3 0 21 + 337 CLK_OUT_INTreg 3 -1 2 3 0 1 6 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 + 335 SM_AMIGA_2_ 3 -1 3 2 3 5 -1 -1 5 0 21 + 302 inst_AS_000_DMA 3 -1 0 2 0 7 -1 -1 5 0 21 + 296 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 333 SM_AMIGA_5_ 3 -1 1 2 0 1 -1 -1 3 0 21 + 324 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 323 SM_AMIGA_1_ 3 -1 5 2 1 5 -1 -1 3 0 21 + 319 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 318 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 332 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 331 inst_DSACK1_INT 3 -1 1 2 1 7 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 0 2 0 2 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_50 3 -1 5 2 0 5 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 1 1 21 + 343 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 342 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 341 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 327 CLK_030_PE_0_ 3 -1 0 1 0 -1 -1 8 0 21 + 308 CLK_030_PE_1_ 3 -1 0 1 0 -1 -1 8 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 8 0 21 + 334 SM_AMIGA_3_ 3 -1 3 1 3 -1 -1 5 0 21 + 344 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 328 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 325 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 4 0 21 + 348 RN_VMA 3 34 3 1 3 34 -1 3 0 21 + 347 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 340 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 339 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 293 cpu_est_0_ 3 -1 3 1 3 -1 -1 3 0 21 + 349 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 345 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 338 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 330 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 329 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 326 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 317 CLK_000_D_4_ 3 -1 5 1 5 -1 -1 1 0 21 + 316 CLK_000_D_2_ 3 -1 7 1 4 -1 -1 1 0 21 + 315 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 + 314 IPL_D0_1_ 3 -1 6 1 1 -1 -1 1 0 21 + 313 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 2 1 3 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 4 1 5 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 6 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 + 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 + 55 IPL_1_ 1 -1 -1 2 1 6 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 29 DTACK 1 -1 -1 1 2 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 2 10 -1 +114 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 340 7 2 4 6 79 -1 4 0 21 + 68 A_0_ 5 344 6 2 1 5 68 -1 3 0 21 + 70 RW 5 347 6 2 0 7 70 -1 2 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 337 7 1 1 78 -1 3 0 21 + 69 SIZE_0_ 5 339 6 1 1 69 -1 3 0 21 + 40 BERR 5 -1 4 1 5 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 346 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 345 1 0 6 -1 9 0 21 + 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 341 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 0 6 0 1 2 3 5 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 + 320 SM_AMIGA_6_ 3 -1 2 5 0 1 2 5 7 -1 -1 3 0 21 + 295 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 323 SM_AMIGA_0_ 3 -1 0 3 0 2 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21 + 294 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 1 1 21 + 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 + 303 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 5 0 21 + 302 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 5 0 21 + 324 CYCLE_DMA_0_ 3 -1 0 2 0 6 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 334 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 + 331 SM_AMIGA_5_ 3 -1 1 2 1 5 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 + 330 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 329 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 + 325 CYCLE_DMA_1_ 3 -1 0 2 0 6 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 336 CLK_OUT_INTreg 3 -1 3 2 1 6 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 7 2 3 6 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 6 2 6 7 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 1 2 2 6 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 + 346 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 345 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 333 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 + 332 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 + 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 326 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 + 344 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 339 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 347 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 335 N_60 3 -1 4 1 4 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 + 316 CLK_000_D_4_ 3 -1 6 1 2 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 29 DTACK 1 -1 -1 1 3 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 0 10 -1 +114 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 79 RW_000 5 340 7 2 4 6 79 -1 4 0 21 + 68 A_0_ 5 344 6 2 1 5 68 -1 3 0 21 + 70 RW 5 347 6 2 0 7 70 -1 2 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 337 7 1 1 78 -1 3 0 21 + 69 SIZE_0_ 5 339 6 1 1 69 -1 3 0 21 + 40 BERR 5 -1 4 1 5 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 346 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 345 1 0 6 -1 9 0 21 + 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 341 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 0 6 0 1 2 3 5 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 6 0 1 2 3 5 7 -1 -1 1 0 21 + 320 SM_AMIGA_6_ 3 -1 2 5 0 1 2 5 7 -1 -1 3 0 21 + 295 cpu_est_3_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 293 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 21 + 323 SM_AMIGA_0_ 3 -1 0 3 0 2 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 4 3 2 3 4 -1 -1 1 0 21 + 294 cpu_est_2_ 3 -1 5 3 3 5 6 -1 -1 1 1 21 + 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 + 303 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 5 0 21 + 302 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 5 0 21 + 324 CYCLE_DMA_0_ 3 -1 0 2 0 6 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 334 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 + 331 SM_AMIGA_5_ 3 -1 1 2 1 5 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 296 cpu_est_0_ 3 -1 3 2 3 5 -1 -1 3 0 21 + 330 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 329 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 + 325 CYCLE_DMA_1_ 3 -1 0 2 0 6 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 336 CLK_OUT_INTreg 3 -1 3 2 1 6 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 7 2 3 6 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 6 2 6 7 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 1 2 2 6 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 5 2 3 5 -1 -1 1 0 21 + 346 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 345 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 333 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 + 332 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 + 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 326 RST_DLY_0_ 3 -1 0 1 0 -1 -1 4 0 21 + 344 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 339 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 347 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 335 N_60 3 -1 4 1 4 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 0 1 0 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 0 1 0 -1 -1 2 1 21 + 316 CLK_000_D_4_ 3 -1 6 1 2 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 1 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 3 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 29 DTACK 1 -1 -1 1 3 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 0 10 -1 +114 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 0 2 3 4 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21 + 79 RW_000 5 340 7 2 4 6 79 -1 4 0 21 + 70 RW 5 344 6 2 0 7 70 -1 2 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 337 7 1 1 78 -1 3 0 21 + 69 SIZE_0_ 5 339 6 1 1 69 -1 3 0 21 + 68 A_0_ 5 345 6 1 1 68 -1 3 0 21 + 40 BERR 5 -1 4 1 5 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 + 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 341 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 7 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 + 342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 1 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 309 CLK_000_D_0_ 3 -1 0 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 295 cpu_est_3_ 3 -1 0 4 0 3 5 6 -1 -1 4 0 21 + 293 cpu_est_1_ 3 -1 3 4 0 3 5 6 -1 -1 4 0 21 + 320 SM_AMIGA_6_ 3 -1 2 4 0 1 2 7 -1 -1 3 0 21 + 296 cpu_est_0_ 3 -1 6 4 0 3 5 6 -1 -1 3 0 21 + 294 cpu_est_2_ 3 -1 3 4 0 3 5 6 -1 -1 1 1 21 + 323 SM_AMIGA_0_ 3 -1 5 3 2 5 7 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 3 3 0 3 5 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 + 303 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 6 0 21 + 302 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 6 0 21 + 326 RST_DLY_0_ 3 -1 5 2 1 5 -1 -1 4 0 21 + 324 CYCLE_DMA_0_ 3 -1 0 2 0 6 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 3 5 34 -1 3 0 21 + 334 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 + 331 SM_AMIGA_5_ 3 -1 2 2 2 3 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 1 2 1 3 -1 -1 3 0 21 + 330 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 + 329 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 1 2 1 5 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 5 2 1 5 -1 -1 2 1 21 + 325 CYCLE_DMA_1_ 3 -1 0 2 0 6 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 1 2 1 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 336 CLK_OUT_INTreg 3 -1 7 2 1 6 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 5 2 6 7 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 3 2 3 5 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 6 2 0 2 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 0 2 3 5 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 333 SM_AMIGA_2_ 3 -1 5 1 5 -1 -1 5 0 21 + 332 SM_AMIGA_3_ 3 -1 5 1 5 -1 -1 5 0 21 + 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 345 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 339 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 344 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 335 N_243 3 -1 4 1 4 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 0 1 2 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 4 1 6 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 5 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 3 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 2 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 5 1 5 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 5 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 2 66 -1 + 55 IPL_1_ 1 -1 -1 2 1 3 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 29 DTACK 1 -1 -1 1 5 29 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 0 10 -1 +114 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 0 1 3 4 5 7 81 -1 1 0 21 + 79 RW_000 5 339 7 4 0 3 4 6 79 -1 4 0 21 + 41 AS_000 5 -1 4 4 0 3 4 7 41 -1 1 0 21 + 31 UDS_000 5 -1 3 4 0 3 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 4 0 3 6 7 30 -1 1 0 21 + 68 A_0_ 5 344 6 2 0 2 68 -1 3 0 21 + 70 RW 5 345 6 2 0 7 70 -1 2 0 21 + 29 DTACK 5 342 3 1 6 29 -1 6 0 21 + 78 SIZE_1_ 5 336 7 1 2 78 -1 3 0 21 + 69 SIZE_0_ 5 338 6 1 2 69 -1 3 0 21 + 40 BERR 5 -1 4 1 2 40 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 337 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 + 82 BGACK_030 5 341 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 340 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 341 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 308 CLK_000_D_0_ 3 -1 1 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 + 306 inst_RESET_OUT 3 -1 6 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 307 CLK_000_D_1_ 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 296 cpu_est_3_ 3 -1 5 4 2 3 5 6 -1 -1 4 0 21 + 294 cpu_est_1_ 3 -1 5 4 2 3 5 6 -1 -1 4 0 21 + 319 SM_AMIGA_6_ 3 -1 1 4 0 1 2 7 -1 -1 3 0 21 + 334 CLK_OUT_INTreg 3 -1 3 4 0 1 3 6 -1 -1 1 0 21 + 295 cpu_est_2_ 3 -1 2 4 2 3 5 6 -1 -1 1 1 21 + 300 inst_AS_030_000_SYNC 3 -1 5 3 1 3 5 -1 -1 7 0 21 + 333 SM_AMIGA_i_7_ 3 -1 1 3 1 5 7 -1 -1 3 1 21 + 322 SM_AMIGA_0_ 3 -1 5 3 1 5 7 -1 -1 3 0 21 + 320 SM_AMIGA_4_ 3 -1 6 3 0 2 6 -1 -1 3 0 21 + 293 cpu_est_0_ 3 -1 5 3 2 3 5 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 0 3 5 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 + 342 RN_DTACK 3 29 3 2 3 7 29 -1 6 0 21 + 332 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 5 0 21 + 325 RST_DLY_0_ 3 -1 6 2 2 6 -1 -1 4 0 21 + 323 CYCLE_DMA_0_ 3 -1 0 2 0 3 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 + 330 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 3 0 21 + 317 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 + 316 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 329 inst_AS_000_INT 3 -1 1 2 1 4 -1 -1 2 0 21 + 328 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 + 327 RST_DLY_2_ 3 -1 2 2 2 6 -1 -1 2 0 21 + 326 RST_DLY_1_ 3 -1 6 2 2 6 -1 -1 2 1 21 + 324 CYCLE_DMA_1_ 3 -1 3 2 0 3 -1 -1 2 0 21 + 318 inst_UDS_000_INT 3 -1 0 2 0 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 310 inst_CLK_OUT_PRE_D 3 -1 7 2 0 3 -1 -1 1 0 21 + 304 CLK_000_D_3_ 3 -1 0 2 1 5 -1 -1 1 0 21 + 303 inst_VPA_D 3 -1 0 2 2 3 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 337 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 302 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 6 0 21 + 331 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 + 339 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 344 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 338 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 336 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 321 SM_AMIGA_1_ 3 -1 5 1 5 -1 -1 3 0 21 + 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 340 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 335 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 315 CLK_000_D_4_ 3 -1 5 1 1 -1 -1 1 0 21 + 314 CLK_000_D_2_ 3 -1 3 1 0 -1 -1 1 0 21 + 313 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 312 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 311 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21 + 309 inst_CLK_OUT_PRE_50 3 -1 7 1 7 -1 -1 1 0 21 + 305 inst_DTACK_D0 3 -1 6 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 1 5 66 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 0 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 1 10 -1 +114 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 + 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 + 79 RW_000 5 340 7 2 4 6 79 -1 4 0 21 + 68 A_0_ 5 343 6 2 2 3 68 -1 3 0 21 + 70 RW 5 347 6 2 2 7 70 -1 2 0 21 + 78 SIZE_1_ 5 337 7 1 2 78 -1 3 0 21 + 69 SIZE_0_ 5 338 6 1 2 69 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 29 DTACK 5 -1 3 1 6 29 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 339 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 346 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 344 1 0 6 -1 9 0 21 + 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 34 VMA 5 345 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 341 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 309 CLK_000_D_0_ 3 -1 6 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 + 307 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 308 CLK_000_D_1_ 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 293 cpu_est_0_ 3 -1 7 5 0 1 3 6 7 -1 -1 3 0 21 + 294 cpu_est_1_ 3 -1 6 4 0 1 3 6 -1 -1 4 0 21 + 320 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21 + 295 cpu_est_2_ 3 -1 1 4 0 1 3 6 -1 -1 1 1 21 + 302 inst_AS_000_DMA 3 -1 1 3 1 3 7 -1 -1 5 0 21 + 296 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 3 5 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 333 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 + 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 5 0 21 + 326 RST_DLY_0_ 3 -1 2 2 0 2 -1 -1 4 0 21 + 324 CYCLE_DMA_0_ 3 -1 2 2 1 2 -1 -1 4 0 21 + 345 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 334 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 331 SM_AMIGA_5_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 330 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21 + 329 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 0 2 0 2 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 0 2 0 2 -1 -1 2 1 21 + 325 CYCLE_DMA_1_ 3 -1 1 2 1 2 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 335 CLK_OUT_INTreg 3 -1 3 2 1 6 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 6 2 1 3 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 5 2 0 5 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 5 2 0 3 -1 -1 1 0 21 + 346 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 344 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 332 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 343 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 338 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 347 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 0 1 5 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 7 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 7 66 -1 + 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +114 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 + 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 + 79 RW_000 5 340 7 2 4 6 79 -1 4 0 21 + 68 A_0_ 5 343 6 2 2 3 68 -1 3 0 21 + 70 RW 5 347 6 2 2 7 70 -1 2 0 21 + 78 SIZE_1_ 5 337 7 1 2 78 -1 3 0 21 + 69 SIZE_0_ 5 338 6 1 2 69 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 29 DTACK 5 -1 3 1 6 29 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 339 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 346 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 345 1 0 6 -1 9 0 21 + 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 34 VMA 5 344 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 341 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 309 CLK_000_D_0_ 3 -1 6 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 + 307 inst_RESET_OUT 3 -1 0 7 0 1 2 3 4 6 7 -1 -1 2 0 21 + 308 CLK_000_D_1_ 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 293 cpu_est_0_ 3 -1 7 5 0 1 3 6 7 -1 -1 3 0 21 + 294 cpu_est_1_ 3 -1 6 4 0 1 3 6 -1 -1 4 0 21 + 320 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21 + 295 cpu_est_2_ 3 -1 1 4 0 1 3 6 -1 -1 1 1 21 + 302 inst_AS_000_DMA 3 -1 1 3 1 3 7 -1 -1 5 0 21 + 296 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 3 5 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 333 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 + 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 5 0 21 + 326 RST_DLY_0_ 3 -1 2 2 0 2 -1 -1 4 0 21 + 324 CYCLE_DMA_0_ 3 -1 2 2 1 2 -1 -1 4 0 21 + 344 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 334 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 331 SM_AMIGA_5_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 330 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21 + 329 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 0 2 0 2 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 0 2 0 2 -1 -1 2 1 21 + 325 CYCLE_DMA_1_ 3 -1 1 2 1 2 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 335 CLK_OUT_INTreg 3 -1 3 2 1 6 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 6 2 1 3 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 5 2 0 5 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 5 2 0 3 -1 -1 1 0 21 + 346 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 345 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 332 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 343 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 338 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 347 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 0 1 5 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 7 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 7 66 -1 + 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +115 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 0 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 + 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 + 79 RW_000 5 340 7 2 4 6 79 -1 4 0 21 + 68 A_0_ 5 344 6 2 2 3 68 -1 3 0 21 + 70 RW 5 345 6 2 2 7 70 -1 2 0 21 + 78 SIZE_1_ 5 337 7 1 2 78 -1 3 0 21 + 69 SIZE_0_ 5 339 6 1 2 69 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 29 DTACK 5 -1 3 1 6 29 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 338 1 0 8 -1 9 0 21 + 7 IPL_030_0_ 5 347 1 0 7 -1 9 0 21 + 6 IPL_030_1_ 5 346 1 0 6 -1 9 0 21 + 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 34 VMA 5 343 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 341 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 342 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 309 CLK_000_D_0_ 3 -1 6 8 0 1 2 3 4 5 6 7 -1 -1 1 0 21 + 308 CLK_000_D_1_ 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 294 cpu_est_0_ 3 -1 7 5 0 1 3 6 7 -1 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 0 5 0 3 4 6 7 -1 -1 2 0 21 + 295 cpu_est_1_ 3 -1 6 4 0 1 3 6 -1 -1 4 0 21 + 320 SM_AMIGA_6_ 3 -1 5 4 2 3 5 7 -1 -1 3 0 21 + 296 cpu_est_2_ 3 -1 1 4 0 1 3 6 -1 -1 1 1 21 + 302 inst_AS_000_DMA 3 -1 1 3 1 3 7 -1 -1 5 0 21 + 293 cpu_est_3_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 3 5 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 3 4 5 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 333 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 + 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 5 0 21 + 326 RST_DLY_0_ 3 -1 2 2 0 2 -1 -1 4 0 21 + 324 CYCLE_DMA_0_ 3 -1 2 2 1 2 -1 -1 4 0 21 + 343 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 334 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 331 SM_AMIGA_5_ 3 -1 3 2 0 3 -1 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 321 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 330 inst_AS_000_INT 3 -1 3 2 3 4 -1 -1 2 0 21 + 329 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 0 2 0 2 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 0 2 0 2 -1 -1 2 1 21 + 325 CYCLE_DMA_1_ 3 -1 1 2 1 2 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 335 CLK_OUT_INTreg 3 -1 3 2 1 6 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 6 2 1 3 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 5 2 5 6 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 5 2 0 5 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 5 2 0 3 -1 -1 1 0 21 + 347 RN_IPL_030_0_ 3 7 1 1 1 7 -1 9 0 21 + 346 RN_IPL_030_1_ 3 6 1 1 1 6 -1 9 0 21 + 338 RN_IPL_030_2_ 3 8 1 1 1 8 -1 9 0 21 + 332 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 344 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 339 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 0 1 5 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 5 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 7 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 66 IPL_0_ 1 -1 -1 2 1 7 66 -1 + 55 IPL_1_ 1 -1 -1 2 1 5 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 2 RESET 1 -1 -1 2 1 2 2 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +115 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 5 2 3 4 5 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 + 31 UDS_000 5 -1 3 3 1 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 1 6 7 30 -1 1 0 21 + 79 RW_000 5 340 7 2 4 6 79 -1 4 0 21 + 70 RW 5 347 6 2 5 7 70 -1 2 0 21 + 78 SIZE_1_ 5 337 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 338 6 1 5 69 -1 3 0 21 + 68 A_0_ 5 343 6 1 5 68 -1 3 0 21 + 40 BERR 5 -1 4 1 6 40 -1 1 0 21 + 29 DTACK 5 -1 3 1 3 29 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 339 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 345 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 344 1 0 6 -1 10 0 21 + 82 BGACK_030 5 342 7 0 82 -1 3 0 21 + 34 VMA 5 346 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 341 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 342 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 307 inst_RESET_OUT 3 -1 5 6 0 3 4 5 6 7 -1 -1 2 0 21 + 308 CLK_000_D_1_ 3 -1 7 6 0 3 4 5 6 7 -1 -1 1 0 21 + 309 CLK_000_D_0_ 3 -1 6 5 0 3 5 6 7 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 2 3 0 2 3 -1 -1 7 0 21 + 302 inst_AS_000_DMA 3 -1 1 3 1 3 7 -1 -1 5 0 21 + 334 SM_AMIGA_i_7_ 3 -1 0 3 0 2 7 -1 -1 3 1 21 + 321 SM_AMIGA_4_ 3 -1 0 3 0 5 6 -1 -1 3 0 21 + 320 SM_AMIGA_6_ 3 -1 0 3 0 5 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 + 333 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 5 0 21 + 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 5 0 21 + 324 CYCLE_DMA_0_ 3 -1 0 2 0 1 -1 -1 4 0 21 + 295 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 293 cpu_est_3_ 3 -1 3 2 3 6 -1 -1 4 0 21 + 346 RN_VMA 3 34 3 2 3 6 34 -1 3 0 21 + 323 SM_AMIGA_0_ 3 -1 0 2 0 7 -1 -1 3 0 21 + 322 SM_AMIGA_1_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 318 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 317 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 294 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 330 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 329 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 + 325 CYCLE_DMA_1_ 3 -1 0 2 0 1 -1 -1 2 0 21 + 319 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 335 CLK_OUT_INTreg 3 -1 0 2 1 6 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_D 3 -1 2 2 0 1 -1 -1 1 0 21 + 310 inst_CLK_OUT_PRE_50 3 -1 0 2 0 2 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 3 2 0 2 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 3 2 3 6 -1 -1 1 0 21 + 296 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 1 1 21 + 345 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 344 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 332 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 5 0 21 + 340 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 326 RST_DLY_0_ 3 -1 5 1 5 -1 -1 4 0 21 + 343 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 338 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 337 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 331 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21 + 347 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 341 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 336 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 328 RST_DLY_2_ 3 -1 5 1 5 -1 -1 2 0 21 + 327 RST_DLY_1_ 3 -1 5 1 5 -1 -1 2 1 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 316 CLK_000_D_4_ 3 -1 2 1 0 -1 -1 1 0 21 + 315 CLK_000_D_2_ 3 -1 4 1 3 -1 -1 1 0 21 + 314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21 + 313 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 312 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 3 1 6 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 2 67 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 2 RESET 1 -1 -1 2 1 2 2 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +116 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 2 3 4 5 6 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 4 0 1 4 7 41 -1 1 0 21 + 79 RW_000 5 341 7 2 4 6 79 -1 4 0 21 + 68 A_0_ 5 346 6 2 5 6 68 -1 3 0 21 + 70 RW 5 345 6 2 5 7 70 -1 2 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 338 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 340 6 1 5 69 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 29 DTACK 5 -1 3 1 6 29 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 339 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 348 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 347 1 0 6 -1 10 0 21 + 82 BGACK_030 5 343 7 0 82 -1 3 0 21 + 34 VMA 5 344 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 342 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 343 RN_BGACK_030 3 82 7 7 0 1 2 3 4 6 7 82 -1 3 0 21 + 310 CLK_000_D_0_ 3 -1 4 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 309 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 307 inst_RESET_OUT 3 -1 5 6 0 3 4 5 6 7 -1 -1 2 0 21 + 321 SM_AMIGA_6_ 3 -1 2 4 2 5 6 7 -1 -1 3 0 21 + 302 inst_AS_000_DMA 3 -1 1 3 1 3 7 -1 -1 5 0 21 + 296 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 294 cpu_est_3_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 323 SM_AMIGA_1_ 3 -1 0 3 0 2 6 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 0 3 2 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 2 3 4 -1 -1 1 0 21 + 293 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 1 1 21 + 300 inst_AS_030_000_SYNC 3 -1 2 2 2 3 -1 -1 7 0 21 + 303 inst_DS_000_DMA 3 -1 1 2 0 1 -1 -1 5 0 21 + 344 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 335 SM_AMIGA_i_7_ 3 -1 2 2 2 7 -1 -1 3 1 21 + 332 SM_AMIGA_5_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 324 SM_AMIGA_0_ 3 -1 2 2 2 7 -1 -1 3 0 21 + 322 SM_AMIGA_4_ 3 -1 0 2 0 5 -1 -1 3 0 21 + 319 inst_DS_000_ENABLE 3 -1 5 2 3 5 -1 -1 3 0 21 + 318 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 295 cpu_est_0_ 3 -1 0 2 0 3 -1 -1 3 0 21 + 331 inst_AS_000_INT 3 -1 5 2 4 5 -1 -1 2 0 21 + 330 inst_DSACK1_INT 3 -1 6 2 6 7 -1 -1 2 0 21 + 320 inst_UDS_000_INT 3 -1 6 2 3 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 2 2 2 3 -1 -1 2 0 21 + 336 CLK_OUT_INTreg 3 -1 0 2 1 6 -1 -1 1 0 21 + 312 inst_CLK_OUT_PRE_D 3 -1 3 2 0 1 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 0 2 2 5 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 6 2 0 3 -1 -1 1 0 21 + 348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 334 SM_AMIGA_2_ 3 -1 0 1 0 -1 -1 5 0 21 + 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 341 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 327 RST_DLY_0_ 3 -1 5 1 5 -1 -1 4 0 21 + 325 CYCLE_DMA_0_ 3 -1 1 1 1 -1 -1 4 0 21 + 346 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 340 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 338 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 342 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 337 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 329 RST_DLY_2_ 3 -1 5 1 5 -1 -1 2 0 21 + 328 RST_DLY_1_ 3 -1 5 1 5 -1 -1 2 1 21 + 326 CYCLE_DMA_1_ 3 -1 1 1 1 -1 -1 2 0 21 + 308 inst_AMIGA_DS 3 -1 7 1 1 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 2 1 2 -1 -1 2 0 21 + 317 CLK_000_D_4_ 3 -1 5 1 2 -1 -1 1 0 21 + 316 CLK_000_D_2_ 3 -1 6 1 0 -1 -1 1 0 21 + 315 IPL_D0_2_ 3 -1 6 1 1 -1 -1 1 0 21 + 314 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 313 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 + 311 inst_CLK_OUT_PRE_50 3 -1 3 1 3 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 6 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 7 0 1 2 3 4 6 7 13 -1 + 96 A_DECODE_19_ 1 -1 -1 3 2 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 2 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 2 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 2 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 2 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 2 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 67 IPL_2_ 1 -1 -1 2 1 6 67 -1 + 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 2 RESET 1 -1 -1 2 1 2 2 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 59 A_1_ 1 -1 -1 1 2 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 4 10 -1 +115 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 0 3 4 5 6 7 81 -1 1 0 21 + 41 AS_000 5 -1 4 5 0 1 2 4 7 41 -1 1 0 21 + 79 RW_000 5 341 7 3 2 4 6 79 -1 4 0 21 + 70 RW 5 345 6 2 0 7 70 -1 2 0 21 + 31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21 + 78 SIZE_1_ 5 338 7 1 2 78 -1 3 0 21 + 69 SIZE_0_ 5 340 6 1 2 69 -1 3 0 21 + 68 A_0_ 5 346 6 1 2 68 -1 3 0 21 + 40 BERR 5 -1 4 1 0 40 -1 1 0 21 + 29 DTACK 5 -1 3 1 3 29 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 339 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 348 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 347 1 0 6 -1 10 0 21 + 82 BGACK_030 5 343 7 0 82 -1 3 0 21 + 34 VMA 5 344 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 342 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 343 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 311 CLK_000_D_0_ 3 -1 6 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 310 CLK_000_D_1_ 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 21 + 322 SM_AMIGA_6_ 3 -1 5 5 0 2 3 5 7 -1 -1 3 0 21 + 308 inst_RESET_OUT 3 -1 6 5 0 3 4 6 7 -1 -1 2 0 21 + 302 inst_AS_000_DMA 3 -1 2 3 2 3 7 -1 -1 6 0 21 + 295 cpu_est_3_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 293 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 21 + 296 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 + 336 CLK_OUT_INTreg 3 -1 5 3 1 2 6 -1 -1 1 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 3 5 6 7 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 6 3 3 4 5 -1 -1 1 0 21 + 294 cpu_est_2_ 3 -1 0 3 0 3 6 -1 -1 1 1 21 + 300 inst_AS_030_000_SYNC 3 -1 5 2 3 5 -1 -1 7 0 21 + 303 inst_DS_000_DMA 3 -1 2 2 0 2 -1 -1 6 0 21 + 334 SM_AMIGA_2_ 3 -1 0 2 0 5 -1 -1 5 0 21 + 327 RST_DLY_0_ 3 -1 1 2 1 6 -1 -1 4 0 21 + 304 CYCLE_DMA_0_ 3 -1 1 2 1 2 -1 -1 4 0 21 + 344 RN_VMA 3 34 3 2 0 3 34 -1 3 0 21 + 335 SM_AMIGA_i_7_ 3 -1 5 2 5 7 -1 -1 3 1 21 + 332 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 3 0 21 + 325 SM_AMIGA_0_ 3 -1 5 2 5 7 -1 -1 3 0 21 + 323 SM_AMIGA_4_ 3 -1 1 2 0 1 -1 -1 3 0 21 + 320 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 2 2 2 3 -1 -1 3 0 21 + 331 inst_AS_000_INT 3 -1 0 2 0 4 -1 -1 2 0 21 + 330 inst_DSACK1_INT 3 -1 5 2 5 7 -1 -1 2 0 21 + 329 RST_DLY_2_ 3 -1 1 2 1 6 -1 -1 2 0 21 + 328 RST_DLY_1_ 3 -1 6 2 1 6 -1 -1 2 1 21 + 326 CYCLE_DMA_1_ 3 -1 2 2 1 2 -1 -1 2 0 21 + 321 inst_UDS_000_INT 3 -1 2 2 2 3 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 6 2 2 6 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 6 2 3 6 -1 -1 2 0 21 + 313 inst_CLK_OUT_PRE_D 3 -1 5 2 2 5 -1 -1 1 0 21 + 312 inst_CLK_OUT_PRE_50 3 -1 0 2 0 5 -1 -1 1 0 21 + 306 CLK_000_D_3_ 3 -1 4 2 0 5 -1 -1 1 0 21 + 305 inst_VPA_D 3 -1 3 2 0 3 -1 -1 1 0 21 + 348 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 347 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 339 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 333 SM_AMIGA_3_ 3 -1 0 1 0 -1 -1 5 0 21 + 341 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 346 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 340 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 338 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 324 SM_AMIGA_1_ 3 -1 5 1 5 -1 -1 3 0 21 + 345 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 342 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 337 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 309 inst_AMIGA_DS 3 -1 7 1 2 -1 -1 2 0 21 + 318 CLK_000_D_4_ 3 -1 0 1 5 -1 -1 1 0 21 + 317 CLK_000_D_2_ 3 -1 5 1 4 -1 -1 1 0 21 + 316 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 315 IPL_D0_1_ 3 -1 2 1 1 -1 -1 1 0 21 + 314 IPL_D0_0_ 3 -1 0 1 1 -1 -1 1 0 21 + 307 inst_DTACK_D0 3 -1 3 1 0 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1 + 57 FC_1_ 1 -1 -1 3 4 5 7 57 -1 + 56 FC_0_ 1 -1 -1 3 4 5 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 66 IPL_0_ 1 -1 -1 2 0 1 66 -1 + 55 IPL_1_ 1 -1 -1 2 1 2 55 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 2 RESET 1 -1 -1 2 1 2 2 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 59 A_1_ 1 -1 -1 1 6 59 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 6 10 -1 +119 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 -1 7 6 0 1 2 3 4 7 81 -1 1 0 21 + 79 RW_000 5 345 7 3 0 4 6 79 -1 4 0 21 + 41 AS_000 5 -1 4 3 0 4 7 41 -1 1 0 21 + 31 UDS_000 5 -1 3 3 2 6 7 31 -1 1 0 21 + 30 LDS_000 5 -1 3 3 2 6 7 30 -1 1 0 21 + 70 RW 5 350 6 2 2 7 70 -1 2 0 21 + 78 SIZE_1_ 5 341 7 1 5 78 -1 3 0 21 + 69 SIZE_0_ 5 348 6 1 5 69 -1 3 0 21 + 68 A_0_ 5 340 6 1 5 68 -1 3 0 21 + 40 BERR 5 -1 4 1 2 40 -1 1 0 21 + 29 DTACK 5 -1 3 1 1 29 -1 1 0 21 + 18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21 + 17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21 + 16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21 + 15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21 + 14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21 + 5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21 + 4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21 + 3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21 + 8 IPL_030_2_ 5 344 1 0 8 -1 10 0 21 + 7 IPL_030_0_ 5 343 1 0 7 -1 10 0 21 + 6 IPL_030_1_ 5 342 1 0 6 -1 10 0 21 + 82 BGACK_030 5 347 7 0 82 -1 3 0 21 + 34 VMA 5 349 3 0 34 -1 3 0 21 + 65 E 0 6 0 65 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21 + 28 BG_000 5 346 3 0 28 -1 2 0 21 + 97 DS_030 0 0 0 97 -1 1 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 80 DSACK1 0 7 0 80 -1 1 0 21 + 77 FPU_CS 0 7 0 77 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 347 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21 + 311 CLK_000_D_0_ 3 -1 3 6 0 2 3 5 6 7 -1 -1 1 0 21 + 310 CLK_000_D_1_ 3 -1 7 6 0 2 3 5 6 7 -1 -1 1 0 21 + 307 inst_RESET_OUT 3 -1 6 5 0 3 4 6 7 -1 -1 2 0 21 + 322 SM_AMIGA_6_ 3 -1 5 4 2 5 6 7 -1 -1 3 0 21 + 301 inst_BGACK_030_INT_D 3 -1 7 4 1 5 6 7 -1 -1 1 0 21 + 300 inst_AS_030_000_SYNC 3 -1 1 3 1 3 5 -1 -1 7 0 21 + 302 inst_AS_000_DMA 3 -1 0 3 0 3 7 -1 -1 6 0 21 + 295 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 + 293 cpu_est_1_ 3 -1 3 3 2 3 6 -1 -1 4 0 21 + 337 SM_AMIGA_i_7_ 3 -1 5 3 1 5 7 -1 -1 3 1 21 + 325 SM_AMIGA_0_ 3 -1 0 3 0 5 7 -1 -1 3 0 21 + 296 cpu_est_0_ 3 -1 6 3 2 3 6 -1 -1 3 0 21 + 338 CLK_OUT_INTreg 3 -1 3 3 0 1 6 -1 -1 1 0 21 + 299 inst_AS_030_D0 3 -1 7 3 1 3 4 -1 -1 1 0 21 + 294 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 1 1 21 + 336 SM_AMIGA_2_ 3 -1 2 2 2 5 -1 -1 5 0 21 + 349 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21 + 334 SM_AMIGA_5_ 3 -1 6 2 0 6 -1 -1 3 0 21 + 324 SM_AMIGA_1_ 3 -1 5 2 0 5 -1 -1 3 0 21 + 323 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 3 0 21 + 320 inst_DS_000_ENABLE 3 -1 2 2 2 3 -1 -1 3 0 21 + 319 inst_LDS_000_INT 3 -1 5 2 3 5 -1 -1 3 0 21 + 333 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21 + 332 inst_DSACK1_INT 3 -1 0 2 0 7 -1 -1 2 0 21 + 321 inst_UDS_000_INT 3 -1 5 2 3 5 -1 -1 2 0 21 + 298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 5 2 2 5 -1 -1 2 0 21 + 297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 5 2 3 5 -1 -1 2 0 21 + 313 inst_CLK_OUT_PRE_D 3 -1 4 2 0 3 -1 -1 1 0 21 + 312 inst_CLK_OUT_PRE_50 3 -1 6 2 4 6 -1 -1 1 0 21 + 305 CLK_000_D_3_ 3 -1 5 2 2 5 -1 -1 1 0 21 + 304 inst_VPA_D 3 -1 5 2 2 3 -1 -1 1 0 21 + 344 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21 + 343 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21 + 342 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21 + 328 CLK_030_PE_0_ 3 -1 0 1 0 -1 -1 9 0 21 + 303 inst_DS_000_DMA 3 -1 0 1 0 -1 -1 9 0 21 + 308 CLK_030_PE_1_ 3 -1 0 1 0 -1 -1 6 0 21 + 335 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21 + 345 RN_RW_000 3 79 7 1 7 79 -1 4 0 21 + 329 RST_DLY_0_ 3 -1 6 1 6 -1 -1 4 0 21 + 326 CYCLE_DMA_0_ 3 -1 0 1 0 -1 -1 4 0 21 + 348 RN_SIZE_0_ 3 69 6 1 6 69 -1 3 0 21 + 341 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 340 RN_A_0_ 3 68 6 1 6 68 -1 3 0 21 + 350 RN_RW 3 70 6 1 6 70 -1 2 0 21 + 346 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 339 CIIN_0 3 -1 4 1 4 -1 -1 2 0 21 + 331 RST_DLY_2_ 3 -1 6 1 6 -1 -1 2 0 21 + 330 RST_DLY_1_ 3 -1 6 1 6 -1 -1 2 1 21 + 327 CYCLE_DMA_1_ 3 -1 0 1 0 -1 -1 2 0 21 + 309 inst_AMIGA_DS 3 -1 2 1 0 -1 -1 2 0 21 + 318 CLK_000_D_4_ 3 -1 2 1 5 -1 -1 1 0 21 + 317 CLK_000_D_2_ 3 -1 7 1 5 -1 -1 1 0 21 + 316 IPL_D0_2_ 3 -1 1 1 1 -1 -1 1 0 21 + 315 IPL_D0_1_ 3 -1 1 1 1 -1 -1 1 0 21 + 314 IPL_D0_0_ 3 -1 1 1 1 -1 -1 1 0 21 + 306 inst_DTACK_D0 3 -1 1 1 2 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 8 0 1 2 3 4 5 6 7 13 -1 + 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1 + 96 A_DECODE_19_ 1 -1 -1 3 1 4 7 96 -1 + 95 A_DECODE_16_ 1 -1 -1 3 1 4 7 95 -1 + 94 A_DECODE_18_ 1 -1 -1 3 1 4 7 94 -1 + 58 A_DECODE_17_ 1 -1 -1 3 1 4 7 58 -1 + 57 FC_1_ 1 -1 -1 3 1 4 7 57 -1 + 56 FC_0_ 1 -1 -1 3 1 4 7 56 -1 + 90 FPU_SENSE 1 -1 -1 2 4 7 90 -1 + 27 BGACK_000 1 -1 -1 2 4 7 27 -1 + 2 RESET 1 -1 -1 2 1 2 2 -1 + 93 A_DECODE_21_ 1 -1 -1 1 4 93 -1 + 92 A_DECODE_20_ 1 -1 -1 1 4 92 -1 + 84 A_DECODE_23_ 1 -1 -1 1 4 84 -1 + 83 A_DECODE_22_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 63 CLK_030 1 -1 -1 1 0 63 -1 + 59 A_1_ 1 -1 -1 1 5 59 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 5 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 \ No newline at end of file diff --git a/Logic/68030_tk.plc b/Logic/68030_tk.plc index 3b4c232..1b8e1cf 100644 --- a/Logic/68030_tk.plc +++ b/Logic/68030_tk.plc @@ -8,11 +8,15 @@ ; Source file 68030_tk.tt4 ; FITTER-generated Placements. ; DEVICE mach447a -; DATE Wed Oct 26 22:26:30 2016 +; DATE Fri Nov 18 19:32:41 2016 Pin 4 AHIGH_31_ Comb ; S6=1 S9=1 Pair 143 +Pin 56 IPL_1_ +Pin 67 IPL_0_ Pin 85 A_DECODE_23_ +Pin 57 FC_0_ +Pin 60 A_1_ Pin 68 IPL_2_ Pin 58 FC_1_ Pin 82 AS_030 Comb ; S6=1 S9=1 Pair 281 @@ -23,61 +27,58 @@ Pin 31 LDS_000 Comb ; S6=1 S9=1 Pair 191 Pin 14 nEXP_SPACE Pin 41 BERR Comb ; S6=1 S9=1 Pair 197 Pin 21 BG_030 -Pin 5 AHIGH_30_ Comb ; S6=1 S9=1 Pair 125 Pin 28 BGACK_000 -Pin 6 AHIGH_29_ Comb ; S6=1 S9=1 Pair 137 Pin 64 CLK_030 -Pin 15 AHIGH_28_ Comb ; S6=1 S9=1 Pair 149 Pin 11 CLK_000 -Pin 16 AHIGH_27_ Comb ; S6=1 S9=1 Pair 157 Pin 61 CLK_OSZI -Pin 17 AHIGH_26_ Comb ; S6=1 S9=1 Pair 155 -Pin 65 CLK_DIV_OUT Reg ; S6=1 S9=1 Pair 247 -Pin 18 AHIGH_25_ Comb ; S6=1 S9=1 Pair 167 -Pin 19 AHIGH_24_ Comb ; S6=1 S9=1 Pair 161 +Pin 65 CLK_DIV_OUT Comb ; S6=1 S9=1 Pair 247 +Pin 10 CLK_EXP Comb ; S6=1 S9=1 Pair 127 Pin 78 FPU_CS Comb ; S6=1 S9=1 Pair 271 -Pin 84 A_DECODE_22_ Pin 91 FPU_SENSE -Pin 94 A_DECODE_21_ Pin 81 DSACK1 Comb ; S6=1 S9=1 Pair 283 -Pin 93 A_DECODE_20_ -Pin 30 DTACK -Pin 97 A_DECODE_19_ +Pin 30 DTACK Comb ; S6=1 S9=1 Pair 173 Pin 92 AVEC Comb ; S6=1 S9=1 Pair 107 -Pin 95 A_DECODE_18_ Pin 66 E Comb ; S6=1 S9=1 Pair 251 -Pin 59 A_DECODE_17_ +Pin 5 AHIGH_30_ Comb ; S6=1 S9=1 Pair 125 Pin 36 VPA -Pin 96 A_DECODE_16_ +Pin 6 AHIGH_29_ Comb ; S6=1 S9=1 Pair 137 +Pin 15 AHIGH_28_ Comb ; S6=1 S9=1 Pair 149 Pin 86 RST -Pin 3 RESET Comb ; S6=1 S9=1 Pair 128 -Pin 33 AMIGA_ADDR_ENABLE Comb ; S6=1 S9=1 Pair 181 +Pin 16 AHIGH_27_ Comb ; S6=1 S9=1 Pair 157 +Pin 3 RESET +Pin 17 AHIGH_26_ Comb ; S6=1 S9=1 Pair 155 +Pin 18 AHIGH_25_ Comb ; S6=1 S9=1 Pair 167 +Pin 33 AMIGA_ADDR_ENABLE Comb ; S6=1 S9=1 Pair 187 +Pin 19 AHIGH_24_ Comb ; S6=1 S9=1 Pair 161 Pin 48 AMIGA_BUS_DATA_DIR Comb ; S6=1 S9=1 Pair 199 +Pin 84 A_DECODE_22_ Pin 20 AMIGA_BUS_ENABLE_LOW Comb ; S6=1 S9=1 Pair 151 -Pin 34 AMIGA_BUS_ENABLE_HIGH Comb ; S6=1 S9=1 Pair 179 +Pin 94 A_DECODE_21_ +Pin 34 AMIGA_BUS_ENABLE_HIGH Comb ; S6=1 S9=1 Pair 181 +Pin 93 A_DECODE_20_ Pin 47 CIIN Comb ; S6=1 S9=1 Pair 215 -Pin 56 IPL_1_ -Pin 67 IPL_0_ -Pin 57 FC_0_ -Pin 60 A_1_ +Pin 97 A_DECODE_19_ +Pin 95 A_DECODE_18_ +Pin 59 A_DECODE_17_ +Pin 96 A_DECODE_16_ +Pin 69 A_0_ Reg ; S6=1 S9=1 Pair 257 Pin 79 SIZE_1_ Reg ; S6=1 S9=1 Pair 287 +Pin 7 IPL_030_1_ Reg ; S6=1 S9=1 Pair 139 +Pin 8 IPL_030_0_ Reg ; S6=1 S9=1 Pair 133 Pin 9 IPL_030_2_ Reg ; S6=1 S9=1 Pair 131 Pin 80 RW_000 Reg ; S6=1 S9=1 Pair 269 Pin 29 BG_000 Reg ; S6=1 S9=1 Pair 175 -Pin 70 SIZE_0_ Reg ; S6=1 S9=1 Pair 263 Pin 83 BGACK_030 Reg ; S6=1 S9=1 Pair 275 -Pin 10 CLK_EXP Reg ; S6=1 S9=1 Pair 127 -Pin 35 VMA Reg ; S6=1 S9=1 Pair 173 +Pin 70 SIZE_0_ Reg ; S6=1 S9=1 Pair 263 +Pin 35 VMA Reg ; S6=1 S9=1 Pair 179 Pin 71 RW Reg ; S6=1 S9=1 Pair 245 -Pin 69 A_0_ Reg ; S6=1 S9=1 Pair 257 -Pin 7 IPL_030_1_ Reg ; S6=1 S9=1 Pair 139 -Pin 8 IPL_030_0_ Reg ; S6=1 S9=1 Pair 133 Node 143 RN_AHIGH_31_ Comb ; S6=1 S9=1 Node 281 RN_AS_030 Comb ; S6=1 S9=1 Node 203 RN_AS_000 Comb ; S6=1 S9=1 Node 185 RN_UDS_000 Comb ; S6=1 S9=1 Node 191 RN_LDS_000 Comb ; S6=1 S9=1 Node 197 RN_BERR Comb ; S6=1 S9=1 +Node 173 RN_DTACK Comb ; S6=1 S9=1 Node 125 RN_AHIGH_30_ Comb ; S6=1 S9=1 Node 137 RN_AHIGH_29_ Comb ; S6=1 S9=1 Node 149 RN_AHIGH_28_ Comb ; S6=1 S9=1 @@ -85,60 +86,63 @@ Node 157 RN_AHIGH_27_ Comb ; S6=1 S9=1 Node 155 RN_AHIGH_26_ Comb ; S6=1 S9=1 Node 167 RN_AHIGH_25_ Comb ; S6=1 S9=1 Node 161 RN_AHIGH_24_ Comb ; S6=1 S9=1 +Node 257 RN_A_0_ Reg ; S6=1 S9=1 Node 287 RN_SIZE_1_ Reg ; S6=1 S9=1 +Node 139 RN_IPL_030_1_ Reg ; S6=1 S9=1 +Node 133 RN_IPL_030_0_ Reg ; S6=1 S9=1 Node 131 RN_IPL_030_2_ Reg ; S6=1 S9=1 Node 269 RN_RW_000 Reg ; S6=1 S9=1 Node 175 RN_BG_000 Reg ; S6=1 S9=1 -Node 263 RN_SIZE_0_ Reg ; S6=1 S9=1 Node 275 RN_BGACK_030 Reg ; S6=1 S9=1 -Node 173 RN_VMA Reg ; S6=1 S9=1 +Node 263 RN_SIZE_0_ Reg ; S6=1 S9=1 +Node 179 RN_VMA Reg ; S6=1 S9=1 Node 245 RN_RW Reg ; S6=1 S9=1 -Node 257 RN_A_0_ Reg ; S6=1 S9=1 -Node 139 RN_IPL_030_1_ Reg ; S6=1 S9=1 -Node 133 RN_IPL_030_0_ Reg ; S6=1 S9=1 -Node 119 cpu_est_2_ Reg ; S6=1 S9=1 -Node 187 cpu_est_3_ Reg ; S6=1 S9=1 +Node 182 cpu_est_1_ Reg ; S6=1 S9=1 +Node 194 cpu_est_2_ Reg ; S6=1 S9=1 +Node 176 cpu_est_3_ Reg ; S6=1 S9=1 Node 259 cpu_est_0_ Reg ; S6=1 S9=1 -Node 113 cpu_est_1_ Reg ; S6=1 S9=1 -Node 170 inst_AMIGA_BUS_ENABLE_DMA_HIGH Reg ; S6=1 S9=1 -Node 223 inst_AMIGA_BUS_ENABLE_DMA_LOW Reg ; S6=1 S9=1 -Node 205 inst_AS_030_D0 Reg ; S6=1 S9=1 -Node 221 inst_AS_030_000_SYNC Reg ; S6=1 S9=1 -Node 209 inst_BGACK_030_INT_D Reg ; S6=1 S9=1 -Node 103 inst_AS_000_DMA Reg ; S6=1 S9=1 +Node 235 inst_AMIGA_BUS_ENABLE_DMA_HIGH Reg ; S6=1 S9=1 +Node 229 inst_AMIGA_BUS_ENABLE_DMA_LOW Reg ; S6=1 S9=1 +Node 272 inst_AS_030_D0 Reg ; S6=1 S9=1 +Node 145 inst_AS_030_000_SYNC Reg ; S6=1 S9=1 +Node 289 inst_BGACK_030_INT_D Reg ; S6=1 S9=1 +Node 113 inst_AS_000_DMA Reg ; S6=1 S9=1 Node 121 inst_DS_000_DMA Reg ; S6=1 S9=1 -Node 116 CYCLE_DMA_0_ Reg ; S6=1 S9=1 -Node 110 CYCLE_DMA_1_ Reg ; S6=1 S9=1 -Node 115 inst_VPA_D Reg ; S6=1 S9=1 -Node 188 CLK_000_D_3_ Reg ; S6=1 S9=1 -Node 134 inst_DTACK_D0 Reg ; S6=1 S9=1 +Node 224 inst_VPA_D Reg ; S6=1 S9=1 +Node 241 CLK_000_D_3_ Reg ; S6=1 S9=1 +Node 146 inst_DTACK_D0 Reg ; S6=1 S9=1 Node 253 inst_RESET_OUT Reg ; S6=1 S9=1 +Node 104 CLK_030_PE_1_ Reg ; S6=1 S9=1 +Node 164 inst_AMIGA_DS Reg ; S6=1 S9=1 Node 277 CLK_000_D_1_ Reg ; S6=1 S9=1 -Node 163 CLK_000_D_0_ Reg ; S6=1 S9=1 -Node 265 inst_CLK_OUT_PRE_50 Reg ; S6=1 S9=1 -Node 182 inst_CLK_OUT_PRE_D Reg ; S6=1 S9=1 -Node 266 IPL_D0_0_ Reg ; S6=1 S9=1 -Node 194 IPL_D0_1_ Reg ; S6=1 S9=1 -Node 146 IPL_D0_2_ Reg ; S6=1 S9=1 +Node 193 CLK_000_D_0_ Reg ; S6=1 S9=1 +Node 248 inst_CLK_OUT_PRE_50 Reg ; S6=1 S9=1 +Node 209 inst_CLK_OUT_PRE_D Reg ; S6=1 S9=1 +Node 140 IPL_D0_0_ Reg ; S6=1 S9=1 +Node 134 IPL_D0_1_ Reg ; S6=1 S9=1 +Node 128 IPL_D0_2_ Reg ; S6=1 S9=1 Node 278 CLK_000_D_2_ Reg ; S6=1 S9=1 -Node 140 CLK_000_D_4_ Reg ; S6=1 S9=1 -Node 233 inst_LDS_000_INT Reg ; S6=1 S9=1 -Node 145 inst_DS_000_ENABLE Reg ; S6=1 S9=1 -Node 239 inst_UDS_000_INT Reg ; S6=1 S9=1 -Node 169 SM_AMIGA_6_ Reg ; S6=1 S9=1 -Node 176 SM_AMIGA_4_ Reg ; S6=1 S9=1 -Node 227 SM_AMIGA_1_ Reg ; S6=1 S9=1 -Node 289 SM_AMIGA_0_ Reg ; S6=1 S9=1 -Node 248 RST_DLY_0_ Reg ; S6=1 S9=1 -Node 260 RST_DLY_1_ Reg ; S6=1 S9=1 -Node 254 RST_DLY_2_ Reg ; S6=1 S9=1 -Node 104 inst_CLK_030_H Reg ; S6=1 S9=1 -Node 272 inst_DSACK1_INT Reg ; S6=1 S9=1 -Node 164 inst_AS_000_INT Reg ; S6=1 S9=1 -Node 158 SM_AMIGA_5_ Reg ; S6=1 S9=1 -Node 193 SM_AMIGA_3_ Reg ; S6=1 S9=1 -Node 109 SM_AMIGA_2_ Reg ; S6=1 S9=1 -Node 152 SM_AMIGA_i_7_ Reg ; S6=1 S9=1 -Node 211 CIIN_0 Comb ; S6=1 S9=1 +Node 170 CLK_000_D_4_ Reg ; S6=1 S9=1 +Node 239 inst_LDS_000_INT Reg ; S6=1 S9=1 +Node 169 inst_DS_000_ENABLE Reg ; S6=1 S9=1 +Node 223 inst_UDS_000_INT Reg ; S6=1 S9=1 +Node 221 SM_AMIGA_6_ Reg ; S6=1 S9=1 +Node 103 SM_AMIGA_4_ Reg ; S6=1 S9=1 +Node 233 SM_AMIGA_1_ Reg ; S6=1 S9=1 +Node 119 SM_AMIGA_0_ Reg ; S6=1 S9=1 +Node 110 CYCLE_DMA_0_ Reg ; S6=1 S9=1 +Node 116 CYCLE_DMA_1_ Reg ; S6=1 S9=1 +Node 115 CLK_030_PE_0_ Reg ; S6=1 S9=1 +Node 254 RST_DLY_0_ Reg ; S6=1 S9=1 +Node 266 RST_DLY_1_ Reg ; S6=1 S9=1 +Node 260 RST_DLY_2_ Reg ; S6=1 S9=1 +Node 109 inst_DSACK1_INT Reg ; S6=1 S9=1 +Node 152 inst_AS_000_INT Reg ; S6=1 S9=1 +Node 265 SM_AMIGA_5_ Reg ; S6=1 S9=1 +Node 158 SM_AMIGA_3_ Reg ; S6=1 S9=1 +Node 163 SM_AMIGA_2_ Reg ; S6=1 S9=1 +Node 227 SM_AMIGA_i_7_ Reg ; S6=1 S9=1 +Node 188 CLK_OUT_INTreg Reg ; S6=1 S9=1 +Node 205 CIIN_0 Comb ; S6=1 S9=1 ; Unused Pins & Nodes ; -> None Found. diff --git a/Logic/68030_tk.prd b/Logic/68030_tk.prd index df4fc08..1f40fbf 100644 --- a/Logic/68030_tk.prd +++ b/Logic/68030_tk.prd @@ -5,8 +5,8 @@ |--------------------------------------------| -Start: Wed Oct 26 22:26:30 2016 -End : Wed Oct 26 22:26:30 2016 $$$ Elapsed time: 00:00:00 +Start: Fri Nov 18 19:32:40 2016 +End : Fri Nov 18 19:32:41 2016 $$$ Elapsed time: 00:00:01 =========================================================================== Part [E:/ispLEVER_Classic2_0/ispcpld/dat/mach4a/mach447a] Design [68030_tk.tt4] @@ -21,16 +21,16 @@ Part [E:/ispLEVER_Classic2_0/ispcpld/dat/mach4a/mach447a] Design [68030_tk.tt4] | | +- Signals to Place | | +----- Logic Array Inputs | | | +- Placed | | | +- Array Inputs Used _|____|____|____|_______________|____|_____________|___|________________ - 0 | 16 | 11 | 11 => 100% | 8 | 8 => 100% | 33 | 27 => 81% - 1 | 16 | 12 | 12 => 100% | 8 | 8 => 100% | 33 | 23 => 69% - 2 | 16 | 12 | 12 => 100% | 8 | 7 => 87% | 33 | 20 => 60% - 3 | 16 | 12 | 12 => 100% | 8 | 8 => 100% | 33 | 29 => 87% - 4 | 16 | 7 | 7 => 100% | 8 | 4 => 50% | 33 | 30 => 90% - 5 | 16 | 5 | 5 => 100% | 8 | 5 => 62% | 33 | 26 => 78% - 6 | 16 | 12 | 12 => 100% | 8 | 7 => 87% | 33 | 23 => 69% - 7 | 16 | 10 | 10 => 100% | 8 | 8 => 100% | 33 | 28 => 84% + 0 | 16 | 11 | 11 => 100% | 8 | 8 => 100% | 33 | 24 => 72% + 1 | 16 | 12 | 12 => 100% | 8 | 8 => 100% | 33 | 26 => 78% + 2 | 16 | 12 | 12 => 100% | 8 | 7 => 87% | 33 | 26 => 78% + 3 | 16 | 12 | 12 => 100% | 8 | 8 => 100% | 33 | 24 => 72% + 4 | 16 | 6 | 6 => 100% | 8 | 4 => 50% | 33 | 30 => 90% + 5 | 16 | 9 | 9 => 100% | 8 | 5 => 62% | 33 | 24 => 72% + 6 | 16 | 12 | 12 => 100% | 8 | 7 => 87% | 33 | 24 => 72% + 7 | 16 | 10 | 10 => 100% | 8 | 8 => 100% | 33 | 27 => 81% ---|----|----|------------|-------|------------|-----|------------------ - | Avg number of array inputs in used blocks : 25.75 => 78% + | Avg number of array inputs in used blocks : 25.63 => 77% * Input/Clock Signal count: 24 -> placed: 24 = 100% @@ -41,13 +41,13 @@ _|____|____|____|_______________|____|_____________|___|________________ Clock Only Pins : 0 0 => 0% Clock/Input Pins : 4 4 => 100% Logic Blocks : 8 8 => 100% - Macrocells : 128 81 => 63% - PT Clusters : 128 51 => 39% - - Single PT Clusters : 128 37 => 28% + Macrocells : 128 84 => 65% + PT Clusters : 128 56 => 43% + - Single PT Clusters : 128 38 => 29% Input Registers : 0 * Routing Completion: 100% -* Attempts: Place [ 116] Route [ 0] +* Attempts: Place [ 119] Route [ 0] =========================================================================== Signal Fanout Table =========================================================================== @@ -70,20 +70,20 @@ ___|__|__|____|____________________________________________________________ 11| 3|OUT| 34|=> ....|....| AMIGA_BUS_ENABLE_HIGH 12| 2|OUT| 20|=> ....|....| AMIGA_BUS_ENABLE_LOW 13| 4| IO| 42|=> 0...|4..7| AS_000 - 14| 7| IO| 82|=> .123|45.7| AS_030 + 14| 7| IO| 82|=> 0123|4..7| AS_030 15| 0|OUT| 92|=> ....|....| AVEC 16| 6| IO| 69|=> ....|.5..| A_0_ |=> Paired w/: RN_A_0_ - 17| 5|INP| 60|=> ..2.|.5..| A_1_ - 18| 0|INP| 96|=> ....|45.7| A_DECODE_16_ - 19| 5|INP| 59|=> ....|45.7| A_DECODE_17_ - 20| 0|INP| 95|=> ....|45.7| A_DECODE_18_ - 21| 0|INP| 97|=> ....|45.7| A_DECODE_19_ + 17| 5|INP| 60|=> ....|.5..| A_1_ + 18| 0|INP| 96|=> .1..|4..7| A_DECODE_16_ + 19| 5|INP| 59|=> .1..|4..7| A_DECODE_17_ + 20| 0|INP| 95|=> .1..|4..7| A_DECODE_18_ + 21| 0|INP| 97|=> .1..|4..7| A_DECODE_19_ 22| 0|INP| 93|=> ....|4...| A_DECODE_20_ 23| 0|INP| 94|=> ....|4...| A_DECODE_21_ 24| 7|INP| 84|=> ....|4...| A_DECODE_22_ 25| 7|INP| 85|=> ....|4...| A_DECODE_23_ - 26| 4| IO| 41|=> 0..3|....| BERR + 26| 4| IO| 41|=> ..2.|....| BERR 27| 3|INP| 28|=> ....|4..7| BGACK_000 28| 7| IO| 83|=> ....|....| BGACK_030 |=> Paired w/: RN_BGACK_030 @@ -92,109 +92,112 @@ ___|__|__|____|____________________________________________________________ 30| 2|INP| 21|=> ...3|....| BG_030 31| 4|OUT| 47|=> ....|....| CIIN 32| 4|NOD| . |=> ....|4...| CIIN_0 - 33| +|INP| 11|=> ..2.|....| CLK_000 - 34| 2|NOD| . |=> 0123|.567| CLK_000_D_0_ - 35| 7|NOD| . |=> 0123|.567| CLK_000_D_1_ - 36| 7|NOD| . |=> ...3|....| CLK_000_D_2_ - 37| 3|NOD| . |=> .12.|....| CLK_000_D_3_ - 38| 1|NOD| . |=> ..2.|....| CLK_000_D_4_ + 33| +|INP| 11|=> ...3|....| CLK_000 + 34| 3|NOD| . |=> 0.23|.567| CLK_000_D_0_ + 35| 7|NOD| . |=> 0.23|.567| CLK_000_D_1_ + 36| 7|NOD| . |=> ....|.5..| CLK_000_D_2_ + 37| 5|NOD| . |=> ..2.|.5..| CLK_000_D_3_ + 38| 2|NOD| . |=> ....|.5..| CLK_000_D_4_ 39| +|INP| 64|=> 0...|....| CLK_030 - 40| 6|OUT| 65|=> ....|....| CLK_DIV_OUT - 41| 1|OUT| 10|=> ....|....| CLK_EXP - 42| +|Cin| 61|=> ....|....| CLK_OSZI - 43| 0|NOD| . |=> 0...|....| CYCLE_DMA_0_ - 44| 0|NOD| . |=> 0...|....| CYCLE_DMA_1_ - 45| 7|OUT| 81|=> ....|....| DSACK1 - 46| 0|OUT| 98|=> ....|....| DS_030 - 47| 3|INP| 30|=> .1..|....| DTACK - 48| 6|OUT| 66|=> ....|....| E - 49| 5|INP| 57|=> ....|45.7| FC_0_ - 50| 5|INP| 58|=> ....|45.7| FC_1_ - 51| 7|OUT| 78|=> ....|....| FPU_CS - 52| 0|INP| 91|=> ....|4..7| FPU_SENSE - 53| 1| IO| 8|=> ....|....| IPL_030_0_ + 40| 0|NOD| . |=> 0...|....| CLK_030_PE_0_ + 41| 0|NOD| . |=> 0...|....| CLK_030_PE_1_ + 42| 6|OUT| 65|=> ....|....| CLK_DIV_OUT + 43| 1|OUT| 10|=> ....|....| CLK_EXP + 44| +|Cin| 61|=> ....|....| CLK_OSZI + 45| 3|NOD| . |=> 01..|..6.| CLK_OUT_INTreg + 46| 0|NOD| . |=> 0...|....| CYCLE_DMA_0_ + 47| 0|NOD| . |=> 0...|....| CYCLE_DMA_1_ + 48| 7|OUT| 81|=> ....|....| DSACK1 + 49| 0|OUT| 98|=> ....|....| DS_030 + 50| 3| IO| 30|=> .1..|....| DTACK + 51| 6|OUT| 66|=> ....|....| E + 52| 5|INP| 57|=> .1..|4..7| FC_0_ + 53| 5|INP| 58|=> .1..|4..7| FC_1_ + 54| 7|OUT| 78|=> ....|....| FPU_CS + 55| 0|INP| 91|=> ....|4..7| FPU_SENSE + 56| 1| IO| 8|=> ....|....| IPL_030_0_ |=> Paired w/: RN_IPL_030_0_ - 54| 1| IO| 7|=> ....|....| IPL_030_1_ + 57| 1| IO| 7|=> ....|....| IPL_030_1_ |=> Paired w/: RN_IPL_030_1_ - 55| 1| IO| 9|=> ....|....| IPL_030_2_ + 58| 1| IO| 9|=> ....|....| IPL_030_2_ |=> Paired w/: RN_IPL_030_2_ - 56| 6|INP| 67|=> .1..|..6.| IPL_0_ - 57| 5|INP| 56|=> .1.3|....| IPL_1_ - 58| 6|INP| 68|=> .1..|....| IPL_2_ - 59| 6|NOD| . |=> .1..|....| IPL_D0_0_ - 60| 3|NOD| . |=> .1..|....| IPL_D0_1_ - 61| 1|NOD| . |=> .1..|....| IPL_D0_2_ - 62| 3| IO| 31|=> 0...|..67| LDS_000 - 63| 1|OUT| 3|=> ....|....| RESET - 64| 6|NOD| . |=> ....|..6.| RN_A_0_ + 59| 6|INP| 67|=> .1..|....| IPL_0_ + 60| 5|INP| 56|=> .1..|....| IPL_1_ + 61| 6|INP| 68|=> .1..|....| IPL_2_ + 62| 1|NOD| . |=> .1..|....| IPL_D0_0_ + 63| 1|NOD| . |=> .1..|....| IPL_D0_1_ + 64| 1|NOD| . |=> .1..|....| IPL_D0_2_ + 65| 3| IO| 31|=> ..2.|..67| LDS_000 + 66| 1|INP| 3|=> .12.|....| RESET + 67| 6|NOD| . |=> ....|..6.| RN_A_0_ |=> Paired w/: A_0_ - 65| 7|NOD| . |=> 0123|4567| RN_BGACK_030 + 68| 7|NOD| . |=> 0123|4567| RN_BGACK_030 |=> Paired w/: BGACK_030 - 66| 3|NOD| . |=> ...3|....| RN_BG_000 + 69| 3|NOD| . |=> ...3|....| RN_BG_000 |=> Paired w/: BG_000 - 67| 1|NOD| . |=> .1..|....| RN_IPL_030_0_ + 70| 1|NOD| . |=> .1..|....| RN_IPL_030_0_ |=> Paired w/: IPL_030_0_ - 68| 1|NOD| . |=> .1..|....| RN_IPL_030_1_ + 71| 1|NOD| . |=> .1..|....| RN_IPL_030_1_ |=> Paired w/: IPL_030_1_ - 69| 1|NOD| . |=> .1..|....| RN_IPL_030_2_ + 72| 1|NOD| . |=> .1..|....| RN_IPL_030_2_ |=> Paired w/: IPL_030_2_ - 70| 6|NOD| . |=> ....|..6.| RN_RW + 73| 6|NOD| . |=> ....|..6.| RN_RW |=> Paired w/: RW - 71| 7|NOD| . |=> ....|...7| RN_RW_000 + 74| 7|NOD| . |=> ....|...7| RN_RW_000 |=> Paired w/: RW_000 - 72| 6|NOD| . |=> ....|..6.| RN_SIZE_0_ + 75| 6|NOD| . |=> ....|..6.| RN_SIZE_0_ |=> Paired w/: SIZE_0_ - 73| 7|NOD| . |=> ....|...7| RN_SIZE_1_ + 76| 7|NOD| . |=> ....|...7| RN_SIZE_1_ |=> Paired w/: SIZE_1_ - 74| 3|NOD| . |=> 0..3|....| RN_VMA + 77| 3|NOD| . |=> ..23|....| RN_VMA |=> Paired w/: VMA - 75| +|INP| 86|=> 0123|4567| RST - 76| 6|NOD| . |=> ....|..6.| RST_DLY_0_ - 77| 6|NOD| . |=> ....|..6.| RST_DLY_1_ - 78| 6|NOD| . |=> ....|..6.| RST_DLY_2_ - 79| 6| IO| 71|=> .1..|...7| RW + 78| +|INP| 86|=> 0123|.567| RST + 79| 6|NOD| . |=> ....|..6.| RST_DLY_0_ + 80| 6|NOD| . |=> ....|..6.| RST_DLY_1_ + 81| 6|NOD| . |=> ....|..6.| RST_DLY_2_ + 82| 6| IO| 71|=> ..2.|...7| RW |=> Paired w/: RN_RW - 80| 7| IO| 80|=> 0...|4.6.| RW_000 + 83| 7| IO| 80|=> 0...|4.6.| RW_000 |=> Paired w/: RN_RW_000 - 81| 6| IO| 70|=> ....|.5..| SIZE_0_ + 84| 6| IO| 70|=> ....|.5..| SIZE_0_ |=> Paired w/: RN_SIZE_0_ - 82| 7| IO| 79|=> ....|.5..| SIZE_1_ + 85| 7| IO| 79|=> ....|.5..| SIZE_1_ |=> Paired w/: RN_SIZE_1_ - 83| 7|NOD| . |=> ..2.|...7| SM_AMIGA_0_ - 84| 5|NOD| . |=> ....|.5.7| SM_AMIGA_1_ - 85| 0|NOD| . |=> 0...|.5..| SM_AMIGA_2_ - 86| 3|NOD| . |=> 0..3|....| SM_AMIGA_3_ - 87| 3|NOD| . |=> .1.3|....| SM_AMIGA_4_ - 88| 2|NOD| . |=> ..23|....| SM_AMIGA_5_ - 89| 2|NOD| . |=> .12.|.5.7| SM_AMIGA_6_ - 90| 2|NOD| . |=> ..2.|.5.7| SM_AMIGA_i_7_ - 91| 3| IO| 32|=> 0...|..67| UDS_000 - 92| 3| IO| 35|=> ....|....| VMA + 86| 0|NOD| . |=> 0...|.5.7| SM_AMIGA_0_ + 87| 5|NOD| . |=> 0...|.5..| SM_AMIGA_1_ + 88| 2|NOD| . |=> ..2.|.5..| SM_AMIGA_2_ + 89| 2|NOD| . |=> ..2.|....| SM_AMIGA_3_ + 90| 0|NOD| . |=> 0.2.|....| SM_AMIGA_4_ + 91| 6|NOD| . |=> 0...|..6.| SM_AMIGA_5_ + 92| 5|NOD| . |=> ..2.|.567| SM_AMIGA_6_ + 93| 5|NOD| . |=> .1..|.5.7| SM_AMIGA_i_7_ + 94| 3| IO| 32|=> ..2.|..67| UDS_000 + 95| 3| IO| 35|=> ....|....| VMA |=> Paired w/: RN_VMA - 93| +|INP| 36|=> 0...|....| VPA - 94| 6|NOD| . |=> 0..3|..6.| cpu_est_0_ - 95| 0|NOD| . |=> 0..3|..6.| cpu_est_1_ - 96| 0|NOD| . |=> 0..3|..6.| cpu_est_2_ - 97| 3|NOD| . |=> 0..3|..6.| cpu_est_3_ - 98| 2|NOD| . |=> ..23|....| inst_AMIGA_BUS_ENABLE_DMA_HIGH - 99| 5|NOD| . |=> ..2.|.5..| inst_AMIGA_BUS_ENABLE_DMA_LOW - 100| 0|NOD| . |=> 0...|...7| inst_AS_000_DMA - 101| 2|NOD| . |=> ..2.|4...| inst_AS_000_INT - 102| 5|NOD| . |=> ..23|.5..| inst_AS_030_000_SYNC - 103| 4|NOD| . |=> ...3|45..| inst_AS_030_D0 - 104| 4|NOD| . |=> ..2.|.567| inst_BGACK_030_INT_D - 105| 0|NOD| . |=> 0...|....| inst_CLK_030_H - 106| 6|NOD| . |=> ...3|..6.| inst_CLK_OUT_PRE_50 - 107| 3|NOD| . |=> .1..|..6.| inst_CLK_OUT_PRE_D - 108| 7|NOD| . |=> ....|...7| inst_DSACK1_INT - 109| 0|NOD| . |=> 0...|....| inst_DS_000_DMA - 110| 1|NOD| . |=> .1.3|....| inst_DS_000_ENABLE - 111| 1|NOD| . |=> 0..3|....| inst_DTACK_D0 - 112| 5|NOD| . |=> ...3|.5..| inst_LDS_000_INT - 113| 6|NOD| . |=> 0123|4.67| inst_RESET_OUT - 114| 5|NOD| . |=> ...3|.5..| inst_UDS_000_INT - 115| 0|NOD| . |=> 0..3|....| inst_VPA_D - 116| +|INP| 14|=> 0123|4567| nEXP_SPACE + 96| +|INP| 36|=> ....|.5..| VPA + 97| 6|NOD| . |=> ..23|..6.| cpu_est_0_ + 98| 3|NOD| . |=> ..23|..6.| cpu_est_1_ + 99| 3|NOD| . |=> ..23|..6.| cpu_est_2_ + 100| 3|NOD| . |=> ..23|..6.| cpu_est_3_ + 101| 5|NOD| . |=> ...3|.5..| inst_AMIGA_BUS_ENABLE_DMA_HIGH + 102| 5|NOD| . |=> ..2.|.5..| inst_AMIGA_BUS_ENABLE_DMA_LOW + 103| 2|NOD| . |=> 0...|....| inst_AMIGA_DS + 104| 0|NOD| . |=> 0..3|...7| inst_AS_000_DMA + 105| 2|NOD| . |=> ..2.|4...| inst_AS_000_INT + 106| 1|NOD| . |=> .1.3|.5..| inst_AS_030_000_SYNC + 107| 7|NOD| . |=> .1.3|4...| inst_AS_030_D0 + 108| 7|NOD| . |=> .1..|.567| inst_BGACK_030_INT_D + 109| 6|NOD| . |=> ....|4.6.| inst_CLK_OUT_PRE_50 + 110| 4|NOD| . |=> 0..3|....| inst_CLK_OUT_PRE_D + 111| 0|NOD| . |=> 0...|...7| inst_DSACK1_INT + 112| 0|NOD| . |=> 0...|....| inst_DS_000_DMA + 113| 2|NOD| . |=> ..23|....| inst_DS_000_ENABLE + 114| 1|NOD| . |=> ..2.|....| inst_DTACK_D0 + 115| 5|NOD| . |=> ...3|.5..| inst_LDS_000_INT + 116| 6|NOD| . |=> 0..3|4.67| inst_RESET_OUT + 117| 5|NOD| . |=> ...3|.5..| inst_UDS_000_INT + 118| 5|NOD| . |=> ..23|....| inst_VPA_D + 119| +|INP| 14|=> 0123|4567| nEXP_SPACE --------------------------------------------------------------------------- =========================================================================== < E:/ispLEVER_Classic2_0/ispcpld/dat/mach4a/mach447a Device Pin Assignments > @@ -314,19 +317,19 @@ ____|_____|_________|______________________________________________________ | Sig Type-+ | | | | | | | XOR to Mcell Assignment | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| DS_030|OUT| | S | 1 | 4 to [ 1]| 1 XOR to [ 0] for 1 PT sig - 1|inst_AS_000_DMA|NOD| | S | 7 | 4 to [ 1]| 1 XOR to [ 1] as logic PT - 2|inst_CLK_030_H|NOD| | S | 8 | 4 to [ 2]| 1 XOR to [ 2] as logic PT + 0| DS_030|OUT| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig + 1| SM_AMIGA_4_|NOD| | S | 3 | 4 to [ 1]| 1 XOR free + 2| CLK_030_PE_1_|NOD| | S | 6 | 4 to [ 2]| 1 XOR to [ 2] as logic PT 3| | ? | | S | | 4 free | 1 XOR free 4| AVEC|OUT| | S | 1 | 4 to [ 2]| 1 XOR to [ 4] for 1 PT sig - 5| SM_AMIGA_2_|NOD| | S | 5 | 4 to [ 5]| 1 XOR to [ 5] as logic PT - 6| CYCLE_DMA_1_|NOD| | S | 4 | 4 to [ 6]| 1 XOR free - 7| | ? | | S | | 4 free | 1 XOR free - 8| cpu_est_1_|NOD| | S | 4 | 4 free | 1 XOR free - 9| inst_VPA_D|NOD| | S | 1 | 4 to [ 8]| 1 XOR to [ 9] for 1 PT sig -10| CYCLE_DMA_0_|NOD| | S | 3 | 4 to [10]| 1 XOR free -11| | ? | | S | | 4 free | 1 XOR free -12| cpu_est_2_|NOD| | S | 1 :+: 1| 4 to [12]| 1 XOR to [12] + 5|inst_DSACK1_INT|NOD| | S | 2 | 4 to [ 5]| 1 XOR free + 6| CYCLE_DMA_0_|NOD| | S | 4 | 4 to [ 6]| 1 XOR free + 7| | ? | | S | | 4 to [ 8]| 1 XOR free + 8|inst_AS_000_DMA|NOD| | S | 6 | 4 to [ 8]| 1 XOR to [ 8] as logic PT + 9| CLK_030_PE_0_|NOD| | S | 9 | 4 to [ 9]| 1 XOR to [ 9] as logic PT +10| CYCLE_DMA_1_|NOD| | S | 2 | 4 to [10]| 1 XOR free +11| | ? | | S | | 4 to [ 9]| 1 XOR free +12| SM_AMIGA_0_|NOD| | S | 3 | 4 to [12]| 1 XOR free 13|inst_DS_000_DMA|NOD| | S | 9 | 4 to [13]| 1 XOR to [13] as logic PT 14| | ? | | S | | 4 to [13]| 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free @@ -341,19 +344,19 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| DS_030|OUT| | S | 1 |=> can support up to [ 1] logic PT(s) - 1|inst_AS_000_DMA|NOD| | S | 7 |=> can support up to [ 14] logic PT(s) - 2|inst_CLK_030_H|NOD| | S | 8 |=> can support up to [ 14] logic PT(s) + 0| DS_030|OUT| | S | 1 |=> can support up to [ 5] logic PT(s) + 1| SM_AMIGA_4_|NOD| | S | 3 |=> can support up to [ 14] logic PT(s) + 2| CLK_030_PE_1_|NOD| | S | 6 |=> can support up to [ 14] logic PT(s) 3| | ? | | S | |=> can support up to [ 5] logic PT(s) 4| AVEC|OUT| | S | 1 |=> can support up to [ 6] logic PT(s) - 5| SM_AMIGA_2_|NOD| | S | 5 |=> can support up to [ 10] logic PT(s) - 6| CYCLE_DMA_1_|NOD| | S | 4 |=> can support up to [ 15] logic PT(s) - 7| | ? | | S | |=> can support up to [ 10] logic PT(s) - 8| cpu_est_1_|NOD| | S | 4 |=> can support up to [ 14] logic PT(s) - 9| inst_VPA_D|NOD| | S | 1 |=> can support up to [ 11] logic PT(s) -10| CYCLE_DMA_0_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s) -11| | ? | | S | |=> can support up to [ 5] logic PT(s) -12| cpu_est_2_|NOD| | S | 1 :+: 1|=> can support up to [ 9] logic PT(s) + 5|inst_DSACK1_INT|NOD| | S | 2 |=> can support up to [ 5] logic PT(s) + 6| CYCLE_DMA_0_|NOD| | S | 4 |=> can support up to [ 5] logic PT(s) + 7| | ? | | S | |=> can support up to [ 1] logic PT(s) + 8|inst_AS_000_DMA|NOD| | S | 6 |=> can support up to [ 10] logic PT(s) + 9| CLK_030_PE_0_|NOD| | S | 9 |=> can support up to [ 10] logic PT(s) +10| CYCLE_DMA_1_|NOD| | S | 2 |=> can support up to [ 5] logic PT(s) +11| | ? | | S | |=> can support up to [ 1] logic PT(s) +12| SM_AMIGA_0_|NOD| | S | 3 |=> can support up to [ 5] logic PT(s) 13|inst_DS_000_DMA|NOD| | S | 9 |=> can support up to [ 15] logic PT(s) 14| | ? | | S | |=> can support up to [ 6] logic PT(s) 15| | ? | | S | |=> can support up to [ 5] logic PT(s) @@ -367,18 +370,18 @@ _|_________________|__|__|___|_____|_______________________________________ | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ 0| DS_030|OUT| | => | 5 6 ( 7) 0 | 96 97 ( 98) 91 - 1|inst_AS_000_DMA|NOD| | => | 5 6 7 0 | 96 97 98 91 - 2|inst_CLK_030_H|NOD| | => | 6 7 0 1 | 97 98 91 92 + 1| SM_AMIGA_4_|NOD| | => | 5 6 7 0 | 96 97 98 91 + 2| CLK_030_PE_1_|NOD| | => | 6 7 0 1 | 97 98 91 92 3| | | | => | 6 7 0 1 | 97 98 91 92 4| AVEC|OUT| | => | 7 0 ( 1) 2 | 98 91 ( 92) 93 - 5| SM_AMIGA_2_|NOD| | => | 7 0 1 2 | 98 91 92 93 - 6| CYCLE_DMA_1_|NOD| | => | 0 1 2 3 | 91 92 93 94 + 5|inst_DSACK1_INT|NOD| | => | 7 0 1 2 | 98 91 92 93 + 6| CYCLE_DMA_0_|NOD| | => | 0 1 2 3 | 91 92 93 94 7| | | | => | 0 1 2 3 | 91 92 93 94 - 8| cpu_est_1_|NOD| | => | 1 2 3 4 | 92 93 94 95 - 9| inst_VPA_D|NOD| | => | 1 2 3 4 | 92 93 94 95 -10| CYCLE_DMA_0_|NOD| | => | 2 3 4 5 | 93 94 95 96 + 8|inst_AS_000_DMA|NOD| | => | 1 2 3 4 | 92 93 94 95 + 9| CLK_030_PE_0_|NOD| | => | 1 2 3 4 | 92 93 94 95 +10| CYCLE_DMA_1_|NOD| | => | 2 3 4 5 | 93 94 95 96 11| | | | => | 2 3 4 5 | 93 94 95 96 -12| cpu_est_2_|NOD| | => | 3 4 5 6 | 94 95 96 97 +12| SM_AMIGA_0_|NOD| | => | 3 4 5 6 | 94 95 96 97 13|inst_DS_000_DMA|NOD| | => | 3 4 5 6 | 94 95 96 97 14| | | | => | 4 5 6 7 | 95 96 97 98 15| | | | => | 4 5 6 7 | 95 96 97 98 @@ -431,36 +434,36 @@ IMX No. | +---- Block IO Pin or Macrocell Number 0 [IOpin 0 | 91|INP FPU_SENSE|*|*] [RegIn 0 |102| -| | ] [MCell 0 |101|OUT DS_030| | ] - [MCell 1 |103|NOD inst_AS_000_DMA| |*] + [MCell 1 |103|NOD SM_AMIGA_4_| |*] 1 [IOpin 1 | 92|OUT AVEC|*| ] [RegIn 1 |105| -| | ] - [MCell 2 |104|NOD inst_CLK_030_H| |*] + [MCell 2 |104|NOD CLK_030_PE_1_| |*] [MCell 3 |106| -| | ] 2 [IOpin 2 | 93|INP A_DECODE_20_|*|*] [RegIn 2 |108| -| | ] [MCell 4 |107|OUT AVEC| | ] - [MCell 5 |109|NOD SM_AMIGA_2_| |*] + [MCell 5 |109|NOD inst_DSACK1_INT| |*] 3 [IOpin 3 | 94|INP A_DECODE_21_|*|*] [RegIn 3 |111| -| | ] - [MCell 6 |110|NOD CYCLE_DMA_1_| |*] + [MCell 6 |110|NOD CYCLE_DMA_0_| |*] [MCell 7 |112| -| | ] 4 [IOpin 4 | 95|INP A_DECODE_18_|*|*] [RegIn 4 |114| -| | ] - [MCell 8 |113|NOD cpu_est_1_| |*] - [MCell 9 |115|NOD inst_VPA_D| |*] + [MCell 8 |113|NOD inst_AS_000_DMA| |*] + [MCell 9 |115|NOD CLK_030_PE_0_| |*] 5 [IOpin 5 | 96|INP A_DECODE_16_|*|*] [RegIn 5 |117| -| | ] - [MCell 10 |116|NOD CYCLE_DMA_0_| |*] + [MCell 10 |116|NOD CYCLE_DMA_1_| |*] [MCell 11 |118| -| | ] 6 [IOpin 6 | 97|INP A_DECODE_19_|*|*] [RegIn 6 |120| -| | ] - [MCell 12 |119|NOD cpu_est_2_| |*] + [MCell 12 |119|NOD SM_AMIGA_0_| |*] [MCell 13 |121|NOD inst_DS_000_DMA| |*] 7 [IOpin 7 | 98|OUT DS_030|*| ] @@ -475,36 +478,36 @@ IMX No. | +---- Block IO Pin or Macrocell Number | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- Mux00| Input Pin ( 86)| RST -Mux01| Mcel 3 0 ( 173)| RN_VMA -Mux02| Mcel 0 9 ( 115)| inst_VPA_D -Mux03| Mcel 0 8 ( 113)| cpu_est_1_ +Mux01| Mcel 3 13 ( 193)| CLK_000_D_0_ +Mux02| Mcel 0 9 ( 115)| CLK_030_PE_0_ +Mux03| Mcel 0 8 ( 113)| inst_AS_000_DMA Mux04| Input Pin ( 64)| CLK_030 Mux05| Input Pin ( 14)| nEXP_SPACE Mux06| IOPin 7 5 ( 80)| RW_000 -Mux07| Mcel 3 9 ( 187)| cpu_est_3_ -Mux08| IOPin 3 3 ( 32)| UDS_000 -Mux09| Mcel 0 1 ( 103)| inst_AS_000_DMA -Mux10| Input Pin ( 36)| VPA -Mux11| Mcel 1 6 ( 134)| inst_DTACK_D0 -Mux12| Mcel 6 9 ( 259)| cpu_est_0_ +Mux07| ... | ... +Mux08| Mcel 2 10 ( 164)| inst_AMIGA_DS +Mux09| Mcel 0 1 ( 103)| SM_AMIGA_4_ +Mux10| Mcel 0 6 ( 110)| CYCLE_DMA_0_ +Mux11| ... | ... +Mux12| Mcel 6 13 ( 265)| SM_AMIGA_5_ Mux13| Mcel 7 5 ( 277)| CLK_000_D_1_ -Mux14| Mcel 0 10 ( 116)| CYCLE_DMA_0_ -Mux15| Mcel 0 6 ( 110)| CYCLE_DMA_1_ -Mux16| IOPin 4 1 ( 42)| AS_000 -Mux17| IOPin 4 0 ( 41)| BERR -Mux18| Mcel 0 5 ( 109)| SM_AMIGA_2_ -Mux19| ... | ... -Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux21| Mcel 3 13 ( 193)| SM_AMIGA_3_ -Mux22| Mcel 0 2 ( 104)| inst_CLK_030_H -Mux23| Mcel 2 9 ( 163)| CLK_000_D_0_ -Mux24| Mcel 0 12 ( 119)| cpu_est_2_ +Mux14| Mcel 0 10 ( 116)| CYCLE_DMA_1_ +Mux15| Mcel 0 12 ( 119)| SM_AMIGA_0_ +Mux16| Mcel 4 8 ( 209)| inst_CLK_OUT_PRE_D +Mux17| ... | ... +Mux18| Mcel 0 5 ( 109)| inst_DSACK1_INT +Mux19| IOPin 7 3 ( 82)| AS_030 +Mux20| Mcel 5 8 ( 233)| SM_AMIGA_1_ +Mux21| ... | ... +Mux22| Mcel 0 2 ( 104)| CLK_030_PE_1_ +Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux24| ... | ... Mux25| Mcel 0 13 ( 121)| inst_DS_000_DMA -Mux26| ... | ... -Mux27| IOPin 3 4 ( 31)| LDS_000 +Mux26| IOPin 4 1 ( 42)| AS_000 +Mux27| ... | ... Mux28| ... | ... Mux29| ... | ... -Mux30| ... | ... +Mux30| Mcel 3 10 ( 188)| CLK_OUT_INTreg Mux31| ... | ... Mux32| Mcel 6 5 ( 253)| inst_RESET_OUT --------------------------------------------------------------------------- @@ -520,19 +523,19 @@ Mux32| Mcel 6 5 ( 253)| inst_RESET_OUT _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| AHIGH_30_| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig 1| CLK_EXP|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig - 2| RESET|OUT| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig - 3| | ? | | S | | 4 to [ 4]| 1 XOR free - 4| IPL_030_2_| IO| | S | 9 | 4 to [ 4]| 1 XOR to [ 4] as logic PT - 5| IPL_030_0_| IO| | S | 9 | 4 to [ 5]| 1 XOR to [ 5] as logic PT - 6| inst_DTACK_D0|NOD| | S | 1 | 4 to [ 5]| 1 XOR to [ 6] for 1 PT sig - 7| | ? | | S | | 4 free | 1 XOR free + 2| IPL_D0_2_|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig + 3| | ? | | S | | 4 to [ 4]| 1 XOR to [ 4] as logic PT + 4| IPL_030_2_| IO| | S |10 | 4 to [ 4]| 1 XOR to [ 4] as logic PT + 5| IPL_030_0_| IO| | S |10 | 4 to [ 5]| 1 XOR to [ 5] as logic PT + 6| IPL_D0_1_|NOD| | S | 1 | 4 to [ 5]| 1 XOR to [ 6] for 1 PT sig + 7| | ? | | S | | 4 to [ 5]| 1 XOR free 8| AHIGH_29_| IO| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig - 9| IPL_030_1_| IO| | S | 9 | 4 to [ 9]| 1 XOR to [ 9] as logic PT -10| CLK_000_D_4_|NOD| | S | 1 | 4 to [ 9]| 1 XOR to [10] for 1 PT sig -11| | ? | | S | | 4 free | 1 XOR free + 9| IPL_030_1_| IO| | S |10 | 4 to [ 9]| 1 XOR to [ 9] as logic PT +10| IPL_D0_0_|NOD| | S | 1 | 4 to [ 9]| 1 XOR to [10] for 1 PT sig +11| | ? | | S | | 4 to [ 9]| 1 XOR free 12| AHIGH_31_| IO| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig -13|inst_DS_000_ENABLE|NOD| | S | 3 | 4 to [13]| 1 XOR free -14| IPL_D0_2_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig +13|inst_AS_030_000_SYNC|NOD| | S | 7 | 4 to [13]| 1 XOR to [13] as logic PT +14| inst_DTACK_D0|NOD| | S | 1 | 4 to [13]| 1 XOR to [14] for 1 PT sig 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== @@ -547,20 +550,20 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ _|_________________|__|__|___|_____|_______________________________________ 0| AHIGH_30_| IO| | S | 1 |=> can support up to [ 13] logic PT(s) 1| CLK_EXP|OUT| | S | 1 |=> can support up to [ 13] logic PT(s) - 2| RESET|OUT| | S | 1 |=> can support up to [ 9] logic PT(s) - 3| | ? | | S | |=> can support up to [ 5] logic PT(s) - 4| IPL_030_2_| IO| | S | 9 |=> can support up to [ 10] logic PT(s) - 5| IPL_030_0_| IO| | S | 9 |=> can support up to [ 14] logic PT(s) - 6| inst_DTACK_D0|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) - 7| | ? | | S | |=> can support up to [ 9] logic PT(s) - 8| AHIGH_29_| IO| | S | 1 |=> can support up to [ 10] logic PT(s) - 9| IPL_030_1_| IO| | S | 9 |=> can support up to [ 18] logic PT(s) -10| CLK_000_D_4_|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) -11| | ? | | S | |=> can support up to [ 9] logic PT(s) -12| AHIGH_31_| IO| | S | 1 |=> can support up to [ 14] logic PT(s) -13|inst_DS_000_ENABLE|NOD| | S | 3 |=> can support up to [ 18] logic PT(s) -14| IPL_D0_2_|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) -15| | ? | | S | |=> can support up to [ 9] logic PT(s) + 2| IPL_D0_2_|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) + 3| | ? | | S | |=> can support up to [ 4] logic PT(s) + 4| IPL_030_2_| IO| | S |10 |=> can support up to [ 10] logic PT(s) + 5| IPL_030_0_| IO| | S |10 |=> can support up to [ 14] logic PT(s) + 6| IPL_D0_1_|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) + 7| | ? | | S | |=> can support up to [ 5] logic PT(s) + 8| AHIGH_29_| IO| | S | 1 |=> can support up to [ 5] logic PT(s) + 9| IPL_030_1_| IO| | S |10 |=> can support up to [ 18] logic PT(s) +10| IPL_D0_0_|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) +11| | ? | | S | |=> can support up to [ 5] logic PT(s) +12| AHIGH_31_| IO| | S | 1 |=> can support up to [ 5] logic PT(s) +13|inst_AS_030_000_SYNC|NOD| | S | 7 |=> can support up to [ 18] logic PT(s) +14| inst_DTACK_D0|NOD| | S | 1 |=> can support up to [ 6] logic PT(s) +15| | ? | | S | |=> can support up to [ 5] logic PT(s) --------------------------------------------------------------------------- =========================================================================== < Block [ 1] > Node-Pin Assignments @@ -572,19 +575,19 @@ _|_________________|__|__|___|_____|_______________________________________ _|_________________|__|_____|____________________|________________________ 0| AHIGH_30_| IO| | => |( 5) 6 7 0 |( 5) 4 3 10 1| CLK_EXP|OUT| | => | 5 6 7 ( 0)| 5 4 3 ( 10) - 2| RESET|OUT| | => | 6 ( 7) 0 1 | 4 ( 3) 10 9 + 2| IPL_D0_2_|NOD| | => | 6 7 0 1 | 4 3 10 9 3| | | | => | 6 7 0 1 | 4 3 10 9 4| IPL_030_2_| IO| | => | 7 0 ( 1) 2 | 3 10 ( 9) 8 5| IPL_030_0_| IO| | => | 7 0 1 ( 2)| 3 10 9 ( 8) - 6| inst_DTACK_D0|NOD| | => | 0 1 2 3 | 10 9 8 7 + 6| IPL_D0_1_|NOD| | => | 0 1 2 3 | 10 9 8 7 7| | | | => | 0 1 2 3 | 10 9 8 7 8| AHIGH_29_| IO| | => | 1 2 3 ( 4)| 9 8 7 ( 6) 9| IPL_030_1_| IO| | => | 1 2 ( 3) 4 | 9 8 ( 7) 6 -10| CLK_000_D_4_|NOD| | => | 2 3 4 5 | 8 7 6 5 +10| IPL_D0_0_|NOD| | => | 2 3 4 5 | 8 7 6 5 11| | | | => | 2 3 4 5 | 8 7 6 5 12| AHIGH_31_| IO| | => | 3 4 5 ( 6)| 7 6 5 ( 4) -13|inst_DS_000_ENABLE|NOD| | => | 3 4 5 6 | 7 6 5 4 -14| IPL_D0_2_|NOD| | => | 4 5 6 7 | 6 5 4 3 +13|inst_AS_030_000_SYNC|NOD| | => | 3 4 5 6 | 7 6 5 4 +14| inst_DTACK_D0|NOD| | => | 4 5 6 7 | 6 5 4 3 15| | | | => | 4 5 6 7 | 6 5 4 3 --------------------------------------------------------------------------- =========================================================================== @@ -603,7 +606,7 @@ _|_________________|__|___|_____|___________________________________________ 4| AHIGH_29_| IO|*| 6| => | ( 8) 9 10 11 12 13 14 15 5| AHIGH_30_| IO|*| 5| => | 10 11 12 13 14 15 ( 0) 1 6| AHIGH_31_| IO|*| 4| => | (12) 13 14 15 0 1 2 3 - 7| RESET|OUT|*| 3| => | 14 15 0 1 ( 2) 3 4 5 + 7| RESET|INP|*| 3| => | 14 15 0 1 2 3 4 5 --------------------------------------------------------------------------- =========================================================================== < Block [ 1] > IO/Node and IO/Input Macrocell Pairing Table @@ -624,7 +627,7 @@ _|_________________|__|___|_____|__________________________________________ 4| AHIGH_29_| IO|*| 6| => | Input macrocell [ -] 5| AHIGH_30_| IO|*| 5| => | Input macrocell [ -] 6| AHIGH_31_| IO|*| 4| => | Input macrocell [ -] - 7| RESET|OUT|*| 3| => | Input macrocell [ -] + 7| RESET|INP|*| 3| => | Input macrocell [ -] --------------------------------------------------------------------------- =========================================================================== < Block [ 1] > Input Multiplexer (IMX) Assignments @@ -642,7 +645,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 1 [IOpin 1 | 9| IO IPL_030_2_|*| ] paired w/[ RN_IPL_030_2_] [RegIn 1 |129| -| | ] - [MCell 2 |128|OUT RESET| | ] + [MCell 2 |128|NOD IPL_D0_2_| |*] [MCell 3 |130| -| | ] 2 [IOpin 2 | 8| IO IPL_030_0_|*| ] paired w/[ RN_IPL_030_0_] @@ -652,7 +655,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 3 [IOpin 3 | 7| IO IPL_030_1_|*| ] paired w/[ RN_IPL_030_1_] [RegIn 3 |135| -| | ] - [MCell 6 |134|NOD inst_DTACK_D0| |*] + [MCell 6 |134|NOD IPL_D0_1_| |*] [MCell 7 |136| -| | ] 4 [IOpin 4 | 6| IO AHIGH_29_|*|*] @@ -662,17 +665,17 @@ IMX No. | +---- Block IO Pin or Macrocell Number 5 [IOpin 5 | 5| IO AHIGH_30_|*|*] [RegIn 5 |141| -| | ] - [MCell 10 |140|NOD CLK_000_D_4_| |*] + [MCell 10 |140|NOD IPL_D0_0_| |*] [MCell 11 |142| -| | ] 6 [IOpin 6 | 4| IO AHIGH_31_|*|*] [RegIn 6 |144| -| | ] [MCell 12 |143| IO AHIGH_31_| | ] - [MCell 13 |145|NOD inst_DS_000_ENABLE| |*] + [MCell 13 |145|NOD inst_AS_030_000_SYNC| |*] - 7 [IOpin 7 | 3|OUT RESET|*| ] + 7 [IOpin 7 | 3|INP RESET|*|*] [RegIn 7 |147| -| | ] - [MCell 14 |146|NOD IPL_D0_2_| |*] + [MCell 14 |146|NOD inst_DTACK_D0| |*] [MCell 15 |148| -| | ] --------------------------------------------------------------------------- =========================================================================== @@ -682,37 +685,37 @@ IMX No. | +---- Block IO Pin or Macrocell Number | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- Mux00| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux01| ... | ... -Mux02| Mcel 3 10 ( 188)| CLK_000_D_3_ -Mux03| Mcel 6 5 ( 253)| inst_RESET_OUT -Mux04| Mcel 3 6 ( 182)| inst_CLK_OUT_PRE_D +Mux01| IOPin 5 2 ( 58)| FC_1_ +Mux02| IOPin 1 7 ( 3)| RESET +Mux03| IOPin 5 4 ( 56)| IPL_1_ +Mux04| IOPin 0 4 ( 95)| A_DECODE_18_ Mux05| Input Pin ( 14)| nEXP_SPACE Mux06| Mcel 1 9 ( 139)| RN_IPL_030_1_ -Mux07| ... | ... -Mux08| IOPin 6 6 ( 71)| RW +Mux07| Mcel 7 13 ( 289)| inst_BGACK_030_INT_D +Mux08| IOPin 5 1 ( 59)| A_DECODE_17_ Mux09| IOPin 3 5 ( 30)| DTACK -Mux10| Mcel 1 13 ( 145)| inst_DS_000_ENABLE -Mux11| Mcel 6 14 ( 266)| IPL_D0_0_ -Mux12| ... | ... -Mux13| Mcel 7 5 ( 277)| CLK_000_D_1_ -Mux14| ... | ... +Mux10| Mcel 1 13 ( 145)| inst_AS_030_000_SYNC +Mux11| IOPin 0 5 ( 96)| A_DECODE_16_ +Mux12| IOPin 0 6 ( 97)| A_DECODE_19_ +Mux13| ... | ... +Mux14| Mcel 7 2 ( 272)| inst_AS_030_D0 Mux15| ... | ... Mux16| IOPin 6 2 ( 67)| IPL_0_ -Mux17| Mcel 3 14 ( 194)| IPL_D0_1_ -Mux18| ... | ... +Mux17| IOPin 5 3 ( 57)| FC_0_ +Mux18| Mcel 1 2 ( 128)| IPL_D0_2_ Mux19| IOPin 7 3 ( 82)| AS_030 -Mux20| Mcel 1 14 ( 146)| IPL_D0_2_ -Mux21| IOPin 5 4 ( 56)| IPL_1_ +Mux20| Mcel 3 10 ( 188)| CLK_OUT_INTreg +Mux21| Input Pin ( 86)| RST Mux22| IOPin 6 3 ( 68)| IPL_2_ -Mux23| Mcel 2 9 ( 163)| CLK_000_D_0_ -Mux24| Input Pin ( 86)| RST +Mux23| Mcel 1 6 ( 134)| IPL_D0_1_ +Mux24| Mcel 1 10 ( 140)| IPL_D0_0_ Mux25| ... | ... Mux26| ... | ... Mux27| Mcel 1 4 ( 131)| RN_IPL_030_2_ -Mux28| Mcel 3 2 ( 176)| SM_AMIGA_4_ -Mux29| ... | ... -Mux30| Mcel 2 13 ( 169)| SM_AMIGA_6_ -Mux31| Mcel 1 5 ( 133)| RN_IPL_030_0_ +Mux28| Mcel 1 5 ( 133)| RN_IPL_030_0_ +Mux29| Mcel 5 4 ( 227)| SM_AMIGA_i_7_ +Mux30| ... | ... +Mux31| ... | ... Mux32| ... | ... --------------------------------------------------------------------------- =========================================================================== @@ -727,19 +730,19 @@ Mux32| ... | ... _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| AHIGH_28_| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig 1|AMIGA_BUS_ENABLE_LOW|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig - 2| SM_AMIGA_i_7_|NOD| | S | 3 :+: 1| 4 to [ 2]| 1 XOR to [ 2] + 2|inst_AS_000_INT|NOD| | S | 2 | 4 to [ 2]| 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free 4| AHIGH_26_| IO| | S | 1 | 4 free | 1 XOR to [ 4] for 1 PT sig 5| AHIGH_27_| IO| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig - 6| SM_AMIGA_5_|NOD| | S | 3 | 4 to [ 6]| 1 XOR free + 6| SM_AMIGA_3_|NOD| | S | 5 | 4 to [ 6]| 1 XOR to [ 6] as logic PT 7| | ? | | S | | 4 free | 1 XOR free 8| AHIGH_24_| IO| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig - 9| CLK_000_D_0_|NOD| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig -10|inst_AS_000_INT|NOD| | S | 2 | 4 to [10]| 1 XOR free + 9| SM_AMIGA_2_|NOD| | S | 5 | 4 to [ 9]| 1 XOR to [ 9] as logic PT +10| inst_AMIGA_DS|NOD| | S | 2 | 4 to [10]| 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free 12| AHIGH_25_| IO| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig -13| SM_AMIGA_6_|NOD| | S | 3 | 4 to [13]| 1 XOR free -14|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | S | 2 | 4 to [14]| 1 XOR free +13|inst_DS_000_ENABLE|NOD| | S | 3 | 4 to [13]| 1 XOR free +14| CLK_000_D_4_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== @@ -754,20 +757,20 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ _|_________________|__|__|___|_____|_______________________________________ 0| AHIGH_28_| IO| | S | 1 |=> can support up to [ 9] logic PT(s) 1|AMIGA_BUS_ENABLE_LOW|OUT| | S | 1 |=> can support up to [ 14] logic PT(s) - 2| SM_AMIGA_i_7_|NOD| | S | 3 :+: 1|=> can support up to [ 17] logic PT(s) + 2|inst_AS_000_INT|NOD| | S | 2 |=> can support up to [ 18] logic PT(s) 3| | ? | | S | |=> can support up to [ 13] logic PT(s) 4| AHIGH_26_| IO| | S | 1 |=> can support up to [ 14] logic PT(s) 5| AHIGH_27_| IO| | S | 1 |=> can support up to [ 14] logic PT(s) - 6| SM_AMIGA_5_|NOD| | S | 3 |=> can support up to [ 18] logic PT(s) - 7| | ? | | S | |=> can support up to [ 13] logic PT(s) - 8| AHIGH_24_| IO| | S | 1 |=> can support up to [ 14] logic PT(s) - 9| CLK_000_D_0_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) -10|inst_AS_000_INT|NOD| | S | 2 |=> can support up to [ 18] logic PT(s) + 6| SM_AMIGA_3_|NOD| | S | 5 |=> can support up to [ 18] logic PT(s) + 7| | ? | | S | |=> can support up to [ 9] logic PT(s) + 8| AHIGH_24_| IO| | S | 1 |=> can support up to [ 10] logic PT(s) + 9| SM_AMIGA_2_|NOD| | S | 5 |=> can support up to [ 14] logic PT(s) +10| inst_AMIGA_DS|NOD| | S | 2 |=> can support up to [ 14] logic PT(s) 11| | ? | | S | |=> can support up to [ 9] logic PT(s) -12| AHIGH_25_| IO| | S | 1 |=> can support up to [ 10] logic PT(s) -13| SM_AMIGA_6_|NOD| | S | 3 |=> can support up to [ 14] logic PT(s) -14|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) -15| | ? | | S | |=> can support up to [ 5] logic PT(s) +12| AHIGH_25_| IO| | S | 1 |=> can support up to [ 14] logic PT(s) +13|inst_DS_000_ENABLE|NOD| | S | 3 |=> can support up to [ 18] logic PT(s) +14| CLK_000_D_4_|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) +15| | ? | | S | |=> can support up to [ 9] logic PT(s) --------------------------------------------------------------------------- =========================================================================== < Block [ 2] > Node-Pin Assignments @@ -779,19 +782,19 @@ _|_________________|__|__|___|_____|_______________________________________ _|_________________|__|_____|____________________|________________________ 0| AHIGH_28_| IO| | => | 5 6 7 ( 0)| 20 21 22 ( 15) 1|AMIGA_BUS_ENABLE_LOW|OUT| | => |( 5) 6 7 0 |( 20) 21 22 15 - 2| SM_AMIGA_i_7_|NOD| | => | 6 7 0 1 | 21 22 15 16 + 2|inst_AS_000_INT|NOD| | => | 6 7 0 1 | 21 22 15 16 3| | | | => | 6 7 0 1 | 21 22 15 16 4| AHIGH_26_| IO| | => | 7 0 1 ( 2)| 22 15 16 ( 17) 5| AHIGH_27_| IO| | => | 7 0 ( 1) 2 | 22 15 ( 16) 17 - 6| SM_AMIGA_5_|NOD| | => | 0 1 2 3 | 15 16 17 18 + 6| SM_AMIGA_3_|NOD| | => | 0 1 2 3 | 15 16 17 18 7| | | | => | 0 1 2 3 | 15 16 17 18 8| AHIGH_24_| IO| | => | 1 2 3 ( 4)| 16 17 18 ( 19) - 9| CLK_000_D_0_|NOD| | => | 1 2 3 4 | 16 17 18 19 -10|inst_AS_000_INT|NOD| | => | 2 3 4 5 | 17 18 19 20 + 9| SM_AMIGA_2_|NOD| | => | 1 2 3 4 | 16 17 18 19 +10| inst_AMIGA_DS|NOD| | => | 2 3 4 5 | 17 18 19 20 11| | | | => | 2 3 4 5 | 17 18 19 20 12| AHIGH_25_| IO| | => |( 3) 4 5 6 |( 18) 19 20 21 -13| SM_AMIGA_6_|NOD| | => | 3 4 5 6 | 18 19 20 21 -14|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | => | 4 5 6 7 | 19 20 21 22 +13|inst_DS_000_ENABLE|NOD| | => | 3 4 5 6 | 18 19 20 21 +14| CLK_000_D_4_|NOD| | => | 4 5 6 7 | 19 20 21 22 15| | | | => | 4 5 6 7 | 19 20 21 22 --------------------------------------------------------------------------- =========================================================================== @@ -846,7 +849,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 1 [IOpin 1 | 16| IO AHIGH_27_|*|*] [RegIn 1 |153| -| | ] - [MCell 2 |152|NOD SM_AMIGA_i_7_| |*] + [MCell 2 |152|NOD inst_AS_000_INT| |*] [MCell 3 |154| -| | ] 2 [IOpin 2 | 17| IO AHIGH_26_|*|*] @@ -856,27 +859,27 @@ IMX No. | +---- Block IO Pin or Macrocell Number 3 [IOpin 3 | 18| IO AHIGH_25_|*|*] [RegIn 3 |159| -| | ] - [MCell 6 |158|NOD SM_AMIGA_5_| |*] + [MCell 6 |158|NOD SM_AMIGA_3_| |*] [MCell 7 |160| -| | ] 4 [IOpin 4 | 19| IO AHIGH_24_|*|*] [RegIn 4 |162| -| | ] [MCell 8 |161| IO AHIGH_24_| | ] - [MCell 9 |163|NOD CLK_000_D_0_| |*] + [MCell 9 |163|NOD SM_AMIGA_2_| |*] 5 [IOpin 5 | 20|OUT AMIGA_BUS_ENABLE_LOW|*| ] [RegIn 5 |165| -| | ] - [MCell 10 |164|NOD inst_AS_000_INT| |*] + [MCell 10 |164|NOD inst_AMIGA_DS| |*] [MCell 11 |166| -| | ] 6 [IOpin 6 | 21|INP BG_030|*|*] [RegIn 6 |168| -| | ] [MCell 12 |167| IO AHIGH_25_| | ] - [MCell 13 |169|NOD SM_AMIGA_6_| |*] + [MCell 13 |169|NOD inst_DS_000_ENABLE| |*] 7 [IOpin 7 | 22| -| | ] [RegIn 7 |171| -| | ] - [MCell 14 |170|NOD inst_AMIGA_BUS_ENABLE_DMA_HIGH| |*] + [MCell 14 |170|NOD CLK_000_D_4_| |*] [MCell 15 |172| -| | ] --------------------------------------------------------------------------- =========================================================================== @@ -885,39 +888,39 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| Input Pin ( 86)| RST -Mux01| ... | ... -Mux02| Mcel 1 10 ( 140)| CLK_000_D_4_ -Mux03| Input Pin ( 11)| CLK_000 -Mux04| Mcel 7 5 ( 277)| CLK_000_D_1_ +Mux00| Mcel 2 13 ( 169)| inst_DS_000_ENABLE +Mux01| Mcel 3 13 ( 193)| CLK_000_D_0_ +Mux02| IOPin 1 7 ( 3)| RESET +Mux03| Mcel 2 9 ( 163)| SM_AMIGA_2_ +Mux04| Mcel 3 6 ( 182)| cpu_est_1_ Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| ... | ... -Mux07| Mcel 2 14 ( 170)| inst_AMIGA_BUS_ENABLE_DMA_HIGH -Mux08| Mcel 2 10 ( 164)| inst_AS_000_INT -Mux09| IOPin 7 3 ( 82)| AS_030 -Mux10| Mcel 5 1 ( 223)| inst_AMIGA_BUS_ENABLE_DMA_LOW -Mux11| IOPin 5 0 ( 60)| A_1_ -Mux12| ... | ... -Mux13| Mcel 2 9 ( 163)| CLK_000_D_0_ -Mux14| ... | ... -Mux15| ... | ... -Mux16| Mcel 4 8 ( 209)| inst_BGACK_030_INT_D -Mux17| ... | ... -Mux18| Mcel 2 6 ( 158)| SM_AMIGA_5_ -Mux19| Mcel 7 13 ( 289)| SM_AMIGA_0_ -Mux20| Mcel 3 10 ( 188)| CLK_000_D_3_ -Mux21| ... | ... -Mux22| Mcel 2 2 ( 152)| SM_AMIGA_i_7_ +Mux06| Mcel 5 13 ( 241)| CLK_000_D_3_ +Mux07| ... | ... +Mux08| IOPin 3 3 ( 32)| UDS_000 +Mux09| Mcel 5 5 ( 229)| inst_AMIGA_BUS_ENABLE_DMA_LOW +Mux10| Mcel 3 14 ( 194)| cpu_est_2_ +Mux11| IOPin 6 6 ( 71)| RW +Mux12| Mcel 0 1 ( 103)| SM_AMIGA_4_ +Mux13| Mcel 7 5 ( 277)| CLK_000_D_1_ +Mux14| Mcel 3 4 ( 179)| RN_VMA +Mux15| Mcel 5 2 ( 224)| inst_VPA_D +Mux16| Mcel 3 2 ( 176)| cpu_est_3_ +Mux17| IOPin 4 0 ( 41)| BERR +Mux18| Mcel 2 6 ( 158)| SM_AMIGA_3_ +Mux19| IOPin 7 3 ( 82)| AS_030 +Mux20| Mcel 1 14 ( 146)| inst_DTACK_D0 +Mux21| Input Pin ( 86)| RST +Mux22| Mcel 2 2 ( 152)| inst_AS_000_INT Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux24| ... | ... -Mux25| Mcel 5 0 ( 221)| inst_AS_030_000_SYNC +Mux24| IOPin 3 4 ( 31)| LDS_000 +Mux25| Mcel 5 0 ( 221)| SM_AMIGA_6_ Mux26| ... | ... -Mux27| ... | ... +Mux27| Mcel 6 9 ( 259)| cpu_est_0_ Mux28| ... | ... Mux29| ... | ... -Mux30| Mcel 2 13 ( 169)| SM_AMIGA_6_ +Mux30| ... | ... Mux31| ... | ... -Mux32| Mcel 6 5 ( 253)| inst_RESET_OUT +Mux32| ... | ... --------------------------------------------------------------------------- =========================================================================== < Block [ 3] > Macrocell (MCell) Cluster Assignments @@ -929,21 +932,21 @@ Mux32| Mcel 6 5 ( 253)| inst_RESET_OUT | Sig Type-+ | | | | | | | XOR to Mcell Assignment | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| VMA| IO| | S | 3 | 4 to [ 0]| 1 XOR free + 0| DTACK| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig 1| BG_000| IO| | S | 2 | 4 to [ 1]| 1 XOR free - 2| SM_AMIGA_4_|NOD| | S | 3 | 4 to [ 2]| 1 XOR free + 2| cpu_est_3_|NOD| | S | 4 | 4 to [ 2]| 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free - 4|AMIGA_BUS_ENABLE_HIGH|OUT| | S | 2 | 4 to [ 4]| 1 XOR free - 5|AMIGA_ADDR_ENABLE|OUT| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig - 6|inst_CLK_OUT_PRE_D|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig + 4| VMA| IO| | S | 3 | 4 to [ 4]| 1 XOR free + 5|AMIGA_BUS_ENABLE_HIGH|OUT| | S | 2 | 4 to [ 5]| 1 XOR free + 6| cpu_est_1_|NOD| | S | 4 | 4 to [ 6]| 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free 8| UDS_000| IO| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig - 9| cpu_est_3_|NOD| | S | 4 | 4 to [ 9]| 1 XOR free -10| CLK_000_D_3_|NOD| | S | 1 | 4 free | 1 XOR to [10] for 1 PT sig + 9|AMIGA_ADDR_ENABLE|OUT| | S | 1 | 4 free | 1 XOR to [ 9] for 1 PT sig +10|CLK_OUT_INTreg|NOD| | S | 1 | 4 free | 1 XOR to [10] for 1 PT sig 11| | ? | | S | | 4 free | 1 XOR free 12| LDS_000| IO| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig -13| SM_AMIGA_3_|NOD| | S | 5 | 4 to [13]| 1 XOR to [13] as logic PT -14| IPL_D0_1_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig +13| CLK_000_D_0_|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig +14| cpu_est_2_|NOD| | S | 1 :+: 1| 4 to [14]| 1 XOR to [14] 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== @@ -956,22 +959,22 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| VMA| IO| | S | 3 |=> can support up to [ 5] logic PT(s) - 1| BG_000| IO| | S | 2 |=> can support up to [ 10] logic PT(s) - 2| SM_AMIGA_4_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s) - 3| | ? | | S | |=> can support up to [ 9] logic PT(s) - 4|AMIGA_BUS_ENABLE_HIGH|OUT| | S | 2 |=> can support up to [ 18] logic PT(s) - 5|AMIGA_ADDR_ENABLE|OUT| | S | 1 |=> can support up to [ 14] logic PT(s) - 6|inst_CLK_OUT_PRE_D|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) + 0| DTACK| IO| | S | 1 |=> can support up to [ 5] logic PT(s) + 1| BG_000| IO| | S | 2 |=> can support up to [ 14] logic PT(s) + 2| cpu_est_3_|NOD| | S | 4 |=> can support up to [ 10] logic PT(s) + 3| | ? | | S | |=> can support up to [ 5] logic PT(s) + 4| VMA| IO| | S | 3 |=> can support up to [ 10] logic PT(s) + 5|AMIGA_BUS_ENABLE_HIGH|OUT| | S | 2 |=> can support up to [ 10] logic PT(s) + 6| cpu_est_1_|NOD| | S | 4 |=> can support up to [ 14] logic PT(s) 7| | ? | | S | |=> can support up to [ 13] logic PT(s) - 8| UDS_000| IO| | S | 1 |=> can support up to [ 14] logic PT(s) - 9| cpu_est_3_|NOD| | S | 4 |=> can support up to [ 18] logic PT(s) -10| CLK_000_D_3_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) -11| | ? | | S | |=> can support up to [ 13] logic PT(s) + 8| UDS_000| IO| | S | 1 |=> can support up to [ 18] logic PT(s) + 9|AMIGA_ADDR_ENABLE|OUT| | S | 1 |=> can support up to [ 18] logic PT(s) +10|CLK_OUT_INTreg|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) +11| | ? | | S | |=> can support up to [ 17] logic PT(s) 12| LDS_000| IO| | S | 1 |=> can support up to [ 14] logic PT(s) -13| SM_AMIGA_3_|NOD| | S | 5 |=> can support up to [ 18] logic PT(s) -14| IPL_D0_1_|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) -15| | ? | | S | |=> can support up to [ 9] logic PT(s) +13| CLK_000_D_0_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) +14| cpu_est_2_|NOD| | S | 1 :+: 1|=> can support up to [ 13] logic PT(s) +15| | ? | | S | |=> can support up to [ 5] logic PT(s) --------------------------------------------------------------------------- =========================================================================== < Block [ 3] > Node-Pin Assignments @@ -981,21 +984,21 @@ _|_________________|__|__|___|_____|_______________________________________ | Sig Type---+ | to | Block [ 3] IO Pin | Device Pin | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ - 0| VMA| IO| | => | 5 6 7 ( 0)| 30 29 28 ( 35) + 0| DTACK| IO| | => |( 5) 6 7 0 |( 30) 29 28 35 1| BG_000| IO| | => | 5 ( 6) 7 0 | 30 ( 29) 28 35 - 2| SM_AMIGA_4_|NOD| | => | 6 7 0 1 | 29 28 35 34 + 2| cpu_est_3_|NOD| | => | 6 7 0 1 | 29 28 35 34 3| | | | => | 6 7 0 1 | 29 28 35 34 - 4|AMIGA_BUS_ENABLE_HIGH|OUT| | => | 7 0 ( 1) 2 | 28 35 ( 34) 33 - 5|AMIGA_ADDR_ENABLE|OUT| | => | 7 0 1 ( 2)| 28 35 34 ( 33) - 6|inst_CLK_OUT_PRE_D|NOD| | => | 0 1 2 3 | 35 34 33 32 + 4| VMA| IO| | => | 7 ( 0) 1 2 | 28 ( 35) 34 33 + 5|AMIGA_BUS_ENABLE_HIGH|OUT| | => | 7 0 ( 1) 2 | 28 35 ( 34) 33 + 6| cpu_est_1_|NOD| | => | 0 1 2 3 | 35 34 33 32 7| | | | => | 0 1 2 3 | 35 34 33 32 8| UDS_000| IO| | => | 1 2 ( 3) 4 | 34 33 ( 32) 31 - 9| cpu_est_3_|NOD| | => | 1 2 3 4 | 34 33 32 31 -10| CLK_000_D_3_|NOD| | => | 2 3 4 5 | 33 32 31 30 + 9|AMIGA_ADDR_ENABLE|OUT| | => | 1 ( 2) 3 4 | 34 ( 33) 32 31 +10|CLK_OUT_INTreg|NOD| | => | 2 3 4 5 | 33 32 31 30 11| | | | => | 2 3 4 5 | 33 32 31 30 12| LDS_000| IO| | => | 3 ( 4) 5 6 | 32 ( 31) 30 29 -13| SM_AMIGA_3_|NOD| | => | 3 4 5 6 | 32 31 30 29 -14| IPL_D0_1_|NOD| | => | 4 5 6 7 | 31 30 29 28 +13| CLK_000_D_0_|NOD| | => | 3 4 5 6 | 32 31 30 29 +14| cpu_est_2_|NOD| | => | 4 5 6 7 | 31 30 29 28 15| | | | => | 4 5 6 7 | 31 30 29 28 --------------------------------------------------------------------------- =========================================================================== @@ -1007,12 +1010,12 @@ _|_________________|__|_____|____________________|________________________ | Sig Type--+ | | | | Signal Name | | | | Node Destinations Via Output Matrix _|_________________|__|___|_____|___________________________________________ - 0| VMA| IO|*| 35| => | ( 0) 1 2 3 4 5 6 7 - 1|AMIGA_BUS_ENABLE_HIGH|OUT|*| 34| => | 2 3 ( 4) 5 6 7 8 9 - 2|AMIGA_ADDR_ENABLE|OUT|*| 33| => | 4 ( 5) 6 7 8 9 10 11 + 0| VMA| IO|*| 35| => | 0 1 2 3 ( 4) 5 6 7 + 1|AMIGA_BUS_ENABLE_HIGH|OUT|*| 34| => | 2 3 4 ( 5) 6 7 8 9 + 2|AMIGA_ADDR_ENABLE|OUT|*| 33| => | 4 5 6 7 8 ( 9) 10 11 3| UDS_000| IO|*| 32| => | 6 7 ( 8) 9 10 11 12 13 4| LDS_000| IO|*| 31| => | 8 9 10 11 (12) 13 14 15 - 5| DTACK|INP|*| 30| => | 10 11 12 13 14 15 0 1 + 5| DTACK| IO|*| 30| => | 10 11 12 13 14 15 ( 0) 1 6| BG_000| IO|*| 29| => | 12 13 14 15 0 ( 1) 2 3 7| BGACK_000|INP|*| 28| => | 14 15 0 1 2 3 4 5 --------------------------------------------------------------------------- @@ -1031,7 +1034,7 @@ _|_________________|__|___|_____|__________________________________________ 2|AMIGA_ADDR_ENABLE|OUT|*| 33| => | Input macrocell [ -] 3| UDS_000| IO|*| 32| => | Input macrocell [ -] 4| LDS_000| IO|*| 31| => | Input macrocell [ -] - 5| DTACK|INP|*| 30| => | Input macrocell [ -] + 5| DTACK| IO|*| 30| => | Input macrocell [ -] 6| BG_000| IO|*| 29| => | Input macrocell [ -] | | | | | | IO paired w/ node [ RN_BG_000] 7| BGACK_000|INP|*| 28| => | Input macrocell [ -] @@ -1047,42 +1050,42 @@ IMX No. | +---- Block IO Pin or Macrocell Number ---|-------|----|---|---|----------|------|-|------------------------------ 0 [IOpin 0 | 35| IO VMA|*| ] paired w/[ RN_VMA] [RegIn 0 |174| -| | ] - [MCell 0 |173|NOD RN_VMA| |*] paired w/[ VMA] + [MCell 0 |173| IO DTACK| | ] [MCell 1 |175|NOD RN_BG_000| |*] paired w/[ BG_000] 1 [IOpin 1 | 34|OUT AMIGA_BUS_ENABLE_HIGH|*| ] [RegIn 1 |177| -| | ] - [MCell 2 |176|NOD SM_AMIGA_4_| |*] + [MCell 2 |176|NOD cpu_est_3_| |*] [MCell 3 |178| -| | ] 2 [IOpin 2 | 33|OUT AMIGA_ADDR_ENABLE|*| ] [RegIn 2 |180| -| | ] - [MCell 4 |179|OUT AMIGA_BUS_ENABLE_HIGH| | ] - [MCell 5 |181|OUT AMIGA_ADDR_ENABLE| | ] + [MCell 4 |179|NOD RN_VMA| |*] paired w/[ VMA] + [MCell 5 |181|OUT AMIGA_BUS_ENABLE_HIGH| | ] 3 [IOpin 3 | 32| IO UDS_000|*|*] [RegIn 3 |183| -| | ] - [MCell 6 |182|NOD inst_CLK_OUT_PRE_D| |*] + [MCell 6 |182|NOD cpu_est_1_| |*] [MCell 7 |184| -| | ] 4 [IOpin 4 | 31| IO LDS_000|*|*] [RegIn 4 |186| -| | ] [MCell 8 |185| IO UDS_000| | ] - [MCell 9 |187|NOD cpu_est_3_| |*] + [MCell 9 |187|OUT AMIGA_ADDR_ENABLE| | ] - 5 [IOpin 5 | 30|INP DTACK|*|*] + 5 [IOpin 5 | 30| IO DTACK|*|*] [RegIn 5 |189| -| | ] - [MCell 10 |188|NOD CLK_000_D_3_| |*] + [MCell 10 |188|NOD CLK_OUT_INTreg| |*] [MCell 11 |190| -| | ] 6 [IOpin 6 | 29| IO BG_000|*| ] paired w/[ RN_BG_000] [RegIn 6 |192| -| | ] [MCell 12 |191| IO LDS_000| | ] - [MCell 13 |193|NOD SM_AMIGA_3_| |*] + [MCell 13 |193|NOD CLK_000_D_0_| |*] 7 [IOpin 7 | 28|INP BGACK_000|*|*] [RegIn 7 |195| -| | ] - [MCell 14 |194|NOD IPL_D0_1_| |*] + [MCell 14 |194|NOD cpu_est_2_| |*] [MCell 15 |196| -| | ] --------------------------------------------------------------------------- =========================================================================== @@ -1091,39 +1094,39 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux01| Mcel 3 13 ( 193)| SM_AMIGA_3_ +Mux00| Input Pin ( 86)| RST +Mux01| Mcel 5 9 ( 235)| inst_AMIGA_BUS_ENABLE_DMA_HIGH Mux02| Mcel 3 1 ( 175)| RN_BG_000 -Mux03| Mcel 0 8 ( 113)| cpu_est_1_ +Mux03| Mcel 3 2 ( 176)| cpu_est_3_ Mux04| IOPin 2 6 ( 21)| BG_030 -Mux05| Mcel 5 0 ( 221)| inst_AS_030_000_SYNC +Mux05| Input Pin ( 14)| nEXP_SPACE Mux06| ... | ... -Mux07| Mcel 3 9 ( 187)| cpu_est_3_ -Mux08| ... | ... -Mux09| Mcel 0 12 ( 119)| cpu_est_2_ -Mux10| Mcel 6 9 ( 259)| cpu_est_0_ -Mux11| Mcel 1 6 ( 134)| inst_DTACK_D0 -Mux12| Mcel 6 13 ( 265)| inst_CLK_OUT_PRE_50 +Mux07| ... | ... +Mux08| Mcel 4 8 ( 209)| inst_CLK_OUT_PRE_D +Mux09| Mcel 5 2 ( 224)| inst_VPA_D +Mux10| Mcel 3 4 ( 179)| RN_VMA +Mux11| Mcel 2 13 ( 169)| inst_DS_000_ENABLE +Mux12| Mcel 6 9 ( 259)| cpu_est_0_ Mux13| Mcel 7 5 ( 277)| CLK_000_D_1_ -Mux14| Mcel 4 5 ( 205)| inst_AS_030_D0 -Mux15| Input Pin ( 14)| nEXP_SPACE -Mux16| Mcel 3 2 ( 176)| SM_AMIGA_4_ -Mux17| Mcel 5 12 ( 239)| inst_UDS_000_INT -Mux18| Mcel 2 14 ( 170)| inst_AMIGA_BUS_ENABLE_DMA_HIGH -Mux19| Mcel 0 9 ( 115)| inst_VPA_D -Mux20| Mcel 5 8 ( 233)| inst_LDS_000_INT -Mux21| Input Pin ( 86)| RST +Mux14| Input Pin ( 11)| CLK_000 +Mux15| Mcel 5 1 ( 223)| inst_UDS_000_INT +Mux16| Mcel 3 6 ( 182)| cpu_est_1_ +Mux17| Mcel 5 12 ( 239)| inst_LDS_000_INT +Mux18| Mcel 0 8 ( 113)| inst_AS_000_DMA +Mux19| IOPin 7 3 ( 82)| AS_030 +Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux21| Mcel 1 13 ( 145)| inst_AS_030_000_SYNC Mux22| Mcel 6 5 ( 253)| inst_RESET_OUT -Mux23| Mcel 2 9 ( 163)| CLK_000_D_0_ -Mux24| ... | ... -Mux25| IOPin 4 0 ( 41)| BERR -Mux26| Mcel 3 0 ( 173)| RN_VMA -Mux27| Mcel 2 6 ( 158)| SM_AMIGA_5_ -Mux28| Mcel 1 13 ( 145)| inst_DS_000_ENABLE -Mux29| ... | ... -Mux30| Mcel 7 6 ( 278)| CLK_000_D_2_ -Mux31| IOPin 5 4 ( 56)| IPL_1_ -Mux32| IOPin 7 3 ( 82)| AS_030 +Mux23| ... | ... +Mux24| Mcel 3 14 ( 194)| cpu_est_2_ +Mux25| ... | ... +Mux26| ... | ... +Mux27| ... | ... +Mux28| Mcel 7 2 ( 272)| inst_AS_030_D0 +Mux29| Mcel 3 13 ( 193)| CLK_000_D_0_ +Mux30| ... | ... +Mux31| ... | ... +Mux32| ... | ... --------------------------------------------------------------------------- =========================================================================== < Block [ 4] > Macrocell (MCell) Cluster Assignments @@ -1140,11 +1143,11 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ 2| | ? | | S | | 4 free | 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free 4| AS_000| IO| | S | 1 | 4 free | 1 XOR to [ 4] for 1 PT sig - 5|inst_AS_030_D0|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig + 5| CIIN_0|NOD| | S | 2 | 4 to [ 5]| 1 XOR free 6| | ? | | S | | 4 free | 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free - 8|inst_BGACK_030_INT_D|NOD| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig - 9| CIIN_0|NOD| | S | 2 | 4 to [ 9]| 1 XOR free + 8|inst_CLK_OUT_PRE_D|NOD| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig + 9| | ? | | S | | 4 free | 1 XOR free 10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free 12| CIIN|OUT| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig @@ -1165,14 +1168,14 @@ _|_________________|__|__|___|_____|_______________________________________ 0| BERR| IO| | S | 1 |=> can support up to [ 10] logic PT(s) 1|AMIGA_BUS_DATA_DIR|OUT| | S | 2 |=> can support up to [ 19] logic PT(s) 2| | ? | | S | |=> can support up to [ 14] logic PT(s) - 3| | ? | | S | |=> can support up to [ 18] logic PT(s) - 4| AS_000| IO| | S | 1 |=> can support up to [ 19] logic PT(s) - 5|inst_AS_030_D0|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) - 6| | ? | | S | |=> can support up to [ 18] logic PT(s) - 7| | ? | | S | |=> can support up to [ 14] logic PT(s) - 8|inst_BGACK_030_INT_D|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) - 9| CIIN_0|NOD| | S | 2 |=> can support up to [ 19] logic PT(s) -10| | ? | | S | |=> can support up to [ 14] logic PT(s) + 3| | ? | | S | |=> can support up to [ 14] logic PT(s) + 4| AS_000| IO| | S | 1 |=> can support up to [ 15] logic PT(s) + 5| CIIN_0|NOD| | S | 2 |=> can support up to [ 19] logic PT(s) + 6| | ? | | S | |=> can support up to [ 14] logic PT(s) + 7| | ? | | S | |=> can support up to [ 19] logic PT(s) + 8|inst_CLK_OUT_PRE_D|NOD| | S | 1 |=> can support up to [ 20] logic PT(s) + 9| | ? | | S | |=> can support up to [ 19] logic PT(s) +10| | ? | | S | |=> can support up to [ 19] logic PT(s) 11| | ? | | S | |=> can support up to [ 19] logic PT(s) 12| CIIN|OUT| | S | 1 |=> can support up to [ 20] logic PT(s) 13| | ? | | S | |=> can support up to [ 19] logic PT(s) @@ -1192,11 +1195,11 @@ _|_________________|__|_____|____________________|________________________ 2| | | | => | 6 7 0 1 | 47 48 41 42 3| | | | => | 6 7 0 1 | 47 48 41 42 4| AS_000| IO| | => | 7 0 ( 1) 2 | 48 41 ( 42) 43 - 5|inst_AS_030_D0|NOD| | => | 7 0 1 2 | 48 41 42 43 + 5| CIIN_0|NOD| | => | 7 0 1 2 | 48 41 42 43 6| | | | => | 0 1 2 3 | 41 42 43 44 7| | | | => | 0 1 2 3 | 41 42 43 44 - 8|inst_BGACK_030_INT_D|NOD| | => | 1 2 3 4 | 42 43 44 45 - 9| CIIN_0|NOD| | => | 1 2 3 4 | 42 43 44 45 + 8|inst_CLK_OUT_PRE_D|NOD| | => | 1 2 3 4 | 42 43 44 45 + 9| | | | => | 1 2 3 4 | 42 43 44 45 10| | | | => | 2 3 4 5 | 43 44 45 46 11| | | | => | 2 3 4 5 | 43 44 45 46 12| CIIN|OUT| | => | 3 4 5 ( 6)| 44 45 46 ( 47) @@ -1262,7 +1265,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 2 [IOpin 2 | 43| -| | ] [RegIn 2 |204| -| | ] [MCell 4 |203| IO AS_000| | ] - [MCell 5 |205|NOD inst_AS_030_D0| |*] + [MCell 5 |205|NOD CIIN_0| |*] 3 [IOpin 3 | 44| -| | ] [RegIn 3 |207| -| | ] @@ -1271,8 +1274,8 @@ IMX No. | +---- Block IO Pin or Macrocell Number 4 [IOpin 4 | 45| -| | ] [RegIn 4 |210| -| | ] - [MCell 8 |209|NOD inst_BGACK_030_INT_D| |*] - [MCell 9 |211|NOD CIIN_0| |*] + [MCell 8 |209|NOD inst_CLK_OUT_PRE_D| |*] + [MCell 9 |211| -| | ] 5 [IOpin 5 | 46| -| | ] [RegIn 5 |213| -| | ] @@ -1295,39 +1298,39 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| Input Pin ( 86)| RST +Mux00| Mcel 7 4 ( 275)| RN_BGACK_030 Mux01| IOPin 5 2 ( 58)| FC_1_ -Mux02| Mcel 4 9 ( 211)| CIIN_0 -Mux03| IOPin 2 1 ( 16)| AHIGH_27_ -Mux04| IOPin 0 4 ( 95)| A_DECODE_18_ +Mux02| Mcel 2 2 ( 152)| inst_AS_000_INT +Mux03| IOPin 0 2 ( 93)| A_DECODE_20_ +Mux04| IOPin 3 7 ( 28)| BGACK_000 Mux05| IOPin 2 4 ( 19)| AHIGH_24_ -Mux06| IOPin 0 6 ( 97)| A_DECODE_19_ +Mux06| IOPin 7 5 ( 80)| RW_000 Mux07| IOPin 2 0 ( 15)| AHIGH_28_ -Mux08| Mcel 2 10 ( 164)| inst_AS_000_INT -Mux09| IOPin 1 5 ( 5)| AHIGH_30_ +Mux08| IOPin 0 0 ( 91)| FPU_SENSE +Mux09| IOPin 7 3 ( 82)| AS_030 Mux10| ... | ... -Mux11| IOPin 0 0 ( 91)| FPU_SENSE -Mux12| IOPin 2 3 ( 18)| AHIGH_25_ +Mux11| IOPin 0 5 ( 96)| A_DECODE_16_ +Mux12| IOPin 0 6 ( 97)| A_DECODE_19_ Mux13| IOPin 1 4 ( 6)| AHIGH_29_ -Mux14| Mcel 4 5 ( 205)| inst_AS_030_D0 -Mux15| IOPin 0 3 ( 94)| A_DECODE_21_ +Mux14| Mcel 4 5 ( 205)| CIIN_0 +Mux15| Input Pin ( 14)| nEXP_SPACE Mux16| IOPin 4 1 ( 42)| AS_000 -Mux17| IOPin 2 2 ( 17)| AHIGH_26_ -Mux18| IOPin 3 7 ( 28)| BGACK_000 -Mux19| IOPin 7 3 ( 82)| AS_030 +Mux17| IOPin 0 4 ( 95)| A_DECODE_18_ +Mux18| IOPin 7 0 ( 85)| A_DECODE_23_ +Mux19| IOPin 1 5 ( 5)| AHIGH_30_ Mux20| IOPin 7 1 ( 84)| A_DECODE_22_ -Mux21| Input Pin ( 14)| nEXP_SPACE -Mux22| Mcel 6 5 ( 253)| inst_RESET_OUT -Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux21| IOPin 2 1 ( 16)| AHIGH_27_ +Mux22| IOPin 2 3 ( 18)| AHIGH_25_ +Mux23| Mcel 6 2 ( 248)| inst_CLK_OUT_PRE_50 Mux24| IOPin 5 3 ( 57)| FC_0_ Mux25| IOPin 1 6 ( 4)| AHIGH_31_ -Mux26| IOPin 0 5 ( 96)| A_DECODE_16_ +Mux26| IOPin 2 2 ( 17)| AHIGH_26_ Mux27| IOPin 5 1 ( 59)| A_DECODE_17_ -Mux28| IOPin 7 5 ( 80)| RW_000 -Mux29| IOPin 0 2 ( 93)| A_DECODE_20_ +Mux28| Mcel 7 2 ( 272)| inst_AS_030_D0 +Mux29| ... | ... Mux30| ... | ... -Mux31| ... | ... -Mux32| IOPin 7 0 ( 85)| A_DECODE_23_ +Mux31| IOPin 0 3 ( 94)| A_DECODE_21_ +Mux32| Mcel 6 5 ( 253)| inst_RESET_OUT --------------------------------------------------------------------------- =========================================================================== < Block [ 5] > Macrocell (MCell) Cluster Assignments @@ -1339,20 +1342,20 @@ Mux32| IOPin 7 0 ( 85)| A_DECODE_23_ | Sig Type-+ | | | | | | | XOR to Mcell Assignment | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ - 0|inst_AS_030_000_SYNC|NOD| | S | 7 | 4 to [ 0]| 1 XOR to [ 0] as logic PT - 1|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | S | 2 | 4 to [ 1]| 1 XOR free - 2| | ? | | S | | 4 to [ 0]| 1 XOR free + 0| SM_AMIGA_6_|NOD| | S | 3 | 4 to [ 0]| 1 XOR free + 1|inst_UDS_000_INT|NOD| | S | 2 | 4 to [ 1]| 1 XOR free + 2| inst_VPA_D|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig 3| | ? | | S | | 4 free | 1 XOR free - 4| SM_AMIGA_1_|NOD| | S | 3 | 4 to [ 4]| 1 XOR free - 5| | ? | | S | | 4 free | 1 XOR free + 4| SM_AMIGA_i_7_|NOD| | S | 3 :+: 1| 4 to [ 4]| 1 XOR to [ 4] + 5|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | S | 2 | 4 to [ 5]| 1 XOR free 6| | ? | | S | | 4 free | 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free - 8|inst_LDS_000_INT|NOD| | S | 3 | 4 to [ 8]| 1 XOR free - 9| | ? | | S | | 4 free | 1 XOR free + 8| SM_AMIGA_1_|NOD| | S | 3 | 4 to [ 8]| 1 XOR free + 9|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | S | 2 | 4 to [ 9]| 1 XOR free 10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free -12|inst_UDS_000_INT|NOD| | S | 2 | 4 to [12]| 1 XOR free -13| | ? | | S | | 4 free | 1 XOR free +12|inst_LDS_000_INT|NOD| | S | 3 | 4 to [12]| 1 XOR free +13| CLK_000_D_3_|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig 14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- @@ -1366,21 +1369,21 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0|inst_AS_030_000_SYNC|NOD| | S | 7 |=> can support up to [ 10] logic PT(s) - 1|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) - 2| | ? | | S | |=> can support up to [ 6] logic PT(s) - 3| | ? | | S | |=> can support up to [ 10] logic PT(s) - 4| SM_AMIGA_1_|NOD| | S | 3 |=> can support up to [ 20] logic PT(s) - 5| | ? | | S | |=> can support up to [ 15] logic PT(s) - 6| | ? | | S | |=> can support up to [ 15] logic PT(s) - 7| | ? | | S | |=> can support up to [ 15] logic PT(s) - 8|inst_LDS_000_INT|NOD| | S | 3 |=> can support up to [ 20] logic PT(s) - 9| | ? | | S | |=> can support up to [ 15] logic PT(s) -10| | ? | | S | |=> can support up to [ 15] logic PT(s) -11| | ? | | S | |=> can support up to [ 15] logic PT(s) -12|inst_UDS_000_INT|NOD| | S | 2 |=> can support up to [ 20] logic PT(s) -13| | ? | | S | |=> can support up to [ 15] logic PT(s) -14| | ? | | S | |=> can support up to [ 15] logic PT(s) + 0| SM_AMIGA_6_|NOD| | S | 3 |=> can support up to [ 9] logic PT(s) + 1|inst_UDS_000_INT|NOD| | S | 2 |=> can support up to [ 14] logic PT(s) + 2| inst_VPA_D|NOD| | S | 1 |=> can support up to [ 10] logic PT(s) + 3| | ? | | S | |=> can support up to [ 9] logic PT(s) + 4| SM_AMIGA_i_7_|NOD| | S | 3 :+: 1|=> can support up to [ 14] logic PT(s) + 5|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) + 6| | ? | | S | |=> can support up to [ 10] logic PT(s) + 7| | ? | | S | |=> can support up to [ 10] logic PT(s) + 8| SM_AMIGA_1_|NOD| | S | 3 |=> can support up to [ 15] logic PT(s) + 9|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) +10| | ? | | S | |=> can support up to [ 10] logic PT(s) +11| | ? | | S | |=> can support up to [ 14] logic PT(s) +12|inst_LDS_000_INT|NOD| | S | 3 |=> can support up to [ 19] logic PT(s) +13| CLK_000_D_3_|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) +14| | ? | | S | |=> can support up to [ 14] logic PT(s) 15| | ? | | S | |=> can support up to [ 10] logic PT(s) --------------------------------------------------------------------------- =========================================================================== @@ -1391,20 +1394,20 @@ _|_________________|__|__|___|_____|_______________________________________ | Sig Type---+ | to | Block [ 5] IO Pin | Device Pin | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ - 0|inst_AS_030_000_SYNC|NOD| | => | 5 6 7 0 | 55 54 53 60 - 1|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | => | 5 6 7 0 | 55 54 53 60 - 2| | | | => | 6 7 0 1 | 54 53 60 59 + 0| SM_AMIGA_6_|NOD| | => | 5 6 7 0 | 55 54 53 60 + 1|inst_UDS_000_INT|NOD| | => | 5 6 7 0 | 55 54 53 60 + 2| inst_VPA_D|NOD| | => | 6 7 0 1 | 54 53 60 59 3| | | | => | 6 7 0 1 | 54 53 60 59 - 4| SM_AMIGA_1_|NOD| | => | 7 0 1 2 | 53 60 59 58 - 5| | | | => | 7 0 1 2 | 53 60 59 58 + 4| SM_AMIGA_i_7_|NOD| | => | 7 0 1 2 | 53 60 59 58 + 5|inst_AMIGA_BUS_ENABLE_DMA_LOW|NOD| | => | 7 0 1 2 | 53 60 59 58 6| | | | => | 0 1 2 3 | 60 59 58 57 7| | | | => | 0 1 2 3 | 60 59 58 57 - 8|inst_LDS_000_INT|NOD| | => | 1 2 3 4 | 59 58 57 56 - 9| | | | => | 1 2 3 4 | 59 58 57 56 + 8| SM_AMIGA_1_|NOD| | => | 1 2 3 4 | 59 58 57 56 + 9|inst_AMIGA_BUS_ENABLE_DMA_HIGH|NOD| | => | 1 2 3 4 | 59 58 57 56 10| | | | => | 2 3 4 5 | 58 57 56 55 11| | | | => | 2 3 4 5 | 58 57 56 55 -12|inst_UDS_000_INT|NOD| | => | 3 4 5 6 | 57 56 55 54 -13| | | | => | 3 4 5 6 | 57 56 55 54 +12|inst_LDS_000_INT|NOD| | => | 3 4 5 6 | 57 56 55 54 +13| CLK_000_D_3_|NOD| | => | 3 4 5 6 | 57 56 55 54 14| | | | => | 4 5 6 7 | 56 55 54 53 15| | | | => | 4 5 6 7 | 56 55 54 53 --------------------------------------------------------------------------- @@ -1455,18 +1458,18 @@ IMX No. | +---- Block IO Pin or Macrocell Number ---|-------|----|---|---|----------|------|-|------------------------------ 0 [IOpin 0 | 60|INP A_1_|*|*] [RegIn 0 |222| -| | ] - [MCell 0 |221|NOD inst_AS_030_000_SYNC| |*] - [MCell 1 |223|NOD inst_AMIGA_BUS_ENABLE_DMA_LOW| |*] + [MCell 0 |221|NOD SM_AMIGA_6_| |*] + [MCell 1 |223|NOD inst_UDS_000_INT| |*] 1 [IOpin 1 | 59|INP A_DECODE_17_|*|*] [RegIn 1 |225| -| | ] - [MCell 2 |224| -| | ] + [MCell 2 |224|NOD inst_VPA_D| |*] [MCell 3 |226| -| | ] 2 [IOpin 2 | 58|INP FC_1_|*|*] [RegIn 2 |228| -| | ] - [MCell 4 |227|NOD SM_AMIGA_1_| |*] - [MCell 5 |229| -| | ] + [MCell 4 |227|NOD SM_AMIGA_i_7_| |*] + [MCell 5 |229|NOD inst_AMIGA_BUS_ENABLE_DMA_LOW| |*] 3 [IOpin 3 | 57|INP FC_0_|*|*] [RegIn 3 |231| -| | ] @@ -1475,8 +1478,8 @@ IMX No. | +---- Block IO Pin or Macrocell Number 4 [IOpin 4 | 56|INP IPL_1_|*|*] [RegIn 4 |234| -| | ] - [MCell 8 |233|NOD inst_LDS_000_INT| |*] - [MCell 9 |235| -| | ] + [MCell 8 |233|NOD SM_AMIGA_1_| |*] + [MCell 9 |235|NOD inst_AMIGA_BUS_ENABLE_DMA_HIGH| |*] 5 [IOpin 5 | 55| -| | ] [RegIn 5 |237| -| | ] @@ -1485,8 +1488,8 @@ IMX No. | +---- Block IO Pin or Macrocell Number 6 [IOpin 6 | 54| -| | ] [RegIn 6 |240| -| | ] - [MCell 12 |239|NOD inst_UDS_000_INT| |*] - [MCell 13 |241| -| | ] + [MCell 12 |239|NOD inst_LDS_000_INT| |*] + [MCell 13 |241|NOD CLK_000_D_3_| |*] 7 [IOpin 7 | 53| -| | ] [RegIn 7 |243| -| | ] @@ -1500,36 +1503,36 @@ IMX No. | +---- Block IO Pin or Macrocell Number | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- Mux00| IOPin 6 5 ( 70)| SIZE_0_ -Mux01| IOPin 5 2 ( 58)| FC_1_ -Mux02| Mcel 5 8 ( 233)| inst_LDS_000_INT -Mux03| IOPin 5 0 ( 60)| A_1_ -Mux04| IOPin 0 4 ( 95)| A_DECODE_18_ +Mux01| Mcel 3 13 ( 193)| CLK_000_D_0_ +Mux02| Mcel 5 8 ( 233)| SM_AMIGA_1_ +Mux03| Mcel 2 9 ( 163)| SM_AMIGA_2_ +Mux04| Mcel 7 5 ( 277)| CLK_000_D_1_ Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| IOPin 5 3 ( 57)| FC_0_ -Mux07| ... | ... -Mux08| IOPin 5 1 ( 59)| A_DECODE_17_ -Mux09| IOPin 7 3 ( 82)| AS_030 -Mux10| Mcel 5 1 ( 223)| inst_AMIGA_BUS_ENABLE_DMA_LOW -Mux11| IOPin 0 5 ( 96)| A_DECODE_16_ -Mux12| IOPin 0 6 ( 97)| A_DECODE_19_ -Mux13| Mcel 7 5 ( 277)| CLK_000_D_1_ -Mux14| Mcel 5 4 ( 227)| SM_AMIGA_1_ +Mux06| Mcel 5 13 ( 241)| CLK_000_D_3_ +Mux07| Mcel 2 14 ( 170)| CLK_000_D_4_ +Mux08| ... | ... +Mux09| Mcel 0 12 ( 119)| SM_AMIGA_0_ +Mux10| Mcel 5 1 ( 223)| inst_UDS_000_INT +Mux11| IOPin 5 0 ( 60)| A_1_ +Mux12| ... | ... +Mux13| Input Pin ( 36)| VPA +Mux14| Mcel 5 5 ( 229)| inst_AMIGA_BUS_ENABLE_DMA_LOW Mux15| IOPin 6 4 ( 69)| A_0_ -Mux16| Mcel 4 8 ( 209)| inst_BGACK_030_INT_D -Mux17| Mcel 5 12 ( 239)| inst_UDS_000_INT -Mux18| Mcel 0 5 ( 109)| SM_AMIGA_2_ -Mux19| ... | ... +Mux16| ... | ... +Mux17| Mcel 5 12 ( 239)| inst_LDS_000_INT +Mux18| Mcel 5 9 ( 235)| inst_AMIGA_BUS_ENABLE_DMA_HIGH +Mux19| Mcel 7 13 ( 289)| inst_BGACK_030_INT_D Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux21| Input Pin ( 86)| RST -Mux22| Mcel 2 2 ( 152)| SM_AMIGA_i_7_ -Mux23| Mcel 2 9 ( 163)| CLK_000_D_0_ -Mux24| ... | ... -Mux25| Mcel 5 0 ( 221)| inst_AS_030_000_SYNC -Mux26| Mcel 4 5 ( 205)| inst_AS_030_D0 +Mux21| Mcel 1 13 ( 145)| inst_AS_030_000_SYNC +Mux22| ... | ... +Mux23| ... | ... +Mux24| Input Pin ( 86)| RST +Mux25| Mcel 5 0 ( 221)| SM_AMIGA_6_ +Mux26| ... | ... Mux27| IOPin 7 6 ( 79)| SIZE_1_ Mux28| ... | ... -Mux29| ... | ... -Mux30| Mcel 2 13 ( 169)| SM_AMIGA_6_ +Mux29| Mcel 5 4 ( 227)| SM_AMIGA_i_7_ +Mux30| Mcel 7 6 ( 278)| CLK_000_D_2_ Mux31| ... | ... Mux32| ... | ... --------------------------------------------------------------------------- @@ -1545,19 +1548,19 @@ Mux32| ... | ... _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| RW| IO| | S | 2 | 4 to [ 0]| 1 XOR free 1| CLK_DIV_OUT|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig - 2| RST_DLY_0_|NOD| | S | 4 | 4 to [ 2]| 1 XOR free + 2|inst_CLK_OUT_PRE_50|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig 3| | ? | | S | | 4 free | 1 XOR free 4| E|OUT| | S | 2 | 4 to [ 4]| 1 XOR free 5|inst_RESET_OUT|NOD| | S | 2 | 4 to [ 5]| 1 XOR free - 6| RST_DLY_2_|NOD| | S | 2 | 4 to [ 6]| 1 XOR free + 6| RST_DLY_0_|NOD| | S | 4 | 4 to [ 6]| 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free 8| A_0_| IO| | S | 3 | 4 to [ 8]| 1 XOR free 9| cpu_est_0_|NOD| | S | 3 | 4 to [ 9]| 1 XOR free -10| RST_DLY_1_|NOD| | S | 2 :+: 1| 4 to [10]| 1 XOR to [10] +10| RST_DLY_2_|NOD| | S | 2 | 4 to [10]| 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free 12| SIZE_0_| IO| | S | 3 | 4 to [12]| 1 XOR free -13|inst_CLK_OUT_PRE_50|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig -14| IPL_D0_0_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig +13| SM_AMIGA_5_|NOD| | S | 3 | 4 to [13]| 1 XOR free +14| RST_DLY_1_|NOD| | S | 2 :+: 1| 4 to [14]| 1 XOR to [14] 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== @@ -1570,22 +1573,22 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| RW| IO| | S | 2 |=> can support up to [ 9] logic PT(s) - 1| CLK_DIV_OUT|OUT| | S | 1 |=> can support up to [ 10] logic PT(s) - 2| RST_DLY_0_|NOD| | S | 4 |=> can support up to [ 14] logic PT(s) - 3| | ? | | S | |=> can support up to [ 5] logic PT(s) + 0| RW| IO| | S | 2 |=> can support up to [ 13] logic PT(s) + 1| CLK_DIV_OUT|OUT| | S | 1 |=> can support up to [ 14] logic PT(s) + 2|inst_CLK_OUT_PRE_50|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) + 3| | ? | | S | |=> can support up to [ 9] logic PT(s) 4| E|OUT| | S | 2 |=> can support up to [ 10] logic PT(s) 5|inst_RESET_OUT|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) - 6| RST_DLY_2_|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) + 6| RST_DLY_0_|NOD| | S | 4 |=> can support up to [ 10] logic PT(s) 7| | ? | | S | |=> can support up to [ 5] logic PT(s) 8| A_0_| IO| | S | 3 |=> can support up to [ 10] logic PT(s) 9| cpu_est_0_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s) -10| RST_DLY_1_|NOD| | S | 2 :+: 1|=> can support up to [ 9] logic PT(s) -11| | ? | | S | |=> can support up to [ 9] logic PT(s) -12| SIZE_0_| IO| | S | 3 |=> can support up to [ 18] logic PT(s) -13|inst_CLK_OUT_PRE_50|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) -14| IPL_D0_0_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) -15| | ? | | S | |=> can support up to [ 9] logic PT(s) +10| RST_DLY_2_|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) +11| | ? | | S | |=> can support up to [ 5] logic PT(s) +12| SIZE_0_| IO| | S | 3 |=> can support up to [ 10] logic PT(s) +13| SM_AMIGA_5_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s) +14| RST_DLY_1_|NOD| | S | 2 :+: 1|=> can support up to [ 9] logic PT(s) +15| | ? | | S | |=> can support up to [ 5] logic PT(s) --------------------------------------------------------------------------- =========================================================================== < Block [ 6] > Node-Pin Assignments @@ -1597,19 +1600,19 @@ _|_________________|__|__|___|_____|_______________________________________ _|_________________|__|_____|____________________|________________________ 0| RW| IO| | => | 5 ( 6) 7 0 | 70 ( 71) 72 65 1| CLK_DIV_OUT|OUT| | => | 5 6 7 ( 0)| 70 71 72 ( 65) - 2| RST_DLY_0_|NOD| | => | 6 7 0 1 | 71 72 65 66 + 2|inst_CLK_OUT_PRE_50|NOD| | => | 6 7 0 1 | 71 72 65 66 3| | | | => | 6 7 0 1 | 71 72 65 66 4| E|OUT| | => | 7 0 ( 1) 2 | 72 65 ( 66) 67 5|inst_RESET_OUT|NOD| | => | 7 0 1 2 | 72 65 66 67 - 6| RST_DLY_2_|NOD| | => | 0 1 2 3 | 65 66 67 68 + 6| RST_DLY_0_|NOD| | => | 0 1 2 3 | 65 66 67 68 7| | | | => | 0 1 2 3 | 65 66 67 68 8| A_0_| IO| | => | 1 2 3 ( 4)| 66 67 68 ( 69) 9| cpu_est_0_|NOD| | => | 1 2 3 4 | 66 67 68 69 -10| RST_DLY_1_|NOD| | => | 2 3 4 5 | 67 68 69 70 +10| RST_DLY_2_|NOD| | => | 2 3 4 5 | 67 68 69 70 11| | | | => | 2 3 4 5 | 67 68 69 70 12| SIZE_0_| IO| | => | 3 4 ( 5) 6 | 68 69 ( 70) 71 -13|inst_CLK_OUT_PRE_50|NOD| | => | 3 4 5 6 | 68 69 70 71 -14| IPL_D0_0_|NOD| | => | 4 5 6 7 | 69 70 71 72 +13| SM_AMIGA_5_|NOD| | => | 3 4 5 6 | 68 69 70 71 +14| RST_DLY_1_|NOD| | => | 4 5 6 7 | 69 70 71 72 15| | | | => | 4 5 6 7 | 69 70 71 72 --------------------------------------------------------------------------- =========================================================================== @@ -1667,7 +1670,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 1 [IOpin 1 | 66|OUT E|*| ] [RegIn 1 |249| -| | ] - [MCell 2 |248|NOD RST_DLY_0_| |*] + [MCell 2 |248|NOD inst_CLK_OUT_PRE_50| |*] [MCell 3 |250| -| | ] 2 [IOpin 2 | 67|INP IPL_0_|*|*] @@ -1677,7 +1680,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 3 [IOpin 3 | 68|INP IPL_2_|*|*] [RegIn 3 |255| -| | ] - [MCell 6 |254|NOD RST_DLY_2_| |*] + [MCell 6 |254|NOD RST_DLY_0_| |*] [MCell 7 |256| -| | ] 4 [IOpin 4 | 69| IO A_0_|*|*] paired w/[ RN_A_0_] @@ -1687,17 +1690,17 @@ IMX No. | +---- Block IO Pin or Macrocell Number 5 [IOpin 5 | 70| IO SIZE_0_|*|*] paired w/[ RN_SIZE_0_] [RegIn 5 |261| -| | ] - [MCell 10 |260|NOD RST_DLY_1_| |*] + [MCell 10 |260|NOD RST_DLY_2_| |*] [MCell 11 |262| -| | ] 6 [IOpin 6 | 71| IO RW|*|*] paired w/[ RN_RW] [RegIn 6 |264| -| | ] [MCell 12 |263|NOD RN_SIZE_0_| |*] paired w/[ SIZE_0_] - [MCell 13 |265|NOD inst_CLK_OUT_PRE_50| |*] + [MCell 13 |265|NOD SM_AMIGA_5_| |*] 7 [IOpin 7 | 72| -| | ] [RegIn 7 |267| -| | ] - [MCell 14 |266|NOD IPL_D0_0_| |*] + [MCell 14 |266|NOD RST_DLY_1_| |*] [MCell 15 |268| -| | ] --------------------------------------------------------------------------- =========================================================================== @@ -1706,32 +1709,32 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| IOPin 6 2 ( 67)| IPL_0_ -Mux01| ... | ... -Mux02| ... | ... -Mux03| Mcel 2 9 ( 163)| CLK_000_D_0_ -Mux04| Mcel 3 6 ( 182)| inst_CLK_OUT_PRE_D -Mux05| Mcel 6 6 ( 254)| RST_DLY_2_ +Mux00| IOPin 3 4 ( 31)| LDS_000 +Mux01| Mcel 3 13 ( 193)| CLK_000_D_0_ +Mux02| Mcel 3 10 ( 188)| CLK_OUT_INTreg +Mux03| Mcel 3 2 ( 176)| cpu_est_3_ +Mux04| Mcel 6 2 ( 248)| inst_CLK_OUT_PRE_50 +Mux05| Input Pin ( 14)| nEXP_SPACE Mux06| IOPin 7 5 ( 80)| RW_000 Mux07| Mcel 6 12 ( 263)| RN_SIZE_0_ Mux08| IOPin 3 3 ( 32)| UDS_000 -Mux09| Mcel 0 12 ( 119)| cpu_est_2_ -Mux10| Mcel 6 9 ( 259)| cpu_est_0_ +Mux09| Mcel 6 13 ( 265)| SM_AMIGA_5_ +Mux10| Mcel 6 14 ( 266)| RST_DLY_1_ Mux11| ... | ... -Mux12| Mcel 6 13 ( 265)| inst_CLK_OUT_PRE_50 +Mux12| Mcel 6 9 ( 259)| cpu_est_0_ Mux13| Mcel 6 8 ( 257)| RN_A_0_ Mux14| ... | ... -Mux15| Input Pin ( 14)| nEXP_SPACE -Mux16| Mcel 4 8 ( 209)| inst_BGACK_030_INT_D +Mux15| ... | ... +Mux16| Mcel 3 6 ( 182)| cpu_est_1_ Mux17| Mcel 6 0 ( 245)| RN_RW -Mux18| Mcel 0 8 ( 113)| cpu_est_1_ -Mux19| ... | ... +Mux18| ... | ... +Mux19| Mcel 7 13 ( 289)| inst_BGACK_030_INT_D Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 Mux21| Input Pin ( 86)| RST -Mux22| Mcel 6 10 ( 260)| RST_DLY_1_ -Mux23| Mcel 6 2 ( 248)| RST_DLY_0_ -Mux24| IOPin 3 4 ( 31)| LDS_000 -Mux25| Mcel 3 9 ( 187)| cpu_est_3_ +Mux22| Mcel 6 10 ( 260)| RST_DLY_2_ +Mux23| Mcel 6 6 ( 254)| RST_DLY_0_ +Mux24| Mcel 3 14 ( 194)| cpu_est_2_ +Mux25| Mcel 5 0 ( 221)| SM_AMIGA_6_ Mux26| ... | ... Mux27| Mcel 7 5 ( 277)| CLK_000_D_1_ Mux28| ... | ... @@ -1752,7 +1755,7 @@ Mux32| Mcel 6 5 ( 253)| inst_RESET_OUT _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| RW_000| IO| | S | 4 | 4 to [ 0]| 1 XOR free 1| FPU_CS|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig - 2|inst_DSACK1_INT|NOD| | S | 2 | 4 to [ 2]| 1 XOR free + 2|inst_AS_030_D0|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig 3| | ? | | S | | 4 free | 1 XOR free 4| BGACK_030| IO| | S | 3 | 4 to [ 4]| 1 XOR free 5| CLK_000_D_1_|NOD| | S | 1 | 4 free | 1 XOR to [ 5] for 1 PT sig @@ -1763,7 +1766,7 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ 10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free 12| SIZE_1_| IO| | S | 3 | 4 to [12]| 1 XOR free -13| SM_AMIGA_0_|NOD| | S | 3 | 4 to [13]| 1 XOR free +13|inst_BGACK_030_INT_D|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig 14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- @@ -1777,10 +1780,10 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| RW_000| IO| | S | 4 |=> can support up to [ 9] logic PT(s) - 1| FPU_CS|OUT| | S | 1 |=> can support up to [ 10] logic PT(s) - 2|inst_DSACK1_INT|NOD| | S | 2 |=> can support up to [ 14] logic PT(s) - 3| | ? | | S | |=> can support up to [ 9] logic PT(s) + 0| RW_000| IO| | S | 4 |=> can support up to [ 13] logic PT(s) + 1| FPU_CS|OUT| | S | 1 |=> can support up to [ 14] logic PT(s) + 2|inst_AS_030_D0|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) + 3| | ? | | S | |=> can support up to [ 13] logic PT(s) 4| BGACK_030| IO| | S | 3 |=> can support up to [ 18] logic PT(s) 5| CLK_000_D_1_|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) 6| CLK_000_D_2_|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) @@ -1788,10 +1791,10 @@ _|_________________|__|__|___|_____|_______________________________________ 8| AS_030| IO| | S | 1 |=> can support up to [ 19] logic PT(s) 9| DSACK1|OUT| | S | 1 |=> can support up to [ 19] logic PT(s) 10| | ? | | S | |=> can support up to [ 14] logic PT(s) -11| | ? | | S | |=> can support up to [ 10] logic PT(s) -12| SIZE_1_| IO| | S | 3 |=> can support up to [ 15] logic PT(s) -13| SM_AMIGA_0_|NOD| | S | 3 |=> can support up to [ 15] logic PT(s) -14| | ? | | S | |=> can support up to [ 10] logic PT(s) +11| | ? | | S | |=> can support up to [ 14] logic PT(s) +12| SIZE_1_| IO| | S | 3 |=> can support up to [ 19] logic PT(s) +13|inst_BGACK_030_INT_D|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) +14| | ? | | S | |=> can support up to [ 14] logic PT(s) 15| | ? | | S | |=> can support up to [ 10] logic PT(s) --------------------------------------------------------------------------- =========================================================================== @@ -1804,7 +1807,7 @@ _|_________________|__|__|___|_____|_______________________________________ _|_________________|__|_____|____________________|________________________ 0| RW_000| IO| | => |( 5) 6 7 0 |( 80) 79 78 85 1| FPU_CS|OUT| | => | 5 6 ( 7) 0 | 80 79 ( 78) 85 - 2|inst_DSACK1_INT|NOD| | => | 6 7 0 1 | 79 78 85 84 + 2|inst_AS_030_D0|NOD| | => | 6 7 0 1 | 79 78 85 84 3| | | | => | 6 7 0 1 | 79 78 85 84 4| BGACK_030| IO| | => | 7 0 1 ( 2)| 78 85 84 ( 83) 5| CLK_000_D_1_|NOD| | => | 7 0 1 2 | 78 85 84 83 @@ -1815,7 +1818,7 @@ _|_________________|__|_____|____________________|________________________ 10| | | | => | 2 3 4 5 | 83 82 81 80 11| | | | => | 2 3 4 5 | 83 82 81 80 12| SIZE_1_| IO| | => | 3 4 5 ( 6)| 82 81 80 ( 79) -13| SM_AMIGA_0_|NOD| | => | 3 4 5 6 | 82 81 80 79 +13|inst_BGACK_030_INT_D|NOD| | => | 3 4 5 6 | 82 81 80 79 14| | | | => | 4 5 6 7 | 81 80 79 78 15| | | | => | 4 5 6 7 | 81 80 79 78 --------------------------------------------------------------------------- @@ -1874,7 +1877,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 1 [IOpin 1 | 84|INP A_DECODE_22_|*|*] [RegIn 1 |273| -| | ] - [MCell 2 |272|NOD inst_DSACK1_INT| |*] + [MCell 2 |272|NOD inst_AS_030_D0| |*] [MCell 3 |274| -| | ] 2 [IOpin 2 | 83| IO BGACK_030|*| ] paired w/[ RN_BGACK_030] @@ -1900,7 +1903,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 6 [IOpin 6 | 79| IO SIZE_1_|*|*] paired w/[ RN_SIZE_1_] [RegIn 6 |288| -| | ] [MCell 12 |287|NOD RN_SIZE_1_| |*] paired w/[ SIZE_1_] - [MCell 13 |289|NOD SM_AMIGA_0_| |*] + [MCell 13 |289|NOD inst_BGACK_030_INT_D| |*] 7 [IOpin 7 | 78|OUT FPU_CS|*| ] [RegIn 7 |291| -| | ] @@ -1915,35 +1918,35 @@ IMX No. | +---- Block IO Pin or Macrocell Number --|--|--------------------|--------------------------------------------------- Mux00| Input Pin ( 86)| RST Mux01| IOPin 5 2 ( 58)| FC_1_ -Mux02| Mcel 2 2 ( 152)| SM_AMIGA_i_7_ -Mux03| Mcel 2 9 ( 163)| CLK_000_D_0_ +Mux02| Mcel 0 5 ( 109)| inst_DSACK1_INT +Mux03| Mcel 0 8 ( 113)| inst_AS_000_DMA Mux04| IOPin 0 4 ( 95)| A_DECODE_18_ Mux05| Input Pin ( 14)| nEXP_SPACE Mux06| IOPin 0 5 ( 96)| A_DECODE_16_ -Mux07| Mcel 7 13 ( 289)| SM_AMIGA_0_ +Mux07| Mcel 7 13 ( 289)| inst_BGACK_030_INT_D Mux08| IOPin 3 3 ( 32)| UDS_000 -Mux09| Mcel 0 1 ( 103)| inst_AS_000_DMA -Mux10| Mcel 5 4 ( 227)| SM_AMIGA_1_ -Mux11| IOPin 0 0 ( 91)| FPU_SENSE +Mux09| IOPin 7 3 ( 82)| AS_030 +Mux10| Mcel 5 4 ( 227)| SM_AMIGA_i_7_ +Mux11| IOPin 6 6 ( 71)| RW Mux12| IOPin 0 6 ( 97)| A_DECODE_19_ Mux13| IOPin 5 1 ( 59)| A_DECODE_17_ -Mux14| Mcel 7 2 ( 272)| inst_DSACK1_INT -Mux15| Mcel 7 12 ( 287)| RN_SIZE_1_ -Mux16| Mcel 4 8 ( 209)| inst_BGACK_030_INT_D +Mux14| ... | ... +Mux15| Mcel 0 12 ( 119)| SM_AMIGA_0_ +Mux16| IOPin 4 1 ( 42)| AS_000 Mux17| IOPin 5 3 ( 57)| FC_0_ Mux18| IOPin 3 7 ( 28)| BGACK_000 -Mux19| IOPin 7 3 ( 82)| AS_030 +Mux19| IOPin 0 0 ( 91)| FPU_SENSE Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux21| ... | ... +Mux21| Mcel 3 13 ( 193)| CLK_000_D_0_ Mux22| Mcel 6 5 ( 253)| inst_RESET_OUT Mux23| Mcel 7 0 ( 269)| RN_RW_000 Mux24| IOPin 3 4 ( 31)| LDS_000 -Mux25| IOPin 6 6 ( 71)| RW -Mux26| IOPin 4 1 ( 42)| AS_000 +Mux25| Mcel 5 0 ( 221)| SM_AMIGA_6_ +Mux26| ... | ... Mux27| Mcel 7 5 ( 277)| CLK_000_D_1_ Mux28| ... | ... -Mux29| ... | ... -Mux30| Mcel 2 13 ( 169)| SM_AMIGA_6_ +Mux29| Mcel 7 12 ( 287)| RN_SIZE_1_ +Mux30| ... | ... Mux31| ... | ... Mux32| ... | ... --------------------------------------------------------------------------- \ No newline at end of file diff --git a/Logic/68030_tk.rpt b/Logic/68030_tk.rpt index 5ab5d51..a40a29e 100644 --- a/Logic/68030_tk.rpt +++ b/Logic/68030_tk.rpt @@ -12,7 +12,7 @@ Project_Summary Project Name : 68030_tk Project Path : C:\Users\Matze\Amiga\Hardwarehacks\68030-TK\GitHub\Logic -Project Fitted on : Wed Oct 26 22:26:30 2016 +Project Fitted on : Fri Nov 18 19:32:41 2016 Device : M4A5-128/64 Package : 100TQFP @@ -38,10 +38,10 @@ Fitter 00:00:00 Design_Summary ~~~~~~~~~~~~~~ Total Input Pins : 24 - Total Output Pins : 19 - Total Bidir I/O Pins : 18 - Total Flip-Flops : 56 - Total Product Terms : 199 + Total Output Pins : 18 + Total Bidir I/O Pins : 19 + Total Flip-Flops : 57 + Total Product Terms : 210 Total Reserved Pins : 0 Total Reserved Blocks : 0 @@ -54,13 +54,13 @@ Dedicated Pins Input-Only Pins 2 2 0 --> 100% Clock/Input Pins 4 4 0 --> 100% I/O Pins 64 55 9 --> 85% -Logic Macrocells 128 81 47 --> 63% +Logic Macrocells 128 84 44 --> 65% Input Registers 64 0 64 --> 0% Unusable Macrocells .. 0 .. -CSM Outputs/Total Block Inputs 264 206 58 --> 78% -Logical Product Terms 640 202 438 --> 31% -Product Term Clusters 128 51 77 --> 39% +CSM Outputs/Total Block Inputs 264 205 59 --> 77% +Logical Product Terms 640 213 427 --> 33% +Product Term Clusters 128 54 74 --> 42%  Blocks_Resource_Summary @@ -71,14 +71,14 @@ Blocks_Resource_Summary --------------------------------------------------------------------------------- Maximum 33 8 8 -- -- 16 80 16 - --------------------------------------------------------------------------------- -Block A 27 8 0 11 0 5 45 5 Lo -Block B 23 8 0 12 0 4 38 9 Lo -Block C 20 7 0 12 0 4 21 11 Lo -Block D 29 8 0 12 0 4 25 10 Lo -Block E 30 4 0 7 0 9 9 14 Lo -Block F 26 5 0 5 0 11 17 10 Lo -Block G 23 7 0 12 0 4 27 7 Lo -Block H 28 8 0 10 0 6 20 11 Lo +Block A 24 8 0 11 0 5 46 3 Lo +Block B 26 8 0 12 0 4 45 6 Lo +Block C 26 7 0 12 0 4 24 11 Lo +Block D 24 8 0 12 0 4 23 10 Lo +Block E 30 4 0 6 0 10 8 14 Lo +Block F 24 5 0 9 0 7 21 9 Lo +Block G 24 7 0 12 0 4 29 6 Lo +Block H 27 8 0 10 0 6 17 13 Lo --------------------------------------------------------------------------------- Four rightmost columns above reflect last status of the placement process. @@ -287,30 +287,30 @@ Input_Signal_List Pin r e O Input Pin Blk PTs Type e s E Fanout Pwr Slew Signal ---------------------------------------------------------------------- - 60 F . I/O --C--F-- Low Slow A_1_ - 96 A . I/O ----EF-H Low Slow A_DECODE_16_ - 59 F . I/O ----EF-H Low Slow A_DECODE_17_ - 95 A . I/O ----EF-H Low Slow A_DECODE_18_ - 97 A . I/O ----EF-H Low Slow A_DECODE_19_ + 60 F . I/O -----F-- Low Slow A_1_ + 96 A . I/O -B--E--H Low Slow A_DECODE_16_ + 59 F . I/O -B--E--H Low Slow A_DECODE_17_ + 95 A . I/O -B--E--H Low Slow A_DECODE_18_ + 97 A . I/O -B--E--H Low Slow A_DECODE_19_ 93 A . I/O ----E--- Low Slow A_DECODE_20_ 94 A . I/O ----E--- Low Slow A_DECODE_21_ 84 H . I/O ----E--- Low Slow A_DECODE_22_ 85 H . I/O ----E--- Low Slow A_DECODE_23_ 28 D . I/O ----E--H Low Slow BGACK_000 21 C . I/O ---D---- Low Slow BG_030 - 30 D . I/O -B------ Low Slow DTACK - 57 F . I/O ----EF-H Low Slow FC_0_ - 58 F . I/O ----EF-H Low Slow FC_1_ + 57 F . I/O -B--E--H Low Slow FC_0_ + 58 F . I/O -B--E--H Low Slow FC_1_ 91 A . I/O ----E--H Low Slow FPU_SENSE - 67 G . I/O -B----G- Low Slow IPL_0_ - 56 F . I/O -B-D---- Low Slow IPL_1_ + 67 G . I/O -B------ Low Slow IPL_0_ + 56 F . I/O -B------ Low Slow IPL_1_ 68 G . I/O -B------ Low Slow IPL_2_ - 11 . . Ck/I --C----- - Slow CLK_000 + 3 B . I/O -BC----- Low Fast RESET + 11 . . Ck/I ---D---- - Slow CLK_000 14 . . Ck/I ABCDEFGH - Slow nEXP_SPACE - 36 . . Ded A------- - Slow VPA + 36 . . Ded -----F-- - Slow VPA 61 . . Ck/I ABCDEFGH - Slow CLK_OSZI 64 . . Ck/I A------- - Slow CLK_030 - 86 . . Ded ABCDEFGH - Slow RST + 86 . . Ded ABCD-FGH - Slow RST ---------------------------------------------------------------------- Power : Hi = High @@ -334,16 +334,15 @@ Pin Blk PTs Type e s E Fanout Pwr Slew Signal 83 H 3 DFF -------- Low Fast BGACK_030 29 D 2 DFF -------- Low Fast BG_000 47 E 1 COM -------- Low Fast CIIN - 65 G 1 DFF -------- Low Fast CLK_DIV_OUT - 10 B 1 DFF -------- Low Fast CLK_EXP + 65 G 1 COM -------- Low Fast CLK_DIV_OUT + 10 B 1 COM -------- Low Fast CLK_EXP 81 H 1 COM -------- Low Fast DSACK1 98 A 1 COM -------- Low Fast DS_030 66 G 2 COM -------- Low Fast E 78 H 1 COM -------- Low Fast FPU_CS - 8 B 9 TFF -------- Low Fast IPL_030_0_ - 7 B 9 TFF -------- Low Fast IPL_030_1_ - 9 B 9 TFF -------- Low Fast IPL_030_2_ - 3 B 1 COM -------- Low Fast RESET + 8 B 10 DFF -------- Low Fast IPL_030_0_ + 7 B 10 DFF -------- Low Fast IPL_030_1_ + 9 B 10 DFF -------- Low Fast IPL_030_2_ 35 D 3 TFF -------- Low Fast VMA ---------------------------------------------------------------------- @@ -369,15 +368,16 @@ Pin Blk PTs Type e s E Fanout Pwr Slew Signal 5 B 1 COM ----E--- Low Fast AHIGH_30_ 4 B 1 COM ----E--- Low Fast AHIGH_31_ 42 E 1 COM A---E--H Low Fast AS_000 - 82 H 1 COM -BCDEF-H Low Fast AS_030 + 82 H 1 COM ABCDE--H Low Fast AS_030 69 G 3 DFF -----F-- Low Fast A_0_ - 41 E 1 COM A--D---- Low Fast BERR - 31 D 1 COM A-----GH Low Fast LDS_000 - 71 G 2 DFF -B-----H Low Fast RW + 41 E 1 COM --C----- Low Fast BERR + 30 D 1 COM -B------ Low Slow DTACK + 31 D 1 COM --C---GH Low Fast LDS_000 + 71 G 2 DFF --C----H Low Fast RW 80 H 4 DFF A---E-G- Low Fast RW_000 70 G 3 DFF -----F-- Low Fast SIZE_0_ 79 H 3 DFF -----F-- Low Fast SIZE_1_ - 32 D 1 COM A-----GH Low Fast UDS_000 + 32 D 1 COM --C---GH Low Fast UDS_000 ---------------------------------------------------------------------- Power : Hi = High @@ -393,61 +393,64 @@ Buried_Signal_List Pin r e O Node #Mc Blk PTs Type e s E Fanout Pwr Slew Signal ---------------------------------------------------------------------- - E9 E 2 COM ----E--- Low Slow CIIN_0 - C9 C 1 DFF ABCD-FGH Low Slow CLK_000_D_0_ - H5 H 1 DFF ABCD-FGH Low Slow CLK_000_D_1_ - H6 H 1 DFF ---D---- Low Slow CLK_000_D_2_ - D10 D 1 DFF -BC----- Low Slow CLK_000_D_3_ - B10 B 1 DFF --C----- Low Slow CLK_000_D_4_ - A10 A 3 DFF A------- Low Slow CYCLE_DMA_0_ - A6 A 4 DFF A------- Low Slow CYCLE_DMA_1_ - G14 G 1 DFF -B------ Low Slow IPL_D0_0_ - D14 D 1 DFF -B------ Low Slow IPL_D0_1_ - B14 B 1 DFF -B------ Low Slow IPL_D0_2_ + E5 E 2 COM ----E--- Low Slow CIIN_0 + D13 D 1 DFF A-CD-FGH Low Slow CLK_000_D_0_ + H5 H 1 DFF A-CD-FGH Low Slow CLK_000_D_1_ + H6 H 1 DFF -----F-- Low Slow CLK_000_D_2_ + F13 F 1 DFF --C--F-- Low Slow CLK_000_D_3_ + C14 C 1 DFF -----F-- Low Slow CLK_000_D_4_ + A9 A 9 DFF A------- Low Slow CLK_030_PE_0_ + A2 A 6 DFF A------- Low Slow CLK_030_PE_1_ + D10 D 1 DFF AB----G- Low Slow CLK_OUT_INTreg + A6 A 4 DFF A------- Low Slow CYCLE_DMA_0_ + A10 A 2 DFF A------- Low Slow CYCLE_DMA_1_ + B10 B 1 DFF -B------ Low Slow IPL_D0_0_ + B6 B 1 DFF -B------ Low Slow IPL_D0_1_ + B2 B 1 DFF -B------ Low Slow IPL_D0_2_ G8 G 3 DFF ------G- Low - RN_A_0_ --> A_0_ H4 H 3 DFF ABCDEFGH Low - RN_BGACK_030 --> BGACK_030 D1 D 2 DFF ---D---- Low - RN_BG_000 --> BG_000 - B5 B 9 TFF -B------ Low - RN_IPL_030_0_ --> IPL_030_0_ - B9 B 9 TFF -B------ Low - RN_IPL_030_1_ --> IPL_030_1_ - B4 B 9 TFF -B------ Low - RN_IPL_030_2_ --> IPL_030_2_ + B5 B 10 DFF -B------ Low - RN_IPL_030_0_ --> IPL_030_0_ + B9 B 10 DFF -B------ Low - RN_IPL_030_1_ --> IPL_030_1_ + B4 B 10 DFF -B------ Low - RN_IPL_030_2_ --> IPL_030_2_ G0 G 2 DFF ------G- Low - RN_RW --> RW H0 H 4 DFF -------H Low - RN_RW_000 --> RW_000 G12 G 3 DFF ------G- Low - RN_SIZE_0_ --> SIZE_0_ H12 H 3 DFF -------H Low - RN_SIZE_1_ --> SIZE_1_ - D0 D 3 TFF A--D---- Low - RN_VMA --> VMA - G2 G 4 DFF ------G- Low Slow RST_DLY_0_ - G10 G 2 DFF ------G- Low Slow RST_DLY_1_ - G6 G 2 DFF ------G- Low Slow RST_DLY_2_ - H13 H 3 DFF --C----H Low Slow SM_AMIGA_0_ - F4 F 3 DFF -----F-H Low Slow SM_AMIGA_1_ - A5 A 5 DFF A----F-- Low Slow SM_AMIGA_2_ - D13 D 5 TFF A--D---- Low Slow SM_AMIGA_3_ - D2 D 3 DFF -B-D---- Low Slow SM_AMIGA_4_ - C6 C 3 DFF --CD---- Low Slow SM_AMIGA_5_ - C13 C 3 DFF -BC--F-H Low Slow SM_AMIGA_6_ - C2 C 3 TFF --C--F-H Low Slow SM_AMIGA_i_7_ - G9 G 3 DFF A--D--G- Low Slow cpu_est_0_ - A8 A 4 DFF A--D--G- Low Slow cpu_est_1_ - A12 A 1 DFF A--D--G- Low Slow cpu_est_2_ - D9 D 4 DFF A--D--G- Low Slow cpu_est_3_ - C14 C 2 DFF --CD---- Low Slow inst_AMIGA_BUS_ENABLE_DMA_HIGH - F1 F 2 DFF --C--F-- Low Slow inst_AMIGA_BUS_ENABLE_DMA_LOW - A1 A 7 DFF A------H Low Slow inst_AS_000_DMA - C10 C 2 DFF --C-E--- Low Slow inst_AS_000_INT - F0 F 7 DFF --CD-F-- Low Slow inst_AS_030_000_SYNC - E5 E 1 DFF ---DEF-- Low Slow inst_AS_030_D0 - E8 E 1 DFF --C--FGH Low Slow inst_BGACK_030_INT_D - A2 A 8 DFF A------- Low Slow inst_CLK_030_H - G13 G 1 DFF ---D--G- Low Slow inst_CLK_OUT_PRE_50 - D6 D 1 DFF -B----G- Low Slow inst_CLK_OUT_PRE_D - H2 H 2 DFF -------H Low Slow inst_DSACK1_INT + D4 D 3 TFF --CD---- Low - RN_VMA --> VMA + G6 G 4 DFF ------G- Low Slow RST_DLY_0_ + G14 G 2 DFF ------G- Low Slow RST_DLY_1_ + G10 G 2 DFF ------G- Low Slow RST_DLY_2_ + A12 A 3 DFF A----F-H Low Slow SM_AMIGA_0_ + F8 F 3 DFF A----F-- Low Slow SM_AMIGA_1_ + C9 C 5 DFF --C--F-- Low Slow SM_AMIGA_2_ + C6 C 5 TFF --C----- Low Slow SM_AMIGA_3_ + A1 A 3 DFF A-C----- Low Slow SM_AMIGA_4_ + G13 G 3 DFF A-----G- Low Slow SM_AMIGA_5_ + F0 F 3 DFF --C--FGH Low Slow SM_AMIGA_6_ + F4 F 3 TFF -B---F-H Low Slow SM_AMIGA_i_7_ + G9 G 3 DFF --CD--G- Low Slow cpu_est_0_ + D6 D 4 DFF --CD--G- Low Slow cpu_est_1_ + D14 D 1 DFF --CD--G- Low Slow cpu_est_2_ + D2 D 4 DFF --CD--G- Low Slow cpu_est_3_ + F9 F 2 DFF ---D-F-- Low Slow inst_AMIGA_BUS_ENABLE_DMA_HIGH + F5 F 2 DFF --C--F-- Low Slow inst_AMIGA_BUS_ENABLE_DMA_LOW + C10 C 2 DFF A------- Low Slow inst_AMIGA_DS + A8 A 6 DFF A--D---H Low Slow inst_AS_000_DMA + C2 C 2 DFF --C-E--- Low Slow inst_AS_000_INT + B13 B 7 DFF -B-D-F-- Low Slow inst_AS_030_000_SYNC + H2 H 1 DFF -B-DE--- Low Slow inst_AS_030_D0 + H13 H 1 DFF -B---FGH Low Slow inst_BGACK_030_INT_D + G2 G 1 DFF ----E-G- Low Slow inst_CLK_OUT_PRE_50 + E8 E 1 DFF A--D---- Low Slow inst_CLK_OUT_PRE_D + A5 A 2 DFF A------H Low Slow inst_DSACK1_INT A13 A 9 DFF A------- Low Slow inst_DS_000_DMA - B13 B 3 DFF -B-D---- Low Slow inst_DS_000_ENABLE - B6 B 1 DFF A--D---- Low Slow inst_DTACK_D0 - F8 F 3 DFF ---D-F-- Low Slow inst_LDS_000_INT - G5 G 2 DFF ABCDE-GH Low Slow inst_RESET_OUT - F12 F 2 DFF ---D-F-- Low Slow inst_UDS_000_INT - A9 A 1 DFF A--D---- Low Slow inst_VPA_D + C13 C 3 DFF --CD---- Low Slow inst_DS_000_ENABLE + B14 B 1 DFF --C----- Low Slow inst_DTACK_D0 + F12 F 3 DFF ---D-F-- Low Slow inst_LDS_000_INT + G5 G 2 DFF A--DE-GH Low Slow inst_RESET_OUT + F1 F 2 DFF ---D-F-- Low Slow inst_UDS_000_INT + F2 F 1 DFF --CD---- Low Slow inst_VPA_D ---------------------------------------------------------------------- Power : Hi = High @@ -463,182 +466,186 @@ Signals_Fanout_List Signal Source : Fanout List ----------------------------------------------------------------------------- AHIGH_31_{ C}: CIIN{ E} CIIN_0{ E} + IPL_1_{ G}: IPL_030_1_{ B} IPL_030_0_{ B} IPL_030_2_{ B} + : IPL_D0_1_{ B} + IPL_0_{ H}: IPL_030_1_{ B} IPL_030_0_{ B} IPL_030_2_{ B} + : IPL_D0_0_{ B} A_DECODE_23_{ I}: CIIN{ E} CIIN_0{ E} - IPL_2_{ H}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} + FC_0_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ B} + A_1_{ G}:inst_AMIGA_BUS_ENABLE_DMA_HIGH{ F}inst_AMIGA_BUS_ENABLE_DMA_LOW{ F} + IPL_2_{ H}: IPL_030_1_{ B} IPL_030_0_{ B} IPL_030_2_{ B} : IPL_D0_2_{ B} - FC_1_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} + FC_1_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ B} AS_030{ I}: AS_000{ E} BERR{ E} FPU_CS{ H} - : DSACK1{ H}AMIGA_BUS_ENABLE_HIGH{ D} inst_AS_030_D0{ E} - :inst_AS_030_000_SYNC{ F}inst_DS_000_ENABLE{ B}inst_DSACK1_INT{ H} + : DSACK1{ H}AMIGA_BUS_ENABLE_HIGH{ D} inst_AS_030_D0{ H} + :inst_AS_030_000_SYNC{ B}inst_DS_000_ENABLE{ C}inst_DSACK1_INT{ A} :inst_AS_000_INT{ C} AS_000{ F}: AS_030{ H} DS_030{ A}AMIGA_BUS_DATA_DIR{ E} : BGACK_030{ H}inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} - : CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} inst_CLK_030_H{ A} - UDS_000{ E}: SIZE_1_{ H} SIZE_0_{ G} A_0_{ G} - :inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} inst_CLK_030_H{ A} - LDS_000{ E}: SIZE_1_{ H} SIZE_0_{ G}inst_AS_000_DMA{ A} - :inst_DS_000_DMA{ A} inst_CLK_030_H{ A} + : CLK_030_PE_1_{ A} CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} + : CLK_030_PE_0_{ A} + UDS_000{ E}: A_0_{ G} SIZE_1_{ H} SIZE_0_{ G} + : inst_AMIGA_DS{ C} + LDS_000{ E}: SIZE_1_{ H} SIZE_0_{ G} inst_AMIGA_DS{ C} nEXP_SPACE{. }: AHIGH_31_{ B} AS_030{ H} DS_030{ A} - : AHIGH_30_{ B} AHIGH_29_{ B} AHIGH_28_{ C} - : AHIGH_27_{ C} AHIGH_26_{ C} AHIGH_25_{ C} - : AHIGH_24_{ C} DSACK1{ H}AMIGA_BUS_DATA_DIR{ E} - : SIZE_1_{ H} BG_000{ D} SIZE_0_{ G} - : A_0_{ G}inst_AS_030_000_SYNC{ F} SM_AMIGA_6_{ C} - : SM_AMIGA_i_7_{ C} CIIN_0{ E} - BERR{ F}: SM_AMIGA_3_{ D} SM_AMIGA_2_{ A} + : DSACK1{ H} AHIGH_30_{ B} AHIGH_29_{ B} + : AHIGH_28_{ C} AHIGH_27_{ C} AHIGH_26_{ C} + : AHIGH_25_{ C} AHIGH_24_{ C}AMIGA_BUS_DATA_DIR{ E} + : A_0_{ G} SIZE_1_{ H} BG_000{ D} + : SIZE_0_{ G}inst_AS_030_000_SYNC{ B} SM_AMIGA_6_{ F} + : SM_AMIGA_i_7_{ F} CIIN_0{ E} + BERR{ F}: SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} BG_030{ D}: BG_000{ D} - AHIGH_30_{ C}: CIIN{ E} CIIN_0{ E} BGACK_000{ E}: BERR{ E} FPU_CS{ H} BGACK_030{ H} + CLK_030{. }:inst_DS_000_DMA{ A} + CLK_000{. }: CLK_000_D_0_{ D} + FPU_SENSE{ B}: BERR{ E} FPU_CS{ H} + DTACK{ E}: inst_DTACK_D0{ B} + AHIGH_30_{ C}: CIIN{ E} CIIN_0{ E} + VPA{. }: inst_VPA_D{ F} AHIGH_29_{ C}: CIIN{ E} CIIN_0{ E} - CLK_030{. }:inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} inst_CLK_030_H{ A} AHIGH_28_{ D}: CIIN{ E} CIIN_0{ E} - CLK_000{. }: CLK_000_D_0_{ C} + RST{. }: A_0_{ G} SIZE_1_{ H} IPL_030_1_{ B} + : IPL_030_0_{ B} IPL_030_2_{ B} RW_000{ H} + : BG_000{ D} BGACK_030{ H} SIZE_0_{ G} + : VMA{ D} RW{ G}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ F} + :inst_AMIGA_BUS_ENABLE_DMA_LOW{ F} inst_AS_030_D0{ H}inst_AS_030_000_SYNC{ B} + :inst_BGACK_030_INT_D{ H}inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} + : inst_VPA_D{ F} inst_DTACK_D0{ B} inst_RESET_OUT{ G} + : CLK_030_PE_1_{ A} inst_AMIGA_DS{ C} IPL_D0_0_{ B} + : IPL_D0_1_{ B} IPL_D0_2_{ B}inst_LDS_000_INT{ F} + :inst_DS_000_ENABLE{ C}inst_UDS_000_INT{ F} SM_AMIGA_6_{ F} + : SM_AMIGA_4_{ A} SM_AMIGA_1_{ F} SM_AMIGA_0_{ A} + : CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} CLK_030_PE_0_{ A} + : RST_DLY_0_{ G} RST_DLY_1_{ G} RST_DLY_2_{ G} + :inst_DSACK1_INT{ A}inst_AS_000_INT{ C} SM_AMIGA_5_{ G} + : SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} SM_AMIGA_i_7_{ F} AHIGH_27_{ D}: CIIN{ E} CIIN_0{ E} + RESET{ C}: AHIGH_31_{ B} AHIGH_30_{ B} AHIGH_29_{ B} + : AHIGH_28_{ C} AHIGH_27_{ C} AHIGH_26_{ C} + : AHIGH_25_{ C} AHIGH_24_{ C} AHIGH_26_{ D}: CIIN{ E} CIIN_0{ E} AHIGH_25_{ D}: CIIN{ E} CIIN_0{ E} AHIGH_24_{ D}: CIIN{ E} CIIN_0{ E} A_DECODE_22_{ I}: CIIN{ E} CIIN_0{ E} - FPU_SENSE{ B}: BERR{ E} FPU_CS{ H} A_DECODE_21_{ B}: CIIN{ E} CIIN_0{ E} A_DECODE_20_{ B}: CIIN{ E} CIIN_0{ E} - DTACK{ E}: inst_DTACK_D0{ B} -A_DECODE_19_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} -A_DECODE_18_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} -A_DECODE_17_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} - VPA{. }: inst_VPA_D{ A} -A_DECODE_16_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} - RST{. }: SIZE_1_{ H} IPL_030_2_{ B} RW_000{ H} - : BG_000{ D} SIZE_0_{ G} BGACK_030{ H} - : VMA{ D} RW{ G} A_0_{ G} - : IPL_030_1_{ B} IPL_030_0_{ B}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ C} - :inst_AMIGA_BUS_ENABLE_DMA_LOW{ F} inst_AS_030_D0{ E}inst_AS_030_000_SYNC{ F} - :inst_BGACK_030_INT_D{ E}inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} - : CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} inst_VPA_D{ A} - : inst_DTACK_D0{ B} inst_RESET_OUT{ G} IPL_D0_0_{ G} - : IPL_D0_1_{ D} IPL_D0_2_{ B}inst_LDS_000_INT{ F} - :inst_DS_000_ENABLE{ B}inst_UDS_000_INT{ F} SM_AMIGA_6_{ C} - : SM_AMIGA_4_{ D} SM_AMIGA_1_{ F} SM_AMIGA_0_{ H} - : RST_DLY_0_{ G} RST_DLY_1_{ G} RST_DLY_2_{ G} - : inst_CLK_030_H{ A}inst_DSACK1_INT{ H}inst_AS_000_INT{ C} - : SM_AMIGA_5_{ C} SM_AMIGA_3_{ D} SM_AMIGA_2_{ A} - : SM_AMIGA_i_7_{ C} - IPL_1_{ G}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} - : IPL_D0_1_{ D} - IPL_0_{ H}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} - : IPL_D0_0_{ G} - FC_0_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ F} - A_1_{ G}:inst_AMIGA_BUS_ENABLE_DMA_HIGH{ C}inst_AMIGA_BUS_ENABLE_DMA_LOW{ F} +A_DECODE_19_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ B} +A_DECODE_18_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ B} +A_DECODE_17_{ G}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ B} +A_DECODE_16_{ B}: BERR{ E} FPU_CS{ H}inst_AS_030_000_SYNC{ B} + A_0_{ H}:inst_LDS_000_INT{ F}inst_UDS_000_INT{ F} + RN_A_0_{ H}: A_0_{ G} SIZE_1_{ I}:inst_LDS_000_INT{ F} RN_SIZE_1_{ I}: SIZE_1_{ H} +RN_IPL_030_1_{ C}: IPL_030_1_{ B} +RN_IPL_030_0_{ C}: IPL_030_0_{ B} RN_IPL_030_2_{ C}: IPL_030_2_{ B} - RW_000{ I}:AMIGA_BUS_DATA_DIR{ E} RW{ G}inst_DS_000_DMA{ A} + RW_000{ I}:AMIGA_BUS_DATA_DIR{ E} RW{ G}inst_AS_000_DMA{ A} + :inst_DS_000_DMA{ A} CLK_030_PE_1_{ A} CLK_030_PE_0_{ A} RN_RW_000{ I}: RW_000{ H} RN_BG_000{ E}: BG_000{ D} - SIZE_0_{ H}:inst_LDS_000_INT{ F} - RN_SIZE_0_{ H}: SIZE_0_{ G} RN_BGACK_030{ I}: AHIGH_31_{ B} AS_030{ H} AS_000{ E} : DS_030{ A} UDS_000{ D} LDS_000{ D} : AHIGH_30_{ B} AHIGH_29_{ B} AHIGH_28_{ C} : AHIGH_27_{ C} AHIGH_26_{ C} AHIGH_25_{ C} : AHIGH_24_{ C}AMIGA_BUS_DATA_DIR{ E}AMIGA_BUS_ENABLE_LOW{ C} - :AMIGA_BUS_ENABLE_HIGH{ D} SIZE_1_{ H} RW_000{ H} - : SIZE_0_{ G} BGACK_030{ H} RW{ G} - : A_0_{ G}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ C}inst_AMIGA_BUS_ENABLE_DMA_LOW{ F} - :inst_AS_030_000_SYNC{ F}inst_BGACK_030_INT_D{ E}inst_AS_000_DMA{ A} - :inst_DS_000_DMA{ A} CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} - : inst_CLK_030_H{ A} - RN_VMA{ E}: VMA{ D} SM_AMIGA_3_{ D} SM_AMIGA_2_{ A} - RW{ H}: RW_000{ H}inst_DS_000_ENABLE{ B} + :AMIGA_BUS_ENABLE_HIGH{ D} A_0_{ G} SIZE_1_{ H} + : RW_000{ H} BGACK_030{ H} SIZE_0_{ G} + : RW{ G}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ F}inst_AMIGA_BUS_ENABLE_DMA_LOW{ F} + :inst_AS_030_000_SYNC{ B}inst_BGACK_030_INT_D{ H} CYCLE_DMA_0_{ A} + : CYCLE_DMA_1_{ A} + SIZE_0_{ H}:inst_LDS_000_INT{ F} + RN_SIZE_0_{ H}: SIZE_0_{ G} + RN_VMA{ E}: VMA{ D} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} + RW{ H}: RW_000{ H}inst_DS_000_ENABLE{ C} RN_RW{ H}: RW{ G} - A_0_{ H}:inst_LDS_000_INT{ F}inst_UDS_000_INT{ F} - RN_A_0_{ H}: A_0_{ G} -RN_IPL_030_1_{ C}: IPL_030_1_{ B} -RN_IPL_030_0_{ C}: IPL_030_0_{ B} - cpu_est_2_{ B}: E{ G} VMA{ D} cpu_est_2_{ A} - : cpu_est_3_{ D} SM_AMIGA_3_{ D} SM_AMIGA_2_{ A} - cpu_est_3_{ E}: E{ G} VMA{ D} cpu_est_3_{ D} - : cpu_est_1_{ A} SM_AMIGA_3_{ D} SM_AMIGA_2_{ A} - cpu_est_0_{ H}: VMA{ D} cpu_est_2_{ A} cpu_est_3_{ D} - : cpu_est_0_{ G} cpu_est_1_{ A} SM_AMIGA_3_{ D} - : SM_AMIGA_2_{ A} - cpu_est_1_{ B}: E{ G} VMA{ D} cpu_est_2_{ A} - : cpu_est_3_{ D} cpu_est_1_{ A} SM_AMIGA_3_{ D} - : SM_AMIGA_2_{ A} -inst_AMIGA_BUS_ENABLE_DMA_HIGH{ D}:AMIGA_BUS_ENABLE_HIGH{ D}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ C} + cpu_est_1_{ E}: E{ G} VMA{ D} cpu_est_1_{ D} + : cpu_est_2_{ D} cpu_est_3_{ D} SM_AMIGA_3_{ C} + : SM_AMIGA_2_{ C} + cpu_est_2_{ E}: E{ G} VMA{ D} cpu_est_2_{ D} + : cpu_est_3_{ D} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} + cpu_est_3_{ E}: E{ G} VMA{ D} cpu_est_1_{ D} + : cpu_est_3_{ D} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} + cpu_est_0_{ H}: VMA{ D} cpu_est_1_{ D} cpu_est_2_{ D} + : cpu_est_3_{ D} cpu_est_0_{ G} SM_AMIGA_3_{ C} + : SM_AMIGA_2_{ C} +inst_AMIGA_BUS_ENABLE_DMA_HIGH{ G}:AMIGA_BUS_ENABLE_HIGH{ D}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ F} inst_AMIGA_BUS_ENABLE_DMA_LOW{ G}:AMIGA_BUS_ENABLE_LOW{ C}inst_AMIGA_BUS_ENABLE_DMA_LOW{ F} -inst_AS_030_D0{ F}: CIIN{ E} BG_000{ D}inst_AS_030_000_SYNC{ F} +inst_AS_030_D0{ I}: CIIN{ E} BG_000{ D}inst_AS_030_000_SYNC{ B} : CIIN_0{ E} -inst_AS_030_000_SYNC{ G}:AMIGA_BUS_ENABLE_HIGH{ D}inst_AS_030_000_SYNC{ F} SM_AMIGA_6_{ C} - : SM_AMIGA_i_7_{ C} -inst_BGACK_030_INT_D{ F}: SIZE_1_{ H} SIZE_0_{ G} RW{ G} - : A_0_{ G}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ C}inst_AMIGA_BUS_ENABLE_DMA_LOW{ F} - :inst_AS_030_000_SYNC{ F} -inst_AS_000_DMA{ B}: AS_030{ H}inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} - : inst_CLK_030_H{ A} +inst_AS_030_000_SYNC{ C}:AMIGA_BUS_ENABLE_HIGH{ D}inst_AS_030_000_SYNC{ B} SM_AMIGA_6_{ F} + : SM_AMIGA_i_7_{ F} +inst_BGACK_030_INT_D{ I}: A_0_{ G} SIZE_1_{ H} SIZE_0_{ G} + : RW{ G}inst_AMIGA_BUS_ENABLE_DMA_HIGH{ F}inst_AMIGA_BUS_ENABLE_DMA_LOW{ F} + :inst_AS_030_000_SYNC{ B} +inst_AS_000_DMA{ B}: AS_030{ H} DTACK{ D}inst_AS_000_DMA{ A} + : CLK_030_PE_1_{ A} CLK_030_PE_0_{ A} inst_DS_000_DMA{ B}: DS_030{ A}inst_DS_000_DMA{ A} -CYCLE_DMA_0_{ B}:inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} CYCLE_DMA_0_{ A} - : CYCLE_DMA_1_{ A} inst_CLK_030_H{ A} -CYCLE_DMA_1_{ B}:inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} CYCLE_DMA_1_{ A} - : inst_CLK_030_H{ A} - inst_VPA_D{ B}: VMA{ D} SM_AMIGA_3_{ D} SM_AMIGA_2_{ A} -CLK_000_D_3_{ E}: CLK_000_D_4_{ B} SM_AMIGA_6_{ C} SM_AMIGA_i_7_{ C} -inst_DTACK_D0{ C}: SM_AMIGA_3_{ D} SM_AMIGA_2_{ A} -inst_RESET_OUT{ H}: AHIGH_31_{ B} AS_030{ H} AS_000{ E} - : DS_030{ A} UDS_000{ D} LDS_000{ D} - : AHIGH_30_{ B} AHIGH_29_{ B} AHIGH_28_{ C} - : AHIGH_27_{ C} AHIGH_26_{ C} AHIGH_25_{ C} - : AHIGH_24_{ C} RESET{ B} RW_000{ H} - : RW{ G} A_0_{ G} inst_RESET_OUT{ G} -CLK_000_D_1_{ I}: IPL_030_2_{ B} RW_000{ H} BGACK_030{ H} - : VMA{ D} IPL_030_1_{ B} IPL_030_0_{ B} - : cpu_est_2_{ A} cpu_est_3_{ D} cpu_est_0_{ G} - : cpu_est_1_{ A} CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} - : inst_RESET_OUT{ G} CLK_000_D_2_{ H}inst_DS_000_ENABLE{ B} - : SM_AMIGA_6_{ C} SM_AMIGA_4_{ D} SM_AMIGA_1_{ F} - : SM_AMIGA_0_{ H} RST_DLY_0_{ G} RST_DLY_1_{ G} - : RST_DLY_2_{ G}inst_DSACK1_INT{ H}inst_AS_000_INT{ C} - : SM_AMIGA_5_{ C} SM_AMIGA_3_{ D} SM_AMIGA_2_{ A} - : SM_AMIGA_i_7_{ C} -CLK_000_D_0_{ D}: IPL_030_2_{ B} RW_000{ H} BG_000{ D} - : BGACK_030{ H} VMA{ D} IPL_030_1_{ B} - : IPL_030_0_{ B} cpu_est_2_{ A} cpu_est_3_{ D} - : cpu_est_0_{ G} cpu_est_1_{ A} CYCLE_DMA_0_{ A} - : CYCLE_DMA_1_{ A} inst_RESET_OUT{ G} CLK_000_D_1_{ H} - :inst_DS_000_ENABLE{ B} SM_AMIGA_6_{ C} SM_AMIGA_4_{ D} - : SM_AMIGA_1_{ F} SM_AMIGA_0_{ H} RST_DLY_0_{ G} - : RST_DLY_1_{ G} RST_DLY_2_{ G}inst_DSACK1_INT{ H} - :inst_AS_000_INT{ C} SM_AMIGA_5_{ C} SM_AMIGA_3_{ D} - : SM_AMIGA_2_{ A} SM_AMIGA_i_7_{ C} -inst_CLK_OUT_PRE_50{ H}:inst_CLK_OUT_PRE_50{ G}inst_CLK_OUT_PRE_D{ D} -inst_CLK_OUT_PRE_D{ E}: CLK_DIV_OUT{ G} CLK_EXP{ B} - IPL_D0_0_{ H}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} - IPL_D0_1_{ E}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} - IPL_D0_2_{ C}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} -CLK_000_D_2_{ I}: CLK_000_D_3_{ D} -CLK_000_D_4_{ C}: SM_AMIGA_6_{ C} SM_AMIGA_i_7_{ C} + inst_VPA_D{ G}: VMA{ D} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} +CLK_000_D_3_{ G}: CLK_000_D_4_{ C} SM_AMIGA_6_{ F} SM_AMIGA_i_7_{ F} +inst_DTACK_D0{ C}: SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} +inst_RESET_OUT{ H}: AS_030{ H} AS_000{ E} DS_030{ A} + : UDS_000{ D} LDS_000{ D} A_0_{ G} + : RW_000{ H} RW{ G} inst_RESET_OUT{ G} +CLK_030_PE_1_{ B}:inst_DS_000_DMA{ A} CLK_030_PE_1_{ A} CLK_030_PE_0_{ A} +inst_AMIGA_DS{ D}:inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} CLK_030_PE_1_{ A} + : CLK_030_PE_0_{ A} +CLK_000_D_1_{ I}: RW_000{ H} BGACK_030{ H} VMA{ D} + : cpu_est_1_{ D} cpu_est_2_{ D} cpu_est_3_{ D} + : cpu_est_0_{ G} inst_RESET_OUT{ G} CLK_000_D_2_{ H} + :inst_DS_000_ENABLE{ C} SM_AMIGA_6_{ F} SM_AMIGA_4_{ A} + : SM_AMIGA_1_{ F} SM_AMIGA_0_{ A} CYCLE_DMA_0_{ A} + : CYCLE_DMA_1_{ A} RST_DLY_0_{ G} RST_DLY_1_{ G} + : RST_DLY_2_{ G}inst_DSACK1_INT{ A}inst_AS_000_INT{ C} + : SM_AMIGA_5_{ G} SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} + : SM_AMIGA_i_7_{ F} +CLK_000_D_0_{ E}: RW_000{ H} BG_000{ D} BGACK_030{ H} + : VMA{ D} cpu_est_1_{ D} cpu_est_2_{ D} + : cpu_est_3_{ D} cpu_est_0_{ G} inst_RESET_OUT{ G} + : CLK_000_D_1_{ H}inst_DS_000_ENABLE{ C} SM_AMIGA_6_{ F} + : SM_AMIGA_4_{ A} SM_AMIGA_1_{ F} SM_AMIGA_0_{ A} + : CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} RST_DLY_0_{ G} + : RST_DLY_1_{ G} RST_DLY_2_{ G}inst_DSACK1_INT{ A} + :inst_AS_000_INT{ C} SM_AMIGA_5_{ G} SM_AMIGA_3_{ C} + : SM_AMIGA_2_{ C} SM_AMIGA_i_7_{ F} +inst_CLK_OUT_PRE_50{ H}:inst_CLK_OUT_PRE_50{ G}inst_CLK_OUT_PRE_D{ E} +inst_CLK_OUT_PRE_D{ F}:inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} CLK_030_PE_1_{ A} + : CLK_030_PE_0_{ A} CLK_OUT_INTreg{ D} + IPL_D0_0_{ C}: IPL_030_1_{ B} IPL_030_0_{ B} IPL_030_2_{ B} + IPL_D0_1_{ C}: IPL_030_1_{ B} IPL_030_0_{ B} IPL_030_2_{ B} + IPL_D0_2_{ C}: IPL_030_1_{ B} IPL_030_0_{ B} IPL_030_2_{ B} +CLK_000_D_2_{ I}: CLK_000_D_3_{ F} +CLK_000_D_4_{ D}: SM_AMIGA_6_{ F} SM_AMIGA_i_7_{ F} inst_LDS_000_INT{ G}: LDS_000{ D}inst_LDS_000_INT{ F} -inst_DS_000_ENABLE{ C}: UDS_000{ D} LDS_000{ D}inst_DS_000_ENABLE{ B} +inst_DS_000_ENABLE{ D}: UDS_000{ D} LDS_000{ D}inst_DS_000_ENABLE{ C} inst_UDS_000_INT{ G}: UDS_000{ D}inst_UDS_000_INT{ F} -SM_AMIGA_6_{ D}: RW_000{ H}inst_LDS_000_INT{ F}inst_DS_000_ENABLE{ B} - :inst_UDS_000_INT{ F} SM_AMIGA_6_{ C}inst_AS_000_INT{ C} - : SM_AMIGA_5_{ C} -SM_AMIGA_4_{ E}:inst_DS_000_ENABLE{ B} SM_AMIGA_4_{ D} SM_AMIGA_3_{ D} -SM_AMIGA_1_{ G}: SM_AMIGA_1_{ F} SM_AMIGA_0_{ H}inst_DSACK1_INT{ H} -SM_AMIGA_0_{ I}: RW_000{ H} SM_AMIGA_0_{ H} SM_AMIGA_i_7_{ C} +SM_AMIGA_6_{ G}: RW_000{ H}inst_LDS_000_INT{ F}inst_DS_000_ENABLE{ C} + :inst_UDS_000_INT{ F} SM_AMIGA_6_{ F}inst_AS_000_INT{ C} + : SM_AMIGA_5_{ G} +SM_AMIGA_4_{ B}:inst_DS_000_ENABLE{ C} SM_AMIGA_4_{ A} SM_AMIGA_3_{ C} +SM_AMIGA_1_{ G}: SM_AMIGA_1_{ F} SM_AMIGA_0_{ A}inst_DSACK1_INT{ A} +SM_AMIGA_0_{ B}: RW_000{ H} SM_AMIGA_0_{ A} SM_AMIGA_i_7_{ F} +CYCLE_DMA_0_{ B}:inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} CLK_030_PE_1_{ A} + : CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} CLK_030_PE_0_{ A} +CYCLE_DMA_1_{ B}:inst_AS_000_DMA{ A}inst_DS_000_DMA{ A} CLK_030_PE_1_{ A} + : CYCLE_DMA_0_{ A} CYCLE_DMA_1_{ A} CLK_030_PE_0_{ A} +CLK_030_PE_0_{ B}:inst_DS_000_DMA{ A} CLK_030_PE_1_{ A} CLK_030_PE_0_{ A} RST_DLY_0_{ H}: inst_RESET_OUT{ G} RST_DLY_0_{ G} RST_DLY_1_{ G} : RST_DLY_2_{ G} RST_DLY_1_{ H}: inst_RESET_OUT{ G} RST_DLY_0_{ G} RST_DLY_1_{ G} : RST_DLY_2_{ G} RST_DLY_2_{ H}: inst_RESET_OUT{ G} RST_DLY_0_{ G} RST_DLY_1_{ G} : RST_DLY_2_{ G} -inst_CLK_030_H{ B}:inst_DS_000_DMA{ A} inst_CLK_030_H{ A} -inst_DSACK1_INT{ I}: DSACK1{ H}inst_DSACK1_INT{ H} +inst_DSACK1_INT{ B}: DSACK1{ H}inst_DSACK1_INT{ A} inst_AS_000_INT{ D}: AS_000{ E}inst_AS_000_INT{ C} -SM_AMIGA_5_{ D}: SM_AMIGA_4_{ D} SM_AMIGA_5_{ C} -SM_AMIGA_3_{ E}: SM_AMIGA_3_{ D} SM_AMIGA_2_{ A} -SM_AMIGA_2_{ B}: SM_AMIGA_1_{ F} SM_AMIGA_2_{ A} -SM_AMIGA_i_7_{ D}: RW_000{ H}inst_AS_030_000_SYNC{ F} SM_AMIGA_6_{ C} - : SM_AMIGA_i_7_{ C} +SM_AMIGA_5_{ H}: SM_AMIGA_4_{ A} SM_AMIGA_5_{ G} +SM_AMIGA_3_{ D}: SM_AMIGA_3_{ C} SM_AMIGA_2_{ C} +SM_AMIGA_2_{ D}: SM_AMIGA_1_{ F} SM_AMIGA_2_{ C} +SM_AMIGA_i_7_{ G}: RW_000{ H}inst_AS_030_000_SYNC{ B} SM_AMIGA_6_{ F} + : SM_AMIGA_i_7_{ F} +CLK_OUT_INTreg{ E}: CLK_DIV_OUT{ G} CLK_EXP{ B}inst_AS_000_DMA{ A} + :inst_DS_000_DMA{ A} CLK_030_PE_1_{ A} CLK_030_PE_0_{ A} CIIN_0{ F}: CIIN{ E} ----------------------------------------------------------------------------- @@ -657,15 +664,15 @@ Equations : +-----+-----+-----+-----+------------------------ | | | | | DS_030 | | | | | AVEC -| * | S | BS | BR | cpu_est_1_ -| * | S | BS | BR | cpu_est_2_ | * | S | BS | BR | inst_AS_000_DMA -| * | S | BS | BR | SM_AMIGA_2_ -| * | S | BS | BR | inst_VPA_D +| * | S | BS | BR | SM_AMIGA_0_ +| * | S | BS | BR | SM_AMIGA_4_ +| * | S | BS | BR | inst_DSACK1_INT +| * | S | BS | BR | CLK_030_PE_0_ | * | S | BS | BR | inst_DS_000_DMA -| * | S | BS | BR | inst_CLK_030_H -| * | S | BS | BR | CYCLE_DMA_1_ +| * | S | BS | BR | CLK_030_PE_1_ | * | S | BS | BR | CYCLE_DMA_0_ +| * | S | BS | BR | CYCLE_DMA_1_ | | | | | A_DECODE_19_ | | | | | A_DECODE_16_ | | | | | A_DECODE_18_ @@ -687,15 +694,16 @@ Equations : | * | S | BS | BR | IPL_030_2_ | * | S | BS | BR | IPL_030_0_ | * | S | BS | BR | IPL_030_1_ -| * | S | BS | BR | CLK_EXP -| | | | | RESET -| * | S | BS | BR | inst_DS_000_ENABLE -| * | S | BS | BR | inst_DTACK_D0 +| | | | | CLK_EXP +| * | S | BS | BR | inst_AS_030_000_SYNC +| * | S | BS | BR | RN_IPL_030_2_ | * | S | BS | BR | RN_IPL_030_0_ | * | S | BS | BR | RN_IPL_030_1_ -| * | S | BS | BR | RN_IPL_030_2_ -| * | S | BS | BR | CLK_000_D_4_ | * | S | BS | BR | IPL_D0_2_ +| * | S | BS | BR | IPL_D0_1_ +| * | S | BS | BR | IPL_D0_0_ +| * | S | BS | BR | inst_DTACK_D0 +| | | | | RESET Block C @@ -711,12 +719,12 @@ Equations : | | | | | AHIGH_27_ | | | | | AHIGH_28_ | | | | | AMIGA_BUS_ENABLE_LOW -| * | S | BS | BR | CLK_000_D_0_ -| * | S | BS | BR | SM_AMIGA_6_ -| * | S | BS | BR | SM_AMIGA_i_7_ -| * | S | BS | BR | SM_AMIGA_5_ +| * | S | BS | BR | SM_AMIGA_2_ +| * | S | BS | BR | inst_DS_000_ENABLE | * | S | BS | BR | inst_AS_000_INT -| * | S | BS | BR | inst_AMIGA_BUS_ENABLE_DMA_HIGH +| * | S | BS | BR | SM_AMIGA_3_ +| * | S | BS | BR | inst_AMIGA_DS +| * | S | BS | BR | CLK_000_D_4_ | | | | | BG_030 @@ -729,20 +737,19 @@ Equations : +-----+-----+-----+-----+------------------------ | | | | | UDS_000 | | | | | LDS_000 +| | | | | DTACK | * | S | BS | BR | VMA | | | | | AMIGA_BUS_ENABLE_HIGH | * | S | BS | BR | BG_000 | | | | | AMIGA_ADDR_ENABLE +| * | S | BS | BR | CLK_000_D_0_ | * | S | BS | BR | cpu_est_3_ -| * | S | BS | BR | SM_AMIGA_3_ +| * | S | BS | BR | cpu_est_1_ +| * | S | BS | BR | CLK_OUT_INTreg +| * | S | BS | BR | cpu_est_2_ | * | S | BS | BR | RN_VMA -| * | S | BS | BR | SM_AMIGA_4_ -| * | S | BS | BR | inst_CLK_OUT_PRE_D -| * | S | BS | BR | CLK_000_D_3_ | * | S | BS | BR | RN_BG_000 -| * | S | BS | BR | IPL_D0_1_ | | | | | BGACK_000 -| | | | | DTACK Block E @@ -756,8 +763,7 @@ Equations : | | | | | BERR | | | | | AMIGA_BUS_DATA_DIR | | | | | CIIN -| * | S | BS | BR | inst_BGACK_030_INT_D -| * | S | BS | BR | inst_AS_030_D0 +| * | S | BS | BR | inst_CLK_OUT_PRE_D | | | | | CIIN_0 @@ -768,11 +774,15 @@ Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name +-----+-----+-----+-----+------------------------ -| * | S | BS | BR | inst_AS_030_000_SYNC +| * | S | BS | BR | SM_AMIGA_6_ +| * | S | BS | BR | SM_AMIGA_i_7_ | * | S | BS | BR | SM_AMIGA_1_ | * | S | BS | BR | inst_LDS_000_INT | * | S | BS | BR | inst_UDS_000_INT | * | S | BS | BR | inst_AMIGA_BUS_ENABLE_DMA_LOW +| * | S | BS | BR | inst_AMIGA_BUS_ENABLE_DMA_HIGH +| * | S | BS | BR | CLK_000_D_3_ +| * | S | BS | BR | inst_VPA_D | | | | | A_DECODE_17_ | | | | | FC_1_ | | | | | FC_0_ @@ -791,19 +801,19 @@ Equations : | * | S | BS | BR | SIZE_0_ | * | S | BS | BR | A_0_ | | | | | E -| * | S | BS | BR | CLK_DIV_OUT +| | | | | CLK_DIV_OUT | * | S | BS | BR | inst_RESET_OUT | * | S | BS | BR | cpu_est_0_ +| * | S | BS | BR | SM_AMIGA_5_ | * | S | BS | BR | inst_CLK_OUT_PRE_50 | * | S | BS | BR | RST_DLY_0_ -| * | S | BS | BR | RN_A_0_ | * | S | BS | BR | RN_SIZE_0_ +| * | S | BS | BR | RN_A_0_ | * | S | BS | BR | RN_RW | * | S | BS | BR | RST_DLY_2_ | * | S | BS | BR | RST_DLY_1_ -| * | S | BS | BR | IPL_D0_0_ -| | | | | IPL_0_ | | | | | IPL_2_ +| | | | | IPL_0_ Block H @@ -821,10 +831,10 @@ Equations : | | | | | FPU_CS | * | S | BS | BR | RN_BGACK_030 | * | S | BS | BR | CLK_000_D_1_ -| * | S | BS | BR | SM_AMIGA_0_ +| * | S | BS | BR | inst_BGACK_030_INT_D +| * | S | BS | BR | inst_AS_030_D0 | * | S | BS | BR | RN_RW_000 | * | S | BS | BR | RN_SIZE_1_ -| * | S | BS | BR | inst_DSACK1_INT | * | S | BS | BR | CLK_000_D_2_ | | | | | A_DECODE_23_ | | | | | A_DECODE_22_ @@ -844,23 +854,23 @@ BLOCK_A_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx A0 RST pin 86 mx A17 BERR pin 41 -mx A1 RN_VMA mcell D0 mx A18 SM_AMIGA_2_ mcell A5 -mx A2 inst_VPA_D mcell A9 mx A19 ... ... -mx A3 cpu_est_1_ mcell A8 mx A20 RN_BGACK_030 mcell H4 -mx A4 CLK_030 pin 64 mx A21 SM_AMIGA_3_ mcell D13 -mx A5 nEXP_SPACE pin 14 mx A22 inst_CLK_030_H mcell A2 -mx A6 RW_000 pin 80 mx A23 CLK_000_D_0_ mcell C9 -mx A7 cpu_est_3_ mcell D9 mx A24 cpu_est_2_ mcell A12 -mx A8 UDS_000 pin 32 mx A25 inst_DS_000_DMA mcell A13 -mx A9 inst_AS_000_DMA mcell A1 mx A26 ... ... -mx A10 VPA pin 36 mx A27 LDS_000 pin 31 -mx A11 inst_DTACK_D0 mcell B6 mx A28 ... ... -mx A12 cpu_est_0_ mcell G9 mx A29 ... ... -mx A13 CLK_000_D_1_ mcell H5 mx A30 ... ... -mx A14 CYCLE_DMA_0_ mcell A10 mx A31 ... ... -mx A15 CYCLE_DMA_1_ mcell A6 mx A32 inst_RESET_OUT mcell G5 -mx A16 AS_000 pin 42 +mx A0 RST pin 86 mx A17 ... ... +mx A1 CLK_000_D_0_ mcell D13 mx A18 inst_DSACK1_INT mcell A5 +mx A2 CLK_030_PE_0_ mcell A9 mx A19 AS_030 pin 82 +mx A3 inst_AS_000_DMA mcell A8 mx A20 SM_AMIGA_1_ mcell F8 +mx A4 CLK_030 pin 64 mx A21 ... ... +mx A5 nEXP_SPACE pin 14 mx A22 CLK_030_PE_1_ mcell A2 +mx A6 RW_000 pin 80 mx A23 RN_BGACK_030 mcell H4 +mx A7 ... ... mx A24 ... ... +mx A8 inst_AMIGA_DS mcell C10 mx A25 inst_DS_000_DMA mcell A13 +mx A9 SM_AMIGA_4_ mcell A1 mx A26 AS_000 pin 42 +mx A10 CYCLE_DMA_0_ mcell A6 mx A27 ... ... +mx A11 ... ... mx A28 ... ... +mx A12 SM_AMIGA_5_ mcell G13 mx A29 ... ... +mx A13 CLK_000_D_1_ mcell H5 mx A30 CLK_OUT_INTreg mcell D10 +mx A14 CYCLE_DMA_1_ mcell A10 mx A31 ... ... +mx A15 SM_AMIGA_0_ mcell A12 mx A32 inst_RESET_OUT mcell G5 +mx A16inst_CLK_OUT_PRE_D mcell E8 ---------------------------------------------------------------------------- @@ -868,21 +878,21 @@ BLOCK_B_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx B0 RN_BGACK_030 mcell H4 mx B17 IPL_D0_1_ mcell D14 -mx B1 ... ... mx B18 ... ... -mx B2 CLK_000_D_3_ mcell D10 mx B19 AS_030 pin 82 -mx B3 inst_RESET_OUT mcell G5 mx B20 IPL_D0_2_ mcell B14 -mx B4inst_CLK_OUT_PRE_D mcell D6 mx B21 IPL_1_ pin 56 +mx B0 RN_BGACK_030 mcell H4 mx B17 FC_0_ pin 57 +mx B1 FC_1_ pin 58 mx B18 IPL_D0_2_ mcell B2 +mx B2 RESET pin 3 mx B19 AS_030 pin 82 +mx B3 IPL_1_ pin 56 mx B20 CLK_OUT_INTreg mcell D10 +mx B4 A_DECODE_18_ pin 95 mx B21 RST pin 86 mx B5 nEXP_SPACE pin 14 mx B22 IPL_2_ pin 68 -mx B6 RN_IPL_030_1_ mcell B9 mx B23 CLK_000_D_0_ mcell C9 -mx B7 ... ... mx B24 RST pin 86 -mx B8 RW pin 71 mx B25 ... ... +mx B6 RN_IPL_030_1_ mcell B9 mx B23 IPL_D0_1_ mcell B6 +mx B7inst_BGACK_030_INT_D mcell H13 mx B24 IPL_D0_0_ mcell B10 +mx B8 A_DECODE_17_ pin 59 mx B25 ... ... mx B9 DTACK pin 30 mx B26 ... ... -mx B10inst_DS_000_ENABLE mcell B13 mx B27 RN_IPL_030_2_ mcell B4 -mx B11 IPL_D0_0_ mcell G14 mx B28 SM_AMIGA_4_ mcell D2 -mx B12 ... ... mx B29 ... ... -mx B13 CLK_000_D_1_ mcell H5 mx B30 SM_AMIGA_6_ mcell C13 -mx B14 ... ... mx B31 RN_IPL_030_0_ mcell B5 +mx B10inst_AS_030_000_SYNC mcell B13 mx B27 RN_IPL_030_2_ mcell B4 +mx B11 A_DECODE_16_ pin 96 mx B28 RN_IPL_030_0_ mcell B5 +mx B12 A_DECODE_19_ pin 97 mx B29 SM_AMIGA_i_7_ mcell F4 +mx B13 ... ... mx B30 ... ... +mx B14 inst_AS_030_D0 mcell H2 mx B31 ... ... mx B15 ... ... mx B32 ... ... mx B16 IPL_0_ pin 67 ---------------------------------------------------------------------------- @@ -892,23 +902,23 @@ BLOCK_C_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx C0 RST pin 86 mx C17 ... ... -mx C1 ... ... mx C18 SM_AMIGA_5_ mcell C6 -mx C2 CLK_000_D_4_ mcell B10 mx C19 SM_AMIGA_0_ mcell H13 -mx C3 CLK_000 pin 11 mx C20 CLK_000_D_3_ mcell D10 -mx C4 CLK_000_D_1_ mcell H5 mx C21 ... ... -mx C5 nEXP_SPACE pin 14 mx C22 SM_AMIGA_i_7_ mcell C2 -mx C6 ... ... mx C23 RN_BGACK_030 mcell H4 -mx C7inst_AMIGA_BUS_ENABLE_DMA_HIGH mcell C14 mx C24 ... ... -mx C8 inst_AS_000_INT mcell C10 mx C25inst_AS_030_000_SYNC mcell F0 -mx C9 AS_030 pin 82 mx C26 ... ... -mx C10inst_AMIGA_BUS_ENABLE_DMA_LOW mcell F1 mx C27 ... ... -mx C11 A_1_ pin 60 mx C28 ... ... -mx C12 ... ... mx C29 ... ... -mx C13 CLK_000_D_0_ mcell C9 mx C30 SM_AMIGA_6_ mcell C13 -mx C14 ... ... mx C31 ... ... -mx C15 ... ... mx C32 inst_RESET_OUT mcell G5 -mx C16inst_BGACK_030_INT_D mcell E8 +mx C0inst_DS_000_ENABLE mcell C13 mx C17 BERR pin 41 +mx C1 CLK_000_D_0_ mcell D13 mx C18 SM_AMIGA_3_ mcell C6 +mx C2 RESET pin 3 mx C19 AS_030 pin 82 +mx C3 SM_AMIGA_2_ mcell C9 mx C20 inst_DTACK_D0 mcell B14 +mx C4 cpu_est_1_ mcell D6 mx C21 RST pin 86 +mx C5 nEXP_SPACE pin 14 mx C22 inst_AS_000_INT mcell C2 +mx C6 CLK_000_D_3_ mcell F13 mx C23 RN_BGACK_030 mcell H4 +mx C7 ... ... mx C24 LDS_000 pin 31 +mx C8 UDS_000 pin 32 mx C25 SM_AMIGA_6_ mcell F0 +mx C9inst_AMIGA_BUS_ENABLE_DMA_LOW mcell F5 mx C26 ... ... +mx C10 cpu_est_2_ mcell D14 mx C27 cpu_est_0_ mcell G9 +mx C11 RW pin 71 mx C28 ... ... +mx C12 SM_AMIGA_4_ mcell A1 mx C29 ... ... +mx C13 CLK_000_D_1_ mcell H5 mx C30 ... ... +mx C14 RN_VMA mcell D4 mx C31 ... ... +mx C15 inst_VPA_D mcell F2 mx C32 ... ... +mx C16 cpu_est_3_ mcell D2 ---------------------------------------------------------------------------- @@ -916,23 +926,23 @@ BLOCK_D_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx D0 RN_BGACK_030 mcell H4 mx D17inst_UDS_000_INT mcell F12 -mx D1 SM_AMIGA_3_ mcell D13 mx D18inst_AMIGA_BUS_ENABLE_DMA_HIGH mcell C14 -mx D2 RN_BG_000 mcell D1 mx D19 inst_VPA_D mcell A9 -mx D3 cpu_est_1_ mcell A8 mx D20inst_LDS_000_INT mcell F8 -mx D4 BG_030 pin 21 mx D21 RST pin 86 -mx D5inst_AS_030_000_SYNC mcell F0 mx D22 inst_RESET_OUT mcell G5 -mx D6 ... ... mx D23 CLK_000_D_0_ mcell C9 -mx D7 cpu_est_3_ mcell D9 mx D24 ... ... -mx D8 ... ... mx D25 BERR pin 41 -mx D9 cpu_est_2_ mcell A12 mx D26 RN_VMA mcell D0 -mx D10 cpu_est_0_ mcell G9 mx D27 SM_AMIGA_5_ mcell C6 -mx D11 inst_DTACK_D0 mcell B6 mx D28inst_DS_000_ENABLE mcell B13 -mx D12inst_CLK_OUT_PRE_50 mcell G13 mx D29 ... ... -mx D13 CLK_000_D_1_ mcell H5 mx D30 CLK_000_D_2_ mcell H6 -mx D14 inst_AS_030_D0 mcell E5 mx D31 IPL_1_ pin 56 -mx D15 nEXP_SPACE pin 14 mx D32 AS_030 pin 82 -mx D16 SM_AMIGA_4_ mcell D2 +mx D0 RST pin 86 mx D17inst_LDS_000_INT mcell F12 +mx D1inst_AMIGA_BUS_ENABLE_DMA_HIGH mcell F9 mx D18 inst_AS_000_DMA mcell A8 +mx D2 RN_BG_000 mcell D1 mx D19 AS_030 pin 82 +mx D3 cpu_est_3_ mcell D2 mx D20 RN_BGACK_030 mcell H4 +mx D4 BG_030 pin 21 mx D21inst_AS_030_000_SYNC mcell B13 +mx D5 nEXP_SPACE pin 14 mx D22 inst_RESET_OUT mcell G5 +mx D6 ... ... mx D23 ... ... +mx D7 ... ... mx D24 cpu_est_2_ mcell D14 +mx D8inst_CLK_OUT_PRE_D mcell E8 mx D25 ... ... +mx D9 inst_VPA_D mcell F2 mx D26 ... ... +mx D10 RN_VMA mcell D4 mx D27 ... ... +mx D11inst_DS_000_ENABLE mcell C13 mx D28 inst_AS_030_D0 mcell H2 +mx D12 cpu_est_0_ mcell G9 mx D29 CLK_000_D_0_ mcell D13 +mx D13 CLK_000_D_1_ mcell H5 mx D30 ... ... +mx D14 CLK_000 pin 11 mx D31 ... ... +mx D15inst_UDS_000_INT mcell F1 mx D32 ... ... +mx D16 cpu_est_1_ mcell D6 ---------------------------------------------------------------------------- @@ -940,22 +950,22 @@ BLOCK_E_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx E0 RST pin 86 mx E17 AHIGH_26_ pin 17 -mx E1 FC_1_ pin 58 mx E18 BGACK_000 pin 28 -mx E2 CIIN_0 mcell E9 mx E19 AS_030 pin 82 -mx E3 AHIGH_27_ pin 16 mx E20 A_DECODE_22_ pin 84 -mx E4 A_DECODE_18_ pin 95 mx E21 nEXP_SPACE pin 14 -mx E5 AHIGH_24_ pin 19 mx E22 inst_RESET_OUT mcell G5 -mx E6 A_DECODE_19_ pin 97 mx E23 RN_BGACK_030 mcell H4 +mx E0 RN_BGACK_030 mcell H4 mx E17 A_DECODE_18_ pin 95 +mx E1 FC_1_ pin 58 mx E18 A_DECODE_23_ pin 85 +mx E2 inst_AS_000_INT mcell C2 mx E19 AHIGH_30_ pin 5 +mx E3 A_DECODE_20_ pin 93 mx E20 A_DECODE_22_ pin 84 +mx E4 BGACK_000 pin 28 mx E21 AHIGH_27_ pin 16 +mx E5 AHIGH_24_ pin 19 mx E22 AHIGH_25_ pin 18 +mx E6 RW_000 pin 80 mx E23inst_CLK_OUT_PRE_50 mcell G2 mx E7 AHIGH_28_ pin 15 mx E24 FC_0_ pin 57 -mx E8 inst_AS_000_INT mcell C10 mx E25 AHIGH_31_ pin 4 -mx E9 AHIGH_30_ pin 5 mx E26 A_DECODE_16_ pin 96 +mx E8 FPU_SENSE pin 91 mx E25 AHIGH_31_ pin 4 +mx E9 AS_030 pin 82 mx E26 AHIGH_26_ pin 17 mx E10 ... ... mx E27 A_DECODE_17_ pin 59 -mx E11 FPU_SENSE pin 91 mx E28 RW_000 pin 80 -mx E12 AHIGH_25_ pin 18 mx E29 A_DECODE_20_ pin 93 +mx E11 A_DECODE_16_ pin 96 mx E28 inst_AS_030_D0 mcell H2 +mx E12 A_DECODE_19_ pin 97 mx E29 ... ... mx E13 AHIGH_29_ pin 6 mx E30 ... ... -mx E14 inst_AS_030_D0 mcell E5 mx E31 ... ... -mx E15 A_DECODE_21_ pin 94 mx E32 A_DECODE_23_ pin 85 +mx E14 CIIN_0 mcell E5 mx E31 A_DECODE_21_ pin 94 +mx E15 nEXP_SPACE pin 14 mx E32 inst_RESET_OUT mcell G5 mx E16 AS_000 pin 42 ---------------------------------------------------------------------------- @@ -964,23 +974,23 @@ BLOCK_F_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx F0 SIZE_0_ pin 70 mx F17inst_UDS_000_INT mcell F12 -mx F1 FC_1_ pin 58 mx F18 SM_AMIGA_2_ mcell A5 -mx F2inst_LDS_000_INT mcell F8 mx F19 ... ... -mx F3 A_1_ pin 60 mx F20 RN_BGACK_030 mcell H4 -mx F4 A_DECODE_18_ pin 95 mx F21 RST pin 86 -mx F5 nEXP_SPACE pin 14 mx F22 SM_AMIGA_i_7_ mcell C2 -mx F6 FC_0_ pin 57 mx F23 CLK_000_D_0_ mcell C9 -mx F7 ... ... mx F24 ... ... -mx F8 A_DECODE_17_ pin 59 mx F25inst_AS_030_000_SYNC mcell F0 -mx F9 AS_030 pin 82 mx F26 inst_AS_030_D0 mcell E5 -mx F10inst_AMIGA_BUS_ENABLE_DMA_LOW mcell F1 mx F27 SIZE_1_ pin 79 -mx F11 A_DECODE_16_ pin 96 mx F28 ... ... -mx F12 A_DECODE_19_ pin 97 mx F29 ... ... -mx F13 CLK_000_D_1_ mcell H5 mx F30 SM_AMIGA_6_ mcell C13 -mx F14 SM_AMIGA_1_ mcell F4 mx F31 ... ... +mx F0 SIZE_0_ pin 70 mx F17inst_LDS_000_INT mcell F12 +mx F1 CLK_000_D_0_ mcell D13 mx F18inst_AMIGA_BUS_ENABLE_DMA_HIGH mcell F9 +mx F2 SM_AMIGA_1_ mcell F8 mx F19inst_BGACK_030_INT_D mcell H13 +mx F3 SM_AMIGA_2_ mcell C9 mx F20 RN_BGACK_030 mcell H4 +mx F4 CLK_000_D_1_ mcell H5 mx F21inst_AS_030_000_SYNC mcell B13 +mx F5 nEXP_SPACE pin 14 mx F22 ... ... +mx F6 CLK_000_D_3_ mcell F13 mx F23 ... ... +mx F7 CLK_000_D_4_ mcell C14 mx F24 RST pin 86 +mx F8 ... ... mx F25 SM_AMIGA_6_ mcell F0 +mx F9 SM_AMIGA_0_ mcell A12 mx F26 ... ... +mx F10inst_UDS_000_INT mcell F1 mx F27 SIZE_1_ pin 79 +mx F11 A_1_ pin 60 mx F28 ... ... +mx F12 ... ... mx F29 SM_AMIGA_i_7_ mcell F4 +mx F13 VPA pin 36 mx F30 CLK_000_D_2_ mcell H6 +mx F14inst_AMIGA_BUS_ENABLE_DMA_LOW mcell F5 mx F31 ... ... mx F15 A_0_ pin 69 mx F32 ... ... -mx F16inst_BGACK_030_INT_D mcell E8 +mx F16 ... ... ---------------------------------------------------------------------------- @@ -988,23 +998,23 @@ BLOCK_G_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx G0 IPL_0_ pin 67 mx G17 RN_RW mcell G0 -mx G1 ... ... mx G18 cpu_est_1_ mcell A8 -mx G2 ... ... mx G19 ... ... -mx G3 CLK_000_D_0_ mcell C9 mx G20 RN_BGACK_030 mcell H4 -mx G4inst_CLK_OUT_PRE_D mcell D6 mx G21 RST pin 86 -mx G5 RST_DLY_2_ mcell G6 mx G22 RST_DLY_1_ mcell G10 -mx G6 RW_000 pin 80 mx G23 RST_DLY_0_ mcell G2 -mx G7 RN_SIZE_0_ mcell G12 mx G24 LDS_000 pin 31 -mx G8 UDS_000 pin 32 mx G25 cpu_est_3_ mcell D9 -mx G9 cpu_est_2_ mcell A12 mx G26 ... ... -mx G10 cpu_est_0_ mcell G9 mx G27 CLK_000_D_1_ mcell H5 +mx G0 LDS_000 pin 31 mx G17 RN_RW mcell G0 +mx G1 CLK_000_D_0_ mcell D13 mx G18 ... ... +mx G2 CLK_OUT_INTreg mcell D10 mx G19inst_BGACK_030_INT_D mcell H13 +mx G3 cpu_est_3_ mcell D2 mx G20 RN_BGACK_030 mcell H4 +mx G4inst_CLK_OUT_PRE_50 mcell G2 mx G21 RST pin 86 +mx G5 nEXP_SPACE pin 14 mx G22 RST_DLY_2_ mcell G10 +mx G6 RW_000 pin 80 mx G23 RST_DLY_0_ mcell G6 +mx G7 RN_SIZE_0_ mcell G12 mx G24 cpu_est_2_ mcell D14 +mx G8 UDS_000 pin 32 mx G25 SM_AMIGA_6_ mcell F0 +mx G9 SM_AMIGA_5_ mcell G13 mx G26 ... ... +mx G10 RST_DLY_1_ mcell G14 mx G27 CLK_000_D_1_ mcell H5 mx G11 ... ... mx G28 ... ... -mx G12inst_CLK_OUT_PRE_50 mcell G13 mx G29 ... ... +mx G12 cpu_est_0_ mcell G9 mx G29 ... ... mx G13 RN_A_0_ mcell G8 mx G30 ... ... mx G14 ... ... mx G31 ... ... -mx G15 nEXP_SPACE pin 14 mx G32 inst_RESET_OUT mcell G5 -mx G16inst_BGACK_030_INT_D mcell E8 +mx G15 ... ... mx G32 inst_RESET_OUT mcell G5 +mx G16 cpu_est_1_ mcell D6 ---------------------------------------------------------------------------- @@ -1014,21 +1024,21 @@ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ mx H0 RST pin 86 mx H17 FC_0_ pin 57 mx H1 FC_1_ pin 58 mx H18 BGACK_000 pin 28 -mx H2 SM_AMIGA_i_7_ mcell C2 mx H19 AS_030 pin 82 -mx H3 CLK_000_D_0_ mcell C9 mx H20 RN_BGACK_030 mcell H4 -mx H4 A_DECODE_18_ pin 95 mx H21 ... ... +mx H2 inst_DSACK1_INT mcell A5 mx H19 FPU_SENSE pin 91 +mx H3 inst_AS_000_DMA mcell A8 mx H20 RN_BGACK_030 mcell H4 +mx H4 A_DECODE_18_ pin 95 mx H21 CLK_000_D_0_ mcell D13 mx H5 nEXP_SPACE pin 14 mx H22 inst_RESET_OUT mcell G5 mx H6 A_DECODE_16_ pin 96 mx H23 RN_RW_000 mcell H0 -mx H7 SM_AMIGA_0_ mcell H13 mx H24 LDS_000 pin 31 -mx H8 UDS_000 pin 32 mx H25 RW pin 71 -mx H9 inst_AS_000_DMA mcell A1 mx H26 AS_000 pin 42 -mx H10 SM_AMIGA_1_ mcell F4 mx H27 CLK_000_D_1_ mcell H5 -mx H11 FPU_SENSE pin 91 mx H28 ... ... -mx H12 A_DECODE_19_ pin 97 mx H29 ... ... -mx H13 A_DECODE_17_ pin 59 mx H30 SM_AMIGA_6_ mcell C13 -mx H14 inst_DSACK1_INT mcell H2 mx H31 ... ... -mx H15 RN_SIZE_1_ mcell H12 mx H32 ... ... -mx H16inst_BGACK_030_INT_D mcell E8 +mx H7inst_BGACK_030_INT_D mcell H13 mx H24 LDS_000 pin 31 +mx H8 UDS_000 pin 32 mx H25 SM_AMIGA_6_ mcell F0 +mx H9 AS_030 pin 82 mx H26 ... ... +mx H10 SM_AMIGA_i_7_ mcell F4 mx H27 CLK_000_D_1_ mcell H5 +mx H11 RW pin 71 mx H28 ... ... +mx H12 A_DECODE_19_ pin 97 mx H29 RN_SIZE_1_ mcell H12 +mx H13 A_DECODE_17_ pin 59 mx H30 ... ... +mx H14 ... ... mx H31 ... ... +mx H15 SM_AMIGA_0_ mcell A12 mx H32 ... ... +mx H16 AS_000 pin 42 ---------------------------------------------------------------------------- CSM indicates the mux inputs from the Central Switch Matrix. @@ -1057,6 +1067,15 @@ PostFit_Equations 1 2 1 Pin LDS_000.OE 0 0 1 Pin BERR 1 9 1 Pin BERR.OE + 1 1 1 Pin CLK_DIV_OUT + 1 1 1 Pin CLK_EXP + 1 9 1 Pin FPU_CS- + 1 2 1 Pin DSACK1- + 1 1 1 Pin DSACK1.OE + 0 0 1 Pin DTACK + 1 1 1 Pin DTACK.OE + 1 0 1 Pin AVEC + 2 3 1 Pin E 0 0 1 Pin AHIGH_30_ 1 3 1 Pin AHIGH_30_.OE 0 0 1 Pin AHIGH_29_ @@ -1067,54 +1086,45 @@ PostFit_Equations 1 3 1 Pin AHIGH_27_.OE 0 0 1 Pin AHIGH_26_ 1 3 1 Pin AHIGH_26_.OE - 1 1 1 Pin CLK_DIV_OUT.D - 1 1 1 Pin CLK_DIV_OUT.C 0 0 1 Pin AHIGH_25_ 1 3 1 Pin AHIGH_25_.OE + 0 0 1 Pin AMIGA_ADDR_ENABLE 0 0 1 Pin AHIGH_24_ 1 3 1 Pin AHIGH_24_.OE - 1 9 1 Pin FPU_CS- - 1 2 1 Pin DSACK1- - 1 1 1 Pin DSACK1.OE - 1 0 1 Pin AVEC - 2 3 1 Pin E - 0 0 1 Pin RESET - 1 1 1 Pin RESET.OE - 0 0 1 Pin AMIGA_ADDR_ENABLE 2 4 1 Pin AMIGA_BUS_DATA_DIR 1 2 1 Pin AMIGA_BUS_ENABLE_LOW- 2 4 1 Pin AMIGA_BUS_ENABLE_HIGH- 1 13 1 Pin CIIN 1 1 1 Pin CIIN.OE + 1 3 1 Pin A_0_.OE + 3 5 1 Pin A_0_.D + 1 1 1 Pin A_0_.C 1 2 1 Pin SIZE_1_.OE 3 6 1 Pin SIZE_1_.D 1 1 1 Pin SIZE_1_.C - 9 10 1 Pin IPL_030_2_.T + 10 8 1 Pin IPL_030_1_.D- + 1 1 1 Pin IPL_030_1_.C + 10 8 1 Pin IPL_030_0_.D- + 1 1 1 Pin IPL_030_0_.C + 10 8 1 Pin IPL_030_2_.D- 1 1 1 Pin IPL_030_2_.C 1 2 1 Pin RW_000.OE 4 8 1 Pin RW_000.D- 1 1 1 Pin RW_000.C 2 6 1 Pin BG_000.D- 1 1 1 Pin BG_000.C + 3 6 1 Pin BGACK_030.D + 1 1 1 Pin BGACK_030.C 1 2 1 Pin SIZE_0_.OE 3 6 1 Pin SIZE_0_.D- 1 1 1 Pin SIZE_0_.C - 3 6 1 Pin BGACK_030.D - 1 1 1 Pin BGACK_030.C - 1 1 1 Pin CLK_EXP.D - 1 1 1 Pin CLK_EXP.C 3 9 1 Pin VMA.T 1 1 1 Pin VMA.C 1 2 1 Pin RW.OE 2 5 1 Pin RW.D- 1 1 1 Pin RW.C - 1 3 1 Pin A_0_.OE - 3 5 1 Pin A_0_.D - 1 1 1 Pin A_0_.C - 9 10 1 Pin IPL_030_1_.T - 1 1 1 Pin IPL_030_1_.C - 9 10 1 Pin IPL_030_0_.T - 1 1 1 Pin IPL_030_0_.C + 4 5 1 Node cpu_est_1_.D + 1 1 1 Node cpu_est_1_.C 1 1 1 NodeX1 cpu_est_2_.D.X1 1 4 1 NodeX2 cpu_est_2_.D.X2 1 1 1 Node cpu_est_2_.C @@ -1122,8 +1132,6 @@ PostFit_Equations 1 1 1 Node cpu_est_3_.C 3 3 1 Node cpu_est_0_.D 1 1 1 Node cpu_est_0_.C - 4 5 1 Node cpu_est_1_.D - 1 1 1 Node cpu_est_1_.C 2 5 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- 1 1 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.C 2 5 1 Node inst_AMIGA_BUS_ENABLE_DMA_LOW.D- @@ -1134,14 +1142,10 @@ PostFit_Equations 1 1 1 Node inst_AS_030_000_SYNC.C 1 2 1 Node inst_BGACK_030_INT_D.D- 1 1 1 Node inst_BGACK_030_INT_D.C - 7 9 1 Node inst_AS_000_DMA.D + 6 9 1 Node inst_AS_000_DMA.D 1 1 1 Node inst_AS_000_DMA.C 9 12 1 Node inst_DS_000_DMA.D 1 1 1 Node inst_DS_000_DMA.C - 3 6 1 Node CYCLE_DMA_0_.D - 1 1 1 Node CYCLE_DMA_0_.C - 4 7 1 Node CYCLE_DMA_1_.D - 1 1 1 Node CYCLE_DMA_1_.C 1 2 1 Node inst_VPA_D.D- 1 1 1 Node inst_VPA_D.C 1 1 1 Node CLK_000_D_3_.D @@ -1150,6 +1154,10 @@ PostFit_Equations 1 1 1 Node inst_DTACK_D0.C 2 7 1 Node inst_RESET_OUT.D 1 1 1 Node inst_RESET_OUT.C + 6 11 1 Node CLK_030_PE_1_.D + 1 1 1 Node CLK_030_PE_1_.C + 2 3 1 Node inst_AMIGA_DS.D + 1 1 1 Node inst_AMIGA_DS.C 1 1 1 Node CLK_000_D_1_.D 1 1 1 Node CLK_000_D_1_.C 1 1 1 Node CLK_000_D_0_.D @@ -1182,6 +1190,12 @@ PostFit_Equations 1 1 1 Node SM_AMIGA_1_.C 3 5 1 Node SM_AMIGA_0_.D 1 1 1 Node SM_AMIGA_0_.C + 4 7 1 Node CYCLE_DMA_0_.D + 1 1 1 Node CYCLE_DMA_0_.C + 2 7 1 Node CYCLE_DMA_1_.D + 1 1 1 Node CYCLE_DMA_1_.C + 9 11 1 Node CLK_030_PE_0_.D- + 1 1 1 Node CLK_030_PE_0_.C 4 6 1 Node RST_DLY_0_.D 1 1 1 Node RST_DLY_0_.C 2 6 1 NodeX1 RST_DLY_1_.D.X1 @@ -1189,8 +1203,6 @@ PostFit_Equations 1 1 1 Node RST_DLY_1_.C 2 6 1 Node RST_DLY_2_.D 1 1 1 Node RST_DLY_2_.C - 8 10 1 Node inst_CLK_030_H.D - 1 1 1 Node inst_CLK_030_H.C 2 6 1 Node inst_DSACK1_INT.D- 1 1 1 Node inst_DSACK1_INT.C 2 6 1 Node inst_AS_000_INT.D- @@ -1204,11 +1216,13 @@ PostFit_Equations 3 9 1 NodeX1 SM_AMIGA_i_7_.T.X1 1 9 1 NodeX2 SM_AMIGA_i_7_.T.X2 1 1 1 Node SM_AMIGA_i_7_.C + 1 1 1 Node CLK_OUT_INTreg.D + 1 1 1 Node CLK_OUT_INTreg.C 2 14 1 Node CIIN_0 ========= - 269 P-Term Total: 269 + 281 P-Term Total: 281 Total Pins: 61 - Total Nodes: 44 + Total Nodes: 47 Average P-Term/Output: 2 @@ -1216,7 +1230,7 @@ Equations: AHIGH_31_ = (0); -AHIGH_31_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +AHIGH_31_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); !AS_030 = (!inst_AS_000_DMA.Q & !AS_000.PIN); @@ -1242,37 +1256,9 @@ BERR = (0); BERR.OE = (FC_1_ & BGACK_000 & FPU_SENSE & !A_DECODE_19_ & !A_DECODE_18_ & A_DECODE_17_ & !A_DECODE_16_ & FC_0_ & !AS_030.PIN); -AHIGH_30_ = (0); +CLK_DIV_OUT = (CLK_OUT_INTreg.Q); -AHIGH_30_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); - -AHIGH_29_ = (0); - -AHIGH_29_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); - -AHIGH_28_ = (0); - -AHIGH_28_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); - -AHIGH_27_ = (0); - -AHIGH_27_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); - -AHIGH_26_ = (0); - -AHIGH_26_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); - -CLK_DIV_OUT.D = (inst_CLK_OUT_PRE_D.Q); - -CLK_DIV_OUT.C = (CLK_OSZI); - -AHIGH_25_ = (0); - -AHIGH_25_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); - -AHIGH_24_ = (0); - -AHIGH_24_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +CLK_EXP = (CLK_OUT_INTreg.Q); !FPU_CS = (FC_1_ & BGACK_000 & !FPU_SENSE & !A_DECODE_19_ & !A_DECODE_18_ & A_DECODE_17_ & !A_DECODE_16_ & FC_0_ & !AS_030.PIN); @@ -1280,17 +1266,45 @@ AHIGH_24_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); DSACK1.OE = (nEXP_SPACE); +DTACK = (0); + +DTACK.OE = (!inst_AS_000_DMA.Q); + AVEC = (1); -E = (cpu_est_2_.Q & !cpu_est_3_.Q & cpu_est_1_.Q - # !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_1_.Q); +E = (!cpu_est_1_.Q & !cpu_est_2_.Q & cpu_est_3_.Q + # cpu_est_1_.Q & cpu_est_2_.Q & !cpu_est_3_.Q); -RESET = (0); +AHIGH_30_ = (0); -RESET.OE = (!inst_RESET_OUT.Q); +AHIGH_30_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); + +AHIGH_29_ = (0); + +AHIGH_29_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); + +AHIGH_28_ = (0); + +AHIGH_28_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); + +AHIGH_27_ = (0); + +AHIGH_27_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); + +AHIGH_26_ = (0); + +AHIGH_26_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); + +AHIGH_25_ = (0); + +AHIGH_25_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); AMIGA_ADDR_ENABLE = (0); +AHIGH_24_ = (0); + +AHIGH_24_.OE = (!nEXP_SPACE & RESET & !BGACK_030.Q); + AMIGA_BUS_DATA_DIR = (BGACK_030.Q & !RW_000.PIN # !nEXP_SPACE & !BGACK_030.Q & !AS_000.PIN & RW_000.PIN); @@ -1303,6 +1317,14 @@ CIIN = (A_DECODE_23_ & A_DECODE_22_ & A_DECODE_21_ & A_DECODE_20_ & !inst_AS_030 CIIN.OE = (CIIN_0); +A_0_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); + +A_0_.D = (!RST + # !BGACK_030.Q & UDS_000.PIN + # BGACK_030.Q & inst_BGACK_030_INT_D.Q & A_0_.Q); + +A_0_.C = (CLK_OSZI); + SIZE_1_.OE = (!nEXP_SPACE & !BGACK_030.Q); SIZE_1_.D = (!RST @@ -1311,15 +1333,42 @@ SIZE_1_.D = (!RST SIZE_1_.C = (CLK_OSZI); -IPL_030_2_.T = (!RST & !IPL_030_2_.Q - # IPL_2_ & IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & IPL_D0_1_.Q & IPL_D0_2_.Q & !IPL_030_2_.Q - # IPL_2_ & IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & IPL_D0_1_.Q & IPL_D0_2_.Q & !IPL_030_2_.Q - # IPL_2_ & !IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q & !IPL_030_2_.Q - # IPL_2_ & !IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q & !IPL_030_2_.Q - # !IPL_2_ & RST & IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q & IPL_030_2_.Q - # !IPL_2_ & RST & IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q & IPL_030_2_.Q - # !IPL_2_ & RST & !IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q & IPL_030_2_.Q - # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q & IPL_030_2_.Q); +!IPL_030_1_.D = (RST & !IPL_1_ & !IPL_030_1_.Q + # RST & !IPL_D0_1_.Q & !IPL_030_1_.Q + # RST & !IPL_0_ & IPL_D0_0_.Q & !IPL_030_1_.Q + # RST & IPL_0_ & !IPL_D0_0_.Q & !IPL_030_1_.Q + # !IPL_2_ & RST & IPL_D0_2_.Q & !IPL_030_1_.Q + # IPL_2_ & RST & !IPL_D0_2_.Q & !IPL_030_1_.Q + # IPL_2_ & RST & !IPL_1_ & IPL_0_ & IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q + # IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q + # !IPL_2_ & RST & !IPL_1_ & IPL_0_ & IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q + # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q); + +IPL_030_1_.C = (CLK_OSZI); + +!IPL_030_0_.D = (RST & !IPL_0_ & !IPL_030_0_.Q + # RST & !IPL_D0_0_.Q & !IPL_030_0_.Q + # RST & !IPL_1_ & IPL_D0_1_.Q & !IPL_030_0_.Q + # RST & IPL_1_ & !IPL_D0_1_.Q & !IPL_030_0_.Q + # !IPL_2_ & RST & IPL_D0_2_.Q & !IPL_030_0_.Q + # IPL_2_ & RST & !IPL_D0_2_.Q & !IPL_030_0_.Q + # IPL_2_ & RST & IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & IPL_D0_1_.Q & IPL_D0_2_.Q + # IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q + # !IPL_2_ & RST & IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q + # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q); + +IPL_030_0_.C = (CLK_OSZI); + +!IPL_030_2_.D = (!IPL_2_ & RST & !IPL_030_2_.Q + # RST & !IPL_D0_2_.Q & !IPL_030_2_.Q + # RST & !IPL_0_ & IPL_D0_0_.Q & !IPL_030_2_.Q + # RST & IPL_0_ & !IPL_D0_0_.Q & !IPL_030_2_.Q + # RST & !IPL_1_ & IPL_D0_1_.Q & !IPL_030_2_.Q + # RST & IPL_1_ & !IPL_D0_1_.Q & !IPL_030_2_.Q + # !IPL_2_ & RST & IPL_1_ & IPL_0_ & IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q + # !IPL_2_ & RST & IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q + # !IPL_2_ & RST & !IPL_1_ & IPL_0_ & IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q + # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q); IPL_030_2_.C = (CLK_OSZI); @@ -1337,6 +1386,12 @@ RW_000.C = (CLK_OSZI); BG_000.C = (CLK_OSZI); +BGACK_030.D = (!RST + # BGACK_000 & BGACK_030.Q + # BGACK_000 & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & AS_000.PIN); + +BGACK_030.C = (CLK_OSZI); + SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q); !SIZE_0_.D = (RST & BGACK_030.Q & !inst_BGACK_030_INT_D.Q @@ -1345,19 +1400,9 @@ SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q); SIZE_0_.C = (CLK_OSZI); -BGACK_030.D = (!RST - # BGACK_000 & BGACK_030.Q - # BGACK_000 & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & AS_000.PIN); - -BGACK_030.C = (CLK_OSZI); - -CLK_EXP.D = (inst_CLK_OUT_PRE_D.Q); - -CLK_EXP.C = (CLK_OSZI); - VMA.T = (!RST & !VMA.Q - # !VMA.Q & !cpu_est_2_.Q & !cpu_est_3_.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !CLK_000_D_1_.Q & CLK_000_D_0_.Q - # RST & VMA.Q & !cpu_est_2_.Q & !cpu_est_3_.Q & cpu_est_0_.Q & cpu_est_1_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); + # !VMA.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !cpu_est_3_.Q & !cpu_est_0_.Q & !CLK_000_D_1_.Q & CLK_000_D_0_.Q + # RST & VMA.Q & cpu_est_1_.Q & !cpu_est_2_.Q & !cpu_est_3_.Q & cpu_est_0_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); VMA.C = (CLK_OSZI); @@ -1368,48 +1413,23 @@ RW.OE = (!BGACK_030.Q & inst_RESET_OUT.Q); RW.C = (CLK_OSZI); -A_0_.OE = (!nEXP_SPACE & !BGACK_030.Q & inst_RESET_OUT.Q); +cpu_est_1_.D = (cpu_est_1_.Q & !cpu_est_0_.Q + # cpu_est_1_.Q & !CLK_000_D_1_.Q + # cpu_est_1_.Q & CLK_000_D_0_.Q + # !cpu_est_1_.Q & !cpu_est_3_.Q & cpu_est_0_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); -A_0_.D = (!RST - # !BGACK_030.Q & UDS_000.PIN - # BGACK_030.Q & inst_BGACK_030_INT_D.Q & A_0_.Q); - -A_0_.C = (CLK_OSZI); - -IPL_030_1_.T = (!RST & !IPL_030_1_.Q - # IPL_2_ & IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & IPL_D0_1_.Q & IPL_D0_2_.Q & !IPL_030_1_.Q - # IPL_2_ & IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & IPL_D0_1_.Q & IPL_D0_2_.Q & !IPL_030_1_.Q - # !IPL_2_ & IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q & !IPL_030_1_.Q - # !IPL_2_ & IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q & !IPL_030_1_.Q - # IPL_2_ & RST & !IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q & IPL_030_1_.Q - # IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q & IPL_030_1_.Q - # !IPL_2_ & RST & !IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q & IPL_030_1_.Q - # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q & IPL_030_1_.Q); - -IPL_030_1_.C = (CLK_OSZI); - -IPL_030_0_.T = (!RST & !IPL_030_0_.Q - # IPL_2_ & IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & IPL_D0_1_.Q & IPL_D0_2_.Q & !IPL_030_0_.Q - # IPL_2_ & !IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q & !IPL_030_0_.Q - # !IPL_2_ & IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q & !IPL_030_0_.Q - # !IPL_2_ & !IPL_1_ & IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q & !IPL_030_0_.Q - # IPL_2_ & RST & IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & IPL_D0_1_.Q & IPL_D0_2_.Q & IPL_030_0_.Q - # IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & !IPL_D0_1_.Q & IPL_D0_2_.Q & IPL_030_0_.Q - # !IPL_2_ & RST & IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & IPL_D0_1_.Q & !IPL_D0_2_.Q & IPL_030_0_.Q - # !IPL_2_ & RST & !IPL_1_ & !IPL_0_ & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !IPL_D0_0_.Q & !IPL_D0_1_.Q & !IPL_D0_2_.Q & IPL_030_0_.Q); - -IPL_030_0_.C = (CLK_OSZI); +cpu_est_1_.C = (CLK_OSZI); cpu_est_2_.D.X1 = (cpu_est_2_.Q); -cpu_est_2_.D.X2 = (cpu_est_0_.Q & cpu_est_1_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); +cpu_est_2_.D.X2 = (cpu_est_1_.Q & cpu_est_0_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); cpu_est_2_.C = (CLK_OSZI); cpu_est_3_.D = (cpu_est_3_.Q & !CLK_000_D_1_.Q # cpu_est_3_.Q & CLK_000_D_0_.Q # !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_0_.Q - # cpu_est_2_.Q & cpu_est_0_.Q & cpu_est_1_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); + # cpu_est_1_.Q & cpu_est_2_.Q & cpu_est_0_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); cpu_est_3_.C = (CLK_OSZI); @@ -1419,13 +1439,6 @@ cpu_est_0_.D = (cpu_est_0_.Q & !CLK_000_D_1_.Q cpu_est_0_.C = (CLK_OSZI); -cpu_est_1_.D = (!cpu_est_0_.Q & cpu_est_1_.Q - # cpu_est_1_.Q & !CLK_000_D_1_.Q - # cpu_est_1_.Q & CLK_000_D_0_.Q - # !cpu_est_3_.Q & cpu_est_0_.Q & !cpu_est_1_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q); - -cpu_est_1_.C = (CLK_OSZI); - !inst_AMIGA_BUS_ENABLE_DMA_HIGH.D = (RST & !A_1_ & !BGACK_030.Q # RST & BGACK_030.Q & !inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q & inst_BGACK_030_INT_D.Q); @@ -1455,40 +1468,26 @@ inst_AS_030_000_SYNC.C = (CLK_OSZI); inst_BGACK_030_INT_D.C = (CLK_OSZI); inst_AS_000_DMA.D = (!RST - # BGACK_030.Q + # inst_AMIGA_DS.Q # AS_000.PIN - # !CLK_030 & inst_AS_000_DMA.Q - # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q # !CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q - # UDS_000.PIN & LDS_000.PIN); + # inst_AS_000_DMA.Q & inst_CLK_OUT_PRE_D.Q & !CLK_OUT_INTreg.Q + # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !RW_000.PIN); inst_AS_000_DMA.C = (CLK_OSZI); inst_DS_000_DMA.D = (!RST - # BGACK_030.Q + # inst_AMIGA_DS.Q # AS_000.PIN - # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q # !CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q - # UDS_000.PIN & LDS_000.PIN # !CLK_030 & inst_DS_000_DMA.Q & !RW_000.PIN - # inst_DS_000_DMA.Q & !inst_CLK_030_H.Q & !RW_000.PIN - # CLK_030 & inst_AS_000_DMA.Q & inst_CLK_030_H.Q & !RW_000.PIN); + # inst_DS_000_DMA.Q & CLK_030_PE_1_.Q & !RW_000.PIN + # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !RW_000.PIN + # inst_DS_000_DMA.Q & !CLK_030_PE_0_.Q & !RW_000.PIN + # inst_DS_000_DMA.Q & inst_CLK_OUT_PRE_D.Q & !CLK_OUT_INTreg.Q & RW_000.PIN); inst_DS_000_DMA.C = (CLK_OSZI); -CYCLE_DMA_0_.D = (RST & !BGACK_030.Q & CYCLE_DMA_0_.Q & CLK_000_D_1_.Q & !AS_000.PIN - # RST & !BGACK_030.Q & CYCLE_DMA_0_.Q & !CLK_000_D_0_.Q & !AS_000.PIN - # RST & !BGACK_030.Q & !CYCLE_DMA_0_.Q & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !AS_000.PIN); - -CYCLE_DMA_0_.C = (CLK_OSZI); - -CYCLE_DMA_1_.D = (RST & !BGACK_030.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !AS_000.PIN - # RST & !BGACK_030.Q & CYCLE_DMA_1_.Q & CLK_000_D_1_.Q & !AS_000.PIN - # RST & !BGACK_030.Q & CYCLE_DMA_1_.Q & !CLK_000_D_0_.Q & !AS_000.PIN - # RST & !BGACK_030.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & !AS_000.PIN); - -CYCLE_DMA_1_.C = (CLK_OSZI); - !inst_VPA_D.D = (!VPA & RST); inst_VPA_D.C = (CLK_OSZI); @@ -1497,7 +1496,7 @@ CLK_000_D_3_.D = (CLK_000_D_2_.Q); CLK_000_D_3_.C = (CLK_OSZI); -!inst_DTACK_D0.D = (!DTACK & RST); +!inst_DTACK_D0.D = (RST & !DTACK.PIN); inst_DTACK_D0.C = (CLK_OSZI); @@ -1506,6 +1505,20 @@ inst_RESET_OUT.D = (RST & inst_RESET_OUT.Q inst_RESET_OUT.C = (CLK_OSZI); +CLK_030_PE_1_.D = (RST & CLK_030_PE_1_.Q & !inst_AMIGA_DS.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !AS_000.PIN + # RST & CLK_030_PE_1_.Q & !inst_AMIGA_DS.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & !AS_000.PIN + # RST & CLK_030_PE_1_.Q & !inst_AMIGA_DS.Q & CYCLE_DMA_1_.Q & !AS_000.PIN & RW_000.PIN + # RST & !inst_AS_000_DMA.Q & !inst_AMIGA_DS.Q & inst_CLK_OUT_PRE_D.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & CLK_030_PE_0_.Q & !CLK_OUT_INTreg.Q & !AS_000.PIN + # RST & !inst_AS_000_DMA.Q & !inst_AMIGA_DS.Q & inst_CLK_OUT_PRE_D.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & CLK_030_PE_0_.Q & !CLK_OUT_INTreg.Q & !AS_000.PIN + # RST & !inst_AS_000_DMA.Q & !inst_AMIGA_DS.Q & inst_CLK_OUT_PRE_D.Q & CYCLE_DMA_1_.Q & CLK_030_PE_0_.Q & !CLK_OUT_INTreg.Q & !AS_000.PIN & RW_000.PIN); + +CLK_030_PE_1_.C = (CLK_OSZI); + +inst_AMIGA_DS.D = (!RST + # UDS_000.PIN & LDS_000.PIN); + +inst_AMIGA_DS.C = (CLK_OSZI); + CLK_000_D_1_.D = (CLK_000_D_0_.Q); CLK_000_D_1_.C = (CLK_OSZI); @@ -1583,6 +1596,30 @@ SM_AMIGA_0_.D = (RST & CLK_000_D_1_.Q & SM_AMIGA_0_.Q SM_AMIGA_0_.C = (CLK_OSZI); +CYCLE_DMA_0_.D = (RST & !BGACK_030.Q & !CLK_000_D_1_.Q & CYCLE_DMA_0_.Q & !AS_000.PIN + # RST & !BGACK_030.Q & CLK_000_D_0_.Q & CYCLE_DMA_0_.Q & !AS_000.PIN + # RST & !BGACK_030.Q & CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !AS_000.PIN + # RST & !BGACK_030.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & !CYCLE_DMA_0_.Q & !AS_000.PIN); + +CYCLE_DMA_0_.C = (CLK_OSZI); + +CYCLE_DMA_1_.D = (RST & !BGACK_030.Q & CYCLE_DMA_1_.Q & !AS_000.PIN + # RST & !BGACK_030.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & CYCLE_DMA_0_.Q & !AS_000.PIN); + +CYCLE_DMA_1_.C = (CLK_OSZI); + +!CLK_030_PE_0_.D = (!RST + # inst_AMIGA_DS.Q + # AS_000.PIN + # !CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q + # inst_AS_000_DMA.Q & !CLK_030_PE_0_.Q + # !inst_CLK_OUT_PRE_D.Q & !CLK_030_PE_0_.Q + # !CLK_030_PE_0_.Q & CLK_OUT_INTreg.Q + # CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !RW_000.PIN + # !inst_AS_000_DMA.Q & !CLK_030_PE_1_.Q & inst_CLK_OUT_PRE_D.Q & CLK_030_PE_0_.Q & !CLK_OUT_INTreg.Q); + +CLK_030_PE_0_.C = (CLK_OSZI); + RST_DLY_0_.D = (RST & !CLK_000_D_1_.Q & RST_DLY_0_.Q # RST & CLK_000_D_0_.Q & RST_DLY_0_.Q # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & !RST_DLY_0_.Q @@ -1602,17 +1639,6 @@ RST_DLY_2_.D = (RST & RST_DLY_2_.Q RST_DLY_2_.C = (CLK_OSZI); -inst_CLK_030_H.D = (RST & !BGACK_030.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & inst_CLK_030_H.Q & !AS_000.PIN & !UDS_000.PIN - # RST & !BGACK_030.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & inst_CLK_030_H.Q & !AS_000.PIN & !UDS_000.PIN - # RST & !BGACK_030.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & inst_CLK_030_H.Q & !AS_000.PIN & !LDS_000.PIN - # RST & !BGACK_030.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & inst_CLK_030_H.Q & !AS_000.PIN & !LDS_000.PIN - # !CLK_030 & RST & !BGACK_030.Q & !inst_AS_000_DMA.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !AS_000.PIN & !UDS_000.PIN - # !CLK_030 & RST & !BGACK_030.Q & !inst_AS_000_DMA.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & !AS_000.PIN & !UDS_000.PIN - # !CLK_030 & RST & !BGACK_030.Q & !inst_AS_000_DMA.Q & !CYCLE_DMA_0_.Q & CYCLE_DMA_1_.Q & !AS_000.PIN & !LDS_000.PIN - # !CLK_030 & RST & !BGACK_030.Q & !inst_AS_000_DMA.Q & CYCLE_DMA_0_.Q & !CYCLE_DMA_1_.Q & !AS_000.PIN & !LDS_000.PIN); - -inst_CLK_030_H.C = (CLK_OSZI); - !inst_DSACK1_INT.D = (RST & !inst_DSACK1_INT.Q & !AS_030.PIN # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_1_.Q); @@ -1633,7 +1659,7 @@ SM_AMIGA_3_.T = (!RST & SM_AMIGA_3_.Q # CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & !BERR.PIN # inst_VPA_D.Q & !inst_DTACK_D0.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q # RST & !CLK_000_D_1_.Q & CLK_000_D_0_.Q & SM_AMIGA_4_.Q & !SM_AMIGA_3_.Q - # !VMA.Q & !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); + # !VMA.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); SM_AMIGA_3_.C = (CLK_OSZI); @@ -1641,7 +1667,7 @@ SM_AMIGA_2_.D = (RST & CLK_000_D_1_.Q & SM_AMIGA_2_.Q # RST & !CLK_000_D_0_.Q & SM_AMIGA_2_.Q # RST & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q & !BERR.PIN # RST & inst_VPA_D.Q & !inst_DTACK_D0.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q - # RST & !VMA.Q & !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); + # RST & !VMA.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & cpu_est_3_.Q & !cpu_est_0_.Q & !inst_VPA_D.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q & SM_AMIGA_3_.Q); SM_AMIGA_2_.C = (CLK_OSZI); @@ -1653,6 +1679,10 @@ SM_AMIGA_i_7_.T.X2 = (nEXP_SPACE & RST & !inst_AS_030_000_SYNC.Q & !CLK_000_D_3_ SM_AMIGA_i_7_.C = (CLK_OSZI); +CLK_OUT_INTreg.D = (inst_CLK_OUT_PRE_D.Q); + +CLK_OUT_INTreg.C = (CLK_OSZI); + CIIN_0 = (nEXP_SPACE # A_DECODE_23_ & A_DECODE_22_ & A_DECODE_21_ & A_DECODE_20_ & !inst_AS_030_D0.Q & !AHIGH_24_.PIN & !AHIGH_25_.PIN & !AHIGH_26_.PIN & !AHIGH_27_.PIN & !AHIGH_28_.PIN & !AHIGH_29_.PIN & !AHIGH_30_.PIN & !AHIGH_31_.PIN); diff --git a/Logic/68030_tk.tal b/Logic/68030_tk.tal index eb85c47..36687be 100644 --- a/Logic/68030_tk.tal +++ b/Logic/68030_tk.tal @@ -44,18 +44,25 @@ AMIGA_BUS_ENABLE_HIGH .. .. .. .. 1 2 .. .. inst_AS_030_D0 1 2 1 1 .. .. 1 1 inst_AS_030_000_SYNC 1 2 1 1 .. .. 1 1 inst_DS_000_DMA 1 2 1 1 .. .. .. .. - CYCLE_DMA_0_ 1 2 .. .. .. .. 1 1 - CYCLE_DMA_1_ 1 2 .. .. .. .. 1 1 + CLK_030_PE_1_ 1 2 .. .. .. .. 1 1 inst_LDS_000_INT 1 1 1 1 .. .. 2 2 inst_DS_000_ENABLE 1 2 1 1 .. .. 2 2 inst_UDS_000_INT 1 1 1 1 .. .. 2 2 - inst_CLK_030_H 1 2 .. .. .. .. 1 1 + CYCLE_DMA_0_ 1 2 .. .. .. .. 1 1 + CYCLE_DMA_1_ 1 2 .. .. .. .. 1 1 + CLK_030_PE_0_ 1 2 .. .. .. .. 1 1 inst_DSACK1_INT 1 2 1 1 .. .. .. .. AS_030 .. .. .. .. 1 1 .. .. AS_000 .. .. .. .. 1 1 .. .. CIIN .. .. .. .. 1 1 .. .. + A_0_ 1 1 0 0 .. .. 1 1 + RN_A_0_ 1 1 0 0 .. .. 1 1 SIZE_1_ 1 1 0 0 .. .. 1 1 RN_SIZE_1_ 1 1 0 0 .. .. 1 1 + IPL_030_1_ 1 1 0 0 .. .. 1 1 + RN_IPL_030_1_ 1 1 0 0 .. .. 1 1 + IPL_030_0_ 1 1 0 0 .. .. 1 1 + RN_IPL_030_0_ 1 1 0 0 .. .. 1 1 IPL_030_2_ 1 1 0 0 .. .. 1 1 RN_IPL_030_2_ 1 1 0 0 .. .. 1 1 RW_000 1 1 0 0 .. .. 1 1 @@ -68,16 +75,10 @@ inst_UDS_000_INT 1 1 1 1 .. .. 2 2 RN_VMA 1 1 0 0 .. .. 1 1 RW 1 1 0 0 .. .. 1 1 RN_RW 1 1 0 0 .. .. 1 1 - A_0_ 1 1 0 0 .. .. 1 1 - RN_A_0_ 1 1 0 0 .. .. 1 1 - IPL_030_1_ 1 1 0 0 .. .. 1 1 - RN_IPL_030_1_ 1 1 0 0 .. .. 1 1 - IPL_030_0_ 1 1 0 0 .. .. 1 1 - RN_IPL_030_0_ 1 1 0 0 .. .. 1 1 + cpu_est_1_ .. .. 1 1 .. .. 1 1 cpu_est_2_ .. .. 1 1 .. .. 1 1 cpu_est_3_ .. .. 1 1 .. .. 1 1 cpu_est_0_ .. .. .. .. .. .. 1 1 - cpu_est_1_ .. .. 1 1 .. .. 1 1 inst_AMIGA_BUS_ENABLE_DMA_HIGH 1 1 1 1 .. .. .. .. inst_AMIGA_BUS_ENABLE_DMA_LOW 1 1 1 1 .. .. .. .. inst_BGACK_030_INT_D 1 1 .. .. .. .. 1 1 @@ -85,6 +86,7 @@ inst_BGACK_030_INT_D 1 1 .. .. .. .. 1 1 CLK_000_D_3_ .. .. .. .. .. .. 1 1 inst_DTACK_D0 1 1 .. .. .. .. 1 1 inst_RESET_OUT 1 1 .. .. .. .. .. .. + inst_AMIGA_DS 1 1 .. .. .. .. 1 1 CLK_000_D_1_ .. .. .. .. .. .. 1 1 CLK_000_D_0_ 1 1 .. .. .. .. 1 1 inst_CLK_OUT_PRE_50 .. .. .. .. .. .. 1 1 @@ -105,4 +107,5 @@ inst_CLK_OUT_PRE_D .. .. .. .. .. .. 1 1 SM_AMIGA_3_ 1 1 .. .. .. .. 1 1 SM_AMIGA_2_ 1 1 .. .. .. .. 1 1 SM_AMIGA_i_7_ 1 1 .. .. .. .. 1 1 + CLK_OUT_INTreg .. .. 1 1 .. .. 1 1 CIIN_0 .. .. .. .. 1 1 .. .. \ No newline at end of file diff --git a/Logic/68030_tk.tt2 b/Logic/68030_tk.tt2 index 7002c73..b99de3c 100644 --- a/Logic/68030_tk.tt2 +++ b/Logic/68030_tk.tt2 @@ -1,495 +1,518 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Wed Oct 26 22:26:25 2016 +#$ DATE Fri Nov 18 19:32:36 2016 #$ MODULE 68030_tk -#$ PINS 61 AHIGH_31_ A_DECODE_23_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 AHIGH_30_ BGACK_000 AHIGH_29_ CLK_030 AHIGH_28_ CLK_000 AHIGH_27_ CLK_OSZI AHIGH_26_ CLK_DIV_OUT AHIGH_25_ AHIGH_24_ FPU_CS A_DECODE_22_ FPU_SENSE A_DECODE_21_ DSACK1 A_DECODE_20_ DTACK A_DECODE_19_ AVEC A_DECODE_18_ E A_DECODE_17_ VPA A_DECODE_16_ RST RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_1_ IPL_0_ FC_0_ A_1_ SIZE_1_ IPL_030_2_ RW_000 BG_000 SIZE_0_ BGACK_030 CLK_EXP VMA RW A_0_ IPL_030_1_ IPL_030_0_ -#$ NODES 43 cpu_est_2_ cpu_est_3_ cpu_est_0_ cpu_est_1_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA CYCLE_DMA_0_ CYCLE_DMA_1_ inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_RESET_OUT CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_LDS_000_INT inst_DS_000_ENABLE inst_UDS_000_INT SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_CLK_030_H inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ +#$ PINS 61 AHIGH_31_ IPL_1_ IPL_0_ A_DECODE_23_ FC_0_ A_1_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 DTACK AVEC E AHIGH_30_ VPA AHIGH_29_ AHIGH_28_ RST AHIGH_27_ RESET AHIGH_26_ AHIGH_25_ AMIGA_ADDR_ENABLE AHIGH_24_ AMIGA_BUS_DATA_DIR A_DECODE_22_ AMIGA_BUS_ENABLE_LOW A_DECODE_21_ AMIGA_BUS_ENABLE_HIGH A_DECODE_20_ CIIN A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ A_0_ SIZE_1_ IPL_030_1_ IPL_030_0_ IPL_030_2_ RW_000 BG_000 BGACK_030 SIZE_0_ VMA RW +#$ NODES 46 cpu_est_1_ cpu_est_2_ cpu_est_3_ cpu_est_0_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_RESET_OUT CLK_030_PE_1_ inst_AMIGA_DS CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_LDS_000_INT inst_DS_000_ENABLE inst_UDS_000_INT SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ CYCLE_DMA_0_ CYCLE_DMA_1_ CLK_030_PE_0_ RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ CLK_OUT_INTreg .type fr -.i 96 -.o 158 -.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q VMA.Q cpu_est_2_.Q cpu_est_3_.Q cpu_est_0_.Q cpu_est_1_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_4_.Q inst_LDS_000_INT.Q inst_DS_000_ENABLE.Q inst_UDS_000_INT.Q SM_AMIGA_6_.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q SIZE_0_.Q SIZE_1_.Q RW_000.Q RW.Q RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q inst_CLK_030_H.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q BG_000.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN -.ob DS_030 FPU_CS DSACK1 AVEC E RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_D0_0_.C IPL_D0_1_.C IPL_D0_2_.C SM_AMIGA_i_7_.C SM_AMIGA_6_.C SM_AMIGA_5_.C SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.C SM_AMIGA_1_.C SM_AMIGA_0_.C cpu_est_0_.C cpu_est_1_.C cpu_est_2_.C cpu_est_3_.C IPL_030_0_.C IPL_030_1_.C IPL_030_2_.C RST_DLY_2_.C CLK_000_D_0_.C CLK_000_D_1_.C CLK_000_D_2_.C CLK_000_D_3_.C CLK_000_D_4_.C CYCLE_DMA_0_.C CYCLE_DMA_1_.C SIZE_0_.C SIZE_1_.C RST_DLY_0_.C RST_DLY_1_.C RW_000.C inst_AS_030_000_SYNC.C inst_LDS_000_INT.C BGACK_030.C inst_AS_000_DMA.C inst_DS_000_DMA.C inst_DSACK1_INT.C inst_AS_000_INT.C inst_AS_030_D0.C inst_VPA_D.C inst_DTACK_D0.C inst_CLK_030_H.C inst_RESET_OUT.C inst_DS_000_ENABLE.C BG_000.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.C A_0_.C RW.C VMA.C inst_BGACK_030_INT_D.C CLK_EXP.C inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.C AHIGH_31_ AS_030 AS_000 UDS_000 LDS_000 BERR AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE RESET.OE CIIN.OE CLK_DIV_OUT.C CLK_DIV_OUT.D BGACK_030.D VMA.T cpu_est_2_.D cpu_est_3_.D cpu_est_0_.D cpu_est_1_.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AS_030_D0.D inst_AS_030_000_SYNC.D inst_BGACK_030_INT_D.D inst_AS_000_DMA.D inst_DS_000_DMA.D CYCLE_DMA_0_.D CYCLE_DMA_1_.D inst_VPA_D.D CLK_000_D_3_.D inst_DTACK_D0.D inst_RESET_OUT.D CLK_000_D_1_.D CLK_000_D_0_.D inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_D.D IPL_D0_0_.D IPL_D0_1_.D IPL_D0_2_.D CLK_000_D_2_.D CLK_000_D_4_.D inst_LDS_000_INT.D inst_DS_000_ENABLE.D inst_UDS_000_INT.D SM_AMIGA_6_.D SM_AMIGA_4_.D SM_AMIGA_1_.D SM_AMIGA_0_.D SIZE_0_.D SIZE_1_.D RW_000.D RW.D RST_DLY_0_.D RST_DLY_1_.D RST_DLY_2_.D A_0_.D inst_CLK_030_H.D inst_DSACK1_INT.D inst_AS_000_INT.D SM_AMIGA_5_.D SM_AMIGA_3_.T SM_AMIGA_2_.D SM_AMIGA_i_7_.T BG_000.D CLK_EXP.D IPL_030_0_.T IPL_030_1_.T IPL_030_2_.T -.p 483 ------------------------------------------------------------------------------------------------- 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~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0---------------------------------------------------------------------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------------------------------------------------------1--- ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0----------------------------------------------------------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------1------------------------------------------1-------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------1------------------------------------------1-------------------------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ -------------1------------1-------------0----0-------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ -------------1-------------1------------0----0-------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ -------------1--------------0-----------0----0-------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ -------------1---------------1----------0----0-------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ -------------1----------------1---------0----0-------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ -------------1--------------------------1-1--0-------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ --------------------------1-------------0--------------------------------0---------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ---------------------------1------------0--------------------------------0---------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ----------------------------0-----------0--------------------------------0---------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ -----------------------------1----------0--------------------------------0---------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ------------------------------1---------0--------------------------------0---------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ----------------------------------------1-1------------------------------0---------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ------------------------------------------------------0--0--------------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ -------------1------------------------------01----------1--0--------------1---------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ ---------------------------------------------------------0---------------------1----------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +.i 100 +.o 162 +.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI FPU_SENSE VPA RST RESET A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q VMA.Q cpu_est_1_.Q cpu_est_2_.Q cpu_est_3_.Q cpu_est_0_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q CLK_030_PE_1_.Q inst_AMIGA_DS.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_4_.Q inst_LDS_000_INT.Q inst_DS_000_ENABLE.Q inst_UDS_000_INT.Q SM_AMIGA_6_.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q SIZE_0_.Q SIZE_1_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q CLK_030_PE_0_.Q RW_000.Q RW.Q RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN DTACK.PIN RW.PIN +.ob DS_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 AVEC E AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SM_AMIGA_i_7_.C SM_AMIGA_6_.C SM_AMIGA_5_.C SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.C SM_AMIGA_1_.C SM_AMIGA_0_.C cpu_est_2_.C cpu_est_3_.C IPL_030_0_.C IPL_030_1_.C IPL_030_2_.C IPL_D0_0_.C IPL_D0_1_.C IPL_D0_2_.C CLK_000_D_0_.C CLK_000_D_1_.C CLK_000_D_2_.C CLK_000_D_3_.C CLK_000_D_4_.C CYCLE_DMA_0_.C CYCLE_DMA_1_.C CLK_030_PE_0_.C CLK_030_PE_1_.C SIZE_0_.C SIZE_1_.C cpu_est_0_.C cpu_est_1_.C RST_DLY_0_.C RST_DLY_1_.C RST_DLY_2_.C inst_DS_000_DMA.C inst_DSACK1_INT.C inst_AS_000_INT.C inst_AMIGA_DS.C inst_AS_030_D0.C inst_DTACK_D0.C inst_VPA_D.C inst_RESET_OUT.C inst_DS_000_ENABLE.C BG_000.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.C A_0_.C RW.C VMA.C RW_000.C inst_AS_030_000_SYNC.C inst_LDS_000_INT.C BGACK_030.C inst_AS_000_DMA.C inst_BGACK_030_INT_D.C CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.C AHIGH_31_ AS_030 AS_000 UDS_000 LDS_000 BERR DTACK AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE DTACK.OE RW.OE DS_030.OE DSACK1.OE CIIN.OE BGACK_030.D VMA.T cpu_est_1_.D cpu_est_2_.D cpu_est_3_.D cpu_est_0_.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AS_030_D0.D inst_AS_030_000_SYNC.D inst_BGACK_030_INT_D.D inst_AS_000_DMA.D inst_DS_000_DMA.D inst_VPA_D.D CLK_000_D_3_.D inst_DTACK_D0.D inst_RESET_OUT.D CLK_030_PE_1_.D inst_AMIGA_DS.D CLK_000_D_1_.D CLK_000_D_0_.D inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_D.D IPL_D0_0_.D IPL_D0_1_.D IPL_D0_2_.D CLK_000_D_2_.D CLK_000_D_4_.D inst_LDS_000_INT.D inst_DS_000_ENABLE.D inst_UDS_000_INT.D SM_AMIGA_6_.D SM_AMIGA_4_.D SM_AMIGA_1_.D SM_AMIGA_0_.D SIZE_0_.D SIZE_1_.D CYCLE_DMA_0_.D CYCLE_DMA_1_.D CLK_030_PE_0_.D RW_000.D RW.D RST_DLY_0_.D RST_DLY_1_.D RST_DLY_2_.D A_0_.D inst_DSACK1_INT.D inst_AS_000_INT.D SM_AMIGA_5_.D SM_AMIGA_3_.T SM_AMIGA_2_.D SM_AMIGA_i_7_.T BG_000.D CLK_OUT_INTreg.D IPL_030_0_.D IPL_030_1_.D IPL_030_2_.D +.p 506 +---------------------------------------------------------------------------------------------------- ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-1-------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--0------------------------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1----------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +-----0---------------------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------1-------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------1------------------------------------------------------------------------------------------- ~~~~~~~~~~~~111111111111111111111111111111111111111111111111111111111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1------------------------------------------------------------------------------------------ ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------1----------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~11111111~1~~1~~~~111~~1~1~~~~11~~~11~~~111~~~~1~111 +----------------1----------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------1---------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------0--------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------1-------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------1------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------0----------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1--------------------------------------------------------------------------- ~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----1------------------1--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------1-----------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11111111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------10--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------00--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-------------0-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------01------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------001----------------------------------------------------------------------- ~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------110----------------------------------------------------------------------- ~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1--0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1-0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------010---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1-----1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0-----1--------------------------------------------------------------------- ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------1-------------------------------------------------------------------- ~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1------1-------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------------------------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--1-------------0010--1----------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1--------1------------------------------------------------------------------ ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0--------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------11------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------0----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +---------------------------------10----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------1---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------0---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------1--------------------------------------------------------------- 1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------1------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0---------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------0---------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~1~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1----------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1---------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------1--------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------1-------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1-----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------1---------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------1--------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------00000-------------01------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------11-1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------10-1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0-01-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------0-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------11001-------0-----10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------0------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-1------------------11-------------------------111-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~111 +-1------------------10-------------------------011-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11 +-1------------------01-------------------------101-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1 +-1------------------00-------------------------001-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-0------------------11-------------------------110-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~ +-0------------------10-------------------------010-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-0------------------01-------------------------100-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------------------------------------1------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------0---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------1-----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------01----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +-----------1--------------------------------0----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------1--0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------10-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------1------------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------01-----------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------0-----------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------10------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------1--------------1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------01-------------1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-----------1--------------------------------0-------------1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------1------------------------1---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------1-------------------------1--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------00------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1--------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +--------------------------------------------0-------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-------------------------------------------------------0--------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +------------------------1----------------------------------------1---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +-----------1-------------------------------0----------------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +-----------1--------------------------------1---------------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +-----------1-------------------------------10---------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +-----------1-------------------------------0-----------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +-----------1--------------------------------1----------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +-----------1-------------------------------10---------------------11-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +-----------1------------------------------------------------------01-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +-----------1-------------------------------10---------------------10-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +-----------1--------------------------------------------------------1------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +-----------1-------------------------------------------------------11------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +-----------1------------------------------------------------------111------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +-----------1-------------------------------10---------------------111------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------1----------------------------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +----------------------------------------------------------------------1----------------------------- ~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0--------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--------------------------------------------1-------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +---------------------------------------------------------0------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +-----------------------------------------------------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1---------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +--------------------------------------------0--------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-------------------------------------------------------0---------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-----------1-------------------------------0----------------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +-----------1--------------------------------1---------------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +-----------1-------------------------------10---------------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-------------------------------------------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-------------------------00010-------0-----10----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------1-------------00010-------0-----10----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-------------------------------------1-0---10----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------1-------------------------1-0---10----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------1-------------------------------01-----------1----------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------1-------------------------------1------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------1-------------------------------01-----------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------0-----------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------1-------------------------------0-------------1----------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------1------------1----------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ +-----------0---------------------------------------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +---------------------------------1-----------------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------01-------------1----------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +---------------------------------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +---1-------1---------------------0----0----1-------1-----------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +---1-------1---------------------0----0-----0------1-----------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +---1-------1---------------------0----0------------1---0-------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1---------------------0----0------------1------0----------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +---0------------------------------------------------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +--------------------------------0-------------------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +--------------------------------------------0-------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +-----------------------------------------------------------------------------1---------------------- ~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------1----------1------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------1--------------------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-----------------------------------------------1------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------0---------------------------1-----------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------1---------------------------0-----------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-0-----------------------------------------------1----------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-1-----------------------------------------------0----------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------1----------------------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +---------------------0-------------------------1-------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +---------------------1-------------------------0-------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +------------------------------------------------1------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-0-----------------------------------------------1-----------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-1-----------------------------------------------0-----------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-1------------------------------------------------------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +---------------------0-------------------------1--------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +---------------------1-------------------------0--------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +--------------------0---------------------------1-------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +--------------------1---------------------------0-------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-------------------------------------------------1------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +---------------------------------------------------------------------------------1------------------ ~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1--------------------------------------------------------1------------------ ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1-------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-------------------------------------------0-------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--------------------------------------------1------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--------------------------------------------0------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-------------------------------------------------------0-------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +---------------------------------------------------------0-----------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--1--1---1------0010--1----------------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------------------1---------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------------1----------------- 1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----1-------------------------------------10-------------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0------------------0-----------------1--------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------1------------0-------------------1----------------1--------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------1------------0------------------10----------------1--------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +-----------1------------0------------------10----------------0--------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------1------------0-------------------------------------1-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +-----------1------------0------------------------------------11-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------10------------------01-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------10------------------10-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------1------0------------------011------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1-----------------------------10------------------011------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1------------------------------0---0--------------011------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1-----------------------1------0------------------101------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1-----------------------------10------------------101------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1------------------------------0---0--------------101------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1------------------------------0------------------011-------------1----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1------------------------------0------------------101-------------1----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0---1--------------011-------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0---1--------------101-------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0---1--------------010-------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0---1--------------100-------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +------------------------0----------------------------------------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +------------------------------------1---------1------------------------------0-----1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------0---------------------------------------------------------01---------------- ~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------10-------------------1-------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------10------------------1-1------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1-----------------------1------0-------------------11------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1------------------------------0---0---------------11------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1------------------------------0-------------------11-------------1----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0---1---------------11-------------0----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0---1---------------10-------------0----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +------------------------1----------------------------------------------------------0---------------- ~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0-----------------------------1----------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------1----1-----------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------11--------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------1--------------------------0-------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0-----------------------------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~1~~~~~~~~~~~ +------------------------0------------------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------------11-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0-----------------------------------------------------------00-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +1------------111----------------0-------------------------------------------------------00000000---- ~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------1----------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------1------------------------------10--------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------10----------------------------1-----------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------1-------------------------------10----------------------------1-----------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +--------------------------------------------------------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------01----------1-------------------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-----------1-------------------------------01----------1-------------------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------------------------------------------- ~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~000000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +0--------------------------------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--0------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~00000000000~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +0--0------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----0---------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------0-------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------0------------------------------------------------------------------------------------------- ~~~~~~~~~~~~000000000000000000000000000000000000000000000000000000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------0------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-0---------1---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----0-----1---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------01---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~0~0000~~000~~000~~~0~0~~~~~~ +------------0--------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------0-------------------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0---------0-------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------0------------------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------0------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------0------------------------------------------------------------------------------------ ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------0------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------1----------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------1---------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------0--------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------1-------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------0------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------0------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------0----------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~00000000000~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~ +------------------------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------10--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------00--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-------------1-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------1------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------01------------------------------------------------------------------------ ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------00------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------1----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1-1----------------------------------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0-1----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------00----------------------------------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------0--1---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1---0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0--0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0-0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------00---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0-----0--------------------------------------------------------------------- ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0------0-------------------------------------------------------------------- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------------------------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------1-----0---1----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------1------0--1----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------1---------0----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~0~~~~~~~~~~~ +-----------------------------------1---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1-----------1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------0------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------0----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00000~~~~~~~~~~0~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------1-----0---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1-------------0-----------------1-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0------------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0----------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0---------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------0--------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------0-------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------0--0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0-------------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------1-----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0-----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------0---------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------0--------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---10------1--------------------1-----------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +----------------------------------------0---1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------11------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-------------------------------------------01------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~0~~~~~~ +--------------------------------------------0------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~0~~~~~~~~ +--------------------------01---------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1--1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------11-1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0-1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1-0-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------00------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------0------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-----------------------------------------0----0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-1---------1--------10-------------------------011-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-1---------1--------01-------------------------101-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-1---------1--------00-------------------------001-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~ +-0---------1--------11-------------------------110-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-0---------1--------10-------------------------010-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0 +-0---------1--------01-------------------------100-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00 +-0---------1--------00-------------------------000-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~000 +--------------------------------------------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------01---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1---------0---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------0--------0---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------10--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------01----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------01----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +---0---------------------------------------------------0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------1---------------------0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------1----------------0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------0---0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------------0--0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------------------00-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0------------0------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------1-----------0------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------0-00------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------10------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-------------------------------------------0--------------0----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------1-------------0----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------00----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------1----------------------------------0---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +-----------1------------1-----------------------------------0--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0-----------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +--------------------------------------------1----------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0------------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +--------------------------------------------1-----------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-------------------------------------------10----------------10------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------00------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~ +-----------------------------------1---------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------------------------------------0---------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------0----------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1------------1---------1------------------------------0---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +----------------------------------------0-------------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0----------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +--------------------------------------------1---------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +----------------------------------------0--------------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0-----------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +--------------------------------------------1----------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +-------------------------------------------10---------------------10-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +------------------------------------------------------------------00-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +----------------------------------------0---------------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0------------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +--------------------------------------------1-----------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +-------------------------------------------10---------------------1-0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +------------------------------------------------------------------0-0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +-------------------------------------------10---------------------110------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +-------------------------------------------------------------------00------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +-----------1------------1--------------------------------------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +-------------------------------------------1----------------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +--------------------------------------------0---------------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +-------------------------------------------------------0----------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +--------------------------------------------------------0---------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------0-----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------0-------------------------------------------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +--------------------------------------------0----------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +--------------------------------------------------------0----------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-------------------------------------------1------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------0-----------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0------------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +--------------------------------------------1-----------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +---------------------------------------------------------0----------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------00------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-----------1-------------------------------1-------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-----------1--------------------------------0------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-------------------------------------------------------0-------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------------------0----------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-----------1-------------------------------1--------------------0----------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +-----------1--------------------------------0-------------------0----------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +-----------1-------------------------------------------0--0-----0----------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +---0-----------------------------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-----------0---------------------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +---------------------------------1-----------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +--------------------------------------1------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +---------------------------------------------------0-----------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-------------------------------------------01-------------1----------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +----0------1----------------------------------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +-----------------------------------------0-----------------------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------0-------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------0---------------------- ~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------0-----0----1----------------1-------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1---------0--------------------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------1-----------------------------------0------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------1--------0---------------------------1-----------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------1--------1---------------------------0-----------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-0---------1-------------------------------------1----------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-1---------1-------------------------------------0----------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------1--------0----------------------------------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------1---------0-------------------------1-------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------1---------1-------------------------0-------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------1------------------------------------0------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-0---------1-------------------------------------1-----------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-1---------1-------------------------------------0-----------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-0---------1--------------------------------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1---------0-------------------------1--------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1---------1-------------------------0--------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1--------0---------------------------1-------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1--------1---------------------------0-------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1-------------------------------------0------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +---------------------------------------------------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1-------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------0------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------00------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--1--1---0------0010--1----------------------------------------------------------0------------------ ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------0-----------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1--------0-----------------------------------------------0------------------ ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------0----------0------------------ ~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------------------------------0----------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-----------------------------------------------------------------------0---------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------------------------------------0---------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +--01-------1------------1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1----1-------1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1-----1------1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1------0-----1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1-------1----1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1----------0-1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~000~~~~~~~~~~~~~~~~~ +-----------1------------0---------------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------0----------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------0---------------------------------------------0----------------- 0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0------------------01-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------0-----0------------------01-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------0---0--------------01-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0------------------10-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------0-----0------------------10-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------0---0--------------10-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------0------------------01--------------1----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------0------------------10--------------1----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------------------------------------------------------------------------------1---------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1----------------------------------------------------------1---------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------------11---------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------0---0--------------1--------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0-------------------1-------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------0-----0-------------------1-------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------0---0---------------1-------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------0------------------1---------------1----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------0-------------------1--------------1----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0----------------------------------------------------------0---------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0----------------------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +-------------------------------------------------------------11--------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +------1----1-----------------------------00------------------011------------------00---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1----1-----------------------------00------------------101------------------00---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0-----------------------------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------------------------------------------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0-----------------------------------------------------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +-----------1------------0------------------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------------------------------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0-----------------------------------------------------------00-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------------------1------------------------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------------------1-------------------------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------------------1----------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0------------------------------------------------------------------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------------------1---------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-------------------------------------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------------------1--------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------------------------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------------------------1-------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0---------------------------------------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------------------------------1------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------------------------------------------------------------------------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------------------------------------1------ ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------------------------------------------------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------------------------1----- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0------------------------------------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------------------------1---- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-------------------------------------------------------------------------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------------------1----------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------------------1----------------------------------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------1-----------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1--------------1----------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1---------------1---------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1----------------0--------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1-----------------1-------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1-------------------------1-1----0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-------------------------1-----------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +--------------------------1----------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +---------------------------1---------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +----------------------------0--------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-----------------------------1-------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-------------------------------------1-1----------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-----------1--------------------------------------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------0--0------------------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------01----------1--0----------------1-----------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +--------------------------------------------------------0------------------------1-----------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ .end diff --git a/Logic/68030_tk.tt3 b/Logic/68030_tk.tt3 index 5c8f0a9..9fa727a 100644 --- a/Logic/68030_tk.tt3 +++ b/Logic/68030_tk.tt3 @@ -1,495 +1,518 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Wed Oct 26 22:26:25 2016 +#$ DATE Fri Nov 18 19:32:36 2016 #$ MODULE 68030_tk -#$ PINS 61 AHIGH_31_ A_DECODE_23_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 AHIGH_30_ BGACK_000 AHIGH_29_ CLK_030 AHIGH_28_ CLK_000 AHIGH_27_ CLK_OSZI AHIGH_26_ CLK_DIV_OUT AHIGH_25_ AHIGH_24_ FPU_CS A_DECODE_22_ FPU_SENSE A_DECODE_21_ DSACK1 A_DECODE_20_ DTACK A_DECODE_19_ AVEC A_DECODE_18_ E A_DECODE_17_ VPA A_DECODE_16_ RST RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_1_ IPL_0_ FC_0_ A_1_ SIZE_1_ IPL_030_2_ RW_000 BG_000 SIZE_0_ BGACK_030 CLK_EXP VMA RW A_0_ IPL_030_1_ IPL_030_0_ -#$ NODES 43 cpu_est_2_ cpu_est_3_ cpu_est_0_ cpu_est_1_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA CYCLE_DMA_0_ CYCLE_DMA_1_ inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_RESET_OUT CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_LDS_000_INT inst_DS_000_ENABLE inst_UDS_000_INT SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_CLK_030_H inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ +#$ PINS 61 AHIGH_31_ IPL_1_ IPL_0_ A_DECODE_23_ FC_0_ A_1_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 DTACK AVEC E AHIGH_30_ VPA AHIGH_29_ AHIGH_28_ RST AHIGH_27_ RESET AHIGH_26_ AHIGH_25_ AMIGA_ADDR_ENABLE AHIGH_24_ AMIGA_BUS_DATA_DIR A_DECODE_22_ AMIGA_BUS_ENABLE_LOW A_DECODE_21_ AMIGA_BUS_ENABLE_HIGH A_DECODE_20_ CIIN A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ A_0_ SIZE_1_ IPL_030_1_ IPL_030_0_ IPL_030_2_ RW_000 BG_000 BGACK_030 SIZE_0_ VMA RW +#$ NODES 46 cpu_est_1_ cpu_est_2_ cpu_est_3_ cpu_est_0_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_RESET_OUT CLK_030_PE_1_ inst_AMIGA_DS CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_LDS_000_INT inst_DS_000_ENABLE inst_UDS_000_INT SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ CYCLE_DMA_0_ CYCLE_DMA_1_ CLK_030_PE_0_ RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ CLK_OUT_INTreg .type fr -.i 96 -.o 158 -.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q VMA.Q cpu_est_2_.Q cpu_est_3_.Q cpu_est_0_.Q cpu_est_1_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_4_.Q inst_LDS_000_INT.Q inst_DS_000_ENABLE.Q inst_UDS_000_INT.Q SM_AMIGA_6_.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q SIZE_0_.Q SIZE_1_.Q RW_000.Q RW.Q RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q inst_CLK_030_H.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q BG_000.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN -.ob DS_030 FPU_CS DSACK1 AVEC E RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_D0_0_.C IPL_D0_1_.C IPL_D0_2_.C SM_AMIGA_i_7_.C SM_AMIGA_6_.C SM_AMIGA_5_.C SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.C SM_AMIGA_1_.C SM_AMIGA_0_.C cpu_est_0_.C cpu_est_1_.C cpu_est_2_.C cpu_est_3_.C IPL_030_0_.C IPL_030_1_.C IPL_030_2_.C RST_DLY_2_.C CLK_000_D_0_.C CLK_000_D_1_.C CLK_000_D_2_.C CLK_000_D_3_.C CLK_000_D_4_.C CYCLE_DMA_0_.C CYCLE_DMA_1_.C SIZE_0_.C SIZE_1_.C RST_DLY_0_.C RST_DLY_1_.C RW_000.C inst_AS_030_000_SYNC.C inst_LDS_000_INT.C BGACK_030.C inst_AS_000_DMA.C inst_DS_000_DMA.C inst_DSACK1_INT.C inst_AS_000_INT.C inst_AS_030_D0.C inst_VPA_D.C inst_DTACK_D0.C inst_CLK_030_H.C inst_RESET_OUT.C inst_DS_000_ENABLE.C BG_000.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.C A_0_.C RW.C VMA.C inst_BGACK_030_INT_D.C CLK_EXP.C inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.C AHIGH_31_ AS_030 AS_000 UDS_000 LDS_000 BERR AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE RESET.OE CIIN.OE CLK_DIV_OUT.C CLK_DIV_OUT.D BGACK_030.D VMA.T cpu_est_2_.D cpu_est_3_.D cpu_est_0_.D cpu_est_1_.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AS_030_D0.D inst_AS_030_000_SYNC.D inst_BGACK_030_INT_D.D inst_AS_000_DMA.D inst_DS_000_DMA.D CYCLE_DMA_0_.D CYCLE_DMA_1_.D inst_VPA_D.D CLK_000_D_3_.D inst_DTACK_D0.D inst_RESET_OUT.D CLK_000_D_1_.D CLK_000_D_0_.D inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_D.D IPL_D0_0_.D IPL_D0_1_.D IPL_D0_2_.D CLK_000_D_2_.D CLK_000_D_4_.D inst_LDS_000_INT.D inst_DS_000_ENABLE.D inst_UDS_000_INT.D SM_AMIGA_6_.D SM_AMIGA_4_.D SM_AMIGA_1_.D SM_AMIGA_0_.D SIZE_0_.D SIZE_1_.D RW_000.D RW.D RST_DLY_0_.D RST_DLY_1_.D RST_DLY_2_.D A_0_.D inst_CLK_030_H.D inst_DSACK1_INT.D inst_AS_000_INT.D SM_AMIGA_5_.D SM_AMIGA_3_.T SM_AMIGA_2_.D SM_AMIGA_i_7_.T BG_000.D CLK_EXP.D IPL_030_0_.T IPL_030_1_.T IPL_030_2_.T -.p 483 ------------------------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --1---------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---0--------------------------------------------------------------------------------------------- ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----1-------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----1------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ ------0------------------------------------------------------------------------------------------ ~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------1---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------1-0------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------010------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------10-1------------------------------------------------------------------ ~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 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-------1-----1-----------0----------0-01----------------------------1-----------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------1-----1-----------0----------0-10----------------------------1-----------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------1-----------0-----------001----------------------------0-----------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------1-----------0-----------010----------------------------0-----------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------1-----------0------------01----------------------------------------01-0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------1-----------0------------10----------------------------------------01-0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------1-----------0--------------------------------------------------------00------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ -------------1------------------------------------------1---------------------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------1------------------------------------------1----------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------------------------------------1---------- ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0---------------------------------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------------------------------------------------1--------- ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0----------------------------------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------------------------------------------------1-------- ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0-----------------------------------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------------------------------1------- ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0------------------------------------------------------------------------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------------------------------------1------ ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0-------------------------------------------------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------------------------------------------------------1----- ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0--------------------------------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------------------------------------------1---- ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0---------------------------------------------------------------------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------------------------------------------------------1--- ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0----------------------------------------------------------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------1------------------------------------------1-------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------1------------------------------------------1-------------------------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ -------------1------------1-------------0----0-------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ -------------1-------------1------------0----0-------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ -------------1--------------0-----------0----0-------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ -------------1---------------1----------0----0-------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ -------------1----------------1---------0----0-------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ -------------1--------------------------1-1--0-------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ --------------------------1-------------0--------------------------------0---------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ---------------------------1------------0--------------------------------0---------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ----------------------------0-----------0--------------------------------0---------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ -----------------------------1----------0--------------------------------0---------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ------------------------------1---------0--------------------------------0---------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ----------------------------------------1-1------------------------------0---------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ------------------------------------------------------0--0--------------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ -------------1------------------------------01----------1--0--------------1---------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ ---------------------------------------------------------0---------------------1----------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +.i 100 +.o 162 +.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI FPU_SENSE VPA RST RESET A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q VMA.Q cpu_est_1_.Q cpu_est_2_.Q cpu_est_3_.Q cpu_est_0_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q CLK_030_PE_1_.Q inst_AMIGA_DS.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_4_.Q inst_LDS_000_INT.Q inst_DS_000_ENABLE.Q inst_UDS_000_INT.Q SM_AMIGA_6_.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q SIZE_0_.Q SIZE_1_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q CLK_030_PE_0_.Q RW_000.Q RW.Q RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN DTACK.PIN RW.PIN +.ob DS_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 AVEC E AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SM_AMIGA_i_7_.C SM_AMIGA_6_.C SM_AMIGA_5_.C SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.C SM_AMIGA_1_.C SM_AMIGA_0_.C cpu_est_2_.C cpu_est_3_.C IPL_030_0_.C IPL_030_1_.C IPL_030_2_.C IPL_D0_0_.C IPL_D0_1_.C IPL_D0_2_.C CLK_000_D_0_.C CLK_000_D_1_.C CLK_000_D_2_.C CLK_000_D_3_.C CLK_000_D_4_.C CYCLE_DMA_0_.C CYCLE_DMA_1_.C CLK_030_PE_0_.C CLK_030_PE_1_.C SIZE_0_.C SIZE_1_.C cpu_est_0_.C cpu_est_1_.C RST_DLY_0_.C RST_DLY_1_.C RST_DLY_2_.C inst_DS_000_DMA.C inst_DSACK1_INT.C inst_AS_000_INT.C inst_AMIGA_DS.C inst_AS_030_D0.C inst_DTACK_D0.C inst_VPA_D.C inst_RESET_OUT.C inst_DS_000_ENABLE.C BG_000.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.C A_0_.C RW.C VMA.C RW_000.C inst_AS_030_000_SYNC.C inst_LDS_000_INT.C BGACK_030.C inst_AS_000_DMA.C inst_BGACK_030_INT_D.C CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.C AHIGH_31_ AS_030 AS_000 UDS_000 LDS_000 BERR DTACK AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE DTACK.OE RW.OE DS_030.OE DSACK1.OE CIIN.OE BGACK_030.D VMA.T cpu_est_1_.D cpu_est_2_.D cpu_est_3_.D cpu_est_0_.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AS_030_D0.D inst_AS_030_000_SYNC.D inst_BGACK_030_INT_D.D inst_AS_000_DMA.D inst_DS_000_DMA.D inst_VPA_D.D CLK_000_D_3_.D inst_DTACK_D0.D inst_RESET_OUT.D CLK_030_PE_1_.D inst_AMIGA_DS.D CLK_000_D_1_.D CLK_000_D_0_.D inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_D.D IPL_D0_0_.D IPL_D0_1_.D IPL_D0_2_.D CLK_000_D_2_.D CLK_000_D_4_.D inst_LDS_000_INT.D inst_DS_000_ENABLE.D inst_UDS_000_INT.D SM_AMIGA_6_.D SM_AMIGA_4_.D SM_AMIGA_1_.D SM_AMIGA_0_.D SIZE_0_.D SIZE_1_.D CYCLE_DMA_0_.D CYCLE_DMA_1_.D CLK_030_PE_0_.D RW_000.D RW.D RST_DLY_0_.D RST_DLY_1_.D RST_DLY_2_.D A_0_.D inst_DSACK1_INT.D inst_AS_000_INT.D SM_AMIGA_5_.D SM_AMIGA_3_.T SM_AMIGA_2_.D SM_AMIGA_i_7_.T BG_000.D CLK_OUT_INTreg.D IPL_030_0_.D IPL_030_1_.D IPL_030_2_.D +.p 506 +---------------------------------------------------------------------------------------------------- ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-1-------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--0------------------------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1----------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +-----0---------------------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------1-------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------1------------------------------------------------------------------------------------------- ~~~~~~~~~~~~111111111111111111111111111111111111111111111111111111111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1------------------------------------------------------------------------------------------ ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------1----------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~11111111~1~~1~~~~111~~1~1~~~~11~~~11~~~111~~~~1~111 +----------------1----------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------1---------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------0--------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------1-------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------1------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------0----------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1--------------------------------------------------------------------------- ~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----1------------------1--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------1-----------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11111111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------10--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------00--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-------------0-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------01------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------001----------------------------------------------------------------------- ~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------110----------------------------------------------------------------------- ~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1--0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1-0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------010---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1-----1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0-----1--------------------------------------------------------------------- ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------1-------------------------------------------------------------------- ~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1------1-------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------------------------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--1-------------0010--1----------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1--------1------------------------------------------------------------------ ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0--------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------11------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------0----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +---------------------------------10----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------1---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------0---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------1--------------------------------------------------------------- 1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------1------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0---------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------0---------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~1~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1----------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1---------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------1--------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------1-------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1-----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------1---------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------1--------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------00000-------------01------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------11-1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------10-1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0-01-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------0-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------11001-------0-----10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------0------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-1------------------11-------------------------111-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~111 +-1------------------10-------------------------011-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11 +-1------------------01-------------------------101-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1 +-1------------------00-------------------------001-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-0------------------11-------------------------110-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~ +-0------------------10-------------------------010-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-0------------------01-------------------------100-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------------------------------------1------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------0---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------1-----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------01----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +-----------1--------------------------------0----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------1--0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------10-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------1------------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------01-----------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------0-----------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------10------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------1--------------1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------01-------------1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-----------1--------------------------------0-------------1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------1------------------------1---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------1-------------------------1--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------00------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1--------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +--------------------------------------------0-------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-------------------------------------------------------0--------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +------------------------1----------------------------------------1---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +-----------1-------------------------------0----------------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +-----------1--------------------------------1---------------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +-----------1-------------------------------10---------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +-----------1-------------------------------0-----------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +-----------1--------------------------------1----------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +-----------1-------------------------------10---------------------11-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +-----------1------------------------------------------------------01-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +-----------1-------------------------------10---------------------10-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +-----------1--------------------------------------------------------1------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +-----------1-------------------------------------------------------11------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +-----------1------------------------------------------------------111------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +-----------1-------------------------------10---------------------111------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1---------1----------------------------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +----------------------------------------------------------------------1----------------------------- ~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0--------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--------------------------------------------1-------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +---------------------------------------------------------0------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +-----------------------------------------------------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1---------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +--------------------------------------------0--------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-------------------------------------------------------0---------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-----------1-------------------------------0----------------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +-----------1--------------------------------1---------------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +-----------1-------------------------------10---------------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-------------------------------------------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-------------------------00010-------0-----10----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------1-------------00010-------0-----10----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-------------------------------------1-0---10----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------1-------------------------1-0---10----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------1-------------------------------01-----------1----------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------1-------------------------------1------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------1-------------------------------01-----------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------0-----------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------1-------------------------------0-------------1----------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------1------------1----------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ +-----------0---------------------------------------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +---------------------------------1-----------------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------01-------------1----------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +---------------------------------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +---1-------1---------------------0----0----1-------1-----------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +---1-------1---------------------0----0-----0------1-----------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +---1-------1---------------------0----0------------1---0-------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1---------------------0----0------------1------0----------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +---0------------------------------------------------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +--------------------------------0-------------------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +--------------------------------------------0-------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +-----------------------------------------------------------------------------1---------------------- ~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------1----------1------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------1--------------------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-----------------------------------------------1------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------0---------------------------1-----------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------1---------------------------0-----------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-0-----------------------------------------------1----------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-1-----------------------------------------------0----------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------1----------------------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +---------------------0-------------------------1-------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +---------------------1-------------------------0-------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +------------------------------------------------1------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-0-----------------------------------------------1-----------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-1-----------------------------------------------0-----------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-1------------------------------------------------------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +---------------------0-------------------------1--------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +---------------------1-------------------------0--------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +--------------------0---------------------------1-------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +--------------------1---------------------------0-------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-------------------------------------------------1------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +---------------------------------------------------------------------------------1------------------ ~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1--------------------------------------------------------1------------------ ~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1-------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-------------------------------------------0-------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--------------------------------------------1------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--------------------------------------------0------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-------------------------------------------------------0-------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +---------------------------------------------------------0-----------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--1--1---1------0010--1----------------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------------------1---------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------------1----------------- 1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----1-------------------------------------10-------------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0------------------0-----------------1--------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------1------------0-------------------1----------------1--------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------1------------0------------------10----------------1--------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +-----------1------------0------------------10----------------0--------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------1------------0-------------------------------------1-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +-----------1------------0------------------------------------11-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------10------------------01-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------10------------------10-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------1------0------------------011------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1-----------------------------10------------------011------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1------------------------------0---0--------------011------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1-----------------------1------0------------------101------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1-----------------------------10------------------101------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1------------------------------0---0--------------101------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1------------------------------0------------------011-------------1----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1------------------------------0------------------101-------------1----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0---1--------------011-------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0---1--------------101-------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0---1--------------010-------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0---1--------------100-------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +------------------------0----------------------------------------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +------------------------------------1---------1------------------------------0-----1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------0---------------------------------------------------------01---------------- ~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------10-------------------1-------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------10------------------1-1------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1-----------------------1------0-------------------11------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1------------------------------0---0---------------11------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1------------------------------0-------------------11-------------1----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0---1---------------11-------------0----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0---1---------------10-------------0----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +------------------------1----------------------------------------------------------0---------------- ~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0-----------------------------1----------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------1----1-----------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------11--------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------1--------------------------0-------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0-----------------------------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~1~~~~~~~~~~~ +------------------------0------------------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------------11-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0-----------------------------------------------------------00-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +1------------111----------------0-------------------------------------------------------00000000---- ~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------1----------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------1------------------------------10--------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------10----------------------------1-----------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------1-------------------------------10----------------------------1-----------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +--------------------------------------------------------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------01----------1-------------------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +-----------1-------------------------------01----------1-------------------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------------------------------------------- ~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~000000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +0--------------------------------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--0------------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~00000000000~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +0--0------------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----0---------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------0-------------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------0------------------------------------------------------------------------------------------- ~~~~~~~~~~~~000000000000000000000000000000000000000000000000000000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------0------------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-0---------1---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----0-----1---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------01---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~0~0000~~000~~000~~~0~0~~~~~~ +------------0--------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00000000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------0-------------------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0---------0-------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------0------------------------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------0------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------0------------------------------------------------------------------------------------ ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------0------------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------1----------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------1---------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------0--------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------1-------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------0------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------0------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------0----------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~00000000000~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~ +------------------------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------10--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------00--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-------------1-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------1------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------01------------------------------------------------------------------------ ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------00------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------1----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1-1----------------------------------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0-1----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------00----------------------------------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------0--1---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1---0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0--0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0-0---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------00---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0-----0--------------------------------------------------------------------- ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0------0-------------------------------------------------------------------- ~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1------------------------------------------------------------------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------------------------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------1-----0---1----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------1------0--1----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------1---------0----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~0~~~~~~~~~~~ +-----------------------------------1---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------1-----------1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------0------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------0----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00000~~~~~~~~~~0~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------1-----0---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1-------------0-----------------1-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0------------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0----------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0---------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------0--------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------0-------------0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------0--0-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0-------------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------1-----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0-----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------0---------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------0--------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---10------1--------------------1-----------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +----------------------------------------0---1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------11------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-------------------------------------------01------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~0~~~~~~ +--------------------------------------------0------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~0~~~~~~~~ +--------------------------01---------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1--1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------11-1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0-1-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1-0-------------10------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------00------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------0------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-----------------------------------------0----0----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-1---------1--------10-------------------------011-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-1---------1--------01-------------------------101-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-1---------1--------00-------------------------001-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~ +-0---------1--------11-------------------------110-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-0---------1--------10-------------------------010-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0 +-0---------1--------01-------------------------100-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00 +-0---------1--------00-------------------------000-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~000 +--------------------------------------------------0------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------01---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1---------0---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------0--------0---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------10--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------01----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------01----------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +---0---------------------------------------------------0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------1---------------------0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------1----------------0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------0---0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------------0--0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------------------00-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0------------0------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------1-----------0------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------0-00------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------10------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-------------------------------------------0--------------0----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------1-------------0----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------00----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------1----------------------------------0---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +-----------1------------1-----------------------------------0--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0-----------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +--------------------------------------------1----------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0------------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +--------------------------------------------1-----------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-------------------------------------------10----------------10------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------00------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~ +-----------------------------------1---------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------------------------------------0---------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------0----------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1------------1---------1------------------------------0---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +----------------------------------------0-------------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0----------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +--------------------------------------------1---------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +----------------------------------------0--------------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0-----------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +--------------------------------------------1----------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +-------------------------------------------10---------------------10-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +------------------------------------------------------------------00-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +----------------------------------------0---------------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0------------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +--------------------------------------------1-----------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +-------------------------------------------10---------------------1-0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +------------------------------------------------------------------0-0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +-------------------------------------------10---------------------110------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +-------------------------------------------------------------------00------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +-----------1------------1--------------------------------------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +-------------------------------------------1----------------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +--------------------------------------------0---------------------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +-------------------------------------------------------0----------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +--------------------------------------------------------0---------------0--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------0-----------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------0-------------------------------------------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +--------------------------------------------0----------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +--------------------------------------------------------0----------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-------------------------------------------1------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------0-----------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0------------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +--------------------------------------------1-----------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +---------------------------------------------------------0----------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------00------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-----------1-------------------------------1-------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-----------1--------------------------------0------------------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-------------------------------------------------------0-------------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------------------0----------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-----------1-------------------------------1--------------------0----------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +-----------1--------------------------------0-------------------0----------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +-----------1-------------------------------------------0--0-----0----------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +---0-----------------------------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-----------0---------------------------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +---------------------------------1-----------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +--------------------------------------1------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +---------------------------------------------------0-----------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-------------------------------------------01-------------1----------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +----0------1----------------------------------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +-----------------------------------------0-----------------------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------0-------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------0---------------------- ~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------0-----0----1----------------1-------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +-----------1---------0--------------------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------1-----------------------------------0------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------1--------0---------------------------1-----------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------1--------1---------------------------0-----------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-0---------1-------------------------------------1----------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-1---------1-------------------------------------0----------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------1--------0----------------------------------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------1---------0-------------------------1-------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------1---------1-------------------------0-------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------1------------------------------------0------------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-0---------1-------------------------------------1-----------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-1---------1-------------------------------------0-----------------------------0-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-0---------1--------------------------------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1---------0-------------------------1--------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1---------1-------------------------0--------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1--------0---------------------------1-------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1--------1---------------------------0-------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------1-------------------------------------0------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +---------------------------------------------------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1-------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------0------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------00------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--1--1---0------0010--1----------------------------------------------------------0------------------ ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1---------------------0-----------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1--------0-----------------------------------------------0------------------ ~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------0----------0------------------ ~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------------------------------0----------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-----------------------------------------------------------------------0---------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------------------------------------------0---------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +--01-------1------------1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1----1-------1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1-----1------1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1------0-----1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1-------1----1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------1----------0-1-------0-1----------------------------------------0-----0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~000~~~~~~~~~~~~~~~~~ +-----------1------------0---------------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------0----------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------0---------------------------------------------0----------------- 0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0------------------01-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------0-----0------------------01-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------0---0--------------01-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0------------------10-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------0-----0------------------10-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------0---0--------------10-------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------0------------------01--------------1----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------0------------------10--------------1----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------------------------------------------------------------------------------1---------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1----------------------------------------------------------1---------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------------11---------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------0---0--------------1--------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-----------------------0------0-------------------1-------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------0-----0-------------------1-------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------0---0---------------1-------------------01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------0------------------1---------------1----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------0-------------------1--------------1----01---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0----------------------------------------------------------0---------------- ~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0----------------------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +-------------------------------------------------------------11--------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +------1----1-----------------------------00------------------011------------------00---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1----1-----------------------------00------------------101------------------00---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0-----------------------------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------------------------------------------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0-----------------------------------------------------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +-----------1------------0------------------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------------------------------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------0-----------------------------------------------------------00-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------------------1------------------------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------------------1-------------------------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------------------1----------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0------------------------------------------------------------------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------------------1---------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-------------------------------------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------------------1--------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------------------------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------------------------1-------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0---------------------------------------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------------------------------1------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0----------------------------------------------------------------------------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------------------------------------1------ ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------------------------------------------------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------------------------------1----- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0------------------------------------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------------------------1---- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-------------------------------------------------------------------------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------------------1----------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------------------1----------------------------------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------1-----------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1--------------1----------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1---------------1---------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1----------------0--------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1-----------------1-------0------0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------1-------------------------1-1----0----------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-------------------------1-----------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +--------------------------1----------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +---------------------------1---------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +----------------------------0--------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-----------------------------1-------0------------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-------------------------------------1-1----------------------------------0----------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-----------1--------------------------------------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------0--0------------------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1-------------------------------01----------1--0----------------1-----------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +--------------------------------------------------------0------------------------1-----------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ .end diff --git a/Logic/68030_tk.tt4 b/Logic/68030_tk.tt4 index 9adf728..5772bf2 100644 --- a/Logic/68030_tk.tt4 +++ b/Logic/68030_tk.tt4 @@ -1,259 +1,265 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Wed Oct 26 22:26:25 2016 +#$ DATE Fri Nov 18 19:32:36 2016 #$ MODULE BUS68030 -#$ PINS 61 AHIGH_31_ A_DECODE_23_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 - LDS_000 nEXP_SPACE BERR BG_030 AHIGH_30_ BGACK_000 AHIGH_29_ CLK_030 AHIGH_28_ - CLK_000 AHIGH_27_ CLK_OSZI AHIGH_26_ CLK_DIV_OUT AHIGH_25_ AHIGH_24_ FPU_CS - A_DECODE_22_ FPU_SENSE A_DECODE_21_ DSACK1 A_DECODE_20_ DTACK A_DECODE_19_ AVEC - A_DECODE_18_ E A_DECODE_17_ VPA A_DECODE_16_ RST RESET AMIGA_ADDR_ENABLE - AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_1_ IPL_0_ - FC_0_ A_1_ SIZE_1_ IPL_030_2_ RW_000 BG_000 SIZE_0_ BGACK_030 CLK_EXP VMA RW - A_0_ IPL_030_1_ IPL_030_0_ -#$ NODES 44 cpu_est_2_ cpu_est_3_ cpu_est_0_ cpu_est_1_ +#$ PINS 61 AHIGH_31_ IPL_1_ IPL_0_ A_DECODE_23_ FC_0_ A_1_ IPL_2_ FC_1_ AS_030 + AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 + CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 DTACK AVEC E AHIGH_30_ VPA + AHIGH_29_ AHIGH_28_ RST AHIGH_27_ RESET AHIGH_26_ AHIGH_25_ AMIGA_ADDR_ENABLE + AHIGH_24_ AMIGA_BUS_DATA_DIR A_DECODE_22_ AMIGA_BUS_ENABLE_LOW A_DECODE_21_ + AMIGA_BUS_ENABLE_HIGH A_DECODE_20_ CIIN A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ + A_DECODE_16_ A_0_ SIZE_1_ IPL_030_1_ IPL_030_0_ IPL_030_2_ RW_000 BG_000 + BGACK_030 SIZE_0_ VMA RW +#$ NODES 47 cpu_est_1_ cpu_est_2_ cpu_est_3_ cpu_est_0_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA - CYCLE_DMA_0_ CYCLE_DMA_1_ inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_RESET_OUT + inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_RESET_OUT CLK_030_PE_1_ inst_AMIGA_DS CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_LDS_000_INT inst_DS_000_ENABLE inst_UDS_000_INT SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ - SM_AMIGA_0_ RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_CLK_030_H inst_DSACK1_INT - inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ CIIN_0 + SM_AMIGA_0_ CYCLE_DMA_0_ CYCLE_DMA_1_ CLK_030_PE_0_ RST_DLY_0_ RST_DLY_1_ + RST_DLY_2_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ + SM_AMIGA_i_7_ CLK_OUT_INTreg CIIN_0 .type f -.i 97 -.o 162 +.i 101 +.o 166 .ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 - CLK_OSZI FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ + CLK_OSZI FPU_SENSE VPA RST RESET A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ - BGACK_030.Q VMA.Q cpu_est_2_.Q cpu_est_3_.Q cpu_est_0_.Q cpu_est_1_.Q + BGACK_030.Q VMA.Q cpu_est_1_.Q cpu_est_2_.Q cpu_est_3_.Q cpu_est_0_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_AS_000_DMA.Q - inst_DS_000_DMA.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q inst_VPA_D.Q CLK_000_D_3_.Q - inst_DTACK_D0.Q inst_RESET_OUT.Q CLK_000_D_1_.Q CLK_000_D_0_.Q + inst_DS_000_DMA.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q + CLK_030_PE_1_.Q inst_AMIGA_DS.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_4_.Q inst_LDS_000_INT.Q inst_DS_000_ENABLE.Q inst_UDS_000_INT.Q SM_AMIGA_6_.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q - SIZE_0_.Q SIZE_1_.Q RW_000.Q RW.Q RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q - inst_CLK_030_H.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q - SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q BG_000.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q - AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN + SIZE_0_.Q SIZE_1_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q CLK_030_PE_0_.Q RW_000.Q RW.Q + RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q inst_DSACK1_INT.Q + inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q + BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q AS_030.PIN + AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN - AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN CIIN_0 + AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN DTACK.PIN RW.PIN + CIIN_0 .ob AHIGH_31_ AHIGH_31_.OE AS_030% AS_030.OE AS_000% AS_000.OE DS_030% DS_030.OE - UDS_000% UDS_000.OE LDS_000% LDS_000.OE BERR BERR.OE AHIGH_30_ AHIGH_30_.OE - AHIGH_29_ AHIGH_29_.OE AHIGH_28_ AHIGH_28_.OE AHIGH_27_ AHIGH_27_.OE AHIGH_26_ - AHIGH_26_.OE CLK_DIV_OUT.D CLK_DIV_OUT.C AHIGH_25_ AHIGH_25_.OE AHIGH_24_ - AHIGH_24_.OE FPU_CS% DSACK1% DSACK1.OE AVEC E RESET RESET.OE AMIGA_ADDR_ENABLE + UDS_000% UDS_000.OE LDS_000% LDS_000.OE BERR BERR.OE CLK_DIV_OUT CLK_EXP FPU_CS% + DSACK1% DSACK1.OE DTACK DTACK.OE AVEC E AHIGH_30_ AHIGH_30_.OE AHIGH_29_ + AHIGH_29_.OE AHIGH_28_ AHIGH_28_.OE AHIGH_27_ AHIGH_27_.OE AHIGH_26_ + AHIGH_26_.OE AHIGH_25_ AHIGH_25_.OE AMIGA_ADDR_ENABLE AHIGH_24_ AHIGH_24_.OE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW% AMIGA_BUS_ENABLE_HIGH% CIIN CIIN.OE - SIZE_1_.D SIZE_1_.C SIZE_1_.OE IPL_030_2_.T IPL_030_2_.C RW_000.D% RW_000.C - RW_000.OE BG_000.D% BG_000.C SIZE_0_.D% SIZE_0_.C SIZE_0_.OE BGACK_030.D - BGACK_030.C CLK_EXP.D CLK_EXP.C VMA.T VMA.C RW.D% RW.C RW.OE A_0_.D A_0_.C - A_0_.OE IPL_030_1_.T IPL_030_1_.C IPL_030_0_.T IPL_030_0_.C cpu_est_2_.D.X1 - cpu_est_2_.D.X2 cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C cpu_est_0_.D cpu_est_0_.C - cpu_est_1_.D cpu_est_1_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D% + A_0_.D A_0_.C A_0_.OE SIZE_1_.D SIZE_1_.C SIZE_1_.OE IPL_030_1_.D% IPL_030_1_.C + IPL_030_0_.D% IPL_030_0_.C IPL_030_2_.D% IPL_030_2_.C RW_000.D% RW_000.C + RW_000.OE BG_000.D% BG_000.C BGACK_030.D BGACK_030.C SIZE_0_.D% SIZE_0_.C + SIZE_0_.OE VMA.T VMA.C RW.D% RW.C RW.OE cpu_est_1_.D cpu_est_1_.C + cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C + cpu_est_0_.D cpu_est_0_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D% inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D% inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_AS_030_D0.D% inst_AS_030_D0.C inst_AS_030_000_SYNC.D% inst_AS_030_000_SYNC.C inst_BGACK_030_INT_D.D% inst_BGACK_030_INT_D.C inst_AS_000_DMA.D inst_AS_000_DMA.C inst_DS_000_DMA.D - inst_DS_000_DMA.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C - inst_VPA_D.D% inst_VPA_D.C CLK_000_D_3_.D CLK_000_D_3_.C inst_DTACK_D0.D% - inst_DTACK_D0.C inst_RESET_OUT.D inst_RESET_OUT.C CLK_000_D_1_.D CLK_000_D_1_.C - CLK_000_D_0_.D CLK_000_D_0_.C inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C - inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C IPL_D0_0_.D% IPL_D0_0_.C IPL_D0_1_.D% - IPL_D0_1_.C IPL_D0_2_.D% IPL_D0_2_.C CLK_000_D_2_.D CLK_000_D_2_.C - CLK_000_D_4_.D CLK_000_D_4_.C inst_LDS_000_INT.D inst_LDS_000_INT.C - inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C inst_UDS_000_INT.D% inst_UDS_000_INT.C - SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_1_.D - SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C RST_DLY_0_.D RST_DLY_0_.C - RST_DLY_1_.D.X1 RST_DLY_1_.D.X2 RST_DLY_1_.C RST_DLY_2_.D RST_DLY_2_.C - inst_CLK_030_H.D inst_CLK_030_H.C inst_DSACK1_INT.D% inst_DSACK1_INT.C - inst_AS_000_INT.D% inst_AS_000_INT.C SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_3_.T - SM_AMIGA_3_.C SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_i_7_.T.X1 SM_AMIGA_i_7_.T.X2 - SM_AMIGA_i_7_.C CIIN_0 -.phase 111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 -.p 185 -------------------------------------------------------------------------------------------------- 000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0-----------------1------------------------------------------------------ 010100010000000101010101000101000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------0-------------------------------------------0----------------- 001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------------------------------------0--------0------------------ 000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1-----------------1------------------------------------------------------ 000001000101000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------0------------------------------------------0----------------- 000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------------------------10------------------------------------------ 000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------01------------------------------------------- 000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---1--1---1------0010--1-------------------------------------------------------0------------------ 000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------1-------------------------------------------------- 000000000000000000000000100000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------1---------------------------------------------------------------------------------------- 000000000000000000000000010000000000000000001001010010100101010100100101001010101010101010101010101010101010101010101010101010101010101010101001010101010101010010 ---1--1---0------0010--1-------------------------------------------------------0------------------ 000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------------------------------0---------0------------------ 000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------------------------------------------------------------------------------------------- 000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 ---------------------------10-1------------------------------------------------------------------- 000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------01-0------------------------------------------------------------------- 000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------------0------------------------------------------------------ 000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0------------------------------------------------------01---------------- 000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1-------------------------------------------------------0---------------- 000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0------0----------------------------------------------------------------- 000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0-----0------------------------------------------------------------------ 000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1--------0--------------------------------------------0------------------ 000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -1------------111----------------0----------------------------------------------------00000000---- 000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 -------------------------------------------------------------------------------------------------1 000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------0------------------------------------------------------------------------------------ 000000000000000000000000000000000000000000010000000000001000000001000000000000000000000000010100000000000000000000000000000001000000000000000000000000000000000000 -------------------------1---------1-------------------------1------------------------------------ 000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0--------------------------------------------------------00-------------- 000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0------------------------------------------------------------------------ 000000000000000000000000000000000000000000000100000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------11---------------------01--110---------------------------1------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------10---------------------01--010---------------------------1------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------01---------------------01--100---------------------------1------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------00---------------------01--000---------------------------1------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------0----------------------------------------------------------------0------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1------------------11---------------------01--111---------------------------0------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1------------------10---------------------01--011---------------------------0------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1------------------01---------------------01--101---------------------------0------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1------------------00---------------------01--001---------------------------0------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1------------------------------1-----------------0-----------1----------------------- 000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------------------------------0----------------0-----------1----------------------- 000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1------------------------------------------0--0--0-----------1----------------------- 000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1------------------------------01----------1--0--------------1---------------------0- 000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----10-------1-------------------1-----------1---------------------------------------------------- 000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0-------1-------------------------------------------------------------0---------------------- 000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1---------0-------------------------------------------------------------- 000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1----------------------------------0------------------------------------- 000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0--------------------------------------------------------00-------------- 000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------1------------------1------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------1-------------------------------------01----------------------------------1----------------- 000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------0------------0----------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------00000-------------01---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1------------10011---------0---10---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1---------1---------------------------0---------------------------------- 000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0-------------------------------------------------------0---------------- 000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0-----------------1------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1---------1-------------------------------1------------------------------ 000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0--------------------------------------------------------1--------------- 000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-------01---------------------01--101--------------------------1-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-------00---------------------01--001--------------------------1-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------01---------------------01--100--------------------------1-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------00---------------------01--000--------------------------1-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------0---------------------------------------------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1------------------11---------------------01--111--------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1------------------10---------------------01--011--------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0------------------11---------------------01--110--------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0------------------10---------------------01--010--------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-------10---------------------01--011-------------------------1--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-------00---------------------01--001-------------------------1--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------10---------------------01--010-------------------------1--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------00---------------------01--000-------------------------1--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------0--------------------------------------------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1------------------11---------------------01--111-------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1------------------01---------------------01--101-------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0------------------11---------------------01--110-------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0------------------01---------------------01--100-------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1---------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------11-------------10---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------010-------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------1---------------0----------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------1----------------1---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1-11-------------10---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------1--------------0----------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------1---------------1---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------0--------------10---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------01------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------1-------------0----------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------1--------------1---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------010-------------10---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1----------00------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1-----0---1-------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1----------10------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1------0--1-------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------------------------------------------------------------0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------------------0--------------------------------------------0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 ---01--------1-----------1-------0-1--------------------------------------0----0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1---1-------1-------0-1--------------------------------------0----0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1----1------1-------0-1--------------------------------------0----0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1-----0-----1-------0-1--------------------------------------0----0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1------1----1-------0-1--------------------------------------0----0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1---------0-1-------0-1--------------------------------------0----0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000 -------0----------------------------1------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------11---------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------00---------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------------------------------------------------1----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------------------------------------------------11-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000 -------0-----------------------------1-------------------------------------------0---------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000 -------1----------------------------1-------------------------------1------------0---------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------1------------------------------0------------0---------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------1-----1-----------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------0-----01----------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------1------0----------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------01----------------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0-------------1----1-----------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------10----01----------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0-------------1-----0----------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 ------------01------------------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------------1---------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000 -----------0-1------------------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000 -------------1-----------------------------1------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000 -------------1------------------------------10------------------111------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000 ---------------------------------------------1---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000 --------1----------------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000 ----------------------------------------------0--------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000 ----------------------------------------------1--------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000 -------------1--------0--------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000 -------------1-------0---------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000 --0----------1------------------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000 --------------------------------------------1----------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 -----------------------------------------1-------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000 -----------------------------------------------------1--0----------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 --------------------------------------------------------1---------------------------10--------0--- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 -------------1------------------------------01-----------1---------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 -------------1----------------------------------------1------------------------0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 -------------1------------------------------01----------1---------------------------------------1- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 -------------1-----------------------------------------00----------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000 -------------1------------------------------------------1-------------------------------------0--- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000 -------------1------------------------------1-----------1----------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 -------------1-------------------------------0----------1----------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 ----1--------1--------------------0------0----------1---0-----------------0----------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 -------------1------------------------------1------------1---------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 -------------1-------------------------------0-----------1---------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 -------------1------------------------------10-------------------------1-------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 -------------1------------------------------01---------------------------1------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000 -------------1------------------------------0-------------1--------------0------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000 -------------1-------------------------------1------------1--------------0------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000 -------------1------------------------------10------------1--------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000010000000000000 -------------1------------------------------1--------------1-------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 -------------1-------------------------------0-------------1-------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 -------------1------------------------------0-------------------1--------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 -------------1-------------------------------1------------------1--------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 -------------1------------------------------10------------------0--------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 -------------1--------------------------------------------------111------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 -------------1------------------------------10------------------1-0------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 -------------1------------------------------10------------------10-------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 -------------1---------------------------------------------------1-------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 -------------1------------------------------10------------------11-------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 -------------1----------------------------------------------------1------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 -------0-----1-----------0----------0-01----------------------------------------0-0--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 -------0-----1-----------0----------0-10----------------------------------------0-0--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 -------------1-----------0------------01----------------------------1-----------0-0--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 -------------1-----------0------------10----------------------------1-----------0-0--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 -------0-----1-----------0----------0-01----------------------------------------0--0-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 -------0-----1-----------0----------0-10----------------------------------------0--0-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 -------------1-----------0------------01----------------------------1-----------0--0-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 -------------1-----------0------------10----------------------------1-----------0--0-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 -------------1-------------------------------------------------------0---------0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000 -------------1------------------------------01----------1----------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000 -------------1--------------------------------------------------------0--------0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 -------------1------------------------------0--------------------------1-------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 -------------1-------------------------------1-------------------------1-------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 -------------0----------------------------------------------------------1------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 --------------------------00100---------0---10--------------------------1------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 ----------------------------------------1-0-10--------------------------1------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 -------------1------------------------------01-----------1--------------0------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 --------------------------------------------10--------------------------1----------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 -------------1------------00100---------0---10--------------------------1------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------1--------------------------1-0-10--------------------------1------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------1------------------------------1----------------------------1------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------1-------------------------------0---------------------------1------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------1------------------------------10--------------------------1----------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------0------------------------------------------------------------1----------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1------------------------------01-------------1--------------1----------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 ----1--------1--------------------0------0----------1---------------------0----------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 ----1--------1--------------------0------0--01------1------1--------------0----------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 + inst_DS_000_DMA.C inst_VPA_D.D% inst_VPA_D.C CLK_000_D_3_.D CLK_000_D_3_.C + inst_DTACK_D0.D% inst_DTACK_D0.C inst_RESET_OUT.D inst_RESET_OUT.C + CLK_030_PE_1_.D CLK_030_PE_1_.C inst_AMIGA_DS.D inst_AMIGA_DS.C CLK_000_D_1_.D + CLK_000_D_1_.C CLK_000_D_0_.D CLK_000_D_0_.C inst_CLK_OUT_PRE_50.D + inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C IPL_D0_0_.D% + IPL_D0_0_.C IPL_D0_1_.D% IPL_D0_1_.C IPL_D0_2_.D% IPL_D0_2_.C CLK_000_D_2_.D + CLK_000_D_2_.C CLK_000_D_4_.D CLK_000_D_4_.C inst_LDS_000_INT.D + inst_LDS_000_INT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C inst_UDS_000_INT.D% + inst_UDS_000_INT.C SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_4_.D SM_AMIGA_4_.C + SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C CYCLE_DMA_0_.D + CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C CLK_030_PE_0_.D% CLK_030_PE_0_.C + RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.D.X1 RST_DLY_1_.D.X2 RST_DLY_1_.C + RST_DLY_2_.D RST_DLY_2_.C inst_DSACK1_INT.D% inst_DSACK1_INT.C inst_AS_000_INT.D% + inst_AS_000_INT.C SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_3_.T SM_AMIGA_3_.C + SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_i_7_.T.X1 SM_AMIGA_i_7_.T.X2 + SM_AMIGA_i_7_.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C CIIN_0 +.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 +.p 187 +----------------------------------------------------------------------------------------------------- 0000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---0--------1-----------0---------------------------------------------------------------------------- 0100000000000000000000001010101010100100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------0----------------------------------------------0------------------ 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---0--------------------0---------------1------------------------------------------------------------ 0001000100000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------------------------------------------0---------0------------------- 0000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1---------------1------------------------------------------------------------ 0000010001010000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------0---------------------------------------------0------------------ 0000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------------------------10---------------------------------------------- 0000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------------------01----------------------------------------------- 0000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--1--1---1------0010--1----------------------------------------------------------0------------------- 0000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------------------------------------------------1----------------------- 0000000000000011000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--1--1---0------0010--1----------------------------------------------------------0------------------- 0000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------------------------------------0----------0------------------- 0000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1------------------------------------------------------------------------------------------------- 0000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 +-----------------------------------0----------------------------------------------------------------- 0000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------001------------------------------------------------------------------------ 0000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------110------------------------------------------------------------------------ 0000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---0--------------------0---------------------------------------------------------01----------------- 0000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1----------------------------------------------------------0----------------- 0000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0------0--------------------------------------------------------------------- 0000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0-----0---------------------------------------------------------------------- 0000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1--------0-----------------------------------------------0------------------- 0000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +1------------111----------------0-------------------------------------------------------00000000----- 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 +----------------------------------------------------------------------------------------------------1 0000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------0----------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000100100000000000001000000000000000000000000000010100000000000100000000000000000001000000000000000001000000000000000000000000 +------------------------1---------1----------------------------------1------------------------------- 0000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0-----------------------------------------------------------1---------------- 0000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------1-------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000010010010101010010101001010010010101010101010101010101010101010101010101010101010101010101010101010101001010101010101001010 +------------------------1---------1-------------------------1---------------------------------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0-----------------------------------------------------------00--------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---0--------------------0---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000001000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1--------01-------------------------101--------------------------------------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1--------00-------------------------001--------------------------------------------------- 0000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1--------01-------------------------100--------------------------------------------------- 0000000000000000000000000000000000000000000000000100010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1--------00-------------------------000--------------------------------------------------- 0000000000000000000000000000000000000000000000000101010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------0----------------------------------------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------0-------------------------1-------------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------1-------------------------0-------------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------------------------------0------------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1-------------------------------------1-----------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1-------------------------------------0-----------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1--------10-------------------------011--------------------------------------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1--------10-------------------------010--------------------------------------------------- 0000000000000000000000000000000000000000000000000001010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------0--------------------------------------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------------------0------------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------0---------------------------1-----------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------1---------------------------0-----------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1-------------------------------------1----------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1-------------------------------------0----------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1--------11-------------------------110--------------------------------------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1--------------------------------------------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------0-------------------------1--------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------1-------------------------0--------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------0---------------------------1-------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------1---------------------------0-------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------------------------------------0------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------------------------------1--------------------0----------1------------------------- 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------------------------------0-------------------0----------1------------------------- 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------------------------------------------0--0-----0----------1------------------------- 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------------------------------01----------1--0----------------1-----------------------0- 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---10------1--------------------1-----------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0------1----------------------------------------------------------------0------------------------ 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----1------------------1---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----1-------------------------------------10-------------------------------------1------------------ 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------1---------0------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------1----------------------------------0----------------------------------------- 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------0-----------------------------------------------------------00--------------- 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------0-------------0--------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------00000-------------01-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------------11001-------0-----10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------1---------1------------------------------0----------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------0----------------------------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0---------------1------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------1--0----------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------1----------------0--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------1-----------------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------0-01-------------10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------1------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------1--1-------------10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------010----------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------1--------------0--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------1---------------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------11-1-------------10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------1-------------0--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------1--------------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------0-------------10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------00---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------1-----0---1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------10---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------1------0--1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------------------------------------------------------------------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------------------0-----------------------------------------------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 +--01-------1------------1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1-------1----1-------1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1-------1-----1------1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1-------1------0-----1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1-------1-------1----1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1-------1----------0-1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------0---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------------1---------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000001000000000000000000000000 +-------------------------------------------------------------00-------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000001000000000000000000000000 +-----------------------------------1----------1------------------------------0----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------------------------------------------------1------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000001000000000000000000000000 +-------------------------------------------------------------11--------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000001000000000000000000000000 +------------------------------------1---------1------------------------------0-----1----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 +------0-----------------------------1----------------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------1----1-----------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------1--------------------------0-------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 +----------01----------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------------------------------1-------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------------------------------------------------------------------------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000 +-----------1----------------------------1------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------------------------------10---------------------111-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------------10------------------01-------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------------10------------------10-------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------0------0---1--------------011-------------0----0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------0------0---1--------------101-------------0----0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------------10-------------------1-------------------01----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------0------0---1---------------11-------------0----01----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 +------------------------------------------------------------------------------------11--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000 +--------------------------------------------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000 +-------1--------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000 +---------------------------------------------0------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000 +---------------------------------------------1------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000 +-----------1---------0------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000 +-----------1--------0-------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000 +-0---------1----------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000 +-------------------------------------------1--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000 +--------------------------------------1-------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000 +----------------------------------------------------1--0--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000 +-------------------------------------------------------1------------------------------10--------0---- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000 +-----------1-------------------------------01-----------1-------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 +-----------1-----------------------------------------1---------------------------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 +-----------1-------------------------------01----------1-------------------------------------------1- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 +-----------1------------------------------------------00--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000 +-----------1-------------------------------------------1----------------------------------------0---- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000 +-----------1-------------------------------1-----------1--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 +-----------1--------------------------------0----------1--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 +---1-------1---------------------0----0------------1---0-------------------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 +-----------1-------------------------------1------------1-------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 +-----------1--------------------------------0-----------1-------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 +-----------1-------------------------------10---------------------------1---------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 +-----------1-------------------------------01-----------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000 +-----------1-------------------------------0-------------1----------------0-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000 +-----------1--------------------------------1------------1----------------0-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000 +-----------1-------------------------------10------------1------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000001000000000000000 +-----------1-------------------------------1--------------1------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 +-----------1--------------------------------0-------------1------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 +-----------1------------0------------------0-----------------1--------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 +-----------1------------0-------------------1----------------1--------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 +-----------1------------0------------------10----------------0--------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 +-----------1------------0------------------------------------11-------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 +-----------1------------0------------------10----------------1--------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000 +-----------1------------0-------------------------------------1-------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000 +-----------------------------------1---------------------------0------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 +----------------------------------------------0----------------0------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 +---------------------------------------------------------------0-------------1----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 +-----------------------------------0-----0----1----------------1-------------0----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 +-----------1-------------------------------0----------------------1---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 +-----------1--------------------------------1---------------------1---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 +-----------1-------------------------------10---------------------0---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 +-----------1------------------------------------------------------111-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 +-----------1-------------------------------10---------------------1-0-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 +-----------1-------------------------------10---------------------10--------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 +-----------1-------------------------------------------------------1--------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 +-----------1-------------------------------10---------------------11--------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 +-----------1--------------------------------------------------------1-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 +-----------1----------------------------------------------------------0----------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 +-----------1-------------------------------01----------1--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000 +-----------1-----------------------------------------------------------0---------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000 +-----------1-------------------------------0----------------------------1---------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 +-----------1--------------------------------1---------------------------1---------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 +-----------0-------------------------------------------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +-------------------------00010-------0-----10----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +-------------------------------------1-0---10----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +-----------1-------------------------------01-----------1----------------0--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +-------------------------------------------10----------------------------1-----------------------0--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +-----------1-------------00010-------0-----10----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------1-------------------------1-0---10----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------1-------------------------------1------------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------1--------------------------------0-----------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------1-------------------------------10----------------------------1-----------------------0--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------0---------------------------------------------------------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +-----------1-------------------------------01-------------1----------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +---1-------1---------------------0----0------------1-----------------------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +---1-------1---------------------0----0----01------1------1----------------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000 +----------------------------------------------1------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 .end diff --git a/Logic/68030_tk.tte b/Logic/68030_tk.tte index 6adfbe7..99a4f75 100644 --- a/Logic/68030_tk.tte +++ b/Logic/68030_tk.tte @@ -1,259 +1,265 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Wed Oct 26 22:26:25 2016 +#$ DATE Fri Nov 18 19:32:36 2016 #$ MODULE BUS68030 -#$ PINS 61 AHIGH_31_ A_DECODE_23_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 - LDS_000 nEXP_SPACE BERR BG_030 AHIGH_30_ BGACK_000 AHIGH_29_ CLK_030 AHIGH_28_ - CLK_000 AHIGH_27_ CLK_OSZI AHIGH_26_ CLK_DIV_OUT AHIGH_25_ AHIGH_24_ FPU_CS - A_DECODE_22_ FPU_SENSE A_DECODE_21_ DSACK1 A_DECODE_20_ DTACK A_DECODE_19_ AVEC - A_DECODE_18_ E A_DECODE_17_ VPA A_DECODE_16_ RST RESET AMIGA_ADDR_ENABLE - AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_1_ IPL_0_ - FC_0_ A_1_ SIZE_1_ IPL_030_2_ RW_000 BG_000 SIZE_0_ BGACK_030 CLK_EXP VMA RW - A_0_ IPL_030_1_ IPL_030_0_ -#$ NODES 44 cpu_est_2_ cpu_est_3_ cpu_est_0_ cpu_est_1_ +#$ PINS 61 AHIGH_31_ IPL_1_ IPL_0_ A_DECODE_23_ FC_0_ A_1_ IPL_2_ FC_1_ AS_030 + AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 + CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 DTACK AVEC E AHIGH_30_ VPA + AHIGH_29_ AHIGH_28_ RST AHIGH_27_ RESET AHIGH_26_ AHIGH_25_ AMIGA_ADDR_ENABLE + AHIGH_24_ AMIGA_BUS_DATA_DIR A_DECODE_22_ AMIGA_BUS_ENABLE_LOW A_DECODE_21_ + AMIGA_BUS_ENABLE_HIGH A_DECODE_20_ CIIN A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ + A_DECODE_16_ A_0_ SIZE_1_ IPL_030_1_ IPL_030_0_ IPL_030_2_ RW_000 BG_000 + BGACK_030 SIZE_0_ VMA RW +#$ NODES 47 cpu_est_1_ cpu_est_2_ cpu_est_3_ cpu_est_0_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_AS_000_DMA inst_DS_000_DMA - CYCLE_DMA_0_ CYCLE_DMA_1_ inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_RESET_OUT + inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_RESET_OUT CLK_030_PE_1_ inst_AMIGA_DS CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_LDS_000_INT inst_DS_000_ENABLE inst_UDS_000_INT SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ - SM_AMIGA_0_ RST_DLY_0_ RST_DLY_1_ RST_DLY_2_ inst_CLK_030_H inst_DSACK1_INT - inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ SM_AMIGA_i_7_ CIIN_0 + SM_AMIGA_0_ CYCLE_DMA_0_ CYCLE_DMA_1_ CLK_030_PE_0_ RST_DLY_0_ RST_DLY_1_ + RST_DLY_2_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ + SM_AMIGA_i_7_ CLK_OUT_INTreg CIIN_0 .type f -.i 97 -.o 162 +.i 101 +.o 166 .ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 - CLK_OSZI FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ + CLK_OSZI FPU_SENSE VPA RST RESET A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ - BGACK_030.Q VMA.Q cpu_est_2_.Q cpu_est_3_.Q cpu_est_0_.Q cpu_est_1_.Q + BGACK_030.Q VMA.Q cpu_est_1_.Q cpu_est_2_.Q cpu_est_3_.Q cpu_est_0_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_000_SYNC.Q inst_BGACK_030_INT_D.Q inst_AS_000_DMA.Q - inst_DS_000_DMA.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q inst_VPA_D.Q CLK_000_D_3_.Q - inst_DTACK_D0.Q inst_RESET_OUT.Q CLK_000_D_1_.Q CLK_000_D_0_.Q + inst_DS_000_DMA.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q inst_RESET_OUT.Q + CLK_030_PE_1_.Q inst_AMIGA_DS.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_4_.Q inst_LDS_000_INT.Q inst_DS_000_ENABLE.Q inst_UDS_000_INT.Q SM_AMIGA_6_.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q - SIZE_0_.Q SIZE_1_.Q RW_000.Q RW.Q RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q - inst_CLK_030_H.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q - SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q BG_000.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q - AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN + SIZE_0_.Q SIZE_1_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q CLK_030_PE_0_.Q RW_000.Q RW.Q + RST_DLY_0_.Q RST_DLY_1_.Q RST_DLY_2_.Q A_0_.Q inst_DSACK1_INT.Q + inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q SM_AMIGA_i_7_.Q + BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q AS_030.PIN + AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN - AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN CIIN_0 + AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN DTACK.PIN RW.PIN + CIIN_0 .ob AHIGH_31_ AHIGH_31_.OE AS_030- AS_030.OE AS_000- AS_000.OE DS_030- DS_030.OE - UDS_000- UDS_000.OE LDS_000- LDS_000.OE BERR BERR.OE AHIGH_30_ AHIGH_30_.OE - AHIGH_29_ AHIGH_29_.OE AHIGH_28_ AHIGH_28_.OE AHIGH_27_ AHIGH_27_.OE AHIGH_26_ - AHIGH_26_.OE CLK_DIV_OUT.D CLK_DIV_OUT.C AHIGH_25_ AHIGH_25_.OE AHIGH_24_ - AHIGH_24_.OE FPU_CS- DSACK1- DSACK1.OE AVEC E RESET RESET.OE AMIGA_ADDR_ENABLE + UDS_000- UDS_000.OE LDS_000- LDS_000.OE BERR BERR.OE CLK_DIV_OUT CLK_EXP FPU_CS- + DSACK1- DSACK1.OE DTACK DTACK.OE AVEC E AHIGH_30_ AHIGH_30_.OE AHIGH_29_ + AHIGH_29_.OE AHIGH_28_ AHIGH_28_.OE AHIGH_27_ AHIGH_27_.OE AHIGH_26_ + AHIGH_26_.OE AHIGH_25_ AHIGH_25_.OE AMIGA_ADDR_ENABLE AHIGH_24_ AHIGH_24_.OE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW- AMIGA_BUS_ENABLE_HIGH- CIIN CIIN.OE - SIZE_1_.D SIZE_1_.C SIZE_1_.OE IPL_030_2_.T IPL_030_2_.C RW_000.D- RW_000.C - RW_000.OE BG_000.D- BG_000.C SIZE_0_.D- SIZE_0_.C SIZE_0_.OE BGACK_030.D - BGACK_030.C CLK_EXP.D CLK_EXP.C VMA.T VMA.C RW.D- RW.C RW.OE A_0_.D A_0_.C - A_0_.OE IPL_030_1_.T IPL_030_1_.C IPL_030_0_.T IPL_030_0_.C cpu_est_2_.D.X1 - cpu_est_2_.D.X2 cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C cpu_est_0_.D cpu_est_0_.C - cpu_est_1_.D cpu_est_1_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- + A_0_.D A_0_.C A_0_.OE SIZE_1_.D SIZE_1_.C SIZE_1_.OE IPL_030_1_.D- IPL_030_1_.C + IPL_030_0_.D- IPL_030_0_.C IPL_030_2_.D- IPL_030_2_.C RW_000.D- RW_000.C + RW_000.OE BG_000.D- BG_000.C BGACK_030.D BGACK_030.C SIZE_0_.D- SIZE_0_.C + SIZE_0_.OE VMA.T VMA.C RW.D- RW.C RW.OE cpu_est_1_.D cpu_est_1_.C + cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C + cpu_est_0_.D cpu_est_0_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D- inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_AS_030_D0.D- inst_AS_030_D0.C inst_AS_030_000_SYNC.D- inst_AS_030_000_SYNC.C inst_BGACK_030_INT_D.D- inst_BGACK_030_INT_D.C inst_AS_000_DMA.D inst_AS_000_DMA.C inst_DS_000_DMA.D - inst_DS_000_DMA.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C - inst_VPA_D.D- inst_VPA_D.C CLK_000_D_3_.D CLK_000_D_3_.C inst_DTACK_D0.D- - inst_DTACK_D0.C inst_RESET_OUT.D inst_RESET_OUT.C CLK_000_D_1_.D CLK_000_D_1_.C - CLK_000_D_0_.D CLK_000_D_0_.C inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C - inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C IPL_D0_0_.D- IPL_D0_0_.C IPL_D0_1_.D- - IPL_D0_1_.C IPL_D0_2_.D- IPL_D0_2_.C CLK_000_D_2_.D CLK_000_D_2_.C - CLK_000_D_4_.D CLK_000_D_4_.C inst_LDS_000_INT.D inst_LDS_000_INT.C - inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C inst_UDS_000_INT.D- inst_UDS_000_INT.C - SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_1_.D - SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C RST_DLY_0_.D RST_DLY_0_.C - RST_DLY_1_.D.X1 RST_DLY_1_.D.X2 RST_DLY_1_.C RST_DLY_2_.D RST_DLY_2_.C - inst_CLK_030_H.D inst_CLK_030_H.C inst_DSACK1_INT.D- inst_DSACK1_INT.C - inst_AS_000_INT.D- inst_AS_000_INT.C SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_3_.T - SM_AMIGA_3_.C SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_i_7_.T.X1 SM_AMIGA_i_7_.T.X2 - SM_AMIGA_i_7_.C CIIN_0 -.phase 111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 -.p 185 -------------------------------------------------------------------------------------------------- 000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0-----------------1------------------------------------------------------ 010100010000000101010101000101000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------0-------------------------------------------0----------------- 001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------------------------------------0--------0------------------ 000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1-----------------1------------------------------------------------------ 000001000101000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------0------------------------------------------0----------------- 000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------------------------10------------------------------------------ 000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------01------------------------------------------- 000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---1--1---1------0010--1-------------------------------------------------------0------------------ 000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------1-------------------------------------------------- 000000000000000000000000100000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------1---------------------------------------------------------------------------------------- 000000000000000000000000010000000000000000001001010010100101010100100101001010101010101010101010101010101010101010101010101010101010101010101001010101010101010010 ---1--1---0------0010--1-------------------------------------------------------0------------------ 000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------------------------------0---------0------------------ 000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------------------------------------------------------------------------------------------- 000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 ---------------------------10-1------------------------------------------------------------------- 000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------01-0------------------------------------------------------------------- 000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------------0------------------------------------------------------ 000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0------------------------------------------------------01---------------- 000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1-------------------------------------------------------0---------------- 000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0------0----------------------------------------------------------------- 000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0-----0------------------------------------------------------------------ 000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1--------0--------------------------------------------0------------------ 000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -1------------111----------------0----------------------------------------------------00000000---- 000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 -------------------------------------------------------------------------------------------------1 000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------0------------------------------------------------------------------------------------ 000000000000000000000000000000000000000000010000000000001000000001000000000000000000000000010100000000000000000000000000000001000000000000000000000000000000000000 -------------------------1---------1-------------------------1------------------------------------ 000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0--------------------------------------------------------00-------------- 000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----0--------------------0------------------------------------------------------------------------ 000000000000000000000000000000000000000000000100000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------11---------------------01--110---------------------------1------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------10---------------------01--010---------------------------1------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------01---------------------01--100---------------------------1------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------00---------------------01--000---------------------------1------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------0----------------------------------------------------------------0------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1------------------11---------------------01--111---------------------------0------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1------------------10---------------------01--011---------------------------0------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1------------------01---------------------01--101---------------------------0------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1------------------00---------------------01--001---------------------------0------------------- 000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1------------------------------1-----------------0-----------1----------------------- 000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-------------------------------0----------------0-----------1----------------------- 000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1------------------------------------------0--0--0-----------1----------------------- 000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1------------------------------01----------1--0--------------1---------------------0- 000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----10-------1-------------------1-----------1---------------------------------------------------- 000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0-------1-------------------------------------------------------------0---------------------- 000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1---------0-------------------------------------------------------------- 000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1----------------------------------0------------------------------------- 000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0--------------------------------------------------------00-------------- 000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------1------------------1------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------1-------------------------------------01----------------------------------1----------------- 000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------0------------0----------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------00000-------------01---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1------------10011---------0---10---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1---------1---------------------------0---------------------------------- 000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0-------------------------------------------------------0---------------- 000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0-----------------1------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1---------1-------------------------------1------------------------------ 000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------0--------------------------------------------------------1--------------- 000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-------01---------------------01--101--------------------------1-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-------00---------------------01--001--------------------------1-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------01---------------------01--100--------------------------1-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------00---------------------01--000--------------------------1-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------0---------------------------------------------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1------------------11---------------------01--111--------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1------------------10---------------------01--011--------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0------------------11---------------------01--110--------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0------------------10---------------------01--010--------------------------0-------------------- 000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-------10---------------------01--011-------------------------1--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1----------1-------00---------------------01--001-------------------------1--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------10---------------------01--010-------------------------1--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0----------1-------00---------------------01--000-------------------------1--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------0--------------------------------------------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1------------------11---------------------01--111-------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --1------------------01---------------------01--101-------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0------------------11---------------------01--110-------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0------------------01---------------------01--100-------------------------0--------------------- 000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1---------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------11-------------10---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------010-------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------1---------------0----------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------1----------------1---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------1-11-------------10---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------1--------------0----------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------1---------------1---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------0--------------10---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------01------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------1-------------0----------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------1--------------1---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------010-------------10---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1----------00------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1-----0---1-------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1----------10------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------1------0--1-------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------------------------------------------------------------0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000 -------------1--------------------0--------------------------------------------0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 ---01--------1-----------1-------0-1--------------------------------------0----0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1---1-------1-------0-1--------------------------------------0----0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1----1------1-------0-1--------------------------------------0----0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1-----0-----1-------0-1--------------------------------------0----0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1------1----1-------0-1--------------------------------------0----0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 ----1--------1---------0-1-------0-1--------------------------------------0----0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------1------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000 -------0----------------------------1------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------11---------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------00---------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------------------------------------------------1----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------------------------------------------------11-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000 -------0-----------------------------1-------------------------------------------0---------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000 -------1----------------------------1-------------------------------1------------0---------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------1------------------------------0------------0---------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------1-----1-----------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------0-----01----------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------1------0----------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------01----------------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0-------------1----1-----------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0------------10----01----------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 -------------1-----------0-------------1-----0----------------------------------0----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 ------------01------------------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------------1---------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000 -----------0-1------------------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000 -------------1-----------------------------1------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000 -------------1------------------------------10------------------111------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000 ---------------------------------------------1---------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000 --------1----------------------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000 ----------------------------------------------0--------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000 ----------------------------------------------1--------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000 -------------1--------0--------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000 -------------1-------0---------------------------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000 --0----------1------------------------------------------------------------------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000 --------------------------------------------1----------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 -----------------------------------------1-------------------------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000 -----------------------------------------------------1--0----------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 --------------------------------------------------------1---------------------------10--------0--- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 -------------1------------------------------01-----------1---------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 -------------1----------------------------------------1------------------------0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 -------------1------------------------------01----------1---------------------------------------1- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 -------------1-----------------------------------------00----------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000 -------------1------------------------------------------1-------------------------------------0--- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000 -------------1------------------------------1-----------1----------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 -------------1-------------------------------0----------1----------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 ----1--------1--------------------0------0----------1---0-----------------0----------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 -------------1------------------------------1------------1---------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 -------------1-------------------------------0-----------1---------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 -------------1------------------------------10-------------------------1-------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 -------------1------------------------------01---------------------------1------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000 -------------1------------------------------0-------------1--------------0------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000 -------------1-------------------------------1------------1--------------0------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000 -------------1------------------------------10------------1--------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000010000000000000 -------------1------------------------------1--------------1-------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 -------------1-------------------------------0-------------1-------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 -------------1------------------------------0-------------------1--------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 -------------1-------------------------------1------------------1--------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 -------------1------------------------------10------------------0--------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 -------------1--------------------------------------------------111------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 -------------1------------------------------10------------------1-0------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 -------------1------------------------------10------------------10-------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 -------------1---------------------------------------------------1-------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 -------------1------------------------------10------------------11-------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 -------------1----------------------------------------------------1------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 -------0-----1-----------0----------0-01----------------------------------------0-0--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 -------0-----1-----------0----------0-10----------------------------------------0-0--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 -------------1-----------0------------01----------------------------1-----------0-0--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 -------------1-----------0------------10----------------------------1-----------0-0--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 -------0-----1-----------0----------0-01----------------------------------------0--0-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 -------0-----1-----------0----------0-10----------------------------------------0--0-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 -------------1-----------0------------01----------------------------1-----------0--0-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 -------------1-----------0------------10----------------------------1-----------0--0-------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 -------------1-------------------------------------------------------0---------0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000 -------------1------------------------------01----------1----------------------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000101000000000 -------------1--------------------------------------------------------0--------0------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 -------------1------------------------------0--------------------------1-------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 -------------1-------------------------------1-------------------------1-------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 -------------0----------------------------------------------------------1------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 --------------------------00100---------0---10--------------------------1------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 ----------------------------------------1-0-10--------------------------1------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 -------------1------------------------------01-----------1--------------0------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 --------------------------------------------10--------------------------1----------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 -------------1------------00100---------0---10--------------------------1------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------1--------------------------1-0-10--------------------------1------------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------1------------------------------1----------------------------1------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------1-------------------------------0---------------------------1------------------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------1------------------------------10--------------------------1----------------------0-- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 -------------0------------------------------------------------------------1----------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 -------------1------------------------------01-------------1--------------1----------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 ----1--------1--------------------0------0----------1---------------------0----------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 ----1--------1--------------------0------0--01------1------1--------------0----------------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 + inst_DS_000_DMA.C inst_VPA_D.D- inst_VPA_D.C CLK_000_D_3_.D CLK_000_D_3_.C + inst_DTACK_D0.D- inst_DTACK_D0.C inst_RESET_OUT.D inst_RESET_OUT.C + CLK_030_PE_1_.D CLK_030_PE_1_.C inst_AMIGA_DS.D inst_AMIGA_DS.C CLK_000_D_1_.D + CLK_000_D_1_.C CLK_000_D_0_.D CLK_000_D_0_.C inst_CLK_OUT_PRE_50.D + inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C IPL_D0_0_.D- + IPL_D0_0_.C IPL_D0_1_.D- IPL_D0_1_.C IPL_D0_2_.D- IPL_D0_2_.C CLK_000_D_2_.D + CLK_000_D_2_.C CLK_000_D_4_.D CLK_000_D_4_.C inst_LDS_000_INT.D + inst_LDS_000_INT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C inst_UDS_000_INT.D- + inst_UDS_000_INT.C SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_4_.D SM_AMIGA_4_.C + SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C CYCLE_DMA_0_.D + CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C CLK_030_PE_0_.D- CLK_030_PE_0_.C + RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.D.X1 RST_DLY_1_.D.X2 RST_DLY_1_.C + RST_DLY_2_.D RST_DLY_2_.C inst_DSACK1_INT.D- inst_DSACK1_INT.C inst_AS_000_INT.D- + inst_AS_000_INT.C SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_3_.T SM_AMIGA_3_.C + SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_i_7_.T.X1 SM_AMIGA_i_7_.T.X2 + SM_AMIGA_i_7_.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C CIIN_0 +.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 +.p 187 +----------------------------------------------------------------------------------------------------- 0000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---0--------1-----------0---------------------------------------------------------------------------- 0100000000000000000000001010101010100100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------0----------------------------------------------0------------------ 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---0--------------------0---------------1------------------------------------------------------------ 0001000100000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------------------------------------------0---------0------------------- 0000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1---------------1------------------------------------------------------------ 0000010001010000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------0---------------------------------------------0------------------ 0000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------------------------10---------------------------------------------- 0000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------------------01----------------------------------------------- 0000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--1--1---1------0010--1----------------------------------------------------------0------------------- 0000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------------------------------------------------1----------------------- 0000000000000011000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--1--1---0------0010--1----------------------------------------------------------0------------------- 0000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------------------------------------0----------0------------------- 0000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1------------------------------------------------------------------------------------------------- 0000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 +-----------------------------------0----------------------------------------------------------------- 0000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------001------------------------------------------------------------------------ 0000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------110------------------------------------------------------------------------ 0000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---0--------------------0---------------------------------------------------------01----------------- 0000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1----------------------------------------------------------0----------------- 0000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0------0--------------------------------------------------------------------- 0000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0-----0---------------------------------------------------------------------- 0000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------1--------0-----------------------------------------------0------------------- 0000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +1------------111----------------0-------------------------------------------------------00000000----- 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001 +----------------------------------------------------------------------------------------------------1 0000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------0----------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000100100000000000001000000000000000000000000000010100000000000100000000000000000001000000000000000001000000000000000000000000 +------------------------1---------1----------------------------------1------------------------------- 0000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0-----------------------------------------------------------1---------------- 0000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------1-------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000010010010101010010101001010010010101010101010101010101010101010101010101010101010101010101010101010101001010101010101001010 +------------------------1---------1-------------------------1---------------------------------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0-----------------------------------------------------------00--------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---0--------------------0---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000001000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1--------01-------------------------101--------------------------------------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1--------00-------------------------001--------------------------------------------------- 0000000000000000000000000000000000000000000000000101000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1--------01-------------------------100--------------------------------------------------- 0000000000000000000000000000000000000000000000000100010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1--------00-------------------------000--------------------------------------------------- 0000000000000000000000000000000000000000000000000101010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------0----------------------------------------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------0-------------------------1-------------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------1-------------------------0-------------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------------------------------0------------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1-------------------------------------1-----------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1-------------------------------------0-----------------------------0--------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1--------10-------------------------011--------------------------------------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1--------10-------------------------010--------------------------------------------------- 0000000000000000000000000000000000000000000000000001010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------0--------------------------------------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------------------0------------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------0---------------------------1-----------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------1---------------------------0-----------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1-------------------------------------1----------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-1---------1-------------------------------------0----------------------------0---------------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1--------11-------------------------110--------------------------------------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0---------1--------------------------------------------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------0-------------------------1--------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------1-------------------------0--------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------0---------------------------1-------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------1---------------------------0-------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------------------------------------0------------------------------0-------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------------------------------1--------------------0----------1------------------------- 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------------------------------0-------------------0----------1------------------------- 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------------------------------------------0--0-----0----------1------------------------- 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------------------------------01----------1--0----------------1-----------------------0- 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---10------1--------------------1-----------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0------1----------------------------------------------------------------0------------------------ 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----1------------------1---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----1-------------------------------------10-------------------------------------1------------------ 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------1---------0------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------1----------------------------------0----------------------------------------- 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------0-----------------------------------------------------------00--------------- 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------0-------------0--------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------00000-------------01-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------------11001-------0-----10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------1---------1------------------------------0----------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------0----------------------------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------0---------------1------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------1--0----------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------1----------------0--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------1-----------------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------0-01-------------10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------1------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------1--1-------------10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------010----------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------1--------------0--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------1---------------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------11-1-------------10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------1-------------0--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------1--------------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------0-------------10-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------00---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------1-----0---1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------10---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------1------0--1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------------------------------------------------------------------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1---------------------0-----------------------------------------------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 +--01-------1------------1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1-------1----1-------1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1-------1-----1------1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1-------1------0-----1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1-------1-------1----1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 +---1-------1----------0-1-------0-1----------------------------------------0-----0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------0---------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------------1---------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000001000000000000000000000000 +-------------------------------------------------------------00-------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000001000000000000000000000000 +-----------------------------------1----------1------------------------------0----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------------------------------------------------1------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000001000000000000000000000000 +-------------------------------------------------------------11--------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000001000000000000000000000000 +------------------------------------1---------1------------------------------0-----1----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 +------0-----------------------------1----------------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------1----1-----------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------1--------------------------0-------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000 +----------01----------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------------------------------1-------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000 +-----------1--------------------------------------------------------------------------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000 +-----------1----------------------------1------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 +-----------1-------------------------------10---------------------111-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------------10------------------01-------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------------10------------------10-------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------0------0---1--------------011-------------0----0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------0------0---1--------------101-------------0----0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------------10-------------------1-------------------01----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 +-----------1-----------------------0------0---1---------------11-------------0----01----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 +------------------------------------------------------------------------------------11--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000 +--------------------------------------------1-------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000 +-------1--------------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000 +---------------------------------------------0------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000 +---------------------------------------------1------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000 +-----------1---------0------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000 +-----------1--------0-------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000 +-0---------1----------------------------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000 +-------------------------------------------1--------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000 +--------------------------------------1-------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000 +----------------------------------------------------1--0--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000 +-------------------------------------------------------1------------------------------10--------0---- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000 +-----------1-------------------------------01-----------1-------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 +-----------1-----------------------------------------1---------------------------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 +-----------1-------------------------------01----------1-------------------------------------------1- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 +-----------1------------------------------------------00--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000 +-----------1-------------------------------------------1----------------------------------------0---- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000 +-----------1-------------------------------1-----------1--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 +-----------1--------------------------------0----------1--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 +---1-------1---------------------0----0------------1---0-------------------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 +-----------1-------------------------------1------------1-------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 +-----------1--------------------------------0-----------1-------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 +-----------1-------------------------------10---------------------------1---------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 +-----------1-------------------------------01-----------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000 +-----------1-------------------------------0-------------1----------------0-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000 +-----------1--------------------------------1------------1----------------0-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000 +-----------1-------------------------------10------------1------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000001000000000000000 +-----------1-------------------------------1--------------1------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 +-----------1--------------------------------0-------------1------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 +-----------1------------0------------------0-----------------1--------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 +-----------1------------0-------------------1----------------1--------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 +-----------1------------0------------------10----------------0--------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 +-----------1------------0------------------------------------11-------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 +-----------1------------0------------------10----------------1--------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000 +-----------1------------0-------------------------------------1-------------------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000 +-----------------------------------1---------------------------0------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 +----------------------------------------------0----------------0------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 +---------------------------------------------------------------0-------------1----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 +-----------------------------------0-----0----1----------------1-------------0----------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000 +-----------1-------------------------------0----------------------1---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 +-----------1--------------------------------1---------------------1---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 +-----------1-------------------------------10---------------------0---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 +-----------1------------------------------------------------------111-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 +-----------1-------------------------------10---------------------1-0-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 +-----------1-------------------------------10---------------------10--------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 +-----------1-------------------------------------------------------1--------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 +-----------1-------------------------------10---------------------11--------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 +-----------1--------------------------------------------------------1-------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 +-----------1----------------------------------------------------------0----------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000 +-----------1-------------------------------01----------1--------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010100000000000 +-----------1-----------------------------------------------------------0---------0------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000 +-----------1-------------------------------0----------------------------1---------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 +-----------1--------------------------------1---------------------------1---------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 +-----------0-------------------------------------------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +-------------------------00010-------0-----10----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +-------------------------------------1-0---10----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +-----------1-------------------------------01-----------1----------------0--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +-------------------------------------------10----------------------------1-----------------------0--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000 +-----------1-------------00010-------0-----10----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------1-------------------------1-0---10----------------------------1--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------1-------------------------------1------------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------1--------------------------------0-----------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------1-------------------------------10----------------------------1-----------------------0--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000 +-----------0---------------------------------------------------------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +-----------1-------------------------------01-------------1----------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +---1-------1---------------------0----0------------1-----------------------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +---1-------1---------------------0----0----01------1------1----------------0------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000 +----------------------------------------------1------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 .end diff --git a/Logic/68030_tk.vcl b/Logic/68030_tk.vcl index 69883e6..de660aa 100644 --- a/Logic/68030_tk.vcl +++ b/Logic/68030_tk.vcl @@ -17,8 +17,8 @@ Parent = m4a5.lci; SDS_file = m4a5.sds; Design = 68030_tk.tt4; Rev = 0.01; -DATE = 10/26/16; -TIME = 22:26:30; +DATE = 11/18/16; +TIME = 19:32:40; Type = TT2; Pre_Fit_Time = 1; Source_Format = Pure_VHDL; @@ -147,10 +147,11 @@ AS_000 = OUTPUT,42,4,-; UDS_000 = OUTPUT,32,3,-; LDS_000 = OUTPUT,31,3,-; RW = BIDIR,71,6,-; -BERR = OUTPUT,41,4,-; SIZE_1_ = BIDIR,79,7,-; SIZE_0_ = BIDIR,70,6,-; A_0_ = BIDIR,69,6,-; +BERR = OUTPUT,41,4,-; +DTACK = OUTPUT,30,3,-; AHIGH_24_ = OUTPUT,19,2,-; AHIGH_25_ = OUTPUT,18,2,-; AHIGH_26_ = OUTPUT,17,2,-; @@ -177,60 +178,62 @@ CIIN = OUTPUT,47,4,-; AMIGA_ADDR_ENABLE = OUTPUT,33,3,-; AMIGA_BUS_ENABLE_LOW = OUTPUT,20,2,-; CLK_EXP = OUTPUT,10,1,-; -RESET = OUTPUT,3,1,-; RN_BGACK_030 = NODE,-1,7,-; -inst_RESET_OUT = NODE,*,6,-; -CLK_000_D_0_ = NODE,*,2,-; +CLK_000_D_0_ = NODE,*,3,-; CLK_000_D_1_ = NODE,*,7,-; -SM_AMIGA_6_ = NODE,*,2,-; -inst_BGACK_030_INT_D = NODE,*,4,-; -inst_AS_030_000_SYNC = NODE,*,5,-; -cpu_est_1_ = NODE,*,0,-; -cpu_est_3_ = NODE,*,3,-; -SM_AMIGA_i_7_ = NODE,*,2,-; -cpu_est_0_ = NODE,*,6,-; -inst_AS_030_D0 = NODE,*,4,-; -cpu_est_2_ = NODE,*,0,-; +inst_RESET_OUT = NODE,*,6,-; +SM_AMIGA_6_ = NODE,*,5,-; +inst_BGACK_030_INT_D = NODE,*,7,-; +inst_AS_030_000_SYNC = NODE,*,1,-; inst_AS_000_DMA = NODE,*,0,-; -SM_AMIGA_2_ = NODE,*,0,-; -SM_AMIGA_3_ = NODE,*,3,-; +cpu_est_3_ = NODE,*,3,-; +cpu_est_1_ = NODE,*,3,-; +SM_AMIGA_i_7_ = NODE,*,5,-; +SM_AMIGA_0_ = NODE,*,0,-; +cpu_est_0_ = NODE,*,6,-; +CLK_OUT_INTreg = NODE,*,3,-; +inst_AS_030_D0 = NODE,*,7,-; +cpu_est_2_ = NODE,*,3,-; +SM_AMIGA_2_ = NODE,*,2,-; RN_VMA = NODE,-1,3,-; -SM_AMIGA_5_ = NODE,*,2,-; -SM_AMIGA_0_ = NODE,*,7,-; +SM_AMIGA_5_ = NODE,*,6,-; SM_AMIGA_1_ = NODE,*,5,-; -SM_AMIGA_4_ = NODE,*,3,-; -inst_DS_000_ENABLE = NODE,*,1,-; +SM_AMIGA_4_ = NODE,*,0,-; +inst_DS_000_ENABLE = NODE,*,2,-; inst_LDS_000_INT = NODE,*,5,-; inst_AS_000_INT = NODE,*,2,-; +inst_DSACK1_INT = NODE,*,0,-; inst_UDS_000_INT = NODE,*,5,-; inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,*,5,-; -inst_AMIGA_BUS_ENABLE_DMA_HIGH = NODE,*,2,-; -inst_CLK_OUT_PRE_D = NODE,*,3,-; +inst_AMIGA_BUS_ENABLE_DMA_HIGH = NODE,*,5,-; +inst_CLK_OUT_PRE_D = NODE,*,4,-; inst_CLK_OUT_PRE_50 = NODE,*,6,-; -inst_DTACK_D0 = NODE,*,1,-; -CLK_000_D_3_ = NODE,*,3,-; -inst_VPA_D = NODE,*,0,-; +CLK_000_D_3_ = NODE,*,5,-; +inst_VPA_D = NODE,*,5,-; +RN_IPL_030_2_ = NODE,-1,1,-; RN_IPL_030_0_ = NODE,-1,1,-; RN_IPL_030_1_ = NODE,-1,1,-; -RN_IPL_030_2_ = NODE,-1,1,-; +CLK_030_PE_0_ = NODE,*,0,-; inst_DS_000_DMA = NODE,*,0,-; -inst_CLK_030_H = NODE,*,0,-; +CLK_030_PE_1_ = NODE,*,0,-; +SM_AMIGA_3_ = NODE,*,2,-; RN_RW_000 = NODE,-1,7,-; RST_DLY_0_ = NODE,*,6,-; -CYCLE_DMA_1_ = NODE,*,0,-; -RN_A_0_ = NODE,-1,6,-; +CYCLE_DMA_0_ = NODE,*,0,-; RN_SIZE_0_ = NODE,-1,6,-; RN_SIZE_1_ = NODE,-1,7,-; -CYCLE_DMA_0_ = NODE,*,0,-; +RN_A_0_ = NODE,-1,6,-; RN_RW = NODE,-1,6,-; RN_BG_000 = NODE,-1,3,-; CIIN_0 = NODE,*,4,-; -inst_DSACK1_INT = NODE,*,7,-; RST_DLY_2_ = NODE,*,6,-; RST_DLY_1_ = NODE,*,6,-; -CLK_000_D_4_ = NODE,*,1,-; +CYCLE_DMA_1_ = NODE,*,0,-; +inst_AMIGA_DS = NODE,*,2,-; +CLK_000_D_4_ = NODE,*,2,-; CLK_000_D_2_ = NODE,*,7,-; IPL_D0_2_ = NODE,*,1,-; -IPL_D0_1_ = NODE,*,3,-; -IPL_D0_0_ = NODE,*,6,-; +IPL_D0_1_ = NODE,*,1,-; +IPL_D0_0_ = NODE,*,1,-; +inst_DTACK_D0 = NODE,*,1,-; CLK_OSZI = INPUT,61,-,-; diff --git a/Logic/68030_tk.vco b/Logic/68030_tk.vco index 7cfeafa..6081306 100644 --- a/Logic/68030_tk.vco +++ b/Logic/68030_tk.vco @@ -17,8 +17,8 @@ Parent = m4a5.lci; SDS_file = m4a5.sds; Design = 68030_tk.tt4; Rev = 0.01; -DATE = 10/26/16; -TIME = 22:26:30; +DATE = 11/18/16; +TIME = 19:32:41; Type = TT2; Pre_Fit_Time = 1; Source_Format = Pure_VHDL; @@ -142,7 +142,11 @@ layer = OFF; Layer = OFF; AHIGH_31_ = BIDIR,4, B,-; +IPL_1_ = INPUT,56, F,-; +IPL_0_ = INPUT,67, G,-; A_DECODE_23_ = INPUT,85, H,-; +FC_0_ = INPUT,57, F,-; +A_1_ = INPUT,60, F,-; IPL_2_ = INPUT,68, G,-; FC_1_ = INPUT,58, F,-; AS_030 = BIDIR,82, H,-; @@ -153,96 +157,95 @@ LDS_000 = BIDIR,31, D,-; nEXP_SPACE = INPUT,14,-,-; BERR = BIDIR,41, E,-; BG_030 = INPUT,21, C,-; -AHIGH_30_ = BIDIR,5, B,-; BGACK_000 = INPUT,28, D,-; -AHIGH_29_ = BIDIR,6, B,-; CLK_030 = INPUT,64,-,-; -AHIGH_28_ = BIDIR,15, C,-; CLK_000 = INPUT,11,-,-; -AHIGH_27_ = BIDIR,16, C,-; CLK_OSZI = INPUT,61,-,-; -AHIGH_26_ = BIDIR,17, C,-; CLK_DIV_OUT = OUTPUT,65, G,-; -AHIGH_25_ = BIDIR,18, C,-; -AHIGH_24_ = BIDIR,19, C,-; +CLK_EXP = OUTPUT,10, B,-; FPU_CS = OUTPUT,78, H,-; -A_DECODE_22_ = INPUT,84, H,-; FPU_SENSE = INPUT,91, A,-; -A_DECODE_21_ = INPUT,94, A,-; DSACK1 = OUTPUT,81, H,-; -A_DECODE_20_ = INPUT,93, A,-; -DTACK = INPUT,30, D,-; -A_DECODE_19_ = INPUT,97, A,-; +DTACK = BIDIR,30, D,-; AVEC = OUTPUT,92, A,-; -A_DECODE_18_ = INPUT,95, A,-; E = OUTPUT,66, G,-; -A_DECODE_17_ = INPUT,59, F,-; +AHIGH_30_ = BIDIR,5, B,-; VPA = INPUT,36,-,-; -A_DECODE_16_ = INPUT,96, A,-; +AHIGH_29_ = BIDIR,6, B,-; +AHIGH_28_ = BIDIR,15, C,-; RST = INPUT,86,-,-; -RESET = OUTPUT,3, B,-; +AHIGH_27_ = BIDIR,16, C,-; +RESET = INPUT,3, B,-; +AHIGH_26_ = BIDIR,17, C,-; +AHIGH_25_ = BIDIR,18, C,-; AMIGA_ADDR_ENABLE = OUTPUT,33, D,-; +AHIGH_24_ = BIDIR,19, C,-; AMIGA_BUS_DATA_DIR = OUTPUT,48, E,-; +A_DECODE_22_ = INPUT,84, H,-; AMIGA_BUS_ENABLE_LOW = OUTPUT,20, C,-; +A_DECODE_21_ = INPUT,94, A,-; AMIGA_BUS_ENABLE_HIGH = OUTPUT,34, D,-; +A_DECODE_20_ = INPUT,93, A,-; CIIN = OUTPUT,47, E,-; -IPL_1_ = INPUT,56, F,-; -IPL_0_ = INPUT,67, G,-; -FC_0_ = INPUT,57, F,-; -A_1_ = INPUT,60, F,-; +A_DECODE_19_ = INPUT,97, A,-; +A_DECODE_18_ = INPUT,95, A,-; +A_DECODE_17_ = INPUT,59, F,-; +A_DECODE_16_ = INPUT,96, A,-; +A_0_ = BIDIR,69, G,-; SIZE_1_ = BIDIR,79, H,-; +IPL_030_1_ = OUTPUT,7, B,-; +IPL_030_0_ = OUTPUT,8, B,-; IPL_030_2_ = OUTPUT,9, B,-; RW_000 = BIDIR,80, H,-; BG_000 = OUTPUT,29, D,-; -SIZE_0_ = BIDIR,70, G,-; BGACK_030 = OUTPUT,83, H,-; -CLK_EXP = OUTPUT,10, B,-; +SIZE_0_ = BIDIR,70, G,-; VMA = OUTPUT,35, D,-; RW = BIDIR,71, G,-; -A_0_ = BIDIR,69, G,-; -IPL_030_1_ = OUTPUT,7, B,-; -IPL_030_0_ = OUTPUT,8, B,-; -cpu_est_2_ = NODE,12, A,-; -cpu_est_3_ = NODE,9, D,-; +cpu_est_1_ = NODE,6, D,-; +cpu_est_2_ = NODE,14, D,-; +cpu_est_3_ = NODE,2, D,-; cpu_est_0_ = NODE,9, G,-; -cpu_est_1_ = NODE,8, A,-; -inst_AMIGA_BUS_ENABLE_DMA_HIGH = NODE,14, C,-; -inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,1, F,-; -inst_AS_030_D0 = NODE,5, E,-; -inst_AS_030_000_SYNC = NODE,0, F,-; -inst_BGACK_030_INT_D = NODE,8, E,-; -inst_AS_000_DMA = NODE,1, A,-; +inst_AMIGA_BUS_ENABLE_DMA_HIGH = NODE,9, F,-; +inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,5, F,-; +inst_AS_030_D0 = NODE,2, H,-; +inst_AS_030_000_SYNC = NODE,13, B,-; +inst_BGACK_030_INT_D = NODE,13, H,-; +inst_AS_000_DMA = NODE,8, A,-; inst_DS_000_DMA = NODE,13, A,-; -CYCLE_DMA_0_ = NODE,10, A,-; -CYCLE_DMA_1_ = NODE,6, A,-; -inst_VPA_D = NODE,9, A,-; -CLK_000_D_3_ = NODE,10, D,-; -inst_DTACK_D0 = NODE,6, B,-; +inst_VPA_D = NODE,2, F,-; +CLK_000_D_3_ = NODE,13, F,-; +inst_DTACK_D0 = NODE,14, B,-; inst_RESET_OUT = NODE,5, G,-; +CLK_030_PE_1_ = NODE,2, A,-; +inst_AMIGA_DS = NODE,10, C,-; CLK_000_D_1_ = NODE,5, H,-; -CLK_000_D_0_ = NODE,9, C,-; -inst_CLK_OUT_PRE_50 = NODE,13, G,-; -inst_CLK_OUT_PRE_D = NODE,6, D,-; -IPL_D0_0_ = NODE,14, G,-; -IPL_D0_1_ = NODE,14, D,-; -IPL_D0_2_ = NODE,14, B,-; +CLK_000_D_0_ = NODE,13, D,-; +inst_CLK_OUT_PRE_50 = NODE,2, G,-; +inst_CLK_OUT_PRE_D = NODE,8, E,-; +IPL_D0_0_ = NODE,10, B,-; +IPL_D0_1_ = NODE,6, B,-; +IPL_D0_2_ = NODE,2, B,-; CLK_000_D_2_ = NODE,6, H,-; -CLK_000_D_4_ = NODE,10, B,-; -inst_LDS_000_INT = NODE,8, F,-; -inst_DS_000_ENABLE = NODE,13, B,-; -inst_UDS_000_INT = NODE,12, F,-; -SM_AMIGA_6_ = NODE,13, C,-; -SM_AMIGA_4_ = NODE,2, D,-; -SM_AMIGA_1_ = NODE,4, F,-; -SM_AMIGA_0_ = NODE,13, H,-; -RST_DLY_0_ = NODE,2, G,-; -RST_DLY_1_ = NODE,10, G,-; -RST_DLY_2_ = NODE,6, G,-; -inst_CLK_030_H = NODE,2, A,-; -inst_DSACK1_INT = NODE,2, H,-; -inst_AS_000_INT = NODE,10, C,-; -SM_AMIGA_5_ = NODE,6, C,-; -SM_AMIGA_3_ = NODE,13, D,-; -SM_AMIGA_2_ = NODE,5, A,-; -SM_AMIGA_i_7_ = NODE,2, C,-; -CIIN_0 = NODE,9, E,-; +CLK_000_D_4_ = NODE,14, C,-; +inst_LDS_000_INT = NODE,12, F,-; +inst_DS_000_ENABLE = NODE,13, C,-; +inst_UDS_000_INT = NODE,1, F,-; +SM_AMIGA_6_ = NODE,0, F,-; +SM_AMIGA_4_ = NODE,1, A,-; +SM_AMIGA_1_ = NODE,8, F,-; +SM_AMIGA_0_ = NODE,12, A,-; +CYCLE_DMA_0_ = NODE,6, A,-; +CYCLE_DMA_1_ = NODE,10, A,-; +CLK_030_PE_0_ = NODE,9, A,-; +RST_DLY_0_ = NODE,6, G,-; +RST_DLY_1_ = NODE,14, G,-; +RST_DLY_2_ = NODE,10, G,-; +inst_DSACK1_INT = NODE,5, A,-; +inst_AS_000_INT = NODE,2, C,-; +SM_AMIGA_5_ = NODE,13, G,-; +SM_AMIGA_3_ = NODE,6, C,-; +SM_AMIGA_2_ = NODE,9, C,-; +SM_AMIGA_i_7_ = NODE,4, F,-; +CLK_OUT_INTreg = NODE,10, D,-; +CIIN_0 = NODE,5, E,-; diff --git a/Logic/68030_tk.xrf b/Logic/68030_tk.xrf index 33d5a2d..b3b5104 100644 --- a/Logic/68030_tk.xrf +++ b/Logic/68030_tk.xrf @@ -2,7 +2,7 @@ Signal Name Cross Reference File ispLEVER Classic 2.0.00.17.20.15 -Design '68030_tk' created Wed Oct 26 22:26:25 2016 +Design '68030_tk' created Fri Nov 18 19:32:36 2016 LEGEND: '>' Functional Block Port Separator diff --git a/Logic/BUS68030.bl0 b/Logic/BUS68030.bl0 index 7fea4cf..f0e30ea 100644 --- a/Logic/BUS68030.bl0 +++ b/Logic/BUS68030.bl0 @@ -1,213 +1,216 @@ -#$ DATE Wed Oct 26 22:26:25 2016 +#$ DATE Fri Nov 18 19:32:36 2016 #$ TOOL EDIF2BLIF version IspLever 1.0 #$ MODULE bus68030 -#$ PINS 75 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_030_2_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BG_000 SIZE_0_ BGACK_030 AHIGH_30_ BGACK_000 AHIGH_29_ CLK_030 AHIGH_28_ CLK_000 AHIGH_27_ CLK_OSZI AHIGH_26_ CLK_DIV_OUT AHIGH_25_ CLK_EXP AHIGH_24_ FPU_CS A_DECODE_22_ FPU_SENSE A_DECODE_21_ DSACK1 A_DECODE_20_ DTACK A_DECODE_19_ AVEC A_DECODE_18_ E A_DECODE_17_ VPA A_DECODE_16_ VMA A_DECODE_15_ RST A_DECODE_14_ RESET A_DECODE_13_ RW A_DECODE_12_ AMIGA_ADDR_ENABLE A_DECODE_11_ AMIGA_BUS_DATA_DIR A_DECODE_10_ AMIGA_BUS_ENABLE_LOW A_DECODE_9_ AMIGA_BUS_ENABLE_HIGH A_DECODE_8_ CIIN A_DECODE_7_ A_DECODE_6_ A_DECODE_5_ A_DECODE_4_ A_DECODE_3_ A_DECODE_2_ A_0_ IPL_030_1_ IPL_030_0_ IPL_1_ IPL_0_ FC_0_ A_1_ -#$ NODES 598 ipl_i_2__n N_233_0 ipl_i_1__n N_360_i ipl_i_0__n N_191_i_i a_i_1__n N_192_i_i AS_000_DMA_i AS_000_i \ -# N_199_i CLK_030_H_i N_204_i AS_030_000_SYNC_i inst_BGACK_030_INTreg AMIGA_BUS_ENABLE_DMA_HIGH_i N_282_i vcc_n_n cycle_dma_i_0__n N_278_i \ -# inst_VMA_INTreg ahigh_i_30__n N_186_i gnd_n_n ahigh_i_31__n N_185_i un1_amiga_bus_enable_low ahigh_i_28__n CLK_030_c_i un7_as_030 \ -# ahigh_i_29__n N_184_0 un1_LDS_000_INT ahigh_i_26__n N_179_0 un1_UDS_000_INT ahigh_i_27__n N_251_i un10_ciin ahigh_i_24__n \ -# LDS_000_c_i un21_fpu_cs ahigh_i_25__n UDS_000_c_i un21_berr N_172_i un6_ds_030 pos_clk_un21_bgack_030_int_i_0_0_n cpu_est_2_ N_163_i \ -# cpu_est_3_ clk_000_d_i_3__n cpu_est_0_ N_115_i N_350_i cpu_est_1_ N_114_i un1_rw_i inst_AMIGA_BUS_ENABLE_DMA_HIGH un6_ds_030_i \ -# N_126_0 inst_AMIGA_BUS_ENABLE_DMA_LOW DS_000_DMA_i N_313_i inst_AS_030_D0 N_132_i N_231_i inst_AS_030_000_SYNC N_133_i N_291_i \ -# inst_BGACK_030_INT_D un7_as_030_i inst_AS_000_DMA AMIGA_BUS_ENABLE_DMA_LOW_i N_288_i inst_DS_000_DMA AS_030_c CYCLE_DMA_0_ N_287_i CYCLE_DMA_1_ \ -# AS_000_c N_340_i inst_VPA_D CLK_000_D_3_ RW_000_c N_284_i inst_DTACK_D0 inst_RESET_OUT N_275_i CLK_000_D_1_ \ -# UDS_000_c pos_clk_size_dma_6_0_1__n CLK_000_D_0_ N_268_i inst_CLK_OUT_PRE_50 LDS_000_c pos_clk_size_dma_6_0_0__n inst_CLK_OUT_PRE_D N_265_i IPL_D0_0_ \ -# size_c_0__n N_267_i IPL_D0_1_ IPL_D0_2_ size_c_1__n N_337_i CLK_000_D_2_ N_338_i CLK_000_D_4_ ahigh_c_24__n \ -# N_55_0 inst_LDS_000_INT un1_as_000_i inst_DS_000_ENABLE ahigh_c_25__n N_245_0 inst_UDS_000_INT N_229_i pos_clk_un9_bg_030_n ahigh_c_26__n \ -# SM_AMIGA_6_ N_227_i SM_AMIGA_4_ ahigh_c_27__n SM_AMIGA_1_ N_226_i SM_AMIGA_0_ ahigh_c_28__n N_246_0 SIZE_DMA_0_ \ -# N_332_i SIZE_DMA_1_ ahigh_c_29__n pos_clk_ds_000_dma_4_0_n inst_RW_000_INT N_48_0 inst_RW_000_DMA ahigh_c_30__n pos_clk_rw_000_dma_3_0_n RST_DLY_0_ \ -# N_218_i RST_DLY_1_ ahigh_c_31__n RST_DLY_2_ inst_A0_DMA un10_ciin_i pos_clk_a0_dma_3_n N_62_0 pos_clk_rw_000_dma_3_n N_215_i \ -# inst_CLK_030_H N_216_i inst_DSACK1_INT un10_amiga_bus_enable_high_i inst_AS_000_INT N_214_i SM_AMIGA_5_ N_310_0 SM_AMIGA_3_ N_24_i \ -# SM_AMIGA_2_ N_33_0 pos_clk_ds_000_dma_4_n N_23_i N_3 N_32_0 N_4 N_22_i N_31_0 N_3_i \ -# N_45_0 N_4_i N_44_0 N_15 N_15_i N_19 N_40_0 N_20 N_19_i N_22 \ -# N_36_0 N_23 N_20_i N_24 N_35_0 N_25 N_25_i N_26 N_30_0 N_27 \ -# N_26_i N_29_0 N_27_i a_decode_c_16__n N_28_0 BG_030_c_i a_decode_c_17__n pos_clk_un9_bg_030_0_n N_235_i_1 a_decode_c_18__n \ -# N_235_i_2 N_156_i_1 a_decode_c_19__n N_156_i_2 N_156_i_3 a_decode_c_20__n N_156_i_4 pos_clk_un10_sm_amiga_i_1_n a_decode_c_21__n N_176_i_1 \ -# un10_ciin_1 a_decode_c_22__n un10_ciin_2 un10_ciin_3 a_decode_c_23__n un10_ciin_4 un10_ciin_5 a_c_0__n un10_ciin_6 un10_ciin_7 \ -# a_c_1__n un10_ciin_8 SM_AMIGA_i_7_ un10_ciin_9 pos_clk_size_dma_6_0__n nEXP_SPACE_c un10_ciin_10 pos_clk_size_dma_6_1__n un10_ciin_11 N_199 \ -# BERR_c N_163_i_1 pos_clk_un21_bgack_030_int_i_0_n N_163_i_2 N_231 BG_030_c pos_clk_un21_bgack_030_int_i_0_0_1_n N_233 pos_clk_un21_bgack_030_int_i_0_0_2_n N_111 \ -# BG_000DFFreg N_138_i_1 N_112 N_138_i_2 N_113 N_59_i_1 N_114 BGACK_000_c N_59_i_2 N_115 \ -# N_233_0_1 N_245 CLK_030_c N_233_0_2 N_246 N_214_1 N_62 N_214_2 N_214_3 N_132 \ -# CLK_OSZI_c un21_fpu_cs_1 N_133 un21_berr_1_0 N_310 N_182_0_1 N_126 CLK_OUT_INTreg N_234_i_1 N_149 \ -# N_234_i_2 N_150 N_206_1 N_158 FPU_SENSE_c N_206_2 N_160 N_205_1 N_163 IPL_030DFF_0_reg \ -# N_205_2 N_172 N_352_1 N_179 IPL_030DFF_1_reg N_352_2 N_184 N_231_i_1 N_185 IPL_030DFF_2_reg \ -# N_152_i_1 N_196 N_144_i_1 N_203 ipl_c_0__n N_142_i_1 N_204 N_312_i_1 N_209 ipl_c_1__n \ -# N_236_i_1 N_214 N_148_i_1 N_215 ipl_c_2__n N_136_i_1 N_216 N_246_0_1 N_218 N_249_i_1 \ -# N_224 DTACK_c N_57_i_1 N_332 N_338_1 N_226 N_224_1 N_227 N_216_1 N_229 \ -# VPA_c N_209_1 N_337 N_203_1 N_338 N_196_1 N_265 RST_c cpu_est_0_3__un3_n N_267 \ -# cpu_est_0_3__un1_n N_268 cpu_est_0_3__un0_n N_275 RW_c rw_000_int_0_un3_n N_278 rw_000_int_0_un1_n N_282 fc_c_0__n \ -# rw_000_int_0_un0_n N_284 vma_int_0_un3_n N_340 fc_c_1__n vma_int_0_un1_n N_287 vma_int_0_un0_n N_288 cpu_est_0_1__un3_n \ -# N_291 AMIGA_BUS_DATA_DIR_c cpu_est_0_1__un1_n N_293 cpu_est_0_1__un0_n N_350 cpu_est_0_2__un3_n N_355 cpu_est_0_2__un1_n pos_clk_un21_bgack_030_int_i_0_o3_0_x2 \ -# cpu_est_0_2__un0_n pos_clk_un1_ipl_i_0_x2 N_16_i uds_000_int_0_un3_n pos_clk_un1_ipl_i_0_x2_0 N_39_0 uds_000_int_0_un1_n pos_clk_un1_ipl_i_0_x2_1 VPA_c_i uds_000_int_0_un0_n \ -# pos_clk_CYCLE_DMA_5_1_i_0_x2 N_52_0 lds_000_int_0_un3_n N_156 DTACK_c_i lds_000_int_0_un1_n N_201 N_53_0 lds_000_int_0_un0_n N_202 \ -# N_210_i bgack_030_int_0_un3_n N_154 N_211_i bgack_030_int_0_un1_n un21_berr_1 N_189_i bgack_030_int_0_un0_n N_174 un1_SM_AMIGA_0_sqmuxa_1_0 \ -# ds_000_enable_0_un3_n N_223 RW_c_i ds_000_enable_0_un1_n N_221 N_311_0 ds_000_enable_0_un0_n N_222 N_336_i size_dma_0_0__un3_n \ -# N_219 N_244_i size_dma_0_0__un1_n N_220 size_dma_0_0__un0_n pos_clk_un6_bgack_000_n N_314_0 size_dma_0_1__un3_n N_359 N_159_i \ -# size_dma_0_1__un1_n N_8 VMA_INT_i size_dma_0_1__un0_n N_14 N_352_i ipl_030_0_0__un3_n N_21 N_353_i ipl_030_0_0__un1_n \ -# N_9 N_293_i ipl_030_0_0__un0_n un1_DS_000_ENABLE_0_sqmuxa N_175_i ipl_030_0_1__un3_n N_66 N_176_i ipl_030_0_1__un1_n N_171 \ -# ipl_030_0_1__un0_n N_354 N_198_i ipl_030_0_2__un3_n N_18 N_197_i ipl_030_0_2__un1_n pos_clk_un9_clk_000_pe_n N_196_i ipl_030_0_2__un0_n \ -# cpu_est_2_1__n N_183_0 a0_dma_0_un3_n cpu_est_2_2__n N_182_0 a0_dma_0_un1_n N_197 N_180_0 a0_dma_0_un0_n N_198 \ -# N_178_0 amiga_bus_enable_dma_low_0_un3_n N_208 N_82_i amiga_bus_enable_dma_low_0_un1_n N_210 N_315_i amiga_bus_enable_dma_low_0_un0_n N_315 N_351_i \ -# amiga_bus_enable_dma_high_0_un3_n N_212 N_154_0 amiga_bus_enable_dma_high_0_un1_n N_180 N_149_i amiga_bus_enable_dma_high_0_un0_n N_213 N_207_i bg_000_0_un3_n \ -# N_178 N_228_i bg_000_0_un1_n N_228 bg_000_0_un0_n N_182 N_213_i ds_000_dma_0_un3_n N_176 N_212_i \ -# ds_000_dma_0_un1_n N_183 N_309_i ds_000_dma_0_un0_n N_351 N_357_i as_000_dma_0_un3_n N_357 cpu_est_2_0_2__n as_000_dma_0_un1_n \ -# N_206 N_208_i as_000_dma_0_un0_n N_205 N_209_i as_030_000_sync_0_un3_n N_352 cpu_est_2_0_1__n as_030_000_sync_0_un1_n N_353 \ -# N_206_i as_030_000_sync_0_un0_n N_314 N_205_i rw_000_dma_0_un3_n N_244 pos_clk_un9_clk_000_pe_0_n rw_000_dma_0_un1_n N_336 N_18_i \ -# rw_000_dma_0_un0_n N_311 N_37_0 a_decode_15__n un1_SM_AMIGA_0_sqmuxa_1 N_171_i N_211 N_354_i a_decode_14__n N_16 \ -# un1_DS_000_ENABLE_0_sqmuxa_0 un1_amiga_bus_enable_low_i N_66_0 a_decode_13__n un21_fpu_cs_i UDS_000_INT_i cpu_est_i_2__n un1_UDS_000_INT_0 a_decode_12__n cpu_est_i_0__n \ -# LDS_000_INT_i VPA_D_i un1_LDS_000_INT_0 a_decode_11__n DTACK_D0_i N_21_i cpu_est_i_3__n N_34_0 a_decode_10__n sm_amiga_i_i_7__n \ -# N_14_i sm_amiga_i_5__n N_41_0 a_decode_9__n sm_amiga_i_3__n N_8_i cpu_est_i_1__n N_42_0 a_decode_8__n clk_000_d_i_1__n \ -# a_c_i_0__n N_355_i_0 size_c_i_1__n a_decode_7__n sm_amiga_i_4__n pos_clk_un10_sm_amiga_i_n sm_amiga_i_2__n N_359_i a_decode_6__n rst_dly_i_0__n \ -# pos_clk_un6_bgack_000_0_n rst_dly_i_2__n N_220_i a_decode_5__n a_decode_i_19__n N_219_i a_decode_i_18__n a_decode_4__n a_decode_i_16__n N_222_i \ -# RW_000_i N_221_i a_decode_3__n sm_amiga_i_0__n AS_030_i N_223_i a_decode_2__n AS_000_INT_i N_224_i DSACK1_INT_i \ -# AMIGA_BUS_DATA_DIR_c_0 clk_000_d_i_0__n N_150_i sm_amiga_i_6__n N_156_i sm_amiga_i_1__n N_160_i FPU_SENSE_i N_174_i rst_dly_i_1__n \ -# N_158_i AS_030_D0_i N_201_i BGACK_030_INT_i N_202_i nEXP_SPACE_i N_203_i RESET_OUT_i +#$ PINS 75 A_DECODE_2_ A_0_ SIZE_1_ IPL_030_1_ IPL_030_0_ AHIGH_31_ IPL_1_ IPL_0_ A_DECODE_23_ FC_0_ A_1_ IPL_030_2_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 DTACK AVEC SIZE_0_ E AHIGH_30_ VPA AHIGH_29_ VMA AHIGH_28_ RST AHIGH_27_ RESET AHIGH_26_ RW AHIGH_25_ AMIGA_ADDR_ENABLE AHIGH_24_ AMIGA_BUS_DATA_DIR A_DECODE_22_ AMIGA_BUS_ENABLE_LOW A_DECODE_21_ AMIGA_BUS_ENABLE_HIGH A_DECODE_20_ CIIN A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ A_DECODE_15_ A_DECODE_14_ A_DECODE_13_ A_DECODE_12_ A_DECODE_11_ A_DECODE_10_ A_DECODE_9_ A_DECODE_8_ A_DECODE_7_ A_DECODE_6_ A_DECODE_5_ A_DECODE_4_ A_DECODE_3_ +#$ NODES 609 clk_000_d_i_1__n VPA_D_i N_125_i a_decode_2__n VMA_INT_i N_124_i sm_amiga_i_0__n N_53_0 rst_dly_i_2__n N_134_i \ +# rst_dly_i_1__n N_270_0 rst_dly_i_0__n N_77_i DSACK1_INT_i N_87_i inst_BGACK_030_INTreg N_137_i_0 N_112_i vcc_n_n \ +# DTACK_D0_i N_113_i inst_VMA_INTreg BGACK_030_INT_i N_114_i gnd_n_n nEXP_SPACE_i un1_amiga_bus_enable_low AS_000_DMA_i N_109_i \ +# un7_as_030 RW_000_i N_108_i un1_LDS_000_INT clk_030_pe_i_1__n N_111_i un1_UDS_000_INT DS_000_DMA_0_sqmuxa_i N_265_2_0 un1_SM_AMIGA_0_sqmuxa_1 \ +# pos_clk_un4_rw_000_i_n un10_ciin AS_000_i un1_as_000_i un21_fpu_cs AMIGA_DS_i VPA_c_i un21_berr pos_clk_un3_clk_out_int_i_n N_52_0 \ +# un6_ds_030 cycle_dma_i_0__n DTACK_c_i un13_ciin cycle_dma_i_1__n N_48_0 cpu_est_1_ pos_clk_as_000_dma6_i_n un3_ahigh_i cpu_est_2_ \ +# DS_000_DMA_i pos_clk_un4_bgack_000_i_n cpu_est_3_ CLK_EXP_i pos_clk_un6_bgack_000_0_n cpu_est_0_ AMIGA_BUS_ENABLE_DMA_LOW_i N_7_i inst_AMIGA_BUS_ENABLE_DMA_HIGH ahigh_i_25__n \ +# N_41_0 inst_AMIGA_BUS_ENABLE_DMA_LOW ahigh_i_24__n pos_clk_un1_bgack_030_int_0_n inst_AS_030_D0 ahigh_i_27__n pos_clk_un12_clk_out_int_0_n inst_AS_030_000_SYNC ahigh_i_26__n pos_clk_un3_0_n \ +# inst_BGACK_030_INT_D ahigh_i_29__n pos_clk_un15_bgack_030_int_i_n inst_AS_000_DMA ahigh_i_28__n N_3_i inst_DS_000_DMA ahigh_i_31__n N_43_0 inst_VPA_D \ +# ahigh_i_30__n N_4_i CLK_000_D_3_ a_i_1__n N_42_0 inst_DTACK_D0 AMIGA_BUS_ENABLE_DMA_HIGH_i un6_amiga_bus_data_dir_i inst_RESET_OUT AS_030_D0_i \ +# un12_amiga_bus_data_dir_m_i CLK_030_PE_1_ un10_ciin_i AMIGA_BUS_DATA_DIR_c_0 inst_AMIGA_DS FPU_SENSE_i N_22_i CLK_000_D_1_ AS_030_000_SYNC_i N_31_0 \ +# CLK_000_D_0_ a_decode_i_16__n N_21_i inst_CLK_OUT_PRE_50 a_decode_i_18__n N_32_0 inst_CLK_OUT_PRE_D a_decode_i_19__n N_19_i IPL_D0_0_ \ +# N_224_i N_34_0 IPL_D0_1_ N_225_i N_18_i IPL_D0_2_ N_226_i N_35_0 CLK_000_D_2_ pos_clk_un5_bgack_030_int_d_i_n \ +# CLK_000_D_4_ pos_clk_amiga_bus_enable_dma_high_3_0_n pos_clk_un6_bg_030_n pos_clk_amiga_bus_enable_dma_low_3_0_n pos_clk_ipl_n pos_clk_rw_000_dma_3_0_n inst_LDS_000_INT un13_ciin_i UDS_000_c_i inst_DS_000_ENABLE \ +# un6_ds_030_i LDS_000_c_i inst_UDS_000_INT N_123_i N_86_i SM_AMIGA_6_ N_122_i N_129_i SM_AMIGA_4_ un7_as_030_i \ +# N_130_i SM_AMIGA_1_ AS_030_c un11_amiga_bus_enable_high_i SM_AMIGA_0_ N_117_i SIZE_DMA_0_ AS_000_c N_46_0 SIZE_DMA_1_ \ +# N_107_i CYCLE_DMA_0_ RW_000_c pos_clk_size_dma_6_0_0__n CYCLE_DMA_1_ N_106_i CLK_030_PE_0_ pos_clk_size_dma_6_0_1__n inst_RW_000_INT UDS_000_c \ +# N_16_i inst_RW_000_DMA N_254_i RST_DLY_0_ LDS_000_c N_263_i RST_DLY_1_ N_250_i RST_DLY_2_ size_c_0__n \ +# N_256_i inst_A0_DMA N_189_i pos_clk_rw_000_int_5_n size_c_1__n N_101_i inst_DSACK1_INT inst_AS_000_INT ahigh_c_24__n N_103_i \ +# SM_AMIGA_5_ N_104_i SM_AMIGA_3_ ahigh_c_25__n SM_AMIGA_2_ N_105_i ahigh_c_26__n N_115_i ahigh_c_27__n N_116_i \ +# ahigh_c_28__n N_131_i N_277_i ahigh_c_29__n N_64_0 N_91_0 ahigh_c_30__n N_159_0 N_14 N_85_i \ +# N_15 ahigh_c_31__n un1_SM_AMIGA_0_sqmuxa_1_0 N_24 RW_c_i N_25 pos_clk_rw_000_int_5_0_n clk_000_d_i_3__n N_25_i N_28_0 \ +# N_24_i N_27_0 ipl_c_i_1__n N_50_0 ipl_c_i_0__n N_49_0 N_14_i N_39_0 N_15_i N_38_0 \ +# N_91_0_1 N_91_0_2 N_91_0_3 N_265_i_1 N_266_i_1 N_266_i_2 N_138_i_1 N_148_i_1 N_144_i_1 N_142_i_1 \ +# N_140_i_1 SM_AMIGA_i_7_ pos_clk_un10_sm_amiga_i_1_n N_76 N_85_i_1 G_122 N_85_i_2 G_123 a_decode_c_16__n N_277_1 \ +# G_124 N_277_2 un1_rst_2_1 a_decode_c_17__n N_277_3 cpu_est_0_0_ N_277_4 N_64 a_decode_c_18__n N_277_5 \ +# N_122 un10_ciin_1 N_123 a_decode_c_19__n un10_ciin_2 N_132 un10_ciin_3 N_133 a_decode_c_20__n un10_ciin_4 \ +# N_274 un10_ciin_5 N_276 a_decode_c_21__n un10_ciin_6 N_77 un10_ciin_7 N_79 a_decode_c_22__n un10_ciin_8 \ +# N_78 un10_ciin_9 N_263 a_decode_c_23__n un10_ciin_10 N_108 un10_ciin_11 N_114 a_c_0__n un6_amiga_bus_data_dir_1 \ +# N_85 un6_amiga_bus_data_dir_2 N_104 a_c_1__n pos_clk_as_000_dma6_1_n N_91 pos_clk_as_000_dma6_2_n N_131 nEXP_SPACE_c DS_000_DMA_1_sqmuxa_1 \ +# N_277 pos_clk_un4_rw_000_1_n N_130 BERR_c pos_clk_un4_rw_000_2_n N_115 pos_clk_un13_clk_out_int_1_n N_116 BG_030_c N_125_1 \ +# N_105 N_116_1 N_103 BG_000DFFreg pos_clk_un29_clk_000_ne_1_1_n N_101 pos_clk_un29_clk_000_ne_1_2_n N_259 pos_clk_un29_clk_000_ne_1_3_n N_255 \ +# BGACK_000_c N_261_1 N_256 N_261_2 N_254 CLK_030_c N_262_1 N_16 N_262_2 N_106 \ +# DS_000_ENABLE_0_sqmuxa_1_1 N_86 N_259_1 N_107 CLK_OSZI_c N_250_i_1 N_117 N_189_i_1 pos_clk_a0_dma_3_n pos_clk_un6_bg_030_1_n \ +# N_129 CLK_OUT_INTreg N_108_1 pos_clk_size_dma_6_1__n N_114_1 pos_clk_size_dma_6_0__n un21_berr_1 pos_clk_rw_000_dma_3_n FPU_SENSE_c un21_fpu_cs_1 \ +# pos_clk_amiga_bus_enable_dma_low_3_n N_130_1 pos_clk_amiga_bus_enable_dma_high_3_n IPL_030DFF_0_reg N_136_i_1 SIZE_DMA_3_sqmuxa N_152_i_1 pos_clk_un5_bgack_030_int_d_n IPL_030DFF_1_reg N_146_i_1 \ +# N_18 N_267_i_1 N_19 IPL_030DFF_2_reg pos_clk_ipl_1_n N_21 bg_000_0_un3_n N_22 ipl_c_0__n bg_000_0_un1_n \ +# un6_amiga_bus_data_dir bg_000_0_un0_n un12_amiga_bus_data_dir_m ipl_c_1__n uds_000_int_0_un3_n pos_clk_un3_clk_out_int_n uds_000_int_0_un1_n N_3 ipl_c_2__n uds_000_int_0_un0_n \ +# pos_clk_as_000_dma6_n lds_000_int_0_un3_n DS_000_DMA_1_sqmuxa lds_000_int_0_un1_n N_4 DTACK_c lds_000_int_0_un0_n AS_000_DMA_1_sqmuxa ds_000_enable_0_un3_n un1_rst_2 \ +# ds_000_enable_0_un1_n G_97 ds_000_enable_0_un0_n N_199 VPA_c ipl_030_0_2__un3_n pos_clk_un13_bgack_030_int_n ipl_030_0_2__un1_n N_205 ipl_030_0_2__un0_n \ +# pos_clk_un13_clk_out_int_n RST_c vma_int_0_un3_n pos_clk_un15_bgack_030_int_n vma_int_0_un1_n pos_clk_un3_n RESET_c vma_int_0_un0_n pos_clk_un12_clk_out_int_n cpu_est_0_1__un3_n \ +# pos_clk_un1_bgack_030_int_n RW_c cpu_est_0_1__un1_n DS_000_DMA_0_sqmuxa cpu_est_0_1__un0_n un1_rst_3 fc_c_0__n cpu_est_0_2__un3_n G_95 cpu_est_0_2__un1_n \ +# G_101 fc_c_1__n cpu_est_0_2__un0_n G_103 cpu_est_0_3__un3_n pos_clk_un4_rw_000_n cpu_est_0_3__un1_n N_7 AMIGA_BUS_DATA_DIR_c cpu_est_0_3__un0_n \ +# pos_clk_un6_bgack_000_n pos_clk_un31_clk_000_ne_1_i_m2_un3_n pos_clk_un4_bgack_000_n pos_clk_un31_clk_000_ne_1_i_m2_un1_n N_265_2 pos_clk_un31_clk_000_ne_1_i_m2_un0_n N_111 bgack_030_int_0_un3_n N_109 BG_030_c_i \ +# bgack_030_int_0_un1_n N_113 pos_clk_un6_bg_030_i_n bgack_030_int_0_un0_n N_112 pos_clk_un9_bg_030_0_n ds_000_dma_0_un3_n N_98 UDS_000_INT_i ds_000_dma_0_un1_n \ +# pos_clk_un29_clk_000_ne_1_n un1_UDS_000_INT_0 ds_000_dma_0_un0_n N_87 LDS_000_INT_i as_000_dma_0_un3_n N_270 un1_LDS_000_INT_0 as_000_dma_0_un1_n N_134 \ +# N_23_i as_000_dma_0_un0_n N_125 N_30_0 size_dma_0_1__un3_n N_124 N_20_i size_dma_0_1__un1_n N_121 N_33_0 \ +# size_dma_0_1__un0_n N_120 N_13_i size_dma_0_0__un3_n N_137 N_40_0 size_dma_0_0__un1_n pos_clk_un31_clk_000_ne_n ipl_c_i_2__n size_dma_0_0__un0_n \ +# N_17 N_51_0 amiga_bus_enable_dma_high_0_un3_n pos_clk_un9_clk_000_pe_n N_26_i amiga_bus_enable_dma_high_0_un1_n cpu_est_2_1__n N_29_0 amiga_bus_enable_dma_high_0_un0_n cpu_est_2_2__n \ +# a_c_i_0__n amiga_bus_enable_dma_low_0_un3_n N_261 size_c_i_1__n amiga_bus_enable_dma_low_0_un1_n N_262 pos_clk_un10_sm_amiga_i_n amiga_bus_enable_dma_low_0_un0_n N_251 DS_000_ENABLE_0_sqmuxa_1_i \ +# a0_dma_0_un3_n N_252 un1_DS_000_ENABLE_0_sqmuxa_i a0_dma_0_un1_n N_258 N_157_i a0_dma_0_un0_n N_257 N_160_0 rw_000_dma_0_un3_n \ +# DS_000_ENABLE_1_sqmuxa N_161_0 rw_000_dma_0_un1_n un1_DS_000_ENABLE_0_sqmuxa N_162_0 rw_000_dma_0_un0_n N_102 N_165_i ipl_030_0_0__un3_n N_118 \ +# ipl_030_0_0__un1_n N_119 N_167_i ipl_030_0_0__un0_n N_264 N_166_i ipl_030_0_1__un3_n DS_000_ENABLE_0_sqmuxa_1 ipl_030_0_1__un1_n N_164 \ +# N_168_i ipl_030_0_1__un0_n N_170 as_030_000_sync_0_un3_n N_168 N_170_i as_030_000_sync_0_un1_n N_166 as_030_000_sync_0_un0_n N_167 \ +# N_164_i rw_000_int_0_un3_n N_165 rw_000_int_0_un1_n N_162 N_102_i rw_000_int_0_un0_n N_161 N_264_i a_decode_15__n \ +# N_160 N_79_i N_157 N_78_i a_decode_14__n N_26 N_119_i N_13 N_118_i a_decode_13__n \ +# N_20 N_23 N_255_i a_decode_12__n N_8 N_257_i pos_clk_un9_bg_030_n cpu_est_2_0_2__n a_decode_11__n un1_amiga_bus_enable_low_i \ +# N_258_i un21_fpu_cs_i N_259_i a_decode_10__n sm_amiga_i_2__n cpu_est_2_0_1__n sm_amiga_i_1__n N_262_i a_decode_9__n sm_amiga_i_3__n \ +# N_261_i sm_amiga_i_4__n pos_clk_un9_clk_000_pe_0_n a_decode_8__n sm_amiga_i_6__n N_251_i sm_amiga_i_5__n N_252_0 a_decode_7__n clk_000_d_i_0__n \ +# N_76_i AS_000_INT_i N_17_i a_decode_6__n sm_amiga_i_i_7__n N_36_0 AS_030_i N_98_i a_decode_5__n cpu_est_i_2__n \ +# pos_clk_un31_clk_000_ne_i_n cpu_est_i_0__n N_228_i a_decode_4__n cpu_est_i_3__n N_121_i cpu_est_i_1__n N_120_i a_decode_3__n .model bus68030 .inputs A_DECODE_23_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF \ - FPU_SENSE.BLIF DTACK.BLIF VPA.BLIF RST.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF A_DECODE_20_.BLIF A_DECODE_19_.BLIF A_DECODE_18_.BLIF \ + FPU_SENSE.BLIF VPA.BLIF RST.BLIF RESET.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF A_DECODE_20_.BLIF A_DECODE_19_.BLIF A_DECODE_18_.BLIF \ A_DECODE_17_.BLIF A_DECODE_16_.BLIF A_DECODE_15_.BLIF A_DECODE_14_.BLIF A_DECODE_13_.BLIF A_DECODE_12_.BLIF A_DECODE_11_.BLIF A_DECODE_10_.BLIF A_DECODE_9_.BLIF \ A_DECODE_8_.BLIF A_DECODE_7_.BLIF A_DECODE_6_.BLIF A_DECODE_5_.BLIF A_DECODE_4_.BLIF A_DECODE_3_.BLIF A_DECODE_2_.BLIF IPL_1_.BLIF IPL_0_.BLIF \ - FC_0_.BLIF A_1_.BLIF SIZE_1_.BLIF AHIGH_31_.BLIF AS_030.BLIF AS_000.BLIF RW_000.BLIF UDS_000.BLIF LDS_000.BLIF BERR.BLIF RW.BLIF SIZE_0_.BLIF AHIGH_30_.BLIF AHIGH_29_.BLIF AHIGH_28_.BLIF AHIGH_27_.BLIF AHIGH_26_.BLIF AHIGH_25_.BLIF AHIGH_24_.BLIF A_0_.BLIF ipl_i_2__n.BLIF N_233_0.BLIF ipl_i_1__n.BLIF N_360_i.BLIF ipl_i_0__n.BLIF N_191_i_i.BLIF a_i_1__n.BLIF \ - N_192_i_i.BLIF AS_000_DMA_i.BLIF AS_000_i.BLIF N_199_i.BLIF CLK_030_H_i.BLIF N_204_i.BLIF AS_030_000_SYNC_i.BLIF inst_BGACK_030_INTreg.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF \ - N_282_i.BLIF vcc_n_n.BLIF cycle_dma_i_0__n.BLIF N_278_i.BLIF inst_VMA_INTreg.BLIF ahigh_i_30__n.BLIF N_186_i.BLIF gnd_n_n.BLIF ahigh_i_31__n.BLIF \ - N_185_i.BLIF un1_amiga_bus_enable_low.BLIF ahigh_i_28__n.BLIF CLK_030_c_i.BLIF un7_as_030.BLIF ahigh_i_29__n.BLIF N_184_0.BLIF un1_LDS_000_INT.BLIF ahigh_i_26__n.BLIF \ - N_179_0.BLIF un1_UDS_000_INT.BLIF ahigh_i_27__n.BLIF N_251_i.BLIF un10_ciin.BLIF ahigh_i_24__n.BLIF LDS_000_c_i.BLIF un21_fpu_cs.BLIF ahigh_i_25__n.BLIF \ - UDS_000_c_i.BLIF un21_berr.BLIF N_172_i.BLIF un6_ds_030.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF cpu_est_2_.BLIF N_163_i.BLIF cpu_est_3_.BLIF clk_000_d_i_3__n.BLIF \ - cpu_est_0_.BLIF N_115_i.BLIF N_350_i.BLIF cpu_est_1_.BLIF N_114_i.BLIF un1_rw_i.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF un6_ds_030_i.BLIF N_126_0.BLIF \ - inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF DS_000_DMA_i.BLIF N_313_i.BLIF inst_AS_030_D0.BLIF N_132_i.BLIF N_231_i.BLIF inst_AS_030_000_SYNC.BLIF N_133_i.BLIF N_291_i.BLIF \ - inst_BGACK_030_INT_D.BLIF un7_as_030_i.BLIF inst_AS_000_DMA.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF N_288_i.BLIF inst_DS_000_DMA.BLIF AS_030_c.BLIF CYCLE_DMA_0_.BLIF N_287_i.BLIF \ - CYCLE_DMA_1_.BLIF AS_000_c.BLIF N_340_i.BLIF inst_VPA_D.BLIF CLK_000_D_3_.BLIF RW_000_c.BLIF N_284_i.BLIF inst_DTACK_D0.BLIF inst_RESET_OUT.BLIF \ - N_275_i.BLIF CLK_000_D_1_.BLIF UDS_000_c.BLIF pos_clk_size_dma_6_0_1__n.BLIF CLK_000_D_0_.BLIF N_268_i.BLIF inst_CLK_OUT_PRE_50.BLIF LDS_000_c.BLIF pos_clk_size_dma_6_0_0__n.BLIF \ - inst_CLK_OUT_PRE_D.BLIF N_265_i.BLIF IPL_D0_0_.BLIF size_c_0__n.BLIF N_267_i.BLIF IPL_D0_1_.BLIF IPL_D0_2_.BLIF size_c_1__n.BLIF N_337_i.BLIF \ - CLK_000_D_2_.BLIF N_338_i.BLIF CLK_000_D_4_.BLIF ahigh_c_24__n.BLIF N_55_0.BLIF inst_LDS_000_INT.BLIF un1_as_000_i.BLIF inst_DS_000_ENABLE.BLIF ahigh_c_25__n.BLIF \ - N_245_0.BLIF inst_UDS_000_INT.BLIF N_229_i.BLIF pos_clk_un9_bg_030_n.BLIF ahigh_c_26__n.BLIF SM_AMIGA_6_.BLIF N_227_i.BLIF SM_AMIGA_4_.BLIF ahigh_c_27__n.BLIF \ - SM_AMIGA_1_.BLIF N_226_i.BLIF SM_AMIGA_0_.BLIF ahigh_c_28__n.BLIF N_246_0.BLIF SIZE_DMA_0_.BLIF N_332_i.BLIF SIZE_DMA_1_.BLIF ahigh_c_29__n.BLIF \ - pos_clk_ds_000_dma_4_0_n.BLIF inst_RW_000_INT.BLIF N_48_0.BLIF inst_RW_000_DMA.BLIF ahigh_c_30__n.BLIF pos_clk_rw_000_dma_3_0_n.BLIF RST_DLY_0_.BLIF N_218_i.BLIF RST_DLY_1_.BLIF \ - ahigh_c_31__n.BLIF RST_DLY_2_.BLIF inst_A0_DMA.BLIF un10_ciin_i.BLIF pos_clk_a0_dma_3_n.BLIF N_62_0.BLIF pos_clk_rw_000_dma_3_n.BLIF N_215_i.BLIF inst_CLK_030_H.BLIF \ - N_216_i.BLIF inst_DSACK1_INT.BLIF un10_amiga_bus_enable_high_i.BLIF inst_AS_000_INT.BLIF N_214_i.BLIF SM_AMIGA_5_.BLIF N_310_0.BLIF SM_AMIGA_3_.BLIF N_24_i.BLIF \ - SM_AMIGA_2_.BLIF N_33_0.BLIF pos_clk_ds_000_dma_4_n.BLIF N_23_i.BLIF N_3.BLIF N_32_0.BLIF N_4.BLIF N_22_i.BLIF N_31_0.BLIF \ - N_3_i.BLIF N_45_0.BLIF N_4_i.BLIF N_44_0.BLIF N_15.BLIF N_15_i.BLIF N_19.BLIF N_40_0.BLIF N_20.BLIF \ - N_19_i.BLIF N_22.BLIF N_36_0.BLIF N_23.BLIF N_20_i.BLIF N_24.BLIF N_35_0.BLIF N_25.BLIF N_25_i.BLIF \ - N_26.BLIF N_30_0.BLIF N_27.BLIF N_26_i.BLIF N_29_0.BLIF N_27_i.BLIF a_decode_c_16__n.BLIF N_28_0.BLIF BG_030_c_i.BLIF \ - a_decode_c_17__n.BLIF pos_clk_un9_bg_030_0_n.BLIF N_235_i_1.BLIF a_decode_c_18__n.BLIF N_235_i_2.BLIF N_156_i_1.BLIF a_decode_c_19__n.BLIF N_156_i_2.BLIF N_156_i_3.BLIF \ - a_decode_c_20__n.BLIF N_156_i_4.BLIF pos_clk_un10_sm_amiga_i_1_n.BLIF a_decode_c_21__n.BLIF N_176_i_1.BLIF un10_ciin_1.BLIF a_decode_c_22__n.BLIF un10_ciin_2.BLIF un10_ciin_3.BLIF \ - a_decode_c_23__n.BLIF un10_ciin_4.BLIF un10_ciin_5.BLIF a_c_0__n.BLIF un10_ciin_6.BLIF un10_ciin_7.BLIF a_c_1__n.BLIF un10_ciin_8.BLIF SM_AMIGA_i_7_.BLIF \ - un10_ciin_9.BLIF pos_clk_size_dma_6_0__n.BLIF nEXP_SPACE_c.BLIF un10_ciin_10.BLIF pos_clk_size_dma_6_1__n.BLIF un10_ciin_11.BLIF N_199.BLIF BERR_c.BLIF N_163_i_1.BLIF \ - pos_clk_un21_bgack_030_int_i_0_n.BLIF N_163_i_2.BLIF N_231.BLIF BG_030_c.BLIF pos_clk_un21_bgack_030_int_i_0_0_1_n.BLIF N_233.BLIF pos_clk_un21_bgack_030_int_i_0_0_2_n.BLIF N_111.BLIF BG_000DFFreg.BLIF \ - N_138_i_1.BLIF N_112.BLIF N_138_i_2.BLIF N_113.BLIF N_59_i_1.BLIF N_114.BLIF BGACK_000_c.BLIF N_59_i_2.BLIF N_115.BLIF \ - N_233_0_1.BLIF N_245.BLIF CLK_030_c.BLIF N_233_0_2.BLIF N_246.BLIF N_214_1.BLIF N_62.BLIF N_214_2.BLIF N_214_3.BLIF \ - N_132.BLIF CLK_OSZI_c.BLIF un21_fpu_cs_1.BLIF N_133.BLIF un21_berr_1_0.BLIF N_310.BLIF N_182_0_1.BLIF N_126.BLIF CLK_OUT_INTreg.BLIF \ - N_234_i_1.BLIF N_149.BLIF N_234_i_2.BLIF N_150.BLIF N_206_1.BLIF N_158.BLIF FPU_SENSE_c.BLIF N_206_2.BLIF N_160.BLIF \ - N_205_1.BLIF N_163.BLIF IPL_030DFF_0_reg.BLIF N_205_2.BLIF N_172.BLIF N_352_1.BLIF N_179.BLIF IPL_030DFF_1_reg.BLIF N_352_2.BLIF \ - N_184.BLIF N_231_i_1.BLIF N_185.BLIF IPL_030DFF_2_reg.BLIF N_152_i_1.BLIF N_196.BLIF N_144_i_1.BLIF N_203.BLIF ipl_c_0__n.BLIF \ - N_142_i_1.BLIF N_204.BLIF N_312_i_1.BLIF N_209.BLIF ipl_c_1__n.BLIF N_236_i_1.BLIF N_214.BLIF N_148_i_1.BLIF N_215.BLIF \ - ipl_c_2__n.BLIF N_136_i_1.BLIF N_216.BLIF N_246_0_1.BLIF N_218.BLIF N_249_i_1.BLIF N_224.BLIF DTACK_c.BLIF N_57_i_1.BLIF \ - N_332.BLIF N_338_1.BLIF N_226.BLIF N_224_1.BLIF N_227.BLIF N_216_1.BLIF N_229.BLIF VPA_c.BLIF N_209_1.BLIF \ - N_337.BLIF N_203_1.BLIF N_338.BLIF N_196_1.BLIF N_265.BLIF RST_c.BLIF cpu_est_0_3__un3_n.BLIF N_267.BLIF cpu_est_0_3__un1_n.BLIF \ - N_268.BLIF cpu_est_0_3__un0_n.BLIF N_275.BLIF RW_c.BLIF rw_000_int_0_un3_n.BLIF N_278.BLIF rw_000_int_0_un1_n.BLIF N_282.BLIF fc_c_0__n.BLIF \ - rw_000_int_0_un0_n.BLIF N_284.BLIF vma_int_0_un3_n.BLIF N_340.BLIF fc_c_1__n.BLIF vma_int_0_un1_n.BLIF N_287.BLIF vma_int_0_un0_n.BLIF N_288.BLIF \ - cpu_est_0_1__un3_n.BLIF N_291.BLIF AMIGA_BUS_DATA_DIR_c.BLIF cpu_est_0_1__un1_n.BLIF N_293.BLIF cpu_est_0_1__un0_n.BLIF N_350.BLIF cpu_est_0_2__un3_n.BLIF N_355.BLIF \ - cpu_est_0_2__un1_n.BLIF pos_clk_un21_bgack_030_int_i_0_o3_0_x2.BLIF cpu_est_0_2__un0_n.BLIF pos_clk_un1_ipl_i_0_x2.BLIF N_16_i.BLIF uds_000_int_0_un3_n.BLIF pos_clk_un1_ipl_i_0_x2_0.BLIF N_39_0.BLIF uds_000_int_0_un1_n.BLIF \ - pos_clk_un1_ipl_i_0_x2_1.BLIF VPA_c_i.BLIF uds_000_int_0_un0_n.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF N_52_0.BLIF lds_000_int_0_un3_n.BLIF N_156.BLIF DTACK_c_i.BLIF lds_000_int_0_un1_n.BLIF \ - N_201.BLIF N_53_0.BLIF lds_000_int_0_un0_n.BLIF N_202.BLIF N_210_i.BLIF bgack_030_int_0_un3_n.BLIF N_154.BLIF N_211_i.BLIF bgack_030_int_0_un1_n.BLIF \ - un21_berr_1.BLIF N_189_i.BLIF bgack_030_int_0_un0_n.BLIF N_174.BLIF un1_SM_AMIGA_0_sqmuxa_1_0.BLIF ds_000_enable_0_un3_n.BLIF N_223.BLIF RW_c_i.BLIF ds_000_enable_0_un1_n.BLIF \ - N_221.BLIF N_311_0.BLIF ds_000_enable_0_un0_n.BLIF N_222.BLIF N_336_i.BLIF size_dma_0_0__un3_n.BLIF N_219.BLIF N_244_i.BLIF size_dma_0_0__un1_n.BLIF \ - N_220.BLIF size_dma_0_0__un0_n.BLIF pos_clk_un6_bgack_000_n.BLIF N_314_0.BLIF size_dma_0_1__un3_n.BLIF N_359.BLIF N_159_i.BLIF size_dma_0_1__un1_n.BLIF N_8.BLIF \ - VMA_INT_i.BLIF size_dma_0_1__un0_n.BLIF N_14.BLIF N_352_i.BLIF ipl_030_0_0__un3_n.BLIF N_21.BLIF N_353_i.BLIF ipl_030_0_0__un1_n.BLIF N_9.BLIF \ - N_293_i.BLIF ipl_030_0_0__un0_n.BLIF un1_DS_000_ENABLE_0_sqmuxa.BLIF N_175_i.BLIF ipl_030_0_1__un3_n.BLIF N_66.BLIF N_176_i.BLIF ipl_030_0_1__un1_n.BLIF N_171.BLIF \ - ipl_030_0_1__un0_n.BLIF N_354.BLIF N_198_i.BLIF ipl_030_0_2__un3_n.BLIF N_18.BLIF N_197_i.BLIF ipl_030_0_2__un1_n.BLIF pos_clk_un9_clk_000_pe_n.BLIF N_196_i.BLIF \ - ipl_030_0_2__un0_n.BLIF cpu_est_2_1__n.BLIF N_183_0.BLIF a0_dma_0_un3_n.BLIF cpu_est_2_2__n.BLIF N_182_0.BLIF a0_dma_0_un1_n.BLIF N_197.BLIF N_180_0.BLIF \ - a0_dma_0_un0_n.BLIF N_198.BLIF N_178_0.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF N_208.BLIF N_82_i.BLIF amiga_bus_enable_dma_low_0_un1_n.BLIF N_210.BLIF N_315_i.BLIF \ - amiga_bus_enable_dma_low_0_un0_n.BLIF N_315.BLIF N_351_i.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF N_212.BLIF N_154_0.BLIF amiga_bus_enable_dma_high_0_un1_n.BLIF N_180.BLIF N_149_i.BLIF \ - amiga_bus_enable_dma_high_0_un0_n.BLIF N_213.BLIF N_207_i.BLIF bg_000_0_un3_n.BLIF N_178.BLIF N_228_i.BLIF bg_000_0_un1_n.BLIF N_228.BLIF bg_000_0_un0_n.BLIF \ - N_182.BLIF N_213_i.BLIF ds_000_dma_0_un3_n.BLIF N_176.BLIF N_212_i.BLIF ds_000_dma_0_un1_n.BLIF N_183.BLIF N_309_i.BLIF ds_000_dma_0_un0_n.BLIF \ - N_351.BLIF N_357_i.BLIF as_000_dma_0_un3_n.BLIF N_357.BLIF cpu_est_2_0_2__n.BLIF as_000_dma_0_un1_n.BLIF N_206.BLIF N_208_i.BLIF as_000_dma_0_un0_n.BLIF \ - N_205.BLIF N_209_i.BLIF as_030_000_sync_0_un3_n.BLIF N_352.BLIF cpu_est_2_0_1__n.BLIF as_030_000_sync_0_un1_n.BLIF N_353.BLIF N_206_i.BLIF as_030_000_sync_0_un0_n.BLIF \ - N_314.BLIF N_205_i.BLIF rw_000_dma_0_un3_n.BLIF N_244.BLIF pos_clk_un9_clk_000_pe_0_n.BLIF rw_000_dma_0_un1_n.BLIF N_336.BLIF N_18_i.BLIF rw_000_dma_0_un0_n.BLIF \ - N_311.BLIF N_37_0.BLIF a_decode_15__n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF N_171_i.BLIF N_211.BLIF N_354_i.BLIF a_decode_14__n.BLIF N_16.BLIF \ - un1_DS_000_ENABLE_0_sqmuxa_0.BLIF un1_amiga_bus_enable_low_i.BLIF N_66_0.BLIF a_decode_13__n.BLIF un21_fpu_cs_i.BLIF UDS_000_INT_i.BLIF cpu_est_i_2__n.BLIF un1_UDS_000_INT_0.BLIF a_decode_12__n.BLIF \ - cpu_est_i_0__n.BLIF LDS_000_INT_i.BLIF VPA_D_i.BLIF un1_LDS_000_INT_0.BLIF a_decode_11__n.BLIF DTACK_D0_i.BLIF N_21_i.BLIF cpu_est_i_3__n.BLIF N_34_0.BLIF \ - a_decode_10__n.BLIF sm_amiga_i_i_7__n.BLIF N_14_i.BLIF sm_amiga_i_5__n.BLIF N_41_0.BLIF a_decode_9__n.BLIF sm_amiga_i_3__n.BLIF N_8_i.BLIF cpu_est_i_1__n.BLIF \ - N_42_0.BLIF a_decode_8__n.BLIF clk_000_d_i_1__n.BLIF a_c_i_0__n.BLIF N_355_i_0.BLIF size_c_i_1__n.BLIF a_decode_7__n.BLIF sm_amiga_i_4__n.BLIF pos_clk_un10_sm_amiga_i_n.BLIF \ - sm_amiga_i_2__n.BLIF N_359_i.BLIF a_decode_6__n.BLIF rst_dly_i_0__n.BLIF pos_clk_un6_bgack_000_0_n.BLIF rst_dly_i_2__n.BLIF N_220_i.BLIF a_decode_5__n.BLIF a_decode_i_19__n.BLIF \ - N_219_i.BLIF a_decode_i_18__n.BLIF a_decode_4__n.BLIF a_decode_i_16__n.BLIF N_222_i.BLIF RW_000_i.BLIF N_221_i.BLIF a_decode_3__n.BLIF sm_amiga_i_0__n.BLIF \ - AS_030_i.BLIF N_223_i.BLIF a_decode_2__n.BLIF AS_000_INT_i.BLIF N_224_i.BLIF DSACK1_INT_i.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF clk_000_d_i_0__n.BLIF N_150_i.BLIF \ - sm_amiga_i_6__n.BLIF N_156_i.BLIF sm_amiga_i_1__n.BLIF N_160_i.BLIF FPU_SENSE_i.BLIF N_174_i.BLIF rst_dly_i_1__n.BLIF N_158_i.BLIF AS_030_D0_i.BLIF \ - N_201_i.BLIF BGACK_030_INT_i.BLIF N_202_i.BLIF nEXP_SPACE_i.BLIF N_203_i.BLIF RESET_OUT_i.BLIF AS_030.PIN AS_000.PIN RW_000.PIN \ - UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN \ - AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN + FC_0_.BLIF A_1_.BLIF SIZE_1_.BLIF AHIGH_31_.BLIF AS_030.BLIF AS_000.BLIF RW_000.BLIF UDS_000.BLIF LDS_000.BLIF BERR.BLIF DTACK.BLIF RW.BLIF SIZE_0_.BLIF AHIGH_30_.BLIF AHIGH_29_.BLIF AHIGH_28_.BLIF AHIGH_27_.BLIF AHIGH_26_.BLIF AHIGH_25_.BLIF AHIGH_24_.BLIF A_0_.BLIF clk_000_d_i_1__n.BLIF VPA_D_i.BLIF N_125_i.BLIF a_decode_2__n.BLIF VMA_INT_i.BLIF N_124_i.BLIF sm_amiga_i_0__n.BLIF \ + N_53_0.BLIF rst_dly_i_2__n.BLIF N_134_i.BLIF rst_dly_i_1__n.BLIF N_270_0.BLIF rst_dly_i_0__n.BLIF N_77_i.BLIF DSACK1_INT_i.BLIF N_87_i.BLIF \ + inst_BGACK_030_INTreg.BLIF N_137_i_0.BLIF N_112_i.BLIF vcc_n_n.BLIF DTACK_D0_i.BLIF N_113_i.BLIF inst_VMA_INTreg.BLIF BGACK_030_INT_i.BLIF N_114_i.BLIF \ + gnd_n_n.BLIF nEXP_SPACE_i.BLIF un1_amiga_bus_enable_low.BLIF AS_000_DMA_i.BLIF N_109_i.BLIF un7_as_030.BLIF RW_000_i.BLIF N_108_i.BLIF un1_LDS_000_INT.BLIF \ + clk_030_pe_i_1__n.BLIF N_111_i.BLIF un1_UDS_000_INT.BLIF DS_000_DMA_0_sqmuxa_i.BLIF N_265_2_0.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF pos_clk_un4_rw_000_i_n.BLIF un10_ciin.BLIF AS_000_i.BLIF \ + un1_as_000_i.BLIF un21_fpu_cs.BLIF AMIGA_DS_i.BLIF VPA_c_i.BLIF un21_berr.BLIF pos_clk_un3_clk_out_int_i_n.BLIF N_52_0.BLIF un6_ds_030.BLIF cycle_dma_i_0__n.BLIF \ + DTACK_c_i.BLIF un13_ciin.BLIF cycle_dma_i_1__n.BLIF N_48_0.BLIF cpu_est_1_.BLIF pos_clk_as_000_dma6_i_n.BLIF un3_ahigh_i.BLIF cpu_est_2_.BLIF DS_000_DMA_i.BLIF \ + pos_clk_un4_bgack_000_i_n.BLIF cpu_est_3_.BLIF CLK_EXP_i.BLIF pos_clk_un6_bgack_000_0_n.BLIF cpu_est_0_.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF N_7_i.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF ahigh_i_25__n.BLIF \ + N_41_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF ahigh_i_24__n.BLIF pos_clk_un1_bgack_030_int_0_n.BLIF inst_AS_030_D0.BLIF ahigh_i_27__n.BLIF pos_clk_un12_clk_out_int_0_n.BLIF inst_AS_030_000_SYNC.BLIF ahigh_i_26__n.BLIF \ + pos_clk_un3_0_n.BLIF inst_BGACK_030_INT_D.BLIF ahigh_i_29__n.BLIF pos_clk_un15_bgack_030_int_i_n.BLIF inst_AS_000_DMA.BLIF ahigh_i_28__n.BLIF N_3_i.BLIF inst_DS_000_DMA.BLIF ahigh_i_31__n.BLIF \ + N_43_0.BLIF inst_VPA_D.BLIF ahigh_i_30__n.BLIF N_4_i.BLIF CLK_000_D_3_.BLIF a_i_1__n.BLIF N_42_0.BLIF inst_DTACK_D0.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF \ + un6_amiga_bus_data_dir_i.BLIF inst_RESET_OUT.BLIF AS_030_D0_i.BLIF un12_amiga_bus_data_dir_m_i.BLIF CLK_030_PE_1_.BLIF un10_ciin_i.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF inst_AMIGA_DS.BLIF FPU_SENSE_i.BLIF \ + N_22_i.BLIF CLK_000_D_1_.BLIF AS_030_000_SYNC_i.BLIF N_31_0.BLIF CLK_000_D_0_.BLIF a_decode_i_16__n.BLIF N_21_i.BLIF inst_CLK_OUT_PRE_50.BLIF a_decode_i_18__n.BLIF \ + N_32_0.BLIF inst_CLK_OUT_PRE_D.BLIF a_decode_i_19__n.BLIF N_19_i.BLIF IPL_D0_0_.BLIF N_224_i.BLIF N_34_0.BLIF IPL_D0_1_.BLIF N_225_i.BLIF \ + N_18_i.BLIF IPL_D0_2_.BLIF N_226_i.BLIF N_35_0.BLIF CLK_000_D_2_.BLIF pos_clk_un5_bgack_030_int_d_i_n.BLIF CLK_000_D_4_.BLIF pos_clk_amiga_bus_enable_dma_high_3_0_n.BLIF pos_clk_un6_bg_030_n.BLIF \ + pos_clk_amiga_bus_enable_dma_low_3_0_n.BLIF pos_clk_ipl_n.BLIF pos_clk_rw_000_dma_3_0_n.BLIF inst_LDS_000_INT.BLIF un13_ciin_i.BLIF UDS_000_c_i.BLIF inst_DS_000_ENABLE.BLIF un6_ds_030_i.BLIF LDS_000_c_i.BLIF \ + inst_UDS_000_INT.BLIF N_123_i.BLIF N_86_i.BLIF SM_AMIGA_6_.BLIF N_122_i.BLIF N_129_i.BLIF SM_AMIGA_4_.BLIF un7_as_030_i.BLIF N_130_i.BLIF \ + SM_AMIGA_1_.BLIF AS_030_c.BLIF un11_amiga_bus_enable_high_i.BLIF SM_AMIGA_0_.BLIF N_117_i.BLIF SIZE_DMA_0_.BLIF AS_000_c.BLIF N_46_0.BLIF SIZE_DMA_1_.BLIF \ + N_107_i.BLIF CYCLE_DMA_0_.BLIF RW_000_c.BLIF pos_clk_size_dma_6_0_0__n.BLIF CYCLE_DMA_1_.BLIF N_106_i.BLIF CLK_030_PE_0_.BLIF pos_clk_size_dma_6_0_1__n.BLIF inst_RW_000_INT.BLIF \ + UDS_000_c.BLIF N_16_i.BLIF inst_RW_000_DMA.BLIF N_254_i.BLIF RST_DLY_0_.BLIF LDS_000_c.BLIF N_263_i.BLIF RST_DLY_1_.BLIF N_250_i.BLIF \ + RST_DLY_2_.BLIF size_c_0__n.BLIF N_256_i.BLIF inst_A0_DMA.BLIF N_189_i.BLIF pos_clk_rw_000_int_5_n.BLIF size_c_1__n.BLIF N_101_i.BLIF inst_DSACK1_INT.BLIF \ + inst_AS_000_INT.BLIF ahigh_c_24__n.BLIF N_103_i.BLIF SM_AMIGA_5_.BLIF N_104_i.BLIF SM_AMIGA_3_.BLIF ahigh_c_25__n.BLIF SM_AMIGA_2_.BLIF N_105_i.BLIF \ + ahigh_c_26__n.BLIF N_115_i.BLIF ahigh_c_27__n.BLIF N_116_i.BLIF ahigh_c_28__n.BLIF N_131_i.BLIF N_277_i.BLIF ahigh_c_29__n.BLIF N_64_0.BLIF \ + N_91_0.BLIF ahigh_c_30__n.BLIF N_159_0.BLIF N_14.BLIF N_85_i.BLIF N_15.BLIF ahigh_c_31__n.BLIF un1_SM_AMIGA_0_sqmuxa_1_0.BLIF N_24.BLIF \ + RW_c_i.BLIF N_25.BLIF pos_clk_rw_000_int_5_0_n.BLIF clk_000_d_i_3__n.BLIF N_25_i.BLIF N_28_0.BLIF N_24_i.BLIF N_27_0.BLIF ipl_c_i_1__n.BLIF \ + N_50_0.BLIF ipl_c_i_0__n.BLIF N_49_0.BLIF N_14_i.BLIF N_39_0.BLIF N_15_i.BLIF N_38_0.BLIF N_91_0_1.BLIF N_91_0_2.BLIF \ + N_91_0_3.BLIF N_265_i_1.BLIF N_266_i_1.BLIF N_266_i_2.BLIF N_138_i_1.BLIF N_148_i_1.BLIF N_144_i_1.BLIF N_142_i_1.BLIF N_140_i_1.BLIF \ + SM_AMIGA_i_7_.BLIF pos_clk_un10_sm_amiga_i_1_n.BLIF N_76.BLIF N_85_i_1.BLIF G_122.BLIF N_85_i_2.BLIF G_123.BLIF a_decode_c_16__n.BLIF N_277_1.BLIF \ + G_124.BLIF N_277_2.BLIF un1_rst_2_1.BLIF a_decode_c_17__n.BLIF N_277_3.BLIF cpu_est_0_0_.BLIF N_277_4.BLIF N_64.BLIF a_decode_c_18__n.BLIF \ + N_277_5.BLIF N_122.BLIF un10_ciin_1.BLIF N_123.BLIF a_decode_c_19__n.BLIF un10_ciin_2.BLIF N_132.BLIF un10_ciin_3.BLIF N_133.BLIF \ + a_decode_c_20__n.BLIF un10_ciin_4.BLIF N_274.BLIF un10_ciin_5.BLIF N_276.BLIF a_decode_c_21__n.BLIF un10_ciin_6.BLIF N_77.BLIF un10_ciin_7.BLIF \ + N_79.BLIF a_decode_c_22__n.BLIF un10_ciin_8.BLIF N_78.BLIF un10_ciin_9.BLIF N_263.BLIF a_decode_c_23__n.BLIF un10_ciin_10.BLIF N_108.BLIF \ + un10_ciin_11.BLIF N_114.BLIF a_c_0__n.BLIF un6_amiga_bus_data_dir_1.BLIF N_85.BLIF un6_amiga_bus_data_dir_2.BLIF N_104.BLIF a_c_1__n.BLIF pos_clk_as_000_dma6_1_n.BLIF \ + N_91.BLIF pos_clk_as_000_dma6_2_n.BLIF N_131.BLIF nEXP_SPACE_c.BLIF DS_000_DMA_1_sqmuxa_1.BLIF N_277.BLIF pos_clk_un4_rw_000_1_n.BLIF N_130.BLIF BERR_c.BLIF \ + pos_clk_un4_rw_000_2_n.BLIF N_115.BLIF pos_clk_un13_clk_out_int_1_n.BLIF N_116.BLIF BG_030_c.BLIF N_125_1.BLIF N_105.BLIF N_116_1.BLIF N_103.BLIF \ + BG_000DFFreg.BLIF pos_clk_un29_clk_000_ne_1_1_n.BLIF N_101.BLIF pos_clk_un29_clk_000_ne_1_2_n.BLIF N_259.BLIF pos_clk_un29_clk_000_ne_1_3_n.BLIF N_255.BLIF BGACK_000_c.BLIF N_261_1.BLIF \ + N_256.BLIF N_261_2.BLIF N_254.BLIF CLK_030_c.BLIF N_262_1.BLIF N_16.BLIF N_262_2.BLIF N_106.BLIF DS_000_ENABLE_0_sqmuxa_1_1.BLIF \ + N_86.BLIF N_259_1.BLIF N_107.BLIF CLK_OSZI_c.BLIF N_250_i_1.BLIF N_117.BLIF N_189_i_1.BLIF pos_clk_a0_dma_3_n.BLIF pos_clk_un6_bg_030_1_n.BLIF \ + N_129.BLIF CLK_OUT_INTreg.BLIF N_108_1.BLIF pos_clk_size_dma_6_1__n.BLIF N_114_1.BLIF pos_clk_size_dma_6_0__n.BLIF un21_berr_1.BLIF pos_clk_rw_000_dma_3_n.BLIF FPU_SENSE_c.BLIF \ + un21_fpu_cs_1.BLIF pos_clk_amiga_bus_enable_dma_low_3_n.BLIF N_130_1.BLIF pos_clk_amiga_bus_enable_dma_high_3_n.BLIF IPL_030DFF_0_reg.BLIF N_136_i_1.BLIF SIZE_DMA_3_sqmuxa.BLIF N_152_i_1.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF \ + IPL_030DFF_1_reg.BLIF N_146_i_1.BLIF N_18.BLIF N_267_i_1.BLIF N_19.BLIF IPL_030DFF_2_reg.BLIF pos_clk_ipl_1_n.BLIF N_21.BLIF bg_000_0_un3_n.BLIF \ + N_22.BLIF ipl_c_0__n.BLIF bg_000_0_un1_n.BLIF un6_amiga_bus_data_dir.BLIF bg_000_0_un0_n.BLIF un12_amiga_bus_data_dir_m.BLIF ipl_c_1__n.BLIF uds_000_int_0_un3_n.BLIF pos_clk_un3_clk_out_int_n.BLIF \ + uds_000_int_0_un1_n.BLIF N_3.BLIF ipl_c_2__n.BLIF uds_000_int_0_un0_n.BLIF pos_clk_as_000_dma6_n.BLIF lds_000_int_0_un3_n.BLIF DS_000_DMA_1_sqmuxa.BLIF lds_000_int_0_un1_n.BLIF N_4.BLIF \ + DTACK_c.BLIF lds_000_int_0_un0_n.BLIF AS_000_DMA_1_sqmuxa.BLIF ds_000_enable_0_un3_n.BLIF un1_rst_2.BLIF ds_000_enable_0_un1_n.BLIF G_97.BLIF ds_000_enable_0_un0_n.BLIF N_199.BLIF \ + VPA_c.BLIF ipl_030_0_2__un3_n.BLIF pos_clk_un13_bgack_030_int_n.BLIF ipl_030_0_2__un1_n.BLIF N_205.BLIF ipl_030_0_2__un0_n.BLIF pos_clk_un13_clk_out_int_n.BLIF RST_c.BLIF vma_int_0_un3_n.BLIF \ + pos_clk_un15_bgack_030_int_n.BLIF vma_int_0_un1_n.BLIF pos_clk_un3_n.BLIF RESET_c.BLIF vma_int_0_un0_n.BLIF pos_clk_un12_clk_out_int_n.BLIF cpu_est_0_1__un3_n.BLIF pos_clk_un1_bgack_030_int_n.BLIF RW_c.BLIF \ + cpu_est_0_1__un1_n.BLIF DS_000_DMA_0_sqmuxa.BLIF cpu_est_0_1__un0_n.BLIF un1_rst_3.BLIF fc_c_0__n.BLIF cpu_est_0_2__un3_n.BLIF G_95.BLIF cpu_est_0_2__un1_n.BLIF G_101.BLIF \ + fc_c_1__n.BLIF cpu_est_0_2__un0_n.BLIF G_103.BLIF cpu_est_0_3__un3_n.BLIF pos_clk_un4_rw_000_n.BLIF cpu_est_0_3__un1_n.BLIF N_7.BLIF AMIGA_BUS_DATA_DIR_c.BLIF cpu_est_0_3__un0_n.BLIF \ + pos_clk_un6_bgack_000_n.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un3_n.BLIF pos_clk_un4_bgack_000_n.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un1_n.BLIF N_265_2.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un0_n.BLIF N_111.BLIF bgack_030_int_0_un3_n.BLIF N_109.BLIF \ + BG_030_c_i.BLIF bgack_030_int_0_un1_n.BLIF N_113.BLIF pos_clk_un6_bg_030_i_n.BLIF bgack_030_int_0_un0_n.BLIF N_112.BLIF pos_clk_un9_bg_030_0_n.BLIF ds_000_dma_0_un3_n.BLIF N_98.BLIF \ + UDS_000_INT_i.BLIF ds_000_dma_0_un1_n.BLIF pos_clk_un29_clk_000_ne_1_n.BLIF un1_UDS_000_INT_0.BLIF ds_000_dma_0_un0_n.BLIF N_87.BLIF LDS_000_INT_i.BLIF as_000_dma_0_un3_n.BLIF N_270.BLIF \ + un1_LDS_000_INT_0.BLIF as_000_dma_0_un1_n.BLIF N_134.BLIF N_23_i.BLIF as_000_dma_0_un0_n.BLIF N_125.BLIF N_30_0.BLIF size_dma_0_1__un3_n.BLIF N_124.BLIF \ + N_20_i.BLIF size_dma_0_1__un1_n.BLIF N_121.BLIF N_33_0.BLIF size_dma_0_1__un0_n.BLIF N_120.BLIF N_13_i.BLIF size_dma_0_0__un3_n.BLIF N_137.BLIF \ + N_40_0.BLIF size_dma_0_0__un1_n.BLIF pos_clk_un31_clk_000_ne_n.BLIF ipl_c_i_2__n.BLIF size_dma_0_0__un0_n.BLIF N_17.BLIF N_51_0.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF pos_clk_un9_clk_000_pe_n.BLIF \ + N_26_i.BLIF amiga_bus_enable_dma_high_0_un1_n.BLIF cpu_est_2_1__n.BLIF N_29_0.BLIF amiga_bus_enable_dma_high_0_un0_n.BLIF cpu_est_2_2__n.BLIF a_c_i_0__n.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF N_261.BLIF \ + size_c_i_1__n.BLIF amiga_bus_enable_dma_low_0_un1_n.BLIF N_262.BLIF pos_clk_un10_sm_amiga_i_n.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF N_251.BLIF DS_000_ENABLE_0_sqmuxa_1_i.BLIF a0_dma_0_un3_n.BLIF N_252.BLIF \ + un1_DS_000_ENABLE_0_sqmuxa_i.BLIF a0_dma_0_un1_n.BLIF N_258.BLIF N_157_i.BLIF a0_dma_0_un0_n.BLIF N_257.BLIF N_160_0.BLIF rw_000_dma_0_un3_n.BLIF DS_000_ENABLE_1_sqmuxa.BLIF \ + N_161_0.BLIF rw_000_dma_0_un1_n.BLIF un1_DS_000_ENABLE_0_sqmuxa.BLIF N_162_0.BLIF rw_000_dma_0_un0_n.BLIF N_102.BLIF N_165_i.BLIF ipl_030_0_0__un3_n.BLIF N_118.BLIF \ + ipl_030_0_0__un1_n.BLIF N_119.BLIF N_167_i.BLIF ipl_030_0_0__un0_n.BLIF N_264.BLIF N_166_i.BLIF ipl_030_0_1__un3_n.BLIF DS_000_ENABLE_0_sqmuxa_1.BLIF ipl_030_0_1__un1_n.BLIF \ + N_164.BLIF N_168_i.BLIF ipl_030_0_1__un0_n.BLIF N_170.BLIF as_030_000_sync_0_un3_n.BLIF N_168.BLIF N_170_i.BLIF as_030_000_sync_0_un1_n.BLIF N_166.BLIF \ + as_030_000_sync_0_un0_n.BLIF N_167.BLIF N_164_i.BLIF rw_000_int_0_un3_n.BLIF N_165.BLIF rw_000_int_0_un1_n.BLIF N_162.BLIF N_102_i.BLIF rw_000_int_0_un0_n.BLIF \ + N_161.BLIF N_264_i.BLIF a_decode_15__n.BLIF N_160.BLIF N_79_i.BLIF N_157.BLIF N_78_i.BLIF a_decode_14__n.BLIF N_26.BLIF \ + N_119_i.BLIF N_13.BLIF N_118_i.BLIF a_decode_13__n.BLIF N_20.BLIF N_23.BLIF N_255_i.BLIF a_decode_12__n.BLIF N_8.BLIF \ + N_257_i.BLIF pos_clk_un9_bg_030_n.BLIF cpu_est_2_0_2__n.BLIF a_decode_11__n.BLIF un1_amiga_bus_enable_low_i.BLIF N_258_i.BLIF un21_fpu_cs_i.BLIF N_259_i.BLIF a_decode_10__n.BLIF \ + sm_amiga_i_2__n.BLIF cpu_est_2_0_1__n.BLIF sm_amiga_i_1__n.BLIF N_262_i.BLIF a_decode_9__n.BLIF sm_amiga_i_3__n.BLIF N_261_i.BLIF sm_amiga_i_4__n.BLIF pos_clk_un9_clk_000_pe_0_n.BLIF \ + a_decode_8__n.BLIF sm_amiga_i_6__n.BLIF N_251_i.BLIF sm_amiga_i_5__n.BLIF N_252_0.BLIF a_decode_7__n.BLIF clk_000_d_i_0__n.BLIF N_76_i.BLIF AS_000_INT_i.BLIF \ + N_17_i.BLIF a_decode_6__n.BLIF sm_amiga_i_i_7__n.BLIF N_36_0.BLIF AS_030_i.BLIF N_98_i.BLIF a_decode_5__n.BLIF cpu_est_i_2__n.BLIF pos_clk_un31_clk_000_ne_i_n.BLIF \ + cpu_est_i_0__n.BLIF N_228_i.BLIF a_decode_4__n.BLIF cpu_est_i_3__n.BLIF N_121_i.BLIF cpu_est_i_1__n.BLIF N_120_i.BLIF a_decode_3__n.BLIF AS_030.PIN \ + AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN \ + AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN DTACK.PIN RW.PIN .outputs IPL_030_2_ DS_030 BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 AVEC E VMA \ - RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D \ - IPL_D0_1_.C IPL_D0_2_.D IPL_D0_2_.C SM_AMIGA_i_7_.D SM_AMIGA_i_7_.C SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_4_.D SM_AMIGA_4_.C \ - SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D \ - cpu_est_1_.C cpu_est_2_.D cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C IPL_030DFF_0_reg.D IPL_030DFF_0_reg.C IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D IPL_030DFF_2_reg.C \ - RST_DLY_2_.D RST_DLY_2_.C CLK_000_D_0_.D CLK_000_D_0_.C CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C CLK_000_D_4_.D \ - CLK_000_D_4_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C RST_DLY_0_.D RST_DLY_0_.C \ - RST_DLY_1_.D RST_DLY_1_.C inst_RW_000_INT.D inst_RW_000_INT.C inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_LDS_000_INT.D inst_LDS_000_INT.C inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_AS_000_DMA.D \ - inst_AS_000_DMA.C inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DSACK1_INT.D inst_DSACK1_INT.C inst_AS_000_INT.D inst_AS_000_INT.C inst_AS_030_D0.D inst_AS_030_D0.C inst_VPA_D.D inst_VPA_D.C \ - inst_DTACK_D0.D inst_DTACK_D0.C inst_CLK_030_H.D inst_CLK_030_H.C inst_RESET_OUT.D inst_RESET_OUT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C BG_000DFFreg.D BG_000DFFreg.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D \ - inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.D inst_UDS_000_INT.C inst_A0_DMA.D inst_A0_DMA.C inst_RW_000_DMA.D inst_RW_000_DMA.C inst_VMA_INTreg.D inst_VMA_INTreg.C \ - inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C pos_clk_un21_bgack_030_int_i_0_o3_0_x2.X1 pos_clk_un21_bgack_030_int_i_0_o3_0_x2.X2 pos_clk_un1_ipl_i_0_x2.X1 \ - pos_clk_un1_ipl_i_0_x2.X2 pos_clk_un1_ipl_i_0_x2_0.X1 pos_clk_un1_ipl_i_0_x2_0.X2 pos_clk_un1_ipl_i_0_x2_1.X1 pos_clk_un1_ipl_i_0_x2_1.X2 pos_clk_CYCLE_DMA_5_1_i_0_x2.X1 pos_clk_CYCLE_DMA_5_1_i_0_x2.X2 SIZE_1_ AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR RW SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ ipl_i_2__n N_233_0 ipl_i_1__n N_360_i \ - ipl_i_0__n N_191_i_i a_i_1__n N_192_i_i AS_000_DMA_i AS_000_i N_199_i CLK_030_H_i N_204_i AS_030_000_SYNC_i AMIGA_BUS_ENABLE_DMA_HIGH_i \ - N_282_i vcc_n_n cycle_dma_i_0__n N_278_i ahigh_i_30__n N_186_i gnd_n_n ahigh_i_31__n N_185_i un1_amiga_bus_enable_low ahigh_i_28__n \ - CLK_030_c_i un7_as_030 ahigh_i_29__n N_184_0 un1_LDS_000_INT ahigh_i_26__n N_179_0 un1_UDS_000_INT ahigh_i_27__n N_251_i un10_ciin \ - ahigh_i_24__n LDS_000_c_i un21_fpu_cs ahigh_i_25__n UDS_000_c_i un21_berr N_172_i un6_ds_030 pos_clk_un21_bgack_030_int_i_0_0_n N_163_i clk_000_d_i_3__n \ - N_115_i N_350_i N_114_i un1_rw_i un6_ds_030_i N_126_0 DS_000_DMA_i N_313_i N_132_i N_231_i N_133_i \ - N_291_i un7_as_030_i AMIGA_BUS_ENABLE_DMA_LOW_i N_288_i AS_030_c N_287_i AS_000_c N_340_i RW_000_c N_284_i N_275_i \ - UDS_000_c pos_clk_size_dma_6_0_1__n N_268_i LDS_000_c pos_clk_size_dma_6_0_0__n N_265_i size_c_0__n N_267_i size_c_1__n N_337_i N_338_i \ - ahigh_c_24__n N_55_0 un1_as_000_i ahigh_c_25__n N_245_0 N_229_i pos_clk_un9_bg_030_n ahigh_c_26__n N_227_i ahigh_c_27__n N_226_i \ - ahigh_c_28__n N_246_0 N_332_i ahigh_c_29__n pos_clk_ds_000_dma_4_0_n N_48_0 ahigh_c_30__n pos_clk_rw_000_dma_3_0_n N_218_i ahigh_c_31__n un10_ciin_i \ - pos_clk_a0_dma_3_n N_62_0 pos_clk_rw_000_dma_3_n N_215_i N_216_i un10_amiga_bus_enable_high_i N_214_i N_310_0 N_24_i N_33_0 pos_clk_ds_000_dma_4_n \ - N_23_i N_3 N_32_0 N_4 N_22_i N_31_0 N_3_i N_45_0 N_4_i N_44_0 N_15 \ - N_15_i N_19 N_40_0 N_20 N_19_i N_22 N_36_0 N_23 N_20_i N_24 N_35_0 \ - N_25 N_25_i N_26 N_30_0 N_27 N_26_i N_29_0 N_27_i a_decode_c_16__n N_28_0 BG_030_c_i \ - a_decode_c_17__n pos_clk_un9_bg_030_0_n N_235_i_1 a_decode_c_18__n N_235_i_2 N_156_i_1 a_decode_c_19__n N_156_i_2 N_156_i_3 a_decode_c_20__n N_156_i_4 \ - pos_clk_un10_sm_amiga_i_1_n a_decode_c_21__n N_176_i_1 un10_ciin_1 a_decode_c_22__n un10_ciin_2 un10_ciin_3 a_decode_c_23__n un10_ciin_4 un10_ciin_5 a_c_0__n \ - un10_ciin_6 un10_ciin_7 a_c_1__n un10_ciin_8 un10_ciin_9 pos_clk_size_dma_6_0__n nEXP_SPACE_c un10_ciin_10 pos_clk_size_dma_6_1__n un10_ciin_11 N_199 \ - BERR_c N_163_i_1 pos_clk_un21_bgack_030_int_i_0_n N_163_i_2 N_231 BG_030_c pos_clk_un21_bgack_030_int_i_0_0_1_n N_233 pos_clk_un21_bgack_030_int_i_0_0_2_n N_111 N_138_i_1 \ - N_112 N_138_i_2 N_113 N_59_i_1 N_114 BGACK_000_c N_59_i_2 N_115 N_233_0_1 N_245 CLK_030_c \ - N_233_0_2 N_246 N_214_1 N_62 N_214_2 N_214_3 N_132 CLK_OSZI_c un21_fpu_cs_1 N_133 un21_berr_1_0 \ - N_310 N_182_0_1 N_126 N_234_i_1 N_149 N_234_i_2 N_150 N_206_1 N_158 FPU_SENSE_c N_206_2 \ - N_160 N_205_1 N_163 N_205_2 N_172 N_352_1 N_179 N_352_2 N_184 N_231_i_1 N_185 \ - N_152_i_1 N_196 N_144_i_1 N_203 ipl_c_0__n N_142_i_1 N_204 N_312_i_1 N_209 ipl_c_1__n N_236_i_1 \ - N_214 N_148_i_1 N_215 ipl_c_2__n N_136_i_1 N_216 N_246_0_1 N_218 N_249_i_1 N_224 DTACK_c \ - N_57_i_1 N_332 N_338_1 N_226 N_224_1 N_227 N_216_1 N_229 VPA_c N_209_1 N_337 \ - N_203_1 N_338 N_196_1 N_265 RST_c cpu_est_0_3__un3_n N_267 cpu_est_0_3__un1_n N_268 cpu_est_0_3__un0_n N_275 \ - RW_c rw_000_int_0_un3_n N_278 rw_000_int_0_un1_n N_282 fc_c_0__n rw_000_int_0_un0_n N_284 vma_int_0_un3_n N_340 fc_c_1__n \ - vma_int_0_un1_n N_287 vma_int_0_un0_n N_288 cpu_est_0_1__un3_n N_291 AMIGA_BUS_DATA_DIR_c cpu_est_0_1__un1_n N_293 cpu_est_0_1__un0_n N_350 \ - cpu_est_0_2__un3_n N_355 cpu_est_0_2__un1_n cpu_est_0_2__un0_n N_16_i uds_000_int_0_un3_n N_39_0 uds_000_int_0_un1_n VPA_c_i uds_000_int_0_un0_n N_52_0 \ - lds_000_int_0_un3_n N_156 DTACK_c_i lds_000_int_0_un1_n N_201 N_53_0 lds_000_int_0_un0_n N_202 N_210_i bgack_030_int_0_un3_n N_154 \ - N_211_i bgack_030_int_0_un1_n un21_berr_1 N_189_i bgack_030_int_0_un0_n N_174 un1_SM_AMIGA_0_sqmuxa_1_0 ds_000_enable_0_un3_n N_223 RW_c_i ds_000_enable_0_un1_n \ - N_221 N_311_0 ds_000_enable_0_un0_n N_222 N_336_i size_dma_0_0__un3_n N_219 N_244_i size_dma_0_0__un1_n N_220 size_dma_0_0__un0_n \ - pos_clk_un6_bgack_000_n N_314_0 size_dma_0_1__un3_n N_359 N_159_i size_dma_0_1__un1_n N_8 VMA_INT_i size_dma_0_1__un0_n N_14 N_352_i \ - ipl_030_0_0__un3_n N_21 N_353_i ipl_030_0_0__un1_n N_9 N_293_i ipl_030_0_0__un0_n un1_DS_000_ENABLE_0_sqmuxa N_175_i ipl_030_0_1__un3_n N_66 \ - N_176_i ipl_030_0_1__un1_n N_171 ipl_030_0_1__un0_n N_354 N_198_i ipl_030_0_2__un3_n N_18 N_197_i ipl_030_0_2__un1_n pos_clk_un9_clk_000_pe_n \ - N_196_i ipl_030_0_2__un0_n cpu_est_2_1__n N_183_0 a0_dma_0_un3_n cpu_est_2_2__n N_182_0 a0_dma_0_un1_n N_197 N_180_0 a0_dma_0_un0_n \ - N_198 N_178_0 amiga_bus_enable_dma_low_0_un3_n N_208 N_82_i amiga_bus_enable_dma_low_0_un1_n N_210 N_315_i amiga_bus_enable_dma_low_0_un0_n N_315 N_351_i \ - amiga_bus_enable_dma_high_0_un3_n N_212 N_154_0 amiga_bus_enable_dma_high_0_un1_n N_180 N_149_i amiga_bus_enable_dma_high_0_un0_n N_213 N_207_i bg_000_0_un3_n N_178 \ - N_228_i bg_000_0_un1_n N_228 bg_000_0_un0_n N_182 N_213_i ds_000_dma_0_un3_n N_176 N_212_i ds_000_dma_0_un1_n N_183 \ - N_309_i ds_000_dma_0_un0_n N_351 N_357_i as_000_dma_0_un3_n N_357 cpu_est_2_0_2__n as_000_dma_0_un1_n N_206 N_208_i as_000_dma_0_un0_n \ - N_205 N_209_i as_030_000_sync_0_un3_n N_352 cpu_est_2_0_1__n as_030_000_sync_0_un1_n N_353 N_206_i as_030_000_sync_0_un0_n N_314 N_205_i \ - rw_000_dma_0_un3_n N_244 pos_clk_un9_clk_000_pe_0_n rw_000_dma_0_un1_n N_336 N_18_i rw_000_dma_0_un0_n N_311 N_37_0 a_decode_15__n un1_SM_AMIGA_0_sqmuxa_1 \ - N_171_i N_211 N_354_i a_decode_14__n N_16 un1_DS_000_ENABLE_0_sqmuxa_0 un1_amiga_bus_enable_low_i N_66_0 a_decode_13__n un21_fpu_cs_i UDS_000_INT_i \ - cpu_est_i_2__n un1_UDS_000_INT_0 a_decode_12__n cpu_est_i_0__n LDS_000_INT_i VPA_D_i un1_LDS_000_INT_0 a_decode_11__n DTACK_D0_i N_21_i cpu_est_i_3__n \ - N_34_0 a_decode_10__n sm_amiga_i_i_7__n N_14_i sm_amiga_i_5__n N_41_0 a_decode_9__n sm_amiga_i_3__n N_8_i cpu_est_i_1__n N_42_0 \ - a_decode_8__n clk_000_d_i_1__n a_c_i_0__n N_355_i_0 size_c_i_1__n a_decode_7__n sm_amiga_i_4__n pos_clk_un10_sm_amiga_i_n sm_amiga_i_2__n N_359_i a_decode_6__n \ - rst_dly_i_0__n pos_clk_un6_bgack_000_0_n rst_dly_i_2__n N_220_i a_decode_5__n a_decode_i_19__n N_219_i a_decode_i_18__n a_decode_4__n a_decode_i_16__n N_222_i \ - RW_000_i N_221_i a_decode_3__n sm_amiga_i_0__n AS_030_i N_223_i a_decode_2__n AS_000_INT_i N_224_i DSACK1_INT_i AMIGA_BUS_DATA_DIR_c_0 \ - clk_000_d_i_0__n N_150_i sm_amiga_i_6__n N_156_i sm_amiga_i_1__n N_160_i FPU_SENSE_i N_174_i rst_dly_i_1__n N_158_i AS_030_D0_i \ - N_201_i BGACK_030_INT_i N_202_i nEXP_SPACE_i N_203_i RESET_OUT_i AS_030.OE AS_000.OE RW_000.OE \ - UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE \ - AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE RESET.OE \ - CIIN.OE + AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_i_7_.D SM_AMIGA_i_7_.C SM_AMIGA_6_.D SM_AMIGA_6_.C \ + SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D \ + SM_AMIGA_0_.C cpu_est_2_.D cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C IPL_030DFF_0_reg.D IPL_030DFF_0_reg.C IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D IPL_030DFF_2_reg.C \ + IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D IPL_D0_1_.C IPL_D0_2_.D IPL_D0_2_.C CLK_000_D_0_.D CLK_000_D_0_.C CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_2_.D \ + CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C CLK_000_D_4_.D CLK_000_D_4_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C CLK_030_PE_0_.D CLK_030_PE_0_.C \ + CLK_030_PE_1_.D CLK_030_PE_1_.C SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C RST_DLY_0_.D \ + RST_DLY_0_.C RST_DLY_1_.D RST_DLY_1_.C RST_DLY_2_.D RST_DLY_2_.C inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DSACK1_INT.D inst_DSACK1_INT.C inst_AS_000_INT.D inst_AS_000_INT.C \ + inst_AMIGA_DS.D inst_AMIGA_DS.C inst_AS_030_D0.D inst_AS_030_D0.C inst_DTACK_D0.D inst_DTACK_D0.C inst_VPA_D.D inst_VPA_D.C inst_RESET_OUT.D inst_RESET_OUT.C inst_DS_000_ENABLE.D \ + inst_DS_000_ENABLE.C BG_000DFFreg.D BG_000DFFreg.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.D inst_UDS_000_INT.C inst_A0_DMA.D inst_A0_DMA.C \ + inst_RW_000_DMA.D inst_RW_000_DMA.C inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_INT.D inst_RW_000_INT.C inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_LDS_000_INT.D inst_LDS_000_INT.C inst_BGACK_030_INTreg.D \ + inst_BGACK_030_INTreg.C inst_AS_000_DMA.D inst_AS_000_DMA.C inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C \ + G_95.X1 G_95.X2 G_101.X1 G_101.X2 G_103.X1 G_103.X2 G_97.X1 G_97.X2 G_122.X1 G_122.X2 G_123.X1 \ + G_123.X2 G_124.X1 G_124.X2 cpu_est_0_0_.X1 cpu_est_0_0_.X2 SIZE_1_ AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR DTACK RW SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ clk_000_d_i_1__n VPA_D_i N_125_i a_decode_2__n VMA_INT_i N_124_i \ + sm_amiga_i_0__n N_53_0 rst_dly_i_2__n N_134_i rst_dly_i_1__n N_270_0 rst_dly_i_0__n N_77_i DSACK1_INT_i N_87_i N_137_i_0 \ + N_112_i vcc_n_n DTACK_D0_i N_113_i BGACK_030_INT_i N_114_i gnd_n_n nEXP_SPACE_i un1_amiga_bus_enable_low AS_000_DMA_i N_109_i \ + un7_as_030 RW_000_i N_108_i un1_LDS_000_INT clk_030_pe_i_1__n N_111_i un1_UDS_000_INT DS_000_DMA_0_sqmuxa_i N_265_2_0 un1_SM_AMIGA_0_sqmuxa_1 pos_clk_un4_rw_000_i_n \ + un10_ciin AS_000_i un1_as_000_i un21_fpu_cs AMIGA_DS_i VPA_c_i un21_berr pos_clk_un3_clk_out_int_i_n N_52_0 un6_ds_030 cycle_dma_i_0__n \ + DTACK_c_i un13_ciin cycle_dma_i_1__n N_48_0 pos_clk_as_000_dma6_i_n un3_ahigh_i DS_000_DMA_i pos_clk_un4_bgack_000_i_n CLK_EXP_i pos_clk_un6_bgack_000_0_n AMIGA_BUS_ENABLE_DMA_LOW_i \ + N_7_i ahigh_i_25__n N_41_0 ahigh_i_24__n pos_clk_un1_bgack_030_int_0_n ahigh_i_27__n pos_clk_un12_clk_out_int_0_n ahigh_i_26__n pos_clk_un3_0_n ahigh_i_29__n pos_clk_un15_bgack_030_int_i_n \ + ahigh_i_28__n N_3_i ahigh_i_31__n N_43_0 ahigh_i_30__n N_4_i a_i_1__n N_42_0 AMIGA_BUS_ENABLE_DMA_HIGH_i un6_amiga_bus_data_dir_i AS_030_D0_i \ + un12_amiga_bus_data_dir_m_i un10_ciin_i AMIGA_BUS_DATA_DIR_c_0 FPU_SENSE_i N_22_i AS_030_000_SYNC_i N_31_0 a_decode_i_16__n N_21_i a_decode_i_18__n N_32_0 \ + a_decode_i_19__n N_19_i N_224_i N_34_0 N_225_i N_18_i N_226_i N_35_0 pos_clk_un5_bgack_030_int_d_i_n pos_clk_amiga_bus_enable_dma_high_3_0_n pos_clk_un6_bg_030_n \ + pos_clk_amiga_bus_enable_dma_low_3_0_n pos_clk_ipl_n pos_clk_rw_000_dma_3_0_n un13_ciin_i UDS_000_c_i un6_ds_030_i LDS_000_c_i N_123_i N_86_i N_122_i N_129_i \ + un7_as_030_i N_130_i AS_030_c un11_amiga_bus_enable_high_i N_117_i AS_000_c N_46_0 N_107_i RW_000_c pos_clk_size_dma_6_0_0__n N_106_i \ + pos_clk_size_dma_6_0_1__n UDS_000_c N_16_i N_254_i LDS_000_c N_263_i N_250_i size_c_0__n N_256_i N_189_i pos_clk_rw_000_int_5_n \ + size_c_1__n N_101_i ahigh_c_24__n N_103_i N_104_i ahigh_c_25__n N_105_i ahigh_c_26__n N_115_i ahigh_c_27__n N_116_i \ + ahigh_c_28__n N_131_i N_277_i ahigh_c_29__n N_64_0 N_91_0 ahigh_c_30__n N_159_0 N_14 N_85_i N_15 \ + ahigh_c_31__n un1_SM_AMIGA_0_sqmuxa_1_0 N_24 RW_c_i N_25 pos_clk_rw_000_int_5_0_n clk_000_d_i_3__n N_25_i N_28_0 N_24_i N_27_0 \ + ipl_c_i_1__n N_50_0 ipl_c_i_0__n N_49_0 N_14_i N_39_0 N_15_i N_38_0 N_91_0_1 N_91_0_2 N_91_0_3 \ + N_265_i_1 N_266_i_1 N_266_i_2 N_138_i_1 N_148_i_1 N_144_i_1 N_142_i_1 N_140_i_1 pos_clk_un10_sm_amiga_i_1_n N_76 N_85_i_1 \ + N_85_i_2 a_decode_c_16__n N_277_1 N_277_2 un1_rst_2_1 a_decode_c_17__n N_277_3 N_277_4 N_64 a_decode_c_18__n N_277_5 \ + N_122 un10_ciin_1 N_123 a_decode_c_19__n un10_ciin_2 N_132 un10_ciin_3 N_133 a_decode_c_20__n un10_ciin_4 N_274 \ + un10_ciin_5 N_276 a_decode_c_21__n un10_ciin_6 N_77 un10_ciin_7 N_79 a_decode_c_22__n un10_ciin_8 N_78 un10_ciin_9 \ + N_263 a_decode_c_23__n un10_ciin_10 N_108 un10_ciin_11 N_114 a_c_0__n un6_amiga_bus_data_dir_1 N_85 un6_amiga_bus_data_dir_2 N_104 \ + a_c_1__n pos_clk_as_000_dma6_1_n N_91 pos_clk_as_000_dma6_2_n N_131 nEXP_SPACE_c DS_000_DMA_1_sqmuxa_1 N_277 pos_clk_un4_rw_000_1_n N_130 BERR_c \ + pos_clk_un4_rw_000_2_n N_115 pos_clk_un13_clk_out_int_1_n N_116 BG_030_c N_125_1 N_105 N_116_1 N_103 pos_clk_un29_clk_000_ne_1_1_n N_101 \ + pos_clk_un29_clk_000_ne_1_2_n N_259 pos_clk_un29_clk_000_ne_1_3_n N_255 BGACK_000_c N_261_1 N_256 N_261_2 N_254 CLK_030_c N_262_1 \ + N_16 N_262_2 N_106 DS_000_ENABLE_0_sqmuxa_1_1 N_86 N_259_1 N_107 CLK_OSZI_c N_250_i_1 N_117 N_189_i_1 \ + pos_clk_a0_dma_3_n pos_clk_un6_bg_030_1_n N_129 N_108_1 pos_clk_size_dma_6_1__n N_114_1 pos_clk_size_dma_6_0__n un21_berr_1 pos_clk_rw_000_dma_3_n FPU_SENSE_c un21_fpu_cs_1 \ + pos_clk_amiga_bus_enable_dma_low_3_n N_130_1 pos_clk_amiga_bus_enable_dma_high_3_n N_136_i_1 SIZE_DMA_3_sqmuxa N_152_i_1 pos_clk_un5_bgack_030_int_d_n N_146_i_1 N_18 N_267_i_1 N_19 \ + pos_clk_ipl_1_n N_21 bg_000_0_un3_n N_22 ipl_c_0__n bg_000_0_un1_n un6_amiga_bus_data_dir bg_000_0_un0_n un12_amiga_bus_data_dir_m ipl_c_1__n uds_000_int_0_un3_n \ + pos_clk_un3_clk_out_int_n uds_000_int_0_un1_n N_3 ipl_c_2__n uds_000_int_0_un0_n pos_clk_as_000_dma6_n lds_000_int_0_un3_n DS_000_DMA_1_sqmuxa lds_000_int_0_un1_n N_4 DTACK_c \ + lds_000_int_0_un0_n AS_000_DMA_1_sqmuxa ds_000_enable_0_un3_n un1_rst_2 ds_000_enable_0_un1_n ds_000_enable_0_un0_n N_199 VPA_c ipl_030_0_2__un3_n pos_clk_un13_bgack_030_int_n ipl_030_0_2__un1_n \ + N_205 ipl_030_0_2__un0_n pos_clk_un13_clk_out_int_n RST_c vma_int_0_un3_n pos_clk_un15_bgack_030_int_n vma_int_0_un1_n pos_clk_un3_n RESET_c vma_int_0_un0_n pos_clk_un12_clk_out_int_n \ + cpu_est_0_1__un3_n pos_clk_un1_bgack_030_int_n RW_c cpu_est_0_1__un1_n DS_000_DMA_0_sqmuxa cpu_est_0_1__un0_n un1_rst_3 fc_c_0__n cpu_est_0_2__un3_n cpu_est_0_2__un1_n fc_c_1__n \ + cpu_est_0_2__un0_n cpu_est_0_3__un3_n pos_clk_un4_rw_000_n cpu_est_0_3__un1_n N_7 AMIGA_BUS_DATA_DIR_c cpu_est_0_3__un0_n pos_clk_un6_bgack_000_n pos_clk_un31_clk_000_ne_1_i_m2_un3_n pos_clk_un4_bgack_000_n pos_clk_un31_clk_000_ne_1_i_m2_un1_n \ + N_265_2 pos_clk_un31_clk_000_ne_1_i_m2_un0_n N_111 bgack_030_int_0_un3_n N_109 BG_030_c_i bgack_030_int_0_un1_n N_113 pos_clk_un6_bg_030_i_n bgack_030_int_0_un0_n N_112 \ + pos_clk_un9_bg_030_0_n ds_000_dma_0_un3_n N_98 UDS_000_INT_i ds_000_dma_0_un1_n pos_clk_un29_clk_000_ne_1_n un1_UDS_000_INT_0 ds_000_dma_0_un0_n N_87 LDS_000_INT_i as_000_dma_0_un3_n \ + N_270 un1_LDS_000_INT_0 as_000_dma_0_un1_n N_134 N_23_i as_000_dma_0_un0_n N_125 N_30_0 size_dma_0_1__un3_n N_124 N_20_i \ + size_dma_0_1__un1_n N_121 N_33_0 size_dma_0_1__un0_n N_120 N_13_i size_dma_0_0__un3_n N_137 N_40_0 size_dma_0_0__un1_n pos_clk_un31_clk_000_ne_n \ + ipl_c_i_2__n size_dma_0_0__un0_n N_17 N_51_0 amiga_bus_enable_dma_high_0_un3_n pos_clk_un9_clk_000_pe_n N_26_i amiga_bus_enable_dma_high_0_un1_n cpu_est_2_1__n N_29_0 amiga_bus_enable_dma_high_0_un0_n \ + cpu_est_2_2__n a_c_i_0__n amiga_bus_enable_dma_low_0_un3_n N_261 size_c_i_1__n amiga_bus_enable_dma_low_0_un1_n N_262 pos_clk_un10_sm_amiga_i_n amiga_bus_enable_dma_low_0_un0_n N_251 DS_000_ENABLE_0_sqmuxa_1_i \ + a0_dma_0_un3_n N_252 un1_DS_000_ENABLE_0_sqmuxa_i a0_dma_0_un1_n N_258 N_157_i a0_dma_0_un0_n N_257 N_160_0 rw_000_dma_0_un3_n DS_000_ENABLE_1_sqmuxa \ + N_161_0 rw_000_dma_0_un1_n un1_DS_000_ENABLE_0_sqmuxa N_162_0 rw_000_dma_0_un0_n N_102 N_165_i ipl_030_0_0__un3_n N_118 ipl_030_0_0__un1_n N_119 \ + N_167_i ipl_030_0_0__un0_n N_264 N_166_i ipl_030_0_1__un3_n DS_000_ENABLE_0_sqmuxa_1 ipl_030_0_1__un1_n N_164 N_168_i ipl_030_0_1__un0_n N_170 \ + as_030_000_sync_0_un3_n N_168 N_170_i as_030_000_sync_0_un1_n N_166 as_030_000_sync_0_un0_n N_167 N_164_i rw_000_int_0_un3_n N_165 rw_000_int_0_un1_n \ + N_162 N_102_i rw_000_int_0_un0_n N_161 N_264_i a_decode_15__n N_160 N_79_i N_157 N_78_i a_decode_14__n \ + N_26 N_119_i N_13 N_118_i a_decode_13__n N_20 N_23 N_255_i a_decode_12__n N_8 N_257_i \ + pos_clk_un9_bg_030_n cpu_est_2_0_2__n a_decode_11__n un1_amiga_bus_enable_low_i N_258_i un21_fpu_cs_i N_259_i a_decode_10__n sm_amiga_i_2__n cpu_est_2_0_1__n sm_amiga_i_1__n \ + N_262_i a_decode_9__n sm_amiga_i_3__n N_261_i sm_amiga_i_4__n pos_clk_un9_clk_000_pe_0_n a_decode_8__n sm_amiga_i_6__n N_251_i sm_amiga_i_5__n N_252_0 \ + a_decode_7__n clk_000_d_i_0__n N_76_i AS_000_INT_i N_17_i a_decode_6__n sm_amiga_i_i_7__n N_36_0 AS_030_i N_98_i a_decode_5__n \ + cpu_est_i_2__n pos_clk_un31_clk_000_ne_i_n cpu_est_i_0__n N_228_i a_decode_4__n cpu_est_i_3__n N_121_i cpu_est_i_1__n N_120_i a_decode_3__n \ + AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE \ + AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE DTACK.OE \ + RW.OE DS_030.OE DSACK1.OE CIIN.OE .names un7_as_030_i.BLIF AS_030 1 1 .names AS_030.PIN AS_030_c 1 1 -.names N_313_i.BLIF AS_030.OE +.names N_132.BLIF AS_030.OE 1 1 -.names N_133_i.BLIF AS_000 +.names N_122_i.BLIF AS_000 1 1 .names AS_000.PIN AS_000_c 1 1 @@ -235,67 +238,67 @@ 1 1 .names SIZE_0_.PIN size_c_0__n 1 1 -.names N_186_i.BLIF SIZE_0_.OE +.names N_276.BLIF SIZE_0_.OE 1 1 .names SIZE_DMA_1_.BLIF SIZE_1_ 1 1 .names SIZE_1_.PIN size_c_1__n 1 1 -.names N_186_i.BLIF SIZE_1_.OE +.names N_276.BLIF SIZE_1_.OE 1 1 .names gnd_n_n.BLIF AHIGH_24_ 1 1 .names AHIGH_24_.PIN ahigh_c_24__n 1 1 -.names N_313_i.BLIF AHIGH_24_.OE +.names un3_ahigh_i.BLIF AHIGH_24_.OE 1 1 .names gnd_n_n.BLIF AHIGH_25_ 1 1 .names AHIGH_25_.PIN ahigh_c_25__n 1 1 -.names N_313_i.BLIF AHIGH_25_.OE +.names un3_ahigh_i.BLIF AHIGH_25_.OE 1 1 .names gnd_n_n.BLIF AHIGH_26_ 1 1 .names AHIGH_26_.PIN ahigh_c_26__n 1 1 -.names N_313_i.BLIF AHIGH_26_.OE +.names un3_ahigh_i.BLIF AHIGH_26_.OE 1 1 .names gnd_n_n.BLIF AHIGH_27_ 1 1 .names AHIGH_27_.PIN ahigh_c_27__n 1 1 -.names N_313_i.BLIF AHIGH_27_.OE +.names un3_ahigh_i.BLIF AHIGH_27_.OE 1 1 .names gnd_n_n.BLIF AHIGH_28_ 1 1 .names AHIGH_28_.PIN ahigh_c_28__n 1 1 -.names N_313_i.BLIF AHIGH_28_.OE +.names un3_ahigh_i.BLIF AHIGH_28_.OE 1 1 .names gnd_n_n.BLIF AHIGH_29_ 1 1 .names AHIGH_29_.PIN ahigh_c_29__n 1 1 -.names N_313_i.BLIF AHIGH_29_.OE +.names un3_ahigh_i.BLIF AHIGH_29_.OE 1 1 .names gnd_n_n.BLIF AHIGH_30_ 1 1 .names AHIGH_30_.PIN ahigh_c_30__n 1 1 -.names N_313_i.BLIF AHIGH_30_.OE +.names un3_ahigh_i.BLIF AHIGH_30_.OE 1 1 .names gnd_n_n.BLIF AHIGH_31_ 1 1 .names AHIGH_31_.PIN ahigh_c_31__n 1 1 -.names N_313_i.BLIF AHIGH_31_.OE +.names un3_ahigh_i.BLIF AHIGH_31_.OE 1 1 .names inst_A0_DMA.BLIF A_0_ 1 1 .names A_0_.PIN a_c_0__n 1 1 -.names N_313_i.BLIF A_0_.OE +.names N_132.BLIF A_0_.OE 1 1 .names gnd_n_n.BLIF BERR 1 1 @@ -303,1357 +306,1390 @@ 1 1 .names un21_berr.BLIF BERR.OE 1 1 +.names gnd_n_n.BLIF DTACK +1 1 +.names DTACK.PIN DTACK_c +1 1 +.names AS_000_DMA_i.BLIF DTACK.OE +1 1 .names inst_RW_000_DMA.BLIF RW 1 1 .names RW.PIN RW_c 1 1 -.names un1_rw_i.BLIF RW.OE +.names N_133.BLIF RW.OE 1 1 .names un6_ds_030_i.BLIF DS_030 1 1 -.names N_313_i.BLIF DS_030.OE +.names N_132.BLIF DS_030.OE 1 1 -.names N_132_i.BLIF DSACK1 +.names N_123_i.BLIF DSACK1 1 1 .names nEXP_SPACE_c.BLIF DSACK1.OE 1 1 -.names gnd_n_n.BLIF RESET -1 1 -.names RESET_OUT_i.BLIF RESET.OE -1 1 .names un10_ciin.BLIF CIIN 1 1 -.names N_62.BLIF CIIN.OE +.names un13_ciin_i.BLIF CIIN.OE 1 1 -.names N_156_i_1.BLIF N_156_i_2.BLIF N_156_i_4 -11 1 -.names a_decode_c_19__n.BLIF a_decode_i_19__n -0 1 -.names N_156_i_4.BLIF N_156_i_3.BLIF N_156_i -11 1 -.names a_decode_c_18__n.BLIF a_decode_i_18__n -0 1 -.names CLK_OSZI_c.BLIF IPL_D0_1_.C -1 1 -.names size_c_0__n.BLIF a_c_i_0__n.BLIF pos_clk_un10_sm_amiga_i_1_n -11 1 -.names N_8_i.BLIF RST_c.BLIF N_42_0 -11 1 .names pos_clk_un10_sm_amiga_i_1_n.BLIF size_c_i_1__n.BLIF pos_clk_un10_sm_amiga_i_n 11 1 -.names N_14_i.BLIF RST_c.BLIF N_41_0 +.names N_87.BLIF sm_amiga_i_0__n.BLIF N_101 11 1 -.names BERR_c.BLIF N_352_i.BLIF N_176_i_1 -11 1 -.names N_21_i.BLIF RST_c.BLIF N_34_0 -11 1 -.names N_176_i_1.BLIF N_353_i.BLIF N_176_i -11 1 -.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un1_LDS_000_INT_0 -11 1 -.names CLK_OSZI_c.BLIF IPL_D0_2_.C +.names CYCLE_DMA_1_.BLIF G_97.X1 1 1 -.names ahigh_i_24__n.BLIF ahigh_i_25__n.BLIF un10_ciin_1 +.names AS_030_000_SYNC_i.BLIF nEXP_SPACE_c.BLIF N_85_i_1 11 1 -.names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un1_UDS_000_INT_0 -11 1 -.names ahigh_i_26__n.BLIF ahigh_i_27__n.BLIF un10_ciin_2 -11 1 -.names SM_AMIGA_6_.BLIF uds_000_int_0_un3_n -0 1 -.names ahigh_i_28__n.BLIF ahigh_i_29__n.BLIF un10_ciin_3 -11 1 -.names a_c_0__n.BLIF SM_AMIGA_6_.BLIF uds_000_int_0_un1_n -11 1 -.names ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF un10_ciin_4 -11 1 -.names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_i_7_.C -1 1 -.names a_decode_c_23__n.BLIF AS_030_D0_i.BLIF un10_ciin_5 -11 1 -.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_21 -1- 1 --1 1 -.names a_decode_c_20__n.BLIF a_decode_c_21__n.BLIF un10_ciin_6 -11 1 -.names SM_AMIGA_6_.BLIF lds_000_int_0_un3_n -0 1 -.names un10_ciin_1.BLIF un10_ciin_2.BLIF un10_ciin_7 -11 1 -.names pos_clk_un10_sm_amiga_i_n.BLIF SM_AMIGA_6_.BLIF lds_000_int_0_un1_n -11 1 -.names N_36_0.BLIF inst_RW_000_DMA.D -0 1 -.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C -1 1 -.names N_20.BLIF N_20_i -0 1 -.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF N_14 -1- 1 --1 1 -.names N_35_0.BLIF inst_A0_DMA.D -0 1 -.names pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n -0 1 -.names N_25.BLIF N_25_i -0 1 -.names BGACK_000_c.BLIF pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n -11 1 -.names N_30_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D -0 1 -.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un0_n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C -1 1 -.names N_26.BLIF N_26_i -0 1 -.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_8 -1- 1 --1 1 -.names N_29_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D -0 1 -.names N_66.BLIF ds_000_enable_0_un3_n -0 1 -.names N_27.BLIF N_27_i -0 1 -.names un1_DS_000_ENABLE_0_sqmuxa.BLIF N_66.BLIF ds_000_enable_0_un1_n -11 1 -.names N_28_0.BLIF BG_000DFFreg.D -0 1 -.names inst_DS_000_ENABLE.BLIF ds_000_enable_0_un3_n.BLIF ds_000_enable_0_un0_n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C -1 1 -.names BG_030_c.BLIF BG_030_c_i -0 1 -.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_9 -1- 1 --1 1 -.names pos_clk_un9_bg_030_0_n.BLIF pos_clk_un9_bg_030_n -0 1 -.names N_9.BLIF RST_c.BLIF inst_DS_000_ENABLE.D -11 1 -.names N_201_i.BLIF N_202_i.BLIF N_235_i_1 -11 1 -.names N_219_i.BLIF N_220_i.BLIF inst_DSACK1_INT.D -11 1 -.names N_203_i.BLIF RST_c.BLIF N_235_i_2 -11 1 -.names BGACK_000_c.BLIF N_359_i.BLIF pos_clk_un6_bgack_000_0_n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C -1 1 -.names N_235_i_1.BLIF N_235_i_2.BLIF RST_DLY_1_.D -11 1 -.names AS_000_c.BLIF N_150_i.BLIF N_359 -11 1 -.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_156_i_1 -11 1 -.names inst_DSACK1_INT.BLIF DSACK1_INT_i -0 1 -.names N_214.BLIF N_214_i -0 1 -.names AS_030_i.BLIF DSACK1_INT_i.BLIF N_132 -11 1 -.names N_310_0.BLIF N_310 -0 1 -.names AS_030_c.BLIF AS_030_i -0 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C -1 1 -.names N_24.BLIF N_24_i -0 1 -.names inst_AS_000_INT.BLIF AS_000_INT_i -0 1 -.names N_33_0.BLIF IPL_030DFF_2_reg.D -0 1 -.names AS_000_INT_i.BLIF AS_030_i.BLIF N_133 -11 1 -.names N_23.BLIF N_23_i -0 1 -.names N_150_i.BLIF SM_AMIGA_0_.BLIF N_293 -11 1 -.names N_32_0.BLIF IPL_030DFF_1_reg.D -0 1 -.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n -0 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C -1 1 -.names N_22.BLIF N_22_i -0 1 -.names N_174.BLIF sm_amiga_i_0__n.BLIF N_227 -11 1 -.names N_31_0.BLIF IPL_030DFF_0_reg.D -0 1 -.names RW_000_c.BLIF RW_000_i -0 1 -.names N_3.BLIF N_3_i -0 1 -.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF N_223 -11 1 -.names N_45_0.BLIF inst_DS_000_DMA.D -0 1 -.names N_160_i.BLIF RST_c.BLIF N_222 -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C -1 1 -.names N_4.BLIF N_4_i -0 1 -.names N_133.BLIF RST_c.BLIF N_221 -11 1 -.names N_44_0.BLIF inst_AS_000_DMA.D -0 1 -.names RST_DLY_0_.BLIF RST_DLY_1_.BLIF N_158_i -11 1 -.names N_15.BLIF N_15_i -0 1 -.names N_158_i.BLIF RST_DLY_2_.BLIF N_355 -11 1 -.names N_40_0.BLIF inst_AS_030_000_SYNC.D -0 1 -.names RST_DLY_1_.BLIF rst_dly_i_1__n -0 1 -.names CLK_OSZI_c.BLIF cpu_est_0_.C -1 1 -.names N_19.BLIF N_19_i -0 1 -.names N_82_i.BLIF rst_dly_i_1__n.BLIF N_202 -11 1 -.names N_55_0.BLIF inst_RESET_OUT.D -0 1 -.names N_154.BLIF N_158_i.BLIF N_201 -11 1 -.names N_245_0.BLIF N_245 -0 1 -.names FPU_SENSE_c.BLIF FPU_SENSE_i -0 1 -.names N_229.BLIF N_229_i -0 1 -.names AS_030_i.BLIF BGACK_000_c.BLIF un21_berr_1 -11 1 -.names CLK_OSZI_c.BLIF cpu_est_1_.C -1 1 -.names N_227.BLIF N_227_i -0 1 -.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n -0 1 -.names N_226.BLIF N_226_i -0 1 -.names N_149_i.BLIF SM_AMIGA_1_.BLIF N_174_i -11 1 -.names N_246_0.BLIF N_246 -0 1 -.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n -0 1 -.names N_332.BLIF N_332_i -0 1 -.names N_150_i.BLIF SM_AMIGA_6_.BLIF N_160_i -11 1 -.names CLK_OSZI_c.BLIF cpu_est_2_.C -1 1 -.names pos_clk_ds_000_dma_4_0_n.BLIF pos_clk_ds_000_dma_4_n -0 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_0__n -0 1 -.names N_48_0.BLIF inst_AS_030_D0.D -0 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_150_i -11 1 -.names pos_clk_rw_000_dma_3_0_n.BLIF pos_clk_rw_000_dma_3_n -0 1 -.names N_223_i.BLIF N_224_i.BLIF AMIGA_BUS_DATA_DIR_c_0 -11 1 -.names N_218.BLIF N_218_i -0 1 -.names N_221_i.BLIF N_222_i.BLIF inst_AS_000_INT.D -11 1 -.names CLK_OSZI_c.BLIF cpu_est_3_.C -1 1 -.names un10_ciin.BLIF un10_ciin_i -0 1 -.names BGACK_030_INT_i.BLIF inst_RESET_OUT.BLIF un1_rw_i -11 1 -.names N_62_0.BLIF N_62 -0 1 -.names N_215.BLIF N_215_i -0 1 -.names nEXP_SPACE_c.BLIF nEXP_SPACE_i -0 1 -.names N_216.BLIF N_216_i -0 1 -.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_172_i -11 1 -.names CLK_OSZI_c.BLIF IPL_030DFF_0_reg.C -1 1 -.names N_126_0.BLIF N_126 -0 1 -.names BGACK_030_INT_i.BLIF RST_c.BLIF N_251_i -11 1 -.names N_231_i.BLIF N_231 -0 1 -.names N_163_i.BLIF sm_amiga_i_i_7__n.BLIF N_179_0 -11 1 -.names N_291.BLIF N_291_i -0 1 -.names AS_000_DMA_i.BLIF CLK_030_c_i.BLIF N_184_0 -11 1 -.names N_288.BLIF N_288_i -0 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i -0 1 -.names CLK_OSZI_c.BLIF IPL_030DFF_1_reg.C -1 1 -.names N_287.BLIF N_287_i -0 1 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_185_i -11 1 -.names N_340.BLIF N_340_i -0 1 -.names BGACK_030_INT_i.BLIF nEXP_SPACE_i.BLIF N_186_i -11 1 -.names N_284.BLIF N_284_i -0 1 -.names N_275.BLIF N_275_i -0 1 -.names CLK_OSZI_c.BLIF IPL_030DFF_2_reg.C -1 1 -.names pos_clk_size_dma_6_0_1__n.BLIF pos_clk_size_dma_6_1__n -0 1 -.names N_268.BLIF N_268_i -0 1 -.names pos_clk_size_dma_6_0_0__n.BLIF pos_clk_size_dma_6_0__n -0 1 -.names inst_AS_030_D0.BLIF AS_030_D0_i -0 1 -.names N_265.BLIF N_265_i -0 1 -.names LDS_000_c.BLIF UDS_000_c.BLIF N_350 -11 1 -.names CLK_OSZI_c.BLIF RST_DLY_2_.C -1 1 -.names N_267.BLIF N_267_i -0 1 -.names AS_030_i.BLIF N_214_i.BLIF N_310_0 -11 1 -.names N_337.BLIF N_337_i -0 1 -.names N_215_i.BLIF N_216_i.BLIF un10_amiga_bus_enable_high_i -11 1 -.names N_338.BLIF N_338_i -0 1 -.names nEXP_SPACE_i.BLIF un10_ciin_i.BLIF N_62_0 -11 1 -.names N_204.BLIF N_204_i -0 1 -.names BGACK_030_INT_i.BLIF RW_000_i.BLIF pos_clk_rw_000_dma_3_0_n -11 1 -.names CLK_OSZI_c.BLIF CLK_000_D_0_.C -1 1 -.names N_282.BLIF N_282_i -0 1 -.names AS_030_i.BLIF RST_c.BLIF N_48_0 -11 1 -.names N_278.BLIF N_278_i -0 1 -.names N_332_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF pos_clk_ds_000_dma_4_0_n -11 1 -.names N_185_i.BLIF N_185 -0 1 -.names CLK_030_c_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF N_245_0 -11 1 -.names CLK_000_D_0_.BLIF CLK_000_D_1_.D -1 1 -.names CLK_030_c.BLIF CLK_030_c_i -0 1 -.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF un1_as_000_i -11 1 -.names N_184_0.BLIF N_184 -0 1 -.names N_337_i.BLIF N_338_i.BLIF N_55_0 -11 1 -.names CLK_OSZI_c.BLIF CLK_000_D_1_.C -1 1 -.names N_179_0.BLIF N_179 -0 1 -.names N_268_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n -11 1 -.names N_251_i.BLIF inst_BGACK_030_INT_D.D -0 1 -.names N_275_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n -11 1 -.names LDS_000_c.BLIF LDS_000_c_i -0 1 -.names N_186_i.BLIF inst_RESET_OUT.BLIF N_313_i -11 1 -.names CLK_000_D_1_.BLIF CLK_000_D_2_.D -1 1 -.names UDS_000_c.BLIF UDS_000_c_i -0 1 -.names N_185_i.BLIF RST_c.BLIF N_126_0 -11 1 -.names N_172_i.BLIF N_172 -0 1 -.names inst_RESET_OUT.BLIF RESET_OUT_i -0 1 -.names CLK_OSZI_c.BLIF CLK_000_D_2_.C -1 1 -.names pos_clk_un21_bgack_030_int_i_0_0_n.BLIF pos_clk_un21_bgack_030_int_i_0_n -0 1 -.names BGACK_030_INT_i.BLIF N_172.BLIF N_268 -11 1 -.names N_163_i.BLIF N_163 -0 1 -.names BGACK_030_INT_i.BLIF N_172_i.BLIF N_275 -11 1 -.names CLK_000_D_3_.BLIF clk_000_d_i_3__n -0 1 -.names N_150.BLIF SM_AMIGA_2_.BLIF N_278 -11 1 -.names N_350.BLIF N_350_i -0 1 -.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_282 -11 1 -.names CLK_OSZI_c.BLIF CLK_000_D_3_.C -1 1 -.names N_224.BLIF N_224_i -0 1 -.names N_163.BLIF sm_amiga_i_i_7__n.BLIF N_291 -11 1 -.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c -0 1 -.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF pos_clk_a0_dma_3_n -11 1 -.names N_150_i.BLIF N_150 -0 1 -.names a_c_1__n.BLIF a_i_1__n -0 1 -.names CLK_000_D_3_.BLIF CLK_000_D_4_.D -1 1 -.names N_156_i.BLIF N_156 -0 1 -.names a_i_1__n.BLIF BGACK_030_INT_i.BLIF N_115 -11 1 -.names N_160_i.BLIF N_160 -0 1 -.names a_c_1__n.BLIF BGACK_030_INT_i.BLIF N_114 -11 1 -.names CLK_OSZI_c.BLIF CLK_000_D_4_.C -1 1 -.names N_174_i.BLIF N_174 -0 1 -.names ipl_c_0__n.BLIF ipl_i_0__n -0 1 -.names N_158_i.BLIF N_158 -0 1 -.names ipl_i_0__n.BLIF RST_c.BLIF N_113 -11 1 -.names N_201.BLIF N_201_i -0 1 -.names ipl_c_1__n.BLIF ipl_i_1__n -0 1 -.names N_202.BLIF N_202_i -0 1 -.names ipl_i_1__n.BLIF RST_c.BLIF N_112 -11 1 -.names CLK_OSZI_c.BLIF CYCLE_DMA_0_.C -1 1 -.names N_203.BLIF N_203_i -0 1 -.names ipl_c_2__n.BLIF ipl_i_2__n -0 1 -.names N_233_0.BLIF N_233 -0 1 -.names ipl_i_2__n.BLIF RST_c.BLIF N_111 -11 1 -.names pos_clk_un1_ipl_i_0_x2.BLIF N_360_i -0 1 -.names ahigh_c_31__n.BLIF ahigh_i_31__n -0 1 -.names pos_clk_un1_ipl_i_0_x2_0.BLIF N_191_i_i -0 1 -.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n -0 1 -.names CLK_OSZI_c.BLIF CYCLE_DMA_1_.C -1 1 -.names pos_clk_un1_ipl_i_0_x2_1.BLIF N_192_i_i -0 1 -.names cycle_dma_i_0__n.BLIF N_150.BLIF N_204 -11 1 -.names N_199.BLIF N_199_i -0 1 -.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i -0 1 -.names N_21.BLIF N_21_i -0 1 -.names AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF BGACK_030_INT_i.BLIF N_215 -11 1 -.names N_34_0.BLIF inst_UDS_000_INT.D -0 1 -.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i -0 1 -.names CLK_OSZI_c.BLIF SIZE_DMA_0_.C -1 1 -.names N_14.BLIF N_14_i -0 1 -.names inst_CLK_030_H.BLIF CLK_030_H_i -0 1 -.names N_41_0.BLIF inst_LDS_000_INT.D -0 1 -.names CLK_030_H_i.BLIF N_184.BLIF N_218 -11 1 -.names N_8.BLIF N_8_i -0 1 -.names inst_AS_000_DMA.BLIF RW_000_i.BLIF N_332 -11 1 -.names N_42_0.BLIF inst_BGACK_030_INTreg.D -0 1 -.names inst_CLK_030_H.BLIF CLK_030_c.BLIF N_226 -11 1 -.names CLK_OSZI_c.BLIF SIZE_DMA_1_.C -1 1 -.names a_c_0__n.BLIF a_c_i_0__n -0 1 -.names N_179.BLIF sm_amiga_i_6__n.BLIF N_229 -11 1 -.names size_c_1__n.BLIF size_c_i_1__n -0 1 -.names inst_AS_000_DMA.BLIF AS_000_DMA_i -0 1 -.names N_359.BLIF N_359_i -0 1 -.names AS_000_c.BLIF AS_000_i -0 1 -.names pos_clk_un6_bgack_000_0_n.BLIF pos_clk_un6_bgack_000_n -0 1 -.names AS_000_DMA_i.BLIF AS_000_i.BLIF un7_as_030 -11 1 -.names CLK_OSZI_c.BLIF RST_DLY_0_.C -1 1 -.names N_220.BLIF N_220_i -0 1 -.names inst_RESET_OUT.BLIF RST_c.BLIF N_337 -11 1 -.names N_219.BLIF N_219_i -0 1 -.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D -0 1 -.names N_222.BLIF N_222_i -0 1 -.names CYCLE_DMA_0_.BLIF N_150_i.BLIF N_199 -11 1 -.names N_221.BLIF N_221_i -0 1 -.names ahigh_c_24__n.BLIF ahigh_i_24__n -0 1 -.names CLK_OSZI_c.BLIF RST_DLY_1_.C -1 1 -.names N_223.BLIF N_223_i -0 1 -.names ahigh_c_25__n.BLIF ahigh_i_25__n -0 1 -.names N_209.BLIF N_209_i -0 1 -.names ahigh_c_26__n.BLIF ahigh_i_26__n -0 1 -.names cpu_est_2_0_1__n.BLIF cpu_est_2_1__n -0 1 -.names ahigh_c_27__n.BLIF ahigh_i_27__n -0 1 -.names N_206.BLIF N_206_i -0 1 -.names ahigh_c_28__n.BLIF ahigh_i_28__n -0 1 -.names CLK_OSZI_c.BLIF inst_RW_000_INT.C -1 1 -.names N_205.BLIF N_205_i -0 1 -.names ahigh_c_29__n.BLIF ahigh_i_29__n -0 1 -.names pos_clk_un9_clk_000_pe_0_n.BLIF pos_clk_un9_clk_000_pe_n -0 1 -.names ahigh_c_30__n.BLIF ahigh_i_30__n -0 1 -.names N_18.BLIF N_18_i -0 1 -.names N_23_i.BLIF RST_c.BLIF N_32_0 -11 1 -.names N_37_0.BLIF inst_VMA_INTreg.D -0 1 -.names N_24_i.BLIF RST_c.BLIF N_33_0 -11 1 -.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C -1 1 -.names N_171_i.BLIF N_171 -0 1 -.names N_126.BLIF size_dma_0_0__un3_n -0 1 -.names N_354.BLIF N_354_i -0 1 -.names pos_clk_size_dma_6_0__n.BLIF N_126.BLIF size_dma_0_0__un1_n -11 1 -.names un1_DS_000_ENABLE_0_sqmuxa_0.BLIF un1_DS_000_ENABLE_0_sqmuxa -0 1 -.names SIZE_DMA_0_.BLIF size_dma_0_0__un3_n.BLIF size_dma_0_0__un0_n -11 1 -.names N_66_0.BLIF N_66 -0 1 -.names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D -1- 1 --1 1 -.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C -1 1 -.names inst_UDS_000_INT.BLIF UDS_000_INT_i -0 1 -.names N_126.BLIF size_dma_0_1__un3_n -0 1 -.names un1_UDS_000_INT_0.BLIF un1_UDS_000_INT -0 1 -.names pos_clk_size_dma_6_1__n.BLIF N_126.BLIF size_dma_0_1__un1_n -11 1 -.names inst_LDS_000_INT.BLIF LDS_000_INT_i -0 1 -.names SIZE_DMA_1_.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un0_n -11 1 -.names un1_LDS_000_INT_0.BLIF un1_LDS_000_INT -0 1 -.names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D -1- 1 --1 1 -.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C -1 1 -.names A_DECODE_16_.BLIF a_decode_c_16__n -1 1 -.names N_196.BLIF N_196_i -0 1 -.names N_233.BLIF ipl_030_0_0__un3_n -0 1 -.names A_DECODE_17_.BLIF a_decode_c_17__n -1 1 -.names N_183_0.BLIF N_183 -0 1 -.names IPL_030DFF_0_reg.BLIF N_233.BLIF ipl_030_0_0__un1_n -11 1 -.names A_DECODE_18_.BLIF a_decode_c_18__n -1 1 -.names N_182_0.BLIF N_182 -0 1 -.names ipl_c_0__n.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n -11 1 -.names A_DECODE_19_.BLIF a_decode_c_19__n -1 1 -.names N_180_0.BLIF N_180 -0 1 -.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_22 -1- 1 --1 1 -.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C -1 1 -.names A_DECODE_20_.BLIF a_decode_c_20__n -1 1 -.names N_178_0.BLIF N_178 -0 1 -.names N_233.BLIF ipl_030_0_1__un3_n -0 1 -.names A_DECODE_21_.BLIF a_decode_c_21__n -1 1 -.names N_315_i.BLIF N_315 -0 1 -.names IPL_030DFF_1_reg.BLIF N_233.BLIF ipl_030_0_1__un1_n -11 1 -.names A_DECODE_22_.BLIF a_decode_c_22__n -1 1 -.names N_351.BLIF N_351_i -0 1 -.names ipl_c_1__n.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n -11 1 -.names A_DECODE_23_.BLIF a_decode_c_23__n -1 1 -.names N_154_0.BLIF N_154 -0 1 -.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF N_23 -1- 1 --1 1 -.names CLK_OSZI_c.BLIF inst_DS_000_DMA.C -1 1 -.names N_149_i.BLIF N_149 -0 1 -.names N_233.BLIF ipl_030_0_2__un3_n -0 1 -.names A_1_.BLIF a_c_1__n -1 1 -.names N_228.BLIF N_228_i -0 1 -.names IPL_030DFF_2_reg.BLIF N_233.BLIF ipl_030_0_2__un1_n -11 1 -.names nEXP_SPACE.BLIF nEXP_SPACE_c -1 1 -.names N_213.BLIF N_213_i -0 1 -.names ipl_c_2__n.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n -11 1 -.names N_212.BLIF N_212_i -0 1 -.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_24 -1- 1 --1 1 -.names CLK_OSZI_c.BLIF inst_DSACK1_INT.C -1 1 -.names BG_030.BLIF BG_030_c -1 1 -.names N_357.BLIF N_357_i -0 1 -.names N_113.BLIF IPL_D0_0_.D -0 1 -.names BG_000DFFreg.BLIF BG_000 -1 1 -.names cpu_est_2_0_2__n.BLIF cpu_est_2_2__n -0 1 -.names N_112.BLIF IPL_D0_1_.D -0 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030 -1 1 -.names N_208.BLIF N_208_i -0 1 -.names N_111.BLIF IPL_D0_2_.D -0 1 -.names BGACK_000.BLIF BGACK_000_c -1 1 -.names N_210.BLIF N_210_i -0 1 -.names N_185.BLIF a0_dma_0_un3_n -0 1 -.names CLK_OSZI_c.BLIF inst_AS_000_INT.C -1 1 -.names CLK_030.BLIF CLK_030_c -1 1 -.names N_211.BLIF N_211_i -0 1 -.names pos_clk_a0_dma_3_n.BLIF N_185.BLIF a0_dma_0_un1_n -11 1 -.names CLK_000.BLIF CLK_000_D_0_.D -1 1 -.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 -0 1 -.names inst_A0_DMA.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n -11 1 -.names CLK_OSZI.BLIF CLK_OSZI_c -1 1 -.names RW_c.BLIF RW_c_i -0 1 -.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF N_20 -1- 1 --1 1 -.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT -1 1 -.names N_311_0.BLIF N_311 -0 1 -.names N_114.BLIF N_114_i -0 1 -.names CLK_OSZI_c.BLIF inst_AS_030_D0.C -1 1 -.names CLK_OUT_INTreg.BLIF CLK_EXP -1 1 -.names N_336.BLIF N_336_i -0 1 -.names N_185.BLIF amiga_bus_enable_dma_low_0_un3_n -0 1 -.names un21_fpu_cs_i.BLIF FPU_CS -1 1 -.names N_244.BLIF N_244_i -0 1 -.names N_114_i.BLIF N_185.BLIF amiga_bus_enable_dma_low_0_un1_n -11 1 -.names FPU_SENSE.BLIF FPU_SENSE_c -1 1 -.names N_314_0.BLIF N_314 -0 1 -.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF amiga_bus_enable_dma_low_0_un0_n -11 1 -.names IPL_030DFF_0_reg.BLIF IPL_030_0_ -1 1 .names inst_VMA_INTreg.BLIF VMA_INT_i 0 1 -.names amiga_bus_enable_dma_low_0_un1_n.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF N_25 -1- 1 --1 1 -.names CLK_OSZI_c.BLIF inst_VPA_D.C +.names CLK_000_D_4_.BLIF clk_000_d_i_3__n.BLIF N_85_i_2 +11 1 +.names BERR_c.BLIF N_98_i.BLIF pos_clk_un31_clk_000_ne_i_n +11 1 +.names N_199.BLIF G_97.X2 1 1 -.names IPL_030DFF_1_reg.BLIF IPL_030_1_ -1 1 -.names N_352.BLIF N_352_i -0 1 -.names N_115.BLIF N_115_i -0 1 -.names IPL_030DFF_2_reg.BLIF IPL_030_2_ -1 1 -.names N_353.BLIF N_353_i -0 1 -.names N_185.BLIF amiga_bus_enable_dma_high_0_un3_n -0 1 -.names IPL_0_.BLIF ipl_c_0__n -1 1 -.names N_293.BLIF N_293_i -0 1 -.names N_115_i.BLIF N_185.BLIF amiga_bus_enable_dma_high_0_un1_n -11 1 -.names IPL_1_.BLIF ipl_c_1__n -1 1 -.names N_176_i.BLIF N_176 -0 1 -.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF amiga_bus_enable_dma_high_0_un0_n -11 1 -.names CLK_OSZI_c.BLIF inst_DTACK_D0.C -1 1 -.names IPL_2_.BLIF ipl_c_2__n -1 1 -.names N_198.BLIF N_198_i -0 1 -.names amiga_bus_enable_dma_high_0_un1_n.BLIF amiga_bus_enable_dma_high_0_un0_n.BLIF N_26 -1- 1 --1 1 -.names N_197.BLIF N_197_i -0 1 -.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n -0 1 -.names DTACK.BLIF DTACK_c -1 1 -.names N_16.BLIF N_16_i -0 1 -.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n -11 1 -.names vcc_n_n.BLIF AVEC -1 1 -.names N_39_0.BLIF inst_RW_000_INT.D -0 1 -.names BG_000DFFreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n -11 1 -.names CLK_OSZI_c.BLIF inst_CLK_030_H.C -1 1 -.names N_309_i.BLIF E -1 1 -.names VPA_c.BLIF VPA_c_i -0 1 -.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF N_27 -1- 1 --1 1 -.names VPA.BLIF VPA_c -1 1 -.names N_52_0.BLIF inst_VPA_D.D -0 1 -.names N_27_i.BLIF RST_c.BLIF N_28_0 -11 1 -.names inst_VMA_INTreg.BLIF VMA -1 1 -.names DTACK_c.BLIF DTACK_c_i -0 1 -.names N_26_i.BLIF RST_c.BLIF N_29_0 -11 1 -.names RST.BLIF RST_c -1 1 -.names N_53_0.BLIF inst_DTACK_D0.D -0 1 -.names N_25_i.BLIF RST_c.BLIF N_30_0 -11 1 -.names CLK_OSZI_c.BLIF inst_RESET_OUT.C -1 1 -.names cpu_est_2_.BLIF cpu_est_i_2__n -0 1 -.names N_20_i.BLIF RST_c.BLIF N_35_0 -11 1 -.names N_314.BLIF cpu_est_i_2__n.BLIF N_211 -11 1 -.names N_19_i.BLIF RST_c.BLIF N_36_0 -11 1 -.names FC_0_.BLIF fc_c_0__n -1 1 -.names N_149.BLIF cpu_est_0_3__un3_n -0 1 -.names N_15_i.BLIF RST_c.BLIF N_40_0 -11 1 -.names FC_1_.BLIF fc_c_1__n -1 1 -.names cpu_est_3_.BLIF N_149.BLIF cpu_est_0_3__un1_n -11 1 -.names N_4_i.BLIF RST_c.BLIF N_44_0 -11 1 -.names CLK_OSZI_c.BLIF inst_DS_000_ENABLE.C -1 1 -.names gnd_n_n.BLIF AMIGA_ADDR_ENABLE -1 1 -.names N_189_i.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n -11 1 -.names N_3_i.BLIF RST_c.BLIF N_45_0 -11 1 -.names AMIGA_BUS_DATA_DIR_c.BLIF AMIGA_BUS_DATA_DIR -1 1 -.names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_.D -1- 1 --1 1 -.names N_22_i.BLIF RST_c.BLIF N_31_0 -11 1 -.names un1_amiga_bus_enable_low_i.BLIF AMIGA_BUS_ENABLE_LOW -1 1 -.names DTACK_c_i.BLIF RST_c.BLIF N_53_0 -11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i -0 1 -.names un10_amiga_bus_enable_high_i.BLIF AMIGA_BUS_ENABLE_HIGH -1 1 -.names RST_c.BLIF VPA_c_i.BLIF N_52_0 -11 1 -.names AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF BGACK_030_INT_i.BLIF un1_amiga_bus_enable_low -11 1 -.names CLK_OSZI_c.BLIF BG_000DFFreg.C -1 1 -.names N_16_i.BLIF RST_c.BLIF N_39_0 -11 1 -.names BG_030_c_i.BLIF N_231.BLIF pos_clk_un9_bg_030_0_n -11 1 -.names N_196_1.BLIF rst_dly_i_2__n.BLIF N_196 -11 1 -.names un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un3_n -0 1 -.names un7_as_030.BLIF un7_as_030_i -0 1 -.names N_218_i.BLIF RST_c.BLIF N_249_i_1 -11 1 -.names N_311.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un1_n -11 1 -.names N_133.BLIF N_133_i -0 1 -.names N_249_i_1.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF inst_CLK_030_H.D -11 1 -.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n -11 1 -.names N_132.BLIF N_132_i -0 1 -.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.C -1 1 -.names AS_000_i.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF N_57_i_1 -11 1 -.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_16 -1- 1 --1 1 -.names inst_DS_000_DMA.BLIF DS_000_DMA_i -0 1 -.names N_57_i_1.BLIF N_251_i.BLIF CYCLE_DMA_1_.D -11 1 -.names un1_amiga_bus_enable_low.BLIF un1_amiga_bus_enable_low_i -0 1 -.names AS_000_i.BLIF DS_000_DMA_i.BLIF un6_ds_030 -11 1 -.names N_149_i.BLIF N_355.BLIF N_338_1 -11 1 -.names un21_fpu_cs.BLIF un21_fpu_cs_i -0 1 -.names un6_ds_030.BLIF un6_ds_030_i -0 1 -.names N_338_1.BLIF RST_c.BLIF N_338 -11 1 -.names SM_AMIGA_i_7_.BLIF sm_amiga_i_i_7__n -0 1 -.names N_246.BLIF ds_000_dma_0_un3_n -0 1 -.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.C -1 1 -.names AS_000_i.BLIF N_186_i.BLIF N_224_1 -11 1 -.names N_293_i.BLIF SM_AMIGA_i_7_.BLIF N_175_i -11 1 -.names pos_clk_ds_000_dma_4_n.BLIF N_246.BLIF ds_000_dma_0_un1_n -11 1 -.names N_224_1.BLIF RW_000_c.BLIF N_224 -11 1 -.names cpu_est_i_1__n.BLIF cpu_est_i_2__n.BLIF N_159_i -11 1 -.names inst_DS_000_DMA.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n -11 1 -.names inst_BGACK_030_INTreg.BLIF AS_030_000_SYNC_i.BLIF N_216_1 -11 1 -.names cpu_est_3_.BLIF cpu_est_i_3__n -0 1 -.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF N_3 -1- 1 --1 1 -.names N_216_1.BLIF AS_030_i.BLIF N_216 -11 1 -.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF N_314_0 -11 1 -.names N_245.BLIF as_000_dma_0_un3_n -0 1 -.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C -1 1 -.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_209_1 -11 1 -.names N_244_i.BLIF N_336_i.BLIF cpu_est_0_.D -11 1 -.names pos_clk_un21_bgack_030_int_i_0_n.BLIF N_245.BLIF as_000_dma_0_un1_n -11 1 -.names N_209_1.BLIF cpu_est_i_3__n.BLIF N_209 -11 1 -.names N_175_i.BLIF RW_c_i.BLIF N_311_0 -11 1 -.names inst_AS_000_DMA.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n -11 1 -.names N_207_i.BLIF rst_dly_i_0__n.BLIF N_203_1 -11 1 -.names N_160.BLIF N_175_i.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 -11 1 -.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF N_4 -1- 1 --1 1 -.names N_203_1.BLIF rst_dly_i_1__n.BLIF N_203 -11 1 -.names N_210_i.BLIF N_211_i.BLIF N_189_i -11 1 -.names N_310.BLIF as_030_000_sync_0_un3_n -0 1 -.names CLK_OSZI_c.BLIF inst_A0_DMA.C -1 1 -.names N_158.BLIF N_207_i.BLIF N_196_1 -11 1 -.names inst_DTACK_D0.BLIF DTACK_D0_i -0 1 -.names AS_030_c.BLIF N_310.BLIF as_030_000_sync_0_un1_n -11 1 -.names N_152_i_1.BLIF RST_c.BLIF SM_AMIGA_i_7_.D -11 1 -.names DTACK_D0_i.BLIF inst_VPA_D.BLIF N_353 -11 1 -.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n -11 1 -.names N_150.BLIF N_288_i.BLIF N_144_i_1 -11 1 -.names inst_VPA_D.BLIF VPA_D_i -0 1 -.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_15 -1- 1 --1 1 -.names N_144_i_1.BLIF RST_c.BLIF SM_AMIGA_4_.D -11 1 -.names N_149_i.BLIF cpu_est_0_.BLIF N_244 -11 1 -.names N_185.BLIF rw_000_dma_0_un3_n -0 1 -.names CLK_OSZI_c.BLIF inst_RW_000_DMA.C -1 1 -.names N_287_i.BLIF N_340_i.BLIF N_142_i_1 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_0__n -0 1 -.names pos_clk_rw_000_dma_3_n.BLIF N_185.BLIF rw_000_dma_0_un1_n -11 1 -.names N_142_i_1.BLIF RST_c.BLIF SM_AMIGA_3_.D -11 1 -.names N_149.BLIF cpu_est_i_0__n.BLIF N_336 -11 1 -.names inst_RW_000_DMA.BLIF rw_000_dma_0_un3_n.BLIF rw_000_dma_0_un0_n -11 1 -.names N_150.BLIF N_284_i.BLIF N_312_i_1 -11 1 -.names N_210_i.BLIF N_357_i.BLIF cpu_est_2_0_2__n -11 1 -.names rw_000_dma_0_un1_n.BLIF rw_000_dma_0_un0_n.BLIF N_19 -1- 1 --1 1 -.names N_312_i_1.BLIF RST_c.BLIF SM_AMIGA_2_.D -11 1 -.names N_212_i.BLIF N_213_i.BLIF N_309_i -11 1 -.names vcc_n_n -1 -.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C -1 1 -.names N_265_i.BLIF N_267_i.BLIF N_236_i_1 -11 1 -.names N_82_i.BLIF N_228_i.BLIF SM_AMIGA_5_.D -11 1 -.names gnd_n_n -.names N_236_i_1.BLIF RST_c.BLIF RST_DLY_0_.D -11 1 -.names N_355_i_0.BLIF RST_c.BLIF N_207_i -11 1 -.names A_DECODE_15_.BLIF a_decode_15__n -1 1 -.names N_160.BLIF N_229_i.BLIF N_148_i_1 -11 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_1__n -0 1 -.names A_DECODE_14_.BLIF a_decode_14__n -1 1 -.names N_148_i_1.BLIF RST_c.BLIF SM_AMIGA_6_.D -11 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_149_i -11 1 -.names A_DECODE_13_.BLIF a_decode_13__n -1 1 -.names CLK_OSZI_c.BLIF inst_BGACK_030_INT_D.C -1 1 -.names N_150.BLIF N_227_i.BLIF N_136_i_1 -11 1 -.names N_351_i.BLIF RST_c.BLIF N_154_0 -11 1 -.names A_DECODE_12_.BLIF a_decode_12__n -1 1 -.names N_136_i_1.BLIF RST_c.BLIF SM_AMIGA_0_.D -11 1 -.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_315_i -11 1 -.names A_DECODE_11_.BLIF a_decode_11__n -1 1 -.names N_226_i.BLIF RW_000_i.BLIF N_246_0_1 -11 1 -.names N_149.BLIF RST_c.BLIF N_82_i -11 1 -.names A_DECODE_10_.BLIF a_decode_10__n -1 1 -.names N_246_0_1.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF N_246_0 -11 1 -.names cpu_est_1_.BLIF cpu_est_i_1__n -0 1 -.names A_DECODE_9_.BLIF a_decode_9__n -1 1 -.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C -1 1 -.names N_196_i.BLIF N_197_i.BLIF N_234_i_1 -11 1 -.names cpu_est_1_.BLIF cpu_est_i_3__n.BLIF N_178_0 -11 1 -.names A_DECODE_8_.BLIF a_decode_8__n -1 1 -.names N_198_i.BLIF RST_c.BLIF N_234_i_2 -11 1 -.names cpu_est_3_.BLIF cpu_est_i_1__n.BLIF N_180_0 -11 1 -.names A_DECODE_7_.BLIF a_decode_7__n -1 1 -.names N_234_i_1.BLIF N_234_i_2.BLIF RST_DLY_2_.D -11 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n -0 1 -.names A_DECODE_6_.BLIF a_decode_6__n -1 1 -.names N_149_i.BLIF N_357.BLIF N_206_1 -11 1 -.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n -0 1 -.names A_DECODE_5_.BLIF a_decode_5__n -1 1 -.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_50.C -1 1 -.names VPA_D_i.BLIF cpu_est_i_3__n.BLIF N_206_2 -11 1 -.names N_149_i.BLIF SM_AMIGA_5_.BLIF N_183_0 -11 1 -.names A_DECODE_4_.BLIF a_decode_4__n -1 1 -.names N_206_1.BLIF N_206_2.BLIF N_206 -11 1 -.names N_178.BLIF cpu_est_2_.BLIF N_213 -11 1 -.names A_DECODE_3_.BLIF a_decode_3__n -1 1 -.names N_150_i.BLIF N_159_i.BLIF N_205_1 -11 1 -.names N_160.BLIF sm_amiga_i_5__n.BLIF N_228 -11 1 -.names A_DECODE_2_.BLIF a_decode_2__n -1 1 -.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_D.D -1 1 -.names cpu_est_i_0__n.BLIF cpu_est_i_3__n.BLIF N_205_2 -11 1 -.names N_154.BLIF RST_DLY_0_.BLIF N_265 -11 1 -.names N_205_1.BLIF N_205_2.BLIF N_205 -11 1 -.names RST_DLY_0_.BLIF rst_dly_i_0__n -0 1 -.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_D.C -1 1 -.names N_159_i.BLIF N_314_0.BLIF N_352_1 -11 1 -.names N_82_i.BLIF rst_dly_i_0__n.BLIF N_267 -11 1 -.names VMA_INT_i.BLIF VPA_D_i.BLIF N_352_2 -11 1 -.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n -0 1 -.names N_352_1.BLIF N_352_2.BLIF N_352 -11 1 -.names N_182.BLIF sm_amiga_i_2__n.BLIF N_284 -11 1 -.names CYCLE_DMA_0_.BLIF pos_clk_un21_bgack_030_int_i_0_o3_0_x2.X1 -1 1 -.names inst_AS_030_D0.BLIF CLK_000_D_0_.BLIF N_231_i_1 -11 1 -.names N_149_i.BLIF N_176.BLIF N_340 -11 1 -.names N_231_i_1.BLIF nEXP_SPACE_c.BLIF N_231_i -11 1 -.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n -0 1 -.names CYCLE_DMA_1_.BLIF pos_clk_un21_bgack_030_int_i_0_o3_0_x2.X2 -1 1 -.names N_291_i.BLIF N_293_i.BLIF N_152_i_1 -11 1 -.names N_183.BLIF sm_amiga_i_4__n.BLIF N_288 -11 1 -.names N_204_i.BLIF N_251_i.BLIF N_59_i_2 -11 1 -.names N_355.BLIF N_355_i_0 -0 1 -.names N_59_i_1.BLIF N_59_i_2.BLIF CYCLE_DMA_0_.D -11 1 -.names N_149_i.BLIF N_355_i_0.BLIF N_351 -11 1 -.names IPL_D0_0_.BLIF pos_clk_un1_ipl_i_0_x2.X1 -1 1 -.names N_150_i.BLIF N_191_i_i.BLIF N_233_0_1 -11 1 -.names N_315_i.BLIF cpu_est_i_2__n.BLIF N_357 -11 1 -.names N_192_i_i.BLIF N_360_i.BLIF N_233_0_2 -11 1 -.names N_205_i.BLIF N_206_i.BLIF pos_clk_un9_clk_000_pe_0_n -11 1 -.names ipl_c_0__n.BLIF pos_clk_un1_ipl_i_0_x2.X2 -1 1 -.names N_233_0_1.BLIF N_233_0_2.BLIF N_233_0 -11 1 -.names N_208_i.BLIF N_209_i.BLIF cpu_est_2_0_1__n -11 1 -.names AS_030_D0_i.BLIF N_156.BLIF N_214_1 -11 1 -.names N_171.BLIF sm_amiga_i_3__n.BLIF N_287 -11 1 -.names N_185_i.BLIF sm_amiga_i_i_7__n.BLIF N_214_2 -11 1 -.names N_160_i.BLIF RW_c.BLIF N_354 -11 1 -.names IPL_D0_1_.BLIF pos_clk_un1_ipl_i_0_x2_0.X1 -1 1 -.names N_214_1.BLIF N_214_2.BLIF N_214_3 -11 1 -.names AS_030_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_0.BLIF N_66_0 -11 1 -.names N_214_3.BLIF nEXP_SPACE_c.BLIF N_214 -11 1 -.names N_171.BLIF N_354_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_0 -11 1 -.names ipl_c_1__n.BLIF pos_clk_un1_ipl_i_0_x2_0.X2 -1 1 -.names un21_berr_1.BLIF FPU_SENSE_i.BLIF un21_fpu_cs_1 -11 1 -.names N_150_i.BLIF SM_AMIGA_4_.BLIF N_171_i -11 1 -.names un21_fpu_cs_1.BLIF N_156_i.BLIF un21_fpu_cs +.names N_85_i_1.BLIF N_85_i_2.BLIF N_85_i 11 1 .names pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un3_n 0 1 -.names un21_berr_1.BLIF FPU_SENSE_c.BLIF un21_berr_1_0 +.names AS_030_i.BLIF a_decode_c_17__n.BLIF N_277_1 11 1 .names cpu_est_i_1__n.BLIF pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un1_n 11 1 -.names IPL_D0_2_.BLIF pos_clk_un1_ipl_i_0_x2_1.X1 -1 1 -.names un21_berr_1_0.BLIF N_156_i.BLIF un21_berr +.names a_decode_i_16__n.BLIF a_decode_i_18__n.BLIF N_277_2 11 1 .names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n 11 1 -.names N_149_i.BLIF N_176.BLIF N_182_0_1 +.names IPL_D0_0_.BLIF G_122.X1 +1 1 +.names fc_c_1__n.BLIF a_decode_i_19__n.BLIF N_277_3 11 1 -.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_18 +.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_17 1- 1 -1 1 -.names ipl_c_2__n.BLIF pos_clk_un1_ipl_i_0_x2_1.X2 +.names N_277_1.BLIF N_277_2.BLIF N_277_4 +11 1 +.names N_17_i.BLIF RST_c.BLIF N_36_0 +11 1 +.names ipl_c_0__n.BLIF G_122.X2 1 1 -.names N_182_0_1.BLIF SM_AMIGA_3_.BLIF N_182_0 +.names N_277_3.BLIF fc_c_0__n.BLIF N_277_5 11 1 -.names N_18_i.BLIF RST_c.BLIF N_37_0 -11 1 -.names un10_ciin_3.BLIF un10_ciin_4.BLIF un10_ciin_8 -11 1 -.names N_149.BLIF cpu_est_0_1__un3_n +.names N_76.BLIF cpu_est_0_1__un3_n 0 1 -.names un10_ciin_5.BLIF un10_ciin_6.BLIF un10_ciin_9 +.names N_38_0.BLIF inst_RW_000_INT.D +0 1 +.names cpu_est_1_.BLIF N_76.BLIF cpu_est_0_1__un1_n 11 1 -.names cpu_est_1_.BLIF N_149.BLIF cpu_est_0_1__un1_n -11 1 -.names CYCLE_DMA_1_.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.X1 +.names CLK_OSZI_c.BLIF SM_AMIGA_i_7_.C 1 1 -.names un10_ciin_7.BLIF un10_ciin_8.BLIF un10_ciin_10 +.names inst_BGACK_030_INT_D.BLIF inst_BGACK_030_INTreg.BLIF N_91_0_1 11 1 .names cpu_est_2_1__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n 11 1 -.names un10_ciin_9.BLIF a_decode_c_22__n.BLIF un10_ciin_11 +.names IPL_D0_1_.BLIF G_123.X1 +1 1 +.names AS_030_D0_i.BLIF sm_amiga_i_i_7__n.BLIF N_91_0_2 11 1 .names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D 1- 1 -1 1 -.names N_199.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.X2 -1 1 -.names un10_ciin_10.BLIF un10_ciin_11.BLIF un10_ciin +.names N_91_0_1.BLIF N_91_0_2.BLIF N_91_0_3 11 1 -.names N_149.BLIF cpu_est_0_2__un3_n +.names N_76.BLIF cpu_est_0_2__un3_n 0 1 -.names AS_030_000_SYNC_i.BLIF CLK_000_D_4_.BLIF N_163_i_1 +.names ipl_c_1__n.BLIF G_123.X2 +1 1 +.names N_91_0_3.BLIF nEXP_SPACE_c.BLIF N_91_0 11 1 -.names cpu_est_2_.BLIF N_149.BLIF cpu_est_0_2__un1_n +.names cpu_est_2_.BLIF N_76.BLIF cpu_est_0_2__un1_n 11 1 -.names clk_000_d_i_3__n.BLIF nEXP_SPACE_c.BLIF N_163_i_2 +.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C +1 1 +.names N_108_i.BLIF N_109_i.BLIF N_265_i_1 11 1 .names cpu_est_2_2__n.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n 11 1 -.names CLK_000_D_2_.BLIF CLK_000_D_3_.D -1 1 -.names N_163_i_1.BLIF N_163_i_2.BLIF N_163_i +.names N_265_i_1.BLIF N_265_2_0.BLIF RST_DLY_2_.D 11 1 .names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D 1- 1 -1 1 +.names IPL_D0_2_.BLIF G_124.X1 +1 1 +.names N_112_i.BLIF RST_c.BLIF N_266_i_1 +11 1 +.names N_76.BLIF cpu_est_0_3__un3_n +0 1 +.names N_113_i.BLIF N_114_i.BLIF N_266_i_2 +11 1 +.names cpu_est_3_.BLIF N_76.BLIF cpu_est_0_3__un1_n +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C +1 1 +.names ipl_c_2__n.BLIF G_124.X2 +1 1 +.names N_266_i_1.BLIF N_266_i_2.BLIF RST_DLY_1_.D +11 1 +.names N_189_i.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n +11 1 +.names N_164_i.BLIF N_264.BLIF N_138_i_1 +11 1 +.names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_.D +1- 1 +-1 1 +.names N_138_i_1.BLIF RST_c.BLIF SM_AMIGA_1_.D +11 1 +.names RST_DLY_0_.BLIF RST_DLY_1_.BLIF N_77_i +11 1 +.names N_76.BLIF cpu_est_0_0_.X1 +1 1 +.names N_79.BLIF N_170_i.BLIF N_148_i_1 +11 1 +.names N_134_i.BLIF RST_c.BLIF N_270_0 +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C +1 1 +.names N_148_i_1.BLIF RST_c.BLIF SM_AMIGA_6_.D +11 1 +.names N_124_i.BLIF N_125_i.BLIF N_53_0 +11 1 +.names cpu_est_0_.BLIF cpu_est_0_0_.X2 +1 1 +.names N_78.BLIF N_168_i.BLIF N_144_i_1 +11 1 +.names N_120_i.BLIF N_121_i.BLIF inst_DSACK1_INT.D +11 1 +.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 +0 1 +.names N_137_i_0.BLIF RST_c.BLIF N_228_i +11 1 +.names RW_c.BLIF RW_c_i +0 1 +.names AS_030_i.BLIF RST_c.BLIF N_274 +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C +1 1 +.names CLK_000_D_2_.BLIF CLK_000_D_3_.D +1 1 +.names pos_clk_rw_000_int_5_0_n.BLIF pos_clk_rw_000_int_5_n +0 1 +.names N_77_i.BLIF RST_DLY_2_.BLIF N_137 +11 1 +.names CLK_000_D_3_.BLIF clk_000_d_i_3__n +0 1 +.names N_137.BLIF N_137_i_0 +0 1 +.names N_25.BLIF N_25_i +0 1 +.names N_76_i.BLIF N_137_i_0.BLIF N_134 +11 1 +.names N_28_0.BLIF IPL_030DFF_1_reg.D +0 1 +.names inst_RESET_OUT.BLIF RST_c.BLIF N_124 +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C +1 1 +.names N_24.BLIF N_24_i +0 1 +.names N_87_i.BLIF RST_c.BLIF N_121 +11 1 +.names N_27_0.BLIF IPL_030DFF_0_reg.D +0 1 +.names inst_DSACK1_INT.BLIF DSACK1_INT_i +0 1 +.names ipl_c_1__n.BLIF ipl_c_i_1__n +0 1 +.names DSACK1_INT_i.BLIF N_274.BLIF N_120 +11 1 +.names N_50_0.BLIF IPL_D0_1_.D +0 1 +.names RST_DLY_0_.BLIF rst_dly_i_0__n +0 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C +1 1 +.names ipl_c_0__n.BLIF ipl_c_i_0__n +0 1 +.names N_270.BLIF RST_DLY_0_.BLIF N_115 +11 1 +.names N_49_0.BLIF IPL_D0_0_.D +0 1 +.names BGACK_000_c.BLIF pos_clk_un4_bgack_000_i_n.BLIF pos_clk_un6_bgack_000_0_n +11 1 +.names N_14.BLIF N_14_i +0 1 +.names AS_000_c.BLIF N_76_i.BLIF pos_clk_un4_bgack_000_n +11 1 +.names N_39_0.BLIF inst_AS_030_000_SYNC.D +0 1 +.names N_276.BLIF RESET_c.BLIF un3_ahigh_i +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C +1 1 +.names N_15.BLIF N_15_i +0 1 +.names DTACK_c_i.BLIF RST_c.BLIF N_48_0 +11 1 +.names N_16.BLIF N_16_i +0 1 +.names RST_c.BLIF VPA_c_i.BLIF N_52_0 +11 1 +.names N_254.BLIF N_254_i +0 1 +.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF un1_as_000_i +11 1 +.names N_263.BLIF N_263_i +0 1 +.names nEXP_SPACE_c.BLIF nEXP_SPACE_i +0 1 +.names CLK_OSZI_c.BLIF cpu_est_2_.C +1 1 +.names N_256.BLIF N_256_i +0 1 +.names BGACK_030_INT_i.BLIF nEXP_SPACE_i.BLIF N_276 +11 1 +.names N_101.BLIF N_101_i +0 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +0 1 +.names N_103.BLIF N_103_i +0 1 +.names BGACK_030_INT_i.BLIF inst_RESET_OUT.BLIF N_133 +11 1 +.names N_104.BLIF N_104_i +0 1 +.names N_276.BLIF inst_RESET_OUT.BLIF N_132 +11 1 +.names CLK_OSZI_c.BLIF cpu_est_3_.C +1 1 +.names N_105.BLIF N_105_i +0 1 +.names N_111_i.BLIF RST_c.BLIF N_265_2_0 +11 1 +.names N_115.BLIF N_115_i +0 1 +.names inst_DTACK_D0.BLIF DTACK_D0_i +0 1 +.names N_116.BLIF N_116_i +0 1 +.names inst_VPA_D.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un3_n +0 1 +.names N_131.BLIF N_131_i +0 1 +.names DTACK_D0_i.BLIF inst_VPA_D.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un1_n +11 1 +.names CLK_OSZI_c.BLIF IPL_030DFF_0_reg.C +1 1 +.names N_277.BLIF N_277_i +0 1 +.names pos_clk_un29_clk_000_ne_1_n.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un3_n.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un0_n +11 1 +.names N_64_0.BLIF N_64 +0 1 +.names pos_clk_un31_clk_000_ne_1_i_m2_un1_n.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un0_n.BLIF N_98 +1- 1 +-1 1 +.names N_91_0.BLIF N_91 +0 1 +.names N_76_i.BLIF SM_AMIGA_1_.BLIF N_87_i +11 1 +.names N_85_i.BLIF N_85 +0 1 +.names G_103.BLIF un1_rst_3.BLIF CLK_030_PE_1_.D +11 1 +.names CLK_OSZI_c.BLIF IPL_030DFF_1_reg.C +1 1 +.names pos_clk_un5_bgack_030_int_d_i_n.BLIF pos_clk_un5_bgack_030_int_d_n +0 1 +.names BGACK_030_INT_i.BLIF RST_c.BLIF un1_rst_2_1 +11 1 +.names pos_clk_amiga_bus_enable_dma_high_3_0_n.BLIF pos_clk_amiga_bus_enable_dma_high_3_n +0 1 +.names AS_000_i.BLIF un1_rst_2_1.BLIF un1_rst_2 +11 1 +.names pos_clk_amiga_bus_enable_dma_low_3_0_n.BLIF pos_clk_amiga_bus_enable_dma_low_3_n +0 1 +.names inst_AMIGA_DS.BLIF AMIGA_DS_i +0 1 +.names pos_clk_rw_000_dma_3_0_n.BLIF pos_clk_rw_000_dma_3_n +0 1 +.names AS_000_c.BLIF AS_000_i +0 1 +.names CLK_OSZI_c.BLIF IPL_030DFF_2_reg.C +1 1 +.names UDS_000_c.BLIF UDS_000_c_i +0 1 +.names pos_clk_un4_rw_000_n.BLIF pos_clk_un4_rw_000_i_n +0 1 +.names LDS_000_c.BLIF LDS_000_c_i +0 1 +.names DS_000_DMA_0_sqmuxa.BLIF DS_000_DMA_0_sqmuxa_i +0 1 +.names N_86_i.BLIF N_86 +0 1 +.names RW_000_c.BLIF RW_000_i +0 1 +.names N_129.BLIF N_129_i +0 1 +.names CLK_030_PE_1_.BLIF clk_030_pe_i_1__n +0 1 +.names CLK_OSZI_c.BLIF IPL_D0_0_.C +1 1 +.names N_130.BLIF N_130_i +0 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_i +0 1 +.names N_117.BLIF N_117_i +0 1 +.names N_46_0.BLIF inst_AMIGA_DS.D +0 1 +.names N_107.BLIF N_107_i +0 1 +.names CLK_OSZI_c.BLIF IPL_D0_1_.C +1 1 +.names pos_clk_size_dma_6_0_0__n.BLIF pos_clk_size_dma_6_0__n +0 1 +.names pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n +0 1 +.names N_106.BLIF N_106_i +0 1 +.names BGACK_000_c.BLIF pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n +11 1 +.names pos_clk_size_dma_6_0_1__n.BLIF pos_clk_size_dma_6_1__n +0 1 +.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un0_n +11 1 +.names N_3.BLIF N_3_i +0 1 +.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_7 +1- 1 +-1 1 +.names CLK_OSZI_c.BLIF IPL_D0_2_.C +1 1 +.names N_43_0.BLIF inst_DS_000_DMA.D +0 1 +.names N_7_i.BLIF RST_c.BLIF N_41_0 +11 1 +.names N_4.BLIF N_4_i +0 1 +.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n +0 1 +.names N_42_0.BLIF inst_AS_000_DMA.D +0 1 +.names CYCLE_DMA_1_.BLIF cycle_dma_i_1__n +0 1 +.names un6_amiga_bus_data_dir.BLIF un6_amiga_bus_data_dir_i +0 1 +.names CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF pos_clk_un15_bgack_030_int_i_n +11 1 +.names CLK_OSZI_c.BLIF CLK_000_D_0_.C +1 1 +.names un12_amiga_bus_data_dir_m.BLIF un12_amiga_bus_data_dir_m_i +0 1 +.names cycle_dma_i_0__n.BLIF cycle_dma_i_1__n.BLIF pos_clk_un3_0_n +11 1 +.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c +0 1 +.names CLK_030_PE_0_.BLIF CLK_030_PE_1_.BLIF pos_clk_un12_clk_out_int_0_n +11 1 +.names N_22.BLIF N_22_i +0 1 +.names CLK_000_D_0_.BLIF CLK_000_D_1_.D +1 1 +.names N_31_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D +0 1 +.names AS_000_DMA_i.BLIF AS_000_i.BLIF un7_as_030 +11 1 +.names N_21.BLIF N_21_i +0 1 +.names N_76_i.BLIF pos_clk_un15_bgack_030_int_n.BLIF pos_clk_un13_bgack_030_int_n +11 1 +.names CLK_OSZI_c.BLIF CLK_000_D_1_.C +1 1 +.names N_32_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D +0 1 +.names RW_000_i.BLIF pos_clk_un15_bgack_030_int_i_n.BLIF pos_clk_un1_bgack_030_int_0_n +11 1 +.names N_19.BLIF N_19_i +0 1 +.names pos_clk_un3_clk_out_int_n.BLIF pos_clk_un3_clk_out_int_i_n +0 1 +.names N_34_0.BLIF inst_A0_DMA.D +0 1 +.names RW_000_c.BLIF pos_clk_un3_clk_out_int_i_n.BLIF DS_000_DMA_0_sqmuxa +11 1 +.names CLK_000_D_1_.BLIF CLK_000_D_2_.D +1 1 +.names N_18.BLIF N_18_i +0 1 +.names RST_c.BLIF pos_clk_as_000_dma6_n.BLIF un1_rst_3 +11 1 +.names N_35_0.BLIF inst_RW_000_DMA.D +0 1 +.names pos_clk_as_000_dma6_n.BLIF pos_clk_un3_clk_out_int_n.BLIF AS_000_DMA_1_sqmuxa +11 1 +.names CLK_OSZI_c.BLIF CLK_000_D_2_.C +1 1 +.names N_108.BLIF N_108_i +0 1 +.names G_95.BLIF un1_rst_2.BLIF CYCLE_DMA_0_.D +11 1 +.names N_111.BLIF N_111_i +0 1 +.names G_101.BLIF un1_rst_3.BLIF CLK_030_PE_0_.D +11 1 +.names N_265_2_0.BLIF N_265_2 +0 1 +.names AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF BGACK_030_INT_i.BLIF un1_amiga_bus_enable_low +11 1 +.names VPA_c.BLIF VPA_c_i +0 1 +.names un6_amiga_bus_data_dir_i.BLIF un12_amiga_bus_data_dir_m_i.BLIF AMIGA_BUS_DATA_DIR_c_0 +11 1 +.names CLK_OSZI_c.BLIF CLK_000_D_3_.C +1 1 +.names N_52_0.BLIF inst_VPA_D.D +0 1 +.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF un12_amiga_bus_data_dir_m +11 1 +.names DTACK_c.BLIF DTACK_c_i +0 1 +.names CLK_OUT_INTreg.BLIF CLK_EXP_i +0 1 +.names N_48_0.BLIF inst_DTACK_D0.D +0 1 +.names CLK_EXP_i.BLIF inst_CLK_OUT_PRE_D.BLIF pos_clk_un3_clk_out_int_n +11 1 +.names CLK_000_D_3_.BLIF CLK_000_D_4_.D +1 1 +.names pos_clk_un4_bgack_000_n.BLIF pos_clk_un4_bgack_000_i_n +0 1 +.names inst_DS_000_DMA.BLIF DS_000_DMA_i +0 1 +.names pos_clk_un6_bgack_000_0_n.BLIF pos_clk_un6_bgack_000_n +0 1 +.names AS_000_i.BLIF DS_000_DMA_i.BLIF un6_ds_030 +11 1 +.names CLK_OSZI_c.BLIF CLK_000_D_4_.C +1 1 +.names N_7.BLIF N_7_i +0 1 +.names DS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un3_n +0 1 +.names N_41_0.BLIF inst_BGACK_030_INTreg.D +0 1 +.names inst_DS_000_DMA.BLIF DS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un1_n +11 1 +.names pos_clk_un1_bgack_030_int_0_n.BLIF pos_clk_un1_bgack_030_int_n +0 1 +.names pos_clk_as_000_dma6_i_n.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n +11 1 +.names pos_clk_un12_clk_out_int_0_n.BLIF pos_clk_un12_clk_out_int_n +0 1 +.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF N_3 +1- 1 +-1 1 +.names CLK_OSZI_c.BLIF CYCLE_DMA_0_.C +1 1 +.names pos_clk_un3_0_n.BLIF pos_clk_un3_n +0 1 +.names pos_clk_as_000_dma6_n.BLIF pos_clk_as_000_dma6_i_n +0 1 +.names pos_clk_un15_bgack_030_int_i_n.BLIF pos_clk_un15_bgack_030_int_n +0 1 +.names AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un3_n +0 1 +.names N_98.BLIF N_98_i +0 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un1_n +11 1 +.names pos_clk_un31_clk_000_ne_i_n.BLIF pos_clk_un31_clk_000_ne_n +0 1 +.names pos_clk_as_000_dma6_i_n.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF CYCLE_DMA_1_.C +1 1 +.names N_121.BLIF N_121_i +0 1 +.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF N_4 +1- 1 +-1 1 +.names N_120.BLIF N_120_i +0 1 +.names G_97.BLIF un1_rst_2.BLIF CYCLE_DMA_1_.D +11 1 +.names N_125.BLIF N_125_i +0 1 +.names N_4_i.BLIF RST_c.BLIF N_42_0 +11 1 +.names N_124.BLIF N_124_i +0 1 +.names N_3_i.BLIF RST_c.BLIF N_43_0 +11 1 +.names CLK_OSZI_c.BLIF CLK_030_PE_0_.C +1 1 +.names N_53_0.BLIF inst_RESET_OUT.D +0 1 +.names CYCLE_DMA_0_.BLIF pos_clk_un13_bgack_030_int_n.BLIF N_199 +11 1 +.names N_134.BLIF N_134_i +0 1 +.names CLK_030_PE_0_.BLIF pos_clk_un13_clk_out_int_n.BLIF N_205 +11 1 +.names N_270_0.BLIF N_270 +0 1 +.names ahigh_c_27__n.BLIF ahigh_i_27__n +0 1 +.names N_77_i.BLIF N_77 +0 1 +.names ahigh_c_26__n.BLIF ahigh_i_26__n +0 1 +.names CLK_OSZI_c.BLIF CLK_030_PE_1_.C +1 1 +.names N_87_i.BLIF N_87 +0 1 +.names ahigh_c_25__n.BLIF ahigh_i_25__n +0 1 +.names N_112.BLIF N_112_i +0 1 +.names ahigh_c_24__n.BLIF ahigh_i_24__n +0 1 +.names N_113.BLIF N_113_i +0 1 +.names SIZE_DMA_3_sqmuxa.BLIF size_dma_0_1__un3_n +0 1 +.names N_114.BLIF N_114_i +0 1 +.names SIZE_DMA_1_.BLIF SIZE_DMA_3_sqmuxa.BLIF size_dma_0_1__un1_n +11 1 +.names CLK_OSZI_c.BLIF SIZE_DMA_0_.C +1 1 +.names N_109.BLIF N_109_i +0 1 +.names pos_clk_size_dma_6_1__n.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un0_n +11 1 +.names N_118.BLIF N_118_i +0 1 +.names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D +1- 1 +-1 1 +.names N_255.BLIF N_255_i +0 1 +.names SIZE_DMA_3_sqmuxa.BLIF size_dma_0_0__un3_n +0 1 +.names N_257.BLIF N_257_i +0 1 +.names SIZE_DMA_0_.BLIF SIZE_DMA_3_sqmuxa.BLIF size_dma_0_0__un1_n +11 1 +.names CLK_OSZI_c.BLIF SIZE_DMA_1_.C +1 1 +.names cpu_est_2_0_2__n.BLIF cpu_est_2_2__n +0 1 +.names pos_clk_size_dma_6_0__n.BLIF size_dma_0_0__un3_n.BLIF size_dma_0_0__un0_n +11 1 +.names N_258.BLIF N_258_i +0 1 +.names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D +1- 1 +-1 1 +.names N_259.BLIF N_259_i +0 1 +.names N_18_i.BLIF RST_c.BLIF N_35_0 +11 1 +.names cpu_est_2_0_1__n.BLIF cpu_est_2_1__n +0 1 +.names N_19_i.BLIF RST_c.BLIF N_34_0 +11 1 +.names CLK_OSZI_c.BLIF cpu_est_0_.C +1 1 +.names N_262.BLIF N_262_i +0 1 +.names N_21_i.BLIF RST_c.BLIF N_32_0 +11 1 +.names N_261.BLIF N_261_i +0 1 +.names N_22_i.BLIF RST_c.BLIF N_31_0 +11 1 +.names pos_clk_un9_clk_000_pe_0_n.BLIF pos_clk_un9_clk_000_pe_n +0 1 +.names pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_high_0_un3_n +0 1 +.names N_251_i.BLIF N_251 +0 1 +.names pos_clk_amiga_bus_enable_dma_high_3_n.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_high_0_un1_n +11 1 +.names CLK_OSZI_c.BLIF cpu_est_1_.C +1 1 +.names N_252_0.BLIF N_252 +0 1 +.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF amiga_bus_enable_dma_high_0_un0_n +11 1 +.names N_76_i.BLIF N_76 +0 1 +.names amiga_bus_enable_dma_high_0_un1_n.BLIF amiga_bus_enable_dma_high_0_un0_n.BLIF N_22 +1- 1 +-1 1 +.names N_17.BLIF N_17_i +0 1 +.names pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_low_0_un3_n +0 1 +.names N_36_0.BLIF inst_VMA_INTreg.D +0 1 +.names pos_clk_amiga_bus_enable_dma_low_3_n.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_low_0_un1_n +11 1 +.names CLK_OSZI_c.BLIF RST_DLY_0_.C +1 1 +.names N_157_i.BLIF N_157 +0 1 +.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF amiga_bus_enable_dma_low_0_un3_n.BLIF amiga_bus_enable_dma_low_0_un0_n +11 1 +.names N_160_0.BLIF N_160 +0 1 +.names amiga_bus_enable_dma_low_0_un1_n.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF N_21 +1- 1 +-1 1 +.names N_161_0.BLIF N_161 +0 1 +.names pos_clk_un5_bgack_030_int_d_n.BLIF a0_dma_0_un3_n +0 1 +.names N_162_0.BLIF N_162 +0 1 +.names pos_clk_a0_dma_3_n.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF a0_dma_0_un1_n +11 1 +.names CLK_OSZI_c.BLIF RST_DLY_1_.C +1 1 +.names N_165.BLIF N_165_i +0 1 +.names inst_A0_DMA.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n +11 1 +.names N_167.BLIF N_167_i +0 1 +.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF N_19 +1- 1 +-1 1 +.names A_DECODE_16_.BLIF a_decode_c_16__n +1 1 +.names N_166.BLIF N_166_i +0 1 +.names pos_clk_un5_bgack_030_int_d_n.BLIF rw_000_dma_0_un3_n +0 1 +.names A_DECODE_17_.BLIF a_decode_c_17__n +1 1 +.names N_168.BLIF N_168_i +0 1 +.names pos_clk_rw_000_dma_3_n.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF rw_000_dma_0_un1_n +11 1 +.names CLK_OSZI_c.BLIF RST_DLY_2_.C +1 1 +.names A_DECODE_18_.BLIF a_decode_c_18__n +1 1 +.names N_170.BLIF N_170_i +0 1 +.names inst_RW_000_DMA.BLIF rw_000_dma_0_un3_n.BLIF rw_000_dma_0_un0_n +11 1 +.names A_DECODE_19_.BLIF a_decode_c_19__n +1 1 +.names N_164.BLIF N_164_i +0 1 +.names rw_000_dma_0_un1_n.BLIF rw_000_dma_0_un0_n.BLIF N_18 +1- 1 +-1 1 +.names A_DECODE_20_.BLIF a_decode_c_20__n +1 1 +.names N_102.BLIF N_102_i +0 1 +.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i +0 1 +.names A_DECODE_21_.BLIF a_decode_c_21__n +1 1 +.names N_264_i.BLIF N_264 +0 1 +.names N_106_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n +11 1 +.names CLK_OSZI_c.BLIF inst_DS_000_DMA.C +1 1 +.names A_DECODE_22_.BLIF a_decode_c_22__n +1 1 +.names N_79_i.BLIF N_79 +0 1 +.names N_107_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n +11 1 +.names A_DECODE_23_.BLIF a_decode_c_23__n +1 1 +.names N_78_i.BLIF N_78 +0 1 +.names N_117_i.BLIF RST_c.BLIF N_46_0 +11 1 +.names N_119.BLIF N_119_i +0 1 +.names N_129_i.BLIF N_130_i.BLIF un11_amiga_bus_enable_high_i +11 1 +.names A_1_.BLIF a_c_1__n +1 1 +.names un1_LDS_000_INT_0.BLIF un1_LDS_000_INT +0 1 +.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_86_i +11 1 +.names CLK_OSZI_c.BLIF inst_DSACK1_INT.C +1 1 +.names nEXP_SPACE.BLIF nEXP_SPACE_c +1 1 +.names N_23.BLIF N_23_i +0 1 +.names BGACK_030_INT_i.BLIF RW_000_i.BLIF pos_clk_rw_000_dma_3_0_n +11 1 +.names N_30_0.BLIF BG_000DFFreg.D +0 1 +.names a_c_1__n.BLIF a_i_1__n +0 1 +.names BG_030.BLIF BG_030_c +1 1 +.names N_20.BLIF N_20_i +0 1 +.names a_c_1__n.BLIF BGACK_030_INT_i.BLIF pos_clk_amiga_bus_enable_dma_low_3_0_n +11 1 +.names BG_000DFFreg.BLIF BG_000 +1 1 +.names N_33_0.BLIF inst_UDS_000_INT.D +0 1 +.names a_i_1__n.BLIF BGACK_030_INT_i.BLIF pos_clk_amiga_bus_enable_dma_high_3_0_n +11 1 +.names CLK_OSZI_c.BLIF inst_AS_000_INT.C +1 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030 +1 1 +.names N_13.BLIF N_13_i +0 1 +.names RST_c.BLIF pos_clk_un5_bgack_030_int_d_i_n.BLIF SIZE_DMA_3_sqmuxa +11 1 +.names BGACK_000.BLIF BGACK_000_c +1 1 +.names N_40_0.BLIF inst_LDS_000_INT.D +0 1 +.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF pos_clk_un5_bgack_030_int_d_i_n +11 1 +.names CLK_030.BLIF CLK_030_c +1 1 +.names ipl_c_2__n.BLIF ipl_c_i_2__n +0 1 +.names ahigh_c_31__n.BLIF ahigh_i_31__n +0 1 +.names CLK_000.BLIF CLK_000_D_0_.D +1 1 +.names N_51_0.BLIF IPL_D0_2_.D +0 1 +.names ahigh_c_30__n.BLIF ahigh_i_30__n +0 1 +.names CLK_OSZI_c.BLIF inst_AMIGA_DS.C +1 1 +.names CLK_OSZI.BLIF CLK_OSZI_c +1 1 +.names N_26.BLIF N_26_i +0 1 +.names ahigh_c_29__n.BLIF ahigh_i_29__n +0 1 +.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT +1 1 +.names N_29_0.BLIF IPL_030DFF_2_reg.D +0 1 +.names ahigh_c_28__n.BLIF ahigh_i_28__n +0 1 +.names CLK_OUT_INTreg.BLIF CLK_EXP +1 1 +.names a_c_0__n.BLIF a_c_i_0__n +0 1 +.names N_131_i.BLIF N_277_i.BLIF N_64_0 +11 1 +.names un21_fpu_cs_i.BLIF FPU_CS +1 1 +.names size_c_1__n.BLIF size_c_i_1__n +0 1 +.names AS_030_i.BLIF N_91.BLIF N_131 +11 1 +.names CLK_OSZI_c.BLIF inst_AS_030_D0.C +1 1 +.names FPU_SENSE.BLIF FPU_SENSE_c +1 1 +.names DS_000_ENABLE_0_sqmuxa_1.BLIF DS_000_ENABLE_0_sqmuxa_1_i +0 1 +.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i +0 1 +.names IPL_030DFF_0_reg.BLIF IPL_030_0_ +1 1 +.names un1_DS_000_ENABLE_0_sqmuxa_i.BLIF un1_DS_000_ENABLE_0_sqmuxa +0 1 +.names FPU_SENSE_c.BLIF FPU_SENSE_i +0 1 +.names IPL_030DFF_1_reg.BLIF IPL_030_1_ +1 1 +.names BG_030_c.BLIF BG_030_c_i +0 1 +.names un10_ciin.BLIF un10_ciin_i +0 1 +.names IPL_030DFF_2_reg.BLIF IPL_030_2_ +1 1 +.names pos_clk_un6_bg_030_n.BLIF pos_clk_un6_bg_030_i_n +0 1 +.names nEXP_SPACE_i.BLIF un10_ciin_i.BLIF un13_ciin +11 1 +.names CLK_OSZI_c.BLIF inst_DTACK_D0.C +1 1 +.names IPL_0_.BLIF ipl_c_0__n +1 1 +.names pos_clk_un9_bg_030_0_n.BLIF pos_clk_un9_bg_030_n +0 1 +.names inst_AS_030_D0.BLIF AS_030_D0_i +0 1 +.names IPL_1_.BLIF ipl_c_1__n +1 1 +.names inst_UDS_000_INT.BLIF UDS_000_INT_i +0 1 +.names BGACK_030_INT_i.BLIF N_86_i.BLIF N_106 +11 1 +.names IPL_2_.BLIF ipl_c_2__n +1 1 +.names un1_UDS_000_INT_0.BLIF un1_UDS_000_INT +0 1 +.names BGACK_030_INT_i.BLIF N_86.BLIF N_107 +11 1 +.names inst_LDS_000_INT.BLIF LDS_000_INT_i +0 1 +.names LDS_000_c.BLIF UDS_000_c.BLIF N_117 +11 1 +.names CLK_OSZI_c.BLIF inst_VPA_D.C +1 1 +.names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un1_UDS_000_INT_0 +11 1 +.names AS_000_INT_i.BLIF AS_030_i.BLIF N_122 +11 1 +.names vcc_n_n.BLIF AVEC +1 1 +.names N_8.BLIF RST_c.BLIF inst_DS_000_ENABLE.D +11 1 +.names AS_030_i.BLIF DSACK1_INT_i.BLIF N_123 +11 1 +.names N_250_i.BLIF E +1 1 +.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n +0 1 +.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF pos_clk_a0_dma_3_n +11 1 +.names VPA.BLIF VPA_c +1 1 +.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n +11 1 +.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i +0 1 +.names CLK_OSZI_c.BLIF inst_RESET_OUT.C +1 1 +.names inst_VMA_INTreg.BLIF VMA +1 1 +.names BG_000DFFreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +11 1 +.names AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF BGACK_030_INT_i.BLIF N_129 +11 1 +.names RST.BLIF RST_c +1 1 +.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF N_23 +1- 1 +-1 1 +.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D +0 1 +.names RESET.BLIF RESET_c +1 1 +.names SM_AMIGA_6_.BLIF uds_000_int_0_un3_n +0 1 +.names G_122.BLIF N_224_i +0 1 +.names a_c_0__n.BLIF SM_AMIGA_6_.BLIF uds_000_int_0_un1_n +11 1 +.names G_123.BLIF N_225_i +0 1 +.names CLK_OSZI_c.BLIF inst_DS_000_ENABLE.C +1 1 +.names FC_0_.BLIF fc_c_0__n +1 1 +.names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n +11 1 +.names G_124.BLIF N_226_i +0 1 +.names FC_1_.BLIF fc_c_1__n +1 1 +.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_20 +1- 1 +-1 1 +.names a_decode_c_18__n.BLIF a_decode_i_18__n +0 1 +.names gnd_n_n.BLIF AMIGA_ADDR_ENABLE +1 1 +.names SM_AMIGA_6_.BLIF lds_000_int_0_un3_n +0 1 +.names a_decode_c_19__n.BLIF a_decode_i_19__n +0 1 +.names AMIGA_BUS_DATA_DIR_c.BLIF AMIGA_BUS_DATA_DIR +1 1 +.names pos_clk_un10_sm_amiga_i_n.BLIF SM_AMIGA_6_.BLIF lds_000_int_0_un1_n +11 1 +.names CLK_OSZI_c.BLIF BG_000DFFreg.C +1 1 +.names un1_amiga_bus_enable_low_i.BLIF AMIGA_BUS_ENABLE_LOW +1 1 +.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n +11 1 +.names un11_amiga_bus_enable_high_i.BLIF AMIGA_BUS_ENABLE_HIGH +1 1 +.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF N_13 +1- 1 +-1 1 +.names a_decode_c_16__n.BLIF a_decode_i_16__n +0 1 +.names DS_000_ENABLE_1_sqmuxa.BLIF ds_000_enable_0_un3_n +0 1 +.names N_159_0.BLIF RW_c_i.BLIF pos_clk_rw_000_int_5_0_n +11 1 +.names N_78.BLIF N_101_i.BLIF N_136_i_1 +11 1 +.names inst_DS_000_ENABLE.BLIF DS_000_ENABLE_1_sqmuxa.BLIF ds_000_enable_0_un1_n +11 1 +.names N_79.BLIF N_159_0.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 +11 1 +.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.C +1 1 +.names N_136_i_1.BLIF RST_c.BLIF SM_AMIGA_0_.D +11 1 +.names un1_DS_000_ENABLE_0_sqmuxa.BLIF ds_000_enable_0_un3_n.BLIF ds_000_enable_0_un0_n +11 1 +.names N_104_i.BLIF SM_AMIGA_i_7_.BLIF N_159_0 +11 1 +.names N_103_i.BLIF N_104_i.BLIF N_152_i_1 +11 1 +.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_8 +1- 1 +-1 1 +.names un1_rst_2_1.BLIF inst_BGACK_030_INT_D.D +0 1 +.names N_152_i_1.BLIF RST_c.BLIF SM_AMIGA_i_7_.D +11 1 +.names BG_030_c_i.BLIF pos_clk_un6_bg_030_i_n.BLIF pos_clk_un9_bg_030_0_n +11 1 +.names cpu_est_0_0_.BLIF cpu_est_0_.D +0 1 +.names N_76.BLIF N_105_i.BLIF N_146_i_1 +11 1 +.names un1_amiga_bus_enable_low.BLIF un1_amiga_bus_enable_low_i +0 1 +.names N_274.BLIF inst_AS_030_D0.D +0 1 +.names CLK_OSZI_c.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.C +1 1 +.names N_146_i_1.BLIF RST_c.BLIF SM_AMIGA_5_.D +11 1 +.names un21_fpu_cs.BLIF un21_fpu_cs_i +0 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_0__un3_n +0 1 +.names N_115_i.BLIF N_116_i.BLIF N_267_i_1 +11 1 +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names ipl_c_0__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_0__un1_n +11 1 +.names N_267_i_1.BLIF RST_c.BLIF RST_DLY_0_.D +11 1 +.names N_157.BLIF sm_amiga_i_3__n.BLIF N_166 +11 1 +.names IPL_030DFF_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n +11 1 +.names N_226_i.BLIF N_224_i.BLIF pos_clk_ipl_1_n +11 1 +.names N_161.BLIF sm_amiga_i_2__n.BLIF N_165 +11 1 +.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_24 +1- 1 +-1 1 +.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C +1 1 +.names pos_clk_ipl_1_n.BLIF N_225_i.BLIF pos_clk_ipl_n +11 1 +.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n +0 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_1__un3_n +0 1 +.names N_250_i_1.BLIF N_263_i.BLIF N_250_i +11 1 +.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +0 1 +.names ipl_c_1__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_1__un1_n +11 1 +.names N_255_i.BLIF N_256_i.BLIF N_189_i_1 +11 1 +.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_164 +11 1 +.names IPL_030DFF_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n +11 1 +.names N_189_i_1.BLIF N_263_i.BLIF N_189_i +11 1 +.names DS_000_ENABLE_0_sqmuxa_1_i.BLIF N_157.BLIF un1_DS_000_ENABLE_0_sqmuxa_i +11 1 +.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF N_25 +1- 1 +-1 1 +.names CLK_OSZI_c.BLIF inst_A0_DMA.C +1 1 +.names nEXP_SPACE_c.BLIF inst_AS_030_D0.BLIF pos_clk_un6_bg_030_1_n +11 1 +.names un7_as_030.BLIF un7_as_030_i +0 1 +.names pos_clk_un6_bg_030_1_n.BLIF CLK_000_D_0_.BLIF pos_clk_un6_bg_030_n +11 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_2__un3_n +0 1 +.names N_122.BLIF N_122_i +0 1 +.names N_77.BLIF N_228_i.BLIF N_108_1 +11 1 +.names ipl_c_2__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_2__un1_n +11 1 +.names N_123.BLIF N_123_i +0 1 +.names N_108_1.BLIF rst_dly_i_2__n.BLIF N_108 +11 1 +.names IPL_030DFF_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n +11 1 +.names un6_ds_030.BLIF un6_ds_030_i +0 1 +.names CLK_OSZI_c.BLIF inst_RW_000_DMA.C +1 1 +.names N_228_i.BLIF rst_dly_i_0__n.BLIF N_114_1 +11 1 +.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_26 +1- 1 +-1 1 +.names un13_ciin.BLIF un13_ciin_i +0 1 +.names N_114_1.BLIF rst_dly_i_1__n.BLIF N_114 +11 1 +.names N_26_i.BLIF RST_c.BLIF N_29_0 +11 1 +.names N_64.BLIF as_030_000_sync_0_un3_n +0 1 +.names N_277.BLIF BGACK_000_c.BLIF un21_berr_1 +11 1 +.names ipl_c_i_2__n.BLIF RST_c.BLIF N_51_0 +11 1 +.names inst_AS_030_000_SYNC.BLIF N_64.BLIF as_030_000_sync_0_un1_n +11 1 +.names un21_berr_1.BLIF FPU_SENSE_c.BLIF un21_berr +11 1 +.names N_13_i.BLIF RST_c.BLIF N_40_0 +11 1 +.names AS_030_c.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C +1 1 +.names N_277.BLIF BGACK_000_c.BLIF un21_fpu_cs_1 +11 1 +.names N_20_i.BLIF RST_c.BLIF N_33_0 +11 1 +.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_14 +1- 1 +-1 1 +.names un21_fpu_cs_1.BLIF FPU_SENSE_i.BLIF un21_fpu_cs +11 1 +.names N_23_i.BLIF RST_c.BLIF N_30_0 +11 1 +.names un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un3_n +0 1 +.names inst_BGACK_030_INTreg.BLIF AS_030_000_SYNC_i.BLIF N_130_1 +11 1 +.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un1_LDS_000_INT_0 +11 1 +.names pos_clk_rw_000_int_5_n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un1_n +11 1 +.names N_130_1.BLIF AS_030_i.BLIF N_130 +11 1 +.names N_118_i.BLIF N_119_i.BLIF inst_AS_000_INT.D +11 1 +.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF inst_RW_000_INT.C +1 1 +.names cpu_est_i_2__n.BLIF VMA_INT_i.BLIF pos_clk_un29_clk_000_ne_1_1_n +11 1 +.names CLK_000_D_0_.BLIF clk_000_d_i_0__n +0 1 +.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_15 +1- 1 +-1 1 +.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF pos_clk_un29_clk_000_ne_1_2_n +11 1 +.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_78_i +11 1 +.names N_15_i.BLIF RST_c.BLIF N_38_0 +11 1 +.names pos_clk_un29_clk_000_ne_1_1_n.BLIF pos_clk_un29_clk_000_ne_1_2_n.BLIF pos_clk_un29_clk_000_ne_1_3_n +11 1 +.names N_78_i.BLIF SM_AMIGA_6_.BLIF N_79_i +11 1 +.names N_14_i.BLIF RST_c.BLIF N_39_0 +11 1 +.names pos_clk_un29_clk_000_ne_1_3_n.BLIF cpu_est_i_1__n.BLIF pos_clk_un29_clk_000_ne_1_n +11 1 +.names N_78.BLIF N_102_i.BLIF N_264_i +11 1 +.names ipl_c_i_0__n.BLIF RST_c.BLIF N_49_0 +11 1 +.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C +1 1 +.names N_78_i.BLIF N_263.BLIF N_261_1 +11 1 +.names N_85_i.BLIF sm_amiga_i_i_7__n.BLIF N_162_0 +11 1 +.names ipl_c_i_1__n.BLIF RST_c.BLIF N_50_0 +11 1 +.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_261_2 +11 1 +.names SM_AMIGA_3_.BLIF pos_clk_un31_clk_000_ne_n.BLIF N_161_0 +11 1 +.names N_24_i.BLIF RST_c.BLIF N_27_0 +11 1 +.names N_261_1.BLIF N_261_2.BLIF N_261 +11 1 +.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n +0 1 +.names N_25_i.BLIF RST_c.BLIF N_28_0 +11 1 +.names N_76_i.BLIF N_251_i.BLIF N_262_1 +11 1 +.names N_76_i.BLIF SM_AMIGA_5_.BLIF N_160_0 +11 1 +.names vcc_n_n +1 +.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C +1 1 +.names N_263.BLIF VPA_D_i.BLIF N_262_2 +11 1 +.names N_78_i.BLIF SM_AMIGA_4_.BLIF N_157_i +11 1 +.names gnd_n_n +.names N_262_1.BLIF N_262_2.BLIF N_262 +11 1 +.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n +0 1 +.names A_DECODE_15_.BLIF a_decode_15__n +1 1 +.names N_78_i.BLIF RW_c.BLIF DS_000_ENABLE_0_sqmuxa_1_1 +11 1 +.names N_162.BLIF sm_amiga_i_6__n.BLIF N_170 +11 1 +.names A_DECODE_14_.BLIF a_decode_14__n +1 1 +.names DS_000_ENABLE_0_sqmuxa_1_1.BLIF SM_AMIGA_6_.BLIF DS_000_ENABLE_0_sqmuxa_1 +11 1 +.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n +0 1 +.names A_DECODE_13_.BLIF a_decode_13__n +1 1 +.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C +1 1 +.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_259_1 +11 1 +.names N_160.BLIF sm_amiga_i_4__n.BLIF N_168 +11 1 +.names A_DECODE_12_.BLIF a_decode_12__n +1 1 +.names N_259_1.BLIF cpu_est_i_3__n.BLIF N_259 +11 1 +.names N_76_i.BLIF pos_clk_un31_clk_000_ne_n.BLIF N_167 +11 1 +.names A_DECODE_11_.BLIF a_decode_11__n +1 1 +.names N_16_i.BLIF N_254_i.BLIF N_250_i_1 +11 1 +.names N_251.BLIF cpu_est_2_.BLIF N_255 +11 1 +.names A_DECODE_10_.BLIF a_decode_10__n +1 1 +.names un6_amiga_bus_data_dir_1.BLIF un6_amiga_bus_data_dir_2.BLIF un6_amiga_bus_data_dir +11 1 +.names cpu_est_2_.BLIF cpu_est_i_2__n +0 1 +.names A_DECODE_9_.BLIF a_decode_9__n +1 1 +.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C +1 1 +.names AMIGA_DS_i.BLIF AS_000_i.BLIF pos_clk_as_000_dma6_1_n +11 1 +.names cpu_est_1_.BLIF cpu_est_i_2__n.BLIF N_16 +11 1 +.names A_DECODE_8_.BLIF a_decode_8__n +1 1 +.names pos_clk_un1_bgack_030_int_n.BLIF pos_clk_un3_n.BLIF pos_clk_as_000_dma6_2_n +11 1 +.names N_252.BLIF cpu_est_2_.BLIF N_254 +11 1 +.names A_DECODE_7_.BLIF a_decode_7__n +1 1 +.names pos_clk_as_000_dma6_1_n.BLIF pos_clk_as_000_dma6_2_n.BLIF pos_clk_as_000_dma6_n +11 1 +.names A_DECODE_6_.BLIF a_decode_6__n +1 1 +.names DS_000_DMA_0_sqmuxa_i.BLIF pos_clk_as_000_dma6_n.BLIF DS_000_DMA_1_sqmuxa_1 +11 1 +.names AS_030_c.BLIF AS_030_i +0 1 +.names A_DECODE_5_.BLIF a_decode_5__n +1 1 +.names CLK_OSZI_c.BLIF inst_BGACK_030_INT_D.C +1 1 +.names DS_000_DMA_1_sqmuxa_1.BLIF pos_clk_un4_rw_000_i_n.BLIF DS_000_DMA_1_sqmuxa +11 1 +.names AS_030_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_i.BLIF DS_000_ENABLE_1_sqmuxa +11 1 +.names A_DECODE_4_.BLIF a_decode_4__n +1 1 +.names CLK_030_PE_0_.BLIF clk_030_pe_i_1__n.BLIF pos_clk_un4_rw_000_1_n +11 1 +.names N_76.BLIF sm_amiga_i_2__n.BLIF N_102 +11 1 +.names A_DECODE_3_.BLIF a_decode_3__n +1 1 +.names CLK_030_c.BLIF RW_000_i.BLIF pos_clk_un4_rw_000_2_n +11 1 +.names SM_AMIGA_i_7_.BLIF sm_amiga_i_i_7__n +0 1 +.names A_DECODE_2_.BLIF a_decode_2__n +1 1 .names inst_CLK_OUT_PRE_D.BLIF CLK_OUT_INTreg.D 1 1 -.names AS_000_i.BLIF BGACK_030_INT_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_1_n +.names pos_clk_un4_rw_000_1_n.BLIF pos_clk_un4_rw_000_2_n.BLIF pos_clk_un4_rw_000_n 11 1 -.names N_154.BLIF N_355.BLIF N_197 +.names N_85.BLIF sm_amiga_i_i_7__n.BLIF N_103 11 1 -.names pos_clk_un21_bgack_030_int_i_0_o3_0_x2.BLIF N_350_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_2_n +.names pos_clk_un12_clk_out_int_n.BLIF AS_000_DMA_i.BLIF pos_clk_un13_clk_out_int_1_n +11 1 +.names N_78_i.BLIF SM_AMIGA_0_.BLIF N_104 +11 1 +.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C +1 1 +.names pos_clk_un13_clk_out_int_1_n.BLIF pos_clk_un3_clk_out_int_n.BLIF pos_clk_un13_clk_out_int_n +11 1 +.names N_79.BLIF sm_amiga_i_5__n.BLIF N_105 +11 1 +.names N_76_i.BLIF N_137.BLIF N_125_1 +11 1 +.names inst_AS_000_INT.BLIF AS_000_INT_i +0 1 +.names N_125_1.BLIF RST_c.BLIF N_125 +11 1 +.names AS_000_INT_i.BLIF N_274.BLIF N_118 +11 1 +.names N_76.BLIF rst_dly_i_0__n.BLIF N_116_1 +11 1 +.names N_79_i.BLIF RST_c.BLIF N_119 +11 1 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_50.C +1 1 +.names N_116_1.BLIF RST_c.BLIF N_116 +11 1 +.names inst_VPA_D.BLIF VPA_D_i +0 1 +.names N_277_4.BLIF N_277_5.BLIF N_277 +11 1 +.names CLK_000_D_1_.BLIF clk_000_d_i_1__n +0 1 +.names ahigh_i_24__n.BLIF ahigh_i_25__n.BLIF un10_ciin_1 +11 1 +.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_76_i +11 1 +.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_D.D +1 1 +.names ahigh_i_26__n.BLIF ahigh_i_27__n.BLIF un10_ciin_2 +11 1 +.names cpu_est_1_.BLIF cpu_est_i_3__n.BLIF N_252_0 +11 1 +.names ahigh_i_28__n.BLIF ahigh_i_29__n.BLIF un10_ciin_3 +11 1 +.names cpu_est_1_.BLIF cpu_est_i_1__n +0 1 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_D.C +1 1 +.names ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF un10_ciin_4 +11 1 +.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_251_i +11 1 +.names a_decode_c_23__n.BLIF AS_030_D0_i.BLIF un10_ciin_5 +11 1 +.names N_261_i.BLIF N_262_i.BLIF pos_clk_un9_clk_000_pe_0_n +11 1 +.names a_decode_c_20__n.BLIF a_decode_c_21__n.BLIF un10_ciin_6 +11 1 +.names N_258_i.BLIF N_259_i.BLIF cpu_est_2_0_1__n +11 1 +.names CYCLE_DMA_0_.BLIF G_95.X1 +1 1 +.names un10_ciin_1.BLIF un10_ciin_2.BLIF un10_ciin_7 +11 1 +.names N_255_i.BLIF N_257_i.BLIF cpu_est_2_0_2__n +11 1 +.names un10_ciin_3.BLIF un10_ciin_4.BLIF un10_ciin_8 +11 1 +.names cpu_est_3_.BLIF cpu_est_i_3__n +0 1 +.names pos_clk_un13_bgack_030_int_n.BLIF G_95.X2 +1 1 +.names un10_ciin_5.BLIF un10_ciin_6.BLIF un10_ciin_9 +11 1 +.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_263 +11 1 +.names un10_ciin_7.BLIF un10_ciin_8.BLIF un10_ciin_10 +11 1 +.names cpu_est_0_.BLIF cpu_est_i_0__n +0 1 +.names un10_ciin_9.BLIF a_decode_c_22__n.BLIF un10_ciin_11 +11 1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_258 +11 1 +.names CLK_030_PE_0_.BLIF G_101.X1 +1 1 +.names un10_ciin_10.BLIF un10_ciin_11.BLIF un10_ciin +11 1 +.names N_251_i.BLIF cpu_est_i_2__n.BLIF N_257 +11 1 +.names AS_000_i.BLIF BGACK_030_INT_i.BLIF un6_amiga_bus_data_dir_1 +11 1 +.names cpu_est_0_.BLIF cpu_est_i_2__n.BLIF N_256 +11 1 +.names pos_clk_un13_clk_out_int_n.BLIF G_101.X2 +1 1 +.names RW_000_c.BLIF nEXP_SPACE_i.BLIF un6_amiga_bus_data_dir_2 +11 1 +.names RST_DLY_1_.BLIF rst_dly_i_1__n +0 1 +.names N_144_i_1.BLIF RST_c.BLIF SM_AMIGA_4_.D +11 1 +.names N_76.BLIF rst_dly_i_1__n.BLIF N_113 +11 1 +.names N_166_i.BLIF N_167_i.BLIF N_142_i_1 +11 1 +.names N_77_i.BLIF N_134.BLIF N_112 +11 1 +.names CLK_030_PE_1_.BLIF G_103.X1 +1 1 +.names N_142_i_1.BLIF RST_c.BLIF SM_AMIGA_3_.D 11 1 .names RST_DLY_2_.BLIF rst_dly_i_2__n 0 1 -.names pos_clk_un21_bgack_030_int_i_0_0_1_n.BLIF pos_clk_un21_bgack_030_int_i_0_0_2_n.BLIF pos_clk_un21_bgack_030_int_i_0_0_n +.names N_165_i.BLIF N_264_i.BLIF N_140_i_1 11 1 -.names N_149.BLIF rst_dly_i_2__n.BLIF N_198 +.names N_76.BLIF rst_dly_i_2__n.BLIF N_111 11 1 -.names N_149.BLIF N_278_i.BLIF N_138_i_1 -11 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_208 -11 1 -.names N_282_i.BLIF RST_c.BLIF N_138_i_2 -11 1 -.names N_315.BLIF cpu_est_2_.BLIF N_210 -11 1 -.names N_138_i_1.BLIF N_138_i_2.BLIF SM_AMIGA_1_.D -11 1 -.names N_180.BLIF cpu_est_i_2__n.BLIF N_212 -11 1 -.names AS_000_i.BLIF N_199_i.BLIF N_59_i_1 -11 1 -.names N_174_i.BLIF RST_c.BLIF N_220 -11 1 -.names CLK_OSZI_c.BLIF IPL_D0_0_.C +.names N_205.BLIF G_103.X2 1 1 -.names a_decode_c_17__n.BLIF a_decode_i_16__n.BLIF N_156_i_2 +.names N_140_i_1.BLIF RST_c.BLIF SM_AMIGA_2_.D 11 1 -.names N_132.BLIF RST_c.BLIF N_219 +.names N_137.BLIF N_265_2.BLIF N_109 11 1 -.names a_decode_i_18__n.BLIF a_decode_i_19__n.BLIF N_156_i_3 +.names size_c_0__n.BLIF a_c_i_0__n.BLIF pos_clk_un10_sm_amiga_i_1_n 11 1 -.names a_decode_c_16__n.BLIF a_decode_i_16__n +.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n 0 1 .end diff --git a/Logic/BUS68030.bl1 b/Logic/BUS68030.bl1 index 59f2f67..252ebe3 100644 --- a/Logic/BUS68030.bl1 +++ b/Logic/BUS68030.bl1 @@ -1,440 +1,486 @@ #$ TOOL ispLEVER Classic 2.0.00.17.20.15 -#$ DATE Wed Oct 26 22:26:25 2016 +#$ DATE Fri Nov 18 19:32:36 2016 #$ MODULE bus68030 -#$ PINS 75 SIZE_1_ AHIGH_31_ A_DECODE_23_ IPL_030_2_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 \ -# DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BG_000 SIZE_0_ BGACK_030 AHIGH_30_ \ -# BGACK_000 AHIGH_29_ CLK_030 AHIGH_28_ CLK_000 AHIGH_27_ CLK_OSZI AHIGH_26_ CLK_DIV_OUT \ -# AHIGH_25_ CLK_EXP AHIGH_24_ FPU_CS A_DECODE_22_ FPU_SENSE A_DECODE_21_ DSACK1 \ -# A_DECODE_20_ DTACK A_DECODE_19_ AVEC A_DECODE_18_ E A_DECODE_17_ VPA A_DECODE_16_ VMA \ -# A_DECODE_15_ RST A_DECODE_14_ RESET A_DECODE_13_ RW A_DECODE_12_ AMIGA_ADDR_ENABLE \ -# A_DECODE_11_ AMIGA_BUS_DATA_DIR A_DECODE_10_ AMIGA_BUS_ENABLE_LOW A_DECODE_9_ \ -# AMIGA_BUS_ENABLE_HIGH A_DECODE_8_ CIIN A_DECODE_7_ A_DECODE_6_ A_DECODE_5_ \ -# A_DECODE_4_ A_DECODE_3_ A_DECODE_2_ A_0_ IPL_030_1_ IPL_030_0_ IPL_1_ IPL_0_ FC_0_ A_1_ -#$ NODES 598 ipl_i_2__n N_233_0 ipl_i_1__n N_360_i ipl_i_0__n N_191_i_i a_i_1__n \ -# N_192_i_i AS_000_DMA_i AS_000_i N_199_i CLK_030_H_i N_204_i AS_030_000_SYNC_i \ -# inst_BGACK_030_INTreg AMIGA_BUS_ENABLE_DMA_HIGH_i N_282_i vcc_n_n cycle_dma_i_0__n \ -# N_278_i inst_VMA_INTreg ahigh_i_30__n N_186_i gnd_n_n ahigh_i_31__n N_185_i \ -# un1_amiga_bus_enable_low ahigh_i_28__n CLK_030_c_i un7_as_030 ahigh_i_29__n N_184_0 \ -# un1_LDS_000_INT ahigh_i_26__n N_179_0 un1_UDS_000_INT ahigh_i_27__n N_251_i \ -# un10_ciin ahigh_i_24__n LDS_000_c_i un21_fpu_cs ahigh_i_25__n UDS_000_c_i un21_berr \ -# N_172_i un6_ds_030 pos_clk_un21_bgack_030_int_i_0_0_n cpu_est_2_ N_163_i cpu_est_3_ \ -# clk_000_d_i_3__n cpu_est_0_ N_115_i N_350_i cpu_est_1_ N_114_i un1_rw_i \ -# inst_AMIGA_BUS_ENABLE_DMA_HIGH un6_ds_030_i N_126_0 inst_AMIGA_BUS_ENABLE_DMA_LOW \ -# DS_000_DMA_i N_313_i inst_AS_030_D0 N_132_i N_231_i inst_AS_030_000_SYNC N_133_i \ -# N_291_i inst_BGACK_030_INT_D un7_as_030_i inst_AS_000_DMA \ -# AMIGA_BUS_ENABLE_DMA_LOW_i N_288_i inst_DS_000_DMA AS_030_c CYCLE_DMA_0_ N_287_i \ -# CYCLE_DMA_1_ AS_000_c N_340_i inst_VPA_D CLK_000_D_3_ RW_000_c N_284_i inst_DTACK_D0 \ -# inst_RESET_OUT N_275_i CLK_000_D_1_ UDS_000_c pos_clk_size_dma_6_0_1__n \ -# CLK_000_D_0_ N_268_i inst_CLK_OUT_PRE_50 LDS_000_c pos_clk_size_dma_6_0_0__n \ -# inst_CLK_OUT_PRE_D N_265_i IPL_D0_0_ size_c_0__n N_267_i IPL_D0_1_ IPL_D0_2_ \ -# size_c_1__n N_337_i CLK_000_D_2_ N_338_i CLK_000_D_4_ ahigh_c_24__n N_55_0 \ -# inst_LDS_000_INT un1_as_000_i inst_DS_000_ENABLE ahigh_c_25__n N_245_0 \ -# inst_UDS_000_INT N_229_i pos_clk_un9_bg_030_n ahigh_c_26__n SM_AMIGA_6_ N_227_i \ -# SM_AMIGA_4_ ahigh_c_27__n SM_AMIGA_1_ N_226_i SM_AMIGA_0_ ahigh_c_28__n N_246_0 \ -# SIZE_DMA_0_ N_332_i SIZE_DMA_1_ ahigh_c_29__n pos_clk_ds_000_dma_4_0_n \ -# inst_RW_000_INT N_48_0 inst_RW_000_DMA ahigh_c_30__n pos_clk_rw_000_dma_3_0_n \ -# RST_DLY_0_ N_218_i RST_DLY_1_ ahigh_c_31__n RST_DLY_2_ inst_A0_DMA un10_ciin_i \ -# pos_clk_a0_dma_3_n N_62_0 pos_clk_rw_000_dma_3_n N_215_i inst_CLK_030_H N_216_i \ -# inst_DSACK1_INT un10_amiga_bus_enable_high_i inst_AS_000_INT N_214_i SM_AMIGA_5_ \ -# N_310_0 SM_AMIGA_3_ N_24_i SM_AMIGA_2_ N_33_0 pos_clk_ds_000_dma_4_n N_23_i N_3 N_32_0 \ -# N_4 N_22_i N_31_0 N_3_i N_45_0 N_4_i N_44_0 N_15 N_15_i N_19 N_40_0 N_20 N_19_i N_22 N_36_0 \ -# N_23 N_20_i N_24 N_35_0 N_25 N_25_i N_26 N_30_0 N_27 N_26_i N_29_0 N_27_i a_decode_c_16__n \ -# N_28_0 BG_030_c_i a_decode_c_17__n pos_clk_un9_bg_030_0_n N_235_i_1 \ -# a_decode_c_18__n N_235_i_2 N_156_i_1 a_decode_c_19__n N_156_i_2 N_156_i_3 \ -# a_decode_c_20__n N_156_i_4 pos_clk_un10_sm_amiga_i_1_n a_decode_c_21__n N_176_i_1 \ -# un10_ciin_1 a_decode_c_22__n un10_ciin_2 un10_ciin_3 a_decode_c_23__n un10_ciin_4 \ -# un10_ciin_5 a_c_0__n un10_ciin_6 un10_ciin_7 a_c_1__n un10_ciin_8 SM_AMIGA_i_7_ \ -# un10_ciin_9 pos_clk_size_dma_6_0__n nEXP_SPACE_c un10_ciin_10 \ -# pos_clk_size_dma_6_1__n un10_ciin_11 N_199 BERR_c N_163_i_1 \ -# pos_clk_un21_bgack_030_int_i_0_n N_163_i_2 N_231 BG_030_c \ -# pos_clk_un21_bgack_030_int_i_0_0_1_n N_233 pos_clk_un21_bgack_030_int_i_0_0_2_n \ -# N_111 BG_000DFFreg N_138_i_1 N_112 N_138_i_2 N_113 N_59_i_1 N_114 BGACK_000_c N_59_i_2 \ -# N_115 N_233_0_1 N_245 CLK_030_c N_233_0_2 N_246 N_214_1 N_62 N_214_2 N_214_3 N_132 \ -# CLK_OSZI_c un21_fpu_cs_1 N_133 un21_berr_1_0 N_310 N_182_0_1 N_126 CLK_OUT_INTreg \ -# N_234_i_1 N_149 N_234_i_2 N_150 N_206_1 N_158 FPU_SENSE_c N_206_2 N_160 N_205_1 N_163 \ -# IPL_030DFF_0_reg N_205_2 N_172 N_352_1 N_179 IPL_030DFF_1_reg N_352_2 N_184 N_231_i_1 \ -# N_185 IPL_030DFF_2_reg N_152_i_1 N_196 N_144_i_1 N_203 ipl_c_0__n N_142_i_1 N_204 \ -# N_312_i_1 N_209 ipl_c_1__n N_236_i_1 N_214 N_148_i_1 N_215 ipl_c_2__n N_136_i_1 N_216 \ -# N_246_0_1 N_218 N_249_i_1 N_224 DTACK_c N_57_i_1 N_332 N_338_1 N_226 N_224_1 N_227 \ -# N_216_1 N_229 VPA_c N_209_1 N_337 N_203_1 N_338 N_196_1 N_265 RST_c cpu_est_0_3__un3_n \ -# N_267 cpu_est_0_3__un1_n N_268 cpu_est_0_3__un0_n N_275 RW_c rw_000_int_0_un3_n N_278 \ -# rw_000_int_0_un1_n N_282 fc_c_0__n rw_000_int_0_un0_n N_284 vma_int_0_un3_n N_340 \ -# fc_c_1__n vma_int_0_un1_n N_287 vma_int_0_un0_n N_288 cpu_est_0_1__un3_n N_291 \ -# AMIGA_BUS_DATA_DIR_c cpu_est_0_1__un1_n N_293 cpu_est_0_1__un0_n N_350 \ -# cpu_est_0_2__un3_n N_355 cpu_est_0_2__un1_n \ -# pos_clk_un21_bgack_030_int_i_0_o3_0_x2 cpu_est_0_2__un0_n pos_clk_un1_ipl_i_0_x2 \ -# N_16_i uds_000_int_0_un3_n pos_clk_un1_ipl_i_0_x2_0 N_39_0 uds_000_int_0_un1_n \ -# pos_clk_un1_ipl_i_0_x2_1 VPA_c_i uds_000_int_0_un0_n pos_clk_CYCLE_DMA_5_1_i_0_x2 \ -# N_52_0 lds_000_int_0_un3_n N_156 DTACK_c_i lds_000_int_0_un1_n N_201 N_53_0 \ -# lds_000_int_0_un0_n N_202 N_210_i bgack_030_int_0_un3_n N_154 N_211_i \ -# bgack_030_int_0_un1_n un21_berr_1 N_189_i bgack_030_int_0_un0_n N_174 \ -# un1_SM_AMIGA_0_sqmuxa_1_0 ds_000_enable_0_un3_n N_223 RW_c_i ds_000_enable_0_un1_n \ -# N_221 N_311_0 ds_000_enable_0_un0_n N_222 N_336_i size_dma_0_0__un3_n N_219 N_244_i \ -# size_dma_0_0__un1_n N_220 size_dma_0_0__un0_n pos_clk_un6_bgack_000_n N_314_0 \ -# size_dma_0_1__un3_n N_359 N_159_i size_dma_0_1__un1_n N_8 VMA_INT_i \ -# size_dma_0_1__un0_n N_14 N_352_i ipl_030_0_0__un3_n N_21 N_353_i ipl_030_0_0__un1_n \ -# N_9 N_293_i ipl_030_0_0__un0_n un1_DS_000_ENABLE_0_sqmuxa N_175_i \ -# ipl_030_0_1__un3_n N_66 N_176_i ipl_030_0_1__un1_n N_171 ipl_030_0_1__un0_n N_354 \ -# N_198_i ipl_030_0_2__un3_n N_18 N_197_i ipl_030_0_2__un1_n pos_clk_un9_clk_000_pe_n \ -# N_196_i ipl_030_0_2__un0_n cpu_est_2_1__n N_183_0 a0_dma_0_un3_n cpu_est_2_2__n \ -# N_182_0 a0_dma_0_un1_n N_197 N_180_0 a0_dma_0_un0_n N_198 N_178_0 \ -# amiga_bus_enable_dma_low_0_un3_n N_208 N_82_i amiga_bus_enable_dma_low_0_un1_n \ -# N_210 N_315_i amiga_bus_enable_dma_low_0_un0_n N_315 N_351_i \ -# amiga_bus_enable_dma_high_0_un3_n N_212 N_154_0 amiga_bus_enable_dma_high_0_un1_n \ -# N_180 N_149_i amiga_bus_enable_dma_high_0_un0_n N_213 N_207_i bg_000_0_un3_n N_178 \ -# N_228_i bg_000_0_un1_n N_228 bg_000_0_un0_n N_182 N_213_i ds_000_dma_0_un3_n N_176 \ -# N_212_i ds_000_dma_0_un1_n N_183 N_309_i ds_000_dma_0_un0_n N_351 N_357_i \ -# as_000_dma_0_un3_n N_357 cpu_est_2_0_2__n as_000_dma_0_un1_n N_206 N_208_i \ -# as_000_dma_0_un0_n N_205 N_209_i as_030_000_sync_0_un3_n N_352 cpu_est_2_0_1__n \ -# as_030_000_sync_0_un1_n N_353 N_206_i as_030_000_sync_0_un0_n N_314 N_205_i \ -# rw_000_dma_0_un3_n N_244 pos_clk_un9_clk_000_pe_0_n rw_000_dma_0_un1_n N_336 N_18_i \ -# rw_000_dma_0_un0_n N_311 N_37_0 a_decode_15__n un1_SM_AMIGA_0_sqmuxa_1 N_171_i N_211 \ -# N_354_i a_decode_14__n N_16 un1_DS_000_ENABLE_0_sqmuxa_0 \ -# un1_amiga_bus_enable_low_i N_66_0 a_decode_13__n un21_fpu_cs_i UDS_000_INT_i \ -# cpu_est_i_2__n un1_UDS_000_INT_0 a_decode_12__n cpu_est_i_0__n LDS_000_INT_i \ -# VPA_D_i un1_LDS_000_INT_0 a_decode_11__n DTACK_D0_i N_21_i cpu_est_i_3__n N_34_0 \ -# a_decode_10__n sm_amiga_i_i_7__n N_14_i sm_amiga_i_5__n N_41_0 a_decode_9__n \ -# sm_amiga_i_3__n N_8_i cpu_est_i_1__n N_42_0 a_decode_8__n clk_000_d_i_1__n \ -# a_c_i_0__n N_355_i_0 size_c_i_1__n a_decode_7__n sm_amiga_i_4__n \ -# pos_clk_un10_sm_amiga_i_n sm_amiga_i_2__n N_359_i a_decode_6__n rst_dly_i_0__n \ -# pos_clk_un6_bgack_000_0_n rst_dly_i_2__n N_220_i a_decode_5__n a_decode_i_19__n \ -# N_219_i a_decode_i_18__n a_decode_4__n a_decode_i_16__n N_222_i RW_000_i N_221_i \ -# a_decode_3__n sm_amiga_i_0__n AS_030_i N_223_i a_decode_2__n AS_000_INT_i N_224_i \ -# DSACK1_INT_i AMIGA_BUS_DATA_DIR_c_0 clk_000_d_i_0__n N_150_i sm_amiga_i_6__n \ -# N_156_i sm_amiga_i_1__n N_160_i FPU_SENSE_i N_174_i rst_dly_i_1__n N_158_i \ -# AS_030_D0_i N_201_i BGACK_030_INT_i N_202_i nEXP_SPACE_i N_203_i RESET_OUT_i +#$ PINS 75 A_DECODE_2_ A_0_ SIZE_1_ IPL_030_1_ IPL_030_0_ AHIGH_31_ IPL_1_ IPL_0_ \ +# A_DECODE_23_ FC_0_ A_1_ IPL_030_2_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 DS_030 UDS_000 \ +# LDS_000 nEXP_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI \ +# CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 DTACK AVEC SIZE_0_ E AHIGH_30_ VPA AHIGH_29_ \ +# VMA AHIGH_28_ RST AHIGH_27_ RESET AHIGH_26_ RW AHIGH_25_ AMIGA_ADDR_ENABLE AHIGH_24_ \ +# AMIGA_BUS_DATA_DIR A_DECODE_22_ AMIGA_BUS_ENABLE_LOW A_DECODE_21_ \ +# AMIGA_BUS_ENABLE_HIGH A_DECODE_20_ CIIN A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ \ +# A_DECODE_16_ A_DECODE_15_ A_DECODE_14_ A_DECODE_13_ A_DECODE_12_ A_DECODE_11_ \ +# A_DECODE_10_ A_DECODE_9_ A_DECODE_8_ A_DECODE_7_ A_DECODE_6_ A_DECODE_5_ A_DECODE_4_ \ +# A_DECODE_3_ +#$ NODES 609 clk_000_d_i_1__n VPA_D_i N_125_i a_decode_2__n VMA_INT_i N_124_i \ +# sm_amiga_i_0__n N_53_0 rst_dly_i_2__n N_134_i rst_dly_i_1__n N_270_0 rst_dly_i_0__n \ +# N_77_i DSACK1_INT_i N_87_i inst_BGACK_030_INTreg N_137_i_0 N_112_i vcc_n_n DTACK_D0_i \ +# N_113_i inst_VMA_INTreg BGACK_030_INT_i N_114_i gnd_n_n nEXP_SPACE_i \ +# un1_amiga_bus_enable_low AS_000_DMA_i N_109_i un7_as_030 RW_000_i N_108_i \ +# un1_LDS_000_INT clk_030_pe_i_1__n N_111_i un1_UDS_000_INT DS_000_DMA_0_sqmuxa_i \ +# N_265_2_0 un1_SM_AMIGA_0_sqmuxa_1 pos_clk_un4_rw_000_i_n un10_ciin AS_000_i \ +# un1_as_000_i un21_fpu_cs AMIGA_DS_i VPA_c_i un21_berr pos_clk_un3_clk_out_int_i_n \ +# N_52_0 un6_ds_030 cycle_dma_i_0__n DTACK_c_i un13_ciin cycle_dma_i_1__n N_48_0 \ +# cpu_est_1_ pos_clk_as_000_dma6_i_n un3_ahigh_i cpu_est_2_ DS_000_DMA_i \ +# pos_clk_un4_bgack_000_i_n cpu_est_3_ CLK_EXP_i pos_clk_un6_bgack_000_0_n \ +# cpu_est_0_ AMIGA_BUS_ENABLE_DMA_LOW_i N_7_i inst_AMIGA_BUS_ENABLE_DMA_HIGH \ +# ahigh_i_25__n N_41_0 inst_AMIGA_BUS_ENABLE_DMA_LOW ahigh_i_24__n \ +# pos_clk_un1_bgack_030_int_0_n inst_AS_030_D0 ahigh_i_27__n \ +# pos_clk_un12_clk_out_int_0_n inst_AS_030_000_SYNC ahigh_i_26__n pos_clk_un3_0_n \ +# inst_BGACK_030_INT_D ahigh_i_29__n pos_clk_un15_bgack_030_int_i_n inst_AS_000_DMA \ +# ahigh_i_28__n N_3_i inst_DS_000_DMA ahigh_i_31__n N_43_0 inst_VPA_D ahigh_i_30__n \ +# N_4_i CLK_000_D_3_ a_i_1__n N_42_0 inst_DTACK_D0 AMIGA_BUS_ENABLE_DMA_HIGH_i \ +# un6_amiga_bus_data_dir_i inst_RESET_OUT AS_030_D0_i un12_amiga_bus_data_dir_m_i \ +# CLK_030_PE_1_ un10_ciin_i AMIGA_BUS_DATA_DIR_c_0 inst_AMIGA_DS FPU_SENSE_i N_22_i \ +# CLK_000_D_1_ AS_030_000_SYNC_i N_31_0 CLK_000_D_0_ a_decode_i_16__n N_21_i \ +# inst_CLK_OUT_PRE_50 a_decode_i_18__n N_32_0 inst_CLK_OUT_PRE_D a_decode_i_19__n \ +# N_19_i IPL_D0_0_ N_224_i N_34_0 IPL_D0_1_ N_225_i N_18_i IPL_D0_2_ N_226_i N_35_0 \ +# CLK_000_D_2_ pos_clk_un5_bgack_030_int_d_i_n CLK_000_D_4_ \ +# pos_clk_amiga_bus_enable_dma_high_3_0_n pos_clk_un6_bg_030_n \ +# pos_clk_amiga_bus_enable_dma_low_3_0_n pos_clk_ipl_n pos_clk_rw_000_dma_3_0_n \ +# inst_LDS_000_INT un13_ciin_i UDS_000_c_i inst_DS_000_ENABLE un6_ds_030_i \ +# LDS_000_c_i inst_UDS_000_INT N_123_i N_86_i SM_AMIGA_6_ N_122_i N_129_i SM_AMIGA_4_ \ +# un7_as_030_i N_130_i SM_AMIGA_1_ AS_030_c un11_amiga_bus_enable_high_i SM_AMIGA_0_ \ +# N_117_i SIZE_DMA_0_ AS_000_c N_46_0 SIZE_DMA_1_ N_107_i CYCLE_DMA_0_ RW_000_c \ +# pos_clk_size_dma_6_0_0__n CYCLE_DMA_1_ N_106_i CLK_030_PE_0_ \ +# pos_clk_size_dma_6_0_1__n inst_RW_000_INT UDS_000_c N_16_i inst_RW_000_DMA N_254_i \ +# RST_DLY_0_ LDS_000_c N_263_i RST_DLY_1_ N_250_i RST_DLY_2_ size_c_0__n N_256_i \ +# inst_A0_DMA N_189_i pos_clk_rw_000_int_5_n size_c_1__n N_101_i inst_DSACK1_INT \ +# inst_AS_000_INT ahigh_c_24__n N_103_i SM_AMIGA_5_ N_104_i SM_AMIGA_3_ ahigh_c_25__n \ +# SM_AMIGA_2_ N_105_i ahigh_c_26__n N_115_i ahigh_c_27__n N_116_i ahigh_c_28__n N_131_i \ +# N_277_i ahigh_c_29__n N_64_0 N_91_0 ahigh_c_30__n N_159_0 N_14 N_85_i N_15 \ +# ahigh_c_31__n un1_SM_AMIGA_0_sqmuxa_1_0 N_24 RW_c_i N_25 pos_clk_rw_000_int_5_0_n \ +# clk_000_d_i_3__n N_25_i N_28_0 N_24_i N_27_0 ipl_c_i_1__n N_50_0 ipl_c_i_0__n N_49_0 \ +# N_14_i N_39_0 N_15_i N_38_0 N_91_0_1 N_91_0_2 N_91_0_3 N_265_i_1 N_266_i_1 N_266_i_2 \ +# N_138_i_1 N_148_i_1 N_144_i_1 N_142_i_1 N_140_i_1 SM_AMIGA_i_7_ \ +# pos_clk_un10_sm_amiga_i_1_n N_76 N_85_i_1 G_122 N_85_i_2 G_123 a_decode_c_16__n \ +# N_277_1 G_124 N_277_2 un1_rst_2_1 a_decode_c_17__n N_277_3 cpu_est_0_0_ N_277_4 N_64 \ +# a_decode_c_18__n N_277_5 N_122 un10_ciin_1 N_123 a_decode_c_19__n un10_ciin_2 N_132 \ +# un10_ciin_3 N_133 a_decode_c_20__n un10_ciin_4 N_274 un10_ciin_5 N_276 \ +# a_decode_c_21__n un10_ciin_6 N_77 un10_ciin_7 N_79 a_decode_c_22__n un10_ciin_8 N_78 \ +# un10_ciin_9 N_263 a_decode_c_23__n un10_ciin_10 N_108 un10_ciin_11 N_114 a_c_0__n \ +# un6_amiga_bus_data_dir_1 N_85 un6_amiga_bus_data_dir_2 N_104 a_c_1__n \ +# pos_clk_as_000_dma6_1_n N_91 pos_clk_as_000_dma6_2_n N_131 nEXP_SPACE_c \ +# DS_000_DMA_1_sqmuxa_1 N_277 pos_clk_un4_rw_000_1_n N_130 BERR_c \ +# pos_clk_un4_rw_000_2_n N_115 pos_clk_un13_clk_out_int_1_n N_116 BG_030_c N_125_1 \ +# N_105 N_116_1 N_103 BG_000DFFreg pos_clk_un29_clk_000_ne_1_1_n N_101 \ +# pos_clk_un29_clk_000_ne_1_2_n N_259 pos_clk_un29_clk_000_ne_1_3_n N_255 \ +# BGACK_000_c N_261_1 N_256 N_261_2 N_254 CLK_030_c N_262_1 N_16 N_262_2 N_106 \ +# DS_000_ENABLE_0_sqmuxa_1_1 N_86 N_259_1 N_107 CLK_OSZI_c N_250_i_1 N_117 N_189_i_1 \ +# pos_clk_a0_dma_3_n pos_clk_un6_bg_030_1_n N_129 CLK_OUT_INTreg N_108_1 \ +# pos_clk_size_dma_6_1__n N_114_1 pos_clk_size_dma_6_0__n un21_berr_1 \ +# pos_clk_rw_000_dma_3_n FPU_SENSE_c un21_fpu_cs_1 \ +# pos_clk_amiga_bus_enable_dma_low_3_n N_130_1 \ +# pos_clk_amiga_bus_enable_dma_high_3_n IPL_030DFF_0_reg N_136_i_1 \ +# SIZE_DMA_3_sqmuxa N_152_i_1 pos_clk_un5_bgack_030_int_d_n IPL_030DFF_1_reg \ +# N_146_i_1 N_18 N_267_i_1 N_19 IPL_030DFF_2_reg pos_clk_ipl_1_n N_21 bg_000_0_un3_n \ +# N_22 ipl_c_0__n bg_000_0_un1_n un6_amiga_bus_data_dir bg_000_0_un0_n \ +# un12_amiga_bus_data_dir_m ipl_c_1__n uds_000_int_0_un3_n \ +# pos_clk_un3_clk_out_int_n uds_000_int_0_un1_n N_3 ipl_c_2__n uds_000_int_0_un0_n \ +# pos_clk_as_000_dma6_n lds_000_int_0_un3_n DS_000_DMA_1_sqmuxa lds_000_int_0_un1_n \ +# N_4 DTACK_c lds_000_int_0_un0_n AS_000_DMA_1_sqmuxa ds_000_enable_0_un3_n un1_rst_2 \ +# ds_000_enable_0_un1_n G_97 ds_000_enable_0_un0_n N_199 VPA_c ipl_030_0_2__un3_n \ +# pos_clk_un13_bgack_030_int_n ipl_030_0_2__un1_n N_205 ipl_030_0_2__un0_n \ +# pos_clk_un13_clk_out_int_n RST_c vma_int_0_un3_n pos_clk_un15_bgack_030_int_n \ +# vma_int_0_un1_n pos_clk_un3_n RESET_c vma_int_0_un0_n pos_clk_un12_clk_out_int_n \ +# cpu_est_0_1__un3_n pos_clk_un1_bgack_030_int_n RW_c cpu_est_0_1__un1_n \ +# DS_000_DMA_0_sqmuxa cpu_est_0_1__un0_n un1_rst_3 fc_c_0__n cpu_est_0_2__un3_n G_95 \ +# cpu_est_0_2__un1_n G_101 fc_c_1__n cpu_est_0_2__un0_n G_103 cpu_est_0_3__un3_n \ +# pos_clk_un4_rw_000_n cpu_est_0_3__un1_n N_7 AMIGA_BUS_DATA_DIR_c \ +# cpu_est_0_3__un0_n pos_clk_un6_bgack_000_n pos_clk_un31_clk_000_ne_1_i_m2_un3_n \ +# pos_clk_un4_bgack_000_n pos_clk_un31_clk_000_ne_1_i_m2_un1_n N_265_2 \ +# pos_clk_un31_clk_000_ne_1_i_m2_un0_n N_111 bgack_030_int_0_un3_n N_109 BG_030_c_i \ +# bgack_030_int_0_un1_n N_113 pos_clk_un6_bg_030_i_n bgack_030_int_0_un0_n N_112 \ +# pos_clk_un9_bg_030_0_n ds_000_dma_0_un3_n N_98 UDS_000_INT_i ds_000_dma_0_un1_n \ +# pos_clk_un29_clk_000_ne_1_n un1_UDS_000_INT_0 ds_000_dma_0_un0_n N_87 \ +# LDS_000_INT_i as_000_dma_0_un3_n N_270 un1_LDS_000_INT_0 as_000_dma_0_un1_n N_134 \ +# N_23_i as_000_dma_0_un0_n N_125 N_30_0 size_dma_0_1__un3_n N_124 N_20_i \ +# size_dma_0_1__un1_n N_121 N_33_0 size_dma_0_1__un0_n N_120 N_13_i \ +# size_dma_0_0__un3_n N_137 N_40_0 size_dma_0_0__un1_n pos_clk_un31_clk_000_ne_n \ +# ipl_c_i_2__n size_dma_0_0__un0_n N_17 N_51_0 amiga_bus_enable_dma_high_0_un3_n \ +# pos_clk_un9_clk_000_pe_n N_26_i amiga_bus_enable_dma_high_0_un1_n cpu_est_2_1__n \ +# N_29_0 amiga_bus_enable_dma_high_0_un0_n cpu_est_2_2__n a_c_i_0__n \ +# amiga_bus_enable_dma_low_0_un3_n N_261 size_c_i_1__n \ +# amiga_bus_enable_dma_low_0_un1_n N_262 pos_clk_un10_sm_amiga_i_n \ +# amiga_bus_enable_dma_low_0_un0_n N_251 DS_000_ENABLE_0_sqmuxa_1_i a0_dma_0_un3_n \ +# N_252 un1_DS_000_ENABLE_0_sqmuxa_i a0_dma_0_un1_n N_258 N_157_i a0_dma_0_un0_n N_257 \ +# N_160_0 rw_000_dma_0_un3_n DS_000_ENABLE_1_sqmuxa N_161_0 rw_000_dma_0_un1_n \ +# un1_DS_000_ENABLE_0_sqmuxa N_162_0 rw_000_dma_0_un0_n N_102 N_165_i \ +# ipl_030_0_0__un3_n N_118 ipl_030_0_0__un1_n N_119 N_167_i ipl_030_0_0__un0_n N_264 \ +# N_166_i ipl_030_0_1__un3_n DS_000_ENABLE_0_sqmuxa_1 ipl_030_0_1__un1_n N_164 \ +# N_168_i ipl_030_0_1__un0_n N_170 as_030_000_sync_0_un3_n N_168 N_170_i \ +# as_030_000_sync_0_un1_n N_166 as_030_000_sync_0_un0_n N_167 N_164_i \ +# rw_000_int_0_un3_n N_165 rw_000_int_0_un1_n N_162 N_102_i rw_000_int_0_un0_n N_161 \ +# N_264_i a_decode_15__n N_160 N_79_i N_157 N_78_i a_decode_14__n N_26 N_119_i N_13 \ +# N_118_i a_decode_13__n N_20 N_23 N_255_i a_decode_12__n N_8 N_257_i \ +# pos_clk_un9_bg_030_n cpu_est_2_0_2__n a_decode_11__n un1_amiga_bus_enable_low_i \ +# N_258_i un21_fpu_cs_i N_259_i a_decode_10__n sm_amiga_i_2__n cpu_est_2_0_1__n \ +# sm_amiga_i_1__n N_262_i a_decode_9__n sm_amiga_i_3__n N_261_i sm_amiga_i_4__n \ +# pos_clk_un9_clk_000_pe_0_n a_decode_8__n sm_amiga_i_6__n N_251_i sm_amiga_i_5__n \ +# N_252_0 a_decode_7__n clk_000_d_i_0__n N_76_i AS_000_INT_i N_17_i a_decode_6__n \ +# sm_amiga_i_i_7__n N_36_0 AS_030_i N_98_i a_decode_5__n cpu_est_i_2__n \ +# pos_clk_un31_clk_000_ne_i_n cpu_est_i_0__n N_228_i a_decode_4__n cpu_est_i_3__n \ +# N_121_i cpu_est_i_1__n N_120_i a_decode_3__n .model bus68030 .inputs A_DECODE_23_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF \ -BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF \ -DTACK.BLIF VPA.BLIF RST.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF \ -A_DECODE_20_.BLIF A_DECODE_19_.BLIF A_DECODE_18_.BLIF A_DECODE_17_.BLIF \ -A_DECODE_16_.BLIF A_DECODE_15_.BLIF A_DECODE_14_.BLIF A_DECODE_13_.BLIF \ -A_DECODE_12_.BLIF A_DECODE_11_.BLIF A_DECODE_10_.BLIF A_DECODE_9_.BLIF \ -A_DECODE_8_.BLIF A_DECODE_7_.BLIF A_DECODE_6_.BLIF A_DECODE_5_.BLIF \ -A_DECODE_4_.BLIF A_DECODE_3_.BLIF A_DECODE_2_.BLIF IPL_1_.BLIF IPL_0_.BLIF \ -FC_0_.BLIF A_1_.BLIF SIZE_1_.BLIF AHIGH_31_.BLIF AS_030.BLIF AS_000.BLIF \ -RW_000.BLIF UDS_000.BLIF LDS_000.BLIF BERR.BLIF RW.BLIF SIZE_0_.BLIF \ -AHIGH_30_.BLIF AHIGH_29_.BLIF AHIGH_28_.BLIF AHIGH_27_.BLIF AHIGH_26_.BLIF \ -AHIGH_25_.BLIF AHIGH_24_.BLIF A_0_.BLIF ipl_i_2__n.BLIF N_233_0.BLIF \ -ipl_i_1__n.BLIF N_360_i.BLIF ipl_i_0__n.BLIF N_191_i_i.BLIF a_i_1__n.BLIF \ -N_192_i_i.BLIF AS_000_DMA_i.BLIF AS_000_i.BLIF N_199_i.BLIF CLK_030_H_i.BLIF \ -N_204_i.BLIF AS_030_000_SYNC_i.BLIF inst_BGACK_030_INTreg.BLIF \ -AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF N_282_i.BLIF vcc_n_n.BLIF \ -cycle_dma_i_0__n.BLIF N_278_i.BLIF inst_VMA_INTreg.BLIF ahigh_i_30__n.BLIF \ -N_186_i.BLIF gnd_n_n.BLIF ahigh_i_31__n.BLIF N_185_i.BLIF \ -un1_amiga_bus_enable_low.BLIF ahigh_i_28__n.BLIF CLK_030_c_i.BLIF \ -un7_as_030.BLIF ahigh_i_29__n.BLIF N_184_0.BLIF un1_LDS_000_INT.BLIF \ -ahigh_i_26__n.BLIF N_179_0.BLIF un1_UDS_000_INT.BLIF ahigh_i_27__n.BLIF \ -N_251_i.BLIF un10_ciin.BLIF ahigh_i_24__n.BLIF LDS_000_c_i.BLIF \ -un21_fpu_cs.BLIF ahigh_i_25__n.BLIF UDS_000_c_i.BLIF un21_berr.BLIF \ -N_172_i.BLIF un6_ds_030.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF \ -cpu_est_2_.BLIF N_163_i.BLIF cpu_est_3_.BLIF clk_000_d_i_3__n.BLIF \ -cpu_est_0_.BLIF N_115_i.BLIF N_350_i.BLIF cpu_est_1_.BLIF N_114_i.BLIF \ -un1_rw_i.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF un6_ds_030_i.BLIF \ -N_126_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF DS_000_DMA_i.BLIF N_313_i.BLIF \ -inst_AS_030_D0.BLIF N_132_i.BLIF N_231_i.BLIF inst_AS_030_000_SYNC.BLIF \ -N_133_i.BLIF N_291_i.BLIF inst_BGACK_030_INT_D.BLIF un7_as_030_i.BLIF \ -inst_AS_000_DMA.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF N_288_i.BLIF \ -inst_DS_000_DMA.BLIF AS_030_c.BLIF CYCLE_DMA_0_.BLIF N_287_i.BLIF \ -CYCLE_DMA_1_.BLIF AS_000_c.BLIF N_340_i.BLIF inst_VPA_D.BLIF CLK_000_D_3_.BLIF \ -RW_000_c.BLIF N_284_i.BLIF inst_DTACK_D0.BLIF inst_RESET_OUT.BLIF N_275_i.BLIF \ -CLK_000_D_1_.BLIF UDS_000_c.BLIF pos_clk_size_dma_6_0_1__n.BLIF \ -CLK_000_D_0_.BLIF N_268_i.BLIF inst_CLK_OUT_PRE_50.BLIF LDS_000_c.BLIF \ -pos_clk_size_dma_6_0_0__n.BLIF inst_CLK_OUT_PRE_D.BLIF N_265_i.BLIF \ -IPL_D0_0_.BLIF size_c_0__n.BLIF N_267_i.BLIF IPL_D0_1_.BLIF IPL_D0_2_.BLIF \ -size_c_1__n.BLIF N_337_i.BLIF CLK_000_D_2_.BLIF N_338_i.BLIF CLK_000_D_4_.BLIF \ -ahigh_c_24__n.BLIF N_55_0.BLIF inst_LDS_000_INT.BLIF un1_as_000_i.BLIF \ -inst_DS_000_ENABLE.BLIF ahigh_c_25__n.BLIF N_245_0.BLIF inst_UDS_000_INT.BLIF \ -N_229_i.BLIF pos_clk_un9_bg_030_n.BLIF ahigh_c_26__n.BLIF SM_AMIGA_6_.BLIF \ -N_227_i.BLIF SM_AMIGA_4_.BLIF ahigh_c_27__n.BLIF SM_AMIGA_1_.BLIF N_226_i.BLIF \ -SM_AMIGA_0_.BLIF ahigh_c_28__n.BLIF N_246_0.BLIF SIZE_DMA_0_.BLIF N_332_i.BLIF \ -SIZE_DMA_1_.BLIF ahigh_c_29__n.BLIF pos_clk_ds_000_dma_4_0_n.BLIF \ -inst_RW_000_INT.BLIF N_48_0.BLIF inst_RW_000_DMA.BLIF ahigh_c_30__n.BLIF \ -pos_clk_rw_000_dma_3_0_n.BLIF RST_DLY_0_.BLIF N_218_i.BLIF RST_DLY_1_.BLIF \ -ahigh_c_31__n.BLIF RST_DLY_2_.BLIF inst_A0_DMA.BLIF un10_ciin_i.BLIF \ -pos_clk_a0_dma_3_n.BLIF N_62_0.BLIF pos_clk_rw_000_dma_3_n.BLIF N_215_i.BLIF \ -inst_CLK_030_H.BLIF N_216_i.BLIF inst_DSACK1_INT.BLIF \ -un10_amiga_bus_enable_high_i.BLIF inst_AS_000_INT.BLIF N_214_i.BLIF \ -SM_AMIGA_5_.BLIF N_310_0.BLIF SM_AMIGA_3_.BLIF N_24_i.BLIF SM_AMIGA_2_.BLIF \ -N_33_0.BLIF pos_clk_ds_000_dma_4_n.BLIF N_23_i.BLIF N_3.BLIF N_32_0.BLIF \ -N_4.BLIF N_22_i.BLIF N_31_0.BLIF N_3_i.BLIF N_45_0.BLIF N_4_i.BLIF N_44_0.BLIF \ -N_15.BLIF N_15_i.BLIF N_19.BLIF N_40_0.BLIF N_20.BLIF N_19_i.BLIF N_22.BLIF \ -N_36_0.BLIF N_23.BLIF N_20_i.BLIF N_24.BLIF N_35_0.BLIF N_25.BLIF N_25_i.BLIF \ -N_26.BLIF N_30_0.BLIF N_27.BLIF N_26_i.BLIF N_29_0.BLIF N_27_i.BLIF \ -a_decode_c_16__n.BLIF N_28_0.BLIF BG_030_c_i.BLIF a_decode_c_17__n.BLIF \ -pos_clk_un9_bg_030_0_n.BLIF N_235_i_1.BLIF a_decode_c_18__n.BLIF \ -N_235_i_2.BLIF N_156_i_1.BLIF a_decode_c_19__n.BLIF N_156_i_2.BLIF \ -N_156_i_3.BLIF a_decode_c_20__n.BLIF N_156_i_4.BLIF \ -pos_clk_un10_sm_amiga_i_1_n.BLIF a_decode_c_21__n.BLIF N_176_i_1.BLIF \ -un10_ciin_1.BLIF a_decode_c_22__n.BLIF un10_ciin_2.BLIF un10_ciin_3.BLIF \ -a_decode_c_23__n.BLIF un10_ciin_4.BLIF un10_ciin_5.BLIF a_c_0__n.BLIF \ -un10_ciin_6.BLIF un10_ciin_7.BLIF a_c_1__n.BLIF un10_ciin_8.BLIF \ -SM_AMIGA_i_7_.BLIF un10_ciin_9.BLIF pos_clk_size_dma_6_0__n.BLIF \ -nEXP_SPACE_c.BLIF un10_ciin_10.BLIF pos_clk_size_dma_6_1__n.BLIF \ -un10_ciin_11.BLIF N_199.BLIF BERR_c.BLIF N_163_i_1.BLIF \ -pos_clk_un21_bgack_030_int_i_0_n.BLIF N_163_i_2.BLIF N_231.BLIF BG_030_c.BLIF \ -pos_clk_un21_bgack_030_int_i_0_0_1_n.BLIF N_233.BLIF \ -pos_clk_un21_bgack_030_int_i_0_0_2_n.BLIF N_111.BLIF BG_000DFFreg.BLIF \ -N_138_i_1.BLIF N_112.BLIF N_138_i_2.BLIF N_113.BLIF N_59_i_1.BLIF N_114.BLIF \ -BGACK_000_c.BLIF N_59_i_2.BLIF N_115.BLIF N_233_0_1.BLIF N_245.BLIF \ -CLK_030_c.BLIF N_233_0_2.BLIF N_246.BLIF N_214_1.BLIF N_62.BLIF N_214_2.BLIF \ -N_214_3.BLIF N_132.BLIF CLK_OSZI_c.BLIF un21_fpu_cs_1.BLIF N_133.BLIF \ -un21_berr_1_0.BLIF N_310.BLIF N_182_0_1.BLIF N_126.BLIF CLK_OUT_INTreg.BLIF \ -N_234_i_1.BLIF N_149.BLIF N_234_i_2.BLIF N_150.BLIF N_206_1.BLIF N_158.BLIF \ -FPU_SENSE_c.BLIF N_206_2.BLIF N_160.BLIF N_205_1.BLIF N_163.BLIF \ -IPL_030DFF_0_reg.BLIF N_205_2.BLIF N_172.BLIF N_352_1.BLIF N_179.BLIF \ -IPL_030DFF_1_reg.BLIF N_352_2.BLIF N_184.BLIF N_231_i_1.BLIF N_185.BLIF \ -IPL_030DFF_2_reg.BLIF N_152_i_1.BLIF N_196.BLIF N_144_i_1.BLIF N_203.BLIF \ -ipl_c_0__n.BLIF N_142_i_1.BLIF N_204.BLIF N_312_i_1.BLIF N_209.BLIF \ -ipl_c_1__n.BLIF N_236_i_1.BLIF N_214.BLIF N_148_i_1.BLIF N_215.BLIF \ -ipl_c_2__n.BLIF N_136_i_1.BLIF N_216.BLIF N_246_0_1.BLIF N_218.BLIF \ -N_249_i_1.BLIF N_224.BLIF DTACK_c.BLIF N_57_i_1.BLIF N_332.BLIF N_338_1.BLIF \ -N_226.BLIF N_224_1.BLIF N_227.BLIF N_216_1.BLIF N_229.BLIF VPA_c.BLIF \ -N_209_1.BLIF N_337.BLIF N_203_1.BLIF N_338.BLIF N_196_1.BLIF N_265.BLIF \ -RST_c.BLIF cpu_est_0_3__un3_n.BLIF N_267.BLIF cpu_est_0_3__un1_n.BLIF \ -N_268.BLIF cpu_est_0_3__un0_n.BLIF N_275.BLIF RW_c.BLIF \ -rw_000_int_0_un3_n.BLIF N_278.BLIF rw_000_int_0_un1_n.BLIF N_282.BLIF \ -fc_c_0__n.BLIF rw_000_int_0_un0_n.BLIF N_284.BLIF vma_int_0_un3_n.BLIF \ -N_340.BLIF fc_c_1__n.BLIF vma_int_0_un1_n.BLIF N_287.BLIF vma_int_0_un0_n.BLIF \ -N_288.BLIF cpu_est_0_1__un3_n.BLIF N_291.BLIF AMIGA_BUS_DATA_DIR_c.BLIF \ -cpu_est_0_1__un1_n.BLIF N_293.BLIF cpu_est_0_1__un0_n.BLIF N_350.BLIF \ -cpu_est_0_2__un3_n.BLIF N_355.BLIF cpu_est_0_2__un1_n.BLIF \ -pos_clk_un21_bgack_030_int_i_0_o3_0_x2.BLIF cpu_est_0_2__un0_n.BLIF \ -pos_clk_un1_ipl_i_0_x2.BLIF N_16_i.BLIF uds_000_int_0_un3_n.BLIF \ -pos_clk_un1_ipl_i_0_x2_0.BLIF N_39_0.BLIF uds_000_int_0_un1_n.BLIF \ -pos_clk_un1_ipl_i_0_x2_1.BLIF VPA_c_i.BLIF uds_000_int_0_un0_n.BLIF \ -pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF N_52_0.BLIF lds_000_int_0_un3_n.BLIF \ -N_156.BLIF DTACK_c_i.BLIF lds_000_int_0_un1_n.BLIF N_201.BLIF N_53_0.BLIF \ -lds_000_int_0_un0_n.BLIF N_202.BLIF N_210_i.BLIF bgack_030_int_0_un3_n.BLIF \ -N_154.BLIF N_211_i.BLIF bgack_030_int_0_un1_n.BLIF un21_berr_1.BLIF \ -N_189_i.BLIF bgack_030_int_0_un0_n.BLIF N_174.BLIF \ -un1_SM_AMIGA_0_sqmuxa_1_0.BLIF ds_000_enable_0_un3_n.BLIF N_223.BLIF \ -RW_c_i.BLIF ds_000_enable_0_un1_n.BLIF N_221.BLIF N_311_0.BLIF \ -ds_000_enable_0_un0_n.BLIF N_222.BLIF N_336_i.BLIF size_dma_0_0__un3_n.BLIF \ -N_219.BLIF N_244_i.BLIF size_dma_0_0__un1_n.BLIF N_220.BLIF \ -size_dma_0_0__un0_n.BLIF pos_clk_un6_bgack_000_n.BLIF N_314_0.BLIF \ -size_dma_0_1__un3_n.BLIF N_359.BLIF N_159_i.BLIF size_dma_0_1__un1_n.BLIF \ -N_8.BLIF VMA_INT_i.BLIF size_dma_0_1__un0_n.BLIF N_14.BLIF N_352_i.BLIF \ -ipl_030_0_0__un3_n.BLIF N_21.BLIF N_353_i.BLIF ipl_030_0_0__un1_n.BLIF \ -N_9.BLIF N_293_i.BLIF ipl_030_0_0__un0_n.BLIF un1_DS_000_ENABLE_0_sqmuxa.BLIF \ -N_175_i.BLIF ipl_030_0_1__un3_n.BLIF N_66.BLIF N_176_i.BLIF \ -ipl_030_0_1__un1_n.BLIF N_171.BLIF ipl_030_0_1__un0_n.BLIF N_354.BLIF \ -N_198_i.BLIF ipl_030_0_2__un3_n.BLIF N_18.BLIF N_197_i.BLIF \ -ipl_030_0_2__un1_n.BLIF pos_clk_un9_clk_000_pe_n.BLIF N_196_i.BLIF \ -ipl_030_0_2__un0_n.BLIF cpu_est_2_1__n.BLIF N_183_0.BLIF a0_dma_0_un3_n.BLIF \ -cpu_est_2_2__n.BLIF N_182_0.BLIF a0_dma_0_un1_n.BLIF N_197.BLIF N_180_0.BLIF \ -a0_dma_0_un0_n.BLIF N_198.BLIF N_178_0.BLIF \ -amiga_bus_enable_dma_low_0_un3_n.BLIF N_208.BLIF N_82_i.BLIF \ -amiga_bus_enable_dma_low_0_un1_n.BLIF N_210.BLIF N_315_i.BLIF \ -amiga_bus_enable_dma_low_0_un0_n.BLIF N_315.BLIF N_351_i.BLIF \ -amiga_bus_enable_dma_high_0_un3_n.BLIF N_212.BLIF N_154_0.BLIF \ -amiga_bus_enable_dma_high_0_un1_n.BLIF N_180.BLIF N_149_i.BLIF \ -amiga_bus_enable_dma_high_0_un0_n.BLIF N_213.BLIF N_207_i.BLIF \ -bg_000_0_un3_n.BLIF N_178.BLIF N_228_i.BLIF bg_000_0_un1_n.BLIF N_228.BLIF \ -bg_000_0_un0_n.BLIF N_182.BLIF N_213_i.BLIF ds_000_dma_0_un3_n.BLIF N_176.BLIF \ -N_212_i.BLIF ds_000_dma_0_un1_n.BLIF N_183.BLIF N_309_i.BLIF \ -ds_000_dma_0_un0_n.BLIF N_351.BLIF N_357_i.BLIF as_000_dma_0_un3_n.BLIF \ -N_357.BLIF cpu_est_2_0_2__n.BLIF as_000_dma_0_un1_n.BLIF N_206.BLIF \ -N_208_i.BLIF as_000_dma_0_un0_n.BLIF N_205.BLIF N_209_i.BLIF \ -as_030_000_sync_0_un3_n.BLIF N_352.BLIF cpu_est_2_0_1__n.BLIF \ -as_030_000_sync_0_un1_n.BLIF N_353.BLIF N_206_i.BLIF \ -as_030_000_sync_0_un0_n.BLIF N_314.BLIF N_205_i.BLIF rw_000_dma_0_un3_n.BLIF \ -N_244.BLIF pos_clk_un9_clk_000_pe_0_n.BLIF rw_000_dma_0_un1_n.BLIF N_336.BLIF \ -N_18_i.BLIF rw_000_dma_0_un0_n.BLIF N_311.BLIF N_37_0.BLIF a_decode_15__n.BLIF \ -un1_SM_AMIGA_0_sqmuxa_1.BLIF N_171_i.BLIF N_211.BLIF N_354_i.BLIF \ -a_decode_14__n.BLIF N_16.BLIF un1_DS_000_ENABLE_0_sqmuxa_0.BLIF \ -un1_amiga_bus_enable_low_i.BLIF N_66_0.BLIF a_decode_13__n.BLIF \ -un21_fpu_cs_i.BLIF UDS_000_INT_i.BLIF cpu_est_i_2__n.BLIF \ -un1_UDS_000_INT_0.BLIF a_decode_12__n.BLIF cpu_est_i_0__n.BLIF \ -LDS_000_INT_i.BLIF VPA_D_i.BLIF un1_LDS_000_INT_0.BLIF a_decode_11__n.BLIF \ -DTACK_D0_i.BLIF N_21_i.BLIF cpu_est_i_3__n.BLIF N_34_0.BLIF \ -a_decode_10__n.BLIF sm_amiga_i_i_7__n.BLIF N_14_i.BLIF sm_amiga_i_5__n.BLIF \ -N_41_0.BLIF a_decode_9__n.BLIF sm_amiga_i_3__n.BLIF N_8_i.BLIF \ -cpu_est_i_1__n.BLIF N_42_0.BLIF a_decode_8__n.BLIF clk_000_d_i_1__n.BLIF \ -a_c_i_0__n.BLIF N_355_i_0.BLIF size_c_i_1__n.BLIF a_decode_7__n.BLIF \ -sm_amiga_i_4__n.BLIF pos_clk_un10_sm_amiga_i_n.BLIF sm_amiga_i_2__n.BLIF \ -N_359_i.BLIF a_decode_6__n.BLIF rst_dly_i_0__n.BLIF \ -pos_clk_un6_bgack_000_0_n.BLIF rst_dly_i_2__n.BLIF N_220_i.BLIF \ -a_decode_5__n.BLIF a_decode_i_19__n.BLIF N_219_i.BLIF a_decode_i_18__n.BLIF \ -a_decode_4__n.BLIF a_decode_i_16__n.BLIF N_222_i.BLIF RW_000_i.BLIF \ -N_221_i.BLIF a_decode_3__n.BLIF sm_amiga_i_0__n.BLIF AS_030_i.BLIF \ -N_223_i.BLIF a_decode_2__n.BLIF AS_000_INT_i.BLIF N_224_i.BLIF \ -DSACK1_INT_i.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF clk_000_d_i_0__n.BLIF \ -N_150_i.BLIF sm_amiga_i_6__n.BLIF N_156_i.BLIF sm_amiga_i_1__n.BLIF \ -N_160_i.BLIF FPU_SENSE_i.BLIF N_174_i.BLIF rst_dly_i_1__n.BLIF N_158_i.BLIF \ -AS_030_D0_i.BLIF N_201_i.BLIF BGACK_030_INT_i.BLIF N_202_i.BLIF \ -nEXP_SPACE_i.BLIF N_203_i.BLIF RESET_OUT_i.BLIF AS_030.PIN.BLIF \ -AS_000.PIN.BLIF RW_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ -SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF AHIGH_24_.PIN.BLIF AHIGH_25_.PIN.BLIF \ -AHIGH_26_.PIN.BLIF AHIGH_27_.PIN.BLIF AHIGH_28_.PIN.BLIF AHIGH_29_.PIN.BLIF \ -AHIGH_30_.PIN.BLIF AHIGH_31_.PIN.BLIF A_0_.PIN.BLIF BERR.PIN.BLIF RW.PIN.BLIF +BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF VPA.BLIF \ +RST.BLIF RESET.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF A_DECODE_20_.BLIF \ +A_DECODE_19_.BLIF A_DECODE_18_.BLIF A_DECODE_17_.BLIF A_DECODE_16_.BLIF \ +A_DECODE_15_.BLIF A_DECODE_14_.BLIF A_DECODE_13_.BLIF A_DECODE_12_.BLIF \ +A_DECODE_11_.BLIF A_DECODE_10_.BLIF A_DECODE_9_.BLIF A_DECODE_8_.BLIF \ +A_DECODE_7_.BLIF A_DECODE_6_.BLIF A_DECODE_5_.BLIF A_DECODE_4_.BLIF \ +A_DECODE_3_.BLIF A_DECODE_2_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF A_1_.BLIF \ +SIZE_1_.BLIF AHIGH_31_.BLIF AS_030.BLIF AS_000.BLIF RW_000.BLIF UDS_000.BLIF \ +LDS_000.BLIF BERR.BLIF DTACK.BLIF RW.BLIF SIZE_0_.BLIF AHIGH_30_.BLIF \ +AHIGH_29_.BLIF AHIGH_28_.BLIF AHIGH_27_.BLIF AHIGH_26_.BLIF AHIGH_25_.BLIF \ +AHIGH_24_.BLIF A_0_.BLIF clk_000_d_i_1__n.BLIF VPA_D_i.BLIF N_125_i.BLIF \ +a_decode_2__n.BLIF VMA_INT_i.BLIF N_124_i.BLIF sm_amiga_i_0__n.BLIF \ +N_53_0.BLIF rst_dly_i_2__n.BLIF N_134_i.BLIF rst_dly_i_1__n.BLIF N_270_0.BLIF \ +rst_dly_i_0__n.BLIF N_77_i.BLIF DSACK1_INT_i.BLIF N_87_i.BLIF \ +inst_BGACK_030_INTreg.BLIF N_137_i_0.BLIF N_112_i.BLIF vcc_n_n.BLIF \ +DTACK_D0_i.BLIF N_113_i.BLIF inst_VMA_INTreg.BLIF BGACK_030_INT_i.BLIF \ +N_114_i.BLIF gnd_n_n.BLIF nEXP_SPACE_i.BLIF un1_amiga_bus_enable_low.BLIF \ +AS_000_DMA_i.BLIF N_109_i.BLIF un7_as_030.BLIF RW_000_i.BLIF N_108_i.BLIF \ +un1_LDS_000_INT.BLIF clk_030_pe_i_1__n.BLIF N_111_i.BLIF un1_UDS_000_INT.BLIF \ +DS_000_DMA_0_sqmuxa_i.BLIF N_265_2_0.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF \ +pos_clk_un4_rw_000_i_n.BLIF un10_ciin.BLIF AS_000_i.BLIF un1_as_000_i.BLIF \ +un21_fpu_cs.BLIF AMIGA_DS_i.BLIF VPA_c_i.BLIF un21_berr.BLIF \ +pos_clk_un3_clk_out_int_i_n.BLIF N_52_0.BLIF un6_ds_030.BLIF \ +cycle_dma_i_0__n.BLIF DTACK_c_i.BLIF un13_ciin.BLIF cycle_dma_i_1__n.BLIF \ +N_48_0.BLIF cpu_est_1_.BLIF pos_clk_as_000_dma6_i_n.BLIF un3_ahigh_i.BLIF \ +cpu_est_2_.BLIF DS_000_DMA_i.BLIF pos_clk_un4_bgack_000_i_n.BLIF \ +cpu_est_3_.BLIF CLK_EXP_i.BLIF pos_clk_un6_bgack_000_0_n.BLIF cpu_est_0_.BLIF \ +AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF N_7_i.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF \ +ahigh_i_25__n.BLIF N_41_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF \ +ahigh_i_24__n.BLIF pos_clk_un1_bgack_030_int_0_n.BLIF inst_AS_030_D0.BLIF \ +ahigh_i_27__n.BLIF pos_clk_un12_clk_out_int_0_n.BLIF inst_AS_030_000_SYNC.BLIF \ +ahigh_i_26__n.BLIF pos_clk_un3_0_n.BLIF inst_BGACK_030_INT_D.BLIF \ +ahigh_i_29__n.BLIF pos_clk_un15_bgack_030_int_i_n.BLIF inst_AS_000_DMA.BLIF \ +ahigh_i_28__n.BLIF N_3_i.BLIF inst_DS_000_DMA.BLIF ahigh_i_31__n.BLIF \ +N_43_0.BLIF inst_VPA_D.BLIF ahigh_i_30__n.BLIF N_4_i.BLIF CLK_000_D_3_.BLIF \ +a_i_1__n.BLIF N_42_0.BLIF inst_DTACK_D0.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF \ +un6_amiga_bus_data_dir_i.BLIF inst_RESET_OUT.BLIF AS_030_D0_i.BLIF \ +un12_amiga_bus_data_dir_m_i.BLIF CLK_030_PE_1_.BLIF un10_ciin_i.BLIF \ +AMIGA_BUS_DATA_DIR_c_0.BLIF inst_AMIGA_DS.BLIF FPU_SENSE_i.BLIF N_22_i.BLIF \ +CLK_000_D_1_.BLIF AS_030_000_SYNC_i.BLIF N_31_0.BLIF CLK_000_D_0_.BLIF \ +a_decode_i_16__n.BLIF N_21_i.BLIF inst_CLK_OUT_PRE_50.BLIF \ +a_decode_i_18__n.BLIF N_32_0.BLIF inst_CLK_OUT_PRE_D.BLIF \ +a_decode_i_19__n.BLIF N_19_i.BLIF IPL_D0_0_.BLIF N_224_i.BLIF N_34_0.BLIF \ +IPL_D0_1_.BLIF N_225_i.BLIF N_18_i.BLIF IPL_D0_2_.BLIF N_226_i.BLIF \ +N_35_0.BLIF CLK_000_D_2_.BLIF pos_clk_un5_bgack_030_int_d_i_n.BLIF \ +CLK_000_D_4_.BLIF pos_clk_amiga_bus_enable_dma_high_3_0_n.BLIF \ +pos_clk_un6_bg_030_n.BLIF pos_clk_amiga_bus_enable_dma_low_3_0_n.BLIF \ +pos_clk_ipl_n.BLIF pos_clk_rw_000_dma_3_0_n.BLIF inst_LDS_000_INT.BLIF \ +un13_ciin_i.BLIF UDS_000_c_i.BLIF inst_DS_000_ENABLE.BLIF un6_ds_030_i.BLIF \ +LDS_000_c_i.BLIF inst_UDS_000_INT.BLIF N_123_i.BLIF N_86_i.BLIF \ +SM_AMIGA_6_.BLIF N_122_i.BLIF N_129_i.BLIF SM_AMIGA_4_.BLIF un7_as_030_i.BLIF \ +N_130_i.BLIF SM_AMIGA_1_.BLIF AS_030_c.BLIF un11_amiga_bus_enable_high_i.BLIF \ +SM_AMIGA_0_.BLIF N_117_i.BLIF SIZE_DMA_0_.BLIF AS_000_c.BLIF N_46_0.BLIF \ +SIZE_DMA_1_.BLIF N_107_i.BLIF CYCLE_DMA_0_.BLIF RW_000_c.BLIF \ +pos_clk_size_dma_6_0_0__n.BLIF CYCLE_DMA_1_.BLIF N_106_i.BLIF \ +CLK_030_PE_0_.BLIF pos_clk_size_dma_6_0_1__n.BLIF inst_RW_000_INT.BLIF \ +UDS_000_c.BLIF N_16_i.BLIF inst_RW_000_DMA.BLIF N_254_i.BLIF RST_DLY_0_.BLIF \ +LDS_000_c.BLIF N_263_i.BLIF RST_DLY_1_.BLIF N_250_i.BLIF RST_DLY_2_.BLIF \ +size_c_0__n.BLIF N_256_i.BLIF inst_A0_DMA.BLIF N_189_i.BLIF \ +pos_clk_rw_000_int_5_n.BLIF size_c_1__n.BLIF N_101_i.BLIF inst_DSACK1_INT.BLIF \ +inst_AS_000_INT.BLIF ahigh_c_24__n.BLIF N_103_i.BLIF SM_AMIGA_5_.BLIF \ +N_104_i.BLIF SM_AMIGA_3_.BLIF ahigh_c_25__n.BLIF SM_AMIGA_2_.BLIF N_105_i.BLIF \ +ahigh_c_26__n.BLIF N_115_i.BLIF ahigh_c_27__n.BLIF N_116_i.BLIF \ +ahigh_c_28__n.BLIF N_131_i.BLIF N_277_i.BLIF ahigh_c_29__n.BLIF N_64_0.BLIF \ +N_91_0.BLIF ahigh_c_30__n.BLIF N_159_0.BLIF N_14.BLIF N_85_i.BLIF N_15.BLIF \ +ahigh_c_31__n.BLIF un1_SM_AMIGA_0_sqmuxa_1_0.BLIF N_24.BLIF RW_c_i.BLIF \ +N_25.BLIF pos_clk_rw_000_int_5_0_n.BLIF clk_000_d_i_3__n.BLIF N_25_i.BLIF \ +N_28_0.BLIF N_24_i.BLIF N_27_0.BLIF ipl_c_i_1__n.BLIF N_50_0.BLIF \ +ipl_c_i_0__n.BLIF N_49_0.BLIF N_14_i.BLIF N_39_0.BLIF N_15_i.BLIF N_38_0.BLIF \ +N_91_0_1.BLIF N_91_0_2.BLIF N_91_0_3.BLIF N_265_i_1.BLIF N_266_i_1.BLIF \ +N_266_i_2.BLIF N_138_i_1.BLIF N_148_i_1.BLIF N_144_i_1.BLIF N_142_i_1.BLIF \ +N_140_i_1.BLIF SM_AMIGA_i_7_.BLIF pos_clk_un10_sm_amiga_i_1_n.BLIF N_76.BLIF \ +N_85_i_1.BLIF G_122.BLIF N_85_i_2.BLIF G_123.BLIF a_decode_c_16__n.BLIF \ +N_277_1.BLIF G_124.BLIF N_277_2.BLIF un1_rst_2_1.BLIF a_decode_c_17__n.BLIF \ +N_277_3.BLIF cpu_est_0_0_.BLIF N_277_4.BLIF N_64.BLIF a_decode_c_18__n.BLIF \ +N_277_5.BLIF N_122.BLIF un10_ciin_1.BLIF N_123.BLIF a_decode_c_19__n.BLIF \ +un10_ciin_2.BLIF N_132.BLIF un10_ciin_3.BLIF N_133.BLIF a_decode_c_20__n.BLIF \ +un10_ciin_4.BLIF N_274.BLIF un10_ciin_5.BLIF N_276.BLIF a_decode_c_21__n.BLIF \ +un10_ciin_6.BLIF N_77.BLIF un10_ciin_7.BLIF N_79.BLIF a_decode_c_22__n.BLIF \ +un10_ciin_8.BLIF N_78.BLIF un10_ciin_9.BLIF N_263.BLIF a_decode_c_23__n.BLIF \ +un10_ciin_10.BLIF N_108.BLIF un10_ciin_11.BLIF N_114.BLIF a_c_0__n.BLIF \ +un6_amiga_bus_data_dir_1.BLIF N_85.BLIF un6_amiga_bus_data_dir_2.BLIF \ +N_104.BLIF a_c_1__n.BLIF pos_clk_as_000_dma6_1_n.BLIF N_91.BLIF \ +pos_clk_as_000_dma6_2_n.BLIF N_131.BLIF nEXP_SPACE_c.BLIF \ +DS_000_DMA_1_sqmuxa_1.BLIF N_277.BLIF pos_clk_un4_rw_000_1_n.BLIF N_130.BLIF \ +BERR_c.BLIF pos_clk_un4_rw_000_2_n.BLIF N_115.BLIF \ +pos_clk_un13_clk_out_int_1_n.BLIF N_116.BLIF BG_030_c.BLIF N_125_1.BLIF \ +N_105.BLIF N_116_1.BLIF N_103.BLIF BG_000DFFreg.BLIF \ +pos_clk_un29_clk_000_ne_1_1_n.BLIF N_101.BLIF \ +pos_clk_un29_clk_000_ne_1_2_n.BLIF N_259.BLIF \ +pos_clk_un29_clk_000_ne_1_3_n.BLIF N_255.BLIF BGACK_000_c.BLIF N_261_1.BLIF \ +N_256.BLIF N_261_2.BLIF N_254.BLIF CLK_030_c.BLIF N_262_1.BLIF N_16.BLIF \ +N_262_2.BLIF N_106.BLIF DS_000_ENABLE_0_sqmuxa_1_1.BLIF N_86.BLIF N_259_1.BLIF \ +N_107.BLIF CLK_OSZI_c.BLIF N_250_i_1.BLIF N_117.BLIF N_189_i_1.BLIF \ +pos_clk_a0_dma_3_n.BLIF pos_clk_un6_bg_030_1_n.BLIF N_129.BLIF \ +CLK_OUT_INTreg.BLIF N_108_1.BLIF pos_clk_size_dma_6_1__n.BLIF N_114_1.BLIF \ +pos_clk_size_dma_6_0__n.BLIF un21_berr_1.BLIF pos_clk_rw_000_dma_3_n.BLIF \ +FPU_SENSE_c.BLIF un21_fpu_cs_1.BLIF pos_clk_amiga_bus_enable_dma_low_3_n.BLIF \ +N_130_1.BLIF pos_clk_amiga_bus_enable_dma_high_3_n.BLIF IPL_030DFF_0_reg.BLIF \ +N_136_i_1.BLIF SIZE_DMA_3_sqmuxa.BLIF N_152_i_1.BLIF \ +pos_clk_un5_bgack_030_int_d_n.BLIF IPL_030DFF_1_reg.BLIF N_146_i_1.BLIF \ +N_18.BLIF N_267_i_1.BLIF N_19.BLIF IPL_030DFF_2_reg.BLIF pos_clk_ipl_1_n.BLIF \ +N_21.BLIF bg_000_0_un3_n.BLIF N_22.BLIF ipl_c_0__n.BLIF bg_000_0_un1_n.BLIF \ +un6_amiga_bus_data_dir.BLIF bg_000_0_un0_n.BLIF un12_amiga_bus_data_dir_m.BLIF \ +ipl_c_1__n.BLIF uds_000_int_0_un3_n.BLIF pos_clk_un3_clk_out_int_n.BLIF \ +uds_000_int_0_un1_n.BLIF N_3.BLIF ipl_c_2__n.BLIF uds_000_int_0_un0_n.BLIF \ +pos_clk_as_000_dma6_n.BLIF lds_000_int_0_un3_n.BLIF DS_000_DMA_1_sqmuxa.BLIF \ +lds_000_int_0_un1_n.BLIF N_4.BLIF DTACK_c.BLIF lds_000_int_0_un0_n.BLIF \ +AS_000_DMA_1_sqmuxa.BLIF ds_000_enable_0_un3_n.BLIF un1_rst_2.BLIF \ +ds_000_enable_0_un1_n.BLIF G_97.BLIF ds_000_enable_0_un0_n.BLIF N_199.BLIF \ +VPA_c.BLIF ipl_030_0_2__un3_n.BLIF pos_clk_un13_bgack_030_int_n.BLIF \ +ipl_030_0_2__un1_n.BLIF N_205.BLIF ipl_030_0_2__un0_n.BLIF \ +pos_clk_un13_clk_out_int_n.BLIF RST_c.BLIF vma_int_0_un3_n.BLIF \ +pos_clk_un15_bgack_030_int_n.BLIF vma_int_0_un1_n.BLIF pos_clk_un3_n.BLIF \ +RESET_c.BLIF vma_int_0_un0_n.BLIF pos_clk_un12_clk_out_int_n.BLIF \ +cpu_est_0_1__un3_n.BLIF pos_clk_un1_bgack_030_int_n.BLIF RW_c.BLIF \ +cpu_est_0_1__un1_n.BLIF DS_000_DMA_0_sqmuxa.BLIF cpu_est_0_1__un0_n.BLIF \ +un1_rst_3.BLIF fc_c_0__n.BLIF cpu_est_0_2__un3_n.BLIF G_95.BLIF \ +cpu_est_0_2__un1_n.BLIF G_101.BLIF fc_c_1__n.BLIF cpu_est_0_2__un0_n.BLIF \ +G_103.BLIF cpu_est_0_3__un3_n.BLIF pos_clk_un4_rw_000_n.BLIF \ +cpu_est_0_3__un1_n.BLIF N_7.BLIF AMIGA_BUS_DATA_DIR_c.BLIF \ +cpu_est_0_3__un0_n.BLIF pos_clk_un6_bgack_000_n.BLIF \ +pos_clk_un31_clk_000_ne_1_i_m2_un3_n.BLIF pos_clk_un4_bgack_000_n.BLIF \ +pos_clk_un31_clk_000_ne_1_i_m2_un1_n.BLIF N_265_2.BLIF \ +pos_clk_un31_clk_000_ne_1_i_m2_un0_n.BLIF N_111.BLIF \ +bgack_030_int_0_un3_n.BLIF N_109.BLIF BG_030_c_i.BLIF \ +bgack_030_int_0_un1_n.BLIF N_113.BLIF pos_clk_un6_bg_030_i_n.BLIF \ +bgack_030_int_0_un0_n.BLIF N_112.BLIF pos_clk_un9_bg_030_0_n.BLIF \ +ds_000_dma_0_un3_n.BLIF N_98.BLIF UDS_000_INT_i.BLIF ds_000_dma_0_un1_n.BLIF \ +pos_clk_un29_clk_000_ne_1_n.BLIF un1_UDS_000_INT_0.BLIF \ +ds_000_dma_0_un0_n.BLIF N_87.BLIF LDS_000_INT_i.BLIF as_000_dma_0_un3_n.BLIF \ +N_270.BLIF un1_LDS_000_INT_0.BLIF as_000_dma_0_un1_n.BLIF N_134.BLIF \ +N_23_i.BLIF as_000_dma_0_un0_n.BLIF N_125.BLIF N_30_0.BLIF \ +size_dma_0_1__un3_n.BLIF N_124.BLIF N_20_i.BLIF size_dma_0_1__un1_n.BLIF \ +N_121.BLIF N_33_0.BLIF size_dma_0_1__un0_n.BLIF N_120.BLIF N_13_i.BLIF \ +size_dma_0_0__un3_n.BLIF N_137.BLIF N_40_0.BLIF size_dma_0_0__un1_n.BLIF \ +pos_clk_un31_clk_000_ne_n.BLIF ipl_c_i_2__n.BLIF size_dma_0_0__un0_n.BLIF \ +N_17.BLIF N_51_0.BLIF amiga_bus_enable_dma_high_0_un3_n.BLIF \ +pos_clk_un9_clk_000_pe_n.BLIF N_26_i.BLIF \ +amiga_bus_enable_dma_high_0_un1_n.BLIF cpu_est_2_1__n.BLIF N_29_0.BLIF \ +amiga_bus_enable_dma_high_0_un0_n.BLIF cpu_est_2_2__n.BLIF a_c_i_0__n.BLIF \ +amiga_bus_enable_dma_low_0_un3_n.BLIF N_261.BLIF size_c_i_1__n.BLIF \ +amiga_bus_enable_dma_low_0_un1_n.BLIF N_262.BLIF \ +pos_clk_un10_sm_amiga_i_n.BLIF amiga_bus_enable_dma_low_0_un0_n.BLIF \ +N_251.BLIF DS_000_ENABLE_0_sqmuxa_1_i.BLIF a0_dma_0_un3_n.BLIF N_252.BLIF \ +un1_DS_000_ENABLE_0_sqmuxa_i.BLIF a0_dma_0_un1_n.BLIF N_258.BLIF N_157_i.BLIF \ +a0_dma_0_un0_n.BLIF N_257.BLIF N_160_0.BLIF rw_000_dma_0_un3_n.BLIF \ +DS_000_ENABLE_1_sqmuxa.BLIF N_161_0.BLIF rw_000_dma_0_un1_n.BLIF \ +un1_DS_000_ENABLE_0_sqmuxa.BLIF N_162_0.BLIF rw_000_dma_0_un0_n.BLIF \ +N_102.BLIF N_165_i.BLIF ipl_030_0_0__un3_n.BLIF N_118.BLIF \ +ipl_030_0_0__un1_n.BLIF N_119.BLIF N_167_i.BLIF ipl_030_0_0__un0_n.BLIF \ +N_264.BLIF N_166_i.BLIF ipl_030_0_1__un3_n.BLIF DS_000_ENABLE_0_sqmuxa_1.BLIF \ +ipl_030_0_1__un1_n.BLIF N_164.BLIF N_168_i.BLIF ipl_030_0_1__un0_n.BLIF \ +N_170.BLIF as_030_000_sync_0_un3_n.BLIF N_168.BLIF N_170_i.BLIF \ +as_030_000_sync_0_un1_n.BLIF N_166.BLIF as_030_000_sync_0_un0_n.BLIF \ +N_167.BLIF N_164_i.BLIF rw_000_int_0_un3_n.BLIF N_165.BLIF \ +rw_000_int_0_un1_n.BLIF N_162.BLIF N_102_i.BLIF rw_000_int_0_un0_n.BLIF \ +N_161.BLIF N_264_i.BLIF a_decode_15__n.BLIF N_160.BLIF N_79_i.BLIF N_157.BLIF \ +N_78_i.BLIF a_decode_14__n.BLIF N_26.BLIF N_119_i.BLIF N_13.BLIF N_118_i.BLIF \ +a_decode_13__n.BLIF N_20.BLIF N_23.BLIF N_255_i.BLIF a_decode_12__n.BLIF \ +N_8.BLIF N_257_i.BLIF pos_clk_un9_bg_030_n.BLIF cpu_est_2_0_2__n.BLIF \ +a_decode_11__n.BLIF un1_amiga_bus_enable_low_i.BLIF N_258_i.BLIF \ +un21_fpu_cs_i.BLIF N_259_i.BLIF a_decode_10__n.BLIF sm_amiga_i_2__n.BLIF \ +cpu_est_2_0_1__n.BLIF sm_amiga_i_1__n.BLIF N_262_i.BLIF a_decode_9__n.BLIF \ +sm_amiga_i_3__n.BLIF N_261_i.BLIF sm_amiga_i_4__n.BLIF \ +pos_clk_un9_clk_000_pe_0_n.BLIF a_decode_8__n.BLIF sm_amiga_i_6__n.BLIF \ +N_251_i.BLIF sm_amiga_i_5__n.BLIF N_252_0.BLIF a_decode_7__n.BLIF \ +clk_000_d_i_0__n.BLIF N_76_i.BLIF AS_000_INT_i.BLIF N_17_i.BLIF \ +a_decode_6__n.BLIF sm_amiga_i_i_7__n.BLIF N_36_0.BLIF AS_030_i.BLIF \ +N_98_i.BLIF a_decode_5__n.BLIF cpu_est_i_2__n.BLIF \ +pos_clk_un31_clk_000_ne_i_n.BLIF cpu_est_i_0__n.BLIF N_228_i.BLIF \ +a_decode_4__n.BLIF cpu_est_i_3__n.BLIF N_121_i.BLIF cpu_est_i_1__n.BLIF \ +N_120_i.BLIF a_decode_3__n.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF \ +RW_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF \ +SIZE_1_.PIN.BLIF AHIGH_24_.PIN.BLIF AHIGH_25_.PIN.BLIF AHIGH_26_.PIN.BLIF \ +AHIGH_27_.PIN.BLIF AHIGH_28_.PIN.BLIF AHIGH_29_.PIN.BLIF AHIGH_30_.PIN.BLIF \ +AHIGH_31_.PIN.BLIF A_0_.PIN.BLIF BERR.PIN.BLIF DTACK.PIN.BLIF RW.PIN.BLIF .outputs IPL_030_2_ DS_030 BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 \ -AVEC E VMA RESET AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ -AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ IPL_D0_0_.D IPL_D0_0_.C \ -IPL_D0_1_.D IPL_D0_1_.C IPL_D0_2_.D IPL_D0_2_.C SM_AMIGA_i_7_.D \ +AVEC E VMA AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ +AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_i_7_.D \ SM_AMIGA_i_7_.C SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_5_.D SM_AMIGA_5_.C \ SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_2_.D \ SM_AMIGA_2_.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C \ -cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C cpu_est_2_.D cpu_est_2_.C \ -cpu_est_3_.D cpu_est_3_.C IPL_030DFF_0_reg.D IPL_030DFF_0_reg.C \ -IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D IPL_030DFF_2_reg.C \ -RST_DLY_2_.D RST_DLY_2_.C CLK_000_D_0_.D CLK_000_D_0_.C CLK_000_D_1_.D \ -CLK_000_D_1_.C CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C \ -CLK_000_D_4_.D CLK_000_D_4_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D \ -CYCLE_DMA_1_.C SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C \ -RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.D RST_DLY_1_.C inst_RW_000_INT.D \ -inst_RW_000_INT.C inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C \ -inst_LDS_000_INT.D inst_LDS_000_INT.C inst_BGACK_030_INTreg.D \ -inst_BGACK_030_INTreg.C inst_AS_000_DMA.D inst_AS_000_DMA.C inst_DS_000_DMA.D \ -inst_DS_000_DMA.C inst_DSACK1_INT.D inst_DSACK1_INT.C inst_AS_000_INT.D \ -inst_AS_000_INT.C inst_AS_030_D0.D inst_AS_030_D0.C inst_VPA_D.D inst_VPA_D.C \ -inst_DTACK_D0.D inst_DTACK_D0.C inst_CLK_030_H.D inst_CLK_030_H.C \ -inst_RESET_OUT.D inst_RESET_OUT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C \ -BG_000DFFreg.D BG_000DFFreg.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D \ +cpu_est_2_.D cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C IPL_030DFF_0_reg.D \ +IPL_030DFF_0_reg.C IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D \ +IPL_030DFF_2_reg.C IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D IPL_D0_1_.C IPL_D0_2_.D \ +IPL_D0_2_.C CLK_000_D_0_.D CLK_000_D_0_.C CLK_000_D_1_.D CLK_000_D_1_.C \ +CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C CLK_000_D_4_.D \ +CLK_000_D_4_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C \ +CLK_030_PE_0_.D CLK_030_PE_0_.C CLK_030_PE_1_.D CLK_030_PE_1_.C SIZE_DMA_0_.D \ +SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C cpu_est_0_.D cpu_est_0_.C \ +cpu_est_1_.D cpu_est_1_.C RST_DLY_0_.D RST_DLY_0_.C RST_DLY_1_.D RST_DLY_1_.C \ +RST_DLY_2_.D RST_DLY_2_.C inst_DS_000_DMA.D inst_DS_000_DMA.C \ +inst_DSACK1_INT.D inst_DSACK1_INT.C inst_AS_000_INT.D inst_AS_000_INT.C \ +inst_AMIGA_DS.D inst_AMIGA_DS.C inst_AS_030_D0.D inst_AS_030_D0.C \ +inst_DTACK_D0.D inst_DTACK_D0.C inst_VPA_D.D inst_VPA_D.C inst_RESET_OUT.D \ +inst_RESET_OUT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C BG_000DFFreg.D \ +BG_000DFFreg.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D \ inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.D \ inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_UDS_000_INT.D inst_UDS_000_INT.C \ inst_A0_DMA.D inst_A0_DMA.C inst_RW_000_DMA.D inst_RW_000_DMA.C \ -inst_VMA_INTreg.D inst_VMA_INTreg.C inst_BGACK_030_INT_D.D \ +inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_INT.D inst_RW_000_INT.C \ +inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_LDS_000_INT.D \ +inst_LDS_000_INT.C inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C \ +inst_AS_000_DMA.D inst_AS_000_DMA.C inst_BGACK_030_INT_D.D \ inst_BGACK_030_INT_D.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.D \ inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C SIZE_1_ \ -AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR RW SIZE_0_ AHIGH_30_ \ -AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ ipl_i_2__n \ -N_233_0 ipl_i_1__n N_360_i ipl_i_0__n N_191_i_i a_i_1__n N_192_i_i \ -AS_000_DMA_i AS_000_i N_199_i CLK_030_H_i N_204_i AS_030_000_SYNC_i \ -AMIGA_BUS_ENABLE_DMA_HIGH_i N_282_i vcc_n_n cycle_dma_i_0__n N_278_i \ -ahigh_i_30__n N_186_i gnd_n_n ahigh_i_31__n N_185_i un1_amiga_bus_enable_low \ -ahigh_i_28__n CLK_030_c_i un7_as_030 ahigh_i_29__n N_184_0 un1_LDS_000_INT \ -ahigh_i_26__n N_179_0 un1_UDS_000_INT ahigh_i_27__n N_251_i un10_ciin \ -ahigh_i_24__n LDS_000_c_i un21_fpu_cs ahigh_i_25__n UDS_000_c_i un21_berr \ -N_172_i un6_ds_030 pos_clk_un21_bgack_030_int_i_0_0_n N_163_i clk_000_d_i_3__n \ -N_115_i N_350_i N_114_i un1_rw_i un6_ds_030_i N_126_0 DS_000_DMA_i N_313_i \ -N_132_i N_231_i N_133_i N_291_i un7_as_030_i AMIGA_BUS_ENABLE_DMA_LOW_i \ -N_288_i AS_030_c N_287_i AS_000_c N_340_i RW_000_c N_284_i N_275_i UDS_000_c \ -pos_clk_size_dma_6_0_1__n N_268_i LDS_000_c pos_clk_size_dma_6_0_0__n N_265_i \ -size_c_0__n N_267_i size_c_1__n N_337_i N_338_i ahigh_c_24__n N_55_0 \ -un1_as_000_i ahigh_c_25__n N_245_0 N_229_i pos_clk_un9_bg_030_n ahigh_c_26__n \ -N_227_i ahigh_c_27__n N_226_i ahigh_c_28__n N_246_0 N_332_i ahigh_c_29__n \ -pos_clk_ds_000_dma_4_0_n N_48_0 ahigh_c_30__n pos_clk_rw_000_dma_3_0_n N_218_i \ -ahigh_c_31__n un10_ciin_i pos_clk_a0_dma_3_n N_62_0 pos_clk_rw_000_dma_3_n \ -N_215_i N_216_i un10_amiga_bus_enable_high_i N_214_i N_310_0 N_24_i N_33_0 \ -pos_clk_ds_000_dma_4_n N_23_i N_3 N_32_0 N_4 N_22_i N_31_0 N_3_i N_45_0 N_4_i \ -N_44_0 N_15 N_15_i N_19 N_40_0 N_20 N_19_i N_22 N_36_0 N_23 N_20_i N_24 N_35_0 \ -N_25 N_25_i N_26 N_30_0 N_27 N_26_i N_29_0 N_27_i a_decode_c_16__n N_28_0 \ -BG_030_c_i a_decode_c_17__n pos_clk_un9_bg_030_0_n N_235_i_1 a_decode_c_18__n \ -N_235_i_2 N_156_i_1 a_decode_c_19__n N_156_i_2 N_156_i_3 a_decode_c_20__n \ -N_156_i_4 pos_clk_un10_sm_amiga_i_1_n a_decode_c_21__n N_176_i_1 un10_ciin_1 \ -a_decode_c_22__n un10_ciin_2 un10_ciin_3 a_decode_c_23__n un10_ciin_4 \ -un10_ciin_5 a_c_0__n un10_ciin_6 un10_ciin_7 a_c_1__n un10_ciin_8 un10_ciin_9 \ -pos_clk_size_dma_6_0__n nEXP_SPACE_c un10_ciin_10 pos_clk_size_dma_6_1__n \ -un10_ciin_11 N_199 BERR_c N_163_i_1 pos_clk_un21_bgack_030_int_i_0_n N_163_i_2 \ -N_231 BG_030_c pos_clk_un21_bgack_030_int_i_0_0_1_n N_233 \ -pos_clk_un21_bgack_030_int_i_0_0_2_n N_111 N_138_i_1 N_112 N_138_i_2 N_113 \ -N_59_i_1 N_114 BGACK_000_c N_59_i_2 N_115 N_233_0_1 N_245 CLK_030_c N_233_0_2 \ -N_246 N_214_1 N_62 N_214_2 N_214_3 N_132 CLK_OSZI_c un21_fpu_cs_1 N_133 \ -un21_berr_1_0 N_310 N_182_0_1 N_126 N_234_i_1 N_149 N_234_i_2 N_150 N_206_1 \ -N_158 FPU_SENSE_c N_206_2 N_160 N_205_1 N_163 N_205_2 N_172 N_352_1 N_179 \ -N_352_2 N_184 N_231_i_1 N_185 N_152_i_1 N_196 N_144_i_1 N_203 ipl_c_0__n \ -N_142_i_1 N_204 N_312_i_1 N_209 ipl_c_1__n N_236_i_1 N_214 N_148_i_1 N_215 \ -ipl_c_2__n N_136_i_1 N_216 N_246_0_1 N_218 N_249_i_1 N_224 DTACK_c N_57_i_1 \ -N_332 N_338_1 N_226 N_224_1 N_227 N_216_1 N_229 VPA_c N_209_1 N_337 N_203_1 \ -N_338 N_196_1 N_265 RST_c cpu_est_0_3__un3_n N_267 cpu_est_0_3__un1_n N_268 \ -cpu_est_0_3__un0_n N_275 RW_c rw_000_int_0_un3_n N_278 rw_000_int_0_un1_n \ -N_282 fc_c_0__n rw_000_int_0_un0_n N_284 vma_int_0_un3_n N_340 fc_c_1__n \ -vma_int_0_un1_n N_287 vma_int_0_un0_n N_288 cpu_est_0_1__un3_n N_291 \ -AMIGA_BUS_DATA_DIR_c cpu_est_0_1__un1_n N_293 cpu_est_0_1__un0_n N_350 \ -cpu_est_0_2__un3_n N_355 cpu_est_0_2__un1_n cpu_est_0_2__un0_n N_16_i \ -uds_000_int_0_un3_n N_39_0 uds_000_int_0_un1_n VPA_c_i uds_000_int_0_un0_n \ -N_52_0 lds_000_int_0_un3_n N_156 DTACK_c_i lds_000_int_0_un1_n N_201 N_53_0 \ -lds_000_int_0_un0_n N_202 N_210_i bgack_030_int_0_un3_n N_154 N_211_i \ -bgack_030_int_0_un1_n un21_berr_1 N_189_i bgack_030_int_0_un0_n N_174 \ -un1_SM_AMIGA_0_sqmuxa_1_0 ds_000_enable_0_un3_n N_223 RW_c_i \ -ds_000_enable_0_un1_n N_221 N_311_0 ds_000_enable_0_un0_n N_222 N_336_i \ -size_dma_0_0__un3_n N_219 N_244_i size_dma_0_0__un1_n N_220 \ -size_dma_0_0__un0_n pos_clk_un6_bgack_000_n N_314_0 size_dma_0_1__un3_n N_359 \ -N_159_i size_dma_0_1__un1_n N_8 VMA_INT_i size_dma_0_1__un0_n N_14 N_352_i \ -ipl_030_0_0__un3_n N_21 N_353_i ipl_030_0_0__un1_n N_9 N_293_i \ -ipl_030_0_0__un0_n un1_DS_000_ENABLE_0_sqmuxa N_175_i ipl_030_0_1__un3_n N_66 \ -N_176_i ipl_030_0_1__un1_n N_171 ipl_030_0_1__un0_n N_354 N_198_i \ -ipl_030_0_2__un3_n N_18 N_197_i ipl_030_0_2__un1_n pos_clk_un9_clk_000_pe_n \ -N_196_i ipl_030_0_2__un0_n cpu_est_2_1__n N_183_0 a0_dma_0_un3_n \ -cpu_est_2_2__n N_182_0 a0_dma_0_un1_n N_197 N_180_0 a0_dma_0_un0_n N_198 \ -N_178_0 amiga_bus_enable_dma_low_0_un3_n N_208 N_82_i \ -amiga_bus_enable_dma_low_0_un1_n N_210 N_315_i \ -amiga_bus_enable_dma_low_0_un0_n N_315 N_351_i \ -amiga_bus_enable_dma_high_0_un3_n N_212 N_154_0 \ -amiga_bus_enable_dma_high_0_un1_n N_180 N_149_i \ -amiga_bus_enable_dma_high_0_un0_n N_213 N_207_i bg_000_0_un3_n N_178 N_228_i \ -bg_000_0_un1_n N_228 bg_000_0_un0_n N_182 N_213_i ds_000_dma_0_un3_n N_176 \ -N_212_i ds_000_dma_0_un1_n N_183 N_309_i ds_000_dma_0_un0_n N_351 N_357_i \ -as_000_dma_0_un3_n N_357 cpu_est_2_0_2__n as_000_dma_0_un1_n N_206 N_208_i \ -as_000_dma_0_un0_n N_205 N_209_i as_030_000_sync_0_un3_n N_352 \ -cpu_est_2_0_1__n as_030_000_sync_0_un1_n N_353 N_206_i as_030_000_sync_0_un0_n \ -N_314 N_205_i rw_000_dma_0_un3_n N_244 pos_clk_un9_clk_000_pe_0_n \ -rw_000_dma_0_un1_n N_336 N_18_i rw_000_dma_0_un0_n N_311 N_37_0 a_decode_15__n \ -un1_SM_AMIGA_0_sqmuxa_1 N_171_i N_211 N_354_i a_decode_14__n N_16 \ -un1_DS_000_ENABLE_0_sqmuxa_0 un1_amiga_bus_enable_low_i N_66_0 a_decode_13__n \ -un21_fpu_cs_i UDS_000_INT_i cpu_est_i_2__n un1_UDS_000_INT_0 a_decode_12__n \ -cpu_est_i_0__n LDS_000_INT_i VPA_D_i un1_LDS_000_INT_0 a_decode_11__n \ -DTACK_D0_i N_21_i cpu_est_i_3__n N_34_0 a_decode_10__n sm_amiga_i_i_7__n \ -N_14_i sm_amiga_i_5__n N_41_0 a_decode_9__n sm_amiga_i_3__n N_8_i \ -cpu_est_i_1__n N_42_0 a_decode_8__n clk_000_d_i_1__n a_c_i_0__n N_355_i_0 \ -size_c_i_1__n a_decode_7__n sm_amiga_i_4__n pos_clk_un10_sm_amiga_i_n \ -sm_amiga_i_2__n N_359_i a_decode_6__n rst_dly_i_0__n pos_clk_un6_bgack_000_0_n \ -rst_dly_i_2__n N_220_i a_decode_5__n a_decode_i_19__n N_219_i a_decode_i_18__n \ -a_decode_4__n a_decode_i_16__n N_222_i RW_000_i N_221_i a_decode_3__n \ -sm_amiga_i_0__n AS_030_i N_223_i a_decode_2__n AS_000_INT_i N_224_i \ -DSACK1_INT_i AMIGA_BUS_DATA_DIR_c_0 clk_000_d_i_0__n N_150_i sm_amiga_i_6__n \ -N_156_i sm_amiga_i_1__n N_160_i FPU_SENSE_i N_174_i rst_dly_i_1__n N_158_i \ -AS_030_D0_i N_201_i BGACK_030_INT_i N_202_i nEXP_SPACE_i N_203_i RESET_OUT_i \ -AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE \ -AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE \ -AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE RESET.OE \ -CIIN.OE pos_clk_un21_bgack_030_int_i_0_o3_0_x2 pos_clk_un1_ipl_i_0_x2 \ -pos_clk_un1_ipl_i_0_x2_0 pos_clk_un1_ipl_i_0_x2_1 pos_clk_CYCLE_DMA_5_1_i_0_x2 -.names N_113.BLIF IPL_D0_0_.D -0 1 -.names N_112.BLIF IPL_D0_1_.D -0 1 -.names N_111.BLIF IPL_D0_2_.D -0 1 +AHIGH_31_ AS_030 AS_000 RW_000 UDS_000 LDS_000 BERR DTACK RW SIZE_0_ AHIGH_30_ \ +AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ \ +clk_000_d_i_1__n VPA_D_i N_125_i a_decode_2__n VMA_INT_i N_124_i \ +sm_amiga_i_0__n N_53_0 rst_dly_i_2__n N_134_i rst_dly_i_1__n N_270_0 \ +rst_dly_i_0__n N_77_i DSACK1_INT_i N_87_i N_137_i_0 N_112_i vcc_n_n DTACK_D0_i \ +N_113_i BGACK_030_INT_i N_114_i gnd_n_n nEXP_SPACE_i un1_amiga_bus_enable_low \ +AS_000_DMA_i N_109_i un7_as_030 RW_000_i N_108_i un1_LDS_000_INT \ +clk_030_pe_i_1__n N_111_i un1_UDS_000_INT DS_000_DMA_0_sqmuxa_i N_265_2_0 \ +un1_SM_AMIGA_0_sqmuxa_1 pos_clk_un4_rw_000_i_n un10_ciin AS_000_i un1_as_000_i \ +un21_fpu_cs AMIGA_DS_i VPA_c_i un21_berr pos_clk_un3_clk_out_int_i_n N_52_0 \ +un6_ds_030 cycle_dma_i_0__n DTACK_c_i un13_ciin cycle_dma_i_1__n N_48_0 \ +pos_clk_as_000_dma6_i_n un3_ahigh_i DS_000_DMA_i pos_clk_un4_bgack_000_i_n \ +CLK_EXP_i pos_clk_un6_bgack_000_0_n AMIGA_BUS_ENABLE_DMA_LOW_i N_7_i \ +ahigh_i_25__n N_41_0 ahigh_i_24__n pos_clk_un1_bgack_030_int_0_n ahigh_i_27__n \ +pos_clk_un12_clk_out_int_0_n ahigh_i_26__n pos_clk_un3_0_n ahigh_i_29__n \ +pos_clk_un15_bgack_030_int_i_n ahigh_i_28__n N_3_i ahigh_i_31__n N_43_0 \ +ahigh_i_30__n N_4_i a_i_1__n N_42_0 AMIGA_BUS_ENABLE_DMA_HIGH_i \ +un6_amiga_bus_data_dir_i AS_030_D0_i un12_amiga_bus_data_dir_m_i un10_ciin_i \ +AMIGA_BUS_DATA_DIR_c_0 FPU_SENSE_i N_22_i AS_030_000_SYNC_i N_31_0 \ +a_decode_i_16__n N_21_i a_decode_i_18__n N_32_0 a_decode_i_19__n N_19_i \ +N_224_i N_34_0 N_225_i N_18_i N_226_i N_35_0 pos_clk_un5_bgack_030_int_d_i_n \ +pos_clk_amiga_bus_enable_dma_high_3_0_n pos_clk_un6_bg_030_n \ +pos_clk_amiga_bus_enable_dma_low_3_0_n pos_clk_ipl_n pos_clk_rw_000_dma_3_0_n \ +un13_ciin_i UDS_000_c_i un6_ds_030_i LDS_000_c_i N_123_i N_86_i N_122_i \ +N_129_i un7_as_030_i N_130_i AS_030_c un11_amiga_bus_enable_high_i N_117_i \ +AS_000_c N_46_0 N_107_i RW_000_c pos_clk_size_dma_6_0_0__n N_106_i \ +pos_clk_size_dma_6_0_1__n UDS_000_c N_16_i N_254_i LDS_000_c N_263_i N_250_i \ +size_c_0__n N_256_i N_189_i pos_clk_rw_000_int_5_n size_c_1__n N_101_i \ +ahigh_c_24__n N_103_i N_104_i ahigh_c_25__n N_105_i ahigh_c_26__n N_115_i \ +ahigh_c_27__n N_116_i ahigh_c_28__n N_131_i N_277_i ahigh_c_29__n N_64_0 \ +N_91_0 ahigh_c_30__n N_159_0 N_14 N_85_i N_15 ahigh_c_31__n \ +un1_SM_AMIGA_0_sqmuxa_1_0 N_24 RW_c_i N_25 pos_clk_rw_000_int_5_0_n \ +clk_000_d_i_3__n N_25_i N_28_0 N_24_i N_27_0 ipl_c_i_1__n N_50_0 ipl_c_i_0__n \ +N_49_0 N_14_i N_39_0 N_15_i N_38_0 N_91_0_1 N_91_0_2 N_91_0_3 N_265_i_1 \ +N_266_i_1 N_266_i_2 N_138_i_1 N_148_i_1 N_144_i_1 N_142_i_1 N_140_i_1 \ +pos_clk_un10_sm_amiga_i_1_n N_76 N_85_i_1 N_85_i_2 a_decode_c_16__n N_277_1 \ +N_277_2 un1_rst_2_1 a_decode_c_17__n N_277_3 N_277_4 N_64 a_decode_c_18__n \ +N_277_5 N_122 un10_ciin_1 N_123 a_decode_c_19__n un10_ciin_2 N_132 un10_ciin_3 \ +N_133 a_decode_c_20__n un10_ciin_4 N_274 un10_ciin_5 N_276 a_decode_c_21__n \ +un10_ciin_6 N_77 un10_ciin_7 N_79 a_decode_c_22__n un10_ciin_8 N_78 \ +un10_ciin_9 N_263 a_decode_c_23__n un10_ciin_10 N_108 un10_ciin_11 N_114 \ +a_c_0__n un6_amiga_bus_data_dir_1 N_85 un6_amiga_bus_data_dir_2 N_104 a_c_1__n \ +pos_clk_as_000_dma6_1_n N_91 pos_clk_as_000_dma6_2_n N_131 nEXP_SPACE_c \ +DS_000_DMA_1_sqmuxa_1 N_277 pos_clk_un4_rw_000_1_n N_130 BERR_c \ +pos_clk_un4_rw_000_2_n N_115 pos_clk_un13_clk_out_int_1_n N_116 BG_030_c \ +N_125_1 N_105 N_116_1 N_103 pos_clk_un29_clk_000_ne_1_1_n N_101 \ +pos_clk_un29_clk_000_ne_1_2_n N_259 pos_clk_un29_clk_000_ne_1_3_n N_255 \ +BGACK_000_c N_261_1 N_256 N_261_2 N_254 CLK_030_c N_262_1 N_16 N_262_2 N_106 \ +DS_000_ENABLE_0_sqmuxa_1_1 N_86 N_259_1 N_107 CLK_OSZI_c N_250_i_1 N_117 \ +N_189_i_1 pos_clk_a0_dma_3_n pos_clk_un6_bg_030_1_n N_129 N_108_1 \ +pos_clk_size_dma_6_1__n N_114_1 pos_clk_size_dma_6_0__n un21_berr_1 \ +pos_clk_rw_000_dma_3_n FPU_SENSE_c un21_fpu_cs_1 \ +pos_clk_amiga_bus_enable_dma_low_3_n N_130_1 \ +pos_clk_amiga_bus_enable_dma_high_3_n N_136_i_1 SIZE_DMA_3_sqmuxa N_152_i_1 \ +pos_clk_un5_bgack_030_int_d_n N_146_i_1 N_18 N_267_i_1 N_19 pos_clk_ipl_1_n \ +N_21 bg_000_0_un3_n N_22 ipl_c_0__n bg_000_0_un1_n un6_amiga_bus_data_dir \ +bg_000_0_un0_n un12_amiga_bus_data_dir_m ipl_c_1__n uds_000_int_0_un3_n \ +pos_clk_un3_clk_out_int_n uds_000_int_0_un1_n N_3 ipl_c_2__n \ +uds_000_int_0_un0_n pos_clk_as_000_dma6_n lds_000_int_0_un3_n \ +DS_000_DMA_1_sqmuxa lds_000_int_0_un1_n N_4 DTACK_c lds_000_int_0_un0_n \ +AS_000_DMA_1_sqmuxa ds_000_enable_0_un3_n un1_rst_2 ds_000_enable_0_un1_n \ +ds_000_enable_0_un0_n N_199 VPA_c ipl_030_0_2__un3_n \ +pos_clk_un13_bgack_030_int_n ipl_030_0_2__un1_n N_205 ipl_030_0_2__un0_n \ +pos_clk_un13_clk_out_int_n RST_c vma_int_0_un3_n pos_clk_un15_bgack_030_int_n \ +vma_int_0_un1_n pos_clk_un3_n RESET_c vma_int_0_un0_n \ +pos_clk_un12_clk_out_int_n cpu_est_0_1__un3_n pos_clk_un1_bgack_030_int_n RW_c \ +cpu_est_0_1__un1_n DS_000_DMA_0_sqmuxa cpu_est_0_1__un0_n un1_rst_3 fc_c_0__n \ +cpu_est_0_2__un3_n cpu_est_0_2__un1_n fc_c_1__n cpu_est_0_2__un0_n \ +cpu_est_0_3__un3_n pos_clk_un4_rw_000_n cpu_est_0_3__un1_n N_7 \ +AMIGA_BUS_DATA_DIR_c cpu_est_0_3__un0_n pos_clk_un6_bgack_000_n \ +pos_clk_un31_clk_000_ne_1_i_m2_un3_n pos_clk_un4_bgack_000_n \ +pos_clk_un31_clk_000_ne_1_i_m2_un1_n N_265_2 \ +pos_clk_un31_clk_000_ne_1_i_m2_un0_n N_111 bgack_030_int_0_un3_n N_109 \ +BG_030_c_i bgack_030_int_0_un1_n N_113 pos_clk_un6_bg_030_i_n \ +bgack_030_int_0_un0_n N_112 pos_clk_un9_bg_030_0_n ds_000_dma_0_un3_n N_98 \ +UDS_000_INT_i ds_000_dma_0_un1_n pos_clk_un29_clk_000_ne_1_n un1_UDS_000_INT_0 \ +ds_000_dma_0_un0_n N_87 LDS_000_INT_i as_000_dma_0_un3_n N_270 \ +un1_LDS_000_INT_0 as_000_dma_0_un1_n N_134 N_23_i as_000_dma_0_un0_n N_125 \ +N_30_0 size_dma_0_1__un3_n N_124 N_20_i size_dma_0_1__un1_n N_121 N_33_0 \ +size_dma_0_1__un0_n N_120 N_13_i size_dma_0_0__un3_n N_137 N_40_0 \ +size_dma_0_0__un1_n pos_clk_un31_clk_000_ne_n ipl_c_i_2__n size_dma_0_0__un0_n \ +N_17 N_51_0 amiga_bus_enable_dma_high_0_un3_n pos_clk_un9_clk_000_pe_n N_26_i \ +amiga_bus_enable_dma_high_0_un1_n cpu_est_2_1__n N_29_0 \ +amiga_bus_enable_dma_high_0_un0_n cpu_est_2_2__n a_c_i_0__n \ +amiga_bus_enable_dma_low_0_un3_n N_261 size_c_i_1__n \ +amiga_bus_enable_dma_low_0_un1_n N_262 pos_clk_un10_sm_amiga_i_n \ +amiga_bus_enable_dma_low_0_un0_n N_251 DS_000_ENABLE_0_sqmuxa_1_i \ +a0_dma_0_un3_n N_252 un1_DS_000_ENABLE_0_sqmuxa_i a0_dma_0_un1_n N_258 N_157_i \ +a0_dma_0_un0_n N_257 N_160_0 rw_000_dma_0_un3_n DS_000_ENABLE_1_sqmuxa N_161_0 \ +rw_000_dma_0_un1_n un1_DS_000_ENABLE_0_sqmuxa N_162_0 rw_000_dma_0_un0_n N_102 \ +N_165_i ipl_030_0_0__un3_n N_118 ipl_030_0_0__un1_n N_119 N_167_i \ +ipl_030_0_0__un0_n N_264 N_166_i ipl_030_0_1__un3_n DS_000_ENABLE_0_sqmuxa_1 \ +ipl_030_0_1__un1_n N_164 N_168_i ipl_030_0_1__un0_n N_170 \ +as_030_000_sync_0_un3_n N_168 N_170_i as_030_000_sync_0_un1_n N_166 \ +as_030_000_sync_0_un0_n N_167 N_164_i rw_000_int_0_un3_n N_165 \ +rw_000_int_0_un1_n N_162 N_102_i rw_000_int_0_un0_n N_161 N_264_i \ +a_decode_15__n N_160 N_79_i N_157 N_78_i a_decode_14__n N_26 N_119_i N_13 \ +N_118_i a_decode_13__n N_20 N_23 N_255_i a_decode_12__n N_8 N_257_i \ +pos_clk_un9_bg_030_n cpu_est_2_0_2__n a_decode_11__n \ +un1_amiga_bus_enable_low_i N_258_i un21_fpu_cs_i N_259_i a_decode_10__n \ +sm_amiga_i_2__n cpu_est_2_0_1__n sm_amiga_i_1__n N_262_i a_decode_9__n \ +sm_amiga_i_3__n N_261_i sm_amiga_i_4__n pos_clk_un9_clk_000_pe_0_n \ +a_decode_8__n sm_amiga_i_6__n N_251_i sm_amiga_i_5__n N_252_0 a_decode_7__n \ +clk_000_d_i_0__n N_76_i AS_000_INT_i N_17_i a_decode_6__n sm_amiga_i_i_7__n \ +N_36_0 AS_030_i N_98_i a_decode_5__n cpu_est_i_2__n \ +pos_clk_un31_clk_000_ne_i_n cpu_est_i_0__n N_228_i a_decode_4__n \ +cpu_est_i_3__n N_121_i cpu_est_i_1__n N_120_i a_decode_3__n AS_030.OE \ +AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE \ +AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE \ +AHIGH_31_.OE A_0_.OE BERR.OE DTACK.OE RW.OE DS_030.OE DSACK1.OE CIIN.OE G_122 \ +G_123 G_124 cpu_est_0_0_ G_97 G_95 G_101 G_103 .names N_152_i_1.BLIF RST_c.BLIF SM_AMIGA_i_7_.D 11 1 .names N_148_i_1.BLIF RST_c.BLIF SM_AMIGA_6_.D 11 1 -.names N_82_i.BLIF N_228_i.BLIF SM_AMIGA_5_.D +.names N_146_i_1.BLIF RST_c.BLIF SM_AMIGA_5_.D 11 1 .names N_144_i_1.BLIF RST_c.BLIF SM_AMIGA_4_.D 11 1 .names N_142_i_1.BLIF RST_c.BLIF SM_AMIGA_3_.D 11 1 -.names N_312_i_1.BLIF RST_c.BLIF SM_AMIGA_2_.D +.names N_140_i_1.BLIF RST_c.BLIF SM_AMIGA_2_.D 11 1 -.names N_138_i_1.BLIF N_138_i_2.BLIF SM_AMIGA_1_.D +.names N_138_i_1.BLIF RST_c.BLIF SM_AMIGA_1_.D 11 1 .names N_136_i_1.BLIF RST_c.BLIF SM_AMIGA_0_.D 11 1 -.names N_244_i.BLIF N_336_i.BLIF cpu_est_0_.D -11 1 -.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D -1- 1 --1 1 .names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D 1- 1 -1 1 .names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_.D 1- 1 -1 1 -.names N_31_0.BLIF IPL_030DFF_0_reg.D +.names N_27_0.BLIF IPL_030DFF_0_reg.D 0 1 -.names N_32_0.BLIF IPL_030DFF_1_reg.D +.names N_28_0.BLIF IPL_030DFF_1_reg.D 0 1 -.names N_33_0.BLIF IPL_030DFF_2_reg.D +.names N_29_0.BLIF IPL_030DFF_2_reg.D 0 1 -.names N_234_i_1.BLIF N_234_i_2.BLIF RST_DLY_2_.D +.names N_49_0.BLIF IPL_D0_0_.D +0 1 +.names N_50_0.BLIF IPL_D0_1_.D +0 1 +.names N_51_0.BLIF IPL_D0_2_.D +0 1 +.names G_95.BLIF un1_rst_2.BLIF CYCLE_DMA_0_.D 11 1 -.names N_59_i_1.BLIF N_59_i_2.BLIF CYCLE_DMA_0_.D +.names G_97.BLIF un1_rst_2.BLIF CYCLE_DMA_1_.D 11 1 -.names N_57_i_1.BLIF N_251_i.BLIF CYCLE_DMA_1_.D +.names G_101.BLIF un1_rst_3.BLIF CLK_030_PE_0_.D +11 1 +.names G_103.BLIF un1_rst_3.BLIF CLK_030_PE_1_.D 11 1 .names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D 1- 1 @@ -442,1050 +488,1094 @@ pos_clk_un1_ipl_i_0_x2_0 pos_clk_un1_ipl_i_0_x2_1 pos_clk_CYCLE_DMA_5_1_i_0_x2 .names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D 1- 1 -1 1 -.names N_236_i_1.BLIF RST_c.BLIF RST_DLY_0_.D +.names cpu_est_0_0_.BLIF cpu_est_0_.D +0 1 +.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D +1- 1 +-1 1 +.names N_267_i_1.BLIF RST_c.BLIF RST_DLY_0_.D 11 1 -.names N_235_i_1.BLIF N_235_i_2.BLIF RST_DLY_1_.D +.names N_266_i_1.BLIF N_266_i_2.BLIF RST_DLY_1_.D 11 1 -.names N_39_0.BLIF inst_RW_000_INT.D -0 1 -.names N_40_0.BLIF inst_AS_030_000_SYNC.D -0 1 -.names N_41_0.BLIF inst_LDS_000_INT.D -0 1 -.names N_42_0.BLIF inst_BGACK_030_INTreg.D -0 1 -.names N_44_0.BLIF inst_AS_000_DMA.D -0 1 -.names N_45_0.BLIF inst_DS_000_DMA.D -0 1 -.names N_219_i.BLIF N_220_i.BLIF inst_DSACK1_INT.D +.names N_265_i_1.BLIF N_265_2_0.BLIF RST_DLY_2_.D 11 1 -.names N_221_i.BLIF N_222_i.BLIF inst_AS_000_INT.D +.names N_43_0.BLIF inst_DS_000_DMA.D +0 1 +.names N_120_i.BLIF N_121_i.BLIF inst_DSACK1_INT.D 11 1 -.names N_48_0.BLIF inst_AS_030_D0.D +.names N_118_i.BLIF N_119_i.BLIF inst_AS_000_INT.D +11 1 +.names N_46_0.BLIF inst_AMIGA_DS.D +0 1 +.names N_274.BLIF inst_AS_030_D0.D +0 1 +.names N_48_0.BLIF inst_DTACK_D0.D 0 1 .names N_52_0.BLIF inst_VPA_D.D 0 1 -.names N_53_0.BLIF inst_DTACK_D0.D +.names N_53_0.BLIF inst_RESET_OUT.D 0 1 -.names N_249_i_1.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF inst_CLK_030_H.D +.names N_8.BLIF RST_c.BLIF inst_DS_000_ENABLE.D 11 1 -.names N_55_0.BLIF inst_RESET_OUT.D +.names N_30_0.BLIF BG_000DFFreg.D 0 1 -.names N_9.BLIF RST_c.BLIF inst_DS_000_ENABLE.D -11 1 -.names N_28_0.BLIF BG_000DFFreg.D +.names N_31_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D 0 1 -.names N_29_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.D +.names N_32_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D 0 1 -.names N_30_0.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.D +.names N_33_0.BLIF inst_UDS_000_INT.D 0 1 -.names N_34_0.BLIF inst_UDS_000_INT.D +.names N_34_0.BLIF inst_A0_DMA.D 0 1 -.names N_35_0.BLIF inst_A0_DMA.D +.names N_35_0.BLIF inst_RW_000_DMA.D 0 1 -.names N_36_0.BLIF inst_RW_000_DMA.D +.names N_36_0.BLIF inst_VMA_INTreg.D 0 1 -.names N_37_0.BLIF inst_VMA_INTreg.D +.names N_38_0.BLIF inst_RW_000_INT.D 0 1 -.names N_251_i.BLIF inst_BGACK_030_INT_D.D +.names N_39_0.BLIF inst_AS_030_000_SYNC.D +0 1 +.names N_40_0.BLIF inst_LDS_000_INT.D +0 1 +.names N_41_0.BLIF inst_BGACK_030_INTreg.D +0 1 +.names N_42_0.BLIF inst_AS_000_DMA.D +0 1 +.names un1_rst_2_1.BLIF inst_BGACK_030_INT_D.D 0 1 .names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D 0 1 -.names ipl_c_2__n.BLIF ipl_i_2__n +.names CLK_000_D_1_.BLIF clk_000_d_i_1__n 0 1 -.names N_233_0_1.BLIF N_233_0_2.BLIF N_233_0 +.names inst_VPA_D.BLIF VPA_D_i +0 1 +.names N_125.BLIF N_125_i +0 1 +.names inst_VMA_INTreg.BLIF VMA_INT_i +0 1 +.names N_124.BLIF N_124_i +0 1 +.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n +0 1 +.names N_124_i.BLIF N_125_i.BLIF N_53_0 11 1 -.names ipl_c_1__n.BLIF ipl_i_1__n +.names RST_DLY_2_.BLIF rst_dly_i_2__n 0 1 -.names pos_clk_un1_ipl_i_0_x2.BLIF N_360_i +.names N_134.BLIF N_134_i 0 1 -.names ipl_c_0__n.BLIF ipl_i_0__n +.names RST_DLY_1_.BLIF rst_dly_i_1__n 0 1 -.names pos_clk_un1_ipl_i_0_x2_0.BLIF N_191_i_i +.names N_134_i.BLIF RST_c.BLIF N_270_0 +11 1 +.names RST_DLY_0_.BLIF rst_dly_i_0__n 0 1 -.names a_c_1__n.BLIF a_i_1__n +.names RST_DLY_0_.BLIF RST_DLY_1_.BLIF N_77_i +11 1 +.names inst_DSACK1_INT.BLIF DSACK1_INT_i 0 1 -.names pos_clk_un1_ipl_i_0_x2_1.BLIF N_192_i_i +.names N_76_i.BLIF SM_AMIGA_1_.BLIF N_87_i +11 1 +.names N_137.BLIF N_137_i_0 0 1 -.names inst_AS_000_DMA.BLIF AS_000_DMA_i -0 1 -.names AS_000_c.BLIF AS_000_i -0 1 -.names N_199.BLIF N_199_i -0 1 -.names inst_CLK_030_H.BLIF CLK_030_H_i -0 1 -.names N_204.BLIF N_204_i -0 1 -.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i -0 1 -.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i -0 1 -.names N_282.BLIF N_282_i +.names N_112.BLIF N_112_i 0 1 .names vcc_n_n 1 -.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n +.names inst_DTACK_D0.BLIF DTACK_D0_i 0 1 -.names N_278.BLIF N_278_i +.names N_113.BLIF N_113_i 0 1 -.names ahigh_c_30__n.BLIF ahigh_i_30__n -0 1 -.names BGACK_030_INT_i.BLIF nEXP_SPACE_i.BLIF N_186_i -11 1 -.names gnd_n_n -.names ahigh_c_31__n.BLIF ahigh_i_31__n -0 1 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_185_i -11 1 -.names AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF BGACK_030_INT_i.BLIF \ -un1_amiga_bus_enable_low -11 1 -.names ahigh_c_28__n.BLIF ahigh_i_28__n -0 1 -.names CLK_030_c.BLIF CLK_030_c_i -0 1 -.names AS_000_DMA_i.BLIF AS_000_i.BLIF un7_as_030 -11 1 -.names ahigh_c_29__n.BLIF ahigh_i_29__n -0 1 -.names AS_000_DMA_i.BLIF CLK_030_c_i.BLIF N_184_0 -11 1 -.names un1_LDS_000_INT_0.BLIF un1_LDS_000_INT -0 1 -.names ahigh_c_26__n.BLIF ahigh_i_26__n -0 1 -.names N_163_i.BLIF sm_amiga_i_i_7__n.BLIF N_179_0 -11 1 -.names un1_UDS_000_INT_0.BLIF un1_UDS_000_INT -0 1 -.names ahigh_c_27__n.BLIF ahigh_i_27__n -0 1 -.names BGACK_030_INT_i.BLIF RST_c.BLIF N_251_i -11 1 -.names un10_ciin_10.BLIF un10_ciin_11.BLIF un10_ciin -11 1 -.names ahigh_c_24__n.BLIF ahigh_i_24__n -0 1 -.names LDS_000_c.BLIF LDS_000_c_i -0 1 -.names un21_fpu_cs_1.BLIF N_156_i.BLIF un21_fpu_cs -11 1 -.names ahigh_c_25__n.BLIF ahigh_i_25__n -0 1 -.names UDS_000_c.BLIF UDS_000_c_i -0 1 -.names un21_berr_1_0.BLIF N_156_i.BLIF un21_berr -11 1 -.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_172_i -11 1 -.names AS_000_i.BLIF DS_000_DMA_i.BLIF un6_ds_030 -11 1 -.names pos_clk_un21_bgack_030_int_i_0_0_1_n.BLIF \ -pos_clk_un21_bgack_030_int_i_0_0_2_n.BLIF pos_clk_un21_bgack_030_int_i_0_0_n -11 1 -.names N_163_i_1.BLIF N_163_i_2.BLIF N_163_i -11 1 -.names CLK_000_D_3_.BLIF clk_000_d_i_3__n -0 1 -.names N_115.BLIF N_115_i -0 1 -.names N_350.BLIF N_350_i +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i 0 1 .names N_114.BLIF N_114_i 0 1 -.names BGACK_030_INT_i.BLIF inst_RESET_OUT.BLIF un1_rw_i -11 1 -.names un6_ds_030.BLIF un6_ds_030_i +.names gnd_n_n +.names nEXP_SPACE_c.BLIF nEXP_SPACE_i 0 1 -.names N_185_i.BLIF RST_c.BLIF N_126_0 +.names AMIGA_BUS_ENABLE_DMA_LOW_i.BLIF BGACK_030_INT_i.BLIF \ +un1_amiga_bus_enable_low +11 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_i +0 1 +.names N_109.BLIF N_109_i +0 1 +.names AS_000_DMA_i.BLIF AS_000_i.BLIF un7_as_030 +11 1 +.names RW_000_c.BLIF RW_000_i +0 1 +.names N_108.BLIF N_108_i +0 1 +.names un1_LDS_000_INT_0.BLIF un1_LDS_000_INT +0 1 +.names CLK_030_PE_1_.BLIF clk_030_pe_i_1__n +0 1 +.names N_111.BLIF N_111_i +0 1 +.names un1_UDS_000_INT_0.BLIF un1_UDS_000_INT +0 1 +.names DS_000_DMA_0_sqmuxa.BLIF DS_000_DMA_0_sqmuxa_i +0 1 +.names N_111_i.BLIF RST_c.BLIF N_265_2_0 +11 1 +.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 +0 1 +.names pos_clk_un4_rw_000_n.BLIF pos_clk_un4_rw_000_i_n +0 1 +.names un10_ciin_10.BLIF un10_ciin_11.BLIF un10_ciin +11 1 +.names AS_000_c.BLIF AS_000_i +0 1 +.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF un1_as_000_i +11 1 +.names un21_fpu_cs_1.BLIF FPU_SENSE_i.BLIF un21_fpu_cs +11 1 +.names inst_AMIGA_DS.BLIF AMIGA_DS_i +0 1 +.names VPA_c.BLIF VPA_c_i +0 1 +.names un21_berr_1.BLIF FPU_SENSE_c.BLIF un21_berr +11 1 +.names pos_clk_un3_clk_out_int_n.BLIF pos_clk_un3_clk_out_int_i_n +0 1 +.names RST_c.BLIF VPA_c_i.BLIF N_52_0 +11 1 +.names AS_000_i.BLIF DS_000_DMA_i.BLIF un6_ds_030 +11 1 +.names CYCLE_DMA_0_.BLIF cycle_dma_i_0__n +0 1 +.names DTACK_c.BLIF DTACK_c_i +0 1 +.names nEXP_SPACE_i.BLIF un10_ciin_i.BLIF un13_ciin +11 1 +.names CYCLE_DMA_1_.BLIF cycle_dma_i_1__n +0 1 +.names DTACK_c_i.BLIF RST_c.BLIF N_48_0 +11 1 +.names pos_clk_as_000_dma6_n.BLIF pos_clk_as_000_dma6_i_n +0 1 +.names N_276.BLIF RESET_c.BLIF un3_ahigh_i 11 1 .names inst_DS_000_DMA.BLIF DS_000_DMA_i 0 1 -.names N_186_i.BLIF inst_RESET_OUT.BLIF N_313_i +.names pos_clk_un4_bgack_000_n.BLIF pos_clk_un4_bgack_000_i_n +0 1 +.names CLK_OUT_INTreg.BLIF CLK_EXP_i +0 1 +.names BGACK_000_c.BLIF pos_clk_un4_bgack_000_i_n.BLIF \ +pos_clk_un6_bgack_000_0_n 11 1 -.names N_132.BLIF N_132_i -0 1 -.names N_231_i_1.BLIF nEXP_SPACE_c.BLIF N_231_i -11 1 -.names N_133.BLIF N_133_i -0 1 -.names N_291.BLIF N_291_i -0 1 -.names un7_as_030.BLIF un7_as_030_i -0 1 .names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF AMIGA_BUS_ENABLE_DMA_LOW_i 0 1 -.names N_288.BLIF N_288_i +.names N_7.BLIF N_7_i 0 1 -.names N_287.BLIF N_287_i +.names ahigh_c_25__n.BLIF ahigh_i_25__n 0 1 -.names N_340.BLIF N_340_i -0 1 -.names N_284.BLIF N_284_i -0 1 -.names N_275.BLIF N_275_i -0 1 -.names N_275_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n +.names N_7_i.BLIF RST_c.BLIF N_41_0 11 1 -.names N_268.BLIF N_268_i +.names ahigh_c_24__n.BLIF ahigh_i_24__n 0 1 -.names N_268_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n +.names RW_000_i.BLIF pos_clk_un15_bgack_030_int_i_n.BLIF \ +pos_clk_un1_bgack_030_int_0_n 11 1 -.names N_265.BLIF N_265_i +.names ahigh_c_27__n.BLIF ahigh_i_27__n 0 1 -.names N_267.BLIF N_267_i -0 1 -.names N_337.BLIF N_337_i -0 1 -.names N_338.BLIF N_338_i -0 1 -.names N_337_i.BLIF N_338_i.BLIF N_55_0 +.names CLK_030_PE_0_.BLIF CLK_030_PE_1_.BLIF pos_clk_un12_clk_out_int_0_n 11 1 -.names inst_BGACK_030_INTreg.BLIF inst_RESET_OUT.BLIF un1_as_000_i -11 1 -.names CLK_030_c_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF N_245_0 -11 1 -.names N_229.BLIF N_229_i +.names ahigh_c_26__n.BLIF ahigh_i_26__n 0 1 -.names pos_clk_un9_bg_030_0_n.BLIF pos_clk_un9_bg_030_n -0 1 -.names N_227.BLIF N_227_i -0 1 -.names N_226.BLIF N_226_i -0 1 -.names N_246_0_1.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF N_246_0 +.names cycle_dma_i_0__n.BLIF cycle_dma_i_1__n.BLIF pos_clk_un3_0_n 11 1 -.names N_332.BLIF N_332_i +.names ahigh_c_29__n.BLIF ahigh_i_29__n 0 1 -.names N_332_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_n.BLIF \ -pos_clk_ds_000_dma_4_0_n +.names CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF pos_clk_un15_bgack_030_int_i_n 11 1 -.names AS_030_i.BLIF RST_c.BLIF N_48_0 +.names ahigh_c_28__n.BLIF ahigh_i_28__n +0 1 +.names N_3.BLIF N_3_i +0 1 +.names ahigh_c_31__n.BLIF ahigh_i_31__n +0 1 +.names N_3_i.BLIF RST_c.BLIF N_43_0 11 1 -.names BGACK_030_INT_i.BLIF RW_000_i.BLIF pos_clk_rw_000_dma_3_0_n +.names ahigh_c_30__n.BLIF ahigh_i_30__n +0 1 +.names N_4.BLIF N_4_i +0 1 +.names a_c_1__n.BLIF a_i_1__n +0 1 +.names N_4_i.BLIF RST_c.BLIF N_42_0 11 1 -.names N_218.BLIF N_218_i +.names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF AMIGA_BUS_ENABLE_DMA_HIGH_i +0 1 +.names un6_amiga_bus_data_dir.BLIF un6_amiga_bus_data_dir_i +0 1 +.names inst_AS_030_D0.BLIF AS_030_D0_i +0 1 +.names un12_amiga_bus_data_dir_m.BLIF un12_amiga_bus_data_dir_m_i 0 1 .names un10_ciin.BLIF un10_ciin_i 0 1 -.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF pos_clk_a0_dma_3_n +.names un6_amiga_bus_data_dir_i.BLIF un12_amiga_bus_data_dir_m_i.BLIF \ +AMIGA_BUS_DATA_DIR_c_0 11 1 -.names nEXP_SPACE_i.BLIF un10_ciin_i.BLIF N_62_0 +.names FPU_SENSE_c.BLIF FPU_SENSE_i +0 1 +.names N_22.BLIF N_22_i +0 1 +.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i +0 1 +.names N_22_i.BLIF RST_c.BLIF N_31_0 11 1 -.names pos_clk_rw_000_dma_3_0_n.BLIF pos_clk_rw_000_dma_3_n +.names a_decode_c_16__n.BLIF a_decode_i_16__n 0 1 -.names N_215.BLIF N_215_i +.names N_21.BLIF N_21_i 0 1 -.names N_216.BLIF N_216_i +.names a_decode_c_18__n.BLIF a_decode_i_18__n 0 1 -.names N_215_i.BLIF N_216_i.BLIF un10_amiga_bus_enable_high_i +.names N_21_i.BLIF RST_c.BLIF N_32_0 11 1 -.names N_214.BLIF N_214_i +.names a_decode_c_19__n.BLIF a_decode_i_19__n 0 1 -.names AS_030_i.BLIF N_214_i.BLIF N_310_0 +.names N_19.BLIF N_19_i +0 1 +.names G_122.BLIF N_224_i +0 1 +.names N_19_i.BLIF RST_c.BLIF N_34_0 +11 1 +.names G_123.BLIF N_225_i +0 1 +.names N_18.BLIF N_18_i +0 1 +.names G_124.BLIF N_226_i +0 1 +.names N_18_i.BLIF RST_c.BLIF N_35_0 +11 1 +.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ +pos_clk_un5_bgack_030_int_d_i_n +11 1 +.names a_i_1__n.BLIF BGACK_030_INT_i.BLIF \ +pos_clk_amiga_bus_enable_dma_high_3_0_n +11 1 +.names pos_clk_un6_bg_030_1_n.BLIF CLK_000_D_0_.BLIF pos_clk_un6_bg_030_n +11 1 +.names a_c_1__n.BLIF BGACK_030_INT_i.BLIF \ +pos_clk_amiga_bus_enable_dma_low_3_0_n +11 1 +.names pos_clk_ipl_1_n.BLIF N_225_i.BLIF pos_clk_ipl_n +11 1 +.names BGACK_030_INT_i.BLIF RW_000_i.BLIF pos_clk_rw_000_dma_3_0_n +11 1 +.names un13_ciin.BLIF un13_ciin_i +0 1 +.names UDS_000_c.BLIF UDS_000_c_i +0 1 +.names un6_ds_030.BLIF un6_ds_030_i +0 1 +.names LDS_000_c.BLIF LDS_000_c_i +0 1 +.names N_123.BLIF N_123_i +0 1 +.names LDS_000_c_i.BLIF UDS_000_c_i.BLIF N_86_i +11 1 +.names N_122.BLIF N_122_i +0 1 +.names N_129.BLIF N_129_i +0 1 +.names un7_as_030.BLIF un7_as_030_i +0 1 +.names N_130.BLIF N_130_i +0 1 +.names N_129_i.BLIF N_130_i.BLIF un11_amiga_bus_enable_high_i +11 1 +.names N_117.BLIF N_117_i +0 1 +.names N_117_i.BLIF RST_c.BLIF N_46_0 +11 1 +.names N_107.BLIF N_107_i +0 1 +.names N_107_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_0__n +11 1 +.names N_106.BLIF N_106_i +0 1 +.names N_106_i.BLIF RST_c.BLIF pos_clk_size_dma_6_0_1__n +11 1 +.names N_16.BLIF N_16_i +0 1 +.names N_254.BLIF N_254_i +0 1 +.names N_263.BLIF N_263_i +0 1 +.names N_250_i_1.BLIF N_263_i.BLIF N_250_i +11 1 +.names N_256.BLIF N_256_i +0 1 +.names N_189_i_1.BLIF N_263_i.BLIF N_189_i +11 1 +.names pos_clk_rw_000_int_5_0_n.BLIF pos_clk_rw_000_int_5_n +0 1 +.names N_101.BLIF N_101_i +0 1 +.names N_103.BLIF N_103_i +0 1 +.names N_104.BLIF N_104_i +0 1 +.names N_105.BLIF N_105_i +0 1 +.names N_115.BLIF N_115_i +0 1 +.names N_116.BLIF N_116_i +0 1 +.names N_131.BLIF N_131_i +0 1 +.names N_277.BLIF N_277_i +0 1 +.names N_131_i.BLIF N_277_i.BLIF N_64_0 +11 1 +.names N_91_0_3.BLIF nEXP_SPACE_c.BLIF N_91_0 +11 1 +.names N_104_i.BLIF SM_AMIGA_i_7_.BLIF N_159_0 +11 1 +.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_14 +1- 1 +-1 1 +.names N_85_i_1.BLIF N_85_i_2.BLIF N_85_i +11 1 +.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_15 +1- 1 +-1 1 +.names N_79.BLIF N_159_0.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 +11 1 +.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_24 +1- 1 +-1 1 +.names RW_c.BLIF RW_c_i +0 1 +.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF N_25 +1- 1 +-1 1 +.names N_159_0.BLIF RW_c_i.BLIF pos_clk_rw_000_int_5_0_n +11 1 +.names CLK_000_D_3_.BLIF clk_000_d_i_3__n +0 1 +.names N_25.BLIF N_25_i +0 1 +.names N_25_i.BLIF RST_c.BLIF N_28_0 11 1 .names N_24.BLIF N_24_i 0 1 -.names N_24_i.BLIF RST_c.BLIF N_33_0 +.names N_24_i.BLIF RST_c.BLIF N_27_0 11 1 -.names pos_clk_ds_000_dma_4_0_n.BLIF pos_clk_ds_000_dma_4_n +.names ipl_c_1__n.BLIF ipl_c_i_1__n 0 1 -.names N_23.BLIF N_23_i +.names ipl_c_i_1__n.BLIF RST_c.BLIF N_50_0 +11 1 +.names ipl_c_0__n.BLIF ipl_c_i_0__n 0 1 +.names ipl_c_i_0__n.BLIF RST_c.BLIF N_49_0 +11 1 +.names N_14.BLIF N_14_i +0 1 +.names N_14_i.BLIF RST_c.BLIF N_39_0 +11 1 +.names N_15.BLIF N_15_i +0 1 +.names N_15_i.BLIF RST_c.BLIF N_38_0 +11 1 +.names inst_BGACK_030_INT_D.BLIF inst_BGACK_030_INTreg.BLIF N_91_0_1 +11 1 +.names AS_030_D0_i.BLIF sm_amiga_i_i_7__n.BLIF N_91_0_2 +11 1 +.names N_91_0_1.BLIF N_91_0_2.BLIF N_91_0_3 +11 1 +.names N_108_i.BLIF N_109_i.BLIF N_265_i_1 +11 1 +.names N_112_i.BLIF RST_c.BLIF N_266_i_1 +11 1 +.names N_113_i.BLIF N_114_i.BLIF N_266_i_2 +11 1 +.names N_164_i.BLIF N_264.BLIF N_138_i_1 +11 1 +.names N_79.BLIF N_170_i.BLIF N_148_i_1 +11 1 +.names N_78.BLIF N_168_i.BLIF N_144_i_1 +11 1 +.names N_166_i.BLIF N_167_i.BLIF N_142_i_1 +11 1 +.names N_165_i.BLIF N_264_i.BLIF N_140_i_1 +11 1 +.names size_c_0__n.BLIF a_c_i_0__n.BLIF pos_clk_un10_sm_amiga_i_1_n +11 1 +.names N_76_i.BLIF N_76 +0 1 +.names AS_030_000_SYNC_i.BLIF nEXP_SPACE_c.BLIF N_85_i_1 +11 1 +.names CLK_000_D_4_.BLIF clk_000_d_i_3__n.BLIF N_85_i_2 +11 1 +.names AS_030_i.BLIF a_decode_c_17__n.BLIF N_277_1 +11 1 +.names a_decode_i_16__n.BLIF a_decode_i_18__n.BLIF N_277_2 +11 1 +.names BGACK_030_INT_i.BLIF RST_c.BLIF un1_rst_2_1 +11 1 +.names fc_c_1__n.BLIF a_decode_i_19__n.BLIF N_277_3 +11 1 +.names N_277_1.BLIF N_277_2.BLIF N_277_4 +11 1 +.names N_64_0.BLIF N_64 +0 1 +.names N_277_3.BLIF fc_c_0__n.BLIF N_277_5 +11 1 +.names AS_000_INT_i.BLIF AS_030_i.BLIF N_122 +11 1 +.names ahigh_i_24__n.BLIF ahigh_i_25__n.BLIF un10_ciin_1 +11 1 +.names AS_030_i.BLIF DSACK1_INT_i.BLIF N_123 +11 1 +.names ahigh_i_26__n.BLIF ahigh_i_27__n.BLIF un10_ciin_2 +11 1 +.names N_276.BLIF inst_RESET_OUT.BLIF N_132 +11 1 +.names ahigh_i_28__n.BLIF ahigh_i_29__n.BLIF un10_ciin_3 +11 1 +.names BGACK_030_INT_i.BLIF inst_RESET_OUT.BLIF N_133 +11 1 +.names ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF un10_ciin_4 +11 1 +.names AS_030_i.BLIF RST_c.BLIF N_274 +11 1 +.names a_decode_c_23__n.BLIF AS_030_D0_i.BLIF un10_ciin_5 +11 1 +.names BGACK_030_INT_i.BLIF nEXP_SPACE_i.BLIF N_276 +11 1 +.names a_decode_c_20__n.BLIF a_decode_c_21__n.BLIF un10_ciin_6 +11 1 +.names N_77_i.BLIF N_77 +0 1 +.names un10_ciin_1.BLIF un10_ciin_2.BLIF un10_ciin_7 +11 1 +.names N_79_i.BLIF N_79 +0 1 +.names un10_ciin_3.BLIF un10_ciin_4.BLIF un10_ciin_8 +11 1 +.names N_78_i.BLIF N_78 +0 1 +.names un10_ciin_5.BLIF un10_ciin_6.BLIF un10_ciin_9 +11 1 +.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_263 +11 1 +.names un10_ciin_7.BLIF un10_ciin_8.BLIF un10_ciin_10 +11 1 +.names N_108_1.BLIF rst_dly_i_2__n.BLIF N_108 +11 1 +.names un10_ciin_9.BLIF a_decode_c_22__n.BLIF un10_ciin_11 +11 1 +.names N_114_1.BLIF rst_dly_i_1__n.BLIF N_114 +11 1 +.names AS_000_i.BLIF BGACK_030_INT_i.BLIF un6_amiga_bus_data_dir_1 +11 1 +.names N_85_i.BLIF N_85 +0 1 +.names RW_000_c.BLIF nEXP_SPACE_i.BLIF un6_amiga_bus_data_dir_2 +11 1 +.names N_78_i.BLIF SM_AMIGA_0_.BLIF N_104 +11 1 +.names AMIGA_DS_i.BLIF AS_000_i.BLIF pos_clk_as_000_dma6_1_n +11 1 +.names N_91_0.BLIF N_91 +0 1 +.names pos_clk_un1_bgack_030_int_n.BLIF pos_clk_un3_n.BLIF \ +pos_clk_as_000_dma6_2_n +11 1 +.names AS_030_i.BLIF N_91.BLIF N_131 +11 1 +.names DS_000_DMA_0_sqmuxa_i.BLIF pos_clk_as_000_dma6_n.BLIF \ +DS_000_DMA_1_sqmuxa_1 +11 1 +.names N_277_4.BLIF N_277_5.BLIF N_277 +11 1 +.names CLK_030_PE_0_.BLIF clk_030_pe_i_1__n.BLIF pos_clk_un4_rw_000_1_n +11 1 +.names N_130_1.BLIF AS_030_i.BLIF N_130 +11 1 +.names CLK_030_c.BLIF RW_000_i.BLIF pos_clk_un4_rw_000_2_n +11 1 +.names N_270.BLIF RST_DLY_0_.BLIF N_115 +11 1 +.names pos_clk_un12_clk_out_int_n.BLIF AS_000_DMA_i.BLIF \ +pos_clk_un13_clk_out_int_1_n +11 1 +.names N_116_1.BLIF RST_c.BLIF N_116 +11 1 +.names N_76_i.BLIF N_137.BLIF N_125_1 +11 1 +.names N_79.BLIF sm_amiga_i_5__n.BLIF N_105 +11 1 +.names N_76.BLIF rst_dly_i_0__n.BLIF N_116_1 +11 1 +.names N_85.BLIF sm_amiga_i_i_7__n.BLIF N_103 +11 1 +.names cpu_est_i_2__n.BLIF VMA_INT_i.BLIF pos_clk_un29_clk_000_ne_1_1_n +11 1 +.names N_87.BLIF sm_amiga_i_0__n.BLIF N_101 +11 1 +.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF pos_clk_un29_clk_000_ne_1_2_n +11 1 +.names N_259_1.BLIF cpu_est_i_3__n.BLIF N_259 +11 1 +.names pos_clk_un29_clk_000_ne_1_1_n.BLIF pos_clk_un29_clk_000_ne_1_2_n.BLIF \ +pos_clk_un29_clk_000_ne_1_3_n +11 1 +.names N_251.BLIF cpu_est_2_.BLIF N_255 +11 1 +.names N_78_i.BLIF N_263.BLIF N_261_1 +11 1 +.names cpu_est_0_.BLIF cpu_est_i_2__n.BLIF N_256 +11 1 +.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_261_2 +11 1 +.names N_252.BLIF cpu_est_2_.BLIF N_254 +11 1 +.names N_76_i.BLIF N_251_i.BLIF N_262_1 +11 1 +.names cpu_est_1_.BLIF cpu_est_i_2__n.BLIF N_16 +11 1 +.names N_263.BLIF VPA_D_i.BLIF N_262_2 +11 1 +.names BGACK_030_INT_i.BLIF N_86_i.BLIF N_106 +11 1 +.names N_78_i.BLIF RW_c.BLIF DS_000_ENABLE_0_sqmuxa_1_1 +11 1 +.names N_86_i.BLIF N_86 +0 1 +.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_259_1 +11 1 +.names BGACK_030_INT_i.BLIF N_86.BLIF N_107 +11 1 +.names N_16_i.BLIF N_254_i.BLIF N_250_i_1 +11 1 +.names LDS_000_c.BLIF UDS_000_c.BLIF N_117 +11 1 +.names N_255_i.BLIF N_256_i.BLIF N_189_i_1 +11 1 +.names BGACK_030_INT_i.BLIF UDS_000_c.BLIF pos_clk_a0_dma_3_n +11 1 +.names nEXP_SPACE_c.BLIF inst_AS_030_D0.BLIF pos_clk_un6_bg_030_1_n +11 1 +.names AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF BGACK_030_INT_i.BLIF N_129 +11 1 +.names N_77.BLIF N_228_i.BLIF N_108_1 +11 1 +.names pos_clk_size_dma_6_0_1__n.BLIF pos_clk_size_dma_6_1__n +0 1 +.names N_228_i.BLIF rst_dly_i_0__n.BLIF N_114_1 +11 1 +.names pos_clk_size_dma_6_0_0__n.BLIF pos_clk_size_dma_6_0__n +0 1 +.names N_277.BLIF BGACK_000_c.BLIF un21_berr_1 +11 1 +.names pos_clk_rw_000_dma_3_0_n.BLIF pos_clk_rw_000_dma_3_n +0 1 +.names N_277.BLIF BGACK_000_c.BLIF un21_fpu_cs_1 +11 1 +.names pos_clk_amiga_bus_enable_dma_low_3_0_n.BLIF \ +pos_clk_amiga_bus_enable_dma_low_3_n +0 1 +.names inst_BGACK_030_INTreg.BLIF AS_030_000_SYNC_i.BLIF N_130_1 +11 1 +.names pos_clk_amiga_bus_enable_dma_high_3_0_n.BLIF \ +pos_clk_amiga_bus_enable_dma_high_3_n +0 1 +.names N_78.BLIF N_101_i.BLIF N_136_i_1 +11 1 +.names RST_c.BLIF pos_clk_un5_bgack_030_int_d_i_n.BLIF SIZE_DMA_3_sqmuxa +11 1 +.names N_103_i.BLIF N_104_i.BLIF N_152_i_1 +11 1 +.names pos_clk_un5_bgack_030_int_d_i_n.BLIF pos_clk_un5_bgack_030_int_d_n +0 1 +.names N_76.BLIF N_105_i.BLIF N_146_i_1 +11 1 +.names rw_000_dma_0_un1_n.BLIF rw_000_dma_0_un0_n.BLIF N_18 +1- 1 +-1 1 +.names N_115_i.BLIF N_116_i.BLIF N_267_i_1 +11 1 +.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF N_19 +1- 1 +-1 1 +.names N_226_i.BLIF N_224_i.BLIF pos_clk_ipl_1_n +11 1 +.names amiga_bus_enable_dma_low_0_un1_n.BLIF \ +amiga_bus_enable_dma_low_0_un0_n.BLIF N_21 +1- 1 +-1 1 +.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n +0 1 +.names amiga_bus_enable_dma_high_0_un1_n.BLIF \ +amiga_bus_enable_dma_high_0_un0_n.BLIF N_22 +1- 1 +-1 1 +.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n +11 1 +.names un6_amiga_bus_data_dir_1.BLIF un6_amiga_bus_data_dir_2.BLIF \ +un6_amiga_bus_data_dir +11 1 +.names BG_000DFFreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +11 1 +.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF un12_amiga_bus_data_dir_m +11 1 +.names SM_AMIGA_6_.BLIF uds_000_int_0_un3_n +0 1 +.names CLK_EXP_i.BLIF inst_CLK_OUT_PRE_D.BLIF pos_clk_un3_clk_out_int_n +11 1 +.names a_c_0__n.BLIF SM_AMIGA_6_.BLIF uds_000_int_0_un1_n +11 1 .names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF N_3 1- 1 -1 1 -.names N_23_i.BLIF RST_c.BLIF N_32_0 +.names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n +11 1 +.names pos_clk_as_000_dma6_1_n.BLIF pos_clk_as_000_dma6_2_n.BLIF \ +pos_clk_as_000_dma6_n +11 1 +.names SM_AMIGA_6_.BLIF lds_000_int_0_un3_n +0 1 +.names DS_000_DMA_1_sqmuxa_1.BLIF pos_clk_un4_rw_000_i_n.BLIF \ +DS_000_DMA_1_sqmuxa +11 1 +.names pos_clk_un10_sm_amiga_i_n.BLIF SM_AMIGA_6_.BLIF lds_000_int_0_un1_n 11 1 .names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF N_4 1- 1 -1 1 -.names N_22.BLIF N_22_i +.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n +11 1 +.names pos_clk_as_000_dma6_n.BLIF pos_clk_un3_clk_out_int_n.BLIF \ +AS_000_DMA_1_sqmuxa +11 1 +.names DS_000_ENABLE_1_sqmuxa.BLIF ds_000_enable_0_un3_n 0 1 -.names N_22_i.BLIF RST_c.BLIF N_31_0 +.names AS_000_i.BLIF un1_rst_2_1.BLIF un1_rst_2 11 1 -.names N_3.BLIF N_3_i +.names inst_DS_000_ENABLE.BLIF DS_000_ENABLE_1_sqmuxa.BLIF \ +ds_000_enable_0_un1_n +11 1 +.names un1_DS_000_ENABLE_0_sqmuxa.BLIF ds_000_enable_0_un3_n.BLIF \ +ds_000_enable_0_un0_n +11 1 +.names CYCLE_DMA_0_.BLIF pos_clk_un13_bgack_030_int_n.BLIF N_199 +11 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_2__un3_n 0 1 -.names N_3_i.BLIF RST_c.BLIF N_45_0 +.names N_76_i.BLIF pos_clk_un15_bgack_030_int_n.BLIF \ +pos_clk_un13_bgack_030_int_n 11 1 -.names N_4.BLIF N_4_i -0 1 -.names N_4_i.BLIF RST_c.BLIF N_44_0 +.names ipl_c_2__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_2__un1_n 11 1 -.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF N_15 -1- 1 --1 1 -.names N_15.BLIF N_15_i -0 1 -.names rw_000_dma_0_un1_n.BLIF rw_000_dma_0_un0_n.BLIF N_19 -1- 1 --1 1 -.names N_15_i.BLIF RST_c.BLIF N_40_0 +.names CLK_030_PE_0_.BLIF pos_clk_un13_clk_out_int_n.BLIF N_205 11 1 -.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF N_20 -1- 1 --1 1 -.names N_19.BLIF N_19_i -0 1 -.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF N_22 -1- 1 --1 1 -.names N_19_i.BLIF RST_c.BLIF N_36_0 +.names IPL_030DFF_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n 11 1 -.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF N_23 -1- 1 --1 1 -.names N_20.BLIF N_20_i -0 1 -.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_24 -1- 1 --1 1 -.names N_20_i.BLIF RST_c.BLIF N_35_0 -11 1 -.names amiga_bus_enable_dma_low_0_un1_n.BLIF \ -amiga_bus_enable_dma_low_0_un0_n.BLIF N_25 -1- 1 --1 1 -.names N_25.BLIF N_25_i -0 1 -.names amiga_bus_enable_dma_high_0_un1_n.BLIF \ -amiga_bus_enable_dma_high_0_un0_n.BLIF N_26 -1- 1 --1 1 -.names N_25_i.BLIF RST_c.BLIF N_30_0 -11 1 -.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF N_27 -1- 1 --1 1 -.names N_26.BLIF N_26_i -0 1 -.names N_26_i.BLIF RST_c.BLIF N_29_0 -11 1 -.names N_27.BLIF N_27_i -0 1 -.names N_27_i.BLIF RST_c.BLIF N_28_0 -11 1 -.names BG_030_c.BLIF BG_030_c_i -0 1 -.names BG_030_c_i.BLIF N_231.BLIF pos_clk_un9_bg_030_0_n -11 1 -.names N_201_i.BLIF N_202_i.BLIF N_235_i_1 -11 1 -.names N_203_i.BLIF RST_c.BLIF N_235_i_2 -11 1 -.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_156_i_1 -11 1 -.names a_decode_c_17__n.BLIF a_decode_i_16__n.BLIF N_156_i_2 -11 1 -.names a_decode_i_18__n.BLIF a_decode_i_19__n.BLIF N_156_i_3 -11 1 -.names N_156_i_1.BLIF N_156_i_2.BLIF N_156_i_4 -11 1 -.names size_c_0__n.BLIF a_c_i_0__n.BLIF pos_clk_un10_sm_amiga_i_1_n -11 1 -.names BERR_c.BLIF N_352_i.BLIF N_176_i_1 -11 1 -.names ahigh_i_24__n.BLIF ahigh_i_25__n.BLIF un10_ciin_1 -11 1 -.names ahigh_i_26__n.BLIF ahigh_i_27__n.BLIF un10_ciin_2 -11 1 -.names ahigh_i_28__n.BLIF ahigh_i_29__n.BLIF un10_ciin_3 -11 1 -.names ahigh_i_30__n.BLIF ahigh_i_31__n.BLIF un10_ciin_4 -11 1 -.names a_decode_c_23__n.BLIF AS_030_D0_i.BLIF un10_ciin_5 -11 1 -.names a_decode_c_20__n.BLIF a_decode_c_21__n.BLIF un10_ciin_6 -11 1 -.names un10_ciin_1.BLIF un10_ciin_2.BLIF un10_ciin_7 -11 1 -.names un10_ciin_3.BLIF un10_ciin_4.BLIF un10_ciin_8 -11 1 -.names un10_ciin_5.BLIF un10_ciin_6.BLIF un10_ciin_9 -11 1 -.names pos_clk_size_dma_6_0_0__n.BLIF pos_clk_size_dma_6_0__n -0 1 -.names un10_ciin_7.BLIF un10_ciin_8.BLIF un10_ciin_10 -11 1 -.names pos_clk_size_dma_6_0_1__n.BLIF pos_clk_size_dma_6_1__n -0 1 -.names un10_ciin_9.BLIF a_decode_c_22__n.BLIF un10_ciin_11 -11 1 -.names CYCLE_DMA_0_.BLIF N_150_i.BLIF N_199 -11 1 -.names AS_030_000_SYNC_i.BLIF CLK_000_D_4_.BLIF N_163_i_1 -11 1 -.names pos_clk_un21_bgack_030_int_i_0_0_n.BLIF \ -pos_clk_un21_bgack_030_int_i_0_n -0 1 -.names clk_000_d_i_3__n.BLIF nEXP_SPACE_c.BLIF N_163_i_2 -11 1 -.names N_231_i.BLIF N_231 -0 1 -.names AS_000_i.BLIF BGACK_030_INT_i.BLIF pos_clk_un21_bgack_030_int_i_0_0_1_n -11 1 -.names N_233_0.BLIF N_233 -0 1 -.names pos_clk_un21_bgack_030_int_i_0_o3_0_x2.BLIF N_350_i.BLIF \ -pos_clk_un21_bgack_030_int_i_0_0_2_n -11 1 -.names ipl_i_2__n.BLIF RST_c.BLIF N_111 -11 1 -.names N_149.BLIF N_278_i.BLIF N_138_i_1 -11 1 -.names ipl_i_1__n.BLIF RST_c.BLIF N_112 -11 1 -.names N_282_i.BLIF RST_c.BLIF N_138_i_2 -11 1 -.names ipl_i_0__n.BLIF RST_c.BLIF N_113 -11 1 -.names AS_000_i.BLIF N_199_i.BLIF N_59_i_1 -11 1 -.names a_c_1__n.BLIF BGACK_030_INT_i.BLIF N_114 -11 1 -.names N_204_i.BLIF N_251_i.BLIF N_59_i_2 -11 1 -.names a_i_1__n.BLIF BGACK_030_INT_i.BLIF N_115 -11 1 -.names N_150_i.BLIF N_191_i_i.BLIF N_233_0_1 -11 1 -.names N_245_0.BLIF N_245 -0 1 -.names N_192_i_i.BLIF N_360_i.BLIF N_233_0_2 -11 1 -.names N_246_0.BLIF N_246 -0 1 -.names AS_030_D0_i.BLIF N_156.BLIF N_214_1 -11 1 -.names N_62_0.BLIF N_62 -0 1 -.names N_185_i.BLIF sm_amiga_i_i_7__n.BLIF N_214_2 -11 1 -.names N_214_1.BLIF N_214_2.BLIF N_214_3 -11 1 -.names AS_030_i.BLIF DSACK1_INT_i.BLIF N_132 -11 1 -.names un21_berr_1.BLIF FPU_SENSE_i.BLIF un21_fpu_cs_1 -11 1 -.names AS_000_INT_i.BLIF AS_030_i.BLIF N_133 -11 1 -.names un21_berr_1.BLIF FPU_SENSE_c.BLIF un21_berr_1_0 -11 1 -.names N_310_0.BLIF N_310 -0 1 -.names N_149_i.BLIF N_176.BLIF N_182_0_1 -11 1 -.names N_126_0.BLIF N_126 -0 1 -.names N_196_i.BLIF N_197_i.BLIF N_234_i_1 -11 1 -.names N_149_i.BLIF N_149 -0 1 -.names N_198_i.BLIF RST_c.BLIF N_234_i_2 -11 1 -.names N_150_i.BLIF N_150 -0 1 -.names N_149_i.BLIF N_357.BLIF N_206_1 -11 1 -.names N_158_i.BLIF N_158 -0 1 -.names VPA_D_i.BLIF cpu_est_i_3__n.BLIF N_206_2 -11 1 -.names N_160_i.BLIF N_160 -0 1 -.names N_150_i.BLIF N_159_i.BLIF N_205_1 -11 1 -.names N_163_i.BLIF N_163 -0 1 -.names cpu_est_i_0__n.BLIF cpu_est_i_3__n.BLIF N_205_2 -11 1 -.names N_172_i.BLIF N_172 -0 1 -.names N_159_i.BLIF N_314_0.BLIF N_352_1 -11 1 -.names N_179_0.BLIF N_179 -0 1 -.names VMA_INT_i.BLIF VPA_D_i.BLIF N_352_2 -11 1 -.names N_184_0.BLIF N_184 -0 1 -.names inst_AS_030_D0.BLIF CLK_000_D_0_.BLIF N_231_i_1 -11 1 -.names N_185_i.BLIF N_185 -0 1 -.names N_291_i.BLIF N_293_i.BLIF N_152_i_1 -11 1 -.names N_196_1.BLIF rst_dly_i_2__n.BLIF N_196 -11 1 -.names N_150.BLIF N_288_i.BLIF N_144_i_1 -11 1 -.names N_203_1.BLIF rst_dly_i_1__n.BLIF N_203 -11 1 -.names N_287_i.BLIF N_340_i.BLIF N_142_i_1 -11 1 -.names cycle_dma_i_0__n.BLIF N_150.BLIF N_204 -11 1 -.names N_150.BLIF N_284_i.BLIF N_312_i_1 -11 1 -.names N_209_1.BLIF cpu_est_i_3__n.BLIF N_209 -11 1 -.names N_265_i.BLIF N_267_i.BLIF N_236_i_1 -11 1 -.names N_214_3.BLIF nEXP_SPACE_c.BLIF N_214 -11 1 -.names N_160.BLIF N_229_i.BLIF N_148_i_1 -11 1 -.names AMIGA_BUS_ENABLE_DMA_HIGH_i.BLIF BGACK_030_INT_i.BLIF N_215 -11 1 -.names N_150.BLIF N_227_i.BLIF N_136_i_1 -11 1 -.names N_216_1.BLIF AS_030_i.BLIF N_216 -11 1 -.names N_226_i.BLIF RW_000_i.BLIF N_246_0_1 -11 1 -.names CLK_030_H_i.BLIF N_184.BLIF N_218 -11 1 -.names N_218_i.BLIF RST_c.BLIF N_249_i_1 -11 1 -.names N_224_1.BLIF RW_000_c.BLIF N_224 -11 1 -.names AS_000_i.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2.BLIF N_57_i_1 -11 1 -.names inst_AS_000_DMA.BLIF RW_000_i.BLIF N_332 -11 1 -.names N_149_i.BLIF N_355.BLIF N_338_1 -11 1 -.names inst_CLK_030_H.BLIF CLK_030_c.BLIF N_226 -11 1 -.names AS_000_i.BLIF N_186_i.BLIF N_224_1 -11 1 -.names N_174.BLIF sm_amiga_i_0__n.BLIF N_227 -11 1 -.names inst_BGACK_030_INTreg.BLIF AS_030_000_SYNC_i.BLIF N_216_1 -11 1 -.names N_179.BLIF sm_amiga_i_6__n.BLIF N_229 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_209_1 -11 1 -.names inst_RESET_OUT.BLIF RST_c.BLIF N_337 -11 1 -.names N_207_i.BLIF rst_dly_i_0__n.BLIF N_203_1 -11 1 -.names N_338_1.BLIF RST_c.BLIF N_338 -11 1 -.names N_158.BLIF N_207_i.BLIF N_196_1 -11 1 -.names N_154.BLIF RST_DLY_0_.BLIF N_265 -11 1 -.names N_149.BLIF cpu_est_0_3__un3_n -0 1 -.names N_82_i.BLIF rst_dly_i_0__n.BLIF N_267 -11 1 -.names cpu_est_3_.BLIF N_149.BLIF cpu_est_0_3__un1_n -11 1 -.names BGACK_030_INT_i.BLIF N_172.BLIF N_268 -11 1 -.names N_189_i.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n -11 1 -.names BGACK_030_INT_i.BLIF N_172_i.BLIF N_275 -11 1 -.names un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un3_n -0 1 -.names N_150.BLIF SM_AMIGA_2_.BLIF N_278 -11 1 -.names N_311.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un1_n -11 1 -.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_282 -11 1 -.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n -11 1 -.names N_182.BLIF sm_amiga_i_2__n.BLIF N_284 +.names pos_clk_un13_clk_out_int_1_n.BLIF pos_clk_un3_clk_out_int_n.BLIF \ +pos_clk_un13_clk_out_int_n 11 1 .names pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un3_n 0 1 -.names N_149_i.BLIF N_176.BLIF N_340 -11 1 +.names pos_clk_un15_bgack_030_int_i_n.BLIF pos_clk_un15_bgack_030_int_n +0 1 .names cpu_est_i_1__n.BLIF pos_clk_un9_clk_000_pe_n.BLIF vma_int_0_un1_n 11 1 -.names N_171.BLIF sm_amiga_i_3__n.BLIF N_287 -11 1 +.names pos_clk_un3_0_n.BLIF pos_clk_un3_n +0 1 .names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n 11 1 -.names N_183.BLIF sm_amiga_i_4__n.BLIF N_288 -11 1 -.names N_149.BLIF cpu_est_0_1__un3_n +.names pos_clk_un12_clk_out_int_0_n.BLIF pos_clk_un12_clk_out_int_n 0 1 -.names N_163.BLIF sm_amiga_i_i_7__n.BLIF N_291 -11 1 -.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c +.names N_76.BLIF cpu_est_0_1__un3_n 0 1 -.names cpu_est_1_.BLIF N_149.BLIF cpu_est_0_1__un1_n +.names pos_clk_un1_bgack_030_int_0_n.BLIF pos_clk_un1_bgack_030_int_n +0 1 +.names cpu_est_1_.BLIF N_76.BLIF cpu_est_0_1__un1_n 11 1 -.names N_150_i.BLIF SM_AMIGA_0_.BLIF N_293 +.names RW_000_c.BLIF pos_clk_un3_clk_out_int_i_n.BLIF DS_000_DMA_0_sqmuxa 11 1 .names cpu_est_2_1__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n 11 1 -.names LDS_000_c.BLIF UDS_000_c.BLIF N_350 +.names RST_c.BLIF pos_clk_as_000_dma6_n.BLIF un1_rst_3 11 1 -.names N_149.BLIF cpu_est_0_2__un3_n +.names N_76.BLIF cpu_est_0_2__un3_n 0 1 -.names N_158_i.BLIF RST_DLY_2_.BLIF N_355 -11 1 -.names cpu_est_2_.BLIF N_149.BLIF cpu_est_0_2__un1_n +.names cpu_est_2_.BLIF N_76.BLIF cpu_est_0_2__un1_n 11 1 .names cpu_est_2_2__n.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n 11 1 -.names N_16.BLIF N_16_i +.names N_76.BLIF cpu_est_0_3__un3_n 0 1 -.names SM_AMIGA_6_.BLIF uds_000_int_0_un3_n +.names pos_clk_un4_rw_000_1_n.BLIF pos_clk_un4_rw_000_2_n.BLIF \ +pos_clk_un4_rw_000_n +11 1 +.names cpu_est_3_.BLIF N_76.BLIF cpu_est_0_3__un1_n +11 1 +.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_7 +1- 1 +-1 1 +.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c 0 1 -.names N_16_i.BLIF RST_c.BLIF N_39_0 -11 1 -.names a_c_0__n.BLIF SM_AMIGA_6_.BLIF uds_000_int_0_un1_n -11 1 -.names VPA_c.BLIF VPA_c_i -0 1 -.names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n -11 1 -.names RST_c.BLIF VPA_c_i.BLIF N_52_0 -11 1 -.names SM_AMIGA_6_.BLIF lds_000_int_0_un3_n -0 1 -.names N_156_i.BLIF N_156 -0 1 -.names DTACK_c.BLIF DTACK_c_i -0 1 -.names pos_clk_un10_sm_amiga_i_n.BLIF SM_AMIGA_6_.BLIF lds_000_int_0_un1_n -11 1 -.names N_154.BLIF N_158_i.BLIF N_201 -11 1 -.names DTACK_c_i.BLIF RST_c.BLIF N_53_0 -11 1 -.names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n -11 1 -.names N_82_i.BLIF rst_dly_i_1__n.BLIF N_202 -11 1 -.names N_210.BLIF N_210_i -0 1 -.names pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n -0 1 -.names N_154_0.BLIF N_154 -0 1 -.names N_211.BLIF N_211_i -0 1 -.names BGACK_000_c.BLIF pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n -11 1 -.names AS_030_i.BLIF BGACK_000_c.BLIF un21_berr_1 -11 1 -.names N_210_i.BLIF N_211_i.BLIF N_189_i -11 1 -.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \ -bgack_030_int_0_un0_n -11 1 -.names N_174_i.BLIF N_174 -0 1 -.names N_160.BLIF N_175_i.BLIF un1_SM_AMIGA_0_sqmuxa_1_0 -11 1 -.names N_66.BLIF ds_000_enable_0_un3_n -0 1 -.names inst_BGACK_030_INTreg.BLIF RW_000_i.BLIF N_223 -11 1 -.names RW_c.BLIF RW_c_i -0 1 -.names un1_DS_000_ENABLE_0_sqmuxa.BLIF N_66.BLIF ds_000_enable_0_un1_n -11 1 -.names N_133.BLIF RST_c.BLIF N_221 -11 1 -.names N_175_i.BLIF RW_c_i.BLIF N_311_0 -11 1 -.names inst_DS_000_ENABLE.BLIF ds_000_enable_0_un3_n.BLIF \ -ds_000_enable_0_un0_n -11 1 -.names N_160_i.BLIF RST_c.BLIF N_222 -11 1 -.names N_336.BLIF N_336_i -0 1 -.names N_126.BLIF size_dma_0_0__un3_n -0 1 -.names N_132.BLIF RST_c.BLIF N_219 -11 1 -.names N_244.BLIF N_244_i -0 1 -.names pos_clk_size_dma_6_0__n.BLIF N_126.BLIF size_dma_0_0__un1_n -11 1 -.names N_174_i.BLIF RST_c.BLIF N_220 -11 1 -.names SIZE_DMA_0_.BLIF size_dma_0_0__un3_n.BLIF size_dma_0_0__un0_n +.names N_189_i.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n 11 1 .names pos_clk_un6_bgack_000_0_n.BLIF pos_clk_un6_bgack_000_n 0 1 -.names cpu_est_3_.BLIF cpu_est_i_0__n.BLIF N_314_0 -11 1 -.names N_126.BLIF size_dma_0_1__un3_n +.names inst_VPA_D.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un3_n 0 1 -.names AS_000_c.BLIF N_150_i.BLIF N_359 +.names AS_000_c.BLIF N_76_i.BLIF pos_clk_un4_bgack_000_n 11 1 -.names cpu_est_i_1__n.BLIF cpu_est_i_2__n.BLIF N_159_i +.names DTACK_D0_i.BLIF inst_VPA_D.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un1_n 11 1 -.names pos_clk_size_dma_6_1__n.BLIF N_126.BLIF size_dma_0_1__un1_n +.names N_265_2_0.BLIF N_265_2 +0 1 +.names pos_clk_un29_clk_000_ne_1_n.BLIF \ +pos_clk_un31_clk_000_ne_1_i_m2_un3_n.BLIF pos_clk_un31_clk_000_ne_1_i_m2_un0_n 11 1 -.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF N_8 +.names N_76.BLIF rst_dly_i_2__n.BLIF N_111 +11 1 +.names pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n +0 1 +.names N_137.BLIF N_265_2.BLIF N_109 +11 1 +.names BG_030_c.BLIF BG_030_c_i +0 1 +.names BGACK_000_c.BLIF pos_clk_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n +11 1 +.names N_76.BLIF rst_dly_i_1__n.BLIF N_113 +11 1 +.names pos_clk_un6_bg_030_n.BLIF pos_clk_un6_bg_030_i_n +0 1 +.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \ +bgack_030_int_0_un0_n +11 1 +.names N_77_i.BLIF N_134.BLIF N_112 +11 1 +.names BG_030_c_i.BLIF pos_clk_un6_bg_030_i_n.BLIF pos_clk_un9_bg_030_0_n +11 1 +.names DS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un3_n +0 1 +.names pos_clk_un31_clk_000_ne_1_i_m2_un1_n.BLIF \ +pos_clk_un31_clk_000_ne_1_i_m2_un0_n.BLIF N_98 1- 1 -1 1 -.names inst_VMA_INTreg.BLIF VMA_INT_i +.names inst_UDS_000_INT.BLIF UDS_000_INT_i 0 1 -.names SIZE_DMA_1_.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un0_n +.names inst_DS_000_DMA.BLIF DS_000_DMA_1_sqmuxa.BLIF ds_000_dma_0_un1_n 11 1 -.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF N_14 +.names pos_clk_un29_clk_000_ne_1_3_n.BLIF cpu_est_i_1__n.BLIF \ +pos_clk_un29_clk_000_ne_1_n +11 1 +.names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un1_UDS_000_INT_0 +11 1 +.names pos_clk_as_000_dma6_i_n.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n +11 1 +.names N_87_i.BLIF N_87 +0 1 +.names inst_LDS_000_INT.BLIF LDS_000_INT_i +0 1 +.names AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un3_n +0 1 +.names N_270_0.BLIF N_270 +0 1 +.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un1_LDS_000_INT_0 +11 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_1_sqmuxa.BLIF as_000_dma_0_un1_n +11 1 +.names N_76_i.BLIF N_137_i_0.BLIF N_134 +11 1 +.names N_23.BLIF N_23_i +0 1 +.names pos_clk_as_000_dma6_i_n.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n +11 1 +.names N_125_1.BLIF RST_c.BLIF N_125 +11 1 +.names N_23_i.BLIF RST_c.BLIF N_30_0 +11 1 +.names SIZE_DMA_3_sqmuxa.BLIF size_dma_0_1__un3_n +0 1 +.names inst_RESET_OUT.BLIF RST_c.BLIF N_124 +11 1 +.names N_20.BLIF N_20_i +0 1 +.names SIZE_DMA_1_.BLIF SIZE_DMA_3_sqmuxa.BLIF size_dma_0_1__un1_n +11 1 +.names N_87_i.BLIF RST_c.BLIF N_121 +11 1 +.names N_20_i.BLIF RST_c.BLIF N_33_0 +11 1 +.names pos_clk_size_dma_6_1__n.BLIF size_dma_0_1__un3_n.BLIF \ +size_dma_0_1__un0_n +11 1 +.names DSACK1_INT_i.BLIF N_274.BLIF N_120 +11 1 +.names N_13.BLIF N_13_i +0 1 +.names SIZE_DMA_3_sqmuxa.BLIF size_dma_0_0__un3_n +0 1 +.names N_77_i.BLIF RST_DLY_2_.BLIF N_137 +11 1 +.names N_13_i.BLIF RST_c.BLIF N_40_0 +11 1 +.names SIZE_DMA_0_.BLIF SIZE_DMA_3_sqmuxa.BLIF size_dma_0_0__un1_n +11 1 +.names pos_clk_un31_clk_000_ne_i_n.BLIF pos_clk_un31_clk_000_ne_n +0 1 +.names ipl_c_2__n.BLIF ipl_c_i_2__n +0 1 +.names pos_clk_size_dma_6_0__n.BLIF size_dma_0_0__un3_n.BLIF \ +size_dma_0_0__un0_n +11 1 +.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_17 1- 1 -1 1 -.names N_352.BLIF N_352_i -0 1 -.names N_233.BLIF ipl_030_0_0__un3_n -0 1 -.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_21 -1- 1 --1 1 -.names N_353.BLIF N_353_i -0 1 -.names IPL_030DFF_0_reg.BLIF N_233.BLIF ipl_030_0_0__un1_n +.names ipl_c_i_2__n.BLIF RST_c.BLIF N_51_0 11 1 -.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_9 -1- 1 --1 1 -.names N_293.BLIF N_293_i +.names pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_high_0_un3_n 0 1 -.names ipl_c_0__n.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n -11 1 -.names un1_DS_000_ENABLE_0_sqmuxa_0.BLIF un1_DS_000_ENABLE_0_sqmuxa -0 1 -.names N_293_i.BLIF SM_AMIGA_i_7_.BLIF N_175_i -11 1 -.names N_233.BLIF ipl_030_0_1__un3_n -0 1 -.names N_66_0.BLIF N_66 -0 1 -.names N_176_i_1.BLIF N_353_i.BLIF N_176_i -11 1 -.names IPL_030DFF_1_reg.BLIF N_233.BLIF ipl_030_0_1__un1_n -11 1 -.names N_171_i.BLIF N_171 -0 1 -.names ipl_c_1__n.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n -11 1 -.names N_160_i.BLIF RW_c.BLIF N_354 -11 1 -.names N_198.BLIF N_198_i -0 1 -.names N_233.BLIF ipl_030_0_2__un3_n -0 1 -.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF N_18 -1- 1 --1 1 -.names N_197.BLIF N_197_i -0 1 -.names IPL_030DFF_2_reg.BLIF N_233.BLIF ipl_030_0_2__un1_n -11 1 .names pos_clk_un9_clk_000_pe_0_n.BLIF pos_clk_un9_clk_000_pe_n 0 1 -.names N_196.BLIF N_196_i +.names N_26.BLIF N_26_i 0 1 -.names ipl_c_2__n.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n +.names pos_clk_amiga_bus_enable_dma_high_3_n.BLIF \ +pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_high_0_un1_n 11 1 .names cpu_est_2_0_1__n.BLIF cpu_est_2_1__n 0 1 -.names N_149_i.BLIF SM_AMIGA_5_.BLIF N_183_0 -11 1 -.names N_185.BLIF a0_dma_0_un3_n -0 1 -.names cpu_est_2_0_2__n.BLIF cpu_est_2_2__n -0 1 -.names N_182_0_1.BLIF SM_AMIGA_3_.BLIF N_182_0 -11 1 -.names pos_clk_a0_dma_3_n.BLIF N_185.BLIF a0_dma_0_un1_n -11 1 -.names N_154.BLIF N_355.BLIF N_197 -11 1 -.names cpu_est_3_.BLIF cpu_est_i_1__n.BLIF N_180_0 -11 1 -.names inst_A0_DMA.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n -11 1 -.names N_149.BLIF rst_dly_i_2__n.BLIF N_198 -11 1 -.names cpu_est_1_.BLIF cpu_est_i_3__n.BLIF N_178_0 -11 1 -.names N_185.BLIF amiga_bus_enable_dma_low_0_un3_n -0 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_208 -11 1 -.names N_149.BLIF RST_c.BLIF N_82_i -11 1 -.names N_114_i.BLIF N_185.BLIF amiga_bus_enable_dma_low_0_un1_n -11 1 -.names N_315.BLIF cpu_est_2_.BLIF N_210 -11 1 -.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_315_i -11 1 -.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF \ -amiga_bus_enable_dma_low_0_un3_n.BLIF amiga_bus_enable_dma_low_0_un0_n -11 1 -.names N_315_i.BLIF N_315 -0 1 -.names N_351.BLIF N_351_i -0 1 -.names N_185.BLIF amiga_bus_enable_dma_high_0_un3_n -0 1 -.names N_180.BLIF cpu_est_i_2__n.BLIF N_212 -11 1 -.names N_351_i.BLIF RST_c.BLIF N_154_0 -11 1 -.names N_115_i.BLIF N_185.BLIF amiga_bus_enable_dma_high_0_un1_n -11 1 -.names N_180_0.BLIF N_180 -0 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_149_i +.names N_26_i.BLIF RST_c.BLIF N_29_0 11 1 .names inst_AMIGA_BUS_ENABLE_DMA_HIGH.BLIF \ amiga_bus_enable_dma_high_0_un3_n.BLIF amiga_bus_enable_dma_high_0_un0_n 11 1 -.names N_178.BLIF cpu_est_2_.BLIF N_213 -11 1 -.names N_355_i_0.BLIF RST_c.BLIF N_207_i -11 1 -.names pos_clk_un9_bg_030_n.BLIF bg_000_0_un3_n -0 1 -.names N_178_0.BLIF N_178 -0 1 -.names N_228.BLIF N_228_i -0 1 -.names BG_030_c.BLIF pos_clk_un9_bg_030_n.BLIF bg_000_0_un1_n -11 1 -.names N_160.BLIF sm_amiga_i_5__n.BLIF N_228 -11 1 -.names BG_000DFFreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n -11 1 -.names N_182_0.BLIF N_182 -0 1 -.names N_213.BLIF N_213_i -0 1 -.names N_246.BLIF ds_000_dma_0_un3_n -0 1 -.names N_176_i.BLIF N_176 -0 1 -.names N_212.BLIF N_212_i -0 1 -.names pos_clk_ds_000_dma_4_n.BLIF N_246.BLIF ds_000_dma_0_un1_n -11 1 -.names N_183_0.BLIF N_183 -0 1 -.names N_212_i.BLIF N_213_i.BLIF N_309_i -11 1 -.names inst_DS_000_DMA.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n -11 1 -.names N_149_i.BLIF N_355_i_0.BLIF N_351 -11 1 -.names N_357.BLIF N_357_i -0 1 -.names N_245.BLIF as_000_dma_0_un3_n -0 1 -.names N_315_i.BLIF cpu_est_i_2__n.BLIF N_357 -11 1 -.names N_210_i.BLIF N_357_i.BLIF cpu_est_2_0_2__n -11 1 -.names pos_clk_un21_bgack_030_int_i_0_n.BLIF N_245.BLIF as_000_dma_0_un1_n -11 1 -.names N_206_1.BLIF N_206_2.BLIF N_206 -11 1 -.names N_208.BLIF N_208_i -0 1 -.names inst_AS_000_DMA.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n -11 1 -.names N_205_1.BLIF N_205_2.BLIF N_205 -11 1 -.names N_209.BLIF N_209_i -0 1 -.names N_310.BLIF as_030_000_sync_0_un3_n -0 1 -.names N_352_1.BLIF N_352_2.BLIF N_352 -11 1 -.names N_208_i.BLIF N_209_i.BLIF cpu_est_2_0_1__n -11 1 -.names AS_030_c.BLIF N_310.BLIF as_030_000_sync_0_un1_n -11 1 -.names DTACK_D0_i.BLIF inst_VPA_D.BLIF N_353 -11 1 -.names N_206.BLIF N_206_i -0 1 -.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ -as_030_000_sync_0_un0_n -11 1 -.names N_314_0.BLIF N_314 -0 1 -.names N_205.BLIF N_205_i -0 1 -.names N_185.BLIF rw_000_dma_0_un3_n -0 1 -.names N_149_i.BLIF cpu_est_0_.BLIF N_244 -11 1 -.names N_205_i.BLIF N_206_i.BLIF pos_clk_un9_clk_000_pe_0_n -11 1 -.names pos_clk_rw_000_dma_3_n.BLIF N_185.BLIF rw_000_dma_0_un1_n -11 1 -.names N_149.BLIF cpu_est_i_0__n.BLIF N_336 -11 1 -.names N_18.BLIF N_18_i -0 1 -.names inst_RW_000_DMA.BLIF rw_000_dma_0_un3_n.BLIF rw_000_dma_0_un0_n -11 1 -.names N_311_0.BLIF N_311 -0 1 -.names N_18_i.BLIF RST_c.BLIF N_37_0 -11 1 -.names un1_SM_AMIGA_0_sqmuxa_1_0.BLIF un1_SM_AMIGA_0_sqmuxa_1 -0 1 -.names N_150_i.BLIF SM_AMIGA_4_.BLIF N_171_i -11 1 -.names N_314.BLIF cpu_est_i_2__n.BLIF N_211 -11 1 -.names N_354.BLIF N_354_i -0 1 -.names rw_000_int_0_un1_n.BLIF rw_000_int_0_un0_n.BLIF N_16 -1- 1 --1 1 -.names N_171.BLIF N_354_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_0 -11 1 -.names un1_amiga_bus_enable_low.BLIF un1_amiga_bus_enable_low_i -0 1 -.names AS_030_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_0.BLIF N_66_0 -11 1 -.names un21_fpu_cs.BLIF un21_fpu_cs_i -0 1 -.names inst_UDS_000_INT.BLIF UDS_000_INT_i -0 1 -.names cpu_est_2_.BLIF cpu_est_i_2__n -0 1 -.names inst_DS_000_ENABLE.BLIF UDS_000_INT_i.BLIF un1_UDS_000_INT_0 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_0__n -0 1 -.names inst_LDS_000_INT.BLIF LDS_000_INT_i -0 1 -.names inst_VPA_D.BLIF VPA_D_i -0 1 -.names inst_DS_000_ENABLE.BLIF LDS_000_INT_i.BLIF un1_LDS_000_INT_0 -11 1 -.names inst_DTACK_D0.BLIF DTACK_D0_i -0 1 -.names N_21.BLIF N_21_i -0 1 -.names cpu_est_3_.BLIF cpu_est_i_3__n -0 1 -.names N_21_i.BLIF RST_c.BLIF N_34_0 -11 1 -.names SM_AMIGA_i_7_.BLIF sm_amiga_i_i_7__n -0 1 -.names N_14.BLIF N_14_i -0 1 -.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n -0 1 -.names N_14_i.BLIF RST_c.BLIF N_41_0 -11 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n -0 1 -.names N_8.BLIF N_8_i -0 1 -.names cpu_est_1_.BLIF cpu_est_i_1__n -0 1 -.names N_8_i.BLIF RST_c.BLIF N_42_0 -11 1 -.names CLK_000_D_1_.BLIF clk_000_d_i_1__n +.names cpu_est_2_0_2__n.BLIF cpu_est_2_2__n 0 1 .names a_c_0__n.BLIF a_c_i_0__n 0 1 -.names N_355.BLIF N_355_i_0 +.names pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_low_0_un3_n 0 1 +.names N_261_1.BLIF N_261_2.BLIF N_261 +11 1 .names size_c_1__n.BLIF size_c_i_1__n 0 1 -.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n -0 1 +.names pos_clk_amiga_bus_enable_dma_low_3_n.BLIF \ +pos_clk_un5_bgack_030_int_d_n.BLIF amiga_bus_enable_dma_low_0_un1_n +11 1 +.names N_262_1.BLIF N_262_2.BLIF N_262 +11 1 .names pos_clk_un10_sm_amiga_i_1_n.BLIF size_c_i_1__n.BLIF \ pos_clk_un10_sm_amiga_i_n 11 1 +.names inst_AMIGA_BUS_ENABLE_DMA_LOW.BLIF \ +amiga_bus_enable_dma_low_0_un3_n.BLIF amiga_bus_enable_dma_low_0_un0_n +11 1 +.names N_251_i.BLIF N_251 +0 1 +.names DS_000_ENABLE_0_sqmuxa_1.BLIF DS_000_ENABLE_0_sqmuxa_1_i +0 1 +.names pos_clk_un5_bgack_030_int_d_n.BLIF a0_dma_0_un3_n +0 1 +.names N_252_0.BLIF N_252 +0 1 +.names DS_000_ENABLE_0_sqmuxa_1_i.BLIF N_157.BLIF un1_DS_000_ENABLE_0_sqmuxa_i +11 1 +.names pos_clk_a0_dma_3_n.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF \ +a0_dma_0_un1_n +11 1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_258 +11 1 +.names N_78_i.BLIF SM_AMIGA_4_.BLIF N_157_i +11 1 +.names inst_A0_DMA.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n +11 1 +.names N_251_i.BLIF cpu_est_i_2__n.BLIF N_257 +11 1 +.names N_76_i.BLIF SM_AMIGA_5_.BLIF N_160_0 +11 1 +.names pos_clk_un5_bgack_030_int_d_n.BLIF rw_000_dma_0_un3_n +0 1 +.names AS_030_i.BLIF un1_DS_000_ENABLE_0_sqmuxa_i.BLIF DS_000_ENABLE_1_sqmuxa +11 1 +.names SM_AMIGA_3_.BLIF pos_clk_un31_clk_000_ne_n.BLIF N_161_0 +11 1 +.names pos_clk_rw_000_dma_3_n.BLIF pos_clk_un5_bgack_030_int_d_n.BLIF \ +rw_000_dma_0_un1_n +11 1 +.names un1_DS_000_ENABLE_0_sqmuxa_i.BLIF un1_DS_000_ENABLE_0_sqmuxa +0 1 +.names N_85_i.BLIF sm_amiga_i_i_7__n.BLIF N_162_0 +11 1 +.names inst_RW_000_DMA.BLIF rw_000_dma_0_un3_n.BLIF rw_000_dma_0_un0_n +11 1 +.names N_76.BLIF sm_amiga_i_2__n.BLIF N_102 +11 1 +.names N_165.BLIF N_165_i +0 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_0__un3_n +0 1 +.names AS_000_INT_i.BLIF N_274.BLIF N_118 +11 1 +.names ipl_c_0__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_0__un1_n +11 1 +.names N_79_i.BLIF RST_c.BLIF N_119 +11 1 +.names N_167.BLIF N_167_i +0 1 +.names IPL_030DFF_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n +11 1 +.names N_264_i.BLIF N_264 +0 1 +.names N_166.BLIF N_166_i +0 1 +.names pos_clk_ipl_n.BLIF ipl_030_0_1__un3_n +0 1 +.names DS_000_ENABLE_0_sqmuxa_1_1.BLIF SM_AMIGA_6_.BLIF \ +DS_000_ENABLE_0_sqmuxa_1 +11 1 +.names ipl_c_1__n.BLIF pos_clk_ipl_n.BLIF ipl_030_0_1__un1_n +11 1 +.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_164 +11 1 +.names N_168.BLIF N_168_i +0 1 +.names IPL_030DFF_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n +11 1 +.names N_162.BLIF sm_amiga_i_6__n.BLIF N_170 +11 1 +.names N_64.BLIF as_030_000_sync_0_un3_n +0 1 +.names N_160.BLIF sm_amiga_i_4__n.BLIF N_168 +11 1 +.names N_170.BLIF N_170_i +0 1 +.names inst_AS_030_000_SYNC.BLIF N_64.BLIF as_030_000_sync_0_un1_n +11 1 +.names N_157.BLIF sm_amiga_i_3__n.BLIF N_166 +11 1 +.names AS_030_c.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n +11 1 +.names N_76_i.BLIF pos_clk_un31_clk_000_ne_n.BLIF N_167 +11 1 +.names N_164.BLIF N_164_i +0 1 +.names un1_SM_AMIGA_0_sqmuxa_1.BLIF rw_000_int_0_un3_n +0 1 +.names N_161.BLIF sm_amiga_i_2__n.BLIF N_165 +11 1 +.names pos_clk_rw_000_int_5_n.BLIF un1_SM_AMIGA_0_sqmuxa_1.BLIF \ +rw_000_int_0_un1_n +11 1 +.names N_162_0.BLIF N_162 +0 1 +.names N_102.BLIF N_102_i +0 1 +.names inst_RW_000_INT.BLIF rw_000_int_0_un3_n.BLIF rw_000_int_0_un0_n +11 1 +.names N_161_0.BLIF N_161 +0 1 +.names N_78.BLIF N_102_i.BLIF N_264_i +11 1 +.names N_160_0.BLIF N_160 +0 1 +.names N_78_i.BLIF SM_AMIGA_6_.BLIF N_79_i +11 1 +.names N_157_i.BLIF N_157 +0 1 +.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_78_i +11 1 +.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF N_26 +1- 1 +-1 1 +.names N_119.BLIF N_119_i +0 1 +.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF N_13 +1- 1 +-1 1 +.names N_118.BLIF N_118_i +0 1 +.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF N_20 +1- 1 +-1 1 +.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF N_23 +1- 1 +-1 1 +.names N_255.BLIF N_255_i +0 1 +.names ds_000_enable_0_un1_n.BLIF ds_000_enable_0_un0_n.BLIF N_8 +1- 1 +-1 1 +.names N_257.BLIF N_257_i +0 1 +.names pos_clk_un9_bg_030_0_n.BLIF pos_clk_un9_bg_030_n +0 1 +.names N_255_i.BLIF N_257_i.BLIF cpu_est_2_0_2__n +11 1 +.names un1_amiga_bus_enable_low.BLIF un1_amiga_bus_enable_low_i +0 1 +.names N_258.BLIF N_258_i +0 1 +.names un21_fpu_cs.BLIF un21_fpu_cs_i +0 1 +.names N_259.BLIF N_259_i +0 1 .names SM_AMIGA_2_.BLIF sm_amiga_i_2__n 0 1 -.names N_359.BLIF N_359_i -0 1 -.names RST_DLY_0_.BLIF rst_dly_i_0__n -0 1 -.names BGACK_000_c.BLIF N_359_i.BLIF pos_clk_un6_bgack_000_0_n -11 1 -.names RST_DLY_2_.BLIF rst_dly_i_2__n -0 1 -.names N_220.BLIF N_220_i -0 1 -.names a_decode_c_19__n.BLIF a_decode_i_19__n -0 1 -.names N_219.BLIF N_219_i -0 1 -.names a_decode_c_18__n.BLIF a_decode_i_18__n -0 1 -.names a_decode_c_16__n.BLIF a_decode_i_16__n -0 1 -.names N_222.BLIF N_222_i -0 1 -.names RW_000_c.BLIF RW_000_i -0 1 -.names N_221.BLIF N_221_i -0 1 -.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n -0 1 -.names AS_030_c.BLIF AS_030_i -0 1 -.names N_223.BLIF N_223_i -0 1 -.names inst_AS_000_INT.BLIF AS_000_INT_i -0 1 -.names N_224.BLIF N_224_i -0 1 -.names inst_DSACK1_INT.BLIF DSACK1_INT_i -0 1 -.names N_223_i.BLIF N_224_i.BLIF AMIGA_BUS_DATA_DIR_c_0 -11 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_0__n -0 1 -.names CLK_000_D_0_.BLIF clk_000_d_i_1__n.BLIF N_150_i -11 1 -.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n -0 1 -.names N_156_i_4.BLIF N_156_i_3.BLIF N_156_i +.names N_258_i.BLIF N_259_i.BLIF cpu_est_2_0_1__n 11 1 .names SM_AMIGA_1_.BLIF sm_amiga_i_1__n 0 1 -.names N_150_i.BLIF SM_AMIGA_6_.BLIF N_160_i +.names N_262.BLIF N_262_i +0 1 +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names N_261.BLIF N_261_i +0 1 +.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n +0 1 +.names N_261_i.BLIF N_262_i.BLIF pos_clk_un9_clk_000_pe_0_n 11 1 -.names FPU_SENSE_c.BLIF FPU_SENSE_i +.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n 0 1 -.names N_149_i.BLIF SM_AMIGA_1_.BLIF N_174_i +.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_251_i 11 1 -.names RST_DLY_1_.BLIF rst_dly_i_1__n +.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n 0 1 -.names RST_DLY_0_.BLIF RST_DLY_1_.BLIF N_158_i +.names cpu_est_1_.BLIF cpu_est_i_3__n.BLIF N_252_0 11 1 -.names inst_AS_030_D0.BLIF AS_030_D0_i +.names CLK_000_D_0_.BLIF clk_000_d_i_0__n 0 1 -.names N_201.BLIF N_201_i +.names CLK_000_D_1_.BLIF clk_000_d_i_0__n.BLIF N_76_i +11 1 +.names inst_AS_000_INT.BLIF AS_000_INT_i 0 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +.names N_17.BLIF N_17_i 0 1 -.names N_202.BLIF N_202_i +.names SM_AMIGA_i_7_.BLIF sm_amiga_i_i_7__n 0 1 -.names nEXP_SPACE_c.BLIF nEXP_SPACE_i +.names N_17_i.BLIF RST_c.BLIF N_36_0 +11 1 +.names AS_030_c.BLIF AS_030_i 0 1 -.names N_203.BLIF N_203_i +.names N_98.BLIF N_98_i 0 1 -.names inst_RESET_OUT.BLIF RESET_OUT_i +.names cpu_est_2_.BLIF cpu_est_i_2__n +0 1 +.names BERR_c.BLIF N_98_i.BLIF pos_clk_un31_clk_000_ne_i_n +11 1 +.names cpu_est_0_.BLIF cpu_est_i_0__n +0 1 +.names N_137_i_0.BLIF RST_c.BLIF N_228_i +11 1 +.names cpu_est_3_.BLIF cpu_est_i_3__n +0 1 +.names N_121.BLIF N_121_i +0 1 +.names cpu_est_1_.BLIF cpu_est_i_1__n +0 1 +.names N_120.BLIF N_120_i 0 1 .names IPL_030DFF_2_reg.BLIF IPL_030_2_ 1 1 @@ -1508,21 +1598,18 @@ pos_clk_un10_sm_amiga_i_n .names un21_fpu_cs_i.BLIF FPU_CS 1 1 0 0 -.names N_132_i.BLIF DSACK1 +.names N_123_i.BLIF DSACK1 1 1 0 0 .names vcc_n_n.BLIF AVEC 1 1 0 0 -.names N_309_i.BLIF E +.names N_250_i.BLIF E 1 1 0 0 .names inst_VMA_INTreg.BLIF VMA 1 1 0 0 -.names gnd_n_n.BLIF RESET -1 1 -0 0 .names gnd_n_n.BLIF AMIGA_ADDR_ENABLE 1 1 0 0 @@ -1532,7 +1619,7 @@ pos_clk_un10_sm_amiga_i_n .names un1_amiga_bus_enable_low_i.BLIF AMIGA_BUS_ENABLE_LOW 1 1 0 0 -.names un10_amiga_bus_enable_high_i.BLIF AMIGA_BUS_ENABLE_HIGH +.names un11_amiga_bus_enable_high_i.BLIF AMIGA_BUS_ENABLE_HIGH 1 1 0 0 .names un10_ciin.BLIF CIIN @@ -1544,15 +1631,6 @@ pos_clk_un10_sm_amiga_i_n .names IPL_030DFF_0_reg.BLIF IPL_030_0_ 1 1 0 0 -.names CLK_OSZI_c.BLIF IPL_D0_0_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF IPL_D0_1_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF IPL_D0_2_.C -1 1 -0 0 .names CLK_OSZI_c.BLIF SM_AMIGA_i_7_.C 1 1 0 0 @@ -1577,12 +1655,6 @@ pos_clk_un10_sm_amiga_i_n .names CLK_OSZI_c.BLIF SM_AMIGA_0_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF cpu_est_0_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF cpu_est_1_.C -1 1 -0 0 .names CLK_OSZI_c.BLIF cpu_est_2_.C 1 1 0 0 @@ -1598,7 +1670,13 @@ pos_clk_un10_sm_amiga_i_n .names CLK_OSZI_c.BLIF IPL_030DFF_2_reg.C 1 1 0 0 -.names CLK_OSZI_c.BLIF RST_DLY_2_.C +.names CLK_OSZI_c.BLIF IPL_D0_0_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF IPL_D0_1_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF IPL_D0_2_.C 1 1 0 0 .names CLK_000.BLIF CLK_000_D_0_.D @@ -1637,31 +1715,31 @@ pos_clk_un10_sm_amiga_i_n .names CLK_OSZI_c.BLIF CYCLE_DMA_1_.C 1 1 0 0 +.names CLK_OSZI_c.BLIF CLK_030_PE_0_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF CLK_030_PE_1_.C +1 1 +0 0 .names CLK_OSZI_c.BLIF SIZE_DMA_0_.C 1 1 0 0 .names CLK_OSZI_c.BLIF SIZE_DMA_1_.C 1 1 0 0 +.names CLK_OSZI_c.BLIF cpu_est_0_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF cpu_est_1_.C +1 1 +0 0 .names CLK_OSZI_c.BLIF RST_DLY_0_.C 1 1 0 0 .names CLK_OSZI_c.BLIF RST_DLY_1_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_RW_000_INT.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C +.names CLK_OSZI_c.BLIF RST_DLY_2_.C 1 1 0 0 .names CLK_OSZI_c.BLIF inst_DS_000_DMA.C @@ -1673,16 +1751,16 @@ pos_clk_un10_sm_amiga_i_n .names CLK_OSZI_c.BLIF inst_AS_000_INT.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_AS_030_D0.C +.names CLK_OSZI_c.BLIF inst_AMIGA_DS.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_VPA_D.C +.names CLK_OSZI_c.BLIF inst_AS_030_D0.C 1 1 0 0 .names CLK_OSZI_c.BLIF inst_DTACK_D0.C 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_CLK_030_H.C +.names CLK_OSZI_c.BLIF inst_VPA_D.C 1 1 0 0 .names CLK_OSZI_c.BLIF inst_RESET_OUT.C @@ -1712,6 +1790,21 @@ pos_clk_un10_sm_amiga_i_n .names CLK_OSZI_c.BLIF inst_VMA_INTreg.C 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_RW_000_INT.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C +1 1 +0 0 .names CLK_OSZI_c.BLIF inst_BGACK_030_INT_D.C 1 1 0 0 @@ -1739,7 +1832,7 @@ pos_clk_un10_sm_amiga_i_n .names un7_as_030_i.BLIF AS_030 1 1 0 0 -.names N_133_i.BLIF AS_000 +.names N_122_i.BLIF AS_000 1 1 0 0 .names inst_RW_000_INT.BLIF RW_000 @@ -1754,6 +1847,9 @@ pos_clk_un10_sm_amiga_i_n .names gnd_n_n.BLIF BERR 1 1 0 0 +.names gnd_n_n.BLIF DTACK +1 1 +0 0 .names inst_RW_000_DMA.BLIF RW 1 1 0 0 @@ -1784,6 +1880,9 @@ pos_clk_un10_sm_amiga_i_n .names inst_A0_DMA.BLIF A_0_ 1 1 0 0 +.names A_DECODE_2_.BLIF a_decode_2__n +1 1 +0 0 .names AS_030.PIN.BLIF AS_030_c 1 1 0 0 @@ -1889,7 +1988,7 @@ pos_clk_un10_sm_amiga_i_n .names IPL_2_.BLIF ipl_c_2__n 1 1 0 0 -.names DTACK.BLIF DTACK_c +.names DTACK.PIN.BLIF DTACK_c 1 1 0 0 .names VPA.BLIF VPA_c @@ -1898,6 +1997,9 @@ pos_clk_un10_sm_amiga_i_n .names RST.BLIF RST_c 1 1 0 0 +.names RESET.BLIF RESET_c +1 1 +0 0 .names RW.PIN.BLIF RW_c 1 1 0 0 @@ -1946,10 +2048,7 @@ pos_clk_un10_sm_amiga_i_n .names A_DECODE_3_.BLIF a_decode_3__n 1 1 0 0 -.names A_DECODE_2_.BLIF a_decode_2__n -1 1 -0 0 -.names N_313_i.BLIF AS_030.OE +.names N_132.BLIF AS_030.OE 1 1 0 0 .names un1_as_000_i.BLIF AS_000.OE @@ -1964,79 +2063,93 @@ pos_clk_un10_sm_amiga_i_n .names un1_as_000_i.BLIF LDS_000.OE 1 1 0 0 -.names N_186_i.BLIF SIZE_0_.OE +.names N_276.BLIF SIZE_0_.OE 1 1 0 0 -.names N_186_i.BLIF SIZE_1_.OE +.names N_276.BLIF SIZE_1_.OE 1 1 0 0 -.names N_313_i.BLIF AHIGH_24_.OE +.names un3_ahigh_i.BLIF AHIGH_24_.OE 1 1 0 0 -.names N_313_i.BLIF AHIGH_25_.OE +.names un3_ahigh_i.BLIF AHIGH_25_.OE 1 1 0 0 -.names N_313_i.BLIF AHIGH_26_.OE +.names un3_ahigh_i.BLIF AHIGH_26_.OE 1 1 0 0 -.names N_313_i.BLIF AHIGH_27_.OE +.names un3_ahigh_i.BLIF AHIGH_27_.OE 1 1 0 0 -.names N_313_i.BLIF AHIGH_28_.OE +.names un3_ahigh_i.BLIF AHIGH_28_.OE 1 1 0 0 -.names N_313_i.BLIF AHIGH_29_.OE +.names un3_ahigh_i.BLIF AHIGH_29_.OE 1 1 0 0 -.names N_313_i.BLIF AHIGH_30_.OE +.names un3_ahigh_i.BLIF AHIGH_30_.OE 1 1 0 0 -.names N_313_i.BLIF AHIGH_31_.OE +.names un3_ahigh_i.BLIF AHIGH_31_.OE 1 1 0 0 -.names N_313_i.BLIF A_0_.OE +.names N_132.BLIF A_0_.OE 1 1 0 0 .names un21_berr.BLIF BERR.OE 1 1 0 0 -.names un1_rw_i.BLIF RW.OE +.names AS_000_DMA_i.BLIF DTACK.OE 1 1 0 0 -.names N_313_i.BLIF DS_030.OE +.names N_133.BLIF RW.OE +1 1 +0 0 +.names N_132.BLIF DS_030.OE 1 1 0 0 .names nEXP_SPACE_c.BLIF DSACK1.OE 1 1 0 0 -.names RESET_OUT_i.BLIF RESET.OE +.names un13_ciin_i.BLIF CIIN.OE 1 1 0 0 -.names N_62.BLIF CIIN.OE -1 1 -0 0 -.names CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF \ -pos_clk_un21_bgack_030_int_i_0_o3_0_x2 +.names IPL_D0_0_.BLIF ipl_c_0__n.BLIF G_122 01 1 10 1 11 0 00 0 -.names IPL_D0_0_.BLIF ipl_c_0__n.BLIF pos_clk_un1_ipl_i_0_x2 +.names IPL_D0_1_.BLIF ipl_c_1__n.BLIF G_123 01 1 10 1 11 0 00 0 -.names IPL_D0_1_.BLIF ipl_c_1__n.BLIF pos_clk_un1_ipl_i_0_x2_0 +.names IPL_D0_2_.BLIF ipl_c_2__n.BLIF G_124 01 1 10 1 11 0 00 0 -.names IPL_D0_2_.BLIF ipl_c_2__n.BLIF pos_clk_un1_ipl_i_0_x2_1 +.names cpu_est_0_.BLIF N_76.BLIF cpu_est_0_0_ 01 1 10 1 11 0 00 0 -.names CYCLE_DMA_1_.BLIF N_199.BLIF pos_clk_CYCLE_DMA_5_1_i_0_x2 +.names CYCLE_DMA_1_.BLIF N_199.BLIF G_97 +01 1 +10 1 +11 0 +00 0 +.names CYCLE_DMA_0_.BLIF pos_clk_un13_bgack_030_int_n.BLIF G_95 +01 1 +10 1 +11 0 +00 0 +.names CLK_030_PE_0_.BLIF pos_clk_un13_clk_out_int_n.BLIF G_101 +01 1 +10 1 +11 0 +00 0 +.names CLK_030_PE_1_.BLIF N_205.BLIF G_103 01 1 10 1 11 0 diff --git a/Logic/BUS68030.edi b/Logic/BUS68030.edi index b1ac7a9..6b9ddf5 100644 --- a/Logic/BUS68030.edi +++ b/Logic/BUS68030.edi @@ -4,7 +4,7 @@ (keywordMap (keywordLevel 0)) (status (written - (timeStamp 2016 10 26 22 26 20) + (timeStamp 2016 11 18 19 32 31) (author "Synopsys, Inc.") (program "Synplify Pro" (version "I-2014.03LC , mapper maplat, Build 923R")) ) @@ -125,13 +125,13 @@ (port FPU_CS (direction OUTPUT)) (port FPU_SENSE (direction INPUT)) (port DSACK1 (direction OUTPUT)) - (port DTACK (direction INPUT)) + (port DTACK (direction INOUT)) (port AVEC (direction OUTPUT)) (port E (direction OUTPUT)) (port VPA (direction INPUT)) (port VMA (direction OUTPUT)) (port RST (direction INPUT)) - (port RESET (direction OUTPUT)) + (port RESET (direction INPUT)) (port RW (direction INOUT)) (port AMIGA_ADDR_ENABLE (direction OUTPUT)) (port AMIGA_BUS_DATA_DIR (direction OUTPUT)) @@ -140,12 +140,6 @@ (port CIIN (direction OUTPUT)) ) (contents - (instance (rename IPL_D0_0 "IPL_D0[0]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename IPL_D0_1 "IPL_D0[1]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename IPL_D0_2 "IPL_D0[2]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) (instance (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance (rename SM_AMIGA_6 "SM_AMIGA[6]") (viewRef prim (cellRef DFF (libraryRef mach))) @@ -162,10 +156,6 @@ ) (instance (rename SM_AMIGA_0 "SM_AMIGA[0]") (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance (rename cpu_est_0 "cpu_est[0]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename cpu_est_1 "cpu_est[1]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) (instance (rename cpu_est_2 "cpu_est[2]") (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance (rename cpu_est_3 "cpu_est[3]") (viewRef prim (cellRef DFF (libraryRef mach))) @@ -176,7 +166,11 @@ ) (instance (rename IPL_030DFF_2 "IPL_030DFF[2]") (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance (rename RST_DLY_2 "RST_DLY[2]") (viewRef prim (cellRef DFF (libraryRef mach))) + (instance (rename IPL_D0_0 "IPL_D0[0]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename IPL_D0_1 "IPL_D0[1]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename IPL_D0_2 "IPL_D0[2]") (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance (rename CLK_000_D_0 "CLK_000_D[0]") (viewRef prim (cellRef DFF (libraryRef mach))) ) @@ -192,23 +186,23 @@ ) (instance (rename CYCLE_DMA_1 "CYCLE_DMA[1]") (viewRef prim (cellRef DFF (libraryRef mach))) ) + (instance (rename CLK_030_PE_0 "CLK_030_PE[0]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename CLK_030_PE_1 "CLK_030_PE[1]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) (instance (rename SIZE_DMA_0 "SIZE_DMA[0]") (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance (rename SIZE_DMA_1 "SIZE_DMA[1]") (viewRef prim (cellRef DFF (libraryRef mach))) ) + (instance (rename cpu_est_0 "cpu_est[0]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename cpu_est_1 "cpu_est[1]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) (instance (rename RST_DLY_0 "RST_DLY[0]") (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance (rename RST_DLY_1 "RST_DLY[1]") (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance RW_000_INT (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance AS_030_000_SYNC (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance LDS_000_INT (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance BGACK_030_INT (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance AS_000_DMA (viewRef prim (cellRef DFF (libraryRef mach))) + (instance (rename RST_DLY_2 "RST_DLY[2]") (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance DS_000_DMA (viewRef prim (cellRef DFF (libraryRef mach))) ) @@ -216,13 +210,13 @@ ) (instance AS_000_INT (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance AS_030_D0 (viewRef prim (cellRef DFF (libraryRef mach))) + (instance AMIGA_DS (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance VPA_D (viewRef prim (cellRef DFF (libraryRef mach))) + (instance AS_030_D0 (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance DTACK_D0 (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance CLK_030_H (viewRef prim (cellRef DFF (libraryRef mach))) + (instance VPA_D (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance RESET_OUT (viewRef prim (cellRef DFF (libraryRef mach))) ) @@ -242,6 +236,16 @@ ) (instance VMA_INT (viewRef prim (cellRef DFF (libraryRef mach))) ) + (instance RW_000_INT (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance AS_030_000_SYNC (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance LDS_000_INT (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance BGACK_030_INT (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance AS_000_DMA (viewRef prim (cellRef DFF (libraryRef mach))) + ) (instance BGACK_030_INT_D (viewRef prim (cellRef DFF (libraryRef mach))) ) (instance CLK_OUT_INT (viewRef prim (cellRef DFF (libraryRef mach))) @@ -310,13 +314,13 @@ (instance (rename IPL_1 "IPL[1]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) (instance (rename IPL_2 "IPL[2]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) (instance DSACK1 (viewRef prim (cellRef BUFTH (libraryRef mach))) ) - (instance DTACK (viewRef prim (cellRef IBUF (libraryRef mach))) ) + (instance DTACK (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) (instance AVEC (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance E (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance VPA (viewRef prim (cellRef IBUF (libraryRef mach))) ) (instance VMA (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance RST (viewRef prim (cellRef IBUF (libraryRef mach))) ) - (instance RESET (viewRef prim (cellRef BUFTH (libraryRef mach))) ) + (instance RESET (viewRef prim (cellRef IBUF (libraryRef mach))) ) (instance RW (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) (instance (rename FC_0 "FC[0]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) (instance (rename FC_1 "FC[1]") (viewRef prim (cellRef IBUF (libraryRef mach))) ) @@ -325,318 +329,341 @@ (instance AMIGA_BUS_ENABLE_LOW (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance AMIGA_BUS_ENABLE_HIGH (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance CIIN (viewRef prim (cellRef BUFTH (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_030_H_2_i_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_030_H_2_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_1_i_0_1 "pos_clk.CYCLE_DMA_5_1_i_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_1_i_0 "pos_clk.CYCLE_DMA_5_1_i_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_2_0_0_a3_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_2_0_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_iv_0_0_a3_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_iv_0_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_amiga_bus_enable_high_0_0_a3_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_amiga_bus_enable_high_0_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_a3_1_1_1 "cpu_est_2_0_0_a3_1_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_a3_1_1 "cpu_est_2_0_0_a3_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e1_i_0_a3_1_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e1_i_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_a3_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_i_0_0_0 "SM_AMIGA_nss_i_i_0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_1_4 "SM_AMIGA_srsts_i_0_0_1[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_4 "SM_AMIGA_srsts_i_0_0[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_1_3 "SM_AMIGA_srsts_i_0_0_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_3 "SM_AMIGA_srsts_i_0_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_i_i_1_2 "SM_AMIGA_srsts_i_i_i_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_i_i_2 "SM_AMIGA_srsts_i_i_i[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e0_i_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e0_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_1_6 "SM_AMIGA_srsts_i_0_0_1[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_6 "SM_AMIGA_srsts_i_0_0[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_1_0 "SM_AMIGA_srsts_i_0_0_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_0 "SM_AMIGA_srsts_i_0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_DMA_2_sqmuxa_i_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_DMA_2_sqmuxa_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_0_a3_0_1 "pos_clk.un9_clk_000_pe_0_0_a3_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_0_a3_0_2 "pos_clk.un9_clk_000_pe_0_0_a3_0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_0_a3_0 "pos_clk.un9_clk_000_pe_0_0_a3_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_0_a3_1 "pos_clk.un9_clk_000_pe_0_0_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_0_a3_2 "pos_clk.un9_clk_000_pe_0_0_a3_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_0_a3 "pos_clk.un9_clk_000_pe_0_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_a2_1_3 "SM_AMIGA_srsts_i_0_0_a2_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_a2_2_3 "SM_AMIGA_srsts_i_0_0_a2_2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_a2_3 "SM_AMIGA_srsts_i_0_0_a2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un6_bg_030_i_0_1 "pos_clk.un6_bg_030_i_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un6_bg_030_i_0 "pos_clk.un6_bg_030_i_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_i_0_0_1_0 "SM_AMIGA_nss_i_i_0_0_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_0_i_0_2 "pos_clk.CYCLE_DMA_5_0_i_0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_0_i_0 "pos_clk.CYCLE_DMA_5_0_i_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un1_ipl_i_0_1 "pos_clk.un1_ipl_i_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un1_ipl_i_0_2 "pos_clk.un1_ipl_i_0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un1_ipl_i_0 "pos_clk.un1_ipl_i_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_i_a3_1 "pos_clk.un34_as_030_d0_i_i_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_i_a3_2 "pos_clk.un34_as_030_d0_i_i_a3_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_i_a3_3 "pos_clk.un34_as_030_d0_i_i_a3_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_i_a3 "pos_clk.un34_as_030_d0_i_i_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un21_fpu_cs_0_a3_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un21_fpu_cs_0_a3_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un21_berr_0_a3_0_a3_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un21_berr_0_a3_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_i_i_o2_1_2 "SM_AMIGA_srsts_i_i_i_o2_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_i_i_o2_2 "SM_AMIGA_srsts_i_i_i_o2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un13_ciin_i_0_0_a3_8 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un13_ciin_i_0_0_a3_9 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un13_ciin_i_0_0_a3_10 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un13_ciin_i_0_0_a3_11 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un13_ciin_i_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_i_0_0_o2_1_0 "SM_AMIGA_nss_i_i_0_0_o2_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_i_0_0_o2_2_0 "SM_AMIGA_nss_i_i_0_0_o2_2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_i_0_0_o2_0 "SM_AMIGA_nss_i_i_0_0_o2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un21_bgack_030_int_i_0_o3_0_o3_1 "pos_clk.un21_bgack_030_int_i_0_o3_0_o3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un21_bgack_030_int_i_0_o3_0_o3_2 "pos_clk.un21_bgack_030_int_i_0_o3_0_o3_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un21_bgack_030_int_i_0_o3_0_o3 "pos_clk.un21_bgack_030_int_i_0_o3_0_o3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_1_1 "SM_AMIGA_srsts_i_0_0_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_2_1 "SM_AMIGA_srsts_i_0_0_2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_1 "SM_AMIGA_srsts_i_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_0_i_0_1 "pos_clk.CYCLE_DMA_5_0_i_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_i_o2_2 "pos_clk.un34_as_030_d0_i_i_o2_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_i_o2_3 "pos_clk.un34_as_030_d0_i_i_o2_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_i_o2_4 "pos_clk.un34_as_030_d0_i_i_o2_4") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_i_o2 "pos_clk.un34_as_030_d0_i_i_o2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_1_0 "SM_AMIGA_srsts_i_0_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_0 "SM_AMIGA_srsts_i_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_i_0_1_0 "SM_AMIGA_nss_i_i_0_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_i_0_0 "SM_AMIGA_nss_i_i_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_1_5 "SM_AMIGA_srsts_i_0_1[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_5 "SM_AMIGA_srsts_i_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e0_i_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e0_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_125_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_125 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_e_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_i_0_1_3 "cpu_est_2_i_0_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_i_0_3 "cpu_est_2_i_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un6_bg_030_0_a2_1 "pos_clk.un6_bg_030_0_a2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un6_bg_030_0_a2 "pos_clk.un6_bg_030_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e2_i_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e2_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e1_i_a2_1_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e1_i_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un21_berr_0_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un21_berr_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un21_fpu_cs_0_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un21_fpu_cs_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un11_amiga_bus_enable_high_0_a2_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un11_amiga_bus_enable_high_0_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un29_clk_000_ne_1_1 "pos_clk.un29_clk_000_ne_1_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un29_clk_000_ne_1_2 "pos_clk.un29_clk_000_ne_1_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un29_clk_000_ne_1_3 "pos_clk.un29_clk_000_ne_1_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un29_clk_000_ne_1 "pos_clk.un29_clk_000_ne_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_a3_1 "pos_clk.un9_clk_000_pe_0_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_a3_2 "pos_clk.un9_clk_000_pe_0_a3_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_a3 "pos_clk.un9_clk_000_pe_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_a3_0_1 "pos_clk.un9_clk_000_pe_0_a3_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_a3_0_2 "pos_clk.un9_clk_000_pe_0_a3_0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_a3_0 "pos_clk.un9_clk_000_pe_0_a3_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_ENABLE_0_sqmuxa_1_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_ENABLE_0_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_a3_0_1_1 "cpu_est_2_0_0_a3_0_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_a3_0_1 "cpu_est_2_0_0_a3_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_e_i_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un6_amiga_bus_data_dir (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_as_000_dma6_1 "pos_clk.as_000_dma6_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_as_000_dma6_2 "pos_clk.as_000_dma6_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_as_000_dma6 "pos_clk.as_000_dma6") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_DMA_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_DMA_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un4_rw_000_1 "pos_clk.un4_rw_000_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un4_rw_000_2 "pos_clk.un4_rw_000_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un4_rw_000 "pos_clk.un4_rw_000") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un13_clk_out_int_1 "pos_clk.un13_clk_out_int_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un13_clk_out_int "pos_clk.un13_clk_out_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RESET_OUT_2_0_a2_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RESET_OUT_2_0_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e0_i_a2_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e0_i_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d0_i_a2_0 "pos_clk.un34_as_030_d0_i_a2_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un10_ciin_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un10_ciin_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un10_ciin_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un10_ciin_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un10_ciin_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un10_ciin_6 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un10_ciin_7 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un10_ciin_8 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un10_ciin_9 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un10_ciin_10 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un10_ciin_11 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un10_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un6_amiga_bus_data_dir_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un6_amiga_bus_data_dir_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_4 "SM_AMIGA_srsts_i[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_1_3 "SM_AMIGA_srsts_i_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_3 "SM_AMIGA_srsts_i[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_1_2 "SM_AMIGA_srsts_i_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_2 "SM_AMIGA_srsts_i[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename pos_clk_un10_sm_amiga_1 "pos_clk.un10_sm_amiga_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename pos_clk_un10_sm_amiga "pos_clk.un10_sm_amiga") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_o2_0_1_3 "SM_AMIGA_srsts_i_0_0_o2_0_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_o2_0_3 "SM_AMIGA_srsts_i_0_0_o2_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un13_ciin_i_0_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un13_ciin_i_0_0_a3_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un13_ciin_i_0_0_a3_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un13_ciin_i_0_0_a3_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un13_ciin_i_0_0_a3_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un13_ciin_i_0_0_a3_6 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un13_ciin_i_0_0_a3_7 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RW_000_DMA_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_20_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance A0_DMA_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un15_clk_000_d_i_i_o2_1 "pos_clk.un15_clk_000_d_i_i_o2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un15_clk_000_d_i_i_o2_2 "pos_clk.un15_clk_000_d_i_i_o2_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un15_clk_000_d_i_i_o2 "pos_clk.un15_clk_000_d_i_i_o2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d0_i_a2_0_1 "pos_clk.un34_as_030_d0_i_a2_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d0_i_a2_0_2 "pos_clk.un34_as_030_d0_i_a2_0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d0_i_a2_0_3 "pos_clk.un34_as_030_d0_i_a2_0_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d0_i_a2_0_4 "pos_clk.un34_as_030_d0_i_a2_0_4") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d0_i_a2_0_5 "pos_clk.un34_as_030_d0_i_a2_0_5") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RW_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d0_i_o2_1 "pos_clk.un34_as_030_d0_i_o2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d0_i_o2_2 "pos_clk.un34_as_030_d0_i_o2_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d0_i_o2_3 "pos_clk.un34_as_030_d0_i_o2_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d0_i_o2 "pos_clk.un34_as_030_d0_i_o2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e2_i_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e2_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e1_i_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e1_i_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e1_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_1_1 "SM_AMIGA_srsts_i_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_1 "SM_AMIGA_srsts_i[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_1_6 "SM_AMIGA_srsts_i_1[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_6 "SM_AMIGA_srsts_i[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_1_4 "SM_AMIGA_srsts_i_1[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_SM_AMIGA_0_sqmuxa_1_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RW_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_RW_000_INT_5_i "pos_clk.RW_000_INT_5_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename CLK_000_D_i_3 "CLK_000_D_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_25_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_DMA_LOW_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_26_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_DMA_HIGH_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_27_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance BG_000_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance BG_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un9_bg_030_i "pos_clk.un9_bg_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e1_i_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e1_i_0_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e1_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_i_o2_1 "pos_clk.un34_as_030_d0_i_i_o2_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_214_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_i_i "pos_clk.un34_as_030_d0_i_i_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_24_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_030_1_i_2 "IPL_030_1_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_23_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename IPL_030_1_i_1 "IPL_030_1_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_22_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_24_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename IPL_030_1_i_0 "IPL_030_1_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_c_i_1 "IPL_c_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_D0_0_i_1 "IPL_D0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_c_i_0 "IPL_c_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_D0_0_i_0 "IPL_D0_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_14_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_15_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_16_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_254_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_263_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_256_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_101_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_103_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_104_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_105_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_115_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_116_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_131_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_277_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d0_i_i "pos_clk.un34_as_030_d0_i_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d0_i_o2_i "pos_clk.un34_as_030_d0_i_o2_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un15_clk_000_d_i_i_o2_i "pos_clk.un15_clk_000_d_i_i_o2_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un5_bgack_030_int_d_i_0 "pos_clk.un5_bgack_030_int_d_i_0") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i "pos_clk.AMIGA_BUS_ENABLE_DMA_HIGH_3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i "pos_clk.AMIGA_BUS_ENABLE_DMA_LOW_3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_RW_000_DMA_3_i "pos_clk.RW_000_DMA_3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance UDS_000_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance LDS_000_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_o2_i_0 "pos_clk.SIZE_DMA_6_0_0_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_129_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_130_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_117_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_DS_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_107_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_i_0 "pos_clk.SIZE_DMA_6_0_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_106_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_i_1 "pos_clk.SIZE_DMA_6_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_3_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance DS_000_DMA_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_4_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance AS_000_DMA_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_15_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_19_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RESET_OUT_2_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_000_DMA_1_sqmuxa_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_229_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_227_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_226_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DS_000_DMA_2_sqmuxa_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_332_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_DS_000_DMA_4_f0_0_0_i "pos_clk.DS_000_DMA_4_f0_0_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_030_D0_0_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_RW_000_DMA_3_0_0_i "pos_clk.RW_000_DMA_3_0_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_218_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un10_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un13_ciin_i_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_215_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_216_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SIZE_DMA_3_sqmuxa_0_a3_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un6_bg_030_i_0_i "pos_clk.un6_bg_030_i_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_291_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_288_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_287_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_340_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_284_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_275_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_0_i_1 "pos_clk.SIZE_DMA_6_0_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_268_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_0_i_0 "pos_clk.SIZE_DMA_6_0_0_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_265_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_267_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_337_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_338_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_204_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_282_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_278_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un5_bgack_030_int_d_i_0_a2_i_o3_i "pos_clk.un5_bgack_030_int_d_i_0_a2_i_o3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_030_H_2_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_o2_i_6 "SM_AMIGA_srsts_i_0_0_o2_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_0_i_0_o3_i "pos_clk.CYCLE_DMA_5_0_i_0_o3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance LDS_000_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance UDS_000_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_0_o2_i_0 "pos_clk.SIZE_DMA_6_0_0_0_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un21_bgack_030_int_i_0_o3_0_o3_i "pos_clk.un21_bgack_030_int_i_0_o3_0_o3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_i_0_0_o2_i_0 "SM_AMIGA_nss_i_i_0_0_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename CLK_000_D_i_3 "CLK_000_D_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_350_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_224_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_iv_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un1_ipl_i_0_o3_i "pos_clk.un1_ipl_i_0_o3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_i_o2_i "pos_clk.un34_as_030_d0_i_i_o2_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_sqmuxa_1_0_1_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_o2_i_0 "SM_AMIGA_srsts_i_0_0_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_o2_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_201_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_202_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_203_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un1_ipl_i_0_i "pos_clk.un1_ipl_i_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_360_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_191_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_192_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_199_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un6_amiga_bus_data_dir_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un12_amiga_bus_data_dir_m_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_iv_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_22_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_DMA_HIGH_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_21_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance UDS_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_14_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance LDS_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_8_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance BGACK_030_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_c_i_0 "A_c_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SIZE_c_i_1 "SIZE_c_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_359_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un6_bgack_000_0_0_i "pos_clk.un6_bgack_000_0_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_220_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_219_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_222_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_221_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_223_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_209_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_i_1 "cpu_est_2_0_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_206_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_205_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_0_i "pos_clk.un9_clk_000_pe_0_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_DMA_LOW_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_19_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance A0_DMA_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_18_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VMA_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_o2_i_3 "SM_AMIGA_srsts_i_0_0_o2_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_354_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_o3_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DS_000_ENABLE_1_sqmuxa_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance UDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_UDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance LDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_LDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_196_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_o2_i_4 "SM_AMIGA_srsts_i_0_0_o2_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_i_i_o2_i_2 "SM_AMIGA_srsts_i_i_i_o2_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un5_e_0_i_o2_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un5_e_0_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_o2_i_2 "cpu_est_2_0_0_0_o2_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_351_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_155_i_0_o2_i_o2_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_228_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_213_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_212_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_357_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_i_2 "cpu_est_2_0_0_0_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_208_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_210_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_211_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_sqmuxa_1_0_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RW_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_RW_000_INT_5_i_a3_i_i "pos_clk.RW_000_INT_5_i_a3_i_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_336_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_244_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_2_i_0_0_o2_i_3 "cpu_est_2_i_0_0_o2_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VMA_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_352_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_353_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_293_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_o2_0_i_3 "SM_AMIGA_srsts_i_0_0_o2_0_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_198_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_197_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_16_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RW_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RW_000_DMA_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_108_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_111_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RST_DLY_e2_i_2_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance VPA_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance VPA_D_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance DTACK_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance DTACK_D0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_i_2 "cpu_est_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_2_i_0_0_a3_3 "cpu_est_2_i_0_0_a3[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_3__r "cpu_est_0_3_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_0_3__m "cpu_est_0_3_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_3__n "cpu_est_0_3_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_3__p "cpu_est_0_3_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance DTACK_D0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_D_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RW_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_INT_0_r "RW_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename RW_000_INT_0_m "RW_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_INT_0_n "RW_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_INT_0_p "RW_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename pos_clk_un4_bgack_000_i "pos_clk.un4_bgack_000_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un6_bgack_000_i "pos_clk.un6_bgack_000_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_7_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance BGACK_030_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un1_bgack_030_int_i "pos_clk.un1_bgack_030_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance G_121_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance G_116_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance G_111_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_98_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un31_clk_000_ne_i_0 "pos_clk.un31_clk_000_ne_i_0") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_121_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_120_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_125_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_124_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RESET_OUT_2_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_134_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RST_DLY_e2_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RST_DLY_e2_i_o2_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_o2_i_0 "SM_AMIGA_srsts_i_0_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_112_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_113_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_114_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_109_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_118_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_255_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_257_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_i_2 "cpu_est_2_0_0_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_258_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_259_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_i_1 "cpu_est_2_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_262_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_261_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0_i "pos_clk.un9_clk_000_pe_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_i_0_o2_i_3 "cpu_est_2_i_0_o2_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un5_e_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_000_NE_0_o3_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_17_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VMA_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DS_000_ENABLE_0_sqmuxa_0_o3_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_o3_i_4 "SM_AMIGA_srsts_i_o3_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_o3_i_2 "SM_AMIGA_srsts_i_o3_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_o3_i_6 "SM_AMIGA_srsts_i_o3_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_165_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_167_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_166_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_168_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_170_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_164_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_102_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_o4_i_i_1 "SM_AMIGA_srsts_i_o4_i_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_SM_AMIGA_0_sqmuxa_1_0_o3_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_000_PE_0_o3_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_119_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_LDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_23_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance BG_000_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_20_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance UDS_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_13_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance LDS_000_INT_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_c_i_2 "IPL_c_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_D0_0_i_2 "IPL_D0_0_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_26_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_030_1_i_2 "IPL_030_1_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_c_i_0 "A_c_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SIZE_c_i_1 "SIZE_c_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DS_000_ENABLE_0_sqmuxa_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_DS_000_ENABLE_0_sqmuxa_i_0 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance BG_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un6_bg_030_i "pos_clk.un6_bg_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un9_bg_030_i "pos_clk.un9_bg_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance UDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_UDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance LDS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_UDS_000_INT (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_ENABLE_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BG_000_0_r "BG_000_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename BG_000_0_m "BG_000_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BG_000_0_n "BG_000_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BG_000_0_p "BG_000_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename UDS_000_INT_0_r "UDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename UDS_000_INT_0_m "UDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename UDS_000_INT_0_n "UDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename UDS_000_INT_0_p "UDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename LDS_000_INT_0_r "LDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename LDS_000_INT_0_m "LDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename LDS_000_INT_0_n "LDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename LDS_000_INT_0_p "LDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename DS_000_ENABLE_0_r "DS_000_ENABLE_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DS_000_ENABLE_0_m "DS_000_ENABLE_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_ENABLE_0_n "DS_000_ENABLE_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_ENABLE_0_p "DS_000_ENABLE_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_bg_030 "pos_clk.un9_bg_030") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un1_amiga_bus_enable_low_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance un21_fpu_cs_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_i_7 "SM_AMIGA_i_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_sqmuxa_1_0_1_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_0_o2 "pos_clk.un9_clk_000_pe_0_0_o2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_i_3 "cpu_est_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_2_i_0_0_o2_3 "cpu_est_2_i_0_0_o2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_0_x2_0_0 "cpu_est_0_0_x2_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_RW_000_INT_5_i_a3_i "pos_clk.RW_000_INT_5_i_a3_i") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_sqmuxa_1_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_i_0_0_3 "cpu_est_2_i_0_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DTACK_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_a2_0_3 "SM_AMIGA_srsts_i_0_0_a2_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_0_0_x2_0_a3_0_0 "cpu_est_0_0_x2_0_a3_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_i_0 "cpu_est_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_0_0_x2_0_a3_0 "cpu_est_0_0_x2_0_a3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_2 "cpu_est_2_0_0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_e_0_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_5 "SM_AMIGA_srsts_i_0_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_1_sqmuxa_i_0_111_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename CLK_000_D_i_1 "CLK_000_D_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_155_i_0_o2_i_o2_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_o2_2 "cpu_est_2_0_0_0_o2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLYlde_0_0_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_i_1 "cpu_est_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un5_e_0_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_e_0_i_o2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_o2_4 "SM_AMIGA_srsts_i_0_0_o2[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_e_0_i_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_a3_5 "SM_AMIGA_srsts_i_0_0_a3[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e0_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RST_DLY_i_0 "RST_DLY_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e0_i_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_a4_3 "SM_AMIGA_srsts_i_a4[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_a4_2 "SM_AMIGA_srsts_i_a4[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_i_i_a3_2 "SM_AMIGA_srsts_i_i_i_a3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_a3_3 "SM_AMIGA_srsts_i_0_0_a3[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_a4_1 "SM_AMIGA_srsts_i_a4[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_DS_000_ENABLE_0_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_124 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance (rename IPL_030_0_2__r "IPL_030_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename IPL_030_0_2__m "IPL_030_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_2__n "IPL_030_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_0_2__p "IPL_030_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename IPL_030_1_2 "IPL_030_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_D0_0_2 "IPL_D0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance LDS_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance UDS_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance BG_000_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_LDS_000_INT (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_INT_0_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename CLK_000_D_i_0 "CLK_000_D_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_000_PE_0_o3_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_SM_AMIGA_0_sqmuxa_1_0_o3_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_o4_i_1 "SM_AMIGA_srsts_i_o4_i[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_o3_6 "SM_AMIGA_srsts_i_o3[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_o3_2 "SM_AMIGA_srsts_i_o3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_o3_4 "SM_AMIGA_srsts_i_o3[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_ENABLE_0_sqmuxa_0_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_a4_6 "SM_AMIGA_srsts_i_a4[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_a3_4 "SM_AMIGA_srsts_i_0_0_a3[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_355_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_a2_2 "cpu_est_2_0_0_0_a2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_clk_000_pe_0_0 "pos_clk.un9_clk_000_pe_0_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_1 "cpu_est_2_0_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_a3_0_3 "SM_AMIGA_srsts_i_0_0_a3_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_ENABLE_1_sqmuxa_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_o2_3 "SM_AMIGA_srsts_i_0_0_o2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_a4_4 "SM_AMIGA_srsts_i_a4[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_a4_0_3 "SM_AMIGA_srsts_i_a4_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_i_0_a3_3 "cpu_est_2_i_0_a3[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_i_2 "cpu_est_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un5_e_i_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_e_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_0 "cpu_est_0[0]") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance I_220 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DS_000_ENABLE_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_o4_i_a2_1 "SM_AMIGA_srsts_i_o4_i_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_i_7 "SM_AMIGA_i_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_i_0_a2_0 "SM_AMIGA_nss_i_i_0_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_nss_i_i_0_a2_0_0 "SM_AMIGA_nss_i_i_0_a2_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_a2_5 "SM_AMIGA_srsts_i_0_a2[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_000_INT_0_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_INT_0_i_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename CLK_000_D_i_1 "CLK_000_D_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_000_NE_0_o3_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un5_e_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_i_1 "cpu_est_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_i_0_o2_3 "cpu_est_2_i_0_o2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un9_clk_000_pe_0 "pos_clk.un9_clk_000_pe_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_1 "cpu_est_2_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_2 "cpu_est_2_0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_i_3 "cpu_est_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un5_e_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_i_0 "cpu_est_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_a3_1 "cpu_est_2_0_0_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_0_0_a3_2 "cpu_est_2_0_0_a3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_2_i_0_a3_0_3 "cpu_est_2_i_0_a3_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RST_DLY_i_1 "RST_DLY_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RST_DLY_e1_i_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e1_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RST_DLY_i_2 "RST_DLY_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RST_DLY_e2_i_a2_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e2_i_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_a2_0 "SM_AMIGA_srsts_i_0_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VMA_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un31_clk_000_ne "pos_clk.un31_clk_000_ne") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename VMA_INT_0_r "VMA_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename VMA_INT_0_m "VMA_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename VMA_INT_0_n "VMA_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) @@ -650,148 +677,175 @@ (instance (rename cpu_est_0_2__m "cpu_est_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_est_0_2__n "cpu_est_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_est_0_2__p "cpu_est_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RST_DLY_i_2 "RST_DLY_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_a3_1 "cpu_est_2_0_0_0_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_2_0_0_0_a3_2 "cpu_est_2_0_0_0_a3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un5_e_0_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_0_i_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_0_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename A_DECODE_i_16 "A_DECODE_i[16]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_DECODE_i_19 "A_DECODE_i[19]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_DECODE_i_18 "A_DECODE_i[18]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance BGACK_030_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance LDS_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance UDS_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_LDS_000_INT (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_UDS_000_INT (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename UDS_000_INT_0_r "UDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename UDS_000_INT_0_m "UDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename UDS_000_INT_0_n "UDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename UDS_000_INT_0_p "UDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename LDS_000_INT_0_r "LDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename LDS_000_INT_0_m "LDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename LDS_000_INT_0_n "LDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename LDS_000_INT_0_p "LDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename cpu_est_0_3__r "cpu_est_0_3_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_0_3__m "cpu_est_0_3_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_3__n "cpu_est_0_3_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_3__p "cpu_est_0_3_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance RST_DLY_e2_i_o2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e2_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RESET_OUT_2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_0_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RESET_OUT_1_sqmuxa_i_0_132_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_D0_0_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RESET_OUT_1_sqmuxa_i_0_132_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance N_137_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RST_DLY_e2_i_a2_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RESET_OUT_2_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_0_i_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DSACK1_INT_0_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RST_DLY_i_0 "RST_DLY_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RST_DLY_e0_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un6_bgack_000 "pos_clk.un6_bgack_000") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un4_bgack_000 "pos_clk.un4_bgack_000") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un3_ahigh (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DTACK_D0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_D_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_as_000_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance nEXP_SPACE_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un2_as_030_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance BGACK_030_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_rw_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un4_as_030_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance RST_DLY_e2_i_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DTACK_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un31_clk_000_ne_1_i_m2_r "pos_clk.un31_clk_000_ne_1_i_m2.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un31_clk_000_ne_1_i_m2_m "pos_clk.un31_clk_000_ne_1_i_m2.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un31_clk_000_ne_1_i_m2_n "pos_clk.un31_clk_000_ne_1_i_m2.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un31_clk_000_ne_1_i_m2_p "pos_clk.un31_clk_000_ne_1_i_m2.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_srsts_i_0_o2_0 "SM_AMIGA_srsts_i_0_o2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_CLK_030_PE_4_1 "pos_clk.CLK_030_PE_4_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_rst_2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_rst_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_DS_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_223 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un4_rw_000_i "pos_clk.un4_rw_000_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DS_000_DMA_0_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_222 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename CLK_030_PE_i_1 "CLK_030_PE_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_000_DMA_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance G_95 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance G_101 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance G_103 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) (instance (rename BGACK_030_INT_0_r "BGACK_030_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename BGACK_030_INT_0_m "BGACK_030_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename BGACK_030_INT_0_n "BGACK_030_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename BGACK_030_INT_0_p "BGACK_030_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename DS_000_ENABLE_0_r "DS_000_ENABLE_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DS_000_ENABLE_0_m "DS_000_ENABLE_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_ENABLE_0_n "DS_000_ENABLE_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_ENABLE_0_p "DS_000_ENABLE_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance DS_000_ENABLE_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_0_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un6_bgack_000_0_0 "pos_clk.un6_bgack_000_0_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un6_bgack_000_0_0_a2 "pos_clk.un6_bgack_000_0_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_DSACK1_INT_1_i_a2_0_a2 "pos_clk.DSACK1_INT_1_i_a2_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance I_216 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_AS_000_INT_1_i_a2_0_a2 "pos_clk.AS_000_INT_1_i_a2_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_i_0_0_a3_0_0 "SM_AMIGA_nss_i_i_0_0_a3_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_a3_0 "SM_AMIGA_srsts_i_0_0_a3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance I_215 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_iv_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_INT_0_i_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_INT_0_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e2_i_0_o2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_1_sqmuxa_i_0_111_1_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RST_DLY_i_1 "RST_DLY_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_DLY_e1_i_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RST_DLY_e1_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance FPU_SENSE_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un21_berr_0_a3_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_o2_0 "SM_AMIGA_srsts_i_0_0_o2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_SM_AMIGA_0_sqmuxa_1_0_1_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename CLK_000_D_i_0 "CLK_000_D_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un1_ipl_i_0_o3 "pos_clk.un1_ipl_i_0_o3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_iv_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_INT_0_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_rw_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un21_bgack_030_int_i_0_o3_0_x2 "pos_clk.un21_bgack_030_int_i_0_o3_0_x2") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance nEXP_SPACE_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_0_o2_0 "pos_clk.SIZE_DMA_6_0_0_0_o2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_0_i_0_o3 "pos_clk.CYCLE_DMA_5_0_i_0_o3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_o2_6 "SM_AMIGA_srsts_i_0_0_o2[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_030_H_2_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance BGACK_030_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un5_bgack_030_int_d_i_0_a2_i_o3 "pos_clk.un5_bgack_030_int_d_i_0_a2_i_o3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un2_as_030_i_a2_i_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un1_ipl_i_0_x2 "pos_clk.un1_ipl_i_0_x2") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance (rename pos_clk_un1_ipl_i_0_x2_0 "pos_clk.un1_ipl_i_0_x2_0") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance (rename pos_clk_un1_ipl_i_0_x2_1 "pos_clk.un1_ipl_i_0_x2_1") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_1_i_0_x2 "pos_clk.CYCLE_DMA_5_1_i_0_x2") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance AS_030_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_un21_bgack_030_int_i_0_o3_0_a2 "pos_clk.un21_bgack_030_int_i_0_o3_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un34_as_030_d0_i_i "pos_clk.un34_as_030_d0_i_i") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un10_amiga_bus_enable_high_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un13_ciin_i_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_RW_000_DMA_3_0_0 "pos_clk.RW_000_DMA_3_0_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_D0_0_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_DS_000_DMA_4_f0_0_0 "pos_clk.DS_000_DMA_4_f0_0_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_DMA_1_sqmuxa_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_as_000_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_2_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_0_0 "pos_clk.SIZE_DMA_6_0_0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_0_1 "pos_clk.SIZE_DMA_6_0_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un4_as_030_i_a3_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SIZE_DMA_3_sqmuxa_0_a3_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_0_a3_0 "pos_clk.SIZE_DMA_6_0_0_0_a3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_SIZE_DMA_6_0_0_0_a3_1 "pos_clk.SIZE_DMA_6_0_0_0_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_a3_1 "SM_AMIGA_srsts_i_0_0_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_a3_0_1 "SM_AMIGA_srsts_i_0_0_a3_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_nss_i_i_0_0_a3_0 "SM_AMIGA_nss_i_i_0_0_a3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_A0_DMA_3_0_a3_0_a3 "pos_clk.A0_DMA_3_0_a3_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename A_i_1 "A_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i_a3_0_a3 "pos_clk.AMIGA_BUS_ENABLE_DMA_HIGH_3_i_a3_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i_a3_0_a3 "pos_clk.AMIGA_BUS_ENABLE_DMA_LOW_3_i_a3_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_i_0 "IPL_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_D0_0_i_a3_0_a3_0 "IPL_D0_0_i_a3_0_a3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_i_1 "IPL_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_D0_0_i_a3_0_a3_1 "IPL_D0_0_i_a3_0_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_i_2 "IPL_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_D0_0_i_a3_0_a3_2 "IPL_D0_0_i_a3_0_a3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance I_219 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance BGACK_030_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename CYCLE_DMA_i_0 "CYCLE_DMA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename pos_clk_CYCLE_DMA_5_0_i_0_a3 "pos_clk.CYCLE_DMA_5_0_i_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_DMA_HIGH_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un10_amiga_bus_enable_high_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_030_H_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_030_H_2_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_DS_000_DMA_4_f0_0_0_a3 "pos_clk.DS_000_DMA_4_f0_0_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_DMA_2_sqmuxa_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_srsts_i_0_0_a3_6 "SM_AMIGA_srsts_i_0_0_a3[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_DMA_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_217 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un7_as_030_0_a3_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RESET_OUT_2_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_OUT_PRE_50_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename CYCLE_DMA_i_1 "CYCLE_DMA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance G_111 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_116 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_121 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_97 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance un7_as_030 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un13_bgack_030_int "pos_clk.un13_bgack_030_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un1_bgack_030_int "pos_clk.un1_bgack_030_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un3_clk_out_int_i "pos_clk.un3_clk_out_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DS_000_DMA_0_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_rst_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_DMA_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_CYCLE_DMA_5_0 "pos_clk.CYCLE_DMA_5_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_CLK_030_PE_4_0 "pos_clk.CLK_030_PE_4_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_amiga_bus_enable_low (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_iv (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un12_amiga_bus_data_dir_m (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance CLK_EXP_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un3_clk_out_int "pos_clk.un3_clk_out_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_DMA_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un6_ds_030 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_r "DS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_m "DS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_n "DS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_p "DS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename pos_clk_as_000_dma6_i "pos_clk.as_000_dma6_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_r "AS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_m "AS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_n "AS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_p "AS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename pos_clk_CYCLE_DMA_5_1 "pos_clk.CYCLE_DMA_5_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance G_96 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance G_102 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance I_226 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_227 (viewRef prim (cellRef INV (libraryRef mach))) ) (instance I_224 (viewRef prim (cellRef INV (libraryRef mach))) ) (instance I_225 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_222 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_223 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_220 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_221 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_218 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_030_1_1 "IPL_030_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_1_2 "IPL_030_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_0__r "SIZE_DMA_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_0__m "SIZE_DMA_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_0__n "SIZE_DMA_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_0__p "SIZE_DMA_0_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (instance (rename SIZE_DMA_0_1__r "SIZE_DMA_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename SIZE_DMA_0_1__m "SIZE_DMA_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename SIZE_DMA_0_1__n "SIZE_DMA_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename SIZE_DMA_0_1__p "SIZE_DMA_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename SIZE_DMA_0_0__r "SIZE_DMA_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SIZE_DMA_0_0__m "SIZE_DMA_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SIZE_DMA_0_0__n "SIZE_DMA_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SIZE_DMA_0_0__p "SIZE_DMA_0_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance RW_000_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance A0_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_DMA_LOW_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_DMA_HIGH_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_r "AMIGA_BUS_ENABLE_DMA_HIGH_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_m "AMIGA_BUS_ENABLE_DMA_HIGH_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_n "AMIGA_BUS_ENABLE_DMA_HIGH_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_p "AMIGA_BUS_ENABLE_DMA_HIGH_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_r "AMIGA_BUS_ENABLE_DMA_LOW_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_m "AMIGA_BUS_ENABLE_DMA_LOW_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_n "AMIGA_BUS_ENABLE_DMA_LOW_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_p "AMIGA_BUS_ENABLE_DMA_LOW_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename A0_DMA_0_r "A0_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A0_DMA_0_m "A0_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename A0_DMA_0_n "A0_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename A0_DMA_0_p "A0_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename RW_000_DMA_0_r "RW_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename RW_000_DMA_0_m "RW_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RW_000_DMA_0_n "RW_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RW_000_DMA_0_p "RW_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_DMA_LOW_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_1 "pos_clk.SIZE_DMA_6_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_0 "pos_clk.SIZE_DMA_6_0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_DS_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un11_amiga_bus_enable_high_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_o2_0 "pos_clk.SIZE_DMA_6_0_0_o2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_RW_000_DMA_3 "pos_clk.RW_000_DMA_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename A_i_1 "A_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3 "pos_clk.AMIGA_BUS_ENABLE_DMA_LOW_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3 "pos_clk.AMIGA_BUS_ENABLE_DMA_HIGH_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance SIZE_DMA_3_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un5_bgack_030_int_d "pos_clk.un5_bgack_030_int_d") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance I_230 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_231 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_228 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_229 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d0_i "pos_clk.un34_as_030_d0_i") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_un34_as_030_d0_i_a2 "pos_clk.un34_as_030_d0_i_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance FPU_SENSE_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un10_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un13_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_a2_1 "pos_clk.SIZE_DMA_6_0_0_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_SIZE_DMA_6_0_0_a2_0 "pos_clk.SIZE_DMA_6_0_0_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_DS_0_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_AS_000_INT_1_i_a2 "pos_clk.AS_000_INT_1_i_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_DSACK1_INT_1_i_a2 "pos_clk.DSACK1_INT_1_i_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename pos_clk_A0_DMA_3_0_a2 "pos_clk.A0_DMA_3_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_DMA_HIGH_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un11_amiga_bus_enable_high_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance CLK_OUT_PRE_50_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_224_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_225_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_226_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_DECODE_i_18 "A_DECODE_i[18]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_DECODE_i_19 "A_DECODE_i[19]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance G_122 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance G_123 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance (rename A_DECODE_i_16 "A_DECODE_i[16]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename pos_clk_RW_000_INT_5 "pos_clk.RW_000_INT_5") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_SM_AMIGA_0_sqmuxa_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_SM_AMIGA_0_o4_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_rst_2_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_245_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_274_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename IPL_030_0_0__r "IPL_030_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename IPL_030_0_0__m "IPL_030_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_0_0__n "IPL_030_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) @@ -800,73 +854,34 @@ (instance (rename IPL_030_0_1__m "IPL_030_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_0_1__n "IPL_030_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_0_1__p "IPL_030_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename IPL_030_0_2__r "IPL_030_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename IPL_030_0_2__m "IPL_030_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_2__n "IPL_030_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_0_2__p "IPL_030_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance N_113_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_112_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_111_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A0_DMA_0_r "A0_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A0_DMA_0_m "A0_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename A0_DMA_0_n "A0_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename A0_DMA_0_p "A0_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance N_114_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_r "AMIGA_BUS_ENABLE_DMA_LOW_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_m "AMIGA_BUS_ENABLE_DMA_LOW_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_n "AMIGA_BUS_ENABLE_DMA_LOW_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_LOW_0_p "AMIGA_BUS_ENABLE_DMA_LOW_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance N_115_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_r "AMIGA_BUS_ENABLE_DMA_HIGH_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_m "AMIGA_BUS_ENABLE_DMA_HIGH_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_n "AMIGA_BUS_ENABLE_DMA_HIGH_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_p "AMIGA_BUS_ENABLE_DMA_HIGH_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename BG_000_0_r "BG_000_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename BG_000_0_m "BG_000_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BG_000_0_n "BG_000_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BG_000_0_p "BG_000_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance BG_000_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_DMA_HIGH_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_DMA_LOW_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance A0_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance RW_000_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DS_000_DMA_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename IPL_030_1_0 "IPL_030_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_ENABLE_DMA_LOW_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_amiga_bus_enable_low (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename pos_clk_un9_bg_030 "pos_clk.un9_bg_030") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un7_as_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_133_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_132_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DS_000_DMA_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un6_ds_030 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance N_122_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_123_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance un6_ds_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_r "DS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_m "DS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_n "DS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_p "DS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_r "AS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_m "AS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_n "AS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_p "AS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance un13_ciin_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename AS_030_000_SYNC_0_r "AS_030_000_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename AS_030_000_SYNC_0_m "AS_030_000_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename AS_030_000_SYNC_0_n "AS_030_000_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename AS_030_000_SYNC_0_p "AS_030_000_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename RW_000_DMA_0_r "RW_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename RW_000_DMA_0_m "RW_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_DMA_0_n "RW_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename RW_000_DMA_0_p "RW_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename RW_000_INT_0_r "RW_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename RW_000_INT_0_m "RW_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RW_000_INT_0_n "RW_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename RW_000_INT_0_p "RW_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance RW_000_INT_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_D0_0_0 "IPL_D0_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_D0_0_1 "IPL_D0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_1_0 "IPL_030_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename IPL_030_1_1 "IPL_030_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (net BGACK_030_INT (joined (portRef Q (instanceRef BGACK_030_INT)) - (portRef I0 (instanceRef un1_as_000_0_0)) - (portRef I0 (instanceRef pos_clk_un5_bgack_030_int_d_i_0_a2_i_o3)) - (portRef I0 (instanceRef BGACK_030_INT_i)) - (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a3)) + (portRef I0 (instanceRef pos_clk_un5_bgack_030_int_d)) + (portRef I0 (instanceRef un12_amiga_bus_data_dir_m)) (portRef I0 (instanceRef BGACK_030_INT_0_n)) - (portRef I0 (instanceRef un10_amiga_bus_enable_high_0_0_a3_0_1)) + (portRef I0 (instanceRef BGACK_030_INT_i)) + (portRef I0 (instanceRef un1_as_000_0)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_o2_1)) + (portRef I0 (instanceRef un11_amiga_bus_enable_high_0_a2_0_1)) (portRef I0 (instanceRef BGACK_030)) )) (net VCC (joined @@ -889,14 +904,14 @@ (portRef I0 (instanceRef AHIGH_31)) (portRef I0 (instanceRef AMIGA_ADDR_ENABLE)) (portRef I0 (instanceRef BERR)) - (portRef I0 (instanceRef RESET)) + (portRef I0 (instanceRef DTACK)) )) (net un1_amiga_bus_enable_low (joined (portRef O (instanceRef un1_amiga_bus_enable_low)) (portRef I0 (instanceRef un1_amiga_bus_enable_low_i)) )) (net un7_as_030 (joined - (portRef O (instanceRef un7_as_030_0_a3_0_a3)) + (portRef O (instanceRef un7_as_030)) (portRef I0 (instanceRef un7_as_030_i)) )) (net un1_LDS_000_INT (joined @@ -907,56 +922,66 @@ (portRef O (instanceRef un1_UDS_000_INT_i)) (portRef I0 (instanceRef UDS_000)) )) + (net un1_SM_AMIGA_0_sqmuxa_1 (joined + (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_i)) + (portRef I1 (instanceRef RW_000_INT_0_m)) + (portRef I0 (instanceRef RW_000_INT_0_r)) + )) (net un10_ciin (joined - (portRef O (instanceRef un13_ciin_i_0_0_a3)) + (portRef O (instanceRef un10_ciin)) (portRef I0 (instanceRef un10_ciin_i)) (portRef I0 (instanceRef CIIN)) )) (net un21_fpu_cs (joined - (portRef O (instanceRef un21_fpu_cs_0_a3_0_a3)) + (portRef O (instanceRef un21_fpu_cs_0_a2)) (portRef I0 (instanceRef un21_fpu_cs_i)) )) (net un21_berr (joined - (portRef O (instanceRef un21_berr_0_a3_0_a3)) + (portRef O (instanceRef un21_berr_0_a2)) (portRef OE (instanceRef BERR)) )) (net un6_ds_030 (joined (portRef O (instanceRef un6_ds_030)) (portRef I0 (instanceRef un6_ds_030_i)) )) - (net (rename cpu_est_2 "cpu_est[2]") (joined - (portRef Q (instanceRef cpu_est_2)) - (portRef I1 (instanceRef cpu_est_2_0_0_0_a3_2)) - (portRef I0 (instanceRef cpu_est_0_2__m)) - (portRef I1 (instanceRef un5_e_0_i_a3_0)) - (portRef I0 (instanceRef cpu_est_i_2)) - )) - (net (rename cpu_est_3 "cpu_est[3]") (joined - (portRef Q (instanceRef cpu_est_3)) - (portRef I0 (instanceRef un5_e_0_i_o2_0)) - (portRef I0 (instanceRef cpu_est_2_i_0_0_o2_3)) - (portRef I0 (instanceRef cpu_est_i_3)) - (portRef I0 (instanceRef cpu_est_0_3__m)) - )) - (net (rename cpu_est_0 "cpu_est[0]") (joined - (portRef Q (instanceRef cpu_est_0)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_o2_2)) - (portRef I0 (instanceRef cpu_est_i_0)) - (portRef I1 (instanceRef cpu_est_0_0_x2_0_a3_0_0)) - (portRef I0 (instanceRef cpu_est_2_0_0_a3_1_1_1)) + (net un13_ciin (joined + (portRef O (instanceRef un13_ciin)) + (portRef I0 (instanceRef un13_ciin_i)) )) (net (rename cpu_est_1 "cpu_est[1]") (joined (portRef Q (instanceRef cpu_est_1)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_a3_1)) (portRef I0 (instanceRef cpu_est_0_1__m)) - (portRef I0 (instanceRef un5_e_0_i_o2)) + (portRef I0 (instanceRef cpu_est_2_0_0_a3_1)) + (portRef I1 (instanceRef cpu_est_2_i_0_o2_3)) (portRef I0 (instanceRef cpu_est_i_1)) - (portRef I1 (instanceRef cpu_est_2_0_0_0_o2_2)) + (portRef I0 (instanceRef un5_e_i_o2)) + (portRef I0 (instanceRef un5_e_i_a3_0)) + )) + (net (rename cpu_est_2 "cpu_est[2]") (joined + (portRef Q (instanceRef cpu_est_2)) + (portRef I0 (instanceRef cpu_est_0_2__m)) + (portRef I1 (instanceRef un5_e_i_a3)) + (portRef I0 (instanceRef cpu_est_i_2)) + (portRef I1 (instanceRef cpu_est_2_i_0_a3_3)) + )) + (net (rename cpu_est_3 "cpu_est[3]") (joined + (portRef Q (instanceRef cpu_est_3)) + (portRef I0 (instanceRef cpu_est_0_3__m)) + (portRef I0 (instanceRef cpu_est_i_3)) + (portRef I0 (instanceRef pos_clk_un29_clk_000_ne_1_2)) + )) + (net (rename cpu_est_0 "cpu_est[0]") (joined + (portRef Q (instanceRef cpu_est_0)) + (portRef I0 (instanceRef cpu_est_2_i_0_a3_0_3)) + (portRef I0 (instanceRef cpu_est_i_0)) + (portRef I0 (instanceRef cpu_est_2_i_0_o2_3)) + (portRef I1 (instanceRef cpu_est_0_0)) + (portRef I0 (instanceRef cpu_est_2_0_0_a3_0_1_1)) )) (net AMIGA_BUS_ENABLE_DMA_HIGH (joined (portRef Q (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_n)) (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_i)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_n)) )) (net AMIGA_BUS_ENABLE_DMA_LOW (joined (portRef Q (instanceRef AMIGA_BUS_ENABLE_DMA_LOW)) @@ -966,43 +991,33 @@ (net AS_030_D0 (joined (portRef Q (instanceRef AS_030_D0)) (portRef I0 (instanceRef AS_030_D0_i)) - (portRef I0 (instanceRef pos_clk_un6_bg_030_i_0_1)) + (portRef I1 (instanceRef pos_clk_un6_bg_030_0_a2_1)) )) (net AS_030_000_SYNC (joined (portRef Q (instanceRef AS_030_000_SYNC)) - (portRef I0 (instanceRef AS_030_000_SYNC_0_n)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_m)) (portRef I0 (instanceRef AS_030_000_SYNC_i)) )) (net BGACK_030_INT_D (joined (portRef Q (instanceRef BGACK_030_INT_D)) - (portRef I1 (instanceRef pos_clk_un5_bgack_030_int_d_i_0_a2_i_o3)) + (portRef I1 (instanceRef pos_clk_un5_bgack_030_int_d)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_o2_1)) )) (net AS_000_DMA (joined (portRef Q (instanceRef AS_000_DMA)) - (portRef I0 (instanceRef AS_000_DMA_0_n)) + (portRef I0 (instanceRef AS_000_DMA_0_m)) (portRef I0 (instanceRef AS_000_DMA_i)) - (portRef I0 (instanceRef pos_clk_DS_000_DMA_4_f0_0_0_a3)) )) (net DS_000_DMA (joined (portRef Q (instanceRef DS_000_DMA)) - (portRef I0 (instanceRef DS_000_DMA_0_n)) + (portRef I0 (instanceRef DS_000_DMA_0_m)) (portRef I0 (instanceRef DS_000_DMA_i)) )) - (net (rename CYCLE_DMA_0 "CYCLE_DMA[0]") (joined - (portRef Q (instanceRef CYCLE_DMA_0)) - (portRef I0 (instanceRef G_96)) - (portRef I0 (instanceRef CYCLE_DMA_i_0)) - (portRef I0 (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_x2)) - )) - (net (rename CYCLE_DMA_1 "CYCLE_DMA[1]") (joined - (portRef Q (instanceRef CYCLE_DMA_1)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_x2)) - (portRef I1 (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_x2)) - )) (net VPA_D (joined (portRef Q (instanceRef VPA_D)) + (portRef I1 (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_m)) + (portRef I0 (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_r)) (portRef I0 (instanceRef VPA_D_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_0_3)) )) (net (rename CLK_000_D_3 "CLK_000_D[3]") (joined (portRef Q (instanceRef CLK_000_D_3)) @@ -1015,23 +1030,32 @@ )) (net RESET_OUT (joined (portRef Q (instanceRef RESET_OUT)) - (portRef I0 (instanceRef RESET_OUT_2_0_0_a3)) - (portRef I0 (instanceRef RESET_OUT_i)) - (portRef I1 (instanceRef un4_as_030_i_a3_i)) - (portRef I1 (instanceRef un1_as_000_0_0)) - (portRef I1 (instanceRef un1_rw_0)) + (portRef I1 (instanceRef un4_as_030_i_a2)) + (portRef I1 (instanceRef un1_rw_i_a2)) + (portRef I1 (instanceRef un1_as_000_0)) + (portRef I0 (instanceRef RESET_OUT_2_0_a2)) + )) + (net (rename CLK_030_PE_1 "CLK_030_PE[1]") (joined + (portRef Q (instanceRef CLK_030_PE_1)) + (portRef I1 (instanceRef G_121)) + (portRef I0 (instanceRef G_103)) + (portRef I0 (instanceRef CLK_030_PE_i_1)) + )) + (net AMIGA_DS (joined + (portRef Q (instanceRef AMIGA_DS)) + (portRef I0 (instanceRef AMIGA_DS_i)) )) (net (rename CLK_000_D_1 "CLK_000_D[1]") (joined (portRef Q (instanceRef CLK_000_D_1)) - (portRef I0 (instanceRef N_155_i_0_o2_i_o2_i_o2)) + (portRef I0 (instanceRef CLK_000_NE_0_o3_i_o2)) (portRef I0 (instanceRef CLK_000_D_i_1)) (portRef D (instanceRef CLK_000_D_2)) )) (net (rename CLK_000_D_0 "CLK_000_D[0]") (joined (portRef Q (instanceRef CLK_000_D_0)) - (portRef I0 (instanceRef pos_clk_un1_ipl_i_0_o3)) + (portRef I0 (instanceRef CLK_000_PE_0_o3_i_o2)) (portRef I0 (instanceRef CLK_000_D_i_0)) - (portRef I1 (instanceRef pos_clk_un6_bg_030_i_0_1)) + (portRef I1 (instanceRef pos_clk_un6_bg_030_0_a2)) (portRef D (instanceRef CLK_000_D_1)) )) (net CLK_OUT_PRE_50 (joined @@ -1041,19 +1065,20 @@ )) (net CLK_OUT_PRE_D (joined (portRef Q (instanceRef CLK_OUT_PRE_D)) + (portRef I1 (instanceRef pos_clk_un3_clk_out_int)) (portRef D (instanceRef CLK_OUT_INT)) )) (net (rename IPL_D0_0 "IPL_D0[0]") (joined (portRef Q (instanceRef IPL_D0_0)) - (portRef I0 (instanceRef pos_clk_un1_ipl_i_0_x2)) + (portRef I0 (instanceRef G_122)) )) (net (rename IPL_D0_1 "IPL_D0[1]") (joined (portRef Q (instanceRef IPL_D0_1)) - (portRef I0 (instanceRef pos_clk_un1_ipl_i_0_x2_0)) + (portRef I0 (instanceRef G_123)) )) (net (rename IPL_D0_2 "IPL_D0[2]") (joined (portRef Q (instanceRef IPL_D0_2)) - (portRef I0 (instanceRef pos_clk_un1_ipl_i_0_x2_1)) + (portRef I0 (instanceRef G_124)) )) (net (rename CLK_000_D_2 "CLK_000_D[2]") (joined (portRef Q (instanceRef CLK_000_D_2)) @@ -1061,7 +1086,20 @@ )) (net (rename CLK_000_D_4 "CLK_000_D[4]") (joined (portRef Q (instanceRef CLK_000_D_4)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_0_o2_1_0)) + (portRef I0 (instanceRef pos_clk_un15_clk_000_d_i_i_o2_2)) + )) + (net (rename pos_clk_un6_bg_030 "pos_clk.un6_bg_030") (joined + (portRef O (instanceRef pos_clk_un6_bg_030_0_a2)) + (portRef I0 (instanceRef pos_clk_un6_bg_030_i)) + )) + (net (rename pos_clk_ipl "pos_clk.ipl") (joined + (portRef O (instanceRef G_125)) + (portRef I1 (instanceRef IPL_030_0_1__m)) + (portRef I0 (instanceRef IPL_030_0_1__r)) + (portRef I1 (instanceRef IPL_030_0_0__m)) + (portRef I0 (instanceRef IPL_030_0_0__r)) + (portRef I1 (instanceRef IPL_030_0_2__m)) + (portRef I0 (instanceRef IPL_030_0_2__r)) )) (net LDS_000_INT (joined (portRef Q (instanceRef LDS_000_INT)) @@ -1070,54 +1108,70 @@ )) (net DS_000_ENABLE (joined (portRef Q (instanceRef DS_000_ENABLE)) - (portRef I0 (instanceRef DS_000_ENABLE_0_n)) - (portRef I0 (instanceRef un1_UDS_000_INT)) (portRef I0 (instanceRef un1_LDS_000_INT)) + (portRef I0 (instanceRef DS_000_ENABLE_0_m)) + (portRef I0 (instanceRef un1_UDS_000_INT)) )) (net UDS_000_INT (joined (portRef Q (instanceRef UDS_000_INT)) (portRef I0 (instanceRef UDS_000_INT_0_n)) (portRef I0 (instanceRef UDS_000_INT_i)) )) - (net (rename pos_clk_un9_bg_030 "pos_clk.un9_bg_030") (joined - (portRef O (instanceRef pos_clk_un9_bg_030_i)) - (portRef I1 (instanceRef BG_000_0_m)) - (portRef I0 (instanceRef BG_000_0_r)) - )) (net (rename SM_AMIGA_6 "SM_AMIGA[6]") (joined (portRef Q (instanceRef SM_AMIGA_6)) - (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_o2)) (portRef I0 (instanceRef SM_AMIGA_i_6)) + (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_o3_i_o2)) (portRef I1 (instanceRef LDS_000_INT_0_m)) (portRef I0 (instanceRef LDS_000_INT_0_r)) (portRef I1 (instanceRef UDS_000_INT_0_m)) (portRef I0 (instanceRef UDS_000_INT_0_r)) + (portRef I1 (instanceRef DS_000_ENABLE_0_sqmuxa_1)) )) (net (rename SM_AMIGA_4 "SM_AMIGA[4]") (joined (portRef Q (instanceRef SM_AMIGA_4)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_o2_3)) (portRef I0 (instanceRef SM_AMIGA_i_4)) + (portRef I1 (instanceRef DS_000_ENABLE_0_sqmuxa_0_o3)) )) (net (rename SM_AMIGA_1 "SM_AMIGA[1]") (joined (portRef Q (instanceRef SM_AMIGA_1)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_o2_0)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_o2_0)) (portRef I0 (instanceRef SM_AMIGA_i_1)) )) (net (rename SM_AMIGA_0 "SM_AMIGA[0]") (joined (portRef Q (instanceRef SM_AMIGA_0)) (portRef I0 (instanceRef SM_AMIGA_i_0)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_0_a3_0_0)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_a2_0_0)) )) (net (rename SIZE_DMA_0 "SIZE_DMA[0]") (joined (portRef Q (instanceRef SIZE_DMA_0)) - (portRef I0 (instanceRef SIZE_DMA_0_0__n)) + (portRef I0 (instanceRef SIZE_DMA_0_0__m)) (portRef I0 (instanceRef SIZE_0)) )) (net (rename SIZE_DMA_1 "SIZE_DMA[1]") (joined (portRef Q (instanceRef SIZE_DMA_1)) - (portRef I0 (instanceRef SIZE_DMA_0_1__n)) + (portRef I0 (instanceRef SIZE_DMA_0_1__m)) (portRef I0 (instanceRef SIZE_1)) )) + (net (rename CYCLE_DMA_0 "CYCLE_DMA[0]") (joined + (portRef Q (instanceRef CYCLE_DMA_0)) + (portRef I0 (instanceRef G_96)) + (portRef I0 (instanceRef G_111)) + (portRef I0 (instanceRef CYCLE_DMA_i_0)) + (portRef I0 (instanceRef G_95)) + )) + (net (rename CYCLE_DMA_1 "CYCLE_DMA[1]") (joined + (portRef Q (instanceRef CYCLE_DMA_1)) + (portRef I0 (instanceRef G_97)) + (portRef I1 (instanceRef G_111)) + (portRef I0 (instanceRef CYCLE_DMA_i_1)) + )) + (net (rename CLK_030_PE_0 "CLK_030_PE[0]") (joined + (portRef Q (instanceRef CLK_030_PE_0)) + (portRef I0 (instanceRef G_102)) + (portRef I0 (instanceRef G_121)) + (portRef I0 (instanceRef G_101)) + (portRef I0 (instanceRef pos_clk_un4_rw_000_1)) + )) (net RW_000_INT (joined (portRef Q (instanceRef RW_000_INT)) (portRef I0 (instanceRef RW_000_INT_0_n)) @@ -1130,18 +1184,18 @@ )) (net (rename RST_DLY_0 "RST_DLY[0]") (joined (portRef Q (instanceRef RST_DLY_0)) - (portRef I0 (instanceRef RST_DLY_e2_i_0_o2_0)) + (portRef I1 (instanceRef RST_DLY_e0_i_a2)) (portRef I0 (instanceRef RST_DLY_i_0)) - (portRef I1 (instanceRef RST_DLY_e0_i_0_a3)) + (portRef I0 (instanceRef RST_DLY_e2_i_o2_0)) )) (net (rename RST_DLY_1 "RST_DLY[1]") (joined (portRef Q (instanceRef RST_DLY_1)) + (portRef I1 (instanceRef RST_DLY_e2_i_o2_0)) (portRef I0 (instanceRef RST_DLY_i_1)) - (portRef I1 (instanceRef RST_DLY_e2_i_0_o2_0)) )) (net (rename RST_DLY_2 "RST_DLY[2]") (joined (portRef Q (instanceRef RST_DLY_2)) - (portRef I1 (instanceRef RESET_OUT_1_sqmuxa_i_0_111_1_a2)) + (portRef I1 (instanceRef RESET_OUT_1_sqmuxa_i_0_132_0_a2)) (portRef I0 (instanceRef RST_DLY_i_2)) )) (net A0_DMA (joined @@ -1149,18 +1203,9 @@ (portRef I0 (instanceRef A0_DMA_0_n)) (portRef I0 (instanceRef A_0)) )) - (net (rename pos_clk_A0_DMA_3 "pos_clk.A0_DMA_3") (joined - (portRef O (instanceRef pos_clk_A0_DMA_3_0_a3_0_a3)) - (portRef I0 (instanceRef A0_DMA_0_m)) - )) - (net (rename pos_clk_RW_000_DMA_3 "pos_clk.RW_000_DMA_3") (joined - (portRef O (instanceRef pos_clk_RW_000_DMA_3_0_0_i)) - (portRef I0 (instanceRef RW_000_DMA_0_m)) - )) - (net CLK_030_H (joined - (portRef Q (instanceRef CLK_030_H)) - (portRef I0 (instanceRef DS_000_DMA_2_sqmuxa_i_0_a3)) - (portRef I0 (instanceRef CLK_030_H_i)) + (net (rename pos_clk_RW_000_INT_5 "pos_clk.RW_000_INT_5") (joined + (portRef O (instanceRef pos_clk_RW_000_INT_5_i)) + (portRef I0 (instanceRef RW_000_INT_0_m)) )) (net DSACK1_INT (joined (portRef Q (instanceRef DSACK1_INT)) @@ -1172,675 +1217,740 @@ )) (net (rename SM_AMIGA_5 "SM_AMIGA[5]") (joined (portRef Q (instanceRef SM_AMIGA_5)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_o2_4)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_o3_4)) (portRef I0 (instanceRef SM_AMIGA_i_5)) )) (net (rename SM_AMIGA_3 "SM_AMIGA[3]") (joined (portRef Q (instanceRef SM_AMIGA_3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_o3_2)) (portRef I0 (instanceRef SM_AMIGA_i_3)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_i_i_o2_2)) )) (net (rename SM_AMIGA_2 "SM_AMIGA[2]") (joined (portRef Q (instanceRef SM_AMIGA_2)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a3_1)) (portRef I0 (instanceRef SM_AMIGA_i_2)) )) - (net (rename pos_clk_DS_000_DMA_4 "pos_clk.DS_000_DMA_4") (joined - (portRef O (instanceRef pos_clk_DS_000_DMA_4_f0_0_0_i)) - (portRef I0 (instanceRef DS_000_DMA_0_m)) + (net (rename pos_clk_CYCLE_DMA_5_0 "pos_clk.CYCLE_DMA_5[0]") (joined + (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0)) + (portRef D (instanceRef CYCLE_DMA_0)) )) - (net N_3 (joined - (portRef O (instanceRef DS_000_DMA_0_p)) - (portRef I0 (instanceRef N_3_i)) + (net (rename pos_clk_CYCLE_DMA_5_1 "pos_clk.CYCLE_DMA_5[1]") (joined + (portRef O (instanceRef pos_clk_CYCLE_DMA_5_1)) + (portRef D (instanceRef CYCLE_DMA_1)) )) - (net N_4 (joined - (portRef O (instanceRef AS_000_DMA_0_p)) - (portRef I0 (instanceRef N_4_i)) + (net (rename pos_clk_CLK_030_PE_4_0 "pos_clk.CLK_030_PE_4[0]") (joined + (portRef O (instanceRef pos_clk_CLK_030_PE_4_0)) + (portRef D (instanceRef CLK_030_PE_0)) )) - (net N_6 (joined + (net (rename pos_clk_CLK_030_PE_4_1 "pos_clk.CLK_030_PE_4[1]") (joined + (portRef O (instanceRef pos_clk_CLK_030_PE_4_1)) + (portRef D (instanceRef CLK_030_PE_1)) + )) + (net N_5 (joined (portRef O (instanceRef SIZE_DMA_0_0__p)) (portRef D (instanceRef SIZE_DMA_0)) )) - (net N_7 (joined + (net N_6 (joined (portRef O (instanceRef SIZE_DMA_0_1__p)) (portRef D (instanceRef SIZE_DMA_1)) )) - (net N_11 (joined + (net N_10 (joined (portRef O (instanceRef cpu_est_0_1__p)) (portRef D (instanceRef cpu_est_1)) )) - (net N_12 (joined + (net N_11 (joined (portRef O (instanceRef cpu_est_0_2__p)) (portRef D (instanceRef cpu_est_2)) )) - (net N_13 (joined + (net N_12 (joined (portRef O (instanceRef cpu_est_0_3__p)) (portRef D (instanceRef cpu_est_3)) )) - (net N_15 (joined + (net N_14 (joined (portRef O (instanceRef AS_030_000_SYNC_0_p)) + (portRef I0 (instanceRef N_14_i)) + )) + (net N_15 (joined + (portRef O (instanceRef RW_000_INT_0_p)) (portRef I0 (instanceRef N_15_i)) )) - (net N_19 (joined - (portRef O (instanceRef RW_000_DMA_0_p)) - (portRef I0 (instanceRef N_19_i)) - )) - (net N_20 (joined - (portRef O (instanceRef A0_DMA_0_p)) - (portRef I0 (instanceRef N_20_i)) - )) - (net N_22 (joined - (portRef O (instanceRef IPL_030_0_0__p)) - (portRef I0 (instanceRef N_22_i)) - )) - (net N_23 (joined - (portRef O (instanceRef IPL_030_0_1__p)) - (portRef I0 (instanceRef N_23_i)) - )) (net N_24 (joined - (portRef O (instanceRef IPL_030_0_2__p)) + (portRef O (instanceRef IPL_030_0_0__p)) (portRef I0 (instanceRef N_24_i)) )) (net N_25 (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_p)) + (portRef O (instanceRef IPL_030_0_1__p)) (portRef I0 (instanceRef N_25_i)) )) - (net N_26 (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_p)) - (portRef I0 (instanceRef N_26_i)) - )) (net N_27 (joined - (portRef O (instanceRef BG_000_0_p)) - (portRef I0 (instanceRef N_27_i)) - )) - (net N_28 (joined - (portRef O (instanceRef BG_000_1_i)) - (portRef D (instanceRef BG_000DFF)) - )) - (net N_29 (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1_i)) - (portRef D (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH)) - )) - (net N_30 (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1_i)) - (portRef D (instanceRef AMIGA_BUS_ENABLE_DMA_LOW)) - )) - (net N_31 (joined (portRef O (instanceRef IPL_030_1_i_0)) (portRef D (instanceRef IPL_030DFF_0)) )) - (net N_32 (joined + (net N_28 (joined (portRef O (instanceRef IPL_030_1_i_1)) (portRef D (instanceRef IPL_030DFF_1)) )) - (net N_33 (joined + (net N_29 (joined (portRef O (instanceRef IPL_030_1_i_2)) (portRef D (instanceRef IPL_030DFF_2)) )) - (net N_34 (joined + (net N_30 (joined + (portRef O (instanceRef BG_000_1_i)) + (portRef D (instanceRef BG_000DFF)) + )) + (net N_31 (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1_i)) + (portRef D (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH)) + )) + (net N_32 (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1_i)) + (portRef D (instanceRef AMIGA_BUS_ENABLE_DMA_LOW)) + )) + (net N_33 (joined (portRef O (instanceRef UDS_000_INT_1_i)) (portRef D (instanceRef UDS_000_INT)) )) - (net N_35 (joined + (net N_34 (joined (portRef O (instanceRef A0_DMA_1_i)) (portRef D (instanceRef A0_DMA)) )) - (net N_36 (joined + (net N_35 (joined (portRef O (instanceRef RW_000_DMA_1_i)) (portRef D (instanceRef RW_000_DMA)) )) - (net N_37 (joined + (net N_36 (joined (portRef O (instanceRef VMA_INT_1_i)) (portRef D (instanceRef VMA_INT)) )) - (net N_39 (joined + (net N_38 (joined (portRef O (instanceRef RW_000_INT_1_i)) (portRef D (instanceRef RW_000_INT)) )) - (net N_40 (joined + (net N_39 (joined (portRef O (instanceRef AS_030_000_SYNC_1_i)) (portRef D (instanceRef AS_030_000_SYNC)) )) - (net N_41 (joined + (net N_40 (joined (portRef O (instanceRef LDS_000_INT_1_i)) (portRef D (instanceRef LDS_000_INT)) )) - (net N_42 (joined + (net N_41 (joined (portRef O (instanceRef BGACK_030_INT_1_i)) (portRef D (instanceRef BGACK_030_INT)) )) - (net N_44 (joined + (net N_42 (joined (portRef O (instanceRef AS_000_DMA_1_i)) (portRef D (instanceRef AS_000_DMA)) )) - (net N_45 (joined + (net N_43 (joined (portRef O (instanceRef DS_000_DMA_1_i)) (portRef D (instanceRef DS_000_DMA)) )) + (net N_46 (joined + (portRef O (instanceRef AMIGA_DS_0_0_i)) + (portRef D (instanceRef AMIGA_DS)) + )) (net N_48 (joined - (portRef O (instanceRef AS_030_D0_0_0_0_i)) - (portRef D (instanceRef AS_030_D0)) + (portRef O (instanceRef DTACK_D0_0_i)) + (portRef D (instanceRef DTACK_D0)) + )) + (net N_49 (joined + (portRef O (instanceRef IPL_D0_0_i_0)) + (portRef D (instanceRef IPL_D0_0)) + )) + (net N_50 (joined + (portRef O (instanceRef IPL_D0_0_i_1)) + (portRef D (instanceRef IPL_D0_1)) + )) + (net N_51 (joined + (portRef O (instanceRef IPL_D0_0_i_2)) + (portRef D (instanceRef IPL_D0_2)) )) (net N_52 (joined (portRef O (instanceRef VPA_D_0_i)) (portRef D (instanceRef VPA_D)) )) (net N_53 (joined - (portRef O (instanceRef DTACK_D0_0_i)) - (portRef D (instanceRef DTACK_D0)) - )) - (net N_55 (joined - (portRef O (instanceRef RESET_OUT_2_0_0_i)) + (portRef O (instanceRef RESET_OUT_2_0_i)) (portRef D (instanceRef RESET_OUT)) )) - (net N_56 (joined + (net N_54 (joined (portRef O (instanceRef DS_000_ENABLE_1)) (portRef D (instanceRef DS_000_ENABLE)) )) (net (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (joined (portRef Q (instanceRef SM_AMIGA_i_7)) - (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_o3)) + (portRef I1 (instanceRef un1_SM_AMIGA_0_o4_0)) (portRef I0 (instanceRef SM_AMIGA_i_i_7)) )) - (net (rename pos_clk_SIZE_DMA_6_0 "pos_clk.SIZE_DMA_6[0]") (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_i_0)) - (portRef I0 (instanceRef SIZE_DMA_0_0__m)) - )) - (net (rename pos_clk_SIZE_DMA_6_1 "pos_clk.SIZE_DMA_6[1]") (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_i_1)) - (portRef I0 (instanceRef SIZE_DMA_0_1__m)) - )) - (net N_199 (joined - (portRef O (instanceRef G_96)) - (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_x2)) - (portRef I0 (instanceRef N_199_i)) - )) - (net (rename pos_clk_un21_bgack_030_int_i_0 "pos_clk.un21_bgack_030_int_i_0") (joined - (portRef O (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_o3_i)) - (portRef I0 (instanceRef AS_000_DMA_0_m)) - )) - (net N_231 (joined - (portRef O (instanceRef pos_clk_un6_bg_030_i_0_i)) - (portRef I1 (instanceRef pos_clk_un9_bg_030)) - )) - (net N_233 (joined - (portRef O (instanceRef pos_clk_un1_ipl_i_0_i)) - (portRef I1 (instanceRef IPL_030_0_2__m)) - (portRef I0 (instanceRef IPL_030_0_2__r)) - (portRef I1 (instanceRef IPL_030_0_1__m)) - (portRef I0 (instanceRef IPL_030_0_1__r)) - (portRef I1 (instanceRef IPL_030_0_0__m)) - (portRef I0 (instanceRef IPL_030_0_0__r)) - )) - (net N_111 (joined - (portRef O (instanceRef IPL_D0_0_i_a3_0_a3_2)) - (portRef I0 (instanceRef N_111_i)) - )) - (net N_112 (joined - (portRef O (instanceRef IPL_D0_0_i_a3_0_a3_1)) - (portRef I0 (instanceRef N_112_i)) - )) - (net N_113 (joined - (portRef O (instanceRef IPL_D0_0_i_a3_0_a3_0)) - (portRef I0 (instanceRef N_113_i)) - )) - (net N_114 (joined - (portRef O (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i_a3_0_a3)) - (portRef I0 (instanceRef N_114_i)) - )) - (net N_115 (joined - (portRef O (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i_a3_0_a3)) - (portRef I0 (instanceRef N_115_i)) - )) - (net N_245 (joined - (portRef O (instanceRef AS_000_DMA_1_sqmuxa_i_0_i)) - (portRef I1 (instanceRef AS_000_DMA_0_m)) - (portRef I0 (instanceRef AS_000_DMA_0_r)) - )) - (net N_246 (joined - (portRef O (instanceRef DS_000_DMA_2_sqmuxa_i_0_i)) - (portRef I1 (instanceRef DS_000_DMA_0_m)) - (portRef I0 (instanceRef DS_000_DMA_0_r)) - )) - (net N_62 (joined - (portRef O (instanceRef un13_ciin_i_0_0_i)) - (portRef OE (instanceRef CIIN)) - )) - (net N_251 (joined - (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_o3_i)) - (portRef D (instanceRef BGACK_030_INT_D)) - )) - (net N_132 (joined - (portRef O (instanceRef pos_clk_DSACK1_INT_1_i_a2_0_a2)) - (portRef I0 (instanceRef N_132_i)) - (portRef I0 (instanceRef DSACK1_INT_0_i_0_a3)) - )) - (net N_133 (joined - (portRef O (instanceRef pos_clk_AS_000_INT_1_i_a2_0_a2)) - (portRef I0 (instanceRef N_133_i)) - (portRef I0 (instanceRef AS_000_INT_0_i_0_a3)) - )) - (net N_310 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_i_i)) - (portRef I1 (instanceRef AS_030_000_SYNC_0_m)) - (portRef I0 (instanceRef AS_030_000_SYNC_0_r)) - )) - (net N_126 (joined - (portRef O (instanceRef SIZE_DMA_3_sqmuxa_0_a3_i_i)) - (portRef I1 (instanceRef SIZE_DMA_0_1__m)) - (portRef I0 (instanceRef SIZE_DMA_0_1__r)) - (portRef I1 (instanceRef SIZE_DMA_0_0__m)) - (portRef I0 (instanceRef SIZE_DMA_0_0__r)) - )) - (net N_149 (joined - (portRef O (instanceRef N_155_i_0_o2_i_o2_i_o2_i)) - (portRef I0 (instanceRef RST_DLY_e2_i_0_a3_1)) + (net N_76 (joined + (portRef O (instanceRef CLK_000_NE_0_o3_i_o2_i)) + (portRef I1 (instanceRef cpu_est_0_3__m)) + (portRef I0 (instanceRef cpu_est_0_3__r)) (portRef I1 (instanceRef cpu_est_0_2__m)) (portRef I0 (instanceRef cpu_est_0_2__r)) (portRef I1 (instanceRef cpu_est_0_1__m)) (portRef I0 (instanceRef cpu_est_0_1__r)) - (portRef I0 (instanceRef RST_DLYlde_0_0_o3)) - (portRef I0 (instanceRef cpu_est_0_0_x2_0_a3_0)) - (portRef I1 (instanceRef cpu_est_0_3__m)) - (portRef I0 (instanceRef cpu_est_0_3__r)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_1_1)) - )) - (net N_150 (joined - (portRef O (instanceRef pos_clk_un1_ipl_i_0_o3_i)) - (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_a3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a3_1)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_1_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_i_1_2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_1_4)) - )) - (net N_158 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_o2_0_i)) - (portRef I0 (instanceRef RST_DLY_e2_i_0_a3_1_0)) - )) - (net N_160 (joined - (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_o2_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a3_5)) - (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_1_6)) - )) - (net N_163 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0_o2_i_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0_a3_0)) - )) - (net N_172 (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_o2_i_0)) - (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_0)) - )) - (net N_179 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_6)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a3_6)) - )) - (net N_184 (joined - (portRef O (instanceRef CLK_030_H_2_i_0_o2_i)) - (portRef I1 (instanceRef CLK_030_H_2_i_0_a3)) - )) - (net N_185 (joined - (portRef O (instanceRef pos_clk_un5_bgack_030_int_d_i_0_a2_i_o3_i)) - (portRef I1 (instanceRef RW_000_DMA_0_m)) - (portRef I0 (instanceRef RW_000_DMA_0_r)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_m)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_r)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_m)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_r)) - (portRef I1 (instanceRef A0_DMA_0_m)) - (portRef I0 (instanceRef A0_DMA_0_r)) - )) - (net N_196 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_a3)) - (portRef I0 (instanceRef N_196_i)) - )) - (net N_203 (joined - (portRef O (instanceRef RST_DLY_e1_i_0_a3_1)) - (portRef I0 (instanceRef N_203_i)) - )) - (net N_204 (joined - (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_a3)) - (portRef I0 (instanceRef N_204_i)) - )) - (net N_209 (joined - (portRef O (instanceRef cpu_est_2_0_0_a3_1_1)) - (portRef I0 (instanceRef N_209_i)) - )) - (net N_214 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_i_a3)) - (portRef I0 (instanceRef N_214_i)) - )) - (net N_215 (joined - (portRef O (instanceRef un10_amiga_bus_enable_high_0_0_a3)) - (portRef I0 (instanceRef N_215_i)) - )) - (net N_216 (joined - (portRef O (instanceRef un10_amiga_bus_enable_high_0_0_a3_0)) - (portRef I0 (instanceRef N_216_i)) - )) - (net N_218 (joined - (portRef O (instanceRef CLK_030_H_2_i_0_a3)) - (portRef I0 (instanceRef N_218_i)) + (portRef I0 (instanceRef RST_DLY_e2_i_a2_2)) + (portRef I0 (instanceRef RST_DLY_e1_i_a2_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_o4_i_a2_1)) + (portRef I0 (instanceRef cpu_est_0_0)) + (portRef I0 (instanceRef RST_DLY_e0_i_a2_0_1)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_1_5)) )) (net N_224 (joined - (portRef O (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a3_0)) + (portRef O (instanceRef G_122)) (portRef I0 (instanceRef N_224_i)) )) - (net N_332 (joined - (portRef O (instanceRef pos_clk_DS_000_DMA_4_f0_0_0_a3)) - (portRef I0 (instanceRef N_332_i)) + (net N_225 (joined + (portRef O (instanceRef G_123)) + (portRef I0 (instanceRef N_225_i)) )) (net N_226 (joined - (portRef O (instanceRef DS_000_DMA_2_sqmuxa_i_0_a3)) + (portRef O (instanceRef G_124)) (portRef I0 (instanceRef N_226_i)) )) - (net N_227 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a3_0)) - (portRef I0 (instanceRef N_227_i)) + (net un1_rst_2_1 (joined + (portRef O (instanceRef un1_rst_2_1)) + (portRef I0 (instanceRef un1_rst_2_1_i)) + (portRef I1 (instanceRef un1_rst_2)) )) - (net N_229 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a3_6)) - (portRef I0 (instanceRef N_229_i)) + (net N_245 (joined + (portRef O (instanceRef cpu_est_0_0)) + (portRef I0 (instanceRef N_245_i)) )) - (net N_337 (joined - (portRef O (instanceRef RESET_OUT_2_0_0_a3)) - (portRef I0 (instanceRef N_337_i)) + (net N_64 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d0_i_i)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_m)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_r)) )) - (net N_338 (joined - (portRef O (instanceRef RESET_OUT_2_0_0_a3_0)) - (portRef I0 (instanceRef N_338_i)) + (net N_122 (joined + (portRef O (instanceRef pos_clk_AS_000_INT_1_i_a2)) + (portRef I0 (instanceRef N_122_i)) )) - (net N_265 (joined - (portRef O (instanceRef RST_DLY_e0_i_0_a3)) - (portRef I0 (instanceRef N_265_i)) + (net N_123 (joined + (portRef O (instanceRef pos_clk_DSACK1_INT_1_i_a2)) + (portRef I0 (instanceRef N_123_i)) )) - (net N_267 (joined - (portRef O (instanceRef RST_DLY_e0_i_0_a3_0)) - (portRef I0 (instanceRef N_267_i)) + (net N_132 (joined + (portRef O (instanceRef un4_as_030_i_a2)) + (portRef OE (instanceRef AS_030)) + (portRef OE (instanceRef A_0)) + (portRef OE (instanceRef DS_030)) )) - (net N_268 (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_0)) - (portRef I0 (instanceRef N_268_i)) + (net N_133 (joined + (portRef O (instanceRef un1_rw_i_a2)) + (portRef OE (instanceRef RW)) )) - (net N_275 (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_1)) - (portRef I0 (instanceRef N_275_i)) + (net N_274 (joined + (portRef O (instanceRef AS_030_D0_0_i_a2)) + (portRef I0 (instanceRef N_274_i)) + (portRef I1 (instanceRef DSACK1_INT_0_i_a2)) + (portRef I1 (instanceRef AS_000_INT_0_i_a2)) )) - (net N_278 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a3_1)) - (portRef I0 (instanceRef N_278_i)) + (net N_276 (joined + (portRef O (instanceRef un2_as_030_i_a2)) + (portRef I0 (instanceRef un4_as_030_i_a2)) + (portRef I0 (instanceRef un3_ahigh)) + (portRef OE (instanceRef SIZE_0)) + (portRef OE (instanceRef SIZE_1)) )) - (net N_282 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a3_0_1)) - (portRef I0 (instanceRef N_282_i)) + (net N_77 (joined + (portRef O (instanceRef RST_DLY_e2_i_o2_0_i)) + (portRef I0 (instanceRef RST_DLY_e2_i_a2_1)) )) - (net N_284 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_i_i_a3_2)) - (portRef I0 (instanceRef N_284_i)) + (net N_79 (joined + (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_o3_i_o2_i)) + (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_a2_5)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_1_6)) )) - (net N_340 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a3_3)) - (portRef I0 (instanceRef N_340_i)) + (net N_78 (joined + (portRef O (instanceRef CLK_000_PE_0_o3_i_o2_i)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_o4_i_1)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_1_4)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_1_0)) )) - (net N_287 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a3_0_3)) - (portRef I0 (instanceRef N_287_i)) + (net N_263 (joined + (portRef O (instanceRef un5_e_i_a2)) + (portRef I0 (instanceRef N_263_i)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_a3_0_2)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_a3_1)) )) - (net N_288 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a3_4)) - (portRef I0 (instanceRef N_288_i)) + (net N_108 (joined + (portRef O (instanceRef RST_DLY_e2_i_a2)) + (portRef I0 (instanceRef N_108_i)) )) - (net N_291 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0_a3_0)) - (portRef I0 (instanceRef N_291_i)) + (net N_114 (joined + (portRef O (instanceRef RST_DLY_e1_i_a2_1)) + (portRef I0 (instanceRef N_114_i)) )) - (net N_293 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0_a3_0_0)) - (portRef I0 (instanceRef N_293_i)) + (net N_85 (joined + (portRef O (instanceRef pos_clk_un15_clk_000_d_i_i_o2_i)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_a2_0)) )) - (net N_350 (joined - (portRef O (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_a2)) - (portRef I0 (instanceRef N_350_i)) + (net N_104 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_i_0_a2_0_0)) + (portRef I0 (instanceRef N_104_i)) )) - (net N_355 (joined - (portRef O (instanceRef RESET_OUT_1_sqmuxa_i_0_111_1_a2)) - (portRef I1 (instanceRef RST_DLY_e2_i_0_a3_0)) - (portRef I0 (instanceRef N_355_i)) - (portRef I1 (instanceRef RESET_OUT_2_0_0_a3_0_1)) + (net N_91 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d0_i_o2_i)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_a2)) )) - (net N_151_i (joined - (portRef O (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_x2)) - (portRef I0 (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_o3_2)) + (net N_131 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d0_i_a2)) + (portRef I0 (instanceRef N_131_i)) )) - (net N_360 (joined - (portRef O (instanceRef pos_clk_un1_ipl_i_0_x2)) - (portRef I0 (instanceRef N_360_i)) + (net N_277 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d0_i_a2_0)) + (portRef I0 (instanceRef N_277_i)) + (portRef I0 (instanceRef un21_fpu_cs_0_a2_1)) + (portRef I0 (instanceRef un21_berr_0_a2_1)) )) - (net N_191_i (joined - (portRef O (instanceRef pos_clk_un1_ipl_i_0_x2_0)) - (portRef I0 (instanceRef N_191_i_i)) + (net N_130 (joined + (portRef O (instanceRef un11_amiga_bus_enable_high_0_a2_0)) + (portRef I0 (instanceRef N_130_i)) )) - (net N_192_i (joined - (portRef O (instanceRef pos_clk_un1_ipl_i_0_x2_1)) - (portRef I0 (instanceRef N_192_i_i)) + (net N_115 (joined + (portRef O (instanceRef RST_DLY_e0_i_a2)) + (portRef I0 (instanceRef N_115_i)) )) - (net N_193_i (joined - (portRef O (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_x2)) - (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_1)) + (net N_116 (joined + (portRef O (instanceRef RST_DLY_e0_i_a2_0)) + (portRef I0 (instanceRef N_116_i)) )) - (net N_156 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_i_o2_i)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_i_a3_1)) + (net N_105 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_a2_5)) + (portRef I0 (instanceRef N_105_i)) )) - (net N_201 (joined - (portRef O (instanceRef RST_DLY_e1_i_0_a3)) - (portRef I0 (instanceRef N_201_i)) + (net N_103 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_i_0_a2_0)) + (portRef I0 (instanceRef N_103_i)) )) - (net N_202 (joined - (portRef O (instanceRef RST_DLY_e1_i_0_a3_0)) - (portRef I0 (instanceRef N_202_i)) + (net N_101 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_a2_0)) + (portRef I0 (instanceRef N_101_i)) )) - (net N_154 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_o2_i)) - (portRef I0 (instanceRef RST_DLY_e1_i_0_a3)) - (portRef I0 (instanceRef RST_DLY_e2_i_0_a3_0)) - (portRef I0 (instanceRef RST_DLY_e0_i_0_a3)) + (net N_259 (joined + (portRef O (instanceRef cpu_est_2_0_0_a3_0_1)) + (portRef I0 (instanceRef N_259_i)) )) - (net un21_berr_1 (joined - (portRef O (instanceRef un21_berr_0_a3_0_a3_1)) - (portRef I0 (instanceRef un21_berr_0_a3_0_a3_1_0)) - (portRef I0 (instanceRef un21_fpu_cs_0_a3_0_a3_1)) + (net N_255 (joined + (portRef O (instanceRef cpu_est_2_i_0_a3_3)) + (portRef I0 (instanceRef N_255_i)) )) - (net N_174 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a3_0)) + (net N_256 (joined + (portRef O (instanceRef cpu_est_2_i_0_a3_0_3)) + (portRef I0 (instanceRef N_256_i)) )) - (net N_223 (joined - (portRef O (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a3)) - (portRef I0 (instanceRef N_223_i)) + (net N_254 (joined + (portRef O (instanceRef un5_e_i_a3)) + (portRef I0 (instanceRef N_254_i)) )) - (net N_221 (joined - (portRef O (instanceRef AS_000_INT_0_i_0_a3)) - (portRef I0 (instanceRef N_221_i)) + (net N_16 (joined + (portRef O (instanceRef un5_e_i_a3_0)) + (portRef I0 (instanceRef N_16_i)) )) - (net N_222 (joined - (portRef O (instanceRef AS_000_INT_0_i_0_a3_0)) - (portRef I0 (instanceRef N_222_i)) + (net N_106 (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_a2_1)) + (portRef I0 (instanceRef N_106_i)) )) - (net N_219 (joined - (portRef O (instanceRef DSACK1_INT_0_i_0_a3)) - (portRef I0 (instanceRef N_219_i)) + (net N_86 (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_o2_i_0)) + (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_a2_0)) )) - (net N_220 (joined - (portRef O (instanceRef DSACK1_INT_0_i_0_a3_0)) - (portRef I0 (instanceRef N_220_i)) + (net N_107 (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_a2_0)) + (portRef I0 (instanceRef N_107_i)) + )) + (net N_117 (joined + (portRef O (instanceRef AMIGA_DS_0_0_a2)) + (portRef I0 (instanceRef N_117_i)) + )) + (net (rename pos_clk_A0_DMA_3 "pos_clk.A0_DMA_3") (joined + (portRef O (instanceRef pos_clk_A0_DMA_3_0_a2)) + (portRef I0 (instanceRef A0_DMA_0_m)) + )) + (net N_129 (joined + (portRef O (instanceRef un11_amiga_bus_enable_high_0_a2)) + (portRef I0 (instanceRef N_129_i)) + )) + (net (rename pos_clk_SIZE_DMA_6_1 "pos_clk.SIZE_DMA_6[1]") (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_i_1)) + (portRef I0 (instanceRef SIZE_DMA_0_1__n)) + )) + (net (rename pos_clk_SIZE_DMA_6_0 "pos_clk.SIZE_DMA_6[0]") (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_i_0)) + (portRef I0 (instanceRef SIZE_DMA_0_0__n)) + )) + (net (rename pos_clk_RW_000_DMA_3 "pos_clk.RW_000_DMA_3") (joined + (portRef O (instanceRef pos_clk_RW_000_DMA_3_i)) + (portRef I0 (instanceRef RW_000_DMA_0_m)) + )) + (net (rename pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3 "pos_clk.AMIGA_BUS_ENABLE_DMA_LOW_3") (joined + (portRef O (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_m)) + )) + (net (rename pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3 "pos_clk.AMIGA_BUS_ENABLE_DMA_HIGH_3") (joined + (portRef O (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_m)) + )) + (net SIZE_DMA_3_sqmuxa (joined + (portRef O (instanceRef SIZE_DMA_3_sqmuxa)) + (portRef I1 (instanceRef SIZE_DMA_0_0__m)) + (portRef I0 (instanceRef SIZE_DMA_0_0__r)) + (portRef I1 (instanceRef SIZE_DMA_0_1__m)) + (portRef I0 (instanceRef SIZE_DMA_0_1__r)) + )) + (net (rename pos_clk_un5_bgack_030_int_d "pos_clk.un5_bgack_030_int_d") (joined + (portRef O (instanceRef pos_clk_un5_bgack_030_int_d_i_0)) + (portRef I1 (instanceRef RW_000_DMA_0_m)) + (portRef I0 (instanceRef RW_000_DMA_0_r)) + (portRef I1 (instanceRef A0_DMA_0_m)) + (portRef I0 (instanceRef A0_DMA_0_r)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_m)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_r)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_m)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_r)) + )) + (net N_18 (joined + (portRef O (instanceRef RW_000_DMA_0_p)) + (portRef I0 (instanceRef N_18_i)) + )) + (net N_19 (joined + (portRef O (instanceRef A0_DMA_0_p)) + (portRef I0 (instanceRef N_19_i)) + )) + (net N_21 (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_p)) + (portRef I0 (instanceRef N_21_i)) + )) + (net N_22 (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_p)) + (portRef I0 (instanceRef N_22_i)) + )) + (net un6_amiga_bus_data_dir (joined + (portRef O (instanceRef un6_amiga_bus_data_dir)) + (portRef I0 (instanceRef un6_amiga_bus_data_dir_i)) + )) + (net un12_amiga_bus_data_dir_m (joined + (portRef O (instanceRef un12_amiga_bus_data_dir_m)) + (portRef I0 (instanceRef un12_amiga_bus_data_dir_m_i)) + )) + (net (rename pos_clk_un3_clk_out_int "pos_clk.un3_clk_out_int") (joined + (portRef O (instanceRef pos_clk_un3_clk_out_int)) + (portRef I1 (instanceRef AS_000_DMA_1_sqmuxa)) + (portRef I0 (instanceRef pos_clk_un3_clk_out_int_i)) + (portRef I1 (instanceRef pos_clk_un13_clk_out_int)) + )) + (net N_3 (joined + (portRef O (instanceRef DS_000_DMA_0_p)) + (portRef I0 (instanceRef N_3_i)) + )) + (net (rename pos_clk_as_000_dma6 "pos_clk.as_000_dma6") (joined + (portRef O (instanceRef pos_clk_as_000_dma6)) + (portRef I0 (instanceRef pos_clk_as_000_dma6_i)) + (portRef I0 (instanceRef AS_000_DMA_1_sqmuxa)) + (portRef I1 (instanceRef un1_rst_3)) + (portRef I1 (instanceRef DS_000_DMA_1_sqmuxa_1)) + )) + (net DS_000_DMA_1_sqmuxa (joined + (portRef O (instanceRef DS_000_DMA_1_sqmuxa)) + (portRef I1 (instanceRef DS_000_DMA_0_m)) + (portRef I0 (instanceRef DS_000_DMA_0_r)) + )) + (net N_4 (joined + (portRef O (instanceRef AS_000_DMA_0_p)) + (portRef I0 (instanceRef N_4_i)) + )) + (net AS_000_DMA_1_sqmuxa (joined + (portRef O (instanceRef AS_000_DMA_1_sqmuxa)) + (portRef I1 (instanceRef AS_000_DMA_0_m)) + (portRef I0 (instanceRef AS_000_DMA_0_r)) + )) + (net un1_rst_2 (joined + (portRef O (instanceRef un1_rst_2)) + (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_1)) + (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0)) + )) + (net (rename un1_CYCLE_DMA_2 "un1_CYCLE_DMA[2]") (joined + (portRef O (instanceRef G_97)) + (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_1)) + )) + (net N_199 (joined + (portRef O (instanceRef G_96)) + (portRef I1 (instanceRef G_97)) + )) + (net (rename pos_clk_un13_bgack_030_int "pos_clk.un13_bgack_030_int") (joined + (portRef O (instanceRef pos_clk_un13_bgack_030_int)) + (portRef I1 (instanceRef G_96)) + (portRef I1 (instanceRef G_95)) + )) + (net N_205 (joined + (portRef O (instanceRef G_102)) + (portRef I1 (instanceRef G_103)) + )) + (net (rename pos_clk_un13_clk_out_int "pos_clk.un13_clk_out_int") (joined + (portRef O (instanceRef pos_clk_un13_clk_out_int)) + (portRef I1 (instanceRef G_102)) + (portRef I1 (instanceRef G_101)) + )) + (net (rename pos_clk_un15_bgack_030_int "pos_clk.un15_bgack_030_int") (joined + (portRef O (instanceRef G_111_i)) + (portRef I1 (instanceRef pos_clk_un13_bgack_030_int)) + )) + (net (rename pos_clk_un3 "pos_clk.un3") (joined + (portRef O (instanceRef G_116_i)) + (portRef I1 (instanceRef pos_clk_as_000_dma6_2)) + )) + (net (rename pos_clk_un12_clk_out_int "pos_clk.un12_clk_out_int") (joined + (portRef O (instanceRef G_121_i)) + (portRef I0 (instanceRef pos_clk_un13_clk_out_int_1)) + )) + (net (rename pos_clk_un1_bgack_030_int "pos_clk.un1_bgack_030_int") (joined + (portRef O (instanceRef pos_clk_un1_bgack_030_int_i)) + (portRef I0 (instanceRef pos_clk_as_000_dma6_2)) + )) + (net DS_000_DMA_0_sqmuxa (joined + (portRef O (instanceRef DS_000_DMA_0_sqmuxa)) + (portRef I0 (instanceRef DS_000_DMA_0_sqmuxa_i)) + )) + (net un1_rst_3 (joined + (portRef O (instanceRef un1_rst_3)) + (portRef I1 (instanceRef pos_clk_CLK_030_PE_4_0)) + (portRef I1 (instanceRef pos_clk_CLK_030_PE_4_1)) + )) + (net (rename un1_CYCLE_DMA_1 "un1_CYCLE_DMA[1]") (joined + (portRef O (instanceRef G_95)) + (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0)) + )) + (net (rename un1_CLK_030_PE_1_1 "un1_CLK_030_PE_1[1]") (joined + (portRef O (instanceRef G_101)) + (portRef I0 (instanceRef pos_clk_CLK_030_PE_4_0)) + )) + (net (rename un1_CLK_030_PE_1_2 "un1_CLK_030_PE_1[2]") (joined + (portRef O (instanceRef G_103)) + (portRef I0 (instanceRef pos_clk_CLK_030_PE_4_1)) + )) + (net (rename pos_clk_un4_rw_000 "pos_clk.un4_rw_000") (joined + (portRef O (instanceRef pos_clk_un4_rw_000)) + (portRef I0 (instanceRef pos_clk_un4_rw_000_i)) + )) + (net N_7 (joined + (portRef O (instanceRef BGACK_030_INT_0_p)) + (portRef I0 (instanceRef N_7_i)) )) (net (rename pos_clk_un6_bgack_000 "pos_clk.un6_bgack_000") (joined - (portRef O (instanceRef pos_clk_un6_bgack_000_0_0_i)) + (portRef O (instanceRef pos_clk_un6_bgack_000_i)) (portRef I1 (instanceRef BGACK_030_INT_0_m)) (portRef I0 (instanceRef BGACK_030_INT_0_r)) )) - (net N_359 (joined - (portRef O (instanceRef pos_clk_un6_bgack_000_0_0_a2)) - (portRef I0 (instanceRef N_359_i)) + (net (rename pos_clk_un4_bgack_000 "pos_clk.un4_bgack_000") (joined + (portRef O (instanceRef pos_clk_un4_bgack_000)) + (portRef I0 (instanceRef pos_clk_un4_bgack_000_i)) )) - (net N_8 (joined - (portRef O (instanceRef BGACK_030_INT_0_p)) - (portRef I0 (instanceRef N_8_i)) + (net N_265_2 (joined + (portRef O (instanceRef RST_DLY_e2_i_2_i)) + (portRef I1 (instanceRef RST_DLY_e2_i_a2_0)) )) - (net N_14 (joined - (portRef O (instanceRef LDS_000_INT_0_p)) - (portRef I0 (instanceRef N_14_i)) + (net N_111 (joined + (portRef O (instanceRef RST_DLY_e2_i_a2_2)) + (portRef I0 (instanceRef N_111_i)) )) - (net N_21 (joined - (portRef O (instanceRef UDS_000_INT_0_p)) - (portRef I0 (instanceRef N_21_i)) + (net N_109 (joined + (portRef O (instanceRef RST_DLY_e2_i_a2_0)) + (portRef I0 (instanceRef N_109_i)) )) - (net N_9 (joined - (portRef O (instanceRef DS_000_ENABLE_0_p)) - (portRef I0 (instanceRef DS_000_ENABLE_1)) + (net N_113 (joined + (portRef O (instanceRef RST_DLY_e1_i_a2_0)) + (portRef I0 (instanceRef N_113_i)) )) - (net un1_DS_000_ENABLE_0_sqmuxa (joined - (portRef O (instanceRef un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_o3_i)) - (portRef I0 (instanceRef DS_000_ENABLE_0_m)) + (net N_112 (joined + (portRef O (instanceRef RST_DLY_e1_i_a2)) + (portRef I0 (instanceRef N_112_i)) )) - (net N_66 (joined - (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_i)) - (portRef I1 (instanceRef DS_000_ENABLE_0_m)) - (portRef I0 (instanceRef DS_000_ENABLE_0_r)) + (net N_98 (joined + (portRef O (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_p)) + (portRef I0 (instanceRef N_98_i)) )) - (net N_171 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_3)) - (portRef I0 (instanceRef un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_o3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a3_0_3)) + (net (rename pos_clk_un29_clk_000_ne_1 "pos_clk.un29_clk_000_ne_1") (joined + (portRef O (instanceRef pos_clk_un29_clk_000_ne_1)) + (portRef I0 (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_n)) )) - (net N_354 (joined - (portRef O (instanceRef un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_a2)) - (portRef I0 (instanceRef N_354_i)) + (net N_87 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_o2_i_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_a2_0)) )) - (net N_18 (joined + (net N_270 (joined + (portRef O (instanceRef RST_DLY_e2_i_o2_i)) + (portRef I0 (instanceRef RST_DLY_e0_i_a2)) + )) + (net N_134 (joined + (portRef O (instanceRef RST_DLY_e2_i_a2_3)) + (portRef I1 (instanceRef RST_DLY_e1_i_a2)) + (portRef I0 (instanceRef N_134_i)) + )) + (net N_125 (joined + (portRef O (instanceRef RESET_OUT_2_0_a2_0)) + (portRef I0 (instanceRef N_125_i)) + )) + (net N_124 (joined + (portRef O (instanceRef RESET_OUT_2_0_a2)) + (portRef I0 (instanceRef N_124_i)) + )) + (net N_121 (joined + (portRef O (instanceRef DSACK1_INT_0_i_a2_0)) + (portRef I0 (instanceRef N_121_i)) + )) + (net N_120 (joined + (portRef O (instanceRef DSACK1_INT_0_i_a2)) + (portRef I0 (instanceRef N_120_i)) + )) + (net N_137 (joined + (portRef O (instanceRef RESET_OUT_1_sqmuxa_i_0_132_0_a2)) + (portRef I0 (instanceRef N_137_i)) + (portRef I0 (instanceRef RST_DLY_e2_i_a2_0)) + (portRef I1 (instanceRef RESET_OUT_2_0_a2_0_1)) + )) + (net (rename pos_clk_un31_clk_000_ne "pos_clk.un31_clk_000_ne") (joined + (portRef O (instanceRef pos_clk_un31_clk_000_ne_i_0)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_a4_0_3)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_o3_2)) + )) + (net N_17 (joined (portRef O (instanceRef VMA_INT_0_p)) - (portRef I0 (instanceRef N_18_i)) + (portRef I0 (instanceRef N_17_i)) )) (net (rename pos_clk_un9_clk_000_pe "pos_clk.un9_clk_000_pe") (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_i)) + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_i)) (portRef I1 (instanceRef VMA_INT_0_m)) (portRef I0 (instanceRef VMA_INT_0_r)) )) (net (rename cpu_est_2_1 "cpu_est_2[1]") (joined - (portRef O (instanceRef cpu_est_2_0_0_0_i_1)) + (portRef O (instanceRef cpu_est_2_0_0_i_1)) (portRef I0 (instanceRef cpu_est_0_1__n)) )) (net (rename cpu_est_2_2 "cpu_est_2[2]") (joined - (portRef O (instanceRef cpu_est_2_0_0_0_i_2)) + (portRef O (instanceRef cpu_est_2_0_0_i_2)) (portRef I0 (instanceRef cpu_est_0_2__n)) )) - (net N_197 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_a3_0)) - (portRef I0 (instanceRef N_197_i)) + (net N_261 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_a3)) + (portRef I0 (instanceRef N_261_i)) )) - (net N_198 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_a3_1)) - (portRef I0 (instanceRef N_198_i)) + (net N_262 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_a3_0)) + (portRef I0 (instanceRef N_262_i)) )) - (net N_208 (joined - (portRef O (instanceRef cpu_est_2_0_0_0_a3_1)) - (portRef I0 (instanceRef N_208_i)) + (net N_251 (joined + (portRef O (instanceRef cpu_est_2_i_0_o2_i_3)) + (portRef I0 (instanceRef cpu_est_2_i_0_a3_3)) )) - (net N_210 (joined - (portRef O (instanceRef cpu_est_2_0_0_0_a3_2)) - (portRef I0 (instanceRef N_210_i)) + (net N_252 (joined + (portRef O (instanceRef un5_e_i_o2_i)) + (portRef I0 (instanceRef un5_e_i_a3)) )) - (net N_315 (joined - (portRef O (instanceRef cpu_est_2_0_0_0_o2_i_2)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_a3_2)) + (net N_258 (joined + (portRef O (instanceRef cpu_est_2_0_0_a3_1)) + (portRef I0 (instanceRef N_258_i)) )) - (net N_212 (joined - (portRef O (instanceRef un5_e_0_i_a3)) - (portRef I0 (instanceRef N_212_i)) + (net N_257 (joined + (portRef O (instanceRef cpu_est_2_0_0_a3_2)) + (portRef I0 (instanceRef N_257_i)) )) - (net N_180 (joined - (portRef O (instanceRef un5_e_0_i_o2_0_i)) - (portRef I0 (instanceRef un5_e_0_i_a3)) + (net DS_000_ENABLE_1_sqmuxa (joined + (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa)) + (portRef I1 (instanceRef DS_000_ENABLE_0_m)) + (portRef I0 (instanceRef DS_000_ENABLE_0_r)) )) - (net N_213 (joined - (portRef O (instanceRef un5_e_0_i_a3_0)) - (portRef I0 (instanceRef N_213_i)) + (net un1_DS_000_ENABLE_0_sqmuxa (joined + (portRef O (instanceRef un1_DS_000_ENABLE_0_sqmuxa_i_0)) + (portRef I0 (instanceRef DS_000_ENABLE_0_n)) )) - (net N_178 (joined - (portRef O (instanceRef un5_e_0_i_o2_i)) - (portRef I0 (instanceRef un5_e_0_i_a3_0)) + (net N_102 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_o4_i_a2_1)) + (portRef I0 (instanceRef N_102_i)) )) - (net N_228 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a3_5)) - (portRef I0 (instanceRef N_228_i)) + (net N_118 (joined + (portRef O (instanceRef AS_000_INT_0_i_a2)) + (portRef I0 (instanceRef N_118_i)) )) - (net N_182 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_i_i_o2_i_2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_i_a3_2)) + (net N_119 (joined + (portRef O (instanceRef AS_000_INT_0_i_a2_0)) + (portRef I0 (instanceRef N_119_i)) )) - (net N_176 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_0_i_3)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a3_3)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_i_i_o2_1_2)) + (net N_264 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_o4_i_i_1)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_1_1)) )) - (net N_183 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_4)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a3_4)) + (net DS_000_ENABLE_0_sqmuxa_1 (joined + (portRef O (instanceRef DS_000_ENABLE_0_sqmuxa_1)) + (portRef I0 (instanceRef DS_000_ENABLE_0_sqmuxa_1_i)) )) - (net N_351 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_a2)) - (portRef I0 (instanceRef N_351_i)) + (net N_164 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_a4_1)) + (portRef I0 (instanceRef N_164_i)) )) - (net N_357 (joined - (portRef O (instanceRef cpu_est_2_0_0_0_a2_2)) - (portRef I0 (instanceRef N_357_i)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_1)) + (net N_170 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_a4_6)) + (portRef I0 (instanceRef N_170_i)) )) - (net N_206 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0)) - (portRef I0 (instanceRef N_206_i)) + (net N_168 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_a4_4)) + (portRef I0 (instanceRef N_168_i)) )) - (net N_205 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3)) - (portRef I0 (instanceRef N_205_i)) + (net N_166 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_a4_3)) + (portRef I0 (instanceRef N_166_i)) )) - (net N_352 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_3)) - (portRef I0 (instanceRef N_352_i)) + (net N_167 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_a4_0_3)) + (portRef I0 (instanceRef N_167_i)) )) - (net N_353 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_0_3)) - (portRef I0 (instanceRef N_353_i)) + (net N_165 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_a4_2)) + (portRef I0 (instanceRef N_165_i)) )) - (net N_314 (joined - (portRef O (instanceRef cpu_est_2_i_0_0_o2_i_3)) - (portRef I0 (instanceRef cpu_est_2_i_0_0_a3_3)) + (net N_162 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_o3_i_6)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_a4_6)) )) - (net N_244 (joined - (portRef O (instanceRef cpu_est_0_0_x2_0_a3_0_0)) - (portRef I0 (instanceRef N_244_i)) + (net N_161 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_o3_i_2)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_a4_2)) )) - (net N_336 (joined - (portRef O (instanceRef cpu_est_0_0_x2_0_a3_0)) - (portRef I0 (instanceRef N_336_i)) + (net N_160 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_o3_i_4)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_a4_4)) )) - (net N_311 (joined - (portRef O (instanceRef pos_clk_RW_000_INT_5_i_a3_i_i)) - (portRef I0 (instanceRef RW_000_INT_0_m)) + (net N_157 (joined + (portRef O (instanceRef DS_000_ENABLE_0_sqmuxa_0_o3_i)) + (portRef I1 (instanceRef un1_DS_000_ENABLE_0_sqmuxa)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_a4_3)) )) - (net un1_SM_AMIGA_0_sqmuxa_1 (joined - (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_i)) - (portRef I1 (instanceRef RW_000_INT_0_m)) - (portRef I0 (instanceRef RW_000_INT_0_r)) + (net N_26 (joined + (portRef O (instanceRef IPL_030_0_2__p)) + (portRef I0 (instanceRef N_26_i)) )) - (net N_211 (joined - (portRef O (instanceRef cpu_est_2_i_0_0_a3_3)) - (portRef I0 (instanceRef N_211_i)) + (net N_13 (joined + (portRef O (instanceRef LDS_000_INT_0_p)) + (portRef I0 (instanceRef N_13_i)) )) - (net N_16 (joined - (portRef O (instanceRef RW_000_INT_0_p)) - (portRef I0 (instanceRef N_16_i)) + (net N_20 (joined + (portRef O (instanceRef UDS_000_INT_0_p)) + (portRef I0 (instanceRef N_20_i)) + )) + (net N_23 (joined + (portRef O (instanceRef BG_000_0_p)) + (portRef I0 (instanceRef N_23_i)) + )) + (net N_8 (joined + (portRef O (instanceRef DS_000_ENABLE_0_p)) + (portRef I0 (instanceRef DS_000_ENABLE_1)) + )) + (net (rename pos_clk_un9_bg_030 "pos_clk.un9_bg_030") (joined + (portRef O (instanceRef pos_clk_un9_bg_030_i)) + (portRef I1 (instanceRef BG_000_0_m)) + (portRef I0 (instanceRef BG_000_0_r)) )) (net un1_amiga_bus_enable_low_i (joined (portRef O (instanceRef un1_amiga_bus_enable_low_i)) @@ -1850,307 +1960,338 @@ (portRef O (instanceRef un21_fpu_cs_i)) (portRef I0 (instanceRef FPU_CS)) )) - (net (rename cpu_est_i_2 "cpu_est_i[2]") (joined - (portRef O (instanceRef cpu_est_i_2)) - (portRef I1 (instanceRef un5_e_0_i_a3)) - (portRef I1 (instanceRef cpu_est_2_0_0_0_a2_2)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_o2)) - (portRef I1 (instanceRef cpu_est_2_i_0_0_a3_3)) + (net (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (joined + (portRef O (instanceRef SM_AMIGA_i_2)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_o4_i_a2_1)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_a4_1)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_a4_2)) )) - (net (rename cpu_est_i_0 "cpu_est_i[0]") (joined - (portRef O (instanceRef cpu_est_i_0)) - (portRef I1 (instanceRef cpu_est_2_0_0_0_a3_1)) - (portRef I1 (instanceRef cpu_est_0_0_x2_0_a3_0)) - (portRef I1 (instanceRef cpu_est_2_i_0_0_o2_3)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_2)) - )) - (net VPA_D_i (joined - (portRef O (instanceRef VPA_D_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_2_3)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_2)) - )) - (net DTACK_D0_i (joined - (portRef O (instanceRef DTACK_D0_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_0_3)) - )) - (net (rename cpu_est_i_3 "cpu_est_i[3]") (joined - (portRef O (instanceRef cpu_est_i_3)) - (portRef I1 (instanceRef un5_e_0_i_o2)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_2)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_2)) - (portRef I1 (instanceRef cpu_est_2_0_0_a3_1_1)) - )) - (net (rename SM_AMIGA_i_i_7 "SM_AMIGA_i_i[7]") (joined - (portRef O (instanceRef SM_AMIGA_i_i_7)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_0_a3_0)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_o2_6)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_i_a3_2)) - )) - (net (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (joined - (portRef O (instanceRef SM_AMIGA_i_5)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a3_5)) + (net (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (joined + (portRef O (instanceRef SM_AMIGA_i_1)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_a4_1)) )) (net (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (joined (portRef O (instanceRef SM_AMIGA_i_3)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a3_0_3)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_a4_3)) + )) + (net (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (joined + (portRef O (instanceRef SM_AMIGA_i_4)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_a4_4)) + )) + (net (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (joined + (portRef O (instanceRef SM_AMIGA_i_6)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_a4_6)) + )) + (net (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (joined + (portRef O (instanceRef SM_AMIGA_i_5)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_a2_5)) + )) + (net (rename CLK_000_D_i_0 "CLK_000_D_i[0]") (joined + (portRef O (instanceRef CLK_000_D_i_0)) + (portRef I1 (instanceRef CLK_000_NE_0_o3_i_o2)) + )) + (net AS_000_INT_i (joined + (portRef O (instanceRef AS_000_INT_i)) + (portRef I0 (instanceRef pos_clk_AS_000_INT_1_i_a2)) + (portRef I0 (instanceRef AS_000_INT_0_i_a2)) + )) + (net (rename SM_AMIGA_i_i_7 "SM_AMIGA_i_i[7]") (joined + (portRef O (instanceRef SM_AMIGA_i_i_7)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_a2_0)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_o3_6)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_o2_2)) + )) + (net AS_030_i (joined + (portRef O (instanceRef I_220)) + (portRef I0 (instanceRef pos_clk_DSACK1_INT_1_i_a2)) + (portRef I1 (instanceRef pos_clk_AS_000_INT_1_i_a2)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_a2)) + (portRef I0 (instanceRef AS_030_D0_0_i_a2)) + (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_1)) + (portRef I1 (instanceRef un11_amiga_bus_enable_high_0_a2_0)) + )) + (net (rename cpu_est_i_2 "cpu_est_i[2]") (joined + (portRef O (instanceRef cpu_est_i_2)) + (portRef I1 (instanceRef cpu_est_2_i_0_a3_0_3)) + (portRef I1 (instanceRef cpu_est_2_0_0_a3_2)) + (portRef I0 (instanceRef un5_e_i_a2)) + (portRef I1 (instanceRef un5_e_i_a3_0)) + (portRef I0 (instanceRef pos_clk_un29_clk_000_ne_1_1)) + )) + (net (rename cpu_est_i_0 "cpu_est_i[0]") (joined + (portRef O (instanceRef cpu_est_i_0)) + (portRef I1 (instanceRef cpu_est_2_0_0_a3_1)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_a3_2)) + (portRef I1 (instanceRef pos_clk_un29_clk_000_ne_1_2)) + )) + (net (rename cpu_est_i_3 "cpu_est_i[3]") (joined + (portRef O (instanceRef cpu_est_i_3)) + (portRef I1 (instanceRef un5_e_i_a2)) + (portRef I1 (instanceRef un5_e_i_o2)) + (portRef I1 (instanceRef cpu_est_2_0_0_a3_0_1)) )) (net (rename cpu_est_i_1 "cpu_est_i[1]") (joined (portRef O (instanceRef cpu_est_i_1)) (portRef I0 (instanceRef VMA_INT_0_m)) - (portRef I1 (instanceRef un5_e_0_i_o2_0)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_o2)) - (portRef I1 (instanceRef cpu_est_2_0_0_a3_1_1_1)) + (portRef I1 (instanceRef cpu_est_2_0_0_a3_0_1_1)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_a3_2)) + (portRef I1 (instanceRef pos_clk_un29_clk_000_ne_1)) )) (net (rename CLK_000_D_i_1 "CLK_000_D_i[1]") (joined (portRef O (instanceRef CLK_000_D_i_1)) - (portRef I1 (instanceRef pos_clk_un1_ipl_i_0_o3)) + (portRef I1 (instanceRef CLK_000_PE_0_o3_i_o2)) )) - (net N_355_i_0 (joined - (portRef O (instanceRef N_355_i)) - (portRef I1 (instanceRef RST_DLY_e2_i_0_a2)) - (portRef I0 (instanceRef RESET_OUT_1_sqmuxa_i_0_111_1)) + (net VPA_D_i (joined + (portRef O (instanceRef VPA_D_i)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_a3_0_2)) )) - (net (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (joined - (portRef O (instanceRef SM_AMIGA_i_4)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a3_4)) - )) - (net (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (joined - (portRef O (instanceRef SM_AMIGA_i_2)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a3_0_1)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_i_i_a3_2)) - )) - (net (rename RST_DLY_i_0 "RST_DLY_i[0]") (joined - (portRef O (instanceRef RST_DLY_i_0)) - (portRef I1 (instanceRef RST_DLY_e0_i_0_a3_0)) - (portRef I1 (instanceRef RST_DLY_e1_i_0_a3_1_1)) - )) - (net (rename RST_DLY_i_2 "RST_DLY_i[2]") (joined - (portRef O (instanceRef RST_DLY_i_2)) - (portRef I1 (instanceRef RST_DLY_e2_i_0_a3_1)) - (portRef I1 (instanceRef RST_DLY_e2_i_0_a3)) - )) - (net (rename A_DECODE_i_19 "A_DECODE_i[19]") (joined - (portRef O (instanceRef A_DECODE_i_19)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_i_o2_3)) - )) - (net (rename A_DECODE_i_18 "A_DECODE_i[18]") (joined - (portRef O (instanceRef A_DECODE_i_18)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_i_o2_3)) - )) - (net (rename A_DECODE_i_16 "A_DECODE_i[16]") (joined - (portRef O (instanceRef A_DECODE_i_16)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_i_o2_2)) - )) - (net RW_000_i (joined - (portRef O (instanceRef I_215)) - (portRef I1 (instanceRef pos_clk_DS_000_DMA_4_f0_0_0_a3)) - (portRef I1 (instanceRef pos_clk_RW_000_DMA_3_0_0)) - (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a3)) - (portRef I1 (instanceRef DS_000_DMA_2_sqmuxa_i_0_1)) + (net VMA_INT_i (joined + (portRef O (instanceRef VMA_INT_i)) + (portRef I1 (instanceRef pos_clk_un29_clk_000_ne_1_1)) )) (net (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (joined (portRef O (instanceRef SM_AMIGA_i_0)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a3_0)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_a2_0)) )) - (net AS_030_i (joined - (portRef O (instanceRef I_216)) - (portRef I0 (instanceRef AS_030_D0_0_0_0)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_i)) - (portRef I0 (instanceRef un21_berr_0_a3_0_a3_1)) - (portRef I1 (instanceRef pos_clk_AS_000_INT_1_i_a2_0_a2)) - (portRef I0 (instanceRef pos_clk_DSACK1_INT_1_i_a2_0_a2)) - (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa_i_0)) - (portRef I1 (instanceRef un10_amiga_bus_enable_high_0_0_a3_0)) - )) - (net AS_000_INT_i (joined - (portRef O (instanceRef AS_000_INT_i)) - (portRef I0 (instanceRef pos_clk_AS_000_INT_1_i_a2_0_a2)) - )) - (net DSACK1_INT_i (joined - (portRef O (instanceRef DSACK1_INT_i)) - (portRef I1 (instanceRef pos_clk_DSACK1_INT_1_i_a2_0_a2)) - )) - (net (rename CLK_000_D_i_0 "CLK_000_D_i[0]") (joined - (portRef O (instanceRef CLK_000_D_i_0)) - (portRef I1 (instanceRef N_155_i_0_o2_i_o2_i_o2)) - )) - (net (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (joined - (portRef O (instanceRef SM_AMIGA_i_6)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a3_6)) - )) - (net (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (joined - (portRef O (instanceRef SM_AMIGA_i_1)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a3_0_1)) - )) - (net FPU_SENSE_i (joined - (portRef O (instanceRef FPU_SENSE_i)) - (portRef I1 (instanceRef un21_fpu_cs_0_a3_0_a3_1)) + (net (rename RST_DLY_i_2 "RST_DLY_i[2]") (joined + (portRef O (instanceRef RST_DLY_i_2)) + (portRef I1 (instanceRef RST_DLY_e2_i_a2_2)) + (portRef I1 (instanceRef RST_DLY_e2_i_a2)) )) (net (rename RST_DLY_i_1 "RST_DLY_i[1]") (joined (portRef O (instanceRef RST_DLY_i_1)) - (portRef I1 (instanceRef RST_DLY_e1_i_0_a3_0)) - (portRef I1 (instanceRef RST_DLY_e1_i_0_a3_1)) + (portRef I1 (instanceRef RST_DLY_e1_i_a2_0)) + (portRef I1 (instanceRef RST_DLY_e1_i_a2_1)) )) - (net AS_030_D0_i (joined - (portRef O (instanceRef AS_030_D0_i)) - (portRef I1 (instanceRef un13_ciin_i_0_0_a3_5)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_i_a3_1)) + (net (rename RST_DLY_i_0 "RST_DLY_i[0]") (joined + (portRef O (instanceRef RST_DLY_i_0)) + (portRef I1 (instanceRef RST_DLY_e0_i_a2_0_1)) + (portRef I1 (instanceRef RST_DLY_e1_i_a2_1_1)) + )) + (net DSACK1_INT_i (joined + (portRef O (instanceRef DSACK1_INT_i)) + (portRef I1 (instanceRef pos_clk_DSACK1_INT_1_i_a2)) + (portRef I0 (instanceRef DSACK1_INT_0_i_a2)) + )) + (net N_137_i_0 (joined + (portRef O (instanceRef N_137_i)) + (portRef I1 (instanceRef RST_DLY_e2_i_a2_3)) + (portRef I0 (instanceRef RESET_OUT_1_sqmuxa_i_0_132_0)) + )) + (net DTACK_D0_i (joined + (portRef O (instanceRef DTACK_D0_i)) + (portRef I0 (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_m)) )) (net BGACK_030_INT_i (joined (portRef O (instanceRef BGACK_030_INT_i)) + (portRef I1 (instanceRef un11_amiga_bus_enable_high_0_a2)) + (portRef I0 (instanceRef pos_clk_A0_DMA_3_0_a2)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_a2_0)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_a2_1)) + (portRef I1 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3)) + (portRef I1 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3)) + (portRef I0 (instanceRef pos_clk_RW_000_DMA_3)) (portRef I1 (instanceRef un1_amiga_bus_enable_low)) - (portRef I1 (instanceRef un10_amiga_bus_enable_high_0_0_a3)) - (portRef I1 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i_a3_0_a3)) - (portRef I1 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i_a3_0_a3)) - (portRef I0 (instanceRef pos_clk_A0_DMA_3_0_a3_0_a3)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_1)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_0)) - (portRef I0 (instanceRef pos_clk_RW_000_DMA_3_0_0)) - (portRef I0 (instanceRef un2_as_030_i_a2_i_o3)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_o3)) - (portRef I0 (instanceRef un1_rw_0)) - (portRef I1 (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_o3_1)) + (portRef I0 (instanceRef un1_rst_2_1)) + (portRef I0 (instanceRef un1_rw_i_a2)) + (portRef I0 (instanceRef un2_as_030_i_a2)) + (portRef I1 (instanceRef un6_amiga_bus_data_dir_1)) )) (net nEXP_SPACE_i (joined (portRef O (instanceRef nEXP_SPACE_i)) - (portRef I0 (instanceRef un13_ciin_i_0_0)) - (portRef I1 (instanceRef un2_as_030_i_a2_i_o3)) - )) - (net RESET_OUT_i (joined - (portRef O (instanceRef RESET_OUT_i)) - (portRef OE (instanceRef RESET)) - )) - (net (rename IPL_i_2 "IPL_i[2]") (joined - (portRef O (instanceRef IPL_i_2)) - (portRef I0 (instanceRef IPL_D0_0_i_a3_0_a3_2)) - )) - (net (rename IPL_i_1 "IPL_i[1]") (joined - (portRef O (instanceRef IPL_i_1)) - (portRef I0 (instanceRef IPL_D0_0_i_a3_0_a3_1)) - )) - (net (rename IPL_i_0 "IPL_i[0]") (joined - (portRef O (instanceRef IPL_i_0)) - (portRef I0 (instanceRef IPL_D0_0_i_a3_0_a3_0)) - )) - (net (rename A_i_1 "A_i[1]") (joined - (portRef O (instanceRef A_i_1)) - (portRef I0 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i_a3_0_a3)) + (portRef I0 (instanceRef un13_ciin)) + (portRef I1 (instanceRef un2_as_030_i_a2)) + (portRef I1 (instanceRef un6_amiga_bus_data_dir_2)) )) (net AS_000_DMA_i (joined (portRef O (instanceRef AS_000_DMA_i)) - (portRef I0 (instanceRef un7_as_030_0_a3_0_a3)) - (portRef I0 (instanceRef CLK_030_H_2_i_0_o2)) + (portRef I0 (instanceRef un7_as_030)) + (portRef I1 (instanceRef pos_clk_un13_clk_out_int_1)) + (portRef OE (instanceRef DTACK)) + )) + (net RW_000_i (joined + (portRef O (instanceRef I_222)) + (portRef I1 (instanceRef pos_clk_RW_000_DMA_3)) + (portRef I1 (instanceRef un12_amiga_bus_data_dir_m)) + (portRef I0 (instanceRef pos_clk_un1_bgack_030_int)) + (portRef I1 (instanceRef pos_clk_un4_rw_000_2)) + )) + (net (rename CLK_030_PE_i_1 "CLK_030_PE_i[1]") (joined + (portRef O (instanceRef CLK_030_PE_i_1)) + (portRef I1 (instanceRef pos_clk_un4_rw_000_1)) + )) + (net DS_000_DMA_0_sqmuxa_i (joined + (portRef O (instanceRef DS_000_DMA_0_sqmuxa_i)) + (portRef I0 (instanceRef DS_000_DMA_1_sqmuxa_1)) + )) + (net (rename pos_clk_un4_rw_000_i "pos_clk.un4_rw_000_i") (joined + (portRef O (instanceRef pos_clk_un4_rw_000_i)) + (portRef I1 (instanceRef DS_000_DMA_1_sqmuxa)) )) (net AS_000_i (joined - (portRef O (instanceRef I_217)) + (portRef O (instanceRef I_223)) (portRef I0 (instanceRef un6_ds_030)) - (portRef I1 (instanceRef un7_as_030_0_a3_0_a3)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_1)) - (portRef I0 (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_o3_1)) - (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a3_0_1)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_1)) + (portRef I1 (instanceRef un7_as_030)) + (portRef I0 (instanceRef un1_rst_2)) + (portRef I0 (instanceRef un6_amiga_bus_data_dir_1)) + (portRef I1 (instanceRef pos_clk_as_000_dma6_1)) )) - (net CLK_030_H_i (joined - (portRef O (instanceRef CLK_030_H_i)) - (portRef I0 (instanceRef CLK_030_H_2_i_0_a3)) + (net AMIGA_DS_i (joined + (portRef O (instanceRef AMIGA_DS_i)) + (portRef I0 (instanceRef pos_clk_as_000_dma6_1)) )) - (net AS_030_000_SYNC_i (joined - (portRef O (instanceRef AS_030_000_SYNC_i)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0_o2_1_0)) - (portRef I1 (instanceRef un10_amiga_bus_enable_high_0_0_a3_0_1)) - )) - (net AMIGA_BUS_ENABLE_DMA_HIGH_i (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_i)) - (portRef I0 (instanceRef un10_amiga_bus_enable_high_0_0_a3)) + (net (rename pos_clk_un3_clk_out_int_i "pos_clk.un3_clk_out_int_i") (joined + (portRef O (instanceRef pos_clk_un3_clk_out_int_i)) + (portRef I1 (instanceRef DS_000_DMA_0_sqmuxa)) )) (net (rename CYCLE_DMA_i_0 "CYCLE_DMA_i[0]") (joined (portRef O (instanceRef CYCLE_DMA_i_0)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_a3)) + (portRef I0 (instanceRef G_116)) )) - (net (rename AHIGH_i_30 "AHIGH_i[30]") (joined - (portRef O (instanceRef I_218)) - (portRef I0 (instanceRef un13_ciin_i_0_0_a3_4)) + (net (rename CYCLE_DMA_i_1 "CYCLE_DMA_i[1]") (joined + (portRef O (instanceRef CYCLE_DMA_i_1)) + (portRef I1 (instanceRef G_116)) )) - (net (rename AHIGH_i_31 "AHIGH_i[31]") (joined - (portRef O (instanceRef I_219)) - (portRef I1 (instanceRef un13_ciin_i_0_0_a3_4)) - )) - (net (rename AHIGH_i_28 "AHIGH_i[28]") (joined - (portRef O (instanceRef I_220)) - (portRef I0 (instanceRef un13_ciin_i_0_0_a3_3)) - )) - (net (rename AHIGH_i_29 "AHIGH_i[29]") (joined - (portRef O (instanceRef I_221)) - (portRef I1 (instanceRef un13_ciin_i_0_0_a3_3)) - )) - (net (rename AHIGH_i_26 "AHIGH_i[26]") (joined - (portRef O (instanceRef I_222)) - (portRef I0 (instanceRef un13_ciin_i_0_0_a3_2)) - )) - (net (rename AHIGH_i_27 "AHIGH_i[27]") (joined - (portRef O (instanceRef I_223)) - (portRef I1 (instanceRef un13_ciin_i_0_0_a3_2)) - )) - (net (rename AHIGH_i_24 "AHIGH_i[24]") (joined - (portRef O (instanceRef I_224)) - (portRef I0 (instanceRef un13_ciin_i_0_0_a3_1)) - )) - (net (rename AHIGH_i_25 "AHIGH_i[25]") (joined - (portRef O (instanceRef I_225)) - (portRef I1 (instanceRef un13_ciin_i_0_0_a3_1)) - )) - (net CLK_OUT_PRE_50_i (joined - (portRef O (instanceRef CLK_OUT_PRE_50_i)) - (portRef D (instanceRef CLK_OUT_PRE_50)) - )) - (net N_111_i (joined - (portRef O (instanceRef N_111_i)) - (portRef D (instanceRef IPL_D0_2)) - )) - (net N_112_i (joined - (portRef O (instanceRef N_112_i)) - (portRef D (instanceRef IPL_D0_1)) - )) - (net N_113_i (joined - (portRef O (instanceRef N_113_i)) - (portRef D (instanceRef IPL_D0_0)) - )) - (net N_115_i (joined - (portRef O (instanceRef N_115_i)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_m)) - )) - (net N_114_i (joined - (portRef O (instanceRef N_114_i)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_m)) - )) - (net un6_ds_030_i (joined - (portRef O (instanceRef un6_ds_030_i)) - (portRef I0 (instanceRef DS_030)) + (net (rename pos_clk_as_000_dma6_i "pos_clk.as_000_dma6_i") (joined + (portRef O (instanceRef pos_clk_as_000_dma6_i)) + (portRef I0 (instanceRef AS_000_DMA_0_n)) + (portRef I0 (instanceRef DS_000_DMA_0_n)) )) (net DS_000_DMA_i (joined (portRef O (instanceRef DS_000_DMA_i)) (portRef I1 (instanceRef un6_ds_030)) )) - (net N_132_i (joined - (portRef O (instanceRef N_132_i)) + (net CLK_EXP_i (joined + (portRef O (instanceRef CLK_EXP_i)) + (portRef I0 (instanceRef pos_clk_un3_clk_out_int)) + )) + (net AMIGA_BUS_ENABLE_DMA_LOW_i (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_i)) + (portRef I0 (instanceRef un1_amiga_bus_enable_low)) + )) + (net (rename AHIGH_i_25 "AHIGH_i[25]") (joined + (portRef O (instanceRef I_224)) + (portRef I1 (instanceRef un10_ciin_1)) + )) + (net (rename AHIGH_i_24 "AHIGH_i[24]") (joined + (portRef O (instanceRef I_225)) + (portRef I0 (instanceRef un10_ciin_1)) + )) + (net (rename AHIGH_i_27 "AHIGH_i[27]") (joined + (portRef O (instanceRef I_226)) + (portRef I1 (instanceRef un10_ciin_2)) + )) + (net (rename AHIGH_i_26 "AHIGH_i[26]") (joined + (portRef O (instanceRef I_227)) + (portRef I0 (instanceRef un10_ciin_2)) + )) + (net (rename AHIGH_i_29 "AHIGH_i[29]") (joined + (portRef O (instanceRef I_228)) + (portRef I1 (instanceRef un10_ciin_3)) + )) + (net (rename AHIGH_i_28 "AHIGH_i[28]") (joined + (portRef O (instanceRef I_229)) + (portRef I0 (instanceRef un10_ciin_3)) + )) + (net (rename AHIGH_i_31 "AHIGH_i[31]") (joined + (portRef O (instanceRef I_230)) + (portRef I1 (instanceRef un10_ciin_4)) + )) + (net (rename AHIGH_i_30 "AHIGH_i[30]") (joined + (portRef O (instanceRef I_231)) + (portRef I0 (instanceRef un10_ciin_4)) + )) + (net (rename A_i_1 "A_i[1]") (joined + (portRef O (instanceRef A_i_1)) + (portRef I0 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3)) + )) + (net AMIGA_BUS_ENABLE_DMA_HIGH_i (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_i)) + (portRef I0 (instanceRef un11_amiga_bus_enable_high_0_a2)) + )) + (net AS_030_D0_i (joined + (portRef O (instanceRef AS_030_D0_i)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_o2_2)) + (portRef I1 (instanceRef un10_ciin_5)) + )) + (net un10_ciin_i (joined + (portRef O (instanceRef un10_ciin_i)) + (portRef I1 (instanceRef un13_ciin)) + )) + (net FPU_SENSE_i (joined + (portRef O (instanceRef FPU_SENSE_i)) + (portRef I1 (instanceRef un21_fpu_cs_0_a2)) + )) + (net AS_030_000_SYNC_i (joined + (portRef O (instanceRef AS_030_000_SYNC_i)) + (portRef I0 (instanceRef pos_clk_un15_clk_000_d_i_i_o2_1)) + (portRef I1 (instanceRef un11_amiga_bus_enable_high_0_a2_0_1)) + )) + (net (rename A_DECODE_i_16 "A_DECODE_i[16]") (joined + (portRef O (instanceRef A_DECODE_i_16)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_2)) + )) + (net (rename A_DECODE_i_18 "A_DECODE_i[18]") (joined + (portRef O (instanceRef A_DECODE_i_18)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_2)) + )) + (net (rename A_DECODE_i_19 "A_DECODE_i[19]") (joined + (portRef O (instanceRef A_DECODE_i_19)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_3)) + )) + (net N_224_i (joined + (portRef O (instanceRef N_224_i)) + (portRef I1 (instanceRef G_125_1)) + )) + (net N_225_i (joined + (portRef O (instanceRef N_225_i)) + (portRef I1 (instanceRef G_125)) + )) + (net N_226_i (joined + (portRef O (instanceRef N_226_i)) + (portRef I0 (instanceRef G_125_1)) + )) + (net CLK_OUT_PRE_50_i (joined + (portRef O (instanceRef CLK_OUT_PRE_50_i)) + (portRef D (instanceRef CLK_OUT_PRE_50)) + )) + (net un1_rst_2_1_i (joined + (portRef O (instanceRef un1_rst_2_1_i)) + (portRef D (instanceRef BGACK_030_INT_D)) + )) + (net N_274_i (joined + (portRef O (instanceRef N_274_i)) + (portRef D (instanceRef AS_030_D0)) + )) + (net N_245_i (joined + (portRef O (instanceRef N_245_i)) + (portRef D (instanceRef cpu_est_0)) + )) + (net un13_ciin_i (joined + (portRef O (instanceRef un13_ciin_i)) + (portRef OE (instanceRef CIIN)) + )) + (net un6_ds_030_i (joined + (portRef O (instanceRef un6_ds_030_i)) + (portRef I0 (instanceRef DS_030)) + )) + (net N_123_i (joined + (portRef O (instanceRef N_123_i)) (portRef I0 (instanceRef DSACK1)) )) - (net N_133_i (joined - (portRef O (instanceRef N_133_i)) + (net N_122_i (joined + (portRef O (instanceRef N_122_i)) (portRef I0 (instanceRef AS_000)) )) (net un7_as_030_i (joined (portRef O (instanceRef un7_as_030_i)) (portRef I0 (instanceRef AS_030)) )) - (net AMIGA_BUS_ENABLE_DMA_LOW_i (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_i)) - (portRef I0 (instanceRef un1_amiga_bus_enable_low)) - )) (net AS_030_c (joined (portRef O (instanceRef AS_030)) - (portRef I0 (instanceRef AS_030_000_SYNC_0_m)) - (portRef I0 (instanceRef I_216)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_n)) + (portRef I0 (instanceRef I_220)) )) (net AS_030 (joined (portRef AS_030) @@ -2158,8 +2299,8 @@ )) (net AS_000_c (joined (portRef O (instanceRef AS_000)) - (portRef I0 (instanceRef I_217)) - (portRef I0 (instanceRef pos_clk_un6_bgack_000_0_0_a2)) + (portRef I0 (instanceRef I_223)) + (portRef I0 (instanceRef pos_clk_un4_bgack_000)) )) (net AS_000 (joined (portRef AS_000) @@ -2167,8 +2308,9 @@ )) (net RW_000_c (joined (portRef O (instanceRef RW_000)) - (portRef I0 (instanceRef I_215)) - (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a3_0)) + (portRef I0 (instanceRef DS_000_DMA_0_sqmuxa)) + (portRef I0 (instanceRef I_222)) + (portRef I0 (instanceRef un6_amiga_bus_data_dir_2)) )) (net RW_000 (joined (portRef IO (instanceRef RW_000)) @@ -2180,8 +2322,8 @@ )) (net UDS_000_c (joined (portRef O (instanceRef UDS_000)) - (portRef I1 (instanceRef pos_clk_A0_DMA_3_0_a3_0_a3)) - (portRef I1 (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_a2)) + (portRef I1 (instanceRef pos_clk_A0_DMA_3_0_a2)) + (portRef I1 (instanceRef AMIGA_DS_0_0_a2)) (portRef I0 (instanceRef UDS_000_c_i)) )) (net UDS_000 (joined @@ -2190,7 +2332,7 @@ )) (net LDS_000_c (joined (portRef O (instanceRef LDS_000)) - (portRef I0 (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_a2)) + (portRef I0 (instanceRef AMIGA_DS_0_0_a2)) (portRef I0 (instanceRef LDS_000_c_i)) )) (net LDS_000 (joined @@ -2215,7 +2357,7 @@ )) (net (rename AHIGH_c_24 "AHIGH_c[24]") (joined (portRef O (instanceRef AHIGH_24)) - (portRef I0 (instanceRef I_224)) + (portRef I0 (instanceRef I_225)) )) (net (rename AHIGH_24 "AHIGH[24]") (joined (portRef IO (instanceRef AHIGH_24)) @@ -2223,7 +2365,7 @@ )) (net (rename AHIGH_c_25 "AHIGH_c[25]") (joined (portRef O (instanceRef AHIGH_25)) - (portRef I0 (instanceRef I_225)) + (portRef I0 (instanceRef I_224)) )) (net (rename AHIGH_25 "AHIGH[25]") (joined (portRef IO (instanceRef AHIGH_25)) @@ -2231,7 +2373,7 @@ )) (net (rename AHIGH_c_26 "AHIGH_c[26]") (joined (portRef O (instanceRef AHIGH_26)) - (portRef I0 (instanceRef I_222)) + (portRef I0 (instanceRef I_227)) )) (net (rename AHIGH_26 "AHIGH[26]") (joined (portRef IO (instanceRef AHIGH_26)) @@ -2239,7 +2381,7 @@ )) (net (rename AHIGH_c_27 "AHIGH_c[27]") (joined (portRef O (instanceRef AHIGH_27)) - (portRef I0 (instanceRef I_223)) + (portRef I0 (instanceRef I_226)) )) (net (rename AHIGH_27 "AHIGH[27]") (joined (portRef IO (instanceRef AHIGH_27)) @@ -2247,7 +2389,7 @@ )) (net (rename AHIGH_c_28 "AHIGH_c[28]") (joined (portRef O (instanceRef AHIGH_28)) - (portRef I0 (instanceRef I_220)) + (portRef I0 (instanceRef I_229)) )) (net (rename AHIGH_28 "AHIGH[28]") (joined (portRef IO (instanceRef AHIGH_28)) @@ -2255,7 +2397,7 @@ )) (net (rename AHIGH_c_29 "AHIGH_c[29]") (joined (portRef O (instanceRef AHIGH_29)) - (portRef I0 (instanceRef I_221)) + (portRef I0 (instanceRef I_228)) )) (net (rename AHIGH_29 "AHIGH[29]") (joined (portRef IO (instanceRef AHIGH_29)) @@ -2263,7 +2405,7 @@ )) (net (rename AHIGH_c_30 "AHIGH_c[30]") (joined (portRef O (instanceRef AHIGH_30)) - (portRef I0 (instanceRef I_218)) + (portRef I0 (instanceRef I_231)) )) (net (rename AHIGH_30 "AHIGH[30]") (joined (portRef IO (instanceRef AHIGH_30)) @@ -2271,7 +2413,7 @@ )) (net (rename AHIGH_c_31 "AHIGH_c[31]") (joined (portRef O (instanceRef AHIGH_31)) - (portRef I0 (instanceRef I_219)) + (portRef I0 (instanceRef I_230)) )) (net (rename AHIGH_31 "AHIGH[31]") (joined (portRef (member ahigh 0)) @@ -2385,7 +2527,7 @@ )) (net (rename A_DECODE_c_17 "A_DECODE_c[17]") (joined (portRef O (instanceRef A_DECODE_17)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_i_o2_2)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_1)) )) (net (rename A_DECODE_17 "A_DECODE[17]") (joined (portRef (member a_decode 6)) @@ -2409,7 +2551,7 @@ )) (net (rename A_DECODE_c_20 "A_DECODE_c[20]") (joined (portRef O (instanceRef A_DECODE_20)) - (portRef I0 (instanceRef un13_ciin_i_0_0_a3_6)) + (portRef I0 (instanceRef un10_ciin_6)) )) (net (rename A_DECODE_20 "A_DECODE[20]") (joined (portRef (member a_decode 3)) @@ -2417,7 +2559,7 @@ )) (net (rename A_DECODE_c_21 "A_DECODE_c[21]") (joined (portRef O (instanceRef A_DECODE_21)) - (portRef I1 (instanceRef un13_ciin_i_0_0_a3_6)) + (portRef I1 (instanceRef un10_ciin_6)) )) (net (rename A_DECODE_21 "A_DECODE[21]") (joined (portRef (member a_decode 2)) @@ -2425,7 +2567,7 @@ )) (net (rename A_DECODE_c_22 "A_DECODE_c[22]") (joined (portRef O (instanceRef A_DECODE_22)) - (portRef I1 (instanceRef un13_ciin_i_0_0_a3_11)) + (portRef I1 (instanceRef un10_ciin_11)) )) (net (rename A_DECODE_22 "A_DECODE[22]") (joined (portRef (member a_decode 1)) @@ -2433,7 +2575,7 @@ )) (net (rename A_DECODE_c_23 "A_DECODE_c[23]") (joined (portRef O (instanceRef A_DECODE_23)) - (portRef I0 (instanceRef un13_ciin_i_0_0_a3_5)) + (portRef I0 (instanceRef un10_ciin_5)) )) (net (rename A_DECODE_23 "A_DECODE[23]") (joined (portRef (member a_decode 0)) @@ -2450,7 +2592,7 @@ )) (net (rename A_c_1 "A_c[1]") (joined (portRef O (instanceRef A_1)) - (portRef I0 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i_a3_0_a3)) + (portRef I0 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3)) (portRef I0 (instanceRef A_i_1)) )) (net (rename A_1 "A[1]") (joined @@ -2460,9 +2602,9 @@ (net nEXP_SPACE_c (joined (portRef O (instanceRef nEXP_SPACE)) (portRef I0 (instanceRef nEXP_SPACE_i)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_0_o2_2_0)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_i_a3)) - (portRef I1 (instanceRef pos_clk_un6_bg_030_i_0)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_o2)) + (portRef I1 (instanceRef pos_clk_un15_clk_000_d_i_i_o2_1)) + (portRef I0 (instanceRef pos_clk_un6_bg_030_0_a2_1)) (portRef OE (instanceRef DSACK1)) )) (net nEXP_SPACE (joined @@ -2471,7 +2613,7 @@ )) (net BERR_c (joined (portRef O (instanceRef BERR)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_0_1_3)) + (portRef I0 (instanceRef pos_clk_un31_clk_000_ne)) )) (net BERR (joined (portRef BERR) @@ -2501,9 +2643,10 @@ )) (net BGACK_000_c (joined (portRef O (instanceRef BGACK_000)) - (portRef I1 (instanceRef un21_berr_0_a3_0_a3_1)) - (portRef I0 (instanceRef pos_clk_un6_bgack_000_0_0)) (portRef I0 (instanceRef BGACK_030_INT_0_m)) + (portRef I0 (instanceRef pos_clk_un6_bgack_000)) + (portRef I1 (instanceRef un21_fpu_cs_0_a2_1)) + (portRef I1 (instanceRef un21_berr_0_a2_1)) )) (net BGACK_000 (joined (portRef BGACK_000) @@ -2511,8 +2654,7 @@ )) (net CLK_030_c (joined (portRef O (instanceRef CLK_030)) - (portRef I1 (instanceRef DS_000_DMA_2_sqmuxa_i_0_a3)) - (portRef I0 (instanceRef CLK_030_c_i)) + (portRef I0 (instanceRef pos_clk_un4_rw_000_2)) )) (net CLK_030 (joined (portRef CLK_030) @@ -2531,6 +2673,7 @@ (portRef CLK (instanceRef A0_DMA)) (portRef CLK (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH)) (portRef CLK (instanceRef AMIGA_BUS_ENABLE_DMA_LOW)) + (portRef CLK (instanceRef AMIGA_DS)) (portRef CLK (instanceRef AS_000_DMA)) (portRef CLK (instanceRef AS_000_INT)) (portRef CLK (instanceRef AS_030_000_SYNC)) @@ -2543,7 +2686,8 @@ (portRef CLK (instanceRef CLK_000_D_2)) (portRef CLK (instanceRef CLK_000_D_3)) (portRef CLK (instanceRef CLK_000_D_4)) - (portRef CLK (instanceRef CLK_030_H)) + (portRef CLK (instanceRef CLK_030_PE_0)) + (portRef CLK (instanceRef CLK_030_PE_1)) (portRef CLK (instanceRef CLK_OUT_INT)) (portRef CLK (instanceRef CLK_OUT_PRE_50)) (portRef CLK (instanceRef CLK_OUT_PRE_D)) @@ -2594,6 +2738,7 @@ )) (net CLK_EXP_c (joined (portRef Q (instanceRef CLK_OUT_INT)) + (portRef I0 (instanceRef CLK_EXP_i)) (portRef I0 (instanceRef CLK_DIV_OUT)) (portRef I0 (instanceRef CLK_EXP)) )) @@ -2608,7 +2753,7 @@ (net FPU_SENSE_c (joined (portRef O (instanceRef FPU_SENSE)) (portRef I0 (instanceRef FPU_SENSE_i)) - (portRef I1 (instanceRef un21_berr_0_a3_0_a3_1_0)) + (portRef I1 (instanceRef un21_berr_0_a2)) )) (net FPU_SENSE (joined (portRef FPU_SENSE) @@ -2616,7 +2761,7 @@ )) (net (rename IPL_030_c_0 "IPL_030_c[0]") (joined (portRef Q (instanceRef IPL_030DFF_0)) - (portRef I0 (instanceRef IPL_030_0_0__m)) + (portRef I0 (instanceRef IPL_030_0_0__n)) (portRef I0 (instanceRef IPL_030_0)) )) (net (rename IPL_030_0 "IPL_030[0]") (joined @@ -2625,7 +2770,7 @@ )) (net (rename IPL_030_c_1 "IPL_030_c[1]") (joined (portRef Q (instanceRef IPL_030DFF_1)) - (portRef I0 (instanceRef IPL_030_0_1__m)) + (portRef I0 (instanceRef IPL_030_0_1__n)) (portRef I0 (instanceRef IPL_030_1)) )) (net (rename IPL_030_1 "IPL_030[1]") (joined @@ -2634,7 +2779,7 @@ )) (net (rename IPL_030_c_2 "IPL_030_c[2]") (joined (portRef Q (instanceRef IPL_030DFF_2)) - (portRef I0 (instanceRef IPL_030_0_2__m)) + (portRef I0 (instanceRef IPL_030_0_2__n)) (portRef I0 (instanceRef IPL_030_2)) )) (net (rename IPL_030_2 "IPL_030[2]") (joined @@ -2643,9 +2788,9 @@ )) (net (rename IPL_c_0 "IPL_c[0]") (joined (portRef O (instanceRef IPL_0)) - (portRef I0 (instanceRef IPL_030_0_0__n)) - (portRef I0 (instanceRef IPL_i_0)) - (portRef I1 (instanceRef pos_clk_un1_ipl_i_0_x2)) + (portRef I0 (instanceRef IPL_030_0_0__m)) + (portRef I1 (instanceRef G_122)) + (portRef I0 (instanceRef IPL_c_i_0)) )) (net (rename IPL_0 "IPL[0]") (joined (portRef (member ipl 2)) @@ -2653,9 +2798,9 @@ )) (net (rename IPL_c_1 "IPL_c[1]") (joined (portRef O (instanceRef IPL_1)) - (portRef I0 (instanceRef IPL_030_0_1__n)) - (portRef I0 (instanceRef IPL_i_1)) - (portRef I1 (instanceRef pos_clk_un1_ipl_i_0_x2_0)) + (portRef I0 (instanceRef IPL_030_0_1__m)) + (portRef I1 (instanceRef G_123)) + (portRef I0 (instanceRef IPL_c_i_1)) )) (net (rename IPL_1 "IPL[1]") (joined (portRef (member ipl 1)) @@ -2663,9 +2808,9 @@ )) (net (rename IPL_c_2 "IPL_c[2]") (joined (portRef O (instanceRef IPL_2)) - (portRef I0 (instanceRef IPL_030_0_2__n)) - (portRef I0 (instanceRef IPL_i_2)) - (portRef I1 (instanceRef pos_clk_un1_ipl_i_0_x2_1)) + (portRef I0 (instanceRef IPL_030_0_2__m)) + (portRef I1 (instanceRef G_124)) + (portRef I0 (instanceRef IPL_c_i_2)) )) (net (rename IPL_2 "IPL[2]") (joined (portRef (member ipl 0)) @@ -2681,7 +2826,7 @@ )) (net DTACK (joined (portRef DTACK) - (portRef I0 (instanceRef DTACK)) + (portRef IO (instanceRef DTACK)) )) (net AVEC (joined (portRef O (instanceRef AVEC)) @@ -2705,66 +2850,70 @@ )) (net RST_c (joined (portRef O (instanceRef RST)) + (portRef I1 (instanceRef IPL_030_1_1)) (portRef I1 (instanceRef IPL_030_1_0)) + (portRef I1 (instanceRef IPL_D0_0_1)) + (portRef I1 (instanceRef IPL_D0_0_0)) + (portRef I1 (instanceRef AS_030_000_SYNC_1)) + (portRef I1 (instanceRef RW_000_INT_1)) + (portRef I0 (instanceRef SIZE_DMA_3_sqmuxa)) + (portRef I1 (instanceRef AMIGA_DS_0_0)) + (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0)) + (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_1)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1)) + (portRef I1 (instanceRef A0_DMA_1)) + (portRef I1 (instanceRef RW_000_DMA_1)) (portRef I1 (instanceRef DS_000_DMA_1)) (portRef I1 (instanceRef AS_000_DMA_1)) - (portRef I1 (instanceRef AS_030_000_SYNC_1)) - (portRef I1 (instanceRef RW_000_DMA_1)) - (portRef I1 (instanceRef A0_DMA_1)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1)) - (portRef I1 (instanceRef BG_000_1)) - (portRef I1 (instanceRef IPL_030_1_2)) - (portRef I1 (instanceRef IPL_030_1_1)) - (portRef I1 (instanceRef RESET_OUT_2_0_0_a3)) - (portRef I1 (instanceRef IPL_D0_0_i_a3_0_a3_2)) - (portRef I1 (instanceRef IPL_D0_0_i_a3_0_a3_1)) - (portRef I1 (instanceRef IPL_D0_0_i_a3_0_a3_0)) - (portRef I1 (instanceRef SIZE_DMA_3_sqmuxa_0_a3_i)) - (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_1)) - (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_0)) - (portRef I1 (instanceRef AS_030_D0_0_0_0)) - (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_o3)) - (portRef I1 (instanceRef AS_000_INT_0_i_0_a3)) - (portRef I1 (instanceRef AS_000_INT_0_i_0_a3_0)) - (portRef I1 (instanceRef DS_000_ENABLE_1)) - (portRef I1 (instanceRef UDS_000_INT_1)) - (portRef I1 (instanceRef LDS_000_INT_1)) + (portRef I0 (instanceRef un1_rst_3)) (portRef I1 (instanceRef BGACK_030_INT_1)) - (portRef I1 (instanceRef DSACK1_INT_0_i_0_a3)) - (portRef I1 (instanceRef DSACK1_INT_0_i_0_a3_0)) - (portRef I1 (instanceRef VMA_INT_1)) - (portRef I1 (instanceRef RST_DLYlde_0_0_o3)) - (portRef I1 (instanceRef RST_DLY_e2_i_0_o2)) - (portRef I1 (instanceRef RESET_OUT_1_sqmuxa_i_0_111_1)) - (portRef I1 (instanceRef RW_000_INT_1)) + (portRef I1 (instanceRef un1_rst_2_1)) + (portRef I1 (instanceRef RST_DLY_e2_i_2)) (portRef I0 (instanceRef VPA_D_0)) (portRef I1 (instanceRef DTACK_D0_0)) - (portRef I1 (instanceRef RST_DLY_e1_i_0_2)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_2_1)) - (portRef I1 (instanceRef RST_DLY_e2_i_0_2)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_0)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_6)) - (portRef I1 (instanceRef RST_DLY_e0_i_0)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_i_i_2)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_3)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_4)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_0_0)) - (portRef I1 (instanceRef RESET_OUT_2_0_0_a3_0)) - (portRef I1 (instanceRef CLK_030_H_2_i_0_1)) + (portRef I1 (instanceRef DSACK1_INT_0_i_a2_0)) + (portRef I1 (instanceRef RESET_OUT_2_0_a2)) + (portRef I1 (instanceRef AS_030_D0_0_i_a2)) + (portRef I1 (instanceRef RESET_OUT_1_sqmuxa_i_0_132_0)) + (portRef I1 (instanceRef RST_DLY_e2_i_o2)) + (portRef I1 (instanceRef VMA_INT_1)) + (portRef I1 (instanceRef AS_000_INT_0_i_a2_0)) + (portRef I1 (instanceRef BG_000_1)) + (portRef I1 (instanceRef UDS_000_INT_1)) + (portRef I1 (instanceRef LDS_000_INT_1)) + (portRef I1 (instanceRef IPL_D0_0_2)) + (portRef I1 (instanceRef IPL_030_1_2)) + (portRef I1 (instanceRef DS_000_ENABLE_1)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_6)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_1)) + (portRef I1 (instanceRef RST_DLY_e1_i_1)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_2)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_3)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_4)) + (portRef I1 (instanceRef RST_DLY_e0_i_a2_0)) + (portRef I1 (instanceRef RESET_OUT_2_0_a2_0)) + (portRef I1 (instanceRef RST_DLY_e0_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_5)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_0)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0)) )) (net RST (joined (portRef RST) (portRef I0 (instanceRef RST)) )) - (net RESET (joined + (net RESET_c (joined (portRef O (instanceRef RESET)) + (portRef I1 (instanceRef un3_ahigh)) + )) + (net RESET (joined (portRef RESET) + (portRef I0 (instanceRef RESET)) )) (net RW_c (joined (portRef O (instanceRef RW)) - (portRef I1 (instanceRef un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_a2)) (portRef I0 (instanceRef RW_c_i)) + (portRef I1 (instanceRef DS_000_ENABLE_0_sqmuxa_1_1)) )) (net RW (joined (portRef IO (instanceRef RW)) @@ -2772,7 +2921,7 @@ )) (net (rename FC_c_0 "FC_c[0]") (joined (portRef O (instanceRef FC_0)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_i_o2_1)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_5)) )) (net (rename FC_0 "FC[0]") (joined (portRef (member fc 1)) @@ -2780,7 +2929,7 @@ )) (net (rename FC_c_1 "FC_c[1]") (joined (portRef O (instanceRef FC_1)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_i_o2_1)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_3)) )) (net (rename FC_1 "FC[1]") (joined (portRef (member fc 0)) @@ -2791,7 +2940,7 @@ (portRef AMIGA_ADDR_ENABLE) )) (net AMIGA_BUS_DATA_DIR_c (joined - (portRef O (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_i)) + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_iv_i)) (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR)) )) (net AMIGA_BUS_DATA_DIR (joined @@ -2810,247 +2959,17 @@ (portRef O (instanceRef CIIN)) (portRef CIIN) )) - (net N_16_i (joined - (portRef O (instanceRef N_16_i)) - (portRef I0 (instanceRef RW_000_INT_1)) + (net BG_030_c_i (joined + (portRef O (instanceRef BG_030_c_i)) + (portRef I0 (instanceRef pos_clk_un9_bg_030)) )) - (net N_39_0 (joined - (portRef O (instanceRef RW_000_INT_1)) - (portRef I0 (instanceRef RW_000_INT_1_i)) + (net (rename pos_clk_un6_bg_030_i "pos_clk.un6_bg_030_i") (joined + (portRef O (instanceRef pos_clk_un6_bg_030_i)) + (portRef I1 (instanceRef pos_clk_un9_bg_030)) )) - (net VPA_c_i (joined - (portRef O (instanceRef VPA_c_i)) - (portRef I1 (instanceRef VPA_D_0)) - )) - (net N_52_0 (joined - (portRef O (instanceRef VPA_D_0)) - (portRef I0 (instanceRef VPA_D_0_i)) - )) - (net DTACK_c_i (joined - (portRef O (instanceRef DTACK_c_i)) - (portRef I0 (instanceRef DTACK_D0_0)) - )) - (net N_53_0 (joined - (portRef O (instanceRef DTACK_D0_0)) - (portRef I0 (instanceRef DTACK_D0_0_i)) - )) - (net N_210_i (joined - (portRef O (instanceRef N_210_i)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_2)) - (portRef I0 (instanceRef cpu_est_2_i_0_0_3)) - )) - (net N_211_i (joined - (portRef O (instanceRef N_211_i)) - (portRef I1 (instanceRef cpu_est_2_i_0_0_3)) - )) - (net N_189_i (joined - (portRef O (instanceRef cpu_est_2_i_0_0_3)) - (portRef I0 (instanceRef cpu_est_0_3__n)) - )) - (net un1_SM_AMIGA_0_sqmuxa_1_0 (joined - (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1)) - (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_i)) - )) - (net RW_c_i (joined - (portRef O (instanceRef RW_c_i)) - (portRef I1 (instanceRef pos_clk_RW_000_INT_5_i_a3_i)) - )) - (net N_311_0 (joined - (portRef O (instanceRef pos_clk_RW_000_INT_5_i_a3_i)) - (portRef I0 (instanceRef pos_clk_RW_000_INT_5_i_a3_i_i)) - )) - (net N_336_i (joined - (portRef O (instanceRef N_336_i)) - (portRef I1 (instanceRef cpu_est_0_0_x2_0_0)) - )) - (net N_244_i (joined - (portRef O (instanceRef N_244_i)) - (portRef I0 (instanceRef cpu_est_0_0_x2_0_0)) - )) - (net N_91_i_i (joined - (portRef O (instanceRef cpu_est_0_0_x2_0_0)) - (portRef D (instanceRef cpu_est_0)) - )) - (net N_314_0 (joined - (portRef O (instanceRef cpu_est_2_i_0_0_o2_3)) - (portRef I0 (instanceRef cpu_est_2_i_0_0_o2_i_3)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_1_3)) - )) - (net N_159_i (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_o2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_1_3)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_1)) - )) - (net VMA_INT_i (joined - (portRef O (instanceRef VMA_INT_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_2_3)) - )) - (net N_352_i (joined - (portRef O (instanceRef N_352_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_o2_0_1_3)) - )) - (net N_353_i (joined - (portRef O (instanceRef N_353_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_o2_0_3)) - )) - (net N_293_i (joined - (portRef O (instanceRef N_293_i)) - (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_o3)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_0_1_0)) - )) - (net N_175_i (joined - (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_o3)) - (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1)) - (portRef I0 (instanceRef pos_clk_RW_000_INT_5_i_a3_i)) - )) - (net N_176_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_0_3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_0_i_3)) - )) - (net N_234_i (joined - (portRef O (instanceRef RST_DLY_e2_i_0)) - (portRef D (instanceRef RST_DLY_2)) - )) - (net N_198_i (joined - (portRef O (instanceRef N_198_i)) - (portRef I0 (instanceRef RST_DLY_e2_i_0_2)) - )) - (net N_197_i (joined - (portRef O (instanceRef N_197_i)) - (portRef I1 (instanceRef RST_DLY_e2_i_0_1)) - )) - (net N_196_i (joined - (portRef O (instanceRef N_196_i)) - (portRef I0 (instanceRef RST_DLY_e2_i_0_1)) - )) - (net N_183_0 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_4)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_4)) - )) - (net N_182_0 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_i_i_o2_2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_i_o2_i_2)) - )) - (net N_180_0 (joined - (portRef O (instanceRef un5_e_0_i_o2_0)) - (portRef I0 (instanceRef un5_e_0_i_o2_0_i)) - )) - (net N_178_0 (joined - (portRef O (instanceRef un5_e_0_i_o2)) - (portRef I0 (instanceRef un5_e_0_i_o2_i)) - )) - (net N_82_i (joined - (portRef O (instanceRef RST_DLYlde_0_0_o3)) - (portRef I0 (instanceRef RST_DLY_e1_i_0_a3_0)) - (portRef I0 (instanceRef RST_DLY_e0_i_0_a3_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_5)) - )) - (net N_315_i (joined - (portRef O (instanceRef cpu_est_2_0_0_0_o2_2)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_a2_2)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_o2_i_2)) - )) - (net N_351_i (joined - (portRef O (instanceRef N_351_i)) - (portRef I0 (instanceRef RST_DLY_e2_i_0_o2)) - )) - (net N_154_0 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_o2)) - (portRef I0 (instanceRef RST_DLY_e2_i_0_o2_i)) - )) - (net N_149_i (joined - (portRef O (instanceRef N_155_i_0_o2_i_o2_i_o2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_0)) - (portRef I0 (instanceRef RST_DLY_e2_i_0_a2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a3_3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_4)) - (portRef I0 (instanceRef cpu_est_0_0_x2_0_a3_0_0)) - (portRef I0 (instanceRef N_155_i_0_o2_i_o2_i_o2_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_i_o2_1_2)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_1)) - (portRef I0 (instanceRef RESET_OUT_2_0_0_a3_0_1)) - )) - (net N_207_i (joined - (portRef O (instanceRef RESET_OUT_1_sqmuxa_i_0_111_1)) - (portRef I1 (instanceRef RST_DLY_e2_i_0_a3_1_0)) - (portRef I0 (instanceRef RST_DLY_e1_i_0_a3_1_1)) - )) - (net N_228_i (joined - (portRef O (instanceRef N_228_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_5)) - )) - (net N_146_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_5)) - (portRef D (instanceRef SM_AMIGA_5)) - )) - (net N_213_i (joined - (portRef O (instanceRef N_213_i)) - (portRef I1 (instanceRef un5_e_0_i)) - )) - (net N_212_i (joined - (portRef O (instanceRef N_212_i)) - (portRef I0 (instanceRef un5_e_0_i)) - )) - (net N_309_i (joined - (portRef O (instanceRef un5_e_0_i)) - (portRef I0 (instanceRef E)) - )) - (net N_357_i (joined - (portRef O (instanceRef N_357_i)) - (portRef I1 (instanceRef cpu_est_2_0_0_0_2)) - )) - (net (rename cpu_est_2_0_2 "cpu_est_2_0[2]") (joined - (portRef O (instanceRef cpu_est_2_0_0_0_2)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_i_2)) - )) - (net N_208_i (joined - (portRef O (instanceRef N_208_i)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_1)) - )) - (net N_209_i (joined - (portRef O (instanceRef N_209_i)) - (portRef I1 (instanceRef cpu_est_2_0_0_0_1)) - )) - (net (rename cpu_est_2_0_1 "cpu_est_2_0[1]") (joined - (portRef O (instanceRef cpu_est_2_0_0_0_1)) - (portRef I0 (instanceRef cpu_est_2_0_0_0_i_1)) - )) - (net N_206_i (joined - (portRef O (instanceRef N_206_i)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0)) - )) - (net N_205_i (joined - (portRef O (instanceRef N_205_i)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0)) - )) - (net (rename pos_clk_un9_clk_000_pe_0 "pos_clk.un9_clk_000_pe_0") (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_i)) - )) - (net N_18_i (joined - (portRef O (instanceRef N_18_i)) - (portRef I0 (instanceRef VMA_INT_1)) - )) - (net N_37_0 (joined - (portRef O (instanceRef VMA_INT_1)) - (portRef I0 (instanceRef VMA_INT_1_i)) - )) - (net N_171_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_3)) - )) - (net N_354_i (joined - (portRef O (instanceRef N_354_i)) - (portRef I1 (instanceRef un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_o3)) - )) - (net un1_DS_000_ENABLE_0_sqmuxa_0 (joined - (portRef O (instanceRef un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_o3)) - (portRef I1 (instanceRef DS_000_ENABLE_1_sqmuxa_i_0)) - (portRef I0 (instanceRef un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_o3_i)) - )) - (net N_66_0 (joined - (portRef O (instanceRef DS_000_ENABLE_1_sqmuxa_i_0)) - (portRef I0 (instanceRef DS_000_ENABLE_1_sqmuxa_i_0_i)) + (net (rename pos_clk_un9_bg_030_0 "pos_clk.un9_bg_030_0") (joined + (portRef O (instanceRef pos_clk_un9_bg_030)) + (portRef I0 (instanceRef pos_clk_un9_bg_030_i)) )) (net UDS_000_INT_i (joined (portRef O (instanceRef UDS_000_INT_i)) @@ -3068,29 +2987,45 @@ (portRef O (instanceRef un1_LDS_000_INT)) (portRef I0 (instanceRef un1_LDS_000_INT_i)) )) - (net N_21_i (joined - (portRef O (instanceRef N_21_i)) + (net N_23_i (joined + (portRef O (instanceRef N_23_i)) + (portRef I0 (instanceRef BG_000_1)) + )) + (net N_30_0 (joined + (portRef O (instanceRef BG_000_1)) + (portRef I0 (instanceRef BG_000_1_i)) + )) + (net N_20_i (joined + (portRef O (instanceRef N_20_i)) (portRef I0 (instanceRef UDS_000_INT_1)) )) - (net N_34_0 (joined + (net N_33_0 (joined (portRef O (instanceRef UDS_000_INT_1)) (portRef I0 (instanceRef UDS_000_INT_1_i)) )) - (net N_14_i (joined - (portRef O (instanceRef N_14_i)) + (net N_13_i (joined + (portRef O (instanceRef N_13_i)) (portRef I0 (instanceRef LDS_000_INT_1)) )) - (net N_41_0 (joined + (net N_40_0 (joined (portRef O (instanceRef LDS_000_INT_1)) (portRef I0 (instanceRef LDS_000_INT_1_i)) )) - (net N_8_i (joined - (portRef O (instanceRef N_8_i)) - (portRef I0 (instanceRef BGACK_030_INT_1)) + (net (rename IPL_c_i_2 "IPL_c_i[2]") (joined + (portRef O (instanceRef IPL_c_i_2)) + (portRef I0 (instanceRef IPL_D0_0_2)) )) - (net N_42_0 (joined - (portRef O (instanceRef BGACK_030_INT_1)) - (portRef I0 (instanceRef BGACK_030_INT_1_i)) + (net N_51_0 (joined + (portRef O (instanceRef IPL_D0_0_2)) + (portRef I0 (instanceRef IPL_D0_0_i_2)) + )) + (net N_26_i (joined + (portRef O (instanceRef N_26_i)) + (portRef I0 (instanceRef IPL_030_1_2)) + )) + (net N_29_0 (joined + (portRef O (instanceRef IPL_030_1_2)) + (portRef I0 (instanceRef IPL_030_1_i_2)) )) (net (rename A_c_i_0 "A_c_i[0]") (joined (portRef O (instanceRef A_c_i_0)) @@ -3104,216 +3039,295 @@ (portRef O (instanceRef pos_clk_un10_sm_amiga)) (portRef I0 (instanceRef LDS_000_INT_0_m)) )) - (net N_359_i (joined - (portRef O (instanceRef N_359_i)) - (portRef I1 (instanceRef pos_clk_un6_bgack_000_0_0)) + (net DS_000_ENABLE_0_sqmuxa_1_i (joined + (portRef O (instanceRef DS_000_ENABLE_0_sqmuxa_1_i)) + (portRef I0 (instanceRef un1_DS_000_ENABLE_0_sqmuxa)) )) - (net (rename pos_clk_un6_bgack_000_0 "pos_clk.un6_bgack_000_0") (joined - (portRef O (instanceRef pos_clk_un6_bgack_000_0_0)) - (portRef I0 (instanceRef pos_clk_un6_bgack_000_0_0_i)) + (net un1_DS_000_ENABLE_0_sqmuxa_i (joined + (portRef O (instanceRef un1_DS_000_ENABLE_0_sqmuxa)) + (portRef I1 (instanceRef DS_000_ENABLE_1_sqmuxa)) + (portRef I0 (instanceRef un1_DS_000_ENABLE_0_sqmuxa_i_0)) )) - (net N_220_i (joined - (portRef O (instanceRef N_220_i)) - (portRef I1 (instanceRef DSACK1_INT_0_i_0)) + (net N_157_i (joined + (portRef O (instanceRef DS_000_ENABLE_0_sqmuxa_0_o3)) + (portRef I0 (instanceRef DS_000_ENABLE_0_sqmuxa_0_o3_i)) )) - (net N_219_i (joined - (portRef O (instanceRef N_219_i)) - (portRef I0 (instanceRef DSACK1_INT_0_i_0)) + (net N_160_0 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_o3_4)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_o3_i_4)) )) - (net N_248_i (joined - (portRef O (instanceRef DSACK1_INT_0_i_0)) - (portRef D (instanceRef DSACK1_INT)) + (net N_161_0 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_o3_2)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_o3_i_2)) )) - (net N_222_i (joined - (portRef O (instanceRef N_222_i)) - (portRef I1 (instanceRef AS_000_INT_0_i_0)) + (net N_162_0 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_o3_6)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_o3_i_6)) )) - (net N_221_i (joined - (portRef O (instanceRef N_221_i)) - (portRef I0 (instanceRef AS_000_INT_0_i_0)) + (net N_165_i (joined + (portRef O (instanceRef N_165_i)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_1_2)) )) - (net N_247_i (joined - (portRef O (instanceRef AS_000_INT_0_i_0)) - (portRef D (instanceRef AS_000_INT)) + (net N_140_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_2)) + (portRef D (instanceRef SM_AMIGA_2)) )) - (net N_223_i (joined - (portRef O (instanceRef N_223_i)) - (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0)) + (net N_167_i (joined + (portRef O (instanceRef N_167_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_1_3)) )) - (net N_224_i (joined - (portRef O (instanceRef N_224_i)) - (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0)) + (net N_166_i (joined + (portRef O (instanceRef N_166_i)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_1_3)) )) - (net AMIGA_BUS_DATA_DIR_c_0 (joined - (portRef O (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0)) - (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_i)) + (net N_142_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_3)) + (portRef D (instanceRef SM_AMIGA_3)) )) - (net N_150_i (joined - (portRef O (instanceRef pos_clk_un1_ipl_i_0_o3)) - (portRef I1 (instanceRef G_96)) - (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_o2)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0_a3_0_0)) - (portRef I1 (instanceRef pos_clk_un6_bgack_000_0_0_a2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_3)) - (portRef I0 (instanceRef pos_clk_un1_ipl_i_0_o3_i)) - (portRef I0 (instanceRef pos_clk_un1_ipl_i_0_1)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_1)) + (net N_168_i (joined + (portRef O (instanceRef N_168_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_1_4)) )) - (net N_156_i (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_i_o2)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_i_o2_i)) - (portRef I1 (instanceRef un21_berr_0_a3_0_a3)) - (portRef I1 (instanceRef un21_fpu_cs_0_a3_0_a3)) + (net N_144_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_4)) + (portRef D (instanceRef SM_AMIGA_4)) )) - (net N_160_i (joined - (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_o2)) - (portRef I0 (instanceRef AS_000_INT_0_i_0_a3_0)) - (portRef I0 (instanceRef un1_DS_000_ENABLE_0_sqmuxa_0_o3_0_a2)) - (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_1_o2_i)) + (net N_170_i (joined + (portRef O (instanceRef N_170_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_1_6)) )) - (net N_174_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_0)) - (portRef I0 (instanceRef DSACK1_INT_0_i_0_a3_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_0)) + (net N_148_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_6)) + (portRef D (instanceRef SM_AMIGA_6)) )) - (net N_158_i (joined - (portRef O (instanceRef RST_DLY_e2_i_0_o2_0)) - (portRef I1 (instanceRef RST_DLY_e1_i_0_a3)) - (portRef I0 (instanceRef RESET_OUT_1_sqmuxa_i_0_111_1_a2)) - (portRef I0 (instanceRef RST_DLY_e2_i_0_o2_0_i)) - )) - (net N_201_i (joined - (portRef O (instanceRef N_201_i)) - (portRef I0 (instanceRef RST_DLY_e1_i_0_1)) - )) - (net N_202_i (joined - (portRef O (instanceRef N_202_i)) - (portRef I1 (instanceRef RST_DLY_e1_i_0_1)) - )) - (net N_203_i (joined - (portRef O (instanceRef N_203_i)) - (portRef I0 (instanceRef RST_DLY_e1_i_0_2)) - )) - (net N_235_i (joined - (portRef O (instanceRef RST_DLY_e1_i_0)) - (portRef D (instanceRef RST_DLY_1)) - )) - (net N_233_0 (joined - (portRef O (instanceRef pos_clk_un1_ipl_i_0)) - (portRef I0 (instanceRef pos_clk_un1_ipl_i_0_i)) - )) - (net N_360_i (joined - (portRef O (instanceRef N_360_i)) - (portRef I1 (instanceRef pos_clk_un1_ipl_i_0_2)) - )) - (net N_191_i_i (joined - (portRef O (instanceRef N_191_i_i)) - (portRef I1 (instanceRef pos_clk_un1_ipl_i_0_1)) - )) - (net N_192_i_i (joined - (portRef O (instanceRef N_192_i_i)) - (portRef I0 (instanceRef pos_clk_un1_ipl_i_0_2)) - )) - (net N_59_i (joined - (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i_0)) - (portRef D (instanceRef CYCLE_DMA_0)) - )) - (net N_199_i (joined - (portRef O (instanceRef N_199_i)) - (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_1)) - )) - (net N_204_i (joined - (portRef O (instanceRef N_204_i)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_2)) + (net N_164_i (joined + (portRef O (instanceRef N_164_i)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_1_1)) )) (net N_138_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_1)) + (portRef O (instanceRef SM_AMIGA_srsts_i_1)) (portRef D (instanceRef SM_AMIGA_1)) )) - (net N_282_i (joined - (portRef O (instanceRef N_282_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_2_1)) + (net N_102_i (joined + (portRef O (instanceRef N_102_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_o4_i_1)) )) - (net N_278_i (joined - (portRef O (instanceRef N_278_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_1_1)) + (net N_264_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_o4_i_1)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_o4_i_i_1)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_1_2)) )) - (net N_186_i (joined - (portRef O (instanceRef un2_as_030_i_a2_i_o3)) - (portRef I0 (instanceRef un4_as_030_i_a3_i)) - (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a3_0_1)) - (portRef OE (instanceRef SIZE_0)) - (portRef OE (instanceRef SIZE_1)) + (net N_79_i (joined + (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_o3_i_o2)) + (portRef I0 (instanceRef AS_000_INT_0_i_a2_0)) + (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_o3_i_o2_i)) )) - (net N_185_i (joined - (portRef O (instanceRef pos_clk_un5_bgack_030_int_d_i_0_a2_i_o3)) - (portRef I0 (instanceRef SIZE_DMA_3_sqmuxa_0_a3_i)) - (portRef I0 (instanceRef pos_clk_un5_bgack_030_int_d_i_0_a2_i_o3_i)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_i_a3_2)) + (net N_78_i (joined + (portRef O (instanceRef CLK_000_PE_0_o3_i_o2)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_a2_0_0)) + (portRef I0 (instanceRef DS_000_ENABLE_0_sqmuxa_0_o3)) + (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_o3_i_o2)) + (portRef I0 (instanceRef CLK_000_PE_0_o3_i_o2_i)) + (portRef I0 (instanceRef DS_000_ENABLE_0_sqmuxa_1_1)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_a3_1)) )) - (net CLK_030_c_i (joined - (portRef O (instanceRef CLK_030_c_i)) - (portRef I0 (instanceRef AS_000_DMA_1_sqmuxa_i_0)) - (portRef I1 (instanceRef CLK_030_H_2_i_0_o2)) + (net N_119_i (joined + (portRef O (instanceRef N_119_i)) + (portRef I1 (instanceRef AS_000_INT_0_i)) )) - (net N_184_0 (joined - (portRef O (instanceRef CLK_030_H_2_i_0_o2)) - (portRef I0 (instanceRef CLK_030_H_2_i_0_o2_i)) + (net N_118_i (joined + (portRef O (instanceRef N_118_i)) + (portRef I0 (instanceRef AS_000_INT_0_i)) )) - (net N_179_0 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_6)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_i_6)) + (net N_268_i (joined + (portRef O (instanceRef AS_000_INT_0_i)) + (portRef D (instanceRef AS_000_INT)) + )) + (net N_255_i (joined + (portRef O (instanceRef N_255_i)) + (portRef I0 (instanceRef cpu_est_2_0_0_2)) + (portRef I0 (instanceRef cpu_est_2_i_0_1_3)) + )) + (net N_257_i (joined + (portRef O (instanceRef N_257_i)) + (portRef I1 (instanceRef cpu_est_2_0_0_2)) + )) + (net (rename cpu_est_2_0_2 "cpu_est_2_0[2]") (joined + (portRef O (instanceRef cpu_est_2_0_0_2)) + (portRef I0 (instanceRef cpu_est_2_0_0_i_2)) + )) + (net N_258_i (joined + (portRef O (instanceRef N_258_i)) + (portRef I0 (instanceRef cpu_est_2_0_0_1)) + )) + (net N_259_i (joined + (portRef O (instanceRef N_259_i)) + (portRef I1 (instanceRef cpu_est_2_0_0_1)) + )) + (net (rename cpu_est_2_0_1 "cpu_est_2_0[1]") (joined + (portRef O (instanceRef cpu_est_2_0_0_1)) + (portRef I0 (instanceRef cpu_est_2_0_0_i_1)) + )) + (net N_262_i (joined + (portRef O (instanceRef N_262_i)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0)) + )) + (net N_261_i (joined + (portRef O (instanceRef N_261_i)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0)) + )) + (net (rename pos_clk_un9_clk_000_pe_0 "pos_clk.un9_clk_000_pe_0") (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_i)) )) (net N_251_i (joined - (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_o3)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_o3_i)) - (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_2)) - (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0)) + (portRef O (instanceRef cpu_est_2_i_0_o2_3)) + (portRef I0 (instanceRef cpu_est_2_0_0_a3_2)) + (portRef I0 (instanceRef cpu_est_2_i_0_o2_i_3)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_a3_0_1)) )) - (net LDS_000_c_i (joined - (portRef O (instanceRef LDS_000_c_i)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_o2_0)) + (net N_252_0 (joined + (portRef O (instanceRef un5_e_i_o2)) + (portRef I0 (instanceRef un5_e_i_o2_i)) )) - (net UDS_000_c_i (joined - (portRef O (instanceRef UDS_000_c_i)) - (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_o2_0)) + (net N_76_i (joined + (portRef O (instanceRef CLK_000_NE_0_o3_i_o2)) + (portRef I0 (instanceRef pos_clk_un13_bgack_030_int)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_o2_0)) + (portRef I1 (instanceRef pos_clk_un4_bgack_000)) + (portRef I0 (instanceRef RST_DLY_e2_i_a2_3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_a4_0_3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_o3_4)) + (portRef I0 (instanceRef CLK_000_NE_0_o3_i_o2_i)) + (portRef I0 (instanceRef RESET_OUT_2_0_a2_0_1)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_a3_0_1)) )) - (net N_172_i (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_o2_0)) - (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_a3_1)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_o2_i_0)) + (net N_17_i (joined + (portRef O (instanceRef N_17_i)) + (portRef I0 (instanceRef VMA_INT_1)) )) - (net (rename pos_clk_un21_bgack_030_int_i_0_0 "pos_clk.un21_bgack_030_int_i_0_0") (joined - (portRef O (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_o3)) - (portRef I1 (instanceRef AS_000_DMA_1_sqmuxa_i_0)) - (portRef I1 (instanceRef pos_clk_DS_000_DMA_4_f0_0_0)) - (portRef I0 (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_o3_i)) - (portRef I1 (instanceRef DS_000_DMA_2_sqmuxa_i_0)) - (portRef I1 (instanceRef CLK_030_H_2_i_0)) + (net N_36_0 (joined + (portRef O (instanceRef VMA_INT_1)) + (portRef I0 (instanceRef VMA_INT_1_i)) )) - (net N_163_i (joined - (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0_o2_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_6)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0_o2_i_0)) + (net N_98_i (joined + (portRef O (instanceRef N_98_i)) + (portRef I1 (instanceRef pos_clk_un31_clk_000_ne)) )) - (net (rename CLK_000_D_i_3 "CLK_000_D_i[3]") (joined - (portRef O (instanceRef CLK_000_D_i_3)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0_o2_2_0)) + (net (rename pos_clk_un31_clk_000_ne_i "pos_clk.un31_clk_000_ne_i") (joined + (portRef O (instanceRef pos_clk_un31_clk_000_ne)) + (portRef I0 (instanceRef pos_clk_un31_clk_000_ne_i_0)) )) - (net N_350_i (joined - (portRef O (instanceRef N_350_i)) - (portRef I1 (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_o3_2)) + (net N_228_i (joined + (portRef O (instanceRef RESET_OUT_1_sqmuxa_i_0_132_0)) + (portRef I0 (instanceRef RST_DLY_e1_i_a2_1_1)) + (portRef I1 (instanceRef RST_DLY_e2_i_a2_1)) )) - (net un1_rw_i (joined - (portRef O (instanceRef un1_rw_0)) - (portRef OE (instanceRef RW)) + (net N_121_i (joined + (portRef O (instanceRef N_121_i)) + (portRef I1 (instanceRef DSACK1_INT_0_i)) )) - (net N_126_0 (joined - (portRef O (instanceRef SIZE_DMA_3_sqmuxa_0_a3_i)) - (portRef I0 (instanceRef SIZE_DMA_3_sqmuxa_0_a3_i_i)) + (net N_120_i (joined + (portRef O (instanceRef N_120_i)) + (portRef I0 (instanceRef DSACK1_INT_0_i)) )) - (net N_313_i (joined - (portRef O (instanceRef un4_as_030_i_a3_i)) + (net N_269_i (joined + (portRef O (instanceRef DSACK1_INT_0_i)) + (portRef D (instanceRef DSACK1_INT)) + )) + (net N_125_i (joined + (portRef O (instanceRef N_125_i)) + (portRef I1 (instanceRef RESET_OUT_2_0)) + )) + (net N_124_i (joined + (portRef O (instanceRef N_124_i)) + (portRef I0 (instanceRef RESET_OUT_2_0)) + )) + (net N_53_0 (joined + (portRef O (instanceRef RESET_OUT_2_0)) + (portRef I0 (instanceRef RESET_OUT_2_0_i)) + )) + (net N_134_i (joined + (portRef O (instanceRef N_134_i)) + (portRef I0 (instanceRef RST_DLY_e2_i_o2)) + )) + (net N_270_0 (joined + (portRef O (instanceRef RST_DLY_e2_i_o2)) + (portRef I0 (instanceRef RST_DLY_e2_i_o2_i)) + )) + (net N_77_i (joined + (portRef O (instanceRef RST_DLY_e2_i_o2_0)) + (portRef I0 (instanceRef RESET_OUT_1_sqmuxa_i_0_132_0_a2)) + (portRef I0 (instanceRef RST_DLY_e1_i_a2)) + (portRef I0 (instanceRef RST_DLY_e2_i_o2_0_i)) + )) + (net N_87_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_o2_0)) + (portRef I0 (instanceRef DSACK1_INT_0_i_a2_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_o2_i_0)) + )) + (net N_112_i (joined + (portRef O (instanceRef N_112_i)) + (portRef I0 (instanceRef RST_DLY_e1_i_1)) + )) + (net N_113_i (joined + (portRef O (instanceRef N_113_i)) + (portRef I0 (instanceRef RST_DLY_e1_i_2)) + )) + (net N_114_i (joined + (portRef O (instanceRef N_114_i)) + (portRef I1 (instanceRef RST_DLY_e1_i_2)) + )) + (net N_266_i (joined + (portRef O (instanceRef RST_DLY_e1_i)) + (portRef D (instanceRef RST_DLY_1)) + )) + (net N_109_i (joined + (portRef O (instanceRef N_109_i)) + (portRef I1 (instanceRef RST_DLY_e2_i_1)) + )) + (net N_108_i (joined + (portRef O (instanceRef N_108_i)) + (portRef I0 (instanceRef RST_DLY_e2_i_1)) + )) + (net N_111_i (joined + (portRef O (instanceRef N_111_i)) + (portRef I0 (instanceRef RST_DLY_e2_i_2)) + )) + (net N_265_2_0 (joined + (portRef O (instanceRef RST_DLY_e2_i_2)) + (portRef I0 (instanceRef RST_DLY_e2_i_2_i)) + (portRef I1 (instanceRef RST_DLY_e2_i)) + )) + (net N_265_i (joined + (portRef O (instanceRef RST_DLY_e2_i)) + (portRef D (instanceRef RST_DLY_2)) + )) + (net un1_as_000_i (joined + (portRef O (instanceRef un1_as_000_0)) + (portRef OE (instanceRef AS_000)) + (portRef OE (instanceRef LDS_000)) + (portRef OE (instanceRef RW_000)) + (portRef OE (instanceRef UDS_000)) + )) + (net VPA_c_i (joined + (portRef O (instanceRef VPA_c_i)) + (portRef I1 (instanceRef VPA_D_0)) + )) + (net N_52_0 (joined + (portRef O (instanceRef VPA_D_0)) + (portRef I0 (instanceRef VPA_D_0_i)) + )) + (net DTACK_c_i (joined + (portRef O (instanceRef DTACK_c_i)) + (portRef I0 (instanceRef DTACK_D0_0)) + )) + (net N_48_0 (joined + (portRef O (instanceRef DTACK_D0_0)) + (portRef I0 (instanceRef DTACK_D0_0_i)) + )) + (net un3_ahigh_i (joined + (portRef O (instanceRef un3_ahigh)) (portRef OE (instanceRef AHIGH_24)) (portRef OE (instanceRef AHIGH_25)) (portRef OE (instanceRef AHIGH_26)) @@ -3322,210 +3336,45 @@ (portRef OE (instanceRef AHIGH_29)) (portRef OE (instanceRef AHIGH_30)) (portRef OE (instanceRef AHIGH_31)) - (portRef OE (instanceRef AS_030)) - (portRef OE (instanceRef A_0)) - (portRef OE (instanceRef DS_030)) )) - (net N_231_i (joined - (portRef O (instanceRef pos_clk_un6_bg_030_i_0)) - (portRef I0 (instanceRef pos_clk_un6_bg_030_i_0_i)) + (net (rename pos_clk_un4_bgack_000_i "pos_clk.un4_bgack_000_i") (joined + (portRef O (instanceRef pos_clk_un4_bgack_000_i)) + (portRef I1 (instanceRef pos_clk_un6_bgack_000)) )) - (net N_291_i (joined - (portRef O (instanceRef N_291_i)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0_1_0)) + (net (rename pos_clk_un6_bgack_000_0 "pos_clk.un6_bgack_000_0") (joined + (portRef O (instanceRef pos_clk_un6_bgack_000)) + (portRef I0 (instanceRef pos_clk_un6_bgack_000_i)) )) - (net N_152_i (joined - (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0_0)) - (portRef D (instanceRef SM_AMIGA_i_7)) + (net N_7_i (joined + (portRef O (instanceRef N_7_i)) + (portRef I0 (instanceRef BGACK_030_INT_1)) )) - (net N_288_i (joined - (portRef O (instanceRef N_288_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_1_4)) + (net N_41_0 (joined + (portRef O (instanceRef BGACK_030_INT_1)) + (portRef I0 (instanceRef BGACK_030_INT_1_i)) )) - (net N_144_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_4)) - (portRef D (instanceRef SM_AMIGA_4)) + (net (rename pos_clk_un1_bgack_030_int_0 "pos_clk.un1_bgack_030_int_0") (joined + (portRef O (instanceRef pos_clk_un1_bgack_030_int)) + (portRef I0 (instanceRef pos_clk_un1_bgack_030_int_i)) )) - (net N_287_i (joined - (portRef O (instanceRef N_287_i)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_1_3)) + (net (rename pos_clk_un12_clk_out_int_0 "pos_clk.un12_clk_out_int_0") (joined + (portRef O (instanceRef G_121)) + (portRef I0 (instanceRef G_121_i)) )) - (net N_340_i (joined - (portRef O (instanceRef N_340_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_1_3)) + (net (rename pos_clk_un3_0 "pos_clk.un3_0") (joined + (portRef O (instanceRef G_116)) + (portRef I0 (instanceRef G_116_i)) )) - (net N_142_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_3)) - (portRef D (instanceRef SM_AMIGA_3)) - )) - (net N_284_i (joined - (portRef O (instanceRef N_284_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_i_i_1_2)) - )) - (net N_312_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_i_i_2)) - (portRef D (instanceRef SM_AMIGA_2)) - )) - (net N_275_i (joined - (portRef O (instanceRef N_275_i)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_1)) - )) - (net (rename pos_clk_SIZE_DMA_6_0_1 "pos_clk.SIZE_DMA_6_0[1]") (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_1)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_i_1)) - )) - (net N_268_i (joined - (portRef O (instanceRef N_268_i)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_0)) - )) - (net (rename pos_clk_SIZE_DMA_6_0_0 "pos_clk.SIZE_DMA_6_0[0]") (joined - (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0_0)) - (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0_i_0)) - )) - (net N_265_i (joined - (portRef O (instanceRef N_265_i)) - (portRef I0 (instanceRef RST_DLY_e0_i_0_1)) - )) - (net N_267_i (joined - (portRef O (instanceRef N_267_i)) - (portRef I1 (instanceRef RST_DLY_e0_i_0_1)) - )) - (net N_236_i (joined - (portRef O (instanceRef RST_DLY_e0_i_0)) - (portRef D (instanceRef RST_DLY_0)) - )) - (net N_337_i (joined - (portRef O (instanceRef N_337_i)) - (portRef I0 (instanceRef RESET_OUT_2_0_0)) - )) - (net N_338_i (joined - (portRef O (instanceRef N_338_i)) - (portRef I1 (instanceRef RESET_OUT_2_0_0)) - )) - (net N_55_0 (joined - (portRef O (instanceRef RESET_OUT_2_0_0)) - (portRef I0 (instanceRef RESET_OUT_2_0_0_i)) - )) - (net un1_as_000_i (joined - (portRef O (instanceRef un1_as_000_0_0)) - (portRef OE (instanceRef AS_000)) - (portRef OE (instanceRef LDS_000)) - (portRef OE (instanceRef RW_000)) - (portRef OE (instanceRef UDS_000)) - )) - (net N_245_0 (joined - (portRef O (instanceRef AS_000_DMA_1_sqmuxa_i_0)) - (portRef I0 (instanceRef AS_000_DMA_1_sqmuxa_i_0_i)) - )) - (net N_229_i (joined - (portRef O (instanceRef N_229_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_1_6)) - )) - (net N_148_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_6)) - (portRef D (instanceRef SM_AMIGA_6)) - )) - (net N_227_i (joined - (portRef O (instanceRef N_227_i)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_1_0)) - )) - (net N_136_i (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_0)) - (portRef D (instanceRef SM_AMIGA_0)) - )) - (net N_226_i (joined - (portRef O (instanceRef N_226_i)) - (portRef I0 (instanceRef DS_000_DMA_2_sqmuxa_i_0_1)) - )) - (net N_246_0 (joined - (portRef O (instanceRef DS_000_DMA_2_sqmuxa_i_0)) - (portRef I0 (instanceRef DS_000_DMA_2_sqmuxa_i_0_i)) - )) - (net N_332_i (joined - (portRef O (instanceRef N_332_i)) - (portRef I0 (instanceRef pos_clk_DS_000_DMA_4_f0_0_0)) - )) - (net (rename pos_clk_DS_000_DMA_4_0 "pos_clk.DS_000_DMA_4_0") (joined - (portRef O (instanceRef pos_clk_DS_000_DMA_4_f0_0_0)) - (portRef I0 (instanceRef pos_clk_DS_000_DMA_4_f0_0_0_i)) - )) - (net N_48_0 (joined - (portRef O (instanceRef AS_030_D0_0_0_0)) - (portRef I0 (instanceRef AS_030_D0_0_0_0_i)) - )) - (net (rename pos_clk_RW_000_DMA_3_0 "pos_clk.RW_000_DMA_3_0") (joined - (portRef O (instanceRef pos_clk_RW_000_DMA_3_0_0)) - (portRef I0 (instanceRef pos_clk_RW_000_DMA_3_0_0_i)) - )) - (net N_218_i (joined - (portRef O (instanceRef N_218_i)) - (portRef I0 (instanceRef CLK_030_H_2_i_0_1)) - )) - (net N_249_i (joined - (portRef O (instanceRef CLK_030_H_2_i_0)) - (portRef D (instanceRef CLK_030_H)) - )) - (net N_57_i (joined - (portRef O (instanceRef pos_clk_CYCLE_DMA_5_1_i_0)) - (portRef D (instanceRef CYCLE_DMA_1)) - )) - (net un10_ciin_i (joined - (portRef O (instanceRef un10_ciin_i)) - (portRef I1 (instanceRef un13_ciin_i_0_0)) - )) - (net N_62_0 (joined - (portRef O (instanceRef un13_ciin_i_0_0)) - (portRef I0 (instanceRef un13_ciin_i_0_0_i)) - )) - (net N_215_i (joined - (portRef O (instanceRef N_215_i)) - (portRef I0 (instanceRef un10_amiga_bus_enable_high_0_0)) - )) - (net N_216_i (joined - (portRef O (instanceRef N_216_i)) - (portRef I1 (instanceRef un10_amiga_bus_enable_high_0_0)) - )) - (net un10_amiga_bus_enable_high_i (joined - (portRef O (instanceRef un10_amiga_bus_enable_high_0_0)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_HIGH)) - )) - (net N_214_i (joined - (portRef O (instanceRef N_214_i)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_i)) - )) - (net N_310_0 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_i)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_i_i)) - )) - (net N_24_i (joined - (portRef O (instanceRef N_24_i)) - (portRef I0 (instanceRef IPL_030_1_2)) - )) - (net N_33_0 (joined - (portRef O (instanceRef IPL_030_1_2)) - (portRef I0 (instanceRef IPL_030_1_i_2)) - )) - (net N_23_i (joined - (portRef O (instanceRef N_23_i)) - (portRef I0 (instanceRef IPL_030_1_1)) - )) - (net N_32_0 (joined - (portRef O (instanceRef IPL_030_1_1)) - (portRef I0 (instanceRef IPL_030_1_i_1)) - )) - (net N_22_i (joined - (portRef O (instanceRef N_22_i)) - (portRef I0 (instanceRef IPL_030_1_0)) - )) - (net N_31_0 (joined - (portRef O (instanceRef IPL_030_1_0)) - (portRef I0 (instanceRef IPL_030_1_i_0)) + (net (rename pos_clk_un15_bgack_030_int_i "pos_clk.un15_bgack_030_int_i") (joined + (portRef O (instanceRef G_111)) + (portRef I1 (instanceRef pos_clk_un1_bgack_030_int)) + (portRef I0 (instanceRef G_111_i)) )) (net N_3_i (joined (portRef O (instanceRef N_3_i)) (portRef I0 (instanceRef DS_000_DMA_1)) )) - (net N_45_0 (joined + (net N_43_0 (joined (portRef O (instanceRef DS_000_DMA_1)) (portRef I0 (instanceRef DS_000_DMA_1_i)) )) @@ -3533,329 +3382,583 @@ (portRef O (instanceRef N_4_i)) (portRef I0 (instanceRef AS_000_DMA_1)) )) - (net N_44_0 (joined + (net N_42_0 (joined (portRef O (instanceRef AS_000_DMA_1)) (portRef I0 (instanceRef AS_000_DMA_1_i)) )) - (net N_15_i (joined - (portRef O (instanceRef N_15_i)) - (portRef I0 (instanceRef AS_030_000_SYNC_1)) + (net un6_amiga_bus_data_dir_i (joined + (portRef O (instanceRef un6_amiga_bus_data_dir_i)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_iv)) )) - (net N_40_0 (joined - (portRef O (instanceRef AS_030_000_SYNC_1)) - (portRef I0 (instanceRef AS_030_000_SYNC_1_i)) + (net un12_amiga_bus_data_dir_m_i (joined + (portRef O (instanceRef un12_amiga_bus_data_dir_m_i)) + (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_iv)) )) - (net N_19_i (joined - (portRef O (instanceRef N_19_i)) - (portRef I0 (instanceRef RW_000_DMA_1)) + (net AMIGA_BUS_DATA_DIR_c_0 (joined + (portRef O (instanceRef AMIGA_BUS_DATA_DIR_iv)) + (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_iv_i)) )) - (net N_36_0 (joined - (portRef O (instanceRef RW_000_DMA_1)) - (portRef I0 (instanceRef RW_000_DMA_1_i)) - )) - (net N_20_i (joined - (portRef O (instanceRef N_20_i)) - (portRef I0 (instanceRef A0_DMA_1)) - )) - (net N_35_0 (joined - (portRef O (instanceRef A0_DMA_1)) - (portRef I0 (instanceRef A0_DMA_1_i)) - )) - (net N_25_i (joined - (portRef O (instanceRef N_25_i)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1)) - )) - (net N_30_0 (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1_i)) - )) - (net N_26_i (joined - (portRef O (instanceRef N_26_i)) + (net N_22_i (joined + (portRef O (instanceRef N_22_i)) (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1)) )) - (net N_29_0 (joined + (net N_31_0 (joined (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1)) (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_1_i)) )) - (net N_27_i (joined - (portRef O (instanceRef N_27_i)) - (portRef I0 (instanceRef BG_000_1)) + (net N_21_i (joined + (portRef O (instanceRef N_21_i)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1)) + )) + (net N_32_0 (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_1_i)) + )) + (net N_19_i (joined + (portRef O (instanceRef N_19_i)) + (portRef I0 (instanceRef A0_DMA_1)) + )) + (net N_34_0 (joined + (portRef O (instanceRef A0_DMA_1)) + (portRef I0 (instanceRef A0_DMA_1_i)) + )) + (net N_18_i (joined + (portRef O (instanceRef N_18_i)) + (portRef I0 (instanceRef RW_000_DMA_1)) + )) + (net N_35_0 (joined + (portRef O (instanceRef RW_000_DMA_1)) + (portRef I0 (instanceRef RW_000_DMA_1_i)) + )) + (net (rename pos_clk_un5_bgack_030_int_d_i "pos_clk.un5_bgack_030_int_d_i") (joined + (portRef O (instanceRef pos_clk_un5_bgack_030_int_d)) + (portRef I1 (instanceRef SIZE_DMA_3_sqmuxa)) + (portRef I0 (instanceRef pos_clk_un5_bgack_030_int_d_i_0)) + )) + (net (rename pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_0 "pos_clk.AMIGA_BUS_ENABLE_DMA_HIGH_3_0") (joined + (portRef O (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3)) + (portRef I0 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i)) + )) + (net (rename pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_0 "pos_clk.AMIGA_BUS_ENABLE_DMA_LOW_3_0") (joined + (portRef O (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3)) + (portRef I0 (instanceRef pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i)) + )) + (net (rename pos_clk_RW_000_DMA_3_0 "pos_clk.RW_000_DMA_3_0") (joined + (portRef O (instanceRef pos_clk_RW_000_DMA_3)) + (portRef I0 (instanceRef pos_clk_RW_000_DMA_3_i)) + )) + (net UDS_000_c_i (joined + (portRef O (instanceRef UDS_000_c_i)) + (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_o2_0)) + )) + (net LDS_000_c_i (joined + (portRef O (instanceRef LDS_000_c_i)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_o2_0)) + )) + (net N_86_i (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_o2_0)) + (portRef I1 (instanceRef pos_clk_SIZE_DMA_6_0_0_a2_1)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_o2_i_0)) + )) + (net N_129_i (joined + (portRef O (instanceRef N_129_i)) + (portRef I0 (instanceRef un11_amiga_bus_enable_high_0)) + )) + (net N_130_i (joined + (portRef O (instanceRef N_130_i)) + (portRef I1 (instanceRef un11_amiga_bus_enable_high_0)) + )) + (net un11_amiga_bus_enable_high_i (joined + (portRef O (instanceRef un11_amiga_bus_enable_high_0)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_HIGH)) + )) + (net N_117_i (joined + (portRef O (instanceRef N_117_i)) + (portRef I0 (instanceRef AMIGA_DS_0_0)) + )) + (net N_46_0 (joined + (portRef O (instanceRef AMIGA_DS_0_0)) + (portRef I0 (instanceRef AMIGA_DS_0_0_i)) + )) + (net N_107_i (joined + (portRef O (instanceRef N_107_i)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_0)) + )) + (net (rename pos_clk_SIZE_DMA_6_0_0 "pos_clk.SIZE_DMA_6_0[0]") (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_0)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_i_0)) + )) + (net N_106_i (joined + (portRef O (instanceRef N_106_i)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_1)) + )) + (net (rename pos_clk_SIZE_DMA_6_0_1 "pos_clk.SIZE_DMA_6_0[1]") (joined + (portRef O (instanceRef pos_clk_SIZE_DMA_6_0_0_1)) + (portRef I0 (instanceRef pos_clk_SIZE_DMA_6_0_0_i_1)) + )) + (net N_16_i (joined + (portRef O (instanceRef N_16_i)) + (portRef I0 (instanceRef un5_e_i_1)) + )) + (net N_254_i (joined + (portRef O (instanceRef N_254_i)) + (portRef I1 (instanceRef un5_e_i_1)) + )) + (net N_263_i (joined + (portRef O (instanceRef N_263_i)) + (portRef I1 (instanceRef cpu_est_2_i_0_3)) + (portRef I1 (instanceRef un5_e_i)) + )) + (net N_250_i (joined + (portRef O (instanceRef un5_e_i)) + (portRef I0 (instanceRef E)) + )) + (net N_256_i (joined + (portRef O (instanceRef N_256_i)) + (portRef I1 (instanceRef cpu_est_2_i_0_1_3)) + )) + (net N_189_i (joined + (portRef O (instanceRef cpu_est_2_i_0_3)) + (portRef I0 (instanceRef cpu_est_0_3__n)) + )) + (net N_101_i (joined + (portRef O (instanceRef N_101_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_1_0)) + )) + (net N_136_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_0)) + (portRef D (instanceRef SM_AMIGA_0)) + )) + (net N_103_i (joined + (portRef O (instanceRef N_103_i)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_1_0)) + )) + (net N_104_i (joined + (portRef O (instanceRef N_104_i)) + (portRef I0 (instanceRef un1_SM_AMIGA_0_o4_0)) + (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_1_0)) + )) + (net N_152_i (joined + (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0)) + (portRef D (instanceRef SM_AMIGA_i_7)) + )) + (net N_105_i (joined + (portRef O (instanceRef N_105_i)) + (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_1_5)) + )) + (net N_146_i (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_5)) + (portRef D (instanceRef SM_AMIGA_5)) + )) + (net N_115_i (joined + (portRef O (instanceRef N_115_i)) + (portRef I0 (instanceRef RST_DLY_e0_i_1)) + )) + (net N_116_i (joined + (portRef O (instanceRef N_116_i)) + (portRef I1 (instanceRef RST_DLY_e0_i_1)) + )) + (net N_267_i (joined + (portRef O (instanceRef RST_DLY_e0_i)) + (portRef D (instanceRef RST_DLY_0)) + )) + (net N_131_i (joined + (portRef O (instanceRef N_131_i)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i)) + )) + (net N_277_i (joined + (portRef O (instanceRef N_277_i)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i)) + )) + (net N_64_0 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d0_i)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_i)) + )) + (net N_91_0 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d0_i_o2)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_o2_i)) + )) + (net N_159_0 (joined + (portRef O (instanceRef un1_SM_AMIGA_0_o4_0)) + (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0)) + (portRef I0 (instanceRef pos_clk_RW_000_INT_5)) + )) + (net N_85_i (joined + (portRef O (instanceRef pos_clk_un15_clk_000_d_i_i_o2)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_o3_6)) + (portRef I0 (instanceRef pos_clk_un15_clk_000_d_i_i_o2_i)) + )) + (net un1_SM_AMIGA_0_sqmuxa_1_0 (joined + (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0)) + (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_1_0_i)) + )) + (net RW_c_i (joined + (portRef O (instanceRef RW_c_i)) + (portRef I1 (instanceRef pos_clk_RW_000_INT_5)) + )) + (net (rename pos_clk_RW_000_INT_5_0 "pos_clk.RW_000_INT_5_0") (joined + (portRef O (instanceRef pos_clk_RW_000_INT_5)) + (portRef I0 (instanceRef pos_clk_RW_000_INT_5_i)) + )) + (net (rename CLK_000_D_i_3 "CLK_000_D_i[3]") (joined + (portRef O (instanceRef CLK_000_D_i_3)) + (portRef I1 (instanceRef pos_clk_un15_clk_000_d_i_i_o2_2)) + )) + (net N_25_i (joined + (portRef O (instanceRef N_25_i)) + (portRef I0 (instanceRef IPL_030_1_1)) )) (net N_28_0 (joined - (portRef O (instanceRef BG_000_1)) - (portRef I0 (instanceRef BG_000_1_i)) + (portRef O (instanceRef IPL_030_1_1)) + (portRef I0 (instanceRef IPL_030_1_i_1)) )) - (net BG_030_c_i (joined - (portRef O (instanceRef BG_030_c_i)) - (portRef I0 (instanceRef pos_clk_un9_bg_030)) + (net N_24_i (joined + (portRef O (instanceRef N_24_i)) + (portRef I0 (instanceRef IPL_030_1_0)) )) - (net (rename pos_clk_un9_bg_030_0 "pos_clk.un9_bg_030_0") (joined - (portRef O (instanceRef pos_clk_un9_bg_030)) - (portRef I0 (instanceRef pos_clk_un9_bg_030_i)) + (net N_27_0 (joined + (portRef O (instanceRef IPL_030_1_0)) + (portRef I0 (instanceRef IPL_030_1_i_0)) )) - (net N_235_i_1 (joined - (portRef O (instanceRef RST_DLY_e1_i_0_1)) - (portRef I0 (instanceRef RST_DLY_e1_i_0)) + (net (rename IPL_c_i_1 "IPL_c_i[1]") (joined + (portRef O (instanceRef IPL_c_i_1)) + (portRef I0 (instanceRef IPL_D0_0_1)) )) - (net N_235_i_2 (joined - (portRef O (instanceRef RST_DLY_e1_i_0_2)) - (portRef I1 (instanceRef RST_DLY_e1_i_0)) + (net N_50_0 (joined + (portRef O (instanceRef IPL_D0_0_1)) + (portRef I0 (instanceRef IPL_D0_0_i_1)) )) - (net N_156_i_1 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_i_o2_1)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_i_o2_4)) + (net (rename IPL_c_i_0 "IPL_c_i[0]") (joined + (portRef O (instanceRef IPL_c_i_0)) + (portRef I0 (instanceRef IPL_D0_0_0)) )) - (net N_156_i_2 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_i_o2_2)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_i_o2_4)) + (net N_49_0 (joined + (portRef O (instanceRef IPL_D0_0_0)) + (portRef I0 (instanceRef IPL_D0_0_i_0)) )) - (net N_156_i_3 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_i_o2_3)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_i_o2)) + (net N_14_i (joined + (portRef O (instanceRef N_14_i)) + (portRef I0 (instanceRef AS_030_000_SYNC_1)) )) - (net N_156_i_4 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_i_o2_4)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_i_o2)) + (net N_39_0 (joined + (portRef O (instanceRef AS_030_000_SYNC_1)) + (portRef I0 (instanceRef AS_030_000_SYNC_1_i)) + )) + (net N_15_i (joined + (portRef O (instanceRef N_15_i)) + (portRef I0 (instanceRef RW_000_INT_1)) + )) + (net N_38_0 (joined + (portRef O (instanceRef RW_000_INT_1)) + (portRef I0 (instanceRef RW_000_INT_1_i)) + )) + (net N_91_0_1 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d0_i_o2_1)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_o2_3)) + )) + (net N_91_0_2 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d0_i_o2_2)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_o2_3)) + )) + (net N_91_0_3 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d0_i_o2_3)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_o2)) + )) + (net N_265_i_1 (joined + (portRef O (instanceRef RST_DLY_e2_i_1)) + (portRef I0 (instanceRef RST_DLY_e2_i)) + )) + (net N_266_i_1 (joined + (portRef O (instanceRef RST_DLY_e1_i_1)) + (portRef I0 (instanceRef RST_DLY_e1_i)) + )) + (net N_266_i_2 (joined + (portRef O (instanceRef RST_DLY_e1_i_2)) + (portRef I1 (instanceRef RST_DLY_e1_i)) + )) + (net N_138_i_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_1_1)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_1)) + )) + (net N_148_i_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_1_6)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_6)) + )) + (net N_144_i_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_1_4)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_4)) + )) + (net N_142_i_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_1_3)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_3)) + )) + (net N_140_i_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_1_2)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_2)) )) (net (rename pos_clk_un10_sm_amiga_i_1 "pos_clk.un10_sm_amiga_i_1") (joined (portRef O (instanceRef pos_clk_un10_sm_amiga_1)) (portRef I0 (instanceRef pos_clk_un10_sm_amiga)) )) - (net N_176_i_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_o2_0_1_3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_o2_0_3)) + (net N_85_i_1 (joined + (portRef O (instanceRef pos_clk_un15_clk_000_d_i_i_o2_1)) + (portRef I0 (instanceRef pos_clk_un15_clk_000_d_i_i_o2)) + )) + (net N_85_i_2 (joined + (portRef O (instanceRef pos_clk_un15_clk_000_d_i_i_o2_2)) + (portRef I1 (instanceRef pos_clk_un15_clk_000_d_i_i_o2)) + )) + (net N_277_1 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d0_i_a2_0_1)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_4)) + )) + (net N_277_2 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d0_i_a2_0_2)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_4)) + )) + (net N_277_3 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d0_i_a2_0_3)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_a2_0_5)) + )) + (net N_277_4 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d0_i_a2_0_4)) + (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_a2_0)) + )) + (net N_277_5 (joined + (portRef O (instanceRef pos_clk_un34_as_030_d0_i_a2_0_5)) + (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_a2_0)) )) (net un10_ciin_1 (joined - (portRef O (instanceRef un13_ciin_i_0_0_a3_1)) - (portRef I0 (instanceRef un13_ciin_i_0_0_a3_7)) + (portRef O (instanceRef un10_ciin_1)) + (portRef I0 (instanceRef un10_ciin_7)) )) (net un10_ciin_2 (joined - (portRef O (instanceRef un13_ciin_i_0_0_a3_2)) - (portRef I1 (instanceRef un13_ciin_i_0_0_a3_7)) + (portRef O (instanceRef un10_ciin_2)) + (portRef I1 (instanceRef un10_ciin_7)) )) (net un10_ciin_3 (joined - (portRef O (instanceRef un13_ciin_i_0_0_a3_3)) - (portRef I0 (instanceRef un13_ciin_i_0_0_a3_8)) + (portRef O (instanceRef un10_ciin_3)) + (portRef I0 (instanceRef un10_ciin_8)) )) (net un10_ciin_4 (joined - (portRef O (instanceRef un13_ciin_i_0_0_a3_4)) - (portRef I1 (instanceRef un13_ciin_i_0_0_a3_8)) + (portRef O (instanceRef un10_ciin_4)) + (portRef I1 (instanceRef un10_ciin_8)) )) (net un10_ciin_5 (joined - (portRef O (instanceRef un13_ciin_i_0_0_a3_5)) - (portRef I0 (instanceRef un13_ciin_i_0_0_a3_9)) + (portRef O (instanceRef un10_ciin_5)) + (portRef I0 (instanceRef un10_ciin_9)) )) (net un10_ciin_6 (joined - (portRef O (instanceRef un13_ciin_i_0_0_a3_6)) - (portRef I1 (instanceRef un13_ciin_i_0_0_a3_9)) + (portRef O (instanceRef un10_ciin_6)) + (portRef I1 (instanceRef un10_ciin_9)) )) (net un10_ciin_7 (joined - (portRef O (instanceRef un13_ciin_i_0_0_a3_7)) - (portRef I0 (instanceRef un13_ciin_i_0_0_a3_10)) + (portRef O (instanceRef un10_ciin_7)) + (portRef I0 (instanceRef un10_ciin_10)) )) (net un10_ciin_8 (joined - (portRef O (instanceRef un13_ciin_i_0_0_a3_8)) - (portRef I1 (instanceRef un13_ciin_i_0_0_a3_10)) + (portRef O (instanceRef un10_ciin_8)) + (portRef I1 (instanceRef un10_ciin_10)) )) (net un10_ciin_9 (joined - (portRef O (instanceRef un13_ciin_i_0_0_a3_9)) - (portRef I0 (instanceRef un13_ciin_i_0_0_a3_11)) + (portRef O (instanceRef un10_ciin_9)) + (portRef I0 (instanceRef un10_ciin_11)) )) (net un10_ciin_10 (joined - (portRef O (instanceRef un13_ciin_i_0_0_a3_10)) - (portRef I0 (instanceRef un13_ciin_i_0_0_a3)) + (portRef O (instanceRef un10_ciin_10)) + (portRef I0 (instanceRef un10_ciin)) )) (net un10_ciin_11 (joined - (portRef O (instanceRef un13_ciin_i_0_0_a3_11)) - (portRef I1 (instanceRef un13_ciin_i_0_0_a3)) + (portRef O (instanceRef un10_ciin_11)) + (portRef I1 (instanceRef un10_ciin)) )) - (net N_163_i_1 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0_o2_1_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0_o2_0)) + (net un6_amiga_bus_data_dir_1 (joined + (portRef O (instanceRef un6_amiga_bus_data_dir_1)) + (portRef I0 (instanceRef un6_amiga_bus_data_dir)) )) - (net N_163_i_2 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0_o2_2_0)) - (portRef I1 (instanceRef SM_AMIGA_nss_i_i_0_0_o2_0)) + (net un6_amiga_bus_data_dir_2 (joined + (portRef O (instanceRef un6_amiga_bus_data_dir_2)) + (portRef I1 (instanceRef un6_amiga_bus_data_dir)) )) - (net (rename pos_clk_un21_bgack_030_int_i_0_0_1 "pos_clk.un21_bgack_030_int_i_0_0_1") (joined - (portRef O (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_o3_1)) - (portRef I0 (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_o3)) + (net (rename pos_clk_as_000_dma6_1 "pos_clk.as_000_dma6_1") (joined + (portRef O (instanceRef pos_clk_as_000_dma6_1)) + (portRef I0 (instanceRef pos_clk_as_000_dma6)) )) - (net (rename pos_clk_un21_bgack_030_int_i_0_0_2 "pos_clk.un21_bgack_030_int_i_0_0_2") (joined - (portRef O (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_o3_2)) - (portRef I1 (instanceRef pos_clk_un21_bgack_030_int_i_0_o3_0_o3)) + (net (rename pos_clk_as_000_dma6_2 "pos_clk.as_000_dma6_2") (joined + (portRef O (instanceRef pos_clk_as_000_dma6_2)) + (portRef I1 (instanceRef pos_clk_as_000_dma6)) )) - (net N_138_i_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_1_1)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_1)) + (net DS_000_DMA_1_sqmuxa_1 (joined + (portRef O (instanceRef DS_000_DMA_1_sqmuxa_1)) + (portRef I0 (instanceRef DS_000_DMA_1_sqmuxa)) )) - (net N_138_i_2 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_2_1)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_1)) + (net (rename pos_clk_un4_rw_000_1 "pos_clk.un4_rw_000_1") (joined + (portRef O (instanceRef pos_clk_un4_rw_000_1)) + (portRef I0 (instanceRef pos_clk_un4_rw_000)) )) - (net N_59_i_1 (joined - (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_1)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0)) + (net (rename pos_clk_un4_rw_000_2 "pos_clk.un4_rw_000_2") (joined + (portRef O (instanceRef pos_clk_un4_rw_000_2)) + (portRef I1 (instanceRef pos_clk_un4_rw_000)) )) - (net N_59_i_2 (joined - (portRef O (instanceRef pos_clk_CYCLE_DMA_5_0_i_0_2)) - (portRef I1 (instanceRef pos_clk_CYCLE_DMA_5_0_i_0)) + (net (rename pos_clk_un13_clk_out_int_1 "pos_clk.un13_clk_out_int_1") (joined + (portRef O (instanceRef pos_clk_un13_clk_out_int_1)) + (portRef I0 (instanceRef pos_clk_un13_clk_out_int)) )) - (net N_233_0_1 (joined - (portRef O (instanceRef pos_clk_un1_ipl_i_0_1)) - (portRef I0 (instanceRef pos_clk_un1_ipl_i_0)) + (net N_125_1 (joined + (portRef O (instanceRef RESET_OUT_2_0_a2_0_1)) + (portRef I0 (instanceRef RESET_OUT_2_0_a2_0)) )) - (net N_233_0_2 (joined - (portRef O (instanceRef pos_clk_un1_ipl_i_0_2)) - (portRef I1 (instanceRef pos_clk_un1_ipl_i_0)) + (net N_116_1 (joined + (portRef O (instanceRef RST_DLY_e0_i_a2_0_1)) + (portRef I0 (instanceRef RST_DLY_e0_i_a2_0)) )) - (net N_214_1 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_i_a3_1)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_i_a3_3)) + (net (rename pos_clk_un29_clk_000_ne_1_1 "pos_clk.un29_clk_000_ne_1_1") (joined + (portRef O (instanceRef pos_clk_un29_clk_000_ne_1_1)) + (portRef I0 (instanceRef pos_clk_un29_clk_000_ne_1_3)) )) - (net N_214_2 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_i_a3_2)) - (portRef I1 (instanceRef pos_clk_un34_as_030_d0_i_i_a3_3)) + (net (rename pos_clk_un29_clk_000_ne_1_2 "pos_clk.un29_clk_000_ne_1_2") (joined + (portRef O (instanceRef pos_clk_un29_clk_000_ne_1_2)) + (portRef I1 (instanceRef pos_clk_un29_clk_000_ne_1_3)) )) - (net N_214_3 (joined - (portRef O (instanceRef pos_clk_un34_as_030_d0_i_i_a3_3)) - (portRef I0 (instanceRef pos_clk_un34_as_030_d0_i_i_a3)) + (net (rename pos_clk_un29_clk_000_ne_1_3 "pos_clk.un29_clk_000_ne_1_3") (joined + (portRef O (instanceRef pos_clk_un29_clk_000_ne_1_3)) + (portRef I0 (instanceRef pos_clk_un29_clk_000_ne_1)) + )) + (net N_261_1 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_a3_1)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_a3)) + )) + (net N_261_2 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_a3_2)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_a3)) + )) + (net N_262_1 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_a3_0_1)) + (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_a3_0)) + )) + (net N_262_2 (joined + (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_a3_0_2)) + (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_a3_0)) + )) + (net DS_000_ENABLE_0_sqmuxa_1_1 (joined + (portRef O (instanceRef DS_000_ENABLE_0_sqmuxa_1_1)) + (portRef I0 (instanceRef DS_000_ENABLE_0_sqmuxa_1)) + )) + (net N_259_1 (joined + (portRef O (instanceRef cpu_est_2_0_0_a3_0_1_1)) + (portRef I0 (instanceRef cpu_est_2_0_0_a3_0_1)) + )) + (net N_250_i_1 (joined + (portRef O (instanceRef un5_e_i_1)) + (portRef I0 (instanceRef un5_e_i)) + )) + (net N_189_i_1 (joined + (portRef O (instanceRef cpu_est_2_i_0_1_3)) + (portRef I0 (instanceRef cpu_est_2_i_0_3)) + )) + (net (rename pos_clk_un6_bg_030_1 "pos_clk.un6_bg_030_1") (joined + (portRef O (instanceRef pos_clk_un6_bg_030_0_a2_1)) + (portRef I0 (instanceRef pos_clk_un6_bg_030_0_a2)) + )) + (net N_108_1 (joined + (portRef O (instanceRef RST_DLY_e2_i_a2_1)) + (portRef I0 (instanceRef RST_DLY_e2_i_a2)) + )) + (net N_114_1 (joined + (portRef O (instanceRef RST_DLY_e1_i_a2_1_1)) + (portRef I0 (instanceRef RST_DLY_e1_i_a2_1)) + )) + (net un21_berr_1 (joined + (portRef O (instanceRef un21_berr_0_a2_1)) + (portRef I0 (instanceRef un21_berr_0_a2)) )) (net un21_fpu_cs_1 (joined - (portRef O (instanceRef un21_fpu_cs_0_a3_0_a3_1)) - (portRef I0 (instanceRef un21_fpu_cs_0_a3_0_a3)) + (portRef O (instanceRef un21_fpu_cs_0_a2_1)) + (portRef I0 (instanceRef un21_fpu_cs_0_a2)) )) - (net un21_berr_1_0 (joined - (portRef O (instanceRef un21_berr_0_a3_0_a3_1_0)) - (portRef I0 (instanceRef un21_berr_0_a3_0_a3)) - )) - (net N_182_0_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_i_i_o2_1_2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_i_o2_2)) - )) - (net N_234_i_1 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_1)) - (portRef I0 (instanceRef RST_DLY_e2_i_0)) - )) - (net N_234_i_2 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_2)) - (portRef I1 (instanceRef RST_DLY_e2_i_0)) - )) - (net N_206_1 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_1)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0)) - )) - (net N_206_2 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0_2)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_0)) - )) - (net N_205_1 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_1)) - (portRef I0 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3)) - )) - (net N_205_2 (joined - (portRef O (instanceRef pos_clk_un9_clk_000_pe_0_0_a3_2)) - (portRef I1 (instanceRef pos_clk_un9_clk_000_pe_0_0_a3)) - )) - (net N_352_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_1_3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_a2_3)) - )) - (net N_352_2 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_a2_2_3)) - (portRef I1 (instanceRef SM_AMIGA_srsts_i_0_0_a2_3)) - )) - (net N_231_i_1 (joined - (portRef O (instanceRef pos_clk_un6_bg_030_i_0_1)) - (portRef I0 (instanceRef pos_clk_un6_bg_030_i_0)) - )) - (net N_152_i_1 (joined - (portRef O (instanceRef SM_AMIGA_nss_i_i_0_0_1_0)) - (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0_0)) - )) - (net N_144_i_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_1_4)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_4)) - )) - (net N_142_i_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_1_3)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_3)) - )) - (net N_312_i_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_i_i_1_2)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_i_i_2)) - )) - (net N_236_i_1 (joined - (portRef O (instanceRef RST_DLY_e0_i_0_1)) - (portRef I0 (instanceRef RST_DLY_e0_i_0)) - )) - (net N_148_i_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_1_6)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_6)) + (net N_130_1 (joined + (portRef O (instanceRef un11_amiga_bus_enable_high_0_a2_0_1)) + (portRef I0 (instanceRef un11_amiga_bus_enable_high_0_a2_0)) )) (net N_136_i_1 (joined - (portRef O (instanceRef SM_AMIGA_srsts_i_0_0_1_0)) - (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0_0)) + (portRef O (instanceRef SM_AMIGA_srsts_i_0_1_0)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_0)) )) - (net N_246_0_1 (joined - (portRef O (instanceRef DS_000_DMA_2_sqmuxa_i_0_1)) - (portRef I0 (instanceRef DS_000_DMA_2_sqmuxa_i_0)) + (net N_152_i_1 (joined + (portRef O (instanceRef SM_AMIGA_nss_i_i_0_1_0)) + (portRef I0 (instanceRef SM_AMIGA_nss_i_i_0_0)) )) - (net N_249_i_1 (joined - (portRef O (instanceRef CLK_030_H_2_i_0_1)) - (portRef I0 (instanceRef CLK_030_H_2_i_0)) + (net N_146_i_1 (joined + (portRef O (instanceRef SM_AMIGA_srsts_i_0_1_5)) + (portRef I0 (instanceRef SM_AMIGA_srsts_i_0_5)) )) - (net N_57_i_1 (joined - (portRef O (instanceRef pos_clk_CYCLE_DMA_5_1_i_0_1)) - (portRef I0 (instanceRef pos_clk_CYCLE_DMA_5_1_i_0)) + (net N_267_i_1 (joined + (portRef O (instanceRef RST_DLY_e0_i_1)) + (portRef I0 (instanceRef RST_DLY_e0_i)) )) - (net N_338_1 (joined - (portRef O (instanceRef RESET_OUT_2_0_0_a3_0_1)) - (portRef I0 (instanceRef RESET_OUT_2_0_0_a3_0)) + (net (rename pos_clk_ipl_1 "pos_clk.ipl_1") (joined + (portRef O (instanceRef G_125_1)) + (portRef I0 (instanceRef G_125)) )) - (net N_224_1 (joined - (portRef O (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a3_0_1)) - (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_iv_0_0_a3_0)) + (net (rename BG_000_0_un3 "BG_000_0.un3") (joined + (portRef O (instanceRef BG_000_0_r)) + (portRef I1 (instanceRef BG_000_0_n)) )) - (net N_216_1 (joined - (portRef O (instanceRef un10_amiga_bus_enable_high_0_0_a3_0_1)) - (portRef I0 (instanceRef un10_amiga_bus_enable_high_0_0_a3_0)) + (net (rename BG_000_0_un1 "BG_000_0.un1") (joined + (portRef O (instanceRef BG_000_0_m)) + (portRef I0 (instanceRef BG_000_0_p)) )) - (net N_209_1 (joined - (portRef O (instanceRef cpu_est_2_0_0_a3_1_1_1)) - (portRef I0 (instanceRef cpu_est_2_0_0_a3_1_1)) + (net (rename BG_000_0_un0 "BG_000_0.un0") (joined + (portRef O (instanceRef BG_000_0_n)) + (portRef I1 (instanceRef BG_000_0_p)) )) - (net N_203_1 (joined - (portRef O (instanceRef RST_DLY_e1_i_0_a3_1_1)) - (portRef I0 (instanceRef RST_DLY_e1_i_0_a3_1)) + (net (rename UDS_000_INT_0_un3 "UDS_000_INT_0.un3") (joined + (portRef O (instanceRef UDS_000_INT_0_r)) + (portRef I1 (instanceRef UDS_000_INT_0_n)) )) - (net N_196_1 (joined - (portRef O (instanceRef RST_DLY_e2_i_0_a3_1_0)) - (portRef I0 (instanceRef RST_DLY_e2_i_0_a3)) + (net (rename UDS_000_INT_0_un1 "UDS_000_INT_0.un1") (joined + (portRef O (instanceRef UDS_000_INT_0_m)) + (portRef I0 (instanceRef UDS_000_INT_0_p)) )) - (net (rename cpu_est_0_3__un3 "cpu_est_0_3_.un3") (joined - (portRef O (instanceRef cpu_est_0_3__r)) - (portRef I1 (instanceRef cpu_est_0_3__n)) + (net (rename UDS_000_INT_0_un0 "UDS_000_INT_0.un0") (joined + (portRef O (instanceRef UDS_000_INT_0_n)) + (portRef I1 (instanceRef UDS_000_INT_0_p)) )) - (net (rename cpu_est_0_3__un1 "cpu_est_0_3_.un1") (joined - (portRef O (instanceRef cpu_est_0_3__m)) - (portRef I0 (instanceRef cpu_est_0_3__p)) + (net (rename LDS_000_INT_0_un3 "LDS_000_INT_0.un3") (joined + (portRef O (instanceRef LDS_000_INT_0_r)) + (portRef I1 (instanceRef LDS_000_INT_0_n)) )) - (net (rename cpu_est_0_3__un0 "cpu_est_0_3_.un0") (joined - (portRef O (instanceRef cpu_est_0_3__n)) - (portRef I1 (instanceRef cpu_est_0_3__p)) + (net (rename LDS_000_INT_0_un1 "LDS_000_INT_0.un1") (joined + (portRef O (instanceRef LDS_000_INT_0_m)) + (portRef I0 (instanceRef LDS_000_INT_0_p)) )) - (net (rename RW_000_INT_0_un3 "RW_000_INT_0.un3") (joined - (portRef O (instanceRef RW_000_INT_0_r)) - (portRef I1 (instanceRef RW_000_INT_0_n)) + (net (rename LDS_000_INT_0_un0 "LDS_000_INT_0.un0") (joined + (portRef O (instanceRef LDS_000_INT_0_n)) + (portRef I1 (instanceRef LDS_000_INT_0_p)) )) - (net (rename RW_000_INT_0_un1 "RW_000_INT_0.un1") (joined - (portRef O (instanceRef RW_000_INT_0_m)) - (portRef I0 (instanceRef RW_000_INT_0_p)) + (net (rename DS_000_ENABLE_0_un3 "DS_000_ENABLE_0.un3") (joined + (portRef O (instanceRef DS_000_ENABLE_0_r)) + (portRef I1 (instanceRef DS_000_ENABLE_0_n)) )) - (net (rename RW_000_INT_0_un0 "RW_000_INT_0.un0") (joined - (portRef O (instanceRef RW_000_INT_0_n)) - (portRef I1 (instanceRef RW_000_INT_0_p)) + (net (rename DS_000_ENABLE_0_un1 "DS_000_ENABLE_0.un1") (joined + (portRef O (instanceRef DS_000_ENABLE_0_m)) + (portRef I0 (instanceRef DS_000_ENABLE_0_p)) + )) + (net (rename DS_000_ENABLE_0_un0 "DS_000_ENABLE_0.un0") (joined + (portRef O (instanceRef DS_000_ENABLE_0_n)) + (portRef I1 (instanceRef DS_000_ENABLE_0_p)) + )) + (net (rename IPL_030_0_2__un3 "IPL_030_0_2_.un3") (joined + (portRef O (instanceRef IPL_030_0_2__r)) + (portRef I1 (instanceRef IPL_030_0_2__n)) + )) + (net (rename IPL_030_0_2__un1 "IPL_030_0_2_.un1") (joined + (portRef O (instanceRef IPL_030_0_2__m)) + (portRef I0 (instanceRef IPL_030_0_2__p)) + )) + (net (rename IPL_030_0_2__un0 "IPL_030_0_2_.un0") (joined + (portRef O (instanceRef IPL_030_0_2__n)) + (portRef I1 (instanceRef IPL_030_0_2__p)) )) (net (rename VMA_INT_0_un3 "VMA_INT_0.un3") (joined (portRef O (instanceRef VMA_INT_0_r)) @@ -3893,29 +3996,29 @@ (portRef O (instanceRef cpu_est_0_2__n)) (portRef I1 (instanceRef cpu_est_0_2__p)) )) - (net (rename UDS_000_INT_0_un3 "UDS_000_INT_0.un3") (joined - (portRef O (instanceRef UDS_000_INT_0_r)) - (portRef I1 (instanceRef UDS_000_INT_0_n)) + (net (rename cpu_est_0_3__un3 "cpu_est_0_3_.un3") (joined + (portRef O (instanceRef cpu_est_0_3__r)) + (portRef I1 (instanceRef cpu_est_0_3__n)) )) - (net (rename UDS_000_INT_0_un1 "UDS_000_INT_0.un1") (joined - (portRef O (instanceRef UDS_000_INT_0_m)) - (portRef I0 (instanceRef UDS_000_INT_0_p)) + (net (rename cpu_est_0_3__un1 "cpu_est_0_3_.un1") (joined + (portRef O (instanceRef cpu_est_0_3__m)) + (portRef I0 (instanceRef cpu_est_0_3__p)) )) - (net (rename UDS_000_INT_0_un0 "UDS_000_INT_0.un0") (joined - (portRef O (instanceRef UDS_000_INT_0_n)) - (portRef I1 (instanceRef UDS_000_INT_0_p)) + (net (rename cpu_est_0_3__un0 "cpu_est_0_3_.un0") (joined + (portRef O (instanceRef cpu_est_0_3__n)) + (portRef I1 (instanceRef cpu_est_0_3__p)) )) - (net (rename LDS_000_INT_0_un3 "LDS_000_INT_0.un3") (joined - (portRef O (instanceRef LDS_000_INT_0_r)) - (portRef I1 (instanceRef LDS_000_INT_0_n)) + (net (rename pos_clk_un31_clk_000_ne_1_i_m2_un3 "pos_clk.un31_clk_000_ne_1_i_m2.un3") (joined + (portRef O (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_r)) + (portRef I1 (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_n)) )) - (net (rename LDS_000_INT_0_un1 "LDS_000_INT_0.un1") (joined - (portRef O (instanceRef LDS_000_INT_0_m)) - (portRef I0 (instanceRef LDS_000_INT_0_p)) + (net (rename pos_clk_un31_clk_000_ne_1_i_m2_un1 "pos_clk.un31_clk_000_ne_1_i_m2.un1") (joined + (portRef O (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_m)) + (portRef I0 (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_p)) )) - (net (rename LDS_000_INT_0_un0 "LDS_000_INT_0.un0") (joined - (portRef O (instanceRef LDS_000_INT_0_n)) - (portRef I1 (instanceRef LDS_000_INT_0_p)) + (net (rename pos_clk_un31_clk_000_ne_1_i_m2_un0 "pos_clk.un31_clk_000_ne_1_i_m2.un0") (joined + (portRef O (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_n)) + (portRef I1 (instanceRef pos_clk_un31_clk_000_ne_1_i_m2_p)) )) (net (rename BGACK_030_INT_0_un3 "BGACK_030_INT_0.un3") (joined (portRef O (instanceRef BGACK_030_INT_0_r)) @@ -3929,126 +4032,6 @@ (portRef O (instanceRef BGACK_030_INT_0_n)) (portRef I1 (instanceRef BGACK_030_INT_0_p)) )) - (net (rename DS_000_ENABLE_0_un3 "DS_000_ENABLE_0.un3") (joined - (portRef O (instanceRef DS_000_ENABLE_0_r)) - (portRef I1 (instanceRef DS_000_ENABLE_0_n)) - )) - (net (rename DS_000_ENABLE_0_un1 "DS_000_ENABLE_0.un1") (joined - (portRef O (instanceRef DS_000_ENABLE_0_m)) - (portRef I0 (instanceRef DS_000_ENABLE_0_p)) - )) - (net (rename DS_000_ENABLE_0_un0 "DS_000_ENABLE_0.un0") (joined - (portRef O (instanceRef DS_000_ENABLE_0_n)) - (portRef I1 (instanceRef DS_000_ENABLE_0_p)) - )) - (net (rename SIZE_DMA_0_0__un3 "SIZE_DMA_0_0_.un3") (joined - (portRef O (instanceRef SIZE_DMA_0_0__r)) - (portRef I1 (instanceRef SIZE_DMA_0_0__n)) - )) - (net (rename SIZE_DMA_0_0__un1 "SIZE_DMA_0_0_.un1") (joined - (portRef O (instanceRef SIZE_DMA_0_0__m)) - (portRef I0 (instanceRef SIZE_DMA_0_0__p)) - )) - (net (rename SIZE_DMA_0_0__un0 "SIZE_DMA_0_0_.un0") (joined - (portRef O (instanceRef SIZE_DMA_0_0__n)) - (portRef I1 (instanceRef SIZE_DMA_0_0__p)) - )) - (net (rename SIZE_DMA_0_1__un3 "SIZE_DMA_0_1_.un3") (joined - (portRef O (instanceRef SIZE_DMA_0_1__r)) - (portRef I1 (instanceRef SIZE_DMA_0_1__n)) - )) - (net (rename SIZE_DMA_0_1__un1 "SIZE_DMA_0_1_.un1") (joined - (portRef O (instanceRef SIZE_DMA_0_1__m)) - (portRef I0 (instanceRef SIZE_DMA_0_1__p)) - )) - (net (rename SIZE_DMA_0_1__un0 "SIZE_DMA_0_1_.un0") (joined - (portRef O (instanceRef SIZE_DMA_0_1__n)) - (portRef I1 (instanceRef SIZE_DMA_0_1__p)) - )) - (net (rename IPL_030_0_0__un3 "IPL_030_0_0_.un3") (joined - (portRef O (instanceRef IPL_030_0_0__r)) - (portRef I1 (instanceRef IPL_030_0_0__n)) - )) - (net (rename IPL_030_0_0__un1 "IPL_030_0_0_.un1") (joined - (portRef O (instanceRef IPL_030_0_0__m)) - (portRef I0 (instanceRef IPL_030_0_0__p)) - )) - (net (rename IPL_030_0_0__un0 "IPL_030_0_0_.un0") (joined - (portRef O (instanceRef IPL_030_0_0__n)) - (portRef I1 (instanceRef IPL_030_0_0__p)) - )) - (net (rename IPL_030_0_1__un3 "IPL_030_0_1_.un3") (joined - (portRef O (instanceRef IPL_030_0_1__r)) - (portRef I1 (instanceRef IPL_030_0_1__n)) - )) - (net (rename IPL_030_0_1__un1 "IPL_030_0_1_.un1") (joined - (portRef O (instanceRef IPL_030_0_1__m)) - (portRef I0 (instanceRef IPL_030_0_1__p)) - )) - (net (rename IPL_030_0_1__un0 "IPL_030_0_1_.un0") (joined - (portRef O (instanceRef IPL_030_0_1__n)) - (portRef I1 (instanceRef IPL_030_0_1__p)) - )) - (net (rename IPL_030_0_2__un3 "IPL_030_0_2_.un3") (joined - (portRef O (instanceRef IPL_030_0_2__r)) - (portRef I1 (instanceRef IPL_030_0_2__n)) - )) - (net (rename IPL_030_0_2__un1 "IPL_030_0_2_.un1") (joined - (portRef O (instanceRef IPL_030_0_2__m)) - (portRef I0 (instanceRef IPL_030_0_2__p)) - )) - (net (rename IPL_030_0_2__un0 "IPL_030_0_2_.un0") (joined - (portRef O (instanceRef IPL_030_0_2__n)) - (portRef I1 (instanceRef IPL_030_0_2__p)) - )) - (net (rename A0_DMA_0_un3 "A0_DMA_0.un3") (joined - (portRef O (instanceRef A0_DMA_0_r)) - (portRef I1 (instanceRef A0_DMA_0_n)) - )) - (net (rename A0_DMA_0_un1 "A0_DMA_0.un1") (joined - (portRef O (instanceRef A0_DMA_0_m)) - (portRef I0 (instanceRef A0_DMA_0_p)) - )) - (net (rename A0_DMA_0_un0 "A0_DMA_0.un0") (joined - (portRef O (instanceRef A0_DMA_0_n)) - (portRef I1 (instanceRef A0_DMA_0_p)) - )) - (net (rename AMIGA_BUS_ENABLE_DMA_LOW_0_un3 "AMIGA_BUS_ENABLE_DMA_LOW_0.un3") (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_r)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_n)) - )) - (net (rename AMIGA_BUS_ENABLE_DMA_LOW_0_un1 "AMIGA_BUS_ENABLE_DMA_LOW_0.un1") (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_m)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_p)) - )) - (net (rename AMIGA_BUS_ENABLE_DMA_LOW_0_un0 "AMIGA_BUS_ENABLE_DMA_LOW_0.un0") (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_n)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_p)) - )) - (net (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_un3 "AMIGA_BUS_ENABLE_DMA_HIGH_0.un3") (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_r)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_n)) - )) - (net (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_un1 "AMIGA_BUS_ENABLE_DMA_HIGH_0.un1") (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_m)) - (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_p)) - )) - (net (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_un0 "AMIGA_BUS_ENABLE_DMA_HIGH_0.un0") (joined - (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_n)) - (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_p)) - )) - (net (rename BG_000_0_un3 "BG_000_0.un3") (joined - (portRef O (instanceRef BG_000_0_r)) - (portRef I1 (instanceRef BG_000_0_n)) - )) - (net (rename BG_000_0_un1 "BG_000_0.un1") (joined - (portRef O (instanceRef BG_000_0_m)) - (portRef I0 (instanceRef BG_000_0_p)) - )) - (net (rename BG_000_0_un0 "BG_000_0.un0") (joined - (portRef O (instanceRef BG_000_0_n)) - (portRef I1 (instanceRef BG_000_0_p)) - )) (net (rename DS_000_DMA_0_un3 "DS_000_DMA_0.un3") (joined (portRef O (instanceRef DS_000_DMA_0_r)) (portRef I1 (instanceRef DS_000_DMA_0_n)) @@ -4073,17 +4056,65 @@ (portRef O (instanceRef AS_000_DMA_0_n)) (portRef I1 (instanceRef AS_000_DMA_0_p)) )) - (net (rename AS_030_000_SYNC_0_un3 "AS_030_000_SYNC_0.un3") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_r)) - (portRef I1 (instanceRef AS_030_000_SYNC_0_n)) + (net (rename SIZE_DMA_0_1__un3 "SIZE_DMA_0_1_.un3") (joined + (portRef O (instanceRef SIZE_DMA_0_1__r)) + (portRef I1 (instanceRef SIZE_DMA_0_1__n)) )) - (net (rename AS_030_000_SYNC_0_un1 "AS_030_000_SYNC_0.un1") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_m)) - (portRef I0 (instanceRef AS_030_000_SYNC_0_p)) + (net (rename SIZE_DMA_0_1__un1 "SIZE_DMA_0_1_.un1") (joined + (portRef O (instanceRef SIZE_DMA_0_1__m)) + (portRef I0 (instanceRef SIZE_DMA_0_1__p)) )) - (net (rename AS_030_000_SYNC_0_un0 "AS_030_000_SYNC_0.un0") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_n)) - (portRef I1 (instanceRef AS_030_000_SYNC_0_p)) + (net (rename SIZE_DMA_0_1__un0 "SIZE_DMA_0_1_.un0") (joined + (portRef O (instanceRef SIZE_DMA_0_1__n)) + (portRef I1 (instanceRef SIZE_DMA_0_1__p)) + )) + (net (rename SIZE_DMA_0_0__un3 "SIZE_DMA_0_0_.un3") (joined + (portRef O (instanceRef SIZE_DMA_0_0__r)) + (portRef I1 (instanceRef SIZE_DMA_0_0__n)) + )) + (net (rename SIZE_DMA_0_0__un1 "SIZE_DMA_0_0_.un1") (joined + (portRef O (instanceRef SIZE_DMA_0_0__m)) + (portRef I0 (instanceRef SIZE_DMA_0_0__p)) + )) + (net (rename SIZE_DMA_0_0__un0 "SIZE_DMA_0_0_.un0") (joined + (portRef O (instanceRef SIZE_DMA_0_0__n)) + (portRef I1 (instanceRef SIZE_DMA_0_0__p)) + )) + (net (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_un3 "AMIGA_BUS_ENABLE_DMA_HIGH_0.un3") (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_r)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_n)) + )) + (net (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_un1 "AMIGA_BUS_ENABLE_DMA_HIGH_0.un1") (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_m)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_p)) + )) + (net (rename AMIGA_BUS_ENABLE_DMA_HIGH_0_un0 "AMIGA_BUS_ENABLE_DMA_HIGH_0.un0") (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_n)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_HIGH_0_p)) + )) + (net (rename AMIGA_BUS_ENABLE_DMA_LOW_0_un3 "AMIGA_BUS_ENABLE_DMA_LOW_0.un3") (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_r)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_n)) + )) + (net (rename AMIGA_BUS_ENABLE_DMA_LOW_0_un1 "AMIGA_BUS_ENABLE_DMA_LOW_0.un1") (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_m)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_p)) + )) + (net (rename AMIGA_BUS_ENABLE_DMA_LOW_0_un0 "AMIGA_BUS_ENABLE_DMA_LOW_0.un0") (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_n)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_DMA_LOW_0_p)) + )) + (net (rename A0_DMA_0_un3 "A0_DMA_0.un3") (joined + (portRef O (instanceRef A0_DMA_0_r)) + (portRef I1 (instanceRef A0_DMA_0_n)) + )) + (net (rename A0_DMA_0_un1 "A0_DMA_0.un1") (joined + (portRef O (instanceRef A0_DMA_0_m)) + (portRef I0 (instanceRef A0_DMA_0_p)) + )) + (net (rename A0_DMA_0_un0 "A0_DMA_0.un0") (joined + (portRef O (instanceRef A0_DMA_0_n)) + (portRef I1 (instanceRef A0_DMA_0_p)) )) (net (rename RW_000_DMA_0_un3 "RW_000_DMA_0.un3") (joined (portRef O (instanceRef RW_000_DMA_0_r)) @@ -4097,6 +4128,54 @@ (portRef O (instanceRef RW_000_DMA_0_n)) (portRef I1 (instanceRef RW_000_DMA_0_p)) )) + (net (rename IPL_030_0_0__un3 "IPL_030_0_0_.un3") (joined + (portRef O (instanceRef IPL_030_0_0__r)) + (portRef I1 (instanceRef IPL_030_0_0__n)) + )) + (net (rename IPL_030_0_0__un1 "IPL_030_0_0_.un1") (joined + (portRef O (instanceRef IPL_030_0_0__m)) + (portRef I0 (instanceRef IPL_030_0_0__p)) + )) + (net (rename IPL_030_0_0__un0 "IPL_030_0_0_.un0") (joined + (portRef O (instanceRef IPL_030_0_0__n)) + (portRef I1 (instanceRef IPL_030_0_0__p)) + )) + (net (rename IPL_030_0_1__un3 "IPL_030_0_1_.un3") (joined + (portRef O (instanceRef IPL_030_0_1__r)) + (portRef I1 (instanceRef IPL_030_0_1__n)) + )) + (net (rename IPL_030_0_1__un1 "IPL_030_0_1_.un1") (joined + (portRef O (instanceRef IPL_030_0_1__m)) + (portRef I0 (instanceRef IPL_030_0_1__p)) + )) + (net (rename IPL_030_0_1__un0 "IPL_030_0_1_.un0") (joined + (portRef O (instanceRef IPL_030_0_1__n)) + (portRef I1 (instanceRef IPL_030_0_1__p)) + )) + (net (rename AS_030_000_SYNC_0_un3 "AS_030_000_SYNC_0.un3") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_r)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_n)) + )) + (net (rename AS_030_000_SYNC_0_un1 "AS_030_000_SYNC_0.un1") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_m)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_p)) + )) + (net (rename AS_030_000_SYNC_0_un0 "AS_030_000_SYNC_0.un0") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_n)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_p)) + )) + (net (rename RW_000_INT_0_un3 "RW_000_INT_0.un3") (joined + (portRef O (instanceRef RW_000_INT_0_r)) + (portRef I1 (instanceRef RW_000_INT_0_n)) + )) + (net (rename RW_000_INT_0_un1 "RW_000_INT_0.un1") (joined + (portRef O (instanceRef RW_000_INT_0_m)) + (portRef I0 (instanceRef RW_000_INT_0_p)) + )) + (net (rename RW_000_INT_0_un0 "RW_000_INT_0.un0") (joined + (portRef O (instanceRef RW_000_INT_0_n)) + (portRef I1 (instanceRef RW_000_INT_0_p)) + )) ) (property orig_inst_of (string "BUS68030")) ) diff --git a/Logic/BUS68030.fse b/Logic/BUS68030.fse index ab314ce..aa37a1c 100644 --- a/Logic/BUS68030.fse +++ b/Logic/BUS68030.fse @@ -1,20 +1,20 @@ -fsm_encoding {7131381311} onehot +fsm_encoding {7132381321} onehot -fsm_state_encoding {7131381311} idle_p {00000000} +fsm_state_encoding {7132381321} idle_p {00000000} -fsm_state_encoding {7131381311} idle_n {00000011} +fsm_state_encoding {7132381321} idle_n {00000011} -fsm_state_encoding {7131381311} as_set_p {00000101} +fsm_state_encoding {7132381321} as_set_p {00000101} -fsm_state_encoding {7131381311} as_set_n {00001001} +fsm_state_encoding {7132381321} as_set_n {00001001} -fsm_state_encoding {7131381311} sample_dtack_p {00010001} +fsm_state_encoding {7132381321} sample_dtack_p {00010001} -fsm_state_encoding {7131381311} data_fetch_n {00100001} +fsm_state_encoding {7132381321} data_fetch_n {00100001} -fsm_state_encoding {7131381311} data_fetch_p {01000001} +fsm_state_encoding {7132381321} data_fetch_p {01000001} -fsm_state_encoding {7131381311} end_cycle_n {10000001} +fsm_state_encoding {7132381321} end_cycle_n {10000001} -fsm_registers {7131381311} {SM_AMIGA[0]} {SM_AMIGA[1]} {SM_AMIGA[2]} {SM_AMIGA[3]} {SM_AMIGA[4]} {SM_AMIGA[5]} {SM_AMIGA[6]} {SM_AMIGA_i[7]} +fsm_registers {7132381321} {SM_AMIGA[0]} {SM_AMIGA[1]} {SM_AMIGA[2]} {SM_AMIGA[3]} {SM_AMIGA[4]} {SM_AMIGA[5]} {SM_AMIGA[6]} {SM_AMIGA_i[7]} diff --git a/Logic/BUS68030.prj b/Logic/BUS68030.prj index a3c8097..fdec7cd 100644 --- a/Logic/BUS68030.prj +++ b/Logic/BUS68030.prj @@ -1,6 +1,6 @@ #-- Lattice Semiconductor Corporation Ltd. #-- Synplify OEM project file c:/users/matze/amiga/hardwarehacks/68030-tk/github/logic\BUS68030.prj -#-- Written on Wed Oct 26 22:25:56 2016 +#-- Written on Fri Nov 18 19:32:22 2016 #device options diff --git a/Logic/BUS68030.srm b/Logic/BUS68030.srm index 50cc2f4..0f1cf90 100644 --- a/Logic/BUS68030.srm +++ b/Logic/BUS68030.srm @@ -188,8 +188,8 @@ RNP3ONsEDVHC;R( RNP38lFkVDCHRDC(N; P#R3$VM_lRNb"sIF "R\B\:\ks#C#l\\NC0x\l\NH\oN\sEN8sINCOEN \#\ndUjj -0\H\o0LEk\F\Do\HO\jnUdnj-Ujjj-#Lk38PE\M"\"N; POR3DMCNk#b_0.Cb_l0HC3Rjj.d46;jj -RNP3CODNbMk_C#0b04_HRlCj43j66n.jN; -P#R30Dl0H0#0HRlCjj3jjjjj;P +RNP3CODNbMk_C#0b04_HRlCjj3jjjjj;P +NR03#lH0D#H00ljCR36j4nj.6;P NRHFsoM_H#F0_VAR"zU1nj"dj;P NRs3FHNohl"CRAnz1Ujjd"N; P#R3$lM_#_s##HC08;Rj @@ -201,8 +201,8 @@ PVR3D_FIDbFF#s_LFM CR j;}N; P$R#M#_HlCHG8MDNo;R4 RNP3M#$_#lV_FoskHb_8;Rj -RNP3M#$_lMkOsEN#UR(c -U;N3PR#_$MD HMC8sHRj"{6U7BU-66cnw -6c4j7-U4qq-.6.44(q7j}Bw"N; +RNP3M#$_lMkOsEN#4RU4 +.;N3PR#_$MD HMC8sHRj"{jnn(n-UUnjjj-Ucnwj-qnBj-c6j6gd Ag}(d"N; POR38#L_NRPC{P NRM#$_VsCCMsCOOC_D FORN{ P$R1#l0CRN{ @@ -316,10 +316,12 @@ HCR38NHVs$sNMCNlRb'HDd_jj 4;N3HRs_0DFosHMCNlR1"7q4Bi"N; H#R3DsbFHHo8sHR"M0Fk"N; HbR3FNs0Ds8HRk"F0 -";H@R@(c:c:c4:c::67BaqiaR7q;Bi +";L@R@(c:c:c4:c::67BaqiaR7q;Bi RNH3Ds0_HFsolMNC7R"aiqB"N; -HFR3s8HoH'sRHkMF0 -';F@R@(6:c:c4:6::cqBe R qeBN; +H$R#Ms_0HN#004CR;b +oRq7aB +i;N#bR$bM_FVs0D#NoR +U;F@R@(6:c:c4:6::cqBe R qeBN; HsR30FD_sMHoNRlC" qeB ";F@R@(n:c:c4:n::4 ;R RNH3Ds0_HFsolMNC R""H; @@ -329,10 +331,9 @@ q;N3HRs_0DFosHMCNlRu"eq RNH3Ds0_HFsolMNCeR"v;q" @HR@c(:g::4cdg::a)1Ra)1;H NR03sDs_FHNoMl"CR)"1a;R -F@:@(64j:::6j6 :)1R a) 1aN; +H@:@(64j:::6j6 :)1R a) 1aN; HsR30FD_sMHoNRlC"1) ;a" -RNH3b#DFosH8RHs"FHMk;0" -RNH3sbF08NDH"sRF"k0;R +RNH3HFsos8HRM'HF'k0;R L@:@(644:::64.W:)R;)W RNH3Ds0_HFsolMNC)R"W ";N#HR$0M_s0H#NR0C4o; @@ -361,179 +362,129 @@ MMRk47_p1j_jjh_QaN; M#R3N_PCM_C0VoDN#.4R6 n;okMRMz4_7j1_jQj_h a;N3MR#CNP_0MC_NVDoR#4.;6n -RoMkjM4_HOHMN; -M#R3N_PCM_C0VoDN#.4R6 -n;okMRM_.4V_bkO -#;N3MR#CNP_0MC_NVDoR#4.;6n -RoMk4M._sLCsN; -M#R3N_PCM_C0VoDN#.4R6 -n;okMRM8n_#d_jjN; +RoMk_M41qv_vqQt_#j_JGlkN;_4 +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR4kMjH_OH +M;N3MR#CNP_0MC_NVDoR#4.;6n +RoMk4M._kVb_;O# +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR.kM4C_Ls +s;N3MR#CNP_0MC_NVDoR#4.;6n +RoMk_Mn8j#_d +j;N3MR#CNP_0MC_NVDoR#4.;6n +RoMkdM4_HOHMN; M#R3N_PCM_C0VoDN#.4R6 n;ohMR_ -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMh;_c +6;N3MR#CNP_0MC_NVDoR#4.;6n +RoMh;_n RNM3P#NCC_M0D_VN4o#Rn.6;M -oRnh_;M -NRN3#PMC_CV0_D#No46R.no; -M_Rh(N; +oR4h_jN; M#R3N_PCM_C0VoDN#.4R6 n;ohMR_;44 RNM3P#NCC_M0D_VN4o#Rn.6;M oR4h_.N; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;4d +n;ohMR_;4c RNM3P#NCC_M0D_VN4o#Rn.6;M oR4h_6N; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;4g -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR.h_jN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;.. -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR.h_dN; -M#R3N_PCM_C0VoDN#.4R6 n;ohMR_;.c RNM3P#NCC_M0D_VN4o#Rn.6;M oR.h_6N; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;.n +n;ohMR_;.( RNM3P#NCC_M0D_VN4o#Rn.6;M -oR.h_(N; +oR.h_UN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;.U +n;ohMR_;.g RNM3P#NCC_M0D_VN4o#Rn.6;M -oR.h_gN; +oRdh_jN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;dj +n;ohMR_;d4 RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_4N; +oRdh_.N; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;d. +n;ohMR_;dd RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_dN; +oRdh_cN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;dc +n;ohMR_;d6 RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_6N; +oRdh_nN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;dn +n;ohMR_;dU RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_(N; +oRdh_gN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;dg +n;ohMR_;cj RNM3P#NCC_M0D_VN4o#Rn.6;M -oRch_jN; +oRch_4N; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;c4 +n;ohMR_;c. RNM3P#NCC_M0D_VN4o#Rn.6;M -oRch_.N; +oRch_dN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;cc +n;ohMR_;cn RNM3P#NCC_M0D_VN4o#Rn.6;M -oRch_6N; +oRch_UN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;cU +n;ohMR_;cg +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR6h_jN; +M#R3N_PCM_C0VoDN#.4R6 +n;ohMR_;64 RNM3P#NCC_M0D_VN4o#Rn.6;M oR6h_.N; M#R3N_PCM_C0VoDN#.4R6 n;ohMR_;6d RNM3P#NCC_M0D_VN4o#Rn.6;M -oR6h_6N; +oR6h_cN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;6n +n;ohMR_;nU RNM3P#NCC_M0D_VN4o#Rn.6;M -oRnh_UN; +oRnh_gN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;ng +n;ohMR_;(j RNM3P#NCC_M0D_VN4o#Rn.6;M -oR(h_jN; +oR(h_4N; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;(4 +n;ohMR_;(. RNM3P#NCC_M0D_VN4o#Rn.6;M -oR(h_.N; +oR(h_dN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;(d +n;ohMR_;(c RNM3P#NCC_M0D_VN4o#Rn.6;M -oR(h_cN; +oR(h_6N; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_;(6 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR4h_g -g;N3MR#CNP_0MC_NVDoR#4.;6n -RoMhd_.4N; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_d.d;M +n;ohMR_c..;M NRN3#PMC_CV0_D#No46R.no; -M_Rh.;c6 +M_Rh.;.6 RNM3P#NCC_M0D_VN4o#Rn.6;M -oR.h_c +oR.h_. n;N3MR#CNP_0MC_NVDoR#4.;6n -RoMh6_.4N; +RoMhc_.6N; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_jd4;M +n;ohMR_c.(;M NRN3#PMC_CV0_D#No46R.no; -M_Rhd;d. +M_Rh.;(n RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_d -(;N3MR#CNP_0MC_NVDoR#4.;6n -RoMhd_dUN; +oR_Atj_jjjM3kdN; M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_jdc;M +n;oAMRtj_jj3_jk;M4 +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR_Atj_jjjM3kjN; +M#R3N_PCM_C0VoDN#.4R6 +n;ozMR7j1_jQj_hja_3dkM;M NRN3#PMC_CV0_D#No46R.no; -M_Rhd;6j +M7Rz1j_jjh_Qa3_jk;M4 RNM3P#NCC_M0D_VN4o#Rn.6;M -oRdh_6 -6;N3MR#CNP_0MC_NVDoR#4.;6n -RoMhn_djN; -M#R3N_PCM_C0VoDN#.4R6 -n;oOMRbCk_#j0__3d_k;Md -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRkOb_0C#_dj__M3k4N; -M#R3N_PCM_C0VoDN#.4R6 -n;oOMRbCk_#j0__3d_k;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_)Wj_jjQ_hajM3kdN; -M#R3N_PCM_C0VoDN#.4R6 -n;o)MRWj_jjh_Qa3_jk;M4 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_)Wj_jjQ_hajM3kjN; -M#R3N_PCM_C0VoDN#.4R6 -n;oeMRvQq_hja_3dkM;M -NRN3#PMC_CV0_D#No46R.no; -MvReqh_Qa3_jk;M4 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRqev_aQh_kj3M +oR1z7_jjj_aQh_kj3M j;N3MR#CNP_0MC_NVDoR#4.;6n -RoMO_bkC_#0j__43dkM;M -NRN3#PMC_CV0_D#No46R.no; -MbROk#_C0__j4k_3M -4;N3MR#CNP_0MC_NVDoR#4.;6n -RoMO_bkC_#0j__43jkM;M -NRN3#PMC_CV0_D#No46R.no; -MbROk#_C0__j.k_3M -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMO_bkC_#0j__.34kM;M -NRN3#PMC_CV0_D#No46R.no; -MbROk#_C0__j.k_3M -j;N3MR#CNP_0MC_NVDoR#4.;6n -RoMz_71j_jjQ_hajM3kdN; +RoMp_71j_jjQ_hajM3kdN; M#R3N_PCM_C0VoDN#.4R6 -n;ozMR7j1_jQj_hja_34kM;M +n;opMR7j1_jQj_hja_34kM;M NRN3#PMC_CV0_D#No46R.no; -M7Rz1j_jjh_Qa3_jk;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR1p7_jjj_aQh_kj3M -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMp_71j_jjQ_hajM3k4N; -M#R3N_PCM_C0VoDN#.4R6 -n;opMR7j1_jQj_hja_3jkM;M -NRN3#PMC_CV0_D#No46R.no; -MtRAq_Bij_djQ_hajM3kdN; -M#R3N_PCM_C0VoDN#.4R6 -n;oAMRtiqB_jjd_aQh_kj3M -4;N3MR#CNP_0MC_NVDoR#4.;6n -RoMABtqid_jjh_Qa3_jk;Mj +M7Rp1j_jjh_Qa3_jk;Mj RNM3P#NCC_M0D_VN4o#Rn.6;M oR_71j_jj Ahqpj _3dkM;M NRN3#PMC_CV0_D#No46R.no; @@ -541,59 +492,47 @@ M1R7_jjj_q hA_p jM3k4N; M#R3N_PCM_C0VoDN#.4R6 n;o7MR1j_jjh_ q Ap_kj3M j;N3MR#CNP_0MC_NVDoR#4.;6n -RoM1 QZ_q7v_jj__M3kdN; -M#R3N_PCM_C0VoDN#.4R6 -n;o1MRQ_Z 7_vqj__j34kM;M -NRN3#PMC_CV0_D#No46R.no; -MQR1Z7 _vjq__3j_k;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRZ1Q v_7q__j4k_3M -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoM1 QZ_q7v_4j__M3k4N; -M#R3N_PCM_C0VoDN#.4R6 -n;o1MRQ_Z 7_vqj__43jkM;M -NRN3#PMC_CV0_D#No46R.no; -MuRQpd_jj__jjk_3M -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMQ_upj_djj__j34kM;M -NRN3#PMC_CV0_D#No46R.no; -MuRQpd_jj__jjk_3M -j;N3MR#CNP_0MC_NVDoR#4.;6n -RoMQ_upj_djj__43dkM;M -NRN3#PMC_CV0_D#No46R.no; -MuRQpd_jj__j4k_3M -4;N3MR#CNP_0MC_NVDoR#4.;6n -RoMQ_upj_djj__43jkM;M +RoMQ_upj_djj__.3dkM;M NRN3#PMC_CV0_D#No46R.no; MuRQpd_jj__j.k_3M -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMQ_upj_djj__.34kM;M +4;N3MR#CNP_0MC_NVDoR#4.;6n +RoMQ_upj_djj__.3jkM;M NRN3#PMC_CV0_D#No46R.no; -MuRQpd_jj__j.k_3M +MvReqh_Qa3_jk;Md +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRqev_aQh_kj3M +4;N3MR#CNP_0MC_NVDoR#4.;6n +RoMe_vqQ_hajM3kjN; +M#R3N_PCM_C0VoDN#.4R6 +n;oOMRbCk_#j0__34_k;Md +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRkOb_0C#_4j__M3k4N; +M#R3N_PCM_C0VoDN#.4R6 +n;oOMRbCk_#j0__34_k;Mj +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRkOb_0C#_.j__M3kdN; +M#R3N_PCM_C0VoDN#.4R6 +n;oOMRbCk_#j0__3._k;M4 +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRkOb_0C#_.j__M3kjN; +M#R3N_PCM_C0VoDN#.4R6 +n;oOMRbCk_#j0__3d_k;Md +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRkOb_0C#_dj__M3k4N; +M#R3N_PCM_C0VoDN#.4R6 +n;oOMRbCk_#j0__3d_k;Mj +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR#bF_ OD\M3kdO4_Dj _jMj_C__4H._l3dkM;M +NRN3#PMC_CV0_D#No46R.no; +MFRb#D_O k\3M_d4O_D j_jjM4C__lH_.M3k4N; +M#R3N_PCM_C0VoDN#.4R6 +n;obMRFO#_D3 \k4Md_ OD_jjj__MC4__Hlk.3M j;N3MR#CNP_0MC_NVDoR#4.;6n -RoMq7j_vjq_3dkM;M -NRN3#PMC_CV0_D#No46R.no; -MjRq_q7v_kj3M -4;N3MR#CNP_0MC_NVDoR#4.;6n -RoMq7j_vjq_3jkM;M -NRN3#PMC_CV0_D#No46R.no; -MvRqQ_tqA_z1 Ahqp7 _vpq_mjW_3dkM;M -NRN3#PMC_CV0_D#No46R.no; -MvRqQ_tqA_z1 Ahqp7 _vpq_mjW_34kM;M -NRN3#PMC_CV0_D#No46R.no; -MvRqQ_tqA_z1 Ahqp7 _vpq_mjW_3jkM;M -NRN3#PMC_CV0_D#No46R.no; -MvRqQ_tqA_z1 Ahqp7 _v]q_Q_t]jM3kdN; -M#R3N_PCM_C0VoDN#.4R6 -n;oqMRvqQt_1Az_q hA_p 7_vq]]Qt_kj3M -4;N3MR#CNP_0MC_NVDoR#4.;6n -RoMqtvQqz_A1h_ q Ap_q7v_t]Q]3_jk;Mj +RoMABtqid_jjh_Qa3_jk;Md RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_Atj_jjjM3kdN; -M#R3N_PCM_C0VoDN#.4R6 -n;oAMRtj_jj3_jk;M4 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_Atj_jjjM3kjN; +oRqAtBji_dQj_hja_34kM;M +NRN3#PMC_CV0_D#No46R.no; +MtRAq_Bij_djQ_hajM3kjN; M#R3N_PCM_C0VoDN#.4R6 n;o7MR1j_jjv_7q3_jk;Md RNM3P#NCC_M0D_VN4o#Rn.6;M @@ -607,1083 +546,1126 @@ n;oqMR1j_jjv_7q3_jk;M4 RNM3P#NCC_M0D_VN4o#Rn.6;M oR_q1j_jj7_vqjM3kjN; M#R3N_PCM_C0VoDN#.4R6 -n;oqMR1d_jjj_jjY_1hjB_3dkM;M +n;o1MRQ_Z 7_vqj__43dkM;M NRN3#PMC_CV0_D#No46R.no; -M1Rq_jjd_jjj_h1YB3_jk;M4 +MQR1Z7 _vjq__34_k;M4 RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_q1j_djj_jj1BYh_kj3M +oRZ1Q v_7q__j4k_3M j;N3MR#CNP_0MC_NVDoR#4.;6n -RoM)jW_j7j_vjq_3dkM;M +RoM1 QZ_q7v_jj__M3kdN; +M#R3N_PCM_C0VoDN#.4R6 +n;o1MRQ_Z 7_vqj__j34kM;M +NRN3#PMC_CV0_D#No46R.no; +MQR1Z7 _vjq__3j_k;Mj +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRQqvtAq_z 1_hpqA v_7qQ_]tj]_3dkM;M +NRN3#PMC_CV0_D#No46R.no; +MvRqQ_tqA_z1 Ahqp7 _v]q_Q_t]jM3k4N; +M#R3N_PCM_C0VoDN#.4R6 +n;oqMRvqQt_1Az_q hA_p 7_vq]]Qt_kj3M +j;N3MR#CNP_0MC_NVDoR#4.;6n +RoMqtvQqz_A1h_ q Ap_q7v_Wpm_kj3M +d;N3MR#CNP_0MC_NVDoR#4.;6n +RoMqtvQqz_A1h_ q Ap_q7v_Wpm_kj3M +4;N3MR#CNP_0MC_NVDoR#4.;6n +RoMqtvQqz_A1h_ q Ap_q7v_Wpm_kj3M +j;N3MR#CNP_0MC_NVDoR#4.;6n +RoMq7j_vjq_3dkM;M +NRN3#PMC_CV0_D#No46R.no; +MjRq_q7v_kj3M +4;N3MR#CNP_0MC_NVDoR#4.;6n +RoMq7j_vjq_3jkM;M NRN3#PMC_CV0_D#No46R.no; MWR)_jjj_q7v_kj3M +d;N3MR#CNP_0MC_NVDoR#4.;6n +RoM)jW_j7j_vjq_34kM;M +NRN3#PMC_CV0_D#No46R.no; +MWR)_jjj_q7v_kj3M +j;N3MR#CNP_0MC_NVDoR#4.;6n +RoMQ_upj_djj__j3dkM;M +NRN3#PMC_CV0_D#No46R.no; +MuRQpd_jj__jjk_3M 4;N3MR#CNP_0MC_NVDoR#4.;6n -RoM)jW_j7j_vjq_3jkM;M -NRN3#PMC_CV0_D#No46R.nb; -Rj@@:44::.4:+:4j0CskR:fjjsR0k0CRsRkCe;BB -@bR@4j::44::4.+jN:VDR#Cfjj:RDVN#VCRNCD#R7th;R -b@:@(4:d4d4U:dc4:jj+4:_1vqtvQq:rj(f9RjR:jo#EF0vR1_Qqvtjqr:R(9hU_n,nh_g_,h(hj,_,(4h._(,(h_d_,h(hc,_;(6 -Robm9rj;b -NRM#$_sbF0NVDon#Rco; -brRm4 -9;N#bR$bM_FVs0D#NoR;nc -Robm9r.;b -NRM#$_sbF0NVDon#Rco; -brRmd -9;N#bR$bM_FVs0D#NoR;nc -Robm9rc;b -NRM#$_sbF0NVDon#Rco; -brRm6 -9;N#bR$bM_FVs0D#NoR;nc -Robm9rn;b -NRM#$_sbF0NVDon#Rco; -brRm( -9;N#bR$bM_FVs0D#NoR;nc -RNH3Ds0CF_0R -4;N#HR$VM_#Hl_8(R"4dd4U44d4 -";N3HRs_0DFosHMCNlRv"1_Qqvt;q" -RNH3lV#_FVslR#0"_1vqtvQq"Rd;H -NR#3VlF_0#"0R1qv_vqQtR;U" -RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" -RNH3lV#_HFsolMNC1R"vv_qQ"tq;H -NR#3Vl0_#Ns0CC4oR;H -NR03#N_0ClbNbHRMo"RRRjjjjj4jjRR->jjjjjjjj\RMRRjjjj4jjj>R-Rjjjj4jj4R\MRjRjj4jjj-jR>jRjj4jjjM4\RjRRj4jjjRjj-j>Rj4jjj\j4MRRRj4jjjjjjRR->j4jjj4jj\RMRR4jjjjjjj>R-R4jjjjjj4R\MR4Rjjjjjj-jR>4RjjjjjjM4\R4RRjjjjjRjj-4>Rjjjjj\j4M -";s@R@(d:44U:d:44d:+cj4Qj:u7p_j:r.jf9RjR:jlENORw7wRHbsluRQpj_7r -j9SQT=u7p_j9rj -=S7h4_4d -_HSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCQR"u7p_j -";N3HRksMVNHO_MG8CR -j;N3HR#_$MH0MHPRND";4" -@sR@4(:dd4:Ud:44j:c+:4jQ_up7.jr:Rj9fjj:ROlNEwR7wsRbHQlRu7p_j9r4 -=STQ_up74jr97 -S=4h_4H._ -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRQ_up7;j" -RNH3VkMs_NOHCM8G;R4 -RNH3M#$_HHM0DPNR""4;R -s@:@(4:d4d4U:dc4:jj+4:pQu_r7j.9:jR:fjjNRlO7ERwbwRsRHlQ_up7.jr9T -S=pQu_r7j.S9 -7_=h4_44HB -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"pQu_"7j;H -NRM3kVOsN_8HMC.GR;H -NR$3#MM_HHN0PD4R""s; -R(@@:44d::dU4:d4c4j+jv:1_Qqvtjqr:R(9fjj:ROlNEwR7wsRbH1lRvv_qQ_tqH9r( -=ST1qv_vqQt_(Hr97 -S=4h_6H._ -pSBip=Bi1_mZOQ_;H +RoMQ_upj_djj__j3jkM;M +NRN3#PMC_CV0_D#No46R.no; +MuRQpd_jj__j4k_3M +d;N3MR#CNP_0MC_NVDoR#4.;6n +RoMQ_upj_djj__434kM;M +NRN3#PMC_CV0_D#No46R.no; +MuRQpd_jj__j4k_3M +j;N3MR#CNP_0MC_NVDoR#4.;6n +RoMqj1_djj_j1j_Y_hBjM3kdN; +M#R3N_PCM_C0VoDN#.4R6 +n;oqMR1d_jjj_jjY_1hjB_34kM;M +NRN3#PMC_CV0_D#No46R.no; +M1Rq_jjd_jjj_h1YB3_jk;Mj +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR_)Wj_jjQ_hajM3kdN; +M#R3N_PCM_C0VoDN#.4R6 +n;o)MRWj_jjh_Qa3_jk;M4 +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR_)Wj_jjQ_hajM3kjN; +M#R3N_PCM_C0VoDN#.4R6 +n;b@R@j::44::4.j+4:k0sCjRf:0jRsRkC0CskRBeB;R +b@:@j4::44+:.4Vj:NCD#R:fjjNRVDR#CV#NDChRt7b; +R(@@:.4d::dU4:d.c4j+jv:1_Qqvtjqr:R(9fjj:RFoE#10Rvv_qQrtqj9:(Rnh_U_,hnhg,_,(jh4_(,(h_._,h(hd,_,(ch6_(;b +oRjmr9N; +b$R#MF_bsD0VNRo#n +c;ombRr;49 +RNb#_$Mb0FsVoDN#cRn;b +oR.mr9N; +b$R#MF_bsD0VNRo#n +c;ombRr;d9 +RNb#_$Mb0FsVoDN#cRn;b +oRcmr9N; +b$R#MF_bsD0VNRo#n +c;ombRr;69 +RNb#_$Mb0FsVoDN#cRn;b +oRnmr9N; +b$R#MF_bsD0VNRo#n +c;ombRr;(9 +RNb#_$Mb0FsVoDN#cRn;H NR03sD0C_F;R4 -RNH#_$MV_#lH"8R(44dddU44;4" +RNH#_$MV_#lH"8R(.4dddU4.;4" RNH3Ds0_HFsolMNC1R"vv_qQ"tq;H NR#3Vls_VF0l#Rv"1_QqvtdqR"N; HVR3#0l_FR#0"_1vqtvQq"RU;H NR#3VlN_0L#DC0jR"j4jRjjjjjsjjjRj4jj4jjjjjsjj4R4jjjjjjj4sj4jRjjj4jj4jsjjjRj4jjjsjj4Rj4jjjjjj4jsj44Rjjjj4jjj4s44jRjjjjjj"4s;H NR#3Vls_FHNoMl"CR1qv_vqQt"N; HVR3##l_0CN0sRCo4N; -HFR3sHHoMM#0NRlC'_1vqtvQq:rj(;9' -RNH3PHM_k#FsROC'_1vqtvQq9r('N; -H#R3$HM_MPH0N"DRj -";s@R@(d:44U:d:44d:+cj41j:vv_qQrtqj9:(R:fjjNRlO7ERwbwRsRHl1qv_vqQtr -n9S1T=vv_qQrtqnS9 -7_=h4_cUHB -SpBi=pmi_1_ZQON; -HsR30_DC04FR;H -NRM#$_lV#_RH8"d(444dUd"44;H -NR03sDs_FHNoMl"CR1qv_vqQt"N; -HVR3#Vl_s#Fl01R"vv_qQRtqd -";N3HRV_#l00F#Rv"1_QqvtUqR"N; -HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; -HVR3#Fl_sMHoNRlC"_1vqtvQq -";N3HRV_#l#00NCosCR -4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R -s@:@(4:d4d4U:dc4:jj+4:_1vqtvQq:rj(f9RjR:jlENORw7wRHbslvR1_Qqvt6qr9T -S=_1vqtvQq9r6 -=S7hc_4n -_HSiBp=iBp_Zm1Q;_O -RNH3Ds0CF_0R -4;N#HR$VM_#Hl_8(R"4dd4U44d4 -";N3HRs_0DFosHMCNlRv"1_Qqvt;q" -RNH3lV#_FVslR#0"_1vqtvQq"Rd;H -NR#3VlF_0#"0R1qv_vqQtR;U" -RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" -RNH3lV#_HFsolMNC1R"vv_qQ"tq;H -NR#3Vl0_#Ns0CC4oR;H -NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 -';s@R@(d:44U:d:44d:+cj41j:vv_qQrtqj9:(R:fjjNRlO7ERwbwRsRHl1qv_vqQtr -c9S1T=vv_qQrtqcS9 -7_=h4_ccHB -SpBi=pmi_1_ZQON; -HsR30_DC04FR;H -NRM#$_lV#_RH8"d(444dUd"44;H -NR03sDs_FHNoMl"CR1qv_vqQt"N; -HVR3#Vl_s#Fl01R"vv_qQRtqd -";N3HRV_#l00F#Rv"1_QqvtUqR"N; -HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; -HVR3#Fl_sMHoNRlC"_1vqtvQq -";N3HRV_#l#00NCosCR -4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R -s@:@(4:d4d4U:dc4:jj+4:_1vqtvQq:rj(f9RjR:jlENORw7wRHbslvR1_Qqvtdqr9T -S=_1vqtvQq9rd -=S7hc_4. -_HSiBp=iBp_Zm1Q;_O -RNH3Ds0CF_0R -4;N#HR$VM_#Hl_8(R"4dd4U44d4 -";N3HRs_0DFosHMCNlRv"1_Qqvt;q" -RNH3lV#_FVslR#0"_1vqtvQq"Rd;H -NR#3VlF_0#"0R1qv_vqQtR;U" -RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" -RNH3lV#_HFsolMNC1R"vv_qQ"tq;H -NR#3Vl0_#Ns0CC4oR;H -NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 -';s@R@(d:44U:d:44d:+cj41j:vv_qQrtqj9:(R:fjjNRlO7ERwbwRsRHl1qv_vqQtr -.9S1T=vv_qQrtq.S9 -7_=hd_4.HB -SpBi=pmi_1_ZQON; -HsR30_DC04FR;H -NRM#$_lV#_RH8"d(444dUd"44;H -NR03sDs_FHNoMl"CR1qv_vqQt"N; -HVR3#Vl_s#Fl01R"vv_qQRtqd -";N3HRV_#l00F#Rv"1_QqvtUqR"N; -HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; -HVR3#Fl_sMHoNRlC"_1vqtvQq -";N3HRV_#l#00NCosCR -4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R -s@:@(4:d4d4U:dc4:jj+4:_1vqtvQq:rj(f9RjR:jlENORw7wRHbslvR1_Qqvt4qr9T -S=_1vqtvQq9r4 -=S7hd_4U -_HSiBp=iBp_Zm1Q;_O -RNH3Ds0CF_0R -4;N#HR$VM_#Hl_8(R"4dd4U44d4 -";N3HRs_0DFosHMCNlRv"1_Qqvt;q" -RNH3lV#_FVslR#0"_1vqtvQq"Rd;H -NR#3VlF_0#"0R1qv_vqQtR;U" -RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" -RNH3lV#_HFsolMNC1R"vv_qQ"tq;H -NR#3Vl0_#Ns0CC4oR;H -NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 -';s@R@(d:44U:d:44d:+cj41j:vv_qQrtqj9:(R:fjjNRlO7ERwbwRsRHl1qv_vqQtr -j9S1T=vv_qQrtqjS9 -7_=h4_dnHB -SpBi=pmi_1_ZQON; -HsR30_DC04FR;H -NRM#$_lV#_RH8"d(444dUd"44;H -NR03sDs_FHNoMl"CR1qv_vqQt"N; -HVR3#Vl_s#Fl01R"vv_qQRtqd -";N3HRV_#l00F#Rv"1_QqvtUqR"N; -HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; -HVR3#Fl_sMHoNRlC"_1vqtvQq -";N3HRV_#l#00NCosCR -4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R -s@:@(4:d4d4U:dc4:jj+4:kOb_0C#rjd:9jRf:ljRNROE7RwwblsHRkOb_0C#r -j9SOT=bCk_#j0r97 -S=gh_4__HHB -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"kOb_0C#"N; -HkR3MNVsOM_H8RCGjs; -R(@@:44d::dU4:d4c4j+jb:Ok#_C0:rdjf9RjR:jlENORw7wRHbslbROk#_C09r4 -=STO_bkCr#04S9 -7_=h4S4 +H#R30CN0_blNboHMRR"RRjjjjjjj4>R-RjjjjjjjjR\MRjRjjjjj4-jR>jRjjjjj4M4\RjRRjjjj4Rjj-j>Rjjjj4\j4MRRRjjjj4jjjRR->jjjj44jj\RMRRjjj4jjjj>R-Rjjj4jjj4R\MRjRj4jjjj-jR>jRj4jjjjM4\RjRR4jjjjRjj-j>R4jjjj\j4MRRR4jjjjjjjRR->4jjjj4jj\;M" +@sR@4(:dd.:Ud:4.j:c+:4j1qv_vqQtr(j:9jRf:ljRNROE7RwwblsHR_1vqtvQqr_H(S9 +Tv=1_QqvtHq_r +(9Sh7=_.46_SH B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRb"Ok#_C0 -";N3HRksMVNHO_MG8CR -4;s@R@(d:44U:d:44d:+cj4Oj:bCk_#d0r:Rj9fjj:ROlNEwR7wsRbHOlRbCk_#.0r9T +O;N3HRsC0D_R0F4N; +H$R#M#_Vl8_HR4"(dU.d44d."N; +HsR30FD_sMHoNRlC"_1vqtvQq +";N3HRV_#lVlsF#"0R1qv_vqQtR;d" +RNH3lV#_#0F01R"vv_qQRtqU +";N3HRV_#l0DNLCR#0"jjjRj4jjjjjjjsj44Rjjjjjjjjs4jjRjj4jjsjjjR44j4jjjjjjsj4jRjjjjj4jjjs44jRjj4jjj4js4jjRjjjjjs4j4R44jjjjj4jjs +";N3HRV_#lFosHMCNlRv"1_Qqvt;q" +RNH3lV#_N#00CCso;R4 +RNH3HFso#HM0lMNC1R'vv_qQrtqj9:('N; +HHR3M#P_FOksC1R'vv_qQrtq(;9' +RNH3M#$_HHM0DPNR""j;R +s@:@(4:d.d4U:dc.:jj+4:_1vqtvQq:rj(f9RjR:jlENORw7wRHbslvR1_Qqvtnqr9T +S=_1vqtvQq9rn +=S7hc_4U +_HSiBp=iBp_Zm1Q;_O +RNH3Ds0CF_0R +4;N#HR$VM_#Hl_8(R"4dd.U.4d4 +";N3HRs_0DFosHMCNlRv"1_Qqvt;q" +RNH3lV#_FVslR#0"_1vqtvQq"Rd;H +NR#3VlF_0#"0R1qv_vqQtR;U" +RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" +RNH3lV#_HFsolMNC1R"vv_qQ"tq;H +NR#3Vl0_#Ns0CC4oR;H +NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 +';s@R@(d:4.U:d:.4d:+cj41j:vv_qQrtqj9:(R:fjjNRlO7ERwbwRsRHl1qv_vqQtr +69S1T=vv_qQrtq6S9 +7_=h4_cnHB +SpBi=pmi_1_ZQON; +HsR30_DC04FR;H +NRM#$_lV#_RH8"d(4.4dUd".4;H +NR03sDs_FHNoMl"CR1qv_vqQt"N; +HVR3#Vl_s#Fl01R"vv_qQRtqd +";N3HRV_#l00F#Rv"1_QqvtUqR"N; +HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; +HVR3#Fl_sMHoNRlC"_1vqtvQq +";N3HRV_#l#00NCosCR +4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R +s@:@(4:d.d4U:dc.:jj+4:_1vqtvQq:rj(f9RjR:jlENORw7wRHbslvR1_Qqvtcqr9T +S=_1vqtvQq9rc +=S7hc_4c +_HSiBp=iBp_Zm1Q;_O +RNH3Ds0CF_0R +4;N#HR$VM_#Hl_8(R"4dd.U.4d4 +";N3HRs_0DFosHMCNlRv"1_Qqvt;q" +RNH3lV#_FVslR#0"_1vqtvQq"Rd;H +NR#3VlF_0#"0R1qv_vqQtR;U" +RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" +RNH3lV#_HFsolMNC1R"vv_qQ"tq;H +NR#3Vl0_#Ns0CC4oR;H +NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 +';s@R@(d:4.U:d:.4d:+cj41j:vv_qQrtqj9:(R:fjjNRlO7ERwbwRsRHl1qv_vqQtr +d9S1T=vv_qQrtqdS9 +7_=h4_c.HB +SpBi=pmi_1_ZQON; +HsR30_DC04FR;H +NRM#$_lV#_RH8"d(4.4dUd".4;H +NR03sDs_FHNoMl"CR1qv_vqQt"N; +HVR3#Vl_s#Fl01R"vv_qQRtqd +";N3HRV_#l00F#Rv"1_QqvtUqR"N; +HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; +HVR3#Fl_sMHoNRlC"_1vqtvQq +";N3HRV_#l#00NCosCR +4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R +s@:@(4:d.d4U:dc.:jj+4:_1vqtvQq:rj(f9RjR:jlENORw7wRHbslvR1_Qqvt.qr9T +S=_1vqtvQq9r. +=S7hc_4j +_HSiBp=iBp_Zm1Q;_O +RNH3Ds0CF_0R +4;N#HR$VM_#Hl_8(R"4dd.U.4d4 +";N3HRs_0DFosHMCNlRv"1_Qqvt;q" +RNH3lV#_FVslR#0"_1vqtvQq"Rd;H +NR#3VlF_0#"0R1qv_vqQtR;U" +RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" +RNH3lV#_HFsolMNC1R"vv_qQ"tq;H +NR#3Vl0_#Ns0CC4oR;H +NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 +';s@R@(d:4.U:d:.4d:+cj41j:vv_qQrtqj9:(R:fjjNRlO7ERwbwRsRHl1qv_vqQtr +49S1T=vv_qQrtq4S9 +7_=h4_dUHB +SpBi=pmi_1_ZQON; +HsR30_DC04FR;H +NRM#$_lV#_RH8"d(4.4dUd".4;H +NR03sDs_FHNoMl"CR1qv_vqQt"N; +HVR3#Vl_s#Fl01R"vv_qQRtqd +";N3HRV_#l00F#Rv"1_QqvtUqR"N; +HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; +HVR3#Fl_sMHoNRlC"_1vqtvQq +";N3HRV_#l#00NCosCR +4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R +s@:@(4:d.d4U:dc.:jj+4:_1vqtvQq:rj(f9RjR:jlENORw7wRHbslvR1_Qqvtjqr9T +S=_1vqtvQq9rj +=S7hd_4n +_HSiBp=iBp_Zm1Q;_O +RNH3Ds0CF_0R +4;N#HR$VM_#Hl_8(R"4dd.U.4d4 +";N3HRs_0DFosHMCNlRv"1_Qqvt;q" +RNH3lV#_FVslR#0"_1vqtvQq"Rd;H +NR#3VlF_0#"0R1qv_vqQtR;U" +RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" +RNH3lV#_HFsolMNC1R"vv_qQ"tq;H +NR#3Vl0_#Ns0CC4oR;H +NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 +';s@R@(d:4.U:d:.4d:+cj4Oj:bCk_#d0r:Rj9fjj:ROlNEwR7wsRbHOlRbCk_#.0r9T S=kOb_0C#r .9Sh7=_ -4.SiBp=iBp_Zm1Q;_O +44SiBp=iBp_Zm1Q;_O RNH3Ds0_HFsolMNCOR"bCk_#;0" RNH3VkMs_NOHCM8G;R. -@sR@4(:dd4:Ud:44j:c+:4jO_bkCr#0d9:jR:fjjNRlO7ERwbwRsRHlO_bkCr#0dS9 +@sR@4(:dd.:Ud:4.j:c+:4jO_bkCr#0d9:jR:fjjNRlO7ERwbwRsRHlO_bkCr#0dS9 Tb=Ok#_C09rd -=S7hd_4 +=S7h._4 pSBip=Bi1_mZOQ_;H NR03sDs_FHNoMl"CRO_bkC"#0;H NRM3kVOsN_8HMCdGR;R -s@:@(4:d4d4U:dc4:jj+4:pQu_jjdrj.:9jRf:ljRNROE7RwwblsHRpQu_jjd7rwwjS9 +s@:@(4:d.d4U:dc.:jj+4:pQu_jjdrj.:9jRf:ljRNROE7RwwblsHRpQu_jjd7rwwjS9 Tu=Qpd_jjr_OjS9 -7_=hdS4 +7_=h.S( B=piB_pimQ1Z_ O;N3HRs_0DFosHMCNlRu"Qpd_jj ";N3HRksMVNHO_MG8CR -j;s@R@(d:44U:d:44d:+cj4Qj:ujp_d.jr:Rj9fjj:ROlNEwR7wsRbHQlRujp_dwj7w9r4 +j;s@R@(d:4.U:d:.4d:+cj4Qj:ujp_d.jr:Rj9fjj:ROlNEwR7wsRbHQlRujp_dwj7w9r4 =STQ_upj_djO9r4 -=S7h._d +=S7hU_. pSBip=Bi1_mZOQ_;H NR03sDs_FHNoMl"CRQ_upj"dj;H NRM3kVOsN_8HMC4GR;R -s@:@(4:d4d4U:dc4:jj+4:pQu_jjdrj.:9jRf:ljRNROE7RwwblsHRpQu_jjd7rww.S9 +s@:@(4:d.d4U:dc.:jj+4:pQu_jjdrj.:9jRf:ljRNROE7RwwblsHRpQu_jjd7rww.S9 Tu=Qpd_jjr_O.S9 -7_=hdSd +7_=h.Sg B=piB_pimQ1Z_ O;N3HRs_0DFosHMCNlRu"Qpd_jj ";N3HRksMVNHO_MG8CR -.;s@R@(d:44U:d:44d:+cj4)j:17a_p.Yr:Rj9fjj:ROlNEwR7wsRbH)lR17a_p.Yr9T -S=a)1_Y7pr -.9Sh7=_c.d_SH +.;s@R@(d:4.U:d:.4d:+cj4Qj:u7p_j:r.jf9RjR:jlENORw7wRHbsluRQpj_7r +j9SQT=u7p_j9rj +=S7hg_c +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRQ_up7;j" +RNH3VkMs_NOHCM8G;Rj +RNH3M#$_HHM0DPNR""4;R +s@:@(4:d.d4U:dc.:jj+4:pQu_r7j.9:jR:fjjNRlO7ERwbwRsRHlQ_up74jr9T +S=pQu_r7j4S9 +7_=h6Sj B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlR1")ap_7Y -";N3HR#_$MH0MHPRND";j" -@sR@4(:dd4:Ud:44j:c+:4jB_pij_jj7:rcjf9RjR:jlENORw7wRHbslpRBij_jjr_7jS9 -Tp=Bij_jjr_7jS9 -7p=Bij_jj -_OSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCBR"pji_j7j_"N; -HIR3NCsM8kbsMoHMR -4;N3HRksMVNHO_MG8CR -j;s@R@(d:44U:d:44d:+cj4Bj:pji_j7j_rjc:9jRf:ljRNROE7RwwblsHRiBp_jjj_47r9T -S=iBp_jjj_47r97 -S=iBp_jjj_j7r9B -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"iBp_jjj_;7" -RNH3sINMbC8sHkMM4oR;H -NRM3kVOsN_8HMC4GR;R -s@:@(4:d4d4U:dc4:jj+4:iBp_jjj_c7r:Rj9fjj:ROlNEwR7wsRbHBlRpji_j7j_r -.9SBT=pji_j7j_r -.9SB7=pji_j7j_r -49SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCBR"pji_j7j_"N; -HIR3NCsM8kbsMoHMR -4;N3HRksMVNHO_MG8CR -.;s@R@(d:44U:d:44d:+cj4Bj:pji_j7j_rjc:9jRf:ljRNROE7RwwblsHRiBp_jjj_d7r9T -S=iBp_jjj_d7r97 -S=iBp_jjj_.7r9B -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"iBp_jjj_;7" -RNH3sINMbC8sHkMM4oR;H -NRM3kVOsN_8HMCdGR;R -s@:@(4:d4d4U:dc4:jj+4:iBp_jjj_c7r:Rj9fjj:ROlNEwR7wsRbHBlRpji_j7j_r -c9SBT=pji_j7j_r -c9SB7=pji_j7j_r -d9SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCBR"pji_j7j_"N; -HIR3NCsM8kbsMoHMR -4;N3HRksMVNHO_MG8CR -c;s@R@(d:44U:d:44d:+cj4Bj:Y Bp_q7vrj4:9jRf:ljRNROE7RwwblsHRBBYp7 _vjqr9T -S=BBYp7 _vjqr97 -S=6h_g -_HSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCBR"Y Bp_q7v"N; -HkR3MNVsOM_H8RCGjN; -H#R3$HM_MPH0N"DRj -";s@R@(d:44U:d:44d:+cj4Bj:Y Bp_q7vrj4:9jRf:ljRNROE7RwwblsHRBBYp7 _v4qr9T -S=BBYp7 _v4qr97 -S=6h_( -_HSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCBR"Y Bp_q7v"N; +O;N3HRs_0DFosHMCNlRu"Qpj_7"N; HkR3MNVsOM_H8RCG4N; -H#R3$HM_MPH0N"DRj -";s@R@(d:44U:d:44d:+cj41j:Q_Z 7rvq49:jR:fjjNRlO7ERwbwRsRHl1 QZ_q7vr -j9S1T=Q_Z 7rvqjS9 +H#R3$HM_MPH0N"DR4 +";s@R@(d:4.U:d:.4d:+cj4Qj:u7p_j:r.jf9RjR:jlENORw7wRHbsluRQpj_7r +.9SQT=u7p_j9r. +=S7h4_6 +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRQ_up7;j" +RNH3VkMs_NOHCM8G;R. +RNH3M#$_HHM0DPNR""4;R +s@:@(4:d.d4U:dc.:jj+4:iBp_jjj_c7r:Rj9fjj:ROlNEwR7wsRbHBlRpji_j7j_r +j9SBT=pji_j7j_r +j9SB7=pji_jOj_ +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRB_pij_jj7 +";N3HRIMNsCs8bkMMHo;R4 +RNH3VkMs_NOHCM8G;Rj +@sR@4(:dd.:Ud:4.j:c+:4jB_pij_jj7:rcjf9RjR:jlENORw7wRHbslpRBij_jjr_74S9 +Tp=Bij_jjr_74S9 +7p=Bij_jjr_7jS9 +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRp"Bij_jj"_7;H +NRN3Is8MCbMskHRMo4N; +HkR3MNVsOM_H8RCG4s; +R(@@:.4d::dU4:d.c4j+jp:Bij_jjr_7c9:jR:fjjNRlO7ERwbwRsRHlB_pij_jj79r. +=STB_pij_jj79r. +=S7B_pij_jj79r4 +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRB_pij_jj7 +";N3HRIMNsCs8bkMMHo;R4 +RNH3VkMs_NOHCM8G;R. +@sR@4(:dd.:Ud:4.j:c+:4jB_pij_jj7:rcjf9RjR:jlENORw7wRHbslpRBij_jjr_7dS9 +Tp=Bij_jjr_7dS9 +7p=Bij_jjr_7.S9 +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRp"Bij_jj"_7;H +NRN3Is8MCbMskHRMo4N; +HkR3MNVsOM_H8RCGds; +R(@@:.4d::dU4:d.c4j+jp:Bij_jjr_7c9:jR:fjjNRlO7ERwbwRsRHlB_pij_jj79rc +=STB_pij_jj79rc +=S7B_pij_jj79rd +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRB_pij_jj7 +";N3HRIMNsCs8bkMMHo;R4 +RNH3VkMs_NOHCM8G;Rc +@sR@4(:dd.:Ud:4.j:c+:4jBpYB v_7q:r4jf9RjR:jlENORw7wRHbslYRBB_p 7rvqjS9 +TY=BB_p 7rvqjS9 +7F=b#D_O B\3Y Bp_q7v_j6r9B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"BBYp7 _v;q" +RNH3VkMs_NOHCM8G;Rj +RNH3M#$_HHM0DPNR""j;R +s@:@(4:d.d4U:dc.:jj+4:BBYp7 _v4qr:Rj9fjj:ROlNEwR7wsRbHBlRY Bp_q7vr +49SBT=Y Bp_q7vr +49Sb7=FO#_D3 \BpYB v_7qr_64S9 +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRY"BB_p 7"vq;H +NRM3kVOsN_8HMC4GR;H +NR$3#MM_HHN0PDjR""s; +R(@@:.4d::dU4:d.c4j+jp:Bid_jj _urj4:9jRf:ljRNROE7RwwblsHRiBp_jjd_ru jS9 +Tp=Bid_jj _ur +j9Sb7=FO#_D3 \B_pij_djuc _r +j9SiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCBR"pji_duj_ +";N3HRksMVNHO_MG8CR +j;N3HR#_$MH0MHPRND";j" +@sR@4(:dd.:Ud:4.j:c+:4jB_pij_dju4 r:Rj9fjj:ROlNEwR7wsRbHBlRpji_duj_ 9r4 +=STB_pij_dju4 r97 +S=#bF_ OD\p3Bid_jj _u_4cr9B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"iBp_jjd_"u ;H +NRM3kVOsN_8HMC4GR;H +NR$3#MM_HHN0PDjR""s; +R(@@:.4d::dU4:d.c4j+jQ:1Z7 _v4qr:Rj9fjj:ROlNEwR7wsRbH1lRQ_Z 7rvqjS9 +TQ=1Z7 _vjqr97 +S=6h_ +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CR1 QZ_q7v"N; +HkR3MNVsOM_H8RCGjN; +H#R3$HM_MPH0N"DR4 +";s@R@(d:4.U:d:.4d:+cj41j:Q_Z 7rvq49:jR:fjjNRlO7ERwbwRsRHl1 QZ_q7vr +49S1T=Q_Z 7rvq4S9 7_=hnB SpBi=pmi_1_ZQON; HsR30FD_sMHoNRlC"Z1Q v_7q ";N3HRksMVNHO_MG8CR -j;N3HR#_$MH0MHPRND";4" -@sR@4(:dd4:Ud:44j:c+:4j1 QZ_q7vrj4:9jRf:ljRNROE7RwwblsHRZ1Q v_7q9r4 -=ST1 QZ_q7vr -49Sh7=_S( -B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRQ"1Z7 _v;q" -RNH3VkMs_NOHCM8G;R4 -RNH3M#$_HHM0DPNR""4;R -s@:@(4:d4d4U:dc4:jj+4:a)1_Y7prj.:9jRf:ljRNROE7RwwblsHRa)1_Y7pr +4;N3HR#_$MH0MHPRND";4" +@sR@4(:dd.:Ud:4.j:c+:4jO_bkCr#0d9:jR:fjjNRlO7ERwbwRsRHlO_bkCr#0jS9 +Tb=Ok#_C09rj +=S7hc_.6 +_HSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCOR"bCk_#;0" +RNH3VkMs_NOHCM8G;Rj +@sR@4(:dd.:Ud:4.j:c+:4jO_bkCr#0d9:jR:fjjNRlO7ERwbwRsRHlO_bkCr#04S9 +Tb=Ok#_C09r4 +=S7hj_4 +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRO_bkC"#0;H +NRM3kVOsN_8HMC4GR;R +s@:@(4:d.d4U:dc.:jj+4:a)1_Y7prj.:9jRf:ljRNROE7RwwblsHRa)1_Y7pr j9S)T=17a_pjYr97 -S=.h_dHn_ +S=.h_nH(_ pSBip=Bi1_mZOQ_;H NR03sDs_FHNoMl"CR)_1a7"pY;H NR$3#MM_HHN0PDjR""s; -R(@@:44d::dU4:d4c4j+j1:)ap_7Y:r.jf9RjR:jlENORw7wRHbsl1R)ap_7Y9r4 +R(@@:.4d::dU4:d.c4j+j1:)ap_7Y:r.jf9RjR:jlENORw7wRHbsl1R)ap_7Y9r4 =ST)_1a7rpY4S9 -7_=h._d6HB +7_=h._nnHB SpBi=pmi_1_ZQON; HsR30FD_sMHoNRlC"a)1_Y7p"N; H#R3$HM_MPH0N"DRj -";s@R@(d:44U:d:44d:+cj4)j:Wj_jjh_QajRf:ljRNROE7RwwblsHR_)Wj_jjQ +";s@R@(d:4.U:d:.4d:+cj4)j:17a_p.Yr:Rj9fjj:ROlNEwR7wsRbH)lR17a_p.Yr9T +S=a)1_Y7pr +.9Sh7=_6.n_SH +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlR1")ap_7Y +";N3HR#_$MH0MHPRND";j" +@sR@4(:dd.:Ud:4.j:c+:4j7j1_j7j_vfqRjR:jlENORw7wRHbsl1R7_jjj_q7v +=ST7j1_j7j_vSq +7_=hcSd +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlR1"7_jjj_q7v"N; +H#R3$HM_MPH0N"DR4 +";s@R@(d:4.U:d:.4d:+cj47j:1iqB4h_QajRf:ljRNROE7RwwblsHRq71B_i4Q +haS7T=1iqB4h_Qa7 +S=.h_nHg_ +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CR7B1qiQ4_h;a" +RNH3_HMDbFFR +U;N3HR#_$MH0MHPRND";4" +@sR@4(:dd.:Ud:4.j:c+:4jqj1_jQj_hfaRjR:jlENORw7wRHbsl1Rq_jjj_aQh +=STqj1_jQj_hSa +7_=h._nUHB +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"_q1j_jjQ"ha;H +NR$3#MM_HHN0PD4R""s; +R(@@:.4d::dU4:d.c4j+jv:qQ_tq7f1RjR:jlENORw7wRHbslvRqQ_tq7S1 +Tv=qQ_tq7S1 +7_=hcSn +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRv"qQ_tq7;1" +RNH3M#$_HHM0DPNR""4;R +s@:@(4:d.d4U:dc.:jj+4:_q1j_dj7fjRjR:jlENORw7wRHbsl1Rq_jjd_ +7jSqT=1d_jjj_7 +=S7h(_.c +_HSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCqR"1d_jjj_7"N; +H#R3$HM_MPH0N"DR4 +";s@R@(d:4.U:d:.4d:+cj47j:aiqB_R7jfjj:ROlNEwR7wsRbH7lRaiqB_ +7jS7T=aiqB_ +7jSh7=_ +cUSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNC7R"aiqB_"7j;H +NR$3#MM_HHN0PD4R""s; +R(@@:.4d::dU4:d.c4j+ju:eqR_7fjj:ROlNEwR7wsRbHelRu7q_ +=STe_uq77 +S=6h_.B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"qeu_;7" +RNH3M#$_HHM0DPNR""4;R +s@:@(4:d.d4U:dc.:jj+4:1) ma_zfaRjR:jlENORw7wRHbsl R)1_ am +zaS)T= a1 _amz +=S7hd_6 +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CR) 1az_ma +";N3HR#_$MH0MHPRND";j" +@sR@4(:dd.:Ud:4.j:c+:4j7j1_j j_hpqA jRf:ljRNROE7RwwblsHR_71j_jj AhqpS +T1=7_jjj_q hA +p Sh7=_ +6cSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNC7R"1j_jjh_ q Ap"N; +H#R3$HM_MPH0N"DRj +";s@R@(d:4.U:d:.4d:+cj4Aj:tj_jjjRf:ljRNROE7RwwblsHR_Atj7jjwSw +Tt=A_jjj_SO +7_=hdSj +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRt"A_jjj"N; +HHR3MF_DFnbR;R +s@:@(4:d.d4U:dc.:jj+4:QqvtAq_z 1_hpqA v_7qQ_]tf]RjR:jlENORw7wRHbslvRqQ_tqA_z1 Ahqp7 _v]q_Q +t]SqT=vqQt_1Az_q hA_p 7_vq]]Qt +=S7h4_d +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRqtvQqz_A1h_ q Ap_q7v_t]Q] +";N3HR#_$MH0MHPRND";4" +@sR@4(:dd.:Ud:4.j:c+:4jqtvQqz_A1h_ q Ap_q7v_WpmR:fjjNRlO7ERwbwRsRHlqtvQqz_A1h_ q Ap_q7v_Wpm +=STqtvQqz_A1h_ q Ap_q7v_Wpm +=S7h._d +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRqtvQqz_A1h_ q Ap_q7v_Wpm"N; +H#R3$HM_MPH0N"DR4 +";s@R@(d:4.U:d:.4d:+cj4zj:7j1_jQj_hfaRjR:jlENORw7wRHbsl7Rz1j_jjh_QaT +S=1z7_jjj_aQh +=S7hd_d +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRz_71j_jjQ"ha;H +NRM3H_FDFb;Rd +RNH3M#$_HHM0DPNR""4;R +s@:@(4:d.d4U:dc.:jj+4:_qj7Rvqfjj:ROlNEwR7wsRbHqlRjv_7qT +S=_qj7 +vqSh7=_ +dcSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCqR"jv_7q +";N3HRHDM_FRFb6N; +H#R3$HM_MPH0N"DR4 +";s@R@(d:4.U:d:.4d:+cj4)j:Wj_jjv_7qjRf:ljRNROE7RwwblsHR_)Wj_jj7 +vqS)T=Wj_jjv_7q7 +S=dh_6B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"_)Wj_jj7"vq;H +NRM3H_FDFb;Rj +RNH3M#$_HHM0DPNR""4;R +s@:@(4:d.d4U:dc.:jj+4:qev_aQhR:fjjNRlO7ERwbwRsRHle_vqQ +haSeT=vQq_hSa +7_=hdSn +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRv"eqh_Qa +";N3HRHDM_FRFbgN; +H#R3$HM_MPH0N"DR4 +";s@R@(d:4.U:d:.4d:+cj4)j:Wj_jjh_QajRf:ljRNROE7RwwblsHR_)Wj_jjQ haS)T=Wj_jjh_Qa7 -S=dh_gB +S=dh_UB SpBi=pmi_1_ZQON; HsR30FD_sMHoNRlC"_)Wj_jjQ"ha;H NRM3H_FDFb;R4 RNH3M#$_HHM0DPNR""4;R -s@:@(4:d4d4U:dc4:jj+4:_q1j_djj_jj1BYhR:fjjNRlO7ERwbwRsRHlqj1_djj_j1j_Y +s@:@(4:d.d4U:dc.:jj+4:_q1j_djj_jj1BYhR:fjjNRlO7ERwbwRsRHlqj1_djj_j1j_Y hBSqT=1d_jjj_jjY_1hSB -7_=hcSj +7_=hdSg B=piB_pimQ1Z_ O;N3HRs_0DFosHMCNlR1"q_jjd_jjj_h1YB ";N3HR#_$MH0MHPRND";4" -@sR@4(:dd4:Ud:44j:c+:4jp_71j_jjQRhafjj:ROlNEwR7wsRbHplR7j1_jQj_hSa +@sR@4(:dd.:Ud:4.j:c+:4jp_71j_jjQRhafjj:ROlNEwR7wsRbHplR7j1_jQj_hSa T7=p1j_jjh_Qa7 -S=ch_4B +S=ch_jB SpBi=pmi_1_ZQON; HsR30FD_sMHoNRlC"1p7_jjj_aQh"N; HHR3MF_DFcbR;H NR$3#MM_HHN0PD4R""s; -R(@@:44d::dU4:d4c4j+jt:Aq_Bij_djQRhafjj:ROlNEwR7wsRbHAlRtiqB_jjd_aQh +R(@@:.4d::dU4:d.c4j+jt:Aq_Bij_djQRhafjj:ROlNEwR7wsRbHAlRtiqB_jjd_aQh =STABtqid_jjh_Qa7 -S=ch_.B +S=ch_4B SpBi=pmi_1_ZQON; HsR30FD_sMHoNRlC"qAtBji_dQj_h;a" RNH3_HMDbFFR (;N3HR#_$MH0MHPRND";4" -@sR@4(:dd4:Ud:44j:c+:4jqj1_j7j_vfqRjR:jlENORw7wRHbsl1Rq_jjj_q7v +@sR@4(:dd.:Ud:4.j:c+:4jqj1_j7j_vfqRjR:jlENORw7wRHbsl1Rq_jjj_q7v =STqj1_j7j_vSq -7_=hcSc +7_=hcS. B=piB_pimQ1Z_ O;N3HRs_0DFosHMCNlR1"q_jjj_q7v"N; H#R3$HM_MPH0N"DR4 -";s@R@(d:44U:d:44d:+cj47j:1j_jjv_7qjRf:ljRNROE7RwwblsHR_71j_jj7 -vqS7T=1j_jjv_7q7 -S=ch_6B +";s@R@(d:4.U:d:.4d:+cj4Aj:tiqB_jjd_aQh_f7RjR:jlENORw7wRHbsltRAq_Bij_djQ_ha7T +S=qAtBji_dQj_h7a_ +=S7k_M4s_#0.__4HB SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"_71j_jj7"vq;H -NR$3#MM_HHN0PD4R""s; -R(@@:44d::dU4:d4c4j+j1:7q4Bi_aQhR:fjjNRlO7ERwbwRsRHl7B1qiQ4_hSa -T1=7q4Bi_aQh -=S7hc_.U -_HSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNC7R"1iqB4h_Qa -";N3HRHDM_FRFbUN; +HsR30FD_sMHoNRlC"qAtBji_dQj_h7a_"N; H#R3$HM_MPH0N"DR4 -";s@R@(d:44U:d:44d:+cj4qj:1j_jjh_QajRf:ljRNROE7RwwblsHR_q1j_jjQ -haSqT=1j_jjh_Qa7 -S=.h_cH(_ -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRqj1_jQj_h;a" +";s@R@(d:4j6:d:j4d:+d(4Bj:pmi_zQa_hfaRjR:jlENORw7wRHbslpRBiz_mah_QaT +S=iBp_u X_SO +7p=Biz_ma)_u +_7SiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCBR"pmi_zQa_h;a" RNH3M#$_HHM0DPNR""4;R -s@:@(4:d4d4U:dc4:jj+4:_q1j_dj7fjRjR:jlENORw7wRHbsl1Rq_jjd_ -7jSqT=1d_jjj_7 -=S7hU_c -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRqj1_d7j_j +s@:@(4:dgd4c:ddg:nj+4:iBp_amz_ u)_R6jfjj:ROlNEwR7wsRbHBlRpmi_zua_)6 _jT +S=iBp_amz_ u)_ +6jSB7=pmi_zua_)6 _j +_HSiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCBR"pmi_zua_)6 _j ";N3HR#_$MH0MHPRND";4" -@sR@4(:dd4:Ud:44j:c+:4je_uq7jRf:ljRNROE7RwwblsHRqeu_S7 -Tu=eq -_7Sh7=_ -6.SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCeR"u7q_"N; -H#R3$HM_MPH0N"DR4 -";s@R@(d:44U:d:44d:+cj47j:aiqB_R7jfjj:ROlNEwR7wsRbH7lRaiqB_ -7jS7T=aiqB_ -7jSh7=_ -6dSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNC7R"aiqB_"7j;H -NR$3#MM_HHN0PD4R""s; -R(@@:44d::dU4:d4c4j+jp:Bid_jjR_]fjj:ROlNEwR7wsRbHBlRpji_d]j_ -=STB_pij_dj]7 -S=.h_cHg_ -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRB_pij_dj] -";N3HR#_$MH0MHPRND";4" -@sR@4(:dd4:Ud:44j:c+:4j) 1az_majRf:ljRNROE7RwwblsHR1) ma_zSa -T =)1_ am -zaSh7=_ -66SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNC)R" a1 _amz"N; -H#R3$HM_MPH0N"DRj -";s@R@(d:44U:d:44d:+cj47j:1j_jjh_ q ApR:fjjNRlO7ERwbwRsRHl7j1_j j_hpqA T -S=_71j_jj AhqpS -7_=h6Sn -B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlR1"7_jjj_q hA"p ;H -NR$3#MM_HHN0PDjR""s; -R(@@:44d::dU4:d4c4j+jt:A_jjjR:fjjNRlO7ERwbwRsRHlAjt_jwj7wT -S=_Atj_jjO7 -S=.h_UB +@sR@4(:.d(:n.:4(U:d+:4jB_pim_zau_) 7jRf:ljRNROE7RwwblsHRiBp_amz_ u)_S7 +Tp=Biz_ma)_u +_7SB7=pmi_zua_)6 _jB SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"_Atj"jj;H -NRM3H_FDFb;Rn -@sR@4(:dd4:Ud:44j:c+:4jqtvQqz_A1h_ q Ap_q7v_t]Q]jRf:ljRNROE7RwwblsHRQqvtAq_z 1_hpqA v_7qQ_]tS] -Tv=qQ_tqA_z1 Ahqp7 _v]q_Q -t]Sh7=_ -.gSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCqR"vqQt_1Az_q hA_p 7_vq]]Qt"N; -H#R3$HM_MPH0N"DR4 -";s@R@(d:44U:d:44d:+cj4qj:vqQt_1Az_q hA_p 7_vqpRmWfjj:ROlNEwR7wsRbHqlRvqQt_1Az_q hA_p 7_vqp -mWSqT=vqQt_1Az_q hA_p 7_vqp -mWSh7=_ -djSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCqR"vqQt_1Az_q hA_p 7_vqp"mW;H -NR$3#MM_HHN0PD4R""s; -R(@@:44d::dU4:d4c4j+j7:z1j_jjh_QajRf:ljRNROE7RwwblsHR1z7_jjj_aQh -=STz_71j_jjQ -haSh7=_ -dcSiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCzR"7j1_jQj_h;a" -RNH3_HMDbFFR -d;N3HR#_$MH0MHPRND";4" -@sR@4(:dd4:Ud:44j:c+:4jq7j_vfqRjR:jlENORw7wRHbsljRq_q7v -=STq7j_vSq -7_=hdS6 -B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRj"q_q7v"N; -HHR3MF_DF6bR;H -NR$3#MM_HHN0PD4R""s; -R(@@:44d::dU4:d4c4j+jW:)_jjj_q7vR:fjjNRlO7ERwbwRsRHl)jW_j7j_vSq -TW=)_jjj_q7v -=S7hn_d -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CR)jW_j7j_v;q" -RNH3_HMDbFFR -j;N3HR#_$MH0MHPRND";4" -@sR@4(:dd4:Ud:44j:c+:4je_vqQRhafjj:ROlNEwR7wsRbHelRvQq_hSa -Tv=eqh_Qa7 -S=dh_(B -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"qev_aQh"N; -HHR3MF_DFgbR;H -NR$3#MM_HHN0PD4R""s; -R(@@:44d::dU4:d4c4j+jt:Aq_Bij_djQ_ha7jRf:ljRNROE7RwwblsHRqAtBji_dQj_h7a_ -=STABtqid_jjh_Qa -_7Sh7=_4.6 -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRABtqid_jjh_Qa"_7;H -NR$3#MM_HHN0PD4R""s; -R(@@:g4.::d64:.gd4(+jp:Biz_mah_QajRf:ljRNROE7RwwblsHRiBp_amz_aQh -=STB_pi _XuO7 -S=iBp_amz_ u)_S7 -B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRp"Biz_mah_Qa -";N3HR#_$MH0MHPRND";4" -@sR@4(:ddU:cd:4Un:d+:4jB_pim_zau_) 6fjRjR:jlENORw7wRHbslpRBiz_ma)_u j_6 -=STB_pim_zau_) 6Sj -7p=Biz_ma)_u j_6_SH -B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRp"Biz_ma)_u j_6"N; -H#R3$HM_MPH0N"DR4 -";s@R@(.:4nn:d:n4.:+dU4Bj:pmi_zua_)7 _R:fjjNRlO7ERwbwRsRHlB_pim_zau_) 7T -S=iBp_amz_ u)_S7 -7p=Biz_ma)_u j_6 -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRB_pim_zau_) 7 -";N3HR#_$MH0MHPRND";4" -fsRjR:jlENOR_AQ7RQ)blsHR_q1j -djSqm=1d_jj -_OS=Qjk_M(Nj#_dHj_ -mSQ=_q1j -djS=m h4_dd;_H -RobQ -m;N#bR$bM_FVs0D#NoR -U;sjRf:ljRNROEA7Q_Qb)RsRHlqj1_jSj -m1=q_jjj_SO -Qhj=_d4d_SH -Qqm=1j_jjm -S M=k4#_N_jjj_ -H;oQbRmN; +HsR30FD_sMHoNRlC"iBp_amz_ u)_;7" +RNH3M#$_HHM0DPNR""4;R +sfjj:ROlNEQRA_)7QRHbsl1Rq_jjd +=Smqj1_dOj_ +jSQ=(kM__N#j_djHQ +Sm1=q_jjd + Sm=4h_d +.;oQbRmN; b$R#MF_bsD0VNRo#Us; -R:fjjNRlOAERQQ_7)sRbH)lRWj_jjm -S=_)Wj_jjOQ -SjW=)_jjj_aQh -mSQ=_)Wj -jjS=m k_M4Nj#_jHj_;b -oR;Qm -RNb#_$Mb0FsVoDN#;RU -fsRjR:jlENORwAzab]RsRHl7j1_dSj -m1=7_jjd -jSQ=nkM__8#j_djHm -S _=hd_4dHo; -b;Rm -RNb#_$Mb0FsVoDN#;RU -fsRjR:jlENOR_AQ7RQ)blsHR1z7_jjj -=Smz_71j_jjOQ -SjM=k47_z1j_jjh_QaQ -Sm7=z1j_jjm -S M=k4#_N_jjj_ -H;oQbRmN; -b$R#MF_bsD0VNRo#Us; -R:fjjNRlOAERQQ_7)sRbHplR7j1_jSj -m7=p1j_jj -_OS=Qjk_M4p_71j_jjQ -haS=Qmp_71j -jjS=m k_M4Nj#_jHj_;b -oR;Qm -RNb#_$Mb0FsVoDN#;RU -fsRjR:jlENOR_AQ7RQ)blsHRZ1Q 9rj -=Sm1 QZ_jOr9Q -SjQ=1Z7 _vjqr9Q -SmQ=1Zj r9m -S _=h4_UnHo; +R:fjjNRlOAERQQ_7)sRbHqlR1j_jjm +S=_q1j_jjOQ +Sj_=h4_..HQ +Sm1=q_jjj + Sm=4kM__N#j_jjHo; bmRQ;b NRM#$_sbF0NVDoU#R;R -sfjj:ROlNEQRA_)7QRHbslQR1Z4 r9m -S=Z1Q r_O4S9 -Q1j=Q_Z 7rvq4S9 -Q1m=QrZ 4S9 -mh =_n4U_ +sfjj:ROlNEQRA_)7QRHbslWR)_jjj +=Sm)jW_jOj_ +jSQ=_)Wj_jjQ +haS=Qm)jW_jSj +mk =MN4_#j_jj;_H +RobQ +m;N#bR$bM_FVs0D#NoR +U;sjRf:ljRNROEAazw]sRbH7lR1d_jjm +S=_71j +djS=Qjk_Mn8j#_dHj_ + Sm=4h_d +.;ombR;b +NRM#$_sbF0NVDoU#R;R +sfjj:ROlNEQRA_)7QRHbsl7Rz1j_jjm +S=1z7_jjj_SO +Qkj=Mz4_7j1_jQj_hSa +Qzm=7j1_jSj +mk =MN4_#j_jj;_H +RobQ +m;N#bR$bM_FVs0D#NoR +U;sjRf:ljRNROEA7Q_Qb)RsRHlp_71j +jjSpm=7j1_jOj_ +jSQ=4kM_1p7_jjj_aQh +mSQ=1p7_jjj + Sm=4kM__N#j_jjHo; +bmRQ;b +NRM#$_sbF0NVDoU#R;R +sfjj:ROlNEQRA_)7QRHbslQR1Zj r9m +S=Z1Q r_OjS9 +Q1j=Q_Z 7rvqjS9 +Q1m=QrZ jS9 +mh =_n.(;b +oR;Qm +RNb#_$Mb0FsVoDN#;RU +fsRjR:jlENOR_AQ7RQ)blsHRZ1Q 9r4 +=Sm1 QZ_4Or9Q +SjQ=1Z7 _v4qr9Q +SmQ=1Z4 r9m +S _=h.;(n +RobQ +m;N#bR$bM_FVs0D#NoR +U;sjRf:ljRNROEA7Q_Qb)RsRHlqt]Q]cr.9m +S=Qq]tO]_r9.c +jSQ=7th +mSQ=Qq]t.]rcS9 +mk =MNd_EEHo_ H;oQbRmN; b$R#MF_bsD0VNRo#Us; -R:fjjNRlOAERQQ_7)sRbHqlR]]Qtr9.c +R:fjjNRlOAERQQ_7)sRbHqlR]]Qtr9.6 =Smqt]Q]r_O. -c9S=Qjt -h7S=Qmqt]Q]cr.9m -S _=hd_4dHo; +69S=Qjt +h7S=Qmqt]Q]6r.9m +S M=kdE_NH_oEHo; bmRQ;b NRM#$_sbF0NVDoU#R;R sfjj:ROlNEQRA_)7QRHbsl]RqQrt]. -69Sqm=]]Qt_.Or6S9 +n9Sqm=]]Qt_.OrnS9 Qtj=hS7 -Qqm=]]Qtr9.6 - Sm=dh_4Hd_;b +Qqm=]]Qtr9.n + Sm=dkM_HNEoHE_;b oR;Qm RNb#_$Mb0FsVoDN#;RU -fsRjR:jlENOR_AQ7RQ)blsHRQq]t.]rnS9 -m]=qQ_t]Onr.9Q +fsRjR:jlENOR_AQ7RQ)blsHRQq]t.]r(S9 +m]=qQ_t]O(r.9Q Sjh=t7Q Sm]=qQrt]. -n9S=m h4_dd;_H +(9S=m k_MdNoEHE;_H RobQ m;N#bR$bM_FVs0D#NoR -U;sjRf:ljRNROEA7Q_Qb)RsRHlqt]Q](r.9m -S=Qq]tO]_r9.( +U;sjRf:ljRNROEA7Q_Qb)RsRHlqt]Q]Ur.9m +S=Qq]tO]_r9.U jSQ=7th -mSQ=Qq]t.]r(S9 -mh =_dd4_ +mSQ=Qq]t.]rUS9 +mk =MNd_EEHo_ H;oQbRmN; b$R#MF_bsD0VNRo#Us; -R:fjjNRlOAERQQ_7)sRbHqlR]]Qtr9.U +R:fjjNRlOAERQQ_7)sRbHqlR]]Qtr9.g =Smqt]Q]r_O. -U9S=Qjt -h7S=Qmqt]Q]Ur.9m -S _=hd_4dHo; +g9S=Qjt +h7S=Qmqt]Q]gr.9m +S M=kdE_NH_oEHo; bmRQ;b NRM#$_sbF0NVDoU#R;R -sfjj:ROlNEQRA_)7QRHbsl]RqQrt]. -g9Sqm=]]Qt_.OrgS9 +sfjj:ROlNEQRA_)7QRHbsl]RqQrt]d +j9Sqm=]]Qt_dOrjS9 Qtj=hS7 -Qqm=]]Qtr9.g - Sm=dh_4Hd_;b +Qqm=]]Qtr9dj + Sm=dkM_HNEoHE_;b oR;Qm RNb#_$Mb0FsVoDN#;RU -fsRjR:jlENOR_AQ7RQ)blsHRQq]td]rjS9 -m]=qQ_t]Ojrd9Q +fsRjR:jlENOR_AQ7RQ)blsHRQq]td]r4S9 +m]=qQ_t]O4rd9Q Sjh=t7Q Sm]=qQrt]d -j9S=m h4_dd;_H +49S=m k_MdNoEHE;_H RobQ m;N#bR$bM_FVs0D#NoR -U;sjRf:ljRNROEA7Q_Qb)RsRHlqt]Q]4rd9m -S=Qq]tO]_r9d4 -jSQ=7th -mSQ=Qq]td]r4S9 -mh =_dd4_ -H;oQbRmN; -b$R#MF_bsD0VNRo#Us; -R:fjjNRlOQERARzwblsHR7q_ 7Bm 9r. -=Smq _7B m7_.Or9Q -Sj_=q7m B7. r9s; -R:fjjNRlOQERARzwblsHR7q_ 7Bm 9rd -=Smq _7B m7_dOr9Q -Sj_=q7m B7d r9s; -R:fjjNRlOQERARzwblsHR7q_ 7Bm 9rc -=Smq _7B m7_cOr9Q -Sj_=q7m B7c r9s; -R:fjjNRlOQERARzwblsHR7q_ 7Bm 9r6 -=Smq _7B m7_6Or9Q -Sj_=q7m B76 r9s; -R:fjjNRlOQERARzwblsHR7q_ 7Bm 9rn -=Smq _7B m7_nOr9Q -Sj_=q7m B7n r9s; -R:fjjNRlOQERARzwblsHR7q_ 7Bm 9r( -=Smq _7B m7_(Or9Q -Sj_=q7m B7( r9s; -R:fjjNRlOQERARzwblsHR7q_ 7Bm 9rU -=Smq _7B m7_UOr9Q -Sj_=q7m B7U r9s; -R:fjjNRlOQERARzwblsHR7q_ 7Bm 9rg -=Smq _7B m7_gOr9Q -Sj_=q7m B7g r9s; -R:fjjNRlOQERARzwblsHR7q_ 7Bm jr49m +U;sjRf:ljRNROEQwAzRHbsl_Rq7m B7. r9m +S=7q_ 7Bm r_O.S9 +Qqj=_B7 mr7 . +9;sjRf:ljRNROEQwAzRHbsl_Rq7m B7d r9m +S=7q_ 7Bm r_OdS9 +Qqj=_B7 mr7 d +9;sjRf:ljRNROEQwAzRHbsl_Rq7m B7c r9m +S=7q_ 7Bm r_OcS9 +Qqj=_B7 mr7 c +9;sjRf:ljRNROEQwAzRHbsl_Rq7m B76 r9m +S=7q_ 7Bm r_O6S9 +Qqj=_B7 mr7 6 +9;sjRf:ljRNROEQwAzRHbsl_Rq7m B7n r9m +S=7q_ 7Bm r_OnS9 +Qqj=_B7 mr7 n +9;sjRf:ljRNROEQwAzRHbsl_Rq7m B7( r9m +S=7q_ 7Bm r_O(S9 +Qqj=_B7 mr7 ( +9;sjRf:ljRNROEQwAzRHbsl_Rq7m B7U r9m +S=7q_ 7Bm r_OUS9 +Qqj=_B7 mr7 U +9;sjRf:ljRNROEQwAzRHbsl_Rq7m B7g r9m +S=7q_ 7Bm r_OgS9 +Qqj=_B7 mr7 g +9;sjRf:ljRNROEQwAzRHbsl_Rq7m B74 rjS9 +m_=q7m B7O _r94j +jSQ=7q_ 7Bm jr49s; +R:fjjNRlOQERARzwblsHR7q_ 7Bm 4r49m S=7q_ 7Bm r_O4 -j9S=Qjq _7B m7r94j;R -sfjj:ROlNEARQzbwRsRHlq _7B m7r944 -=Smq _7B m7_4Or4S9 -Qqj=_B7 mr7 4;49 +49S=Qjq _7B m7r944;R +sfjj:ROlNEARQzbwRsRHlq _7B m7r94. +=Smq _7B m7_4Or.S9 +Qqj=_B7 mr7 4;.9 fsRjR:jlENORzQAwsRbHqlR_B7 mr7 4 -.9Sqm=_B7 m_7 O.r49Q -Sj_=q7m B74 r. -9;sjRf:ljRNROEQwAzRHbsl_Rq7m B74 rdS9 -m_=q7m B7O _r94d -jSQ=7q_ 7Bm dr49s; -R:fjjNRlOQERARzwblsHR7q_ 7Bm cr49m +d9Sqm=_B7 m_7 Odr49Q +Sj_=q7m B74 rd +9;sjRf:ljRNROEQwAzRHbsl_Rq7m B74 rcS9 +m_=q7m B7O _r94c +jSQ=7q_ 7Bm cr49s; +R:fjjNRlOQERARzwblsHR7q_ 7Bm 6r49m S=7q_ 7Bm r_O4 -c9S=Qjq _7B m7r94c;R -sfjj:ROlNEARQzbwRsRHlq _7B m7r946 -=Smq _7B m7_4Or6S9 -Qqj=_B7 mr7 4;69 +69S=Qjq _7B m7r946;R +sfjj:ROlNEARQzbwRsRHlq _7B m7r94n +=Smq _7B m7_4OrnS9 +Qqj=_B7 mr7 4;n9 fsRjR:jlENORzQAwsRbHqlR_B7 mr7 4 -n9Sqm=_B7 m_7 Onr49Q -Sj_=q7m B74 rn -9;sjRf:ljRNROEQwAzRHbsl_Rq7m B74 r(S9 -m_=q7m B7O _r94( -jSQ=7q_ 7Bm (r49s; -R:fjjNRlOQERARzwblsHR7q_ 7Bm Ur49m +(9Sqm=_B7 m_7 O(r49Q +Sj_=q7m B74 r( +9;sjRf:ljRNROEQwAzRHbsl_Rq7m B74 rUS9 +m_=q7m B7O _r94U +jSQ=7q_ 7Bm Ur49s; +R:fjjNRlOQERARzwblsHR7q_ 7Bm gr49m S=7q_ 7Bm r_O4 -U9S=Qjq _7B m7r94U;R -sfjj:ROlNEARQzbwRsRHlq _7B m7r94g -=Smq _7B m7_4OrgS9 -Qqj=_B7 mr7 4;g9 +g9S=Qjq _7B m7r94g;R +sfjj:ROlNEARQzbwRsRHlq _7B m7r9.j +=Smq _7B m7_.OrjS9 +Qqj=_B7 mr7 .;j9 fsRjR:jlENORzQAwsRbHqlR_B7 mr7 . -j9Sqm=_B7 m_7 Ojr.9Q -Sj_=q7m B7. rj -9;sjRf:ljRNROEQwAzRHbsl_Rq7m B7. r4S9 -m_=q7m B7O _r9.4 -jSQ=7q_ 7Bm 4r.9s; -R:fjjNRlOQERARzwblsHR7q_ 7Bm .r.9m +49Sqm=_B7 m_7 O4r.9Q +Sj_=q7m B7. r4 +9;sjRf:ljRNROEQwAzRHbsl_Rq7m B7. r.S9 +m_=q7m B7O _r9.. +jSQ=7q_ 7Bm .r.9s; +R:fjjNRlOQERARzwblsHR7q_ 7Bm dr.9m S=7q_ 7Bm r_O. -.9S=Qjq _7B m7r9..;R -sfjj:ROlNEARQzbwRsRHlq _7B m7r9.d -=Smq _7B m7_.OrdS9 -Qqj=_B7 mr7 .;d9 -fsRjR:jlENOR_AQ7RQ)blsHRjqr9m +d9S=Qjq _7B m7r9.d;R +sfjj:ROlNEQRA_)7QRHbslrRqjS9 +m_=qO9rj +jSQ=_qj7 +vqS=Qmq9rj + Sm=4h_d +.;oQbRmN; +b$R#MF_bsD0VNRo#Us; +R:fjjNRlOQERARzwblsHR4qr9m S=Oq_r -j9S=Qjq7j_vSq -Qqm=r -j9S=m h4_dd;_H -RobQ -m;N#bR$bM_FVs0D#NoR -U;sjRf:ljRNROEQwAzRHbslrRq4S9 -m_=qO9r4 -jSQ=4qr9s; -R:fjjNRlOQERARzwblsHRXM uu_1q -B SMm= _Xu1Buq -_OS=QjMu X_q1uB - ;sjRf:ljRNROEA7Q_Qb)RsRHlA) ) -=SmA) )_SO +49S=Qjq9r4;R +sfjj:ROlNEARQzbwRsRHlMu X_q1uBS +m =MX1u_u qB_SO +QMj= _Xu1Buq s; +R:fjjNRlOAERQQ_7)sRbHAlR +))SAm= _))OQ +Sjh=t7Q +Sm =A)S) +mk =M_.4LsCs;b +oR;Qm +RNb#_$Mb0FsVoDN#;RU +fsRjR:jlENORzQAwsRbHAlRtd_jjm +S=_Atj_djOQ +Sjt=A_jjd;R +sfjj:ROlNEARmzbwRsRHlAjt_jSj +mt=A_jjj +jSQ=_Atj_jjOs; +R:fjjNRlOmERARzwblsHRqAtBji_dSj +mt=Aq_Bij +djS=QjABtqid_jjh_Qas; +R:fjjNRlOQERARzwblsHRqAtBji_jSj +mt=Aq_Bij_jjOQ +Sjt=Aq_Bij;jj +fsRjR:jlENORzQAwsRbHBlRpji_dSj +mp=Bid_jj +_OS=QjB_pij;dj +fsRjR:jlENORzQAwsRbHBlRpji_jSj +mp=Bij_jj +_OS=QjB_pij;jj +fsRjR:jlENORzQAwsRbHBlRpmi_1 +ZQSBm=pmi_1_ZQOQ +Sjp=Bi1_mZ +Q;sjRf:ljRNROEmwAzRHbslpRBiQ_7ez_mam +S=iBp_e7Q_amz +jSQ=iBp_u X_ +O;sjRf:ljRNROEmwAzRHbslpRBiX_ um +S=iBp_u X +jSQ=iBp_u X_ +O;sjRf:ljRNROEmwAzRHbsluRwz1_B +=Smw_uzBS1 +Qkj=M_.4V_bkOH#_;R +sfjj:ROlNEARQzbwRsRHlw_uz11 h m +S=zwu_h1 1O _ +jSQ=zwu_h1 1 + ;sjRf:ljRNROEmwAzRHbsluRQpd_jj9rj +=SmQ_upjrdjjS9 +QQj=ujp_dOj_r;j9 +fsRjR:jlENORzmAwsRbHQlRujp_d4jr9m +S=pQu_jjdr +49S=QjQ_upj_djO9r4;R +sfjj:ROlNEARmzbwRsRHlQ_upjrdj.S9 +mu=Qpd_jj9r. +jSQ=pQu_jjd_.Or9s; +R:fjjNRlOQERARzwblsHRpQur +j9SQm=uOp_r +j9S=QjQrupj +9;sjRf:ljRNROEQwAzRHbsluRQp9r4 +=SmQ_upO9r4 +jSQ=pQur;49 +fsRjR:jlENORzQAwsRbHQlRu.pr9m +S=pQu_.Or9Q +Sju=Qp9r.;R +sfjj:ROlNEzRAwRa]blsHRq71B +i4S7m=1iqB4Q +Sj_=h4_.dHm +S =MX1u_u qB_ +O;ombR;b +NRM#$_sbF0NVDoU#R;R +sfjj:ROlNEQRA_)7QRHbslaR7q +BiS7m=aiqB_SO Qtj=hS7 -QAm= -))S=m k4M._sLCso; +Q7m=aiqB + Sm=_q1j_jj7_vqHo; bmRQ;b NRM#$_sbF0NVDoU#R;R -sfjj:ROlNEARQzbwRsRHlAjt_dSj -mt=A_jjd_SO -QAj=td_jjs; -R:fjjNRlOmERARzwblsHR_Atj -jjSAm=tj_jjQ -Sjt=A_jjj_ -O;sjRf:ljRNROEmwAzRHbsltRAq_Bij -djSAm=tiqB_jjd -jSQ=qAtBji_dQj_h -a;sjRf:ljRNROEQwAzRHbsltRAq_Bij -jjSAm=tiqB_jjj_SO -QAj=tiqB_jjj;R -sfjj:ROlNEARQzbwRsRHlB_pij -djSBm=pji_dOj_ -jSQ=iBp_jjd;R -sfjj:ROlNEARQzbwRsRHlB_pij -jjSBm=pji_jOj_ -jSQ=iBp_jjj;R -sfjj:ROlNEARQzbwRsRHlB_pimQ1Z -=SmB_pimQ1Z_SO -QBj=pmi_1;ZQ -fsRjR:jlENORzmAwsRbHBlRp7i_Qme_zSa -mp=BiQ_7ez_maQ -Sjp=BiX_ u;_O -fsRjR:jlENORzmAwsRbHBlRp i_XSu -mp=BiX_ uQ -Sjp=BiX_ u;_O -fsRjR:jlENORzmAwsRbHwlRuBz_1m -S=zwu_ -B1S=Qjk4M._kVb__O#Hs; -R:fjjNRlOQERARzwblsHRzwu_h1 1S -mu=wz _1h_1 OQ -Sju=wz _1h;1 -fsRjR:jlENORzmAwsRbHQlRujp_djjr9m -S=pQu_jjdr -j9S=QjQ_upj_djO9rj;R -sfjj:ROlNEARmzbwRsRHlQ_upjrdj4S9 -mu=Qpd_jj9r4 -jSQ=pQu_jjd_4Or9s; -R:fjjNRlOmERARzwblsHRpQu_jjdr -.9SQm=ujp_d.jr9Q -Sju=Qpd_jjr_O. -9;sjRf:ljRNROEQwAzRHbsluRQp9rj -=SmQ_upO9rj -jSQ=pQur;j9 -fsRjR:jlENORzQAwsRbHQlRu4pr9m -S=pQu_4Or9Q -Sju=Qp9r4;R -sfjj:ROlNEARQzbwRsRHlQrup.S9 -mu=Qpr_O.S9 -QQj=u.pr9s; -R:fjjNRlOAERz]waRHbsl1R7q4Bi -=Sm7B1qiS4 -Qhj=_.4d_SH -mM = _Xu1Buq ;_O -RobmN; +sfjj:ROlNEARmzbwRsRHlqBe +=SmqBe +jSQ=BeB;R +sfjj:ROlNEARmzbwRsRHl m +S=S +Qhj=_j.6_ +H;sjRf:ljRNROEQwAzRHbsluReqm +S=qeu_SO +Qej=u +q;sjRf:ljRNROEmwAzRHbslvReqm +S=qev +jSQ=qev_aQh;R +sfjj:ROlNEARQzbwRsRHl) +1aS)m=1Oa_ +jSQ=a)1;R +sfjj:ROlNEARQzbwRsRHl) 1am +S=1) Oa_ +jSQ=1) +a;sjRf:ljRNROEA7Q_Qb)RsRHl)SW +mW=)_SO +Q)j=Wj_jjv_7qQ +SmW=) + Sm=4h_d +d;oQbRmN; b$R#MF_bsD0VNRo#Us; -R:fjjNRlOQERARzwblsHRq7aBSi -ma=7q_BiOQ -Sja=7q;Bi -fsRjR:jlENORzmAwsRbHqlRe - BSqm=e - BS=Qje;BB -fsRjR:jlENORzmAwsRbH lR -=Sm Q -Sj_=hd_jgHs; -R:fjjNRlOQERARzwblsHRqeu -=Sme_uqOQ -Sju=eqs; -R:fjjNRlOmERARzwblsHRqev -=Sme -vqS=Qje_vqQ;ha -fsRjR:jlENORzQAwsRbH)lR1Sa -m1=)a -_OS=Qj);1a -fsRjR:jlENORwAzab]RsRHl) 1am -S=1) Sa -Qtj=hS7 -m) = a1 _amz_ -H;ombR;b -NRM#$_sbF0NVDoU#R;R -sfjj:ROlNEQRA_)7QRHbslWR) -=Sm)OW_ -jSQ=_)Wj_jj7 -vqS=Qm)SW -mk =Ms4_I;_H -RobQ -m;N#bR$bM_FVs0D#NoR -U;sjRf:ljRNROEQwAzRHbslBRwr -j9Swm=Br_OjS9 -Qwj=B9rj;R -sfjj:ROlNEARQzbwRsRHlw4Br9m -S=_wBO9r4 -jSQ=rwB4 -9;sjRf:ljRNROEmwAzRHbslvRqQ_tqq)77_q hA -p Sqm=vqQt_7q7)h_ q Ap -jSQ=7th;R -sfjj:ROlNEARmzbwRsRHlqtvQqz_A1q_7a7q_QS) -mv=qQ_tqA_z17qqa_)7Q -jSQ=QqvtAq_z71_q_aq7_Q)Os; -R:fjjNRlOmERARzwblsHRQqvtAq_z 1_hpqA m_pWm -S=QqvtAq_z 1_hpqA m_pWQ -SjM=k4l_NH_oNL_k#CLMNDDC_FHI_;R -sfjj:ROlNEARmzbwRsRHlqtvQqz_A1h_ q Ap_t]Q]m -S=QqvtAq_z 1_hpqA Q_]tS] -Qkj=M_4jNolHNk_L#M_CNCLD_oEHE;_H -fsRjR:jlENORwAzab]RsRHlBhQQ -=SmBhQQ -jSQ=4kMjH_OHSM -mh =_;n. -RobmN; -b$R#MF_bsD0VNRo#Us; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__C.H__jNSd -m_=h4 -gnS=Qjhg_4n -_4S=Q4)_1a7_pYH9r.;R -sfjj:ROlNEhRq7b.RsRHlB_pij_dj]__.H__j4m -S=.h_cHg__S4 -Qhj=_U.4_SH -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHlB_pij_dj]__.H -_jShm=_g.c_SH -Qhj=_g.c_4H_ -4SQ=#bF_ OD\M3k.L4_o NO_jjd_0HM_jH__ -j;sjRf:ljRNROEq.h7RHbslFRb#D_O B\3Y Bp_q7v_46__jH__S4 -m_=h6H(__S4 -Qqj=1j_jj -_HS=Q4hg_4d;_H -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \BpYB v_7q__64__Hjm -S=6h_( -_HS=Qjh(_6_4H_ -4SQ=.h_6H4_;R -sfjj:ROlNEhRq7b.RsRHl) 1az_ma__.j__jNjd__S4 -m_=hd_dU4Q -Sj_=h4_cgHQ -S4_=hd;66 -fsRjR:jlENOR7qh.sRbH)lR a1 _amz_j.__Nj_d -_jShm=_Udd -jSQ=dh_d4U_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z17qqa_)7Q__HPj__jNjd__S4 -m_=h._.c4Q -Sj1=q_jjj_SH -Qh4=_n4U_ -H;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z17qqa_)7Q__HPj__jNjd_ -=Smh._.cQ -Sj_=h._.c4Q -S4W=)_jjj_ -O;sjRf:ljRNROEq.h7RHbslMRk4Nj_lNHo_#Lk_NCML_DCEEHo_jj___Ndj -_4Shm=_n.4_S4 -QAj=tiqB_jjd_aQh -4SQ=_q1j_djj_jj1BYh_ -H;sjRf:ljRNROEq.h7RHbslMRk4Nj_lNHo_#Lk_NCML_DCEEHo_jj___Ndjm -S=.h_4Sn -Qhj=_n.4_S4 -Qq4=1d_jj;_H -fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__jj___Nd4r_44S9 -m_=h._jg4Q -Sjb=Ok#_C09rj -4SQ=kOb_0C#_4Hr9s; -R:fjjNRlOqERhR7.blsHRkOb_0C#_j.__Nj_dr_44S9 -m_=h. -jgS=Qjhj_.g -_4S=Q4O_bkC_#0H9rd;R -sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH4__Nj_d__44m -S=.h_j4d_ -jSQ=.h_jH(_ -4SQ=a)1_Y7p_jHr9s; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__C4H__jN4d_ -=Smhj_.dQ -Sj_=h._jd4Q -S41=)ap_7Yr_H4 -9;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y._C_jH___Nd4 -_jShm=_n4g_S4 -Qhj=_U46 -4SQ=.h_jH(_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_HH__jj_r -j9Shm=_.46_SH -Qhj=_.46_4H_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__4j_r -c9Shm=_c4c_4H_ -jSQ=4h_6Sj -Qh4=_U.U_ -H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__cjr9m -S=4h_cHc_ -jSQ=4h_cHc__S4 -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__jj__d4r9m -S=4h_cH.__S4 -Qhj=_(.U_SH -Qh4=_jdc_ -H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__djr9m -S=4h_cH._ -jSQ=4h_cH.__S4 -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__HH__.4r9m -S=dh_4H.__S4 -Qhj=_j46 -4SQ=.h_UHc_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__HH_r -.9Shm=_.d4_SH -Qhj=_.d4_4H_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbsl1R)ap_7Yj_C_jH__S4 -m_=h._dnH -_4S=Qjhn_.6 -_HS=Q4hn_.(;_H -fsRjR:jlENOR7qh.sRbH)lR17a_pCY_j__Hjm -S=.h_dHn_ -jSQ=.h_dHn__S4 -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__jj__n4r9m -S=4h_cHU__S4 -Qhj=_j4n -4SQ=.h_.Hg_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__jj_r -n9Shm=_U4c_SH -Qhj=_U4c_4H_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__4j_r -j9Shm=_n4d_4H_ -jSQ=4h_6Sj -Qh4=_(.._ -H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__jjr9m +R:fjjNRlOQERARzwblsHRrwBjS9 +mB=w_jOr9Q +SjB=wr;j9 +fsRjR:jlENORzQAwsRbHwlRB9r4 +=SmwOB_r +49S=Qjw4Br9s; +R:fjjNRlOmERARzwblsHRQqvtqq_7_7) AhqpS +mv=qQ_tqq)77_q hA +p S=Qjt;h7 +fsRjR:jlENORzmAwsRbHqlRvqQt_1Az_a7qqQ_7)m +S=QqvtAq_z71_q_aq7 +Q)S=QjqtvQqz_A1q_7a7q_QO)_;R +sfjj:ROlNEARmzbwRsRHlqtvQqz_A1h_ q Ap_Wpm +=SmqtvQqz_A1h_ q Ap_Wpm +jSQ=4kM_HNloLN_kC#_MDNLCF_DI;_H +fsRjR:jlENORzmAwsRbHqlRvqQt_1Az_q hA_p ]]Qt +=SmqtvQqz_A1h_ q Ap_t]Q]Q +SjM=k4N4_lNHo_#Lk_NCML_DCEEHo_ +H;sjRf:ljRNROEAazw]sRbHBlRQ +QhSBm=Q +QhS=QjkjM4_HOHMm +S M=k4Od_H_HMHo; +b;Rm +RNb#_$Mb0FsVoDN#;RU +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hjr_4jS9 +m_=h4_dnH +_4S=QjhU_( +4SQ=4h_jH4_;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__jjr9m S=4h_dHn_ jSQ=4h_dHn__S4 Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHl7j1_j7j_v.q__l#Jk_GNH__j4m -S=.h_cjn__S4 -Qhj=_n.._SH -Q)4=Wj_jj;_H -fsRjR:jlENOR7qh.sRbH7lR1j_jjv_7q__.#kJlGHN__Sj -m_=h._cnjQ -Sj_=h._cnj -_4S=Q4b_F#O\D 3.kM4o_LN_O j_djH_M0H__jjs; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__C.H__j4m -S=.h_dHc__S4 -Qhj=_n4g_SH -Qh4=_(4g_ -H;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y._C_jH__S. -m_=h._dcH -_.S=Qjhg_4U -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__C.H -_jShm=_c.d_SH -Qhj=_c.d_4H_ -4SQ=.h_dHc__ -.;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MOg_Dj _jbj_C__jjd_N_4j_ -=Smhj_.n -_4S=Qjhc_4g -_HS=Q4h6_d(s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kgD_O j_jjC_b_jj___Ndj -_.Shm=_n.j_S. -Qej=u7q__SH -QO4=bCk_#H0_r;d9 -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MgO_D j_jjbjC__Nj_d -_jShm=_n.j -jSQ=.h_j4n_ -4SQ=.h_j.n_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3gkM_ OD_jjj__bCj__jN4d_ -=Smhj_.6 -_4S=Qjh6_4j -_HS=Q4h6_4g;_H -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MgO_D j_jjbjC__Nj_d -_.Shm=_6.j_S. -QOj=bCk_#H0_r -j9S=Q4O_bkC_#0H9rd;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3gkM_ OD_jjj__bCj__jNSd -m_=h. -j6S=Qjhj_.6 -_4S=Q4hj_.6;_. -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hj__jN4._r -d9Shm=_.d6_S4 -Qhj=_g46_SH -Qh4=_cd4_ -j;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__Nj_.r_.dS9 -m_=hd_6..Q -Sjv=eqh_Qa -_HS=Q4e_uq7;_H -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hj__jNd.r9m -S=dh_6S. -Qhj=_.d6_S4 -Qh4=_.d6_ -.;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MLn_od_jj__Hj -_4Shm=_4.d_4H_ -jSQ=_q1j_dj7Sj -QB4=pji_j7j_r;j9 -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MnLjo_dHj__Sj -m_=h._d4HQ -Sj_=h._d4H -_4S=Q4Mu X_q1uBO _;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_HH__jj__j4r9m -S=4h_6H.__S4 -Qhj=_4.g_SH -Qh4=_d.g_ -H;sjRf:ljRNROEq.h7RHbslFRb#D_O B\3Y Bp_q7v_j6__jH__S. -m_=h6Hg__S. -Qhj=_c.j_SH -Qh4=_4.6_ -H;sjRf:ljRNROEq.h7RHbslFRb#D_O B\3Y Bp_q7v_j6__jH_ -=Smhg_6_SH -Qhj=__6gH -_4S=Q4hg_6_.H_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 34kM_DHb_jH__S4 -m_=h._ddj -_4S=Qjh6_4j -_HS=Q4hg_44__HHs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k4b_HD__Hj -_.Shm=_d.d_.j_ -jSQ=4h_gH.__SH -Qh4=_jdn_ -H;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MH4_bHD__Sj -m_=h._ddjQ -Sj_=h._ddj -_4S=Q4hd_.d__j.s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdNc_#d_jjj_8_HH___Nd4m -S=.h_44c_ -jSQ=_q1j_dj7Hj_ -4SQ=4h_6 -n;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_dcNj#_d8j_j__HHd_N_S. -m_=h._4c.Q -Sj_=h4_U6HQ -S4v=1_QqvtHq__(Hr9s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdNc_#d_jjj_8_HH___Nddm -S=.h_4dc_ -jSQ=.h_44c_ -4SQ=.h_4.c_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkMc#_N_jjd__8jH__HNSd -m_=h. -4cS=Qjh4_.c -_dS=Q4Mu X_q1uBO _;R -sfjj:ROlNEhRq7b.RsRHlk4M._kVb__O#jd_N_Nj_d -_4Skm=M_.4V_bkO4#_ +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_HH__4j_r +j9Shm=_.46_4H_ +jSQ=4h_jHd_ +4SQ=4h_jHc_;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_HH__jjr9m +S=4h_6H._ +jSQ=4h_6H.__S4 +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__4j_r +69Shm=_n4c_4H_ +jSQ=(h_nQ +S4_=h4_j6Hs; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#Hr_j6S9 +m_=h4_cnHQ +Sj_=h4_cnH +_4S=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHRa)1_Y7p__CjH +_4Shm=_(.n_4H_ +jSQ=4h_4H6_ +4SQ=4h_4Hn_;R +sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCHj_ +=Smhn_.( +_HS=Qjhn_.(__H4Q +S41=)a;_O +fsRjR:jlENOR7qh.sRbHtlR_64._S4 +mF=b#D_O H\3b4D_ +jSQ=.h_.Hn_ +4SQ=.h_.Hc_;R +sfjj:ROlNEhRq7b.RsRHlt._46m +S=#bF_ OD\b3HDQ +SjF=b#D_O H\3b4D_ +4SQ=.h_.H6_;R +sfjj:ROlNEhRq7b.RsRHlk_M6C +_HShm=_j.6_SH +Qhj=_j.6_4H_ +4SQ=.h_nHd_;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0.__Hjr_4dS9 +m_=h4_UgH +_4S=Qjh6_.6 +_HS=Q4h6_.n;_H +fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__jH_r +d9Shm=_g4U_SH +Qhj=_g4U_4H_ +4SQ=.h_nHd_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3nkM__Loj_djj._N_S4 +mF=b#D_O k\3MLn_od_jj +_4S=QjMu X_q1uBO _ +4SQ=_q1j_dj7 +j;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MLn_od_jj__jNS. +mF=b#D_O k\3MLn_od_jjQ +SjF=b#D_O k\3MLn_od_jj +_4S=Q4B_pij_jj79rj;R +sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH.___N.4m +S=4h_j4U_ +jSQ=(h_(Q +S4_=h._.UHs; +R:fjjNRlOqERhR7.blsHRa)1_Y7p__C.H._N +=Smhj_4UQ +Sj_=h4_jU4Q +S41=)ap_7Yr_H. +9;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y4_C_NH_.__44m +S=4h_44c_ +jSQ=.h_.HU_ +4SQ=a)1_Y7p_jHr9s; +R:fjjNRlOqERhR7.blsHRa)1_Y7p__C4H._N_S4 +m_=h4 +4cS=Qjh4_4c +_4S=Q4)_1a7_pYH9r4;R +sfjj:ROlNEhRq7b.RsRHlk4M._sLCs__jN4._ +=Smk4M._sLCs +_4S=Qjh(_.(Q +S4t=Aq_Bij_jjOs; +R:fjjNRlOqERhR7.blsHR.kM4C_Lsjs__ +N.Skm=M_.4LsCs jSQ=.kM4C_Ls4s_ -4SQ=zwu_h1 1H _;R -sfjj:ROlNEhRq7b.RsRHlk4M._kVb__O#jd_N_Nj_dm +4SQ=zwu_h1 1O _;R +sfjj:ROlNEhRq7b.RsRHlk4M._kVb__O#j._N_S4 +mM=k.V4_bOk_# +_4S=Qjh(_.(Q +S4t=Aq_Bij_jjOs; +R:fjjNRlOqERhR7.blsHR.kM4b_Vk#_O_Nj_.m S=.kM4b_Vk#_O jSQ=.kM4b_Vk#_O_S4 -Qh4=_n46_ -H;sjRf:ljRNROEq.h7RHbslMRk.L4_C_ssjd_N_Nj_d__4jm -S=.kM4C_Ls4s__Sj -Qkj=M_.4LsCs_S4 Qw4=u1z_ h1_ -O;sjRf:ljRNROEq.h7RHbslMRk.L4_C_ssjd_N_Nj_dm -S=.kM4C_LsSs -Qkj=M_.4LsCs_j4_ -4SQ=4h_6Hn_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__HH___F.49r. -=SmhU_4.__j4Q -Sj_=h4_cgHQ -S4_=h4;(n -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__HH__HF..r9m -S=4h_Uj._ -jSQ=4h_Uj.__S4 -Q14=vv_qQrtqd -9;sjRf:ljRNROEq.h7RHbslMRk4Od_H_HMH__jjd_N_SU -mM=k4Oj_H_HMUQ -SjM=k4Oj_H_HMdQ -S4M=k4Oj_H_HMcs; -R:fjjNRlOqERhR7.blsHR4kMdH_OHHM__jj___Ndgm +H;sjRf:ljRNROEq.h7RHbslMRk4N4_lNHo_#Lk_NCML_DCEEHo_Nj_.__j4m +S=4h_d4j_ +jSQ=qAtBji_dQj_hSa +Qq4=1d_jjj_jjY_1hHB_;R +sfjj:ROlNEhRq7b.RsRHlk4M4_HNloLN_kC#_MDNLCH_EojE___N.jm +S=4h_dSj +Qhj=_j4d_S4 +Qq4=1d_jj;_H +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kgM._ OD_jjj__MC4 +_4Sbm=FO#_D3 \kgM._ OD_jjj__MC4 +_4S=QjO_bkC_#0H9r. +4SQ=qev_aQh_ +H;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_.gO_D j_jjM4C__S. +mF=b#D_O k\3M_.gO_D j_jjM4C__S. +QOj=bCk_#d0r9Q +S4b=Ok#_C0r_Hj +9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_.gO_D j_jjM4C__Sd +mF=b#D_O k\3M_.gO_D j_jjM4C__Sd +Qbj=FO#_D3 \kgM._ OD_jjj__MC4 +_4S=Q4b_F#O\D 3.kMgD_O j_jjC_M_.4_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3.kMgD_O j_jjC_M_S4 +mF=b#D_O k\3M_.gO_D j_jjM4C_ +jSQ=#bF_ OD\M3k.Og_Dj _jMj_C__4dQ +S4b=Ok#_C0r_H4 +9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MOg_Dj _jbj_C__jN4d_ +=Smhn_.4 +_4S=QjhU_(_SH +Qh4=_d.n;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3gkM_ OD_jjj__bCjd_N_S. +m_=h._n4.Q +Sjb=Ok#_C0r_HjS9 +QO4=bCk_#H0_r;49 +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MgO_D j_jjbjC__ +NdShm=_4.n +jSQ=.h_n44_ +4SQ=.h_n.4_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3gkM_ OD_jjj__bCjd_N_4j_ +=Smhn_.. +_4S=Qjhn_(_SH +Qh4=_4.6_ +H;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MOg_Dj _jbj_C__jNjd__S. +m_=h._n..Q +Sj_=h. +ndS=Q4e_uq7;_H +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MgO_D j_jjbjC___Ndjm +S=.h_nS. +Qhj=_..n_S4 +Qh4=_..n_ +.;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q hA_p jJ_#lNkG_44_ +=Sm7j1_j j_hpqA __j#kJlG4N__S4 +Qhj=__(UHQ +S4W=)_ +O;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q hA_p jJ_#lNkG_S4 +m1=7_jjj_q hA_p jJ_#lNkG_S4 +Q7j=1j_jjh_ q Ap_#j_JGlkN__44Q +S4v=1_Qqvtnqr9s; +R:fjjNRlOqERhR7.blsHRkOb_0C#_j.__Nj_d__j49r4 +=Smh6_.g +_4S=QjO_bkCr#0jS9 +QO4=bCk_#H0_r;49 +fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__jj___Ndj9r4 +=Smh6_.gQ +Sj_=h._6g4Q +S4b=Ok#_C0r_Hd +9;sjRf:ljRNROEq.h7RHbslMRk6__CH +_4Shm=_j.6_4H_ +jSQ=4h_n +_HS=Q4h6_.c;_H +fsRjR:jlENOR7qh.sRbHklRMNn_lNHo_#Lk_08NNH_8sm +S=nkM_HNloLN_k8#_N_0N8 +HsS=Qjk_MnNolHNk_L#N_808N_H4s_ +4SQ=nkM_HNloLN_k8#_N_0N8_Hs.s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\#3N_jjj_N8ln +_4Sbm=FO#_D3 \Nj#_j8j_l_Nn4Q +Sjv=qQ_tq7H1_ +4SQ=_q1j_jjHs; +R:fjjNRlOqERhR7.blsHR#bF_ OD\#3N_jjj_N8ln +_.Sbm=FO#_D3 \Nj#_j8j_l_Nn.Q +SjF=b#D_O k\3ML4_o NO_jjd_0HM +4SQ=#bF_ OD\M3kds; +R:fjjNRlOqERhR7.blsHR#bF_ OD\#3N_jjj_N8lnm +S=#bF_ OD\#3N_jjj_N8lnQ +SjF=b#D_O N\3#j_jjl_8N4n_ +4SQ=#bF_ OD\#3N_jjj_N8ln;_. +fsRjR:jlENOR7qh.sRbH7lR1j_jjv_7q__4#kJlG4N_ +=Sm7j1_j7j_v4q__l#Jk_GN4Q +Sj1=7_jjj_q7v_#j_JGlkN +_HS=Q4b_F#O\D 3_N#j_jj8nlN;R +sfjj:ROlNEhRq7b.RsRHl7j1_j7j_v4q__l#Jk +GNS7m=1j_jjv_7q__4#kJlGSN +Q7j=1j_jjv_7q__4#kJlG4N_ +4SQ=#bF_ OD\M3kcI_s_jjj_ +H;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3Msc_Ij_jj +_4Sbm=FO#_D3 \k_McsjI_j4j_ +jSQ=iBp_jjd_ru jS9 +QB4=pji_duj_ r_H4 +9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3Msc_Ij_jj +_.Sbm=FO#_D3 \k_McsjI_j.j_ +jSQ=iBp_jjd_SO +Q)4=Wj_jj;_H +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_McsjI_jSj +mF=b#D_O k\3Msc_Ij_jjQ +SjF=b#D_O k\3Msc_Ij_jj +_4S=Q4b_F#O\D 3ckM__sIj_jj.s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k4Od_DF _kH0_M40_ +=Smb_F#O\D 34kMdD_O k_F0M_H0 +_4S=Qjb_F#O\D 34kM.D_O k_F0M_H0Q +S41=q_jjj_q7v_ +H;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_4dO_D F_k0H +M0Sbm=FO#_D3 \kdM4_ OD_0Fk_0HM +jSQ=#bF_ OD\M3k4Od_DF _kH0_M40_ +4SQ=#bF_ OD\M3kdD_O k_F0M_H0s; +R:fjjNRlOqERhR7.blsHR1) ma_z.a__Nj_.__j4m +S=4h_.46_ +jSQ=(h_n +_HS=Q4hd_4(s; +R:fjjNRlOqERhR7.blsHR1) ma_z.a__Nj_. +_jShm=_64. +jSQ=4h_.46_ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbsl1R)ap_7Yj_C_NH_.__j4m +S=4h_44n_ +jSQ=(h_nQ +S41=)ap_7Yr_Hj +9;sjRf:ljRNROEq.h7RHbsl1R)ap_7Yj_C_NH_. +_jShm=_n44 +jSQ=4h_44n_ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_dcNj#_d8j_j__HNj._ +=Smh(_.(Q +Sj_=h._((cQ +S4_=h._((6s; +R:fjjNRlOqERhR7.blsHR4kMjH_OH4M_ +=SmkjM4_HOHM +_4S=Qjqt]Q]r_H. +c9S=Q4qt]Q]r_H.;69 +fsRjR:jlENOR7qh.sRbHklRM_4jOMHH_S. +mM=k4Oj_H_HM.Q +Sj]=qQ_t]Hnr.9Q +S4]=qQ_t]H(r.9s; +R:fjjNRlOqERhR7.blsHR4kMjH_OHdM_ +=SmkjM4_HOHM +_dS=Qjqt]Q]r_H. +U9S=Q4qt]Q]r_H.;g9 +fsRjR:jlENOR7qh.sRbHklRM_4jOMHH_Sc +mM=k4Oj_H_HMcQ +Sj]=qQ_t]Hjrd9Q +S4]=qQ_t]H4rd9s; +R:fjjNRlOqERhR7.blsHR4kMjH_OH6M_ +=SmkjM4_HOHM +_6S=Qjq _7B m7_.OrdS9 +Qq4=1d_jjj_7_ +H;sjRf:ljRNROEq.h7RHbslMRk4Oj_H_HMnm +S=4kMjH_OHnM_ +jSQ=7q_ 7Bm r_O. +j9S=Q4q _7B m7_.Or4 +9;sjRf:ljRNROEq.h7RHbslMRk4Oj_H_HM(m +S=4kMjH_OH(M_ +jSQ=4kMjH_OH4M_ +4SQ=4kMjH_OH.M_;R +sfjj:ROlNEhRq7b.RsRHlkjM4_HOHM +_USkm=M_4jOMHH_SU +Qkj=M_4jOMHH_Sd +Qk4=M_4jOMHH_ +c;sjRf:ljRNROEq.h7RHbslMRk4Oj_H_HMgm S=4kMjH_OHgM_ jSQ=4kMjH_OH6M_ 4SQ=4kMjH_OHnM_;R -sfjj:ROlNEhRq7b.RsRHlkdM4_HOHM__Hj__jN4d_jm -S=4kMjH_OH4M_jQ -SjM=k4Oj_H_HM(Q -S4M=k4Oj_H_HMUs; -R:fjjNRlOqERhR7.blsHR4kMdH_OHHM__jj___Nd4S4 -mM=k4Oj_H_HM4S4 -Qkj=M_4jOMHH_Sg -Qq4=_B7 m_7 O.r.9s; -R:fjjNRlOqERhR7.blsHR4kMdH_OHHM__jj__ -NdSkm=M_4jOMHH -jSQ=4kMjH_OH4M_jQ -S4M=k4Oj_H_HM4 -4;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jH__Fj_.r_4jS9 -m_=h4_ndH -_4S=Qjqj1_djj_j1j_Y_hBHQ -S4p=Bij_jjr_7c -9;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#H#__jH__Fj_.r_.jS9 -m_=h4_ndH -_.S=QjB_pij_jj7r_HdS9 -QM4= _Xu1Buq ;_O -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqM_##H__Hj__jFj.r9m -S=4h_nHd_ -jSQ=4h_nHd__S4 -Qh4=_d4n_.H_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3.kM4o_LN_O j_djH_M0H__jFjd___Fd4m -S=#bF_ OD\M3k.L4_o NO_jjd_0HM_jH__4j_ -jSQ=_q1j_jjHQ -S4t=Aq_Bij_djQ_haHs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k.L4_o NO_jjd_0HM_jH___Fdjd_F_S. -mF=b#D_O k\3M_.4LOoN d_jjM_H0__Hj__j.Q -Sj_=h4_64HQ -S4_=hd_6jHs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k.L4_o NO_jjd_0HM_jH___Fdjd_F -=Smb_F#O\D 3.kM4o_LN_O j_djH_M0H__jjQ -SjF=b#D_O k\3M_.4LOoN d_jjM_H0__Hj__j4Q -S4F=b#D_O k\3M_.4LOoN d_jjM_H0__Hj__j.s; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jjr_44S9 -m_=h4_dUH -_4S=Qjhc_4gQ -S4_=h._(UHs; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jjr_.4S9 -m_=h4_dUH -_.S=QjhU_.. -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jj9r4 -=Smhd_4U -_HS=Qjhd_4U__H4Q -S4_=h4_dUH;_. -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \BpYB v_7q__6j__Hj -_4Shm=__6gH +sfjj:ROlNEhRq7b.RsRHlkjM4_HOHMj_4 +=SmkjM4_HOHMj_4 +jSQ=4kMjH_OH(M_ +4SQ=4kMjH_OHUM_;R +sfjj:ROlNEhRq7b.RsRHlkjM4_HOHM4_4 +=SmkjM4_HOHM4_4 +jSQ=4kMjH_OHgM_ +4SQ=7q_ 7Bm r_O.;.9 +fsRjR:jlENOR7qh.sRbHklRM_4jOMHH +=SmkjM4_HOHMQ +SjM=k4Oj_H_HM4Sj +Qk4=M_4jOMHH_;44 +fsRjR:jlENOR7qh.sRbHklRMNn_lNHo_#Lk_08NNH_8s +_4Skm=MNn_lNHo_#Lk_08NNH_8s _4S=Qjqj1_jHj_ -4SQ=4h_gHg_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkMc#_N_jjd__8jH__HF.._ -=Smh6_4n__H.Q -Sj_=q7m B7O _r94( -4SQ=7q_ 7Bm r_H4;n9 -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kcMd__N#j_dj8Hj__FH_. -_dShm=_n46_dH_ -jSQ=7q_ 7Bm r_H4 -U9S=Q4q _7B m7_4Hrg -9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_dcNj#_d8j_j__HH._F_Sc -m_=h4_6nH -_cS=Qjh6_4n__H4Q -S4_=h4_6nH;_. -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kcMd__N#j_dj8Hj__FH_.m -S=4h_6Hn_ -jSQ=4h_6Hn__Sc -Qh4=_n46_dH_;R +4SQ=qAtBji_dQj_hHa_;R +sfjj:ROlNEhRq7b.RsRHlk_MnNolHNk_L#N_808N_H.s_ +=Smk_MnNolHNk_L#N_808N_H.s_ +jSQ=_)Wj_jjOQ +S4 =MX1u_u qB_ +H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_cHr9m +S=4h_cHc_ +jSQ=4h_cHc__S4 +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__d4r9m +S=4h_cH.__S4 +Qhj=_n4n_SH +Qh4=_(4n_ +H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_dHr9m +S=4h_cH._ +jSQ=4h_cH.__S4 +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__.4r9m +S=4h_cHj__S4 +Qhj=_64n_SH +Qh4=_c.n_ +H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_.Hr9m +S=4h_cHj_ +jSQ=4h_cHj__S4 +Q)4=1Oa_;R sfjj:ROlNEhRq7b.RsRHlb_F#O\D 34kMjl_#_HNlo4N_ =Smb_F#O\D 34kMjl_#_HNloHN__S4 Q1j=Q_Z O9rj @@ -1692,757 +1674,870 @@ R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k4#j_ll_NH oNSbm=FO#_D3 \kjM4__#lNolHN _HS=Qjb_F#O\D 34kMjl_#_HNloHN__S4 Q14=Q_Z Or_H4 -9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__Fj_.__j49rd -=Smh(_4n__H4Q -Sj =A)O)_ -4SQ=dh_6H._;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__jj___F.j9rd -=Smh(_4n -_HS=Qjh(_4n__H4Q -S4_=hd_6dHs; -R:fjjNRlOqERhR7.blsHR4kMdH_OHHM__jj___Nd4m -S=4kMjH_OH4M_ -jSQ=Qq]tH]_r9.c -4SQ=Qq]tH]_r9.6;R -sfjj:ROlNEhRq7b.RsRHlkdM4_HOHM__Hj__jN.d_ -=SmkjM4_HOHM -_.S=Qjqt]Q]r_H. -n9S=Q4qt]Q]r_H.;(9 -fsRjR:jlENOR7qh.sRbHklRM_4dOMHH_jH__Nj_d -_dSkm=M_4jOMHH_Sd -Qqj=]]Qt_.HrUS9 -Qq4=]]Qt_.Hrg -9;sjRf:ljRNROEq.h7RHbslMRk4Od_H_HMH__jjd_N_Sc -mM=k4Oj_H_HMcQ -Sj]=qQ_t]Hjrd9Q -S4]=qQ_t]H4rd9s; -R:fjjNRlOqERhR7.blsHR4kMdH_OHHM__jj___Nd6m -S=4kMjH_OH6M_ -jSQ=7q_ 7Bm r_O. -d9S=Q4qj1_d7j_j;_H -fsRjR:jlENOR7qh.sRbHklRM_4dOMHH_jH__Nj_d -_nSkm=M_4jOMHH_Sn -Qqj=_B7 m_7 Ojr.9Q -S4_=q7m B7O _r9.4;R -sfjj:ROlNEhRq7b.RsRHlkdM4_HOHM__Hj__jN(d_ -=SmkjM4_HOHM -_(S=QjkjM4_HOHM -_4S=Q4kjM4_HOHM;_. -fsRjR:jlENOReQhRHbslWR)_jjj_q7v_H4_ -=Smhn_d -jSQ=dh_n;_j -fsRjR:jlENOReQhRHbsl_Rh.Hj_ -=Smhj_._SH -Qhj=_;.j -fsRjR:jlENOReQhRHbsljRq_q7v_H4_ -=Smh6_d -jSQ=dh_6;_j -fsRjR:jlENOReQhRHbsl_Rh.H6_ -=Smh6_._SH -Qhj=_;.6 -fsRjR:jlENOReQhRHbslvRqQ_tqA_z1 Ahqp7 _vpq_m4W__SH -m_=hdSj -Qhj=__djjs; -R:fjjNRlOQERhbeRsRHlhn_._SH -m_=h.Hn_ -jSQ=.h_ns; -R:fjjNRlOQERhbeRsRHlqtvQqz_A1h_ q Ap_q7v_t]Q]__4Hm -S=.h_gQ -Sj_=h.jg_;R -sfjj:ROlNEhRQesRbHhlR__.(Hm -S=.h_( -_HS=Qjh(_.;R -sfjj:ROlNEhRQesRbHAlRtj_jj__4Hm -S=.h_UQ -Sj_=h.jU_;R -sfjj:ROlNEhRQesRbHAlRtd_jj__OHm -S=_Atj_djO -_HS=QjAjt_dOj_;R -sfjj:ROlNEhRQesRbHblRFO#_D3 \k_MgLjo_dHj_ -=Smb_F#O\D 3gkM__Loj -djS=Qjb_F#O\D 3gkM__Loj_djjs; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__C4H__j4m -S=.h_dH6__S4 -Qhj=_4.j_SH -Qh4=_..j_ -H;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y4_C_jH__S. -m_=h._d6H -_.S=Qjhj_.d -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__C4H -_jShm=_6.d_SH -Qhj=_6.d_4H_ -4SQ=.h_dH6__ -.;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_dcNj#_d8j_j__HH._F_S4 -m_=h4_6nH -_4S=QjwOB_r -j9S=Q4wOB_r;49 -fsRjR:jlENOReQhRHbsl_Rh._4cHm -S=.h_4Hc_ -jSQ=.h_4 -c;sjRf:ljRNROEQRheblsHR#bF_ OD\M3kdNc_#d_jjj_8_HH__SH -m_=hd -4jS=Qjh4_dj;_j -fsRjR:jlENOReQhRHbsl_Rh.Hc_ -=Smhc_._SH -Qhj=_;.c -fsRjR:jlENOReQhRHbsluRQpd_jj__4H9r. -=Smhd_d -jSQ=dh_d;_j -fsRjR:jlENOReQhRHbsl_Rh.Hd_ -=Smhd_._SH -Qhj=_;.d -fsRjR:jlENOReQhRHbsluRQpd_jj__4H9r4 -=Smh._d -jSQ=dh_.;_j -fsRjR:jlENOReQhRHbsl_Rh.H._ -=Smh._._SH -Qhj=_;.. -fsRjR:jlENOReQhRHbsluRQpd_jj__4H9rj -=Smh4_d -jSQ=dh_4;_j -fsRjR:jlENOReQhRHbsl_Rhd -_HShm=_Hd_ -jSQ=dh_;R -sfjj:ROlNEhRQesRbH7lR1j_jjv_7q__4Hm -S=ch_6Q -Sj_=hcj6_;R -sfjj:ROlNEhRQesRbHhlR_Hc_ -=Smh__cHQ -Sj_=hcs; -R:fjjNRlOQERhbeRsRHlqj1_j7j_v4q__SH -m_=hcSc -Qhj=__ccjs; -R:fjjNRlOQERhbeRsRHlh6_4_SH -m_=h4H6_ -jSQ=4h_6s; -R:fjjNRlOQERhbeRsRHlqj1_djj_j1j_Y_hB4 -_HShm=_ -cjS=Qjhj_c_ -j;sjRf:ljRNROEQRheblsHR4h_g -_HShm=__4gHQ -Sj_=h4 -g;sjRf:ljRNROEQRheblsHR1) ma_z.a__jj__SH -m_=h6S6 -Qhj=__66js; -R:fjjNRlOQERhbeRsRHlqj1_j7j_v4q__l#Jk_GNH__jHm -S=.h_cS6 -Qhj=_6.c_ -j;sjRf:ljRNROEQRheblsHR.h_.Hg_ -=Smh._.g -_HS=Qjh._.gs; -R:fjjNRlOQERhbeRsRHlh._.( -_HShm=_(.._SH -Qhj=_(..;R -sfjj:ROlNEhRQesRbHhlR_n.._SH -m_=h._.nHQ -Sj_=h.;.n -fsRjR:jlENOReQhRHbsl1R7_jjj_q7v_#._JGlkN__Hj -_HShm=_n.c -jSQ=.h_cjn_;R -sfjj:ROlNEhRQesRbHhlR_.dd_SH -m_=hd_d.HQ -Sj_=hd;d. -fsRjR:jlENOReQhRHbslFRb#D_O 7\31j_jjv_7q__cVjj__Hj_ -=Smb_F#O\D 3_71j_jj7_vqcQ -SjF=b#D_O 7\31j_jjv_7q__cjs; -R:fjjNRlOQERhbeRsRHlqj1_d7j_j__jj__jHm -S=ch_UQ -Sj_=hcjU_;R -sfjj:ROlNEhRQesRbHblRFO#_D3 \)jW_j7j_vdq__jj__SH -mF=b#D_O )\3Wj_jjv_7q -_dS=Qjb_F#O\D 3_)Wj_jj7_vqd;_j -fsRjR:jlENOReQhRHbsl_Rh._4UHm -S=.h_4HU_ -jSQ=.h_4 -U;sjRf:ljRNROEQRheblsHR4kMjH_OHHM_ -=SmkjM4_HOHM -_HS=QjkjM4_HOHMs; -R:fjjNRlOQERhbeRsRHlkdM4_HOHM__Hj__jHm -S=nh_.Q -Sj_=hnj._;R -sfjj:ROlNEhRQesRbHhlR_6.4_SH -m_=h._46HQ -Sj_=h.;46 -fsRjR:jlENOReQhRHbsl_Rh._4nHm -S=.h_4Hn_ -jSQ=.h_4 -n;sjRf:ljRNROEQRheblsHRZ1Q v_7q__d#kJlGjN___NdH -_HShm=_n4. -jSQ=4h_.jn_;R -sfjj:ROlNEhRQesRbHblRFO#_D3 \k_MnLjo_dHj__Hj_ -=Smhd_.4Q -Sj_=h._d4Hs; -R:fjjNRlOQERhbeRsRHlhg_.4 -_HShm=_4.g_SH -Qhj=_4.g;R -sfjj:ROlNEhRQesRbHhlR_U.U_SH -m_=h._UUHQ -Sj_=h.;UU -fsRjR:jlENOReQhRHbsl_Rh._U(Hm -S=.h_UH(_ -jSQ=.h_U -(;sjRf:ljRNROEQRheblsHRdh_cHj_ -=Smhc_dj -_HS=Qjhc_djs; -R:fjjNRlOQERhbeRsRHlhU_.c -_HShm=_c.U_SH -Qhj=_c.U;R -sfjj:ROlNEhRQesRbHhlR_6.(_SH -m_=h._(6HQ -Sj_=h.;(6 -fsRjR:jlENOReQhRHbslFRb#D_O 1\3Q_Z 7_vqn__jj__jH9r4 -=Smb_F#O\D 3Z1Q v_7qr_n4S9 -Qbj=FO#_D3 \1 QZ_q7v_jn_r;49 -fsRjR:jlENOReQhRHbsl_Rh._nUHm -S=.h_nHU_ -jSQ=.h_n -U;sjRf:ljRNROEQRheblsHR#bF_ OD\Q31Z7 _vnq__jj__Hj_r -j9Sbm=FO#_D3 \1 QZ_q7v_jnr9Q -SjF=b#D_O 1\3Q_Z 7_vqnr_jj -9;sjRf:ljRNROEQRheblsHR.h_nH6_ +9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_46O_D j_jj8__HH._F_S4 +m_=hUH6__S4 +Qqj=1d_jjj_jjY_1hHB_ +4SQ=XM uu_1q_B Os; +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k4O6_Dj _j8j__HH___F..m +S=Uh_6__H.Q +Sjp=Bij_jjr_7cS9 +QB4=pji_j7j__dHr9s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k4O6_Dj _j8j__HH__ +F.Shm=__U6HQ +Sj_=hUH6__S4 +Qh4=__U6H;_. +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kcMd__N#j_dj8Hj___N.j +_4Shm=_(.(_S4 +Qqj=1d_jj +_HS=Q4q _7B m7_4Or( +9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_dcNj#_d8j_j__HNj.__S. +m_=h._((.Q +Sj_=q7m B7H _r94n +4SQ=7q_ 7Bm r_H4;U9 +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kcMd__N#j_dj8Hj___N.j +_dShm=_(.(_Sd +Qwj=Br_O4S9 +Qq4=_B7 m_7 Hgr49s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdNc_#d_jjj_8_NH_.__jcm +S=.h_(c(_ +jSQ=.h_(4(_ +4SQ=.h_(.(_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkMc#_N_jjd__8jH._N_6j_ +=Smh(_.( +_6S=Qjh(_.( +_dS=Q4wOB_r;j9 +fsRjR:jlENOReQhRHbslWR)_jjj_aQh_H4_ +=SmhU_d +jSQ=dh_U;_j +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kcMd__N#j_dj8Hj___F.4m +S=gh_4__j4Q +Sjt=Aq_Bij_djQ_ha7Q +S4t=Aq_Bij_djQ;ha +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \kcMd__N#j_dj8Hj___F..m +S=gh_4__j.Q +Sj1=q_jjd__7jHQ +S4v=1_QqvtHq__(Hr9s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdNc_#d_jjj_8_FH_. +_dShm=__g4j +_dS=Qjh4_g_4j_ +4SQ=gh_4__j.s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdNc_#d_jjj_8_FH_.m +S=gh_4 +_jS=Qjh4_g_dj_ +4SQ=XM uu_1q_B Os; +R:fjjNRlOqERhR7.blsHRa)1_Y7p__C.H +_4Shm=_6.n_4H_ +jSQ=4h_jHU_ +4SQ=4h_jHg_;R +sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH._ =Smhn_.6 -_HS=Qjhn_.6s; -R:fjjNRlOQERhbeRsRHlhn_.( -_HShm=_(.n_SH -Qhj=_(.n;R -sfjj:ROlNEhRQesRbHhlR_(dd_SH -m_=hd_d(HQ -Sj_=hd;d( -fsRjR:jlENOReQhRHbsl_Rhd_dUHm -S=dh_dHU_ -jSQ=dh_d -U;sjRf:ljRNROEQRheblsHR.h_jHc_ -=Smhj_.c -_HS=Qjhj_.cs; -R:fjjNRlOQERhbeRsRHlhU_.. -_HShm=_..U_SH -Qhj=_..U;R -sfjj:ROlNEhRQesRbHhlR_U.(_SH -m_=h._(UHQ -Sj_=h.;(U -fsRjR:jlENOReQhRHbslFRb#D_O k\3ML6_o NO_jjd_0HM_H8__Nj_.__HFHd_ -=SmhU_46Q -Sj_=h4_U6Hs; -R:fjjNRlOQERhbeRsRHlB_pij_djO -_HSBm=pji_dOj__SH -QBj=pji_dOj_;R -sfjj:ROlNEhRQesRbHBlRpji_d]j__H.__Fj_. -_HShm=_c4U -jSQ=4h_Ujc_;R -sfjj:ROlNEhRQesRbH1lRvv_qQ_tq#0s##__Hj__jFH._r -n9Shm=_g4( -jSQ=4h_(jg_;R -sfjj:ROlNEhRQesRbHblRFO#_D3 \BpYB v_7q__6j__Hjd_F_SH -m_=h. -64S=Qjh6_.4;_H -fsRjR:jlENOReQhRHbsl7Rp1j_jj__OHm -S=1p7_jjj_HO_ -jSQ=1p7_jjj_ -O;sjRf:ljRNROEQRheblsHR1z7_jjj_HO_ -=Smz_71j_jjO -_HS=Qjz_71j_jjOs; -R:fjjNRlOQERhbeRsRHlb_F#O\D 3Z1Q v_7q__nj__jj._F_jHr9m -S=4h_(S. -Qhj=_.4(_ -H;sjRf:ljRNROEQRheblsHR#bF_ OD\M3k.L4_o NO_jjd_0HM_jH___Fdjd_F_SH -mF=b#D_O k\3M_.4LOoN d_jjM_H0__HjQ -SjF=b#D_O k\3M_.4LOoN d_jjM_H0__Hj;_j -fsRjR:jlENOReQhRHbslvR1_QqvtMq_#H#__jH__Fj_.r_HjS9 -m_=h4 -ndS=Qjhn_4d;_H -fsRjR:jlENOReQhRHbslpRBij_jj__7H9rd -=SmB_pij_jj7r_HdS9 -QBj=pji_j7j_r;d9 -fsRjR:jlENOReQhRHbsl_Rhd_6jHm -S=dh_6Hj_ -jSQ=dh_6 -j;sjRf:ljRNROEQRheblsHR.h_.Hc_ -=Smh._.c -_HS=Qjh._.cs; -R:fjjNRlOQERhbeRsRHlqtvQqz_A1q_7a7q_QH)_P__jj -_HSqm=vqQt_1Az_a7qqQ_7) -_OS=QjqtvQqz_A1q_7a7q_QO)__ -j;sjRf:ljRNROEQRheblsHR#bF_ OD\M3k4b_HD__Hjd_F_SH -m_=h4 -6jS=Qjh6_4j;_H -fsRjR:jlENOReQhRHbslFRb#D_O k\3M_dcNj#_d8j_j__HH._F_SH -m_=h4 -6nS=Qjh6_4n;_H -fsRjR:jlENOReQhRHbslMRk4v_1_Qqvtjq__l#Jk_GN4__j4._F_SH -m_=h4 -njS=Qjhn_4j;_H -fsRjR:jlENOReQhRHbslvR1_Qqvt#q_s##0_jH__Fj_.r_HjS9 -m_=h4 -(cS=Qjh(_4c;_H -fsRjR:jlENOReQhRHbsl1R)ap_7Y._C_jH___F.j -_HShm=_U46 -jSQ=4h_6HU_;R -sfjj:ROlNEhRQesRbHhlR_4.j_SH -m_=h._j4HQ -Sj_=h.;j4 -fsRjR:jlENOReQhRHbsl_Rh._j.Hm -S=.h_jH._ -jSQ=.h_j -.;sjRf:ljRNROEQRheblsHR.h_jHd_ -=Smhj_.d -_HS=Qjhj_.ds; -R:fjjNRlOQERhbeRsRHlb_F#O\D 34kM_DHb_jH__SH -m_=h. -ddS=Qjhd_.d;_j -fsRjR:jlENOReQhRHbsl_Rhd_njHm -S=dh_nHj_ -jSQ=dh_n -j;sjRf:ljRNROEQRheblsHR4h_gH4__SH -m_=h4_g4H -_HS=Qjhg_44;_H -fsRjR:jlENOReQhRHbsl_Rh4_g.H -_HShm=_.4g_HH_ -jSQ=4h_gH._;R -sfjj:ROlNEhRQesRbHhlR_g4g_SH -m_=h4_ggHQ -Sj_=h4;gg -fsRjR:jlENOReQhRHbsl_Rh.H4_ -=Smh4_._SH -Qhj=_;.4 -fsRjR:jlENOReQhRHbsl7Rz1j_jjh_Qa__4Hm -S=dh_cQ -Sj_=hdjc_;R +_HS=Qjhn_.6__H4Q +S4_=h._n6.;_j +fsRjR:jlENOR7qh.sRbH)lR17a_pCY_4__H4m +S=.h_nHn__S4 +Qhj=_.44_SH +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH4__S. +m_=h._nnH +_.S=Qjh4_4d +_HS=Q4h4_4c;_H +fsRjR:jlENOR7qh.sRbH)lR17a_pCY_4 +_HShm=_n.n_SH +Qhj=_n.n_4H_ +4SQ=.h_nHn__ +.;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_4H_r +49Shm=_U4d_4H_ +jSQ=4h_nHc_ +4SQ=.h_n +c;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_4Hr9m +S=4h_dHU_ +jSQ=4h_dHU__S4 +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__n4r9m +S=4h_cHU__S4 +Qhj=_ +(gS=Q4h(_4j;_H +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##r_HnS9 +m_=h4_cUHQ +Sj_=h4_cUH +_4S=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#Hr_4cS9 +m_=h4_ccH +_4S=QjhU_( +4SQ=4h_nHU_;R +sfjj:ROlNEhRQesRbHklRM14_vv_qQ_tqjJ_#lNkG_j4__SH +mM=k4v_1_Qqvtjq__l#Jk_GN4Q +SjM=k4v_1_Qqvtjq__l#Jk_GN4;_j +fsRjR:jlENOReQhRHbslWR)_HO_ +=Sm)OW__SH +Q)j=W;_O +fsRjR:jlENOReQhRHbslFRb#D_O )\3Wj_jjh_Qa__6Hm +S=#bF_ OD\W3)_jjj_aQh_S6 +Qbj=FO#_D3 \)jW_jQj_h6a__ +j;sjRf:ljRNROEQRheblsHRiBp_jjj_H7_r +d9SBm=pji_j7j__dHr9Q +Sjp=Bij_jjr_7d +9;sjRf:ljRNROEQRheblsHR.h_6 +_HShm=__.6HQ +Sj_=h. +6;sjRf:ljRNROEQRheblsHRpQu_jjd_H4_r +49Shm=_ +.US=QjhU_._ +j;sjRf:ljRNROEQRheblsHR.h_c +_HShm=__.cHQ +Sj_=h. +c;sjRf:ljRNROEQRheblsHRpQu_jjd_H4_r +j9Shm=_ +.(S=Qjh(_._ +j;sjRf:ljRNROEQRheblsHRpQu_HO_r +49SQm=uOp__4Hr9Q +Sju=Qpr_O4 +9;sjRf:ljRNROEQRheblsHRpQu__7jjr_H4S9 +m_=h6Sj +Qhj=__6jjs; +R:fjjNRlOQERhbeRsRHlQ_upOr_HjS9 +mu=Qp__OH9rj +jSQ=pQu_jOr9s; +R:fjjNRlOQERhbeRsRHlQ_up7jj__jHr9m +S=ch_gQ +Sj_=hcjg_;R sfjj:ROlNEhRQesRbHhlR__4cHm S=4h_c _HS=Qjhc_4;R -sfjj:ROlNEhRQesRbHplR7j1_jQj_h4a__SH -m_=hcS4 -Qhj=__c4js; -R:fjjNRlOQERhbeRsRHlh__UHm -S=Uh__SH +sfjj:ROlNEhRQesRbHqlR1d_jjj_jjY_1h4B__SH +m_=hdSg +Qhj=__dgjs; +R:fjjNRlOQERhbeRsRHlh6_4_SH +m_=h4H6_ +jSQ=4h_6s; +R:fjjNRlOQERhbeRsRHlhn_4_SH +m_=h4Hn_ +jSQ=4h_ns; +R:fjjNRlOQERhbeRsRHlh6_.c +_HShm=_c.6_SH +Qhj=_c.6;R +sfjj:ROlNEhRQesRbHhlR_d.n_SH +m_=h._ndHQ +Sj_=h.;nd +fsRjR:jlENOReQhRHbsl_Rh._6nHm +S=.h_6Hn_ +jSQ=.h_6 +n;sjRf:ljRNROEQRheblsHR4h_jH4_ +=Smhj_44 +_HS=Qjhj_44s; +R:fjjNRlOQERhbeRsRHlhj_4d +_HShm=_d4j_SH +Qhj=_d4j;R +sfjj:ROlNEhRQesRbHhlR_c4j_SH +m_=h4_jcHQ +Sj_=h4;jc +fsRjR:jlENOReQhRHbsl_Rh4_j6Hm +S=4h_jH6_ +jSQ=4h_j +6;sjRf:ljRNROEQRheblsHR4h_4H6_ +=Smh4_46 +_HS=Qjh4_46s; +R:fjjNRlOQERhbeRsRHlh4_4n +_HShm=_n44_SH +Qhj=_n44;R +sfjj:ROlNEhRQesRbHhlR_44d_SH +m_=h4_d4HQ +Sj_=h4;d4 +fsRjR:jlENOReQhRHbsl_Rh._((Hm +S=.h_(H(_ +jSQ=.h_( +(;sjRf:ljRNROEQRheblsHR#bF_ OD\M3kdNc_#d_jjj_8_HH_ +=Smhc_n +jSQ=nh_c;_j +fsRjR:jlENOReQhRHbslFRb#D_O k\3M_dcNj#_d8j_j__HFH._ +=Smh4_g +jSQ=gh_4;_j +fsRjR:jlENOReQhRHbslFRb#D_O k\3M_46O_D j_jj8__HH._F_SH +m_=hUS6 +Qhj=__U6Hs; +R:fjjNRlOQERhbeRsRHlb_F#O\D 36kM_NLoOj _dHj_M80__jH_ +=Smb_F#O\D 36kM_NLoOj _dHj_M80_ +jSQ=#bF_ OD\M3k6o_LN_O j_djH_M08;_H +fsRjR:jlENOReQhRHbslFRb#D_O q\3vqQt_1Az_q hA_p 7_vq]]Qt_Hd_ +=Smb_F#O\D 3QqvtAq_z 1_hpqA v_7qQ_]td]_ +jSQ=#bF_ OD\v3qQ_tqA_z1 Ahqp7 _v]q_Q_t]d;_j +fsRjR:jlENOReQhRHbslFRb#D_O q\3vqQt_1Az_q hA_p 7_vqp_mWd +_HSbm=FO#_D3 \qtvQqz_A1h_ q Ap_q7v_Wpm_Sd +Qbj=FO#_D3 \qtvQqz_A1h_ q Ap_q7v_Wpm_jd_;R +sfjj:ROlNEhRQesRbHblRFO#_D3 \)jW_j7j_vdq__SH +mF=b#D_O )\3Wj_jjv_7q +_dS=Qjb_F#O\D 3_)Wj_jj7_vqd;_j +fsRjR:jlENOReQhRHbsl7Rz1j_jj__OHm +S=1z7_jjj_HO_ +jSQ=1z7_jjj_ +O;sjRf:ljRNROEQRheblsHR1p7_jjj_HO_ +=Smp_71j_jjO +_HS=Qjp_71j_jjOs; +R:fjjNRlOQERhbeRsRHlb_F#O\D 3Z1Q v_7q__nj__jFH._r +j9Shm=_ +UnS=Qjhn_U_ +H;sjRf:ljRNROEQRheblsHR4h_.Hg_ +=Smh._4g +_HS=Qjh._4gs; +R:fjjNRlOQERhbeRsRHlhd_4j +_HShm=_j4d_SH +Qhj=_j4d;R +sfjj:ROlNEhRQesRbHhlR_(44_SH +m_=h4_4(HQ +Sj_=h4;4( +fsRjR:jlENOReQhRHbslvRqQ_tq7j1__Hj_ +=Smhn_c +jSQ=ch_n;_j +fsRjR:jlENOReQhRHbsl_Rh4_j(Hm +S=4h_jH(_ +jSQ=4h_j +(;sjRf:ljRNROEQRheblsHR#bF_ OD\Q31Z7 _vnq__jj__jHr9m +S=#bF_ OD\Q31Z7 _vnq_r +j9S=Qjb_F#O\D 3Z1Q v_7q__nj9rj;R +sfjj:ROlNEhRQesRbHhlR_n4j_SH +m_=h4_jnHQ +Sj_=h4;jn +fsRjR:jlENOReQhRHbslFRb#D_O 1\3Q_Z 7_vqn__jjr_H4S9 +mF=b#D_O 1\3Q_Z 7_vqn9r4 +jSQ=#bF_ OD\Q31Z7 _vnq__4jr9s; +R:fjjNRlOQERhbeRsRHlh__dHm +S=dh__SH Qhj=_ -U;sjRf:ljRNROEQRheblsHRqAtBji_dQj_h4a__SH -m_=hcS. -Qhj=__c.js; -R:fjjNRlOQERhbeRsRHlq__OH9rj -=Smq__OH9rj -jSQ=Oq_r;j9 -fsRjR:jlENOReQhRHbslQR1ZO __4Hr9m -S=Z1Q __OH9r4 -jSQ=Z1Q r_O4 -9;sjRf:ljRNROEQRheblsHRdh_6Hg_ -=Smh6_dg -_HS=Qjh6_dgs; -R:fjjNRlOQERhbeRsRHlb_F#O\D 3nkM_NLoOj _jjj__Hj_ -=Smb_F#O\D 3nkM_NLoOj _jSj -Qbj=FO#_D3 \k_MnLOoN j_jj;_j -fsRjR:jlENOReQhRHbsl_Rh._.jHm -S=.h_.Hj_ -jSQ=.h_. -j;sjRf:ljRNROEQRheblsHR.h_4Hg_ -=Smh4_.g -_HS=Qjh4_.gs; -R:fjjNRlOQERhbeRsRHlh._.. -_HShm=_..._SH -Qhj=_...;R -sfjj:ROlNEhRQesRbHhlR_4.._SH -m_=h._.4HQ -Sj_=h.;.4 -fsRjR:jlENOReQhRHbsl_Rh._.dHm -S=.h_.Hd_ -jSQ=.h_. -d;sjRf:ljRNROEQRheblsHR.h_jHg_ -=Smhj_.g -_HS=Qjhj_.gs; -R:fjjNRlOQERhbeRsRHlO_bkC_#0.__jj__jH9r4 -=SmO_bkC_#0.9r4 -jSQ=kOb_0C#_j._r;49 -fsRjR:jlENOReQhRHbsl_Rh._jnHm -S=.h_jHn_ -jSQ=.h_j -n;sjRf:ljRNROEQRheblsHR.h_jH6_ -=Smhj_.6 -_HS=Qjhj_.6s; -R:fjjNRlOQERhbeRsRHlb_F#O\D 3gkM_ OD_jjj__bCj__jHm -S=#bF_ OD\M3kgD_O j_jjC_b -jSQ=#bF_ OD\M3kgD_O j_jjC_b_ +d;sjRf:ljRNROEQRheblsHR_71j_jj7_vq4 +_HShm=_ +cdS=Qjhd_c_ +j;sjRf:ljRNROEQRheblsHRch__SH +m_=hc +_HS=Qjh;_c +fsRjR:jlENOReQhRHbsl1Rq_jjj_q7v_H4_ +=Smh._c +jSQ=ch_.;_j +fsRjR:jlENOReQhRHbslMRknl_NH_oNL_k#8NN0_s8H_SH +mM=knl_NH_oNL_k#8NN0_s8H_SH +Qkj=MNn_lNHo_#Lk_08NNH_8ss; +R:fjjNRlOQERhbeRsRHlk.M4_HNloLN_k8#_N_0N8_Hsl +_HSkm=M_4.NolHNk_L#N_808N_Hls__SH +Qkj=M_4.NolHNk_L#N_808N_Hls_;R +sfjj:ROlNEhRQesRbHqlRvqQt_1Az_a7qqQ_7)P_H_SH +mv=qQ_tqA_z17qqa_)7Q_SO +Qqj=vqQt_1Az_a7qqQ_7)__Ojs; +R:fjjNRlOQERhbeRsRHlh._._SH +m_=h.H._ +jSQ=.h_.s; +R:fjjNRlOQERhbeRsRHlqtvQqz_A1h_ q Ap_q7v_t]Q]__4Hm +S=dh_4Q +Sj_=hdj4_;R +sfjj:ROlNEhRQesRbHhlR__.4Hm +S=.h_4 +_HS=Qjh4_.;R +sfjj:ROlNEhRQesRbHqlRvqQt_1Az_q hA_p 7_vqp_mW4 +_HShm=_ +d.S=Qjh._d_ +j;sjRf:ljRNROEQRheblsHR4h_g +_HShm=__4gHQ +Sj_=h4 +g;sjRf:ljRNROEQRheblsHR_qj7_vq4 +_HShm=_ +dcS=Qjhc_d_ j;sjRf:ljRNROEQRheblsHR4h_U _HShm=__4UHQ Sj_=h4 -U;sjRf:ljRNROEQRheblsHRqev_aQh_H4_ -=Smh(_d -jSQ=dh_(;_j -fsRjR:jlENOReQhRHbslvR1_Qqvt#q_s##0_jH__Fj_.r_HdS9 -m_=h4 -(4S=Qjh(_44;_H -fsRjR:jlENOReQhRHbsl_Rhd_6cHm -S=dh_6Hc_ -jSQ=dh_6 -c;sjRf:ljRNROEQRheblsHR4kM__71j_jj Ahqpj __l#Jk_GNjd_F_Fj_d -_HSkm=M74_1j_jjh_ q Ap_#j_JGlkNQ -SjM=k41_7_jjj_q hA_p jJ_#lNkG_ -j;sjRf:ljRNROEQRheblsHR_71j_jj Ahqp4 __l#Jk_GNH__jHm -S=nh_nQ -Sj_=hnjn_;R -sfjj:ROlNEhRQesRbHzlR7j1_jQj_hHa_ -=Smz_71j_jjQ_haHQ -Sj7=z1j_jjh_Qas; -R:fjjNRlOQERhbeRsRHlk_M4z_71j_jjQ_haHm -S=4kM_1z7_jjj_aQh -jSQ=4kM_1z7_jjj_aQh_ -j;sjRf:ljRNROEQRheblsHR1p7_jjj_aQh_SH -m7=p1j_jjh_Qa -_HS=Qjp_71j_jjQ;ha -fsRjR:jlENOReQhRHbslMRk47_p1j_jjh_Qa -_HSkm=Mp4_7j1_jQj_hSa -Qkj=Mp4_7j1_jQj_hja_;R -sfjj:ROlNEhRQesRbHhlR_n4g_SH -m_=h4_gnHQ -Sj_=h4;gn -fsRjR:jlENOReQhRHbslvR1_Qqvt#q_s##0_jH__Fj_.r_HcS9 -m_=h4 -UdS=QjhU_4d;_j -fsRjR:jlENOReQhRHbslvR1_Qqvt#q_s##0_HH__FH_.r_H.S9 -m_=h4 -U.S=QjhU_4.;_j -fsRjR:jlENOReQhRHbslMRk6__Cj__HFj.__SH -m_=h4 -UjS=QjhU_4j;_j -fsRjR:jlENOReQhRHbslMRk6__Cj__HFH._ -=Smh(_4UQ -Sj_=h4_(Ujs; -R:fjjNRlOQERhbeRsRHlO_bkC_#0.__jj__jFH._r -.9Shm=_6d4 -jSQ=dh_4H6_;R -sfjj:ROlNEhRQesRbHhlR_4d6_SH -m_=hd_64HQ -Sj_=hd;64 -fsRjR:jlENOReQhRHbsl1R)ap_7Y._C_jH___F.Hm -S=4h_6Sc -Qhj=_c46_ -j;sjRf:ljRNROEQRheblsHR4h_6H6__Fj_.__HFH.___F.Hm -S=4h_cSg -Qhj=_g4c_ -H;sjRf:ljRNROEQRheblsHR.h_.HU_ -=Smh._.U -_HS=Qjh._.Us; -R:fjjNRlOQERhbeRsRHlh4_.d -_HShm=_d.4_SH -Qhj=_d.4;R -sfjj:ROlNEhRQesRbHhlR_..4_SH -m_=h._4.HQ -Sj_=h.;4. -fsRjR:jlENOReQhRHbsl_Rhd_6(Hm -S=dh_6H(_ -jSQ=dh_6 -(;sjRf:ljRNROEQRheblsHRkOb_0C#_j.__jj__.Hr9m -S=kOb_0C#_..r9Q -Sjb=Ok#_C0__.j9r.;R -sfjj:ROlNEhRQesRbHhlR_U.j_SH -m_=h._jUHQ -Sj_=h.;jU -fsRjR:jlENOReQhRHbsl_Rh._4jHm -S=.h_4Hj_ -jSQ=.h_4 -j;sjRf:ljRNROEQRheblsHR.h_4H4_ -=Smh4_.4 -_HS=Qjh4_.4s; -R:fjjNRlOQERhbeRsRHlk_M41qv_vqQt_#j_JGlkN__4j__4Hm -S=4kM__1vqtvQq__j#kJlG4N_ -jSQ=4kM__1vqtvQq__j#kJlG4N__ -j;sjRf:ljRNROEQRheblsHR_)WO -_HS)m=W__OHQ -SjW=)_ -O;sjRf:ljRNROEQRheblsHR#bF_ OD\W3)_jjj_aQh_H6___NdH -_HShm=_4d4 -jSQ=dh_4j4_;R -sfjj:ROlNEhRQesRbHhlR_ndd_SH -m_=hd_dnHQ -Sj_=hd;dn -fsRjR:jlENOReQhRHbsl_Rh._ccHm -S=.h_cHc_ -jSQ=.h_c -c;sjRf:ljRNROEQRheblsHRkOb_0C#_H.__jj___F.H9rd -=Smh4_dcQ -Sj_=hd_4cjs; -R:fjjNRlOQERhbeRsRHle_vqQ_haHm -S=qev_aQh_SH -Qej=vQq_h -a;sjRf:ljRNROEQRheblsHRdh_6H._ -=Smh6_d. -_HS=Qjh6_d.s; -R:fjjNRlOQERhbeRsRHlh6_dd -_HShm=_dd6_SH -Qhj=_dd6;R -sfjj:ROlNEhRQesRbHhlR_d.g_SH -m_=h._gdHQ -Sj_=h.;gd -fsRjR:jlENOReQhRHbslvR1_Qqvt#q_s##0_jH__Fj_.__jH9rd -=Smh(_4nQ -Sj_=h4_(nHs; -R:fjjNRlOQERhbeRsRHlhg_4U -_HShm=_U4g_SH -Qhj=_U4g;R -sfjj:ROlNEhRQesRbHhlR_(4g_SH -m_=h4_g(HQ -Sj_=h4;g( -fsRjR:jlENOReQhRHbsl_Rh4Hn_ -=Smhn_4_SH -Qhj=_;4n -fsRjR:jlENOReQhRHbslWR)_jjj_aQh_H4_ -=Smhg_d -jSQ=dh_g;_j -fsRjR:jlENOReQhRHbsluReq__OHm -S=qeu_HO_ -jSQ=qeu_ -O;sjRf:ljRNROEQRheblsHRqeu_j7__SH -m_=h6S. -Qhj=__6.js; -R:fjjNRlOQERhbeRsRHl7Baqi__OHm -S=q7aBOi__SH -Q7j=aiqB_ -O;sjRf:ljRNROEQRheblsHRq7aB7i_j__jHm -S=6h_dQ -Sj_=h6jd_;R -sfjj:ROlNEhRQesRbHOlRbCk_#H0_r -.9SOm=bCk_#H0_r -.9S=QjO_bkCr#0. -9;sjRf:ljRNROEq.h7RHbslbROk#_C0__.H__jjd_Nr -d9Shm=_4.4 -jSQ=dh_4Sc -QO4=bCk_#H0_r;.9 -fsRjR:jlENOReQhRHbslbROk#_C0__jds_3 -=SmO_bkC_#0j__d3dkM -jSQ=4h_c -g;sjRf:ljRNROEq.h7RHbslbROk#_C0__jdl_3 -=SmO_bkC_#0j__d34kM -jSQ=kOb_0C#r -d9S=Q4hc_4gs; -R:fjjNRlOqERhR7.blsHRkOb_0C#_dj__ -3MSOm=bCk_#j0__3d_k -MjS=QjhU_4g -_HS=Q4O_bkC_#0j__d3dkM;R -sfjj:ROlNE)Rm.sRbHOlRbCk_#j0__3d_bm -S=4h_dQ -Sjb=Ok#_C0__jdk_3MS4 -QO4=bCk_#j0__3d_k;Mj -fsRjR:jlENOR7qh.sRbH7lRaiqB__7jjm -S=6h_d -_jS=Qj7Baqi__OHQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbHelRu7q__Sj -m_=h6j._ -jSQ=a)1_SO -Qe4=uOq__ -H;sjRf:ljRNROEq.h7RHbslWR)_jjj_aQh_S4 -m_=hdjg_ +U;sjRf:ljRNROEQRheblsHR_)Wj_jj7_vq4 +_HShm=_ +d6S=Qjh6_d_ +j;sjRf:ljRNROEQRheblsHR4h_jHU_ +=Smhj_4U +_HS=Qjhj_4Us; +R:fjjNRlOQERhbeRsRHlh4_44 +_HShm=_444_SH +Qhj=_444;R +sfjj:ROlNEhRQesRbH)lR17a_pCY_.__H. +_HShm=_6.n_S. +Qhj=_6.n_j._;R +sfjj:ROlNEhRQesRbHelRuOq__SH +mu=eq__OHQ +Sju=eq;_O +fsRjR:jlENOReQhRHbsluReq__7j +_HShm=_ +6.S=Qjh._6_ +j;sjRf:ljRNROEQRheblsHRq7aBOi__SH +ma=7q_BiO +_HS=Qj7Baqi;_O +fsRjR:jlENOReQhRHbslaR7q_Bi7jj__SH +m_=hcSU +Qhj=__cUjs; +R:fjjNRlOQERhbeRsRHlb_F#O\D 3ckM_NLoOj _jHj_ +=Smb_F#O\D 3ckM_NLoOj _jHj_ +jSQ=#bF_ OD\M3kco_LN_O j;jj +fsRjR:jlENOReQhRHbslFRb#D_O k\3MLn_o NO_jjj_SH +mF=b#D_O k\3MLn_o NO_jjj +jSQ=#bF_ OD\M3kno_LN_O j_jjjs; +R:fjjNRlOQERhbeRsRHlh__(Hm +S=(h__SH +Qhj=_ +(;sjRf:ljRNROEQRheblsHRqAtBji_dQj_h4a__SH +m_=hcS4 +Qhj=__c4js; +R:fjjNRlOQERhbeRsRHlb_F#O\D 34kM_NLoOj _dHj_MH0_ +=Smb_F#O\D 34kM_NLoOj _dHj_MS0 +Qbj=FO#_D3 \k_M4LOoN d_jjM_H0;_j +fsRjR:jlENOReQhRHbsl_Rt4_.4Hm +S=#bF_ OD\M3k4O._DF _kH0_MS0 +Qbj=FO#_D3 \k.M4_ OD_0Fk_0HM_ +j;sjRf:ljRNROEQRheblsHR4t_4Hn_ +=Smb_F#O\D 3dkM +jSQ=#bF_ OD\M3kd;_j +fsRjR:jlENOReQhRHbsl_Rt4_44Hm +S=#bF_ OD\M3k4L6_o NO_jjd_0HM +jSQ=#bF_ OD\M3k4L6_o NO_jjd_0HM_ +H;sjRf:ljRNROEQRheblsHRgh_U +_HShm=__gUHQ +Sj_=hg +U;sjRf:ljRNROEQRheblsHR#bF_ OD\M3kdO4_Dj _jMj_C__Hjm +S=#bF_ OD\M3kdO4_Dj _jMj_CQ +SjF=b#D_O k\3M_d4O_D j_jjMHC_;R +sfjj:ROlNEhRQesRbHhlR_44._SH +m_=h4_.4HQ +Sj_=h4;.4 +fsRjR:jlENOReQhRHbsl_Rh4_.jHm +S=4h_.Hj_ +jSQ=4h_. +j;sjRf:ljRNROEQRheblsHR4h_.H6_ +=Smh._46 +_HS=Qjh._46s; +R:fjjNRlOQERhbeRsRHlh._4c +_HShm=_c4._SH +Qhj=_c4.;R +sfjj:ROlNEhRQesRbH)lR a1 _amz_j.__SH +m_=h6Sd +Qhj=__6djs; +R:fjjNRlOQERhbeRsRHlhd_4c +_HShm=_c4d_SH +Qhj=_c4d;R +sfjj:ROlNEhRQesRbH)lR17a_pCY_.__HFH._ +=Smh(_.jQ +Sj_=h._(jjs; +R:fjjNRlOQERhbeRsRHl)_1a7_pYCH.___F.j +_HShm=_ +((S=Qjh(_(_ +H;sjRf:ljRNROEQRheblsHR_1vqtvQqs_##_0#H__jFH._r +j9Shm=_ +U(S=Qjh(_U_ +H;sjRf:ljRNROEQRheblsHR4h_4H._ +=Smh4_4. +_HS=Qjh4_4.s; +R:fjjNRlOQERhbeRsRHlh4_4d +_HShm=_d44_SH +Qhj=_d44;R +sfjj:ROlNEhRQesRbHhlR_c44_SH +m_=h4_4cHQ +Sj_=h4;4c +fsRjR:jlENOReQhRHbsl_Rh4_jgHm +S=4h_jHg_ +jSQ=4h_j +g;sjRf:ljRNROEQRheblsHR4h_4HU_ +=Smh4_4U +_HS=Qjh4_4Us; +R:fjjNRlOQERhbeRsRHlh6_.6 +_HShm=_6.6_SH +Qhj=_6.6;R +sfjj:ROlNEhRQesRbHhlR_(.6_SH +m_=h._6(HQ +Sj_=h.;6( +fsRjR:jlENOReQhRHbslbROk#_C0__.j__jH9r. +=SmO_bkC_#0.9r. +jSQ=kOb_0C#_j._r;.9 +fsRjR:jlENOReQhRHbsl_Rh._6UHm +S=.h_6HU_ +jSQ=.h_6 +U;sjRf:ljRNROEQRheblsHR.h_6Hg_ +=Smh6_.g +_HS=Qjh6_.gs; +R:fjjNRlOQERhbeRsRHlO_bkC_#0.__jjr_H4S9 +mb=Ok#_C0r_.4S9 +QOj=bCk_#.0__4jr9s; +R:fjjNRlOQERhbeRsRHlhn_.. +_HShm=_..n_SH +Qhj=_..n;R +sfjj:ROlNEhRQesRbHhlR_4.n_SH +m_=h._n4HQ +Sj_=h.;n4 +fsRjR:jlENOReQhRHbslFRb#D_O k\3MOg_Dj _jbj_C__jHm +S=#bF_ OD\M3kgD_O j_jjC_b +jSQ=#bF_ OD\M3kgD_O j_jjC_b_ +j;sjRf:ljRNROEQRheblsHRkOb_0C#_H.__Fj_.r_HdS9 +m_=h. +64S=Qjh6_.4;_H +fsRjR:jlENOReQhRHbslMRk6__CH._F_SH +m_=h. +6.S=Qjh6_..;_j +fsRjR:jlENOReQhRHbslpRBij_jj _h_Fj_d__HFH._ +=Smhn_( +jSQ=(h_n;_H +fsRjR:jlENOReQhRHbsl_Rh4H(_ +=Smh(_4_SH +Qhj=_;4( +fsRjR:jlENOReQhRHbslvReqh_Qa__4Hm +S=dh_nQ +Sj_=hdjn_;R +sfjj:ROlNEhRQesRbH7lR1j_jjh_ q Ap_#j_JGlkN__jFHd_ +=Smh6_4(Q +Sj_=h4_6(Hs; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_##s0H#___FdH9rc +=Smhn_4jQ +Sj_=h4_njjs; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_##s0H#___FdH9r. +=Smhn_44Q +Sj_=h4_n4js; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_##s0H#___FdH9rn +=Smhn_4.Q +Sj_=h4_n.js; +R:fjjNRlOQERhbeRsRHlhn_46 +_HShm=_64n_SH +Qhj=_64n;R +sfjj:ROlNEhRQesRbHhlR_(4n_SH +m_=h4_n(HQ +Sj_=h4;n( +fsRjR:jlENOReQhRHbsl_Rh4_nnHm +S=4h_nHn_ jSQ=4h_n +n;sjRf:ljRNROEQRheblsHR4h_nHU_ +=Smhn_4U +_HS=Qjhn_4Us; +R:fjjNRlOQERhbeRsRHlh(_4j +_HShm=_j4(_SH +Qhj=_j4(;R +sfjj:ROlNEhRQesRbHhlR_c4n_SH +m_=h4_ncHQ +Sj_=h4;nc +fsRjR:jlENOReQhRHbsl_Rh4_j.Hm +S=4h_jH._ +jSQ=4h_j +.;sjRf:ljRNROEQRheblsHR_1vqtvQqs_##_0#Hc_F_HH_r +49Shm=_c.n +jSQ=.h_nHc_;R +sfjj:ROlNEhRQesRbHklRM14_vv_qQ_tqjJ_#lNkG_j4___FdH._F_SH +m_=h(Sg +Qhj=__(gHs; +R:fjjNRlOQERhbeRsRHlB_pij_jjuj ___FdH._F_SH +m_=h(SU +Qhj=__(UHs; +R:fjjNRlOQERhbeRsRHlh4_4g +_HShm=_g44_SH +Qhj=_g44;R +sfjj:ROlNEhRQesRbHklRMp4_7j1_jQj_hHa_ +=Smk_M4p_71j_jjQ +haS=Qjk_M4p_71j_jjQ_hajs; +R:fjjNRlOQERhbeRsRHlhd_._SH +m_=h.Hd_ +jSQ=.h_ds; +R:fjjNRlOQERhbeRsRHlAjt_j4j__SH +m_=hdSj +Qhj=__djjs; +R:fjjNRlOQERhbeRsRHlhj_._SH +m_=h.Hj_ +jSQ=.h_js; +R:fjjNRlOQERhbeRsRHlz_71j_jjQ_ha4 +_HShm=_ +ddS=Qjhd_d_ +j;sjRf:ljRNROEQRheblsHR4h_d +_HShm=__4dHQ +Sj_=h4 +d;sjRf:ljRNROEQRheblsHR1p7_jjj_aQh_H4_ +=Smhj_c +jSQ=ch_j;_j +fsRjR:jlENOReQhRHbsluRQp__OH9r. +=SmQ_upOr_H.S9 +QQj=uOp_r;.9 +fsRjR:jlENOReQhRHbsluRQpj_7_Hj_r +.9Shm=_ +64S=Qjh4_6_ +j;sjRf:ljRNROEQRheblsHR.h_n +_HShm=__.nHQ +Sj_=h. +n;sjRf:ljRNROEQRheblsHRpQu_jjd_H4_r +.9Shm=_ +.gS=Qjhg_._ +j;sjRf:ljRNROEQRheblsHROq__jHr9m +S=Oq__jHr9Q +Sj_=qO9rj;R +sfjj:ROlNEhRQesRbH1lRQ_Z Or_H4S9 +mQ=1ZO __4Hr9Q +SjQ=1ZO _r;49 +fsRjR:jlENOReQhRHbsl1R7_jjj_q hA_p jJ_#lNkG_H4_ +=Sm7j1_j j_hpqA __j#kJlG4N__SH +Q7j=1j_jjh_ q Ap_#j_JGlkN;_4 +fsRjR:jlENOReQhRHbslMRk41_7_jjj_q hA_p jJ_#lNkG_jH_ +=Smk_M47j1_j j_hpqA __j#kJlGSN +Qkj=M74_1j_jjh_ q Ap_#j_JGlkN;_H +fsRjR:jlENOReQhRHbsltRA_jjd_HO_ +=SmAjt_dOj__SH +QAj=td_jj;_O +fsRjR:jlENOReQhRHbslFRb#D_O k\3MLn_od_jj +_HSbm=FO#_D3 \k_MnLjo_dHj_ +jSQ=#bF_ OD\M3kno_L_jjd;R +sfjj:ROlNEhRQesRbHblRFO#_D3 \k_MgLjo_dHj_ +=Smb_F#O\D 3gkM__Loj +djS=Qjb_F#O\D 3gkM__Loj_djjs; +R:fjjNRlOQERhbeRsRHlz_71j_jjQ_haHm +S=1z7_jjj_aQh_SH +Qzj=7j1_jQj_h +a;sjRf:ljRNROEQRheblsHR4kM_1z7_jjj_aQh_SH +mM=k47_z1j_jjh_QaQ +SjM=k47_z1j_jjh_Qa;_j +fsRjR:jlENOReQhRHbsl7Rp1j_jjh_Qa +_HSpm=7j1_jQj_hHa_ +jSQ=1p7_jjj_aQh;R +sfjj:ROlNEhRq7b.RsRHlk_M4z_71j_jjQ +haSkm=Mz4_7j1_jQj_hja_ +jSQ=_71j_jj AhqpS +Qz4=7j1_jQj_hHa_;R +sfjj:ROlNEhRq7b.RsRHl7j1_j j_hpqA +_4Shm=_ +6cS=Qjh +_US=Q4)_1aOs; +R:fjjNRlOQERhbeRsRHlAjt_jjj_3Ss +mt=A_jjj_kj3MSd +Qbj=FO#_D3 \k_MgLjo_d +j;sjRf:ljRNROEq.h7RHbsltRA_jjj_lj3 +=SmAjt_jjj_34kM +jSQ=_Atj_djOQ +S4F=b#D_O k\3MLg_od_jjs; +R:fjjNRlOqERhR7.blsHR_Atj_jjj +3MSAm=tj_jj3_jk +MjS=QjAjt_jOj_ +4SQ=_Atj_jjjM3kds; +R:fjjNRlOmER)b.RsRHlAjt_jjj_3Sb +m_=h.Sd +QAj=tj_jj3_jk +M4S=Q4Ajt_jjj_3jkM;R +sfjj:ROlNEhRQesRbHzlR7j1_jQj_hja_3Ss +m7=z1j_jjh_Qa3_jk +MdS=Qj1qv_vqQtr;n9 +fsRjR:jlENOR7qh.sRbHzlR7j1_jQj_hja_3Sl +m7=z1j_jjh_Qa3_jk +M4S=Qjqr_OjS9 +Q14=vv_qQrtqn +9;sjRf:ljRNROEq.h7RHbsl7Rz1j_jjh_Qa3_jMm +S=1z7_jjj_aQh_kj3MSj +Qzj=7j1_jQj_hSa +Qz4=7j1_jQj_hja_3dkM;R +sfjj:ROlNE)Rm.sRbHzlR7j1_jQj_hja_3Sb +m_=h.Sj +Qzj=7j1_jQj_hja_34kM +4SQ=1z7_jjj_aQh_kj3M +j;sjRf:ljRNROEQRheblsHR1p7_jjj_aQh_sj3 +=Smp_71j_jjQ_hajM3kdQ +Sjv=1_Qqvtnqr9s; +R:fjjNRlOqERhR7.blsHR1p7_jjj_aQh_lj3 +=Smp_71j_jjQ_hajM3k4Q +SjF=b#D_O k\3M_4j#Nl_lNHo_SH +Q14=vv_qQrtqn +9;sjRf:ljRNROEq.h7RHbsl7Rp1j_jjh_Qa3_jMm +S=1p7_jjj_aQh_kj3MSj +Qpj=7j1_jQj_hSa +Qp4=7j1_jQj_hja_3dkM;R +sfjj:ROlNE)Rm.sRbHplR7j1_jQj_hja_3Sb +m_=h4Sd +Qpj=7j1_jQj_hja_34kM +4SQ=1p7_jjj_aQh_kj3M +j;sjRf:ljRNROEQRheblsHR_71j_jj Ahqpj _3Ss +m1=7_jjj_q hA_p jM3kdQ +Sj1=7_jjj_q hA_p 4J_#lNkG;R +sfjj:ROlNEhRq7b.RsRHl7j1_j j_hpqA 3_jlm +S=_71j_jj Ahqpj _34kM +jSQ=_71j_jj AhqpS +Q74=1j_jjh_ q Ap_#4_JGlkNs; +R:fjjNRlOqERhR7.blsHR_71j_jj Ahqpj _3SM +m1=7_jjj_q hA_p jM3kjQ +SjM=k41_7_jjj_q hA_p jJ_#lNkG +4SQ=_71j_jj Ahqpj _3dkM;R +sfjj:ROlNE)Rm.sRbH7lR1j_jjh_ q Ap_bj3 +=Smh +_US=Qj7j1_j j_hpqA 3_jk +M4S=Q47j1_j j_hpqA 3_jk;Mj +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_MgLjo_dSj +mF=b#D_O k\3MLg_od_jj +_jS=QjAjt_dOj__SH +Qb4=FO#_D3 \k_MnLjo_dHj_;R +sfjj:ROlNEhRQesRbHklRMN4_lNHo_#Lk_NCML_DCD_FIHm +S=4kM_HNloLN_kC#_MDNLCF_DI +_HS=Qjk_M4NolHNk_L#M_CNCLD_IDF;R +sfjj:ROlNEhRQesRbHklRM_.4V_bkOH#_ +=Smk4M._kVb__O#HQ +SjM=k.V4_bOk_#s; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_dHr9m +S=_1vqtvQqr_HdS9 +Q1j=vv_qQrtqd +9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_NH_c9rd +=Smhn_4nQ +Sj_=h4 +6(S=Q41qv_vqQt_dHr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#Hc_Nr +.9Shm=_64n +jSQ=4h_nS4 +Q14=vv_qQ_tqH9r.;R +sfjj:ROlNEhRQesRbH1lRvv_qQ_tqH9r. +=Sm1qv_vqQt_.Hr9Q +Sjv=1_Qqvt.qr9s; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_4Hr9m +S=_1vqtvQqr_H4S9 +Q1j=vv_qQrtq4 +9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_NH_c9r4 +=Smhn_4cQ +Sjv=1_QqvtHq_r +49S=Q41qv_vqQt_.Hr9s; +R:fjjNRlOqERhR7.blsHR4kM__71j_jj Ahqpj __l#Jk +GNSkm=M74_1j_jjh_ q Ap_#j_JGlkN +_HS=Qj7j1_j j_hpqA __j#kJlG4N__SH +Qh4=_(46;R +sfjj:ROlNEmRX)b.RsRHlt._4cm +S=.h_.Sn +QQj=u7p_j9r. +4SQ=pQu_.Or9s; +R:fjjNRlOQERhbeRsRHlQ_upj_djj__.3Ss +mu=Qpd_jj__j.k_3MSd +Qbj=FO#_D3 \H;bD +fsRjR:jlENOR7qh.sRbHQlRujp_djj__3._lm +S=pQu_jjd_.j__M3k4Q +Sju=Qpr_O.S9 +Qb4=FO#_D3 \H;bD +fsRjR:jlENOR7qh.sRbHQlRujp_djj__3._Mm +S=pQu_jjd_.j__M3kjQ +Sju=Qpd_jjr_O.S9 +QQ4=ujp_djj__3._k;Md +fsRjR:jlENOR.m)RHbsluRQpd_jj__j.b_3 +=Smhn_. +jSQ=pQu_jjd_.j__M3k4Q +S4u=Qpd_jj__j.k_3M +j;sjRf:ljRNROEq.h7RHbsluRQpd_jjr_4.S9 +m_=h.jg_ +jSQ=.h_n +_HS=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHRpQu__7jj9r. +=Smh4_6_Sj +QQj=uOp__.Hr9Q +S41=)a;_O +fsRjR:jlENOR7qh.sRbHplR7j1_jQj_h4a_ +=Smhj_c_Sj +Qhj=__4dHQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbHzlR7j1_jQj_h4a_ +=Smhd_d_Sj +Qhj=__.jHQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbHAlRtj_jj +_4Shm=__djjQ +Sj_=h.Hd_ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbslMRk47_p1j_jjh_Qam +S=4kM_1p7_jjj_aQh_Sj +Q7j=1j_jjh_ q Ap +4SQ=1p7_jjj_aQh_ +H;sjRf:ljRNROEq.h7RHbsl1Rq_jjj_aQh_Hj_ +=Smhn_.U +_HS=Qjh4_4U +_HS=Q4h4_4g;_H +fsRjR:jlENOReQhRHbslpRBij_jj__7H9rj +=SmB_pij_jj7r_HjS9 +QBj=pji_j7j_r;j9 +fsRjR:jlENOR7qh.sRbHBlRpji_juj_ __jFHd__ +F.Shm=__(UHQ +Sjp=Bij_jjr_7jS9 +QB4=pji_j7j__4Hr9s; +R:fjjNRlOqERhR7.blsHR4kM__1vqtvQq__j#kJlG4N__Fj_d__HFS. +m_=h(Hg_ +jSQ=(h_U +_HS=Q41qv_vqQtr;n9 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__HFHc_r +49Shm=_c.n_SH +Qhj=_ +(US=Q4hj_4.;_H +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__HFndr9m +S=4h_nj._ +jSQ=Uh_6 +_HS=Q41qv_vqQt_HH_r;(9 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__HF.dr9m +S=4h_nj4_ +jSQ=_1vqtvQq9rd +4SQ=#bF_ OD\M3kdO4_Dj _jMj_Cs; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_6Hr9m +S=_1vqtvQqr_H6S9 +Q1j=vv_qQrtq6 +9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_FH_d9rc +=Smhn_4j +_jS=Qjhn_(_SH +Q14=vv_qQrtq6 +9;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q hA_p jJ_#lNkG_Fj_dm +S=4h_6H(_ +jSQ=(h_U +_HS=Q41qv_vqQtr;c9 +fsRjR:jlENOReQhRHbslvR1_QqvtHq_r +n9S1m=vv_qQ_tqH9rn +jSQ=_1vqtvQq9rn;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__rNcnS9 +m_=h4 +(jS=Qjhn_4.Q +S4v=1_QqvtHq_r;n9 +fsRjR:jlENOReQhRHbslvR1_QqvtHq_r +c9S1m=vv_qQ_tqH9rc +jSQ=_1vqtvQq9rc;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__rNccS9 +m_=h4 +nUS=Qjhn_4jQ +S4v=1_QqvtHq_r;c9 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__HNjc_r +d9Shm=_(4n +jSQ=(h_n +_HS=Q4b_F#O\D 3dkM4D_O j_jjC_M;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0.__Hjd_Nr +d9Shm=_6.6 +jSQ=.h_6S4 +QO4=bCk_#.0r9s; +R:fjjNRlOQERhbeRsRHlO_bkC_#0H9r. +=SmO_bkC_#0H9r. +jSQ=kOb_0C#r;.9 +fsRjR:jlENOR7qh.sRbHklRMC6__NH_d +_jShm=_ +4nS=QjO_bkCr#04S9 +QO4=bCk_#H0_r;.9 +fsRjR:jlENOR7qh.sRbHklRMC6__NH_dm +S=.h_6Sc +Qhj=_..6 +4SQ=kOb_0C#r;.9 +fsRjR:jlENOR)Xm.sRbHOlRbCk_#j0_r +j9Shm=_6.c +jSQ=(h_nQ +S4b=Ok#_C09rj;R +sfjj:ROlNEhRQesRbHQlR_j.. +=Smqj1_dHj_ +jSQ=_q1j_djOs; +R:fjjNRlOqERhR7.blsHR_71j_jj Ahqp4 __l#Jk +GNS7m=1j_jjh_ q Ap_#4_JGlkNQ +Sj1=q_jjd_SH +Qk4=M74_1j_jjh_ q Ap_#j_JGlkN;_H +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__HFHc__rN.4S9 +m_=h4 +j.S=Qjhn_( +4SQ=_1vqtvQqr_H. +9;sjRf:ljRNROEQRheblsHR_1vqtvQq__HH9r( +=Sm1qv_vqQt_HH_r +(9S=Qj1qv_vqQt_(Hr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M#__HH__jNj.r9m +S=4h_jSd +Qhj=_ +U6S=Q41qv_vqQt_HH_r;(9 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqM_##H__Hj._N_jjr9m +S=4h_jSc +Qhj=__(UHQ +S4v=1_Qqvtjqr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jN6.r9m +S=4h_jS6 +Qhj=_ +(gS=Q41qv_vqQt_6Hr9s; +R:fjjNRlOQERhbeRsRHlqj1_jQj_hHa_ +=Smqj1_jQj_hHa_ +jSQ=_q1j_jjQ;ha +fsRjR:jlENOR7qh.sRbHqlR1j_jjh_Qa__jH._N +=Smh4_4UQ +Sj1=q_jjj_aQh_SH +Qh4=_c.(;R +sfjj:ROlNEhRq7b.RsRHlqj1_jQj_hja__NH_. +_jShm=_g44 +jSQ=(h_g _HS=Q4)_1aOs; -R:fjjNRlOQERhbeRsRHl)jW_jQj_hja_3Ss -mW=)_jjj_aQh_kj3MSd -Qkj=M14_vv_qQ_tqjJ_#lNkG_ -4;sjRf:ljRNROEq.h7RHbslWR)_jjj_aQh_lj3 -=Sm)jW_jQj_hja_34kM -jSQ=dh_4S4 -Qk4=M14_vv_qQ_tqjJ_#lNkG_ -4;sjRf:ljRNROEq.h7RHbslWR)_jjj_aQh_Mj3 -=Sm)jW_jQj_hja_3jkM -jSQ=_)Wj_jjQ -haS=Q4)jW_jQj_hja_3dkM;R -sfjj:ROlNE)Rm.sRbH)lRWj_jjh_Qa3_jbm -S=4h_nQ -SjW=)_jjj_aQh_kj3MS4 -Q)4=Wj_jjh_Qa3_jk;Mj -fsRjR:jlENOReQhRHbslMRk4l_NH_oNL_k#CLMNDDC_FHI_ -=Smk_M4NolHNk_L#M_CNCLD_IDF_SH -Qkj=MN4_lNHo_#Lk_NCML_DCD;FI -fsRjR:jlENOReQhRHbslMRk.V4_bOk_# -_HSkm=M_.4V_bkOH#_ -jSQ=.kM4b_Vk#_O;R -sfjj:ROlNEhRQesRbH1lRvv_qQ_tqHr_H(S9 -mv=1_QqvtHq__(Hr9Q -Sjv=1_QqvtHq_r;(9 -fsRjR:jlENOR7qh.sRbHklRM14_vv_qQ_tqjJ_#lNkG_j4__F4_dm -S=4h_(H6_ -jSQ=.h_gHd_ -4SQ=_1vqtvQqr_H( -9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MOg_Dj _jbj_C__jj._F -=Smh6_4g -_HS=QjO_bkC_#0H9r4 -4SQ=kOb_0C#_.Hr9s; -R:fjjNRlOQERhbeRsRHlO_bkC_#0H9rd -=SmO_bkC_#0H9rd -jSQ=kOb_0C#r;d9 -fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__jH__Fj_.9rd -=Smh4_dc -_jS=QjO_bkCr#0dS9 -QO4=bCk_#H0_r;j9 -fsRjR:jlENOR7qh.sRbHOlRbCk_#j0__Gj_.r_jjS9 -m_=hgH4__SH -Qhj=_c.c_SH -Qh4=_ndd_ -H;sjRf:ljRNROEq.h7RHbslFRb#D_O )\3Wj_jjh_Qa__6Hd_N_SH -m_=hd_44jQ -Sj_=h4_(6HQ -S4W=)_HO_;R -sfjj:ROlNEhRq7b.RsRHlk_M41qv_vqQt_#j_JGlkN__4j -_4Skm=M14_vv_qQ_tqjJ_#lNkG_j4_ -jSQ=4h_nSj -Qh4=_64(_ -H;sjRf:ljRNROEq.h7RHbslbROk#_C0__.H__jj9rd -=SmhU_4g -_HS=Qjh4_.j -_HS=Q4h4_.4;_H -fsRjR:jlENOReQhRHbslaR7q_Bi7Hj_ -=Sm7Baqij_7_SH -Q7j=aiqB_;7j -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hj__jNj._r -d9Shm=_dd6 -jSQ=q7aB7i_j -_HS=Q4e_uq7s; R:fjjNRlOQERhbeRsRHle_uq7 _HSem=u7q__SH Qej=u7q_;R -sfjj:ROlNEhRq7b.RsRHlO_bkC_#0j__jGj.___Ndj9rj -=Smhc_.cQ -Sj_=h4_cgHQ -S4b=Ok#_C09rj;R -sfjj:ROlNEhRQesRbHOlRbCk_#H0_r -j9SOm=bCk_#H0_r -j9S=QjO_bkCr#0j -9;sjRf:ljRNROEq.h7RHbslbROk#_C0__jj._G_Nj_d9rj -=Smhd_dnQ -Sj_=h4 -cgS=Q4O_bkC_#0H9rj;R -sfjj:ROlNEhRq7b.RsRHlO_bkC_#0.__jjr_j.S9 -mb=Ok#_C0__.j9r. -jSQ=.h_4Hj_ -4SQ=dh_6H(_;R -sfjj:ROlNEhRq7b.RsRHlk_M6C__jHm -S=dh_jHg_ -jSQ=.h_4H._ -4SQ=.h_4Hd_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__jj_r -69Shm=_n4c_SH -Qhj=__U.HQ -S4_=h._.UHs; -R:fjjNRlOqERhR7.blsHR1) ma_z4a__l#Jk_GNH__j4_444m -S=.h_jH(_ -jSQ=dh_6H6__Sj -Q)4=1Oa_;R sfjj:ROlNEhRQesRbHBlRpji_j7j__4Hr9m S=iBp_jjj_H7_r 49S=QjB_pij_jj79r4;R -sfjj:ROlNEhRq7b.RsRHlh6_46__Hj._F_FH_.__HFS. -m_=h4_cgHQ -Sjp=Bij_jjr_74S9 -QB4=pji_j7j__jHr9s; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__C.H__jFS. -m_=h4_6cjQ -Sj_=hd_64HQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__jj__Fj_.9r. -=Smh4_d6 +sfjj:ROlNEhRq7b.RsRHlB_pij_jjhj ___FdH._F +=Smhn_(_SH +QBj=pji_j7j_r +49S=Q4B_pij_jj7r_Hj +9;sjRf:ljRNROEq.h7RHbslMRk6__CH._F +=Smh6_.. +_jS=QjO_bkCr#04S9 +QO4=bCk_#H0_r;d9 +fsRjR:jlENOReQhRHbslbROk#_C0r_H4S9 +mb=Ok#_C0r_H4S9 +QOj=bCk_#40r9s; +R:fjjNRlOqERhR7.blsHRkOb_0C#_H.__Fj_.9rd +=Smh6_.4 _HS=QjO_bkCr#0jS9 QO4=bCk_#40r9s; -R:fjjNRlOqERhR7.blsHRa)1_Y7pD_8Cj__jFSd -m_=hUH._ -jSQ=4h_cSg -Q)4=1Oa_;R -sfjj:ROlNEhRQesRbHOlRbCk_#H0_r -49SOm=bCk_#H0_r -49S=QjO_bkCr#04 -9;sjRf:ljRNROEq.h7RHbslMRk6__Cj__HFS. -m_=h4_(UjQ -Sjb=Ok#_C09r4 -4SQ=kOb_0C#_dHr9s; -R:fjjNRlOqERhR7.blsHR6kM_jC__FH_. -_jShm=_j4U_Sj -QOj=bCk_#d0r9Q -S4b=Ok#_C0r_H4 -9;sjRf:ljRNROEQRheblsHR_1vqtvQqr_HdS9 -mv=1_QqvtHq_r -d9S=Qj1qv_vqQtr;d9 -fsRjR:jlENOReQhRHbslvR1_QqvtHq_r -69S1m=vv_qQ_tqH9r6 -jSQ=_1vqtvQq9r6;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__jj__rF.cS9 -m_=h4_UdjQ -Sj_=h4_cgHQ -S4v=1_Qqvt6qr9s; -R:fjjNRlOqERhR7.blsHR6kM_jC__NH_d -_jShm=_d.4 -jSQ=4h_(SU -QO4=bCk_#.0r9s; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jjd_Nr -69Shm=_U.. -jSQ=4h_nSj -Q14=vv_qQ_tqH9r6;R -sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCHj__Nj_dm -S=.h_nS6 -Qhj=_c46 -4SQ=a)1_Y7pr;j9 -fsRjR:jlENOReQhRHbsl1R)ap_7Yr_HjS9 -m1=)ap_7Yr_HjS9 -Q)j=17a_pjYr9s; -R:fjjNRlOqERhR7.blsHRa)1_Y7p__CjH__jNjd_ -=Smhn_.(Q -Sj_=hUH._ -4SQ=a)1_Y7p_jHr9s; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_.Hr9m -S=_1vqtvQqr_H.S9 -Q1j=vv_qQrtq. -9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_HH__NH_d9r. -=SmhU_.cQ -Sj_=h4 -U.S=Q41qv_vqQt_.Hr9s; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jjd_Nr -d9Shm=_jdc -jSQ=4h_cHg_ -4SQ=4h_( -n;sjRf:ljRNROEQRheblsHR_1vqtvQqr_HcS9 -mv=1_QqvtHq_r -c9S=Qj1qv_vqQtr;c9 -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hj__jNcdr9m -S=.h_USU -Qhj=_d4U -4SQ=_1vqtvQqr_Hc -9;sjRf:ljRNROEQRheblsHRdh_6H6_ -=Smh6_d6__HjQ -Sj_=hd;66 -fsRjR:jlENOR7qh.sRbH)lR17a_pCY_.__Hj._N -=Smh6_d4Q -Sj_=h4_cgHQ -S4_=hd_66H;_j -fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__jj__Nj_.9r. -=Smh6_d(Q -Sj_=hd_46HQ -S4b=Ok#_C0r_H. -9;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MOg_Dj _jbj_C__jjm -S=#bF_ OD\M3kgD_O j_jjC_b_Sj -Qhj=_6.j_SH -Qh4=_n.j_ -H;sjRf:ljRNROEq.h7RHbslbROk#_C0__.j__jj9r4 -=SmO_bkC_#0.r_j4S9 -Qhj=_U.j_SH -Qh4=_g.j_ -H;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__Nj_dr_jdS9 +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kgD_O j_jjC_b_Sj +mF=b#D_O k\3MOg_Dj _jbj_C +_jS=Qjhn_.4 +_HS=Q4hn_..;_H +fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__jj_r +49SOm=bCk_#.0__4jr9Q +Sj_=h._6UHQ +S4_=h._6gHs; +R:fjjNRlOqERhR7.blsHRkOb_0C#_j.__.jr9m +S=kOb_0C#_j._r +.9S=Qjh6_.6 +_HS=Q4h6_.(;_H +fsRjR:jlENOReQhRHbslbROk#_C0r_HdS9 +mb=Ok#_C0r_HdS9 +QOj=bCk_#d0r9s; +R:fjjNRlOqERhR7.blsHR6kM_HC__ +N.Shm=_d.n +jSQ=kOb_0C#_.Hr9Q +S4b=Ok#_C0r_Hd +9;sjRf:ljRNROEQRheblsHRkOb_0C#_jHr9m +S=kOb_0C#_jHr9Q +Sjb=Ok#_C09rj;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0.__jjd_Nr +49Shm=_U.6 +jSQ=kOb_0C#r +49S=Q4O_bkC_#0H9rj;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0.__jjd_Nr +.9Shm=_(.6 +jSQ=.h_6H4_ +4SQ=kOb_0C#_.Hr9s; +R:fjjNRlOqERhR7.blsHRkOb_0C#_H.__Nj_dr_jdS9 m_=h. -U(S=Qjh(_44Q -S4v=1_QqvtHq_r;d9 -fsRjR:jlENOR7qh.sRbHklRM74_1j_jjh_ q Ap_#j_JGlkN__jFjd__ -N.Shm=_cd6 -jSQ=4h_nHj_ -4SQ=_)WOs; -R:fjjNRlOqERhR7.blsHR_71j_jj Ahqp4 __l#Jk_GNH -_jShm=__nnjQ -Sj1=q_jjd_SH -Qk4=M74_1j_jjh_ q Ap_#j_JGlkN;_j -fsRjR:jlENOR7qh.sRbHklRM74_1j_jjh_ q Ap_#j_JGlkN__jFjd__ -FdSkm=M74_1j_jjh_ q Ap_#j_JGlkN -_jS=Qjh(_44Q -S4_=hd_6cHs; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jj._Fr -d9Shm=_44(_SH -Qhj=_j46_SH -Q14=vv_qQrtqc -9;sjRf:ljRNROEQRheblsHRqev_aQh_sj3 +6nS=QjO_bkCr#0jS9 +QO4=bCk_#H0_r;.9 +fsRjR:jlENOReQhRHbsl1R)ap_7Yr_H4S9 +m1=)ap_7Yr_H4S9 +Q)j=17a_p4Yr9s; +R:fjjNRlOqERhR7.blsHRa)1_Y7p__C4H._N_Sj +m_=h4 +4dS=Qjhn_( +4SQ=a)1_Y7p_4Hr9s; +R:fjjNRlOqERhR7.blsHRa)1_Y7p__C4H._N +=Smh4_4.Q +Sj_=h(H(_ +4SQ=4h_d +c;sjRf:ljRNROEQRheblsHRa)1_Y7p_.Hr9m +S=a)1_Y7p_.Hr9Q +Sj1=)ap_7Y9r.;R +sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH.___N..m +S=4h_4S4 +Qhj=_ +(nS=Q4)_1a7_pYH9r.;R +sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH.___N.jm +S=4h_jSg +Qhj=_(4d +4SQ=.h_n.6_;R +sfjj:ROlNEhRQesRbH1lRvv_qQ_tqH9rj +=Sm1qv_vqQt_jHr9Q +Sjv=1_Qqvtjqr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jNj.r9m +S=4h_jS4 +Qhj=_ +U(S=Q41qv_vqQt_jHr9s; +R:fjjNRlOQERhbeRsRHle_vqQ_haHm +S=qev_aQh_SH +Qej=vQq_h +a;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3M_d4O_D j_jjMSC +mF=b#D_O k\3M_d4O_D j_jjMHC_ +jSQ=)A ) +_OS=Q4hU_g_ +H;sjRf:ljRNROEQRheblsHRqev_aQh_sj3 =Sme_vqQ_hajM3kdQ SjF=b#D_O k\3MOg_Dj _jbj_Cs; R:fjjNRlOqERhR7.blsHRqev_aQh_lj3 @@ -2454,133 +2549,228 @@ S=qev_aQh_kj3MSj Qej=vQq_hSa Qe4=vQq_hja_3dkM;R sfjj:ROlNE)Rm.sRbHelRvQq_hja_3Sb -m_=h4SU +m_=h4S( Qej=vQq_hja_34kM 4SQ=qev_aQh_kj3M j;sjRf:ljRNROEq.h7RHbslvReqh_Qa -_4Shm=__d(jQ -Sj_=h4HU_ +_4Shm=__dnjQ +Sj_=h4H(_ 4SQ=a)1_ O;sjRf:ljRNROEQRheblsHRkOb_0C#_4j__ 3sSOm=bCk_#j0__34_k -MdS=Qjhc_4gs; -R:fjjNRlOqERhR7.blsHRkOb_0C#_4j__ -3lSOm=bCk_#j0__34_k -M4S=QjO_bkCr#04S9 -Qh4=_g4c;R -sfjj:ROlNEhRq7b.RsRHlO_bkC_#0j__43SM -mb=Ok#_C0__j4k_3MSj -QOj=bCk_#.0_r -49S=Q4O_bkC_#0j__43dkM;R -sfjj:ROlNE)Rm.sRbHOlRbCk_#j0__34_bm -S=4h_4Q -Sjb=Ok#_C0__j4k_3MS4 -QO4=bCk_#j0__34_k;Mj -fsRjR:jlENOReQhRHbslbROk#_C0__j.s_3 -=SmO_bkC_#0j__.3dkM -jSQ=4h_c -g;sjRf:ljRNROEq.h7RHbslbROk#_C0__j.l_3 -=SmO_bkC_#0j__.34kM -jSQ=kOb_0C#r -.9S=Q4hc_4gs; +MdS=Qjhn_(;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0j__43Sl +mb=Ok#_C0__j4k_3MS4 +QOj=bCk_#40r9Q +S4_=h( +n;sjRf:ljRNROEq.h7RHbslbROk#_C0__j4M_3 +=SmO_bkC_#0j__43jkM +jSQ=kOb_0C#_4.r9Q +S4b=Ok#_C0__j4k_3M +d;sjRf:ljRNROEmR).blsHRkOb_0C#_4j__ +3bShm=_ +4jS=QjO_bkC_#0j__434kM +4SQ=kOb_0C#_4j__M3kjs; +R:fjjNRlOQERhbeRsRHlO_bkC_#0j__.3Ss +mb=Ok#_C0__j.k_3MSd +Qhj=_;(n +fsRjR:jlENOR7qh.sRbHOlRbCk_#j0__3._lm +S=kOb_0C#_.j__M3k4Q +Sjb=Ok#_C09r. +4SQ=(h_ns; R:fjjNRlOqERhR7.blsHRkOb_0C#_.j__ 3MSOm=bCk_#j0__3._k MjS=QjO_bkC_#0.9r. 4SQ=kOb_0C#_.j__M3kds; R:fjjNRlOmER)b.RsRHlO_bkC_#0j__.3Sb -m_=h4S. +m_=h4S4 QOj=bCk_#j0__3._k M4S=Q4O_bkC_#0j__.3jkM;R -sfjj:ROlNEhRq7b.RsRHl)_1a7_pYCH.__Nj_d -_jShm=_(4g -jSQ=4h_6Sc -Qh4=_6d6;R -sfjj:ROlNEhRQesRbH)lR17a_pHY_r -.9S)m=17a_pHY_r -.9S=Qj)_1a7rpY. -9;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y._C_jH___Nd4m -S=4h_gSU -Qhj=_g4c -4SQ=a)1_Y7p_.Hr9s; -R:fjjNRlOqERhR7.blsHRkOb_0C#_j.__jj__rNd4S9 -m_=h. -jUS=QjO_bkCr#04S9 -QO4=bCk_#H0_r;j9 -fsRjR:jlENOR7qh.sRbHOlRbCk_#.0__jj__Nj_d9r. -=Smh4_.jQ -Sj_=hd -46S=Q4O_bkCr#0. -9;sjRf:ljRNROEq.h7RHbslMRk6__Cj__HNSd -m_=h. -4.S=QjhU_4jQ -S4b=Ok#_C0r_H. -9;sjRf:ljRNROEq.h7RHbsl1R7q4Bi_aQh_Hj__Nj_d -_jShm=_j.. -jSQ=4h_(Hc_ +sfjj:ROlNEhRQesRbHOlRbCk_#j0__3d_sm +S=kOb_0C#_dj__M3kdQ +Sj_=h( +n;sjRf:ljRNROEq.h7RHbslbROk#_C0__jdl_3 +=SmO_bkC_#0j__d34kM +jSQ=kOb_0C#r +d9S=Q4hn_(;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0j__d3SM +mb=Ok#_C0__jdk_3MSj +Qhj=_g4U_SH +QO4=bCk_#j0__3d_k;Md +fsRjR:jlENOR.m)RHbslbROk#_C0__jdb_3 +=Smh._4 +jSQ=kOb_0C#_dj__M3k4Q +S4b=Ok#_C0__jdk_3M +j;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y._C_FH_. +_jShm=__((HQ +Sj1=)ap_7Y9rj +4SQ=a)1_Y7pr;49 +fsRjR:jlENOR7qh.sRbH)lR17a_pCY_.__HFS. +m_=h._(jjQ +Sj_=h4_dcHQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbH)lR a1 _amz_j._ +=Smhd_6_Sj +Qhj=_c4._SH +Qh4=_64._ +H;sjRf:ljRNROEq.h7RHbsl1R7q4Bi_aQh_Hj_ +=Smhn_.g +_HS=Qjh._4j +_HS=Q4h._44;_H +fsRjR:jlENOR7qh.sRbH)lR a1 _amz_#4_JGlkN__Hjd_4. +_jShm=_U.._SH +Qhj=_(4d_jH_ 4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbsl1R7q4Bi_aQh_Hj__Nj_dm -S=.h_4Sg -Qhj=_.4d +O;sjRf:ljRNROEq.h7RHbsl1Rq_jjd__7jj__HNS. +m_=h. +(cS=Qjqj1_dHj_ 4SQ=a)1_ -O;sjRf:ljRNROEQRheblsHR7q_ 7Bm r_H4 -n9Sqm=_B7 m_7 Hnr49Q -Sj_=q7m B7O _r94n;R -sfjj:ROlNEhRQesRbHqlR_B7 m_7 Hgr49m -S=7q_ 7Bm r_H4 -g9S=Qjq _7B m7_4Org -9;sjRf:ljRNROEQRheblsHR7q_ 7Bm r_H4 -U9Sqm=_B7 m_7 HUr49Q -Sj_=q7m B7O _r94U;R -sfjj:ROlNEhRq7b.RsRHlABtqid_jjh_Qa -_4Shm=__c.jQ -Sj_=hU +O;sjRf:ljRNROEq.h7RHbsl R)1_ am_za4J_#lNkG_jH__.4d_Nj_.m +S=4h_dS( +Qhj=__((HQ +S41=)ap_7Y9r.;R +sfjj:ROlNEhRQesRbHhlR_(4d_SH +m_=h4_d(H +_jS=Qjhd_4(s; +R:fjjNRlOqERhR7.blsHRa)1_Y7p__C.H._N_Sd +m_=h4 +dcS=Qjhn_(_SH +Qh4=_(4d_jH_;R +sfjj:ROlNEhRq7b.RsRHl) 1az_ma__.j._N +=Smh._4cQ +Sj =)1_ am +zaS=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHRq71B_i4Q_haj__HNj._ +=Smh._44Q +Sj_=hUH(_ +4SQ=a)1_ +O;sjRf:ljRNROEQRheblsHRq71B_i4Q_haHm +S=q71B_i4Q_haHQ +Sj1=7q4Bi_aQh;R +sfjj:ROlNEhRq7b.RsRHl7B1qiQ4_hja__NH_.m +S=4h_.Sj +Q7j=1iqB4h_Qa +_HS=Q4h(_.cs; +R:fjjNRlOQERhbeRsRHl)_1a7_pYH9rj +=Sm)_1a7_pYH9rj +jSQ=a)1_Y7pr;j9 +fsRjR:jlENOR7qh.sRbH)lR17a_pCY_j__HNS. +m_=h4 +46S=Qjh(_.jQ +S41=)ap_7Y9rj;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3nkM_NLoOj _jSj +mF=b#D_O k\3MLn_o NO_jjj_Sj +QAj=tiqB_jjj_SO +Qb4=FO#_D3 \k_McLOoN j_jj;_H +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \k_McLOoN j_jjm +S=#bF_ OD\M3kco_LN_O j +jjS=Qjqj1_jOj_ +4SQ=(h_n;_H +fsRjR:jlENOR7qh.sRbHklRMNd_EEHo +=Smk_MdNoEHE +_HS=Qjh(_.nQ +S4 =)1_ aOs; +R:fjjNRlOqERhR7.blsHRq7aB7i_j +_jShm=__cUjQ +Sja=7q_BiO _HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHR1p7_jjj_aQh_S4 -m_=hcj4_ -jSQ=4h_c -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHR1z7_jjj_aQh_S4 -m_=hdjc_ -jSQ=.h_4 -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHR4kM_1p7_jjj_aQh -=Smk_M4p_71j_jjQ_hajQ -Sj1=7_jjj_q hA -p S=Q4p_71j_jjQ_haHs; -R:fjjNRlOqERhR7.blsHR4kM_1z7_jjj_aQh -=Smk_M4z_71j_jjQ_hajQ -Sj1=7_jjj_q hA -p S=Q4z_71j_jjQ_haHs; -R:fjjNRlOQERhbeRsRHlz_71j_jjQ_haj -3sSzm=7j1_jQj_hja_3dkM -jSQ=_1vqtvQq9rn;R -sfjj:ROlNEhRq7b.RsRHlz_71j_jjQ_haj -3lSzm=7j1_jQj_hja_34kM -jSQ=Oq_r -j9S=Q41qv_vqQtr;n9 -fsRjR:jlENOR7qh.sRbHzlR7j1_jQj_hja_3SM -m7=z1j_jjh_Qa3_jk -MjS=Qjz_71j_jjQ -haS=Q4z_71j_jjQ_hajM3kds; -R:fjjNRlOmER)b.RsRHlz_71j_jjQ_haj -3bShm=_ -.4S=Qjz_71j_jjQ_hajM3k4Q -S47=z1j_jjh_Qa3_jk;Mj -fsRjR:jlENOReQhRHbsl7Rp1j_jjh_Qa3_jsm -S=1p7_jjj_aQh_kj3MSd -Q1j=vv_qQrtqn -9;sjRf:ljRNROEq.h7RHbsl7Rp1j_jjh_Qa3_jlm -S=1p7_jjj_aQh_kj3MS4 -Qbj=FO#_D3 \kjM4__#lNolHN -_HS=Q41qv_vqQtr;n9 -fsRjR:jlENOR7qh.sRbHplR7j1_jQj_hja_3SM -m7=p1j_jjh_Qa3_jk -MjS=Qjp_71j_jjQ -haS=Q4p_71j_jjQ_hajM3kds; -R:fjjNRlOmER)b.RsRHlp_71j_jjQ_haj -3bShm=_ -4cS=Qjp_71j_jjQ_hajM3k4Q -S47=p1j_jjh_Qa3_jk;Mj +R:fjjNRlOqERhR7.blsHRqeu_j7_ +=Smh._6_Sj +Q)j=1Oa_ +4SQ=qeu_HO_;R +sfjj:ROlNEhRq7b.RsRHlk_M4Nj#_jjj_ +=Smk_M4Nj#_jHj_ +jSQ=qAtBji_dQj_hSa +Q)4= a1 _amz;R +sfjj:ROlNEhRQesRbHMlR _Xu1Buq +_HSMm= _Xu1Buq +_HS=QjMu X_q1uBO _;R +sfjj:ROlNEhRq7b.RsRHlk_M.Nj#_dHj__ +N.Shm=_n.( +jSQ=qAtBji_dQj_hHa_ +4SQ=XM uu_1q_B Hs; +R:fjjNRlOQERhbeRsRHlABtqid_jjh_Qa +_HSAm=tiqB_jjd_aQh_SH +QAj=tiqB_jjd_aQh;R +sfjj:ROlNEhRq7b.RsRHlk_M4sHI__ +N.Shm=_d4d +jSQ=qAtBji_dQj_hHa_ +4SQ=1) ma_z +a;sjRf:ljRNROEq.h7RHbslMRkc#_N_jjd_NH_.m +S=4h_dS. +Qhj=_n.( +4SQ=1) ma_z +a;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y._C_.H_ +=Smhn_.6__.jQ +Sj_=h4_44HQ +S41=)a;_O +fsRjR:jlENOReQhRHbslaR7q_Bi7Hj_ +=Sm7Baqij_7_SH +Q7j=aiqB_;7j +fsRjR:jlENOReQhRHbslFRb#D_O k\3M_d4O_D j_jjM4C__lH_. +3sSbm=FO#_D3 \k4Md_ OD_jjj__MC4__Hlk.3MSd +Qej=u7q_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkM4D_O j_jjC_M_H4__3l.lm +S=#bF_ OD\M3kdO4_Dj _jMj_C__4H._l34kM +jSQ=q7aB7i_j +_HS=Q4e_uq7s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdO4_Dj _jMj_C__4H._l3SM +mF=b#D_O k\3M_d4O_D j_jjM4C__lH_.M3kjQ +SjF=b#D_O k\3M_.gO_D j_jjM4C_ +4SQ=#bF_ OD\M3kdO4_Dj _jMj_C__4H._l3dkM;R +sfjj:ROlNE)Rm.sRbHblRFO#_D3 \k4Md_ OD_jjj__MC4__Hlb.3 +=SmhU_g +jSQ=#bF_ OD\M3kdO4_Dj _jMj_C__4H._l34kM +4SQ=#bF_ OD\M3kdO4_Dj _jMj_C__4H._l3jkM;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_##s0H#__Fj_.9rj +=Smh(_U_SH +Qhj=__(nHQ +S4v=1_Qqvt4qr9s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\p3Bid_jj _u_4c_ +=Smb_F#O\D 3iBp_jjd__u c9r4 +jSQ=4kM_iBp_jjd__u 49r. +4SQ=4kM_0s#_ +d;sjRf:ljRNROEq.h7RHbslMRk4#_s0__.4m +S=4kM_0s#_4._ +jSQ=qAtBji_dQj_hHa_ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbslMRk4#_s0 +_.Skm=Ms4_#.0_ +jSQ=_q1j_jjHQ +S4M=k4#_s0__.4s; +R:fjjNRlOQERhbeRsRHlqtvQq1_7_SH +mv=qQ_tq7H1_ +jSQ=Qqvt7q_1s; +R:fjjNRlOQERhbeRsRHlQ._.dm +S=_q1j_jjHQ +Sj1=q_jjj_ +O;sjRf:ljRNROEQRheblsHR#bF_ OD\M3kcI_s_jjj_SH +mF=b#D_O k\3Msc_Ij_jj +_HS=Qjb_F#O\D 3ckM__sIj;jj +fsRjR:jlENOReQhRHbsl1R7_jjj_q7v_#j_JGlkN +_HS7m=1j_jjv_7q__j#kJlGHN_ +jSQ=_71j_jj7_vqjJ_#lNkG;R +sfjj:ROlNEhRQesRbHQlR_... +=Sm)jW_jHj_ +jSQ=_)Wj_jjOs; +R:fjjNRlOQERhbeRsRHlB_pij_djuH _r +49SBm=pji_duj_ r_H4S9 +QBj=pji_duj_ 9r4;R +sfjj:ROlNEhRQesRbHqlR1j_jjv_7q +_HSqm=1j_jjv_7q +_HS=Qjqj1_j7j_v +q;sjRf:ljRNROEX.m)RHbsl_RtgS6 +mM=k4Y_BB_p 7rvq4S9 +QBj=Y Bp_q7vr +j9S=Q4b_F#O\D 34kMdo_LN_O j_djH;M0 +fsRjR:jlENOR)Xm.sRbHtlR_44j +=Smk_M4B_pij_dju4 _r +49S=QjB_pij_djuj r9Q +S4F=b#D_O k\3M_4dO_D F_k0H;M0 +fsRjR:jlENOR)Xm.sRbHtlR_d4j +=Smk_M4B_pij_dju4 _r +.9S=QjB_pij_dju4 r9Q +S4_=h.;j6 fsRjR:jlENOReQhRHbsltRAq_Bij_djQ_haj 3sSAm=tiqB_jjd_aQh_kj3MSd Qbj=FO#_D3 \k_MnLOoN j_jjs; @@ -2593,675 +2783,531 @@ S=qAtBji_dQj_hja_3jkM jSQ=qAtBji_dQj_hSa QA4=tiqB_jjd_aQh_kj3M d;sjRf:ljRNROEmR).blsHRqAtBji_dQj_hja_3Sb -m_=hUQ +m_=h(Q Sjt=Aq_Bij_djQ_hajM3k4Q S4t=Aq_Bij_djQ_hajM3kjs; -R:fjjNRlOQERhbeRsRHl7j1_j j_hpqA 3_jsm -S=_71j_jj Ahqpj _3dkM -jSQ=nh_ns; -R:fjjNRlOqERhR7.blsHR_71j_jj Ahqpj _3Sl -m1=7_jjj_q hA_p jM3k4Q -SjM=k41_7_jjj_q hA_p jJ_#lNkG -4SQ=nh_ns; -R:fjjNRlOqERhR7.blsHR_71j_jj Ahqpj _3SM -m1=7_jjj_q hA_p jM3kjQ -Sj1=7_jjj_q hA -p S=Q47j1_j j_hpqA 3_jk;Md -fsRjR:jlENOR.m)RHbsl1R7_jjj_q hA_p j -3bShm=_Sg -Q7j=1j_jjh_ q Ap_kj3MS4 -Q74=1j_jjh_ q Ap_kj3M -j;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q hA_p 4m -S=6h_nQ -Sj_=hgQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbH7lR1iqB4h_Qa__jH -_jShm=_U.c_SH -Qhj=_g.4_SH -Qh4=_j.._ -H;sjRf:ljRNROEq.h7RHbslFRb#D_O k\3MLn_o NO_jjj_jj_ -=Smb_F#O\D 3nkM_NLoOj _jjj_ -jSQ=qAtBji_jOj_ -4SQ=dh_6Hg_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3nkM_NLoOj _jjj__Nj_.m -S=dh_6Sg -Qqj=1j_jj -_OS=Q4h6_4j;_H -fsRjR:jlENOReQhRHbsl1R7q4Bi_aQh_SH -m1=7q4Bi_aQh_SH -Q7j=1iqB4h_Qas; -R:fjjNRlOqERhR7.blsHR#bF_ OD\137q4Bi_aQh_H4___N.j._N -=Smhd_4.Q -Sj1=q_jjd_SH -Q74=1iqB4h_Qa;_H -fsRjR:jlENOReQhRHbsl_RQ. -4nSqm=1d_jj -_HS=Qjqj1_dOj_;R -sfjj:ROlNEhRQesRbHqlR1j_jjh_Qa -_HSqm=1j_jjh_Qa -_HS=Qjqj1_jQj_h -a;sjRf:ljRNROEq.h7RHbslFRb#D_O q\31j_jjh_Qa__4H._N_Nj_.m -S=4h_dSd -Qqj=1j_jjh_Qa -_HS=Q4qj1_dHj_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_#M#_HH__jj___Ndj9rj -=Smhg_.dQ -Sj_=h4_6jHQ -S4v=1_Qqvtjqr9s; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_jHr9m -S=_1vqtvQqr_HjS9 -Q1j=vv_qQrtqj -9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__Nj_d9rj -=Smh._.(Q -Sj_=h4 -(cS=Q41qv_vqQt_jHr9s; -R:fjjNRlOQERhbeRsRHlQ4_.6m -S=_)Wj_jjHQ -SjW=)_jjj_ -O;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z17qqa_)7Q__HPj__jNSd -m_=h. -.dS=QjABtqid_jjh_QaQ -S4W=)_jjj_ -H;sjRf:ljRNROEq.h7RHbsl1Rq_jjj_aQh_Hj__Nj_d -_jShm=_... -jSQ=4h_nHj_ +R:fjjNRlOqERhR7.blsHRqAtBji_dQj_h4a_ +=Smh4_c_Sj +Qhj=_H(_ 4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbsl1Rq_jjj_aQh_Hj__Nj_dm -S=.h_.S4 -Qhj=_d4d -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbsl1R)ap_7Y._C_jH___F.jm -S=4h_6HU_ -jSQ=a)1_Y7pr -j9S=Q4)_1a7rpY4 -9;sjRf:ljRNROEq.h7RHbsl R)1_ am_za4J_#lNkG_jH__444_N4_.m -S=dh_6S6 -Qhj=_U46_SH -Q)4=17a_p.Yr9s; -R:fjjNRlOQERhbeRsRHl)_1a7_pYH9r4 -=Sm)_1a7_pYH9r4 -jSQ=a)1_Y7pr;49 -fsRjR:jlENOR7qh.sRbH)lR17a_pCY_4__Hjd_N_Sj -m_=h. -j.S=Qjh._U_SH -Q)4=17a_pHY_r;49 -fsRjR:jlENOR7qh.sRbH)lR17a_pCY_4__Hjd_N -=Smhj_.4Q -Sj_=h4 -6cS=Q4h6_4U;_H -fsRjR:jlENOReQhRHbsluRwz _1h_1 Hm -S=zwu_h1 1H _ -jSQ=zwu_h1 1O _;R -sfjj:ROlNEhRq7b.RsRHlk4M._sLCs__jNjd___Nd4m -S=.kM4C_Ls4s_ -jSQ=_q1j_djHQ -S4t=Aq_Bij_jjOs; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_4Hr9m -S=_1vqtvQqr_H4S9 -Q1j=vv_qQrtq4 -9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__Fj_.9rj -=Smh(_4c -_HS=Qjhc_4g -_HS=Q41qv_vqQtr;49 -fsRjR:jlENOReQhRHbslvR1_QqvtHq_r -n9S1m=vv_qQ_tqH9rn -jSQ=_1vqtvQq9rn;R -sfjj:ROlNEhRq7b.RsRHlk_M41qv_vqQt_#j_JGlkN__4j__4FS. -m_=h4_njHQ -Sj_=h4_6jHQ -S4v=1_Qqvtnqr9s; -R:fjjNRlOQERhbeRsRHlB_pij_jj7r_HjS9 -mp=Bij_jj__7H9rj -jSQ=iBp_jjj_j7r9s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k4b_HD__Hjd_F -=Smh6_4j -_HS=QjB_pij_jj79rj -4SQ=iBp_jjj_H7_r;49 -fsRjR:jlENOR7qh.sRbHqlRvqQt_1Az_a7qqQ_7)P_H_jj_ -=SmqtvQqz_A1q_7a7q_QO)__Sj -Qhj=_d.._SH -Qh4=_c.._ -H;sjRf:ljRNROEq.h7RHbsl1Rq_jjj_aQh_Hj__Sj -m_=h._c(HQ -Sj_=h._.4HQ -S4_=h._..Hs; -R:fjjNRlOqERhR7.blsHR4kM__sIjm -S=4kM__sIHQ -Sjt=Aq_Bij_djQ_haHQ -S4 =)1_ am;za -fsRjR:jlENOR)Xm.sRbHblRFO#_D3 \k4M._NLoOj _dHj_MH0__Fj_d__jGS. -m_=h4_64HQ -SjY=BB_p 7rvqjS9 -QB4=Y Bp_q7vr;49 -fsRjR:jlENOReQhRHbsl RMX1u_u qB_SH -m =MX1u_u qB_SH -QMj= _Xu1Buq ;_O -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \1 QZ_q7v_jn__jj__rF.jS9 -m_=h4_(.HQ -Sj7=p1j_jj__OHQ -S47=z1j_jj__OHs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\Y3BB_p 7_vq6__jH__jFSd -m_=h._64HQ -Sjt=Aq_Bij_djQ_haHQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq#0s##__Hj__jFn.r9m -S=4h_(jg_ -jSQ=4h_nHd_ -4SQ=_1vqtvQq__HH9r(;R -sfjj:ROlNEhRq7b.RsRHlB_pij_dj]__.H__jFS. -m_=h4_UcjQ -Sj1=q_jjj_q7v_SH -QB4=pji_dOj__ -H;sjRf:ljRNROEQRheblsHRqAtBji_dQj_hHa_ -=SmABtqid_jjh_Qa -_HS=QjABtqid_jjh_Qas; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k6o_LN_O j_djH_M08__Hj._N_FH_dm -S=4h_UH6_ -jSQ=qAtBji_dQj_hSa -QA4=tiqB_jjd_aQh_ -7;sjRf:ljRNROEq.h7RHbslMRk.#_N_jjd_NH_.__HFSd -m_=h4_UnHQ -Sjt=Aq_Bij_djQ_haHQ -S4 =MX1u_u qB_ -H;sjRf:ljRNROEX.m)RHbslFRb#D_O k\3MH4_bHD__Gj_.m -S=dh_nSj -QQj=u7p_j9rj -4SQ=pQu_jOr9s; -R:fjjNRlOXERmR).blsHR#bF_ OD\M3k4b_HD__Hj._G_Sj -m_=h4_g4HQ -Sju=Qpj_7r -49S=Q4Q_upO9r4;R -sfjj:ROlNEmRX)b.RsRHlb_F#O\D 34kM_DHb_jH___G.4m -S=4h_gH._ -jSQ=pQu_r7j.S9 -QQ4=uOp_r;.9 -fsRjR:jlENOR)Xm.sRbHblRFO#_D3 \BpYB v_7q__64__Hj._G -=Smhg_4d -_HS=QjBpYB v_7q9r4 +O;sjRf:ljRNROEQRheblsHRBBYp7 _vHq_r +j9SBm=Y Bp_q7v_jHr9Q +SjY=BB_p 7rvqj +9;sjRf:ljRNROEQRheblsHRBBYp7 _vHq_r +49SBm=Y Bp_q7v_4Hr9Q +SjY=BB_p 7rvq4 +9;sjRf:ljRNROEq.h7RHbsl_Rt4 +44Sbm=FO#_D3 \k6M4_NLoOj _dHj_MH0_ +jSQ=BBYp7 _vjqr9Q +S4Y=BB_p 7rvq4 +9;sjRf:ljRNROEq.h7RHbsl_Rt4 +4nSbm=FO#_D3 \k_MdjQ +SjY=BB_p 7_vqH9rj +4SQ=BBYp7 _vHq_r;49 +fsRjR:jlENOR7qh.sRbHtlR_44. +=Smb_F#O\D 34kM.D_O k_F0M_H0 +_jS=QjB_pij_djuj r9Q +S4p=Bid_jj _ur;49 +fsRjR:jlENOR)Xm.sRbHtlR_ +g(Skm=MB4_Y Bp_q7vr +.9S=QjBpYB v_7q9r4 4SQ=4h_g -g;sjRf:ljRNROEQRheblsHR_q1j_dj7Hj_ -=Smqj1_d7j_j -_HS=Qjqj1_d7j_js; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k.L4_o NO_jjd_0HM_jH___Fdj._N -=Smh6_djQ -Sj7=p1j_jj -_OS=Q4z_71j_jjOs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdNc_#d_jjj_8_HH_ -=Smh4_dj -_jS=Qjqj1_dHj_ -4SQ=.h_4Hc_;R -sfjj:ROlNEhRq7b.RsRHlkjM4_HNloLN_kC#_MDNLCH_EojE__Sj -mM=k4Nj_lNHo_#Lk_NCML_DCEEHo_SH -Qhj=_6.4_SH -Qh4=_n.4_ -H;sjRf:ljRNROEq.h7RHbslMRk4Od_H_HMH__jjm -S=nh_. -_jS=QjMu X_q1uBH _ -4SQ=4kMjH_OHHM_;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3_)Wj_jj7_vqd__jjm -S=#bF_ OD\W3)_jjj_q7v_jd_ -jSQ=qAtBji_dQj_hHa_ -4SQ=_)Wj_jjHs; -R:fjjNRlOqERhR7.blsHR_q1j_dj7jj__jj_ -=SmhU_c_Sj -Qqj=1d_jj -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\137_jjj_q7v_Vc_j__jjm -S=#bF_ OD\137_jjj_q7v_jc_ -jSQ=dh_dH._ -4SQ=#bF_ OD\M3k.L4_o NO_jjd_0HM_jH__ -j;sjRf:ljRNROEq.h7RHbsl1Rq_jjj_q7v_#4_JGlkN__Hjm -S=.h_cj6_ -jSQ=iBp_jjd_HO_ -4SQ=#bF_ OD\M3k.L4_o NO_jjd_0HM_jH__ -j;sjRf:ljRNROEq.h7RHbslMRk4#_N_jjj_jj_ -=Smk_M4Nj#_jHj_ -jSQ=qAtBji_dQj_hSa -Q)4= a1 _amz;R -sfjj:ROlNEhRq7b.RsRHl) 1az_ma__.j -_jShm=__66jQ -Sj_=hd_d(HQ -S4_=hd_dUHs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\Q31Z7 _vnq__jj__jjr9m -S=#bF_ OD\Q31Z7 _vnq__jjr9Q -Sj_=h._nUHQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \1 QZ_q7v_jn__jj_r -49Sbm=FO#_D3 \1 QZ_q7v_jn_r -49S=Qjh(_.6 -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHRckM__N#j_djHd_N_SH -m_=hd_4dHQ -Sj_=h4_UnHQ -S4 =)1_ am;za -fsRjR:jlENOR7qh.sRbH1lRQ_Z 7_vqdJ_#lNkG_Nj_d -_HShm=_n4._Sj -Qhj=_64U_SH -Q)4=1Oa_;R -sfjj:ROlNEhRQesRbH)lR a1 _amz_SH -m =)1_ am_zaHQ -Sj =)1_ am;za -fsRjR:jlENOR7qh.sRbHblRFO#_D3 \1 QZ_q7v_jn__jj__rNdjS9 -m_=h. -nUS=QjABtqid_jjh_Qa -_HS=Q4h(_4.s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\Q31Z7 _vnq__jj__Nj_d9r4 -=Smh(_.6Q -Sjt=Aq_Bij_djQ_haHQ -S4_=h4_(.Hs; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jjd_Nr -49Shm=_U.( -jSQ=4h_6Sj -Q14=vv_qQrtq. -9;sjRf:ljRNROEq.h7RHbslvR1_Qqvt#q_s##0_jH__Nj_dr_j4S9 -m_=h. -U.S=Qj1qv_vqQt_4Hr9Q -S4v=1_QqvtHq_r;.9 -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqM_##H__Hj__jNjdr9m -S=.h_gS4 -Qhj=_d4n -4SQ=_1vqtvQq__HH9r(;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3_qj7_vqd__jNjd__ -NdSbm=FO#_D3 \q7j_vdq_ -jSQ=qAtBji_dQj_hHa_ -4SQ=1z7_jjj_ -O;sjRf:ljRNROEQRheblsHRHq_r -49Sqm=_4Hr9Q -Sj_=qO9r4;R -sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3QqvtAq_z 1_hpqA v_7qQ_]td]__NH_d__jNSd -m_=h4 -46S=Qjqr_H4S9 -QA4=tiqB_jjd_aQh_ -H;sjRf:ljRNROEq.h7RHbslFRb#D_O q\3vqQt_1Az_q hA_p 7_vqp_mWd__HNjd__ -NdShm=_c44 -jSQ=Oq_r -49S=Q4ABtqid_jjh_Qa;_H -fsRjR:jlENOReQhRHbsluRQpr_HjS9 -mu=Qpr_HjS9 -QQj=uOp_r;j9 -fsRjR:jlENOR7qh.sRbHQlRu7p_j__jHd_N_Nj_d9rj -=Smh4_4dQ -Sju=Qpr_HjS9 -Q)4=1Oa_;R -sfjj:ROlNEhRQesRbHQlRuHp_r -49SQm=uHp_r -49S=QjQ_upO9r4;R -sfjj:ROlNEhRq7b.RsRHlQ_up7jj__NH_d__jN4dr9m -S=4h_4S. -QQj=uHp_r -49S=Q4)_1aOs; -R:fjjNRlOQERhbeRsRHlQ_upH9r. -=SmQ_upH9r. -jSQ=pQu_.Or9s; -R:fjjNRlOqERhR7.blsHRpQu__7jj__HNjd__rNd.S9 -m_=h4 -44S=QjQ_upH9r. -4SQ=a)1_ -O;sjRf:ljRNROEQRheblsHR.Q_4Sg -m]=qQ_t]H4rd9Q -Sj]=qQ_t]O4rd9s; -R:fjjNRlOQERhbeRsRHlBpYB v_7qr_HjS9 -mY=BB_p 7_vqH9rj -jSQ=BBYp7 _vjqr9s; -R:fjjNRlOqERhR7.blsHR#bF_ OD\Y3BB_p 7_vq6__jH__jNSd -m_=h. -jcS=QjBpYB v_7qr_HjS9 -Qh4=_j46;R -sfjj:ROlNEhRQesRbHqlRvqQt_1Az_q hA_p 7_vq]]Qt_SH -mv=qQ_tqA_z1 Ahqp7 _v]q_Q_t]HQ -Sjv=qQ_tqA_z1 Ahqp7 _v]q_Q;t] -fsRjR:jlENOR7qh.sRbHklRM_4jNolHNk_L#M_CNCLD_oEHE__jjd_N -=Smh4_.6Q -Sjv=qQ_tqA_z1 Ahqp7 _v]q_Q_t]HQ +g;sjRf:ljRNROEq.h7RHbslMRk(#_N_jjd +=Smk_M(Nj#_dSj +Qqj=1j_jjv_7q +_HS=Q4qj1_jHj_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 34kMdo_LN_O j_djH +M0Sbm=FO#_D3 \kdM4_NLoOj _dHj_MS0 +Qhj=__(nHQ +S4F=b#D_O k\3M_46LOoN d_jjM_H0s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k4o_LN_O j_djH +M0Sbm=FO#_D3 \k_M4LOoN d_jjM_H0 +_jS=Qj)jW_jHj_ +4SQ=#bF_ OD\M3k4L6_o NO_jjd_0HM_ +H;sjRf:ljRNROEQRheblsHR#bF_ OD\M3kdD_O k_F0M_H0 +_HSbm=FO#_D3 \k_MdO_D F_k0H_M0HQ +SjF=b#D_O k\3MOd_DF _kH0_M +0;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q7v_#j_JGlkNm +S=_71j_jj7_vqjJ_#lNkG +jSQ=_)Wj_jjOQ +S4F=b#D_O k\3MOd_DF _kH0_MH0_;R +sfjj:ROlNEhRq7b.RsRHlk_M4s_#0dm +S=4kM_0s#_Sd +Q)j=1Oa_ +4SQ=#bF_ OD\#3N_jjj_N8lns; +R:fjjNRlOqERhR7.blsHR_q1j_jj7_vq4J_#lNkG +=Smqj1_j7j_v4q__l#Jk +GNS=Qjb_F#O\D 3_N#j_jj8nlN +4SQ=#bF_ OD\M3kdD_O k_F0M_H0s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\Y3BB_p 7_vq6 +_jSbm=FO#_D3 \BpYB v_7qr_6jS9 +Qkj=MB4_Y Bp_q7vr +49S=Q4k_M4s_#0.s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\p3Bid_jj _u_jc_ +=Smb_F#O\D 3iBp_jjd__u c9rj +jSQ=4kM_iBp_jjd__u 49r4 +4SQ=4kM_0s#_ +d;sjRf:ljRNROEq.h7RHbslMRk4l_NH_oNL_k#CLMNDDC_FSI +mM=k4l_NH_oNL_k#CLMNDDC_FSI +Qqj=vqQt_1Az_q hA_p 7_vqp_mWHQ S4t=Aq_Bij_djQ_haHs; -R:fjjNRlOQERhbeRsRHlqj1_djj_j1j_Y_hBHm -S=_q1j_djj_jj1BYh_SH -Qqj=1d_jjj_jjY_1h -B;sjRf:ljRNROEQRheblsHRiBp_jjd_H]_ -=SmB_pij_dj] -_HS=QjB_pij_dj]s; -R:fjjNRlOqERhR7.blsHRiBp_jjd_.]__jH__ -NdShm=_U.4 -jSQ=iBp_jjd_H]_ -4SQ=4h_U -c;sjRf:ljRNROEq.h7RHbslFRb#D_O 7\31j_jjv_7q__cVjj__Nj_dm -S=dh_dS. -Qqj=1j_jjv_7qQ +R:fjjNRlOqERhR7.blsHRQqvtAq_z71_q_aq7_Q)HSP +mv=qQ_tqA_z17qqa_)7Q_jO_ +jSQ=nkM_HNloLN_k8#_N_0N8_HsHQ +S4M=k4N._lNHo_#Lk_08NNH_8s__lHs; +R:fjjNRlOqERhR7.blsHR4kM.l_NH_oNL_k#8NN0_s8H_Sl +mM=k4N._lNHo_#Lk_08NNH_8s +_lS=QjABtqid_jjh_QaQ S4W=)_jjj_ -H;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q7v_#._JGlkN__Hjd_N -=Smh._.nQ -Sjp=Bid_jj -_]S=Q4B_pij_djOs; -R:fjjNRlOqERhR7.blsHR_1vqtvQqs_##_0#H__jjd_Nr -n9Shm=_g.. -jSQ=4h_(Sg -Q14=vv_qQ_tqH9rn;R -sfjj:ROlNEhRQesRbHqlR1j_jjv_7q -_HSqm=1j_jjv_7q -_HS=Qjqj1_j7j_v -q;sjRf:ljRNROEQRheblsHR.Q_4S( -m1=q_jjj_SH -Qqj=1j_jj;_O -fsRjR:jlENOR7qh.sRbHklRMN(_#d_jj__jNjd__ -NdSkm=MN(_#d_jjQ -Sj1=q_jjj_q7v_SH -Qq4=1j_jj;_H -fsRjR:jlENOR7qh.sRbH)lR a1 _amz_j.__Nj_dm -S=dh_dS( -Q)j= a1 _amz -4SQ=a)1_ -O;sjRf:ljRNROEQRheblsHRiBp_amz_ u)__6jHm -S=iBp_amz_ u)__6jHQ -Sjp=Biz_ma)_u j_6;R -sfjj:ROlNEhRq7b.RsRHltn_g -=Smhg_4gQ -SjY=BB_p 7rvqjS9 -Qh4=_j46_ -H;sjRf:ljRNROEQRheblsHR.Q_.Sc -m]=qQ_t]Hcr.9Q -Sj]=qQ_t]Ocr.9s; -R:fjjNRlOQERhbeRsRHlQ._.6m -S=Qq]tH]_r9.6 -jSQ=Qq]tO]_r9.6;R -sfjj:ROlNEhRQesRbHQlR_... +H;sjRf:ljRNROEQRheblsHRiBp_u X_SH +mp=BiX_ u +_HS=QjB_pi _XuOs; +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdD_O k_F0M_H0m +S=#bF_ OD\M3kdD_O k_F0M_H0Q +Sjp=BiX_ u +_HS=Q4B_pim_zau_) 7s; +R:fjjNRlOQERhbeRsRHl7j1_j7j_vHq_ +=Sm7j1_j7j_vHq_ +jSQ=_71j_jj7;vq +fsRjR:jlENOR7qh.sRbHklRM8n_#d_jjm +S=nkM__8#j +djS=Qjqj1_jHj_ +4SQ=_71j_jj7_vqHs; +R:fjjNRlOQERhbeRsRHl7j1_j7j_vjq_3Ss +m1=7_jjj_q7v_kj3MSd +Q7j=1j_jjv_7q__4#kJlG +N;sjRf:ljRNROEq.h7RHbsl1R7_jjj_q7v_lj3 +=Sm7j1_j7j_vjq_34kM +jSQ=_71j_jj7 +vqS=Q47j1_j7j_v4q__l#Jk;GN +fsRjR:jlENOR7qh.sRbH7lR1j_jjv_7q3_jMm +S=_71j_jj7_vqjM3kjQ +SjF=b#D_O N\3#j_jjl_8NHn_ +4SQ=_71j_jj7_vqjM3kds; +R:fjjNRlOmER)b.RsRHl7j1_j7j_vjq_3Sb +m_=hdQ +Sj1=7_jjj_q7v_kj3MS4 +Q74=1j_jjv_7q3_jk;Mj +fsRjR:jlENOReQhRHbslFRb#D_O N\3#j_jjl_8NHn_ +=Smb_F#O\D 3_N#j_jj8nlN_SH +Qbj=FO#_D3 \Nj#_j8j_l;Nn +fsRjR:jlENOReQhRHbsl1Rq_jjj_q7v_sj3 +=Smqj1_j7j_vjq_3dkM +jSQ=_q1j_jj7_vq4J_#lNkG;R +sfjj:ROlNEhRq7b.RsRHlqj1_j7j_vjq_3Sl +m1=q_jjj_q7v_kj3MS4 +Qqj=1j_jjv_7qQ +S41=q_jjj_q7v_#4_JGlkNs; +R:fjjNRlOqERhR7.blsHR_q1j_jj7_vqj +3MSqm=1j_jjv_7q3_jk +MjS=Qjb_F#O\D 3_N#j_jj8nlN_SH +Qq4=1j_jjv_7q3_jk;Md +fsRjR:jlENOR.m)RHbsl1Rq_jjj_q7v_bj3 +=Smh +_cS=Qjqj1_j7j_vjq_34kM +4SQ=_q1j_jj7_vqjM3kjs; +R:fjjNRlOqERhR7.blsHR#bF_ OD\Y3BB_p 7_vq6 +_4Sbm=FO#_D3 \BpYB v_7qr_64S9 +Qkj=MB4_Y Bp_q7vr +.9S=Q4k_M4s_#0.s; +R:fjjNRlOqERhR7.blsHR_q1j_jj7_vq4m +S=ch_. +_jS=Qjh__cHQ +S41=)a;_O +fsRjR:jlENOR7qh.sRbH7lR1j_jjv_7q +_4Shm=__cdjQ +Sj_=hd +_HS=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHRgt_nm +S=4h_gSg +QBj=Y Bp_q7vr +j9S=Q4b_F#O\D 34kMdo_LN_O j_djH;M0 +fsRjR:jlENOR7qh.sRbHtlR_.4j +=Smhj_.6Q +Sjp=Bid_jj _ur +j9S=Q4b_F#O\D 34kMdD_O k_F0M_H0s; +R:fjjNRlOQERhbeRsRHlQ._.nm +S=Qq]tH]_r9.( +jSQ=Qq]tO]_r9.(;R +sfjj:ROlNEhRQesRbHQlR_(.. =Smqt]Q]r_H. n9S=Qjqt]Q]r_O.;n9 fsRjR:jlENOReQhRHbsl_RQ. -.dSqm=]]Qt_.Hr(S9 -Qqj=]]Qt_.Or( -9;sjRf:ljRNROEQRheblsHR.Q_.Sj -m]=qQ_t]HUr.9Q -Sj]=qQ_t]OUr.9s; -R:fjjNRlOQERhbeRsRHlQ._.4m -S=Qq]tH]_r9.g -jSQ=Qq]tO]_r9.g;R -sfjj:ROlNEhRQesRbHQlR_U.4 -=Smqt]Q]r_Hd -j9S=Qjqt]Q]r_Od;j9 -fsRjR:jlENOR7qh.sRbHQlRujp_d4j_r -49Shm=__d.jQ -Sj_=h.Hd_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbsluRQpd_jjr_4.S9 -m_=hdjd_ -jSQ=.h_c -_HS=Q4)_1aOs; -R:fjjNRlOQERhbeRsRHl1 QZ_q7v_jj__ -3sS1m=Q_Z 7_vqj__j3dkM -jSQ=4h_. -n;sjRf:ljRNROEq.h7RHbslQR1Z7 _vjq__3j_lm -S=Z1Q v_7q__jjk_3MS4 -Qbj=FO#_D3 \1 QZ_q7v_jnr9Q -S4_=h4;.n -fsRjR:jlENOR7qh.sRbH1lRQ_Z 7_vqj__j3SM -mQ=1Z7 _vjq__3j_k -MjS=Qj1 QZ_q7vr -j9S=Q41 QZ_q7v_jj__M3kds; -R:fjjNRlOmER)b.RsRHl1 QZ_q7v_jj__ -3bShm=_Sn -Q1j=Q_Z 7_vqj__j34kM -4SQ=Z1Q v_7q__jjk_3M -j;sjRf:ljRNROEQRheblsHRZ1Q v_7q__j4s_3 -=Sm1 QZ_q7v_4j__M3kdQ -Sj_=h4;.n -fsRjR:jlENOR7qh.sRbH1lRQ_Z 7_vqj__43Sl -mQ=1Z7 _vjq__34_k -M4S=Qjb_F#O\D 3Z1Q v_7qr_n4S9 -Qh4=_n4.;R +.cSqm=]]Qt_.Hr6S9 +Qqj=]]Qt_.Or6 +9;sjRf:ljRNROEQRheblsHR.Q_.S6 +m]=qQ_t]Hcr.9Q +Sj]=qQ_t]Ocr.9s; +R:fjjNRlOQERhbeRsRHl1 QZ_q7v_4j__ +3sS1m=Q_Z 7_vqj__43dkM +jSQ=Z1Q v_7q__d#kJlG +N;sjRf:ljRNROEq.h7RHbslQR1Z7 _vjq__34_lm +S=Z1Q v_7q__j4k_3MS4 +Q1j=Q_Z 7rvq4S9 +Q14=Q_Z 7_vqdJ_#lNkG;R sfjj:ROlNEhRq7b.RsRHl1 QZ_q7v_4j__ 3MS1m=Q_Z 7_vqj__43jkM -jSQ=Z1Q v_7q9r4 +jSQ=#bF_ OD\Q31Z7 _vnq_r +49S=Q41 QZ_q7v_4j__M3kds; +R:fjjNRlOmER)b.RsRHl1 QZ_q7v_4j__ +3bShm=_Sn +Q1j=Q_Z 7_vqj__434kM 4SQ=Z1Q v_7q__j4k_3M -d;sjRf:ljRNROEmR).blsHRZ1Q v_7q__j4b_3 +j;sjRf:ljRNROEQRheblsHRZ1Q v_7q__jjs_3 +=Sm1 QZ_q7v_jj__M3kdQ +SjQ=1Z7 _vdq__l#Jk;GN +fsRjR:jlENOR7qh.sRbH1lRQ_Z 7_vqj__j3Sl +mQ=1Z7 _vjq__3j_k +M4S=Qj1 QZ_q7vr +j9S=Q41 QZ_q7v_#d_JGlkNs; +R:fjjNRlOqERhR7.blsHRZ1Q v_7q__jjM_3 +=Sm1 QZ_q7v_jj__M3kjQ +SjF=b#D_O 1\3Q_Z 7_vqn9rj +4SQ=Z1Q v_7q__jjk_3M +d;sjRf:ljRNROEmR).blsHRZ1Q v_7q__jjb_3 =Smh -_(S=Qj1 QZ_q7v_4j__M3k4Q -S4Q=1Z7 _vjq__34_k;Mj -fsRjR:jlENOReQhRHbsluRQpd_jj__jjs_3 -=SmQ_upj_djj__j3dkM -jSQ=.h_d -d;sjRf:ljRNROEq.h7RHbsluRQpd_jj__jjl_3 -=SmQ_upj_djj__j34kM -jSQ=pQu_jjd_jOr9Q -S4_=h.;dd -fsRjR:jlENOR7qh.sRbHQlRujp_djj__3j_Mm -S=pQu_jjd_jj__M3kjQ -Sju=Qpr_OjS9 -QQ4=ujp_djj__3j_k;Md -fsRjR:jlENOR.m)RHbsluRQpd_jj__jjb_3 +_6S=Qj1 QZ_q7v_jj__M3k4Q +S4Q=1Z7 _vjq__3j_k;Mj +fsRjR:jlENOR7qh.sRbH)lRWj_jjv_7q +_4Shm=__d6jQ +Sj_=h4HU_ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbsljRq_q7v_S4 +m_=hdjc_ +jSQ=4h_g +_HS=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHRQqvtAq_z 1_hpqA v_7qm_pW +_4Shm=__d.jQ +Sj_=h.H4_ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z1 Ahqp7 _v]q_Q_t]4m +S=dh_4 +_jS=Qjh._._SH +Q)4=1Oa_;R +sfjj:ROlNEhRQesRbHqlRvqQt_1Az_q hA_p 7_vq]]Qt_sj3 +=SmqtvQqz_A1h_ q Ap_q7v_t]Q]3_jk +MdS=Qjb_F#O\D 36kM_NLoOj _dHj_M80_;R +sfjj:ROlNEhRq7b.RsRHlqtvQqz_A1h_ q Ap_q7v_t]Q]3_jlm +S=QqvtAq_z 1_hpqA v_7qQ_]tj]_34kM +jSQ=#bF_ OD\v3qQ_tqA_z1 Ahqp7 _v]q_Q_t]dQ +S4F=b#D_O k\3ML6_o NO_jjd_0HM_ +8;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z1 Ahqp7 _v]q_Q_t]j +3MSqm=vqQt_1Az_q hA_p 7_vq]]Qt_kj3MSj +Qqj=vqQt_1Az_q hA_p 7_vq]]Qt +4SQ=QqvtAq_z 1_hpqA v_7qQ_]tj]_3dkM;R +sfjj:ROlNE)Rm.sRbHqlRvqQt_1Az_q hA_p 7_vq]]Qt_bj3 =Smh._. -jSQ=pQu_jjd_jj__M3k4Q -S4u=Qpd_jj__jjk_3M -j;sjRf:ljRNROEQRheblsHRpQu_jjd_4j__ -3sSQm=ujp_djj__34_k -MdS=Qjhd_.ds; -R:fjjNRlOqERhR7.blsHRpQu_jjd_4j__ -3lSQm=ujp_djj__34_k -M4S=QjQ_upj_djO9r4 -4SQ=.h_d -d;sjRf:ljRNROEq.h7RHbsluRQpd_jj__j4M_3 -=SmQ_upj_djj__43jkM -jSQ=pQu_4Or9Q -S4u=Qpd_jj__j4k_3M -d;sjRf:ljRNROEmR).blsHRpQu_jjd_4j__ -3bShm=_ -.dS=QjQ_upj_djj__434kM -4SQ=pQu_jjd_4j__M3kjs; -R:fjjNRlOQERhbeRsRHlQ_upj_djj__.3Ss -mu=Qpd_jj__j.k_3MSd -Qhj=_d.d;R -sfjj:ROlNEhRq7b.RsRHlQ_upj_djj__.3Sl -mu=Qpd_jj__j.k_3MS4 -QQj=ujp_dOj_r -.9S=Q4hd_.ds; -R:fjjNRlOqERhR7.blsHRpQu_jjd_.j__ -3MSQm=ujp_djj__3._k -MjS=QjQ_upO9r. -4SQ=pQu_jjd_.j__M3kds; -R:fjjNRlOmER)b.RsRHlQ_upj_djj__.3Sb -m_=h.Sc -QQj=ujp_djj__3._k -M4S=Q4Q_upj_djj__.3jkM;R -sfjj:ROlNEhRQesRbHhlR_d44_SH -m_=h4_4dHQ -Sj_=h4;4d -fsRjR:jlENOReQhRHbsl_Rh4_4.Hm -S=4h_4H._ -jSQ=4h_4 -.;sjRf:ljRNROEQRheblsHR4h_4H4_ -=Smh4_44 -_HS=Qjh4_44s; -R:fjjNRlOQERhbeRsRHlq7j_vjq_3Ss -mj=q_q7v_kj3MSd -Qhj=_64U;R -sfjj:ROlNEhRq7b.RsRHlq7j_vjq_3Sl -mj=q_q7v_kj3MS4 -Qbj=FO#_D3 \q7j_vdq_ -4SQ=4h_U -6;sjRf:ljRNROEq.h7RHbsljRq_q7v_Mj3 -=Smq7j_vjq_3jkM -jSQ=_qj7 -vqS=Q4q7j_vjq_3dkM;R -sfjj:ROlNE)Rm.sRbHqlRjv_7q3_jbm -S=.h_jQ -Sjj=q_q7v_kj3MS4 -Qq4=jv_7q3_jk;Mj -fsRjR:jlENOReQhRHbsl_Rh4_4cHm -S=4h_4Hc_ -jSQ=4h_4 -c;sjRf:ljRNROEQRheblsHRQqvtAq_z 1_hpqA v_7qm_pW3_jsm -S=QqvtAq_z 1_hpqA v_7qm_pW3_jk -MdS=QjhU_46s; -R:fjjNRlOqERhR7.blsHRQqvtAq_z 1_hpqA v_7qm_pW3_jlm -S=QqvtAq_z 1_hpqA v_7qm_pW3_jk -M4S=Qjh4_4c -_HS=Q4hU_46s; +jSQ=QqvtAq_z 1_hpqA v_7qQ_]tj]_34kM +4SQ=QqvtAq_z 1_hpqA v_7qQ_]tj]_3jkM;R +sfjj:ROlNEhRQesRbHqlRvqQt_1Az_q hA_p 7_vqp_mWj +3sSqm=vqQt_1Az_q hA_p 7_vqp_mWjM3kdQ +SjF=b#D_O k\3ML6_o NO_jjd_0HM_ +8;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z1 Ahqp7 _vpq_mjW_3Sl +mv=qQ_tqA_z1 Ahqp7 _vpq_mjW_34kM +jSQ=#bF_ OD\v3qQ_tqA_z1 Ahqp7 _vpq_mdW_ +4SQ=#bF_ OD\M3k6o_LN_O j_djH_M08s; R:fjjNRlOqERhR7.blsHRQqvtAq_z 1_hpqA v_7qm_pW3_jMm S=QqvtAq_z 1_hpqA v_7qm_pW3_jk MjS=QjqtvQqz_A1h_ q Ap_q7v_Wpm 4SQ=QqvtAq_z 1_hpqA v_7qm_pW3_jk;Md fsRjR:jlENOR.m)RHbslvRqQ_tqA_z1 Ahqp7 _vpq_mjW_3Sb -m_=h.S6 +m_=h.S4 Qqj=vqQt_1Az_q hA_p 7_vqp_mWjM3k4Q S4v=qQ_tqA_z1 Ahqp7 _vpq_mjW_3jkM;R -sfjj:ROlNEhRQesRbHhlR_644_SH -m_=h4_46HQ -Sj_=h4;46 -fsRjR:jlENOReQhRHbslvRqQ_tqA_z1 Ahqp7 _v]q_Q_t]j -3sSqm=vqQt_1Az_q hA_p 7_vq]]Qt_kj3MSd -Qhj=_64U;R -sfjj:ROlNEhRq7b.RsRHlqtvQqz_A1h_ q Ap_q7v_t]Q]3_jlm -S=QqvtAq_z 1_hpqA v_7qQ_]tj]_34kM -jSQ=4h_4H6_ -4SQ=4h_U -6;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z1 Ahqp7 _v]q_Q_t]j -3MSqm=vqQt_1Az_q hA_p 7_vq]]Qt_kj3MSj -Qqj=vqQt_1Az_q hA_p 7_vq]]Qt -4SQ=QqvtAq_z 1_hpqA v_7qQ_]tj]_3dkM;R -sfjj:ROlNE)Rm.sRbHqlRvqQt_1Az_q hA_p 7_vq]]Qt_bj3 -=Smhn_. -jSQ=QqvtAq_z 1_hpqA v_7qQ_]tj]_34kM -4SQ=QqvtAq_z 1_hpqA v_7qQ_]tj]_3jkM;R -sfjj:ROlNEhRQesRbHAlRtj_jj3_jsm -S=_Atj_jjjM3kdQ -SjF=b#D_O k\3MLg_od_jjs; -R:fjjNRlOqERhR7.blsHR_Atj_jjj -3lSAm=tj_jj3_jk -M4S=QjAjt_dOj_ -4SQ=#bF_ OD\M3kgo_L_jjd;R -sfjj:ROlNEhRq7b.RsRHlAjt_jjj_3SM -mt=A_jjj_kj3MSj -QAj=tj_jj -_OS=Q4Ajt_jjj_3dkM;R -sfjj:ROlNE)Rm.sRbHAlRtj_jj3_jbm -S=.h_(Q -Sjt=A_jjj_kj3MS4 -QA4=tj_jj3_jk;Mj -fsRjR:jlENOR7qh.sRbHAlRtj_jj -_4Shm=__.UjQ -Sj_=h.H(_ -4SQ=a)1_ -O;sjRf:ljRNROEq.h7RHbslvRqQ_tqA_z1 Ahqp7 _v]q_Q_t]4m -S=.h_g -_jS=Qjhn_._SH -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHlqtvQqz_A1h_ q Ap_q7v_Wpm_S4 -m_=hdjj_ -jSQ=.h_6 -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHR_qj7_vq4m -S=dh_6 -_jS=Qjhj_._SH -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHl)jW_j7j_v4q_ -=Smhn_d_Sj -Qhj=__4gHQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbHqlR1d_jjj_jjY_1h4B_ -=Smhj_c_Sj -Qhj=__46HQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbHqlR1j_jjv_7q -_4Shm=__ccjQ -Sj_=hc -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHR_71j_jj7_vq4m -S=ch_6 -_jS=Qjh__dHQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbHQlRujp_d4j_r -j9Shm=__d4jQ -Sj_=h.H._ -4SQ=a)1_ -O;sjRf:ljRNROEQRheblsHRQqvtAq_z 1_hpqA v_7qm_pW -_HSqm=vqQt_1Az_q hA_p 7_vqp_mWHQ -Sjv=qQ_tqA_z1 Ahqp7 _vpq_m -W;sjRf:ljRNROEq.h7RHbslMRk4l_NH_oNL_k#CLMNDDC_FSI -mM=k4l_NH_oNL_k#CLMNDDC_FSI -Qqj=vqQt_1Az_q hA_p 7_vqp_mWHQ -S4t=Aq_Bij_djQ_haHs; -R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kgo_L_jjd -=Smb_F#O\D 3gkM__Loj_djjQ -Sjt=A_jjd_HO_ -4SQ=.h_d -4;sjRf:ljRNROEQRheblsHR(kM__N#j_djHm -S=(kM__N#j_djHQ -SjM=k(#_N_jjd;R -sfjj:ROlNEhRQesRbHhlR_d4d_SH -m_=h4_ddHQ -Sj_=h4;dd -fsRjR:jlENOReQhRHbsl_Rh4_d.Hm -S=4h_dH._ -jSQ=4h_d -.;sjRf:ljRNROEQRheblsHR_71j_jj7_vqHm -S=_71j_jj7_vqHQ -Sj1=7_jjj_q7v;R -sfjj:ROlNEhRq7b.RsRHlk_Mn8j#_dSj -mM=kn#_8_jjd -jSQ=_q1j_jjHQ -S41=7_jjj_q7v_ -H;sjRf:ljRNROEQRheblsHRnkM__8#j_djHm -S=nkM__8#j_djHQ -SjM=kn#_8_jjd;R -sfjj:ROlNEhRQesRbH7lR1j_jjv_7q3_jsm -S=_71j_jj7_vqjM3kdQ -Sj_=h.;cn -fsRjR:jlENOR7qh.sRbH7lR1j_jjv_7q3_jlm -S=_71j_jj7_vqjM3k4Q -SjF=b#D_O 7\31j_jjv_7q -_cS=Q4hc_.ns; -R:fjjNRlOqERhR7.blsHR_71j_jj7_vqj -3MS7m=1j_jjv_7q3_jk -MjS=Qj7j1_j7j_vSq -Q74=1j_jjv_7q3_jk;Md -fsRjR:jlENOR.m)RHbsl1R7_jjj_q7v_bj3 -=Smh -_dS=Qj7j1_j7j_vjq_34kM -4SQ=_71j_jj7_vqjM3kjs; -R:fjjNRlOQERhbeRsRHlqj1_j7j_vjq_3Ss -m1=q_jjj_q7v_kj3MSd -Qhj=_6.c;R -sfjj:ROlNEhRq7b.RsRHlqj1_j7j_vjq_3Sl -m1=q_jjj_q7v_kj3MS4 -Qbj=FO#_D3 \k4M._NLoOj _dHj_MH0__Sj -Qh4=_6.c;R -sfjj:ROlNEhRq7b.RsRHlqj1_j7j_vjq_3SM -m1=q_jjj_q7v_kj3MSj -Qqj=1j_jjv_7qQ -S41=q_jjj_q7v_kj3M -d;sjRf:ljRNROEmR).blsHR_q1j_jj7_vqj -3bShm=_Sc -Qqj=1j_jjv_7q3_jk -M4S=Q4qj1_j7j_vjq_3jkM;R -sfjj:ROlNEhRQesRbHqlR1d_jjj_jjY_1hjB_3Ss -m1=q_jjd_jjj_h1YB3_jk -MdS=Qjh4_djs; -R:fjjNRlOqERhR7.blsHR_q1j_djj_jj1BYh_lj3 -=Smqj1_djj_j1j_Y_hBjM3k4Q -Sj1=q_jjd_SO -Qh4=_jd4;R -sfjj:ROlNEhRq7b.RsRHlqj1_djj_j1j_Y_hBj -3MSqm=1d_jjj_jjY_1hjB_3jkM -jSQ=_q1j_djj_jj1BYh -4SQ=_q1j_djj_jj1BYh_kj3M -d;sjRf:ljRNROEmR).blsHR_q1j_djj_jj1BYh_bj3 -=Smh6_4 -jSQ=_q1j_djj_jj1BYh_kj3MS4 -Qq4=1d_jjj_jjY_1hjB_3jkM;R +sfjj:ROlNEhRQesRbHqlRjv_7q3_jsm +S=_qj7_vqjM3kdQ +SjF=b#D_O k\3ML6_o NO_jjd_0HM_ +8;sjRf:ljRNROEq.h7RHbsljRq_q7v_lj3 +=Smq7j_vjq_34kM +jSQ=#bF_ OD\j3q_q7v_Sd +Qb4=FO#_D3 \k_M6LOoN d_jjM_H0;_8 +fsRjR:jlENOR7qh.sRbHqlRjv_7q3_jMm +S=_qj7_vqjM3kjQ +Sjj=q_q7v +4SQ=_qj7_vqjM3kds; +R:fjjNRlOmER)b.RsRHlq7j_vjq_3Sb +m_=h4Sg +Qqj=jv_7q3_jk +M4S=Q4q7j_vjq_3jkM;R sfjj:ROlNEhRQesRbH)lRWj_jjv_7q3_jsm S=_)Wj_jj7_vqjM3kdQ -Sj_=h4;U6 -fsRjR:jlENOR7qh.sRbH)lRWj_jjv_7q3_jlm -S=_)Wj_jj7_vqjM3k4Q -SjF=b#D_O )\3Wj_jjv_7q -_dS=Q4hU_46s; -R:fjjNRlOqERhR7.blsHR_)Wj_jj7_vqj -3MS)m=Wj_jjv_7q3_jk -MjS=Qj)jW_j7j_vSq -Q)4=Wj_jjv_7q3_jk;Md -fsRjR:jlENOR.m)RHbslWR)_jjj_q7v_bj3 -=Smhg_4 -jSQ=_)Wj_jj7_vqjM3k4Q -S4W=)_jjj_q7v_kj3M -j; +SjF=b#D_O k\3ML6_o NO_jjd_0HM_ +8;sjRf:ljRNROEq.h7RHbslWR)_jjj_q7v_lj3 +=Sm)jW_j7j_vjq_34kM +jSQ=#bF_ OD\W3)_jjj_q7v_Sd +Qb4=FO#_D3 \k_M6LOoN d_jjM_H0;_8 +fsRjR:jlENOR7qh.sRbH)lRWj_jjv_7q3_jMm +S=_)Wj_jj7_vqjM3kjQ +SjW=)_jjj_q7v +4SQ=_)Wj_jj7_vqjM3kds; +R:fjjNRlOmER)b.RsRHl)jW_j7j_vjq_3Sb +m_=h4SU +Q)j=Wj_jjv_7q3_jk +M4S=Q4)jW_j7j_vjq_3jkM;R +sfjj:ROlNEhRQesRbHqlRvqQt_1Az_q hA_p 7_vqp_mWHm +S=QqvtAq_z 1_hpqA v_7qm_pW +_HS=QjqtvQqz_A1h_ q Ap_q7v_Wpm;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3Z1Q v_7q__njr_j4S9 +mF=b#D_O 1\3Q_Z 7_vqnr_j4S9 +Qhj=_n4j_SH +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3Z1Q v_7q__njr_jjS9 +mF=b#D_O 1\3Q_Z 7_vqnr_jjS9 +Qhj=_(4j_SH +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHlqtvQq1_7_jj_ +=Smhn_c_Sj +Qhj=_(44_SH +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHlk4M4_HNloLN_kC#_MDNLCH_EojE_ +=Smk4M4_HNloLN_kC#_MDNLCH_EoHE_ +jSQ=4h_.Hg_ +4SQ=4h_dHj_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3Z1Q v_7q__nj__jFj.r9m +S=Uh_n +_HS=Qjp_71j_jjO +_HS=Q4z_71j_jjO;_H +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \)jW_j7j_vdq_ +=Smb_F#O\D 3_)Wj_jj7_vqd +_jS=QjABtqid_jjh_Qa +_HS=Q4)jW_jHj_;R +sfjj:ROlNEhRQesRbHqlR_4Hr9m +S=Hq_r +49S=Qjqr_O4 +9;sjRf:ljRNROEq.h7RHbslFRb#D_O q\3vqQt_1Az_q hA_p 7_vqp_mWdm +S=#bF_ OD\v3qQ_tqA_z1 Ahqp7 _vpq_mdW__Sj +Qqj=_4Or9Q +S4t=Aq_Bij_djQ_haHs; +R:fjjNRlOqERhR7.blsHR#bF_ OD\v3qQ_tqA_z1 Ahqp7 _v]q_Q_t]dm +S=#bF_ OD\v3qQ_tqA_z1 Ahqp7 _v]q_Q_t]d +_jS=Qjqr_H4S9 +QA4=tiqB_jjd_aQh_ +H;sjRf:ljRNROEq.h7RHbslQR1Z7 _vdq__l#Jk +GNS1m=Q_Z 7_vqdJ_#lNkG +jSQ=a)1_SO +Qb4=FO#_D3 \k_M6LOoN d_jjM_H0__8Hs; +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3k6o_LN_O j_djH_M08m +S=#bF_ OD\M3k6o_LN_O j_djH_M08 +_HS=QjABtqid_jjh_QaQ +S4t=Aq_Bij_djQ_ha7s; +R:fjjNRlOQERhbeRsRHlQd_.jm +S=Qq]tH]_r9d4 +jSQ=Qq]tO]_r9d4;R +sfjj:ROlNEhRQesRbHQlR_4.d +=Smqt]Q]r_Hd +j9S=Qjqt]Q]r_Od;j9 +fsRjR:jlENOReQhRHbsl_RQ. +.USqm=]]Qt_.HrgS9 +Qqj=]]Qt_.Org +9;sjRf:ljRNROEQRheblsHR.Q_.Sg +m]=qQ_t]HUr.9Q +Sj]=qQ_t]OUr.9s; +R:fjjNRlOqERhR7.blsHR#bF_ OD\M3kdNc_#d_jjj_8_SH +m_=hnjc_ +jSQ=4h_dH4_ +4SQ=.h_(H(_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3dkMc#_N_jjd__8jH._N +=Smhd_44Q +Sj1=q_jjd_SH +Qh4=_;g4 +fsRjR:jlENOReQhRHbsl1Rq_jjd_jjj_h1YB +_HSqm=1d_jjj_jjY_1hHB_ +jSQ=_q1j_djj_jj1BYh;R +sfjj:ROlNEhRQesRbHwlRu1z_ h1_SH +mu=wz _1h_1 HQ +Sju=wz _1h_1 Os; +R:fjjNRlOQERhbeRsRHlkjM4_HOHM +_HSkm=M_4jOMHH_SH +Qkj=M_4jOMHH;R +sfjj:ROlNEhRq7b.RsRHlkdM4_HOHMm +S=4kMdH_OHSM +QMj= _Xu1Buq +_HS=Q4kjM4_HOHM;_H +fsRjR:jlENOReQhRHbsl1Rq_jjd__7jHm +S=_q1j_dj7Hj_ +jSQ=_q1j_dj7 +j;sjRf:ljRNROEq.h7RHbslFRb#D_O 1\3Q_Z 7_vqn__jj._Nr +49Shm=_n4j +jSQ=qAtBji_dQj_hHa_ +4SQ=Uh_n;_H +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \1 QZ_q7v_jn__Nj_.9rj +=Smhj_4(Q +Sjt=Aq_Bij_djQ_haHQ +S4_=hU +n;sjRf:ljRNROEq.h7RHbslvRqQ_tq7j1__Nj_.m +S=4h_4S( +Qpj=7j1_jOj_ +4SQ=1z7_jjj_ +O;sjRf:ljRNROEq.h7RHbslFRb#D_O q\31j_jjh_Qa__4H._N +=Smh._4.Q +Sj1=q_jjj_aQh_SH +Qq4=1d_jj;_H +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \7B1qiQ4_h4a__NH_.m +S=4h_.Sd +Qqj=1d_jj +_HS=Q47B1qiQ4_hHa_;R +sfjj:ROlNEhRq7b.RsRHlb_F#O\D 3_qj7_vqd__jNS. +mF=b#D_O q\3jv_7q +_dS=QjABtqid_jjh_Qa +_HS=Q4z_71j_jjOs; +R:fjjNRlOQERhbeRsRHlqtvQqz_A1h_ q Ap_q7v_t]Q] +_HSqm=vqQt_1Az_q hA_p 7_vq]]Qt_SH +Qqj=vqQt_1Az_q hA_p 7_vq]]Qt;R +sfjj:ROlNEhRq7b.RsRHlk4M4_HNloLN_kC#_MDNLCH_EojE__ +N.Shm=_g4. +jSQ=QqvtAq_z 1_hpqA v_7qQ_]tH]_ +4SQ=qAtBji_dQj_hHa_;R +sfjj:ROlNEhRQesRbHBlRpmi_zua_)6 _j +_HSBm=pmi_zua_)6 _j +_HS=QjB_pim_zau_) 6 +j;sjRf:ljRNROEQRheblsHR.h_.Hc_ +=Smh._.c +_HS=Qjh._.cs; +R:fjjNRlOQERhbeRsRHlh._.6 +_HShm=_6.._SH +Qhj=_6..;R +sfjj:ROlNEhRQesRbHhlR_n.._SH +m_=h._.nHQ +Sj_=h.;.n +fsRjR:jlENOReQhRHbsl_Rq7m B7H _r94U +=Smq _7B m7_4HrUS9 +Qqj=_B7 m_7 OUr49s; +R:fjjNRlOQERhbeRsRHlq _7B m7_4HrgS9 +m_=q7m B7H _r94g +jSQ=7q_ 7Bm r_O4;g9 +fsRjR:jlENOR)Xm.sRbHtlR_.4. +=Smh._.cQ +Sju=Qpj_7r +j9S=Q4Q_upO9rj;R +sfjj:ROlNEmRX)b.RsRHlt._4dm +S=.h_.S6 +QQj=u7p_j9r4 +4SQ=pQu_4Or9s; +R:fjjNRlOQERhbeRsRHlq _7B m7_4HrnS9 +m_=q7m B7H _r94n +jSQ=7q_ 7Bm r_O4;n9 +fsRjR:jlENOR7qh.sRbHblRFO#_D3 \)jW_jQj_h6a_ +=Smb_F#O\D 3_)Wj_jjQ_ha6 +_jS=Qjh6_4g +_jS=Q4)OW__ +H;sjRf:ljRNROEq.h7RHbslMRk4v_1_Qqvtjq__l#Jk_GN4 +_jSkm=M14_vv_qQ_tqjJ_#lNkG_j4_ +jSQ=(h_gQ +S4_=h4_6gjs; +R:fjjNRlOqERhR7.blsHR4kM__1vqtvQq__jFjc_ +=Smh6_4g +_jS=Qjhj_4c +_HS=Q41qv_vqQt_(Hr9s; +R:fjjNRlOQERhbeRsRHlk_M4s_#0.__4Hm +S=4kM_0s#_4.__SH +Qkj=Ms4_#.0__ +4;sjRf:ljRNROEQRheblsHR.h_cH6_ +=Smhc_.6 +_HS=Qjhc_.6s; +R:fjjNRlOQERhbeRsRHlh(_.c +_HShm=_c.(_SH +Qhj=_c.(;R +sfjj:ROlNEhRQesRbHQlRujp_djj__3j_sm +S=pQu_jjd_jj__M3kdQ +SjF=b#D_O H\3b +D;sjRf:ljRNROEq.h7RHbsluRQpd_jj__jjl_3 +=SmQ_upj_djj__j34kM +jSQ=pQu_jOr9Q +S4F=b#D_O H\3b +D;sjRf:ljRNROEq.h7RHbsluRQpd_jj__jjM_3 +=SmQ_upj_djj__j3jkM +jSQ=pQu_jjd_jOr9Q +S4u=Qpd_jj__jjk_3M +d;sjRf:ljRNROEmR).blsHRpQu_jjd_jj__ +3bShm=_ +.cS=QjQ_upj_djj__j34kM +4SQ=pQu_jjd_jj__M3kjs; +R:fjjNRlOQERhbeRsRHlQ_upj_djj__43Ss +mu=Qpd_jj__j4k_3MSd +Qbj=FO#_D3 \H;bD +fsRjR:jlENOR7qh.sRbHQlRujp_djj__34_lm +S=pQu_jjd_4j__M3k4Q +Sju=Qpr_O4S9 +Qb4=FO#_D3 \H;bD +fsRjR:jlENOR7qh.sRbHQlRujp_djj__34_Mm +S=pQu_jjd_4j__M3kjQ +Sju=Qpd_jjr_O4S9 +QQ4=ujp_djj__34_k;Md +fsRjR:jlENOR.m)RHbsluRQpd_jj__j4b_3 +=Smh6_. +jSQ=pQu_jjd_4j__M3k4Q +S4u=Qpd_jj__j4k_3M +j;sjRf:ljRNROEQRheblsHR(kM__N#j_djHm +S=(kM__N#j_djHQ +SjM=k(#_N_jjd;R +sfjj:ROlNEhRQesRbHhlR_.4._SH +m_=h4_..HQ +Sj_=h4;.. +fsRjR:jlENOReQhRHbsl_Rh4_.dHm +S=4h_.Hd_ +jSQ=4h_. +d;sjRf:ljRNROEQRheblsHRnkM__8#j_djHm +S=nkM__8#j_djHQ +SjM=kn#_8_jjd;R +sfjj:ROlNEhRQesRbHklRM_4dOMHH_SH +mM=k4Od_H_HMHQ +SjM=k4Od_H;HM +fsRjR:jlENOReQhRHbsl1Rq_jjd_jjj_h1YB3_jsm +S=_q1j_djj_jj1BYh_kj3MSd +Qhj=_;nc +fsRjR:jlENOR7qh.sRbHqlR1d_jjj_jjY_1hjB_3Sl +m1=q_jjd_jjj_h1YB3_jk +M4S=Qjqj1_djj_j1j_Y +hBS=Q4hc_n;R +sfjj:ROlNEhRq7b.RsRHlqj1_djj_j1j_Y_hBj +3MSqm=1d_jjj_jjY_1hjB_3jkM +jSQ=_q1j_djOQ +S41=q_jjd_jjj_h1YB3_jk;Md +fsRjR:jlENOR.m)RHbsl1Rq_jjd_jjj_h1YB3_jbm +S=4h_cQ +Sj1=q_jjd_jjj_h1YB3_jk +M4S=Q4qj1_djj_j1j_Y_hBjM3kjs; +R:fjjNRlOQERhbeRsRHl)jW_jQj_hja_3Ss +mW=)_jjj_aQh_kj3MSd +Qkj=M14_vv_qQ_tqjJ_#lNkG_ +4;sjRf:ljRNROEq.h7RHbslWR)_jjj_aQh_lj3 +=Sm)jW_jQj_hja_34kM +jSQ=#bF_ OD\W3)_jjj_aQh_S6 +Qk4=M14_vv_qQ_tqjJ_#lNkG_ +4;sjRf:ljRNROEq.h7RHbslWR)_jjj_aQh_Mj3 +=Sm)jW_jQj_hja_3jkM +jSQ=_)Wj_jjQ +haS=Q4)jW_jQj_hja_3dkM;R +sfjj:ROlNE)Rm.sRbH)lRWj_jjh_Qa3_jbm +S=4h_6Q +SjW=)_jjj_aQh_kj3MS4 +Q)4=Wj_jjh_Qa3_jk;Mj +fsRjR:jlENOR7qh.sRbH)lRWj_jjh_Qa +_4Shm=__dUjQ +Sj_=h4H6_ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbsl1Rq_jjd_jjj_h1YB +_4Shm=__dgjQ +Sj_=h4Hc_ +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbsluRQpj_7_jjr9m +S=ch_g +_jS=QjQ_upOr_HjS9 +Q)4=1Oa_;R +sfjj:ROlNEhRq7b.RsRHlQ_up7jj_r +49Shm=__6jjQ +Sju=Qp__OH9r4 +4SQ=a)1_ +O;sjRf:ljRNROEq.h7RHbsluRQpd_jjr_4jS9 +m_=h.j(_ +jSQ=.h_c +_HS=Q4)_1aOs; +R:fjjNRlOqERhR7.blsHRpQu_jjd_44r9m +S=.h_U +_jS=Qjh6_._SH +Q)4=1Oa_; + + + @ diff --git a/Logic/BUS68030.srr b/Logic/BUS68030.srr index f4003cf..ab5582c 100644 --- a/Logic/BUS68030.srr +++ b/Logic/BUS68030.srr @@ -6,7 +6,7 @@ #Implementation: logic $ Start of Compile -#Wed Oct 26 22:26:19 2016 +#Fri Nov 18 19:32:29 2016 Synopsys VHDL Compiler, version comp201403rcp1, Build 060R, built May 27 2014 @N|Running in 64-bit mode @@ -20,16 +20,18 @@ File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vh @N: CD630 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral @N: CD233 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":70:10:70:11|Using sequential encoding for type sm_e @N: CD233 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":87:14:87:15|Using sequential encoding for type sm_68000 -@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":128:7:128:17|Signal clk_out_pre is undriven +@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":129:7:129:17|Signal clk_out_pre is undriven +@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:7:133:15|Signal clk_030_h is undriven Post processing for work.bus68030.behavioral -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register DS_030_D0_3 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register nEXP_SPACE_D0_3 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register BGACK_030_INT_PRE_2 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":130:34:130:36|Pruning register CLK_OUT_EXP_INT_1 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":126:36:126:38|Pruning register CLK_OUT_PRE_25_3 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":154:2:154:3|Pruning register CLK_030_D0_2 -@W: CL271 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... -@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Trying to extract state machine for register SM_AMIGA +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register AS_000_D0_3 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register DS_030_D0_3 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register nEXP_SPACE_D0_3 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register BGACK_030_INT_PRE_2 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:34:131:36|Pruning register CLK_OUT_EXP_INT_1 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":127:36:127:38|Pruning register CLK_OUT_PRE_25_3 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":156:2:156:3|Pruning register CLK_030_D0_2 +@W: CL271 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... +@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Trying to extract state machine for register SM_AMIGA Extracted state machine for register SM_AMIGA State machine has 8 reachable states with original encodings of: 000 @@ -40,14 +42,14 @@ State machine has 8 reachable states with original encodings of: 101 110 111 -@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Trying to extract state machine for register cpu_est +@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Trying to extract state machine for register cpu_est @W: CL246 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":24:1:24:8|Input port bits 15 to 2 of a_decode(23 downto 2) are unused @END At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 70MB peak: 71MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Wed Oct 26 22:26:19 2016 +# Fri Nov 18 19:32:29 2016 ###########################################################] Synopsys Netlist Linker, version comp201403rcp1, Build 060R, built May 27 2014 @@ -57,7 +59,7 @@ File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\synwork\BUS68030_c At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Wed Oct 26 22:26:20 2016 +# Fri Nov 18 19:32:31 2016 ###########################################################] Map & Optimize Report @@ -66,7 +68,7 @@ Synopsys CPLD Technology Mapper, Version maplat, Build 923R, Built May 6 2014 Copyright (C) 1994-2013, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use or distribution of the software is strictly prohibited. Product Version I-2014.03LC @N: MF248 |Running in 64-bit mode. -@N:"c:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Found counter in view:work.BUS68030(behavioral) inst RST_DLY[2:0] +@N:"c:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Found counter in view:work.BUS68030(behavioral) inst RST_DLY[2:0] Encoding state machine SM_AMIGA[0:7] (view:work.BUS68030(behavioral)) original code -> new code 000 -> 00000000 @@ -81,15 +83,15 @@ original code -> new code Resource Usage Report Simple gate primitives: -DFF 55 uses -BI_DIR 18 uses -BUFTH 4 uses +DFF 57 uses +BI_DIR 19 uses +BUFTH 3 uses IBUF 38 uses OBUF 15 uses -AND2 269 uses -INV 238 uses -OR2 22 uses -XOR2 5 uses +AND2 277 uses +INV 236 uses +OR2 23 uses +XOR2 8 uses @N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis. @@ -99,6 +101,6 @@ Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 39MB peak: 105MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Wed Oct 26 22:26:20 2016 +# Fri Nov 18 19:32:31 2016 ###########################################################] diff --git a/Logic/BUS68030.srs b/Logic/BUS68030.srs index 56f4690c1409b3c2b459c2744ed7a6a5e00f72e3..63c82f8d2da384e556e8c8dec01bc81035d244ca 100644 GIT binary patch delta 12789 zcmV#8`S(WA*|0((sc1Hr{3 zk+$G0eDMf-_Y=}vNH_U1%a#6QHM{)fMZ4<8@EevgXdz0p>(y{kSpE<^`$GTH<2+qXC25u=AC}n**Os|>3?GDOBt0`! zHh7Xk)Y4bca4prDi|gBDnat@d#ECQMN+FCpp&BGE&h!1}r^C=xDA%-$XqVM)Hml8& z*XZN!HvqHA0oDP3bK*F&_UGYOP?!6~~ZM|4(^~=?**5?`hOxg~2oHilc3BOW0rH2payVq_Y z1g965u0Or<4kLfkp#D|w$}=wLU_$&+rpK&%;nE%v+#K0LzK=Vf`0Lr0xrVj22=nN@D@0G=|KvMZ zJ>%Z9CWdFlWox_H+4lGG)GDS^wiwS$?{IoP0g7^^~m*f3jYC)E&q%U(()$ zO}}pcoOxT%Te@OEN2A97Vi_D;&ol17Ox%G_XOHrEgZBQopRwhm!4B)`mQimY)b$yR z%*Fj2Ce8>YwvJsIl%+S$?#Je$R|Q@C7Y@Ie82Wnzhx&w%SQs zB5q4mwRea0)uF9_>$lpvrk&$$ZLqBkyjMRS!+!M`_K%KX z|JWFsL_k}nX!o60IYxaNe*!Id2imiy6Ly$+k3OuOR`(U_6G$iC9~5cH@{q0x@Pu{a zktX-wZjWGl1loH_+Iy;R@99W;PbaizVtZz|aJqk!=H8)V*ljNU-V5Rk7c{;$62sDe z*mh}a(fYeN@{+ne>i{kL?ue2GeO${r;&N+Tn`>)&SUygCV?=}OKB>O{`I3G%C0{0{ z4SyHW?K8jKlh84Tw=`PppKrNIoG=>F+uOzS-r>X?h2=g1UE}@Q@xgk{+kMy=0)4FM zAL|*LE)T%){72ddMvu`tu77CSm1C%X)v-HXNBdYE!SOmaZ`J{0B#zd>New-CF+GGx z4`INZsQ=I$_s!;>4;_>CBi8JXADVn`I@BCSP1YYbANqU8E}MyEUu&DMEm)Tw@t^EGXbI-Tk@;L*>#?Ev>7du8nEOCZM} zh{pivktUyY{b;uSdVw*R#$$jolW%q}&hOVQ8`Ia{FN}`6zuC*{m~>fH9rE6&8_z)) z(_*-RzgYIJ+wA^s(wFXkD{D6Ix^?Bd-R4~rV2ae< z&RA8MR;#JjS19$&u+3kb@6ikW9#xLp_m^xE2a2G0T$@a1B0rd|5 zHT7oOk@a7a-$Pvl>jJ&Qp`GhasF_BzDAwvT0U>b48k_y@Ba6gAPpBjE7zBr zGdt#wHpuSwFDF{C=P2s*`z&hSoztgg^bDg5zxvG%yL*a%&YM16PDX}Xr7!)87SF67 z^*eX088y$JvN^MDV52C!16kiIJMTuUzXH8r5p}36*FAq_Z~;2d?^MyiBKq|V65zGp zWf5CN{nnzR_>(Q|B70{>!b$7G{G{B&?guWHa^UU$`Ys#H-RWQ-+Y@h(!$f;Crs()Y_+&!js8h}7tr@#jp*pJ{dYWn`yFRubhkP>zn}}8(od;Nv)9#0btZZ{ z3;V}u2Gw`IGlMhH{ z>yvnW{Os(6XH$A1(a|w84dzR`?8tMwd**xW(Z6I{!@ZpOlM9!5qsNP*^X&QekC#4w z+X8!-P5euD$|he=kO2md?Y+03YoGQUu4!??b3kV&_3f0p)H}rbP5l^|Fh--p*Q3uc z-$?M;x5qod5RtbWrPV%*vC&ibmLHxtC!Aeec#lWhPUwy`%;Pft@xr?})@~o>7;Qj& z7siCK{qz1y!#`SgH~JOJBbd}bzua$s{bTKP30v&{Zjuvpla9DPNq=~ic=+jadvt7@ ztkY%974l;7Co}H-?U$ove3PLsiy4<&W(|B;?1RIxvFN~<_gCzRd^^s=)wAY1p5-Sz z3-j>{dG6>rIy!!t@89K6fIeJ)aFg3^K2AINjy~eVg4Ie{M%#{L^HN5GXsy$ugRMyiZ2o&FGta z?ekj3)1Y6B>^9EXRye8c|HGn!I>Mu~s}vWahNXX(pL@eXU1%NSy##7Ko7nb)d!>^{#MSvUbcIhP9^g_2Hh6 zXk(p=MR3l9{wx>thvNxpc!{CpSr*s zbA8k?u;Onz)Pmp8DsTzgfx+HJ%Z^!Zle z2}LX)b=T+H#qBRzU2gPztJbe*?;K|bBX`DyeD698@5gm+EGyeYA406>RHgcRSBnjrrCYO z>yr5*Z4<+p;8jc_=S#1L-L3jMpDbdT+kW}ld7l>X&UNft#>f@)R;Px3R7`&P>{9+1Q&nG#GXokNtO8 zTj&G*vC7pcG1X+e)%O%{O<0KZW{~hs6oS#cUx8o&EV-m)z{P%}{pX_z9lK$J;`u<|g7rn0LPxjaN zCHt(XgUI>h@KWt~KG9ZKJ-n7^6Kw+QE7D={H^zFX?`lp>3`pSt)NO_+s}wIJU{5G| zoL^C;N9+}U1i6kjN~TwkRIiY+DIvZuvE>{*u{g$L&-&qyVQx-kdU1-D<84__n9v*0C&m{b56aU?e>H}= z6*~S6i&Q>4>WlP!1CaHBeBW3%Qy39_UFGUSzx%_Ay>3?$he7{4&LLIT)qIC)zC)6( zUu7HaUz%p+7;^DqHe>xqvkUjs9H#d{2O4I7^A4>9(1HnqH{q=)7rLxpCBORHZsuR2 z{jPd88`IF{P*)h*PCKqI!{GD!M0OoC-Pzn^6VzeWg1Op!lT245I~&;l4*IL)+yoUG zcnztit9S(1p*$noW)Q&E!K*t*z!uhcVPml6A0u zzM|8)!6v;AH_9LL!a7ZxKoiD#itXJz_2MdO~7Qz(s5MED! z7Ix;S^1pi3a+X|Ydij*D4Sd(=rdOqdJh6vsa>_G%8fo@L2x1oW;t+;{$9hyOn`1of z2Pw&LWtWv~t|UfUad51EZ9)&0d)U&g1r~T5i-Y~Z7!`aL7`Rv({=~(x zUkd8G6N65czOi)W_foxcXCTLCP6w0@=7Yw(%zt6sr+ze$9dd0h2TQ8+(yH%B2jjk+ z$L{Fwg^V!(+i;DsEmO8WOsu6(AC0gshAyd3#=~IDyf#ja`J<+He^yX@ib?IQCvVhj-aeoOIMVRdX8 zv|BlLEu!~z!+}L`Sj#(bgF^)UIFu>Kz)3(c^ecOR*)PL2Kh5 z6_1GbgPbqd0k%<1lm zKeur+0N;Ub+U7~TtK{Lpk1Od3bWDA|`&G1t>lOD}jOe%`{w=JGebw51lYfL5+Xr$I z1K-ZVc1lB_10-_8AB?Ym;xR;jyP_q$Z|bsgT_Y>Q9qRpIxRdf-J#+V?DS5enH5;V# zNbj2I{cTfXK2pZdYGgd9?O@3QEw#a#4Ki7{?s*fOM-T#kDmw9Qdh7KhmBSugPxM$< z#eY=4ISj}K_&>%ipRI+X%5C|K>-s?@jWW*D*nqW5>&i-AU5Jr?NbImsnyx0u`ZF8s zAE(-;2ZLYvO47NCu1Ya=3SUV56?GVaULWYau`ZjBRj=&d)X~-=XOAEJxzsr=Ah;ic zY@XHp%z9g{@FiHI9-CQ%+d4{M4)WLs<;qbM?UDVbZ`~>{R@5gI+@nSl)R^J*G~`G9Bx7+ ztqt}ru`zsMFkZle()~jMvGQ25= zKiG&_A)U$CGn&y9;&cDjOXRInLSfw zk0d;Xquw5WxfC&h5(cKm0{aLS7IxW2`aEXm@Wjs9()%wb*f9K*XRx0d|E{B3i5C>c zKchd;azX@vP05dP@5(@yDI4+pDv!yLKBEO5$0Bl^x2y3BfC++0R^o$pB_H&1@@sCh z$@Bx;dKLpkL+6k7Df}^e_dsx1cR?Ve?5~PH*X_f9%KH`XENxI+lSN)RaoM!-HML9a z9qKh`mxj9p?}_7^3O1=+?`VswwS{peP=C9?ODfj8sn)x~DB|^QGRgbCvO`uj3`|(w zsBk8jv?6FvZ_FKceox$@?Zr-Z!cILInL$#6cdca80O}fL@#G4GP;7 z7883x#C%xyJI2=jZTkc|P}@G-%(bumCWZEYDTp?$O`_i$F|*|3oeM{+mxu&IlyXz+ zn;e^(-|76IUmAU(x_>#h7s9Nk0rD0NkOB>8zoAW2Z?oV(eqZ~fx_we;pXA$5=fZr0 z7LJTP!8xrSdm{22B;C3{lkT!3f;+ujBPYA5}F!kX$_dI|asY3DI4c%GMi4S8FW&xno%)RwK{p>_NOV-plM5}=nxj$cq7zwqezg|*`s z){mdQ-f*81HFI(}9PWAM_v5MGFR+2*ZAc*fema)Gh@Ijn3HD#a5eVw4sy{h@3`Q$E zcdKPF^w})+nP>bX^Kqc}9sV;nnB^#k2iY@I>5K#2rqudq`gVdXvij?|NA>rRj*)lg zW0u0g?<{txy(gu(B}JP%jwuKPcg)=e<7%qLY#>-AZQ2@bt_RiE;T6+3Bjr0(7&Gz( zg}KsjSc<{{ND_0$IQ_Ln{6(|V~Q~#7Lcy3O@?n*U6Z*f)&4tiTV{Y0QT9DHXh5W zDdJe^wJ?XRm?^fR`LQ+oiko1xi8fcb510E)a+rL)mxXePIbA$%FLF4&jPn|~RyBPk ze)*h#EV-7*SLLVw_kOaZ-nVE7^Mpv=2c0}K5$Em7I4Y6EtkN%jiVgmvrF*4)GU}OK zl*K?a*-M6LhiEop+8^_OtS_9(SawYwRL0i#eOg&gwH?;Ay(2KS=xU4GF76BZ;b*)P z^Fy$o1lM4SM^{~A-Cq(jz<83>?{wExW822OM;yMKnOr0}wIsGu@vd@T5b_y=E5v@J)?)C~X0y0-oBAblmU}>DY zRL^fjlRQaEhN`$IohCLw6D-dA_AdF#RIW9T_JD^@rn@!Gc!Y^=Y!2E=JBcIdM`Zl7 zv}RSTW7Yn`tzUf|`BueV#C4qihHnsTcFc{b;;t2MDexzMg&CH3ZyfV7s zf%veEZK|>T+B---tZg(jF`PY)-P3i$ z0>6;!(xMak)-!M2)Al`~eTf+0N5ma7KNN^1AWj)Xl=s(Fwas;Yxa2aX=Of1Vj9r@U znZjIXY3yl#h-re%5aD3mkDzQpg>xry;}ae4HWPhUVdZsY#}-ZZqhmfcYe)|tw=TY` zhS~BU1R6VYHmNL1aA=DjJSl4sgT|bXRESjeV9cMwf-wf*l|HP{zh0f2O|`Y#KwCSI z31_duk#d}f3`{QAHzIz;&{#llerd$I*(9$gVD}Y-@8MKpF-Jpz>nLQoJU5+pNWo& znZvQdT$&w1ualgbNMG6h@b~lHTEDEOle%^OdHQ@?TmFbYOZte$ydJNq&;j1X+l%>m zRG%?_M~|1}g$1eW`PS8h&{nGoi>k<5Bz$3Hn-1%)`unGEqBErF zesR<{Vc~wmoEoW276R4>7p7wu;$Y0_8A>+9;uhu_T``iY=M`C|M z%mbV~m+MW-`+$4gR5??RBh_qfGn6)ex9O;uBBe*`7>?TOPoE=Qm)7k0w$y`A7t!qf zOusP$Tqq{$QZWBEWo{ZDgK`Y%*R@$KZk?xlvxZ02;`6qKjq5Q>0b*m=rz9`AuHQ-g zQ|fn7H^IUx;||P|bv(hP{fm21Z)JSoEwCOlwIL%<<|@Yh{b`Qpp&80pcpRU9#1@t^ z9%!^S7jO~-fS8=Lv(Yz&IUUF?!<^2ko^(s&KG^#-zqCp1Vd|$syIkfbI?X=D^91l6 z0~t30`pq6Ditb|nlxH1i)`wl1KYBTgguN=c{}?+PYuuF92>PdHMc-Ich6=styO` zZ{VQ33J2w79Q1J0lVHa^8~9*{Bz7PI8bLLl!OM6?l`mGeeRSQwcrUT_#U0rC1%G4C zM$qwx5ClUYH=37y#9KDC@c9})Z0?zSd#A-J*I^c0D~oT{_v$)Cy0sjA|F7DMq3``o zWSEp|AlxMl>HDwc9ta|TxXQtx@;B)^nxefV4k{-j5!+PzpY4q!13}w)8zjPgWI#7n zai8*?DB~GM7RfzkJX!ZT?orGYnPQW6hE3w$Pu!;{74t-gD$!{XcPQkcl4GZET*kQ6 z6T3bw<*TY`Gkcdn|zIN}XGcjhg@KUW#8Zi_-&t-MaF*irC>eKW@)s z)5&x_qN36s?K-iZSmnQ2f$90JpZSKAU8(8D-6W56rG9L35&NzMeB0#K^Cr{1)~UZS zXQORuY`2>0bv7!Swe?((iEM+JKzE{On;27}$1j2*DESxr;*(=OG~zQ_SGLB7Cv#sX zaYB5DkY*UqL(bQKL(06aI6lQ^bpD{@#X3(xowsl=XV(FTg9+P&GA~GwjtkOf39IN| zW%&V$K1Kc7+OLf}&b5un3UFU{h%xQSzV51gZbiRAu|4HCIHhly-+;7ta!`PSV{vdzVaZZIp z<8}S}o<>!%WvTCVv>U#w&sxlJ&iBOE^lfYsR9HMSf}45Ygv>Rw9i;e2agA*W8z6R` zkK+ItH!yNod-DBB<(f=v=nd!!a&tM-b8da_j_WcQFQV%q#eI@`c}ZulB`iM6MTBRL zm^|C(54y8|vkyoik3f1I@dA|_5avF2&XAUeA%}-+IY1=sMlO|WP3g~yKZ&0F{eOyK ziYx$S+Ju0r_Uo^g^ zK2_`_*j(hT7}1S}#g5kQJNKdgDy`?u`{pXmqY>kOU&hi{9$dwf>FX-R^e{I-k#81t z8tAFaFYq3EYqsLHTCb~8zlGNCw(Pel^+Ci7i#i?JXFu%nJ}nJHvlSoc-1M#$pQX(1 zSl3b))N!~1ZIGkbp03wuF<>QsIO;cb*DKqf_)hMd)aqs3=`PBVGZ`7UzhrjE|*QM z-b|1BdT-#q`9$^d{AWDdl$dIZgnd4 zP;x|WZ4d+ropxK>6J%O!4;He-jDen!@2C67Fpo#JM<9LGn;$-{V zG_!M*TctDoAQ3H-oidHyl1%|F=j^Ad-!N= z=kCXB?-TSb!G~o#c)wT|R8_32)Gw0s3;B*JU)`^`F75qG{UUOoU)C?Z9{iqvj))8! zeS^2~0&gkU=i2=oMyPm;ZZl(UWHc#pzkZ69b94n_W)er`FRP6KR=&ErXL5Oe)8kl* zEH1YO+tBxyYR_jrv~UyPAD+kgq%9T4yalCkF?s_PFBhn_JhZe9il309q3)U5yy6vm|BLx3(`$8nw<>?7iiauOtNg9<`BdrQx{MqR z#6Q6UR9?(CbIq8N_Ct*GZ0mV{Agk~(-S=HXXL8?t9epO4a$SD-H~kb<@%PG4A*%co z8qWDvZ1k?6D>kgkxi0PHPUcy^u79uO1!Mm|h@U)F<0s)e>@6j?xTWng94uXBE9x>U zc_t^%G&?el7iu)$l~+sF*D|cS+zi=#lG6Tw(mh2FB%=pBPqE}r$m#rlL7mRe(Z0sm zcu}MChi~cpVU5ne3}c^a)jhR#D$i%}s5b#!hECVPF&k9Z?SF(7HfUxqgqnY*o9SAi zl&#hGNM)>bD$mgEM>c4sm?{^wiZ?bR8LyJ8-vO<-Cv#vveH%-EjI%cptH{L=7yNCN z{=FT>7n=ga){bL7#^QN@3|Oz)w@n9wT;5I6WP4&dMSUFo{@6b~|0b@7TEC#4KgJFm zJYN=VV-@3@`rVVcPhu`e-=X|XSoP6=Uh4-frGDs5W*?C4YC z8bD;@_FI`}NjPn(&(xh$q3bhs&lGd{`|j+LO{ZJ3Gt2 zk7sw1w#v;cZTO1Z+d|KYl+cid7qk(#Fy$G`XQJ{v58X$o>xiV8^3ck1=$k3{itF@- zO3X5j#}aAIV`aC0Dy$+}Wtc<_k1E=O@3Q;4ttclyPt4_+^7kaiO5)o|d3d@fPS*i+ znNh@&LEm_fyiD82vw#sFX5MVFo=!2=r`8rPuFHy;?l`a18+m`wp8)e*cYRCn+?R^= zsP=PJ<$5mYkOlu-rJhN2zx{jYHS-VJCdSR0pkSPBWUL~8nG3KLyqRuKsB7tYHii85 zsgFhN{Zi*i;d8ev_Oa-`7q#a)E@S7;cGAkUb7g{I)MWi}^P#^Vnj+;dWN)TtVVKRm z84W2L_nQyqj!wVs%fLuP~dhB>pAz*xb|36~b!*uQg`X>sY4| zDC9yFh1j^nKT^ukaVg%|FDS}B zX*~{q5%<3-og>R_hbfXc?k5g0w}s3ZJTP)OgSGRwsCGZ6%k(Sa-#931G6y5!4 z#rgf(Wn*1l;hc^U+kXB1!q~V=bh^s+HNuFsWhhh5k29bDF&Vh*UijJhGHPwiZ+d^Y z^9f>EMDtP1Cx6Uc#Ih*K#UKbhCTBFW(mX*TSjE5$vYeTuI8G|| z4r7f#h?ioGd<|dwu`AEH(eo81w^Q$?m)Y*JInBjQ@Z4Dexp<2z+yqRW9p+fwg)qcH zyO?9Ou#Y0vvvqx4+ecAZE{%1ph!aeF`lU0>lW_~|oixREnQg+QtjO#9T*(ivWC|>Q zDVKd&8}qdh~iZk5d9#xH(6w9WvboMcpFFIbH z#V_Xk-tzgy#}X!@`w2?<4Nj0HyP_;9_}ldRRXCem=UL2KwY*U>fZwZ}$r23&c*H6i+HlCscybI&+I_J%fZucj@&pYs; z_7JEu3{SDOi~1eXb8;47j-J&ub&g8Mq}}z3*2)XDjyLgsu8rEqi{}Ua=;YpC_8sfR zcWF|2zF=i;1AUF^F)9TNz8<5~bd#cuyzuwP>Flhoi9SWM6%Mil=6{ zq`a=yTn^7F@`6H)PARVWJ-O$*v?c3SF-8S!Sn~zsWA-y_u8h5ZqvLV1SJzZJaK-b8 zzgEdvZI4zP_h_{foQf6pX!XS!+b-j8gP6Ysz~3}mSdZ`3 z^RI8XwEgWAgVfu~VL;{cHY=~arB}$s*t)THfg$K^-iJ&z#8NMQU!SchGHmQltOXT^Chn@n-u| z&7CRtr?!Dlj~C=F%O|m*@$bcWai?QHiHtv09+zXlwKMuOzi{bHKJ6U6bPkF*VR3Je zhLgMpKTO*nMW@G#Yc!I7VzutlP|=%Bv;I8b_xQP!_G{!?ii;3# zqw$3#-!9~{DV;x7j2j2(Q@Iy~om8sjb5joCkJ_=o~JW8li8@ynNq(n2(4ij zhY9*ad-&fLHDF@h`wJiOEw^V3T#r7^a%GH0&vJcB2DigM0wPs^z&`@k5n4#_o4{{E zlIPgcn@tnFkH@(TL-al5>J*d;uvG_a;;xJ3O8an^1NcbVrxk#JqVjM^tD^8>Q4HA+qGmVhyVYV#0F0 z>1-LtZ*dgYP;w)G_uuEq0^=~ zuQTcn{$O*UU3ca+dNXUiMP1i8g|_vaqT_*93UTj$Rj1pS^yX7K|B(7(jDzQ~ z*`wEe3D<~1G4O= zChO zH?5jr*-!F+R@&#RVp%qMRK#UJ$+B@rpck^Nd|37w-a)NhEGy*WL|&0&C6WOUa;!e7 zs z);^=?e|*zZaRrRn(k|0+5nWE@;t{sPkEun0ssI2|NjF3&glUG H&#M3c>(w*s delta 12419 zcmV-}FnrJ5X6|EuABzY80000001JFl&5GMF5WeRrhJ-*1NwAe{()iRiLQ;vuqRq%o;W9=;=YTWAkG$!O;Lm8a7ww84|n^!qf`@r2flCZh>F7_t}%t^tXR z1MlFQso;^f#TtYt#JUg}h%8_8_MvyJMUB*hdj(o_7ZYZGPVFS^E66SzKwmH!M)Q9c&;%*^e4KiU_iMFsOB?9uTimMsJ!kP<46&* zNLu1FZ9qdR^g#aqgbkbW&h}6m=pxf0b7<{DrJOc!MXCouGNFlsy!Nibq!q!RK>aC* z;~N**+Bq11lMMX=|Dz5ctOd`EA<4}k7pDI>pOsiKjxM7LfI7e~iG1ZQ8E?`B-&t1K5xVwEq&E7y*>I7Wz4Hi~{QR5f^3 zQr0R|$#AXog@@~R*)p5cManaG(v?zLe?~n>Tz%mCk1vN|>8O3vE|OhV+idRg<=tjG zdcXe(v&#Y20e^4WO1J3e@+%PD(gmflj2Ia(Um8rQyA_)-5@feZGy=ON9TI{eY46F= z`R{kFv1dFsHjwA+yR{o&?0H|a-q)H>KK(?RPUJXELLw*pO6i#HKU{6z+B420`uW-o z#y8%65R7Uxxar(@#%J0akzi1}@o2~R%x-#QLy2owIS4v8)L?)4^W`HvYkb|`eV~oIp>yZ1js2Z*_xOJU%MI@C9s}?BF1Y)=4|-qs zf%|!K_rbX1n^|P>%MZ_Yci!6id_B6m8&96SyV>1_Uq*bxVYKVZYvXh0rgwMO@M{gx z-y|5hK7U&;jiu$99nzP5V%*g@iuF3cq8JXy}vq! zZ?MO`VKBF6d9=pGIOktSV-^^e_1`WP^~dwk*MB`*j@i-(M$4r~-JV$UIqi(t`0M&_ z-&=d$+~qww7}Wj;>)_gYp7Ho)KMkpA?uEO=DGfdJ+#-b|C@Jb!rc)nfU}L`IApVFJ268TV{w}gB3x6iGum5BteqdY zF>SOXcmwy+@aSKb&-RvQz^1t5c~D!nsi;3#!nl3oFPxwi%ty~NgJyj-v9D&@7f<@) z<$dv!eevUc&9JZ8=GJK?eYI{&`)bj~?SHYpZfWauUn}fu1@r1AYuGJc!|us7?4DXf zlW^$EYIzH=z=x9ijIJ5HSblqO{Z-alB|Hh*nQ z8{g{#FKyei_Rw?S4k)S7=cQ;Pskg+lxwOXn`SU0+26UD^C*{vSUDHpdz{|w6;qNrQ ze~IpQBy`OFJ&mWkm;1;hP8j#;{r&W1=S0LDgok4UxW?y|>x1o@_q(vx2l!ahzm`55 z&-Z}vf@fNr4W8p=(th8xOV?0qV}EnHjpnH~W~bX&9c=^Fh@WgDA{Fr9CGZd;JcKjm z#NDU*uxr+LQQt9XH)i$j@Tnf{Ooy8NxX!x6`crr3n30Knc03BpJ3_kPyTK!6jimmd z-jMrg<9-tS8w)s#ogLw@hXU5h;Cm1wJ@F7eEMxBhfwX9ih`Ahtt+>BCF@HzIRpyNN z+^MsFUfaXhxL&9JKkZlcT91bUrmfC?v}a>4c=jI~F7;pQ{{Z@Y9cuGg;e0~)+q$Z^ z>h!8rYaOmby>ZnVw94mkwWReyt5tpmJo+hWI)Hshw1L0u>V?yYU-1_f3A$P6=cRFl zxU4ZA)M)e5CkM_1ppwYB+J87Nh(BKFmB0lhbHg?{((X@V(Wi-huHbKc^)lqYSaikd z%ddDSaIGwxa`sSLl#U~2!(W2tr|TU7Zw2FtRxeKSjBGqDD>+L^v`r3YD^?&+9yQ+S>U4N(p{T+XzK)7KWL*f91YfjngmhU2N_8m^Q(^uTf z9XFl+E1hnUW;;8Rm*JJyM)Dlm^sr4cX%nC|n(kh=vOU$-v38)1YiuJ*+JH^kbcgNu zSC`N>z&k00&2D?x_(iJdo~RFJy9@`5@rFrX0LgZDxQKr(0DrR%hQG>qmj#SL(5^A< z?0ep`_kV!nT>E3I_J5M~w3D^~y2E(*qfYDbkKvwL>zaEw-ye;*J{Tsj1bex`y+mFV z5FfSIJ}ax!Xw>By3I#72HltVPNBl~E#HDNV<28f(a0X~Lbbdt6?;kN0|E6&{&iLK< z5zGBtC36C3jelCSy=V>Ehvx%$$hJ5afQRh_E^QnBwp;ajYeDOacD)Q9;VCp$!3)-D zt39YMD)|xUhhRUzcQ~|l+p66j&f~Vxs^m2Wt=mdGZzl-CHsSB?&yXMt7d}hRm)uV~ z!H+i3?&fbNp0bxXZgsmXu0LGSZ9RU0m4{#5dW$`5&D&I z1FOgNt8KQQwhd?$iT6yj_r|W;G3zdXFPO$HD(bbb-WU|X0J^O*_?X7OUw{Is$JCtNKjG#csDxRJK=dC-Zt@+uH#nmGjcuY&_j& zeIsn!O@A{c2Yn;YbkNU~-M_^5wCr7mXa5ks#hzTTw|4#NA>Q8C*|hO;pY@OYh&=-y zd^jCG(CJ|MP(~A`jp;)b-Wfhjr=>iP53r}sw@(c>xM7y>GJH-A;G69Y)c4oSClj_@ zy92|5zWvUP5x6e%tr43C^_go4 z_%{i)Yn#FI+Nb`6u%)|ZMr1MQC!j&cxPd0!xy2BF5}TSEIH$f(*Mza4H+CmI;_mvV z+700CNzWbcdTu1>!13`0F6&L)ac`H%6UW!#i|;O%%m@Y(_vE|5_49;(U|jHSr`Bxr zA%B%;Pwc~d$$Y~#&e+@id-j!tr`J{PS7@=_z&yQHvhC=-ZJ)6Z#q;?aFc_ZE+WpCO zIlwD%_c!8}lQ4)V40skc=$_su)Vr{VBg@$yetS6C_6tk+WT-P8JS_c_PgKM5ctk|clSFcXPmX+_J7+@>{Wkfo^1O!`w>5|>EaaZ{2=TVXwu2{ zwk(kWcB~toG1ficFmkHzE@8;Codpxft2`~(o8X6z_H7D$07G4#g~O9~{WIPb{LmYF zS|l{Hdb}pWaA2IoNgH_23m%`Z1Ga{v?vH|N*JGcbYoAZ!-RDOyShH&b7B+CNM}O?= zXnb-H4HgI)@Wgw~GvAZv;^cc@+5XJ2oo*`~+ZnXf+}FOId?(<>Su|#gI#cNQEc}w{ zE!kpv5_g5?uCJuEjZbarjtC; zw$g2%wQeWZqRW(y_b7g85r(o2TYo&gF@v+ezdWvkQ*{_I)!7PI&*}xttL;zY2G(A5 zciV60;Bon``Hpwb;lnfqCaC*+-}|R&PfF|0<_XT=ixJiYuVF;z?PE-s z(BGZ|pQ%3iB%h_)jLvH_d{3M9d2Mdq(`NI$HfLwF*(U7wZzkk2{x>rogMamxbM~#v z+l<$F!e^e3TcQK{_WarVdZ}=(Eeb!Sm-+ z^;SzZUmI+4K3|x~z9e14ll3MX#^L#=#u0jK;??})>q>l6$UuXMaf*K-F1y~J#(SF{ z(9h@$`g!Jin|I^h$S2I3cz^yGGSWHg$gI6_4voEP)mta`?wJ8+H~D~ai8t_1%9A<_ z_JY7-`<{2Q50KZ<2Z9;bYX%Dj4fOWso)eTM7&FhM_c5O3E@!_luOd1zWLXxgWxu&JRQ)0~CQ#hN?1?uPvA=faTwSPXtz7vV@!?|^Pld#wh@9S??eu^v&P7mij@vL4rjJ%0!$ z!oNa?CwVR@7jwIwJO>|Ao1f4lAg`LXC+%pWJ=lv8|A3oS*nfYJA!)?*@4}{r@*lRN z*@8qnbJ$a3&0N7TbcYd;Lyb=e-;Qp0GKw6`bB_-W&=8sxj7>?tW*Asgs@jdn8`g`_w#xtfRDaBgU&8eFb?|}qJNmf!-$jQ z+*IkCe%|N$D}U83z1&al6MaTrC)};G-}f<_(wFvJ2kr}eGiv5NX^w}%ZfTb zwHI)_@y|xv3rQP`YbMJJIzizlhOS40-?7{eg0}Y%=5awb>3%4^U}2B5av>{sQ#YpH zaaYpYT7Rt8e&aYZ{2-Dh4Ts+ZT$<=3Li)LNDLl*R5S^V#hJE_2J{0gNd`jf{b7JE9 zqc4}l6F(5zVZZY0{^K|5IC9_9&uo27(lnDD73-Vo8*^*$%6`PKr%6AraTo2S1J;#m zX#$?Jp^X)w_lqHSl&wF7wQIVbm--5%-=EmqLVxIOs@kjnV*mVn&9zmh|Ges-#Wtb{ zXjcUD;!b!m;f~}fcKRMD`vBP~T)Bf^lRiz~&v*@V`oMPK!%o*+&=7=${w~a|m#&LN zygVdqi~b(~D?1wYwR%yu578!qZH)lX!?gWd&u09I>d zhe)es{okE(x<_uab33L>1LqpwbxP?Vd%7j(ytAXRT4&rkpkg8Lor1Q=@%Wv!d4D~V zyj;XA&p#N)`mWq!T{#tYgn`pYgj~i%p2Odg$BUMBGf^Tf!Pyw!1}^9xy0SVKbM6H0DB%s! z_W=08xe<(9>4#8km-Z$C=fG#LH-DiMIj0pmt4229;8iqi3V*D(=|a)y9-Yq>ZUfw2 z_8noXi)+_#HX0ed2ev%|x)zbJ z%N>b7#GK|vZ{9ViEX(1O;V&wE%oILD-;@CzmiUf@RX#(k(dB24?+14j{eS9FV-5pU zGz)0h5BeHQpSDb&K;E@(qCF9l;E5Or&+@$+8jKnP(kP=p4*G-bx`}U?HZJrT>zZ8n zj^@5gzc0iw-=Esk#J;e%gr4kqISgP8(I;ojmiv)459qTImieb(zZGjoa$}tVW=3as zU?+6EM(uQudvjVS&*8QuuYbmQat`m=ck~z3@!@;cI`wyCVOOkWZv0xg!u23Kap1EQ zeddwV-+s*eD*wZCCE8BM{nZcl?!LEN`>-+S-;(MEHps?p0GZm3d9mbmev4gfr;kfjDM%+A%*~KLTAQ9)R#01Z6O?J z{w}ncZ&%nmuw7mEqwpdIvXEKmtW29n$vEl$Ycj_1o~FMAUwZYG9;}1r&y>nOHZtn) z*93Z*=!{aI7@c0KGPMT$P(P;2BuWl}b8Dl#4TEkvw$2Y!>QALz;>+Wj9+M4I+!vjY z_k_Q%6@LlY2V;&7^mKA9aEz!1nW6s7ZYmseM2?IQ*F18%UVfoR=XJY%V$10CJLxzT zE~$cB%E;L`yr6?*KZ(*wtr#|j#&$jivEMKH&@_CuR zcsk!w|Fe`o!}CU<>siQ^ZbzI^xF=^s|rmhwfyeUmT<@0#ozs%nYU$|d4F4WAui&;KE8CccFC@<@set6BpF-jZ?wBh zJ-cZY;WEnk2b9_Svo$4RPbHr=xuJ4j2*QQzqxf6s_Rm<0Q|nI%sak)+NpAgfzYB0E z*TmG};6&e~`s|a!*(Zg)kIvouqy3X({gXofRdbK3ae%J-1-8?kLGLZ@2)jZ`n}033 z_k>*n=#uzM^|6Qk;Lppa-P@uno;>w=Kt%wsc{3m$c21@v(guO@Y?<5yYi8=QdR1M0 zemfSDbKo%yGg%6Qs|d1Qwy;C#{YQs3kD#a7BZM!OX78x1TZW&i&MM3y%zQ@B28HXl zIb6T+laq9U(xS@nmKq15r5W|UrwZSGBX=>8?cra#Lmme#6G3lAQQVnx1rUY zxDxLite1H(=18q`r1{?~@J$n^8LNl-vevPy0a*W0N)2Blz zyGy?yv}fjjM=D=Jb4U8cm^CGHMP|ZJo8}5-uCg`jDIPNqo3;j<%U*doOn*`3Hz?X! zbsa7Z`^p~!9VCF6`ZjnNmgpreCUgU1lX!GFD%D4MaCVm? zT6|aPa9@{o^~@VAM^c|^g3t#NiYfGRzn!+wweYx1e|hjs#ttZ-Y5C43-t{%zw47Ju zL^C@QMltiE%bilcYYh*V`hj-?T3S!`9ai;iH&MO?K{M$aa}OkPbAQtA&mhBDn16u% zA_)6RH(ORF<6lrOA@$&c2jy3|u~Fw40fS&hJk8mJGFaJMTl_YWvt;}Y>UvAc-+Gf2d7#sTx@Jx{0=#n&=JlGZ5L(*+wuCKeb7#uF z*NK!-K-Tw?JXCBab5o_CLPwp-#8SWV{IsNRd?DgLiZ?YB@J-X@>2alJ!MhEV6o2Ro=3T#mtud;8P;lme6KbG}0@gZGWI`3-d z?56|PdlwF_8rOUMqh!7;9ai+*S<^m!g_9SZ@{ua?>9x_je0M}1uO!!6Dj%558UEpL z6s7J-k5|_DN~v#>__`I)gZDFj`GGE4ZT79ZMSq&F;*(o_+6FmvYkte*>J3OIn4ixE z!LMjPKdtjIOLacQy2_{Jp|1SAD|D3y`jskO)yx$3H4xlpQNdrdnf1La9XIov%CBbW zmX}L^o7dD==Dm8Ms&TKPP%wnRKQs&Ly*jnttLpV$6@8E6AFpiLr5bOX)6Xfte$B6a zCV%V?vm~wvy+uR_e!0qunE;!|sfh;~TQ z&bGXrt=5kGzAdz4&QKR;CUP;-I?Z3Vlus*ruG{Q&xvqF7H5=^87CHqWi%~*jffqT5 z)zsIvEcd{AUtZqYQ?U=q*8!8EVWqHiiLMCBRi zJ4E3P#FrXA$#_A6-aiqXxWsqlH%sL8pRtm)be=TFYf9O^39`N93(9z0G#(3oY(6t( zoRReXAu-z#Ge4&xVbTwWndC6uWe1ChbIaPu`DrS-n>c861wN3Vw1aSE3w`n!_s7|+^^{JG?w?fPb@@&eEMRQRpyvh10BH})m^y>MpyUid5A z6MJX&B@Y~XA|EgAtu6By_f4CQ=6`{KF&zKe95-ci+^D?8|Mnc4<#TLib8PD#T;RN z(jNfjU-29BLSv3-j2B$T|4AQaD0J{EzR`J-2ymFhCA7y&_0_;ND;<4Rxqp@~TF>#; z)p8{#@q-0>NzS&k%4|!SzP4GVqd3SJqw&%Q&!i4DigW(CWqOXxW}V(mAY+OVFBkX| zQ6_x|aqRLQf-Dwzg}&@OS~)YlouaRljORssF55z%Fnm|qF^>4n3E#yse?H!c#X9Id zaR@`O4gy}K-w@8B;Llmmi+|af?1jGh!tpW^yc_Bc*mof>MrHgK>K+PfUz+o$xJQ_O zqO4C%A1ri1az4^uO2TOCu5&B>I$>?Hy>5wOF<$hYYPnSLyob34y$YNe-xQx&d>8fhGNw%9M>F|xH6td#JjfHd_sbybVj*Z#j{MBS^T8(U4w%NV?wqR{Rm3!KP1R(wcVR?TM)o_W!(%1Z1k83%r%_u z10K#u7&R}V8LvB8oL(LdgI?=Klch=0x3=y?+n-WdAP0+@?m^yvj&^~yT+{fG>UxC9_>J#(KuStAszMEoLVvU&Jz1*{EiRkgkk?PR)}mQ8PwPk%z$M%o$&FL53=h{Tl`6oKKu zt7et$5@>!dj;3g*MA~0fUMz#wa$`zux3d{)7lC-7ZZ7BJa7Lbi;yW6Sot;ZlYL?2E zv_c+5gQEN8T?PGYq846$6rtp(c zdF{<$m0MTqo}? zKWZ^5KuZwE>g}ZOYB4Xu=UzRZyB}4%xjuoE$v!cUM>;-)@sC+dN)kVyjY&K&v_&w+ zMSpLrbX-X+fT~|HE`sB-`c%!obXI@7jAr%U4r*PNKp&Df($fmFFZ<=S1h5 zffhVsTi5Ru0ET=4e z{;bEIR=rc11GgkjJLiW?ABL(di(AY4QGXQP&-n)wo|XPS=4%zLed#C52EBLsTjlS4 z5V9cN9||n0f8$v}V?;@apnriZUURO^xYJB+>83J_629*l*LOp!>@1lZ_<)^W~ zvbcA7ZbD67)A{synApC`o*^DA;T1JsOdEYMZS=)V?@88uF=Oech-0L@bbri5i?Yb`Q^T+5tw703sO)ql+V{rTmmS}^~vp@@1fFm)_JDnIhuR-Q3ww$an z!Ep9n@)I)Ny*w{;^B`WU7=O>T`!nQ8tQS%CJt^a%3?Tf9nocgqYFU0&Ew`$=e_Q44 z+@OIH-IJojm=kg;=7f~ff^CvQy;-_MRD%m-`6Fi46^>a52^E{Qf zf9$=ylSaSJ%(bWRnI>!MdINQSG#Z@4kwrb@JM-_U{!@QWZv^L%j(?Z4W4vGSTo&_N z;C+E;lb7%n-<01y7?bjH+<%bYOV6Y7nH1}23LGu-q3W^*Das=<#-se568`cyys8`{ zc#$WW*_Z)3^^@Xw7sO9Lm%B%lCHLF#i4W99x520OX`z2l{icK;g^UwU_3ye~UgVus zb!@%PM%8KN>&&!V@P8)yDk%J75*7bx?#w=FuH;?XT3&IWI}s3Vp3~X2fF`3aoBfR` z|K261k97S-(H^N|HEp3ws473uG58-7m`2^EF1r_Xwh8WNEr5yq27Dc9^*%y%t%wVf4z72iZ2&_p=p`CmnHED zU5Ro0F|s?Q%YS5&wj<%vR5A&j&($4NsB6>xJvHBm+`0M>b5)9d8ryFNG>Owja$k9R zKSC2@SHrvxJk_I~%qfTXtx5(cc~+V)OWtLd`FO#>0(1la(j4f?T{k+sp$yJ?G7dO- zuICFY-Uq4LUd>Frvl;eihW;UVKR6q<6}|d%Ltlq)z<&!cBJUg5;VNr~+W*6MCUEq^dJxS-v@}#9Y^@F=< zQ7Az^6WtWabW=KAJcujKVll*3G=QzSspk^c z{VZS)%KVTvWw=_?Zwa3Z{Vta>JTK)0^!>v)27kbiK*Map zD}T3-xCcqh##QU8MeBoB>tr4dUFUe^R{NjodPnAm>YkwEz6cxj-g{)BE85VNV0oit`UO(q2Qt%(m&VJq| zU%X>2rR_&@xsp=dH1Zu`az7CI;HsDrd4D&Wo=+mnKb!H&#rIK9s=~4!?}1G&e|>Fm7t<45#EFqbXCG{GJY{5Axnel>0EI z5b4sH>us*^-XVl5lIdp!y*|{B9o**!uv}JlE?ub7{hKq9FB<(yRvh!S<9;!A&xG6@r`zOcxCnf!pbNWBx1Dc(U$R-%nXWJrYtGautEZi{CZdT;jI2cD&dD)nc_8lLt`(cbm{=8L{OMS3jmgNl&(Yk#Q9~{B?D}TlZANoXP zciQVQio}o3iW{!Vu`hY7TC3EjAc>=lxXQ(_pU;gnej3kns$+@R{64Wg74^nt=bRkc zxZi(I28^jPSAbEX$4~tSogHts`^uio`%aS@|3xh~u;}D5`0Ro_=XQFA?>$q!PN!cp zEGuxiK~YrUoPZP#A|@de6MuSe_(a1M>5$|-fcN>Qaq0)R%KYH;HYw_DIQQJ%h;^3v zdQlT42}i_RT$r|&_Y3&9W?ytZ@_KHK`JDi2dbr8+ahk&`#2j8BrU3!IF*jEjE=&PP zqT!bH8G#H7ix!Fd1`qor6nGVp=GLfnaLw4<^T)|uT9L?72Ix=3DSsE{DY{(-kE5Q; zEW}eKePg;5n6E8(r-Qy>aZxAWvbn`3pAY)SykVk$yJ_ONKIortLAR~BJ6V2aHLC+` zisgD^f1bwfZ*T^fG6D5MD&_%%#Xg~wxPKu7=Z#)A-{p|MK%i86ofVkvejbC0~%3n1?FUh3s}^rCiQDrm8YY?F=xZzX}=^rTqLQRHH~%Exl8&b>3`AVT-3cJY7|hHi@M1` zpf0XXa(0t`FL`ogle(8`h&)-V%e1Ft%%UZ%kNt{qqz|z!$8F)cx?Hcz^}6sfPf>`h zoBZOG)&~FOQ@1y#V~S_`(FJJ|U_EdXeLEYu78xfv5%J{X++ft}H6q}DNi>TZgp|r> zDJ)mzm&x6WDS!P^H9AH$zN=JbDdPMp+V~#1Ii?LYt`j+7P}hQ{gjpd*P|FcuE1CI` zE_I)ZgLfpI{MJeC0)dsYQI^(yP}lB9<$qhuPw+9ZvkCorWg?tBUUu3x*GjaFle|i^{T$i%7Z|M5;&40=S5kTTim4_&1-34&I)1NKD z^Dfc1T;}}gB5*9?E}gax-e0%M^I}}>Kj!o~sSdPMH!Syv5mI*V{Lz@&Zt54G#Eyms zy4u3?>^x-rYnbl4;@n)Abfkv&RB&FD1Y~?iYF?$YgUUVQe|ODJW&-- z{a*Y3sVuYmb1C3LoDD`_2%`_AHmKG99{>OV|Nr80P~ZXp009600|4=mTNJ;i004xz BbJzd? diff --git a/Logic/bus68030.exf b/Logic/bus68030.exf index f89272e..faad6e2 100644 --- a/Logic/bus68030.exf +++ b/Logic/bus68030.exf @@ -54,420 +54,449 @@ Section Member Rename Array-Notation Array Number Port FC_0_ FC[0] 3 1 End Section Cross Reference File -Design 'BUS68030' created Wed Oct 26 22:26:25 2016 +Design 'BUS68030' created Fri Nov 18 19:32:36 2016 Type New Name Original Name // ---------------------------------------------------------------------- - Inst i_z3737 AS_030 - Inst i_z3838 AS_000 - Inst i_z3939 RW_000 - Inst i_z3A3A DS_030 - Inst i_z3B3B UDS_000 - Inst i_z3C3C LDS_000 - Inst i_z4G4G BERR - Inst i_z5252 DSACK1 - Inst i_z5959 RESET - Inst i_z5A5A RW - Inst i_z5H5H CIIN - Inst pos_clk_un34_as_030_d0_i_i_o2_4 pos_clk.un34_as_030_d0_i_i_o2_4 - Inst A_DECODE_i_19_ A_DECODE_i[19] - Inst pos_clk_un34_as_030_d0_i_i_o2 pos_clk.un34_as_030_d0_i_i_o2 - Inst A_DECODE_i_18_ A_DECODE_i[18] - Inst pos_clk_un10_sm_amiga_1 pos_clk.un10_sm_amiga_1 + Inst i_z3939 AS_030 + Inst i_z3A3A AS_000 + Inst i_z3B3B RW_000 + Inst i_z3C3C DS_030 + Inst i_z3D3D UDS_000 + Inst i_z3E3E LDS_000 + Inst i_z4I4I BERR + Inst i_z5454 DSACK1 + Inst i_z5555 DTACK + Inst i_z5C5C RW + Inst i_z5J5J CIIN Inst pos_clk_un10_sm_amiga pos_clk.un10_sm_amiga - Inst SM_AMIGA_srsts_i_0_0_o2_0_1_3_ SM_AMIGA_srsts_i_0_0_o2_0_1[3] - Inst SM_AMIGA_srsts_i_0_0_o2_0_3_ SM_AMIGA_srsts_i_0_0_o2_0[3] - Inst UDS_000_INT_0_r UDS_000_INT_0.r - Inst UDS_000_INT_0_m UDS_000_INT_0.m - Inst UDS_000_INT_0_n UDS_000_INT_0.n - Inst UDS_000_INT_0_p UDS_000_INT_0.p - Inst LDS_000_INT_0_r LDS_000_INT_0.r - Inst LDS_000_INT_0_m LDS_000_INT_0.m - Inst LDS_000_INT_0_n LDS_000_INT_0.n - Inst LDS_000_INT_0_p LDS_000_INT_0.p - Inst BGACK_030_INT_0_r BGACK_030_INT_0.r - Inst BGACK_030_INT_0_m BGACK_030_INT_0.m - Inst BGACK_030_INT_0_n BGACK_030_INT_0.n - Inst BGACK_030_INT_0_p BGACK_030_INT_0.p - Inst DS_000_ENABLE_0_r DS_000_ENABLE_0.r - Inst DS_000_ENABLE_0_m DS_000_ENABLE_0.m - Inst DS_000_ENABLE_0_n DS_000_ENABLE_0.n - Inst DS_000_ENABLE_0_p DS_000_ENABLE_0.p - Inst pos_clk_un9_bg_030_i pos_clk.un9_bg_030_i - Inst pos_clk_un6_bgack_000_0_0 pos_clk.un6_bgack_000_0_0 - Inst pos_clk_un6_bgack_000_0_0_a2 pos_clk.un6_bgack_000_0_0_a2 - Inst pos_clk_un34_as_030_d0_i_i_o2_1 pos_clk.un34_as_030_d0_i_i_o2_1 - Inst pos_clk_DSACK1_INT_1_i_a2_0_a2 pos_clk.DSACK1_INT_1_i_a2_0_a2 - Inst pos_clk_un34_as_030_d0_i_i_i pos_clk.un34_as_030_d0_i_i_i - Inst IPL_030_1_i_2_ IPL_030_1_i[2] - Inst pos_clk_AS_000_INT_1_i_a2_0_a2 pos_clk.AS_000_INT_1_i_a2_0_a2 - Inst SM_AMIGA_nss_i_i_0_0_a3_0_0_ SM_AMIGA_nss_i_i_0_0_a3_0[0] + Inst SM_AMIGA_srsts_i_0_a2_0_ SM_AMIGA_srsts_i_0_a2[0] + Inst pos_clk_un15_clk_000_d_i_i_o2_1 pos_clk.un15_clk_000_d_i_i_o2_1 + Inst pos_clk_un15_clk_000_d_i_i_o2_2 pos_clk.un15_clk_000_d_i_i_o2_2 + Inst pos_clk_un31_clk_000_ne pos_clk.un31_clk_000_ne + Inst pos_clk_un15_clk_000_d_i_i_o2 pos_clk.un15_clk_000_d_i_i_o2 + Inst VMA_INT_0_r VMA_INT_0.r + Inst pos_clk_un34_as_030_d0_i_a2_0_1 pos_clk.un34_as_030_d0_i_a2_0_1 + Inst VMA_INT_0_m VMA_INT_0.m + Inst pos_clk_un34_as_030_d0_i_a2_0_2 pos_clk.un34_as_030_d0_i_a2_0_2 + Inst VMA_INT_0_n VMA_INT_0.n + Inst pos_clk_un34_as_030_d0_i_a2_0_3 pos_clk.un34_as_030_d0_i_a2_0_3 + Inst VMA_INT_0_p VMA_INT_0.p + Inst pos_clk_un34_as_030_d0_i_a2_0_4 pos_clk.un34_as_030_d0_i_a2_0_4 + Inst pos_clk_un34_as_030_d0_i_a2_0_5 pos_clk.un34_as_030_d0_i_a2_0_5 + Inst cpu_est_0_1__r cpu_est_0_1_.r + Inst cpu_est_0_1__m cpu_est_0_1_.m + Inst pos_clk_un34_as_030_d0_i_o2_1 pos_clk.un34_as_030_d0_i_o2_1 + Inst cpu_est_0_1__n cpu_est_0_1_.n + Inst pos_clk_un34_as_030_d0_i_o2_2 pos_clk.un34_as_030_d0_i_o2_2 + Inst cpu_est_0_1__p cpu_est_0_1_.p + Inst pos_clk_un34_as_030_d0_i_o2_3 pos_clk.un34_as_030_d0_i_o2_3 + Inst cpu_est_0_2__r cpu_est_0_2_.r + Inst pos_clk_un34_as_030_d0_i_o2 pos_clk.un34_as_030_d0_i_o2 + Inst cpu_est_0_2__m cpu_est_0_2_.m + Inst cpu_est_0_2__n cpu_est_0_2_.n + Inst cpu_est_0_2__p cpu_est_0_2_.p + Inst cpu_est_0_3__r cpu_est_0_3_.r + Inst cpu_est_0_3__m cpu_est_0_3_.m + Inst cpu_est_0_3__n cpu_est_0_3_.n + Inst SM_AMIGA_srsts_i_1_1_ SM_AMIGA_srsts_i_1[1] + Inst cpu_est_0_3__p cpu_est_0_3_.p + Inst SM_AMIGA_srsts_i_1_ SM_AMIGA_srsts_i[1] + Inst SM_AMIGA_srsts_i_1_6_ SM_AMIGA_srsts_i_1[6] + Inst SM_AMIGA_srsts_i_6_ SM_AMIGA_srsts_i[6] + Inst SM_AMIGA_srsts_i_1_4_ SM_AMIGA_srsts_i_1[4] + Inst pos_clk_RW_000_INT_5_i pos_clk.RW_000_INT_5_i + Inst CLK_000_D_i_3_ CLK_000_D_i[3] Inst IPL_030_1_i_1_ IPL_030_1_i[1] - Inst SM_AMIGA_i_0_ SM_AMIGA_i[0] - Inst SM_AMIGA_srsts_i_0_0_a3_0_ SM_AMIGA_srsts_i_0_0_a3[0] Inst IPL_030_1_i_0_ IPL_030_1_i[0] - Inst RST_DLY_i_1_ RST_DLY_i[1] - Inst SM_AMIGA_i_1_ SM_AMIGA_i[1] - Inst SM_AMIGA_srsts_i_0_0_o2_0_ SM_AMIGA_srsts_i_0_0_o2[0] + Inst IPL_c_i_1_ IPL_c_i[1] + Inst IPL_D0_0_i_1_ IPL_D0_0_i[1] + Inst RST_DLY_i_0_ RST_DLY_i[0] + Inst IPL_c_i_0_ IPL_c_i[0] + Inst IPL_D0_0_i_0_ IPL_D0_0_i[0] + Inst pos_clk_un6_bgack_000 pos_clk.un6_bgack_000 + Inst pos_clk_un4_bgack_000 pos_clk.un4_bgack_000 + Inst SM_AMIGA_i_7_ SM_AMIGA_i[7] + Inst pos_clk_un31_clk_000_ne_1_i_m2_r pos_clk.un31_clk_000_ne_1_i_m2.r + Inst SM_AMIGA_6_ SM_AMIGA[6] + Inst pos_clk_un31_clk_000_ne_1_i_m2_m pos_clk.un31_clk_000_ne_1_i_m2.m + Inst SM_AMIGA_5_ SM_AMIGA[5] + Inst pos_clk_un31_clk_000_ne_1_i_m2_n pos_clk.un31_clk_000_ne_1_i_m2.n + Inst SM_AMIGA_4_ SM_AMIGA[4] + Inst pos_clk_un34_as_030_d0_i_i pos_clk.un34_as_030_d0_i_i + Inst pos_clk_un31_clk_000_ne_1_i_m2_p pos_clk.un31_clk_000_ne_1_i_m2.p + Inst SM_AMIGA_3_ SM_AMIGA[3] + Inst pos_clk_un34_as_030_d0_i_o2_i pos_clk.un34_as_030_d0_i_o2_i + Inst SM_AMIGA_srsts_i_0_o2_0_ SM_AMIGA_srsts_i_0_o2[0] + Inst SM_AMIGA_2_ SM_AMIGA[2] + Inst pos_clk_un15_clk_000_d_i_i_o2_i pos_clk.un15_clk_000_d_i_i_o2_i + Inst pos_clk_CLK_030_PE_4_1 pos_clk.CLK_030_PE_4_1 + Inst SM_AMIGA_1_ SM_AMIGA[1] + Inst pos_clk_un5_bgack_030_int_d_i_0 pos_clk.un5_bgack_030_int_d_i_0 + Inst SM_AMIGA_0_ SM_AMIGA[0] + Inst pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i pos_clk.AMIGA_BUS_ENABLE_DMA_HIGH_3_i + Inst cpu_est_2_ cpu_est[2] + Inst pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i pos_clk.AMIGA_BUS_ENABLE_DMA_LOW_3_i + Inst cpu_est_3_ cpu_est[3] + Inst pos_clk_RW_000_DMA_3_i pos_clk.RW_000_DMA_3_i + Inst IPL_030DFF_0_ IPL_030DFF[0] + Inst pos_clk_un4_rw_000_i pos_clk.un4_rw_000_i + Inst IPL_030DFF_1_ IPL_030DFF[1] + Inst IPL_030DFF_2_ IPL_030DFF[2] + Inst pos_clk_SIZE_DMA_6_0_0_o2_i_0_ pos_clk.SIZE_DMA_6_0_0_o2_i[0] Inst IPL_D0_0_ IPL_D0[0] - Inst SM_AMIGA_i_6_ SM_AMIGA_i[6] + Inst CLK_030_PE_i_1_ CLK_030_PE_i[1] Inst IPL_D0_1_ IPL_D0[1] Inst IPL_D0_2_ IPL_D0[2] - Inst pos_clk_DS_000_DMA_4_f0_0_0_i pos_clk.DS_000_DMA_4_f0_0_0_i - Inst CLK_000_D_i_0_ CLK_000_D_i[0] - Inst SM_AMIGA_i_7_ SM_AMIGA_i[7] - Inst pos_clk_un1_ipl_i_0_o3 pos_clk.un1_ipl_i_0_o3 - Inst SM_AMIGA_6_ SM_AMIGA[6] - Inst pos_clk_RW_000_DMA_3_0_0_i pos_clk.RW_000_DMA_3_0_0_i - Inst SM_AMIGA_5_ SM_AMIGA[5] - Inst SM_AMIGA_4_ SM_AMIGA[4] - Inst SM_AMIGA_3_ SM_AMIGA[3] - Inst pos_clk_un21_bgack_030_int_i_0_o3_0_x2 pos_clk.un21_bgack_030_int_i_0_o3_0_x2 - Inst SM_AMIGA_2_ SM_AMIGA[2] - Inst SM_AMIGA_1_ SM_AMIGA[1] - Inst pos_clk_SIZE_DMA_6_0_0_0_o2_0_ pos_clk.SIZE_DMA_6_0_0_0_o2[0] - Inst SM_AMIGA_0_ SM_AMIGA[0] - Inst pos_clk_CYCLE_DMA_5_0_i_0_o3 pos_clk.CYCLE_DMA_5_0_i_0_o3 - Inst cpu_est_0_ cpu_est[0] - Inst pos_clk_un6_bg_030_i_0_i pos_clk.un6_bg_030_i_0_i - Inst SM_AMIGA_srsts_i_0_0_o2_6_ SM_AMIGA_srsts_i_0_0_o2[6] - Inst cpu_est_1_ cpu_est[1] - Inst cpu_est_2_ cpu_est[2] - Inst cpu_est_3_ cpu_est[3] - Inst pos_clk_un5_bgack_030_int_d_i_0_a2_i_o3 pos_clk.un5_bgack_030_int_d_i_0_a2_i_o3 - Inst IPL_030DFF_0_ IPL_030DFF[0] - Inst IPL_030DFF_1_ IPL_030DFF[1] - Inst pos_clk_un1_ipl_i_0_x2 pos_clk.un1_ipl_i_0_x2 - Inst IPL_030DFF_2_ IPL_030DFF[2] - Inst pos_clk_un1_ipl_i_0_x2_0 pos_clk.un1_ipl_i_0_x2_0 - Inst RST_DLY_2_ RST_DLY[2] - Inst pos_clk_SIZE_DMA_6_0_0_0_i_1_ pos_clk.SIZE_DMA_6_0_0_0_i[1] - Inst pos_clk_un1_ipl_i_0_x2_1 pos_clk.un1_ipl_i_0_x2_1 Inst CLK_000_D_0_ CLK_000_D[0] - Inst pos_clk_CYCLE_DMA_5_1_i_0_x2 pos_clk.CYCLE_DMA_5_1_i_0_x2 Inst CLK_000_D_1_ CLK_000_D[1] - Inst pos_clk_SIZE_DMA_6_0_0_0_i_0_ pos_clk.SIZE_DMA_6_0_0_0_i[0] Inst CLK_000_D_2_ CLK_000_D[2] - Inst pos_clk_un21_bgack_030_int_i_0_o3_0_a2 pos_clk.un21_bgack_030_int_i_0_o3_0_a2 + Inst pos_clk_SIZE_DMA_6_0_0_i_0_ pos_clk.SIZE_DMA_6_0_0_i[0] + Inst BGACK_030_INT_0_r BGACK_030_INT_0.r Inst CLK_000_D_3_ CLK_000_D[3] - Inst pos_clk_un34_as_030_d0_i_i pos_clk.un34_as_030_d0_i_i + Inst BGACK_030_INT_0_m BGACK_030_INT_0.m Inst CLK_000_D_4_ CLK_000_D[4] + Inst pos_clk_SIZE_DMA_6_0_0_i_1_ pos_clk.SIZE_DMA_6_0_0_i[1] + Inst BGACK_030_INT_0_n BGACK_030_INT_0.n Inst CYCLE_DMA_0_ CYCLE_DMA[0] + Inst BGACK_030_INT_0_p BGACK_030_INT_0.p Inst CYCLE_DMA_1_ CYCLE_DMA[1] - Inst pos_clk_RW_000_DMA_3_0_0 pos_clk.RW_000_DMA_3_0_0 + Inst CLK_030_PE_0_ CLK_030_PE[0] + Inst CYCLE_DMA_i_0_ CYCLE_DMA_i[0] + Inst CLK_030_PE_1_ CLK_030_PE[1] + Inst CYCLE_DMA_i_1_ CYCLE_DMA_i[1] Inst SIZE_DMA_0_ SIZE_DMA[0] Inst SIZE_DMA_1_ SIZE_DMA[1] - Inst pos_clk_DS_000_DMA_4_f0_0_0 pos_clk.DS_000_DMA_4_f0_0_0 + Inst cpu_est_0_ cpu_est[0] + Inst cpu_est_1_ cpu_est[1] Inst RST_DLY_0_ RST_DLY[0] - Inst pos_clk_un5_bgack_030_int_d_i_0_a2_i_o3_i pos_clk.un5_bgack_030_int_d_i_0_a2_i_o3_i Inst RST_DLY_1_ RST_DLY[1] - Inst SM_AMIGA_srsts_i_0_0_o2_i_6_ SM_AMIGA_srsts_i_0_0_o2_i[6] - Inst pos_clk_SIZE_DMA_6_0_0_0_0_ pos_clk.SIZE_DMA_6_0_0_0[0] - Inst pos_clk_CYCLE_DMA_5_0_i_0_o3_i pos_clk.CYCLE_DMA_5_0_i_0_o3_i - Inst pos_clk_SIZE_DMA_6_0_0_0_1_ pos_clk.SIZE_DMA_6_0_0_0[1] - Inst pos_clk_SIZE_DMA_6_0_0_0_o2_i_0_ pos_clk.SIZE_DMA_6_0_0_0_o2_i[0] - Inst pos_clk_un21_bgack_030_int_i_0_o3_0_o3_i pos_clk.un21_bgack_030_int_i_0_o3_0_o3_i - Inst pos_clk_SIZE_DMA_6_0_0_0_a3_0_ pos_clk.SIZE_DMA_6_0_0_0_a3[0] - Inst SM_AMIGA_nss_i_i_0_0_o2_i_0_ SM_AMIGA_nss_i_i_0_0_o2_i[0] - Inst pos_clk_SIZE_DMA_6_0_0_0_a3_1_ pos_clk.SIZE_DMA_6_0_0_0_a3[1] - Inst CLK_000_D_i_3_ CLK_000_D_i[3] - Inst SM_AMIGA_srsts_i_0_0_a3_1_ SM_AMIGA_srsts_i_0_0_a3[1] - Inst SM_AMIGA_srsts_i_0_0_a3_0_1_ SM_AMIGA_srsts_i_0_0_a3_0[1] - Inst SM_AMIGA_nss_i_i_0_0_a3_0_ SM_AMIGA_nss_i_i_0_0_a3[0] - Inst pos_clk_A0_DMA_3_0_a3_0_a3 pos_clk.A0_DMA_3_0_a3_0_a3 - Inst pos_clk_un1_ipl_i_0_o3_i pos_clk.un1_ipl_i_0_o3_i - Inst A_i_1_ A_i[1] - Inst pos_clk_un34_as_030_d0_i_i_o2_i pos_clk.un34_as_030_d0_i_i_o2_i - Inst pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3_i_a3_0_a3 pos_clk.AMIGA_BUS_ENABLE_DMA_HIGH_3_i_a3_0_a3 - Inst pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3_i_a3_0_a3 pos_clk.AMIGA_BUS_ENABLE_DMA_LOW_3_i_a3_0_a3 - Inst SM_AMIGA_srsts_i_0_0_o2_i_0_ SM_AMIGA_srsts_i_0_0_o2_i[0] - Inst IPL_i_0_ IPL_i[0] - Inst IPL_D0_0_i_a3_0_a3_0_ IPL_D0_0_i_a3_0_a3[0] - Inst IPL_i_1_ IPL_i[1] - Inst IPL_D0_0_i_a3_0_a3_1_ IPL_D0_0_i_a3_0_a3[1] - Inst IPL_i_2_ IPL_i[2] - Inst pos_clk_un1_ipl_i_0_i pos_clk.un1_ipl_i_0_i - Inst IPL_D0_0_i_a3_0_a3_2_ IPL_D0_0_i_a3_0_a3[2] - Inst CYCLE_DMA_i_0_ CYCLE_DMA_i[0] - Inst pos_clk_CYCLE_DMA_5_0_i_0_a3 pos_clk.CYCLE_DMA_5_0_i_0_a3 - Inst pos_clk_DS_000_DMA_4_f0_0_0_a3 pos_clk.DS_000_DMA_4_f0_0_0_a3 + Inst pos_clk_un13_bgack_030_int pos_clk.un13_bgack_030_int + Inst RST_DLY_2_ RST_DLY[2] + Inst pos_clk_un1_bgack_030_int pos_clk.un1_bgack_030_int + Inst pos_clk_un3_clk_out_int_i pos_clk.un3_clk_out_int_i + Inst pos_clk_CYCLE_DMA_5_0 pos_clk.CYCLE_DMA_5_0 + Inst pos_clk_CLK_030_PE_4_0 pos_clk.CLK_030_PE_4_0 + Inst pos_clk_un3_clk_out_int pos_clk.un3_clk_out_int + Inst pos_clk_un4_bgack_000_i pos_clk.un4_bgack_000_i + Inst pos_clk_un6_bgack_000_i pos_clk.un6_bgack_000_i + Inst DS_000_DMA_0_r DS_000_DMA_0.r + Inst DS_000_DMA_0_m DS_000_DMA_0.m + Inst pos_clk_un1_bgack_030_int_i pos_clk.un1_bgack_030_int_i + Inst DS_000_DMA_0_n DS_000_DMA_0.n + Inst DS_000_DMA_0_p DS_000_DMA_0.p + Inst pos_clk_as_000_dma6_i pos_clk.as_000_dma6_i + Inst AS_000_DMA_0_r AS_000_DMA_0.r + Inst AS_000_DMA_0_m AS_000_DMA_0.m + Inst pos_clk_un31_clk_000_ne_i_0 pos_clk.un31_clk_000_ne_i_0 + Inst AS_000_DMA_0_n AS_000_DMA_0.n + Inst AS_000_DMA_0_p AS_000_DMA_0.p + Inst pos_clk_CYCLE_DMA_5_1 pos_clk.CYCLE_DMA_5_1 + Inst SM_AMIGA_srsts_i_0_o2_i_0_ SM_AMIGA_srsts_i_0_o2_i[0] Inst SIZE_0_ SIZE[0] - Inst A_c_i_0_ A_c_i[0] - Inst SM_AMIGA_srsts_i_0_0_a3_6_ SM_AMIGA_srsts_i_0_0_a3[6] + Inst SIZE_DMA_0_1__r SIZE_DMA_0_1_.r Inst SIZE_1_ SIZE[1] - Inst SIZE_c_i_1_ SIZE_c_i[1] + Inst SIZE_DMA_0_1__m SIZE_DMA_0_1_.m Inst AHIGH_24_ AHIGH[24] + Inst SIZE_DMA_0_1__n SIZE_DMA_0_1_.n Inst AHIGH_25_ AHIGH[25] - Inst pos_clk_un6_bgack_000_0_0_i pos_clk.un6_bgack_000_0_0_i + Inst SIZE_DMA_0_1__p SIZE_DMA_0_1_.p Inst AHIGH_26_ AHIGH[26] + Inst SIZE_DMA_0_0__r SIZE_DMA_0_0_.r Inst AHIGH_27_ AHIGH[27] + Inst SIZE_DMA_0_0__m SIZE_DMA_0_0_.m Inst AHIGH_28_ AHIGH[28] + Inst cpu_est_2_0_0_i_2_ cpu_est_2_0_0_i[2] + Inst SIZE_DMA_0_0__n SIZE_DMA_0_0_.n Inst AHIGH_29_ AHIGH[29] + Inst SIZE_DMA_0_0__p SIZE_DMA_0_0_.p Inst AHIGH_30_ AHIGH[30] Inst AHIGH_31_ AHIGH[31] - Inst cpu_est_2_0_0_0_i_1_ cpu_est_2_0_0_0_i[1] - Inst pos_clk_un9_clk_000_pe_0_0_i pos_clk.un9_clk_000_pe_0_0_i - Inst IPL_030_1_1_ IPL_030_1[1] - Inst IPL_030_1_2_ IPL_030_1[2] - Inst SM_AMIGA_srsts_i_0_0_o2_i_3_ SM_AMIGA_srsts_i_0_0_o2_i[3] - Inst SIZE_DMA_0_0__r SIZE_DMA_0_0_.r - Inst SIZE_DMA_0_0__m SIZE_DMA_0_0_.m - Inst SIZE_DMA_0_0__n SIZE_DMA_0_0_.n - Inst SIZE_DMA_0_0__p SIZE_DMA_0_0_.p - Inst SIZE_DMA_0_1__r SIZE_DMA_0_1_.r - Inst SIZE_DMA_0_1__m SIZE_DMA_0_1_.m - Inst SIZE_DMA_0_1__n SIZE_DMA_0_1_.n - Inst SIZE_DMA_0_1__p SIZE_DMA_0_1_.p - Inst A_DECODE_16_ A_DECODE[16] - Inst IPL_030_0_0__r IPL_030_0_0_.r - Inst A_DECODE_17_ A_DECODE[17] - Inst SM_AMIGA_srsts_i_0_0_o2_i_4_ SM_AMIGA_srsts_i_0_0_o2_i[4] - Inst IPL_030_0_0__m IPL_030_0_0_.m - Inst A_DECODE_18_ A_DECODE[18] - Inst SM_AMIGA_srsts_i_i_i_o2_i_2_ SM_AMIGA_srsts_i_i_i_o2_i[2] - Inst IPL_030_0_0__n IPL_030_0_0_.n - Inst A_DECODE_19_ A_DECODE[19] - Inst IPL_030_0_0__p IPL_030_0_0_.p - Inst A_DECODE_20_ A_DECODE[20] - Inst IPL_030_0_1__r IPL_030_0_1_.r - Inst A_DECODE_21_ A_DECODE[21] - Inst cpu_est_2_0_0_0_o2_i_2_ cpu_est_2_0_0_0_o2_i[2] - Inst IPL_030_0_1__m IPL_030_0_1_.m - Inst A_DECODE_22_ A_DECODE[22] - Inst IPL_030_0_1__n IPL_030_0_1_.n - Inst A_DECODE_23_ A_DECODE[23] - Inst IPL_030_0_1__p IPL_030_0_1_.p - Inst A_0_ A[0] - Inst IPL_030_0_2__r IPL_030_0_2_.r - Inst A_1_ A[1] - Inst IPL_030_0_2__m IPL_030_0_2_.m - Inst IPL_030_0_2__n IPL_030_0_2_.n - Inst IPL_030_0_2__p IPL_030_0_2_.p - Inst cpu_est_2_0_0_0_i_2_ cpu_est_2_0_0_0_i[2] + Inst cpu_est_2_0_0_i_1_ cpu_est_2_0_0_i[1] + Inst pos_clk_un9_clk_000_pe_0_i pos_clk.un9_clk_000_pe_0_i + Inst AMIGA_BUS_ENABLE_DMA_HIGH_0_r AMIGA_BUS_ENABLE_DMA_HIGH_0.r + Inst cpu_est_2_i_0_o2_i_3_ cpu_est_2_i_0_o2_i[3] + Inst AMIGA_BUS_ENABLE_DMA_HIGH_0_m AMIGA_BUS_ENABLE_DMA_HIGH_0.m + Inst AMIGA_BUS_ENABLE_DMA_HIGH_0_n AMIGA_BUS_ENABLE_DMA_HIGH_0.n + Inst AMIGA_BUS_ENABLE_DMA_HIGH_0_p AMIGA_BUS_ENABLE_DMA_HIGH_0.p + Inst AMIGA_BUS_ENABLE_DMA_LOW_0_r AMIGA_BUS_ENABLE_DMA_LOW_0.r + Inst AMIGA_BUS_ENABLE_DMA_LOW_0_m AMIGA_BUS_ENABLE_DMA_LOW_0.m + Inst AMIGA_BUS_ENABLE_DMA_LOW_0_n AMIGA_BUS_ENABLE_DMA_LOW_0.n + Inst SM_AMIGA_srsts_i_o3_i_4_ SM_AMIGA_srsts_i_o3_i[4] + Inst AMIGA_BUS_ENABLE_DMA_LOW_0_p AMIGA_BUS_ENABLE_DMA_LOW_0.p + Inst SM_AMIGA_srsts_i_o3_i_2_ SM_AMIGA_srsts_i_o3_i[2] Inst A0_DMA_0_r A0_DMA_0.r + Inst SM_AMIGA_srsts_i_o3_i_6_ SM_AMIGA_srsts_i_o3_i[6] Inst A0_DMA_0_m A0_DMA_0.m Inst A0_DMA_0_n A0_DMA_0.n Inst A0_DMA_0_p A0_DMA_0.p - Inst pos_clk_RW_000_INT_5_i_a3_i_i pos_clk.RW_000_INT_5_i_a3_i_i - Inst AMIGA_BUS_ENABLE_DMA_LOW_0_r AMIGA_BUS_ENABLE_DMA_LOW_0.r - Inst AMIGA_BUS_ENABLE_DMA_LOW_0_m AMIGA_BUS_ENABLE_DMA_LOW_0.m - Inst cpu_est_2_i_0_0_o2_i_3_ cpu_est_2_i_0_0_o2_i[3] - Inst AMIGA_BUS_ENABLE_DMA_LOW_0_n AMIGA_BUS_ENABLE_DMA_LOW_0.n + Inst A_DECODE_16_ A_DECODE[16] + Inst RW_000_DMA_0_r RW_000_DMA_0.r + Inst A_DECODE_17_ A_DECODE[17] + Inst RW_000_DMA_0_m RW_000_DMA_0.m + Inst A_DECODE_18_ A_DECODE[18] + Inst RW_000_DMA_0_n RW_000_DMA_0.n + Inst A_DECODE_19_ A_DECODE[19] + Inst RW_000_DMA_0_p RW_000_DMA_0.p + Inst A_DECODE_20_ A_DECODE[20] + Inst A_DECODE_21_ A_DECODE[21] + Inst SM_AMIGA_srsts_i_o4_i_i_1_ SM_AMIGA_srsts_i_o4_i_i[1] + Inst pos_clk_SIZE_DMA_6_0_0_1_ pos_clk.SIZE_DMA_6_0_0[1] + Inst A_DECODE_22_ A_DECODE[22] + Inst pos_clk_SIZE_DMA_6_0_0_0_ pos_clk.SIZE_DMA_6_0_0[0] + Inst A_DECODE_23_ A_DECODE[23] + Inst A_0_ A[0] + Inst A_1_ A[1] + Inst pos_clk_SIZE_DMA_6_0_0_o2_0_ pos_clk.SIZE_DMA_6_0_0_o2[0] + Inst pos_clk_RW_000_DMA_3 pos_clk.RW_000_DMA_3 + Inst A_i_1_ A_i[1] + Inst pos_clk_AMIGA_BUS_ENABLE_DMA_LOW_3 pos_clk.AMIGA_BUS_ENABLE_DMA_LOW_3 + Inst pos_clk_AMIGA_BUS_ENABLE_DMA_HIGH_3 pos_clk.AMIGA_BUS_ENABLE_DMA_HIGH_3 + Inst pos_clk_un5_bgack_030_int_d pos_clk.un5_bgack_030_int_d + Inst IPL_c_i_2_ IPL_c_i[2] + Inst IPL_D0_0_i_2_ IPL_D0_0_i[2] + Inst IPL_030_1_i_2_ IPL_030_1_i[2] + Inst A_c_i_0_ A_c_i[0] + Inst pos_clk_un34_as_030_d0_i pos_clk.un34_as_030_d0_i + Inst SIZE_c_i_1_ SIZE_c_i[1] + Inst pos_clk_un34_as_030_d0_i_a2 pos_clk.un34_as_030_d0_i_a2 Inst IPL_030_0_ IPL_030[0] - Inst AMIGA_BUS_ENABLE_DMA_LOW_0_p AMIGA_BUS_ENABLE_DMA_LOW_0.p Inst IPL_030_1_ IPL_030[1] Inst IPL_030_2_ IPL_030[2] - Inst AMIGA_BUS_ENABLE_DMA_HIGH_0_r AMIGA_BUS_ENABLE_DMA_HIGH_0.r + Inst pos_clk_un6_bg_030_i pos_clk.un6_bg_030_i Inst IPL_0_ IPL[0] - Inst AMIGA_BUS_ENABLE_DMA_HIGH_0_m AMIGA_BUS_ENABLE_DMA_HIGH_0.m + Inst pos_clk_un9_bg_030_i pos_clk.un9_bg_030_i Inst IPL_1_ IPL[1] - Inst SM_AMIGA_srsts_i_0_0_o2_0_i_3_ SM_AMIGA_srsts_i_0_0_o2_0_i[3] - Inst AMIGA_BUS_ENABLE_DMA_HIGH_0_n AMIGA_BUS_ENABLE_DMA_HIGH_0.n + Inst pos_clk_SIZE_DMA_6_0_0_a2_1_ pos_clk.SIZE_DMA_6_0_0_a2[1] Inst IPL_2_ IPL[2] - Inst AMIGA_BUS_ENABLE_DMA_HIGH_0_p AMIGA_BUS_ENABLE_DMA_HIGH_0.p + Inst pos_clk_SIZE_DMA_6_0_0_a2_0_ pos_clk.SIZE_DMA_6_0_0_a2[0] + Inst pos_clk_AS_000_INT_1_i_a2 pos_clk.AS_000_INT_1_i_a2 + Inst pos_clk_DSACK1_INT_1_i_a2 pos_clk.DSACK1_INT_1_i_a2 Inst BG_000_0_r BG_000_0.r + Inst pos_clk_A0_DMA_3_0_a2 pos_clk.A0_DMA_3_0_a2 Inst BG_000_0_m BG_000_0.m Inst BG_000_0_n BG_000_0.n Inst BG_000_0_p BG_000_0.p - Inst cpu_est_i_2_ cpu_est_i[2] - Inst cpu_est_2_i_0_0_a3_3_ cpu_est_2_i_0_0_a3[3] + Inst UDS_000_INT_0_r UDS_000_INT_0.r + Inst UDS_000_INT_0_m UDS_000_INT_0.m Inst FC_0_ FC[0] - Inst cpu_est_0_3__r cpu_est_0_3_.r + Inst UDS_000_INT_0_n UDS_000_INT_0.n Inst FC_1_ FC[1] - Inst cpu_est_0_3__m cpu_est_0_3_.m - Inst cpu_est_0_3__n cpu_est_0_3_.n - Inst cpu_est_0_3__p cpu_est_0_3_.p - Inst IPL_030_1_0_ IPL_030_1[0] + Inst UDS_000_INT_0_p UDS_000_INT_0.p + Inst A_DECODE_i_18_ A_DECODE_i[18] + Inst LDS_000_INT_0_r LDS_000_INT_0.r + Inst A_DECODE_i_19_ A_DECODE_i[19] + Inst LDS_000_INT_0_m LDS_000_INT_0.m + Inst LDS_000_INT_0_n LDS_000_INT_0.n + Inst LDS_000_INT_0_p LDS_000_INT_0.p + Inst A_DECODE_i_16_ A_DECODE_i[16] + Inst DS_000_ENABLE_0_r DS_000_ENABLE_0.r + Inst pos_clk_RW_000_INT_5 pos_clk.RW_000_INT_5 + Inst SM_AMIGA_srsts_i_0_1_0_ SM_AMIGA_srsts_i_0_1[0] + Inst DS_000_ENABLE_0_m DS_000_ENABLE_0.m + Inst SM_AMIGA_srsts_i_0_0_ SM_AMIGA_srsts_i_0[0] + Inst DS_000_ENABLE_0_n DS_000_ENABLE_0.n + Inst SM_AMIGA_nss_i_i_0_1_0_ SM_AMIGA_nss_i_i_0_1[0] + Inst DS_000_ENABLE_0_p DS_000_ENABLE_0.p + Inst SM_AMIGA_nss_i_i_0_0_ SM_AMIGA_nss_i_i_0[0] Inst pos_clk_un9_bg_030 pos_clk.un9_bg_030 + Inst SM_AMIGA_srsts_i_0_1_5_ SM_AMIGA_srsts_i_0_1[5] + Inst SM_AMIGA_srsts_i_0_5_ SM_AMIGA_srsts_i_0[5] + Inst IPL_030_0_0__r IPL_030_0_0_.r + Inst SM_AMIGA_i_3_ SM_AMIGA_i[3] + Inst IPL_030_0_0__m IPL_030_0_0_.m + Inst SM_AMIGA_srsts_i_a4_3_ SM_AMIGA_srsts_i_a4[3] + Inst IPL_030_0_0__n IPL_030_0_0_.n + Inst SM_AMIGA_srsts_i_a4_2_ SM_AMIGA_srsts_i_a4[2] + Inst IPL_030_0_0__p IPL_030_0_0_.p + Inst SM_AMIGA_i_2_ SM_AMIGA_i[2] + Inst IPL_030_0_1__r IPL_030_0_1_.r + Inst SM_AMIGA_i_1_ SM_AMIGA_i[1] + Inst IPL_030_0_1__m IPL_030_0_1_.m + Inst cpu_est_2_i_0_1_3_ cpu_est_2_i_0_1[3] + Inst SM_AMIGA_srsts_i_a4_1_ SM_AMIGA_srsts_i_a4[1] + Inst IPL_030_0_1__n IPL_030_0_1_.n + Inst cpu_est_2_i_0_3_ cpu_est_2_i_0[3] + Inst IPL_030_0_1__p IPL_030_0_1_.p + Inst pos_clk_un6_bg_030_0_a2_1 pos_clk.un6_bg_030_0_a2_1 + Inst pos_clk_un6_bg_030_0_a2 pos_clk.un6_bg_030_0_a2 + Inst IPL_030_0_2__r IPL_030_0_2_.r + Inst IPL_030_0_2__m IPL_030_0_2_.m + Inst IPL_030_0_2__n IPL_030_0_2_.n + Inst IPL_030_0_2__p IPL_030_0_2_.p + Inst IPL_030_1_2_ IPL_030_1[2] + Inst AS_030_000_SYNC_0_r AS_030_000_SYNC_0.r + Inst IPL_D0_0_2_ IPL_D0_0[2] + Inst AS_030_000_SYNC_0_m AS_030_000_SYNC_0.m + Inst AS_030_000_SYNC_0_n AS_030_000_SYNC_0.n + Inst AS_030_000_SYNC_0_p AS_030_000_SYNC_0.p Inst RW_000_INT_0_r RW_000_INT_0.r Inst RW_000_INT_0_m RW_000_INT_0.m Inst RW_000_INT_0_n RW_000_INT_0.n - Inst pos_clk_CYCLE_DMA_5_1_i_0_1 pos_clk.CYCLE_DMA_5_1_i_0_1 + Inst pos_clk_un29_clk_000_ne_1_1 pos_clk.un29_clk_000_ne_1_1 + Inst CLK_000_D_i_0_ CLK_000_D_i[0] Inst RW_000_INT_0_p RW_000_INT_0.p - Inst pos_clk_CYCLE_DMA_5_1_i_0 pos_clk.CYCLE_DMA_5_1_i_0 - Inst SM_AMIGA_i_i_7_ SM_AMIGA_i_i[7] - Inst DS_000_DMA_0_r DS_000_DMA_0.r - Inst DS_000_DMA_0_m DS_000_DMA_0.m - Inst pos_clk_un9_clk_000_pe_0_0_o2 pos_clk.un9_clk_000_pe_0_0_o2 - Inst DS_000_DMA_0_n DS_000_DMA_0.n - Inst cpu_est_i_3_ cpu_est_i[3] - Inst DS_000_DMA_0_p DS_000_DMA_0.p - Inst cpu_est_2_i_0_0_o2_3_ cpu_est_2_i_0_0_o2[3] - Inst AS_000_DMA_0_r AS_000_DMA_0.r - Inst cpu_est_2_0_0_a3_1_1_1_ cpu_est_2_0_0_a3_1_1[1] - Inst cpu_est_0_0_x2_0_0_ cpu_est_0_0_x2_0[0] - Inst AS_000_DMA_0_m AS_000_DMA_0.m - Inst cpu_est_2_0_0_a3_1_1_ cpu_est_2_0_0_a3_1[1] - Inst pos_clk_RW_000_INT_5_i_a3_i pos_clk.RW_000_INT_5_i_a3_i - Inst AS_000_DMA_0_n AS_000_DMA_0.n - Inst AS_000_DMA_0_p AS_000_DMA_0.p - Inst cpu_est_2_i_0_0_3_ cpu_est_2_i_0_0[3] - Inst AS_030_000_SYNC_0_r AS_030_000_SYNC_0.r - Inst AS_030_000_SYNC_0_m AS_030_000_SYNC_0.m - Inst SM_AMIGA_nss_i_i_0_0_0_ SM_AMIGA_nss_i_i_0_0[0] - Inst SM_AMIGA_srsts_i_0_0_a2_0_3_ SM_AMIGA_srsts_i_0_0_a2_0[3] - Inst AS_030_000_SYNC_0_n AS_030_000_SYNC_0.n - Inst SM_AMIGA_srsts_i_0_0_1_4_ SM_AMIGA_srsts_i_0_0_1[4] - Inst AS_030_000_SYNC_0_p AS_030_000_SYNC_0.p - Inst SM_AMIGA_srsts_i_0_0_4_ SM_AMIGA_srsts_i_0_0[4] - Inst cpu_est_0_0_x2_0_a3_0_0_ cpu_est_0_0_x2_0_a3_0[0] - Inst RW_000_DMA_0_r RW_000_DMA_0.r - Inst SM_AMIGA_srsts_i_0_0_1_3_ SM_AMIGA_srsts_i_0_0_1[3] - Inst cpu_est_i_0_ cpu_est_i[0] - Inst RW_000_DMA_0_m RW_000_DMA_0.m - Inst SM_AMIGA_srsts_i_0_0_3_ SM_AMIGA_srsts_i_0_0[3] - Inst cpu_est_0_0_x2_0_a3_0_ cpu_est_0_0_x2_0_a3[0] - Inst RW_000_DMA_0_n RW_000_DMA_0.n - Inst SM_AMIGA_srsts_i_i_i_1_2_ SM_AMIGA_srsts_i_i_i_1[2] - Inst cpu_est_2_0_0_0_2_ cpu_est_2_0_0_0[2] - Inst RW_000_DMA_0_p RW_000_DMA_0.p - Inst SM_AMIGA_srsts_i_i_i_2_ SM_AMIGA_srsts_i_i_i[2] - Inst SM_AMIGA_srsts_i_0_0_5_ SM_AMIGA_srsts_i_0_0[5] - Inst SM_AMIGA_srsts_i_0_0_1_6_ SM_AMIGA_srsts_i_0_0_1[6] - Inst CLK_000_D_i_1_ CLK_000_D_i[1] - Inst SM_AMIGA_srsts_i_0_0_6_ SM_AMIGA_srsts_i_0_0[6] - Inst SM_AMIGA_srsts_i_0_0_1_0_ SM_AMIGA_srsts_i_0_0_1[0] - Inst SM_AMIGA_srsts_i_0_0_0_ SM_AMIGA_srsts_i_0_0[0] - Inst cpu_est_2_0_0_0_o2_2_ cpu_est_2_0_0_0_o2[2] - Inst cpu_est_i_1_ cpu_est_i[1] - Inst SM_AMIGA_i_3_ SM_AMIGA_i[3] - Inst pos_clk_un9_clk_000_pe_0_0_a3_0_1 pos_clk.un9_clk_000_pe_0_0_a3_0_1 + Inst pos_clk_un29_clk_000_ne_1_2 pos_clk.un29_clk_000_ne_1_2 + Inst pos_clk_un29_clk_000_ne_1_3 pos_clk.un29_clk_000_ne_1_3 + Inst pos_clk_un29_clk_000_ne_1 pos_clk.un29_clk_000_ne_1 + Inst SM_AMIGA_srsts_i_o4_i_1_ SM_AMIGA_srsts_i_o4_i[1] + Inst IPL_D0_0_0_ IPL_D0_0[0] + Inst pos_clk_un9_clk_000_pe_0_a3_1 pos_clk.un9_clk_000_pe_0_a3_1 + Inst SM_AMIGA_srsts_i_o3_6_ SM_AMIGA_srsts_i_o3[6] + Inst IPL_D0_0_1_ IPL_D0_0[1] + Inst pos_clk_un9_clk_000_pe_0_a3_2 pos_clk.un9_clk_000_pe_0_a3_2 + Inst SM_AMIGA_srsts_i_o3_2_ SM_AMIGA_srsts_i_o3[2] + Inst IPL_030_1_0_ IPL_030_1[0] + Inst pos_clk_un9_clk_000_pe_0_a3 pos_clk.un9_clk_000_pe_0_a3 Inst SM_AMIGA_i_5_ SM_AMIGA_i[5] - Inst pos_clk_un9_clk_000_pe_0_0_a3_0_2 pos_clk.un9_clk_000_pe_0_0_a3_0_2 - Inst SM_AMIGA_srsts_i_0_0_o2_4_ SM_AMIGA_srsts_i_0_0_o2[4] - Inst pos_clk_un9_clk_000_pe_0_0_a3_0 pos_clk.un9_clk_000_pe_0_0_a3_0 - Inst pos_clk_un9_clk_000_pe_0_0_a3_1 pos_clk.un9_clk_000_pe_0_0_a3_1 - Inst SM_AMIGA_srsts_i_0_0_a3_5_ SM_AMIGA_srsts_i_0_0_a3[5] - Inst pos_clk_un9_clk_000_pe_0_0_a3_2 pos_clk.un9_clk_000_pe_0_0_a3_2 - Inst pos_clk_un9_clk_000_pe_0_0_a3 pos_clk.un9_clk_000_pe_0_0_a3 - Inst RST_DLY_i_0_ RST_DLY_i[0] - Inst SM_AMIGA_srsts_i_0_0_a2_1_3_ SM_AMIGA_srsts_i_0_0_a2_1[3] - Inst SM_AMIGA_srsts_i_0_0_a2_2_3_ SM_AMIGA_srsts_i_0_0_a2_2[3] - Inst SM_AMIGA_i_2_ SM_AMIGA_i[2] - Inst SM_AMIGA_srsts_i_0_0_a2_3_ SM_AMIGA_srsts_i_0_0_a2[3] - Inst SM_AMIGA_srsts_i_i_i_a3_2_ SM_AMIGA_srsts_i_i_i_a3[2] - Inst pos_clk_un6_bg_030_i_0_1 pos_clk.un6_bg_030_i_0_1 - Inst SM_AMIGA_srsts_i_0_0_a3_3_ SM_AMIGA_srsts_i_0_0_a3[3] - Inst pos_clk_un6_bg_030_i_0 pos_clk.un6_bg_030_i_0 + Inst IPL_030_1_1_ IPL_030_1[1] + Inst pos_clk_un9_clk_000_pe_0_a3_0_1 pos_clk.un9_clk_000_pe_0_a3_0_1 + Inst SM_AMIGA_srsts_i_o3_4_ SM_AMIGA_srsts_i_o3[4] + Inst pos_clk_un9_clk_000_pe_0_a3_0_2 pos_clk.un9_clk_000_pe_0_a3_0_2 + Inst pos_clk_un9_clk_000_pe_0_a3_0 pos_clk.un9_clk_000_pe_0_a3_0 + Inst SM_AMIGA_i_6_ SM_AMIGA_i[6] + Inst SM_AMIGA_srsts_i_a4_6_ SM_AMIGA_srsts_i_a4[6] Inst SM_AMIGA_i_4_ SM_AMIGA_i[4] - Inst SM_AMIGA_nss_i_i_0_0_1_0_ SM_AMIGA_nss_i_i_0_0_1[0] - Inst SM_AMIGA_srsts_i_0_0_a3_4_ SM_AMIGA_srsts_i_0_0_a3[4] - Inst pos_clk_CYCLE_DMA_5_0_i_0_2 pos_clk.CYCLE_DMA_5_0_i_0_2 - Inst pos_clk_CYCLE_DMA_5_0_i_0 pos_clk.CYCLE_DMA_5_0_i_0 - Inst pos_clk_un1_ipl_i_0_1 pos_clk.un1_ipl_i_0_1 - Inst cpu_est_2_0_0_0_a2_2_ cpu_est_2_0_0_0_a2[2] - Inst pos_clk_un1_ipl_i_0_2 pos_clk.un1_ipl_i_0_2 - Inst pos_clk_un9_clk_000_pe_0_0 pos_clk.un9_clk_000_pe_0_0 - Inst pos_clk_un1_ipl_i_0 pos_clk.un1_ipl_i_0 - Inst cpu_est_2_0_0_0_1_ cpu_est_2_0_0_0[1] - Inst pos_clk_un34_as_030_d0_i_i_a3_1 pos_clk.un34_as_030_d0_i_i_a3_1 - Inst SM_AMIGA_srsts_i_0_0_a3_0_3_ SM_AMIGA_srsts_i_0_0_a3_0[3] - Inst pos_clk_un34_as_030_d0_i_i_a3_2 pos_clk.un34_as_030_d0_i_i_a3_2 - Inst pos_clk_un34_as_030_d0_i_i_a3_3 pos_clk.un34_as_030_d0_i_i_a3_3 - Inst pos_clk_un34_as_030_d0_i_i_a3 pos_clk.un34_as_030_d0_i_i_a3 - Inst SM_AMIGA_srsts_i_0_0_o2_3_ SM_AMIGA_srsts_i_0_0_o2[3] - Inst VMA_INT_0_r VMA_INT_0.r - Inst VMA_INT_0_m VMA_INT_0.m - Inst VMA_INT_0_n VMA_INT_0.n - Inst SM_AMIGA_srsts_i_i_i_o2_1_2_ SM_AMIGA_srsts_i_i_i_o2_1[2] - Inst VMA_INT_0_p VMA_INT_0.p - Inst SM_AMIGA_srsts_i_i_i_o2_2_ SM_AMIGA_srsts_i_i_i_o2[2] - Inst cpu_est_0_1__r cpu_est_0_1_.r - Inst cpu_est_0_1__m cpu_est_0_1_.m - Inst cpu_est_0_1__n cpu_est_0_1_.n - Inst cpu_est_0_1__p cpu_est_0_1_.p - Inst cpu_est_0_2__r cpu_est_0_2_.r - Inst SM_AMIGA_nss_i_i_0_0_o2_1_0_ SM_AMIGA_nss_i_i_0_0_o2_1[0] - Inst cpu_est_0_2__m cpu_est_0_2_.m - Inst SM_AMIGA_nss_i_i_0_0_o2_2_0_ SM_AMIGA_nss_i_i_0_0_o2_2[0] - Inst cpu_est_0_2__n cpu_est_0_2_.n - Inst SM_AMIGA_nss_i_i_0_0_o2_0_ SM_AMIGA_nss_i_i_0_0_o2[0] - Inst cpu_est_0_2__p cpu_est_0_2_.p - Inst pos_clk_un21_bgack_030_int_i_0_o3_0_o3_1 pos_clk.un21_bgack_030_int_i_0_o3_0_o3_1 - Inst pos_clk_un21_bgack_030_int_i_0_o3_0_o3_2 pos_clk.un21_bgack_030_int_i_0_o3_0_o3_2 + Inst cpu_est_2_0_0_a3_0_1_1_ cpu_est_2_0_0_a3_0_1[1] + Inst SM_AMIGA_srsts_i_a4_4_ SM_AMIGA_srsts_i_a4[4] + Inst cpu_est_2_0_0_a3_0_1_ cpu_est_2_0_0_a3_0[1] + Inst SM_AMIGA_srsts_i_a4_0_3_ SM_AMIGA_srsts_i_a4_0[3] + Inst cpu_est_2_i_0_a3_3_ cpu_est_2_i_0_a3[3] + Inst cpu_est_i_2_ cpu_est_i[2] + Inst pos_clk_as_000_dma6_1 pos_clk.as_000_dma6_1 + Inst pos_clk_as_000_dma6_2 pos_clk.as_000_dma6_2 + Inst pos_clk_as_000_dma6 pos_clk.as_000_dma6 + Inst cpu_est_0_0_ cpu_est_0[0] + Inst pos_clk_un4_rw_000_1 pos_clk.un4_rw_000_1 + Inst SM_AMIGA_srsts_i_o4_i_a2_1_ SM_AMIGA_srsts_i_o4_i_a2[1] + Inst pos_clk_un4_rw_000_2 pos_clk.un4_rw_000_2 + Inst SM_AMIGA_i_i_7_ SM_AMIGA_i_i[7] + Inst pos_clk_un4_rw_000 pos_clk.un4_rw_000 + Inst SM_AMIGA_nss_i_i_0_a2_0_ SM_AMIGA_nss_i_i_0_a2[0] + Inst pos_clk_un13_clk_out_int_1 pos_clk.un13_clk_out_int_1 + Inst SM_AMIGA_nss_i_i_0_a2_0_0_ SM_AMIGA_nss_i_i_0_a2_0[0] + Inst pos_clk_un13_clk_out_int pos_clk.un13_clk_out_int + Inst SM_AMIGA_srsts_i_0_a2_5_ SM_AMIGA_srsts_i_0_a2[5] + Inst pos_clk_un34_as_030_d0_i_a2_0 pos_clk.un34_as_030_d0_i_a2_0 + Inst CLK_000_D_i_1_ CLK_000_D_i[1] + Inst cpu_est_i_1_ cpu_est_i[1] + Inst cpu_est_2_i_0_o2_3_ cpu_est_2_i_0_o2[3] + Inst pos_clk_un9_clk_000_pe_0 pos_clk.un9_clk_000_pe_0 + Inst cpu_est_2_0_0_1_ cpu_est_2_0_0[1] + Inst cpu_est_2_0_0_2_ cpu_est_2_0_0[2] + Inst cpu_est_i_3_ cpu_est_i[3] + Inst cpu_est_i_0_ cpu_est_i[0] + Inst cpu_est_2_0_0_a3_1_ cpu_est_2_0_0_a3[1] + Inst cpu_est_2_0_0_a3_2_ cpu_est_2_0_0_a3[2] + Inst cpu_est_2_i_0_a3_0_3_ cpu_est_2_i_0_a3_0[3] + Inst RST_DLY_i_1_ RST_DLY_i[1] + Inst SM_AMIGA_srsts_i_4_ SM_AMIGA_srsts_i[4] + Inst SM_AMIGA_srsts_i_1_3_ SM_AMIGA_srsts_i_1[3] + Inst SM_AMIGA_srsts_i_3_ SM_AMIGA_srsts_i[3] Inst RST_DLY_i_2_ RST_DLY_i[2] - Inst pos_clk_un21_bgack_030_int_i_0_o3_0_o3 pos_clk.un21_bgack_030_int_i_0_o3_0_o3 - Inst SM_AMIGA_srsts_i_0_0_1_1_ SM_AMIGA_srsts_i_0_0_1[1] - Inst cpu_est_2_0_0_0_a3_1_ cpu_est_2_0_0_0_a3[1] - Inst SM_AMIGA_srsts_i_0_0_2_1_ SM_AMIGA_srsts_i_0_0_2[1] - Inst cpu_est_2_0_0_0_a3_2_ cpu_est_2_0_0_0_a3[2] - Inst SM_AMIGA_srsts_i_0_0_1_ SM_AMIGA_srsts_i_0_0[1] - Inst pos_clk_CYCLE_DMA_5_0_i_0_1 pos_clk.CYCLE_DMA_5_0_i_0_1 - Inst pos_clk_un34_as_030_d0_i_i_o2_2 pos_clk.un34_as_030_d0_i_i_o2_2 - Inst pos_clk_un34_as_030_d0_i_i_o2_3 pos_clk.un34_as_030_d0_i_i_o2_3 - Inst A_DECODE_i_16_ A_DECODE_i[16] - Net ipl_i_2__n IPL_i[2] - Net ipl_i_1__n IPL_i[1] - Net ipl_i_0__n IPL_i[0] - Net a_i_1__n A_i[1] + Inst SM_AMIGA_srsts_i_1_2_ SM_AMIGA_srsts_i_1[2] + Inst SM_AMIGA_srsts_i_2_ SM_AMIGA_srsts_i[2] + Inst pos_clk_un10_sm_amiga_1 pos_clk.un10_sm_amiga_1 + Inst SM_AMIGA_i_0_ SM_AMIGA_i[0] + Net clk_000_d_i_1__n CLK_000_D_i[1] + Net a_decode_2__n A_DECODE[2] + Net sm_amiga_i_0__n SM_AMIGA_i[0] + Net rst_dly_i_2__n RST_DLY_i[2] + Net rst_dly_i_1__n RST_DLY_i[1] + Net rst_dly_i_0__n RST_DLY_i[0] Net vcc_n_n VCC - Net cycle_dma_i_0__n CYCLE_DMA_i[0] - Net ahigh_i_30__n AHIGH_i[30] Net gnd_n_n GND - Net ahigh_i_31__n AHIGH_i[31] - Net ahigh_i_28__n AHIGH_i[28] - Net ahigh_i_29__n AHIGH_i[29] - Net ahigh_i_26__n AHIGH_i[26] - Net ahigh_i_27__n AHIGH_i[27] - Net ahigh_i_24__n AHIGH_i[24] - Net ahigh_i_25__n AHIGH_i[25] - Net pos_clk_un21_bgack_030_int_i_0_0_n pos_clk.un21_bgack_030_int_i_0_0 - Net cpu_est_2__n cpu_est[2] - Net cpu_est_3__n cpu_est[3] - Net clk_000_d_i_3__n CLK_000_D_i[3] - Net cpu_est_0__n cpu_est[0] + Net clk_030_pe_i_1__n CLK_030_PE_i[1] + Net pos_clk_un4_rw_000_i_n pos_clk.un4_rw_000_i + Net pos_clk_un3_clk_out_int_i_n pos_clk.un3_clk_out_int_i + Net cycle_dma_i_0__n CYCLE_DMA_i[0] + Net cycle_dma_i_1__n CYCLE_DMA_i[1] Net cpu_est_1__n cpu_est[1] - Net cycle_dma_0__n CYCLE_DMA[0] - Net cycle_dma_1__n CYCLE_DMA[1] + Net pos_clk_as_000_dma6_i_n pos_clk.as_000_dma6_i + Net cpu_est_2__n cpu_est[2] + Net pos_clk_un4_bgack_000_i_n pos_clk.un4_bgack_000_i + Net cpu_est_3__n cpu_est[3] + Net pos_clk_un6_bgack_000_0_n pos_clk.un6_bgack_000_0 + Net cpu_est_0__n cpu_est[0] + Net ahigh_i_25__n AHIGH_i[25] + Net ahigh_i_24__n AHIGH_i[24] + Net pos_clk_un1_bgack_030_int_0_n pos_clk.un1_bgack_030_int_0 + Net ahigh_i_27__n AHIGH_i[27] + Net pos_clk_un12_clk_out_int_0_n pos_clk.un12_clk_out_int_0 + Net ahigh_i_26__n AHIGH_i[26] + Net pos_clk_un3_0_n pos_clk.un3_0 + Net ahigh_i_29__n AHIGH_i[29] + Net pos_clk_un15_bgack_030_int_i_n pos_clk.un15_bgack_030_int_i + Net ahigh_i_28__n AHIGH_i[28] + Net ahigh_i_31__n AHIGH_i[31] + Net ahigh_i_30__n AHIGH_i[30] Net clk_000_d_3__n CLK_000_D[3] + Net a_i_1__n A_i[1] + Net clk_030_pe_1__n CLK_030_PE[1] Net clk_000_d_1__n CLK_000_D[1] - Net pos_clk_size_dma_6_0_1__n pos_clk.SIZE_DMA_6_0[1] Net clk_000_d_0__n CLK_000_D[0] - Net pos_clk_size_dma_6_0_0__n pos_clk.SIZE_DMA_6_0[0] + Net a_decode_i_16__n A_DECODE_i[16] + Net a_decode_i_18__n A_DECODE_i[18] + Net a_decode_i_19__n A_DECODE_i[19] Net ipl_d0_0__n IPL_D0[0] - Net size_c_0__n SIZE_c[0] Net ipl_d0_1__n IPL_D0[1] - Net size_0__n SIZE[0] Net ipl_d0_2__n IPL_D0[2] - Net size_c_1__n SIZE_c[1] Net clk_000_d_2__n CLK_000_D[2] + Net pos_clk_un5_bgack_030_int_d_i_n pos_clk.un5_bgack_030_int_d_i Net clk_000_d_4__n CLK_000_D[4] - Net ahigh_c_24__n AHIGH_c[24] - Net ahigh_24__n AHIGH[24] - Net ahigh_c_25__n AHIGH_c[25] - Net ahigh_25__n AHIGH[25] - Net pos_clk_un9_bg_030_n pos_clk.un9_bg_030 - Net ahigh_c_26__n AHIGH_c[26] + Net pos_clk_amiga_bus_enable_dma_high_3_0_n pos_clk.AMIGA_BUS_ENABLE_DMA_HIGH_3_0 + Net pos_clk_un6_bg_030_n pos_clk.un6_bg_030 + Net pos_clk_amiga_bus_enable_dma_low_3_0_n pos_clk.AMIGA_BUS_ENABLE_DMA_LOW_3_0 + Net pos_clk_ipl_n pos_clk.ipl + Net pos_clk_rw_000_dma_3_0_n pos_clk.RW_000_DMA_3_0 Net sm_amiga_6__n SM_AMIGA[6] - Net ahigh_26__n AHIGH[26] Net sm_amiga_4__n SM_AMIGA[4] - Net ahigh_c_27__n AHIGH_c[27] Net sm_amiga_1__n SM_AMIGA[1] - Net ahigh_27__n AHIGH[27] Net sm_amiga_0__n SM_AMIGA[0] - Net ahigh_c_28__n AHIGH_c[28] Net size_dma_0__n SIZE_DMA[0] - Net ahigh_28__n AHIGH[28] Net size_dma_1__n SIZE_DMA[1] + Net cycle_dma_0__n CYCLE_DMA[0] + Net pos_clk_size_dma_6_0_0__n pos_clk.SIZE_DMA_6_0[0] + Net cycle_dma_1__n CYCLE_DMA[1] + Net clk_030_pe_0__n CLK_030_PE[0] + Net pos_clk_size_dma_6_0_1__n pos_clk.SIZE_DMA_6_0[1] + Net rst_dly_0__n RST_DLY[0] + Net rst_dly_1__n RST_DLY[1] + Net rst_dly_2__n RST_DLY[2] + Net size_c_0__n SIZE_c[0] + Net size_0__n SIZE[0] + Net pos_clk_rw_000_int_5_n pos_clk.RW_000_INT_5 + Net size_c_1__n SIZE_c[1] + Net ahigh_c_24__n AHIGH_c[24] + Net sm_amiga_5__n SM_AMIGA[5] + Net ahigh_24__n AHIGH[24] + Net sm_amiga_3__n SM_AMIGA[3] + Net ahigh_c_25__n AHIGH_c[25] + Net sm_amiga_2__n SM_AMIGA[2] + Net ahigh_25__n AHIGH[25] + Net pos_clk_cycle_dma_5_0__n pos_clk.CYCLE_DMA_5[0] + Net ahigh_c_26__n AHIGH_c[26] + Net pos_clk_cycle_dma_5_1__n pos_clk.CYCLE_DMA_5[1] + Net ahigh_26__n AHIGH[26] + Net pos_clk_clk_030_pe_4_0__n pos_clk.CLK_030_PE_4[0] + Net ahigh_c_27__n AHIGH_c[27] + Net pos_clk_clk_030_pe_4_1__n pos_clk.CLK_030_PE_4[1] + Net ahigh_27__n AHIGH[27] + Net ahigh_c_28__n AHIGH_c[28] + Net ahigh_28__n AHIGH[28] Net ahigh_c_29__n AHIGH_c[29] - Net pos_clk_ds_000_dma_4_0_n pos_clk.DS_000_DMA_4_0 Net ahigh_29__n AHIGH[29] Net ahigh_c_30__n AHIGH_c[30] - Net pos_clk_rw_000_dma_3_0_n pos_clk.RW_000_DMA_3_0 - Net rst_dly_0__n RST_DLY[0] Net ahigh_30__n AHIGH[30] - Net rst_dly_1__n RST_DLY[1] Net ahigh_c_31__n AHIGH_c[31] - Net rst_dly_2__n RST_DLY[2] - Net pos_clk_a0_dma_3_n pos_clk.A0_DMA_3 - Net pos_clk_rw_000_dma_3_n pos_clk.RW_000_DMA_3 - Net sm_amiga_5__n SM_AMIGA[5] - Net sm_amiga_3__n SM_AMIGA[3] - Net sm_amiga_2__n SM_AMIGA[2] - Net pos_clk_ds_000_dma_4_n pos_clk.DS_000_DMA_4 + Net pos_clk_rw_000_int_5_0_n pos_clk.RW_000_INT_5_0 + Net clk_000_d_i_3__n CLK_000_D_i[3] + Net ipl_c_i_1__n IPL_c_i[1] + Net ipl_c_i_0__n IPL_c_i[0] + Net sm_amiga_i_7__n SM_AMIGA_i[7] + Net pos_clk_un10_sm_amiga_i_1_n pos_clk.un10_sm_amiga_i_1 Net a_decode_c_16__n A_DECODE_c[16] Net a_decode_16__n A_DECODE[16] Net a_decode_c_17__n A_DECODE_c[17] - Net pos_clk_un9_bg_030_0_n pos_clk.un9_bg_030_0 Net a_decode_17__n A_DECODE[17] Net a_decode_c_18__n A_DECODE_c[18] Net a_decode_18__n A_DECODE[18] @@ -475,7 +504,6 @@ Design 'BUS68030' created Wed Oct 26 22:26:25 2016 Net a_decode_19__n A_DECODE[19] Net a_decode_c_20__n A_DECODE_c[20] Net a_decode_20__n A_DECODE[20] - Net pos_clk_un10_sm_amiga_i_1_n pos_clk.un10_sm_amiga_i_1 Net a_decode_c_21__n A_DECODE_c[21] Net a_decode_21__n A_DECODE[21] Net a_decode_c_22__n A_DECODE_c[22] @@ -484,136 +512,161 @@ Design 'BUS68030' created Wed Oct 26 22:26:25 2016 Net a_c_0__n A_c[0] Net a_0__n A[0] Net a_c_1__n A_c[1] - Net sm_amiga_i_7__n SM_AMIGA_i[7] - Net pos_clk_size_dma_6_0__n pos_clk.SIZE_DMA_6[0] + Net pos_clk_as_000_dma6_1_n pos_clk.as_000_dma6_1 + Net pos_clk_as_000_dma6_2_n pos_clk.as_000_dma6_2 + Net pos_clk_un4_rw_000_1_n pos_clk.un4_rw_000_1 + Net pos_clk_un4_rw_000_2_n pos_clk.un4_rw_000_2 + Net pos_clk_un13_clk_out_int_1_n pos_clk.un13_clk_out_int_1 + Net pos_clk_un29_clk_000_ne_1_1_n pos_clk.un29_clk_000_ne_1_1 + Net pos_clk_un29_clk_000_ne_1_2_n pos_clk.un29_clk_000_ne_1_2 + Net pos_clk_un29_clk_000_ne_1_3_n pos_clk.un29_clk_000_ne_1_3 + Net pos_clk_a0_dma_3_n pos_clk.A0_DMA_3 + Net pos_clk_un6_bg_030_1_n pos_clk.un6_bg_030_1 Net pos_clk_size_dma_6_1__n pos_clk.SIZE_DMA_6[1] - Net pos_clk_un21_bgack_030_int_i_0_n pos_clk.un21_bgack_030_int_i_0 - Net pos_clk_un21_bgack_030_int_i_0_0_1_n pos_clk.un21_bgack_030_int_i_0_0_1 - Net pos_clk_un21_bgack_030_int_i_0_0_2_n pos_clk.un21_bgack_030_int_i_0_0_2 + Net pos_clk_size_dma_6_0__n pos_clk.SIZE_DMA_6[0] + Net pos_clk_rw_000_dma_3_n pos_clk.RW_000_DMA_3 + Net pos_clk_amiga_bus_enable_dma_low_3_n pos_clk.AMIGA_BUS_ENABLE_DMA_LOW_3 + Net pos_clk_amiga_bus_enable_dma_high_3_n pos_clk.AMIGA_BUS_ENABLE_DMA_HIGH_3 Net ipl_030_c_0__n IPL_030_c[0] Net ipl_030_0__n IPL_030[0] + Net pos_clk_un5_bgack_030_int_d_n pos_clk.un5_bgack_030_int_d Net ipl_030_c_1__n IPL_030_c[1] Net ipl_030_1__n IPL_030[1] Net ipl_030_c_2__n IPL_030_c[2] + Net pos_clk_ipl_1_n pos_clk.ipl_1 + Net bg_000_0_un3_n BG_000_0.un3 Net ipl_c_0__n IPL_c[0] + Net bg_000_0_un1_n BG_000_0.un1 Net ipl_0__n IPL[0] + Net bg_000_0_un0_n BG_000_0.un0 Net ipl_c_1__n IPL_c[1] - Net ipl_1__n IPL[1] - Net ipl_c_2__n IPL_c[2] - Net cpu_est_0_3__un3_n cpu_est_0_3_.un3 - Net cpu_est_0_3__un1_n cpu_est_0_3_.un1 - Net cpu_est_0_3__un0_n cpu_est_0_3_.un0 - Net rw_000_int_0_un3_n RW_000_INT_0.un3 - Net rw_000_int_0_un1_n RW_000_INT_0.un1 - Net fc_c_0__n FC_c[0] - Net rw_000_int_0_un0_n RW_000_INT_0.un0 - Net fc_0__n FC[0] - Net vma_int_0_un3_n VMA_INT_0.un3 - Net fc_c_1__n FC_c[1] - Net vma_int_0_un1_n VMA_INT_0.un1 - Net vma_int_0_un0_n VMA_INT_0.un0 - Net cpu_est_0_1__un3_n cpu_est_0_1_.un3 - Net cpu_est_0_1__un1_n cpu_est_0_1_.un1 - Net cpu_est_0_1__un0_n cpu_est_0_1_.un0 - Net cpu_est_0_2__un3_n cpu_est_0_2_.un3 - Net cpu_est_0_2__un1_n cpu_est_0_2_.un1 - Net cpu_est_0_2__un0_n cpu_est_0_2_.un0 Net uds_000_int_0_un3_n UDS_000_INT_0.un3 + Net pos_clk_un3_clk_out_int_n pos_clk.un3_clk_out_int + Net ipl_1__n IPL[1] Net uds_000_int_0_un1_n UDS_000_INT_0.un1 + Net ipl_c_2__n IPL_c[2] Net uds_000_int_0_un0_n UDS_000_INT_0.un0 + Net pos_clk_as_000_dma6_n pos_clk.as_000_dma6 Net lds_000_int_0_un3_n LDS_000_INT_0.un3 Net lds_000_int_0_un1_n LDS_000_INT_0.un1 Net lds_000_int_0_un0_n LDS_000_INT_0.un0 - Net bgack_030_int_0_un3_n BGACK_030_INT_0.un3 - Net bgack_030_int_0_un1_n BGACK_030_INT_0.un1 - Net bgack_030_int_0_un0_n BGACK_030_INT_0.un0 Net ds_000_enable_0_un3_n DS_000_ENABLE_0.un3 Net ds_000_enable_0_un1_n DS_000_ENABLE_0.un1 + Net un1_cycle_dma_2__n un1_CYCLE_DMA[2] Net ds_000_enable_0_un0_n DS_000_ENABLE_0.un0 - Net size_dma_0_0__un3_n SIZE_DMA_0_0_.un3 - Net size_dma_0_0__un1_n SIZE_DMA_0_0_.un1 - Net size_dma_0_0__un0_n SIZE_DMA_0_0_.un0 + Net ipl_030_0_2__un3_n IPL_030_0_2_.un3 + Net pos_clk_un13_bgack_030_int_n pos_clk.un13_bgack_030_int + Net ipl_030_0_2__un1_n IPL_030_0_2_.un1 + Net ipl_030_0_2__un0_n IPL_030_0_2_.un0 + Net pos_clk_un13_clk_out_int_n pos_clk.un13_clk_out_int + Net vma_int_0_un3_n VMA_INT_0.un3 + Net pos_clk_un15_bgack_030_int_n pos_clk.un15_bgack_030_int + Net vma_int_0_un1_n VMA_INT_0.un1 + Net pos_clk_un3_n pos_clk.un3 + Net vma_int_0_un0_n VMA_INT_0.un0 + Net pos_clk_un12_clk_out_int_n pos_clk.un12_clk_out_int + Net cpu_est_0_1__un3_n cpu_est_0_1_.un3 + Net pos_clk_un1_bgack_030_int_n pos_clk.un1_bgack_030_int + Net cpu_est_0_1__un1_n cpu_est_0_1_.un1 + Net cpu_est_0_1__un0_n cpu_est_0_1_.un0 + Net fc_c_0__n FC_c[0] + Net cpu_est_0_2__un3_n cpu_est_0_2_.un3 + Net un1_cycle_dma_1__n un1_CYCLE_DMA[1] + Net fc_0__n FC[0] + Net cpu_est_0_2__un1_n cpu_est_0_2_.un1 + Net un1_clk_030_pe_1_1__n un1_CLK_030_PE_1[1] + Net fc_c_1__n FC_c[1] + Net cpu_est_0_2__un0_n cpu_est_0_2_.un0 + Net un1_clk_030_pe_1_2__n un1_CLK_030_PE_1[2] + Net cpu_est_0_3__un3_n cpu_est_0_3_.un3 + Net pos_clk_un4_rw_000_n pos_clk.un4_rw_000 + Net cpu_est_0_3__un1_n cpu_est_0_3_.un1 + Net cpu_est_0_3__un0_n cpu_est_0_3_.un0 Net pos_clk_un6_bgack_000_n pos_clk.un6_bgack_000 + Net pos_clk_un31_clk_000_ne_1_i_m2_un3_n pos_clk.un31_clk_000_ne_1_i_m2.un3 + Net pos_clk_un4_bgack_000_n pos_clk.un4_bgack_000 + Net pos_clk_un31_clk_000_ne_1_i_m2_un1_n pos_clk.un31_clk_000_ne_1_i_m2.un1 + Net pos_clk_un31_clk_000_ne_1_i_m2_un0_n pos_clk.un31_clk_000_ne_1_i_m2.un0 + Net bgack_030_int_0_un3_n BGACK_030_INT_0.un3 + Net bgack_030_int_0_un1_n BGACK_030_INT_0.un1 + Net pos_clk_un6_bg_030_i_n pos_clk.un6_bg_030_i + Net bgack_030_int_0_un0_n BGACK_030_INT_0.un0 + Net pos_clk_un9_bg_030_0_n pos_clk.un9_bg_030_0 + Net ds_000_dma_0_un3_n DS_000_DMA_0.un3 + Net ds_000_dma_0_un1_n DS_000_DMA_0.un1 + Net pos_clk_un29_clk_000_ne_1_n pos_clk.un29_clk_000_ne_1 + Net ds_000_dma_0_un0_n DS_000_DMA_0.un0 + Net as_000_dma_0_un3_n AS_000_DMA_0.un3 + Net as_000_dma_0_un1_n AS_000_DMA_0.un1 + Net as_000_dma_0_un0_n AS_000_DMA_0.un0 Net size_dma_0_1__un3_n SIZE_DMA_0_1_.un3 Net size_dma_0_1__un1_n SIZE_DMA_0_1_.un1 Net size_dma_0_1__un0_n SIZE_DMA_0_1_.un0 + Net size_dma_0_0__un3_n SIZE_DMA_0_0_.un3 + Net size_dma_0_0__un1_n SIZE_DMA_0_0_.un1 + Net pos_clk_un31_clk_000_ne_n pos_clk.un31_clk_000_ne + Net ipl_c_i_2__n IPL_c_i[2] + Net size_dma_0_0__un0_n SIZE_DMA_0_0_.un0 + Net amiga_bus_enable_dma_high_0_un3_n AMIGA_BUS_ENABLE_DMA_HIGH_0.un3 + Net pos_clk_un9_clk_000_pe_n pos_clk.un9_clk_000_pe + Net amiga_bus_enable_dma_high_0_un1_n AMIGA_BUS_ENABLE_DMA_HIGH_0.un1 + Net cpu_est_2_1__n cpu_est_2[1] + Net amiga_bus_enable_dma_high_0_un0_n AMIGA_BUS_ENABLE_DMA_HIGH_0.un0 + Net cpu_est_2_2__n cpu_est_2[2] + Net a_c_i_0__n A_c_i[0] + Net amiga_bus_enable_dma_low_0_un3_n AMIGA_BUS_ENABLE_DMA_LOW_0.un3 + Net size_c_i_1__n SIZE_c_i[1] + Net amiga_bus_enable_dma_low_0_un1_n AMIGA_BUS_ENABLE_DMA_LOW_0.un1 + Net pos_clk_un10_sm_amiga_i_n pos_clk.un10_sm_amiga_i + Net amiga_bus_enable_dma_low_0_un0_n AMIGA_BUS_ENABLE_DMA_LOW_0.un0 + Net a0_dma_0_un3_n A0_DMA_0.un3 + Net a0_dma_0_un1_n A0_DMA_0.un1 + Net a0_dma_0_un0_n A0_DMA_0.un0 + Net rw_000_dma_0_un3_n RW_000_DMA_0.un3 + Net rw_000_dma_0_un1_n RW_000_DMA_0.un1 + Net rw_000_dma_0_un0_n RW_000_DMA_0.un0 Net ipl_030_0_0__un3_n IPL_030_0_0_.un3 Net ipl_030_0_0__un1_n IPL_030_0_0_.un1 Net ipl_030_0_0__un0_n IPL_030_0_0_.un0 Net ipl_030_0_1__un3_n IPL_030_0_1_.un3 Net ipl_030_0_1__un1_n IPL_030_0_1_.un1 Net ipl_030_0_1__un0_n IPL_030_0_1_.un0 - Net ipl_030_0_2__un3_n IPL_030_0_2_.un3 - Net ipl_030_0_2__un1_n IPL_030_0_2_.un1 - Net pos_clk_un9_clk_000_pe_n pos_clk.un9_clk_000_pe - Net ipl_030_0_2__un0_n IPL_030_0_2_.un0 - Net cpu_est_2_1__n cpu_est_2[1] - Net a0_dma_0_un3_n A0_DMA_0.un3 - Net cpu_est_2_2__n cpu_est_2[2] - Net a0_dma_0_un1_n A0_DMA_0.un1 - Net a0_dma_0_un0_n A0_DMA_0.un0 - Net amiga_bus_enable_dma_low_0_un3_n AMIGA_BUS_ENABLE_DMA_LOW_0.un3 - Net amiga_bus_enable_dma_low_0_un1_n AMIGA_BUS_ENABLE_DMA_LOW_0.un1 - Net amiga_bus_enable_dma_low_0_un0_n AMIGA_BUS_ENABLE_DMA_LOW_0.un0 - Net amiga_bus_enable_dma_high_0_un3_n AMIGA_BUS_ENABLE_DMA_HIGH_0.un3 - Net amiga_bus_enable_dma_high_0_un1_n AMIGA_BUS_ENABLE_DMA_HIGH_0.un1 - Net amiga_bus_enable_dma_high_0_un0_n AMIGA_BUS_ENABLE_DMA_HIGH_0.un0 - Net bg_000_0_un3_n BG_000_0.un3 - Net bg_000_0_un1_n BG_000_0.un1 - Net bg_000_0_un0_n BG_000_0.un0 - Net ds_000_dma_0_un3_n DS_000_DMA_0.un3 - Net ds_000_dma_0_un1_n DS_000_DMA_0.un1 - Net ds_000_dma_0_un0_n DS_000_DMA_0.un0 - Net as_000_dma_0_un3_n AS_000_DMA_0.un3 - Net cpu_est_2_0_2__n cpu_est_2_0[2] - Net as_000_dma_0_un1_n AS_000_DMA_0.un1 - Net as_000_dma_0_un0_n AS_000_DMA_0.un0 Net as_030_000_sync_0_un3_n AS_030_000_SYNC_0.un3 - Net cpu_est_2_0_1__n cpu_est_2_0[1] Net as_030_000_sync_0_un1_n AS_030_000_SYNC_0.un1 Net as_030_000_sync_0_un0_n AS_030_000_SYNC_0.un0 - Net rw_000_dma_0_un3_n RW_000_DMA_0.un3 - Net pos_clk_un9_clk_000_pe_0_n pos_clk.un9_clk_000_pe_0 - Net rw_000_dma_0_un1_n RW_000_DMA_0.un1 - Net rw_000_dma_0_un0_n RW_000_DMA_0.un0 + Net rw_000_int_0_un3_n RW_000_INT_0.un3 + Net rw_000_int_0_un1_n RW_000_INT_0.un1 + Net rw_000_int_0_un0_n RW_000_INT_0.un0 Net a_decode_15__n A_DECODE[15] Net a_decode_14__n A_DECODE[14] Net a_decode_13__n A_DECODE[13] - Net cpu_est_i_2__n cpu_est_i[2] Net a_decode_12__n A_DECODE[12] - Net cpu_est_i_0__n cpu_est_i[0] + Net pos_clk_un9_bg_030_n pos_clk.un9_bg_030 + Net cpu_est_2_0_2__n cpu_est_2_0[2] Net a_decode_11__n A_DECODE[11] - Net cpu_est_i_3__n cpu_est_i[3] Net a_decode_10__n A_DECODE[10] - Net sm_amiga_i_i_7__n SM_AMIGA_i_i[7] - Net sm_amiga_i_5__n SM_AMIGA_i[5] + Net sm_amiga_i_2__n SM_AMIGA_i[2] + Net cpu_est_2_0_1__n cpu_est_2_0[1] + Net sm_amiga_i_1__n SM_AMIGA_i[1] Net a_decode_9__n A_DECODE[9] Net sm_amiga_i_3__n SM_AMIGA_i[3] - Net cpu_est_i_1__n cpu_est_i[1] - Net a_decode_8__n A_DECODE[8] - Net clk_000_d_i_1__n CLK_000_D_i[1] - Net a_c_i_0__n A_c_i[0] - Net size_c_i_1__n SIZE_c_i[1] - Net a_decode_7__n A_DECODE[7] Net sm_amiga_i_4__n SM_AMIGA_i[4] - Net pos_clk_un10_sm_amiga_i_n pos_clk.un10_sm_amiga_i - Net sm_amiga_i_2__n SM_AMIGA_i[2] - Net a_decode_6__n A_DECODE[6] - Net rst_dly_i_0__n RST_DLY_i[0] - Net pos_clk_un6_bgack_000_0_n pos_clk.un6_bgack_000_0 - Net rst_dly_i_2__n RST_DLY_i[2] - Net a_decode_5__n A_DECODE[5] - Net a_decode_i_19__n A_DECODE_i[19] - Net a_decode_i_18__n A_DECODE_i[18] - Net a_decode_4__n A_DECODE[4] - Net a_decode_i_16__n A_DECODE_i[16] - Net a_decode_3__n A_DECODE[3] - Net sm_amiga_i_0__n SM_AMIGA_i[0] - Net a_decode_2__n A_DECODE[2] - Net clk_000_d_i_0__n CLK_000_D_i[0] + Net pos_clk_un9_clk_000_pe_0_n pos_clk.un9_clk_000_pe_0 + Net a_decode_8__n A_DECODE[8] Net sm_amiga_i_6__n SM_AMIGA_i[6] - Net sm_amiga_i_1__n SM_AMIGA_i[1] - Net rst_dly_i_1__n RST_DLY_i[1] + Net sm_amiga_i_5__n SM_AMIGA_i[5] + Net a_decode_7__n A_DECODE[7] + Net clk_000_d_i_0__n CLK_000_D_i[0] + Net a_decode_6__n A_DECODE[6] + Net sm_amiga_i_i_7__n SM_AMIGA_i_i[7] + Net a_decode_5__n A_DECODE[5] + Net cpu_est_i_2__n cpu_est_i[2] + Net pos_clk_un31_clk_000_ne_i_n pos_clk.un31_clk_000_ne_i + Net cpu_est_i_0__n cpu_est_i[0] + Net a_decode_4__n A_DECODE[4] + Net cpu_est_i_3__n cpu_est_i[3] + Net cpu_est_i_1__n cpu_est_i[1] + Net a_decode_3__n A_DECODE[3] End Section Type Name // ---------------------------------------------------------------------- @@ -627,9 +680,9 @@ Section Type Name Input CLK_000 Input CLK_OSZI Input FPU_SENSE - Input DTACK Input VPA Input RST + Input RESET Input A_DECODE_22_ Input A_DECODE_21_ Input A_DECODE_20_ @@ -666,7 +719,6 @@ Section Type Name Output AVEC Output E Output VMA - Output RESET Output AMIGA_ADDR_ENABLE Output AMIGA_BUS_DATA_DIR Output AMIGA_BUS_ENABLE_LOW @@ -682,6 +734,7 @@ Section Type Name Bidi UDS_000 Bidi LDS_000 Bidi BERR + Bidi DTACK Bidi RW Bidi SIZE_0_ Bidi AHIGH_30_ diff --git a/Logic/bus68030.srf b/Logic/bus68030.srf index 3646771..9617cc4 100644 --- a/Logic/bus68030.srf +++ b/Logic/bus68030.srf @@ -6,7 +6,7 @@ #Implementation: logic $ Start of Compile -#Wed Oct 26 22:26:19 2016 +#Fri Nov 18 19:32:29 2016 Synopsys VHDL Compiler, version comp201403rcp1, Build 060R, built May 27 2014 @N|Running in 64-bit mode @@ -20,16 +20,18 @@ File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vh @N: CD630 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral @N: CD233 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":70:10:70:11|Using sequential encoding for type sm_e @N: CD233 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":87:14:87:15|Using sequential encoding for type sm_68000 -@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":128:7:128:17|Signal clk_out_pre is undriven +@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":129:7:129:17|Signal clk_out_pre is undriven +@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:7:133:15|Signal clk_030_h is undriven Post processing for work.bus68030.behavioral -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register DS_030_D0_3 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register nEXP_SPACE_D0_3 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register BGACK_030_INT_PRE_2 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":130:34:130:36|Pruning register CLK_OUT_EXP_INT_1 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":126:36:126:38|Pruning register CLK_OUT_PRE_25_3 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":154:2:154:3|Pruning register CLK_030_D0_2 -@W: CL271 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... -@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Trying to extract state machine for register SM_AMIGA +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register AS_000_D0_3 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register DS_030_D0_3 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register nEXP_SPACE_D0_3 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register BGACK_030_INT_PRE_2 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:34:131:36|Pruning register CLK_OUT_EXP_INT_1 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":127:36:127:38|Pruning register CLK_OUT_PRE_25_3 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":156:2:156:3|Pruning register CLK_030_D0_2 +@W: CL271 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... +@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Trying to extract state machine for register SM_AMIGA Extracted state machine for register SM_AMIGA State machine has 8 reachable states with original encodings of: 000 @@ -40,14 +42,14 @@ State machine has 8 reachable states with original encodings of: 101 110 111 -@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Trying to extract state machine for register cpu_est +@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Trying to extract state machine for register cpu_est @W: CL246 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":24:1:24:8|Input port bits 15 to 2 of a_decode(23 downto 2) are unused @END At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 70MB peak: 71MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Wed Oct 26 22:26:19 2016 +# Fri Nov 18 19:32:29 2016 ###########################################################] Synopsys Netlist Linker, version comp201403rcp1, Build 060R, built May 27 2014 @@ -57,6 +59,6 @@ File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\synwork\BUS68030_c At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Wed Oct 26 22:26:20 2016 +# Fri Nov 18 19:32:31 2016 ###########################################################] diff --git a/Logic/dm/BUS68030_comp.xdm b/Logic/dm/BUS68030_comp.xdm index 4faa0ad..88e9350 100644 --- a/Logic/dm/BUS68030_comp.xdm +++ b/Logic/dm/BUS68030_comp.xdm @@ -27,8 +27,8 @@ SRSqS SRSqSSqSSqSS +/>SqSSqSS S SR"/ /S<7>CV diff --git a/Logic/run_options.txt b/Logic/run_options.txt index 292cffe..9a62b56 100644 --- a/Logic/run_options.txt +++ b/Logic/run_options.txt @@ -1,7 +1,7 @@ #-- Synopsys, Inc. #-- Version I-2014.03LC #-- Project file C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\run_options.txt -#-- Written on Wed Oct 26 22:26:19 2016 +#-- Written on Fri Nov 18 19:32:29 2016 #project files diff --git a/Logic/synlog/BUS68030_multi_srs_gen.srr b/Logic/synlog/BUS68030_multi_srs_gen.srr index edeb513..6d3db1a 100644 --- a/Logic/synlog/BUS68030_multi_srs_gen.srr +++ b/Logic/synlog/BUS68030_multi_srs_gen.srr @@ -5,6 +5,6 @@ File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\synwork\BUS68030_c At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Wed Oct 26 22:26:20 2016 +# Fri Nov 18 19:32:31 2016 ###########################################################] diff --git a/Logic/synlog/bus68030_fpga_mapper.srr b/Logic/synlog/bus68030_fpga_mapper.srr index e35d702..2150646 100644 --- a/Logic/synlog/bus68030_fpga_mapper.srr +++ b/Logic/synlog/bus68030_fpga_mapper.srr @@ -2,7 +2,7 @@ Synopsys CPLD Technology Mapper, Version maplat, Build 923R, Built May 6 2014 Copyright (C) 1994-2013, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use or distribution of the software is strictly prohibited. Product Version I-2014.03LC @N: MF248 |Running in 64-bit mode. -@N:"c:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Found counter in view:work.BUS68030(behavioral) inst RST_DLY[2:0] +@N:"c:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Found counter in view:work.BUS68030(behavioral) inst RST_DLY[2:0] Encoding state machine SM_AMIGA[0:7] (view:work.BUS68030(behavioral)) original code -> new code 000 -> 00000000 @@ -17,15 +17,15 @@ original code -> new code Resource Usage Report Simple gate primitives: -DFF 55 uses -BI_DIR 18 uses -BUFTH 4 uses +DFF 57 uses +BI_DIR 19 uses +BUFTH 3 uses IBUF 38 uses OBUF 15 uses -AND2 269 uses -INV 238 uses -OR2 22 uses -XOR2 5 uses +AND2 277 uses +INV 236 uses +OR2 23 uses +XOR2 8 uses @N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis. @@ -35,6 +35,6 @@ Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 39MB peak: 105MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Wed Oct 26 22:26:20 2016 +# Fri Nov 18 19:32:31 2016 ###########################################################] diff --git a/Logic/synlog/report/BUS68030_compiler_errors.txt b/Logic/synlog/report/BUS68030_compiler_errors.txt index 1f3e09b..250fda3 100644 --- a/Logic/synlog/report/BUS68030_compiler_errors.txt +++ b/Logic/synlog/report/BUS68030_compiler_errors.txt @@ -1,3 +1,3 @@ -@E: CD371 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":176:6:176:38|No matching overload for "and" -@E: CD676 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":176:6:176:38|Can't implement expression (no function signature?) +@E: CG119 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":428:6:428:9|Expecting closing ) +@E|Parse errors encountered - exiting diff --git a/Logic/synlog/report/BUS68030_compiler_notes.txt b/Logic/synlog/report/BUS68030_compiler_notes.txt index 43ee351..0cd435d 100644 --- a/Logic/synlog/report/BUS68030_compiler_notes.txt +++ b/Logic/synlog/report/BUS68030_compiler_notes.txt @@ -4,6 +4,6 @@ @N: CD630 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral @N: CD233 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":70:10:70:11|Using sequential encoding for type sm_e @N: CD233 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":87:14:87:15|Using sequential encoding for type sm_68000 -@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Trying to extract state machine for register SM_AMIGA -@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Trying to extract state machine for register cpu_est +@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Trying to extract state machine for register SM_AMIGA +@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Trying to extract state machine for register cpu_est diff --git a/Logic/synlog/report/BUS68030_compiler_runstatus.xml b/Logic/synlog/report/BUS68030_compiler_runstatus.xml index f803778..5a8289a 100644 --- a/Logic/synlog/report/BUS68030_compiler_runstatus.xml +++ b/Logic/synlog/report/BUS68030_compiler_runstatus.xml @@ -18,7 +18,7 @@ The file contains the job information from compiler to be displayed as part of t C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\synlog\report\BUS68030_compiler_notes.txt - 9 + 11 C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\synlog\report\BUS68030_compiler_warnings.txt @@ -35,7 +35,7 @@ The file contains the job information from compiler to be displayed as part of t - - 1477513579 + 1479493949 \ No newline at end of file diff --git a/Logic/synlog/report/BUS68030_compiler_warnings.txt b/Logic/synlog/report/BUS68030_compiler_warnings.txt index 9eba205..d0f3b27 100644 --- a/Logic/synlog/report/BUS68030_compiler_warnings.txt +++ b/Logic/synlog/report/BUS68030_compiler_warnings.txt @@ -1,10 +1,12 @@ -@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":128:7:128:17|Signal clk_out_pre is undriven -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register DS_030_D0_3 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register nEXP_SPACE_D0_3 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register BGACK_030_INT_PRE_2 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":130:34:130:36|Pruning register CLK_OUT_EXP_INT_1 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":126:36:126:38|Pruning register CLK_OUT_PRE_25_3 -@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":154:2:154:3|Pruning register CLK_030_D0_2 -@W: CL271 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... +@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":129:7:129:17|Signal clk_out_pre is undriven +@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:7:133:15|Signal clk_030_h is undriven +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register AS_000_D0_3 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register DS_030_D0_3 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register nEXP_SPACE_D0_3 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register BGACK_030_INT_PRE_2 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:34:131:36|Pruning register CLK_OUT_EXP_INT_1 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":127:36:127:38|Pruning register CLK_OUT_PRE_25_3 +@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":156:2:156:3|Pruning register CLK_030_D0_2 +@W: CL271 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... @W: CL246 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":24:1:24:8|Input port bits 15 to 2 of a_decode(23 downto 2) are unused diff --git a/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml b/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml index 6d5f397..0ee4b71 100644 --- a/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml +++ b/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml @@ -40,7 +40,7 @@ The file contains the job information from mapper to be displayed as part of the 105MB -1477513580 +1479493951 diff --git a/Logic/syntmp/BUS68030_srr.htm b/Logic/syntmp/BUS68030_srr.htm index 0cf7a80..226641d 100644 --- a/Logic/syntmp/BUS68030_srr.htm +++ b/Logic/syntmp/BUS68030_srr.htm @@ -1,5 +1,5 @@ 
-
+
 #Build: Synplify Pro I-2014.03LC , Build 063R, May 27 2014
 #install: E:\ispLEVER_Classic2_0\synpbase
 #OS: Windows 7 6.2
@@ -8,30 +8,32 @@
 #Implementation: logic
 
 $ Start of Compile
-#Wed Oct 26 22:26:19 2016
+#Fri Nov 18 19:32:29 2016
 
 Synopsys VHDL Compiler, version comp201403rcp1, Build 060R, built May 27 2014
-@N: :  | Running in 64-bit mode 
+@N: :  | Running in 64-bit mode 
 Copyright (C) 1994-2014 Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc.  All other use, reproduction, or distribution of this software is strictly prohibited.
 
-@N:CD720 : std.vhd(123) | Setting time resolution to ns
-@N: : 68030-68000-bus.vhd(13) | Top entity is set to BUS68030.
+@N:CD720 : std.vhd(123) | Setting time resolution to ns
+@N: : 68030-68000-bus.vhd(13) | Top entity is set to BUS68030.
 File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd changed - recompiling
 VHDL syntax check successful!
 File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd changed - recompiling
-@N:CD630 : 68030-68000-bus.vhd(13) | Synthesizing work.bus68030.behavioral 
-@N:CD233 : 68030-68000-bus.vhd(70) | Using sequential encoding for type sm_e
-@N:CD233 : 68030-68000-bus.vhd(87) | Using sequential encoding for type sm_68000
-@W:CD638 : 68030-68000-bus.vhd(128) | Signal clk_out_pre is undriven 
+@N:CD630 : 68030-68000-bus.vhd(13) | Synthesizing work.bus68030.behavioral 
+@N:CD233 : 68030-68000-bus.vhd(70) | Using sequential encoding for type sm_e
+@N:CD233 : 68030-68000-bus.vhd(87) | Using sequential encoding for type sm_68000
+@W:CD638 : 68030-68000-bus.vhd(129) | Signal clk_out_pre is undriven 
+@W:CD638 : 68030-68000-bus.vhd(133) | Signal clk_030_h is undriven 
 Post processing for work.bus68030.behavioral
-@W:CL169 : 68030-68000-bus.vhd(131) | Pruning register DS_030_D0_3  
-@W:CL169 : 68030-68000-bus.vhd(131) | Pruning register nEXP_SPACE_D0_3  
-@W:CL169 : 68030-68000-bus.vhd(131) | Pruning register BGACK_030_INT_PRE_2  
-@W:CL169 : 68030-68000-bus.vhd(130) | Pruning register CLK_OUT_EXP_INT_1  
-@W:CL169 : 68030-68000-bus.vhd(126) | Pruning register CLK_OUT_PRE_25_3  
-@W:CL169 : 68030-68000-bus.vhd(154) | Pruning register CLK_030_D0_2  
-@W:CL271 : 68030-68000-bus.vhd(131) | Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... 
-@N:CL201 : 68030-68000-bus.vhd(131) | Trying to extract state machine for register SM_AMIGA
+@W:CL169 : 68030-68000-bus.vhd(132) | Pruning register AS_000_D0_3  
+@W:CL169 : 68030-68000-bus.vhd(132) | Pruning register DS_030_D0_3  
+@W:CL169 : 68030-68000-bus.vhd(132) | Pruning register nEXP_SPACE_D0_3  
+@W:CL169 : 68030-68000-bus.vhd(132) | Pruning register BGACK_030_INT_PRE_2  
+@W:CL169 : 68030-68000-bus.vhd(131) | Pruning register CLK_OUT_EXP_INT_1  
+@W:CL169 : 68030-68000-bus.vhd(127) | Pruning register CLK_OUT_PRE_25_3  
+@W:CL169 : 68030-68000-bus.vhd(156) | Pruning register CLK_030_D0_2  
+@W:CL271 : 68030-68000-bus.vhd(132) | Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... 
+@N:CL201 : 68030-68000-bus.vhd(132) | Trying to extract state machine for register SM_AMIGA
 Extracted state machine for register SM_AMIGA
 State machine has 8 reachable states with original encodings of:
    000
@@ -42,24 +44,24 @@ State machine has 8 reachable states with original encodings of:
    101
    110
    111
-@N:CL201 : 68030-68000-bus.vhd(131) | Trying to extract state machine for register cpu_est
-@W:CL246 : 68030-68000-bus.vhd(24) | Input port bits 15 to 2 of a_decode(23 downto 2) are unused 
+@N:CL201 : 68030-68000-bus.vhd(132) | Trying to extract state machine for register cpu_est
+@W:CL246 : 68030-68000-bus.vhd(24) | Input port bits 15 to 2 of a_decode(23 downto 2) are unused 
 @END
 
 At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 70MB peak: 71MB)
 
 Process took 0h:00m:01s realtime, 0h:00m:01s cputime
-# Wed Oct 26 22:26:19 2016
+# Fri Nov 18 19:32:29 2016
 
 ###########################################################]
 Synopsys Netlist Linker, version comp201403rcp1, Build 060R, built May 27 2014
-@N: :  | Running in 64-bit mode 
+@N: :  | Running in 64-bit mode 
 File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\synwork\BUS68030_comp.srs changed - recompiling
 
 At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)
 
 Process took 0h:00m:01s realtime, 0h:00m:01s cputime
-# Wed Oct 26 22:26:20 2016
+# Fri Nov 18 19:32:31 2016
 
 ###########################################################]
 Map & Optimize Report
@@ -67,8 +69,8 @@ Map & Optimize Report
 Synopsys CPLD Technology Mapper, Version maplat, Build 923R, Built May  6 2014
 Copyright (C) 1994-2013, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc.  All other use or distribution of the software is strictly prohibited.
 Product Version I-2014.03LC 
-@N:MF248 :  | Running in 64-bit mode. 
-@N: : 68030-68000-bus.vhd(131) | Found counter in view:work.BUS68030(behavioral) inst RST_DLY[2:0]
+@N:MF248 :  | Running in 64-bit mode. 
+@N: : 68030-68000-bus.vhd(132) | Found counter in view:work.BUS68030(behavioral) inst RST_DLY[2:0]
 Encoding state machine SM_AMIGA[0:7] (view:work.BUS68030(behavioral))
 original code -> new code
    000 -> 00000000
@@ -83,25 +85,25 @@ original code -> new code
 Resource Usage Report
 
 Simple gate primitives:
-DFF             55 uses
-BI_DIR          18 uses
-BUFTH           4 uses
+DFF             57 uses
+BI_DIR          19 uses
+BUFTH           3 uses
 IBUF            38 uses
 OBUF            15 uses
-AND2            269 uses
-INV             238 uses
-OR2             22 uses
-XOR2            5 uses
+AND2            277 uses
+INV             236 uses
+OR2             23 uses
+XOR2            8 uses
 
 
-@N:FC100 :  | Timing Report not generated for this device, please use place and route tools for timing analysis. 
+@N:FC100 :  | Timing Report not generated for this device, please use place and route tools for timing analysis. 
 I-2014.03LC 
 Mapper successful!
 
 At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 39MB peak: 105MB)
 
 Process took 0h:00m:01s realtime, 0h:00m:01s cputime
-# Wed Oct 26 22:26:20 2016
+# Fri Nov 18 19:32:31 2016
 
 ###########################################################]
 
diff --git a/Logic/syntmp/BUS68030_toc.htm b/Logic/syntmp/BUS68030_toc.htm
index 6f4d56f..a55eb31 100644
--- a/Logic/syntmp/BUS68030_toc.htm
+++ b/Logic/syntmp/BUS68030_toc.htm
@@ -16,7 +16,7 @@
 
  • Mapper Report  
 
    • 
-
  • Session Log (22:25 26-Oct)  
+
  • Session Log (19:32 18-Nov)  
 
      •          
         
    
diff --git a/Logic/syntmp/run_option.xml b/Logic/syntmp/run_option.xml
index 04785e8..6336888 100644
--- a/Logic/syntmp/run_option.xml
+++ b/Logic/syntmp/run_option.xml
@@ -3,7 +3,7 @@
   Synopsys, Inc.
   Version I-2014.03LC 
   Project file C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\syntmp\run_option.xml
-  Written on Wed Oct 26 22:26:19 2016
+  Written on Fri Nov 18 19:32:29 2016
 
 
 --> 
diff --git a/Logic/syntmp/statusReport.html b/Logic/syntmp/statusReport.html
index fe60d89..a84036a 100644
--- a/Logic/syntmp/statusReport.html
+++ b/Logic/syntmp/statusReport.html
@@ -33,12 +33,12 @@
   
   Compile InputComplete
  8
- 9
+ 11
 0
 -
 0m:00s
 -
-26.10.2016
      22:26:19
+18.11.2016
      19:32:29
  
 
  
@@ -49,12 +49,12 @@
 0m:00s
 0m:00s
 105MB
-26.10.2016
      22:26:20
+18.11.2016
      19:32:31
  
 
 
   Multi-srs Generator
-  Complete0m:00s26.10.2016
      22:26:20 		
+  Complete0m:01s18.11.2016
      19:32:31 		
      
   
  
\ No newline at end of file
diff --git a/Logic/synwork/BUS68030_comp.fdep b/Logic/synwork/BUS68030_comp.fdep
index c08d0f5..74cf7b2 100644
--- a/Logic/synwork/BUS68030_comp.fdep
+++ b/Logic/synwork/BUS68030_comp.fdep
@@ -1,15 +1,15 @@
 #defaultlanguage:vhdl
 #OPTIONS:"|-top|BUS68030|-prodtype|synplify_pro|-nostructver|-dfltencoding|sequential|-encrypt|-pro|-lite|-ui|-fid2|-ram|-sharing|on|-ll|2000|-autosm|-ignore_undefined_lib|-lib|work"
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\bin64\\c_vhdl.exe":1401224104
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\location.map":1310457374
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\std.vhd":1401223722
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\snps_haps_pkg.vhd":1401223722
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\std1164.vhd":1401223722
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\numeric.vhd":1401223722
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\umr_capim.vhd":1401223968
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\arith.vhd":1401223722
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\unsigned.vhd":1401223722
-#CUR:"C:\\users\\matze\\amiga\\hardwarehacks\\68030-tk\\github\\logic\\68030-68000-bus.vhd":1477513553
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\bin64\\c_vhdl.exe":1401220504
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\location.map":1310453774
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\std.vhd":1401220122
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\snps_haps_pkg.vhd":1401220122
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\std1164.vhd":1401220122
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\numeric.vhd":1401220122
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\umr_capim.vhd":1401220368
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\arith.vhd":1401220122
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\unsigned.vhd":1401220122
+#CUR:"C:\\users\\matze\\amiga\\hardwarehacks\\68030-tk\\github\\logic\\68030-68000-bus.vhd":1479493940
 0 "C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd" vhdl
 
 # Dependency Lists (Uses list)
diff --git a/Logic/synwork/BUS68030_comp.fdeporig b/Logic/synwork/BUS68030_comp.fdeporig
index a561aee..b732480 100644
--- a/Logic/synwork/BUS68030_comp.fdeporig
+++ b/Logic/synwork/BUS68030_comp.fdeporig
@@ -1,15 +1,15 @@
 #defaultlanguage:vhdl
 #OPTIONS:"|-top|BUS68030|-prodtype|synplify_pro|-nostructver|-dfltencoding|sequential|-encrypt|-pro|-lite|-ui|-fid2|-ram|-sharing|on|-ll|2000|-autosm|-ignore_undefined_lib|-lib|work"
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\bin64\\c_vhdl.exe":1401224104
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\location.map":1310457374
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\std.vhd":1401223722
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\snps_haps_pkg.vhd":1401223722
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\std1164.vhd":1401223722
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\numeric.vhd":1401223722
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\umr_capim.vhd":1401223968
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\arith.vhd":1401223722
-#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\unsigned.vhd":1401223722
-#CUR:"C:\\users\\matze\\amiga\\hardwarehacks\\68030-tk\\github\\logic\\68030-68000-bus.vhd":1477513553
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\bin64\\c_vhdl.exe":1401220504
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\location.map":1310453774
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\std.vhd":1401220122
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\snps_haps_pkg.vhd":1401220122
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\std1164.vhd":1401220122
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\numeric.vhd":1401220122
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\umr_capim.vhd":1401220368
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\arith.vhd":1401220122
+#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\unsigned.vhd":1401220122
+#CUR:"C:\\users\\matze\\amiga\\hardwarehacks\\68030-tk\\github\\logic\\68030-68000-bus.vhd":1479493940
 0 "C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd" vhdl
 
 # Dependency Lists (Uses list)
diff --git a/Logic/synwork/BUS68030_comp.srs b/Logic/synwork/BUS68030_comp.srs
index 37915765728811045e2181c5fc5a46279e8b43f8..c56c2243139cb2bdbc6fdee1dc4626cf375a6eb0 100644
GIT binary patch
delta 9559
zcmV-dC8*k&VX$M6Gk6;DWU^{NwgEqRjM
z%)=jkC$}ARurW$7wuN-}dmc%5$4AoxTdTNN5{d!t2HiDS4)FN(^A&7O+hL}_DocGvBh*$9~l-9H_=>q*Qhf6IM0dBg%Vt-Y8_^|y5$$Fhdfe=DX
z=LYv22=_HQaHjNoZWVAX!PoS6&Ip{$NhA7JY0rHy5`sEwI*ZD4JAgO;2DW?vqniN=
z1-&C25<>`MCD%g19(_FtdSzQT$qS<;1}z7s1P*(P-YX5XJ*6F4tE^JN&~x%1>hP&)
zz!1>}xj9%xZhvJj0&ot-f<)&n7X7pv67X;AhA}M*PmU?E#scXK!f}!gQ5^+bE8h_0
zw=v>;u?W}Z36e89=*=?Sq-&tVUOnIQ&A0o@o9nyHY>d3=#`A}})mglZ$0%6yL#Iaf
za{D>WjFC3vfh^PIkC7}J5)nqCu12T6_q225%^1<79e+AMQO2ktpJUYH7?mi~F|xcJ
zBUf`9(u}5nW=!LlM0xLxqeZN=u`2JiR3&O9^9GB+DaO6AyV=q4_ThFjyVx*>uDiN;
zytvJ`4b=sTG>;hzmJ99_V+HC}#+b;TYS}E*4>j9Rp(be>pTyb!V@R1XLeR*Fsn`}R
z?})Wb;(zR9d3yRTmh*B!gWs0ueHTV|F0VO#x?Ob;pqELq$_|0j)Sgtbhd}kM%?0nU
zeFIyr&fWu~+Vk~6Txmzes{VG7TVheKTgO<-{ZC5eEmoW{s(u-|y5?d>i&N7@e#clv
z#`+=@T7}|ufxdAZ6}@|vIbCP#ZQ9i^pCeWwO$X|E|8=mfN$Z
z1Skgq36szZGy&$b84Ml)0SJ>g4Ko${8G8h|lHe_B`q)vB#Fv<^7UPm#zCrGzi#{_h$3QV-Wh$16y{c%gKGG
z^=`x7QODat9hz=E_9+M%-GzL&*njYz->p0se-9Hn{#8A`qbyudzVUawOMASmOMas+
zDeDruuK10*qO2?Ix-zdz94~>oBu>h@qlo*X#oQks=*jyq
zM-rNN#0z2;?mn?FqMR>A{`@fVld&f%ZFq-7WMjss!}ia^uubXKi(BK#=6@Y~=fuzk
zpprwKfZ|;
zTuQ0hif$hl@(q_al0E&%rdU2vF$$;0dfNt?YA>96UzH3mB(===Q|eGjpS!bRAezm%?7?
zF)p*0r<;tww)^~kpWU=y_%K`YyQke93p2`JvgH%+-@NjyeSgFE?SCPZ+}$moS`7Yk
zu5Rlt-$&>xg|S1wsR(4g7iZesv!9=F{@K&ZGJEAW{d?Zd+BbWi4PW@@{m--g{p9=4
zdfy#bSl|H(|IFIHL#9>C$9}-$vvio)AcReoxZD4zZ
zcvR2JuE+1!!=|z)R(;p)B}IF{tZ8+fB(Arj3!cGjq#UxB4Cg0d&0bnrzOPW*Rr?C0
z6r}mS4k=d^a8L5~hNe9}%-fp0WO{8#zBUBbM(DNqj+6mwV1GZWzmxlQS&x92QT1q9
z?>STRf9Bsa=uExqxk``(o5A=#Klt+Jcm6tESD%0W;IGRyzi+Mcc?yq8
zU^~?Y6V5H$t)_hcqs{(#w*UU*uWNgZBA*-7p^hG-`L39s{odGyAYKgp6X_+2S2cfA
zdKhn*=6^~TV}DlYlEb*%UxE88V1ErC>=hwMdEmojH)i3K^1b|__VvJ$F^)m)(fA-r
zc_ADDODzQG2Hj4VAA5{bC98P1NBit*UGiViul4;J=mEMO?xdoTHOgDy#o=_FL5D-D
zuNdbWrjRDqPZ);Lh^z%2SWpBD}y?kO8)eWv8tWZ2hxmIxO#ATWhf
z>=}W&Zx%Df2Wpo>vf#5fxXzoY&&>K;c0&RZ(}gxtX~}5QMyPaL;Ax#@D*?Kts
z?Y3y6yMLKu8{hVW>5o_bbA831+mgF{L)m=M<+H(?Z<+?5`BfYA6KA+qu-3f&e8nfO
z)H;p|AV^pwNsBq^wqFKnU2gbmzkPF`?T2mtvd{QW`kDXEH%h+KtfXO*fI1~I@wP++
z!sreoV+tBHvWaG#X_;l@jPw*`^awk$o!|41JAbz89ewOWLLc}W*coiLin=SGMgFX-
zo?E`6tD-g~3pQeGv>3G(jdEecR;xySww`fahkG{t(dR$Eww9-M=f0Eg4a)siNB!RA
ze}zFW3_h`F)|t>wqik4pN2~8$_6+pNvhN@PhwOQpDOuKMUzdhYqe&|`vO#Y?=)?Gn|Oa8nc5(##O99NzX
z&wB#)hN7LXKl@89FD9I-K4!-r59Y_mhcNP&tn)ksc5Ip}=**6$gRPR^KyqR$Mk!mN
z{6;zbyyjPKn@e0%i>A-gI)fohS-viluYb#v@l08#((WJa!Dz*D*&=x|RBK`6DcHHP
zkTr@=rSQi4>s%K9iXQNr4#>!$6|rdW@i+n-I6Uq^r#w=rdUPk#VQ
zpdey9(&Z7#R`yTWetzctj7{5(wu}Qq^+ZZRlZ#PY-A|AQ6}dAVp6>Op_y_k}ui0ON
zZWsbpN4-xo3RJDf;8KJ-U=t*65;BiGk@RE@@5ds=4{i&`oXusW;tWeWMAb!E&oARyIYi6
zpp2MEqfg<;v=a_?Vj=hpu}>(uuiM;x8-!d4qgTHBN}l908R#V&uBTup$x=3B2U4lY
zNUAwE+U-ww%RA0xclYDAJkHmaUlZWJVxA7jTnEenz`%~0C)7(BY@Fg$i{Px(gt`hOcHTCB&Eopy0fi1!QIuNf;_vI%_-H=mfjt{`v0PP%!TqV2zw
z{C>Cws7rq>n`}7%q$Q9pkS=ZcvvB!r{)X>@9uGG?TlTmpTjzY&1Kr&_CpSvkkEKXl
zFGl9aK3-UL-}dd?uCA|-wKh$BYVj6mz!WukiT?}UQvS(^=6`xUZ_BCh7sy>F2L5tf
z2{fp&J2~z?vhYaw$AU*n9!g>YJe+_y(Y}kqR*(uG)pFENJ7ETKs2_|3lX
zC1@ONzbpH`zt8;+$V0_%YRy{hi|xMF+I>A~_w{nSTUZldjV<$XnWOPK)RE(ZJb6Fo
zn`ONg+p(&T*nj@EMSj^It@UTWAHZhFG2~|Fx4JzokJUTk1lzwj;pD`xjJinsA7Bxv
zl%+qS{;vJTdMwD}|IgfLZEo~*Zrblj+4%omM_Svr%KL$lvAu3ee%fpIC+kSnE|u$6
zf4BQ>k#S|uShr`7gBTw;-BO%elq%h=e}{IdS*Q9tu78{MCz0M^T%QvIwfQG~(OO@$
z+LyF_SJ+oMU-D;rMQc1(eLpbqCwoPILG!e-H}&_*UWto)MQvXP#t&lRv7mQkXm8UW
zT>V}B$o&$wPZo3&pjqRKAOOz+nhB6+vI|(Wy9E1P?zylqx;zM}u=#%Ze2@e%Xo016
zOOV?%mw!7OW^`6C*~}U-JGMKK1_#GrYyk#}Jx1L+)}RY=25V5`2Mb|U438!~erQp(
zW{vb%kA0N!A{YsvIxlu;9RtI<2^)7+#%Ez6YyTAPF|
z<$o96zi&+&c^CbN6`K|ejf?M`59uYJ$Wy0^WiR=(V82pW7x*uUU5_ZNV$tySk>4up
z)l|lBo*I2j6Cn*Pq{@@J1z<}neq(5dMBCinlzjAi<*q3|!He*e7FaFOcrj_fi-@_b
zn1Y4*1Ob^QVRPc59q}G;caF0~RN!i2V}H@^(f3=u^YVDj@)*cavP%4;E`z~FQGTo5
z;5a+-c@RB@4;`QBSV;$cxLr2*D+qb`Dd?nAWuz`pjE3afHX)cRb(`fS$c
zeNhuWYV>c_c+drYipaB7dK5-Ky`4jdHnN_bb@Gsd{@Q#@*(=u5Fy?*h`5C
ziNqVW&=1u*611Oi
z{SKVS{+KNfU)xgad5NJhF9jY=oFnT6OVP`th_n#tJM8AmaTAGldgUiuB?*cUdPqL1hRb~xJ97*jl6_jX0x5EdUK1aOfD
zHusEF`?7ptI~IynH=6m;^=iht{&fFks%XkPP($+xP$ThNpnM?4)PI@T^g#-nt-N2XnuW_q0D}PxJOrZ|^Br
z&*#QM^87Kvyu{Ea@PE4YYwBksGfZp>`5vT8>g0S6^QNF9)clKF80G7ld}L>1v9OP4
zed~2Up7y`Cp6<|${4HN@J+^vD2ed|~a^t1bJciEG-Nl$0QE}K9o|7!B*F7bF%Z2N5cmu+C2A%E5X~dE82D
z+-liAWxVeDGhYmI+$?+N{c(sN&tYm98-^}GjYyA)Z5`7(c3kvaxyD4T=XL{@t&WA9
zjzyfq+Zf}Fk$)U9#+f+vv60304BjT&3f}%sxruY0!|S;o`<~e`29F}rr=HF=0vz#K
z$B{mBWm77dF_8xUU@i%PMJ;oiPGzE&lUf!caK@OsqkZ&4zBlnI{XAs(Up+RYT?8N?
z|D>*`<5K)}Ewznm$CobAb}Q08mLvgOs2urB1DkAIH)jnL5QMI#m*&y_3vq5bV
z7I;kcwao6G=p8?dNur)f@r=1r$Vb|y*EaT@(hGOQg*NNY2Y8;iV}lhOm7XcRUd)bJ
zz*NkQ(1V+ei)V6hSL4zLikM;YzF|)3_~beLt$#VC)|}E`&dIUnO>z(-Ll(J~i-TC8wdJhlq*>TkGk!V9)V{7n
z&L6ftW9L`2*2>-vW+9)m`Np+##g&yJ91$e>-1?MjUz)J(l+vFjlz#3LVo}VQGCxoL{$4x(^KCsn_PX?GDM^akX)kh)|?$H
z{8r)7s$Y!$k-w(!^Oio`L?V*|e^Bjn*12D{&-tY6T&@qsPOn%_H})ADMc*_r^lhJ!
z(QCMin#;9M-7YKbQtG6hP`R{B#1))M8*O=N{LrOyu(H$R|+$NPzR6MJkC5;UQ#{FFsyIaInb)BD{(|2i&KXl&EYvCKS
z{bZJ$LP;f<=bH0vXn%Q!n12>=O0;_p0B){!pK_3T>DHr8m`
zbIG#&+*qc3Zl$cwayfn3XYQWFR_b{S8S5y%DttjkH(iRaHO2L`uE4f*ED6W0_wVz-
zl<}#^&mOeCF11~DWZiN<-P(SRnqz?qL!&O9WSzP$`lB-=tm{|K*nh!alb3?NnM-~~
zThBC~D|tELukEk+t40UMm0I7EGhd@MTh#aes>k}nHQ&oGx$J9wh;WT_-+Ge_DB7B=
zo6f$--?k-kyV)LbW^)eRavH#0@Wm?w6
z>incY9}Ynopz7gSO@EyO3$lqe$+j}TTDZzK*t$xu**P6NjL+)j+qmMJJ}cuUVXx7S
z1s!GT^ao`;*gC^zVpbHj!>~W)Kd8<*S2>*8POk7xY;-D^A{dTFotjp1tBbrV+*h+U
z*|$Nzq=Eb#8rr*TZSt5E?$YZPqgT#L!J13by8hrG_c5M2f`10jl^1@VI)<>ZUuip1
zu?6B4DW1`*#*iuK`-caW&k)(R7GSWh^4Vokj%Sf>mpqS)q79|vrW!vdcsK#$fEbr@
zMO|+tANf(?fu=I+9Hz-HYC5l3#GMp|v+&J{EX%q%?XqEC(=*d&Heqjm%SI{UBEw1l
z&(6cCxNgDsAb&$mjLeGnn=*G@#&0yfK-t<9D@7Z+Np|VJI`?ZOPs2gL=d<}{!sz93
zJ6nY8Tjn_%%@fvKC{Y
z=KEUyalI}4cHv(aF$yjZR4Q6nF=oEOxTtR1>YHM|Wq;8x^0gXg&%efarj^$!4=p)1
zdI0+?zNxgQb8YSR8pcQU_=>oxiQCr4M~m?xmeliY7$3z2w8v++RXm$-F{#=*--U-j
z@QMpO--0r{;-k=fyopM=EJDf=UgDX6Dpr!+=z%{(!DCb20OB!~AJByTY}``M`!U!l
zkNs(EtAEa54q0=qknur)JV|0Naku$>7ka#-Z-cJ(6>VZOH>I2M+<@4ugUU%cel#{V
zo~Oc?5r`~D=lo$_*ZK2QqVYVH?LV{6GM&34qO`kDZO6=Km7KtA+Wh{DJl$Oq3X?C{
zlqaIG7q)!g|1!N4|HRymM9~)U0;h^u>-$xlGk-bf7cjBNCjWrWCAs87lubTF%Xf0-
zY}r|SbSXb??=zE6uwR$YcFvZ~LwZlxGS^+WFa4g0DW$FP={^iQdt)!ua7Xe7xMSo4
z9@n|Hc$Qelc2RDZxzfcs<6@lCWf?1L(kVrIou*tIol9u;faZIk_lcJKbjAAXlXF?9
zBY!T~fu(+;0`)2d`jfV;Jp?=JM>eIoomJ-lX!{OqvIJ!};F+f1sMfP!6P)A_+V~_c
zbEnSQ{Z*SUX|fMb#$wx!dMtHaZ}9_e^OkscjS%K7jua0~r(aZV16m?KPgS1D0hnoA^G#Q5a&y)gLJs@h-&PKl1eYI}`8w`tMeNj{M+
zlSDNy$;vO1m|rA|{Gv?f2Pt2Yl#Od%gdF~>or|0U5eBef1(t3Pf=!oX?xn;~tT}0sm4}VaW
zQe{iSx^MCBsV-kso(tc)^6yx=@6^tHZ#m}dfXRO^&cKxK$@pJ6J&dR9U!50K(OFJ@
z*2ZC8YTtz_!{}Ou3tebvpXqg{c+gn2iw#`6mHiPS^>z`txuDLO`99>AT
z-GXo@k$)FK*mU<7`Z{&qQ65V!&$!+3JU(puL4ilCdakLL-sSkXsN-l1Yk%s+#zp*&)S;070{&mH7R^$ZRc{tbg*uuHJC}NFCz!$+TWGXKv1PVp}0+zMHvwU(K
z`W0DGp@Cidf*o4KmTbPkSbyp{x@*MLR$r6$MV}x}74Knl@uH{tnI;}4O4njz6`Ln1
z?;kWdarbR=|3rf3mXh{6XCnnhO(r{ME1xIq0k9WQCRcR~3HOYFEse-CC~2`@2sadi1e#opCf
zr;$EeRO-lKLoC0d=VO&S|1W=jor0iJ>&>TqW$&yg-z>n6Z=Q3Bi5K4nfB9f%MWY95
z#hwh>t-D(AY=5cJN5axaJ`X>1H+&(xxmcFzTEN%O}$~=oa
zUc8D*KVaX#uAg&il!NHDEJFs^y*vTQi}(`te4^gzwb{*8>*~CH
zdgE8_N2%P6Qa!U)>b55TM>PhUnr|E9gH|6p24~_i&VL`>yXKdE2<6At^nH;}5Wm)9
zu_t+IP2<-5(WIj~l$P{KNKBMZE7uqLypVlHu*CEg|A~=>i^X5FkV!SD!
zz|ZKX5(+;L`zNxxA-53dP6(?07k#TG-3goSM1}57_yluyVrg=Alr5p}cg1@NYBqeO
ztbtEcn}6SJAMY-1&Wq7GFiP`au3mW`mwgwcUel(sCVg}gSF>~dN}oxbW2iWd=T3eH
z9;eb^qKJ<`)$l;sR1M`f#|p2hK2z)NES)Pq363Sbquy7YTDg1;YkRJ|q3q)QuGT$R
zHLP}8u5q?qcFs1?z5x4NY&FNJ@vN*xe~!_&6o2$Q>RWi!YeLWH^>gL2p}dsogrukk
znCBp$P4AaWKBa8QmiHBWi8^5tUOo$^=`YL5xmI$^NWN}Oe*OYeT5Ci#51jQ;K%0N;
zqtMu^Ha44fjNGc{g`D_lELymLwT7LS?4rK{?=J-Xh+@V$jhEBL^Aq8#DIbZm$>lFtJ7WKJdG(LC=qRD(MUUQ3`+I9|g-1
ztw(sL@J?y*9bX0EywKr7=LTTi5esG;pSOAg5FI@~n1`zz#{mEku_uXxPE<+pyRhNA
z7zI3@T8TY1hAxAjyFMRmT57zo-Yfk7M1MfOcU3+}f_I+d5TkAv)}VLV<`%C$bU~?Y
zv2PG=toz_^5PS3%n>S5kb@6)_&(x`g*{HXQxc|Pl;DhjF9I1k+B871zxJ-&CdnbfmIW@o+0x`fAIy-gdYa2LD<{ukSDsoLo@chC(}`RPpf^0E8am84u678
zxa&nQYs9*(*pnD7g9zOd1=&|+o?OV0k_^(A7yh{B_-?G+Qs;D9_c?+-X
zttJiGG9SaDwIq8h->OITfvWqq_!0g=U8(9SQiIQ_>K6%4=KWGldqrKD|ETIh(OXTT
z@HzA=^C3y>m%c3<&d2<=7$VL4HGfT0tov5|WX4=Jtm+n@%DnDdRW~09j6&5_AFDCL
z95nx6U8z2&szj}oEEYhjwR)?Y#(uFWS^TK$%Az&ZZ~1dee_X9AbzK}*J_@^TUeNmQ
zgs~Aw3N~L=_+RJi^?W`r@-fgxT!H8eIwR(Q3=txx1nt>+PGX;RRQ#~>lz%niga@{<
z^YKmm=fGWc23^auF9Tz1x@ha#xg0zHx}saAl$*E_^fL~x_5JR|_8pqOw2sy`m_$d0
zhfIiPL`4O&;{D4a&-dmuQMS2}$5uQk(eWdl_hF9{{df&ADUEIQ*#lK)=wF}M5~Zzp
z;=8JxwLcd>n|>SUa!%cYSAXPdXr6D%&ou2eVgwt*#tB|Y5CdiwxVPDd((k?=X4#St
zudMUcP=XgEFVS`(4Ytd*jj41F+V#$_#GbSrx;p0TcE&zx%yn9^(F$#pVo%jN)!(gk
zv-T`O`ZV`SqwUaS7igO3JhxBm0?9gfAGiN*(rUNhKmP*&0RR6300`$l-Rp0C008k&
BTv-4B

delta 9276
zcmV-CB*WXVW0_%)Gk;xc+b|S{@B1qb>CFalu${zda<^uM6-qn$wHtwvCB+u8B~6l>
zdFaRQ$ZZE5Y>W~NvXIVs-dEB&rzhhFTPvs+9I65C24z~g8{qNF=PTIi&d63+coNo0
zt$^V|o@R@5ZkfrZaNf(7Lt3P_u(P^*NoUdzQ@B)Y7U9|qR)5xwhY#D2kgeB?Bobn%
zHg0gwfpFhQ2Tt$&fm#7naqtcPozqN?=D22kCzPi?8i_&1YGbAF)DGbFzkwYcK&y6u
zNfIQ#i#U@(=UUu>P&NpB0FK@2zHj|KeZNmA(U2&Gq(~v}KelQ}q
zm)9?GB_v9t2egcj9}>Q6QG{tORUMr8-s8z7Z9{^Kc7HH_q=ckJpCRdGNOqFvA+fXz
ziEF5hXVIM??PN^}!RqI+s~gJpxH&dm;`fBq
zXsoYdq1BSTZs3@vN!7bonbm5U&6msh$u9r^0JE(E>H!bYw+p)+dxezAN-zGqanG}+
z1Skgq2$RnXG!^zU_6TyzFZQqq@+kJm_H{GhvgYEm1PmSl0SS{M4Ko3Avuh0k0)Ja?
z;>wnO-uwy#`@u+w1)^lYymT;4ySHK!N-{a!r=t?MT22><6GM`%$*-Ta$}YQnBi%Ej
zvpdFiUA$^tzICaZPb>P#GVH*%i4_Jm-7Gfu8@kwZ?&tp4r6)FAuAWY==lBnF(_3uj
z_r1=iJ^e%sJAyVOj%<44dXyYIc7Is!+0f~iuCu?#xjFl&9Xk-}tqI#Z2i7M;R5ntEID8*O>fmg{Xv+SWAe5ZanSShSt`%$crN&g@8Pzb6UnP8N^d_(*2^d50RG
zKH0VzlF&A7H=y3(hI&3>Y&~^W$Eg#}Y+mZaK88G*QMQ!-E&i-{{iUw$PEyg#R%{U`gA!Qlg-eQ0>pz47RQEZO=m4sYn!&vfw%
z|K{U`f(Rg=8gC19?jM-rcz+q6Z1>FTJNE4Kzf2;lkA=n>*Zhs@y-wT5;U;Gk`iw(Ws;ry-^FNx%-d$!rV(Bk?0ey6^R041R#
zVpEf-?<%#UY|?bE^n1=GMSmPv9s47(PA38McsnGLFGfHbfoqd~pJ2)4tyotQ%70=_
zPT52@nZPPxe-qW;B%ygjqCVKL$8?{(OoDq0Yrh3W$>8K^Ai1N5ZG`XFf^UfKsK`tb5T
zgw}@vOk$fb56j?a8}>JJweGX!_^%(p9{D1JeV*{&O=qU@B59}1TBP&F{)%s3efWzO})##pelkU|s$}GEmeq?*{@jH}A
z9h>8V&;U*aQiP!iYZ2jE?AfZn{;~XPY#zMeiCz1W3>^7#*!ryF4JrH|ez%x&q58H!
z_9M#2^u`j=V-X3ZNslh83c8x}HwgbloJUQ-f|%PL*6PcJ*sqAJ9>f557N+HvYWhp6GbE
zTC$VpKKb;)>EW~8<2&1J?tA#WPse||9`kP8q2F5q<$I0t-rr8Q{T(gK3fQj6Vwe0v
z9e*=okKYfQTn6WE$EU;bX?bER*MIUJdJdKE3O4!UabM}r1Z>Dp_L@xa`Zvdu??b%{<71?PbsZ|QWa^nZ0GdsMAg_jSOiC34=@?=wpf+M!g@rL(Ee
z=ebwv_fOVfO1E1nGiXx*=Luam3&40dZl<^S%oZ1!9{P|EQCH0;y$8NGq3+Qb6sz^yzyzTr}0z>h{{5%VH-%Z#Z9_iuYz^eT6Nj0{4UV<
zavkX2X`&0-p0uy9+}C}nuX`yAd4FG?-WMs>(l8BBkIbJmxqJ@M(h5?+8*f8$L{-=Nzv<_)JSy6@xn9)66yYp(oD&W0e=blRa;w8W#eaVI-g
z@IQ%SSnNpHCY}1;jovpitB%o0a(|p@b0CU$Vh{{)IRLW6HZ@ZE#?a37AD)1+2Y|2M(!X|G
z_W9}XnRQBed{ZgR0fj*@H>m1lt;V-4SO@EFj`ivg{Yx*YZ
z>+uB6&>Vf%NqUM0GCW!11a6HUmb&~JVll=DR`3=m5(_~Q{0qEe#VdNcQF9k^E(FCgolAqCTf^!B0x*lCBWOK0MFva-()PB{4uo!BB5?oGArbC*4mTSlw2#&`{k
z-6ktV|AD|DK@f_<&(G|;{BGnKoO{|=%GVvC^m2$c%Qi#Q%YQ2NWu6XS0e_n8EB5u3
zozz$spgGeDrDvq#HyM@?1(p!Gya_c9$OFgNCAScFkq3JCg6}+M@eIYk`fv0z=;(PO
z?Jmko_Ds^O(>>eod!^s^TEFk-`vp~kzDq>ySn5(01AsOHFhuQlTO64WS+2tyV%vzX
zKN^oz#?yZv0e`dWu}UcuxMq8n#wqmcIU}_=HrhiK(*Pn6K)SQG-zrY6=0eR>H>+1T>fPY7Hlxug!K)T&&805Be*8(S=;Z@xc^TYlFFKuejlk>qM=!(A?QQ>Imu(j
zBqBIwW;4`t0iS{E()jxbztuOI@Qwf9v7qzPSo&`mi+`LS%lyOdB9-qVjo(GGv5NIG
z|7^WTMaIg%kCgxZdd>U84|pCrCpyoUf9vCR_)OvIT;B9?^SCQ0dyKsV0L9$lNyb!E
zY-PKnzO(Gt;x0v8479NYX1l>BG(DpGA-Ro)zD(UW&}mJ=>ROOCz7J=|u&~*IW#LRP
zrdh+xgnzHuQV!>7w)eox^UL{y&N_5W3*Knsi!dx=d$FQJT&F|WPKWR#I_T?lWT9Ej
z>i}=5dGjJ)2Haxm%**5^
z%u8@^e3YSXxw7b~9N&o=;ydX*
z%zvBW7$qM#W>31$g1i9T2bgEV7`)zhDw0j2gvx
ztbq+~CDtwV(R45GS2WEx!aQvnx3Q!R*wE4UG*8IbL;s%x{o;?hoA1)c>YIu_gMZz*
z*iC2J7!N}J%K5@7Y6!S1m^U3Voky%{tVrqgia)H!&Z_;DVne1KqVkgddMOqYo{7_h
z^*GIM$9Uq>GtH0V1pKN1{^K=2&eZ)lGnYk_*A@M*JM!p;eeasMmfuI4?va^dG^3m2
z_pT`H7&v)0#yKJb{AL%|lXMwkIDfg0!aUB@8jB>gNlLa+PTc>lJbZ3q8_HU5NT8cwktO~~=R*k2C!Hga_b`^Ae2Oei)2PS6nr)qJpR%hL^ewN%OIll^YDM&X
z$$nVZr$D1x&fukYh5Rma1uh+XE4Ez4ds@TRc
z?cV&0ujI-EP$hL3HHGSXl)RRo~0)0p=^w21ka4`BcpwoWxfq
zrh+|CKg?xTjFU_n!+YzZvu%
zk1$h+J~|OYdUBONPA2qyq<`XB6ZW3z+|5ppE980~+Jmmc+5mz4JE6~`6hEYKgDmb)
zi7AxlVgmg!pNXMa6(dAmRD7tel?*A_!8i%5T4+aRjAP?>4+y=@z8`gg6Pd6wmA$lTTG>A~}zg!bCz@PEg7&BST0BchMD
zZ85sD--z`|{Fddm6>~|dj;myEteU;4$^Kifx&Qg?2f3$)^?csE;#fyv+B3}UAbmf`
zsa9=;#5_%Tv8?Z2f%!}uVV{}hZU#5ByBl?7?o8=}E=}t;*n45;m2Ic@-2ofzCdcP*
z(kB~GI-2a*Gx>I$p?}>5!TAP0S&`FVK#6uhA6@s-js&k9V
z^wH}%qN?wTwNZ4^0pGpV_r*E=M2n!+u}LQ}4hsE-x;fL01AlSL#6VD~tc$u*tgkd}
zRm<~En5-*9oUg9m1(ko5e?Zb2Qli<%nhu6*`FAcvu6t$Oky)~RdCo#%^@C5n0b#$x
z+ggl0GBL&uW-wIP$v2DK({SqhE}Nd(?q_YIFoPXJ(38#}#;&fuK40=L3j|h`K34KX)44~n1qY1Yc-z);`Q-Ds0)ErfP
zAM`{(50Ofal9{Ala1K9~|I1iiX^Zl>4a<%v3hU;Uj;eXH#^7{hBFn2N!bw^^D
zPj+qMb$?dJmDAJ|EXV)qJwt1wu8(j%H}V`f5>bBNFrcTz&1g=JhDLv5J1gR$XVxsx
z+62X#1s|_jpwU10%{7Z=wd?4&)-2NKAN}5%aZ$VGcSrHjnu#ON>5tdHvt~qVqpo4i
zxK@kUxMrLjiK0I@kK}_jlYS(liS$L$kIeDAqJNu}(v2k2_e>CHL;tdNxw=Xd(i}gdqC-bCk0}|2pHQ!JQNAu?
zT*ac$4@Mo$6-L9_8KqOdj!$xC{`4U%axyWAp|iR6>)x^
z))MoWyJ7lmU>9rjQNGy+bku93IWc8Tb*R@I41SDnRh_(E=aAW1*%#In44f1rHN}PRXYd6Mrzk+uAy_ZxcP9IM|)RH6@&jwR^gKT}MUD
z_3zx*F?-b>>)5#CsJ$#47AN4qNoJP!kQlHlQr}hKHR7{U4qbH9cm@07lQ){iFybW5
zzv!{u`5@m@f;ENUXCQ3l($~;vLKN+^e3^=e4CrXrh#@dmSTKN=QsYtS(@Uv|+dSherGHz{QK>*+ImDSfAfkT{v&iGMtXY@!MS4z`rvaVOX7E>Qbx(544>5_c``w*g)#;BuVY8R$rxbVKq*1HZIr{uV9Io^xhJg
z6Z6I{TP;`nIko;crlNE)eM=XiegMY=Ip3UzO
zX}bdahOjT_w7=atZ}ew^vZ(&5yf4PTG4J&Fi;d{_jjRWx{eu4@t;Tr1cWOH4C+*37
zRr6i1YFw%Z)x9r<5I2>)>AyNzO0kp`-Pno9$~ob
zSa+#>87)5`c_GUY1QD4(srMz{&1-kk8cRuY?H#@Eq9#qqnl$LNyX-+z#?&r?srPoq%OpYBACH9dcVl;6*bI_d9KVC5aJsf-6xCY
z-&I^sht;?~*K2TU7-iHe?|(nH_fNNdDyBcl_L^7gS+e@_vuo0}mRe4`wN^wl)rx4o
zZ`HTX*5gB4$nDS~Hj#Kg+b5yhfana)j~Z~k#FTnXlz##1(L8RQ2c9*b?pgEc_PcVt
zTiFxE3v`plqJGcMdv5dd!av#X=xn!n?oHS2c!ot$E1c?mHP6MS*caD?`?LOfO|=MF
z9Hdx#lCHht50cb;`SSS+z=3D*R1yE>7QuoI%WBYjq1opkP_Uj~heNPjAg;iS%y1T`m
zihuvpSpgYO%DE`NOP`D8i~Z(Y^8QNkhv0+w1M)aP_YhE#fi+(ZdwFHf27Ix``{?_&
z@&CE_d<{#GqGqkKwmBc@_<>aL1Ma)Sx&^=vMpWQBvKD~jTrZX1wd+;R7Lxpnu`gA-
zmE}A0I{z#V$1w*E{4H~aAR}5kD{mLyrGNE~SsMd$;#r<3Z5PavE}Ja6kCWrf6nR}d
zIhvU3nml$F6SI3XHJLTFvt0xSR~P*E0MB+g>`VCwSwmobW3q;*?S6wFApOHmU*ebC
ze?cE*;9SVI06_IRMOB{wJ{-BI#?sr?BFh_vE?c_?5BVird%&USAK<-?*D5EciGNel
z6(t@xbkAT??YsviH@LT~jqe&`k=j`EZc|;CR_hT4!~`RT3skQq3Z?zW&Pq5WEY3Vr
z`WthCdL2bYm!d7ea~L8ZRFL7K1My6Gei>c&OV<(byt;<9+k*et?>nB8;|~juW{E6Y
zn1mXEv@hntBM!Sh9Zs-LCbFR
zO=S)UeGWFw_l@T^a-yBr)oAAfS=00{dwpMkqLTDxi;=`TcxK%iuyyk{7k_wl{bT&M
zvtDBEmuUXTdinR-d0fKebzf%g4I95N&;1tPG*$aJrg3>MJb}j2rWhpf4Ye1(
zz&bvg4yQhIk;n8i1oZl#~IJL-Ah!7h!5;d>7AzV!EO@Azx2&Igd7WgB>^ojOAR
z_nT!phbuh*Z&!Su(*z0t5U}UEhv=j8)D!#@eU-ET?hq
zqmWqEZRR@FyGZj2DvqgQHbp)<#phd}=CPd3Ma{p_b$4ywM9xp9JSGyfkuX=Jx@RbE
z)k5x4}a<&S(DPGR|Bvv
zba2%js5%tXWv6TBq;NUfK8*VZGIkv*Je;0yW~MscOwTtf#ip)Bi@!(E?@0G;)N518
znKM1ed4G?H-_A#t`wbiYMBBu@w5F}F6X>Qc9So$OJLnE1&CcbM^jH;O%#v^1W{*D1
zi52|v;U2e2tikxxSbu|(5tOxT|A#!c1nrAj=gl~kl{f*LLJFIr;v)_9AWidDGS!IZ
zOF6NIbM|yQf>@(C)3jm#4r$>@c@Af2sTu}#P7BQ2R5-XeYq1pf$aVU9{r7U}um|Cj
zMqan`AXXDgUH)
zv0Cqy?Gq%@uf%3fr|9Sp{V8=%ZTD;O9<;@p?+un^$WBvNw-Gp;0g{rRBdeb?
zQ>yiCyD#eZb)9I%pb?F%zHfm}Ct2KYHaYG^8FV-7~G7>8bh2^?QG$
zpUj|9&qN`@SbuqDW~7~Eg>?!!u2$#jGM1lFa*nTy*l$ugb5zy|X=e=LejI}F*f@**
z=COcMthaveqwlWNWLIK*MJytsX4$9+rj=5(KBb{4BH-%a;E
zqOtZoyfzzkOR1i%I5$_LsoCIzm-c1W@167U^|NUe9e=Sdzv+I`Ky#HdD$X>ELd?VK
zc!mJ2n`*#0_%SVe>P=PKhPCGPSZz_?hIO}SYv+T(*;IT`n&&$B6qwDzzHv
zUKTFy6yBqLYM-k1puslfZCmp;{rVhLoq>H6#{bMH_4~u&g9D!I`m;B7!1Evaj_6Y~
z`9cuz41WOr5kdul-|!bYp=3lrH#^BS`ky>0?uGdXW#FPhYsl3t?R9-
zwSU5b_lSJYtG)+rMu^3t@W;eCfM46kL}!QX$2eaX7jU~u_f+x#Uj(&n!ej{rTOyCB
zsrHG2F8d5Elfc-3h5Y5i-WlS_1na+QbG77Laes3lFfpfMN+{Zv?b;cB?l7-D56b`*
z!ck#MLZSY5*mlU)pKE=`GUo|>#}W2T96Vos%A}7r_Bvn(_Cw6Q@B1I~b>++h{Y=8r
z8M$s}><#w^^r8EhBU^XI%fD9Z9M^%H-G2gb^W;pO%g*JcT=n$7j<~$MRKGfeUXn}6
z3V*mXNS>$U^cz*;ZU;zu;kqWZWjO1-89ZyoYT?
z+E%3hb+E6DF|qAs`exd`gH1&?3!HN?4UvsYG6pAU+oEf1oAZ7;F3H$m2-)_M(s0d1McPgPlvT0a_Y8ar1x%(1oPOS&ORySM3`s;Y7xppw^U)2w`#k|pfl(tF)d>_(M4S$rv
z)>h_6DBH03G0yit5li~^ZE;k*&i6*){t=9oDnE5=7Ii8M=OXX3YEN}qPK7+%I6os2
z=cS+DsQW?R#<{;>>HD(K4$Z%BYV|$~+Ee{D*4)iSFRz<0aU&=GKSBVVhw%{Y47y2@
z;Ni-fd~fmu7j2hJ=w=|#9I9gWi){wXj&YHLbI}+R%3{}`7wdh^-P4CL8?0k1YWB4~
z>;={evoZ4X@KxPG=ZlZ)niS{cU(~S5(5G0_)5O>3>r{)g`15hKI@SDM*ixt3hSko*
evs>lEnRn*h&Zo}*0ssL2{{sMn6M+&ddjJ3z0~n+L

diff --git a/Logic/synwork/BUS68030_comp.tlg b/Logic/synwork/BUS68030_comp.tlg
index 42cbbb6..7070e15 100644
--- a/Logic/synwork/BUS68030_comp.tlg
+++ b/Logic/synwork/BUS68030_comp.tlg
@@ -1,16 +1,18 @@
 @N: CD630 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral 
 @N: CD233 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":70:10:70:11|Using sequential encoding for type sm_e
 @N: CD233 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":87:14:87:15|Using sequential encoding for type sm_68000
-@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":128:7:128:17|Signal clk_out_pre is undriven 
+@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":129:7:129:17|Signal clk_out_pre is undriven 
+@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:7:133:15|Signal clk_030_h is undriven 
 Post processing for work.bus68030.behavioral
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register DS_030_D0_3  
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register nEXP_SPACE_D0_3  
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Pruning register BGACK_030_INT_PRE_2  
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":130:34:130:36|Pruning register CLK_OUT_EXP_INT_1  
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":126:36:126:38|Pruning register CLK_OUT_PRE_25_3  
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":154:2:154:3|Pruning register CLK_030_D0_2  
-@W: CL271 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... 
-@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Trying to extract state machine for register SM_AMIGA
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register AS_000_D0_3  
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register DS_030_D0_3  
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register nEXP_SPACE_D0_3  
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register BGACK_030_INT_PRE_2  
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:34:131:36|Pruning register CLK_OUT_EXP_INT_1  
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":127:36:127:38|Pruning register CLK_OUT_PRE_25_3  
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":156:2:156:3|Pruning register CLK_030_D0_2  
+@W: CL271 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... 
+@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Trying to extract state machine for register SM_AMIGA
 Extracted state machine for register SM_AMIGA
 State machine has 8 reachable states with original encodings of:
    000
@@ -21,5 +23,5 @@ State machine has 8 reachable states with original encodings of:
    101
    110
    111
-@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:38:131:40|Trying to extract state machine for register cpu_est
+@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Trying to extract state machine for register cpu_est
 @W: CL246 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":24:1:24:8|Input port bits 15 to 2 of a_decode(23 downto 2) are unused 
diff --git a/Logic/synwork/BUS68030_mult.srs b/Logic/synwork/BUS68030_mult.srs
index 56f4690c1409b3c2b459c2744ed7a6a5e00f72e3..63c82f8d2da384e556e8c8dec01bc81035d244ca 100644
GIT binary patch
delta 12789
zcmV#8`S(WA*|0((sc1Hr{3
zk+$G0eDMf-_Y=}vNH_U1%a#6QHM{)fMZ4<8@EevgXdz0p>(y{kSpE<^`$GTH<2+qXC25u=AC}n**Os|>3?GDOBt0`!
zHh7Xk)Y4bca4prDi|gBDnat@d#ECQMN+FCpp&BGE&h!1}r^C=xDA%-$XqVM)Hml8&
z*XZN!HvqHA0oDP3bK*F&_UGYOP?!6~~ZM|4(^~=?**5?`hOxg~2oHilc3BOW0rH2payVq_Y
z1g965u0Or<4kLfkp#D|w$}=wLU_$&+rpK&%;nE%v+#K0LzK=Vf`0Lr0xrVj22=nN@D@0G=|KvMZ
zJ>%Z9CWdFlWox_H+4lGG)GDS^wiwS$?{IoP0g7^^~m*f3jYC)E&q%U(()$
zO}}pcoOxT%Te@OEN2A97Vi_D;&ol17Ox%G_XOHrEgZBQopRwhm!4B)`mQimY)b$yR
z%*Fj2Ce8>YwvJsIl%+S$?#Je$R|Q@C7Y@Ie82Wnzhx&w%SQs
zB5q4mwRea0)uF9_>$lpvrk&$$ZLqBkyjMRS!+!M`_K%KX
z|JWFsL_k}nX!o60IYxaNe*!Id2imiy6Ly$+k3OuOR`(U_6G$iC9~5cH@{q0x@Pu{a
zktX-wZjWGl1loH_+Iy;R@99W;PbaizVtZz|aJqk!=H8)V*ljNU-V5Rk7c{;$62sDe
z*mh}a(fYeN@{+ne>i{kL?ue2GeO${r;&N+Tn`>)&SUygCV?=}OKB>O{`I3G%C0{0{
z4SyHW?K8jKlh84Tw=`PppKrNIoG=>F+uOzS-r>X?h2=g1UE}@Q@xgk{+kMy=0)4FM
zAL|*LE)T%){72ddMvu`tu77CSm1C%X)v-HXNBdYE!SOmaZ`J{0B#zd>New-CF+GGx
z4`INZsQ=I$_s!;>4;_>CBi8JXADVn`I@BCSP1YYbANqU8E}MyEUu&DMEm)Tw@t^EGXbI-Tk@;L*>#?Ev>7du8nEOCZM}
zh{pivktUyY{b;uSdVw*R#$$jolW%q}&hOVQ8`Ia{FN}`6zuC*{m~>fH9rE6&8_z))
z(_*-RzgYIJ+wA^s(wFXkD{D6Ix^?Bd-R4~rV2ae<
z&RA8MR;#JjS19$&u+3kb@6ikW9#xLp_m^xE2a2G0T$@a1B0rd|5
zHT7oOk@a7a-$Pvl>jJ&Qp`GhasF_BzDAwvT0U>b48k_y@Ba6gAPpBjE7zBr
zGdt#wHpuSwFDF{C=P2s*`z&hSoztgg^bDg5zxvG%yL*a%&YM16PDX}Xr7!)87SF67
z^*eX088y$JvN^MDV52C!16kiIJMTuUzXH8r5p}36*FAq_Z~;2d?^MyiBKq|V65zGp
zWf5CN{nnzR_>(Q|B70{>!b$7G{G{B&?guWHa^UU$`Ys#H-RWQ-+Y@h(!$f;Crs()Y_+&!js8h}7tr@#jp*pJ{dYWn`yFRubhkP>zn}}8(od;Nv)9#0btZZ{
z3;V}u2Gw`IGlMhH{
z>yvnW{Os(6XH$A1(a|w84dzR`?8tMwd**xW(Z6I{!@ZpOlM9!5qsNP*^X&QekC#4w
z+X8!-P5euD$|he=kO2md?Y+03YoGQUu4!??b3kV&_3f0p)H}rbP5l^|Fh--p*Q3uc
z-$?M;x5qod5RtbWrPV%*vC&ibmLHxtC!Aeec#lWhPUwy`%;Pft@xr?})@~o>7;Qj&
z7siCK{qz1y!#`SgH~JOJBbd}bzua$s{bTKP30v&{Zjuvpla9DPNq=~ic=+jadvt7@
ztkY%974l;7Co}H-?U$ove3PLsiy4<&W(|B;?1RIxvFN~<_gCzRd^^s=)wAY1p5-Sz
z3-j>{dG6>rIy!!t@89K6fIeJ)aFg3^K2AINjy~eVg4Ie{M%#{L^HN5GXsy$ugRMyiZ2o&FGta
z?ekj3)1Y6B>^9EXRye8c|HGn!I>Mu~s}vWahNXX(pL@eXU1%NSy##7Ko7nb)d!>^{#MSvUbcIhP9^g_2Hh6
zXk(p=MR3l9{wx>thvNxpc!{CpSr*s
zbA8k?u;Onz)Pmp8DsTzgfx+HJ%Z^!Zle
z2}LX)b=T+H#qBRzU2gPztJbe*?;K|bBX`DyeD698@5gm+EGyeYA406>RHgcRSBnjrrCYO
z>yr5*Z4<+p;8jc_=S#1L-L3jMpDbdT+kW}ld7l>X&UNft#>f@)R;Px3R7`&P>{9+1Q&nG#GXokNtO8
zTj&G*vC7pcG1X+e)%O%{O<0KZW{~hs6oS#cUx8o&EV-m)z{P%}{pX_z9lK$J;`u<|g7rn0LPxjaN
zCHt(XgUI>h@KWt~KG9ZKJ-n7^6Kw+QE7D={H^zFX?`lp>3`pSt)NO_+s}wIJU{5G|
zoL^C;N9+}U1i6kjN~TwkRIiY+DIvZuvE>{*u{g$L&-&qyVQx-kdU1-D<84__n9v*0C&m{b56aU?e>H}=
z6*~S6i&Q>4>WlP!1CaHBeBW3%Qy39_UFGUSzx%_Ay>3?$he7{4&LLIT)qIC)zC)6(
zUu7HaUz%p+7;^DqHe>xqvkUjs9H#d{2O4I7^A4>9(1HnqH{q=)7rLxpCBORHZsuR2
z{jPd88`IF{P*)h*PCKqI!{GD!M0OoC-Pzn^6VzeWg1Op!lT245I~&;l4*IL)+yoUG
zcnztit9S(1p*$noW)Q&E!K*t*z!uhcVPml6A0u
zzM|8)!6v;AH_9LL!a7ZxKoiD#itXJz_2MdO~7Qz(s5MED!
z7Ix;S^1pi3a+X|Ydij*D4Sd(=rdOqdJh6vsa>_G%8fo@L2x1oW;t+;{$9hyOn`1of
z2Pw&LWtWv~t|UfUad51EZ9)&0d)U&g1r~T5i-Y~Z7!`aL7`Rv({=~(x
zUkd8G6N65czOi)W_foxcXCTLCP6w0@=7Yw(%zt6sr+ze$9dd0h2TQ8+(yH%B2jjk+
z$L{Fwg^V!(+i;DsEmO8WOsu6(AC0gshAyd3#=~IDyf#ja`J<+He^yX@ib?IQCvVhj-aeoOIMVRdX8
zv|BlLEu!~z!+}L`Sj#(bgF^)UIFu>Kz)3(c^ecOR*)PL2Kh5
z6_1GbgPbqd0k%<1lm
zKeur+0N;Ub+U7~TtK{Lpk1Od3bWDA|`&G1t>lOD}jOe%`{w=JGebw51lYfL5+Xr$I
z1K-ZVc1lB_10-_8AB?Ym;xR;jyP_q$Z|bsgT_Y>Q9qRpIxRdf-J#+V?DS5enH5;V#
zNbj2I{cTfXK2pZdYGgd9?O@3QEw#a#4Ki7{?s*fOM-T#kDmw9Qdh7KhmBSugPxM$<
z#eY=4ISj}K_&>%ipRI+X%5C|K>-s?@jWW*D*nqW5>&i-AU5Jr?NbImsnyx0u`ZF8s
zAE(-;2ZLYvO47NCu1Ya=3SUV56?GVaULWYau`ZjBRj=&d)X~-=XOAEJxzsr=Ah;ic
zY@XHp%z9g{@FiHI9-CQ%+d4{M4)WLs<;qbM?UDVbZ`~>{R@5gI+@nSl)R^J*G~`G9Bx7+
ztqt}ru`zsMFkZle()~jMvGQ25=
zKiG&_A)U$CGn&y9;&cDjOXRInLSfw
zk0d;Xquw5WxfC&h5(cKm0{aLS7IxW2`aEXm@Wjs9()%wb*f9K*XRx0d|E{B3i5C>c
zKchd;azX@vP05dP@5(@yDI4+pDv!yLKBEO5$0Bl^x2y3BfC++0R^o$pB_H&1@@sCh
z$@Bx;dKLpkL+6k7Df}^e_dsx1cR?Ve?5~PH*X_f9%KH`XENxI+lSN)RaoM!-HML9a
z9qKh`mxj9p?}_7^3O1=+?`VswwS{peP=C9?ODfj8sn)x~DB|^QGRgbCvO`uj3`|(w
zsBk8jv?6FvZ_FKceox$@?Zr-Z!cILInL$#6cdca80O}fL@#G4GP;7
z7883x#C%xyJI2=jZTkc|P}@G-%(bumCWZEYDTp?$O`_i$F|*|3oeM{+mxu&IlyXz+
zn;e^(-|76IUmAU(x_>#h7s9Nk0rD0NkOB>8zoAW2Z?oV(eqZ~fx_we;pXA$5=fZr0
z7LJTP!8xrSdm{22B;C3{lkT!3f;+ujBPYA5}F!kX$_dI|asY3DI4c%GMi4S8FW&xno%)RwK{p>_NOV-plM5}=nxj$cq7zwqezg|*`s
z){mdQ-f*81HFI(}9PWAM_v5MGFR+2*ZAc*fema)Gh@Ijn3HD#a5eVw4sy{h@3`Q$E
zcdKPF^w})+nP>bX^Kqc}9sV;nnB^#k2iY@I>5K#2rqudq`gVdXvij?|NA>rRj*)lg
zW0u0g?<{txy(gu(B}JP%jwuKPcg)=e<7%qLY#>-AZQ2@bt_RiE;T6+3Bjr0(7&Gz(
zg}KsjSc<{{ND_0$IQ_Ln{6(|V~Q~#7Lcy3O@?n*U6Z*f)&4tiTV{Y0QT9DHXh5W
zDdJe^wJ?XRm?^fR`LQ+oiko1xi8fcb510E)a+rL)mxXePIbA$%FLF4&jPn|~RyBPk
ze)*h#EV-7*SLLVw_kOaZ-nVE7^Mpv=2c0}K5$Em7I4Y6EtkN%jiVgmvrF*4)GU}OK
zl*K?a*-M6LhiEop+8^_OtS_9(SawYwRL0i#eOg&gwH?;Ay(2KS=xU4GF76BZ;b*)P
z^Fy$o1lM4SM^{~A-Cq(jz<83>?{wExW822OM;yMKnOr0}wIsGu@vd@T5b_y=E5v@J)?)C~X0y0-oBAblmU}>DY
zRL^fjlRQaEhN`$IohCLw6D-dA_AdF#RIW9T_JD^@rn@!Gc!Y^=Y!2E=JBcIdM`Zl7
zv}RSTW7Yn`tzUf|`BueV#C4qihHnsTcFc{b;;t2MDexzMg&CH3ZyfV7s
zf%veEZK|>T+B---tZg(jF`PY)-P3i$
z0>6;!(xMak)-!M2)Al`~eTf+0N5ma7KNN^1AWj)Xl=s(Fwas;Yxa2aX=Of1Vj9r@U
znZjIXY3yl#h-re%5aD3mkDzQpg>xry;}ae4HWPhUVdZsY#}-ZZqhmfcYe)|tw=TY`
zhS~BU1R6VYHmNL1aA=DjJSl4sgT|bXRESjeV9cMwf-wf*l|HP{zh0f2O|`Y#KwCSI
z31_duk#d}f3`{QAHzIz;&{#llerd$I*(9$gVD}Y-@8MKpF-Jpz>nLQoJU5+pNWo&
znZvQdT$&w1ualgbNMG6h@b~lHTEDEOle%^OdHQ@?TmFbYOZte$ydJNq&;j1X+l%>m
zRG%?_M~|1}g$1eW`PS8h&{nGoi>k<5Bz$3Hn-1%)`unGEqBErF
zesR<{Vc~wmoEoW276R4>7p7wu;$Y0_8A>+9;uhu_T``iY=M`C|M
z%mbV~m+MW-`+$4gR5??RBh_qfGn6)ex9O;uBBe*`7>?TOPoE=Qm)7k0w$y`A7t!qf
zOusP$Tqq{$QZWBEWo{ZDgK`Y%*R@$KZk?xlvxZ02;`6qKjq5Q>0b*m=rz9`AuHQ-g
zQ|fn7H^IUx;||P|bv(hP{fm21Z)JSoEwCOlwIL%<<|@Yh{b`Qpp&80pcpRU9#1@t^
z9%!^S7jO~-fS8=Lv(Yz&IUUF?!<^2ko^(s&KG^#-zqCp1Vd|$syIkfbI?X=D^91l6
z0~t30`pq6Ditb|nlxH1i)`wl1KYBTgguN=c{}?+PYuuF92>PdHMc-Ich6=styO`
zZ{VQ33J2w79Q1J0lVHa^8~9*{Bz7PI8bLLl!OM6?l`mGeeRSQwcrUT_#U0rC1%G4C
zM$qwx5ClUYH=37y#9KDC@c9})Z0?zSd#A-J*I^c0D~oT{_v$)Cy0sjA|F7DMq3``o
zWSEp|AlxMl>HDwc9ta|TxXQtx@;B)^nxefV4k{-j5!+PzpY4q!13}w)8zjPgWI#7n
zai8*?DB~GM7RfzkJX!ZT?orGYnPQW6hE3w$Pu!;{74t-gD$!{XcPQkcl4GZET*kQ6
z6T3bw<*TY`Gkcdn|zIN}XGcjhg@KUW#8Zi_-&t-MaF*irC>eKW@)s
z)5&x_qN36s?K-iZSmnQ2f$90JpZSKAU8(8D-6W56rG9L35&NzMeB0#K^Cr{1)~UZS
zXQORuY`2>0bv7!Swe?((iEM+JKzE{On;27}$1j2*DESxr;*(=OG~zQ_SGLB7Cv#sX
zaYB5DkY*UqL(bQKL(06aI6lQ^bpD{@#X3(xowsl=XV(FTg9+P&GA~GwjtkOf39IN|
zW%&V$K1Kc7+OLf}&b5un3UFU{h%xQSzV51gZbiRAu|4HCIHhly-+;7ta!`PSV{vdzVaZZIp
z<8}S}o<>!%WvTCVv>U#w&sxlJ&iBOE^lfYsR9HMSf}45Ygv>Rw9i;e2agA*W8z6R`
zkK+ItH!yNod-DBB<(f=v=nd!!a&tM-b8da_j_WcQFQV%q#eI@`c}ZulB`iM6MTBRL
zm^|C(54y8|vkyoik3f1I@dA|_5avF2&XAUeA%}-+IY1=sMlO|WP3g~yKZ&0F{eOyK
ziYx$S+Ju0r_Uo^g^
zK2_`_*j(hT7}1S}#g5kQJNKdgDy`?u`{pXmqY>kOU&hi{9$dwf>FX-R^e{I-k#81t
z8tAFaFYq3EYqsLHTCb~8zlGNCw(Pel^+Ci7i#i?JXFu%nJ}nJHvlSoc-1M#$pQX(1
zSl3b))N!~1ZIGkbp03wuF<>QsIO;cb*DKqf_)hMd)aqs3=`PBVGZ`7UzhrjE|*QM
z-b|1BdT-#q`9$^d{AWDdl$dIZgnd4
zP;x|WZ4d+ropxK>6J%O!4;He-jDen!@2C67Fpo#JM<9LGn;$-{V
zG_!M*TctDoAQ3H-oidHyl1%|F=j^Ad-!N=
z=kCXB?-TSb!G~o#c)wT|R8_32)Gw0s3;B*JU)`^`F75qG{UUOoU)C?Z9{iqvj))8!
zeS^2~0&gkU=i2=oMyPm;ZZl(UWHc#pzkZ69b94n_W)er`FRP6KR=&ErXL5Oe)8kl*
zEH1YO+tBxyYR_jrv~UyPAD+kgq%9T4yalCkF?s_PFBhn_JhZe9il309q3)U5yy6vm|BLx3(`$8nw<>?7iiauOtNg9<`BdrQx{MqR
z#6Q6UR9?(CbIq8N_Ct*GZ0mV{Agk~(-S=HXXL8?t9epO4a$SD-H~kb<@%PG4A*%co
z8qWDvZ1k?6D>kgkxi0PHPUcy^u79uO1!Mm|h@U)F<0s)e>@6j?xTWng94uXBE9x>U
zc_t^%G&?el7iu)$l~+sF*D|cS+zi=#lG6Tw(mh2FB%=pBPqE}r$m#rlL7mRe(Z0sm
zcu}MChi~cpVU5ne3}c^a)jhR#D$i%}s5b#!hECVPF&k9Z?SF(7HfUxqgqnY*o9SAi
zl&#hGNM)>bD$mgEM>c4sm?{^wiZ?bR8LyJ8-vO<-Cv#vveH%-EjI%cptH{L=7yNCN
z{=FT>7n=ga){bL7#^QN@3|Oz)w@n9wT;5I6WP4&dMSUFo{@6b~|0b@7TEC#4KgJFm
zJYN=VV-@3@`rVVcPhu`e-=X|XSoP6=Uh4-frGDs5W*?C4YC
z8bD;@_FI`}NjPn(&(xh$q3bhs&lGd{`|j+LO{ZJ3Gt2
zk7sw1w#v;cZTO1Z+d|KYl+cid7qk(#Fy$G`XQJ{v58X$o>xiV8^3ck1=$k3{itF@-
zO3X5j#}aAIV`aC0Dy$+}Wtc<_k1E=O@3Q;4ttclyPt4_+^7kaiO5)o|d3d@fPS*i+
znNh@&LEm_fyiD82vw#sFX5MVFo=!2=r`8rPuFHy;?l`a18+m`wp8)e*cYRCn+?R^=
zsP=PJ<$5mYkOlu-rJhN2zx{jYHS-VJCdSR0pkSPBWUL~8nG3KLyqRuKsB7tYHii85
zsgFhN{Zi*i;d8ev_Oa-`7q#a)E@S7;cGAkUb7g{I)MWi}^P#^Vnj+;dWN)TtVVKRm
z84W2L_nQyqj!wVs%fLuP~dhB>pAz*xb|36~b!*uQg`X>sY4|
zDC9yFh1j^nKT^ukaVg%|FDS}B
zX*~{q5%<3-og>R_hbfXc?k5g0w}s3ZJTP)OgSGRwsCGZ6%k(Sa-#931G6y5!4
z#rgf(Wn*1l;hc^U+kXB1!q~V=bh^s+HNuFsWhhh5k29bDF&Vh*UijJhGHPwiZ+d^Y
z^9f>EMDtP1Cx6Uc#Ih*K#UKbhCTBFW(mX*TSjE5$vYeTuI8G||
z4r7f#h?ioGd<|dwu`AEH(eo81w^Q$?m)Y*JInBjQ@Z4Dexp<2z+yqRW9p+fwg)qcH
zyO?9Ou#Y0vvvqx4+ecAZE{%1ph!aeF`lU0>lW_~|oixREnQg+QtjO#9T*(ivWC|>Q
zDVKd&8}qdh~iZk5d9#xH(6w9WvboMcpFFIbH
z#V_Xk-tzgy#}X!@`w2?<4Nj0HyP_;9_}ldRRXCem=UL2KwY*U>fZwZ}$r23&c*H6i+HlCscybI&+I_J%fZucj@&pYs;
z_7JEu3{SDOi~1eXb8;47j-J&ub&g8Mq}}z3*2)XDjyLgsu8rEqi{}Ua=;YpC_8sfR
zcWF|2zF=i;1AUF^F)9TNz8<5~bd#cuyzuwP>Flhoi9SWM6%Mil=6{
zq`a=yTn^7F@`6H)PARVWJ-O$*v?c3SF-8S!Sn~zsWA-y_u8h5ZqvLV1SJzZJaK-b8
zzgEdvZI4zP_h_{foQf6pX!XS!+b-j8gP6Ysz~3}mSdZ`3
z^RI8XwEgWAgVfu~VL;{cHY=~arB}$s*t)THfg$K^-iJ&z#8NMQU!SchGHmQltOXT^Chn@n-u|
z&7CRtr?!Dlj~C=F%O|m*@$bcWai?QHiHtv09+zXlwKMuOzi{bHKJ6U6bPkF*VR3Je
zhLgMpKTO*nMW@G#Yc!I7VzutlP|=%Bv;I8b_xQP!_G{!?ii;3#
zqw$3#-!9~{DV;x7j2j2(Q@Iy~om8sjb5joCkJ_=o~JW8li8@ynNq(n2(4ij
zhY9*ad-&fLHDF@h`wJiOEw^V3T#r7^a%GH0&vJcB2DigM0wPs^z&`@k5n4#_o4{{E
zlIPgcn@tnFkH@(TL-al5>J*d;uvG_a;;xJ3O8an^1NcbVrxk#JqVjM^tD^8>Q4HA+qGmVhyVYV#0F0
z>1-LtZ*dgYP;w)G_uuEq0^=~
zuQTcn{$O*UU3ca+dNXUiMP1i8g|_vaqT_*93UTj$Rj1pS^yX7K|B(7(jDzQ~
z*`wEe3D<~1G4O=
zChO
zH?5jr*-!F+R@&#RVp%qMRK#UJ$+B@rpck^Nd|37w-a)NhEGy*WL|&0&C6WOUa;!e7
zs
z);^=?e|*zZaRrRn(k|0+5nWE@;t{sPkEun0ssI2|NjF3&glUG
H&#M3c>(w*s

delta 12419
zcmV-}FnrJ5X6|EuABzY80000001JFl&5GMF5WeRrhJ-*1NwAe{()iRiLQ;vuqRq%o;W9=;=YTWAkG$!O;Lm8a7ww84|n^!qf`@r2flCZh>F7_t}%t^tXR
z1MlFQso;^f#TtYt#JUg}h%8_8_MvyJMUB*hdj(o_7ZYZGPVFS^E66SzKwmH!M)Q9c&;%*^e4KiU_iMFsOB?9uTimMsJ!kP<46&*
zNLu1FZ9qdR^g#aqgbkbW&h}6m=pxf0b7<{DrJOc!MXCouGNFlsy!Nibq!q!RK>aC*
z;~N**+Bq11lMMX=|Dz5ctOd`EA<4}k7pDI>pOsiKjxM7LfI7e~iG1ZQ8E?`B-&t1K5xVwEq&E7y*>I7Wz4Hi~{QR5f^3
zQr0R|$#AXog@@~R*)p5cManaG(v?zLe?~n>Tz%mCk1vN|>8O3vE|OhV+idRg<=tjG
zdcXe(v&#Y20e^4WO1J3e@+%PD(gmflj2Ia(Um8rQyA_)-5@feZGy=ON9TI{eY46F=
z`R{kFv1dFsHjwA+yR{o&?0H|a-q)H>KK(?RPUJXELLw*pO6i#HKU{6z+B420`uW-o
z#y8%65R7Uxxar(@#%J0akzi1}@o2~R%x-#QLy2owIS4v8)L?)4^W`HvYkb|`eV~oIp>yZ1js2Z*_xOJU%MI@C9s}?BF1Y)=4|-qs
zf%|!K_rbX1n^|P>%MZ_Yci!6id_B6m8&96SyV>1_Uq*bxVYKVZYvXh0rgwMO@M{gx
z-y|5hK7U&;jiu$99nzP5V%*g@iuF3cq8JXy}vq!
zZ?MO`VKBF6d9=pGIOktSV-^^e_1`WP^~dwk*MB`*j@i-(M$4r~-JV$UIqi(t`0M&_
z-&=d$+~qww7}Wj;>)_gYp7Ho)KMkpA?uEO=DGfdJ+#-b|C@Jb!rc)nfU}L`IApVFJ268TV{w}gB3x6iGum5BteqdY
zF>SOXcmwy+@aSKb&-RvQz^1t5c~D!nsi;3#!nl3oFPxwi%ty~NgJyj-v9D&@7f<@)
z<$dv!eevUc&9JZ8=GJK?eYI{&`)bj~?SHYpZfWauUn}fu1@r1AYuGJc!|us7?4DXf
zlW^$EYIzH=z=x9ijIJ5HSblqO{Z-alB|Hh*nQ
z8{g{#FKyei_Rw?S4k)S7=cQ;Pskg+lxwOXn`SU0+26UD^C*{vSUDHpdz{|w6;qNrQ
ze~IpQBy`OFJ&mWkm;1;hP8j#;{r&W1=S0LDgok4UxW?y|>x1o@_q(vx2l!ahzm`55
z&-Z}vf@fNr4W8p=(th8xOV?0qV}EnHjpnH~W~bX&9c=^Fh@WgDA{Fr9CGZd;JcKjm
z#NDU*uxr+LQQt9XH)i$j@Tnf{Ooy8NxX!x6`crr3n30Knc03BpJ3_kPyTK!6jimmd
z-jMrg<9-tS8w)s#ogLw@hXU5h;Cm1wJ@F7eEMxBhfwX9ih`Ahtt+>BCF@HzIRpyNN
z+^MsFUfaXhxL&9JKkZlcT91bUrmfC?v}a>4c=jI~F7;pQ{{Z@Y9cuGg;e0~)+q$Z^
z>h!8rYaOmby>ZnVw94mkwWReyt5tpmJo+hWI)Hshw1L0u>V?yYU-1_f3A$P6=cRFl
zxU4ZA)M)e5CkM_1ppwYB+J87Nh(BKFmB0lhbHg?{((X@V(Wi-huHbKc^)lqYSaikd
z%ddDSaIGwxa`sSLl#U~2!(W2tr|TU7Zw2FtRxeKSjBGqDD>+L^v`r3YD^?&+9yQ+S>U4N(p{T+XzK)7KWL*f91YfjngmhU2N_8m^Q(^uTf
z9XFl+E1hnUW;;8Rm*JJyM)Dlm^sr4cX%nC|n(kh=vOU$-v38)1YiuJ*+JH^kbcgNu
zSC`N>z&k00&2D?x_(iJdo~RFJy9@`5@rFrX0LgZDxQKr(0DrR%hQG>qmj#SL(5^A<
z?0ep`_kV!nT>E3I_J5M~w3D^~y2E(*qfYDbkKvwL>zaEw-ye;*J{Tsj1bex`y+mFV
z5FfSIJ}ax!Xw>By3I#72HltVPNBl~E#HDNV<28f(a0X~Lbbdt6?;kN0|E6&{&iLK<
z5zGBtC36C3jelCSy=V>Ehvx%$$hJ5afQRh_E^QnBwp;ajYeDOacD)Q9;VCp$!3)-D
zt39YMD)|xUhhRUzcQ~|l+p66j&f~Vxs^m2Wt=mdGZzl-CHsSB?&yXMt7d}hRm)uV~
z!H+i3?&fbNp0bxXZgsmXu0LGSZ9RU0m4{#5dW$`5&D&I
z1FOgNt8KQQwhd?$iT6yj_r|W;G3zdXFPO$HD(bbb-WU|X0J^O*_?X7OUw{Is$JCtNKjG#csDxRJK=dC-Zt@+uH#nmGjcuY&_j&
zeIsn!O@A{c2Yn;YbkNU~-M_^5wCr7mXa5ks#hzTTw|4#NA>Q8C*|hO;pY@OYh&=-y
zd^jCG(CJ|MP(~A`jp;)b-Wfhjr=>iP53r}sw@(c>xM7y>GJH-A;G69Y)c4oSClj_@
zy92|5zWvUP5x6e%tr43C^_go4
z_%{i)Yn#FI+Nb`6u%)|ZMr1MQC!j&cxPd0!xy2BF5}TSEIH$f(*Mza4H+CmI;_mvV
z+700CNzWbcdTu1>!13`0F6&L)ac`H%6UW!#i|;O%%m@Y(_vE|5_49;(U|jHSr`Bxr
zA%B%;Pwc~d$$Y~#&e+@id-j!tr`J{PS7@=_z&yQHvhC=-ZJ)6Z#q;?aFc_ZE+WpCO
zIlwD%_c!8}lQ4)V40skc=$_su)Vr{VBg@$yetS6C_6tk+WT-P8JS_c_PgKM5ctk|clSFcXPmX+_J7+@>{Wkfo^1O!`w>5|>EaaZ{2=TVXwu2{
zwk(kWcB~toG1ficFmkHzE@8;Codpxft2`~(o8X6z_H7D$07G4#g~O9~{WIPb{LmYF
zS|l{Hdb}pWaA2IoNgH_23m%`Z1Ga{v?vH|N*JGcbYoAZ!-RDOyShH&b7B+CNM}O?=
zXnb-H4HgI)@Wgw~GvAZv;^cc@+5XJ2oo*`~+ZnXf+}FOId?(<>Su|#gI#cNQEc}w{
zE!kpv5_g5?uCJuEjZbarjtC;
zw$g2%wQeWZqRW(y_b7g85r(o2TYo&gF@v+ezdWvkQ*{_I)!7PI&*}xttL;zY2G(A5
zciV60;Bon``Hpwb;lnfqCaC*+-}|R&PfF|0<_XT=ixJiYuVF;z?PE-s
z(BGZ|pQ%3iB%h_)jLvH_d{3M9d2Mdq(`NI$HfLwF*(U7wZzkk2{x>rogMamxbM~#v
z+l<$F!e^e3TcQK{_WarVdZ}=(Eeb!Sm-+
z^;SzZUmI+4K3|x~z9e14ll3MX#^L#=#u0jK;??})>q>l6$UuXMaf*K-F1y~J#(SF{
z(9h@$`g!Jin|I^h$S2I3cz^yGGSWHg$gI6_4voEP)mta`?wJ8+H~D~ai8t_1%9A<_
z_JY7-`<{2Q50KZ<2Z9;bYX%Dj4fOWso)eTM7&FhM_c5O3E@!_luOd1zWLXxgWxu&JRQ)0~CQ#hN?1?uPvA=faTwSPXtz7vV@!?|^Pld#wh@9S??eu^v&P7mij@vL4rjJ%0!$
z!oNa?CwVR@7jwIwJO>|Ao1f4lAg`LXC+%pWJ=lv8|A3oS*nfYJA!)?*@4}{r@*lRN
z*@8qnbJ$a3&0N7TbcYd;Lyb=e-;Qp0GKw6`bB_-W&=8sxj7>?tW*Asgs@jdn8`g`_w#xtfRDaBgU&8eFb?|}qJNmf!-$jQ
z+*IkCe%|N$D}U83z1&al6MaTrC)};G-}f<_(wFvJ2kr}eGiv5NX^w}%ZfTb
zwHI)_@y|xv3rQP`YbMJJIzizlhOS40-?7{eg0}Y%=5awb>3%4^U}2B5av>{sQ#YpH
zaaYpYT7Rt8e&aYZ{2-Dh4Ts+ZT$<=3Li)LNDLl*R5S^V#hJE_2J{0gNd`jf{b7JE9
zqc4}l6F(5zVZZY0{^K|5IC9_9&uo27(lnDD73-Vo8*^*$%6`PKr%6AraTo2S1J;#m
zX#$?Jp^X)w_lqHSl&wF7wQIVbm--5%-=EmqLVxIOs@kjnV*mVn&9zmh|Ges-#Wtb{
zXjcUD;!b!m;f~}fcKRMD`vBP~T)Bf^lRiz~&v*@V`oMPK!%o*+&=7=${w~a|m#&LN
zygVdqi~b(~D?1wYwR%yu578!qZH)lX!?gWd&u09I>d
zhe)es{okE(x<_uab33L>1LqpwbxP?Vd%7j(ytAXRT4&rkpkg8Lor1Q=@%Wv!d4D~V
zyj;XA&p#N)`mWq!T{#tYgn`pYgj~i%p2Odg$BUMBGf^Tf!Pyw!1}^9xy0SVKbM6H0DB%s!
z_W=08xe<(9>4#8km-Z$C=fG#LH-DiMIj0pmt4229;8iqi3V*D(=|a)y9-Yq>ZUfw2
z_8noXi)+_#HX0ed2ev%|x)zbJ
z%N>b7#GK|vZ{9ViEX(1O;V&wE%oILD-;@CzmiUf@RX#(k(dB24?+14j{eS9FV-5pU
zGz)0h5BeHQpSDb&K;E@(qCF9l;E5Or&+@$+8jKnP(kP=p4*G-bx`}U?HZJrT>zZ8n
zj^@5gzc0iw-=Esk#J;e%gr4kqISgP8(I;ojmiv)459qTImieb(zZGjoa$}tVW=3as
zU?+6EM(uQudvjVS&*8QuuYbmQat`m=ck~z3@!@;cI`wyCVOOkWZv0xg!u23Kap1EQ
zeddwV-+s*eD*wZCCE8BM{nZcl?!LEN`>-+S-;(MEHps?p0GZm3d9mbmev4gfr;kfjDM%+A%*~KLTAQ9)R#01Z6O?J
z{w}ncZ&%nmuw7mEqwpdIvXEKmtW29n$vEl$Ycj_1o~FMAUwZYG9;}1r&y>nOHZtn)
z*93Z*=!{aI7@c0KGPMT$P(P;2BuWl}b8Dl#4TEkvw$2Y!>QALz;>+Wj9+M4I+!vjY
z_k_Q%6@LlY2V;&7^mKA9aEz!1nW6s7ZYmseM2?IQ*F18%UVfoR=XJY%V$10CJLxzT
zE~$cB%E;L`yr6?*KZ(*wtr#|j#&$jivEMKH&@_CuR
zcsk!w|Fe`o!}CU<>siQ^ZbzI^xF=^s|rmhwfyeUmT<@0#ozs%nYU$|d4F4WAui&;KE8CccFC@<@set6BpF-jZ?wBh
zJ-cZY;WEnk2b9_Svo$4RPbHr=xuJ4j2*QQzqxf6s_Rm<0Q|nI%sak)+NpAgfzYB0E
z*TmG};6&e~`s|a!*(Zg)kIvouqy3X({gXofRdbK3ae%J-1-8?kLGLZ@2)jZ`n}033
z_k>*n=#uzM^|6Qk;Lppa-P@uno;>w=Kt%wsc{3m$c21@v(guO@Y?<5yYi8=QdR1M0
zemfSDbKo%yGg%6Qs|d1Qwy;C#{YQs3kD#a7BZM!OX78x1TZW&i&MM3y%zQ@B28HXl
zIb6T+laq9U(xS@nmKq15r5W|UrwZSGBX=>8?cra#Lmme#6G3lAQQVnx1rUY
zxDxLite1H(=18q`r1{?~@J$n^8LNl-vevPy0a*W0N)2Blz
zyGy?yv}fjjM=D=Jb4U8cm^CGHMP|ZJo8}5-uCg`jDIPNqo3;j<%U*doOn*`3Hz?X!
zbsa7Z`^p~!9VCF6`ZjnNmgpreCUgU1lX!GFD%D4MaCVm?
zT6|aPa9@{o^~@VAM^c|^g3t#NiYfGRzn!+wweYx1e|hjs#ttZ-Y5C43-t{%zw47Ju
zL^C@QMltiE%bilcYYh*V`hj-?T3S!`9ai;iH&MO?K{M$aa}OkPbAQtA&mhBDn16u%
zA_)6RH(ORF<6lrOA@$&c2jy3|u~Fw40fS&hJk8mJGFaJMTl_YWvt;}Y>UvAc-+Gf2d7#sTx@Jx{0=#n&=JlGZ5L(*+wuCKeb7#uF
z*NK!-K-Tw?JXCBab5o_CLPwp-#8SWV{IsNRd?DgLiZ?YB@J-X@>2alJ!MhEV6o2Ro=3T#mtud;8P;lme6KbG}0@gZGWI`3-d
z?56|PdlwF_8rOUMqh!7;9ai+*S<^m!g_9SZ@{ua?>9x_je0M}1uO!!6Dj%558UEpL
z6s7J-k5|_DN~v#>__`I)gZDFj`GGE4ZT79ZMSq&F;*(o_+6FmvYkte*>J3OIn4ixE
z!LMjPKdtjIOLacQy2_{Jp|1SAD|D3y`jskO)yx$3H4xlpQNdrdnf1La9XIov%CBbW
zmX}L^o7dD==Dm8Ms&TKPP%wnRKQs&Ly*jnttLpV$6@8E6AFpiLr5bOX)6Xfte$B6a
zCV%V?vm~wvy+uR_e!0qunE;!|sfh;~TQ
z&bGXrt=5kGzAdz4&QKR;CUP;-I?Z3Vlus*ruG{Q&xvqF7H5=^87CHqWi%~*jffqT5
z)zsIvEcd{AUtZqYQ?U=q*8!8EVWqHiiLMCBRi
zJ4E3P#FrXA$#_A6-aiqXxWsqlH%sL8pRtm)be=TFYf9O^39`N93(9z0G#(3oY(6t(
zoRReXAu-z#Ge4&xVbTwWndC6uWe1ChbIaPu`DrS-n>c861wN3Vw1aSE3w`n!_s7|+^^{JG?w?fPb@@&eEMRQRpyvh10BH})m^y>MpyUid5A
z6MJX&B@Y~XA|EgAtu6By_f4CQ=6`{KF&zKe95-ci+^D?8|Mnc4<#TLib8PD#T;RN
z(jNfjU-29BLSv3-j2B$T|4AQaD0J{EzR`J-2ymFhCA7y&_0_;ND;<4Rxqp@~TF>#;
z)p8{#@q-0>NzS&k%4|!SzP4GVqd3SJqw&%Q&!i4DigW(CWqOXxW}V(mAY+OVFBkX|
zQ6_x|aqRLQf-Dwzg}&@OS~)YlouaRljORssF55z%Fnm|qF^>4n3E#yse?H!c#X9Id
zaR@`O4gy}K-w@8B;Llmmi+|af?1jGh!tpW^yc_Bc*mof>MrHgK>K+PfUz+o$xJQ_O
zqO4C%A1ri1az4^uO2TOCu5&B>I$>?Hy>5wOF<$hYYPnSLyob34y$YNe-xQx&d>8fhGNw%9M>F|xH6td#JjfHd_sbybVj*Z#j{MBS^T8(U4w%NV?wqR{Rm3!KP1R(wcVR?TM)o_W!(%1Z1k83%r%_u
z10K#u7&R}V8LvB8oL(LdgI?=Klch=0x3=y?+n-WdAP0+@?m^yvj&^~yT+{fG>UxC9_>J#(KuStAszMEoLVvU&Jz1*{EiRkgkk?PR)}mQ8PwPk%z$M%o$&FL53=h{Tl`6oKKu
zt7et$5@>!dj;3g*MA~0fUMz#wa$`zux3d{)7lC-7ZZ7BJa7Lbi;yW6Sot;ZlYL?2E
zv_c+5gQEN8T?PGYq846$6rtp(c
zdF{<$m0MTqo}?
zKWZ^5KuZwE>g}ZOYB4Xu=UzRZyB}4%xjuoE$v!cUM>;-)@sC+dN)kVyjY&K&v_&w+
zMSpLrbX-X+fT~|HE`sB-`c%!obXI@7jAr%U4r*PNKp&Df($fmFFZ<=S1h5
zffhVsTi5Ru0ET=4e
z{;bEIR=rc11GgkjJLiW?ABL(di(AY4QGXQP&-n)wo|XPS=4%zLed#C52EBLsTjlS4
z5V9cN9||n0f8$v}V?;@apnriZUURO^xYJB+>83J_629*l*LOp!>@1lZ_<)^W~
zvbcA7ZbD67)A{synApC`o*^DA;T1JsOdEYMZS=)V?@88uF=Oech-0L@bbri5i?Yb`Q^T+5tw703sO)ql+V{rTmmS}^~vp@@1fFm)_JDnIhuR-Q3ww$an
z!Ep9n@)I)Ny*w{;^B`WU7=O>T`!nQ8tQS%CJt^a%3?Tf9nocgqYFU0&Ew`$=e_Q44
z+@OIH-IJojm=kg;=7f~ff^CvQy;-_MRD%m-`6Fi46^>a52^E{Qf
zf9$=ylSaSJ%(bWRnI>!MdINQSG#Z@4kwrb@JM-_U{!@QWZv^L%j(?Z4W4vGSTo&_N
z;C+E;lb7%n-<01y7?bjH+<%bYOV6Y7nH1}23LGu-q3W^*Das=<#-se568`cyys8`{
zc#$WW*_Z)3^^@Xw7sO9Lm%B%lCHLF#i4W99x520OX`z2l{icK;g^UwU_3ye~UgVus
zb!@%PM%8KN>&&!V@P8)yDk%J75*7bx?#w=FuH;?XT3&IWI}s3Vp3~X2fF`3aoBfR`
z|K261k97S-(H^N|HEp3ws473uG58-7m`2^EF1r_Xwh8WNEr5yq27Dc9^*%y%t%wVf4z72iZ2&_p=p`CmnHED
zU5Ro0F|s?Q%YS5&wj<%vR5A&j&($4NsB6>xJvHBm+`0M>b5)9d8ryFNG>Owja$k9R
zKSC2@SHrvxJk_I~%qfTXtx5(cc~+V)OWtLd`FO#>0(1la(j4f?T{k+sp$yJ?G7dO-
zuICFY-Uq4LUd>Frvl;eihW;UVKR6q<6}|d%Ltlq)z<&!cBJUg5;VNr~+W*6MCUEq^dJxS-v@}#9Y^@F=<
zQ7Az^6WtWabW=KAJcujKVll*3G=QzSspk^c
z{VZS)%KVTvWw=_?Zwa3Z{Vta>JTK)0^!>v)27kbiK*Map
zD}T3-xCcqh##QU8MeBoB>tr4dUFUe^R{NjodPnAm>YkwEz6cxj-g{)BE85VNV0oit`UO(q2Qt%(m&VJq|
zU%X>2rR_&@xsp=dH1Zu`az7CI;HsDrd4D&Wo=+mnKb!H&#rIK9s=~4!?}1G&e|>Fm7t<45#EFqbXCG{GJY{5Axnel>0EI
z5b4sH>us*^-XVl5lIdp!y*|{B9o**!uv}JlE?ub7{hKq9FB<(yRvh!S<9;!A&xG6@r`zOcxCnf!pbNWBx1Dc(U$R-%nXWJrYtGautEZi{CZdT;jI2cD&dD)nc_8lLt`(cbm{=8L{OMS3jmgNl&(Yk#Q9~{B?D}TlZANoXP
zciQVQio}o3iW{!Vu`hY7TC3EjAc>=lxXQ(_pU;gnej3kns$+@R{64Wg74^nt=bRkc
zxZi(I28^jPSAbEX$4~tSogHts`^uio`%aS@|3xh~u;}D5`0Ro_=XQFA?>$q!PN!cp
zEGuxiK~YrUoPZP#A|@de6MuSe_(a1M>5$|-fcN>Qaq0)R%KYH;HYw_DIQQJ%h;^3v
zdQlT42}i_RT$r|&_Y3&9W?ytZ@_KHK`JDi2dbr8+ahk&`#2j8BrU3!IF*jEjE=&PP
zqT!bH8G#H7ix!Fd1`qor6nGVp=GLfnaLw4<^T)|uT9L?72Ix=3DSsE{DY{(-kE5Q;
zEW}eKePg;5n6E8(r-Qy>aZxAWvbn`3pAY)SykVk$yJ_ONKIortLAR~BJ6V2aHLC+`
zisgD^f1bwfZ*T^fG6D5MD&_%%#Xg~wxPKu7=Z#)A-{p|MK%i86ofVkvejbC0~%3n1?FUh3s}^rCiQDrm8YY?F=xZzX}=^rTqLQRHH~%Exl8&b>3`AVT-3cJY7|hHi@M1`
zpf0XXa(0t`FL`ogle(8`h&)-V%e1Ft%%UZ%kNt{qqz|z!$8F)cx?Hcz^}6sfPf>`h
zoBZOG)&~FOQ@1y#V~S_`(FJJ|U_EdXeLEYu78xfv5%J{X++ft}H6q}DNi>TZgp|r>
zDJ)mzm&x6WDS!P^H9AH$zN=JbDdPMp+V~#1Ii?LYt`j+7P}hQ{gjpd*P|FcuE1CI`
zE_I)ZgLfpI{MJeC0)dsYQI^(yP}lB9<$qhuPw+9ZvkCorWg?tBUUu3x*GjaFle|i^{T$i%7Z|M5;&40=S5kTTim4_&1-34&I)1NKD
z^Dfc1T;}}gB5*9?E}gax-e0%M^I}}>Kj!o~sSdPMH!Syv5mI*V{Lz@&Zt54G#Eyms
zy4u3?>^x-rYnbl4;@n)Abfkv&RB&FD1Y~?iYF?$YgUUVQe|ODJW&--
z{a*Y3sVuYmb1C3LoDD`_2%`_AHmKG99{>OV|Nr80P~ZXp009600|4=mTNJ;i004xz
BbJzd?

diff --git a/Logic/synwork/BUS68030_mult_srs/skeleton.srs b/Logic/synwork/BUS68030_mult_srs/skeleton.srs
index 60904db67cec9507cde5a845524465c9c8fc7a1c..ccb7ca09920ffb44ececefefe7432a82a4a35159 100644
GIT binary patch
delta 1233
zcmV;?1TOo(34#icL4Q_DZ=*;MJ`ca56>^9VK}K$c04E-1IxEA3l1!p#t&$0z*zK{Q
z0Xq_-`S06}?PPW@o5!5GtGfBR>Z=zJ!_Akd0n_WY#gy{^CS#V|Mq!h5xj}eZtXnlk6
zn*GIsj9t6HHSL$HzR~eK{(+fZuA3;oMg|&x(d&7mComkJoorjlS`@(|e`X`+63%=b>x6@0$<$QbjI2F&A{Bq0vt4Dt2J&~e#y7;A?xf2rvN=eugN@~aDwk9Spo26~-
z6x4u6TeP!uM(e_{jYs(n69g@vY^>Tb3Pad{zC|{*MGQk;QTSBU4scsIHRYP^G6M0v
zxx*b1zIxLekb%PSc-z|+wcs7?i9Ej*t3parC(vJUEPr_FF6WxZpj`?7c#rv5t+-oo
z&1X>YRqr>ez+aiTdC*cfQu`FGMTeVtByC#xl{Da9z445@&VM#x=XYqjNVR7MJF`PV
zmZmySaaZxW;D+sRsM4L{x8{apGl?VRe!qjXa%w~QCu3j<>aTjf{kd4F_lQ{d4Gh;>
z;6?ysjeqe~puQK2oqA&dd$GX1=zSY7FtxejX<)iU$`iO#ck5@LDjSZg`cAa_R9Gl1
zGQedeJd!{bx_Y3ANFt^!%KXB)C4}^SpzKJ+zLiXN#5~;JV0E_#dE5#QJCk@zQB?#t
z^bTL}JM_#Y5<$EQRqX$Je@0NsGuq?(=`xqA^M9RlWeey*i%aY45?bq|S3E2N@W1*9
z{zBzIF0~G@VFSXN`*elP
z%YR%k60Y|-U2byd_`J4dpUTfck0Z>RaF``f>eJu&WvBWEq#ar&2i0QY!~S!))d{!y
z4Y&F%uJU_8;qK_a%;-HBGVX43qd}Q(>Ta%TE75Z}&tr_TW*F*83EI@nIed4992z0(
zra0K9dS9{Tud$FiWv8;MFgVJ1lrZ0PwSVewkmRZ-=fkMU$}rJgm}=j1;Nb8fG_3D;
zGTtw}@3A)QV{Z4D<(Q4%6YEsWS~|npHm>@;F{`gK`!&~DGA_08+qs+d^*EzjX_wm9
z?aY9!o#{y!#IUAgOqg4a-@~Ko_h``iLiY2%_uIw=gju4mgPzmzn3W&naC+cy`hUkb
zd^&OX^d~r!jsC=8A!pX7IV@;RUpOr2r#Mu7Ok&k)mRcP5Yw?=jE*kHu6aHE!TpmQ<
zbPPvd{_f?Jzn!@$To3Z80
zCpZ{T0^T4S9AYhPqybJEt$BN_n0ssI2|NjF3*VW}N+6n*w0QZEa

delta 1166
zcmV;91abR<3cm@EL4TIrZ=*O6z@OKDg;n~nJQM}R3JpB*u`E3WT1HB`s;(MA$!;=i
z8VpG)vD*LrY&PBY?%{O3=E=<1{&~ip4uuRG*6qhhCqVXcG
zuQ08XKay~fTzWu^{q*!61JBd%xG=VL7nhfq0Hfb}qwI_fMxV}}ZL9HnWQ@k0XPhy}
zZpNu`j%k#9NW$*&2b@tbapsfxo#3tO(Ui#<+~4QB
z)~$pE4^z3j&+kQBxl`*w?MWm@C*T{Wb*;*hQ^3ICo7Ul$rIu*EkgW?em2NADO}&Ie
z`o-Skp36X=>6_ft9G`ZBZSfBLqdl=7?Bu#qlF~^G)_;T*<=(1begeC-436uP0Gl;=
z6|o?JhSr1MNdv*!#?2key;y(e=q!8O6tS{t9W=^-FZzrp-1otg4f~)++e5*g64={4
za=x?I%s*yg=U=evn$YiXD`3_ZlVc|%rd^fcnxjgLDP4?XWwSI%m?E%#EPWsr}++WG2
z;kXgE_?zFOZ?BL`?l-94{-5jbIV$;H4E!Kpm49kU=6kaktn;
znc=~leJz2&r4e+Aj%Os%4)IL<*XVFOkZh+Z)WX1Q$d|V=#gQpqF~$F9nslqoBm^{X
z34e$NIVW7z1*DmUhR)Tk$I2cy#k3{G&Oq0Qu8c?7BHGRk`1?KfLr$v;1D*3!6QsSs
z;rm_OU$p|8SKQ_VT;;b=b!zZmZFN-isvNO8cI9n1CG=FZQ&pSGb1>2v%Ptx%GT0jP
zS22|wYadDhwyqhk-U4f(>=I~by@wWqZGX9G`$FeyW|VMVrWh}}QDkIWU~{h|`09=b
zI++Z$4=vF?sMq&-RXrJ{y$=}w?`#gfDNF>@=jO5J)FQR8n}yw*
zYLH{={|ljP)ps}a9lSIMD)oDo3hi@c(VO~Du*!1`1muvfYDxtr*Ga11C&BB4rT^|D
g^BDUJ00960;&M>n0ssI2|NjF3ga@COuks220Qf*rdjJ3c

diff --git a/Logic/synwork/BUS68030_s.srs b/Logic/synwork/BUS68030_s.srs
index 37915765728811045e2181c5fc5a46279e8b43f8..c56c2243139cb2bdbc6fdee1dc4626cf375a6eb0 100644
GIT binary patch
delta 9559
zcmV-dC8*k&VX$M6Gk6;DWU^{NwgEqRjM
z%)=jkC$}ARurW$7wuN-}dmc%5$4AoxTdTNN5{d!t2HiDS4)FN(^A&7O+hL}_DocGvBh*$9~l-9H_=>q*Qhf6IM0dBg%Vt-Y8_^|y5$$Fhdfe=DX
z=LYv22=_HQaHjNoZWVAX!PoS6&Ip{$NhA7JY0rHy5`sEwI*ZD4JAgO;2DW?vqniN=
z1-&C25<>`MCD%g19(_FtdSzQT$qS<;1}z7s1P*(P-YX5XJ*6F4tE^JN&~x%1>hP&)
zz!1>}xj9%xZhvJj0&ot-f<)&n7X7pv67X;AhA}M*PmU?E#scXK!f}!gQ5^+bE8h_0
zw=v>;u?W}Z36e89=*=?Sq-&tVUOnIQ&A0o@o9nyHY>d3=#`A}})mglZ$0%6yL#Iaf
za{D>WjFC3vfh^PIkC7}J5)nqCu12T6_q225%^1<79e+AMQO2ktpJUYH7?mi~F|xcJ
zBUf`9(u}5nW=!LlM0xLxqeZN=u`2JiR3&O9^9GB+DaO6AyV=q4_ThFjyVx*>uDiN;
zytvJ`4b=sTG>;hzmJ99_V+HC}#+b;TYS}E*4>j9Rp(be>pTyb!V@R1XLeR*Fsn`}R
z?})Wb;(zR9d3yRTmh*B!gWs0ueHTV|F0VO#x?Ob;pqELq$_|0j)Sgtbhd}kM%?0nU
zeFIyr&fWu~+Vk~6Txmzes{VG7TVheKTgO<-{ZC5eEmoW{s(u-|y5?d>i&N7@e#clv
z#`+=@T7}|ufxdAZ6}@|vIbCP#ZQ9i^pCeWwO$X|E|8=mfN$Z
z1Skgq36szZGy&$b84Ml)0SJ>g4Ko${8G8h|lHe_B`q)vB#Fv<^7UPm#zCrGzi#{_h$3QV-Wh$16y{c%gKGG
z^=`x7QODat9hz=E_9+M%-GzL&*njYz->p0se-9Hn{#8A`qbyudzVUawOMASmOMas+
zDeDruuK10*qO2?Ix-zdz94~>oBu>h@qlo*X#oQks=*jyq
zM-rNN#0z2;?mn?FqMR>A{`@fVld&f%ZFq-7WMjss!}ia^uubXKi(BK#=6@Y~=fuzk
zpprwKfZ|;
zTuQ0hif$hl@(q_al0E&%rdU2vF$$;0dfNt?YA>96UzH3mB(===Q|eGjpS!bRAezm%?7?
zF)p*0r<;tww)^~kpWU=y_%K`YyQke93p2`JvgH%+-@NjyeSgFE?SCPZ+}$moS`7Yk
zu5Rlt-$&>xg|S1wsR(4g7iZesv!9=F{@K&ZGJEAW{d?Zd+BbWi4PW@@{m--g{p9=4
zdfy#bSl|H(|IFIHL#9>C$9}-$vvio)AcReoxZD4zZ
zcvR2JuE+1!!=|z)R(;p)B}IF{tZ8+fB(Arj3!cGjq#UxB4Cg0d&0bnrzOPW*Rr?C0
z6r}mS4k=d^a8L5~hNe9}%-fp0WO{8#zBUBbM(DNqj+6mwV1GZWzmxlQS&x92QT1q9
z?>STRf9Bsa=uExqxk``(o5A=#Klt+Jcm6tESD%0W;IGRyzi+Mcc?yq8
zU^~?Y6V5H$t)_hcqs{(#w*UU*uWNgZBA*-7p^hG-`L39s{odGyAYKgp6X_+2S2cfA
zdKhn*=6^~TV}DlYlEb*%UxE88V1ErC>=hwMdEmojH)i3K^1b|__VvJ$F^)m)(fA-r
zc_ADDODzQG2Hj4VAA5{bC98P1NBit*UGiViul4;J=mEMO?xdoTHOgDy#o=_FL5D-D
zuNdbWrjRDqPZ);Lh^z%2SWpBD}y?kO8)eWv8tWZ2hxmIxO#ATWhf
z>=}W&Zx%Df2Wpo>vf#5fxXzoY&&>K;c0&RZ(}gxtX~}5QMyPaL;Ax#@D*?Kts
z?Y3y6yMLKu8{hVW>5o_bbA831+mgF{L)m=M<+H(?Z<+?5`BfYA6KA+qu-3f&e8nfO
z)H;p|AV^pwNsBq^wqFKnU2gbmzkPF`?T2mtvd{QW`kDXEH%h+KtfXO*fI1~I@wP++
z!sreoV+tBHvWaG#X_;l@jPw*`^awk$o!|41JAbz89ewOWLLc}W*coiLin=SGMgFX-
zo?E`6tD-g~3pQeGv>3G(jdEecR;xySww`fahkG{t(dR$Eww9-M=f0Eg4a)siNB!RA
ze}zFW3_h`F)|t>wqik4pN2~8$_6+pNvhN@PhwOQpDOuKMUzdhYqe&|`vO#Y?=)?Gn|Oa8nc5(##O99NzX
z&wB#)hN7LXKl@89FD9I-K4!-r59Y_mhcNP&tn)ksc5Ip}=**6$gRPR^KyqR$Mk!mN
z{6;zbyyjPKn@e0%i>A-gI)fohS-viluYb#v@l08#((WJa!Dz*D*&=x|RBK`6DcHHP
zkTr@=rSQi4>s%K9iXQNr4#>!$6|rdW@i+n-I6Uq^r#w=rdUPk#VQ
zpdey9(&Z7#R`yTWetzctj7{5(wu}Qq^+ZZRlZ#PY-A|AQ6}dAVp6>Op_y_k}ui0ON
zZWsbpN4-xo3RJDf;8KJ-U=t*65;BiGk@RE@@5ds=4{i&`oXusW;tWeWMAb!E&oARyIYi6
zpp2MEqfg<;v=a_?Vj=hpu}>(uuiM;x8-!d4qgTHBN}l908R#V&uBTup$x=3B2U4lY
zNUAwE+U-ww%RA0xclYDAJkHmaUlZWJVxA7jTnEenz`%~0C)7(BY@Fg$i{Px(gt`hOcHTCB&Eopy0fi1!QIuNf;_vI%_-H=mfjt{`v0PP%!TqV2zw
z{C>Cws7rq>n`}7%q$Q9pkS=ZcvvB!r{)X>@9uGG?TlTmpTjzY&1Kr&_CpSvkkEKXl
zFGl9aK3-UL-}dd?uCA|-wKh$BYVj6mz!WukiT?}UQvS(^=6`xUZ_BCh7sy>F2L5tf
z2{fp&J2~z?vhYaw$AU*n9!g>YJe+_y(Y}kqR*(uG)pFENJ7ETKs2_|3lX
zC1@ONzbpH`zt8;+$V0_%YRy{hi|xMF+I>A~_w{nSTUZldjV<$XnWOPK)RE(ZJb6Fo
zn`ONg+p(&T*nj@EMSj^It@UTWAHZhFG2~|Fx4JzokJUTk1lzwj;pD`xjJinsA7Bxv
zl%+qS{;vJTdMwD}|IgfLZEo~*Zrblj+4%omM_Svr%KL$lvAu3ee%fpIC+kSnE|u$6
zf4BQ>k#S|uShr`7gBTw;-BO%elq%h=e}{IdS*Q9tu78{MCz0M^T%QvIwfQG~(OO@$
z+LyF_SJ+oMU-D;rMQc1(eLpbqCwoPILG!e-H}&_*UWto)MQvXP#t&lRv7mQkXm8UW
zT>V}B$o&$wPZo3&pjqRKAOOz+nhB6+vI|(Wy9E1P?zylqx;zM}u=#%Ze2@e%Xo016
zOOV?%mw!7OW^`6C*~}U-JGMKK1_#GrYyk#}Jx1L+)}RY=25V5`2Mb|U438!~erQp(
zW{vb%kA0N!A{YsvIxlu;9RtI<2^)7+#%Ez6YyTAPF|
z<$o96zi&+&c^CbN6`K|ejf?M`59uYJ$Wy0^WiR=(V82pW7x*uUU5_ZNV$tySk>4up
z)l|lBo*I2j6Cn*Pq{@@J1z<}neq(5dMBCinlzjAi<*q3|!He*e7FaFOcrj_fi-@_b
zn1Y4*1Ob^QVRPc59q}G;caF0~RN!i2V}H@^(f3=u^YVDj@)*cavP%4;E`z~FQGTo5
z;5a+-c@RB@4;`QBSV;$cxLr2*D+qb`Dd?nAWuz`pjE3afHX)cRb(`fS$c
zeNhuWYV>c_c+drYipaB7dK5-Ky`4jdHnN_bb@Gsd{@Q#@*(=u5Fy?*h`5C
ziNqVW&=1u*611Oi
z{SKVS{+KNfU)xgad5NJhF9jY=oFnT6OVP`th_n#tJM8AmaTAGldgUiuB?*cUdPqL1hRb~xJ97*jl6_jX0x5EdUK1aOfD
zHusEF`?7ptI~IynH=6m;^=iht{&fFks%XkPP($+xP$ThNpnM?4)PI@T^g#-nt-N2XnuW_q0D}PxJOrZ|^Br
z&*#QM^87Kvyu{Ea@PE4YYwBksGfZp>`5vT8>g0S6^QNF9)clKF80G7ld}L>1v9OP4
zed~2Up7y`Cp6<|${4HN@J+^vD2ed|~a^t1bJciEG-Nl$0QE}K9o|7!B*F7bF%Z2N5cmu+C2A%E5X~dE82D
z+-liAWxVeDGhYmI+$?+N{c(sN&tYm98-^}GjYyA)Z5`7(c3kvaxyD4T=XL{@t&WA9
zjzyfq+Zf}Fk$)U9#+f+vv60304BjT&3f}%sxruY0!|S;o`<~e`29F}rr=HF=0vz#K
z$B{mBWm77dF_8xUU@i%PMJ;oiPGzE&lUf!caK@OsqkZ&4zBlnI{XAs(Up+RYT?8N?
z|D>*`<5K)}Ewznm$CobAb}Q08mLvgOs2urB1DkAIH)jnL5QMI#m*&y_3vq5bV
z7I;kcwao6G=p8?dNur)f@r=1r$Vb|y*EaT@(hGOQg*NNY2Y8;iV}lhOm7XcRUd)bJ
zz*NkQ(1V+ei)V6hSL4zLikM;YzF|)3_~beLt$#VC)|}E`&dIUnO>z(-Ll(J~i-TC8wdJhlq*>TkGk!V9)V{7n
z&L6ftW9L`2*2>-vW+9)m`Np+##g&yJ91$e>-1?MjUz)J(l+vFjlz#3LVo}VQGCxoL{$4x(^KCsn_PX?GDM^akX)kh)|?$H
z{8r)7s$Y!$k-w(!^Oio`L?V*|e^Bjn*12D{&-tY6T&@qsPOn%_H})ADMc*_r^lhJ!
z(QCMin#;9M-7YKbQtG6hP`R{B#1))M8*O=N{LrOyu(H$R|+$NPzR6MJkC5;UQ#{FFsyIaInb)BD{(|2i&KXl&EYvCKS
z{bZJ$LP;f<=bH0vXn%Q!n12>=O0;_p0B){!pK_3T>DHr8m`
zbIG#&+*qc3Zl$cwayfn3XYQWFR_b{S8S5y%DttjkH(iRaHO2L`uE4f*ED6W0_wVz-
zl<}#^&mOeCF11~DWZiN<-P(SRnqz?qL!&O9WSzP$`lB-=tm{|K*nh!alb3?NnM-~~
zThBC~D|tELukEk+t40UMm0I7EGhd@MTh#aes>k}nHQ&oGx$J9wh;WT_-+Ge_DB7B=
zo6f$--?k-kyV)LbW^)eRavH#0@Wm?w6
z>incY9}Ynopz7gSO@EyO3$lqe$+j}TTDZzK*t$xu**P6NjL+)j+qmMJJ}cuUVXx7S
z1s!GT^ao`;*gC^zVpbHj!>~W)Kd8<*S2>*8POk7xY;-D^A{dTFotjp1tBbrV+*h+U
z*|$Nzq=Eb#8rr*TZSt5E?$YZPqgT#L!J13by8hrG_c5M2f`10jl^1@VI)<>ZUuip1
zu?6B4DW1`*#*iuK`-caW&k)(R7GSWh^4Vokj%Sf>mpqS)q79|vrW!vdcsK#$fEbr@
zMO|+tANf(?fu=I+9Hz-HYC5l3#GMp|v+&J{EX%q%?XqEC(=*d&Heqjm%SI{UBEw1l
z&(6cCxNgDsAb&$mjLeGnn=*G@#&0yfK-t<9D@7Z+Np|VJI`?ZOPs2gL=d<}{!sz93
zJ6nY8Tjn_%%@fvKC{Y
z=KEUyalI}4cHv(aF$yjZR4Q6nF=oEOxTtR1>YHM|Wq;8x^0gXg&%efarj^$!4=p)1
zdI0+?zNxgQb8YSR8pcQU_=>oxiQCr4M~m?xmeliY7$3z2w8v++RXm$-F{#=*--U-j
z@QMpO--0r{;-k=fyopM=EJDf=UgDX6Dpr!+=z%{(!DCb20OB!~AJByTY}``M`!U!l
zkNs(EtAEa54q0=qknur)JV|0Naku$>7ka#-Z-cJ(6>VZOH>I2M+<@4ugUU%cel#{V
zo~Oc?5r`~D=lo$_*ZK2QqVYVH?LV{6GM&34qO`kDZO6=Km7KtA+Wh{DJl$Oq3X?C{
zlqaIG7q)!g|1!N4|HRymM9~)U0;h^u>-$xlGk-bf7cjBNCjWrWCAs87lubTF%Xf0-
zY}r|SbSXb??=zE6uwR$YcFvZ~LwZlxGS^+WFa4g0DW$FP={^iQdt)!ua7Xe7xMSo4
z9@n|Hc$Qelc2RDZxzfcs<6@lCWf?1L(kVrIou*tIol9u;faZIk_lcJKbjAAXlXF?9
zBY!T~fu(+;0`)2d`jfV;Jp?=JM>eIoomJ-lX!{OqvIJ!};F+f1sMfP!6P)A_+V~_c
zbEnSQ{Z*SUX|fMb#$wx!dMtHaZ}9_e^OkscjS%K7jua0~r(aZV16m?KPgS1D0hnoA^G#Q5a&y)gLJs@h-&PKl1eYI}`8w`tMeNj{M+
zlSDNy$;vO1m|rA|{Gv?f2Pt2Yl#Od%gdF~>or|0U5eBef1(t3Pf=!oX?xn;~tT}0sm4}VaW
zQe{iSx^MCBsV-kso(tc)^6yx=@6^tHZ#m}dfXRO^&cKxK$@pJ6J&dR9U!50K(OFJ@
z*2ZC8YTtz_!{}Ou3tebvpXqg{c+gn2iw#`6mHiPS^>z`txuDLO`99>AT
z-GXo@k$)FK*mU<7`Z{&qQ65V!&$!+3JU(puL4ilCdakLL-sSkXsN-l1Yk%s+#zp*&)S;070{&mH7R^$ZRc{tbg*uuHJC}NFCz!$+TWGXKv1PVp}0+zMHvwU(K
z`W0DGp@Cidf*o4KmTbPkSbyp{x@*MLR$r6$MV}x}74Knl@uH{tnI;}4O4njz6`Ln1
z?;kWdarbR=|3rf3mXh{6XCnnhO(r{ME1xIq0k9WQCRcR~3HOYFEse-CC~2`@2sadi1e#opCf
zr;$EeRO-lKLoC0d=VO&S|1W=jor0iJ>&>TqW$&yg-z>n6Z=Q3Bi5K4nfB9f%MWY95
z#hwh>t-D(AY=5cJN5axaJ`X>1H+&(xxmcFzTEN%O}$~=oa
zUc8D*KVaX#uAg&il!NHDEJFs^y*vTQi}(`te4^gzwb{*8>*~CH
zdgE8_N2%P6Qa!U)>b55TM>PhUnr|E9gH|6p24~_i&VL`>yXKdE2<6At^nH;}5Wm)9
zu_t+IP2<-5(WIj~l$P{KNKBMZE7uqLypVlHu*CEg|A~=>i^X5FkV!SD!
zz|ZKX5(+;L`zNxxA-53dP6(?07k#TG-3goSM1}57_yluyVrg=Alr5p}cg1@NYBqeO
ztbtEcn}6SJAMY-1&Wq7GFiP`au3mW`mwgwcUel(sCVg}gSF>~dN}oxbW2iWd=T3eH
z9;eb^qKJ<`)$l;sR1M`f#|p2hK2z)NES)Pq363Sbquy7YTDg1;YkRJ|q3q)QuGT$R
zHLP}8u5q?qcFs1?z5x4NY&FNJ@vN*xe~!_&6o2$Q>RWi!YeLWH^>gL2p}dsogrukk
znCBp$P4AaWKBa8QmiHBWi8^5tUOo$^=`YL5xmI$^NWN}Oe*OYeT5Ci#51jQ;K%0N;
zqtMu^Ha44fjNGc{g`D_lELymLwT7LS?4rK{?=J-Xh+@V$jhEBL^Aq8#DIbZm$>lFtJ7WKJdG(LC=qRD(MUUQ3`+I9|g-1
ztw(sL@J?y*9bX0EywKr7=LTTi5esG;pSOAg5FI@~n1`zz#{mEku_uXxPE<+pyRhNA
z7zI3@T8TY1hAxAjyFMRmT57zo-Yfk7M1MfOcU3+}f_I+d5TkAv)}VLV<`%C$bU~?Y
zv2PG=toz_^5PS3%n>S5kb@6)_&(x`g*{HXQxc|Pl;DhjF9I1k+B871zxJ-&CdnbfmIW@o+0x`fAIy-gdYa2LD<{ukSDsoLo@chC(}`RPpf^0E8am84u678
zxa&nQYs9*(*pnD7g9zOd1=&|+o?OV0k_^(A7yh{B_-?G+Qs;D9_c?+-X
zttJiGG9SaDwIq8h->OITfvWqq_!0g=U8(9SQiIQ_>K6%4=KWGldqrKD|ETIh(OXTT
z@HzA=^C3y>m%c3<&d2<=7$VL4HGfT0tov5|WX4=Jtm+n@%DnDdRW~09j6&5_AFDCL
z95nx6U8z2&szj}oEEYhjwR)?Y#(uFWS^TK$%Az&ZZ~1dee_X9AbzK}*J_@^TUeNmQ
zgs~Aw3N~L=_+RJi^?W`r@-fgxT!H8eIwR(Q3=txx1nt>+PGX;RRQ#~>lz%niga@{<
z^YKmm=fGWc23^auF9Tz1x@ha#xg0zHx}saAl$*E_^fL~x_5JR|_8pqOw2sy`m_$d0
zhfIiPL`4O&;{D4a&-dmuQMS2}$5uQk(eWdl_hF9{{df&ADUEIQ*#lK)=wF}M5~Zzp
z;=8JxwLcd>n|>SUa!%cYSAXPdXr6D%&ou2eVgwt*#tB|Y5CdiwxVPDd((k?=X4#St
zudMUcP=XgEFVS`(4Ytd*jj41F+V#$_#GbSrx;p0TcE&zx%yn9^(F$#pVo%jN)!(gk
zv-T`O`ZV`SqwUaS7igO3JhxBm0?9gfAGiN*(rUNhKmP*&0RR6300`$l-Rp0C008k&
BTv-4B

delta 9276
zcmV-CB*WXVW0_%)Gk;xc+b|S{@B1qb>CFalu${zda<^uM6-qn$wHtwvCB+u8B~6l>
zdFaRQ$ZZE5Y>W~NvXIVs-dEB&rzhhFTPvs+9I65C24z~g8{qNF=PTIi&d63+coNo0
zt$^V|o@R@5ZkfrZaNf(7Lt3P_u(P^*NoUdzQ@B)Y7U9|qR)5xwhY#D2kgeB?Bobn%
zHg0gwfpFhQ2Tt$&fm#7naqtcPozqN?=D22kCzPi?8i_&1YGbAF)DGbFzkwYcK&y6u
zNfIQ#i#U@(=UUu>P&NpB0FK@2zHj|KeZNmA(U2&Gq(~v}KelQ}q
zm)9?GB_v9t2egcj9}>Q6QG{tORUMr8-s8z7Z9{^Kc7HH_q=ckJpCRdGNOqFvA+fXz
ziEF5hXVIM??PN^}!RqI+s~gJpxH&dm;`fBq
zXsoYdq1BSTZs3@vN!7bonbm5U&6msh$u9r^0JE(E>H!bYw+p)+dxezAN-zGqanG}+
z1Skgq2$RnXG!^zU_6TyzFZQqq@+kJm_H{GhvgYEm1PmSl0SS{M4Ko3Avuh0k0)Ja?
z;>wnO-uwy#`@u+w1)^lYymT;4ySHK!N-{a!r=t?MT22><6GM`%$*-Ta$}YQnBi%Ej
zvpdFiUA$^tzICaZPb>P#GVH*%i4_Jm-7Gfu8@kwZ?&tp4r6)FAuAWY==lBnF(_3uj
z_r1=iJ^e%sJAyVOj%<44dXyYIc7Is!+0f~iuCu?#xjFl&9Xk-}tqI#Z2i7M;R5ntEID8*O>fmg{Xv+SWAe5ZanSShSt`%$crN&g@8Pzb6UnP8N^d_(*2^d50RG
zKH0VzlF&A7H=y3(hI&3>Y&~^W$Eg#}Y+mZaK88G*QMQ!-E&i-{{iUw$PEyg#R%{U`gA!Qlg-eQ0>pz47RQEZO=m4sYn!&vfw%
z|K{U`f(Rg=8gC19?jM-rcz+q6Z1>FTJNE4Kzf2;lkA=n>*Zhs@y-wT5;U;Gk`iw(Ws;ry-^FNx%-d$!rV(Bk?0ey6^R041R#
zVpEf-?<%#UY|?bE^n1=GMSmPv9s47(PA38McsnGLFGfHbfoqd~pJ2)4tyotQ%70=_
zPT52@nZPPxe-qW;B%ygjqCVKL$8?{(OoDq0Yrh3W$>8K^Ai1N5ZG`XFf^UfKsK`tb5T
zgw}@vOk$fb56j?a8}>JJweGX!_^%(p9{D1JeV*{&O=qU@B59}1TBP&F{)%s3efWzO})##pelkU|s$}GEmeq?*{@jH}A
z9h>8V&;U*aQiP!iYZ2jE?AfZn{;~XPY#zMeiCz1W3>^7#*!ryF4JrH|ez%x&q58H!
z_9M#2^u`j=V-X3ZNslh83c8x}HwgbloJUQ-f|%PL*6PcJ*sqAJ9>f557N+HvYWhp6GbE
zTC$VpKKb;)>EW~8<2&1J?tA#WPse||9`kP8q2F5q<$I0t-rr8Q{T(gK3fQj6Vwe0v
z9e*=okKYfQTn6WE$EU;bX?bER*MIUJdJdKE3O4!UabM}r1Z>Dp_L@xa`Zvdu??b%{<71?PbsZ|QWa^nZ0GdsMAg_jSOiC34=@?=wpf+M!g@rL(Ee
z=ebwv_fOVfO1E1nGiXx*=Luam3&40dZl<^S%oZ1!9{P|EQCH0;y$8NGq3+Qb6sz^yzyzTr}0z>h{{5%VH-%Z#Z9_iuYz^eT6Nj0{4UV<
zavkX2X`&0-p0uy9+}C}nuX`yAd4FG?-WMs>(l8BBkIbJmxqJ@M(h5?+8*f8$L{-=Nzv<_)JSy6@xn9)66yYp(oD&W0e=blRa;w8W#eaVI-g
z@IQ%SSnNpHCY}1;jovpitB%o0a(|p@b0CU$Vh{{)IRLW6HZ@ZE#?a37AD)1+2Y|2M(!X|G
z_W9}XnRQBed{ZgR0fj*@H>m1lt;V-4SO@EFj`ivg{Yx*YZ
z>+uB6&>Vf%NqUM0GCW!11a6HUmb&~JVll=DR`3=m5(_~Q{0qEe#VdNcQF9k^E(FCgolAqCTf^!B0x*lCBWOK0MFva-()PB{4uo!BB5?oGArbC*4mTSlw2#&`{k
z-6ktV|AD|DK@f_<&(G|;{BGnKoO{|=%GVvC^m2$c%Qi#Q%YQ2NWu6XS0e_n8EB5u3
zozz$spgGeDrDvq#HyM@?1(p!Gya_c9$OFgNCAScFkq3JCg6}+M@eIYk`fv0z=;(PO
z?Jmko_Ds^O(>>eod!^s^TEFk-`vp~kzDq>ySn5(01AsOHFhuQlTO64WS+2tyV%vzX
zKN^oz#?yZv0e`dWu}UcuxMq8n#wqmcIU}_=HrhiK(*Pn6K)SQG-zrY6=0eR>H>+1T>fPY7Hlxug!K)T&&805Be*8(S=;Z@xc^TYlFFKuejlk>qM=!(A?QQ>Imu(j
zBqBIwW;4`t0iS{E()jxbztuOI@Qwf9v7qzPSo&`mi+`LS%lyOdB9-qVjo(GGv5NIG
z|7^WTMaIg%kCgxZdd>U84|pCrCpyoUf9vCR_)OvIT;B9?^SCQ0dyKsV0L9$lNyb!E
zY-PKnzO(Gt;x0v8479NYX1l>BG(DpGA-Ro)zD(UW&}mJ=>ROOCz7J=|u&~*IW#LRP
zrdh+xgnzHuQV!>7w)eox^UL{y&N_5W3*Knsi!dx=d$FQJT&F|WPKWR#I_T?lWT9Ej
z>i}=5dGjJ)2Haxm%**5^
z%u8@^e3YSXxw7b~9N&o=;ydX*
z%zvBW7$qM#W>31$g1i9T2bgEV7`)zhDw0j2gvx
ztbq+~CDtwV(R45GS2WEx!aQvnx3Q!R*wE4UG*8IbL;s%x{o;?hoA1)c>YIu_gMZz*
z*iC2J7!N}J%K5@7Y6!S1m^U3Voky%{tVrqgia)H!&Z_;DVne1KqVkgddMOqYo{7_h
z^*GIM$9Uq>GtH0V1pKN1{^K=2&eZ)lGnYk_*A@M*JM!p;eeasMmfuI4?va^dG^3m2
z_pT`H7&v)0#yKJb{AL%|lXMwkIDfg0!aUB@8jB>gNlLa+PTc>lJbZ3q8_HU5NT8cwktO~~=R*k2C!Hga_b`^Ae2Oei)2PS6nr)qJpR%hL^ewN%OIll^YDM&X
z$$nVZr$D1x&fukYh5Rma1uh+XE4Ez4ds@TRc
z?cV&0ujI-EP$hL3HHGSXl)RRo~0)0p=^w21ka4`BcpwoWxfq
zrh+|CKg?xTjFU_n!+YzZvu%
zk1$h+J~|OYdUBONPA2qyq<`XB6ZW3z+|5ppE980~+Jmmc+5mz4JE6~`6hEYKgDmb)
zi7AxlVgmg!pNXMa6(dAmRD7tel?*A_!8i%5T4+aRjAP?>4+y=@z8`gg6Pd6wmA$lTTG>A~}zg!bCz@PEg7&BST0BchMD
zZ85sD--z`|{Fddm6>~|dj;myEteU;4$^Kifx&Qg?2f3$)^?csE;#fyv+B3}UAbmf`
zsa9=;#5_%Tv8?Z2f%!}uVV{}hZU#5ByBl?7?o8=}E=}t;*n45;m2Ic@-2ofzCdcP*
z(kB~GI-2a*Gx>I$p?}>5!TAP0S&`FVK#6uhA6@s-js&k9V
z^wH}%qN?wTwNZ4^0pGpV_r*E=M2n!+u}LQ}4hsE-x;fL01AlSL#6VD~tc$u*tgkd}
zRm<~En5-*9oUg9m1(ko5e?Zb2Qli<%nhu6*`FAcvu6t$Oky)~RdCo#%^@C5n0b#$x
z+ggl0GBL&uW-wIP$v2DK({SqhE}Nd(?q_YIFoPXJ(38#}#;&fuK40=L3j|h`K34KX)44~n1qY1Yc-z);`Q-Ds0)ErfP
zAM`{(50Ofal9{Ala1K9~|I1iiX^Zl>4a<%v3hU;Uj;eXH#^7{hBFn2N!bw^^D
zPj+qMb$?dJmDAJ|EXV)qJwt1wu8(j%H}V`f5>bBNFrcTz&1g=JhDLv5J1gR$XVxsx
z+62X#1s|_jpwU10%{7Z=wd?4&)-2NKAN}5%aZ$VGcSrHjnu#ON>5tdHvt~qVqpo4i
zxK@kUxMrLjiK0I@kK}_jlYS(liS$L$kIeDAqJNu}(v2k2_e>CHL;tdNxw=Xd(i}gdqC-bCk0}|2pHQ!JQNAu?
zT*ac$4@Mo$6-L9_8KqOdj!$xC{`4U%axyWAp|iR6>)x^
z))MoWyJ7lmU>9rjQNGy+bku93IWc8Tb*R@I41SDnRh_(E=aAW1*%#In44f1rHN}PRXYd6Mrzk+uAy_ZxcP9IM|)RH6@&jwR^gKT}MUD
z_3zx*F?-b>>)5#CsJ$#47AN4qNoJP!kQlHlQr}hKHR7{U4qbH9cm@07lQ){iFybW5
zzv!{u`5@m@f;ENUXCQ3l($~;vLKN+^e3^=e4CrXrh#@dmSTKN=QsYtS(@Uv|+dSherGHz{QK>*+ImDSfAfkT{v&iGMtXY@!MS4z`rvaVOX7E>Qbx(544>5_c``w*g)#;BuVY8R$rxbVKq*1HZIr{uV9Io^xhJg
z6Z6I{TP;`nIko;crlNE)eM=XiegMY=Ip3UzO
zX}bdahOjT_w7=atZ}ew^vZ(&5yf4PTG4J&Fi;d{_jjRWx{eu4@t;Tr1cWOH4C+*37
zRr6i1YFw%Z)x9r<5I2>)>AyNzO0kp`-Pno9$~ob
zSa+#>87)5`c_GUY1QD4(srMz{&1-kk8cRuY?H#@Eq9#qqnl$LNyX-+z#?&r?srPoq%OpYBACH9dcVl;6*bI_d9KVC5aJsf-6xCY
z-&I^sht;?~*K2TU7-iHe?|(nH_fNNdDyBcl_L^7gS+e@_vuo0}mRe4`wN^wl)rx4o
zZ`HTX*5gB4$nDS~Hj#Kg+b5yhfana)j~Z~k#FTnXlz##1(L8RQ2c9*b?pgEc_PcVt
zTiFxE3v`plqJGcMdv5dd!av#X=xn!n?oHS2c!ot$E1c?mHP6MS*caD?`?LOfO|=MF
z9Hdx#lCHht50cb;`SSS+z=3D*R1yE>7QuoI%WBYjq1opkP_Uj~heNPjAg;iS%y1T`m
zihuvpSpgYO%DE`NOP`D8i~Z(Y^8QNkhv0+w1M)aP_YhE#fi+(ZdwFHf27Ix``{?_&
z@&CE_d<{#GqGqkKwmBc@_<>aL1Ma)Sx&^=vMpWQBvKD~jTrZX1wd+;R7Lxpnu`gA-
zmE}A0I{z#V$1w*E{4H~aAR}5kD{mLyrGNE~SsMd$;#r<3Z5PavE}Ja6kCWrf6nR}d
zIhvU3nml$F6SI3XHJLTFvt0xSR~P*E0MB+g>`VCwSwmobW3q;*?S6wFApOHmU*ebC
ze?cE*;9SVI06_IRMOB{wJ{-BI#?sr?BFh_vE?c_?5BVird%&USAK<-?*D5EciGNel
z6(t@xbkAT??YsviH@LT~jqe&`k=j`EZc|;CR_hT4!~`RT3skQq3Z?zW&Pq5WEY3Vr
z`WthCdL2bYm!d7ea~L8ZRFL7K1My6Gei>c&OV<(byt;<9+k*et?>nB8;|~juW{E6Y
zn1mXEv@hntBM!Sh9Zs-LCbFR
zO=S)UeGWFw_l@T^a-yBr)oAAfS=00{dwpMkqLTDxi;=`TcxK%iuyyk{7k_wl{bT&M
zvtDBEmuUXTdinR-d0fKebzf%g4I95N&;1tPG*$aJrg3>MJb}j2rWhpf4Ye1(
zz&bvg4yQhIk;n8i1oZl#~IJL-Ah!7h!5;d>7AzV!EO@Azx2&Igd7WgB>^ojOAR
z_nT!phbuh*Z&!Su(*z0t5U}UEhv=j8)D!#@eU-ET?hq
zqmWqEZRR@FyGZj2DvqgQHbp)<#phd}=CPd3Ma{p_b$4ywM9xp9JSGyfkuX=Jx@RbE
z)k5x4}a<&S(DPGR|Bvv
zba2%js5%tXWv6TBq;NUfK8*VZGIkv*Je;0yW~MscOwTtf#ip)Bi@!(E?@0G;)N518
znKM1ed4G?H-_A#t`wbiYMBBu@w5F}F6X>Qc9So$OJLnE1&CcbM^jH;O%#v^1W{*D1
zi52|v;U2e2tikxxSbu|(5tOxT|A#!c1nrAj=gl~kl{f*LLJFIr;v)_9AWidDGS!IZ
zOF6NIbM|yQf>@(C)3jm#4r$>@c@Af2sTu}#P7BQ2R5-XeYq1pf$aVU9{r7U}um|Cj
zMqan`AXXDgUH)
zv0Cqy?Gq%@uf%3fr|9Sp{V8=%ZTD;O9<;@p?+un^$WBvNw-Gp;0g{rRBdeb?
zQ>yiCyD#eZb)9I%pb?F%zHfm}Ct2KYHaYG^8FV-7~G7>8bh2^?QG$
zpUj|9&qN`@SbuqDW~7~Eg>?!!u2$#jGM1lFa*nTy*l$ugb5zy|X=e=LejI}F*f@**
z=COcMthaveqwlWNWLIK*MJytsX4$9+rj=5(KBb{4BH-%a;E
zqOtZoyfzzkOR1i%I5$_LsoCIzm-c1W@167U^|NUe9e=Sdzv+I`Ky#HdD$X>ELd?VK
zc!mJ2n`*#0_%SVe>P=PKhPCGPSZz_?hIO}SYv+T(*;IT`n&&$B6qwDzzHv
zUKTFy6yBqLYM-k1puslfZCmp;{rVhLoq>H6#{bMH_4~u&g9D!I`m;B7!1Evaj_6Y~
z`9cuz41WOr5kdul-|!bYp=3lrH#^BS`ky>0?uGdXW#FPhYsl3t?R9-
zwSU5b_lSJYtG)+rMu^3t@W;eCfM46kL}!QX$2eaX7jU~u_f+x#Uj(&n!ej{rTOyCB
zsrHG2F8d5Elfc-3h5Y5i-WlS_1na+QbG77Laes3lFfpfMN+{Zv?b;cB?l7-D56b`*
z!ck#MLZSY5*mlU)pKE=`GUo|>#}W2T96Vos%A}7r_Bvn(_Cw6Q@B1I~b>++h{Y=8r
z8M$s}><#w^^r8EhBU^XI%fD9Z9M^%H-G2gb^W;pO%g*JcT=n$7j<~$MRKGfeUXn}6
z3V*mXNS>$U^cz*;ZU;zu;kqWZWjO1-89ZyoYT?
z+E%3hb+E6DF|qAs`exd`gH1&?3!HN?4UvsYG6pAU+oEf1oAZ7;F3H$m2-)_M(s0d1McPgPlvT0a_Y8ar1x%(1oPOS&ORySM3`s;Y7xppw^U)2w`#k|pfl(tF)d>_(M4S$rv
z)>h_6DBH03G0yit5li~^ZE;k*&i6*){t=9oDnE5=7Ii8M=OXX3YEN}qPK7+%I6os2
z=cS+DsQW?R#<{;>>HD(K4$Z%BYV|$~+Ee{D*4)iSFRz<0aU&=GKSBVVhw%{Y47y2@
z;Ni-fd~fmu7j2hJ=w=|#9I9gWi){wXj&YHLbI}+R%3{}`7wdh^-P4CL8?0k1YWB4~
z>;={evoZ4X@KxPG=ZlZ)niS{cU(~S5(5G0_)5O>3>r{)g`15hKI@SDM*ixt3hSko*
evs>lEnRn*h&Zo}*0ssL2{{sMn6M+&ddjJ3z0~n+L