mirror of https://github.com/kr239/68030tk.git
DMA-Fix: Assume $E8-EF 16 bit wide!
This commit is contained in:
MHeinrichs
parent
a85ced47d0
commit
1447f59988
|
|
@ -409,8 +409,13 @@ begin
|
|||
--A0_DMA <= '0';
|
||||
--A1 is set by the amiga side
|
||||
--here we determine the upper or lower half of the databus
|
||||
AMIGA_BUS_ENABLE_DMA_HIGH <= A(1);
|
||||
AMIGA_BUS_ENABLE_DMA_LOW <= not A(1);
|
||||
if(AHIGH=x"00" and A_DECODE(23 downto 19) = "11101") then --evil hack: E8-EF is assumed to be only 16 bit wide!
|
||||
AMIGA_BUS_ENABLE_DMA_HIGH <= '0';
|
||||
AMIGA_BUS_ENABLE_DMA_LOW <= '1';
|
||||
else
|
||||
AMIGA_BUS_ENABLE_DMA_HIGH <= A(1);
|
||||
AMIGA_BUS_ENABLE_DMA_LOW <= not A(1);
|
||||
end if;
|
||||
|
||||
else
|
||||
RW_000_DMA <= '1';
|
||||
|
|
|
|||
|
|
@ -433654,3 +433654,186 @@ if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 6
|
|||
|
||||
########## Tcl recorder end at 12/30/17 00:43:20 ###########
|
||||
|
||||
|
||||
########## Tcl recorder starts at 01/11/18 20:16:09 ##########
|
||||
|
||||
# Commands to make the Process:
|
||||
# Hierarchy
|
||||
if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
|
||||
########## Tcl recorder end at 01/11/18 20:16:09 ###########
|
||||
|
||||
|
||||
########## Tcl recorder starts at 01/11/18 20:16:10 ##########
|
||||
|
||||
# Commands to make the Process:
|
||||
# JEDEC File
|
||||
if [catch {open BUS68030.cmd w} rspFile] {
|
||||
puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
|
||||
} else {
|
||||
puts $rspFile "STYFILENAME: 68030_tk.sty
|
||||
PROJECT: BUS68030
|
||||
WORKING_PATH: \"$proj_dir\"
|
||||
MODULE: BUS68030
|
||||
VHDL_FILE_LIST: 68030-68000-bus.vhd
|
||||
OUTPUT_FILE_NAME: BUS68030
|
||||
SUFFIX_NAME: edi
|
||||
PART: M4A5-128/64-10VC
|
||||
"
|
||||
close $rspFile
|
||||
}
|
||||
if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
file delete BUS68030.cmd
|
||||
if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
if [catch {open 68030_tk.rsp w} rspFile] {
|
||||
puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
|
||||
} else {
|
||||
puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
|
||||
"
|
||||
close $rspFile
|
||||
}
|
||||
if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
file delete 68030_tk.rsp
|
||||
if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
|
||||
return
|
||||
} else {
|
||||
vwait done
|
||||
if [checkResult $done] {
|
||||
return
|
||||
}
|
||||
}
|
||||
|
||||
########## Tcl recorder end at 01/11/18 20:16:10 ###########
|
||||
|
||||
|
|
|
|||
1812
Logic/68030_tk.bl2
1812
Logic/68030_tk.bl2
File diff suppressed because it is too large
Load Diff
|
|
@ -1,13 +1,13 @@
|
|||
#$ TOOL ispLEVER Classic 2.0.00.17.20.15
|
||||
#$ DATE Sat Dec 30 00:43:37 2017
|
||||
#$ DATE Thu Jan 11 20:16:29 2018
|
||||
#$ MODULE 68030_tk
|
||||
#$ PINS 59 AHIGH_27_ AHIGH_26_ SIZE_1_ AHIGH_25_ AHIGH_24_ AHIGH_31_ A_DECODE_22_ \
|
||||
# A_DECODE_21_ A_DECODE_23_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ \
|
||||
# IPL_030_2_ A_DECODE_16_ IPL_2_ FC_1_ AS_030 AS_000 RW_000 DS_030 UDS_000 LDS_000 \
|
||||
# nEXP_SPACE BERR BG_030 BG_000 BGACK_030 A_0_ BGACK_000 IPL_030_1_ IPL_030_0_ CLK_000 \
|
||||
# IPL_1_ CLK_OSZI IPL_0_ CLK_DIV_OUT FC_0_ CLK_EXP A_1_ FPU_CS FPU_SENSE DSACK1 DTACK AVEC E \
|
||||
# VPA VMA RST RW AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \
|
||||
# AMIGA_BUS_ENABLE_HIGH CIIN SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_
|
||||
#$ PINS 59 SIZE_1_ SIZE_0_ AHIGH_30_ AHIGH_31_ AHIGH_29_ AHIGH_28_ A_DECODE_23_ \
|
||||
# AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ IPL_030_2_ A_DECODE_22_ A_DECODE_21_ IPL_2_ \
|
||||
# A_DECODE_20_ A_DECODE_19_ FC_1_ A_DECODE_18_ AS_030 A_DECODE_17_ AS_000 A_DECODE_16_ \
|
||||
# RW_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_000 \
|
||||
# CLK_OSZI CLK_DIV_OUT CLK_EXP A_0_ FPU_CS IPL_030_1_ FPU_SENSE IPL_030_0_ DSACK1 IPL_1_ \
|
||||
# DTACK IPL_0_ AVEC FC_0_ E A_1_ VPA VMA RST RW AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR \
|
||||
# AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN
|
||||
#$ NODES 53 inst_BGACK_030_INTreg cpu_est_0_ cpu_est_1_ cpu_est_2_ cpu_est_3_ \
|
||||
# inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 \
|
||||
# inst_AS_030_D1 inst_AS_030_000_SYNC inst_AS_000_DMA inst_DS_000_DMA \
|
||||
|
|
@ -18,7 +18,7 @@
|
|||
# SM_AMIGA_6_ inst_RW_000_INT SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ CYCLE_DMA_0_ \
|
||||
# CYCLE_DMA_1_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ \
|
||||
# BG_000DFFreg CLK_OUT_INTreg IPL_030DFF_0_reg IPL_030DFF_1_reg SM_AMIGA_i_7_ \
|
||||
# IPL_030DFF_2_reg N_60
|
||||
# IPL_030DFF_2_reg N_205
|
||||
.model bus68030
|
||||
.inputs A_DECODE_23_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF \
|
||||
BGACK_000.BLIF CLK_000.BLIF CLK_OSZI.BLIF FPU_SENSE.BLIF DTACK.BLIF VPA.BLIF \
|
||||
|
|
@ -39,46 +39,72 @@ inst_RW_000_INT.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF \
|
|||
CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF inst_DSACK1_INT.BLIF inst_AS_000_INT.BLIF \
|
||||
SM_AMIGA_5_.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF BG_000DFFreg.BLIF \
|
||||
CLK_OUT_INTreg.BLIF IPL_030DFF_0_reg.BLIF IPL_030DFF_1_reg.BLIF \
|
||||
SM_AMIGA_i_7_.BLIF IPL_030DFF_2_reg.BLIF N_60.BLIF AS_030.PIN.BLIF \
|
||||
SM_AMIGA_i_7_.BLIF IPL_030DFF_2_reg.BLIF N_205.BLIF AS_030.PIN.BLIF \
|
||||
AS_000.PIN.BLIF RW_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \
|
||||
SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF AHIGH_24_.PIN.BLIF AHIGH_25_.PIN.BLIF \
|
||||
AHIGH_26_.PIN.BLIF AHIGH_27_.PIN.BLIF AHIGH_28_.PIN.BLIF AHIGH_29_.PIN.BLIF \
|
||||
AHIGH_30_.PIN.BLIF AHIGH_31_.PIN.BLIF A_0_.PIN.BLIF BERR.PIN.BLIF RW.PIN.BLIF
|
||||
.outputs IPL_030_2_ DS_030 BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 \
|
||||
AVEC E VMA AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \
|
||||
AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_4_.D SM_AMIGA_4_.C \
|
||||
SM_AMIGA_3_.C SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_1_.D SM_AMIGA_1_.C \
|
||||
SM_AMIGA_0_.D SM_AMIGA_0_.C IPL_030DFF_0_reg.D IPL_030DFF_0_reg.C \
|
||||
IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D IPL_030DFF_2_reg.C \
|
||||
IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D IPL_D0_1_.C IPL_D0_2_.D IPL_D0_2_.C \
|
||||
AMIGA_BUS_ENABLE_HIGH CIIN IPL_030_1_ IPL_030_0_ IPL_D0_2_.D IPL_D0_2_.C \
|
||||
SM_AMIGA_i_7_.C SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_5_.D SM_AMIGA_5_.C \
|
||||
CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_3_.D \
|
||||
CLK_000_D_3_.C CLK_000_D_4_.D CLK_000_D_4_.C SIZE_DMA_0_.D SIZE_DMA_0_.C \
|
||||
SIZE_DMA_1_.D SIZE_DMA_1_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D \
|
||||
CYCLE_DMA_1_.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C \
|
||||
cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C CLK_000_D_0_.D CLK_000_D_0_.C \
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_VPA_D.D \
|
||||
inst_VPA_D.C inst_DTACK_D0.D inst_DTACK_D0.C inst_DS_000_ENABLE.D \
|
||||
inst_DS_000_ENABLE.C BG_000DFFreg.D BG_000DFFreg.C inst_LDS_000_INT.D \
|
||||
inst_LDS_000_INT.C inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_INT.D \
|
||||
inst_RW_000_INT.C inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C \
|
||||
inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_AS_000_DMA.D \
|
||||
inst_AS_000_DMA.C inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DSACK1_INT.D \
|
||||
inst_DSACK1_INT.C inst_AS_000_INT.D inst_AS_000_INT.C inst_AMIGA_DS.D \
|
||||
inst_AMIGA_DS.C inst_A0_DMA.D inst_A0_DMA.C inst_RW_000_DMA.D \
|
||||
inst_RW_000_DMA.C inst_AS_030_D0.D inst_AS_030_D0.C \
|
||||
SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.D SM_AMIGA_2_.C \
|
||||
SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D SM_AMIGA_0_.C cpu_est_1_.D \
|
||||
cpu_est_1_.C cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C IPL_030DFF_0_reg.D \
|
||||
IPL_030DFF_0_reg.C IPL_030DFF_1_reg.D IPL_030DFF_1_reg.C IPL_030DFF_2_reg.D \
|
||||
IPL_030DFF_2_reg.C IPL_D0_0_.D IPL_D0_0_.C IPL_D0_1_.D IPL_D0_1_.C \
|
||||
CLK_000_D_0_.D CLK_000_D_0_.C CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_2_.D \
|
||||
CLK_000_D_2_.C CLK_000_D_3_.D CLK_000_D_3_.C CLK_000_D_4_.D CLK_000_D_4_.C \
|
||||
SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_1_.D SIZE_DMA_1_.C CYCLE_DMA_0_.D \
|
||||
CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C cpu_est_0_.D cpu_est_0_.C \
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.C \
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AMIGA_BUS_ENABLE_DMA_LOW.C \
|
||||
inst_DSACK1_INT.D inst_DSACK1_INT.C inst_AS_000_INT.D inst_AS_000_INT.C \
|
||||
inst_AMIGA_DS.D inst_AMIGA_DS.C inst_A0_DMA.D inst_A0_DMA.C inst_RW_000_DMA.D \
|
||||
inst_RW_000_DMA.C inst_AS_030_D0.D inst_AS_030_D0.C inst_VPA_D.D inst_VPA_D.C \
|
||||
inst_DTACK_D0.D inst_DTACK_D0.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C \
|
||||
inst_AS_030_D1.D inst_AS_030_D1.C inst_UDS_000_INT.D inst_UDS_000_INT.C \
|
||||
inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C CLK_OUT_INTreg.D \
|
||||
CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C \
|
||||
BG_000DFFreg.D BG_000DFFreg.C inst_LDS_000_INT.D inst_LDS_000_INT.C \
|
||||
inst_VMA_INTreg.D inst_VMA_INTreg.C inst_RW_000_INT.D inst_RW_000_INT.C \
|
||||
inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_BGACK_030_INTreg.D \
|
||||
inst_BGACK_030_INTreg.C inst_AS_000_DMA.D inst_AS_000_DMA.C inst_DS_000_DMA.D \
|
||||
inst_DS_000_DMA.C inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C \
|
||||
CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C \
|
||||
inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C SIZE_1_ AHIGH_31_ AS_030 AS_000 \
|
||||
RW_000 UDS_000 LDS_000 BERR RW SIZE_0_ AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ \
|
||||
AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ N_60 AS_030.OE AS_000.OE RW_000.OE \
|
||||
AHIGH_26_ AHIGH_25_ AHIGH_24_ A_0_ N_205 AS_030.OE AS_000.OE RW_000.OE \
|
||||
UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE \
|
||||
AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE \
|
||||
A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE VMA.OE CIIN.OE cpu_est_2_.D.X1 \
|
||||
cpu_est_2_.D.X2 SM_AMIGA_3_.D.X1 SM_AMIGA_3_.D.X2 SM_AMIGA_i_7_.D.X1 \
|
||||
SM_AMIGA_i_7_.D.X2
|
||||
.names IPL_2_.BLIF RST.BLIF IPL_D0_2_.D
|
||||
1- 1
|
||||
-0 1
|
||||
01 0
|
||||
.names nEXP_SPACE.BLIF RST.BLIF inst_AS_030_000_SYNC.BLIF CLK_000_D_3_.BLIF \
|
||||
CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF CLK_000_D_4_.BLIF SM_AMIGA_6_.BLIF \
|
||||
SM_AMIGA_i_7_.BLIF SM_AMIGA_6_.D
|
||||
1100--100 1
|
||||
-1---0-1- 1
|
||||
-1--1--1- 1
|
||||
----01-1- 0
|
||||
------00- 0
|
||||
---1---0- 0
|
||||
--1----0- 0
|
||||
0------0- 0
|
||||
-0------- 0
|
||||
-------01 0
|
||||
.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_6_.BLIF \
|
||||
SM_AMIGA_5_.BLIF SM_AMIGA_5_.D
|
||||
1011- 1
|
||||
1-1-1 1
|
||||
10--1 1
|
||||
-10-- 0
|
||||
0---- 0
|
||||
---00 0
|
||||
--0-0 0
|
||||
-1--0 0
|
||||
.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_4_.BLIF \
|
||||
SM_AMIGA_5_.BLIF SM_AMIGA_4_.D
|
||||
1-01- 1
|
||||
|
|
@ -129,6 +155,28 @@ SM_AMIGA_0_.BLIF SM_AMIGA_0_.D
|
|||
---00 0
|
||||
--1-0 0
|
||||
-0--0 0
|
||||
.names cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_3_.BLIF CLK_000_D_1_.BLIF \
|
||||
CLK_000_D_0_.BLIF cpu_est_1_.D
|
||||
10010 1
|
||||
01--- 1
|
||||
-1-0- 1
|
||||
-1--1 1
|
||||
-01-- 0
|
||||
11-10 0
|
||||
-0-0- 0
|
||||
00--- 0
|
||||
-0--1 0
|
||||
.names cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF cpu_est_3_.BLIF \
|
||||
CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF cpu_est_3_.D
|
||||
111-10 1
|
||||
0--1-- 1
|
||||
---10- 1
|
||||
---1-1 1
|
||||
1-0-10 0
|
||||
10--10 0
|
||||
---00- 0
|
||||
0--0-- 0
|
||||
---0-1 0
|
||||
.names IPL_2_.BLIF RST.BLIF IPL_1_.BLIF IPL_0_.BLIF IPL_D0_0_.BLIF \
|
||||
IPL_D0_1_.BLIF IPL_D0_2_.BLIF IPL_030DFF_0_reg.BLIF IPL_030DFF_0_reg.D
|
||||
0-01100- 1
|
||||
|
|
@ -206,33 +254,6 @@ IPL_D0_1_.BLIF IPL_D0_2_.BLIF IPL_030DFF_2_reg.BLIF IPL_030DFF_2_reg.D
|
|||
0- 1
|
||||
-1 1
|
||||
10 0
|
||||
.names IPL_2_.BLIF RST.BLIF IPL_D0_2_.D
|
||||
1- 1
|
||||
-0 1
|
||||
01 0
|
||||
.names nEXP_SPACE.BLIF RST.BLIF inst_AS_030_000_SYNC.BLIF CLK_000_D_3_.BLIF \
|
||||
CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF CLK_000_D_4_.BLIF SM_AMIGA_6_.BLIF \
|
||||
SM_AMIGA_i_7_.BLIF SM_AMIGA_6_.D
|
||||
1100--100 1
|
||||
-1---0-1- 1
|
||||
-1--1--1- 1
|
||||
----01-1- 0
|
||||
------00- 0
|
||||
---1---0- 0
|
||||
--1----0- 0
|
||||
0------0- 0
|
||||
-0------- 0
|
||||
-------01 0
|
||||
.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_6_.BLIF \
|
||||
SM_AMIGA_5_.BLIF SM_AMIGA_5_.D
|
||||
1011- 1
|
||||
1-1-1 1
|
||||
10--1 1
|
||||
-10-- 0
|
||||
0---- 0
|
||||
---00 0
|
||||
--0-0 0
|
||||
-1--0 0
|
||||
.names RST.BLIF inst_BGACK_030_INTreg.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \
|
||||
SIZE_DMA_0_.D
|
||||
-01- 1
|
||||
|
|
@ -276,34 +297,91 @@ CYCLE_DMA_0_.BLIF CYCLE_DMA_1_.BLIF AS_000.PIN.BLIF CYCLE_DMA_1_.D
|
|||
110 0
|
||||
00- 0
|
||||
0-1 0
|
||||
.names cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_3_.BLIF CLK_000_D_1_.BLIF \
|
||||
CLK_000_D_0_.BLIF cpu_est_1_.D
|
||||
10010 1
|
||||
01--- 1
|
||||
-1-0- 1
|
||||
-1--1 1
|
||||
-01-- 0
|
||||
11-10 0
|
||||
-0-0- 0
|
||||
00--- 0
|
||||
-0--1 0
|
||||
.names cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF cpu_est_3_.BLIF \
|
||||
CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF cpu_est_3_.D
|
||||
111-10 1
|
||||
0--1-- 1
|
||||
---10- 1
|
||||
---1-1 1
|
||||
1-0-10 0
|
||||
10--10 0
|
||||
---00- 0
|
||||
0--0-- 0
|
||||
---0-1 0
|
||||
.names RST.BLIF A_1_.BLIF inst_BGACK_030_INTreg.BLIF \
|
||||
.names A_DECODE_23_.BLIF RST.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF \
|
||||
A_DECODE_20_.BLIF A_DECODE_19_.BLIF A_1_.BLIF inst_BGACK_030_INTreg.BLIF \
|
||||
AHIGH_24_.PIN.BLIF AHIGH_25_.PIN.BLIF AHIGH_26_.PIN.BLIF AHIGH_27_.PIN.BLIF \
|
||||
AHIGH_28_.PIN.BLIF AHIGH_29_.PIN.BLIF AHIGH_30_.PIN.BLIF AHIGH_31_.PIN.BLIF \
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH.D
|
||||
-------1-------- 1
|
||||
-0-------------- 1
|
||||
------1-------1- 1
|
||||
------1------1-- 1
|
||||
------1-----1--- 1
|
||||
------1----1---- 1
|
||||
------1---1----- 1
|
||||
------1--1------ 1
|
||||
------1-1------- 1
|
||||
-----01--------- 1
|
||||
----1-1--------- 1
|
||||
---0--1--------- 1
|
||||
--0---1--------- 1
|
||||
0-----1--------- 1
|
||||
------1--------1 1
|
||||
111101-000000000 0
|
||||
-1----00-------- 0
|
||||
.names A_DECODE_23_.BLIF RST.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF \
|
||||
A_DECODE_20_.BLIF A_DECODE_19_.BLIF A_1_.BLIF inst_BGACK_030_INTreg.BLIF \
|
||||
AHIGH_24_.PIN.BLIF AHIGH_25_.PIN.BLIF AHIGH_26_.PIN.BLIF AHIGH_27_.PIN.BLIF \
|
||||
AHIGH_28_.PIN.BLIF AHIGH_29_.PIN.BLIF AHIGH_30_.PIN.BLIF AHIGH_31_.PIN.BLIF \
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW.D
|
||||
1-1101--00000000 1
|
||||
-------1-------- 1
|
||||
------0--------- 1
|
||||
-0-------------- 1
|
||||
-1----10------1- 0
|
||||
-1----10-----1-- 0
|
||||
-1----10----1--- 0
|
||||
-1----10---1---- 0
|
||||
-1----10--1----- 0
|
||||
-1----10-1------ 0
|
||||
-1----101------- 0
|
||||
-1---010-------- 0
|
||||
-1--1-10-------- 0
|
||||
-1-0--10-------- 0
|
||||
-10---10-------- 0
|
||||
01----10-------- 0
|
||||
-1----10-------1 0
|
||||
.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_1_.BLIF \
|
||||
inst_DSACK1_INT.BLIF AS_030.PIN.BLIF inst_DSACK1_INT.D
|
||||
---01- 1
|
||||
--1-1- 1
|
||||
-0--1- 1
|
||||
0----- 1
|
||||
---0-1 1
|
||||
--1--1 1
|
||||
-0---1 1
|
||||
1101-- 0
|
||||
1---00 0
|
||||
.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_6_.BLIF \
|
||||
inst_AS_000_INT.BLIF AS_030.PIN.BLIF inst_AS_000_INT.D
|
||||
---01- 1
|
||||
--0-1- 1
|
||||
-1--1- 1
|
||||
0----- 1
|
||||
---0-1 1
|
||||
--0--1 1
|
||||
-1---1 1
|
||||
1011-- 0
|
||||
1---00 0
|
||||
.names RST.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF inst_AMIGA_DS.D
|
||||
0-- 1
|
||||
-11 1
|
||||
10- 0
|
||||
1-0 0
|
||||
.names RST.BLIF inst_BGACK_030_INTreg.BLIF UDS_000.PIN.BLIF inst_A0_DMA.D
|
||||
0-- 1
|
||||
-01 1
|
||||
11- 0
|
||||
1-0 0
|
||||
.names RST.BLIF inst_BGACK_030_INTreg.BLIF RW_000.PIN.BLIF inst_RW_000_DMA.D
|
||||
-1- 1
|
||||
0-- 1
|
||||
--1 1
|
||||
100 0
|
||||
.names RST.BLIF AS_030.PIN.BLIF inst_AS_030_D0.D
|
||||
0- 1
|
||||
-1 1
|
||||
10 0
|
||||
.names VPA.BLIF RST.BLIF inst_VPA_D.D
|
||||
1- 1
|
||||
-0 1
|
||||
|
|
@ -327,6 +405,18 @@ inst_DS_000_ENABLE.D
|
|||
--00---- 0
|
||||
-1-0---- 0
|
||||
0------- 0
|
||||
.names RST.BLIF inst_AS_030_D0.BLIF inst_AS_030_D1.BLIF inst_AS_030_D1.D
|
||||
11- 1
|
||||
0-1 1
|
||||
10- 0
|
||||
0-0 0
|
||||
.names RST.BLIF inst_UDS_000_INT.BLIF SM_AMIGA_6_.BLIF A_0_.PIN.BLIF \
|
||||
inst_UDS_000_INT.D
|
||||
-10- 1
|
||||
0--- 1
|
||||
--11 1
|
||||
100- 0
|
||||
1-10 0
|
||||
.names nEXP_SPACE.BLIF BG_030.BLIF RST.BLIF inst_AS_030_D0.BLIF \
|
||||
CLK_000_D_0_.BLIF BG_000DFFreg.BLIF BG_000DFFreg.D
|
||||
----01 1
|
||||
|
|
@ -350,13 +440,13 @@ cpu_est_3_.BLIF inst_VMA_INTreg.BLIF inst_VPA_D.BLIF CLK_000_D_1_.BLIF \
|
|||
CLK_000_D_0_.BLIF inst_VMA_INTreg.D
|
||||
-0000--01 1
|
||||
-----11-- 1
|
||||
-----1--1 1
|
||||
-----1-0- 1
|
||||
--0--1--- 1
|
||||
----11--- 1
|
||||
---1-1--- 1
|
||||
-0---1--- 1
|
||||
0-------- 1
|
||||
-----1-0- 1
|
||||
--0--1--- 1
|
||||
-0---1--- 1
|
||||
-----1--1 1
|
||||
11100-010 0
|
||||
1---10--- 0
|
||||
1--1-0--- 0
|
||||
|
|
@ -442,65 +532,6 @@ CLK_OUT_INTreg.BLIF AS_000.PIN.BLIF RW_000.PIN.BLIF inst_DS_000_DMA.D
|
|||
1-0-1010- 0
|
||||
1-0010-0- 0
|
||||
100-10-0- 0
|
||||
.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_1_.BLIF \
|
||||
inst_DSACK1_INT.BLIF AS_030.PIN.BLIF inst_DSACK1_INT.D
|
||||
---01- 1
|
||||
--1-1- 1
|
||||
-0--1- 1
|
||||
0----- 1
|
||||
---0-1 1
|
||||
--1--1 1
|
||||
-0---1 1
|
||||
1101-- 0
|
||||
1---00 0
|
||||
.names RST.BLIF CLK_000_D_1_.BLIF CLK_000_D_0_.BLIF SM_AMIGA_6_.BLIF \
|
||||
inst_AS_000_INT.BLIF AS_030.PIN.BLIF inst_AS_000_INT.D
|
||||
---01- 1
|
||||
--0-1- 1
|
||||
-1--1- 1
|
||||
0----- 1
|
||||
---0-1 1
|
||||
--0--1 1
|
||||
-1---1 1
|
||||
1011-- 0
|
||||
1---00 0
|
||||
.names RST.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF inst_AMIGA_DS.D
|
||||
0-- 1
|
||||
-11 1
|
||||
10- 0
|
||||
1-0 0
|
||||
.names RST.BLIF inst_BGACK_030_INTreg.BLIF UDS_000.PIN.BLIF inst_A0_DMA.D
|
||||
0-- 1
|
||||
-01 1
|
||||
11- 0
|
||||
1-0 0
|
||||
.names RST.BLIF inst_BGACK_030_INTreg.BLIF RW_000.PIN.BLIF inst_RW_000_DMA.D
|
||||
-1- 1
|
||||
0-- 1
|
||||
--1 1
|
||||
100 0
|
||||
.names RST.BLIF AS_030.PIN.BLIF inst_AS_030_D0.D
|
||||
0- 1
|
||||
-1 1
|
||||
10 0
|
||||
.names RST.BLIF A_1_.BLIF inst_BGACK_030_INTreg.BLIF \
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW.D
|
||||
-0- 1
|
||||
0-- 1
|
||||
--1 1
|
||||
110 0
|
||||
.names RST.BLIF inst_AS_030_D0.BLIF inst_AS_030_D1.BLIF inst_AS_030_D1.D
|
||||
11- 1
|
||||
0-1 1
|
||||
10- 0
|
||||
0-0 0
|
||||
.names RST.BLIF inst_UDS_000_INT.BLIF SM_AMIGA_6_.BLIF A_0_.PIN.BLIF \
|
||||
inst_UDS_000_INT.D
|
||||
-10- 1
|
||||
0--- 1
|
||||
--11 1
|
||||
100- 0
|
||||
1-10 0
|
||||
.names RST.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.D
|
||||
0- 1
|
||||
-1 1
|
||||
|
|
@ -511,7 +542,7 @@ inst_UDS_000_INT.D
|
|||
.names A_DECODE_23_.BLIF nEXP_SPACE.BLIF A_DECODE_22_.BLIF A_DECODE_21_.BLIF \
|
||||
A_DECODE_20_.BLIF inst_AS_030_D0.BLIF AHIGH_24_.PIN.BLIF AHIGH_25_.PIN.BLIF \
|
||||
AHIGH_26_.PIN.BLIF AHIGH_27_.PIN.BLIF AHIGH_28_.PIN.BLIF AHIGH_29_.PIN.BLIF \
|
||||
AHIGH_30_.PIN.BLIF AHIGH_31_.PIN.BLIF N_60
|
||||
AHIGH_30_.PIN.BLIF AHIGH_31_.PIN.BLIF N_205
|
||||
1-111000000000 1
|
||||
-1------------ 1
|
||||
-0----------1- 0
|
||||
|
|
@ -620,6 +651,18 @@ AHIGH_31_.PIN.BLIF CIIN
|
|||
.names IPL_030DFF_0_reg.BLIF IPL_030_0_
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF IPL_D0_2_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF SM_AMIGA_i_7_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF SM_AMIGA_6_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF SM_AMIGA_5_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF SM_AMIGA_4_.C
|
||||
1 1
|
||||
0 0
|
||||
|
|
@ -635,6 +678,15 @@ AHIGH_31_.PIN.BLIF CIIN
|
|||
.names CLK_OSZI.BLIF SM_AMIGA_0_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF cpu_est_1_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF cpu_est_2_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF cpu_est_3_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF IPL_030DFF_0_reg.C
|
||||
1 1
|
||||
0 0
|
||||
|
|
@ -650,16 +702,10 @@ AHIGH_31_.PIN.BLIF CIIN
|
|||
.names CLK_OSZI.BLIF IPL_D0_1_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF IPL_D0_2_.C
|
||||
.names CLK_000.BLIF CLK_000_D_0_.D
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF SM_AMIGA_i_7_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF SM_AMIGA_6_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF SM_AMIGA_5_.C
|
||||
.names CLK_OSZI.BLIF CLK_000_D_0_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_000_D_0_.BLIF CLK_000_D_1_.D
|
||||
|
|
@ -701,24 +747,30 @@ AHIGH_31_.PIN.BLIF CIIN
|
|||
.names CLK_OSZI.BLIF cpu_est_0_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF cpu_est_1_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF cpu_est_2_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF cpu_est_3_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_000.BLIF CLK_000_D_0_.D
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF CLK_000_D_0_.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_AMIGA_BUS_ENABLE_DMA_HIGH.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_DSACK1_INT.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_AS_000_INT.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_AMIGA_DS.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_A0_DMA.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_RW_000_DMA.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_AS_030_D0.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_VPA_D.C
|
||||
1 1
|
||||
0 0
|
||||
|
|
@ -728,6 +780,12 @@ AHIGH_31_.PIN.BLIF CIIN
|
|||
.names CLK_OSZI.BLIF inst_DS_000_ENABLE.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_AS_030_D1.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_UDS_000_INT.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF BG_000DFFreg.C
|
||||
1 1
|
||||
0 0
|
||||
|
|
@ -752,33 +810,6 @@ AHIGH_31_.PIN.BLIF CIIN
|
|||
.names CLK_OSZI.BLIF inst_DS_000_DMA.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_DSACK1_INT.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_AS_000_INT.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_AMIGA_DS.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_A0_DMA.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_RW_000_DMA.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_AS_030_D0.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_AMIGA_BUS_ENABLE_DMA_LOW.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_AS_030_D1.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_UDS_000_INT.C
|
||||
1 1
|
||||
0 0
|
||||
.names CLK_OSZI.BLIF inst_BGACK_030_INT_D.C
|
||||
1 1
|
||||
0 0
|
||||
|
|
@ -924,7 +955,7 @@ AS_030.PIN.BLIF BERR.OE
|
|||
.names inst_BGACK_030_INTreg.BLIF VMA.OE
|
||||
1 1
|
||||
0 0
|
||||
.names N_60.BLIF CIIN.OE
|
||||
.names N_205.BLIF CIIN.OE
|
||||
1 1
|
||||
0 0
|
||||
.names cpu_est_2_.BLIF cpu_est_2_.D.X1
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
// Signal Name Cross Reference File
|
||||
// ispLEVER Classic 2.0.00.17.20.15
|
||||
|
||||
// Design '68030_tk' created Sat Dec 30 00:43:37 2017
|
||||
// Design '68030_tk' created Thu Jan 11 20:16:29 2018
|
||||
|
||||
|
||||
// LEGEND: '>' Functional Block Port Separator
|
||||
|
|
|
|||
|
|
@ -2,11 +2,19 @@
|
|||
Copyright(C), 1992-2015, Lattice Semiconductor Corp.
|
||||
All Rights Reserved.
|
||||
|
||||
Design bus68030 created Sat Dec 30 00:43:37 2017
|
||||
Design bus68030 created Thu Jan 11 20:16:29 2018
|
||||
|
||||
|
||||
P-Terms Fan-in Fan-out Type Name (attributes)
|
||||
--------- ------ ------- ---- -----------------
|
||||
0 0 1 Pin AHIGH_30_
|
||||
1 1 1 Pin AHIGH_30_.OE
|
||||
0 0 1 Pin AHIGH_31_
|
||||
1 1 1 Pin AHIGH_31_.OE
|
||||
0 0 1 Pin AHIGH_29_
|
||||
1 1 1 Pin AHIGH_29_.OE
|
||||
0 0 1 Pin AHIGH_28_
|
||||
1 1 1 Pin AHIGH_28_.OE
|
||||
0 0 1 Pin AHIGH_27_
|
||||
1 1 1 Pin AHIGH_27_.OE
|
||||
0 0 1 Pin AHIGH_26_
|
||||
|
|
@ -15,8 +23,6 @@ Design bus68030 created Sat Dec 30 00:43:37 2017
|
|||
1 1 1 Pin AHIGH_25_.OE
|
||||
0 0 1 Pin AHIGH_24_
|
||||
1 1 1 Pin AHIGH_24_.OE
|
||||
0 0 1 Pin AHIGH_31_
|
||||
1 1 1 Pin AHIGH_31_.OE
|
||||
1 2 1 Pin AS_030-
|
||||
1 1 1 Pin AS_030.OE
|
||||
1 2 1 Pin AS_000-
|
||||
|
|
@ -42,15 +48,12 @@ Design bus68030 created Sat Dec 30 00:43:37 2017
|
|||
2 4 1 Pin AMIGA_BUS_ENABLE_HIGH-
|
||||
1 13 1 Pin CIIN
|
||||
1 1 1 Pin CIIN.OE
|
||||
0 0 1 Pin AHIGH_30_
|
||||
1 1 1 Pin AHIGH_30_.OE
|
||||
0 0 1 Pin AHIGH_29_
|
||||
1 1 1 Pin AHIGH_29_.OE
|
||||
0 0 1 Pin AHIGH_28_
|
||||
1 1 1 Pin AHIGH_28_.OE
|
||||
1 1 1 Pin SIZE_1_.OE
|
||||
2 4 1 Pin SIZE_1_.D
|
||||
1 1 1 Pin SIZE_1_.C
|
||||
1 1 1 Pin SIZE_0_.OE
|
||||
2 4 1 Pin SIZE_0_.D-
|
||||
1 1 1 Pin SIZE_0_.C
|
||||
10 8 1 Pin IPL_030_2_.D-
|
||||
1 1 1 Pin IPL_030_2_.C
|
||||
1 2 1 Pin RW_000.OE
|
||||
|
|
@ -73,9 +76,6 @@ Design bus68030 created Sat Dec 30 00:43:37 2017
|
|||
1 1 1 Pin RW.OE
|
||||
1 3 1 Pin RW.D-
|
||||
1 1 1 Pin RW.C
|
||||
1 1 1 Pin SIZE_0_.OE
|
||||
2 4 1 Pin SIZE_0_.D-
|
||||
1 1 1 Pin SIZE_0_.C
|
||||
3 3 1 Node cpu_est_0_.D
|
||||
1 1 1 Node cpu_est_0_.C
|
||||
4 5 1 Node cpu_est_1_.D
|
||||
|
|
@ -85,9 +85,9 @@ Design bus68030 created Sat Dec 30 00:43:37 2017
|
|||
1 1 1 Node cpu_est_2_.C
|
||||
4 6 1 Node cpu_est_3_.D
|
||||
1 1 1 Node cpu_est_3_.C
|
||||
1 3 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.D-
|
||||
2 16 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.D-
|
||||
1 1 1 Node inst_AMIGA_BUS_ENABLE_DMA_HIGH.C
|
||||
1 3 1 Node inst_AMIGA_BUS_ENABLE_DMA_LOW.D-
|
||||
4 16 1 Node inst_AMIGA_BUS_ENABLE_DMA_LOW.D
|
||||
1 1 1 Node inst_AMIGA_BUS_ENABLE_DMA_LOW.C
|
||||
1 2 1 Node inst_AS_030_D0.D-
|
||||
1 1 1 Node inst_AS_030_D0.C
|
||||
|
|
@ -160,9 +160,9 @@ Design bus68030 created Sat Dec 30 00:43:37 2017
|
|||
3 9 1 NodeX1 SM_AMIGA_i_7_.T.X1
|
||||
1 9 1 NodeX2 SM_AMIGA_i_7_.T.X2
|
||||
1 1 1 Node SM_AMIGA_i_7_.C
|
||||
2 14 1 Node N_60
|
||||
2 14 1 Node N_205
|
||||
=========
|
||||
243 P-Term Total: 243
|
||||
247 P-Term Total: 247
|
||||
Total Pins: 59
|
||||
Total Nodes: 42
|
||||
Average P-Term/Output: 2
|
||||
|
|
@ -170,6 +170,22 @@ Design bus68030 created Sat Dec 30 00:43:37 2017
|
|||
|
||||
Equations:
|
||||
|
||||
AHIGH_30_ = (0);
|
||||
|
||||
AHIGH_30_.OE = (!BGACK_030.Q);
|
||||
|
||||
AHIGH_31_ = (0);
|
||||
|
||||
AHIGH_31_.OE = (!BGACK_030.Q);
|
||||
|
||||
AHIGH_29_ = (0);
|
||||
|
||||
AHIGH_29_.OE = (!BGACK_030.Q);
|
||||
|
||||
AHIGH_28_ = (0);
|
||||
|
||||
AHIGH_28_.OE = (!BGACK_030.Q);
|
||||
|
||||
AHIGH_27_ = (0);
|
||||
|
||||
AHIGH_27_.OE = (!BGACK_030.Q);
|
||||
|
|
@ -186,10 +202,6 @@ AHIGH_24_ = (0);
|
|||
|
||||
AHIGH_24_.OE = (!BGACK_030.Q);
|
||||
|
||||
AHIGH_31_ = (0);
|
||||
|
||||
AHIGH_31_.OE = (!BGACK_030.Q);
|
||||
|
||||
!AS_030 = (!inst_AS_000_DMA.Q & !AS_000.PIN);
|
||||
|
||||
AS_030.OE = (!BGACK_030.Q);
|
||||
|
|
@ -241,19 +253,7 @@ AMIGA_BUS_DATA_DIR = (BGACK_030.Q & !RW_000.PIN
|
|||
|
||||
CIIN = (A_DECODE_23_ & A_DECODE_22_ & A_DECODE_21_ & A_DECODE_20_ & !inst_AS_030_D0.Q & !AHIGH_24_.PIN & !AHIGH_25_.PIN & !AHIGH_26_.PIN & !AHIGH_27_.PIN & !AHIGH_28_.PIN & !AHIGH_29_.PIN & !AHIGH_30_.PIN & !AHIGH_31_.PIN);
|
||||
|
||||
CIIN.OE = (N_60);
|
||||
|
||||
AHIGH_30_ = (0);
|
||||
|
||||
AHIGH_30_.OE = (!BGACK_030.Q);
|
||||
|
||||
AHIGH_29_ = (0);
|
||||
|
||||
AHIGH_29_.OE = (!BGACK_030.Q);
|
||||
|
||||
AHIGH_28_ = (0);
|
||||
|
||||
AHIGH_28_.OE = (!BGACK_030.Q);
|
||||
CIIN.OE = (N_205);
|
||||
|
||||
SIZE_1_.OE = (!BGACK_030.Q);
|
||||
|
||||
|
|
@ -262,6 +262,13 @@ SIZE_1_.D = (!RST
|
|||
|
||||
SIZE_1_.C = (CLK_OSZI);
|
||||
|
||||
SIZE_0_.OE = (!BGACK_030.Q);
|
||||
|
||||
!SIZE_0_.D = (RST & BGACK_030.Q
|
||||
# RST & !UDS_000.PIN & !LDS_000.PIN);
|
||||
|
||||
SIZE_0_.C = (CLK_OSZI);
|
||||
|
||||
!IPL_030_2_.D = (!IPL_2_ & RST & !IPL_030_2_.Q
|
||||
# RST & !IPL_D0_2_.Q & !IPL_030_2_.Q
|
||||
# RST & !IPL_0_ & IPL_D0_0_.Q & !IPL_030_2_.Q
|
||||
|
|
@ -342,13 +349,6 @@ RW.OE = (!BGACK_030.Q);
|
|||
|
||||
RW.C = (CLK_OSZI);
|
||||
|
||||
SIZE_0_.OE = (!BGACK_030.Q);
|
||||
|
||||
!SIZE_0_.D = (RST & BGACK_030.Q
|
||||
# RST & !UDS_000.PIN & !LDS_000.PIN);
|
||||
|
||||
SIZE_0_.C = (CLK_OSZI);
|
||||
|
||||
cpu_est_0_.D = (cpu_est_0_.Q & !CLK_000_D_1_.Q
|
||||
# cpu_est_0_.Q & CLK_000_D_0_.Q
|
||||
# !cpu_est_0_.Q & CLK_000_D_1_.Q & !CLK_000_D_0_.Q);
|
||||
|
|
@ -375,11 +375,15 @@ cpu_est_3_.D = (!cpu_est_0_.Q & cpu_est_3_.Q
|
|||
|
||||
cpu_est_3_.C = (CLK_OSZI);
|
||||
|
||||
!inst_AMIGA_BUS_ENABLE_DMA_HIGH.D = (RST & !A_1_ & !BGACK_030.Q);
|
||||
!inst_AMIGA_BUS_ENABLE_DMA_HIGH.D = (RST & !A_1_ & !BGACK_030.Q
|
||||
# A_DECODE_23_ & RST & A_DECODE_22_ & A_DECODE_21_ & !A_DECODE_20_ & A_DECODE_19_ & !BGACK_030.Q & !AHIGH_24_.PIN & !AHIGH_25_.PIN & !AHIGH_26_.PIN & !AHIGH_27_.PIN & !AHIGH_28_.PIN & !AHIGH_29_.PIN & !AHIGH_30_.PIN & !AHIGH_31_.PIN);
|
||||
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH.C = (CLK_OSZI);
|
||||
|
||||
!inst_AMIGA_BUS_ENABLE_DMA_LOW.D = (RST & A_1_ & !BGACK_030.Q);
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW.D = (!RST
|
||||
# !A_1_
|
||||
# BGACK_030.Q
|
||||
# A_DECODE_23_ & A_DECODE_22_ & A_DECODE_21_ & !A_DECODE_20_ & A_DECODE_19_ & !AHIGH_24_.PIN & !AHIGH_25_.PIN & !AHIGH_26_.PIN & !AHIGH_27_.PIN & !AHIGH_28_.PIN & !AHIGH_29_.PIN & !AHIGH_30_.PIN & !AHIGH_31_.PIN);
|
||||
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW.C = (CLK_OSZI);
|
||||
|
||||
|
|
@ -574,7 +578,7 @@ SM_AMIGA_i_7_.T.X2 = (nEXP_SPACE & RST & !inst_AS_030_000_SYNC.Q & !CLK_000_D_3_
|
|||
|
||||
SM_AMIGA_i_7_.C = (CLK_OSZI);
|
||||
|
||||
N_60 = (nEXP_SPACE
|
||||
N_205 = (nEXP_SPACE
|
||||
# A_DECODE_23_ & A_DECODE_22_ & A_DECODE_21_ & A_DECODE_20_ & !inst_AS_030_D0.Q & !AHIGH_24_.PIN & !AHIGH_25_.PIN & !AHIGH_26_.PIN & !AHIGH_27_.PIN & !AHIGH_28_.PIN & !AHIGH_29_.PIN & !AHIGH_30_.PIN & !AHIGH_31_.PIN);
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -35,17 +35,17 @@ DATA LOCATION BG_000:D_1_29 // IO {RN_BG_000}
|
|||
DATA LOCATION BG_030:C_*_21 // INP
|
||||
DATA LOCATION CIIN:E_12_47 // OUT
|
||||
DATA LOCATION CLK_000:*_*_11 // INP
|
||||
DATA LOCATION CLK_000_D_0_:D_9 // NOD
|
||||
DATA LOCATION CLK_000_D_1_:H_5 // NOD
|
||||
DATA LOCATION CLK_000_D_2_:H_6 // NOD
|
||||
DATA LOCATION CLK_000_D_3_:F_13 // NOD
|
||||
DATA LOCATION CLK_000_D_0_:F_0 // NOD
|
||||
DATA LOCATION CLK_000_D_1_:A_8 // NOD
|
||||
DATA LOCATION CLK_000_D_2_:H_2 // NOD
|
||||
DATA LOCATION CLK_000_D_3_:D_2 // NOD
|
||||
DATA LOCATION CLK_000_D_4_:F_5 // NOD
|
||||
DATA LOCATION CLK_DIV_OUT:G_1_65 // OUT
|
||||
DATA LOCATION CLK_EXP:B_1_10 // OUT
|
||||
DATA LOCATION CLK_OSZI:*_*_61 // Cin
|
||||
DATA LOCATION CLK_OUT_INTreg:A_1 // NOD
|
||||
DATA LOCATION CYCLE_DMA_0_:B_13 // NOD
|
||||
DATA LOCATION CYCLE_DMA_1_:B_2 // NOD
|
||||
DATA LOCATION CLK_OUT_INTreg:A_2 // NOD
|
||||
DATA LOCATION CYCLE_DMA_0_:G_6 // NOD
|
||||
DATA LOCATION CYCLE_DMA_1_:G_10 // NOD
|
||||
DATA LOCATION DSACK1:H_9_81 // OUT
|
||||
DATA LOCATION DS_030:A_0_98 // OUT
|
||||
DATA LOCATION DTACK:D_*_30 // INP
|
||||
|
|
@ -60,11 +60,11 @@ DATA LOCATION IPL_030_2_:B_4_9 // IO {RN_IPL_030_2_}
|
|||
DATA LOCATION IPL_0_:G_*_67 // INP
|
||||
DATA LOCATION IPL_1_:F_*_56 // INP
|
||||
DATA LOCATION IPL_2_:G_*_68 // INP
|
||||
DATA LOCATION IPL_D0_0_:A_6 // NOD
|
||||
DATA LOCATION IPL_D0_1_:D_6 // NOD
|
||||
DATA LOCATION IPL_D0_2_:A_2 // NOD
|
||||
DATA LOCATION IPL_D0_0_:F_9 // NOD
|
||||
DATA LOCATION IPL_D0_1_:A_10 // NOD
|
||||
DATA LOCATION IPL_D0_2_:C_6 // NOD
|
||||
DATA LOCATION LDS_000:D_12_31 // IO
|
||||
DATA LOCATION N_60:E_9 // NOD
|
||||
DATA LOCATION N_205:E_5 // NOD
|
||||
DATA LOCATION RN_BGACK_030:H_4 // NOD {BGACK_030}
|
||||
DATA LOCATION RN_BG_000:D_1 // NOD {BG_000}
|
||||
DATA LOCATION RN_IPL_030_0_:B_5 // NOD {IPL_030_0_}
|
||||
|
|
@ -78,38 +78,38 @@ DATA LOCATION RW_000:H_0_80 // IO {RN_RW_000}
|
|||
DATA LOCATION SIZE_0_:G_12_70 // IO
|
||||
DATA LOCATION SIZE_1_:H_12_79 // IO
|
||||
DATA LOCATION SM_AMIGA_0_:A_12 // NOD
|
||||
DATA LOCATION SM_AMIGA_1_:A_5 // NOD
|
||||
DATA LOCATION SM_AMIGA_2_:A_9 // NOD
|
||||
DATA LOCATION SM_AMIGA_3_:A_13 // NOD
|
||||
DATA LOCATION SM_AMIGA_4_:G_5 // NOD
|
||||
DATA LOCATION SM_AMIGA_5_:F_12 // NOD
|
||||
DATA LOCATION SM_AMIGA_6_:F_0 // NOD
|
||||
DATA LOCATION SM_AMIGA_i_7_:F_8 // NOD
|
||||
DATA LOCATION SM_AMIGA_1_:A_1 // NOD
|
||||
DATA LOCATION SM_AMIGA_2_:C_9 // NOD
|
||||
DATA LOCATION SM_AMIGA_3_:C_2 // NOD
|
||||
DATA LOCATION SM_AMIGA_4_:A_5 // NOD
|
||||
DATA LOCATION SM_AMIGA_5_:A_6 // NOD
|
||||
DATA LOCATION SM_AMIGA_6_:B_13 // NOD
|
||||
DATA LOCATION SM_AMIGA_i_7_:B_2 // NOD
|
||||
DATA LOCATION UDS_000:D_8_32 // IO
|
||||
DATA LOCATION VMA:D_0_35 // IO {RN_VMA}
|
||||
DATA LOCATION VPA:*_*_36 // INP
|
||||
DATA LOCATION cpu_est_0_:G_9 // NOD
|
||||
DATA LOCATION cpu_est_1_:D_13 // NOD
|
||||
DATA LOCATION cpu_est_2_:D_2 // NOD
|
||||
DATA LOCATION cpu_est_3_:A_8 // NOD
|
||||
DATA LOCATION inst_AMIGA_BUS_ENABLE_DMA_HIGH:A_10 // NOD
|
||||
DATA LOCATION inst_AMIGA_BUS_ENABLE_DMA_LOW:C_10 // NOD
|
||||
DATA LOCATION inst_AMIGA_DS:H_2 // NOD
|
||||
DATA LOCATION inst_AS_000_DMA:C_13 // NOD
|
||||
DATA LOCATION inst_AS_000_INT:C_6 // NOD
|
||||
DATA LOCATION inst_AS_030_000_SYNC:F_4 // NOD
|
||||
DATA LOCATION inst_AS_030_D0:E_8 // NOD
|
||||
DATA LOCATION cpu_est_0_:F_4 // NOD
|
||||
DATA LOCATION cpu_est_1_:G_5 // NOD
|
||||
DATA LOCATION cpu_est_2_:D_13 // NOD
|
||||
DATA LOCATION cpu_est_3_:D_9 // NOD
|
||||
DATA LOCATION inst_AMIGA_BUS_ENABLE_DMA_HIGH:E_9 // NOD
|
||||
DATA LOCATION inst_AMIGA_BUS_ENABLE_DMA_LOW:E_8 // NOD
|
||||
DATA LOCATION inst_AMIGA_DS:H_13 // NOD
|
||||
DATA LOCATION inst_AS_000_DMA:G_13 // NOD
|
||||
DATA LOCATION inst_AS_000_INT:C_13 // NOD
|
||||
DATA LOCATION inst_AS_030_000_SYNC:F_8 // NOD
|
||||
DATA LOCATION inst_AS_030_D0:F_12 // NOD
|
||||
DATA LOCATION inst_AS_030_D1:F_1 // NOD
|
||||
DATA LOCATION inst_BGACK_030_INT_D:E_13 // NOD
|
||||
DATA LOCATION inst_CLK_OUT_PRE_50:H_13 // NOD
|
||||
DATA LOCATION inst_CLK_OUT_PRE_D:E_5 // NOD
|
||||
DATA LOCATION inst_CLK_OUT_PRE_50:H_6 // NOD
|
||||
DATA LOCATION inst_CLK_OUT_PRE_D:H_5 // NOD
|
||||
DATA LOCATION inst_DSACK1_INT:G_2 // NOD
|
||||
DATA LOCATION inst_DS_000_DMA:C_9 // NOD
|
||||
DATA LOCATION inst_DS_000_ENABLE:C_2 // NOD
|
||||
DATA LOCATION inst_DTACK_D0:F_9 // NOD
|
||||
DATA LOCATION inst_LDS_000_INT:G_13 // NOD
|
||||
DATA LOCATION inst_UDS_000_INT:B_6 // NOD
|
||||
DATA LOCATION inst_VPA_D:G_6 // NOD
|
||||
DATA LOCATION inst_DS_000_DMA:G_9 // NOD
|
||||
DATA LOCATION inst_DS_000_ENABLE:A_13 // NOD
|
||||
DATA LOCATION inst_DTACK_D0:F_13 // NOD
|
||||
DATA LOCATION inst_LDS_000_INT:A_9 // NOD
|
||||
DATA LOCATION inst_UDS_000_INT:D_6 // NOD
|
||||
DATA LOCATION inst_VPA_D:B_6 // NOD
|
||||
DATA LOCATION nEXP_SPACE:*_*_14 // INP
|
||||
DATA IO_DIR AHIGH_24_:BI
|
||||
DATA IO_DIR AHIGH_25_:BI
|
||||
|
|
@ -171,6 +171,16 @@ DATA IO_DIR VMA:OUT
|
|||
DATA IO_DIR VPA:IN
|
||||
DATA IO_DIR nEXP_SPACE:IN
|
||||
DATA GLB_CLOCK CLK_OSZI
|
||||
DATA PW_LEVEL AHIGH_30_:1
|
||||
DATA SLEW AHIGH_30_:0
|
||||
DATA PW_LEVEL AHIGH_31_:1
|
||||
DATA SLEW AHIGH_31_:0
|
||||
DATA PW_LEVEL AHIGH_29_:1
|
||||
DATA SLEW AHIGH_29_:0
|
||||
DATA PW_LEVEL AHIGH_28_:1
|
||||
DATA SLEW AHIGH_28_:0
|
||||
DATA PW_LEVEL A_DECODE_23_:1
|
||||
DATA SLEW A_DECODE_23_:1
|
||||
DATA PW_LEVEL AHIGH_27_:1
|
||||
DATA SLEW AHIGH_27_:0
|
||||
DATA PW_LEVEL AHIGH_26_:1
|
||||
|
|
@ -179,32 +189,28 @@ DATA PW_LEVEL AHIGH_25_:1
|
|||
DATA SLEW AHIGH_25_:0
|
||||
DATA PW_LEVEL AHIGH_24_:1
|
||||
DATA SLEW AHIGH_24_:0
|
||||
DATA PW_LEVEL AHIGH_31_:1
|
||||
DATA SLEW AHIGH_31_:0
|
||||
DATA PW_LEVEL A_DECODE_22_:1
|
||||
DATA SLEW A_DECODE_22_:1
|
||||
DATA PW_LEVEL A_DECODE_21_:1
|
||||
DATA SLEW A_DECODE_21_:1
|
||||
DATA PW_LEVEL A_DECODE_23_:1
|
||||
DATA SLEW A_DECODE_23_:1
|
||||
DATA PW_LEVEL IPL_2_:1
|
||||
DATA SLEW IPL_2_:1
|
||||
DATA PW_LEVEL A_DECODE_20_:1
|
||||
DATA SLEW A_DECODE_20_:1
|
||||
DATA PW_LEVEL A_DECODE_19_:1
|
||||
DATA SLEW A_DECODE_19_:1
|
||||
DATA PW_LEVEL A_DECODE_18_:1
|
||||
DATA SLEW A_DECODE_18_:1
|
||||
DATA PW_LEVEL A_DECODE_17_:1
|
||||
DATA SLEW A_DECODE_17_:1
|
||||
DATA PW_LEVEL A_DECODE_16_:1
|
||||
DATA SLEW A_DECODE_16_:1
|
||||
DATA PW_LEVEL IPL_2_:1
|
||||
DATA SLEW IPL_2_:1
|
||||
DATA PW_LEVEL FC_1_:1
|
||||
DATA SLEW FC_1_:1
|
||||
DATA PW_LEVEL A_DECODE_18_:1
|
||||
DATA SLEW A_DECODE_18_:1
|
||||
DATA PW_LEVEL AS_030:1
|
||||
DATA SLEW AS_030:0
|
||||
DATA PW_LEVEL A_DECODE_17_:1
|
||||
DATA SLEW A_DECODE_17_:1
|
||||
DATA PW_LEVEL AS_000:1
|
||||
DATA SLEW AS_000:0
|
||||
DATA PW_LEVEL A_DECODE_16_:1
|
||||
DATA SLEW A_DECODE_16_:1
|
||||
DATA PW_LEVEL DS_030:1
|
||||
DATA SLEW DS_030:0
|
||||
DATA PW_LEVEL UDS_000:1
|
||||
|
|
@ -219,31 +225,31 @@ DATA SLEW BG_030:1
|
|||
DATA PW_LEVEL BGACK_000:1
|
||||
DATA SLEW BGACK_000:1
|
||||
DATA SLEW CLK_000:1
|
||||
DATA PW_LEVEL IPL_1_:1
|
||||
DATA SLEW IPL_1_:1
|
||||
DATA SLEW CLK_OSZI:1
|
||||
DATA PW_LEVEL IPL_0_:1
|
||||
DATA SLEW IPL_0_:1
|
||||
DATA PW_LEVEL CLK_DIV_OUT:1
|
||||
DATA SLEW CLK_DIV_OUT:0
|
||||
DATA PW_LEVEL FC_0_:1
|
||||
DATA SLEW FC_0_:1
|
||||
DATA PW_LEVEL CLK_EXP:1
|
||||
DATA SLEW CLK_EXP:0
|
||||
DATA PW_LEVEL A_1_:1
|
||||
DATA SLEW A_1_:1
|
||||
DATA PW_LEVEL FPU_CS:1
|
||||
DATA SLEW FPU_CS:0
|
||||
DATA PW_LEVEL FPU_SENSE:1
|
||||
DATA SLEW FPU_SENSE:1
|
||||
DATA PW_LEVEL DSACK1:1
|
||||
DATA SLEW DSACK1:0
|
||||
DATA PW_LEVEL IPL_1_:1
|
||||
DATA SLEW IPL_1_:1
|
||||
DATA PW_LEVEL DTACK:1
|
||||
DATA SLEW DTACK:1
|
||||
DATA PW_LEVEL IPL_0_:1
|
||||
DATA SLEW IPL_0_:1
|
||||
DATA PW_LEVEL AVEC:1
|
||||
DATA SLEW AVEC:0
|
||||
DATA PW_LEVEL FC_0_:1
|
||||
DATA SLEW FC_0_:1
|
||||
DATA PW_LEVEL E:1
|
||||
DATA SLEW E:0
|
||||
DATA PW_LEVEL A_1_:1
|
||||
DATA SLEW A_1_:1
|
||||
DATA SLEW VPA:1
|
||||
DATA SLEW RST:1
|
||||
DATA PW_LEVEL AMIGA_ADDR_ENABLE:1
|
||||
|
|
@ -256,14 +262,10 @@ DATA PW_LEVEL AMIGA_BUS_ENABLE_HIGH:1
|
|||
DATA SLEW AMIGA_BUS_ENABLE_HIGH:0
|
||||
DATA PW_LEVEL CIIN:1
|
||||
DATA SLEW CIIN:0
|
||||
DATA PW_LEVEL AHIGH_30_:1
|
||||
DATA SLEW AHIGH_30_:0
|
||||
DATA PW_LEVEL AHIGH_29_:1
|
||||
DATA SLEW AHIGH_29_:0
|
||||
DATA PW_LEVEL AHIGH_28_:1
|
||||
DATA SLEW AHIGH_28_:0
|
||||
DATA PW_LEVEL SIZE_1_:1
|
||||
DATA SLEW SIZE_1_:0
|
||||
DATA PW_LEVEL SIZE_0_:1
|
||||
DATA SLEW SIZE_0_:0
|
||||
DATA PW_LEVEL IPL_030_2_:1
|
||||
DATA SLEW IPL_030_2_:0
|
||||
DATA PW_LEVEL RW_000:1
|
||||
|
|
@ -282,8 +284,6 @@ DATA PW_LEVEL VMA:1
|
|||
DATA SLEW VMA:0
|
||||
DATA PW_LEVEL RW:1
|
||||
DATA SLEW RW:0
|
||||
DATA PW_LEVEL SIZE_0_:1
|
||||
DATA SLEW SIZE_0_:0
|
||||
DATA PW_LEVEL cpu_est_0_:1
|
||||
DATA SLEW cpu_est_0_:1
|
||||
DATA PW_LEVEL cpu_est_1_:1
|
||||
|
|
@ -366,8 +366,8 @@ DATA PW_LEVEL CLK_OUT_INTreg:1
|
|||
DATA SLEW CLK_OUT_INTreg:1
|
||||
DATA PW_LEVEL SM_AMIGA_i_7_:1
|
||||
DATA SLEW SM_AMIGA_i_7_:1
|
||||
DATA PW_LEVEL N_60:1
|
||||
DATA SLEW N_60:1
|
||||
DATA PW_LEVEL N_205:1
|
||||
DATA SLEW N_205:1
|
||||
DATA PW_LEVEL RN_IPL_030_2_:1
|
||||
DATA PW_LEVEL RN_RW_000:1
|
||||
DATA PW_LEVEL RN_BG_000:1
|
||||
|
|
|
|||
|
|
@ -1,22 +1,21 @@
|
|||
|
||||
GROUP MACH_SEG_A DS_030 AVEC SM_AMIGA_2_ SM_AMIGA_3_ cpu_est_3_ SM_AMIGA_1_
|
||||
SM_AMIGA_0_ inst_AMIGA_BUS_ENABLE_DMA_HIGH IPL_D0_0_ IPL_D0_2_ CLK_OUT_INTreg
|
||||
GROUP MACH_SEG_A DS_030 AVEC inst_DS_000_ENABLE inst_LDS_000_INT SM_AMIGA_4_
|
||||
SM_AMIGA_1_ SM_AMIGA_0_ SM_AMIGA_5_ IPL_D0_1_ CLK_OUT_INTreg CLK_000_D_1_
|
||||
|
||||
GROUP MACH_SEG_B IPL_030_1_ RN_IPL_030_1_ IPL_030_0_ RN_IPL_030_0_ IPL_030_2_
|
||||
RN_IPL_030_2_ CLK_EXP AHIGH_31_ AHIGH_30_ AHIGH_29_ CYCLE_DMA_0_
|
||||
CYCLE_DMA_1_ inst_UDS_000_INT
|
||||
RN_IPL_030_2_ CLK_EXP AHIGH_31_ AHIGH_30_ AHIGH_29_ SM_AMIGA_i_7_
|
||||
SM_AMIGA_6_ inst_VPA_D
|
||||
GROUP MACH_SEG_C AMIGA_BUS_ENABLE_LOW AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_
|
||||
AHIGH_24_ inst_AS_000_DMA inst_DS_000_DMA inst_DS_000_ENABLE inst_AS_000_INT
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW
|
||||
AHIGH_24_ SM_AMIGA_2_ SM_AMIGA_3_ inst_AS_000_INT IPL_D0_2_
|
||||
GROUP MACH_SEG_D VMA RN_VMA BG_000 RN_BG_000 AMIGA_BUS_ENABLE_HIGH LDS_000
|
||||
UDS_000 AMIGA_ADDR_ENABLE cpu_est_1_ cpu_est_2_ IPL_D0_1_ CLK_000_D_0_
|
||||
|
||||
GROUP MACH_SEG_E CIIN BERR AMIGA_BUS_DATA_DIR AS_000 N_60 inst_AS_030_D0
|
||||
inst_BGACK_030_INT_D inst_CLK_OUT_PRE_D
|
||||
GROUP MACH_SEG_F inst_AS_030_000_SYNC SM_AMIGA_i_7_ SM_AMIGA_6_ SM_AMIGA_5_
|
||||
inst_AS_030_D1 inst_DTACK_D0 CLK_000_D_3_ CLK_000_D_4_
|
||||
GROUP MACH_SEG_G SIZE_0_ E A_0_ RW CLK_DIV_OUT inst_LDS_000_INT inst_DSACK1_INT
|
||||
SM_AMIGA_4_ cpu_est_0_ inst_VPA_D
|
||||
UDS_000 AMIGA_ADDR_ENABLE cpu_est_3_ cpu_est_2_ inst_UDS_000_INT
|
||||
CLK_000_D_3_
|
||||
GROUP MACH_SEG_E CIIN BERR AMIGA_BUS_DATA_DIR AS_000 inst_AMIGA_BUS_ENABLE_DMA_HIGH
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW N_205 inst_BGACK_030_INT_D
|
||||
GROUP MACH_SEG_F inst_AS_030_000_SYNC inst_AS_030_D1 cpu_est_0_ inst_DTACK_D0
|
||||
IPL_D0_0_ inst_AS_030_D0 CLK_000_D_0_ CLK_000_D_4_
|
||||
GROUP MACH_SEG_G SIZE_0_ E A_0_ RW CLK_DIV_OUT inst_AS_000_DMA inst_DS_000_DMA
|
||||
CYCLE_DMA_0_ CYCLE_DMA_1_ inst_DSACK1_INT cpu_est_1_
|
||||
GROUP MACH_SEG_H RW_000 RN_RW_000 FPU_CS BGACK_030 RN_BGACK_030 SIZE_1_
|
||||
DSACK1 AS_030 inst_AMIGA_DS inst_CLK_OUT_PRE_50 CLK_000_D_2_ CLK_000_D_1_
|
||||
|
||||
DSACK1 AS_030 inst_AMIGA_DS inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D
|
||||
CLK_000_D_2_
|
||||
|
|
@ -1 +1 @@
|
|||
<LATTICE_ENCRYPTED_BLIF>7022=02GQV
|
||||
<LATTICE_ENCRYPTED_BLIF>083;=33 y@yhP?H
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -16,8 +16,8 @@ RCS = "$Revision: 1.2 $";
|
|||
Parent = m4a5.lci;
|
||||
SDS_File = m4a5.sds;
|
||||
Design = 68030_tk.tt4;
|
||||
DATE = 12/30/17;
|
||||
TIME = 00:43:46;
|
||||
DATE = 1/11/18;
|
||||
TIME = 20:16:38;
|
||||
Source_Format = Pure_VHDL;
|
||||
Type = TT2;
|
||||
Pre_Fit_Time = 1;
|
||||
|
|
@ -76,23 +76,26 @@ Usercode_Format = Hex;
|
|||
|
||||
[LOCATION ASSIGNMENTS]
|
||||
Layer = OFF;
|
||||
AHIGH_30_ = pin,5,-,B,-;
|
||||
AHIGH_31_ = pin,4,-,B,-;
|
||||
AHIGH_29_ = pin,6,-,B,-;
|
||||
AHIGH_28_ = pin,15,-,C,-;
|
||||
A_DECODE_23_ = pin,85,-,H,-;
|
||||
AHIGH_27_ = pin,16,-,C,-;
|
||||
AHIGH_26_ = pin,17,-,C,-;
|
||||
AHIGH_25_ = pin,18,-,C,-;
|
||||
AHIGH_24_ = pin,19,-,C,-;
|
||||
AHIGH_31_ = pin,4,-,B,-;
|
||||
A_DECODE_22_ = pin,84,-,H,-;
|
||||
A_DECODE_21_ = pin,94,-,A,-;
|
||||
A_DECODE_23_ = pin,85,-,H,-;
|
||||
IPL_2_ = pin,68,-,G,-;
|
||||
A_DECODE_20_ = pin,93,-,A,-;
|
||||
A_DECODE_19_ = pin,97,-,A,-;
|
||||
A_DECODE_18_ = pin,95,-,A,-;
|
||||
A_DECODE_17_ = pin,59,-,F,-;
|
||||
A_DECODE_16_ = pin,96,-,A,-;
|
||||
IPL_2_ = pin,68,-,G,-;
|
||||
FC_1_ = pin,58,-,F,-;
|
||||
A_DECODE_18_ = pin,95,-,A,-;
|
||||
AS_030 = pin,82,-,H,-;
|
||||
A_DECODE_17_ = pin,59,-,F,-;
|
||||
AS_000 = pin,42,-,E,-;
|
||||
A_DECODE_16_ = pin,96,-,A,-;
|
||||
DS_030 = pin,98,-,A,-;
|
||||
UDS_000 = pin,32,-,D,-;
|
||||
LDS_000 = pin,31,-,D,-;
|
||||
|
|
@ -101,19 +104,19 @@ BERR = pin,41,-,E,-;
|
|||
BG_030 = pin,21,-,C,-;
|
||||
BGACK_000 = pin,28,-,D,-;
|
||||
CLK_000 = pin,11,-,-,-;
|
||||
IPL_1_ = pin,56,-,F,-;
|
||||
CLK_OSZI = pin,61,-,-,-;
|
||||
IPL_0_ = pin,67,-,G,-;
|
||||
CLK_DIV_OUT = pin,65,-,G,-;
|
||||
FC_0_ = pin,57,-,F,-;
|
||||
CLK_EXP = pin,10,-,B,-;
|
||||
A_1_ = pin,60,-,F,-;
|
||||
FPU_CS = pin,78,-,H,-;
|
||||
FPU_SENSE = pin,91,-,A,-;
|
||||
DSACK1 = pin,81,-,H,-;
|
||||
IPL_1_ = pin,56,-,F,-;
|
||||
DTACK = pin,30,-,D,-;
|
||||
IPL_0_ = pin,67,-,G,-;
|
||||
AVEC = pin,92,-,A,-;
|
||||
FC_0_ = pin,57,-,F,-;
|
||||
E = pin,66,-,G,-;
|
||||
A_1_ = pin,60,-,F,-;
|
||||
VPA = pin,36,-,-,-;
|
||||
RST = pin,86,-,-,-;
|
||||
AMIGA_ADDR_ENABLE = pin,33,-,D,-;
|
||||
|
|
@ -121,10 +124,8 @@ AMIGA_BUS_DATA_DIR = pin,48,-,E,-;
|
|||
AMIGA_BUS_ENABLE_LOW = pin,20,-,C,-;
|
||||
AMIGA_BUS_ENABLE_HIGH = pin,34,-,D,-;
|
||||
CIIN = pin,47,-,E,-;
|
||||
AHIGH_30_ = pin,5,-,B,-;
|
||||
AHIGH_29_ = pin,6,-,B,-;
|
||||
AHIGH_28_ = pin,15,-,C,-;
|
||||
SIZE_1_ = pin,79,-,H,-;
|
||||
SIZE_0_ = pin,70,-,G,-;
|
||||
IPL_030_2_ = pin,9,-,B,-;
|
||||
RW_000 = pin,80,-,H,-;
|
||||
BG_000 = pin,29,-,D,-;
|
||||
|
|
@ -134,49 +135,48 @@ IPL_030_1_ = pin,7,-,B,-;
|
|||
IPL_030_0_ = pin,8,-,B,-;
|
||||
VMA = pin,35,-,D,-;
|
||||
RW = pin,71,-,G,-;
|
||||
SIZE_0_ = pin,70,-,G,-;
|
||||
cpu_est_0_ = node,-,-,G,9;
|
||||
cpu_est_1_ = node,-,-,D,13;
|
||||
cpu_est_2_ = node,-,-,D,2;
|
||||
cpu_est_3_ = node,-,-,A,8;
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH = node,-,-,A,10;
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW = node,-,-,C,10;
|
||||
inst_AS_030_D0 = node,-,-,E,8;
|
||||
cpu_est_0_ = node,-,-,F,4;
|
||||
cpu_est_1_ = node,-,-,G,5;
|
||||
cpu_est_2_ = node,-,-,D,13;
|
||||
cpu_est_3_ = node,-,-,D,9;
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH = node,-,-,E,9;
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW = node,-,-,E,8;
|
||||
inst_AS_030_D0 = node,-,-,F,12;
|
||||
inst_AS_030_D1 = node,-,-,F,1;
|
||||
inst_AS_030_000_SYNC = node,-,-,F,4;
|
||||
inst_AS_000_DMA = node,-,-,C,13;
|
||||
inst_DS_000_DMA = node,-,-,C,9;
|
||||
inst_VPA_D = node,-,-,G,6;
|
||||
CLK_000_D_3_ = node,-,-,F,13;
|
||||
inst_DTACK_D0 = node,-,-,F,9;
|
||||
inst_AMIGA_DS = node,-,-,H,2;
|
||||
CLK_000_D_1_ = node,-,-,H,5;
|
||||
CLK_000_D_0_ = node,-,-,D,9;
|
||||
inst_CLK_OUT_PRE_50 = node,-,-,H,13;
|
||||
inst_CLK_OUT_PRE_D = node,-,-,E,5;
|
||||
IPL_D0_0_ = node,-,-,A,6;
|
||||
IPL_D0_1_ = node,-,-,D,6;
|
||||
IPL_D0_2_ = node,-,-,A,2;
|
||||
CLK_000_D_2_ = node,-,-,H,6;
|
||||
inst_AS_030_000_SYNC = node,-,-,F,8;
|
||||
inst_AS_000_DMA = node,-,-,G,13;
|
||||
inst_DS_000_DMA = node,-,-,G,9;
|
||||
inst_VPA_D = node,-,-,B,6;
|
||||
CLK_000_D_3_ = node,-,-,D,2;
|
||||
inst_DTACK_D0 = node,-,-,F,13;
|
||||
inst_AMIGA_DS = node,-,-,H,13;
|
||||
CLK_000_D_1_ = node,-,-,A,8;
|
||||
CLK_000_D_0_ = node,-,-,F,0;
|
||||
inst_CLK_OUT_PRE_50 = node,-,-,H,6;
|
||||
inst_CLK_OUT_PRE_D = node,-,-,H,5;
|
||||
IPL_D0_0_ = node,-,-,F,9;
|
||||
IPL_D0_1_ = node,-,-,A,10;
|
||||
IPL_D0_2_ = node,-,-,C,6;
|
||||
CLK_000_D_2_ = node,-,-,H,2;
|
||||
CLK_000_D_4_ = node,-,-,F,5;
|
||||
inst_UDS_000_INT = node,-,-,B,6;
|
||||
inst_DS_000_ENABLE = node,-,-,C,2;
|
||||
inst_LDS_000_INT = node,-,-,G,13;
|
||||
inst_UDS_000_INT = node,-,-,D,6;
|
||||
inst_DS_000_ENABLE = node,-,-,A,13;
|
||||
inst_LDS_000_INT = node,-,-,A,9;
|
||||
inst_BGACK_030_INT_D = node,-,-,E,13;
|
||||
SM_AMIGA_6_ = node,-,-,F,0;
|
||||
SM_AMIGA_4_ = node,-,-,G,5;
|
||||
SM_AMIGA_1_ = node,-,-,A,5;
|
||||
SM_AMIGA_6_ = node,-,-,B,13;
|
||||
SM_AMIGA_4_ = node,-,-,A,5;
|
||||
SM_AMIGA_1_ = node,-,-,A,1;
|
||||
SM_AMIGA_0_ = node,-,-,A,12;
|
||||
CYCLE_DMA_0_ = node,-,-,B,13;
|
||||
CYCLE_DMA_1_ = node,-,-,B,2;
|
||||
CYCLE_DMA_0_ = node,-,-,G,6;
|
||||
CYCLE_DMA_1_ = node,-,-,G,10;
|
||||
inst_DSACK1_INT = node,-,-,G,2;
|
||||
inst_AS_000_INT = node,-,-,C,6;
|
||||
SM_AMIGA_5_ = node,-,-,F,12;
|
||||
SM_AMIGA_3_ = node,-,-,A,13;
|
||||
SM_AMIGA_2_ = node,-,-,A,9;
|
||||
CLK_OUT_INTreg = node,-,-,A,1;
|
||||
SM_AMIGA_i_7_ = node,-,-,F,8;
|
||||
N_60 = node,-,-,E,9;
|
||||
inst_AS_000_INT = node,-,-,C,13;
|
||||
SM_AMIGA_5_ = node,-,-,A,6;
|
||||
SM_AMIGA_3_ = node,-,-,C,2;
|
||||
SM_AMIGA_2_ = node,-,-,C,9;
|
||||
CLK_OUT_INTreg = node,-,-,A,2;
|
||||
SM_AMIGA_i_7_ = node,-,-,B,2;
|
||||
N_205 = node,-,-,E,5;
|
||||
|
||||
[GROUP ASSIGNMENTS]
|
||||
Layer = OFF;
|
||||
|
|
|
|||
|
|
@ -1711,4 +1711,118 @@
|
|||
35 VPA 1 -1 -1 1 6 35 -1
|
||||
29 DTACK 1 -1 -1 1 5 29 -1
|
||||
20 BG_030 1 -1 -1 1 3 20 -1
|
||||
10 CLK_000 1 -1 -1 1 3 10 -1
|
||||
10 CLK_000 1 -1 -1 1 3 10 -1
|
||||
108 "number of signals after reading design file"
|
||||
|
||||
"sig sig sig pair blk fan PT xor sync"
|
||||
"num name type sig num out pin node cnt PT type"
|
||||
"--- ---- ---- ---- --- --- --- ---- --- --- ----"
|
||||
|
||||
81 AS_030 5 -1 7 7 0 2 3 4 5 6 7 81 -1 1 0 21
|
||||
41 AS_000 5 -1 4 4 0 4 6 7 41 -1 1 0 21
|
||||
79 RW_000 5 336 7 2 4 6 79 -1 4 0 21
|
||||
68 A_0_ 5 -1 6 2 0 3 68 -1 2 0 21
|
||||
70 RW 5 -1 6 2 0 7 70 -1 1 0 21
|
||||
31 UDS_000 5 -1 3 2 6 7 31 -1 1 0 21
|
||||
30 LDS_000 5 -1 3 2 6 7 30 -1 1 0 21
|
||||
78 SIZE_1_ 5 -1 7 1 0 78 -1 2 0 21
|
||||
69 SIZE_0_ 5 -1 6 1 0 69 -1 2 0 21
|
||||
40 BERR 5 -1 4 1 2 40 -1 1 0 21
|
||||
18 AHIGH_24_ 5 -1 2 1 4 18 -1 1 0 21
|
||||
17 AHIGH_25_ 5 -1 2 1 4 17 -1 1 0 21
|
||||
16 AHIGH_26_ 5 -1 2 1 4 16 -1 1 0 21
|
||||
15 AHIGH_27_ 5 -1 2 1 4 15 -1 1 0 21
|
||||
14 AHIGH_28_ 5 -1 2 1 4 14 -1 1 0 21
|
||||
5 AHIGH_29_ 5 -1 1 1 4 5 -1 1 0 21
|
||||
4 AHIGH_30_ 5 -1 1 1 4 4 -1 1 0 21
|
||||
3 AHIGH_31_ 5 -1 1 1 4 3 -1 1 0 21
|
||||
8 IPL_030_2_ 5 335 1 0 8 -1 10 0 21
|
||||
7 IPL_030_0_ 5 340 1 0 7 -1 10 0 21
|
||||
6 IPL_030_1_ 5 339 1 0 6 -1 10 0 21
|
||||
82 BGACK_030 5 338 7 0 82 -1 3 0 21
|
||||
34 VMA 5 341 3 0 34 -1 3 0 21
|
||||
65 E 0 6 0 65 -1 2 0 21
|
||||
47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21
|
||||
33 AMIGA_BUS_ENABLE_HIGH 0 3 0 33 -1 2 0 21
|
||||
28 BG_000 5 337 3 0 28 -1 2 0 21
|
||||
97 DS_030 0 0 0 97 -1 1 0 21
|
||||
91 AVEC 0 0 0 91 -1 1 0 21
|
||||
80 DSACK1 0 7 0 80 -1 1 0 21
|
||||
77 FPU_CS 0 7 0 77 -1 1 0 21
|
||||
64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
|
||||
46 CIIN 0 4 0 46 -1 1 0 21
|
||||
32 AMIGA_ADDR_ENABLE 0 3 0 32 -1 1 0 21
|
||||
19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
|
||||
9 CLK_EXP 0 1 0 9 -1 1 0 21
|
||||
338 RN_BGACK_030 3 82 7 8 0 1 2 3 4 5 6 7 82 -1 3 0 21
|
||||
309 CLK_000_D_0_ 3 -1 5 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
||||
308 CLK_000_D_1_ 3 -1 0 7 0 1 2 3 5 6 7 -1 -1 1 0 21
|
||||
321 SM_AMIGA_6_ 3 -1 1 5 0 1 2 3 7 -1 -1 3 0 21
|
||||
293 cpu_est_0_ 3 -1 5 4 2 3 5 6 -1 -1 3 0 21
|
||||
301 inst_AS_030_000_SYNC 3 -1 5 3 1 3 5 -1 -1 7 0 21
|
||||
296 cpu_est_3_ 3 -1 3 3 2 3 6 -1 -1 4 0 21
|
||||
294 cpu_est_1_ 3 -1 6 3 2 3 6 -1 -1 4 0 21
|
||||
333 SM_AMIGA_i_7_ 3 -1 1 3 1 5 7 -1 -1 3 1 21
|
||||
324 SM_AMIGA_0_ 3 -1 0 3 0 1 7 -1 -1 3 0 21
|
||||
299 inst_AS_030_D0 3 -1 5 3 3 4 5 -1 -1 1 0 21
|
||||
295 cpu_est_2_ 3 -1 3 3 2 3 6 -1 -1 1 1 21
|
||||
303 inst_DS_000_DMA 3 -1 6 2 0 6 -1 -1 6 0 21
|
||||
302 inst_AS_000_DMA 3 -1 6 2 6 7 -1 -1 6 0 21
|
||||
331 SM_AMIGA_2_ 3 -1 2 2 0 2 -1 -1 5 0 21
|
||||
341 RN_VMA 3 34 3 2 2 3 34 -1 3 0 21
|
||||
323 SM_AMIGA_1_ 3 -1 0 2 0 6 -1 -1 3 0 21
|
||||
322 SM_AMIGA_4_ 3 -1 0 2 0 2 -1 -1 3 0 21
|
||||
319 inst_LDS_000_INT 3 -1 0 2 0 3 -1 -1 3 0 21
|
||||
318 inst_DS_000_ENABLE 3 -1 0 2 0 3 -1 -1 3 0 21
|
||||
328 inst_AS_000_INT 3 -1 2 2 2 4 -1 -1 2 0 21
|
||||
327 inst_DSACK1_INT 3 -1 6 2 6 7 -1 -1 2 0 21
|
||||
332 CLK_OUT_INTreg 3 -1 0 2 1 6 -1 -1 1 0 21
|
||||
311 inst_CLK_OUT_PRE_D 3 -1 7 2 0 6 -1 -1 1 0 21
|
||||
305 CLK_000_D_3_ 3 -1 3 2 1 5 -1 -1 1 0 21
|
||||
304 inst_VPA_D 3 -1 1 2 2 3 -1 -1 1 0 21
|
||||
340 RN_IPL_030_0_ 3 7 1 1 1 7 -1 10 0 21
|
||||
339 RN_IPL_030_1_ 3 6 1 1 1 6 -1 10 0 21
|
||||
335 RN_IPL_030_2_ 3 8 1 1 1 8 -1 10 0 21
|
||||
330 SM_AMIGA_3_ 3 -1 2 1 2 -1 -1 5 0 21
|
||||
336 RN_RW_000 3 79 7 1 7 79 -1 4 0 21
|
||||
325 CYCLE_DMA_0_ 3 -1 6 1 6 -1 -1 4 0 21
|
||||
298 inst_AMIGA_BUS_ENABLE_DMA_LOW 3 -1 4 1 2 -1 -1 4 0 21
|
||||
329 SM_AMIGA_5_ 3 -1 0 1 0 -1 -1 3 0 21
|
||||
337 RN_BG_000 3 28 3 1 3 28 -1 2 0 21
|
||||
334 N_205 3 -1 4 1 4 -1 -1 2 0 21
|
||||
326 CYCLE_DMA_1_ 3 -1 6 1 6 -1 -1 2 0 21
|
||||
317 inst_UDS_000_INT 3 -1 3 1 3 -1 -1 2 0 21
|
||||
307 inst_AMIGA_DS 3 -1 7 1 6 -1 -1 2 0 21
|
||||
300 inst_AS_030_D1 3 -1 5 1 5 -1 -1 2 0 21
|
||||
297 inst_AMIGA_BUS_ENABLE_DMA_HIGH 3 -1 4 1 3 -1 -1 2 0 21
|
||||
320 inst_BGACK_030_INT_D 3 -1 4 1 5 -1 -1 1 0 21
|
||||
316 CLK_000_D_4_ 3 -1 5 1 1 -1 -1 1 0 21
|
||||
315 CLK_000_D_2_ 3 -1 7 1 3 -1 -1 1 0 21
|
||||
314 IPL_D0_2_ 3 -1 2 1 1 -1 -1 1 0 21
|
||||
313 IPL_D0_1_ 3 -1 0 1 1 -1 -1 1 0 21
|
||||
312 IPL_D0_0_ 3 -1 5 1 1 -1 -1 1 0 21
|
||||
310 inst_CLK_OUT_PRE_50 3 -1 7 1 7 -1 -1 1 0 21
|
||||
306 inst_DTACK_D0 3 -1 5 1 2 -1 -1 1 0 21
|
||||
60 CLK_OSZI 9 -1 0 60 -1
|
||||
85 RST 1 -1 -1 8 0 1 2 3 4 5 6 7 85 -1
|
||||
13 nEXP_SPACE 1 -1 -1 5 1 3 4 5 7 13 -1
|
||||
96 A_DECODE_19_ 1 -1 -1 3 4 5 7 96 -1
|
||||
95 A_DECODE_16_ 1 -1 -1 3 4 5 7 95 -1
|
||||
94 A_DECODE_18_ 1 -1 -1 3 4 5 7 94 -1
|
||||
58 A_DECODE_17_ 1 -1 -1 3 4 5 7 58 -1
|
||||
57 FC_1_ 1 -1 -1 3 4 5 7 57 -1
|
||||
56 FC_0_ 1 -1 -1 3 4 5 7 56 -1
|
||||
90 FPU_SENSE 1 -1 -1 2 4 7 90 -1
|
||||
67 IPL_2_ 1 -1 -1 2 1 2 67 -1
|
||||
66 IPL_0_ 1 -1 -1 2 1 5 66 -1
|
||||
55 IPL_1_ 1 -1 -1 2 0 1 55 -1
|
||||
27 BGACK_000 1 -1 -1 2 4 7 27 -1
|
||||
93 A_DECODE_21_ 1 -1 -1 1 4 93 -1
|
||||
92 A_DECODE_20_ 1 -1 -1 1 4 92 -1
|
||||
84 A_DECODE_23_ 1 -1 -1 1 4 84 -1
|
||||
83 A_DECODE_22_ 1 -1 -1 1 4 83 -1
|
||||
59 A_1_ 1 -1 -1 1 4 59 -1
|
||||
35 VPA 1 -1 -1 1 1 35 -1
|
||||
29 DTACK 1 -1 -1 1 5 29 -1
|
||||
20 BG_030 1 -1 -1 1 3 20 -1
|
||||
10 CLK_000 1 -1 -1 1 5 10 -1
|
||||
|
|
@ -8,26 +8,29 @@
|
|||
; Source file 68030_tk.tt4
|
||||
; FITTER-generated Placements.
|
||||
; DEVICE mach447a
|
||||
; DATE Sat Dec 30 00:43:46 2017
|
||||
; DATE Thu Jan 11 20:16:38 2018
|
||||
|
||||
|
||||
Pin 5 AHIGH_30_ Comb ; S6=1 S9=1 Pair 125
|
||||
Pin 4 AHIGH_31_ Comb ; S6=1 S9=1 Pair 143
|
||||
Pin 6 AHIGH_29_ Comb ; S6=1 S9=1 Pair 137
|
||||
Pin 15 AHIGH_28_ Comb ; S6=1 S9=1 Pair 149
|
||||
Pin 85 A_DECODE_23_
|
||||
Pin 16 AHIGH_27_ Comb ; S6=1 S9=1 Pair 157
|
||||
Pin 17 AHIGH_26_ Comb ; S6=1 S9=1 Pair 155
|
||||
Pin 18 AHIGH_25_ Comb ; S6=1 S9=1 Pair 167
|
||||
Pin 19 AHIGH_24_ Comb ; S6=1 S9=1 Pair 161
|
||||
Pin 4 AHIGH_31_ Comb ; S6=1 S9=1 Pair 143
|
||||
Pin 84 A_DECODE_22_
|
||||
Pin 94 A_DECODE_21_
|
||||
Pin 85 A_DECODE_23_
|
||||
Pin 68 IPL_2_
|
||||
Pin 93 A_DECODE_20_
|
||||
Pin 97 A_DECODE_19_
|
||||
Pin 95 A_DECODE_18_
|
||||
Pin 59 A_DECODE_17_
|
||||
Pin 96 A_DECODE_16_
|
||||
Pin 68 IPL_2_
|
||||
Pin 58 FC_1_
|
||||
Pin 95 A_DECODE_18_
|
||||
Pin 82 AS_030 Comb ; S6=1 S9=1 Pair 281
|
||||
Pin 59 A_DECODE_17_
|
||||
Pin 42 AS_000 Comb ; S6=1 S9=1 Pair 203
|
||||
Pin 96 A_DECODE_16_
|
||||
Pin 98 DS_030 Comb ; S6=1 S9=1 Pair 101
|
||||
Pin 32 UDS_000 Comb ; S6=1 S9=1 Pair 185
|
||||
Pin 31 LDS_000 Comb ; S6=1 S9=1 Pair 191
|
||||
|
|
@ -36,19 +39,19 @@ Pin 41 BERR Comb ; S6=1 S9=1 Pair 197
|
|||
Pin 21 BG_030
|
||||
Pin 28 BGACK_000
|
||||
Pin 11 CLK_000
|
||||
Pin 56 IPL_1_
|
||||
Pin 61 CLK_OSZI
|
||||
Pin 67 IPL_0_
|
||||
Pin 65 CLK_DIV_OUT Comb ; S6=1 S9=1 Pair 247
|
||||
Pin 57 FC_0_
|
||||
Pin 10 CLK_EXP Comb ; S6=1 S9=1 Pair 127
|
||||
Pin 60 A_1_
|
||||
Pin 78 FPU_CS Comb ; S6=1 S9=1 Pair 271
|
||||
Pin 91 FPU_SENSE
|
||||
Pin 81 DSACK1 Comb ; S6=1 S9=1 Pair 283
|
||||
Pin 56 IPL_1_
|
||||
Pin 30 DTACK
|
||||
Pin 67 IPL_0_
|
||||
Pin 92 AVEC Comb ; S6=1 S9=1 Pair 107
|
||||
Pin 57 FC_0_
|
||||
Pin 66 E Comb ; S6=1 S9=1 Pair 251
|
||||
Pin 60 A_1_
|
||||
Pin 36 VPA
|
||||
Pin 86 RST
|
||||
Pin 33 AMIGA_ADDR_ENABLE Comb ; S6=1 S9=1 Pair 181
|
||||
|
|
@ -56,10 +59,8 @@ Pin 48 AMIGA_BUS_DATA_DIR Comb ; S6=1 S9=1 Pair 199
|
|||
Pin 20 AMIGA_BUS_ENABLE_LOW Comb ; S6=1 S9=1 Pair 151
|
||||
Pin 34 AMIGA_BUS_ENABLE_HIGH Comb ; S6=1 S9=1 Pair 179
|
||||
Pin 47 CIIN Comb ; S6=1 S9=1 Pair 215
|
||||
Pin 5 AHIGH_30_ Comb ; S6=1 S9=1 Pair 125
|
||||
Pin 6 AHIGH_29_ Comb ; S6=1 S9=1 Pair 137
|
||||
Pin 15 AHIGH_28_ Comb ; S6=1 S9=1 Pair 149
|
||||
Pin 79 SIZE_1_ Reg ; S6=1 S9=1 Pair 287
|
||||
Pin 70 SIZE_0_ Reg ; S6=1 S9=1 Pair 263
|
||||
Pin 9 IPL_030_2_ Reg ; S6=1 S9=1 Pair 131
|
||||
Pin 80 RW_000 Reg ; S6=1 S9=1 Pair 269
|
||||
Pin 29 BG_000 Reg ; S6=1 S9=1 Pair 175
|
||||
|
|
@ -69,21 +70,21 @@ Pin 7 IPL_030_1_ Reg ; S6=1 S9=1 Pair 139
|
|||
Pin 8 IPL_030_0_ Reg ; S6=1 S9=1 Pair 133
|
||||
Pin 35 VMA Reg ; S6=1 S9=1 Pair 173
|
||||
Pin 71 RW Reg ; S6=1 S9=1 Pair 245
|
||||
Pin 70 SIZE_0_ Reg ; S6=1 S9=1 Pair 263
|
||||
Node 125 RN_AHIGH_30_ Comb ; S6=1 S9=1
|
||||
Node 143 RN_AHIGH_31_ Comb ; S6=1 S9=1
|
||||
Node 137 RN_AHIGH_29_ Comb ; S6=1 S9=1
|
||||
Node 149 RN_AHIGH_28_ Comb ; S6=1 S9=1
|
||||
Node 157 RN_AHIGH_27_ Comb ; S6=1 S9=1
|
||||
Node 155 RN_AHIGH_26_ Comb ; S6=1 S9=1
|
||||
Node 167 RN_AHIGH_25_ Comb ; S6=1 S9=1
|
||||
Node 161 RN_AHIGH_24_ Comb ; S6=1 S9=1
|
||||
Node 143 RN_AHIGH_31_ Comb ; S6=1 S9=1
|
||||
Node 281 RN_AS_030 Comb ; S6=1 S9=1
|
||||
Node 203 RN_AS_000 Comb ; S6=1 S9=1
|
||||
Node 185 RN_UDS_000 Comb ; S6=1 S9=1
|
||||
Node 191 RN_LDS_000 Comb ; S6=1 S9=1
|
||||
Node 197 RN_BERR Comb ; S6=1 S9=1
|
||||
Node 125 RN_AHIGH_30_ Comb ; S6=1 S9=1
|
||||
Node 137 RN_AHIGH_29_ Comb ; S6=1 S9=1
|
||||
Node 149 RN_AHIGH_28_ Comb ; S6=1 S9=1
|
||||
Node 287 RN_SIZE_1_ Reg ; S6=1 S9=1
|
||||
Node 263 RN_SIZE_0_ Reg ; S6=1 S9=1
|
||||
Node 131 RN_IPL_030_2_ Reg ; S6=1 S9=1
|
||||
Node 269 RN_RW_000 Reg ; S6=1 S9=1
|
||||
Node 175 RN_BG_000 Reg ; S6=1 S9=1
|
||||
|
|
@ -93,48 +94,47 @@ Node 139 RN_IPL_030_1_ Reg ; S6=1 S9=1
|
|||
Node 133 RN_IPL_030_0_ Reg ; S6=1 S9=1
|
||||
Node 173 RN_VMA Reg ; S6=1 S9=1
|
||||
Node 245 RN_RW Reg ; S6=1 S9=1
|
||||
Node 263 RN_SIZE_0_ Reg ; S6=1 S9=1
|
||||
Node 259 cpu_est_0_ Reg ; S6=1 S9=1
|
||||
Node 193 cpu_est_1_ Reg ; S6=1 S9=1
|
||||
Node 176 cpu_est_2_ Reg ; S6=1 S9=1
|
||||
Node 113 cpu_est_3_ Reg ; S6=1 S9=1
|
||||
Node 116 inst_AMIGA_BUS_ENABLE_DMA_HIGH Reg ; S6=1 S9=1
|
||||
Node 164 inst_AMIGA_BUS_ENABLE_DMA_LOW Reg ; S6=1 S9=1
|
||||
Node 209 inst_AS_030_D0 Reg ; S6=1 S9=1
|
||||
Node 227 cpu_est_0_ Reg ; S6=1 S9=1
|
||||
Node 253 cpu_est_1_ Reg ; S6=1 S9=1
|
||||
Node 193 cpu_est_2_ Reg ; S6=1 S9=1
|
||||
Node 187 cpu_est_3_ Reg ; S6=1 S9=1
|
||||
Node 211 inst_AMIGA_BUS_ENABLE_DMA_HIGH Reg ; S6=1 S9=1
|
||||
Node 209 inst_AMIGA_BUS_ENABLE_DMA_LOW Reg ; S6=1 S9=1
|
||||
Node 239 inst_AS_030_D0 Reg ; S6=1 S9=1
|
||||
Node 223 inst_AS_030_D1 Reg ; S6=1 S9=1
|
||||
Node 227 inst_AS_030_000_SYNC Reg ; S6=1 S9=1
|
||||
Node 169 inst_AS_000_DMA Reg ; S6=1 S9=1
|
||||
Node 163 inst_DS_000_DMA Reg ; S6=1 S9=1
|
||||
Node 254 inst_VPA_D Reg ; S6=1 S9=1
|
||||
Node 241 CLK_000_D_3_ Reg ; S6=1 S9=1
|
||||
Node 235 inst_DTACK_D0 Reg ; S6=1 S9=1
|
||||
Node 272 inst_AMIGA_DS Reg ; S6=1 S9=1
|
||||
Node 277 CLK_000_D_1_ Reg ; S6=1 S9=1
|
||||
Node 187 CLK_000_D_0_ Reg ; S6=1 S9=1
|
||||
Node 289 inst_CLK_OUT_PRE_50 Reg ; S6=1 S9=1
|
||||
Node 205 inst_CLK_OUT_PRE_D Reg ; S6=1 S9=1
|
||||
Node 110 IPL_D0_0_ Reg ; S6=1 S9=1
|
||||
Node 182 IPL_D0_1_ Reg ; S6=1 S9=1
|
||||
Node 104 IPL_D0_2_ Reg ; S6=1 S9=1
|
||||
Node 278 CLK_000_D_2_ Reg ; S6=1 S9=1
|
||||
Node 233 inst_AS_030_000_SYNC Reg ; S6=1 S9=1
|
||||
Node 265 inst_AS_000_DMA Reg ; S6=1 S9=1
|
||||
Node 259 inst_DS_000_DMA Reg ; S6=1 S9=1
|
||||
Node 134 inst_VPA_D Reg ; S6=1 S9=1
|
||||
Node 176 CLK_000_D_3_ Reg ; S6=1 S9=1
|
||||
Node 241 inst_DTACK_D0 Reg ; S6=1 S9=1
|
||||
Node 289 inst_AMIGA_DS Reg ; S6=1 S9=1
|
||||
Node 113 CLK_000_D_1_ Reg ; S6=1 S9=1
|
||||
Node 221 CLK_000_D_0_ Reg ; S6=1 S9=1
|
||||
Node 278 inst_CLK_OUT_PRE_50 Reg ; S6=1 S9=1
|
||||
Node 277 inst_CLK_OUT_PRE_D Reg ; S6=1 S9=1
|
||||
Node 235 IPL_D0_0_ Reg ; S6=1 S9=1
|
||||
Node 116 IPL_D0_1_ Reg ; S6=1 S9=1
|
||||
Node 158 IPL_D0_2_ Reg ; S6=1 S9=1
|
||||
Node 272 CLK_000_D_2_ Reg ; S6=1 S9=1
|
||||
Node 229 CLK_000_D_4_ Reg ; S6=1 S9=1
|
||||
Node 134 inst_UDS_000_INT Reg ; S6=1 S9=1
|
||||
Node 152 inst_DS_000_ENABLE Reg ; S6=1 S9=1
|
||||
Node 265 inst_LDS_000_INT Reg ; S6=1 S9=1
|
||||
Node 182 inst_UDS_000_INT Reg ; S6=1 S9=1
|
||||
Node 121 inst_DS_000_ENABLE Reg ; S6=1 S9=1
|
||||
Node 115 inst_LDS_000_INT Reg ; S6=1 S9=1
|
||||
Node 217 inst_BGACK_030_INT_D Reg ; S6=1 S9=1
|
||||
Node 221 SM_AMIGA_6_ Reg ; S6=1 S9=1
|
||||
Node 253 SM_AMIGA_4_ Reg ; S6=1 S9=1
|
||||
Node 109 SM_AMIGA_1_ Reg ; S6=1 S9=1
|
||||
Node 145 SM_AMIGA_6_ Reg ; S6=1 S9=1
|
||||
Node 109 SM_AMIGA_4_ Reg ; S6=1 S9=1
|
||||
Node 103 SM_AMIGA_1_ Reg ; S6=1 S9=1
|
||||
Node 119 SM_AMIGA_0_ Reg ; S6=1 S9=1
|
||||
Node 145 CYCLE_DMA_0_ Reg ; S6=1 S9=1
|
||||
Node 128 CYCLE_DMA_1_ Reg ; S6=1 S9=1
|
||||
Node 254 CYCLE_DMA_0_ Reg ; S6=1 S9=1
|
||||
Node 260 CYCLE_DMA_1_ Reg ; S6=1 S9=1
|
||||
Node 248 inst_DSACK1_INT Reg ; S6=1 S9=1
|
||||
Node 158 inst_AS_000_INT Reg ; S6=1 S9=1
|
||||
Node 239 SM_AMIGA_5_ Reg ; S6=1 S9=1
|
||||
Node 121 SM_AMIGA_3_ Reg ; S6=1 S9=1
|
||||
Node 115 SM_AMIGA_2_ Reg ; S6=1 S9=1
|
||||
Node 103 CLK_OUT_INTreg Reg ; S6=1 S9=1
|
||||
Node 233 SM_AMIGA_i_7_ Reg ; S6=1 S9=1
|
||||
Node 211 N_60 Comb ; S6=1 S9=1
|
||||
Node 169 inst_AS_000_INT Reg ; S6=1 S9=1
|
||||
Node 110 SM_AMIGA_5_ Reg ; S6=1 S9=1
|
||||
Node 152 SM_AMIGA_3_ Reg ; S6=1 S9=1
|
||||
Node 163 SM_AMIGA_2_ Reg ; S6=1 S9=1
|
||||
Node 104 CLK_OUT_INTreg Reg ; S6=1 S9=1
|
||||
Node 128 SM_AMIGA_i_7_ Reg ; S6=1 S9=1
|
||||
Node 205 N_205 Comb ; S6=1 S9=1
|
||||
; Unused Pins & Nodes
|
||||
; -> None Found.
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -54,6 +54,7 @@ inst_LDS_000_INT 1 1 1 1 .. .. 2 2
|
|||
AS_000 .. .. .. .. 1 1 .. ..
|
||||
CIIN .. .. .. .. 1 1 .. ..
|
||||
SIZE_1_ 1 1 0 0 .. .. .. ..
|
||||
SIZE_0_ 1 1 0 0 .. .. .. ..
|
||||
IPL_030_2_ 1 1 0 0 .. .. 1 1
|
||||
RN_IPL_030_2_ 1 1 0 0 .. .. 1 1
|
||||
RW_000 1 1 0 0 .. .. 1 1
|
||||
|
|
@ -68,7 +69,6 @@ inst_LDS_000_INT 1 1 1 1 .. .. 2 2
|
|||
VMA 1 1 0 0 .. .. 1 1
|
||||
RN_VMA 1 1 0 0 .. .. 1 1
|
||||
RW 1 1 0 0 .. .. .. ..
|
||||
SIZE_0_ 1 1 0 0 .. .. .. ..
|
||||
cpu_est_0_ .. .. .. .. .. .. 1 1
|
||||
cpu_est_1_ .. .. 1 1 .. .. 1 1
|
||||
cpu_est_2_ .. .. 1 1 .. .. 1 1
|
||||
|
|
@ -99,4 +99,4 @@ inst_BGACK_030_INT_D 1 1 .. .. .. .. 1 1
|
|||
SM_AMIGA_2_ 1 1 .. .. .. .. 1 1
|
||||
CLK_OUT_INTreg .. .. 1 1 .. .. 1 1
|
||||
SM_AMIGA_i_7_ 1 1 .. .. .. .. 1 1
|
||||
N_60 .. .. .. .. 1 1 .. ..
|
||||
N_205 .. .. .. .. 1 1 .. ..
|
||||
|
|
@ -1,14 +1,14 @@
|
|||
#$ TOOL ispLEVER Classic 2.0.00.17.20.15
|
||||
#$ DATE Sat Dec 30 00:43:37 2017
|
||||
#$ DATE Thu Jan 11 20:16:29 2018
|
||||
#$ MODULE 68030_tk
|
||||
#$ PINS 59 AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AHIGH_31_ A_DECODE_22_ A_DECODE_21_ A_DECODE_23_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BGACK_000 CLK_000 IPL_1_ CLK_OSZI IPL_0_ CLK_DIV_OUT FC_0_ CLK_EXP A_1_ FPU_CS FPU_SENSE DSACK1 DTACK AVEC E VPA RST AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN AHIGH_30_ AHIGH_29_ AHIGH_28_ SIZE_1_ IPL_030_2_ RW_000 BG_000 BGACK_030 A_0_ IPL_030_1_ IPL_030_0_ VMA RW SIZE_0_
|
||||
#$ NODES 42 cpu_est_0_ cpu_est_1_ cpu_est_2_ cpu_est_3_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_D1 inst_AS_030_000_SYNC inst_AS_000_DMA inst_DS_000_DMA inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_AMIGA_DS CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_UDS_000_INT inst_DS_000_ENABLE inst_LDS_000_INT inst_BGACK_030_INT_D SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ CYCLE_DMA_0_ CYCLE_DMA_1_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ CLK_OUT_INTreg SM_AMIGA_i_7_ N_60
|
||||
#$ PINS 59 AHIGH_30_ AHIGH_31_ AHIGH_29_ AHIGH_28_ A_DECODE_23_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_DECODE_22_ A_DECODE_21_ IPL_2_ A_DECODE_20_ A_DECODE_19_ FC_1_ A_DECODE_18_ AS_030 A_DECODE_17_ AS_000 A_DECODE_16_ DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BGACK_000 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 IPL_1_ DTACK IPL_0_ AVEC FC_0_ E A_1_ VPA RST AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SIZE_1_ SIZE_0_ IPL_030_2_ RW_000 BG_000 BGACK_030 A_0_ IPL_030_1_ IPL_030_0_ VMA RW
|
||||
#$ NODES 42 cpu_est_0_ cpu_est_1_ cpu_est_2_ cpu_est_3_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_D1 inst_AS_030_000_SYNC inst_AS_000_DMA inst_DS_000_DMA inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_AMIGA_DS CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_UDS_000_INT inst_DS_000_ENABLE inst_LDS_000_INT inst_BGACK_030_INT_D SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ CYCLE_DMA_0_ CYCLE_DMA_1_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ CLK_OUT_INTreg SM_AMIGA_i_7_ N_205
|
||||
.type fr
|
||||
.i 90
|
||||
.o 152
|
||||
.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_000 CLK_OSZI FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q cpu_est_3_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_D1.Q inst_AS_030_000_SYNC.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q VMA.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q inst_AMIGA_DS.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_4_.Q inst_UDS_000_INT.Q inst_DS_000_ENABLE.Q inst_LDS_000_INT.Q inst_BGACK_030_INT_D.Q SM_AMIGA_6_.Q RW_000.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q IPL_030_1_.Q SM_AMIGA_i_7_.Q IPL_030_2_.Q N_60 AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN
|
||||
.ob DS_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 AVEC E AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.C SM_AMIGA_1_.C SM_AMIGA_0_.C IPL_030_0_.C IPL_030_1_.C IPL_030_2_.C IPL_D0_0_.C IPL_D0_1_.C IPL_D0_2_.C SM_AMIGA_i_7_.C SM_AMIGA_6_.C SM_AMIGA_5_.C CLK_000_D_1_.C CLK_000_D_2_.C CLK_000_D_3_.C CLK_000_D_4_.C SIZE_0_.C SIZE_1_.C CYCLE_DMA_0_.C CYCLE_DMA_1_.C cpu_est_0_.C cpu_est_1_.C cpu_est_2_.C cpu_est_3_.C CLK_000_D_0_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_VPA_D.C inst_DTACK_D0.C inst_DS_000_ENABLE.C BG_000.C inst_LDS_000_INT.C VMA.C RW_000.C inst_AS_030_000_SYNC.C BGACK_030.C inst_AS_000_DMA.C inst_DS_000_DMA.C inst_DSACK1_INT.C inst_AS_000_INT.C inst_AMIGA_DS.C A_0_.C RW.C inst_AS_030_D0.C inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_AS_030_D1.C inst_UDS_000_INT.C inst_BGACK_030_INT_D.C CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.C AHIGH_31_ AS_030 AS_000 UDS_000 LDS_000 BERR AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ N_60 AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE VMA.OE CIIN.OE BGACK_030.D cpu_est_0_.D cpu_est_1_.D cpu_est_2_.D cpu_est_3_.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AS_030_D0.D inst_AS_030_D1.D inst_AS_030_000_SYNC.D inst_AS_000_DMA.D inst_DS_000_DMA.D VMA.T inst_VPA_D.D CLK_000_D_3_.D inst_DTACK_D0.D inst_AMIGA_DS.D CLK_000_D_1_.D CLK_000_D_0_.D inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_D.D IPL_D0_0_.D IPL_D0_1_.D IPL_D0_2_.D CLK_000_D_2_.D CLK_000_D_4_.D SIZE_0_.D SIZE_1_.D A_0_.D RW.D inst_UDS_000_INT.D inst_DS_000_ENABLE.D inst_LDS_000_INT.D inst_BGACK_030_INT_D.D SM_AMIGA_6_.D RW_000.D SM_AMIGA_4_.D SM_AMIGA_1_.D SM_AMIGA_0_.D CYCLE_DMA_0_.D CYCLE_DMA_1_.D inst_DSACK1_INT.D inst_AS_000_INT.D SM_AMIGA_5_.D SM_AMIGA_3_.T SM_AMIGA_2_.D BG_000.D CLK_OUT_INTreg.D IPL_030_0_.D IPL_030_1_.D SM_AMIGA_i_7_.T IPL_030_2_.D
|
||||
.p 421
|
||||
.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_000 CLK_OSZI FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q cpu_est_3_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_D1.Q inst_AS_030_000_SYNC.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q VMA.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q inst_AMIGA_DS.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_4_.Q inst_UDS_000_INT.Q inst_DS_000_ENABLE.Q inst_LDS_000_INT.Q inst_BGACK_030_INT_D.Q SM_AMIGA_6_.Q RW_000.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q IPL_030_1_.Q SM_AMIGA_i_7_.Q IPL_030_2_.Q N_205 AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN
|
||||
.ob DS_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 AVEC E AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_D0_2_.C SM_AMIGA_i_7_.C SM_AMIGA_6_.C SM_AMIGA_5_.C SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.C SM_AMIGA_1_.C SM_AMIGA_0_.C cpu_est_1_.C cpu_est_2_.C cpu_est_3_.C IPL_030_0_.C IPL_030_1_.C IPL_030_2_.C IPL_D0_0_.C IPL_D0_1_.C CLK_000_D_0_.C CLK_000_D_1_.C CLK_000_D_2_.C CLK_000_D_3_.C CLK_000_D_4_.C SIZE_0_.C SIZE_1_.C CYCLE_DMA_0_.C CYCLE_DMA_1_.C cpu_est_0_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_DSACK1_INT.C inst_AS_000_INT.C inst_AMIGA_DS.C A_0_.C RW.C inst_AS_030_D0.C inst_VPA_D.C inst_DTACK_D0.C inst_DS_000_ENABLE.C inst_AS_030_D1.C inst_UDS_000_INT.C BG_000.C inst_LDS_000_INT.C VMA.C RW_000.C inst_AS_030_000_SYNC.C BGACK_030.C inst_AS_000_DMA.C inst_DS_000_DMA.C inst_BGACK_030_INT_D.C CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.C AHIGH_31_ AS_030 AS_000 UDS_000 LDS_000 BERR AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ N_205 AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE VMA.OE CIIN.OE BGACK_030.D cpu_est_0_.D cpu_est_1_.D cpu_est_2_.D cpu_est_3_.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AS_030_D0.D inst_AS_030_D1.D inst_AS_030_000_SYNC.D inst_AS_000_DMA.D inst_DS_000_DMA.D VMA.T inst_VPA_D.D CLK_000_D_3_.D inst_DTACK_D0.D inst_AMIGA_DS.D CLK_000_D_1_.D CLK_000_D_0_.D inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_D.D IPL_D0_0_.D IPL_D0_1_.D IPL_D0_2_.D CLK_000_D_2_.D CLK_000_D_4_.D SIZE_0_.D SIZE_1_.D A_0_.D RW.D inst_UDS_000_INT.D inst_DS_000_ENABLE.D inst_LDS_000_INT.D inst_BGACK_030_INT_D.D SM_AMIGA_6_.D RW_000.D SM_AMIGA_4_.D SM_AMIGA_1_.D SM_AMIGA_0_.D CYCLE_DMA_0_.D CYCLE_DMA_1_.D inst_DSACK1_INT.D inst_AS_000_INT.D SM_AMIGA_5_.D SM_AMIGA_3_.T SM_AMIGA_2_.D BG_000.D CLK_OUT_INTreg.D IPL_030_0_.D IPL_030_1_.D SM_AMIGA_i_7_.T IPL_030_2_.D
|
||||
.p 447
|
||||
------------------------------------------------------------------------------------------ ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-1---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
--0--------------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
|
@ -28,7 +28,11 @@
|
|||
-------------------1---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
--------------------1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---------------------0-------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
0---------------------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
------------0---------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-------------0--------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
--------------1-------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---------------0------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------0------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------------------1------------------------------------------------------------------ ~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~11~~~~~~~~~~~~~~~~~~~~~~1~~~1~~~~~~~~~~~~~~~~~~
|
||||
---1-------------------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
|
@ -183,6 +187,15 @@
|
|||
-----------------------0----------------------------------------------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---------------------------------------------------------------------------11------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------------------0---------------------------------------------------00------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1--------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1---------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1----------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1-----------------------------------------------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1------------------------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1-------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1--------------------------------------------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1---------------------------------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
1-----------1101---------------------------------------------------------------00000000--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
1-----------111---------------0------------------------------------------------00000000--- ~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------------------------------------------------1---------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------------------------------------------------1-----------------------10--------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~
|
||||
|
|
@ -221,7 +234,11 @@
|
|||
-----------1-----------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~000~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------------------0------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0000~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1-----------0------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
0----------1----------10------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------10---------10------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1-0--------10------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1--1-------10------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1---0------10------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------00------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
------------------------00---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1--------------1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
|
@ -399,20 +416,29 @@
|
|||
-----------1-----------------------------------------1------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~
|
||||
-------------------------------------------------------------------------------1---------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---0---------------------------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10-------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
--------------------------------------------------------------------------------1--------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---0----------------------------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10--------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---------------------------------------------------------------------------------1-------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---0-----------------------------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10---------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------------------------------------------------------------------1------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---0------------------------------------------------------------------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10----------------------------------------------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------------------------------------------------------------------------------1------ ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---0-------------------------------------------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10-----------------------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
------------------------------------------------------------------------------------1----- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---0--------------------------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-------------------------------------------------------------------------------------1---- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---0---------------------------------------------------------------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10-------------------------------------------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
--------------------------------------------------------------------------------------1--- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---0----------------------------------------------------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10--------------------------------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
1----------11101-------0-------------------------------------------------------00000000--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1-----------------------------------------1---------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~
|
||||
-----------1-----------------------------------------1---------------------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1------------1-----------0----0----------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~
|
||||
|
|
|
|||
|
|
@ -1,14 +1,14 @@
|
|||
#$ TOOL ispLEVER Classic 2.0.00.17.20.15
|
||||
#$ DATE Sat Dec 30 00:43:37 2017
|
||||
#$ DATE Thu Jan 11 20:16:29 2018
|
||||
#$ MODULE 68030_tk
|
||||
#$ PINS 59 AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AHIGH_31_ A_DECODE_22_ A_DECODE_21_ A_DECODE_23_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BGACK_000 CLK_000 IPL_1_ CLK_OSZI IPL_0_ CLK_DIV_OUT FC_0_ CLK_EXP A_1_ FPU_CS FPU_SENSE DSACK1 DTACK AVEC E VPA RST AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN AHIGH_30_ AHIGH_29_ AHIGH_28_ SIZE_1_ IPL_030_2_ RW_000 BG_000 BGACK_030 A_0_ IPL_030_1_ IPL_030_0_ VMA RW SIZE_0_
|
||||
#$ NODES 42 cpu_est_0_ cpu_est_1_ cpu_est_2_ cpu_est_3_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_D1 inst_AS_030_000_SYNC inst_AS_000_DMA inst_DS_000_DMA inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_AMIGA_DS CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_UDS_000_INT inst_DS_000_ENABLE inst_LDS_000_INT inst_BGACK_030_INT_D SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ CYCLE_DMA_0_ CYCLE_DMA_1_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ CLK_OUT_INTreg SM_AMIGA_i_7_ N_60
|
||||
#$ PINS 59 AHIGH_30_ AHIGH_31_ AHIGH_29_ AHIGH_28_ A_DECODE_23_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ A_DECODE_22_ A_DECODE_21_ IPL_2_ A_DECODE_20_ A_DECODE_19_ FC_1_ A_DECODE_18_ AS_030 A_DECODE_17_ AS_000 A_DECODE_16_ DS_030 UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BGACK_000 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS FPU_SENSE DSACK1 IPL_1_ DTACK IPL_0_ AVEC FC_0_ E A_1_ VPA RST AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SIZE_1_ SIZE_0_ IPL_030_2_ RW_000 BG_000 BGACK_030 A_0_ IPL_030_1_ IPL_030_0_ VMA RW
|
||||
#$ NODES 42 cpu_est_0_ cpu_est_1_ cpu_est_2_ cpu_est_3_ inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0 inst_AS_030_D1 inst_AS_030_000_SYNC inst_AS_000_DMA inst_DS_000_DMA inst_VPA_D CLK_000_D_3_ inst_DTACK_D0 inst_AMIGA_DS CLK_000_D_1_ CLK_000_D_0_ inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_D IPL_D0_0_ IPL_D0_1_ IPL_D0_2_ CLK_000_D_2_ CLK_000_D_4_ inst_UDS_000_INT inst_DS_000_ENABLE inst_LDS_000_INT inst_BGACK_030_INT_D SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_ CYCLE_DMA_0_ CYCLE_DMA_1_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_ SM_AMIGA_3_ SM_AMIGA_2_ CLK_OUT_INTreg SM_AMIGA_i_7_ N_205
|
||||
.type fr
|
||||
.i 90
|
||||
.o 152
|
||||
.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_000 CLK_OSZI FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q cpu_est_3_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_D1.Q inst_AS_030_000_SYNC.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q VMA.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q inst_AMIGA_DS.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_4_.Q inst_UDS_000_INT.Q inst_DS_000_ENABLE.Q inst_LDS_000_INT.Q inst_BGACK_030_INT_D.Q SM_AMIGA_6_.Q RW_000.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q IPL_030_1_.Q SM_AMIGA_i_7_.Q IPL_030_2_.Q N_60 AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN
|
||||
.ob DS_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 AVEC E AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.C SM_AMIGA_1_.C SM_AMIGA_0_.C IPL_030_0_.C IPL_030_1_.C IPL_030_2_.C IPL_D0_0_.C IPL_D0_1_.C IPL_D0_2_.C SM_AMIGA_i_7_.C SM_AMIGA_6_.C SM_AMIGA_5_.C CLK_000_D_1_.C CLK_000_D_2_.C CLK_000_D_3_.C CLK_000_D_4_.C SIZE_0_.C SIZE_1_.C CYCLE_DMA_0_.C CYCLE_DMA_1_.C cpu_est_0_.C cpu_est_1_.C cpu_est_2_.C cpu_est_3_.C CLK_000_D_0_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_VPA_D.C inst_DTACK_D0.C inst_DS_000_ENABLE.C BG_000.C inst_LDS_000_INT.C VMA.C RW_000.C inst_AS_030_000_SYNC.C BGACK_030.C inst_AS_000_DMA.C inst_DS_000_DMA.C inst_DSACK1_INT.C inst_AS_000_INT.C inst_AMIGA_DS.C A_0_.C RW.C inst_AS_030_D0.C inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_AS_030_D1.C inst_UDS_000_INT.C inst_BGACK_030_INT_D.C CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.C AHIGH_31_ AS_030 AS_000 UDS_000 LDS_000 BERR AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ N_60 AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE VMA.OE CIIN.OE BGACK_030.D cpu_est_0_.D cpu_est_1_.D cpu_est_2_.D cpu_est_3_.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AS_030_D0.D inst_AS_030_D1.D inst_AS_030_000_SYNC.D inst_AS_000_DMA.D inst_DS_000_DMA.D VMA.T inst_VPA_D.D CLK_000_D_3_.D inst_DTACK_D0.D inst_AMIGA_DS.D CLK_000_D_1_.D CLK_000_D_0_.D inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_D.D IPL_D0_0_.D IPL_D0_1_.D IPL_D0_2_.D CLK_000_D_2_.D CLK_000_D_4_.D SIZE_0_.D SIZE_1_.D A_0_.D RW.D inst_UDS_000_INT.D inst_DS_000_ENABLE.D inst_LDS_000_INT.D inst_BGACK_030_INT_D.D SM_AMIGA_6_.D RW_000.D SM_AMIGA_4_.D SM_AMIGA_1_.D SM_AMIGA_0_.D CYCLE_DMA_0_.D CYCLE_DMA_1_.D inst_DSACK1_INT.D inst_AS_000_INT.D SM_AMIGA_5_.D SM_AMIGA_3_.T SM_AMIGA_2_.D BG_000.D CLK_OUT_INTreg.D IPL_030_0_.D IPL_030_1_.D SM_AMIGA_i_7_.T IPL_030_2_.D
|
||||
.p 421
|
||||
.ilb A_DECODE_23_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_000 CLK_OSZI FPU_SENSE DTACK VPA RST A_DECODE_22_ A_DECODE_21_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_ A_DECODE_16_ IPL_1_ IPL_0_ FC_0_ A_1_ BGACK_030.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q cpu_est_3_.Q inst_AMIGA_BUS_ENABLE_DMA_HIGH.Q inst_AMIGA_BUS_ENABLE_DMA_LOW.Q inst_AS_030_D0.Q inst_AS_030_D1.Q inst_AS_030_000_SYNC.Q inst_AS_000_DMA.Q inst_DS_000_DMA.Q VMA.Q inst_VPA_D.Q CLK_000_D_3_.Q inst_DTACK_D0.Q inst_AMIGA_DS.Q CLK_000_D_1_.Q CLK_000_D_0_.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_D.Q IPL_D0_0_.Q IPL_D0_1_.Q IPL_D0_2_.Q CLK_000_D_2_.Q CLK_000_D_4_.Q inst_UDS_000_INT.Q inst_DS_000_ENABLE.Q inst_LDS_000_INT.Q inst_BGACK_030_INT_D.Q SM_AMIGA_6_.Q RW_000.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q IPL_030_1_.Q SM_AMIGA_i_7_.Q IPL_030_2_.Q N_205 AS_030.PIN AS_000.PIN RW_000.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN
|
||||
.ob DS_030 CLK_DIV_OUT CLK_EXP FPU_CS DSACK1 AVEC E AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN IPL_D0_2_.C SM_AMIGA_i_7_.C SM_AMIGA_6_.C SM_AMIGA_5_.C SM_AMIGA_4_.C SM_AMIGA_3_.C SM_AMIGA_2_.C SM_AMIGA_1_.C SM_AMIGA_0_.C cpu_est_1_.C cpu_est_2_.C cpu_est_3_.C IPL_030_0_.C IPL_030_1_.C IPL_030_2_.C IPL_D0_0_.C IPL_D0_1_.C CLK_000_D_0_.C CLK_000_D_1_.C CLK_000_D_2_.C CLK_000_D_3_.C CLK_000_D_4_.C SIZE_0_.C SIZE_1_.C CYCLE_DMA_0_.C CYCLE_DMA_1_.C cpu_est_0_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.C inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_DSACK1_INT.C inst_AS_000_INT.C inst_AMIGA_DS.C A_0_.C RW.C inst_AS_030_D0.C inst_VPA_D.C inst_DTACK_D0.C inst_DS_000_ENABLE.C inst_AS_030_D1.C inst_UDS_000_INT.C BG_000.C inst_LDS_000_INT.C VMA.C RW_000.C inst_AS_030_000_SYNC.C BGACK_030.C inst_AS_000_DMA.C inst_DS_000_DMA.C inst_BGACK_030_INT_D.C CLK_OUT_INTreg.C inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.C AHIGH_31_ AS_030 AS_000 UDS_000 LDS_000 BERR AHIGH_30_ AHIGH_29_ AHIGH_28_ AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ N_205 AS_030.OE AS_000.OE RW_000.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE AHIGH_24_.OE AHIGH_25_.OE AHIGH_26_.OE AHIGH_27_.OE AHIGH_28_.OE AHIGH_29_.OE AHIGH_30_.OE AHIGH_31_.OE A_0_.OE BERR.OE RW.OE DS_030.OE DSACK1.OE VMA.OE CIIN.OE BGACK_030.D cpu_est_0_.D cpu_est_1_.D cpu_est_2_.D cpu_est_3_.D inst_AMIGA_BUS_ENABLE_DMA_HIGH.D inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AS_030_D0.D inst_AS_030_D1.D inst_AS_030_000_SYNC.D inst_AS_000_DMA.D inst_DS_000_DMA.D VMA.T inst_VPA_D.D CLK_000_D_3_.D inst_DTACK_D0.D inst_AMIGA_DS.D CLK_000_D_1_.D CLK_000_D_0_.D inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_D.D IPL_D0_0_.D IPL_D0_1_.D IPL_D0_2_.D CLK_000_D_2_.D CLK_000_D_4_.D SIZE_0_.D SIZE_1_.D A_0_.D RW.D inst_UDS_000_INT.D inst_DS_000_ENABLE.D inst_LDS_000_INT.D inst_BGACK_030_INT_D.D SM_AMIGA_6_.D RW_000.D SM_AMIGA_4_.D SM_AMIGA_1_.D SM_AMIGA_0_.D CYCLE_DMA_0_.D CYCLE_DMA_1_.D inst_DSACK1_INT.D inst_AS_000_INT.D SM_AMIGA_5_.D SM_AMIGA_3_.T SM_AMIGA_2_.D BG_000.D CLK_OUT_INTreg.D IPL_030_0_.D IPL_030_1_.D SM_AMIGA_i_7_.T IPL_030_2_.D
|
||||
.p 447
|
||||
------------------------------------------------------------------------------------------ ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-1---------------------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
--0--------------------------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
|
@ -28,7 +28,11 @@
|
|||
-------------------1---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
--------------------1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---------------------0-------------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
0---------------------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
------------0---------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-------------0--------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
--------------1-------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---------------0------1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------0------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------------------1------------------------------------------------------------------ ~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~11~~~~~~~~~~~~~~~~~~~~~~1~~~1~~~~~~~~~~~~~~~~~~
|
||||
---1-------------------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
|
@ -183,6 +187,15 @@
|
|||
-----------------------0----------------------------------------------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---------------------------------------------------------------------------11------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------------------0---------------------------------------------------00------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1--------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1---------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1----------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1-----------------------------------------------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1------------------------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1-------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1--------------------------------------------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------1---------------------------------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
1-----------1101---------------------------------------------------------------00000000--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
1-----------111---------------0------------------------------------------------00000000--- ~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------------------------------------------------1---------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------------------------------------------------1-----------------------10--------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~
|
||||
|
|
@ -221,7 +234,11 @@
|
|||
-----------1-----------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~000~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------------------0------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0000~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1-----------0------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
0----------1----------10------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------10---------10------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1-0--------10------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1--1-------10------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1---0------10------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------00------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
------------------------00---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1--------------1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
|
|
@ -399,20 +416,29 @@
|
|||
-----------1-----------------------------------------1------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~
|
||||
-------------------------------------------------------------------------------1---------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---0---------------------------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10-------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
--------------------------------------------------------------------------------1--------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---0----------------------------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10--------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---------------------------------------------------------------------------------1-------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---0-----------------------------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10---------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
----------------------------------------------------------------------------------1------- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---0------------------------------------------------------------------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10----------------------------------------------------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------------------------------------------------------------------------------1------ ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---0-------------------------------------------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10-----------------------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
------------------------------------------------------------------------------------1----- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---0--------------------------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-------------------------------------------------------------------------------------1---- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---0---------------------------------------------------------------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10-------------------------------------------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
--------------------------------------------------------------------------------------1--- ~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
---0----------------------------------------------------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1----------10--------------------------------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
1----------11101-------0-------------------------------------------------------00000000--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1-----------------------------------------1---------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~
|
||||
-----------1-----------------------------------------1---------------------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~
|
||||
-----------1------------1-----------0----0----------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~
|
||||
|
|
|
|||
|
|
@ -1,14 +1,14 @@
|
|||
#$ TOOL ispLEVER Classic 2.0.00.17.20.15
|
||||
#$ DATE Sat Dec 30 00:43:37 2017
|
||||
#$ DATE Thu Jan 11 20:16:29 2018
|
||||
#$ MODULE BUS68030
|
||||
#$ PINS 59 AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AHIGH_31_ A_DECODE_22_
|
||||
A_DECODE_21_ A_DECODE_23_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_
|
||||
A_DECODE_16_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR
|
||||
BG_030 BGACK_000 CLK_000 IPL_1_ CLK_OSZI IPL_0_ CLK_DIV_OUT FC_0_ CLK_EXP A_1_
|
||||
FPU_CS FPU_SENSE DSACK1 DTACK AVEC E VPA RST AMIGA_ADDR_ENABLE
|
||||
AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN AHIGH_30_
|
||||
AHIGH_29_ AHIGH_28_ SIZE_1_ IPL_030_2_ RW_000 BG_000 BGACK_030 A_0_ IPL_030_1_
|
||||
IPL_030_0_ VMA RW SIZE_0_
|
||||
#$ PINS 59 AHIGH_30_ AHIGH_31_ AHIGH_29_ AHIGH_28_ A_DECODE_23_ AHIGH_27_
|
||||
AHIGH_26_ AHIGH_25_ AHIGH_24_ A_DECODE_22_ A_DECODE_21_ IPL_2_ A_DECODE_20_
|
||||
A_DECODE_19_ FC_1_ A_DECODE_18_ AS_030 A_DECODE_17_ AS_000 A_DECODE_16_ DS_030
|
||||
UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BGACK_000 CLK_000 CLK_OSZI CLK_DIV_OUT
|
||||
CLK_EXP FPU_CS FPU_SENSE DSACK1 IPL_1_ DTACK IPL_0_ AVEC FC_0_ E A_1_ VPA RST
|
||||
AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH
|
||||
CIIN SIZE_1_ SIZE_0_ IPL_030_2_ RW_000 BG_000 BGACK_030 A_0_ IPL_030_1_
|
||||
IPL_030_0_ VMA RW
|
||||
#$ NODES 42 cpu_est_0_ cpu_est_1_ cpu_est_2_ cpu_est_3_
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0
|
||||
inst_AS_030_D1 inst_AS_030_000_SYNC inst_AS_000_DMA inst_DS_000_DMA inst_VPA_D
|
||||
|
|
@ -17,7 +17,7 @@
|
|||
CLK_000_D_2_ CLK_000_D_4_ inst_UDS_000_INT inst_DS_000_ENABLE inst_LDS_000_INT
|
||||
inst_BGACK_030_INT_D SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_
|
||||
CYCLE_DMA_0_ CYCLE_DMA_1_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_
|
||||
SM_AMIGA_3_ SM_AMIGA_2_ CLK_OUT_INTreg SM_AMIGA_i_7_ N_60
|
||||
SM_AMIGA_3_ SM_AMIGA_2_ CLK_OUT_INTreg SM_AMIGA_i_7_ N_205
|
||||
.type f
|
||||
.i 90
|
||||
.o 154
|
||||
|
|
@ -34,107 +34,106 @@
|
|||
inst_BGACK_030_INT_D.Q SM_AMIGA_6_.Q RW_000.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q
|
||||
SM_AMIGA_0_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q
|
||||
SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q
|
||||
IPL_030_1_.Q SM_AMIGA_i_7_.Q IPL_030_2_.Q N_60 AS_030.PIN AS_000.PIN RW_000.PIN
|
||||
IPL_030_1_.Q SM_AMIGA_i_7_.Q IPL_030_2_.Q N_205 AS_030.PIN AS_000.PIN RW_000.PIN
|
||||
UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN
|
||||
AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN
|
||||
AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN
|
||||
.ob AHIGH_27_ AHIGH_27_.OE AHIGH_26_ AHIGH_26_.OE AHIGH_25_ AHIGH_25_.OE
|
||||
AHIGH_24_ AHIGH_24_.OE AHIGH_31_ AHIGH_31_.OE AS_030% AS_030.OE AS_000%
|
||||
AS_000.OE DS_030% DS_030.OE UDS_000% UDS_000.OE LDS_000% LDS_000.OE BERR BERR.OE
|
||||
CLK_DIV_OUT CLK_EXP FPU_CS% DSACK1% DSACK1.OE AVEC E AMIGA_ADDR_ENABLE
|
||||
AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW% AMIGA_BUS_ENABLE_HIGH% CIIN CIIN.OE
|
||||
AHIGH_30_ AHIGH_30_.OE AHIGH_29_ AHIGH_29_.OE AHIGH_28_ AHIGH_28_.OE SIZE_1_.D
|
||||
SIZE_1_.C SIZE_1_.OE IPL_030_2_.D% IPL_030_2_.C RW_000.D% RW_000.C RW_000.OE
|
||||
BG_000.D% BG_000.C BGACK_030.D BGACK_030.C A_0_.D A_0_.C A_0_.OE IPL_030_1_.D%
|
||||
IPL_030_1_.C IPL_030_0_.D% IPL_030_0_.C VMA.T VMA.C VMA.OE RW.D% RW.C RW.OE
|
||||
SIZE_0_.D% SIZE_0_.C SIZE_0_.OE cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D
|
||||
cpu_est_1_.C cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C cpu_est_3_.D
|
||||
cpu_est_3_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D% inst_AMIGA_BUS_ENABLE_DMA_HIGH.C
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW.D% inst_AMIGA_BUS_ENABLE_DMA_LOW.C
|
||||
inst_AS_030_D0.D% inst_AS_030_D0.C inst_AS_030_D1.D inst_AS_030_D1.C
|
||||
inst_AS_030_000_SYNC.D% inst_AS_030_000_SYNC.C inst_AS_000_DMA.D
|
||||
inst_AS_000_DMA.C inst_DS_000_DMA.D inst_DS_000_DMA.C inst_VPA_D.D% inst_VPA_D.C
|
||||
CLK_000_D_3_.D CLK_000_D_3_.C inst_DTACK_D0.D% inst_DTACK_D0.C inst_AMIGA_DS.D
|
||||
inst_AMIGA_DS.C CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_0_.D CLK_000_D_0_.C
|
||||
inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D
|
||||
inst_CLK_OUT_PRE_D.C IPL_D0_0_.D% IPL_D0_0_.C IPL_D0_1_.D% IPL_D0_1_.C
|
||||
IPL_D0_2_.D% IPL_D0_2_.C CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_4_.D
|
||||
CLK_000_D_4_.C inst_UDS_000_INT.D% inst_UDS_000_INT.C inst_DS_000_ENABLE.D
|
||||
inst_DS_000_ENABLE.C inst_LDS_000_INT.D inst_LDS_000_INT.C
|
||||
inst_BGACK_030_INT_D.D% inst_BGACK_030_INT_D.C SM_AMIGA_6_.D SM_AMIGA_6_.C
|
||||
SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D
|
||||
SM_AMIGA_0_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C
|
||||
inst_DSACK1_INT.D% inst_DSACK1_INT.C inst_AS_000_INT.D% inst_AS_000_INT.C
|
||||
SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_3_.T SM_AMIGA_3_.C SM_AMIGA_2_.D
|
||||
SM_AMIGA_2_.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C SM_AMIGA_i_7_.T.X1
|
||||
SM_AMIGA_i_7_.T.X2 SM_AMIGA_i_7_.C N_60
|
||||
.ob AHIGH_30_ AHIGH_30_.OE AHIGH_31_ AHIGH_31_.OE AHIGH_29_ AHIGH_29_.OE
|
||||
AHIGH_28_ AHIGH_28_.OE AHIGH_27_ AHIGH_27_.OE AHIGH_26_ AHIGH_26_.OE AHIGH_25_
|
||||
AHIGH_25_.OE AHIGH_24_ AHIGH_24_.OE AS_030% AS_030.OE AS_000% AS_000.OE DS_030%
|
||||
DS_030.OE UDS_000% UDS_000.OE LDS_000% LDS_000.OE BERR BERR.OE CLK_DIV_OUT
|
||||
CLK_EXP FPU_CS% DSACK1% DSACK1.OE AVEC E AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR
|
||||
AMIGA_BUS_ENABLE_LOW% AMIGA_BUS_ENABLE_HIGH% CIIN CIIN.OE SIZE_1_.D SIZE_1_.C
|
||||
SIZE_1_.OE SIZE_0_.D% SIZE_0_.C SIZE_0_.OE IPL_030_2_.D% IPL_030_2_.C RW_000.D%
|
||||
RW_000.C RW_000.OE BG_000.D% BG_000.C BGACK_030.D BGACK_030.C A_0_.D A_0_.C
|
||||
A_0_.OE IPL_030_1_.D% IPL_030_1_.C IPL_030_0_.D% IPL_030_0_.C VMA.T VMA.C VMA.OE
|
||||
RW.D% RW.C RW.OE cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C
|
||||
cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH.D% inst_AMIGA_BUS_ENABLE_DMA_HIGH.C
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_AS_030_D0.D%
|
||||
inst_AS_030_D0.C inst_AS_030_D1.D inst_AS_030_D1.C inst_AS_030_000_SYNC.D%
|
||||
inst_AS_030_000_SYNC.C inst_AS_000_DMA.D inst_AS_000_DMA.C inst_DS_000_DMA.D
|
||||
inst_DS_000_DMA.C inst_VPA_D.D% inst_VPA_D.C CLK_000_D_3_.D CLK_000_D_3_.C
|
||||
inst_DTACK_D0.D% inst_DTACK_D0.C inst_AMIGA_DS.D inst_AMIGA_DS.C CLK_000_D_1_.D
|
||||
CLK_000_D_1_.C CLK_000_D_0_.D CLK_000_D_0_.C inst_CLK_OUT_PRE_50.D
|
||||
inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C IPL_D0_0_.D%
|
||||
IPL_D0_0_.C IPL_D0_1_.D% IPL_D0_1_.C IPL_D0_2_.D% IPL_D0_2_.C CLK_000_D_2_.D
|
||||
CLK_000_D_2_.C CLK_000_D_4_.D CLK_000_D_4_.C inst_UDS_000_INT.D%
|
||||
inst_UDS_000_INT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C inst_LDS_000_INT.D
|
||||
inst_LDS_000_INT.C inst_BGACK_030_INT_D.D% inst_BGACK_030_INT_D.C SM_AMIGA_6_.D
|
||||
SM_AMIGA_6_.C SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_1_.D SM_AMIGA_1_.C
|
||||
SM_AMIGA_0_.D SM_AMIGA_0_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D
|
||||
CYCLE_DMA_1_.C inst_DSACK1_INT.D% inst_DSACK1_INT.C inst_AS_000_INT.D%
|
||||
inst_AS_000_INT.C SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_3_.T SM_AMIGA_3_.C
|
||||
SM_AMIGA_2_.D SM_AMIGA_2_.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C SM_AMIGA_i_7_.T.X1
|
||||
SM_AMIGA_i_7_.T.X2 SM_AMIGA_i_7_.C N_205
|
||||
.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111
|
||||
.p 156
|
||||
------------------------------------------------------------------------------------------ 0000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------0------------------------------------------------------------------ 0101010101010001000000000000000000001010100100000000000100000000010010000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
---------------------------------0---------------------------------------0---------------- 0000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------------------------------------------------------------0----------0----------------- 0000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-----------1------------------------------------------------------------------ 0000000000000100010100000000000000000000000000001000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
----------------------------------0--------------------------------------0---------------- 0000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------------------------------------------------01--------------------------------------- 0000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
--------------------------------------------------10-------------------------------------- 0000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
--1--1--1------0010--1--------------------------------------------------0----------------- 0000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------------------------------------------------1----------------------- 0000000000000000000000110000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
--1--1--0------0010--1--------------------------------------------------0----------------- 0000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------------------------------------------0-----------0----------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
---1-------------------1------------------------------------------------------------------ 0000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------------------------001-------------------------------------------------------------- 0000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------------------------110-------------------------------------------------------------- 0000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
---0-------------------0-------------------------------------------------01--------------- 0000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------1--------------------------------------------------0--------------- 0000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------0-----0------------------------------------------------------------ 0000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------0----0------------------------------------------------------------- 0000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------1--------0---------------------------------------0----------------- 0000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
1-----------111---------------0------------------------------------------------00000000--- 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001
|
||||
-----------------------------------------------------------------------1------------------ 0000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------0------------------------------------------------------------------------------ 0000000000000000000000000000000000000000010000000001010000000000000000000000000000000000101000000010000000000000000000000010000000000000000000000000000000
|
||||
.p 158
|
||||
------------------------------------------------------------------------------------------ 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------0------------------------------------------------------------------ 0101010101010101010001000000000000000000000100100000000000100000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
---------------------------------0---------------------------------------0---------------- 0000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------------------------------------------------------------0----------0----------------- 0000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-----------1------------------------------------------------------------------ 0000000000000000000100010100000000000000000010000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
----------------------------------0--------------------------------------0---------------- 0000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------------------------------------------------01--------------------------------------- 0000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
--------------------------------------------------10-------------------------------------- 0000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
--1--1--1------0010--1--------------------------------------------------0----------------- 0000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------------------------------------------------1----------------------- 0000000000000000000000000000110000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
--1--1--0------0010--1--------------------------------------------------0----------------- 0000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------------------------------------------0-----------0----------------- 0000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
---1-------------------1------------------------------------------------------------------ 0000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------------------------001-------------------------------------------------------------- 0000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------------------------110-------------------------------------------------------------- 0000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
---0-------------------0-------------------------------------------------01--------------- 0000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------1--------------------------------------------------0--------------- 0000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------0-----0------------------------------------------------------------ 0000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------0----0------------------------------------------------------------- 0000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------1--------0---------------------------------------0----------------- 0000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
1-----------111---------------0------------------------------------------------00000000--- 0000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001
|
||||
-----------------------------------------------------------------------1------------------ 0000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------0------------------------------------------------------------------------------ 0000000000000000000000000000000000000000010000000000001010000000000000000000000010000000101000000010000000000000000000000010000000000000000000000000000000
|
||||
-----------------------0---------------------------------------------------00------------- 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------1---------------------------------------------------------------------------------- 0000000000000000000000000000000000000000001001010010101001010100100100101001010101010101010101010101010101010101010101010101010101010101010101010101010010
|
||||
-0---------1-------11-----------------------110------------------------------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1-------10-----------------------010------------------------------------------- 0000000000000000000000000000000000000000000010000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1-------01-----------------------100------------------------------------------- 0000000000000000000000000000000000000000000010000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1-------00-----------------------000------------------------------------------- 0000000000000000000000000000000000000000000010000000000010100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1----------------------------------------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------0-----------------------1-------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------1-----------------------0-------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------0-------------------------1------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------1-------------------------0------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1----------------------------------0-----------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1----------------------------1-------------0--------------1-------------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-----------------------------0------------0--------------1-------------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-----------------------------------------00--0-----------1-------------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1----------------------------01-----------1---0-----------1-------------------0 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
---10------1------------------1----------1------------------------------------------------ 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
----0------1-----------------------------------------------------0------------------------ 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----1-----------------1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----1----------------------------------10-------------------------------1---------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------0---------------------------------------------------1-------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1-------01-----------------------101------------------------------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1-------00-----------------------001------------------------------------------- 0000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------0------------------------------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------0-----------------------1-----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------1-----------------------0-----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1---------------------------------0----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1----------------------------------1---------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1----------------------------------0---------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1-------10-----------------------011------------------------------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------0----------------------------------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------------------------------0----------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------0-------------------------1---------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------1-------------------------0---------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1----------------------------------1--------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1----------------------------------0--------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------0-----------------------0------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------0000-------0----01------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1------------1100-------10---10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-----------0--------------------------------------------------0--------------- 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1---------------------------------------------------------------00------------- 0000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------1---------------------------------------------------------------------------------- 0000000000000000000000000000000000000000001001001010010101001010100100101001010101010101010101010101010101010101010101010101010101010101010101010101010010
|
||||
-----------1---------------------------------------------------------------00------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1-------11-----------------------110------------------------------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1-------10-----------------------010------------------------------------------- 0000000000000000000000000000000000000000000000010000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1-------01-----------------------100------------------------------------------- 0000000000000000000000000000000000000000000000010000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1-------00-----------------------000------------------------------------------- 0000000000000000000000000000000000000000000000010000000000010100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1----------------------------------------------------------0------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------0-----------------------1-------------------------0------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------1-----------------------0-------------------------0------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------0-------------------------1------------------------0------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------1-------------------------0------------------------0------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1----------------------------------0-----------------------0------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1----------------------------1-------------0--------------1-------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-----------------------------0------------0--------------1-------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-----------------------------------------00--0-----------1-------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1----------------------------01-----------1---0-----------1-------------------0 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
---10------1------------------1----------1------------------------------------------------ 0000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
----0------1-----------------------------------------------------0------------------------ 0000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----1-----------------1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----1----------------------------------10-------------------------------1---------------- 0000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------0---------------------------------------------------1-------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1-------01-----------------------101------------------------------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1-------00-----------------------001------------------------------------------- 0000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------0------------------------------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------0-----------------------1-----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------1-----------------------0-----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1---------------------------------0----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1----------------------------------1---------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1----------------------------------0---------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1-------10-----------------------011------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------0----------------------------------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------------------------------0----------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------0-------------------------1---------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------1-------------------------0---------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1----------------------------------1--------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1----------------------------------0--------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------0-----------------------0------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------0000-------0----01------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1------------1100-------10---10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000010000000000000010000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-----------0--------------------------------------------------0--------------- 0000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------1---------------0------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------1----------------1------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------0---------------10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
|
|
@ -149,7 +148,9 @@
|
|||
---------------------------1-------------1------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------111-------------10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1----------00------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1----------10------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
1----------11101-------0-------------------------------------------------------00000000--- 0000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
----------------------0------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
1-----------1101---------------------------------------------------------------00000000--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1------------------------------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1------------------1----------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------0-------------------1---------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000
|
||||
|
|
|
|||
|
|
@ -1,14 +1,14 @@
|
|||
#$ TOOL ispLEVER Classic 2.0.00.17.20.15
|
||||
#$ DATE Sat Dec 30 00:43:37 2017
|
||||
#$ DATE Thu Jan 11 20:16:29 2018
|
||||
#$ MODULE BUS68030
|
||||
#$ PINS 59 AHIGH_27_ AHIGH_26_ AHIGH_25_ AHIGH_24_ AHIGH_31_ A_DECODE_22_
|
||||
A_DECODE_21_ A_DECODE_23_ A_DECODE_20_ A_DECODE_19_ A_DECODE_18_ A_DECODE_17_
|
||||
A_DECODE_16_ IPL_2_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 nEXP_SPACE BERR
|
||||
BG_030 BGACK_000 CLK_000 IPL_1_ CLK_OSZI IPL_0_ CLK_DIV_OUT FC_0_ CLK_EXP A_1_
|
||||
FPU_CS FPU_SENSE DSACK1 DTACK AVEC E VPA RST AMIGA_ADDR_ENABLE
|
||||
AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH CIIN AHIGH_30_
|
||||
AHIGH_29_ AHIGH_28_ SIZE_1_ IPL_030_2_ RW_000 BG_000 BGACK_030 A_0_ IPL_030_1_
|
||||
IPL_030_0_ VMA RW SIZE_0_
|
||||
#$ PINS 59 AHIGH_30_ AHIGH_31_ AHIGH_29_ AHIGH_28_ A_DECODE_23_ AHIGH_27_
|
||||
AHIGH_26_ AHIGH_25_ AHIGH_24_ A_DECODE_22_ A_DECODE_21_ IPL_2_ A_DECODE_20_
|
||||
A_DECODE_19_ FC_1_ A_DECODE_18_ AS_030 A_DECODE_17_ AS_000 A_DECODE_16_ DS_030
|
||||
UDS_000 LDS_000 nEXP_SPACE BERR BG_030 BGACK_000 CLK_000 CLK_OSZI CLK_DIV_OUT
|
||||
CLK_EXP FPU_CS FPU_SENSE DSACK1 IPL_1_ DTACK IPL_0_ AVEC FC_0_ E A_1_ VPA RST
|
||||
AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW AMIGA_BUS_ENABLE_HIGH
|
||||
CIIN SIZE_1_ SIZE_0_ IPL_030_2_ RW_000 BG_000 BGACK_030 A_0_ IPL_030_1_
|
||||
IPL_030_0_ VMA RW
|
||||
#$ NODES 42 cpu_est_0_ cpu_est_1_ cpu_est_2_ cpu_est_3_
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH inst_AMIGA_BUS_ENABLE_DMA_LOW inst_AS_030_D0
|
||||
inst_AS_030_D1 inst_AS_030_000_SYNC inst_AS_000_DMA inst_DS_000_DMA inst_VPA_D
|
||||
|
|
@ -17,7 +17,7 @@
|
|||
CLK_000_D_2_ CLK_000_D_4_ inst_UDS_000_INT inst_DS_000_ENABLE inst_LDS_000_INT
|
||||
inst_BGACK_030_INT_D SM_AMIGA_6_ SM_AMIGA_4_ SM_AMIGA_1_ SM_AMIGA_0_
|
||||
CYCLE_DMA_0_ CYCLE_DMA_1_ inst_DSACK1_INT inst_AS_000_INT SM_AMIGA_5_
|
||||
SM_AMIGA_3_ SM_AMIGA_2_ CLK_OUT_INTreg SM_AMIGA_i_7_ N_60
|
||||
SM_AMIGA_3_ SM_AMIGA_2_ CLK_OUT_INTreg SM_AMIGA_i_7_ N_205
|
||||
.type f
|
||||
.i 90
|
||||
.o 154
|
||||
|
|
@ -34,107 +34,106 @@
|
|||
inst_BGACK_030_INT_D.Q SM_AMIGA_6_.Q RW_000.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q
|
||||
SM_AMIGA_0_.Q CYCLE_DMA_0_.Q CYCLE_DMA_1_.Q inst_DSACK1_INT.Q inst_AS_000_INT.Q
|
||||
SM_AMIGA_5_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q BG_000.Q CLK_OUT_INTreg.Q IPL_030_0_.Q
|
||||
IPL_030_1_.Q SM_AMIGA_i_7_.Q IPL_030_2_.Q N_60 AS_030.PIN AS_000.PIN RW_000.PIN
|
||||
IPL_030_1_.Q SM_AMIGA_i_7_.Q IPL_030_2_.Q N_205 AS_030.PIN AS_000.PIN RW_000.PIN
|
||||
UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN AHIGH_24_.PIN AHIGH_25_.PIN
|
||||
AHIGH_26_.PIN AHIGH_27_.PIN AHIGH_28_.PIN AHIGH_29_.PIN AHIGH_30_.PIN
|
||||
AHIGH_31_.PIN A_0_.PIN BERR.PIN RW.PIN
|
||||
.ob AHIGH_27_ AHIGH_27_.OE AHIGH_26_ AHIGH_26_.OE AHIGH_25_ AHIGH_25_.OE
|
||||
AHIGH_24_ AHIGH_24_.OE AHIGH_31_ AHIGH_31_.OE AS_030- AS_030.OE AS_000-
|
||||
AS_000.OE DS_030- DS_030.OE UDS_000- UDS_000.OE LDS_000- LDS_000.OE BERR BERR.OE
|
||||
CLK_DIV_OUT CLK_EXP FPU_CS- DSACK1- DSACK1.OE AVEC E AMIGA_ADDR_ENABLE
|
||||
AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW- AMIGA_BUS_ENABLE_HIGH- CIIN CIIN.OE
|
||||
AHIGH_30_ AHIGH_30_.OE AHIGH_29_ AHIGH_29_.OE AHIGH_28_ AHIGH_28_.OE SIZE_1_.D
|
||||
SIZE_1_.C SIZE_1_.OE IPL_030_2_.D- IPL_030_2_.C RW_000.D- RW_000.C RW_000.OE
|
||||
BG_000.D- BG_000.C BGACK_030.D BGACK_030.C A_0_.D A_0_.C A_0_.OE IPL_030_1_.D-
|
||||
IPL_030_1_.C IPL_030_0_.D- IPL_030_0_.C VMA.T VMA.C VMA.OE RW.D- RW.C RW.OE
|
||||
SIZE_0_.D- SIZE_0_.C SIZE_0_.OE cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D
|
||||
cpu_est_1_.C cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C cpu_est_3_.D
|
||||
cpu_est_3_.C inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- inst_AMIGA_BUS_ENABLE_DMA_HIGH.C
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW.D- inst_AMIGA_BUS_ENABLE_DMA_LOW.C
|
||||
inst_AS_030_D0.D- inst_AS_030_D0.C inst_AS_030_D1.D inst_AS_030_D1.C
|
||||
inst_AS_030_000_SYNC.D- inst_AS_030_000_SYNC.C inst_AS_000_DMA.D
|
||||
inst_AS_000_DMA.C inst_DS_000_DMA.D inst_DS_000_DMA.C inst_VPA_D.D- inst_VPA_D.C
|
||||
CLK_000_D_3_.D CLK_000_D_3_.C inst_DTACK_D0.D- inst_DTACK_D0.C inst_AMIGA_DS.D
|
||||
inst_AMIGA_DS.C CLK_000_D_1_.D CLK_000_D_1_.C CLK_000_D_0_.D CLK_000_D_0_.C
|
||||
inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D
|
||||
inst_CLK_OUT_PRE_D.C IPL_D0_0_.D- IPL_D0_0_.C IPL_D0_1_.D- IPL_D0_1_.C
|
||||
IPL_D0_2_.D- IPL_D0_2_.C CLK_000_D_2_.D CLK_000_D_2_.C CLK_000_D_4_.D
|
||||
CLK_000_D_4_.C inst_UDS_000_INT.D- inst_UDS_000_INT.C inst_DS_000_ENABLE.D
|
||||
inst_DS_000_ENABLE.C inst_LDS_000_INT.D inst_LDS_000_INT.C
|
||||
inst_BGACK_030_INT_D.D- inst_BGACK_030_INT_D.C SM_AMIGA_6_.D SM_AMIGA_6_.C
|
||||
SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_0_.D
|
||||
SM_AMIGA_0_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D CYCLE_DMA_1_.C
|
||||
inst_DSACK1_INT.D- inst_DSACK1_INT.C inst_AS_000_INT.D- inst_AS_000_INT.C
|
||||
SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_3_.T SM_AMIGA_3_.C SM_AMIGA_2_.D
|
||||
SM_AMIGA_2_.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C SM_AMIGA_i_7_.T.X1
|
||||
SM_AMIGA_i_7_.T.X2 SM_AMIGA_i_7_.C N_60
|
||||
.ob AHIGH_30_ AHIGH_30_.OE AHIGH_31_ AHIGH_31_.OE AHIGH_29_ AHIGH_29_.OE
|
||||
AHIGH_28_ AHIGH_28_.OE AHIGH_27_ AHIGH_27_.OE AHIGH_26_ AHIGH_26_.OE AHIGH_25_
|
||||
AHIGH_25_.OE AHIGH_24_ AHIGH_24_.OE AS_030- AS_030.OE AS_000- AS_000.OE DS_030-
|
||||
DS_030.OE UDS_000- UDS_000.OE LDS_000- LDS_000.OE BERR BERR.OE CLK_DIV_OUT
|
||||
CLK_EXP FPU_CS- DSACK1- DSACK1.OE AVEC E AMIGA_ADDR_ENABLE AMIGA_BUS_DATA_DIR
|
||||
AMIGA_BUS_ENABLE_LOW- AMIGA_BUS_ENABLE_HIGH- CIIN CIIN.OE SIZE_1_.D SIZE_1_.C
|
||||
SIZE_1_.OE SIZE_0_.D- SIZE_0_.C SIZE_0_.OE IPL_030_2_.D- IPL_030_2_.C RW_000.D-
|
||||
RW_000.C RW_000.OE BG_000.D- BG_000.C BGACK_030.D BGACK_030.C A_0_.D A_0_.C
|
||||
A_0_.OE IPL_030_1_.D- IPL_030_1_.C IPL_030_0_.D- IPL_030_0_.C VMA.T VMA.C VMA.OE
|
||||
RW.D- RW.C RW.OE cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C
|
||||
cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C cpu_est_3_.D cpu_est_3_.C
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH.D- inst_AMIGA_BUS_ENABLE_DMA_HIGH.C
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW.D inst_AMIGA_BUS_ENABLE_DMA_LOW.C inst_AS_030_D0.D-
|
||||
inst_AS_030_D0.C inst_AS_030_D1.D inst_AS_030_D1.C inst_AS_030_000_SYNC.D-
|
||||
inst_AS_030_000_SYNC.C inst_AS_000_DMA.D inst_AS_000_DMA.C inst_DS_000_DMA.D
|
||||
inst_DS_000_DMA.C inst_VPA_D.D- inst_VPA_D.C CLK_000_D_3_.D CLK_000_D_3_.C
|
||||
inst_DTACK_D0.D- inst_DTACK_D0.C inst_AMIGA_DS.D inst_AMIGA_DS.C CLK_000_D_1_.D
|
||||
CLK_000_D_1_.C CLK_000_D_0_.D CLK_000_D_0_.C inst_CLK_OUT_PRE_50.D
|
||||
inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_D.D inst_CLK_OUT_PRE_D.C IPL_D0_0_.D-
|
||||
IPL_D0_0_.C IPL_D0_1_.D- IPL_D0_1_.C IPL_D0_2_.D- IPL_D0_2_.C CLK_000_D_2_.D
|
||||
CLK_000_D_2_.C CLK_000_D_4_.D CLK_000_D_4_.C inst_UDS_000_INT.D-
|
||||
inst_UDS_000_INT.C inst_DS_000_ENABLE.D inst_DS_000_ENABLE.C inst_LDS_000_INT.D
|
||||
inst_LDS_000_INT.C inst_BGACK_030_INT_D.D- inst_BGACK_030_INT_D.C SM_AMIGA_6_.D
|
||||
SM_AMIGA_6_.C SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_1_.D SM_AMIGA_1_.C
|
||||
SM_AMIGA_0_.D SM_AMIGA_0_.C CYCLE_DMA_0_.D CYCLE_DMA_0_.C CYCLE_DMA_1_.D
|
||||
CYCLE_DMA_1_.C inst_DSACK1_INT.D- inst_DSACK1_INT.C inst_AS_000_INT.D-
|
||||
inst_AS_000_INT.C SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_3_.T SM_AMIGA_3_.C
|
||||
SM_AMIGA_2_.D SM_AMIGA_2_.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C SM_AMIGA_i_7_.T.X1
|
||||
SM_AMIGA_i_7_.T.X2 SM_AMIGA_i_7_.C N_205
|
||||
.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111
|
||||
.p 156
|
||||
------------------------------------------------------------------------------------------ 0000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------0------------------------------------------------------------------ 0101010101010001000000000000000000001010100100000000000100000000010010000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
---------------------------------0---------------------------------------0---------------- 0000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------------------------------------------------------------0----------0----------------- 0000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-----------1------------------------------------------------------------------ 0000000000000100010100000000000000000000000000001000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
----------------------------------0--------------------------------------0---------------- 0000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------------------------------------------------01--------------------------------------- 0000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
--------------------------------------------------10-------------------------------------- 0000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
--1--1--1------0010--1--------------------------------------------------0----------------- 0000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------------------------------------------------1----------------------- 0000000000000000000000110000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
--1--1--0------0010--1--------------------------------------------------0----------------- 0000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------------------------------------------0-----------0----------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
---1-------------------1------------------------------------------------------------------ 0000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------------------------001-------------------------------------------------------------- 0000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------------------------110-------------------------------------------------------------- 0000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
---0-------------------0-------------------------------------------------01--------------- 0000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------1--------------------------------------------------0--------------- 0000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------0-----0------------------------------------------------------------ 0000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------0----0------------------------------------------------------------- 0000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------1--------0---------------------------------------0----------------- 0000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
1-----------111---------------0------------------------------------------------00000000--- 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001
|
||||
-----------------------------------------------------------------------1------------------ 0000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------0------------------------------------------------------------------------------ 0000000000000000000000000000000000000000010000000001010000000000000000000000000000000000101000000010000000000000000000000010000000000000000000000000000000
|
||||
.p 158
|
||||
------------------------------------------------------------------------------------------ 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------0------------------------------------------------------------------ 0101010101010101010001000000000000000000000100100000000000100000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
---------------------------------0---------------------------------------0---------------- 0000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------------------------------------------------------------0----------0----------------- 0000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-----------1------------------------------------------------------------------ 0000000000000000000100010100000000000000000010000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
----------------------------------0--------------------------------------0---------------- 0000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------------------------------------------------01--------------------------------------- 0000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
--------------------------------------------------10-------------------------------------- 0000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
--1--1--1------0010--1--------------------------------------------------0----------------- 0000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------------------------------------------------1----------------------- 0000000000000000000000000000110000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
--1--1--0------0010--1--------------------------------------------------0----------------- 0000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------------------------------------------0-----------0----------------- 0000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
---1-------------------1------------------------------------------------------------------ 0000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------------------------001-------------------------------------------------------------- 0000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------------------------110-------------------------------------------------------------- 0000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
---0-------------------0-------------------------------------------------01--------------- 0000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------1--------------------------------------------------0--------------- 0000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------0-----0------------------------------------------------------------ 0000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------0----0------------------------------------------------------------- 0000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------1--------0---------------------------------------0----------------- 0000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
1-----------111---------------0------------------------------------------------00000000--- 0000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001
|
||||
-----------------------------------------------------------------------1------------------ 0000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------0------------------------------------------------------------------------------ 0000000000000000000000000000000000000000010000000000001010000000000000000000000010000000101000000010000000000000000000000010000000000000000000000000000000
|
||||
-----------------------0---------------------------------------------------00------------- 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------1---------------------------------------------------------------------------------- 0000000000000000000000000000000000000000001001010010101001010100100100101001010101010101010101010101010101010101010101010101010101010101010101010101010010
|
||||
-0---------1-------11-----------------------110------------------------------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1-------10-----------------------010------------------------------------------- 0000000000000000000000000000000000000000000010000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1-------01-----------------------100------------------------------------------- 0000000000000000000000000000000000000000000010000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1-------00-----------------------000------------------------------------------- 0000000000000000000000000000000000000000000010000000000010100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1----------------------------------------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------0-----------------------1-------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------1-----------------------0-------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------0-------------------------1------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------1-------------------------0------------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1----------------------------------0-----------------------0------------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1----------------------------1-------------0--------------1-------------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-----------------------------0------------0--------------1-------------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-----------------------------------------00--0-----------1-------------------- 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1----------------------------01-----------1---0-----------1-------------------0 0000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
---10------1------------------1----------1------------------------------------------------ 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
----0------1-----------------------------------------------------0------------------------ 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----1-----------------1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----1----------------------------------10-------------------------------1---------------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------0---------------------------------------------------1-------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1-------01-----------------------101------------------------------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1-------00-----------------------001------------------------------------------- 0000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------0------------------------------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------0-----------------------1-----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------1-----------------------0-----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1---------------------------------0----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1----------------------------------1---------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1----------------------------------0---------------------0--------------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1-------10-----------------------011------------------------------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------0----------------------------------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------------------------------0----------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------0-------------------------1---------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------1-------------------------0---------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1----------------------------------1--------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1----------------------------------0--------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------0-----------------------0------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------0000-------0----01------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1------------1100-------10---10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-----------0--------------------------------------------------0--------------- 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1---------------------------------------------------------------00------------- 0000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-------1---------------------------------------------------------------------------------- 0000000000000000000000000000000000000000001001001010010101001010100100101001010101010101010101010101010101010101010101010101010101010101010101010101010010
|
||||
-----------1---------------------------------------------------------------00------------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1-------11-----------------------110------------------------------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1-------10-----------------------010------------------------------------------- 0000000000000000000000000000000000000000000000010000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1-------01-----------------------100------------------------------------------- 0000000000000000000000000000000000000000000000010000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1-------00-----------------------000------------------------------------------- 0000000000000000000000000000000000000000000000010000000000010100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1----------------------------------------------------------0------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------0-----------------------1-------------------------0------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------1-----------------------0-------------------------0------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------0-------------------------1------------------------0------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------1-------------------------0------------------------0------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1----------------------------------0-----------------------0------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1----------------------------1-------------0--------------1-------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-----------------------------0------------0--------------1-------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-----------------------------------------00--0-----------1-------------------- 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1----------------------------01-----------1---0-----------1-------------------0 0000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
---10------1------------------1----------1------------------------------------------------ 0000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
----0------1-----------------------------------------------------0------------------------ 0000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----1-----------------1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----1----------------------------------10-------------------------------1---------------- 0000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------0---------------------------------------------------1-------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1-------01-----------------------101------------------------------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1-------00-----------------------001------------------------------------------- 0000000000000000000000000000000000000000000000000000000000010100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------0------------------------------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------0-----------------------1-----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------1-----------------------0-----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1---------------------------------0----------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1----------------------------------1---------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1----------------------------------0---------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1-------10-----------------------011------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------0----------------------------------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1--------------------------------0----------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------0-------------------------1---------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-------1-------------------------0---------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-0---------1----------------------------------1--------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-1---------1----------------------------------0--------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------0-----------------------0------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------0000-------0----01------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1------------1100-------10---10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------------------1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000010000000000000010000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1-----------0--------------------------------------------------0--------------- 0000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------1---------------0------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------1----------------1------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------0---------------10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
|
|
@ -149,7 +148,9 @@
|
|||
---------------------------1-------------1------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
------------------------111-------------10------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1----------00------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1----------10------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
1----------11101-------0-------------------------------------------------------00000000--- 0000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
----------------------0------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
1-----------1101---------------------------------------------------------------00000000--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1------------------------------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------1------------------1----------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000
|
||||
-----------0-------------------1---------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000
|
||||
|
|
|
|||
|
|
@ -17,8 +17,8 @@ Parent = m4a5.lci;
|
|||
SDS_file = m4a5.sds;
|
||||
Design = 68030_tk.tt4;
|
||||
Rev = 0.01;
|
||||
DATE = 12/30/17;
|
||||
TIME = 00:43:46;
|
||||
DATE = 1/11/18;
|
||||
TIME = 20:16:38;
|
||||
Type = TT2;
|
||||
Pre_Fit_Time = 1;
|
||||
Source_Format = Pure_VHDL;
|
||||
|
|
@ -179,52 +179,52 @@ AMIGA_ADDR_ENABLE = OUTPUT,33,3,-;
|
|||
AMIGA_BUS_ENABLE_LOW = OUTPUT,20,2,-;
|
||||
CLK_EXP = OUTPUT,10,1,-;
|
||||
RN_BGACK_030 = NODE,-1,7,-;
|
||||
CLK_000_D_0_ = NODE,*,3,-;
|
||||
CLK_000_D_1_ = NODE,*,7,-;
|
||||
SM_AMIGA_6_ = NODE,*,5,-;
|
||||
cpu_est_3_ = NODE,*,0,-;
|
||||
cpu_est_1_ = NODE,*,3,-;
|
||||
SM_AMIGA_0_ = NODE,*,0,-;
|
||||
SM_AMIGA_4_ = NODE,*,6,-;
|
||||
cpu_est_0_ = NODE,*,6,-;
|
||||
CLK_OUT_INTreg = NODE,*,0,-;
|
||||
inst_AS_030_D0 = NODE,*,4,-;
|
||||
cpu_est_2_ = NODE,*,3,-;
|
||||
CLK_000_D_0_ = NODE,*,5,-;
|
||||
CLK_000_D_1_ = NODE,*,0,-;
|
||||
SM_AMIGA_6_ = NODE,*,1,-;
|
||||
cpu_est_0_ = NODE,*,5,-;
|
||||
inst_AS_030_000_SYNC = NODE,*,5,-;
|
||||
inst_DS_000_DMA = NODE,*,2,-;
|
||||
inst_AS_000_DMA = NODE,*,2,-;
|
||||
CYCLE_DMA_0_ = NODE,*,1,-;
|
||||
cpu_est_3_ = NODE,*,3,-;
|
||||
cpu_est_1_ = NODE,*,6,-;
|
||||
SM_AMIGA_i_7_ = NODE,*,1,-;
|
||||
SM_AMIGA_0_ = NODE,*,0,-;
|
||||
inst_AS_030_D0 = NODE,*,5,-;
|
||||
cpu_est_2_ = NODE,*,3,-;
|
||||
inst_DS_000_DMA = NODE,*,6,-;
|
||||
inst_AS_000_DMA = NODE,*,6,-;
|
||||
SM_AMIGA_2_ = NODE,*,2,-;
|
||||
RN_VMA = NODE,-1,3,-;
|
||||
SM_AMIGA_i_7_ = NODE,*,5,-;
|
||||
SM_AMIGA_5_ = NODE,*,5,-;
|
||||
SM_AMIGA_1_ = NODE,*,0,-;
|
||||
inst_LDS_000_INT = NODE,*,6,-;
|
||||
inst_DS_000_ENABLE = NODE,*,2,-;
|
||||
SM_AMIGA_4_ = NODE,*,0,-;
|
||||
inst_LDS_000_INT = NODE,*,0,-;
|
||||
inst_DS_000_ENABLE = NODE,*,0,-;
|
||||
inst_AS_000_INT = NODE,*,2,-;
|
||||
inst_DSACK1_INT = NODE,*,6,-;
|
||||
CYCLE_DMA_1_ = NODE,*,1,-;
|
||||
inst_UDS_000_INT = NODE,*,1,-;
|
||||
inst_CLK_OUT_PRE_D = NODE,*,4,-;
|
||||
inst_CLK_OUT_PRE_50 = NODE,*,7,-;
|
||||
inst_VPA_D = NODE,*,6,-;
|
||||
CLK_OUT_INTreg = NODE,*,0,-;
|
||||
inst_CLK_OUT_PRE_D = NODE,*,7,-;
|
||||
CLK_000_D_3_ = NODE,*,3,-;
|
||||
inst_VPA_D = NODE,*,1,-;
|
||||
RN_IPL_030_0_ = NODE,-1,1,-;
|
||||
RN_IPL_030_1_ = NODE,-1,1,-;
|
||||
RN_IPL_030_2_ = NODE,-1,1,-;
|
||||
SM_AMIGA_2_ = NODE,*,0,-;
|
||||
SM_AMIGA_3_ = NODE,*,0,-;
|
||||
SM_AMIGA_3_ = NODE,*,2,-;
|
||||
RN_RW_000 = NODE,-1,7,-;
|
||||
CYCLE_DMA_0_ = NODE,*,6,-;
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,*,4,-;
|
||||
SM_AMIGA_5_ = NODE,*,0,-;
|
||||
RN_BG_000 = NODE,-1,3,-;
|
||||
N_60 = NODE,*,4,-;
|
||||
N_205 = NODE,*,4,-;
|
||||
CYCLE_DMA_1_ = NODE,*,6,-;
|
||||
inst_UDS_000_INT = NODE,*,3,-;
|
||||
inst_AMIGA_DS = NODE,*,7,-;
|
||||
inst_AS_030_D1 = NODE,*,5,-;
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH = NODE,*,4,-;
|
||||
inst_BGACK_030_INT_D = NODE,*,4,-;
|
||||
CLK_000_D_4_ = NODE,*,5,-;
|
||||
CLK_000_D_2_ = NODE,*,7,-;
|
||||
IPL_D0_2_ = NODE,*,0,-;
|
||||
IPL_D0_1_ = NODE,*,3,-;
|
||||
IPL_D0_0_ = NODE,*,0,-;
|
||||
IPL_D0_2_ = NODE,*,2,-;
|
||||
IPL_D0_1_ = NODE,*,0,-;
|
||||
IPL_D0_0_ = NODE,*,5,-;
|
||||
inst_CLK_OUT_PRE_50 = NODE,*,7,-;
|
||||
inst_DTACK_D0 = NODE,*,5,-;
|
||||
CLK_000_D_3_ = NODE,*,5,-;
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,*,2,-;
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH = NODE,*,0,-;
|
||||
CLK_OSZI = INPUT,61,-,-;
|
||||
|
|
|
|||
|
|
@ -17,8 +17,8 @@ Parent = m4a5.lci;
|
|||
SDS_file = m4a5.sds;
|
||||
Design = 68030_tk.tt4;
|
||||
Rev = 0.01;
|
||||
DATE = 12/30/17;
|
||||
TIME = 00:43:46;
|
||||
DATE = 1/11/18;
|
||||
TIME = 20:16:38;
|
||||
Type = TT2;
|
||||
Pre_Fit_Time = 1;
|
||||
Source_Format = Pure_VHDL;
|
||||
|
|
@ -142,23 +142,26 @@ layer = OFF;
|
|||
[LOCATION ASSIGNMENT]
|
||||
|
||||
Layer = OFF;
|
||||
AHIGH_30_ = BIDIR,5, B,-;
|
||||
AHIGH_31_ = BIDIR,4, B,-;
|
||||
AHIGH_29_ = BIDIR,6, B,-;
|
||||
AHIGH_28_ = BIDIR,15, C,-;
|
||||
A_DECODE_23_ = INPUT,85, H,-;
|
||||
AHIGH_27_ = BIDIR,16, C,-;
|
||||
AHIGH_26_ = BIDIR,17, C,-;
|
||||
AHIGH_25_ = BIDIR,18, C,-;
|
||||
AHIGH_24_ = BIDIR,19, C,-;
|
||||
AHIGH_31_ = BIDIR,4, B,-;
|
||||
A_DECODE_22_ = INPUT,84, H,-;
|
||||
A_DECODE_21_ = INPUT,94, A,-;
|
||||
A_DECODE_23_ = INPUT,85, H,-;
|
||||
IPL_2_ = INPUT,68, G,-;
|
||||
A_DECODE_20_ = INPUT,93, A,-;
|
||||
A_DECODE_19_ = INPUT,97, A,-;
|
||||
A_DECODE_18_ = INPUT,95, A,-;
|
||||
A_DECODE_17_ = INPUT,59, F,-;
|
||||
A_DECODE_16_ = INPUT,96, A,-;
|
||||
IPL_2_ = INPUT,68, G,-;
|
||||
FC_1_ = INPUT,58, F,-;
|
||||
A_DECODE_18_ = INPUT,95, A,-;
|
||||
AS_030 = BIDIR,82, H,-;
|
||||
A_DECODE_17_ = INPUT,59, F,-;
|
||||
AS_000 = BIDIR,42, E,-;
|
||||
A_DECODE_16_ = INPUT,96, A,-;
|
||||
DS_030 = OUTPUT,98, A,-;
|
||||
UDS_000 = BIDIR,32, D,-;
|
||||
LDS_000 = BIDIR,31, D,-;
|
||||
|
|
@ -167,19 +170,19 @@ BERR = BIDIR,41, E,-;
|
|||
BG_030 = INPUT,21, C,-;
|
||||
BGACK_000 = INPUT,28, D,-;
|
||||
CLK_000 = INPUT,11,-,-;
|
||||
IPL_1_ = INPUT,56, F,-;
|
||||
CLK_OSZI = INPUT,61,-,-;
|
||||
IPL_0_ = INPUT,67, G,-;
|
||||
CLK_DIV_OUT = OUTPUT,65, G,-;
|
||||
FC_0_ = INPUT,57, F,-;
|
||||
CLK_EXP = OUTPUT,10, B,-;
|
||||
A_1_ = INPUT,60, F,-;
|
||||
FPU_CS = OUTPUT,78, H,-;
|
||||
FPU_SENSE = INPUT,91, A,-;
|
||||
DSACK1 = OUTPUT,81, H,-;
|
||||
IPL_1_ = INPUT,56, F,-;
|
||||
DTACK = INPUT,30, D,-;
|
||||
IPL_0_ = INPUT,67, G,-;
|
||||
AVEC = OUTPUT,92, A,-;
|
||||
FC_0_ = INPUT,57, F,-;
|
||||
E = OUTPUT,66, G,-;
|
||||
A_1_ = INPUT,60, F,-;
|
||||
VPA = INPUT,36,-,-;
|
||||
RST = INPUT,86,-,-;
|
||||
AMIGA_ADDR_ENABLE = OUTPUT,33, D,-;
|
||||
|
|
@ -187,10 +190,8 @@ AMIGA_BUS_DATA_DIR = OUTPUT,48, E,-;
|
|||
AMIGA_BUS_ENABLE_LOW = OUTPUT,20, C,-;
|
||||
AMIGA_BUS_ENABLE_HIGH = OUTPUT,34, D,-;
|
||||
CIIN = OUTPUT,47, E,-;
|
||||
AHIGH_30_ = BIDIR,5, B,-;
|
||||
AHIGH_29_ = BIDIR,6, B,-;
|
||||
AHIGH_28_ = BIDIR,15, C,-;
|
||||
SIZE_1_ = BIDIR,79, H,-;
|
||||
SIZE_0_ = BIDIR,70, G,-;
|
||||
IPL_030_2_ = OUTPUT,9, B,-;
|
||||
RW_000 = BIDIR,80, H,-;
|
||||
BG_000 = OUTPUT,29, D,-;
|
||||
|
|
@ -200,46 +201,45 @@ IPL_030_1_ = OUTPUT,7, B,-;
|
|||
IPL_030_0_ = OUTPUT,8, B,-;
|
||||
VMA = OUTPUT,35, D,-;
|
||||
RW = BIDIR,71, G,-;
|
||||
SIZE_0_ = BIDIR,70, G,-;
|
||||
cpu_est_0_ = NODE,9, G,-;
|
||||
cpu_est_1_ = NODE,13, D,-;
|
||||
cpu_est_2_ = NODE,2, D,-;
|
||||
cpu_est_3_ = NODE,8, A,-;
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH = NODE,10, A,-;
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,10, C,-;
|
||||
inst_AS_030_D0 = NODE,8, E,-;
|
||||
cpu_est_0_ = NODE,4, F,-;
|
||||
cpu_est_1_ = NODE,5, G,-;
|
||||
cpu_est_2_ = NODE,13, D,-;
|
||||
cpu_est_3_ = NODE,9, D,-;
|
||||
inst_AMIGA_BUS_ENABLE_DMA_HIGH = NODE,9, E,-;
|
||||
inst_AMIGA_BUS_ENABLE_DMA_LOW = NODE,8, E,-;
|
||||
inst_AS_030_D0 = NODE,12, F,-;
|
||||
inst_AS_030_D1 = NODE,1, F,-;
|
||||
inst_AS_030_000_SYNC = NODE,4, F,-;
|
||||
inst_AS_000_DMA = NODE,13, C,-;
|
||||
inst_DS_000_DMA = NODE,9, C,-;
|
||||
inst_VPA_D = NODE,6, G,-;
|
||||
CLK_000_D_3_ = NODE,13, F,-;
|
||||
inst_DTACK_D0 = NODE,9, F,-;
|
||||
inst_AMIGA_DS = NODE,2, H,-;
|
||||
CLK_000_D_1_ = NODE,5, H,-;
|
||||
CLK_000_D_0_ = NODE,9, D,-;
|
||||
inst_CLK_OUT_PRE_50 = NODE,13, H,-;
|
||||
inst_CLK_OUT_PRE_D = NODE,5, E,-;
|
||||
IPL_D0_0_ = NODE,6, A,-;
|
||||
IPL_D0_1_ = NODE,6, D,-;
|
||||
IPL_D0_2_ = NODE,2, A,-;
|
||||
CLK_000_D_2_ = NODE,6, H,-;
|
||||
inst_AS_030_000_SYNC = NODE,8, F,-;
|
||||
inst_AS_000_DMA = NODE,13, G,-;
|
||||
inst_DS_000_DMA = NODE,9, G,-;
|
||||
inst_VPA_D = NODE,6, B,-;
|
||||
CLK_000_D_3_ = NODE,2, D,-;
|
||||
inst_DTACK_D0 = NODE,13, F,-;
|
||||
inst_AMIGA_DS = NODE,13, H,-;
|
||||
CLK_000_D_1_ = NODE,8, A,-;
|
||||
CLK_000_D_0_ = NODE,0, F,-;
|
||||
inst_CLK_OUT_PRE_50 = NODE,6, H,-;
|
||||
inst_CLK_OUT_PRE_D = NODE,5, H,-;
|
||||
IPL_D0_0_ = NODE,9, F,-;
|
||||
IPL_D0_1_ = NODE,10, A,-;
|
||||
IPL_D0_2_ = NODE,6, C,-;
|
||||
CLK_000_D_2_ = NODE,2, H,-;
|
||||
CLK_000_D_4_ = NODE,5, F,-;
|
||||
inst_UDS_000_INT = NODE,6, B,-;
|
||||
inst_DS_000_ENABLE = NODE,2, C,-;
|
||||
inst_LDS_000_INT = NODE,13, G,-;
|
||||
inst_UDS_000_INT = NODE,6, D,-;
|
||||
inst_DS_000_ENABLE = NODE,13, A,-;
|
||||
inst_LDS_000_INT = NODE,9, A,-;
|
||||
inst_BGACK_030_INT_D = NODE,13, E,-;
|
||||
SM_AMIGA_6_ = NODE,0, F,-;
|
||||
SM_AMIGA_4_ = NODE,5, G,-;
|
||||
SM_AMIGA_1_ = NODE,5, A,-;
|
||||
SM_AMIGA_6_ = NODE,13, B,-;
|
||||
SM_AMIGA_4_ = NODE,5, A,-;
|
||||
SM_AMIGA_1_ = NODE,1, A,-;
|
||||
SM_AMIGA_0_ = NODE,12, A,-;
|
||||
CYCLE_DMA_0_ = NODE,13, B,-;
|
||||
CYCLE_DMA_1_ = NODE,2, B,-;
|
||||
CYCLE_DMA_0_ = NODE,6, G,-;
|
||||
CYCLE_DMA_1_ = NODE,10, G,-;
|
||||
inst_DSACK1_INT = NODE,2, G,-;
|
||||
inst_AS_000_INT = NODE,6, C,-;
|
||||
SM_AMIGA_5_ = NODE,12, F,-;
|
||||
SM_AMIGA_3_ = NODE,13, A,-;
|
||||
SM_AMIGA_2_ = NODE,9, A,-;
|
||||
CLK_OUT_INTreg = NODE,1, A,-;
|
||||
SM_AMIGA_i_7_ = NODE,8, F,-;
|
||||
N_60 = NODE,9, E,-;
|
||||
inst_AS_000_INT = NODE,13, C,-;
|
||||
SM_AMIGA_5_ = NODE,6, A,-;
|
||||
SM_AMIGA_3_ = NODE,2, C,-;
|
||||
SM_AMIGA_2_ = NODE,9, C,-;
|
||||
CLK_OUT_INTreg = NODE,2, A,-;
|
||||
SM_AMIGA_i_7_ = NODE,2, B,-;
|
||||
N_205 = NODE,5, E,-;
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@ Signal Name Cross Reference File
|
|||
|
||||
ispLEVER Classic 2.0.00.17.20.15
|
||||
|
||||
Design '68030_tk' created Sat Dec 30 00:43:37 2017
|
||||
Design '68030_tk' created Thu Jan 11 20:16:29 2018
|
||||
|
||||
|
||||
LEGEND: '>' Functional Block Port Separator
|
||||
|
|
|
|||
Binary file not shown.
1770
Logic/BUS68030.bl0
1770
Logic/BUS68030.bl0
File diff suppressed because it is too large
Load Diff
1812
Logic/BUS68030.bl1
1812
Logic/BUS68030.bl1
File diff suppressed because it is too large
Load Diff
2860
Logic/BUS68030.edi
2860
Logic/BUS68030.edi
File diff suppressed because it is too large
Load Diff
|
|
@ -1,6 +1,6 @@
|
|||
#-- Lattice Semiconductor Corporation Ltd.
|
||||
#-- Synplify OEM project file c:/users/matze/amiga/hardwarehacks/68030-tk/github/logic\BUS68030.prj
|
||||
#-- Written on Sat Dec 30 00:43:20 2017
|
||||
#-- Written on Thu Jan 11 20:16:10 2018
|
||||
|
||||
|
||||
#device options
|
||||
|
|
|
|||
4372
Logic/BUS68030.srm
4372
Logic/BUS68030.srm
File diff suppressed because it is too large
Load Diff
|
|
@ -6,7 +6,7 @@
|
|||
#Implementation: logic
|
||||
|
||||
$ Start of Compile
|
||||
#Sat Dec 30 00:43:29 2017
|
||||
#Thu Jan 11 20:16:21 2018
|
||||
|
||||
Synopsys VHDL Compiler, version comp201403rcp1, Build 060R, built May 27 2014
|
||||
@N|Running in 64-bit mode
|
||||
|
|
@ -55,7 +55,7 @@ State machine has 8 reachable states with original encodings of:
|
|||
At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 70MB peak: 71MB)
|
||||
|
||||
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
|
||||
# Sat Dec 30 00:43:29 2017
|
||||
# Thu Jan 11 20:16:21 2018
|
||||
|
||||
###########################################################]
|
||||
Synopsys Netlist Linker, version comp201403rcp1, Build 060R, built May 27 2014
|
||||
|
|
@ -65,7 +65,7 @@ File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\synwork\BUS68030_c
|
|||
At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)
|
||||
|
||||
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
|
||||
# Sat Dec 30 00:43:31 2017
|
||||
# Thu Jan 11 20:16:23 2018
|
||||
|
||||
###########################################################]
|
||||
Map & Optimize Report
|
||||
|
|
@ -93,8 +93,8 @@ BI_DIR 18 uses
|
|||
BUFTH 4 uses
|
||||
IBUF 39 uses
|
||||
OBUF 14 uses
|
||||
AND2 221 uses
|
||||
INV 203 uses
|
||||
AND2 225 uses
|
||||
INV 205 uses
|
||||
OR2 17 uses
|
||||
XOR2 4 uses
|
||||
|
||||
|
|
@ -106,6 +106,6 @@ Mapper successful!
|
|||
At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 39MB peak: 105MB)
|
||||
|
||||
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
|
||||
# Sat Dec 30 00:43:31 2017
|
||||
# Thu Jan 11 20:16:24 2018
|
||||
|
||||
###########################################################]
|
||||
|
|
|
|||
Binary file not shown.
|
|
@ -19,8 +19,8 @@
|
|||
<BScanVal>0</BScanVal>
|
||||
</Bypass>
|
||||
<File>C:\Users\Matze\Amiga\Hardwarehacks\68030-TK\GitHub\Logic\68030_tk.jed</File>
|
||||
<FileTime>02/24/17 22:00:28</FileTime>
|
||||
<JedecChecksum>0x1D0F</JedecChecksum>
|
||||
<FileTime>12/30/17 00:43:46</FileTime>
|
||||
<JedecChecksum>0xFCEC</JedecChecksum>
|
||||
<Operation>Erase,Program,Verify</Operation>
|
||||
<Option>
|
||||
<SVFVendor>JTAG STANDARD</SVFVendor>
|
||||
|
|
|
|||
|
|
@ -54,7 +54,7 @@ Section Member Rename Array-Notation Array Number
|
|||
Port FC_0_ FC[0] 3 1
|
||||
End
|
||||
Section Cross Reference File
|
||||
Design 'BUS68030' created Sat Dec 30 00:43:37 2017
|
||||
Design 'BUS68030' created Thu Jan 11 20:16:29 2018
|
||||
Type New Name Original Name
|
||||
// ----------------------------------------------------------------------
|
||||
Inst i_z3434 AS_030
|
||||
|
|
@ -68,312 +68,314 @@ Design 'BUS68030' created Sat Dec 30 00:43:37 2017
|
|||
Inst i_z5454 VMA
|
||||
Inst i_z5757 RW
|
||||
Inst i_z5E5E CIIN
|
||||
Inst pos_clk_un34_as_030_d1_i_i_o2_3 pos_clk.un34_as_030_d1_i_i_o2_3
|
||||
Inst SM_AMIGA_i_3_ SM_AMIGA_i[3]
|
||||
Inst pos_clk_un34_as_030_d1_i_i_o2_4 pos_clk.un34_as_030_d1_i_i_o2_4
|
||||
Inst SM_AMIGA_srsts_i_0_0_o2_4_ SM_AMIGA_srsts_i_0_0_o2[4]
|
||||
Inst pos_clk_un34_as_030_d1_i_i_o2 pos_clk.un34_as_030_d1_i_i_o2
|
||||
Inst pos_clk_un10_sm_amiga_1 pos_clk.un10_sm_amiga_1
|
||||
Inst cpu_est_i_0_ cpu_est_i[0]
|
||||
Inst pos_clk_un10_sm_amiga pos_clk.un10_sm_amiga
|
||||
Inst cpu_est_2_0_0_a2_0_2_ cpu_est_2_0_0_a2_0[2]
|
||||
Inst pos_clk_un9_clk_000_pe_0_0 pos_clk.un9_clk_000_pe_0_0
|
||||
Inst SM_AMIGA_srsts_i_0_o2_4_ SM_AMIGA_srsts_i_0_o2[4]
|
||||
Inst cpu_est_i_3_ cpu_est_i[3]
|
||||
Inst pos_clk_un34_as_030_d1_i_o2_1 pos_clk.un34_as_030_d1_i_o2_1
|
||||
Inst SM_AMIGA_srsts_i_0_o2_0_6_ SM_AMIGA_srsts_i_0_o2_0[6]
|
||||
Inst pos_clk_un34_as_030_d1_i_o2_2 pos_clk.un34_as_030_d1_i_o2_2
|
||||
Inst pos_clk_un34_as_030_d1_i_o2 pos_clk.un34_as_030_d1_i_o2
|
||||
Inst pos_clk_un34_as_030_d1_i pos_clk.un34_as_030_d1_i
|
||||
Inst SM_AMIGA_srsts_i_0_o2_1_6_ SM_AMIGA_srsts_i_0_o2_1[6]
|
||||
Inst SM_AMIGA_srsts_i_0_o2_2_6_ SM_AMIGA_srsts_i_0_o2_2[6]
|
||||
Inst SM_AMIGA_srsts_i_0_o2_6_ SM_AMIGA_srsts_i_0_o2[6]
|
||||
Inst cpu_est_0_0_0_ cpu_est_0_0[0]
|
||||
Inst SM_AMIGA_srsts_i_0_1_1_ SM_AMIGA_srsts_i_0_1[1]
|
||||
Inst SM_AMIGA_srsts_i_0_2_1_ SM_AMIGA_srsts_i_0_2[1]
|
||||
Inst SM_AMIGA_srsts_i_0_1_ SM_AMIGA_srsts_i_0[1]
|
||||
Inst pos_clk_SIZE_DMA_6_0_0_0_ pos_clk.SIZE_DMA_6_0_0[0]
|
||||
Inst SM_AMIGA_srsts_i_0_o2_1_2_ SM_AMIGA_srsts_i_0_o2_1[2]
|
||||
Inst pos_clk_SIZE_DMA_6_0_0_1_ pos_clk.SIZE_DMA_6_0_0[1]
|
||||
Inst pos_clk_un9_clk_000_pe_0_i pos_clk.un9_clk_000_pe_0_i
|
||||
Inst CLK_000_D_i_1_ CLK_000_D_i[1]
|
||||
Inst IPL_030_1_i_2_ IPL_030_1_i[2]
|
||||
Inst CLK_000_D_i_0_ CLK_000_D_i[0]
|
||||
Inst SM_AMIGA_srsts_i_0_o2_0_ SM_AMIGA_srsts_i_0_o2[0]
|
||||
Inst IPL_030_1_i_1_ IPL_030_1_i[1]
|
||||
Inst pos_clk_un9_clk_000_pe_0_o2 pos_clk.un9_clk_000_pe_0_o2
|
||||
Inst cpu_est_2_0_0_o2_3_ cpu_est_2_0_0_o2[3]
|
||||
Inst IPL_030_1_i_0_ IPL_030_1_i[0]
|
||||
Inst cpu_est_2_0_0_0_1_ cpu_est_2_0_0_0[1]
|
||||
Inst IPL_c_i_2_ IPL_c_i[2]
|
||||
Inst cpu_est_2_0_0_0_2_ cpu_est_2_0_0_0[2]
|
||||
Inst cpu_est_i_1_ cpu_est_i[1]
|
||||
Inst IPL_D0_0_i_2_ IPL_D0_0_i[2]
|
||||
Inst cpu_est_2_0_0_0_3_ cpu_est_2_0_0_0[3]
|
||||
Inst cpu_est_2_0_0_o2_2_ cpu_est_2_0_0_o2[2]
|
||||
Inst IPL_c_i_1_ IPL_c_i[1]
|
||||
Inst IPL_D0_0_i_1_ IPL_D0_0_i[1]
|
||||
Inst A_DECODE_i_19_ A_DECODE_i[19]
|
||||
Inst IPL_c_i_0_ IPL_c_i[0]
|
||||
Inst pos_clk_SIZE_DMA_6_0_0_0_0_ pos_clk.SIZE_DMA_6_0_0_0[0]
|
||||
Inst A_DECODE_i_18_ A_DECODE_i[18]
|
||||
Inst IPL_D0_0_i_0_ IPL_D0_0_i[0]
|
||||
Inst pos_clk_SIZE_DMA_6_0_0_0_1_ pos_clk.SIZE_DMA_6_0_0_0[1]
|
||||
Inst cpu_est_0_0_0_0_ cpu_est_0_0_0[0]
|
||||
Inst CLK_000_D_i_1_ CLK_000_D_i[1]
|
||||
Inst pos_clk_SIZE_DMA_6_0_0_0_a2_0_ pos_clk.SIZE_DMA_6_0_0_0_a2[0]
|
||||
Inst pos_clk_SIZE_DMA_6_0_0_0_a2_1_ pos_clk.SIZE_DMA_6_0_0_0_a2[1]
|
||||
Inst SM_AMIGA_i_2_ SM_AMIGA_i[2]
|
||||
Inst SM_AMIGA_srsts_i_0_0_a2_2_ SM_AMIGA_srsts_i_0_0_a2[2]
|
||||
Inst SM_AMIGA_srsts_i_0_0_a2_3_ SM_AMIGA_srsts_i_0_0_a2[3]
|
||||
Inst cpu_est_2_0_0_0_i_1_ cpu_est_2_0_0_0_i[1]
|
||||
Inst SM_AMIGA_srsts_i_0_0_a2_0_3_ SM_AMIGA_srsts_i_0_0_a2_0[3]
|
||||
Inst SM_AMIGA_srsts_i_0_0_a2_4_ SM_AMIGA_srsts_i_0_0_a2[4]
|
||||
Inst SM_AMIGA_nss_i_i_0_0_a2_0_0_ SM_AMIGA_nss_i_i_0_0_a2_0[0]
|
||||
Inst cpu_est_0_0_0_a2_0_ cpu_est_0_0_0_a2[0]
|
||||
Inst cpu_est_0_0_0_a2_0_0_ cpu_est_0_0_0_a2_0[0]
|
||||
Inst SM_AMIGA_srsts_i_0_0_a2_2_3_ SM_AMIGA_srsts_i_0_0_a2_2[3]
|
||||
Inst pos_clk_un9_clk_000_pe_0_0_i pos_clk.un9_clk_000_pe_0_0_i
|
||||
Inst A_DECODE_i_16_ A_DECODE_i[16]
|
||||
Inst pos_clk_AS_000_INT_1_i_a2 pos_clk.AS_000_INT_1_i_a2
|
||||
Inst pos_clk_DSACK1_INT_1_i_a2 pos_clk.DSACK1_INT_1_i_a2
|
||||
Inst cpu_est_i_2_ cpu_est_i[2]
|
||||
Inst IPL_030_1_i_2_ IPL_030_1_i[2]
|
||||
Inst IPL_030_1_i_1_ IPL_030_1_i[1]
|
||||
Inst pos_clk_SIZE_DMA_6_0_0_0_i_1_ pos_clk.SIZE_DMA_6_0_0_0_i[1]
|
||||
Inst SM_AMIGA_srsts_i_0_0_a2_1_ SM_AMIGA_srsts_i_0_0_a2[1]
|
||||
Inst SM_AMIGA_srsts_i_0_0_a2_0_1_ SM_AMIGA_srsts_i_0_0_a2_0[1]
|
||||
Inst pos_clk_SIZE_DMA_6_0_0_0_i_0_ pos_clk.SIZE_DMA_6_0_0_0_i[0]
|
||||
Inst cpu_est_2_0_0_0_a2_1_ cpu_est_2_0_0_0_a2[1]
|
||||
Inst cpu_est_2_0_0_0_a2_2_ cpu_est_2_0_0_0_a2[2]
|
||||
Inst cpu_est_2_0_0_0_a2_3_ cpu_est_2_0_0_0_a2[3]
|
||||
Inst SM_AMIGA_4_ SM_AMIGA[4]
|
||||
Inst SM_AMIGA_3_ SM_AMIGA[3]
|
||||
Inst cpu_est_2_0_0_0_i_3_ cpu_est_2_0_0_0_i[3]
|
||||
Inst SM_AMIGA_2_ SM_AMIGA[2]
|
||||
Inst SM_AMIGA_1_ SM_AMIGA[1]
|
||||
Inst SM_AMIGA_0_ SM_AMIGA[0]
|
||||
Inst cpu_est_2_0_0_0_i_2_ cpu_est_2_0_0_0_i[2]
|
||||
Inst IPL_030DFF_0_ IPL_030DFF[0]
|
||||
Inst IPL_030DFF_1_ IPL_030DFF[1]
|
||||
Inst cpu_est_2_0_0_0_o2_i_2_ cpu_est_2_0_0_0_o2_i[2]
|
||||
Inst IPL_030DFF_2_ IPL_030DFF[2]
|
||||
Inst IPL_D0_0_ IPL_D0[0]
|
||||
Inst cpu_est_2_0_0_0_o2_i_3_ cpu_est_2_0_0_0_o2_i[3]
|
||||
Inst IPL_D0_1_ IPL_D0[1]
|
||||
Inst SM_AMIGA_srsts_i_0_0_o2_i_1_ SM_AMIGA_srsts_i_0_0_o2_i[1]
|
||||
Inst cpu_est_2_0_0_a2_2_ cpu_est_2_0_0_a2[2]
|
||||
Inst pos_clk_un9_clk_000_pe_0 pos_clk.un9_clk_000_pe_0
|
||||
Inst cpu_est_2_0_0_2_ cpu_est_2_0_0[2]
|
||||
Inst cpu_est_2_0_0_3_ cpu_est_2_0_0[3]
|
||||
Inst cpu_est_2_0_0_i_3_ cpu_est_2_0_0_i[3]
|
||||
Inst SM_AMIGA_srsts_i_0_a3_4_ SM_AMIGA_srsts_i_0_a3[4]
|
||||
Inst cpu_est_2_0_0_i_2_ cpu_est_2_0_0_i[2]
|
||||
Inst pos_clk_un6_bg_030_i_i pos_clk.un6_bg_030_i_i
|
||||
Inst IPL_D0_2_ IPL_D0[2]
|
||||
Inst SM_AMIGA_i_7_ SM_AMIGA_i[7]
|
||||
Inst pos_clk_un6_bg_030_0_a3_i_i pos_clk.un6_bg_030_0_a3_i_i
|
||||
Inst pos_clk_SIZE_DMA_6_0_0_a3_0_ pos_clk.SIZE_DMA_6_0_0_a3[0]
|
||||
Inst SM_AMIGA_6_ SM_AMIGA[6]
|
||||
Inst IPL_D0_0_1_ IPL_D0_0[1]
|
||||
Inst pos_clk_SIZE_DMA_6_0_0_a3_1_ pos_clk.SIZE_DMA_6_0_0_a3[1]
|
||||
Inst SM_AMIGA_5_ SM_AMIGA[5]
|
||||
Inst IPL_D0_0_2_ IPL_D0_0[2]
|
||||
Inst CLK_000_D_1_ CLK_000_D[1]
|
||||
Inst IPL_030_1_0_ IPL_030_1[0]
|
||||
Inst CLK_000_D_2_ CLK_000_D[2]
|
||||
Inst IPL_030_1_1_ IPL_030_1[1]
|
||||
Inst CLK_000_D_3_ CLK_000_D[3]
|
||||
Inst IPL_030_1_2_ IPL_030_1[2]
|
||||
Inst CLK_000_D_4_ CLK_000_D[4]
|
||||
Inst cpu_est_0_1__r cpu_est_0_1_.r
|
||||
Inst SIZE_DMA_0_ SIZE_DMA[0]
|
||||
Inst cpu_est_0_1__m cpu_est_0_1_.m
|
||||
Inst SIZE_DMA_1_ SIZE_DMA[1]
|
||||
Inst cpu_est_0_1__n cpu_est_0_1_.n
|
||||
Inst CYCLE_DMA_0_ CYCLE_DMA[0]
|
||||
Inst cpu_est_0_1__p cpu_est_0_1_.p
|
||||
Inst CYCLE_DMA_1_ CYCLE_DMA[1]
|
||||
Inst SM_AMIGA_srsts_i_0_0_o2_i_6_ SM_AMIGA_srsts_i_0_0_o2_i[6]
|
||||
Inst cpu_est_0_2__r cpu_est_0_2_.r
|
||||
Inst cpu_est_0_ cpu_est[0]
|
||||
Inst cpu_est_0_2__m cpu_est_0_2_.m
|
||||
Inst SM_AMIGA_nss_i_i_0_a3_0_0_ SM_AMIGA_nss_i_i_0_a3_0[0]
|
||||
Inst SM_AMIGA_4_ SM_AMIGA[4]
|
||||
Inst pos_clk_SIZE_DMA_6_0_0_i_1_ pos_clk.SIZE_DMA_6_0_0_i[1]
|
||||
Inst SM_AMIGA_srsts_i_0_a3_0_3_ SM_AMIGA_srsts_i_0_a3_0[3]
|
||||
Inst SM_AMIGA_3_ SM_AMIGA[3]
|
||||
Inst SM_AMIGA_srsts_i_0_a3_5_ SM_AMIGA_srsts_i_0_a3[5]
|
||||
Inst SM_AMIGA_2_ SM_AMIGA[2]
|
||||
Inst pos_clk_SIZE_DMA_6_0_0_i_0_ pos_clk.SIZE_DMA_6_0_0_i[0]
|
||||
Inst SM_AMIGA_1_ SM_AMIGA[1]
|
||||
Inst SM_AMIGA_0_ SM_AMIGA[0]
|
||||
Inst cpu_est_1_ cpu_est[1]
|
||||
Inst cpu_est_0_2__n cpu_est_0_2_.n
|
||||
Inst cpu_est_2_ cpu_est[2]
|
||||
Inst SM_AMIGA_srsts_i_0_0_o2_i_4_ SM_AMIGA_srsts_i_0_0_o2_i[4]
|
||||
Inst cpu_est_0_2__p cpu_est_0_2_.p
|
||||
Inst cpu_est_3_ cpu_est[3]
|
||||
Inst SM_AMIGA_srsts_i_0_0_o2_i_2_ SM_AMIGA_srsts_i_0_0_o2_i[2]
|
||||
Inst cpu_est_0_3__r cpu_est_0_3_.r
|
||||
Inst SM_AMIGA_srsts_i_0_o2_i_4_ SM_AMIGA_srsts_i_0_o2_i[4]
|
||||
Inst IPL_030DFF_0_ IPL_030DFF[0]
|
||||
Inst SM_AMIGA_srsts_i_0_o2_0_i_0_ SM_AMIGA_srsts_i_0_o2_0_i[0]
|
||||
Inst IPL_030DFF_1_ IPL_030DFF[1]
|
||||
Inst IPL_030DFF_2_ IPL_030DFF[2]
|
||||
Inst cpu_est_2_0_0_a3_2_ cpu_est_2_0_0_a3[2]
|
||||
Inst IPL_D0_0_ IPL_D0[0]
|
||||
Inst pos_clk_SIZE_DMA_6_0_0_o2_i_0_ pos_clk.SIZE_DMA_6_0_0_o2_i[0]
|
||||
Inst cpu_est_2_0_0_a3_3_ cpu_est_2_0_0_a3[3]
|
||||
Inst IPL_D0_1_ IPL_D0[1]
|
||||
Inst SM_AMIGA_srsts_i_0_o2_i_3_ SM_AMIGA_srsts_i_0_o2_i[3]
|
||||
Inst SM_AMIGA_i_0_ SM_AMIGA_i[0]
|
||||
Inst CLK_000_D_0_ CLK_000_D[0]
|
||||
Inst SM_AMIGA_srsts_i_0_0_o2_0_i_3_ SM_AMIGA_srsts_i_0_0_o2_0_i[3]
|
||||
Inst SM_AMIGA_srsts_i_0_a3_0_ SM_AMIGA_srsts_i_0_a3[0]
|
||||
Inst CLK_000_D_1_ CLK_000_D[1]
|
||||
Inst CLK_000_D_2_ CLK_000_D[2]
|
||||
Inst CLK_000_D_3_ CLK_000_D[3]
|
||||
Inst cpu_est_2_0_0_o2_i_2_ cpu_est_2_0_0_o2_i[2]
|
||||
Inst IPL_D0_0_2_ IPL_D0_0[2]
|
||||
Inst CLK_000_D_4_ CLK_000_D[4]
|
||||
Inst IPL_030_1_0_ IPL_030_1[0]
|
||||
Inst SIZE_DMA_0_ SIZE_DMA[0]
|
||||
Inst cpu_est_2_0_0_o2_i_3_ cpu_est_2_0_0_o2_i[3]
|
||||
Inst IPL_030_1_1_ IPL_030_1[1]
|
||||
Inst SIZE_DMA_1_ SIZE_DMA[1]
|
||||
Inst SM_AMIGA_srsts_i_0_o2_i_0_ SM_AMIGA_srsts_i_0_o2_i[0]
|
||||
Inst IPL_030_1_2_ IPL_030_1[2]
|
||||
Inst CYCLE_DMA_0_ CYCLE_DMA[0]
|
||||
Inst cpu_est_0_2__r cpu_est_0_2_.r
|
||||
Inst CYCLE_DMA_1_ CYCLE_DMA[1]
|
||||
Inst cpu_est_0_2__m cpu_est_0_2_.m
|
||||
Inst cpu_est_0_ cpu_est[0]
|
||||
Inst cpu_est_0_2__n cpu_est_0_2_.n
|
||||
Inst cpu_est_0_2__p cpu_est_0_2_.p
|
||||
Inst cpu_est_0_3__r cpu_est_0_3_.r
|
||||
Inst cpu_est_2_0_0_i_1_ cpu_est_2_0_0_i[1]
|
||||
Inst cpu_est_0_3__m cpu_est_0_3_.m
|
||||
Inst cpu_est_0_3__n cpu_est_0_3_.n
|
||||
Inst cpu_est_0_3__p cpu_est_0_3_.p
|
||||
Inst pos_clk_SIZE_DMA_6_0_0_0_o2_i_0_ pos_clk.SIZE_DMA_6_0_0_0_o2_i[0]
|
||||
Inst IPL_030_0_0__r IPL_030_0_0_.r
|
||||
Inst SM_AMIGA_srsts_i_0_0_o2_i_3_ SM_AMIGA_srsts_i_0_0_o2_i[3]
|
||||
Inst IPL_030_0_0__m IPL_030_0_0_.m
|
||||
Inst pos_clk_un34_as_030_d1_i_i pos_clk.un34_as_030_d1_i_i
|
||||
Inst IPL_030_0_0__n IPL_030_0_0_.n
|
||||
Inst IPL_030_0_0__p IPL_030_0_0_.p
|
||||
Inst IPL_030_0_1__r IPL_030_0_1_.r
|
||||
Inst CLK_000_D_i_3_ CLK_000_D_i[3]
|
||||
Inst IPL_030_0_1__m IPL_030_0_1_.m
|
||||
Inst SM_AMIGA_srsts_i_0_o2_i_6_ SM_AMIGA_srsts_i_0_o2_i[6]
|
||||
Inst IPL_030_0_1__n IPL_030_0_1_.n
|
||||
Inst IPL_030_0_1__p IPL_030_0_1_.p
|
||||
Inst pos_clk_un6_bgack_000_0_0_i pos_clk.un6_bgack_000_0_0_i
|
||||
Inst pos_clk_un34_as_030_d1_i_o2_i pos_clk.un34_as_030_d1_i_o2_i
|
||||
Inst IPL_030_0_2__r IPL_030_0_2_.r
|
||||
Inst pos_clk_RW_000_INT_5_0_i pos_clk.RW_000_INT_5_0_i
|
||||
Inst IPL_030_0_2__m IPL_030_0_2_.m
|
||||
Inst pos_clk_RW_000_INT_5_0_0_i pos_clk.RW_000_INT_5_0_0_i
|
||||
Inst IPL_030_0_2__n IPL_030_0_2_.n
|
||||
Inst IPL_030_0_2__p IPL_030_0_2_.p
|
||||
Inst SM_AMIGA_srsts_i_0_o2_0_i_3_ SM_AMIGA_srsts_i_0_o2_0_i[3]
|
||||
Inst SM_AMIGA_srsts_i_0_o2_i_2_ SM_AMIGA_srsts_i_0_o2_i[2]
|
||||
Inst DS_000_ENABLE_0_r DS_000_ENABLE_0.r
|
||||
Inst pos_clk_un34_as_030_d1_i_i_o2_i pos_clk.un34_as_030_d1_i_i_o2_i
|
||||
Inst DS_000_ENABLE_0_m DS_000_ENABLE_0.m
|
||||
Inst CLK_000_D_i_3_ CLK_000_D_i[3]
|
||||
Inst DS_000_ENABLE_0_n DS_000_ENABLE_0.n
|
||||
Inst SM_AMIGA_nss_i_i_0_0_o2_i_0_ SM_AMIGA_nss_i_i_0_0_o2_i[0]
|
||||
Inst DS_000_ENABLE_0_p DS_000_ENABLE_0.p
|
||||
Inst SM_AMIGA_srsts_i_0_0_o2_i_0_ SM_AMIGA_srsts_i_0_0_o2_i[0]
|
||||
Inst VMA_INT_0_r VMA_INT_0.r
|
||||
Inst VMA_INT_0_m VMA_INT_0.m
|
||||
Inst VMA_INT_0_n VMA_INT_0.n
|
||||
Inst VMA_INT_0_p VMA_INT_0.p
|
||||
Inst AS_030_D1_0_r AS_030_D1_0.r
|
||||
Inst AS_030_D1_0_m AS_030_D1_0.m
|
||||
Inst SIZE_0_ SIZE[0]
|
||||
Inst A_c_i_0_ A_c_i[0]
|
||||
Inst AS_030_D1_0_n AS_030_D1_0.n
|
||||
Inst SIZE_1_ SIZE[1]
|
||||
Inst SIZE_c_i_1_ SIZE_c_i[1]
|
||||
Inst IPL_D0_0_0_ IPL_D0_0[0]
|
||||
Inst AS_030_D1_0_p AS_030_D1_0.p
|
||||
Inst AHIGH_24_ AHIGH[24]
|
||||
Inst AHIGH_25_ AHIGH[25]
|
||||
Inst pos_clk_un34_as_030_d1_i_i_i pos_clk.un34_as_030_d1_i_i_i
|
||||
Inst AHIGH_26_ AHIGH[26]
|
||||
Inst AHIGH_27_ AHIGH[27]
|
||||
Inst AHIGH_28_ AHIGH[28]
|
||||
Inst A_c_i_0_ A_c_i[0]
|
||||
Inst IPL_D0_0_0_ IPL_D0_0[0]
|
||||
Inst AHIGH_29_ AHIGH[29]
|
||||
Inst SIZE_c_i_1_ SIZE_c_i[1]
|
||||
Inst IPL_D0_0_1_ IPL_D0_0[1]
|
||||
Inst AHIGH_30_ AHIGH[30]
|
||||
Inst AHIGH_31_ AHIGH[31]
|
||||
Inst pos_clk_un9_bg_030_i pos_clk.un9_bg_030_i
|
||||
Inst pos_clk_as_000_dma6_i_0_0_i pos_clk.as_000_dma6_i_0_0_i
|
||||
Inst pos_clk_un6_bgack_000_0_i pos_clk.un6_bgack_000_0_i
|
||||
Inst A_DECODE_16_ A_DECODE[16]
|
||||
Inst A_DECODE_17_ A_DECODE[17]
|
||||
Inst pos_clk_un9_bg_030_i pos_clk.un9_bg_030_i
|
||||
Inst A_DECODE_18_ A_DECODE[18]
|
||||
Inst A_DECODE_19_ A_DECODE[19]
|
||||
Inst A_DECODE_20_ A_DECODE[20]
|
||||
Inst A_DECODE_21_ A_DECODE[21]
|
||||
Inst CYCLE_DMA_i_0_ CYCLE_DMA_i[0]
|
||||
Inst A_DECODE_22_ A_DECODE[22]
|
||||
Inst pos_clk_CYCLE_DMA_5_0_i_a2 pos_clk.CYCLE_DMA_5_0_i_a2
|
||||
Inst A_DECODE_23_ A_DECODE[23]
|
||||
Inst A_0_ A[0]
|
||||
Inst pos_clk_as_000_dma6_i_0_i pos_clk.as_000_dma6_i_0_i
|
||||
Inst A_1_ A[1]
|
||||
Inst A_i_1_ A_i[1]
|
||||
Inst DS_000_DMA_0_r DS_000_DMA_0.r
|
||||
Inst DS_000_DMA_0_m DS_000_DMA_0.m
|
||||
Inst DS_000_DMA_0_n DS_000_DMA_0.n
|
||||
Inst IPL_030_0_ IPL_030[0]
|
||||
Inst DS_000_DMA_0_p DS_000_DMA_0.p
|
||||
Inst DS_000_DMA_0_r DS_000_DMA_0.r
|
||||
Inst IPL_030_1_ IPL_030[1]
|
||||
Inst AS_000_DMA_0_r AS_000_DMA_0.r
|
||||
Inst DS_000_DMA_0_m DS_000_DMA_0.m
|
||||
Inst IPL_030_2_ IPL_030[2]
|
||||
Inst AS_000_DMA_0_m AS_000_DMA_0.m
|
||||
Inst DS_000_DMA_0_n DS_000_DMA_0.n
|
||||
Inst IPL_0_ IPL[0]
|
||||
Inst AS_000_DMA_0_n AS_000_DMA_0.n
|
||||
Inst DS_000_DMA_0_p DS_000_DMA_0.p
|
||||
Inst IPL_1_ IPL[1]
|
||||
Inst AS_000_DMA_0_p AS_000_DMA_0.p
|
||||
Inst AS_000_DMA_0_r AS_000_DMA_0.r
|
||||
Inst IPL_2_ IPL[2]
|
||||
Inst AS_000_DMA_0_m AS_000_DMA_0.m
|
||||
Inst AS_000_DMA_0_n AS_000_DMA_0.n
|
||||
Inst AS_000_DMA_0_p AS_000_DMA_0.p
|
||||
Inst CYCLE_DMA_i_1_ CYCLE_DMA_i[1]
|
||||
Inst UDS_000_INT_0_r UDS_000_INT_0.r
|
||||
Inst CYCLE_DMA_i_0_ CYCLE_DMA_i[0]
|
||||
Inst FC_0_ FC[0]
|
||||
Inst UDS_000_INT_0_m UDS_000_INT_0.m
|
||||
Inst pos_clk_CYCLE_DMA_5_0_i_a3 pos_clk.CYCLE_DMA_5_0_i_a3
|
||||
Inst FC_1_ FC[1]
|
||||
Inst UDS_000_INT_0_r UDS_000_INT_0.r
|
||||
Inst cpu_est_2_0_0_a3_0_1_1_ cpu_est_2_0_0_a3_0_1[1]
|
||||
Inst UDS_000_INT_0_m UDS_000_INT_0.m
|
||||
Inst cpu_est_2_0_0_a3_0_1_ cpu_est_2_0_0_a3_0[1]
|
||||
Inst UDS_000_INT_0_n UDS_000_INT_0.n
|
||||
Inst UDS_000_INT_0_p UDS_000_INT_0.p
|
||||
Inst BG_000_0_r BG_000_0.r
|
||||
Inst SM_AMIGA_nss_i_i_0_1_0_ SM_AMIGA_nss_i_i_0_1[0]
|
||||
Inst BG_000_0_m BG_000_0.m
|
||||
Inst SM_AMIGA_nss_i_i_0_0_ SM_AMIGA_nss_i_i_0[0]
|
||||
Inst BG_000_0_n BG_000_0.n
|
||||
Inst SM_AMIGA_srsts_i_0_1_6_ SM_AMIGA_srsts_i_0_1[6]
|
||||
Inst BG_000_0_p BG_000_0.p
|
||||
Inst SM_AMIGA_srsts_i_0_0_1_3_ SM_AMIGA_srsts_i_0_0_1[3]
|
||||
Inst SM_AMIGA_srsts_i_0_6_ SM_AMIGA_srsts_i_0[6]
|
||||
Inst LDS_000_INT_0_r LDS_000_INT_0.r
|
||||
Inst SM_AMIGA_srsts_i_0_0_3_ SM_AMIGA_srsts_i_0_0[3]
|
||||
Inst SM_AMIGA_srsts_i_0_1_4_ SM_AMIGA_srsts_i_0_1[4]
|
||||
Inst LDS_000_INT_0_m LDS_000_INT_0.m
|
||||
Inst SM_AMIGA_srsts_i_0_0_1_2_ SM_AMIGA_srsts_i_0_0_1[2]
|
||||
Inst SM_AMIGA_srsts_i_0_4_ SM_AMIGA_srsts_i_0[4]
|
||||
Inst LDS_000_INT_0_n LDS_000_INT_0.n
|
||||
Inst SM_AMIGA_srsts_i_0_0_2_ SM_AMIGA_srsts_i_0_0[2]
|
||||
Inst SM_AMIGA_srsts_i_0_1_0_ SM_AMIGA_srsts_i_0_1[0]
|
||||
Inst LDS_000_INT_0_p LDS_000_INT_0.p
|
||||
Inst SM_AMIGA_srsts_i_0_0_1_0_ SM_AMIGA_srsts_i_0_0_1[0]
|
||||
Inst AS_030_D1_0_r AS_030_D1_0.r
|
||||
Inst SM_AMIGA_srsts_i_0_0_0_ SM_AMIGA_srsts_i_0_0[0]
|
||||
Inst AS_030_D1_0_m AS_030_D1_0.m
|
||||
Inst AS_030_D1_0_n AS_030_D1_0.n
|
||||
Inst AS_030_D1_0_p AS_030_D1_0.p
|
||||
Inst SM_AMIGA_srsts_i_0_0_ SM_AMIGA_srsts_i_0[0]
|
||||
Inst RW_000_INT_0_r RW_000_INT_0.r
|
||||
Inst RW_000_INT_0_m RW_000_INT_0.m
|
||||
Inst cpu_est_2_0_0_a2_0_1_1_ cpu_est_2_0_0_a2_0_1[1]
|
||||
Inst RW_000_INT_0_n RW_000_INT_0.n
|
||||
Inst cpu_est_2_0_0_a2_0_1_ cpu_est_2_0_0_a2_0[1]
|
||||
Inst RW_000_INT_0_p RW_000_INT_0.p
|
||||
Inst AS_030_000_SYNC_0_r AS_030_000_SYNC_0.r
|
||||
Inst AS_030_000_SYNC_0_m AS_030_000_SYNC_0.m
|
||||
Inst pos_clk_as_000_dma6_i_0_0_2 pos_clk.as_000_dma6_i_0_0_2
|
||||
Inst AS_030_000_SYNC_0_n AS_030_000_SYNC_0.n
|
||||
Inst pos_clk_as_000_dma6_i_0_0 pos_clk.as_000_dma6_i_0_0
|
||||
Inst AS_030_000_SYNC_0_p AS_030_000_SYNC_0.p
|
||||
Inst BGACK_030_INT_0_r BGACK_030_INT_0.r
|
||||
Inst BGACK_030_INT_0_m BGACK_030_INT_0.m
|
||||
Inst BGACK_030_INT_0_n BGACK_030_INT_0.n
|
||||
Inst pos_clk_un6_bg_030_0_a3_i_1 pos_clk.un6_bg_030_0_a3_i_1
|
||||
Inst BGACK_030_INT_0_p BGACK_030_INT_0.p
|
||||
Inst pos_clk_un6_bg_030_0_a3_i pos_clk.un6_bg_030_0_a3_i
|
||||
Inst pos_clk_as_000_dma6_i_0 pos_clk.as_000_dma6_i_0
|
||||
Inst pos_clk_un9_bg_030 pos_clk.un9_bg_030
|
||||
Inst SM_AMIGA_nss_i_i_0_0_1_0_ SM_AMIGA_nss_i_i_0_0_1[0]
|
||||
Inst SM_AMIGA_nss_i_i_0_0_0_ SM_AMIGA_nss_i_i_0_0[0]
|
||||
Inst SM_AMIGA_srsts_i_0_0_1_6_ SM_AMIGA_srsts_i_0_0_1[6]
|
||||
Inst SM_AMIGA_srsts_i_0_0_6_ SM_AMIGA_srsts_i_0_0[6]
|
||||
Inst SM_AMIGA_srsts_i_0_0_1_5_ SM_AMIGA_srsts_i_0_0_1[5]
|
||||
Inst SM_AMIGA_srsts_i_0_0_a2_5_ SM_AMIGA_srsts_i_0_0_a2[5]
|
||||
Inst SM_AMIGA_srsts_i_0_0_5_ SM_AMIGA_srsts_i_0_0[5]
|
||||
Inst SM_AMIGA_i_0_ SM_AMIGA_i[0]
|
||||
Inst SM_AMIGA_srsts_i_0_0_1_4_ SM_AMIGA_srsts_i_0_0_1[4]
|
||||
Inst SM_AMIGA_srsts_i_0_0_a2_0_ SM_AMIGA_srsts_i_0_0_a2[0]
|
||||
Inst SM_AMIGA_srsts_i_0_0_4_ SM_AMIGA_srsts_i_0_0[4]
|
||||
Inst pos_clk_CYCLE_DMA_5_1_1 pos_clk.CYCLE_DMA_5_1_1
|
||||
Inst pos_clk_CYCLE_DMA_5_1 pos_clk.CYCLE_DMA_5_1
|
||||
Inst A_DECODE_i_16_ A_DECODE_i[16]
|
||||
Inst A_DECODE_i_19_ A_DECODE_i[19]
|
||||
Inst A_DECODE_i_18_ A_DECODE_i[18]
|
||||
Inst pos_clk_as_000_dma6_i_0_0_a2_1 pos_clk.as_000_dma6_i_0_0_a2_1
|
||||
Inst pos_clk_as_000_dma6_i_0_0_a2 pos_clk.as_000_dma6_i_0_0_a2
|
||||
Inst pos_clk_CYCLE_DMA_5_0_i_1 pos_clk.CYCLE_DMA_5_0_i_1
|
||||
Inst pos_clk_CYCLE_DMA_5_0_i_2 pos_clk.CYCLE_DMA_5_0_i_2
|
||||
Inst pos_clk_un34_as_030_d1_i_i pos_clk.un34_as_030_d1_i_i
|
||||
Inst pos_clk_CYCLE_DMA_5_0_i pos_clk.CYCLE_DMA_5_0_i
|
||||
Inst pos_clk_as_000_dma6_i_0_0_1 pos_clk.as_000_dma6_i_0_0_1
|
||||
Inst SM_AMIGA_srsts_i_0_0_o2_2_ SM_AMIGA_srsts_i_0_0_o2[2]
|
||||
Inst pos_clk_un6_bgack_000_0_0_a2 pos_clk.un6_bgack_000_0_0_a2
|
||||
Inst SM_AMIGA_srsts_i_0_0_1_1_ SM_AMIGA_srsts_i_0_0_1[1]
|
||||
Inst SM_AMIGA_srsts_i_0_0_2_1_ SM_AMIGA_srsts_i_0_0_2[1]
|
||||
Inst pos_clk_DSACK1_INT_1_i_a2_0_a2 pos_clk.DSACK1_INT_1_i_a2_0_a2
|
||||
Inst SM_AMIGA_srsts_i_0_0_1_ SM_AMIGA_srsts_i_0_0[1]
|
||||
Inst pos_clk_un9_clk_000_pe_0_0_a2_0_1 pos_clk.un9_clk_000_pe_0_0_a2_0_1
|
||||
Inst pos_clk_un9_clk_000_pe_0_0_a2_0_2 pos_clk.un9_clk_000_pe_0_0_a2_0_2
|
||||
Inst pos_clk_AS_000_INT_1_i_a2_0_a2 pos_clk.AS_000_INT_1_i_a2_0_a2
|
||||
Inst pos_clk_un9_clk_000_pe_0_0_a2_0 pos_clk.un9_clk_000_pe_0_0_a2_0
|
||||
Inst SM_AMIGA_i_i_7_ SM_AMIGA_i_i[7]
|
||||
Inst pos_clk_un9_clk_000_pe_0_0_a2_1 pos_clk.un9_clk_000_pe_0_0_a2_1
|
||||
Inst SM_AMIGA_nss_i_i_0_0_a2_0_ SM_AMIGA_nss_i_i_0_0_a2[0]
|
||||
Inst pos_clk_un9_clk_000_pe_0_0_a2_2 pos_clk.un9_clk_000_pe_0_0_a2_2
|
||||
Inst SM_AMIGA_i_6_ SM_AMIGA_i[6]
|
||||
Inst pos_clk_un9_clk_000_pe_0_0_a2 pos_clk.un9_clk_000_pe_0_0_a2
|
||||
Inst SM_AMIGA_srsts_i_0_0_a2_6_ SM_AMIGA_srsts_i_0_0_a2[6]
|
||||
Inst pos_clk_un34_as_030_d1_i_i_a2_1 pos_clk.un34_as_030_d1_i_i_a2_1
|
||||
Inst SM_AMIGA_i_5_ SM_AMIGA_i[5]
|
||||
Inst pos_clk_un34_as_030_d1_i_i_a2_2 pos_clk.un34_as_030_d1_i_i_a2_2
|
||||
Inst cpu_est_i_3_ cpu_est_i[3]
|
||||
Inst pos_clk_un34_as_030_d1_i_i_a2_3 pos_clk.un34_as_030_d1_i_i_a2_3
|
||||
Inst pos_clk_un34_as_030_d1_i_i_a2 pos_clk.un34_as_030_d1_i_i_a2
|
||||
Inst SM_AMIGA_srsts_i_0_0_o2_6_ SM_AMIGA_srsts_i_0_0_o2[6]
|
||||
Inst pos_clk_RW_000_INT_5_0_0_o2 pos_clk.RW_000_INT_5_0_0_o2
|
||||
Inst SM_AMIGA_srsts_i_0_a2_0_3_ SM_AMIGA_srsts_i_0_a2_0[3]
|
||||
Inst SM_AMIGA_srsts_i_0_a3_3_ SM_AMIGA_srsts_i_0_a3[3]
|
||||
Inst pos_clk_un6_bg_030_i_1 pos_clk.un6_bg_030_i_1
|
||||
Inst SM_AMIGA_srsts_i_0_a3_2_ SM_AMIGA_srsts_i_0_a3[2]
|
||||
Inst pos_clk_un6_bg_030_i pos_clk.un6_bg_030_i
|
||||
Inst SM_AMIGA_i_2_ SM_AMIGA_i[2]
|
||||
Inst SM_AMIGA_srsts_i_0_1_5_ SM_AMIGA_srsts_i_0_1[5]
|
||||
Inst SM_AMIGA_i_1_ SM_AMIGA_i[1]
|
||||
Inst SM_AMIGA_srsts_i_0_0_o2_0_ SM_AMIGA_srsts_i_0_0_o2[0]
|
||||
Inst pos_clk_RW_000_INT_5_0_0 pos_clk.RW_000_INT_5_0_0
|
||||
Inst SM_AMIGA_srsts_i_0_0_a2_1_1_3_ SM_AMIGA_srsts_i_0_0_a2_1_1[3]
|
||||
Inst pos_clk_un6_bgack_000_0_0 pos_clk.un6_bgack_000_0_0
|
||||
Inst SM_AMIGA_srsts_i_0_0_a2_1_2_3_ SM_AMIGA_srsts_i_0_0_a2_1_2[3]
|
||||
Inst SM_AMIGA_srsts_i_0_0_a2_1_3_ SM_AMIGA_srsts_i_0_0_a2_1[3]
|
||||
Inst CLK_000_D_i_0_ CLK_000_D_i[0]
|
||||
Inst SM_AMIGA_srsts_i_0_0_o2_0_1_3_ SM_AMIGA_srsts_i_0_0_o2_0_1[3]
|
||||
Inst SM_AMIGA_srsts_i_0_0_o2_1_ SM_AMIGA_srsts_i_0_0_o2[1]
|
||||
Inst SM_AMIGA_srsts_i_0_0_o2_0_3_ SM_AMIGA_srsts_i_0_0_o2_0[3]
|
||||
Inst cpu_est_2_0_0_0_o2_3_ cpu_est_2_0_0_0_o2[3]
|
||||
Inst SM_AMIGA_srsts_i_0_0_o2_1_2_ SM_AMIGA_srsts_i_0_0_o2_1[2]
|
||||
Inst pos_clk_un9_clk_000_pe_0_0_o2 pos_clk.un9_clk_000_pe_0_0_o2
|
||||
Inst cpu_est_i_1_ cpu_est_i[1]
|
||||
Inst SM_AMIGA_nss_i_i_0_0_o2_1_0_ SM_AMIGA_nss_i_i_0_0_o2_1[0]
|
||||
Inst cpu_est_2_0_0_0_o2_2_ cpu_est_2_0_0_0_o2[2]
|
||||
Inst SM_AMIGA_nss_i_i_0_0_o2_2_0_ SM_AMIGA_nss_i_i_0_0_o2_2[0]
|
||||
Inst SM_AMIGA_nss_i_i_0_0_o2_0_ SM_AMIGA_nss_i_i_0_0_o2[0]
|
||||
Inst SM_AMIGA_srsts_i_0_5_ SM_AMIGA_srsts_i_0[5]
|
||||
Inst SM_AMIGA_srsts_i_0_a3_0_1_ SM_AMIGA_srsts_i_0_a3_0[1]
|
||||
Inst SM_AMIGA_srsts_i_0_1_3_ SM_AMIGA_srsts_i_0_1[3]
|
||||
Inst SM_AMIGA_srsts_i_0_a3_1_ SM_AMIGA_srsts_i_0_a3[1]
|
||||
Inst SM_AMIGA_srsts_i_0_3_ SM_AMIGA_srsts_i_0[3]
|
||||
Inst SM_AMIGA_srsts_i_0_1_2_ SM_AMIGA_srsts_i_0_1[2]
|
||||
Inst SM_AMIGA_srsts_i_0_2_ SM_AMIGA_srsts_i_0[2]
|
||||
Inst pos_clk_CYCLE_DMA_5_1_1 pos_clk.CYCLE_DMA_5_1_1
|
||||
Inst pos_clk_CYCLE_DMA_5_1 pos_clk.CYCLE_DMA_5_1
|
||||
Inst AS_030_000_SYNC_0_r AS_030_000_SYNC_0.r
|
||||
Inst AS_030_000_SYNC_0_m AS_030_000_SYNC_0.m
|
||||
Inst AS_030_000_SYNC_0_n AS_030_000_SYNC_0.n
|
||||
Inst AS_030_000_SYNC_0_p AS_030_000_SYNC_0.p
|
||||
Inst pos_clk_as_000_dma6_i_a3_1 pos_clk.as_000_dma6_i_a3_1
|
||||
Inst pos_clk_as_000_dma6_i_a3 pos_clk.as_000_dma6_i_a3
|
||||
Inst A_DECODE_i_20_ A_DECODE_i[20]
|
||||
Inst pos_clk_as_000_dma6_i_0_1 pos_clk.as_000_dma6_i_0_1
|
||||
Inst SM_AMIGA_i_3_ SM_AMIGA_i[3]
|
||||
Inst pos_clk_as_000_dma6_i_0_2 pos_clk.as_000_dma6_i_0_2
|
||||
Inst SM_AMIGA_i_i_7_ SM_AMIGA_i_i[7]
|
||||
Inst pos_clk_un9_clk_000_pe_0_a3_0_2 pos_clk.un9_clk_000_pe_0_a3_0_2
|
||||
Inst pos_clk_un9_clk_000_pe_0_a3_0 pos_clk.un9_clk_000_pe_0_a3_0
|
||||
Inst pos_clk_un9_clk_000_pe_0_a3_1 pos_clk.un9_clk_000_pe_0_a3_1
|
||||
Inst pos_clk_RW_000_INT_5_0 pos_clk.RW_000_INT_5_0
|
||||
Inst pos_clk_un9_clk_000_pe_0_a3_2 pos_clk.un9_clk_000_pe_0_a3_2
|
||||
Inst pos_clk_un9_clk_000_pe_0_a3 pos_clk.un9_clk_000_pe_0_a3
|
||||
Inst pos_clk_un6_bgack_000_0 pos_clk.un6_bgack_000_0
|
||||
Inst pos_clk_un6_bgack_000_0_a2 pos_clk.un6_bgack_000_0_a2
|
||||
Inst cpu_est_2_0_0_1_ cpu_est_2_0_0[1]
|
||||
Inst SM_AMIGA_nss_i_i_0_a3_0_ SM_AMIGA_nss_i_i_0_a3[0]
|
||||
Inst SM_AMIGA_i_6_ SM_AMIGA_i[6]
|
||||
Inst SM_AMIGA_srsts_i_0_a3_6_ SM_AMIGA_srsts_i_0_a3[6]
|
||||
Inst SM_AMIGA_srsts_i_0_o2_2_ SM_AMIGA_srsts_i_0_o2[2]
|
||||
Inst pos_clk_un34_as_030_d1_i_a3 pos_clk.un34_as_030_d1_i_a3
|
||||
Inst SM_AMIGA_srsts_i_0_o2_0_1_3_ SM_AMIGA_srsts_i_0_o2_0_1[3]
|
||||
Inst cpu_est_0_0_a3_0_0_ cpu_est_0_0_a3_0[0]
|
||||
Inst SM_AMIGA_srsts_i_0_o2_0_3_ SM_AMIGA_srsts_i_0_o2_0[3]
|
||||
Inst cpu_est_0_0_a3_0_ cpu_est_0_0_a3[0]
|
||||
Inst pos_clk_un10_sm_amiga_1 pos_clk.un10_sm_amiga_1
|
||||
Inst cpu_est_i_0_ cpu_est_i[0]
|
||||
Inst pos_clk_un10_sm_amiga pos_clk.un10_sm_amiga
|
||||
Inst cpu_est_2_0_0_a3_1_ cpu_est_2_0_0_a3[1]
|
||||
Inst SM_AMIGA_srsts_i_0_a2_1_3_ SM_AMIGA_srsts_i_0_a2_1[3]
|
||||
Inst cpu_est_0_1__r cpu_est_0_1_.r
|
||||
Inst SM_AMIGA_srsts_i_0_a2_2_3_ SM_AMIGA_srsts_i_0_a2_2[3]
|
||||
Inst cpu_est_0_1__m cpu_est_0_1_.m
|
||||
Inst SM_AMIGA_srsts_i_0_a2_3_ SM_AMIGA_srsts_i_0_a2[3]
|
||||
Inst cpu_est_0_1__n cpu_est_0_1_.n
|
||||
Inst pos_clk_un34_as_030_d1_i_a2_1 pos_clk.un34_as_030_d1_i_a2_1
|
||||
Inst cpu_est_0_1__p cpu_est_0_1_.p
|
||||
Inst pos_clk_un34_as_030_d1_i_a2_2 pos_clk.un34_as_030_d1_i_a2_2
|
||||
Inst pos_clk_un34_as_030_d1_i_a2_3 pos_clk.un34_as_030_d1_i_a2_3
|
||||
Inst pos_clk_un34_as_030_d1_i_a2_4 pos_clk.un34_as_030_d1_i_a2_4
|
||||
Inst SM_AMIGA_i_4_ SM_AMIGA_i[4]
|
||||
Inst pos_clk_un34_as_030_d1_i_i_o2_1 pos_clk.un34_as_030_d1_i_i_o2_1
|
||||
Inst SM_AMIGA_srsts_i_0_0_o2_3_ SM_AMIGA_srsts_i_0_0_o2[3]
|
||||
Inst pos_clk_un34_as_030_d1_i_i_o2_2 pos_clk.un34_as_030_d1_i_i_o2_2
|
||||
Inst pos_clk_SIZE_DMA_6_0_0_0_o2_0_ pos_clk.SIZE_DMA_6_0_0_0_o2[0]
|
||||
Inst pos_clk_un34_as_030_d1_i_a2_5 pos_clk.un34_as_030_d1_i_a2_5
|
||||
Inst SM_AMIGA_srsts_i_0_o2_3_ SM_AMIGA_srsts_i_0_o2[3]
|
||||
Inst pos_clk_un34_as_030_d1_i_a2 pos_clk.un34_as_030_d1_i_a2
|
||||
Inst pos_clk_SIZE_DMA_6_0_0_o2_0_ pos_clk.SIZE_DMA_6_0_0_o2[0]
|
||||
Inst pos_clk_un9_clk_000_pe_0_a3_0_1 pos_clk.un9_clk_000_pe_0_a3_0_1
|
||||
Inst SM_AMIGA_srsts_i_0_o2_0_0_ SM_AMIGA_srsts_i_0_o2_0[0]
|
||||
Inst SM_AMIGA_i_5_ SM_AMIGA_i[5]
|
||||
Net cpu_est_2_0_3__n cpu_est_2_0[3]
|
||||
Net cpu_est_2_0_2__n cpu_est_2_0[2]
|
||||
Net size_c_0__n SIZE_c[0]
|
||||
Net ipl_c_i_2__n IPL_c_i[2]
|
||||
Net size_0__n SIZE[0]
|
||||
Net size_c_1__n SIZE_c[1]
|
||||
Net ipl_c_i_1__n IPL_c_i[1]
|
||||
Net pos_clk_un9_clk_000_pe_0_n pos_clk.un9_clk_000_pe_0
|
||||
Net vcc_n_n VCC
|
||||
Net ahigh_c_24__n AHIGH_c[24]
|
||||
Net ipl_c_i_0__n IPL_c_i[0]
|
||||
Net ahigh_24__n AHIGH[24]
|
||||
Net gnd_n_n GND
|
||||
Net ahigh_c_25__n AHIGH_c[25]
|
||||
Net ahigh_25__n AHIGH[25]
|
||||
Net ahigh_c_26__n AHIGH_c[26]
|
||||
Net ahigh_26__n AHIGH[26]
|
||||
Net ipl_c_i_2__n IPL_c_i[2]
|
||||
Net ahigh_c_27__n AHIGH_c[27]
|
||||
Net ahigh_27__n AHIGH[27]
|
||||
Net ipl_c_i_1__n IPL_c_i[1]
|
||||
Net ahigh_c_28__n AHIGH_c[28]
|
||||
Net ahigh_28__n AHIGH[28]
|
||||
Net ipl_c_i_0__n IPL_c_i[0]
|
||||
Net ahigh_c_29__n AHIGH_c[29]
|
||||
Net ahigh_29__n AHIGH[29]
|
||||
Net cpu_est_0__n cpu_est[0]
|
||||
|
|
@ -383,8 +385,8 @@ Design 'BUS68030' created Sat Dec 30 00:43:37 2017
|
|||
Net cpu_est_2__n cpu_est[2]
|
||||
Net ahigh_c_31__n AHIGH_c[31]
|
||||
Net cpu_est_3__n cpu_est[3]
|
||||
Net pos_clk_un10_sm_amiga_i_1_n pos_clk.un10_sm_amiga_i_1
|
||||
Net clk_000_d_3__n CLK_000_D[3]
|
||||
Net pos_clk_un10_sm_amiga_i_1_n pos_clk.un10_sm_amiga_i_1
|
||||
Net clk_000_d_1__n CLK_000_D[1]
|
||||
Net clk_000_d_0__n CLK_000_D[0]
|
||||
Net ipl_d0_0__n IPL_D0[0]
|
||||
|
|
@ -397,7 +399,6 @@ Design 'BUS68030' created Sat Dec 30 00:43:37 2017
|
|||
Net size_dma_1__n SIZE_DMA[1]
|
||||
Net a_decode_c_16__n A_DECODE_c[16]
|
||||
Net a_decode_16__n A_DECODE[16]
|
||||
Net pos_clk_cycle_dma_5_1_1__n pos_clk.CYCLE_DMA_5_1[1]
|
||||
Net sm_amiga_6__n SM_AMIGA[6]
|
||||
Net a_decode_c_17__n A_DECODE_c[17]
|
||||
Net a_decode_17__n A_DECODE[17]
|
||||
|
|
@ -405,6 +406,7 @@ Design 'BUS68030' created Sat Dec 30 00:43:37 2017
|
|||
Net a_decode_c_18__n A_DECODE_c[18]
|
||||
Net sm_amiga_1__n SM_AMIGA[1]
|
||||
Net a_decode_18__n A_DECODE[18]
|
||||
Net pos_clk_cycle_dma_5_1_1__n pos_clk.CYCLE_DMA_5_1[1]
|
||||
Net sm_amiga_0__n SM_AMIGA[0]
|
||||
Net a_decode_c_19__n A_DECODE_c[19]
|
||||
Net cycle_dma_0__n CYCLE_DMA[0]
|
||||
|
|
@ -440,38 +442,34 @@ Design 'BUS68030' created Sat Dec 30 00:43:37 2017
|
|||
Net bg_000_0_un0_n BG_000_0.un0
|
||||
Net lds_000_int_0_un3_n LDS_000_INT_0.un3
|
||||
Net lds_000_int_0_un1_n LDS_000_INT_0.un1
|
||||
Net lds_000_int_0_un0_n LDS_000_INT_0.un0
|
||||
Net as_030_d1_0_un3_n AS_030_D1_0.un3
|
||||
Net as_030_d1_0_un1_n AS_030_D1_0.un1
|
||||
Net as_030_d1_0_un0_n AS_030_D1_0.un0
|
||||
Net rw_000_int_0_un3_n RW_000_INT_0.un3
|
||||
Net rw_000_int_0_un1_n RW_000_INT_0.un1
|
||||
Net ipl_030_c_0__n IPL_030_c[0]
|
||||
Net rw_000_int_0_un0_n RW_000_INT_0.un0
|
||||
Net lds_000_int_0_un0_n LDS_000_INT_0.un0
|
||||
Net ipl_030_0__n IPL_030[0]
|
||||
Net as_030_000_sync_0_un3_n AS_030_000_SYNC_0.un3
|
||||
Net rw_000_int_0_un3_n RW_000_INT_0.un3
|
||||
Net ipl_030_c_1__n IPL_030_c[1]
|
||||
Net as_030_000_sync_0_un1_n AS_030_000_SYNC_0.un1
|
||||
Net sm_amiga_i_7__n SM_AMIGA_i[7]
|
||||
Net rw_000_int_0_un1_n RW_000_INT_0.un1
|
||||
Net ipl_030_1__n IPL_030[1]
|
||||
Net as_030_000_sync_0_un0_n AS_030_000_SYNC_0.un0
|
||||
Net pos_clk_size_dma_6_0__n pos_clk.SIZE_DMA_6[0]
|
||||
Net rw_000_int_0_un0_n RW_000_INT_0.un0
|
||||
Net sm_amiga_i_7__n SM_AMIGA_i[7]
|
||||
Net ipl_030_c_2__n IPL_030_c[2]
|
||||
Net bgack_030_int_0_un3_n BGACK_030_INT_0.un3
|
||||
Net pos_clk_size_dma_6_1__n pos_clk.SIZE_DMA_6[1]
|
||||
Net pos_clk_size_dma_6_0__n pos_clk.SIZE_DMA_6[0]
|
||||
Net bgack_030_int_0_un1_n BGACK_030_INT_0.un1
|
||||
Net cpu_est_2_1__n cpu_est_2[1]
|
||||
Net pos_clk_size_dma_6_1__n pos_clk.SIZE_DMA_6[1]
|
||||
Net ipl_c_0__n IPL_c[0]
|
||||
Net bgack_030_int_0_un0_n BGACK_030_INT_0.un0
|
||||
Net cpu_est_2_2__n cpu_est_2[2]
|
||||
Net ipl_0__n IPL[0]
|
||||
Net cpu_est_0_1__un3_n cpu_est_0_1_.un3
|
||||
Net as_030_000_sync_0_un3_n AS_030_000_SYNC_0.un3
|
||||
Net cpu_est_2_3__n cpu_est_2[3]
|
||||
Net ipl_c_1__n IPL_c[1]
|
||||
Net cpu_est_0_1__un1_n cpu_est_0_1_.un1
|
||||
Net as_030_000_sync_0_un1_n AS_030_000_SYNC_0.un1
|
||||
Net ipl_1__n IPL[1]
|
||||
Net cpu_est_0_1__un0_n cpu_est_0_1_.un0
|
||||
Net as_030_000_sync_0_un0_n AS_030_000_SYNC_0.un0
|
||||
Net ipl_c_2__n IPL_c[2]
|
||||
Net cpu_est_0_1__un3_n cpu_est_0_1_.un3
|
||||
Net cpu_est_0_1__un1_n cpu_est_0_1_.un1
|
||||
Net cpu_est_0_1__un0_n cpu_est_0_1_.un0
|
||||
Net cpu_est_0_2__un3_n cpu_est_0_2_.un3
|
||||
Net cpu_est_0_2__un1_n cpu_est_0_2_.un1
|
||||
Net cpu_est_0_2__un0_n cpu_est_0_2_.un0
|
||||
|
|
@ -485,78 +483,79 @@ Design 'BUS68030' created Sat Dec 30 00:43:37 2017
|
|||
Net ipl_030_0_1__un1_n IPL_030_0_1_.un1
|
||||
Net ipl_030_0_1__un0_n IPL_030_0_1_.un0
|
||||
Net ipl_030_0_2__un3_n IPL_030_0_2_.un3
|
||||
Net ipl_030_0_2__un1_n IPL_030_0_2_.un1
|
||||
Net ipl_030_0_2__un0_n IPL_030_0_2_.un0
|
||||
Net ds_000_enable_0_un3_n DS_000_ENABLE_0.un3
|
||||
Net fc_c_0__n FC_c[0]
|
||||
Net ds_000_enable_0_un1_n DS_000_ENABLE_0.un1
|
||||
Net ipl_030_0_2__un1_n IPL_030_0_2_.un1
|
||||
Net fc_0__n FC[0]
|
||||
Net ds_000_enable_0_un0_n DS_000_ENABLE_0.un0
|
||||
Net ipl_030_0_2__un0_n IPL_030_0_2_.un0
|
||||
Net fc_c_1__n FC_c[1]
|
||||
Net ds_000_enable_0_un3_n DS_000_ENABLE_0.un3
|
||||
Net ds_000_enable_0_un1_n DS_000_ENABLE_0.un1
|
||||
Net ds_000_enable_0_un0_n DS_000_ENABLE_0.un0
|
||||
Net vma_int_0_un3_n VMA_INT_0.un3
|
||||
Net vma_int_0_un1_n VMA_INT_0.un1
|
||||
Net vma_int_0_un0_n VMA_INT_0.un0
|
||||
Net as_030_d1_0_un3_n AS_030_D1_0.un3
|
||||
Net as_030_d1_0_un1_n AS_030_D1_0.un1
|
||||
Net as_030_d1_0_un0_n AS_030_D1_0.un0
|
||||
Net a_decode_15__n A_DECODE[15]
|
||||
Net a_decode_14__n A_DECODE[14]
|
||||
Net a_decode_13__n A_DECODE[13]
|
||||
Net a_decode_12__n A_DECODE[12]
|
||||
Net a_decode_11__n A_DECODE[11]
|
||||
Net pos_clk_un2_i_n pos_clk.un2_i
|
||||
Net a_decode_10__n A_DECODE[10]
|
||||
Net a_decode_9__n A_DECODE[9]
|
||||
Net pos_clk_un2_i_n pos_clk.un2_i
|
||||
Net a_decode_8__n A_DECODE[8]
|
||||
Net a_decode_7__n A_DECODE[7]
|
||||
Net pos_clk_un9_bg_030_0_n pos_clk.un9_bg_030_0
|
||||
Net a_decode_6__n A_DECODE[6]
|
||||
Net a_decode_5__n A_DECODE[5]
|
||||
Net pos_clk_un9_bg_030_0_n pos_clk.un9_bg_030_0
|
||||
Net a_decode_4__n A_DECODE[4]
|
||||
Net a_decode_3__n A_DECODE[3]
|
||||
Net a_decode_2__n A_DECODE[2]
|
||||
Net cpu_est_2_1__n cpu_est_2[1]
|
||||
Net a_c_i_0__n A_c_i[0]
|
||||
Net size_c_i_1__n SIZE_c_i[1]
|
||||
Net pos_clk_un10_sm_amiga_i_n pos_clk.un10_sm_amiga_i
|
||||
Net pos_clk_rw_000_int_5_n pos_clk.RW_000_INT_5
|
||||
Net pos_clk_un6_bgack_000_n pos_clk.un6_bgack_000
|
||||
Net pos_clk_un6_bgack_000_0_n pos_clk.un6_bgack_000_0
|
||||
Net pos_clk_rw_000_int_5_0_n pos_clk.RW_000_INT_5_0
|
||||
Net pos_clk_rw_000_int_5_n pos_clk.RW_000_INT_5
|
||||
Net pos_clk_un6_bgack_000_n pos_clk.un6_bgack_000
|
||||
Net pos_clk_un9_bg_030_n pos_clk.un9_bg_030
|
||||
Net un1_cycle_dma_2__n un1_CYCLE_DMA[2]
|
||||
Net pos_clk_un2_n pos_clk.un2
|
||||
Net clk_000_d_i_3__n CLK_000_D_i[3]
|
||||
Net cpu_est_2_0_1__n cpu_est_2_0[1]
|
||||
Net cycle_dma_i_0__n CYCLE_DMA_i[0]
|
||||
Net cycle_dma_i_1__n CYCLE_DMA_i[1]
|
||||
Net a_i_1__n A_i[1]
|
||||
Net a_decode_i_19__n A_DECODE_i[19]
|
||||
Net a_decode_i_18__n A_DECODE_i[18]
|
||||
Net a_decode_i_16__n A_DECODE_i[16]
|
||||
Net sm_amiga_i_0__n SM_AMIGA_i[0]
|
||||
Net sm_amiga_i_5__n SM_AMIGA_i[5]
|
||||
Net sm_amiga_i_6__n SM_AMIGA_i[6]
|
||||
Net sm_amiga_i_i_7__n SM_AMIGA_i_i[7]
|
||||
Net clk_000_d_i_3__n CLK_000_D_i[3]
|
||||
Net ahigh_i_25__n AHIGH_i[25]
|
||||
Net ahigh_i_24__n AHIGH_i[24]
|
||||
Net ahigh_i_27__n AHIGH_i[27]
|
||||
Net ahigh_i_26__n AHIGH_i[26]
|
||||
Net ahigh_i_29__n AHIGH_i[29]
|
||||
Net ahigh_i_28__n AHIGH_i[28]
|
||||
Net ahigh_i_31__n AHIGH_i[31]
|
||||
Net ahigh_i_30__n AHIGH_i[30]
|
||||
Net sm_amiga_i_2__n SM_AMIGA_i[2]
|
||||
Net sm_amiga_i_1__n SM_AMIGA_i[1]
|
||||
Net cpu_est_i_0__n cpu_est_i[0]
|
||||
Net cpu_est_i_3__n cpu_est_i[3]
|
||||
Net sm_amiga_i_i_7__n SM_AMIGA_i_i[7]
|
||||
Net sm_amiga_i_3__n SM_AMIGA_i[3]
|
||||
Net a_decode_i_20__n A_DECODE_i[20]
|
||||
Net cpu_est_i_0__n cpu_est_i[0]
|
||||
Net sm_amiga_i_6__n SM_AMIGA_i[6]
|
||||
Net cpu_est_i_3__n cpu_est_i[3]
|
||||
Net sm_amiga_i_5__n SM_AMIGA_i[5]
|
||||
Net sm_amiga_i_4__n SM_AMIGA_i[4]
|
||||
Net cpu_est_i_1__n cpu_est_i[1]
|
||||
Net clk_000_d_i_0__n CLK_000_D_i[0]
|
||||
Net clk_000_d_i_1__n CLK_000_D_i[1]
|
||||
Net cpu_est_i_2__n cpu_est_i[2]
|
||||
Net sm_amiga_i_2__n SM_AMIGA_i[2]
|
||||
Net ahigh_i_30__n AHIGH_i[30]
|
||||
Net ahigh_i_31__n AHIGH_i[31]
|
||||
Net ahigh_i_28__n AHIGH_i[28]
|
||||
Net a_decode_i_16__n A_DECODE_i[16]
|
||||
Net a_decode_i_19__n A_DECODE_i[19]
|
||||
Net a_decode_i_18__n A_DECODE_i[18]
|
||||
Net pos_clk_size_dma_6_0_1__n pos_clk.SIZE_DMA_6_0[1]
|
||||
Net ahigh_i_29__n AHIGH_i[29]
|
||||
Net ahigh_i_26__n AHIGH_i[26]
|
||||
Net pos_clk_size_dma_6_0_0__n pos_clk.SIZE_DMA_6_0[0]
|
||||
Net ahigh_i_27__n AHIGH_i[27]
|
||||
Net ahigh_i_24__n AHIGH_i[24]
|
||||
Net ahigh_i_25__n AHIGH_i[25]
|
||||
Net cpu_est_2_0_3__n cpu_est_2_0[3]
|
||||
Net cpu_est_2_0_2__n cpu_est_2_0[2]
|
||||
Net cpu_est_2_0_1__n cpu_est_2_0[1]
|
||||
Net pos_clk_un9_clk_000_pe_0_n pos_clk.un9_clk_000_pe_0
|
||||
Net sm_amiga_i_0__n SM_AMIGA_i[0]
|
||||
End
|
||||
Section Type Name
|
||||
// ----------------------------------------------------------------------
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
#Implementation: logic
|
||||
|
||||
$ Start of Compile
|
||||
#Sat Dec 30 00:43:29 2017
|
||||
#Thu Jan 11 20:16:21 2018
|
||||
|
||||
Synopsys VHDL Compiler, version comp201403rcp1, Build 060R, built May 27 2014
|
||||
@N|Running in 64-bit mode
|
||||
|
|
@ -55,7 +55,7 @@ State machine has 8 reachable states with original encodings of:
|
|||
At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 70MB peak: 71MB)
|
||||
|
||||
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
|
||||
# Sat Dec 30 00:43:29 2017
|
||||
# Thu Jan 11 20:16:21 2018
|
||||
|
||||
###########################################################]
|
||||
Synopsys Netlist Linker, version comp201403rcp1, Build 060R, built May 27 2014
|
||||
|
|
@ -65,6 +65,47 @@ File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\synwork\BUS68030_c
|
|||
At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)
|
||||
|
||||
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
|
||||
# Sat Dec 30 00:43:31 2017
|
||||
# Thu Jan 11 20:16:23 2018
|
||||
|
||||
###########################################################]
|
||||
Map & Optimize Report
|
||||
|
||||
Synopsys CPLD Technology Mapper, Version maplat, Build 923R, Built May 6 2014
|
||||
Copyright (C) 1994-2013, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use or distribution of the software is strictly prohibited.
|
||||
Product Version I-2014.03LC
|
||||
@N: MF248 |Running in 64-bit mode.
|
||||
Encoding state machine SM_AMIGA[0:7] (view:work.BUS68030(behavioral))
|
||||
original code -> new code
|
||||
000 -> 00000000
|
||||
001 -> 00000011
|
||||
010 -> 00000101
|
||||
011 -> 00001001
|
||||
100 -> 00010001
|
||||
101 -> 00100001
|
||||
110 -> 01000001
|
||||
111 -> 10000001
|
||||
---------------------------------------
|
||||
Resource Usage Report
|
||||
|
||||
Simple gate primitives:
|
||||
DFF 52 uses
|
||||
BI_DIR 18 uses
|
||||
BUFTH 4 uses
|
||||
IBUF 39 uses
|
||||
OBUF 14 uses
|
||||
AND2 225 uses
|
||||
INV 205 uses
|
||||
OR2 17 uses
|
||||
XOR2 4 uses
|
||||
|
||||
|
||||
@N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis.
|
||||
I-2014.03LC
|
||||
Mapper successful!
|
||||
|
||||
At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 39MB peak: 105MB)
|
||||
|
||||
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
|
||||
# Thu Jan 11 20:16:24 2018
|
||||
|
||||
###########################################################]
|
||||
|
|
|
|||
|
|
@ -26,9 +26,9 @@ S7RCVMI="F3s Anz1Ujjd3ELCNFPHs"NDR"D=PDE8"S>
|
|||
SR<WN(=""DRL=d"4"ORL=""(R=CD""4dR=CO""4cR
|
||||
/>SqS<R"M=3ONsEDVHCP"R=""(/S>
|
||||
SR<qM3="lkF8DHCVDRC"P(=""
|
||||
/>SqS<R"M=3CODNbMk_C#0b0._H"lCR"P=jc3jn6U("
|
||||
/>SqS<R"M=3CODNbMk_C#0b04_H"lCR"P=j43j66n."
|
||||
/>SqS<R"M=3l#00#DH0l0HCP"R=3"jjjjjj/j">S
|
||||
/>SqS<R"M=3CODNbMk_C#0b0._H"lCR"P=jd3j4j.6"
|
||||
/>SqS<R"M=3CODNbMk_C#0b04_H"lCR"P=jj3jjjjj"
|
||||
/>SqS<R"M=3l#00#DH0l0HCP"R=3"jjn46./6">S
|
||||
S<MqR=s"FHHo_M_#0FRV"P&="J0kF;1AzndUjjk&JF"0;/S>
|
||||
SR<qM3="FosHhCNl"=RP"k&JFA0;zU1nj&djJ0kF;>"/
|
||||
/S<7>CV
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
#-- Synopsys, Inc.
|
||||
#-- Version I-2014.03LC
|
||||
#-- Project file C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\run_options.txt
|
||||
#-- Written on Sat Dec 30 00:43:29 2017
|
||||
#-- Written on Thu Jan 11 20:16:20 2018
|
||||
|
||||
|
||||
#project files
|
||||
|
|
|
|||
|
|
@ -5,6 +5,6 @@ File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\synwork\BUS68030_c
|
|||
At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)
|
||||
|
||||
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
|
||||
# Sat Dec 30 00:43:31 2017
|
||||
# Thu Jan 11 20:16:23 2018
|
||||
|
||||
###########################################################]
|
||||
|
|
|
|||
|
|
@ -21,8 +21,8 @@ BI_DIR 18 uses
|
|||
BUFTH 4 uses
|
||||
IBUF 39 uses
|
||||
OBUF 14 uses
|
||||
AND2 221 uses
|
||||
INV 203 uses
|
||||
AND2 225 uses
|
||||
INV 205 uses
|
||||
OR2 17 uses
|
||||
XOR2 4 uses
|
||||
|
||||
|
|
@ -34,6 +34,6 @@ Mapper successful!
|
|||
At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 39MB peak: 105MB)
|
||||
|
||||
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
|
||||
# Sat Dec 30 00:43:31 2017
|
||||
# Thu Jan 11 20:16:24 2018
|
||||
|
||||
###########################################################]
|
||||
|
|
|
|||
|
|
@ -29,13 +29,13 @@ The file contains the job information from compiler to be displayed as part of t
|
|||
<data>-</data>
|
||||
</info>
|
||||
<info name="Real Time">
|
||||
<data>0h:00m:00s</data>
|
||||
<data>0h:00m:01s</data>
|
||||
</info>
|
||||
<info name="Peak Memory">
|
||||
<data>-</data>
|
||||
</info>
|
||||
<info name="Date &Time">
|
||||
<data type="timestamp">1514591009</data>
|
||||
<data type="timestamp">1515698181</data>
|
||||
</info>
|
||||
</job_info>
|
||||
</job_run_status>
|
||||
|
|
@ -40,7 +40,7 @@ The file contains the job information from mapper to be displayed as part of the
|
|||
<data>105MB</data>
|
||||
</info>
|
||||
<info name="Date & Time">
|
||||
<data type="timestamp">1514591011</data>
|
||||
<data type="timestamp">1515698184</data>
|
||||
</info>
|
||||
</job_info>
|
||||
</job_run_status>
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
<html><body><samp><pre>
|
||||
<!@TC:1514591009>
|
||||
<!@TC:1515698180>
|
||||
#Build: Synplify Pro I-2014.03LC , Build 063R, May 27 2014
|
||||
#install: E:\ispLEVER_Classic2_0\synpbase
|
||||
#OS: Windows 7 6.2
|
||||
|
|
@ -8,36 +8,36 @@
|
|||
#Implementation: logic
|
||||
|
||||
<a name=compilerReport1>$ Start of Compile</a>
|
||||
#Sat Dec 30 00:43:29 2017
|
||||
#Thu Jan 11 20:16:21 2018
|
||||
|
||||
Synopsys VHDL Compiler, version comp201403rcp1, Build 060R, built May 27 2014
|
||||
@N: : <!@TM:1514591009> | Running in 64-bit mode
|
||||
@N: : <!@TM:1515698181> | Running in 64-bit mode
|
||||
Copyright (C) 1994-2014 Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, or distribution of this software is strictly prohibited.
|
||||
|
||||
@N:<a href="@N:CD720:@XP_HELP">CD720</a> : <a href="E:\ispLEVER_Classic2_0\synpbase\lib\vhd\std.vhd:123:18:123:22:@N:CD720:@XP_MSG">std.vhd(123)</a><!@TM:1514591009> | Setting time resolution to ns
|
||||
@N: : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:13:7:13:15:@N::@XP_MSG">68030-68000-bus.vhd(13)</a><!@TM:1514591009> | Top entity is set to BUS68030.
|
||||
@N:<a href="@N:CD720:@XP_HELP">CD720</a> : <a href="E:\ispLEVER_Classic2_0\synpbase\lib\vhd\std.vhd:123:18:123:22:@N:CD720:@XP_MSG">std.vhd(123)</a><!@TM:1515698181> | Setting time resolution to ns
|
||||
@N: : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:13:7:13:15:@N::@XP_MSG">68030-68000-bus.vhd(13)</a><!@TM:1515698181> | Top entity is set to BUS68030.
|
||||
File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd changed - recompiling
|
||||
VHDL syntax check successful!
|
||||
File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd changed - recompiling
|
||||
@N:<a href="@N:CD630:@XP_HELP">CD630</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:13:7:13:15:@N:CD630:@XP_MSG">68030-68000-bus.vhd(13)</a><!@TM:1514591009> | Synthesizing work.bus68030.behavioral
|
||||
@N:<a href="@N:CD233:@XP_HELP">CD233</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:70:10:70:12:@N:CD233:@XP_MSG">68030-68000-bus.vhd(70)</a><!@TM:1514591009> | Using sequential encoding for type sm_e
|
||||
@N:<a href="@N:CD233:@XP_HELP">CD233</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:87:14:87:16:@N:CD233:@XP_MSG">68030-68000-bus.vhd(87)</a><!@TM:1514591009> | Using sequential encoding for type sm_68000
|
||||
<font color=#A52A2A>@W:<a href="@W:CD638:@XP_HELP">CD638</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:130:7:130:18:@W:CD638:@XP_MSG">68030-68000-bus.vhd(130)</a><!@TM:1514591009> | Signal clk_out_pre is undriven </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CD638:@XP_HELP">CD638</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:134:7:134:16:@W:CD638:@XP_MSG">68030-68000-bus.vhd(134)</a><!@TM:1514591009> | Signal clk_030_h is undriven </font>
|
||||
@N:<a href="@N:CD630:@XP_HELP">CD630</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:13:7:13:15:@N:CD630:@XP_MSG">68030-68000-bus.vhd(13)</a><!@TM:1515698181> | Synthesizing work.bus68030.behavioral
|
||||
@N:<a href="@N:CD233:@XP_HELP">CD233</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:70:10:70:12:@N:CD233:@XP_MSG">68030-68000-bus.vhd(70)</a><!@TM:1515698181> | Using sequential encoding for type sm_e
|
||||
@N:<a href="@N:CD233:@XP_HELP">CD233</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:87:14:87:16:@N:CD233:@XP_MSG">68030-68000-bus.vhd(87)</a><!@TM:1515698181> | Using sequential encoding for type sm_68000
|
||||
<font color=#A52A2A>@W:<a href="@W:CD638:@XP_HELP">CD638</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:130:7:130:18:@W:CD638:@XP_MSG">68030-68000-bus.vhd(130)</a><!@TM:1515698181> | Signal clk_out_pre is undriven </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CD638:@XP_HELP">CD638</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:134:7:134:16:@W:CD638:@XP_MSG">68030-68000-bus.vhd(134)</a><!@TM:1515698181> | Signal clk_030_h is undriven </font>
|
||||
Post processing for work.bus68030.behavioral
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning register DTACK_DMA_4 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning register CLK_030_PE_2(1 downto 0) </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning register AS_000_D0_3 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning register RESET_OUT_4 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning register RST_DLY_6(2 downto 0) </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning register DS_030_D0_3 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning register nEXP_SPACE_D0_3 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning register BGACK_030_INT_PRE_2 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:132:34:132:37:@W:CL169:@XP_MSG">68030-68000-bus.vhd(132)</a><!@TM:1514591009> | Pruning register CLK_OUT_EXP_INT_1 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:128:36:128:39:@W:CL169:@XP_MSG">68030-68000-bus.vhd(128)</a><!@TM:1514591009> | Pruning register CLK_OUT_PRE_25_3 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:158:2:158:4:@W:CL169:@XP_MSG">68030-68000-bus.vhd(158)</a><!@TM:1514591009> | Pruning register CLK_030_D0_2 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL271:@XP_HELP">CL271</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL271:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... </font>
|
||||
@N:<a href="@N:CL201:@XP_HELP">CL201</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@N:CL201:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Trying to extract state machine for register SM_AMIGA
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1515698181> | Pruning register DTACK_DMA_4 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1515698181> | Pruning register CLK_030_PE_2(1 downto 0) </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1515698181> | Pruning register AS_000_D0_3 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1515698181> | Pruning register RESET_OUT_4 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1515698181> | Pruning register RST_DLY_6(2 downto 0) </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1515698181> | Pruning register DS_030_D0_3 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1515698181> | Pruning register nEXP_SPACE_D0_3 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL169:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1515698181> | Pruning register BGACK_030_INT_PRE_2 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:132:34:132:37:@W:CL169:@XP_MSG">68030-68000-bus.vhd(132)</a><!@TM:1515698181> | Pruning register CLK_OUT_EXP_INT_1 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:128:36:128:39:@W:CL169:@XP_MSG">68030-68000-bus.vhd(128)</a><!@TM:1515698181> | Pruning register CLK_OUT_PRE_25_3 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL169:@XP_HELP">CL169</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:158:2:158:4:@W:CL169:@XP_MSG">68030-68000-bus.vhd(158)</a><!@TM:1515698181> | Pruning register CLK_030_D0_2 </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL271:@XP_HELP">CL271</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@W:CL271:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1515698181> | Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ... </font>
|
||||
@N:<a href="@N:CL201:@XP_HELP">CL201</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@N:CL201:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1515698181> | Trying to extract state machine for register SM_AMIGA
|
||||
Extracted state machine for register SM_AMIGA
|
||||
State machine has 8 reachable states with original encodings of:
|
||||
000
|
||||
|
|
@ -48,26 +48,26 @@ State machine has 8 reachable states with original encodings of:
|
|||
101
|
||||
110
|
||||
111
|
||||
@N:<a href="@N:CL201:@XP_HELP">CL201</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@N:CL201:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1514591009> | Trying to extract state machine for register cpu_est
|
||||
<font color=#A52A2A>@W:<a href="@W:CL246:@XP_HELP">CL246</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:24:1:24:9:@W:CL246:@XP_MSG">68030-68000-bus.vhd(24)</a><!@TM:1514591009> | Input port bits 15 to 2 of a_decode(23 downto 2) are unused </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL159:@XP_HELP">CL159</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:34:1:34:8:@W:CL159:@XP_MSG">68030-68000-bus.vhd(34)</a><!@TM:1514591009> | Input CLK_030 is unused</font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL158:@XP_HELP">CL158</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:50:1:50:6:@W:CL158:@XP_MSG">68030-68000-bus.vhd(50)</a><!@TM:1514591009> | Inout RESET is unused</font>
|
||||
@N:<a href="@N:CL201:@XP_HELP">CL201</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:133:38:133:41:@N:CL201:@XP_MSG">68030-68000-bus.vhd(133)</a><!@TM:1515698181> | Trying to extract state machine for register cpu_est
|
||||
<font color=#A52A2A>@W:<a href="@W:CL246:@XP_HELP">CL246</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:24:1:24:9:@W:CL246:@XP_MSG">68030-68000-bus.vhd(24)</a><!@TM:1515698181> | Input port bits 15 to 2 of a_decode(23 downto 2) are unused </font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL159:@XP_HELP">CL159</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:34:1:34:8:@W:CL159:@XP_MSG">68030-68000-bus.vhd(34)</a><!@TM:1515698181> | Input CLK_030 is unused</font>
|
||||
<font color=#A52A2A>@W:<a href="@W:CL158:@XP_HELP">CL158</a> : <a href="C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd:50:1:50:6:@W:CL158:@XP_MSG">68030-68000-bus.vhd(50)</a><!@TM:1515698181> | Inout RESET is unused</font>
|
||||
@END
|
||||
|
||||
At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 70MB peak: 71MB)
|
||||
|
||||
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
|
||||
# Sat Dec 30 00:43:29 2017
|
||||
# Thu Jan 11 20:16:21 2018
|
||||
|
||||
###########################################################]
|
||||
Synopsys Netlist Linker, version comp201403rcp1, Build 060R, built May 27 2014
|
||||
@N: : <!@TM:1514591011> | Running in 64-bit mode
|
||||
@N: : <!@TM:1515698183> | Running in 64-bit mode
|
||||
File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\synwork\BUS68030_comp.srs changed - recompiling
|
||||
|
||||
At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)
|
||||
|
||||
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
|
||||
# Sat Dec 30 00:43:31 2017
|
||||
# Thu Jan 11 20:16:23 2018
|
||||
|
||||
###########################################################]
|
||||
Map & Optimize Report
|
||||
|
|
@ -75,7 +75,7 @@ Map & Optimize Report
|
|||
<a name=mapperReport2>Synopsys CPLD Technology Mapper, Version maplat, Build 923R, Built May 6 2014</a>
|
||||
Copyright (C) 1994-2013, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use or distribution of the software is strictly prohibited.
|
||||
Product Version I-2014.03LC
|
||||
@N:<a href="@N:MF248:@XP_HELP">MF248</a> : <!@TM:1514591011> | Running in 64-bit mode.
|
||||
@N:<a href="@N:MF248:@XP_HELP">MF248</a> : <!@TM:1515698184> | Running in 64-bit mode.
|
||||
Encoding state machine SM_AMIGA[0:7] (view:work.BUS68030(behavioral))
|
||||
original code -> new code
|
||||
000 -> 00000000
|
||||
|
|
@ -95,20 +95,20 @@ BI_DIR 18 uses
|
|||
BUFTH 4 uses
|
||||
IBUF 39 uses
|
||||
OBUF 14 uses
|
||||
AND2 221 uses
|
||||
INV 203 uses
|
||||
AND2 225 uses
|
||||
INV 205 uses
|
||||
OR2 17 uses
|
||||
XOR2 4 uses
|
||||
|
||||
|
||||
@N:<a href="@N:FC100:@XP_HELP">FC100</a> : <!@TM:1514591011> | Timing Report not generated for this device, please use place and route tools for timing analysis.
|
||||
@N:<a href="@N:FC100:@XP_HELP">FC100</a> : <!@TM:1515698184> | Timing Report not generated for this device, please use place and route tools for timing analysis.
|
||||
I-2014.03LC
|
||||
Mapper successful!
|
||||
|
||||
At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 39MB peak: 105MB)
|
||||
|
||||
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
|
||||
# Sat Dec 30 00:43:31 2017
|
||||
# Thu Jan 11 20:16:24 2018
|
||||
|
||||
###########################################################]
|
||||
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@
|
|||
<li><a href="file:///C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\syntmp\BUS68030_srr.htm#mapperReport2" target="srrFrame" title="">Mapper Report</a>
|
||||
<ul rel="open" >
|
||||
<li><a href="file:///C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\syntmp\BUS68030_srr.htm#resourceUsage3" target="srrFrame" title="">Resource Utilization</a> </li></ul></li></ul></li>
|
||||
<li><a href="file:///C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\stdout.log" target="srrFrame" title="">Session Log (00:43 30-Dec)</a>
|
||||
<li><a href="file:///C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\stdout.log" target="srrFrame" title="">Session Log (20:16 11-Jan)</a>
|
||||
<ul ></ul></li> </ul>
|
||||
</li>
|
||||
</ul>
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
Synopsys, Inc.
|
||||
Version I-2014.03LC
|
||||
Project file C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\syntmp\run_option.xml
|
||||
Written on Sat Dec 30 00:43:29 2017
|
||||
Written on Thu Jan 11 20:16:20 2018
|
||||
|
||||
|
||||
-->
|
||||
|
|
|
|||
|
|
@ -36,9 +36,9 @@
|
|||
<td>17</td>
|
||||
<td>0</td>
|
||||
<td>-</td>
|
||||
<td>0m:00s</td>
|
||||
<td>0m:01s</td>
|
||||
<td>-</td>
|
||||
<td><font size="-1">30.12.2017</font><br/><font size="-2">00:43:29</font></td>
|
||||
<td><font size="-1">11.01.2018</font><br/><font size="-2">20:16:21</font></td>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
|
|
@ -49,12 +49,12 @@
|
|||
<td>0m:00s</td>
|
||||
<td>0m:00s</td>
|
||||
<td>105MB</td>
|
||||
<td><font size="-1">30.12.2017</font><br/><font size="-2">00:43:31</font></td>
|
||||
<td><font size="-1">11.01.2018</font><br/><font size="-2">20:16:24</font></td>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td class="optionTitle">Multi-srs Generator</td>
|
||||
<td>Complete</td><td class="empty"></td><td class="empty"></td><td class="empty"></td><td>0m:01s</td><td class="empty"></td><td class="empty"></td><td><font size="-1">30.12.2017</font><br/><font size="-2">00:43:31</font></td> </tbody>
|
||||
<td>Complete</td><td class="empty"></td><td class="empty"></td><td class="empty"></td><td>0m:01s</td><td class="empty"></td><td class="empty"></td><td><font size="-1">11.01.2018</font><br/><font size="-2">20:16:23</font></td> </tbody>
|
||||
</table>
|
||||
</td></tr></table></body>
|
||||
</html>
|
||||
|
|
@ -9,7 +9,7 @@
|
|||
#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\umr_capim.vhd":1401220368
|
||||
#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\arith.vhd":1401220122
|
||||
#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\unsigned.vhd":1401220122
|
||||
#CUR:"C:\\users\\matze\\amiga\\hardwarehacks\\68030-tk\\github\\logic\\68030-68000-bus.vhd":1514590994
|
||||
#CUR:"C:\\users\\matze\\amiga\\hardwarehacks\\68030-tk\\github\\logic\\68030-68000-bus.vhd":1515698165
|
||||
0 "C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd" vhdl
|
||||
|
||||
# Dependency Lists (Uses list)
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@
|
|||
#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\umr_capim.vhd":1401220368
|
||||
#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\arith.vhd":1401220122
|
||||
#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\unsigned.vhd":1401220122
|
||||
#CUR:"C:\\users\\matze\\amiga\\hardwarehacks\\68030-tk\\github\\logic\\68030-68000-bus.vhd":1514590994
|
||||
#CUR:"C:\\users\\matze\\amiga\\hardwarehacks\\68030-tk\\github\\logic\\68030-68000-bus.vhd":1515698165
|
||||
0 "C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd" vhdl
|
||||
|
||||
# Dependency Lists (Uses list)
|
||||
|
|
|
|||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Loading…
Reference in New Issue