From 1a7a72f37680e7ac8de48cb0f1c66e17726f83a9 Mon Sep 17 00:00:00 2001
From: MHeinrichs <matthias_heinrichs@yahoo.com>
Date: Tue, 12 Aug 2014 20:28:14 +0200
Subject: [PATCH] Update - minor changes

---
 Logic/68030-68000-bus.vhd                     |   32 +-
 Logic/68030_TK.tcl                            | 1464 +++++++++++++++++
 Logic/68030_tk.crf                            |    2 +-
 Logic/68030_tk.ipr                            |    3 +-
 Logic/BUS68030.prj                            |    2 +-
 Logic/bus68030.srf                            |   21 +-
 Logic/run_options.txt                         |    2 +-
 Logic/synlog/bus68030_fpga_mapper.srr         |   14 +-
 .../report/BUS68030_compiler_errors.txt       |    2 +-
 .../report/BUS68030_compiler_runstatus.xml    |    4 +-
 .../report/BUS68030_compiler_warnings.txt     |    3 +-
 .../report/BUS68030_fpga_mapper_runstatus.xml |    4 +-
 Logic/syntmp/run_option.xml                   |    2 +-
 Logic/synwork/BUS68030_compiler.fdep          |    2 +-
 Logic/synwork/BUS68030_compiler.fdeporig      |    2 +-
 Logic/synwork/BUS68030_compiler.srs           |  Bin 11308 -> 11200 bytes
 Logic/synwork/BUS68030_compiler.tlg           |    3 +-
 17 files changed, 1512 insertions(+), 50 deletions(-)

diff --git a/Logic/68030-68000-bus.vhd b/Logic/68030-68000-bus.vhd
index ea76b86..74ae74f 100644
--- a/Logic/68030-68000-bus.vhd
+++ b/Logic/68030-68000-bus.vhd
@@ -136,7 +136,7 @@ signal	CLK_000_P_SYNC: STD_LOGIC_VECTOR ( 12 downto 0 ) 	:= "0000000000000";
 signal	CLK_000_N_SYNC: STD_LOGIC_VECTOR ( 12 downto 0 ) 	:= "0000000000000";
 signal	CLK_000_PE: STD_LOGIC 		:= '0';
 signal	CLK_000_NE: STD_LOGIC 		:= '0';
-signal	CLK_000_E_ADVANCE: STD_LOGIC 	:= '0';
+signal	CLK_000_NE_D0: STD_LOGIC 		:= '0';
 signal	DTACK_D0: STD_LOGIC 		:= '1';
 
 begin
@@ -196,7 +196,7 @@ begin
 			CLK_000_N_SYNC	<= "0000000000000";
 			CLK_000_PE		<= '0';
 			CLK_000_NE		<= '0';
-			CLK_000_E_ADVANCE	<= '0';
+			CLK_000_NE_D0	<= '0';
 			AS_000_DMA		<= '1';
 			DS_000_DMA		<= '1';
 			SIZE_DMA		<= "11";
@@ -257,7 +257,7 @@ begin
 			-- since the clock is not symmetrically these values differ!
 			CLK_000_PE <= CLK_000_P_SYNC(9);
 			CLK_000_NE <= CLK_000_N_SYNC(11);
-			CLK_000_E_ADVANCE <= CLK_000_NE; 
+			CLK_000_NE_D0 <= CLK_000_NE;
 			DTACK_D0	<= DTACK;
 			VPA_D 		<= VPA;
 
@@ -265,7 +265,8 @@ begin
 			
 			-- e-clock is changed on the FALLING edge!
 
-			if(CLK_000_E_ADVANCE = '1' ) then
+			if(CLK_000_NE_D0 = '1' ) then
+			--if(CLK_000_D0='0' AND CLK_000_D1='1') then
 				case (cpu_est) is
 					when E1 => cpu_est <= E2 ; 
 					when E2 => cpu_est <= E3 ;
@@ -298,7 +299,7 @@ begin
 				BGACK_030_INT	<= '0';
 			elsif (	BGACK_000='1' 
 					AND CLK_000_PE='1'
-					--AND CLK_000_D1='0' and CLK_000_D0='1'
+					--AND CLK_000_D0='1' and CLK_000_D1='0'
 					) then -- BGACK_000 is high here!
 				BGACK_030_INT 	<= '1'; --hold this signal high until 7m clock goes high
 			end if;
@@ -319,8 +320,8 @@ begin
 
 		
 			--interrupt buffering to avoid ghost interrupts
-			--if(CLK_000_NE='1')then
-			if(CLK_000_D0='0' and CLK_000_D1='1')then
+			if(CLK_000_NE='1')then
+			--if(CLK_000_D0='0' and CLK_000_D1='1')then
 				IPL_030<=IPL;			
 			end if;
 		
@@ -346,9 +347,10 @@ begin
 
 			-- VMA generation
 			if(CLK_000_NE='1' AND VPA_D='0' AND cpu_est = E4)then --assert
+			--if(CLK_000_D0='0' AND CLK_000_D1='1' AND VPA_D='0' AND cpu_est = E4)then --assert
 				VMA_INT <= '0';
-			--elsif(CLK_000_PE='1' AND AS_000_INT='1' AND cpu_est=E1)then --deassert
-				
+			elsif(CLK_000_PE='1' AND cpu_est=E1)then --deassert
+				VMA_INT <= '1';										
 			end if;
 			
 			--uds/lds precalculation
@@ -374,7 +376,7 @@ begin
 
 			case (SM_AMIGA) is
 				when IDLE_P 	 => --68000:S0 wait for a falling edge
-					RW_000_INT		<= '1';							
+					RW_000_INT		<= '1';		
 					if( CLK_000_D0='0' and CLK_000_D1= '1' and AS_030_000_SYNC = '0')then						
 						if(nEXP_SPACE ='1')then -- if this a delayed expansion space detection, do not start an amiga cycle!
 							AMIGA_BUS_ENABLE_INT <= '0' ;--for now: allways on for amiga
@@ -407,8 +409,8 @@ begin
 				when SAMPLE_DTACK_P=> --68000:S4 wait for dtack or VMA
 					if(	CLK_000_NE='1' and --falling edge
 					--if(	CLK_000_D0 = '0' and CLK_000_D1='1' and --falling edge
-						((VPA = '1' AND DTACK='0') OR --DTACK end cycle
-						(VPA='0' AND cpu_est=E9 AND VMA_INT='0')) --VPA end cycle
+						((VPA_D = '1' AND DTACK_D0='0') OR --DTACK end cycle
+						(VPA_D='0' AND cpu_est=E9 AND VMA_INT='0')) --VPA end cycle
 						)then --go to s5
 						SM_AMIGA<=DATA_FETCH_N;
 					end if;
@@ -418,8 +420,8 @@ begin
 						SM_AMIGA<=DATA_FETCH_P;
 					end if;
 				when DATA_FETCH_P => --68000:S6: READ: here comes the data on the bus!
-					if( (CLK_000_N_SYNC( 5)='1' AND not (CLK_030 ='1' and CLK_OUT_PRE_D='0')) OR
-						(CLK_000_N_SYNC( 6)='1' )) then --go to s7 next 030-clock is not a falling edge: dsack is sampled at the falling edge
+					if( (CLK_000_N_SYNC( 4)='1' AND not (CLK_030 ='1' and CLK_OUT_PRE_D='0')) OR
+						(CLK_000_N_SYNC( 5)='1' )) then --go to s7 next 030-clock is not a falling edge: dsack is sampled at the falling edge
 						DSACK1_INT <='0'; 
 					end if;
 					--if( CLK_000_D3 ='1' AND CLK_000_D4 = '0' ) then --go to s7 next 030-clock is high: dsack is sampled at the falling edge
@@ -434,7 +436,7 @@ begin
 					if(CLK_000_PE='1')then --go to s0	
 					--if(CLK_000_D0='1')then --go to s0																	
 						SM_AMIGA<=IDLE_P;	
-						VMA_INT <= '1';					
+						RW_000_INT		<= '1';						
 					end if;
 			end case;
 
diff --git a/Logic/68030_TK.tcl b/Logic/68030_TK.tcl
index d94a8c0..68c3000 100644
--- a/Logic/68030_TK.tcl
+++ b/Logic/68030_TK.tcl
@@ -252863,3 +252863,1467 @@ if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 6
 
 ########## Tcl recorder end at 08/09/14 23:50:19 ###########
 
+
+########## Tcl recorder starts at 08/10/14 19:22:28 ##########
+
+# Commands to make the Process: 
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+
+########## Tcl recorder end at 08/10/14 19:22:28 ###########
+
+
+########## Tcl recorder starts at 08/10/14 19:22:29 ##########
+
+# Commands to make the Process: 
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+	puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+	puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+	close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires  -err automake.err -family"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\"  -err \"automake.err\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/impsrc\"  -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt  68030_tk.b2_"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3  @68030_tk.b2_"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft  68030_tk.d0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err  @68030_tk.d0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit  68030_tk.l0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030  @68030_tk.l0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+	puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+	puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" 
+"
+	close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+
+########## Tcl recorder end at 08/10/14 19:22:29 ###########
+
+
+########## Tcl recorder starts at 08/10/14 19:24:09 ##########
+
+# Commands to make the Process: 
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+
+########## Tcl recorder end at 08/10/14 19:24:09 ###########
+
+
+########## Tcl recorder starts at 08/10/14 19:24:09 ##########
+
+# Commands to make the Process: 
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+	puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+	puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+	close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires  -err automake.err -family"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\"  -err \"automake.err\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/impsrc\"  -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt  68030_tk.b2_"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3  @68030_tk.b2_"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft  68030_tk.d0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err  @68030_tk.d0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit  68030_tk.l0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030  @68030_tk.l0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+	puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+	puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" 
+"
+	close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+
+########## Tcl recorder end at 08/10/14 19:24:09 ###########
+
+
+########## Tcl recorder starts at 08/10/14 19:26:34 ##########
+
+# Commands to make the Process: 
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+
+########## Tcl recorder end at 08/10/14 19:26:34 ###########
+
+
+########## Tcl recorder starts at 08/10/14 19:26:34 ##########
+
+# Commands to make the Process: 
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+	puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+	puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+	close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires  -err automake.err -family"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\"  -err \"automake.err\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/impsrc\"  -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt  68030_tk.b2_"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3  @68030_tk.b2_"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft  68030_tk.d0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err  @68030_tk.d0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit  68030_tk.l0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030  @68030_tk.l0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+	puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+	puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" 
+"
+	close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+
+########## Tcl recorder end at 08/10/14 19:26:34 ###########
+
+
+########## Tcl recorder starts at 08/10/14 19:29:53 ##########
+
+# Commands to make the Process: 
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+
+########## Tcl recorder end at 08/10/14 19:29:53 ###########
+
+
+########## Tcl recorder starts at 08/10/14 19:29:53 ##########
+
+# Commands to make the Process: 
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+	puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+	puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+	close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires  -err automake.err -family"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\"  -err \"automake.err\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/impsrc\"  -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt  68030_tk.b2_"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3  @68030_tk.b2_"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft  68030_tk.d0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err  @68030_tk.d0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit  68030_tk.l0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030  @68030_tk.l0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+	puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+	puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" 
+"
+	close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+
+########## Tcl recorder end at 08/10/14 19:29:53 ###########
+
+
+########## Tcl recorder starts at 08/10/14 19:32:25 ##########
+
+# Commands to make the Process: 
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+
+########## Tcl recorder end at 08/10/14 19:32:25 ###########
+
+
+########## Tcl recorder starts at 08/10/14 19:32:26 ##########
+
+# Commands to make the Process: 
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+	puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+	puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+	close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires  -err automake.err -family"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\"  -err \"automake.err\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/impsrc\"  -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt  68030_tk.b2_"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3  @68030_tk.b2_"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft  68030_tk.d0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err  @68030_tk.d0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit  68030_tk.l0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030  @68030_tk.l0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+	puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+	puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" 
+"
+	close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+
+########## Tcl recorder end at 08/10/14 19:32:26 ###########
+
+
+########## Tcl recorder starts at 08/10/14 19:35:37 ##########
+
+# Commands to make the Process: 
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+
+########## Tcl recorder end at 08/10/14 19:35:37 ###########
+
+
+########## Tcl recorder starts at 08/10/14 19:35:37 ##########
+
+# Commands to make the Process: 
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+	puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+	puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+	close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires  -err automake.err -family"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\"  -err \"automake.err\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/impsrc\"  -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt  68030_tk.b2_"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3  @68030_tk.b2_"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft  68030_tk.d0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err  @68030_tk.d0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit  68030_tk.l0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030  @68030_tk.l0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+	puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+	puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" 
+"
+	close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+
+########## Tcl recorder end at 08/10/14 19:35:37 ###########
+
+
+########## Tcl recorder starts at 08/10/14 19:40:37 ##########
+
+# Commands to make the Process: 
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+
+########## Tcl recorder end at 08/10/14 19:40:37 ###########
+
+
+########## Tcl recorder starts at 08/10/14 19:40:37 ##########
+
+# Commands to make the Process: 
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+	puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+	puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+	close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires  -err automake.err -family"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\"  -err \"automake.err\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/impsrc\"  -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt  68030_tk.b2_"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3  @68030_tk.b2_"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft  68030_tk.d0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err  @68030_tk.d0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit  68030_tk.l0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030  @68030_tk.l0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+	puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+	puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" 
+"
+	close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+
+########## Tcl recorder end at 08/10/14 19:40:37 ###########
+
+
+########## Tcl recorder starts at 08/10/14 19:50:07 ##########
+
+# Commands to make the Process: 
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+
+########## Tcl recorder end at 08/10/14 19:50:07 ###########
+
+
+########## Tcl recorder starts at 08/10/14 19:50:07 ##########
+
+# Commands to make the Process: 
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+	puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+	puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+	close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires  -err automake.err -family"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\"  -err \"automake.err\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/impsrc\"  -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt  68030_tk.b2_"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3  @68030_tk.b2_"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft  68030_tk.d0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err  @68030_tk.d0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit  68030_tk.l0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030  @68030_tk.l0"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+	puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+	puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" 
+"
+	close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+	return
+} else {
+	vwait done
+	if [checkResult $done] {
+		return
+	}
+}
+
+########## Tcl recorder end at 08/10/14 19:50:07 ###########
+
diff --git a/Logic/68030_tk.crf b/Logic/68030_tk.crf
index 6c4256d..8795fc7 100644
--- a/Logic/68030_tk.crf
+++ b/Logic/68030_tk.crf
@@ -1,7 +1,7 @@
 // Signal Name Cross Reference File
 // ispLEVER Classic 1.7.00.05.28.13
 
-// Design '68030_tk' created Sat Aug 09 23:50:26 2014
+// Design '68030_tk' created Sun Aug 10 19:50:14 2014
 
 
 // LEGEND:  '>'  Functional Block Port Separator
diff --git a/Logic/68030_tk.ipr b/Logic/68030_tk.ipr
index cf94d26..d176a82 100644
--- a/Logic/68030_tk.ipr
+++ b/Logic/68030_tk.ipr
@@ -1,2 +1 @@
-<LATTICE_ENCRYPTED_BLIF>6322631O
-GG?K
\ No newline at end of file
+<LATTICE_ENCRYPTED_BLIF>4020=31, ZM5
\ No newline at end of file
diff --git a/Logic/BUS68030.prj b/Logic/BUS68030.prj
index 8571966..7684097 100644
--- a/Logic/BUS68030.prj
+++ b/Logic/BUS68030.prj
@@ -1,6 +1,6 @@
 #-- Lattice Semiconductor Corporation Ltd.
 #-- Synplify OEM project file c:/users/matze/documents/github/68030tk/logic\BUS68030.prj
-#-- Written on Sat Aug 09 23:50:19 2014
+#-- Written on Sun Aug 10 19:50:07 2014
 
 
 #device options
diff --git a/Logic/bus68030.srf b/Logic/bus68030.srf
index b2a0869..a0463a0 100644
--- a/Logic/bus68030.srf
+++ b/Logic/bus68030.srf
@@ -6,7 +6,7 @@
 #Implementation: logic
 
 $ Start of Compile
-#Sat Aug 09 23:50:20 2014
+#Sun Aug 10 19:50:07 2014
 
 Synopsys VHDL Compiler, version comp201209rcp1, Build 283R, built Mar 19 2013
 @N|Running in 64-bit mode
@@ -19,9 +19,8 @@ VHDL syntax check successful!
 File C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd changed - recompiling
 @N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral 
 Post processing for work.bus68030.behavioral
-@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":496:2:496:3|Pruning register CLK_OUT_PRE_33  
+@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":498:2:498:3|Pruning register CLK_OUT_PRE_33  
 @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":140:32:140:34|Pruning register CLK_REF(1 downto 0)  
-@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":112:29:112:31|Pruning register DTACK_D0  
 @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":133:34:133:36|Pruning register CLK_000_D4  
 @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":132:34:132:36|Pruning register CLK_000_D3  
 @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:34:131:36|Pruning register CLK_000_D2  
@@ -58,7 +57,7 @@ State machine has 11 reachable states with original encodings of:
    1111
 @END
 Process took 0h:00m:01s realtime, 0h:00m:01s cputime
-# Sat Aug 09 23:50:20 2014
+# Sun Aug 10 19:50:07 2014
 
 ###########################################################]
 Map & Optimize Report
@@ -95,25 +94,25 @@ Resource Usage Report
 
 Simple gate primitives:
 DFFRH           44 uses
-DFFSH           26 uses
+DFFSH           27 uses
 DFF             1 use
 BI_DIR          13 uses
 IBUF            30 uses
 OBUF            16 uses
 BUFTH           1 use
-AND2            201 uses
-INV             164 uses
-OR2             21 uses
-XOR2            2 uses
+AND2            193 uses
+INV             167 uses
+XOR2            3 uses
+OR2             23 uses
 
 
 @N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis.
 G-2012.09LC-SP1 
 Mapper successful!
 
-At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 31MB peak: 96MB)
+At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 31MB peak: 95MB)
 
 Process took 0h:00m:01s realtime, 0h:00m:01s cputime
-# Sat Aug 09 23:50:21 2014
+# Sun Aug 10 19:50:09 2014
 
 ###########################################################]
diff --git a/Logic/run_options.txt b/Logic/run_options.txt
index c9c6063..b60af0f 100644
--- a/Logic/run_options.txt
+++ b/Logic/run_options.txt
@@ -1,7 +1,7 @@
 #--  Synopsys, Inc.
 #--  Version G-2012.09LC-SP1 
 #--  Project file C:\users\matze\documents\github\68030tk\logic\run_options.txt
-#--  Written on Sat Aug 09 23:50:20 2014
+#--  Written on Sun Aug 10 19:50:07 2014
 
 
 #project files
diff --git a/Logic/synlog/bus68030_fpga_mapper.srr b/Logic/synlog/bus68030_fpga_mapper.srr
index 6f04a5b..6883930 100644
--- a/Logic/synlog/bus68030_fpga_mapper.srr
+++ b/Logic/synlog/bus68030_fpga_mapper.srr
@@ -30,25 +30,25 @@ Resource Usage Report
 
 Simple gate primitives:
 DFFRH           44 uses
-DFFSH           26 uses
+DFFSH           27 uses
 DFF             1 use
 BI_DIR          13 uses
 IBUF            30 uses
 OBUF            16 uses
 BUFTH           1 use
-AND2            201 uses
-INV             164 uses
-OR2             21 uses
-XOR2            2 uses
+AND2            193 uses
+INV             167 uses
+XOR2            3 uses
+OR2             23 uses
 
 
 @N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis.
 G-2012.09LC-SP1 
 Mapper successful!
 
-At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 31MB peak: 96MB)
+At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 31MB peak: 95MB)
 
 Process took 0h:00m:01s realtime, 0h:00m:01s cputime
-# Sat Aug 09 23:50:21 2014
+# Sun Aug 10 19:50:09 2014
 
 ###########################################################]
diff --git a/Logic/synlog/report/BUS68030_compiler_errors.txt b/Logic/synlog/report/BUS68030_compiler_errors.txt
index ec456cb..b6bd6d7 100644
--- a/Logic/synlog/report/BUS68030_compiler_errors.txt
+++ b/Logic/synlog/report/BUS68030_compiler_errors.txt
@@ -1,3 +1,3 @@
-@E: CG119 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":294:48:294:49|Expecting closing )
+@E: CD415 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":488:5:488:11|Expecting keyword if
 @E|Parse errors encountered - exiting
 
diff --git a/Logic/synlog/report/BUS68030_compiler_runstatus.xml b/Logic/synlog/report/BUS68030_compiler_runstatus.xml
index 8776831..ce4fab9 100644
--- a/Logic/synlog/report/BUS68030_compiler_runstatus.xml
+++ b/Logic/synlog/report/BUS68030_compiler_runstatus.xml
@@ -18,7 +18,7 @@ The file contains the job information from compiler to be displayed as part of t
   <report_link name="more"><data>C:\users\matze\documents\github\68030tk\logic\synlog\report\BUS68030_compiler_notes.txt</data></report_link>
   </info>
 			<info name="Warnings">
-  <data>11</data>
+  <data>10</data>
   <report_link name="more"><data>C:\users\matze\documents\github\68030tk\logic\synlog\report\BUS68030_compiler_warnings.txt</data></report_link>
   </info>
 			<info name="Errors">
@@ -35,7 +35,7 @@ The file contains the job information from compiler to be displayed as part of t
   <data>-</data>
   </info>
 			<info name="Date &amp;Time">
-  <data type="timestamp">1407621020</data>
+  <data type="timestamp">1407693007</data>
   </info>
 			</job_info>
 </job_run_status>
\ No newline at end of file
diff --git a/Logic/synlog/report/BUS68030_compiler_warnings.txt b/Logic/synlog/report/BUS68030_compiler_warnings.txt
index d0120f2..8243266 100644
--- a/Logic/synlog/report/BUS68030_compiler_warnings.txt
+++ b/Logic/synlog/report/BUS68030_compiler_warnings.txt
@@ -1,6 +1,5 @@
-@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":496:2:496:3|Pruning register CLK_OUT_PRE_33  
+@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":498:2:498:3|Pruning register CLK_OUT_PRE_33  
 @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":140:32:140:34|Pruning register CLK_REF(1 downto 0)  
-@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":112:29:112:31|Pruning register DTACK_D0  
 @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":133:34:133:36|Pruning register CLK_000_D4  
 @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":132:34:132:36|Pruning register CLK_000_D3  
 @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:34:131:36|Pruning register CLK_000_D2  
diff --git a/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml b/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml
index acb453a..bfcc74d 100644
--- a/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml
+++ b/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml
@@ -36,10 +36,10 @@ The file contains the job information from mapper to be displayed as part of the
 <data>0h:00m:00s</data>
 </info>
 <info name="Peak Memory">
-<data>96MB</data>
+<data>95MB</data>
 </info>
 <info name="Date &amp; Time">
-<data type="timestamp">1407621021</data>
+<data type="timestamp">1407693009</data>
 </info>
 </job_info>
 </job_run_status>
diff --git a/Logic/syntmp/run_option.xml b/Logic/syntmp/run_option.xml
index 316827c..2c5d6ba 100644
--- a/Logic/syntmp/run_option.xml
+++ b/Logic/syntmp/run_option.xml
@@ -3,7 +3,7 @@
   Synopsys, Inc.
   Version G-2012.09LC-SP1 
   Project file C:\users\matze\documents\github\68030tk\logic\syntmp\run_option.xml
-  Written on Sat Aug 09 23:50:20 2014
+  Written on Sun Aug 10 19:50:07 2014
 
 
 --> 
diff --git a/Logic/synwork/BUS68030_compiler.fdep b/Logic/synwork/BUS68030_compiler.fdep
index b842349..368718c 100644
--- a/Logic/synwork/BUS68030_compiler.fdep
+++ b/Logic/synwork/BUS68030_compiler.fdep
@@ -10,7 +10,7 @@
 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\umr_capim.vhd":1363694328
 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\arith.vhd":1363694328
 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\unsigned.vhd":1363694328
-#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1407621014
+#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1407693003
 0 "C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd" vhdl
 
 # Dependency Lists (Uses list)
diff --git a/Logic/synwork/BUS68030_compiler.fdeporig b/Logic/synwork/BUS68030_compiler.fdeporig
index f43c939..d463fb1 100644
--- a/Logic/synwork/BUS68030_compiler.fdeporig
+++ b/Logic/synwork/BUS68030_compiler.fdeporig
@@ -10,7 +10,7 @@
 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\umr_capim.vhd":1363694328
 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\arith.vhd":1363694328
 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\unsigned.vhd":1363694328
-#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1407621014
+#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1407693003
 0 "C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd" vhdl
 
 # Dependency Lists (Uses list)
diff --git a/Logic/synwork/BUS68030_compiler.srs b/Logic/synwork/BUS68030_compiler.srs
index 3a757a886e5b084c3b64e255cc635c0c28ae2ad8..6389a88be7b0f55569fc35634bf498de4abd37ef 100644
GIT binary patch
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diff --git a/Logic/synwork/BUS68030_compiler.tlg b/Logic/synwork/BUS68030_compiler.tlg
index fff237c..381d469 100644
--- a/Logic/synwork/BUS68030_compiler.tlg
+++ b/Logic/synwork/BUS68030_compiler.tlg
@@ -1,8 +1,7 @@
 @N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral 
 Post processing for work.bus68030.behavioral
-@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":496:2:496:3|Pruning register CLK_OUT_PRE_33  
+@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":498:2:498:3|Pruning register CLK_OUT_PRE_33  
 @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":140:32:140:34|Pruning register CLK_REF(1 downto 0)  
-@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":112:29:112:31|Pruning register DTACK_D0  
 @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":133:34:133:36|Pruning register CLK_000_D4  
 @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":132:34:132:36|Pruning register CLK_000_D3  
 @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:34:131:36|Pruning register CLK_000_D2