diff --git a/Logic/68030-68000-bus.vhd b/Logic/68030-68000-bus.vhd index 3e1fd0a..26b6c77 100644 --- a/Logic/68030-68000-bus.vhd +++ b/Logic/68030-68000-bus.vhd @@ -413,7 +413,7 @@ begin --output clock assignment CLK_DIV_OUT <= CLK_OUT_INT; - CLK_EXP <= '1' when SM_AMIGA_D /= SM_AMIGA ELSE '0'; + CLK_EXP <= CLK_OUT_INT; AVEC_EXP <= 'Z' when FPU_CS_INT ='1' else '0'; --dtack for dma diff --git a/Logic/68030_TK.tcl b/Logic/68030_TK.tcl index 34ea719..19ffb69 100644 --- a/Logic/68030_TK.tcl +++ b/Logic/68030_TK.tcl @@ -119137,3 +119137,186 @@ if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 6 ########## Tcl recorder end at 05/15/14 22:17:20 ########### + +########## Tcl recorder starts at 05/15/14 22:21:39 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/15/14 22:21:39 ########### + + +########## Tcl recorder starts at 05/15/14 22:21:47 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/15/14 22:21:47 ########### + diff --git a/Logic/68030_tk.bl2 b/Logic/68030_tk.bl2 index 3d5473a..219428e 100644 --- a/Logic/68030_tk.bl2 +++ b/Logic/68030_tk.bl2 @@ -1,91 +1,85 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Thu May 15 22:17:27 2014 +#$ DATE Thu May 15 22:21:53 2014 #$ MODULE 68030_tk -#$ PINS 74 FC_0_ SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 DS_030 \ -# UDS_000 LDS_000 CPU_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 \ -# CLK_OSZI CLK_DIV_OUT SIZE_0_ CLK_EXP A_30_ FPU_CS A_29_ DTACK A_28_ AVEC A_27_ AVEC_EXP \ -# A_26_ E A_25_ VPA A_24_ VMA A_23_ RST A_22_ RESET A_21_ RW A_20_ AMIGA_BUS_ENABLE A_19_ \ -# AMIGA_BUS_DATA_DIR A_18_ AMIGA_BUS_ENABLE_LOW A_17_ CIIN A_16_ A_15_ A_14_ A_13_ A_12_ \ -# A_11_ A_10_ A_9_ A_8_ A_7_ A_6_ A_5_ A_4_ A_3_ A_2_ A_1_ A_0_ IPL_030_1_ IPL_030_0_ IPL_1_ \ -# IPL_0_ DSACK_0_ -#$ NODES 378 a_c_30__n a_c_31__n CPU_SPACE_c inst_BGACK_030_INTreg BG_030_c \ -# inst_CLK_OUT_INTreg inst_FPU_CS_INTreg BG_000DFFSHreg cpu_est_3_reg \ -# inst_VMA_INTreg gnd_n_n BGACK_000_c cpu_est_0_ cpu_est_1_ CLK_030_c cpu_est_d_0_ \ -# cpu_est_d_3_ CLK_000_c inst_AS_000_INTreg inst_AS_030_000_SYNC CLK_OSZI_c \ -# inst_DTACK_SYNC inst_VPA_D inst_VPA_SYNC inst_CLK_000_D inst_CLK_000_DD \ -# IPL_030DFFSH_0_reg inst_CLK_OUT_PRE vcc_n_n IPL_030DFFSH_1_reg cpu_est_d_1_ \ -# cpu_est_d_2_ IPL_030DFFSH_2_reg cpu_est_2_ CLK_CNT_0_ ipl_c_0__n SM_AMIGA_6_ \ -# SM_AMIGA_7_ ipl_c_1__n inst_UDS_000_INTreg inst_LDS_000_INTreg ipl_c_2__n \ -# inst_RISING_CLK_AMIGA state_machine_un57_clk_000_d_n dsack_c_1__n SM_AMIGA_1_ \ -# DSACK_INT_1_ DTACK_c inst_DTACK_DMA SM_AMIGA_4_ SM_AMIGA_3_ \ -# state_machine_un13_as_000_int_n SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_ SM_AMIGA_D_0_ \ -# RST_c SM_AMIGA_D_1_ SM_AMIGA_D_2_ RESETDFFreg clk_exp RW_c fc_c_0__n fc_c_1__n \ -# state_machine_un57_clk_000_d_0_n N_161_i a_c_i_0__n \ -# state_machine_uds_000_int_8_0_n state_machine_lds_000_int_8_0_n N_113_i \ -# cpu_est_0_0_ sm_amiga_ns_0_2__n N_118_i N_117_i sm_amiga_ns_0_5__n N_123_i \ -# CLK_OUT_PRE_0 N_119_i N_120_i sm_amiga_ns_0_7__n CLK_OUT_PRE_i N_106 N_102_0 N_107 \ -# size_c_i_1__n clk_un3_clk_000_dd_n state_machine_un31_clk_000_d_i_n \ -# clk_cpu_est_11_1__n RISING_CLK_AMIGA_i clk_cpu_est_11_3__n \ -# state_machine_un4_bgack_000_0_n G_98 BG_030_c_i G_99 state_machine_un1_clk_030_0_n \ -# G_100 state_machine_un17_clk_030_0_n N_161 un1_as_030_2_0 N_114 \ -# state_machine_as_030_000_sync_3_2_n N_109 N_109_i N_111 un1_bg_030_0 N_112 N_111_i \ -# N_122 N_122_i N_115 N_101 N_147_i N_116 clk_cpu_est_11_0_3__n N_124 N_145_i N_139 \ -# N_146_i N_137 N_142_i N_140 clk_cpu_est_11_0_1__n N_141 N_140_i N_136 N_139_i N_142 \ -# N_141_i N_145 N_138_i N_138 N_137_i N_146 N_136_i N_143 N_143_i N_144 N_144_i \ -# UDS_000_INT_0_sqmuxa N_134_i UDS_000_INT_0_sqmuxa_1 N_101_0 N_147 N_115_i N_147_1 \ -# N_116_i state_machine_un13_clk_000_d_1_n N_186 N_124_i N_189 \ -# state_machine_un42_clk_030_n N_112_i un1_bg_030 sm_amiga_ns_0_0__n \ -# state_machine_as_030_000_sync_3_n N_86_i_1 un1_as_030_2 un1_bg_030_0_1 \ -# state_machine_un17_clk_030_n un1_bg_030_0_2 state_machine_un1_clk_030_n \ -# state_machine_as_030_000_sync_3_2_1_n state_machine_un4_bgack_000_n \ -# state_machine_un31_clk_000_d_i_1_n N_108 N_186_1 state_machine_un31_clk_000_d_n \ -# N_186_2 state_machine_un13_clk_000_d_n N_186_3 state_machine_un13_clk_000_d_4_n \ -# N_186_4 state_machine_un8_clk_000_d_n N_186_5 DTACK_SYNC_1_sqmuxa N_186_6 \ -# VPA_SYNC_1_sqmuxa_1_0 N_189_1 VPA_SYNC_1_sqmuxa N_189_2 N_123 \ -# clk_cpu_est_11_0_1_1__n N_118 clk_cpu_est_11_0_2_1__n N_110 \ -# clk_cpu_est_11_0_1_3__n N_102 N_143_1 N_120 N_144_1 N_119 N_106_1 N_117 N_106_2 N_113 \ -# N_107_1 state_machine_lds_000_int_8_n UDS_000_INT_0_sqmuxa_1_1 \ -# state_machine_uds_000_int_8_n UDS_000_INT_0_sqmuxa_1_2 DTACK_SYNC_1_sqmuxa_1 \ -# UDS_000_INT_0_sqmuxa_1_3 un2_clk_030_1 UDS_000_INT_0_sqmuxa_1_0 \ -# VPA_SYNC_1_sqmuxa_1 UDS_000_INT_0_sqmuxa_2 AS_000_INT_1_sqmuxa \ -# state_machine_un42_clk_030_1_n VMA_INT_1_sqmuxa state_machine_un42_clk_030_2_n \ -# DSACK_INT_1_sqmuxa state_machine_un42_clk_030_3_n RW_i \ -# state_machine_un42_clk_030_4_n clk_exp_i state_machine_un42_clk_030_5_n \ -# DTACK_SYNC_1_sqmuxa_i state_machine_un13_clk_000_d_1_0_n N_114_i \ -# state_machine_un13_clk_000_d_4_1_n VPA_SYNC_1_sqmuxa_i \ -# state_machine_un8_clk_000_d_1_n N_110_i state_machine_un8_clk_000_d_2_n N_108_i \ -# state_machine_un8_clk_000_d_3_n cpu_est_d_i_3__n state_machine_un8_clk_000_d_4_n \ -# cpu_est_d_i_0__n DTACK_SYNC_1_sqmuxa_1_0 CLK_000_D_i VPA_SYNC_1_sqmuxa_1_1 \ -# AS_030_i VPA_SYNC_1_sqmuxa_2 AS_000_INT_i VPA_SYNC_1_sqmuxa_3 dsack_i_1__n \ -# VPA_SYNC_1_sqmuxa_4 state_machine_un13_clk_000_d_i_n N_108_1 \ -# state_machine_un8_clk_000_d_i_n N_118_1 state_machine_un13_clk_000_d_1_i_n \ -# N_110_1 sm_amiga_i_1__n clk_exp_1 sm_amiga_i_2__n sm_amiga_d_0_2__un3_n \ -# sm_amiga_i_0__n sm_amiga_d_0_2__un1_n sm_amiga_i_3__n sm_amiga_d_0_2__un0_n \ -# VPA_D_i dsack_int_0_1__un3_n VMA_INT_i dsack_int_0_1__un1_n DTACK_i \ -# dsack_int_0_1__un0_n cpu_est_i_3__n vma_int_0_un3_n a_i_18__n vma_int_0_un1_n \ -# a_i_16__n vma_int_0_un0_n a_i_19__n vpa_sync_0_un3_n CLK_030_i vpa_sync_0_un1_n \ -# state_machine_un42_clk_030_i_n vpa_sync_0_un0_n DS_030_i as_000_int_0_un3_n \ -# cpu_est_i_1__n as_000_int_0_un1_n AS_030_000_SYNC_i as_000_int_0_un0_n \ -# cpu_est_i_0__n dtack_sync_0_un3_n sm_amiga_i_4__n dtack_sync_0_un1_n \ -# sm_amiga_i_6__n dtack_sync_0_un0_n cpu_est_i_2__n lds_000_int_0_un3_n \ -# UDS_000_INT_0_sqmuxa_1_i lds_000_int_0_un1_n UDS_000_INT_0_sqmuxa_i \ -# lds_000_int_0_un0_n sm_amiga_i_5__n uds_000_int_0_un3_n CLK_000_DD_i \ -# uds_000_int_0_un1_n sm_amiga_i_7__n uds_000_int_0_un0_n a_i_30__n bg_000_0_un3_n \ -# a_i_31__n bg_000_0_un1_n a_i_28__n bg_000_0_un0_n a_i_29__n as_030_000_sync_0_un3_n \ -# a_i_26__n as_030_000_sync_0_un1_n a_i_27__n as_030_000_sync_0_un0_n a_i_24__n \ -# fpu_cs_int_0_un3_n a_i_25__n fpu_cs_int_0_un1_n fpu_cs_int_0_un0_n \ -# ipl_030_0_2__un3_n RST_i ipl_030_0_2__un1_n N_107_i ipl_030_0_2__un0_n N_106_i \ -# ipl_030_0_1__un3_n FPU_CS_INT_i ipl_030_0_1__un1_n CPU_SPACE_i ipl_030_0_1__un0_n \ -# BGACK_030_INT_i ipl_030_0_0__un3_n AS_030_c ipl_030_0_0__un1_n ipl_030_0_0__un0_n \ -# bgack_030_int_0_un3_n DS_030_c bgack_030_int_0_un1_n bgack_030_int_0_un0_n \ -# sm_amiga_d_0_0__un3_n sm_amiga_d_0_0__un1_n size_c_0__n sm_amiga_d_0_0__un0_n \ -# sm_amiga_d_0_1__un3_n size_c_1__n sm_amiga_d_0_1__un1_n sm_amiga_d_0_1__un0_n \ -# a_c_0__n cpu_est_0_1__un3_n cpu_est_0_1__un1_n cpu_est_0_1__un0_n \ -# cpu_est_0_2__un3_n cpu_est_0_2__un1_n cpu_est_0_2__un0_n cpu_est_0_3__un3_n \ -# cpu_est_0_3__un1_n cpu_est_0_3__un0_n a_15__n a_14__n a_13__n a_12__n a_c_16__n \ -# a_11__n a_c_17__n a_10__n a_c_18__n a_9__n a_c_19__n a_8__n a_c_20__n a_7__n a_c_21__n \ -# a_6__n a_c_22__n a_5__n a_c_23__n a_4__n a_c_24__n a_3__n a_c_25__n a_2__n a_c_26__n \ -# a_1__n a_c_27__n a_c_28__n a_c_29__n +#$ PINS 74 A_28_ A_27_ SIZE_1_ A_26_ A_25_ A_31_ A_24_ A_23_ IPL_030_2_ A_22_ A_21_ \ +# IPL_2_ A_20_ A_19_ DSACK_1_ A_18_ A_17_ FC_1_ A_16_ AS_030 A_15_ AS_000 A_14_ DS_030 A_13_ \ +# UDS_000 A_12_ LDS_000 A_11_ CPU_SPACE A_10_ BERR A_9_ BG_030 A_8_ BG_000 A_7_ BGACK_030 \ +# A_6_ BGACK_000 A_5_ CLK_030 A_4_ CLK_000 A_3_ CLK_OSZI A_2_ CLK_DIV_OUT A_1_ CLK_EXP A_0_ \ +# FPU_CS IPL_030_1_ DTACK IPL_030_0_ AVEC IPL_1_ AVEC_EXP IPL_0_ E DSACK_0_ VPA FC_0_ VMA RST \ +# RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ \ +# A_29_ +#$ NODES 351 CLK_OSZI_c CLK_OUT_INTreg IPL_030DFFSH_0_reg inst_BGACK_030_INTreg \ +# inst_FPU_CS_INTreg IPL_030DFFSH_1_reg cpu_est_3_reg inst_VMA_INTreg \ +# IPL_030DFFSH_2_reg gnd_n_n cpu_est_0_ ipl_c_0__n cpu_est_1_ cpu_est_d_0_ ipl_c_1__n \ +# cpu_est_d_3_ inst_AS_000_INTreg ipl_c_2__n inst_AS_030_000_SYNC inst_DTACK_SYNC \ +# inst_VPA_D dsack_c_1__n inst_VPA_SYNC inst_CLK_000_D DTACK_c inst_CLK_000_DD \ +# inst_CLK_OUT_PRE vcc_n_n cpu_est_d_1_ cpu_est_d_2_ cpu_est_2_ CLK_CNT_0_ SM_AMIGA_6_ \ +# RST_c SM_AMIGA_7_ inst_UDS_000_INTreg RESETDFFreg inst_LDS_000_INTreg RW_c \ +# inst_RISING_CLK_AMIGA state_machine_un57_clk_000_d_n fc_c_0__n SM_AMIGA_1_ \ +# DSACK_INT_1_ fc_c_1__n inst_DTACK_DMA SM_AMIGA_4_ SM_AMIGA_3_ \ +# state_machine_un13_as_000_int_n SM_AMIGA_5_ SM_AMIGA_2_ N_145_i SM_AMIGA_0_ \ +# a_c_i_0__n state_machine_uds_000_int_8_0_n state_machine_lds_000_int_8_0_n N_99_i \ +# N_112_i N_100_i N_101_i sm_amiga_ns_0_2__n N_103_i N_110_i sm_amiga_ns_0_7__n \ +# cpu_est_0_0_ N_91_0 N_92_0 N_131_i N_132_i N_122_i CLK_OUT_PRE_0 N_124_i N_125_i \ +# N_126_i N_129_i N_98 N_127_i N_97 N_128_i N_104 N_130_i N_93 clk_cpu_est_11_0_1__n N_105 \ +# N_134_i N_106 N_133_i N_108 N_135_i N_94 clk_cpu_est_11_0_3__n N_109 size_c_i_1__n \ +# N_107 state_machine_un31_clk_000_d_i_n N_135_1 \ +# state_machine_as_030_000_sync_3_0_n VPA_SYNC_1_sqmuxa_1_0 un1_as_030_2_0 N_167 \ +# state_machine_un17_clk_030_0_n N_170 state_machine_un57_clk_000_d_0_n \ +# state_machine_un42_clk_030_n RISING_CLK_AMIGA_i DTACK_SYNC_1_sqmuxa \ +# state_machine_un4_bgack_000_0_n VPA_SYNC_1_sqmuxa BG_030_c_i un1_bg_030 \ +# state_machine_un1_clk_030_0_n DTACK_SYNC_1_sqmuxa_1 N_97_i DSACK_INT_1_sqmuxa \ +# un1_bg_030_0 state_machine_un1_clk_030_n CLK_OUT_PRE_i \ +# state_machine_un4_bgack_000_n N_94_0 un1_as_030_2 N_93_0 \ +# state_machine_un17_clk_030_n N_108_i N_102 N_109_i AS_000_INT_1_sqmuxa \ +# VPA_SYNC_1_sqmuxa_1 N_106_i state_machine_as_030_000_sync_3_n N_107_i \ +# clk_un3_clk_000_dd_n sm_amiga_ns_0_5__n state_machine_un31_clk_000_d_n N_104_i \ +# UDS_000_INT_0_sqmuxa N_105_i state_machine_un13_clk_000_d_n \ +# state_machine_un13_clk_000_d_4_n un1_bg_030_0_1 state_machine_un13_clk_000_d_1_n \ +# un1_bg_030_0_2 state_machine_un8_clk_000_d_n state_machine_un31_clk_000_d_i_1_n \ +# UDS_000_INT_0_sqmuxa_1 clk_cpu_est_11_0_1_3__n N_132 clk_cpu_est_11_0_1_1__n N_131 \ +# clk_cpu_est_11_0_2_1__n N_124 N_167_1 clk_cpu_est_11_3__n N_167_2 N_135 N_167_3 N_133 \ +# N_167_4 N_134 N_167_5 clk_cpu_est_11_1__n N_167_6 N_130 N_170_1 N_128 N_170_2 N_145 \ +# N_107_1 N_127 state_machine_un42_clk_030_1_n N_129 state_machine_un42_clk_030_2_n \ +# N_126 state_machine_un42_clk_030_3_n N_125 state_machine_un42_clk_030_4_n N_92 \ +# state_machine_un42_clk_030_5_n N_91 DTACK_SYNC_1_sqmuxa_1_0 N_110 \ +# VPA_SYNC_1_sqmuxa_1_1 N_103 VPA_SYNC_1_sqmuxa_2 N_101 VPA_SYNC_1_sqmuxa_3 N_100 \ +# VPA_SYNC_1_sqmuxa_4 N_112 N_98_1 N_99 state_machine_as_030_000_sync_3_0_1_n \ +# state_machine_lds_000_int_8_n UDS_000_INT_0_sqmuxa_1_0 \ +# state_machine_uds_000_int_8_n UDS_000_INT_0_sqmuxa_2 un2_clk_030_1 \ +# state_machine_un13_clk_000_d_1_0_n VMA_INT_1_sqmuxa \ +# state_machine_un13_clk_000_d_4_1_n RW_i state_machine_un8_clk_000_d_1_n \ +# cpu_est_d_i_3__n state_machine_un8_clk_000_d_2_n cpu_est_d_i_0__n \ +# state_machine_un8_clk_000_d_3_n CLK_000_D_i state_machine_un8_clk_000_d_4_n \ +# AS_000_INT_i UDS_000_INT_0_sqmuxa_1_1 dsack_i_1__n UDS_000_INT_0_sqmuxa_1_2 \ +# state_machine_un13_clk_000_d_i_n UDS_000_INT_0_sqmuxa_1_3 \ +# state_machine_un8_clk_000_d_i_n N_132_1 AS_030_i N_131_1 sm_amiga_i_6__n \ +# vma_int_0_un3_n sm_amiga_i_7__n vma_int_0_un1_n sm_amiga_i_5__n vma_int_0_un0_n \ +# sm_amiga_i_4__n lds_000_int_0_un3_n state_machine_un13_clk_000_d_1_i_n \ +# lds_000_int_0_un1_n CLK_000_DD_i lds_000_int_0_un0_n AS_030_000_SYNC_i \ +# uds_000_int_0_un3_n cpu_est_i_0__n uds_000_int_0_un1_n cpu_est_i_2__n \ +# uds_000_int_0_un0_n cpu_est_i_3__n cpu_est_0_3__un3_n cpu_est_i_1__n \ +# cpu_est_0_3__un1_n UDS_000_INT_0_sqmuxa_1_i cpu_est_0_3__un0_n \ +# UDS_000_INT_0_sqmuxa_i cpu_est_0_2__un3_n DS_030_i cpu_est_0_2__un1_n VPA_D_i \ +# cpu_est_0_2__un0_n state_machine_un42_clk_030_i_n cpu_est_0_1__un3_n \ +# VPA_SYNC_1_sqmuxa_i cpu_est_0_1__un1_n N_102_i cpu_est_0_1__un0_n \ +# DTACK_SYNC_1_sqmuxa_i fpu_cs_int_0_un3_n N_98_i fpu_cs_int_0_un1_n a_i_18__n \ +# fpu_cs_int_0_un0_n a_i_16__n as_000_int_0_un3_n a_i_19__n as_000_int_0_un1_n \ +# CLK_030_i as_000_int_0_un0_n VMA_INT_i vpa_sync_0_un3_n DTACK_i vpa_sync_0_un1_n \ +# sm_amiga_i_3__n vpa_sync_0_un0_n sm_amiga_i_1__n as_030_000_sync_0_un3_n \ +# sm_amiga_i_2__n as_030_000_sync_0_un1_n a_i_30__n as_030_000_sync_0_un0_n \ +# a_i_31__n ipl_030_0_2__un3_n a_i_28__n ipl_030_0_2__un1_n a_i_29__n \ +# ipl_030_0_2__un0_n a_i_26__n ipl_030_0_1__un3_n a_i_27__n ipl_030_0_1__un1_n \ +# a_i_24__n ipl_030_0_1__un0_n a_i_25__n ipl_030_0_0__un3_n ipl_030_0_0__un1_n \ +# ipl_030_0_0__un0_n RST_i bgack_030_int_0_un3_n FPU_CS_INT_i bgack_030_int_0_un1_n \ +# CPU_SPACE_i bgack_030_int_0_un0_n BGACK_030_INT_i dsack_int_0_1__un3_n AS_030_c \ +# dsack_int_0_1__un1_n dsack_int_0_1__un0_n bg_000_0_un3_n DS_030_c bg_000_0_un1_n \ +# bg_000_0_un0_n dtack_sync_0_un3_n dtack_sync_0_un1_n size_c_0__n \ +# dtack_sync_0_un0_n a_15__n size_c_1__n a_14__n a_c_0__n a_13__n a_12__n a_11__n \ +# a_10__n a_9__n a_8__n a_7__n a_6__n a_c_16__n a_5__n a_c_17__n a_4__n a_c_18__n a_3__n \ +# a_c_19__n a_2__n a_c_20__n a_1__n a_c_21__n a_c_22__n a_c_23__n a_c_24__n a_c_25__n \ +# a_c_26__n a_c_27__n a_c_28__n a_c_29__n a_c_30__n a_c_31__n CPU_SPACE_c BG_030_c \ +# BG_000DFFSHreg BGACK_000_c CLK_030_c CLK_000_c .model bus68030 .inputs SIZE_1_.BLIF A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF AS_030.BLIF DS_030.BLIF \ CPU_SPACE.BLIF BG_030.BLIF BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF \ @@ -95,140 +89,127 @@ A_21_.BLIF A_20_.BLIF A_19_.BLIF A_18_.BLIF A_17_.BLIF A_16_.BLIF A_15_.BLIF \ A_14_.BLIF A_13_.BLIF A_12_.BLIF A_11_.BLIF A_10_.BLIF A_9_.BLIF A_8_.BLIF \ A_7_.BLIF A_6_.BLIF A_5_.BLIF A_4_.BLIF A_3_.BLIF A_2_.BLIF A_1_.BLIF \ A_0_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF DSACK_1_.BLIF DTACK.BLIF \ -DSACK_0_.BLIF a_c_30__n.BLIF a_c_31__n.BLIF CPU_SPACE_c.BLIF \ -inst_BGACK_030_INTreg.BLIF BG_030_c.BLIF inst_CLK_OUT_INTreg.BLIF \ -inst_FPU_CS_INTreg.BLIF BG_000DFFSHreg.BLIF cpu_est_3_reg.BLIF \ -inst_VMA_INTreg.BLIF gnd_n_n.BLIF BGACK_000_c.BLIF cpu_est_0_.BLIF \ -cpu_est_1_.BLIF CLK_030_c.BLIF cpu_est_d_0_.BLIF cpu_est_d_3_.BLIF \ -CLK_000_c.BLIF inst_AS_000_INTreg.BLIF inst_AS_030_000_SYNC.BLIF \ -CLK_OSZI_c.BLIF inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF inst_VPA_SYNC.BLIF \ -inst_CLK_000_D.BLIF inst_CLK_000_DD.BLIF IPL_030DFFSH_0_reg.BLIF \ -inst_CLK_OUT_PRE.BLIF vcc_n_n.BLIF IPL_030DFFSH_1_reg.BLIF cpu_est_d_1_.BLIF \ -cpu_est_d_2_.BLIF IPL_030DFFSH_2_reg.BLIF cpu_est_2_.BLIF CLK_CNT_0_.BLIF \ -ipl_c_0__n.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_7_.BLIF ipl_c_1__n.BLIF \ -inst_UDS_000_INTreg.BLIF inst_LDS_000_INTreg.BLIF ipl_c_2__n.BLIF \ -inst_RISING_CLK_AMIGA.BLIF state_machine_un57_clk_000_d_n.BLIF \ -dsack_c_1__n.BLIF SM_AMIGA_1_.BLIF DSACK_INT_1_.BLIF DTACK_c.BLIF \ -inst_DTACK_DMA.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_3_.BLIF \ -state_machine_un13_as_000_int_n.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_2_.BLIF \ -SM_AMIGA_0_.BLIF SM_AMIGA_D_0_.BLIF RST_c.BLIF SM_AMIGA_D_1_.BLIF \ -SM_AMIGA_D_2_.BLIF RESETDFFreg.BLIF clk_exp.BLIF RW_c.BLIF fc_c_0__n.BLIF \ -fc_c_1__n.BLIF state_machine_un57_clk_000_d_0_n.BLIF N_161_i.BLIF \ -a_c_i_0__n.BLIF state_machine_uds_000_int_8_0_n.BLIF \ -state_machine_lds_000_int_8_0_n.BLIF N_113_i.BLIF cpu_est_0_0_.BLIF \ -sm_amiga_ns_0_2__n.BLIF N_118_i.BLIF N_117_i.BLIF sm_amiga_ns_0_5__n.BLIF \ -N_123_i.BLIF CLK_OUT_PRE_0.BLIF N_119_i.BLIF N_120_i.BLIF \ -sm_amiga_ns_0_7__n.BLIF CLK_OUT_PRE_i.BLIF N_106.BLIF N_102_0.BLIF N_107.BLIF \ -size_c_i_1__n.BLIF clk_un3_clk_000_dd_n.BLIF \ -state_machine_un31_clk_000_d_i_n.BLIF clk_cpu_est_11_1__n.BLIF \ -RISING_CLK_AMIGA_i.BLIF clk_cpu_est_11_3__n.BLIF \ -state_machine_un4_bgack_000_0_n.BLIF G_98.BLIF BG_030_c_i.BLIF G_99.BLIF \ -state_machine_un1_clk_030_0_n.BLIF G_100.BLIF \ -state_machine_un17_clk_030_0_n.BLIF N_161.BLIF un1_as_030_2_0.BLIF N_114.BLIF \ -state_machine_as_030_000_sync_3_2_n.BLIF N_109.BLIF N_109_i.BLIF N_111.BLIF \ -un1_bg_030_0.BLIF N_112.BLIF N_111_i.BLIF N_122.BLIF N_122_i.BLIF N_115.BLIF \ -N_101.BLIF N_147_i.BLIF N_116.BLIF clk_cpu_est_11_0_3__n.BLIF N_124.BLIF \ -N_145_i.BLIF N_139.BLIF N_146_i.BLIF N_137.BLIF N_142_i.BLIF N_140.BLIF \ -clk_cpu_est_11_0_1__n.BLIF N_141.BLIF N_140_i.BLIF N_136.BLIF N_139_i.BLIF \ -N_142.BLIF N_141_i.BLIF N_145.BLIF N_138_i.BLIF N_138.BLIF N_137_i.BLIF \ -N_146.BLIF N_136_i.BLIF N_143.BLIF N_143_i.BLIF N_144.BLIF N_144_i.BLIF \ -UDS_000_INT_0_sqmuxa.BLIF N_134_i.BLIF UDS_000_INT_0_sqmuxa_1.BLIF \ -N_101_0.BLIF N_147.BLIF N_115_i.BLIF N_147_1.BLIF N_116_i.BLIF \ -state_machine_un13_clk_000_d_1_n.BLIF N_186.BLIF N_124_i.BLIF N_189.BLIF \ -state_machine_un42_clk_030_n.BLIF N_112_i.BLIF un1_bg_030.BLIF \ -sm_amiga_ns_0_0__n.BLIF state_machine_as_030_000_sync_3_n.BLIF N_86_i_1.BLIF \ -un1_as_030_2.BLIF un1_bg_030_0_1.BLIF state_machine_un17_clk_030_n.BLIF \ -un1_bg_030_0_2.BLIF state_machine_un1_clk_030_n.BLIF \ -state_machine_as_030_000_sync_3_2_1_n.BLIF state_machine_un4_bgack_000_n.BLIF \ -state_machine_un31_clk_000_d_i_1_n.BLIF N_108.BLIF N_186_1.BLIF \ -state_machine_un31_clk_000_d_n.BLIF N_186_2.BLIF \ -state_machine_un13_clk_000_d_n.BLIF N_186_3.BLIF \ -state_machine_un13_clk_000_d_4_n.BLIF N_186_4.BLIF \ -state_machine_un8_clk_000_d_n.BLIF N_186_5.BLIF DTACK_SYNC_1_sqmuxa.BLIF \ -N_186_6.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF N_189_1.BLIF VPA_SYNC_1_sqmuxa.BLIF \ -N_189_2.BLIF N_123.BLIF clk_cpu_est_11_0_1_1__n.BLIF N_118.BLIF \ -clk_cpu_est_11_0_2_1__n.BLIF N_110.BLIF clk_cpu_est_11_0_1_3__n.BLIF \ -N_102.BLIF N_143_1.BLIF N_120.BLIF N_144_1.BLIF N_119.BLIF N_106_1.BLIF \ -N_117.BLIF N_106_2.BLIF N_113.BLIF N_107_1.BLIF \ -state_machine_lds_000_int_8_n.BLIF UDS_000_INT_0_sqmuxa_1_1.BLIF \ -state_machine_uds_000_int_8_n.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF \ -DTACK_SYNC_1_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_1_3.BLIF un2_clk_030_1.BLIF \ -UDS_000_INT_0_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_1.BLIF \ -UDS_000_INT_0_sqmuxa_2.BLIF AS_000_INT_1_sqmuxa.BLIF \ -state_machine_un42_clk_030_1_n.BLIF VMA_INT_1_sqmuxa.BLIF \ -state_machine_un42_clk_030_2_n.BLIF DSACK_INT_1_sqmuxa.BLIF \ -state_machine_un42_clk_030_3_n.BLIF RW_i.BLIF \ -state_machine_un42_clk_030_4_n.BLIF clk_exp_i.BLIF \ -state_machine_un42_clk_030_5_n.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF \ -state_machine_un13_clk_000_d_1_0_n.BLIF N_114_i.BLIF \ -state_machine_un13_clk_000_d_4_1_n.BLIF VPA_SYNC_1_sqmuxa_i.BLIF \ -state_machine_un8_clk_000_d_1_n.BLIF N_110_i.BLIF \ -state_machine_un8_clk_000_d_2_n.BLIF N_108_i.BLIF \ -state_machine_un8_clk_000_d_3_n.BLIF cpu_est_d_i_3__n.BLIF \ -state_machine_un8_clk_000_d_4_n.BLIF cpu_est_d_i_0__n.BLIF \ -DTACK_SYNC_1_sqmuxa_1_0.BLIF CLK_000_D_i.BLIF VPA_SYNC_1_sqmuxa_1_1.BLIF \ -AS_030_i.BLIF VPA_SYNC_1_sqmuxa_2.BLIF AS_000_INT_i.BLIF \ -VPA_SYNC_1_sqmuxa_3.BLIF dsack_i_1__n.BLIF VPA_SYNC_1_sqmuxa_4.BLIF \ -state_machine_un13_clk_000_d_i_n.BLIF N_108_1.BLIF \ -state_machine_un8_clk_000_d_i_n.BLIF N_118_1.BLIF \ -state_machine_un13_clk_000_d_1_i_n.BLIF N_110_1.BLIF sm_amiga_i_1__n.BLIF \ -clk_exp_1.BLIF sm_amiga_i_2__n.BLIF sm_amiga_d_0_2__un3_n.BLIF \ -sm_amiga_i_0__n.BLIF sm_amiga_d_0_2__un1_n.BLIF sm_amiga_i_3__n.BLIF \ -sm_amiga_d_0_2__un0_n.BLIF VPA_D_i.BLIF dsack_int_0_1__un3_n.BLIF \ -VMA_INT_i.BLIF dsack_int_0_1__un1_n.BLIF DTACK_i.BLIF \ -dsack_int_0_1__un0_n.BLIF cpu_est_i_3__n.BLIF vma_int_0_un3_n.BLIF \ -a_i_18__n.BLIF vma_int_0_un1_n.BLIF a_i_16__n.BLIF vma_int_0_un0_n.BLIF \ -a_i_19__n.BLIF vpa_sync_0_un3_n.BLIF CLK_030_i.BLIF vpa_sync_0_un1_n.BLIF \ -state_machine_un42_clk_030_i_n.BLIF vpa_sync_0_un0_n.BLIF DS_030_i.BLIF \ -as_000_int_0_un3_n.BLIF cpu_est_i_1__n.BLIF as_000_int_0_un1_n.BLIF \ -AS_030_000_SYNC_i.BLIF as_000_int_0_un0_n.BLIF cpu_est_i_0__n.BLIF \ -dtack_sync_0_un3_n.BLIF sm_amiga_i_4__n.BLIF dtack_sync_0_un1_n.BLIF \ -sm_amiga_i_6__n.BLIF dtack_sync_0_un0_n.BLIF cpu_est_i_2__n.BLIF \ -lds_000_int_0_un3_n.BLIF UDS_000_INT_0_sqmuxa_1_i.BLIF \ -lds_000_int_0_un1_n.BLIF UDS_000_INT_0_sqmuxa_i.BLIF lds_000_int_0_un0_n.BLIF \ -sm_amiga_i_5__n.BLIF uds_000_int_0_un3_n.BLIF CLK_000_DD_i.BLIF \ -uds_000_int_0_un1_n.BLIF sm_amiga_i_7__n.BLIF uds_000_int_0_un0_n.BLIF \ -a_i_30__n.BLIF bg_000_0_un3_n.BLIF a_i_31__n.BLIF bg_000_0_un1_n.BLIF \ -a_i_28__n.BLIF bg_000_0_un0_n.BLIF a_i_29__n.BLIF as_030_000_sync_0_un3_n.BLIF \ -a_i_26__n.BLIF as_030_000_sync_0_un1_n.BLIF a_i_27__n.BLIF \ -as_030_000_sync_0_un0_n.BLIF a_i_24__n.BLIF fpu_cs_int_0_un3_n.BLIF \ -a_i_25__n.BLIF fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF \ -ipl_030_0_2__un3_n.BLIF RST_i.BLIF ipl_030_0_2__un1_n.BLIF N_107_i.BLIF \ -ipl_030_0_2__un0_n.BLIF N_106_i.BLIF ipl_030_0_1__un3_n.BLIF FPU_CS_INT_i.BLIF \ -ipl_030_0_1__un1_n.BLIF CPU_SPACE_i.BLIF ipl_030_0_1__un0_n.BLIF \ -BGACK_030_INT_i.BLIF ipl_030_0_0__un3_n.BLIF AS_030_c.BLIF \ -ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF bgack_030_int_0_un3_n.BLIF \ -DS_030_c.BLIF bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF \ -sm_amiga_d_0_0__un3_n.BLIF sm_amiga_d_0_0__un1_n.BLIF size_c_0__n.BLIF \ -sm_amiga_d_0_0__un0_n.BLIF sm_amiga_d_0_1__un3_n.BLIF size_c_1__n.BLIF \ -sm_amiga_d_0_1__un1_n.BLIF sm_amiga_d_0_1__un0_n.BLIF a_c_0__n.BLIF \ -cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF \ -cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF \ -cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF \ -a_15__n.BLIF a_14__n.BLIF a_13__n.BLIF a_12__n.BLIF a_c_16__n.BLIF \ -a_11__n.BLIF a_c_17__n.BLIF a_10__n.BLIF a_c_18__n.BLIF a_9__n.BLIF \ -a_c_19__n.BLIF a_8__n.BLIF a_c_20__n.BLIF a_7__n.BLIF a_c_21__n.BLIF \ -a_6__n.BLIF a_c_22__n.BLIF a_5__n.BLIF a_c_23__n.BLIF a_4__n.BLIF \ -a_c_24__n.BLIF a_3__n.BLIF a_c_25__n.BLIF a_2__n.BLIF a_c_26__n.BLIF \ -a_1__n.BLIF a_c_27__n.BLIF a_c_28__n.BLIF a_c_29__n.BLIF DSACK_1_.PIN.BLIF \ -DTACK.PIN.BLIF +DSACK_0_.BLIF CLK_OSZI_c.BLIF CLK_OUT_INTreg.BLIF IPL_030DFFSH_0_reg.BLIF \ +inst_BGACK_030_INTreg.BLIF inst_FPU_CS_INTreg.BLIF IPL_030DFFSH_1_reg.BLIF \ +cpu_est_3_reg.BLIF inst_VMA_INTreg.BLIF IPL_030DFFSH_2_reg.BLIF gnd_n_n.BLIF \ +cpu_est_0_.BLIF ipl_c_0__n.BLIF cpu_est_1_.BLIF cpu_est_d_0_.BLIF \ +ipl_c_1__n.BLIF cpu_est_d_3_.BLIF inst_AS_000_INTreg.BLIF ipl_c_2__n.BLIF \ +inst_AS_030_000_SYNC.BLIF inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF \ +dsack_c_1__n.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D.BLIF DTACK_c.BLIF \ +inst_CLK_000_DD.BLIF inst_CLK_OUT_PRE.BLIF vcc_n_n.BLIF cpu_est_d_1_.BLIF \ +cpu_est_d_2_.BLIF cpu_est_2_.BLIF CLK_CNT_0_.BLIF SM_AMIGA_6_.BLIF RST_c.BLIF \ +SM_AMIGA_7_.BLIF inst_UDS_000_INTreg.BLIF RESETDFFreg.BLIF \ +inst_LDS_000_INTreg.BLIF RW_c.BLIF inst_RISING_CLK_AMIGA.BLIF \ +state_machine_un57_clk_000_d_n.BLIF fc_c_0__n.BLIF SM_AMIGA_1_.BLIF \ +DSACK_INT_1_.BLIF fc_c_1__n.BLIF inst_DTACK_DMA.BLIF SM_AMIGA_4_.BLIF \ +SM_AMIGA_3_.BLIF state_machine_un13_as_000_int_n.BLIF SM_AMIGA_5_.BLIF \ +SM_AMIGA_2_.BLIF N_145_i.BLIF SM_AMIGA_0_.BLIF a_c_i_0__n.BLIF \ +state_machine_uds_000_int_8_0_n.BLIF state_machine_lds_000_int_8_0_n.BLIF \ +N_99_i.BLIF N_112_i.BLIF N_100_i.BLIF N_101_i.BLIF sm_amiga_ns_0_2__n.BLIF \ +N_103_i.BLIF N_110_i.BLIF sm_amiga_ns_0_7__n.BLIF cpu_est_0_0_.BLIF \ +N_91_0.BLIF N_92_0.BLIF N_131_i.BLIF N_132_i.BLIF N_122_i.BLIF \ +CLK_OUT_PRE_0.BLIF N_124_i.BLIF N_125_i.BLIF N_126_i.BLIF N_129_i.BLIF \ +N_98.BLIF N_127_i.BLIF N_97.BLIF N_128_i.BLIF N_104.BLIF N_130_i.BLIF \ +N_93.BLIF clk_cpu_est_11_0_1__n.BLIF N_105.BLIF N_134_i.BLIF N_106.BLIF \ +N_133_i.BLIF N_108.BLIF N_135_i.BLIF N_94.BLIF clk_cpu_est_11_0_3__n.BLIF \ +N_109.BLIF size_c_i_1__n.BLIF N_107.BLIF state_machine_un31_clk_000_d_i_n.BLIF \ +N_135_1.BLIF state_machine_as_030_000_sync_3_0_n.BLIF \ +VPA_SYNC_1_sqmuxa_1_0.BLIF un1_as_030_2_0.BLIF N_167.BLIF \ +state_machine_un17_clk_030_0_n.BLIF N_170.BLIF \ +state_machine_un57_clk_000_d_0_n.BLIF state_machine_un42_clk_030_n.BLIF \ +RISING_CLK_AMIGA_i.BLIF DTACK_SYNC_1_sqmuxa.BLIF \ +state_machine_un4_bgack_000_0_n.BLIF VPA_SYNC_1_sqmuxa.BLIF BG_030_c_i.BLIF \ +un1_bg_030.BLIF state_machine_un1_clk_030_0_n.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF \ +N_97_i.BLIF DSACK_INT_1_sqmuxa.BLIF un1_bg_030_0.BLIF \ +state_machine_un1_clk_030_n.BLIF CLK_OUT_PRE_i.BLIF \ +state_machine_un4_bgack_000_n.BLIF N_94_0.BLIF un1_as_030_2.BLIF N_93_0.BLIF \ +state_machine_un17_clk_030_n.BLIF N_108_i.BLIF N_102.BLIF N_109_i.BLIF \ +AS_000_INT_1_sqmuxa.BLIF VPA_SYNC_1_sqmuxa_1.BLIF N_106_i.BLIF \ +state_machine_as_030_000_sync_3_n.BLIF N_107_i.BLIF clk_un3_clk_000_dd_n.BLIF \ +sm_amiga_ns_0_5__n.BLIF state_machine_un31_clk_000_d_n.BLIF N_104_i.BLIF \ +UDS_000_INT_0_sqmuxa.BLIF N_105_i.BLIF state_machine_un13_clk_000_d_n.BLIF \ +state_machine_un13_clk_000_d_4_n.BLIF un1_bg_030_0_1.BLIF \ +state_machine_un13_clk_000_d_1_n.BLIF un1_bg_030_0_2.BLIF \ +state_machine_un8_clk_000_d_n.BLIF state_machine_un31_clk_000_d_i_1_n.BLIF \ +UDS_000_INT_0_sqmuxa_1.BLIF clk_cpu_est_11_0_1_3__n.BLIF N_132.BLIF \ +clk_cpu_est_11_0_1_1__n.BLIF N_131.BLIF clk_cpu_est_11_0_2_1__n.BLIF \ +N_124.BLIF N_167_1.BLIF clk_cpu_est_11_3__n.BLIF N_167_2.BLIF N_135.BLIF \ +N_167_3.BLIF N_133.BLIF N_167_4.BLIF N_134.BLIF N_167_5.BLIF \ +clk_cpu_est_11_1__n.BLIF N_167_6.BLIF N_130.BLIF N_170_1.BLIF N_128.BLIF \ +N_170_2.BLIF N_145.BLIF N_107_1.BLIF N_127.BLIF \ +state_machine_un42_clk_030_1_n.BLIF N_129.BLIF \ +state_machine_un42_clk_030_2_n.BLIF N_126.BLIF \ +state_machine_un42_clk_030_3_n.BLIF N_125.BLIF \ +state_machine_un42_clk_030_4_n.BLIF N_92.BLIF \ +state_machine_un42_clk_030_5_n.BLIF N_91.BLIF DTACK_SYNC_1_sqmuxa_1_0.BLIF \ +N_110.BLIF VPA_SYNC_1_sqmuxa_1_1.BLIF N_103.BLIF VPA_SYNC_1_sqmuxa_2.BLIF \ +N_101.BLIF VPA_SYNC_1_sqmuxa_3.BLIF N_100.BLIF VPA_SYNC_1_sqmuxa_4.BLIF \ +N_112.BLIF N_98_1.BLIF N_99.BLIF state_machine_as_030_000_sync_3_0_1_n.BLIF \ +state_machine_lds_000_int_8_n.BLIF UDS_000_INT_0_sqmuxa_1_0.BLIF \ +state_machine_uds_000_int_8_n.BLIF UDS_000_INT_0_sqmuxa_2.BLIF \ +un2_clk_030_1.BLIF state_machine_un13_clk_000_d_1_0_n.BLIF \ +VMA_INT_1_sqmuxa.BLIF state_machine_un13_clk_000_d_4_1_n.BLIF RW_i.BLIF \ +state_machine_un8_clk_000_d_1_n.BLIF cpu_est_d_i_3__n.BLIF \ +state_machine_un8_clk_000_d_2_n.BLIF cpu_est_d_i_0__n.BLIF \ +state_machine_un8_clk_000_d_3_n.BLIF CLK_000_D_i.BLIF \ +state_machine_un8_clk_000_d_4_n.BLIF AS_000_INT_i.BLIF \ +UDS_000_INT_0_sqmuxa_1_1.BLIF dsack_i_1__n.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF \ +state_machine_un13_clk_000_d_i_n.BLIF UDS_000_INT_0_sqmuxa_1_3.BLIF \ +state_machine_un8_clk_000_d_i_n.BLIF N_132_1.BLIF AS_030_i.BLIF N_131_1.BLIF \ +sm_amiga_i_6__n.BLIF vma_int_0_un3_n.BLIF sm_amiga_i_7__n.BLIF \ +vma_int_0_un1_n.BLIF sm_amiga_i_5__n.BLIF vma_int_0_un0_n.BLIF \ +sm_amiga_i_4__n.BLIF lds_000_int_0_un3_n.BLIF \ +state_machine_un13_clk_000_d_1_i_n.BLIF lds_000_int_0_un1_n.BLIF \ +CLK_000_DD_i.BLIF lds_000_int_0_un0_n.BLIF AS_030_000_SYNC_i.BLIF \ +uds_000_int_0_un3_n.BLIF cpu_est_i_0__n.BLIF uds_000_int_0_un1_n.BLIF \ +cpu_est_i_2__n.BLIF uds_000_int_0_un0_n.BLIF cpu_est_i_3__n.BLIF \ +cpu_est_0_3__un3_n.BLIF cpu_est_i_1__n.BLIF cpu_est_0_3__un1_n.BLIF \ +UDS_000_INT_0_sqmuxa_1_i.BLIF cpu_est_0_3__un0_n.BLIF \ +UDS_000_INT_0_sqmuxa_i.BLIF cpu_est_0_2__un3_n.BLIF DS_030_i.BLIF \ +cpu_est_0_2__un1_n.BLIF VPA_D_i.BLIF cpu_est_0_2__un0_n.BLIF \ +state_machine_un42_clk_030_i_n.BLIF cpu_est_0_1__un3_n.BLIF \ +VPA_SYNC_1_sqmuxa_i.BLIF cpu_est_0_1__un1_n.BLIF N_102_i.BLIF \ +cpu_est_0_1__un0_n.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF fpu_cs_int_0_un3_n.BLIF \ +N_98_i.BLIF fpu_cs_int_0_un1_n.BLIF a_i_18__n.BLIF fpu_cs_int_0_un0_n.BLIF \ +a_i_16__n.BLIF as_000_int_0_un3_n.BLIF a_i_19__n.BLIF as_000_int_0_un1_n.BLIF \ +CLK_030_i.BLIF as_000_int_0_un0_n.BLIF VMA_INT_i.BLIF vpa_sync_0_un3_n.BLIF \ +DTACK_i.BLIF vpa_sync_0_un1_n.BLIF sm_amiga_i_3__n.BLIF vpa_sync_0_un0_n.BLIF \ +sm_amiga_i_1__n.BLIF as_030_000_sync_0_un3_n.BLIF sm_amiga_i_2__n.BLIF \ +as_030_000_sync_0_un1_n.BLIF a_i_30__n.BLIF as_030_000_sync_0_un0_n.BLIF \ +a_i_31__n.BLIF ipl_030_0_2__un3_n.BLIF a_i_28__n.BLIF ipl_030_0_2__un1_n.BLIF \ +a_i_29__n.BLIF ipl_030_0_2__un0_n.BLIF a_i_26__n.BLIF ipl_030_0_1__un3_n.BLIF \ +a_i_27__n.BLIF ipl_030_0_1__un1_n.BLIF a_i_24__n.BLIF ipl_030_0_1__un0_n.BLIF \ +a_i_25__n.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un1_n.BLIF \ +ipl_030_0_0__un0_n.BLIF RST_i.BLIF bgack_030_int_0_un3_n.BLIF \ +FPU_CS_INT_i.BLIF bgack_030_int_0_un1_n.BLIF CPU_SPACE_i.BLIF \ +bgack_030_int_0_un0_n.BLIF BGACK_030_INT_i.BLIF dsack_int_0_1__un3_n.BLIF \ +AS_030_c.BLIF dsack_int_0_1__un1_n.BLIF dsack_int_0_1__un0_n.BLIF \ +bg_000_0_un3_n.BLIF DS_030_c.BLIF bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF \ +dtack_sync_0_un3_n.BLIF dtack_sync_0_un1_n.BLIF size_c_0__n.BLIF \ +dtack_sync_0_un0_n.BLIF a_15__n.BLIF size_c_1__n.BLIF a_14__n.BLIF \ +a_c_0__n.BLIF a_13__n.BLIF a_12__n.BLIF a_11__n.BLIF a_10__n.BLIF a_9__n.BLIF \ +a_8__n.BLIF a_7__n.BLIF a_6__n.BLIF a_c_16__n.BLIF a_5__n.BLIF a_c_17__n.BLIF \ +a_4__n.BLIF a_c_18__n.BLIF a_3__n.BLIF a_c_19__n.BLIF a_2__n.BLIF \ +a_c_20__n.BLIF a_1__n.BLIF a_c_21__n.BLIF a_c_22__n.BLIF a_c_23__n.BLIF \ +a_c_24__n.BLIF a_c_25__n.BLIF a_c_26__n.BLIF a_c_27__n.BLIF a_c_28__n.BLIF \ +a_c_29__n.BLIF a_c_30__n.BLIF a_c_31__n.BLIF CPU_SPACE_c.BLIF BG_030_c.BLIF \ +BG_000DFFSHreg.BLIF BGACK_000_c.BLIF CLK_030_c.BLIF CLK_000_c.BLIF \ +DSACK_1_.PIN.BLIF DTACK.PIN.BLIF .outputs IPL_030_2_ AS_000 UDS_000 LDS_000 BERR BG_000 BGACK_030 CLK_DIV_OUT \ CLK_EXP FPU_CS AVEC AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \ -AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_6_.D SM_AMIGA_6_.C \ -SM_AMIGA_6_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D \ -SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR \ -SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C \ -SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR IPL_030DFFSH_1_reg.D \ +AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ cpu_est_3_reg.D \ +cpu_est_3_reg.C SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.D \ +SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR \ +SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C \ +SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D \ +SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR \ +cpu_est_d_0_.D cpu_est_d_0_.C cpu_est_d_1_.D cpu_est_d_1_.C cpu_est_d_2_.D \ +cpu_est_d_2_.C cpu_est_d_3_.D cpu_est_d_3_.C IPL_030DFFSH_0_reg.D \ +IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP IPL_030DFFSH_1_reg.D \ IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D \ IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP cpu_est_0_.D cpu_est_0_.C \ -cpu_est_1_.D cpu_est_1_.C cpu_est_2_.D cpu_est_2_.C cpu_est_3_reg.D \ -cpu_est_3_reg.C SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP cpu_est_d_0_.D \ -cpu_est_d_0_.C cpu_est_d_1_.D cpu_est_d_1_.C cpu_est_d_2_.D cpu_est_d_2_.C \ -cpu_est_d_3_.D cpu_est_d_3_.C SM_AMIGA_D_0_.D SM_AMIGA_D_0_.C SM_AMIGA_D_1_.D \ -SM_AMIGA_D_1_.C SM_AMIGA_D_2_.D SM_AMIGA_D_2_.C IPL_030DFFSH_0_reg.D \ -IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP inst_AS_000_INTreg.D \ -inst_AS_000_INTreg.C inst_AS_000_INTreg.AP inst_VPA_SYNC.D inst_VPA_SYNC.C \ -inst_VPA_SYNC.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C \ +cpu_est_1_.D cpu_est_1_.C cpu_est_2_.D cpu_est_2_.C inst_VPA_SYNC.D \ +inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C \ inst_AS_030_000_SYNC.AP inst_VMA_INTreg.D inst_VMA_INTreg.C inst_VMA_INTreg.AP \ BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP DSACK_INT_1_.D \ DSACK_INT_1_.C DSACK_INT_1_.AP inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C \ @@ -236,99 +217,102 @@ inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C \ inst_UDS_000_INTreg.D inst_UDS_000_INTreg.C inst_UDS_000_INTreg.AP \ inst_LDS_000_INTreg.D inst_LDS_000_INTreg.C inst_LDS_000_INTreg.AP \ inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_FPU_CS_INTreg.D \ -inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP inst_DTACK_DMA.D inst_DTACK_DMA.C \ +inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP inst_AS_000_INTreg.D \ +inst_AS_000_INTreg.C inst_AS_000_INTreg.AP inst_DTACK_DMA.D inst_DTACK_DMA.C \ inst_DTACK_DMA.AP inst_RISING_CLK_AMIGA.D inst_RISING_CLK_AMIGA.C CLK_CNT_0_.D \ CLK_CNT_0_.C inst_VPA_D.D inst_VPA_D.C inst_CLK_000_D.D inst_CLK_000_D.C \ RESETDFFreg.D RESETDFFreg.C inst_CLK_000_DD.D inst_CLK_000_DD.C \ -inst_CLK_OUT_INTreg.D inst_CLK_OUT_INTreg.C DSACK_1_ DTACK DSACK_0_ a_c_30__n \ -a_c_31__n CPU_SPACE_c BG_030_c gnd_n_n BGACK_000_c CLK_030_c CLK_000_c \ -CLK_OSZI_c vcc_n_n ipl_c_0__n ipl_c_1__n ipl_c_2__n \ -state_machine_un57_clk_000_d_n dsack_c_1__n DTACK_c \ -state_machine_un13_as_000_int_n RST_c clk_exp RW_c fc_c_0__n fc_c_1__n \ -state_machine_un57_clk_000_d_0_n N_161_i a_c_i_0__n \ -state_machine_uds_000_int_8_0_n state_machine_lds_000_int_8_0_n N_113_i \ -sm_amiga_ns_0_2__n N_118_i N_117_i sm_amiga_ns_0_5__n N_123_i N_119_i N_120_i \ -sm_amiga_ns_0_7__n CLK_OUT_PRE_i N_106 N_102_0 N_107 size_c_i_1__n \ -clk_un3_clk_000_dd_n state_machine_un31_clk_000_d_i_n clk_cpu_est_11_1__n \ -RISING_CLK_AMIGA_i clk_cpu_est_11_3__n state_machine_un4_bgack_000_0_n \ -BG_030_c_i state_machine_un1_clk_030_0_n state_machine_un17_clk_030_0_n N_161 \ -un1_as_030_2_0 N_114 state_machine_as_030_000_sync_3_2_n N_109 N_109_i N_111 \ -un1_bg_030_0 N_112 N_111_i N_122 N_122_i N_115 N_101 N_147_i N_116 \ -clk_cpu_est_11_0_3__n N_124 N_145_i N_139 N_146_i N_137 N_142_i N_140 \ -clk_cpu_est_11_0_1__n N_141 N_140_i N_136 N_139_i N_142 N_141_i N_145 N_138_i \ -N_138 N_137_i N_146 N_136_i N_143 N_143_i N_144 N_144_i UDS_000_INT_0_sqmuxa \ -N_134_i UDS_000_INT_0_sqmuxa_1 N_101_0 N_147 N_115_i N_147_1 N_116_i \ -state_machine_un13_clk_000_d_1_n N_186 N_124_i N_189 \ -state_machine_un42_clk_030_n N_112_i un1_bg_030 sm_amiga_ns_0_0__n \ -state_machine_as_030_000_sync_3_n N_86_i_1 un1_as_030_2 un1_bg_030_0_1 \ -state_machine_un17_clk_030_n un1_bg_030_0_2 state_machine_un1_clk_030_n \ -state_machine_as_030_000_sync_3_2_1_n state_machine_un4_bgack_000_n \ -state_machine_un31_clk_000_d_i_1_n N_108 N_186_1 \ -state_machine_un31_clk_000_d_n N_186_2 state_machine_un13_clk_000_d_n N_186_3 \ -state_machine_un13_clk_000_d_4_n N_186_4 state_machine_un8_clk_000_d_n N_186_5 \ -DTACK_SYNC_1_sqmuxa N_186_6 VPA_SYNC_1_sqmuxa_1_0 N_189_1 VPA_SYNC_1_sqmuxa \ -N_189_2 N_123 clk_cpu_est_11_0_1_1__n N_118 clk_cpu_est_11_0_2_1__n N_110 \ -clk_cpu_est_11_0_1_3__n N_102 N_143_1 N_120 N_144_1 N_119 N_106_1 N_117 \ -N_106_2 N_113 N_107_1 state_machine_lds_000_int_8_n UDS_000_INT_0_sqmuxa_1_1 \ -state_machine_uds_000_int_8_n UDS_000_INT_0_sqmuxa_1_2 DTACK_SYNC_1_sqmuxa_1 \ -UDS_000_INT_0_sqmuxa_1_3 un2_clk_030_1 UDS_000_INT_0_sqmuxa_1_0 \ -VPA_SYNC_1_sqmuxa_1 UDS_000_INT_0_sqmuxa_2 AS_000_INT_1_sqmuxa \ -state_machine_un42_clk_030_1_n VMA_INT_1_sqmuxa state_machine_un42_clk_030_2_n \ -DSACK_INT_1_sqmuxa state_machine_un42_clk_030_3_n RW_i \ -state_machine_un42_clk_030_4_n clk_exp_i state_machine_un42_clk_030_5_n \ -DTACK_SYNC_1_sqmuxa_i state_machine_un13_clk_000_d_1_0_n N_114_i \ -state_machine_un13_clk_000_d_4_1_n VPA_SYNC_1_sqmuxa_i \ -state_machine_un8_clk_000_d_1_n N_110_i state_machine_un8_clk_000_d_2_n \ -N_108_i state_machine_un8_clk_000_d_3_n cpu_est_d_i_3__n \ -state_machine_un8_clk_000_d_4_n cpu_est_d_i_0__n DTACK_SYNC_1_sqmuxa_1_0 \ -CLK_000_D_i VPA_SYNC_1_sqmuxa_1_1 AS_030_i VPA_SYNC_1_sqmuxa_2 AS_000_INT_i \ -VPA_SYNC_1_sqmuxa_3 dsack_i_1__n VPA_SYNC_1_sqmuxa_4 \ -state_machine_un13_clk_000_d_i_n N_108_1 state_machine_un8_clk_000_d_i_n \ -N_118_1 state_machine_un13_clk_000_d_1_i_n N_110_1 sm_amiga_i_1__n clk_exp_1 \ -sm_amiga_i_2__n sm_amiga_d_0_2__un3_n sm_amiga_i_0__n sm_amiga_d_0_2__un1_n \ -sm_amiga_i_3__n sm_amiga_d_0_2__un0_n VPA_D_i dsack_int_0_1__un3_n VMA_INT_i \ -dsack_int_0_1__un1_n DTACK_i dsack_int_0_1__un0_n cpu_est_i_3__n \ -vma_int_0_un3_n a_i_18__n vma_int_0_un1_n a_i_16__n vma_int_0_un0_n a_i_19__n \ -vpa_sync_0_un3_n CLK_030_i vpa_sync_0_un1_n state_machine_un42_clk_030_i_n \ -vpa_sync_0_un0_n DS_030_i as_000_int_0_un3_n cpu_est_i_1__n as_000_int_0_un1_n \ -AS_030_000_SYNC_i as_000_int_0_un0_n cpu_est_i_0__n dtack_sync_0_un3_n \ -sm_amiga_i_4__n dtack_sync_0_un1_n sm_amiga_i_6__n dtack_sync_0_un0_n \ -cpu_est_i_2__n lds_000_int_0_un3_n UDS_000_INT_0_sqmuxa_1_i \ -lds_000_int_0_un1_n UDS_000_INT_0_sqmuxa_i lds_000_int_0_un0_n sm_amiga_i_5__n \ -uds_000_int_0_un3_n CLK_000_DD_i uds_000_int_0_un1_n sm_amiga_i_7__n \ -uds_000_int_0_un0_n a_i_30__n bg_000_0_un3_n a_i_31__n bg_000_0_un1_n \ -a_i_28__n bg_000_0_un0_n a_i_29__n as_030_000_sync_0_un3_n a_i_26__n \ -as_030_000_sync_0_un1_n a_i_27__n as_030_000_sync_0_un0_n a_i_24__n \ -fpu_cs_int_0_un3_n a_i_25__n fpu_cs_int_0_un1_n fpu_cs_int_0_un0_n \ -ipl_030_0_2__un3_n RST_i ipl_030_0_2__un1_n N_107_i ipl_030_0_2__un0_n N_106_i \ -ipl_030_0_1__un3_n FPU_CS_INT_i ipl_030_0_1__un1_n CPU_SPACE_i \ -ipl_030_0_1__un0_n BGACK_030_INT_i ipl_030_0_0__un3_n AS_030_c \ -ipl_030_0_0__un1_n ipl_030_0_0__un0_n bgack_030_int_0_un3_n DS_030_c \ -bgack_030_int_0_un1_n bgack_030_int_0_un0_n sm_amiga_d_0_0__un3_n \ -sm_amiga_d_0_0__un1_n size_c_0__n sm_amiga_d_0_0__un0_n sm_amiga_d_0_1__un3_n \ -size_c_1__n sm_amiga_d_0_1__un1_n sm_amiga_d_0_1__un0_n a_c_0__n \ -cpu_est_0_1__un3_n cpu_est_0_1__un1_n cpu_est_0_1__un0_n cpu_est_0_2__un3_n \ -cpu_est_0_2__un1_n cpu_est_0_2__un0_n cpu_est_0_3__un3_n cpu_est_0_3__un1_n \ -cpu_est_0_3__un0_n a_15__n a_14__n a_13__n a_12__n a_c_16__n a_11__n a_c_17__n \ -a_10__n a_c_18__n a_9__n a_c_19__n a_8__n a_c_20__n a_7__n a_c_21__n a_6__n \ -a_c_22__n a_5__n a_c_23__n a_4__n a_c_24__n a_3__n a_c_25__n a_2__n a_c_26__n \ -a_1__n a_c_27__n a_c_28__n a_c_29__n DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE \ -LDS_000.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE cpu_est_0_0_ CLK_OUT_PRE_0 \ -G_98 G_99 G_100 -.names N_86_i_1.BLIF N_122_i.BLIF SM_AMIGA_6_.D +CLK_OUT_INTreg.D CLK_OUT_INTreg.C DSACK_1_ DTACK DSACK_0_ CLK_OSZI_c gnd_n_n \ +ipl_c_0__n ipl_c_1__n ipl_c_2__n dsack_c_1__n DTACK_c vcc_n_n RST_c RW_c \ +state_machine_un57_clk_000_d_n fc_c_0__n fc_c_1__n \ +state_machine_un13_as_000_int_n N_145_i a_c_i_0__n \ +state_machine_uds_000_int_8_0_n state_machine_lds_000_int_8_0_n N_99_i N_112_i \ +N_100_i N_101_i sm_amiga_ns_0_2__n N_103_i N_110_i sm_amiga_ns_0_7__n N_91_0 \ +N_92_0 N_131_i N_132_i N_122_i N_124_i N_125_i N_126_i N_129_i N_98 N_127_i \ +N_97 N_128_i N_104 N_130_i N_93 clk_cpu_est_11_0_1__n N_105 N_134_i N_106 \ +N_133_i N_108 N_135_i N_94 clk_cpu_est_11_0_3__n N_109 size_c_i_1__n N_107 \ +state_machine_un31_clk_000_d_i_n N_135_1 state_machine_as_030_000_sync_3_0_n \ +VPA_SYNC_1_sqmuxa_1_0 un1_as_030_2_0 N_167 state_machine_un17_clk_030_0_n \ +N_170 state_machine_un57_clk_000_d_0_n state_machine_un42_clk_030_n \ +RISING_CLK_AMIGA_i DTACK_SYNC_1_sqmuxa state_machine_un4_bgack_000_0_n \ +VPA_SYNC_1_sqmuxa BG_030_c_i un1_bg_030 state_machine_un1_clk_030_0_n \ +DTACK_SYNC_1_sqmuxa_1 N_97_i DSACK_INT_1_sqmuxa un1_bg_030_0 \ +state_machine_un1_clk_030_n CLK_OUT_PRE_i state_machine_un4_bgack_000_n N_94_0 \ +un1_as_030_2 N_93_0 state_machine_un17_clk_030_n N_108_i N_102 N_109_i \ +AS_000_INT_1_sqmuxa VPA_SYNC_1_sqmuxa_1 N_106_i \ +state_machine_as_030_000_sync_3_n N_107_i clk_un3_clk_000_dd_n \ +sm_amiga_ns_0_5__n state_machine_un31_clk_000_d_n N_104_i UDS_000_INT_0_sqmuxa \ +N_105_i state_machine_un13_clk_000_d_n state_machine_un13_clk_000_d_4_n \ +un1_bg_030_0_1 state_machine_un13_clk_000_d_1_n un1_bg_030_0_2 \ +state_machine_un8_clk_000_d_n state_machine_un31_clk_000_d_i_1_n \ +UDS_000_INT_0_sqmuxa_1 clk_cpu_est_11_0_1_3__n N_132 clk_cpu_est_11_0_1_1__n \ +N_131 clk_cpu_est_11_0_2_1__n N_124 N_167_1 clk_cpu_est_11_3__n N_167_2 N_135 \ +N_167_3 N_133 N_167_4 N_134 N_167_5 clk_cpu_est_11_1__n N_167_6 N_130 N_170_1 \ +N_128 N_170_2 N_145 N_107_1 N_127 state_machine_un42_clk_030_1_n N_129 \ +state_machine_un42_clk_030_2_n N_126 state_machine_un42_clk_030_3_n N_125 \ +state_machine_un42_clk_030_4_n N_92 state_machine_un42_clk_030_5_n N_91 \ +DTACK_SYNC_1_sqmuxa_1_0 N_110 VPA_SYNC_1_sqmuxa_1_1 N_103 VPA_SYNC_1_sqmuxa_2 \ +N_101 VPA_SYNC_1_sqmuxa_3 N_100 VPA_SYNC_1_sqmuxa_4 N_112 N_98_1 N_99 \ +state_machine_as_030_000_sync_3_0_1_n state_machine_lds_000_int_8_n \ +UDS_000_INT_0_sqmuxa_1_0 state_machine_uds_000_int_8_n UDS_000_INT_0_sqmuxa_2 \ +un2_clk_030_1 state_machine_un13_clk_000_d_1_0_n VMA_INT_1_sqmuxa \ +state_machine_un13_clk_000_d_4_1_n RW_i state_machine_un8_clk_000_d_1_n \ +cpu_est_d_i_3__n state_machine_un8_clk_000_d_2_n cpu_est_d_i_0__n \ +state_machine_un8_clk_000_d_3_n CLK_000_D_i state_machine_un8_clk_000_d_4_n \ +AS_000_INT_i UDS_000_INT_0_sqmuxa_1_1 dsack_i_1__n UDS_000_INT_0_sqmuxa_1_2 \ +state_machine_un13_clk_000_d_i_n UDS_000_INT_0_sqmuxa_1_3 \ +state_machine_un8_clk_000_d_i_n N_132_1 AS_030_i N_131_1 sm_amiga_i_6__n \ +vma_int_0_un3_n sm_amiga_i_7__n vma_int_0_un1_n sm_amiga_i_5__n \ +vma_int_0_un0_n sm_amiga_i_4__n lds_000_int_0_un3_n \ +state_machine_un13_clk_000_d_1_i_n lds_000_int_0_un1_n CLK_000_DD_i \ +lds_000_int_0_un0_n AS_030_000_SYNC_i uds_000_int_0_un3_n cpu_est_i_0__n \ +uds_000_int_0_un1_n cpu_est_i_2__n uds_000_int_0_un0_n cpu_est_i_3__n \ +cpu_est_0_3__un3_n cpu_est_i_1__n cpu_est_0_3__un1_n UDS_000_INT_0_sqmuxa_1_i \ +cpu_est_0_3__un0_n UDS_000_INT_0_sqmuxa_i cpu_est_0_2__un3_n DS_030_i \ +cpu_est_0_2__un1_n VPA_D_i cpu_est_0_2__un0_n state_machine_un42_clk_030_i_n \ +cpu_est_0_1__un3_n VPA_SYNC_1_sqmuxa_i cpu_est_0_1__un1_n N_102_i \ +cpu_est_0_1__un0_n DTACK_SYNC_1_sqmuxa_i fpu_cs_int_0_un3_n N_98_i \ +fpu_cs_int_0_un1_n a_i_18__n fpu_cs_int_0_un0_n a_i_16__n as_000_int_0_un3_n \ +a_i_19__n as_000_int_0_un1_n CLK_030_i as_000_int_0_un0_n VMA_INT_i \ +vpa_sync_0_un3_n DTACK_i vpa_sync_0_un1_n sm_amiga_i_3__n vpa_sync_0_un0_n \ +sm_amiga_i_1__n as_030_000_sync_0_un3_n sm_amiga_i_2__n \ +as_030_000_sync_0_un1_n a_i_30__n as_030_000_sync_0_un0_n a_i_31__n \ +ipl_030_0_2__un3_n a_i_28__n ipl_030_0_2__un1_n a_i_29__n ipl_030_0_2__un0_n \ +a_i_26__n ipl_030_0_1__un3_n a_i_27__n ipl_030_0_1__un1_n a_i_24__n \ +ipl_030_0_1__un0_n a_i_25__n ipl_030_0_0__un3_n ipl_030_0_0__un1_n \ +ipl_030_0_0__un0_n RST_i bgack_030_int_0_un3_n FPU_CS_INT_i \ +bgack_030_int_0_un1_n CPU_SPACE_i bgack_030_int_0_un0_n BGACK_030_INT_i \ +dsack_int_0_1__un3_n AS_030_c dsack_int_0_1__un1_n dsack_int_0_1__un0_n \ +bg_000_0_un3_n DS_030_c bg_000_0_un1_n bg_000_0_un0_n dtack_sync_0_un3_n \ +dtack_sync_0_un1_n size_c_0__n dtack_sync_0_un0_n a_15__n size_c_1__n a_14__n \ +a_c_0__n a_13__n a_12__n a_11__n a_10__n a_9__n a_8__n a_7__n a_6__n a_c_16__n \ +a_5__n a_c_17__n a_4__n a_c_18__n a_3__n a_c_19__n a_2__n a_c_20__n a_1__n \ +a_c_21__n a_c_22__n a_c_23__n a_c_24__n a_c_25__n a_c_26__n a_c_27__n \ +a_c_28__n a_c_29__n a_c_30__n a_c_31__n CPU_SPACE_c BG_030_c BGACK_000_c \ +CLK_030_c CLK_000_c DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE LDS_000.OE \ +BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE cpu_est_0_0_ CLK_OUT_PRE_0 +.names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_reg.D +1- 1 +-1 1 +.names inst_CLK_000_D.BLIF N_99_i.BLIF SM_AMIGA_7_.D +11 1 +.names N_100_i.BLIF N_112_i.BLIF SM_AMIGA_6_.D 11 1 .names sm_amiga_ns_0_2__n.BLIF SM_AMIGA_5_.D 0 1 -.names CLK_000_D_i.BLIF N_124_i.BLIF SM_AMIGA_4_.D +.names CLK_000_D_i.BLIF N_103_i.BLIF SM_AMIGA_4_.D 11 1 -.names N_115_i.BLIF N_116_i.BLIF SM_AMIGA_3_.D +.names N_104_i.BLIF N_105_i.BLIF SM_AMIGA_3_.D 11 1 .names sm_amiga_ns_0_5__n.BLIF SM_AMIGA_2_.D 0 1 -.names N_119_i.BLIF N_123_i.BLIF SM_AMIGA_1_.D +.names N_108_i.BLIF N_109_i.BLIF SM_AMIGA_1_.D 11 1 .names sm_amiga_ns_0_7__n.BLIF SM_AMIGA_0_.D 0 1 +.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF IPL_030DFFSH_0_reg.D +1- 1 +-1 1 .names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF IPL_030DFFSH_1_reg.D 1- 1 -1 1 @@ -341,26 +325,6 @@ G_98 G_99 G_100 .names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D 1- 1 -1 1 -.names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_reg.D -1- 1 --1 1 -.names sm_amiga_ns_0_0__n.BLIF SM_AMIGA_7_.D -0 1 -.names sm_amiga_d_0_0__un1_n.BLIF sm_amiga_d_0_0__un0_n.BLIF SM_AMIGA_D_0_.D -1- 1 --1 1 -.names sm_amiga_d_0_1__un1_n.BLIF sm_amiga_d_0_1__un0_n.BLIF SM_AMIGA_D_1_.D -1- 1 --1 1 -.names sm_amiga_d_0_2__un1_n.BLIF sm_amiga_d_0_2__un0_n.BLIF SM_AMIGA_D_2_.D -1- 1 --1 1 -.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF IPL_030DFFSH_0_reg.D -1- 1 --1 1 -.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INTreg.D -1- 1 --1 1 .names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D 1- 1 -1 1 @@ -393,6 +357,9 @@ inst_BGACK_030_INTreg.D .names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D 1- 1 -1 1 +.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INTreg.D +1- 1 +-1 1 .names state_machine_un13_as_000_int_n.BLIF inst_DTACK_DMA.D 0 1 .names CLK_000_D_i.BLIF CLK_000_c.BLIF inst_RISING_CLK_AMIGA.D @@ -406,543 +373,505 @@ inst_BGACK_030_INTreg.D 0 1 .names AS_000_INT_i.BLIF dsack_i_1__n.BLIF state_machine_un13_as_000_int_n 11 1 -.names clk_exp_1.BLIF G_99.BLIF clk_exp -11 1 -.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \ -state_machine_un57_clk_000_d_0_n -11 1 -.names N_161.BLIF N_161_i +.names N_145.BLIF N_145_i 0 1 .names a_c_0__n.BLIF a_c_i_0__n 0 1 -.names a_c_i_0__n.BLIF N_161_i.BLIF state_machine_uds_000_int_8_0_n +.names a_c_i_0__n.BLIF N_145_i.BLIF state_machine_uds_000_int_8_0_n 11 1 -.names N_161_i.BLIF state_machine_un31_clk_000_d_n.BLIF \ +.names N_145_i.BLIF state_machine_un31_clk_000_d_n.BLIF \ state_machine_lds_000_int_8_0_n 11 1 -.names N_113.BLIF N_113_i +.names N_99.BLIF N_99_i 0 1 -.names N_113_i.BLIF N_114_i.BLIF sm_amiga_ns_0_2__n +.names N_112.BLIF N_112_i +0 1 +.names N_100.BLIF N_100_i +0 1 +.names N_101.BLIF N_101_i +0 1 +.names N_101_i.BLIF N_102_i.BLIF sm_amiga_ns_0_2__n 11 1 -.names N_118.BLIF N_118_i +.names N_103.BLIF N_103_i 0 1 -.names N_117.BLIF N_117_i +.names N_110.BLIF N_110_i 0 1 -.names N_117_i.BLIF N_118_i.BLIF sm_amiga_ns_0_5__n +.names N_98_i.BLIF N_110_i.BLIF sm_amiga_ns_0_7__n 11 1 -.names N_123.BLIF N_123_i -0 1 -.names N_119.BLIF N_119_i -0 1 -.names N_120.BLIF N_120_i -0 1 -.names N_110_i.BLIF N_120_i.BLIF sm_amiga_ns_0_7__n +.names inst_AS_000_INTreg.BLIF SM_AMIGA_0_.BLIF N_91_0 11 1 -.names inst_CLK_OUT_PRE.BLIF CLK_OUT_PRE_i +.names CLK_000_D_i.BLIF SM_AMIGA_7_.BLIF N_92_0 +11 1 +.names N_131.BLIF N_131_i 0 1 -.names N_106_1.BLIF N_106_2.BLIF N_106 +.names N_132.BLIF N_132_i +0 1 +.names N_131_i.BLIF N_132_i.BLIF N_122_i 11 1 -.names CLK_OUT_PRE_i.BLIF SM_AMIGA_1_.BLIF N_102_0 +.names cpu_est_1_.BLIF cpu_est_2_.BLIF N_124_i 11 1 -.names N_107_1.BLIF sm_amiga_i_1__n.BLIF N_107 +.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_125_i +11 1 +.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_126_i +11 1 +.names N_129.BLIF N_129_i +0 1 +.names N_98_1.BLIF SM_AMIGA_1_.BLIF N_98 +11 1 +.names N_127.BLIF N_127_i +0 1 +.names sm_amiga_i_6__n.BLIF sm_amiga_i_7__n.BLIF N_97 +11 1 +.names N_128.BLIF N_128_i +0 1 +.names CLK_000_D_i.BLIF N_93.BLIF N_104 +11 1 +.names N_130.BLIF N_130_i +0 1 +.names N_93_0.BLIF N_93 +0 1 +.names clk_cpu_est_11_0_1_1__n.BLIF clk_cpu_est_11_0_2_1__n.BLIF \ +clk_cpu_est_11_0_1__n +11 1 +.names sm_amiga_i_3__n.BLIF sm_amiga_i_4__n.BLIF N_105 +11 1 +.names N_134.BLIF N_134_i +0 1 +.names CLK_000_D_i.BLIF SM_AMIGA_2_.BLIF N_106 +11 1 +.names N_133.BLIF N_133_i +0 1 +.names CLK_000_D_i.BLIF N_94.BLIF N_108 +11 1 +.names N_135.BLIF N_135_i +0 1 +.names N_94_0.BLIF N_94 +0 1 +.names clk_cpu_est_11_0_1_3__n.BLIF N_134_i.BLIF clk_cpu_est_11_0_3__n +11 1 +.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_109 11 1 .names size_c_1__n.BLIF size_c_i_1__n 0 1 -.names inst_CLK_000_D.BLIF CLK_000_DD_i.BLIF clk_un3_clk_000_dd_n +.names N_107_1.BLIF state_machine_un57_clk_000_d_n.BLIF N_107 11 1 .names state_machine_un31_clk_000_d_i_1_n.BLIF size_c_i_1__n.BLIF \ state_machine_un31_clk_000_d_i_n 11 1 -.names clk_cpu_est_11_0_1__n.BLIF clk_cpu_est_11_1__n -0 1 -.names inst_RISING_CLK_AMIGA.BLIF RISING_CLK_AMIGA_i -0 1 -.names clk_cpu_est_11_0_3__n.BLIF clk_cpu_est_11_3__n -0 1 -.names BGACK_000_c.BLIF RISING_CLK_AMIGA_i.BLIF \ -state_machine_un4_bgack_000_0_n +.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_135_1 11 1 -.names BG_030_c.BLIF BG_030_c_i -0 1 -.names BG_030_c_i.BLIF CLK_030_c.BLIF state_machine_un1_clk_030_0_n +.names state_machine_as_030_000_sync_3_0_1_n.BLIF \ +state_machine_un42_clk_030_i_n.BLIF state_machine_as_030_000_sync_3_0_n 11 1 -.names AS_030_i.BLIF CLK_030_i.BLIF state_machine_un17_clk_030_0_n -11 1 -.names UDS_000_INT_0_sqmuxa_1_i.BLIF UDS_000_INT_0_sqmuxa_i.BLIF N_161 +.names inst_CLK_000_D.BLIF SM_AMIGA_3_.BLIF VPA_SYNC_1_sqmuxa_1_0 11 1 .names AS_030_i.BLIF state_machine_un42_clk_030_n.BLIF un1_as_030_2_0 11 1 -.names N_122.BLIF SM_AMIGA_6_.BLIF N_114 +.names N_167_5.BLIF N_167_6.BLIF N_167 11 1 -.names state_machine_as_030_000_sync_3_2_1_n.BLIF \ -state_machine_un42_clk_030_i_n.BLIF state_machine_as_030_000_sync_3_2_n +.names AS_030_i.BLIF CLK_030_i.BLIF state_machine_un17_clk_030_0_n 11 1 -.names sm_amiga_i_6__n.BLIF sm_amiga_i_7__n.BLIF N_109 +.names N_170_1.BLIF N_170_2.BLIF N_170 11 1 -.names N_109.BLIF N_109_i -0 1 -.names inst_CLK_000_D.BLIF SM_AMIGA_7_.BLIF N_111 -11 1 -.names un1_bg_030_0_1.BLIF un1_bg_030_0_2.BLIF un1_bg_030_0 -11 1 -.names SM_AMIGA_0_.BLIF state_machine_un13_clk_000_d_1_n.BLIF N_112 -11 1 -.names N_111.BLIF N_111_i -0 1 -.names AS_030_000_SYNC_i.BLIF clk_un3_clk_000_dd_n.BLIF N_122 -11 1 -.names N_122.BLIF N_122_i -0 1 -.names CLK_000_D_i.BLIF N_101.BLIF N_115 -11 1 -.names N_101_0.BLIF N_101 -0 1 -.names N_147.BLIF N_147_i -0 1 -.names sm_amiga_i_3__n.BLIF sm_amiga_i_4__n.BLIF N_116 -11 1 -.names clk_cpu_est_11_0_1_3__n.BLIF N_146_i.BLIF clk_cpu_est_11_0_3__n -11 1 -.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_124 -11 1 -.names N_145.BLIF N_145_i -0 1 -.names N_137.BLIF cpu_est_i_0__n.BLIF N_139 -11 1 -.names N_146.BLIF N_146_i -0 1 -.names N_137_i.BLIF N_137 -0 1 -.names N_142.BLIF N_142_i -0 1 -.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_140 -11 1 -.names clk_cpu_est_11_0_1_1__n.BLIF clk_cpu_est_11_0_2_1__n.BLIF \ -clk_cpu_est_11_0_1__n -11 1 -.names N_137_i.BLIF cpu_est_0_.BLIF N_141 -11 1 -.names N_140.BLIF N_140_i -0 1 -.names N_136_i.BLIF N_136 -0 1 -.names N_139.BLIF N_139_i -0 1 -.names N_136_i.BLIF cpu_est_3_reg.BLIF N_142 -11 1 -.names N_141.BLIF N_141_i -0 1 -.names N_138.BLIF cpu_est_3_reg.BLIF N_145 -11 1 -.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_138_i -11 1 -.names N_138_i.BLIF N_138 -0 1 -.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_137_i -11 1 -.names N_138_i.BLIF cpu_est_i_2__n.BLIF N_146 -11 1 -.names cpu_est_1_.BLIF cpu_est_2_.BLIF N_136_i -11 1 -.names N_143_1.BLIF cpu_est_i_3__n.BLIF N_143 -11 1 -.names N_143.BLIF N_143_i -0 1 -.names N_144_1.BLIF cpu_est_i_2__n.BLIF N_144 -11 1 -.names N_144.BLIF N_144_i -0 1 -.names UDS_000_INT_0_sqmuxa_1_0.BLIF UDS_000_INT_0_sqmuxa_2.BLIF \ -UDS_000_INT_0_sqmuxa -11 1 -.names N_143_i.BLIF N_144_i.BLIF N_134_i -11 1 -.names UDS_000_INT_0_sqmuxa_1_3.BLIF clk_un3_clk_000_dd_n.BLIF \ -UDS_000_INT_0_sqmuxa_1 -11 1 -.names SM_AMIGA_3_.BLIF state_machine_un57_clk_000_d_0_n.BLIF N_101_0 -11 1 -.names N_147_1.BLIF cpu_est_i_2__n.BLIF N_147 -11 1 -.names N_115.BLIF N_115_i -0 1 -.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_147_1 -11 1 -.names N_116.BLIF N_116_i -0 1 -.names inst_AS_000_INTreg.BLIF inst_CLK_000_D.BLIF \ -state_machine_un13_clk_000_d_1_n -11 1 -.names N_186_5.BLIF N_186_6.BLIF N_186 -11 1 -.names N_124.BLIF N_124_i -0 1 -.names N_189_1.BLIF N_189_2.BLIF N_189 +.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \ +state_machine_un57_clk_000_d_0_n 11 1 .names state_machine_un42_clk_030_4_n.BLIF state_machine_un42_clk_030_5_n.BLIF \ state_machine_un42_clk_030_n 11 1 -.names N_112.BLIF N_112_i +.names inst_RISING_CLK_AMIGA.BLIF RISING_CLK_AMIGA_i +0 1 +.names DTACK_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF \ +DTACK_SYNC_1_sqmuxa +11 1 +.names BGACK_000_c.BLIF RISING_CLK_AMIGA_i.BLIF \ +state_machine_un4_bgack_000_0_n +11 1 +.names VPA_SYNC_1_sqmuxa_4.BLIF VPA_SYNC_1_sqmuxa_3.BLIF VPA_SYNC_1_sqmuxa +11 1 +.names BG_030_c.BLIF BG_030_c_i 0 1 .names un1_bg_030_0.BLIF un1_bg_030 0 1 -.names N_111_i.BLIF N_112_i.BLIF sm_amiga_ns_0_0__n +.names BG_030_c_i.BLIF CLK_030_c.BLIF state_machine_un1_clk_030_0_n 11 1 -.names state_machine_as_030_000_sync_3_2_n.BLIF \ -state_machine_as_030_000_sync_3_n -0 1 -.names N_109_i.BLIF N_111_i.BLIF N_86_i_1 +.names AS_030_i.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF DTACK_SYNC_1_sqmuxa_1 11 1 -.names un1_as_030_2_0.BLIF un1_as_030_2 +.names N_97.BLIF N_97_i 0 1 -.names BG_030_c_i.BLIF CPU_SPACE_i.BLIF un1_bg_030_0_1 +.names AS_030_i.BLIF N_98_i.BLIF DSACK_INT_1_sqmuxa 11 1 -.names state_machine_un17_clk_030_0_n.BLIF state_machine_un17_clk_030_n -0 1 -.names AS_030_c.BLIF N_109_i.BLIF un1_bg_030_0_2 +.names un1_bg_030_0_1.BLIF un1_bg_030_0_2.BLIF un1_bg_030_0 11 1 .names state_machine_un1_clk_030_0_n.BLIF state_machine_un1_clk_030_n 0 1 -.names AS_030_i.BLIF CPU_SPACE_i.BLIF state_machine_as_030_000_sync_3_2_1_n -11 1 +.names inst_CLK_OUT_PRE.BLIF CLK_OUT_PRE_i +0 1 .names state_machine_un4_bgack_000_0_n.BLIF state_machine_un4_bgack_000_n 0 1 -.names size_c_0__n.BLIF a_c_i_0__n.BLIF state_machine_un31_clk_000_d_i_1_n +.names CLK_OUT_PRE_i.BLIF sm_amiga_i_2__n.BLIF N_94_0 11 1 -.names N_108_1.BLIF sm_amiga_i_3__n.BLIF N_108 +.names un1_as_030_2_0.BLIF un1_as_030_2 +0 1 +.names SM_AMIGA_3_.BLIF state_machine_un57_clk_000_d_0_n.BLIF N_93_0 11 1 -.names a_i_24__n.BLIF a_i_25__n.BLIF N_186_1 +.names state_machine_un17_clk_030_0_n.BLIF state_machine_un17_clk_030_n +0 1 +.names N_108.BLIF N_108_i +0 1 +.names N_112.BLIF SM_AMIGA_6_.BLIF N_102 +11 1 +.names N_109.BLIF N_109_i +0 1 +.names AS_030_i.BLIF N_102_i.BLIF AS_000_INT_1_sqmuxa +11 1 +.names AS_030_i.BLIF VPA_SYNC_1_sqmuxa_i.BLIF VPA_SYNC_1_sqmuxa_1 +11 1 +.names N_106.BLIF N_106_i +0 1 +.names state_machine_as_030_000_sync_3_0_n.BLIF \ +state_machine_as_030_000_sync_3_n +0 1 +.names N_107.BLIF N_107_i +0 1 +.names inst_CLK_000_D.BLIF CLK_000_DD_i.BLIF clk_un3_clk_000_dd_n +11 1 +.names N_106_i.BLIF N_107_i.BLIF sm_amiga_ns_0_5__n 11 1 .names state_machine_un31_clk_000_d_i_n.BLIF state_machine_un31_clk_000_d_n 0 1 -.names a_i_26__n.BLIF a_i_27__n.BLIF N_186_2 +.names N_104.BLIF N_104_i +0 1 +.names UDS_000_INT_0_sqmuxa_1_0.BLIF UDS_000_INT_0_sqmuxa_2.BLIF \ +UDS_000_INT_0_sqmuxa 11 1 +.names N_105.BLIF N_105_i +0 1 .names state_machine_un13_clk_000_d_1_0_n.BLIF \ state_machine_un13_clk_000_d_4_n.BLIF state_machine_un13_clk_000_d_n 11 1 -.names a_i_28__n.BLIF a_i_29__n.BLIF N_186_3 -11 1 .names state_machine_un13_clk_000_d_4_1_n.BLIF cpu_est_d_2_.BLIF \ state_machine_un13_clk_000_d_4_n 11 1 -.names a_i_30__n.BLIF a_i_31__n.BLIF N_186_4 +.names BG_030_c_i.BLIF CPU_SPACE_i.BLIF un1_bg_030_0_1 +11 1 +.names inst_AS_000_INTreg.BLIF inst_CLK_000_D.BLIF \ +state_machine_un13_clk_000_d_1_n +11 1 +.names AS_030_c.BLIF N_97_i.BLIF un1_bg_030_0_2 11 1 .names state_machine_un8_clk_000_d_4_n.BLIF \ state_machine_un8_clk_000_d_3_n.BLIF state_machine_un8_clk_000_d_n 11 1 -.names N_186_1.BLIF N_186_2.BLIF N_186_5 +.names size_c_0__n.BLIF a_c_i_0__n.BLIF state_machine_un31_clk_000_d_i_1_n 11 1 -.names DTACK_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF \ -DTACK_SYNC_1_sqmuxa +.names UDS_000_INT_0_sqmuxa_1_3.BLIF clk_un3_clk_000_dd_n.BLIF \ +UDS_000_INT_0_sqmuxa_1 11 1 -.names N_186_3.BLIF N_186_4.BLIF N_186_6 +.names N_135_i.BLIF N_133_i.BLIF clk_cpu_est_11_0_1_3__n 11 1 -.names inst_CLK_000_D.BLIF SM_AMIGA_3_.BLIF VPA_SYNC_1_sqmuxa_1_0 +.names N_132_1.BLIF cpu_est_i_2__n.BLIF N_132 11 1 -.names a_c_20__n.BLIF a_c_21__n.BLIF N_189_1 +.names N_130_i.BLIF N_128_i.BLIF clk_cpu_est_11_0_1_1__n 11 1 -.names VPA_SYNC_1_sqmuxa_4.BLIF VPA_SYNC_1_sqmuxa_3.BLIF VPA_SYNC_1_sqmuxa +.names N_131_1.BLIF cpu_est_i_3__n.BLIF N_131 11 1 -.names a_c_22__n.BLIF a_c_23__n.BLIF N_189_2 +.names N_127_i.BLIF N_129_i.BLIF clk_cpu_est_11_0_2_1__n 11 1 -.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_123 -11 1 -.names N_139_i.BLIF N_140_i.BLIF clk_cpu_est_11_0_1_1__n -11 1 -.names N_118_1.BLIF state_machine_un57_clk_000_d_n.BLIF N_118 -11 1 -.names N_141_i.BLIF N_142_i.BLIF clk_cpu_est_11_0_2_1__n -11 1 -.names N_110_1.BLIF SM_AMIGA_1_.BLIF N_110 -11 1 -.names N_147_i.BLIF N_145_i.BLIF clk_cpu_est_11_0_1_3__n -11 1 -.names N_102_0.BLIF N_102 +.names N_124_i.BLIF N_124 0 1 -.names N_136.BLIF cpu_est_0_.BLIF N_143_1 +.names a_i_24__n.BLIF a_i_25__n.BLIF N_167_1 11 1 -.names SM_AMIGA_0_.BLIF state_machine_un13_clk_000_d_1_i_n.BLIF N_120 -11 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_144_1 -11 1 -.names CLK_000_D_i.BLIF N_102.BLIF N_119 -11 1 -.names sm_amiga_i_0__n.BLIF sm_amiga_i_2__n.BLIF N_106_1 -11 1 -.names CLK_000_D_i.BLIF SM_AMIGA_2_.BLIF N_117 -11 1 -.names sm_amiga_i_4__n.BLIF sm_amiga_i_6__n.BLIF N_106_2 -11 1 -.names inst_CLK_000_D.BLIF SM_AMIGA_5_.BLIF N_113 -11 1 -.names N_124.BLIF sm_amiga_i_0__n.BLIF N_107_1 -11 1 -.names state_machine_lds_000_int_8_0_n.BLIF state_machine_lds_000_int_8_n +.names clk_cpu_est_11_0_3__n.BLIF clk_cpu_est_11_3__n 0 1 -.names AS_030_000_SYNC_i.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_1 +.names a_i_26__n.BLIF a_i_27__n.BLIF N_167_2 11 1 -.names state_machine_uds_000_int_8_0_n.BLIF state_machine_uds_000_int_8_n +.names N_135_1.BLIF cpu_est_i_2__n.BLIF N_135 +11 1 +.names a_i_28__n.BLIF a_i_29__n.BLIF N_167_3 +11 1 +.names N_126.BLIF cpu_est_3_reg.BLIF N_133 +11 1 +.names a_i_30__n.BLIF a_i_31__n.BLIF N_167_4 +11 1 +.names N_126_i.BLIF cpu_est_i_2__n.BLIF N_134 +11 1 +.names N_167_1.BLIF N_167_2.BLIF N_167_5 +11 1 +.names clk_cpu_est_11_0_1__n.BLIF clk_cpu_est_11_1__n 0 1 -.names RW_c.BLIF SM_AMIGA_6_.BLIF UDS_000_INT_0_sqmuxa_1_2 +.names N_167_3.BLIF N_167_4.BLIF N_167_6 11 1 -.names AS_030_i.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF DTACK_SYNC_1_sqmuxa_1 +.names N_124_i.BLIF cpu_est_3_reg.BLIF N_130 11 1 -.names UDS_000_INT_0_sqmuxa_1_1.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF \ -UDS_000_INT_0_sqmuxa_1_3 +.names a_c_20__n.BLIF a_c_21__n.BLIF N_170_1 11 1 -.names AS_030_i.BLIF N_161.BLIF un2_clk_030_1 +.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_128 11 1 -.names inst_CLK_000_D.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_0 +.names a_c_22__n.BLIF a_c_23__n.BLIF N_170_2 11 1 -.names AS_030_i.BLIF VPA_SYNC_1_sqmuxa_i.BLIF VPA_SYNC_1_sqmuxa_1 +.names UDS_000_INT_0_sqmuxa_1_i.BLIF UDS_000_INT_0_sqmuxa_i.BLIF N_145 11 1 -.names RW_i.BLIF SM_AMIGA_4_.BLIF UDS_000_INT_0_sqmuxa_2 +.names CLK_000_D_i.BLIF SM_AMIGA_3_.BLIF N_107_1 11 1 -.names AS_030_i.BLIF N_114_i.BLIF AS_000_INT_1_sqmuxa +.names N_125.BLIF cpu_est_i_0__n.BLIF N_127 11 1 .names a_c_17__n.BLIF a_i_16__n.BLIF state_machine_un42_clk_030_1_n 11 1 -.names state_machine_un8_clk_000_d_i_n.BLIF \ -state_machine_un13_clk_000_d_i_n.BLIF VMA_INT_1_sqmuxa +.names N_125_i.BLIF cpu_est_0_.BLIF N_129 11 1 .names a_i_18__n.BLIF a_i_19__n.BLIF state_machine_un42_clk_030_2_n 11 1 -.names AS_030_i.BLIF N_110_i.BLIF DSACK_INT_1_sqmuxa -11 1 +.names N_126_i.BLIF N_126 +0 1 .names fc_c_1__n.BLIF BGACK_000_c.BLIF state_machine_un42_clk_030_3_n 11 1 -.names RW_c.BLIF RW_i +.names N_125_i.BLIF N_125 0 1 .names state_machine_un42_clk_030_1_n.BLIF state_machine_un42_clk_030_2_n.BLIF \ state_machine_un42_clk_030_4_n 11 1 -.names clk_exp.BLIF clk_exp_i +.names N_92_0.BLIF N_92 0 1 .names state_machine_un42_clk_030_3_n.BLIF fc_c_0__n.BLIF \ state_machine_un42_clk_030_5_n 11 1 -.names DTACK_SYNC_1_sqmuxa.BLIF DTACK_SYNC_1_sqmuxa_i +.names N_91_0.BLIF N_91 0 1 +.names DTACK_i.BLIF inst_VPA_D.BLIF DTACK_SYNC_1_sqmuxa_1_0 +11 1 +.names SM_AMIGA_0_.BLIF state_machine_un13_clk_000_d_1_i_n.BLIF N_110 +11 1 +.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF VPA_SYNC_1_sqmuxa_1_1 +11 1 +.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_103 +11 1 +.names N_135_1.BLIF VMA_INT_i.BLIF VPA_SYNC_1_sqmuxa_2 +11 1 +.names inst_CLK_000_D.BLIF SM_AMIGA_5_.BLIF N_101 +11 1 +.names VPA_D_i.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_3 +11 1 +.names N_92.BLIF sm_amiga_i_6__n.BLIF N_100 +11 1 +.names VPA_SYNC_1_sqmuxa_1_1.BLIF VPA_SYNC_1_sqmuxa_2.BLIF VPA_SYNC_1_sqmuxa_4 +11 1 +.names AS_030_000_SYNC_i.BLIF clk_un3_clk_000_dd_n.BLIF N_112 +11 1 +.names CLK_000_D_i.BLIF inst_CLK_OUT_PRE.BLIF N_98_1 +11 1 +.names N_91.BLIF sm_amiga_i_7__n.BLIF N_99 +11 1 +.names AS_030_i.BLIF CPU_SPACE_i.BLIF state_machine_as_030_000_sync_3_0_1_n +11 1 +.names state_machine_lds_000_int_8_0_n.BLIF state_machine_lds_000_int_8_n +0 1 +.names inst_CLK_000_D.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_0 +11 1 +.names state_machine_uds_000_int_8_0_n.BLIF state_machine_uds_000_int_8_n +0 1 +.names RW_i.BLIF SM_AMIGA_4_.BLIF UDS_000_INT_0_sqmuxa_2 +11 1 +.names AS_030_i.BLIF N_145.BLIF un2_clk_030_1 +11 1 .names cpu_est_d_i_0__n.BLIF cpu_est_d_i_3__n.BLIF \ state_machine_un13_clk_000_d_1_0_n 11 1 -.names N_114.BLIF N_114_i -0 1 +.names state_machine_un8_clk_000_d_i_n.BLIF \ +state_machine_un13_clk_000_d_i_n.BLIF VMA_INT_1_sqmuxa +11 1 .names state_machine_un13_clk_000_d_1_n.BLIF cpu_est_d_1_.BLIF \ state_machine_un13_clk_000_d_4_1_n 11 1 -.names VPA_SYNC_1_sqmuxa.BLIF VPA_SYNC_1_sqmuxa_i +.names RW_c.BLIF RW_i 0 1 .names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF state_machine_un8_clk_000_d_1_n 11 1 -.names N_110.BLIF N_110_i +.names cpu_est_d_3_.BLIF cpu_est_d_i_3__n 0 1 .names CLK_000_D_i.BLIF VPA_D_i.BLIF state_machine_un8_clk_000_d_2_n 11 1 -.names N_108.BLIF N_108_i +.names cpu_est_d_0_.BLIF cpu_est_d_i_0__n 0 1 .names cpu_est_0_.BLIF cpu_est_2_.BLIF state_machine_un8_clk_000_d_3_n 11 1 -.names cpu_est_d_3_.BLIF cpu_est_d_i_3__n +.names inst_CLK_000_D.BLIF CLK_000_D_i 0 1 .names state_machine_un8_clk_000_d_1_n.BLIF \ state_machine_un8_clk_000_d_2_n.BLIF state_machine_un8_clk_000_d_4_n 11 1 -.names cpu_est_d_0_.BLIF cpu_est_d_i_0__n -0 1 -.names DTACK_i.BLIF inst_VPA_D.BLIF DTACK_SYNC_1_sqmuxa_1_0 -11 1 -.names inst_CLK_000_D.BLIF CLK_000_D_i -0 1 -.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF VPA_SYNC_1_sqmuxa_1_1 -11 1 -.names AS_030_c.BLIF AS_030_i -0 1 -.names N_147_1.BLIF VMA_INT_i.BLIF VPA_SYNC_1_sqmuxa_2 -11 1 .names inst_AS_000_INTreg.BLIF AS_000_INT_i 0 1 -.names VPA_D_i.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_3 +.names AS_030_000_SYNC_i.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_1 11 1 .names dsack_c_1__n.BLIF dsack_i_1__n 0 1 -.names VPA_SYNC_1_sqmuxa_1_1.BLIF VPA_SYNC_1_sqmuxa_2.BLIF VPA_SYNC_1_sqmuxa_4 +.names RW_c.BLIF SM_AMIGA_6_.BLIF UDS_000_INT_0_sqmuxa_1_2 11 1 .names state_machine_un13_clk_000_d_n.BLIF state_machine_un13_clk_000_d_i_n 0 1 -.names N_123.BLIF sm_amiga_i_0__n.BLIF N_108_1 +.names UDS_000_INT_0_sqmuxa_1_1.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF \ +UDS_000_INT_0_sqmuxa_1_3 11 1 .names state_machine_un8_clk_000_d_n.BLIF state_machine_un8_clk_000_d_i_n 0 1 -.names CLK_000_D_i.BLIF SM_AMIGA_3_.BLIF N_118_1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_132_1 11 1 -.names state_machine_un13_clk_000_d_1_n.BLIF \ -state_machine_un13_clk_000_d_1_i_n +.names AS_030_c.BLIF AS_030_i 0 1 -.names CLK_000_D_i.BLIF inst_CLK_OUT_PRE.BLIF N_110_1 +.names N_124.BLIF cpu_est_0_.BLIF N_131_1 11 1 -.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n -0 1 -.names G_100.BLIF G_98.BLIF clk_exp_1 -11 1 -.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n -0 1 -.names RST_c.BLIF sm_amiga_d_0_2__un3_n -0 1 -.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n -0 1 -.names N_108_i.BLIF RST_c.BLIF sm_amiga_d_0_2__un1_n -11 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n -0 1 -.names SM_AMIGA_D_2_.BLIF sm_amiga_d_0_2__un3_n.BLIF sm_amiga_d_0_2__un0_n -11 1 -.names inst_VPA_D.BLIF VPA_D_i -0 1 -.names DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un3_n -0 1 -.names inst_VMA_INTreg.BLIF VMA_INT_i -0 1 -.names DSACK_INT_1_.BLIF DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un1_n -11 1 -.names DTACK_c.BLIF DTACK_i -0 1 -.names N_110_i.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un0_n -11 1 -.names cpu_est_3_reg.BLIF cpu_est_i_3__n +.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n 0 1 .names VMA_INT_1_sqmuxa.BLIF vma_int_0_un3_n 0 1 -.names a_c_18__n.BLIF a_i_18__n +.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n 0 1 .names inst_VMA_INTreg.BLIF VMA_INT_1_sqmuxa.BLIF vma_int_0_un1_n 11 1 -.names a_c_16__n.BLIF a_i_16__n +.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n 0 1 .names state_machine_un13_clk_000_d_4_n.BLIF vma_int_0_un3_n.BLIF \ vma_int_0_un0_n 11 1 -.names a_c_19__n.BLIF a_i_19__n -0 1 -.names VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un3_n -0 1 -.names CLK_030_c.BLIF CLK_030_i -0 1 -.names inst_VPA_SYNC.BLIF VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un1_n -11 1 -.names state_machine_un42_clk_030_n.BLIF state_machine_un42_clk_030_i_n -0 1 -.names VPA_SYNC_1_sqmuxa_i.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n -11 1 -.names DS_030_c.BLIF DS_030_i -0 1 -.names AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un3_n -0 1 -.names cpu_est_1_.BLIF cpu_est_i_1__n -0 1 -.names inst_AS_000_INTreg.BLIF AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un1_n -11 1 -.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i -0 1 -.names N_114_i.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n -11 1 -.names cpu_est_0_.BLIF cpu_est_i_0__n -0 1 -.names DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un3_n -0 1 .names SM_AMIGA_4_.BLIF sm_amiga_i_4__n 0 1 -.names inst_DTACK_SYNC.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un1_n -11 1 -.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n -0 1 -.names DTACK_SYNC_1_sqmuxa_i.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n -11 1 -.names cpu_est_2_.BLIF cpu_est_i_2__n -0 1 .names un2_clk_030_1.BLIF lds_000_int_0_un3_n 0 1 -.names UDS_000_INT_0_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_1_i +.names state_machine_un13_clk_000_d_1_n.BLIF \ +state_machine_un13_clk_000_d_1_i_n 0 1 .names inst_LDS_000_INTreg.BLIF un2_clk_030_1.BLIF lds_000_int_0_un1_n 11 1 -.names UDS_000_INT_0_sqmuxa.BLIF UDS_000_INT_0_sqmuxa_i +.names inst_CLK_000_DD.BLIF CLK_000_DD_i 0 1 .names state_machine_lds_000_int_8_n.BLIF lds_000_int_0_un3_n.BLIF \ lds_000_int_0_un0_n 11 1 -.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n +.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i 0 1 .names un2_clk_030_1.BLIF uds_000_int_0_un3_n 0 1 -.names inst_CLK_000_DD.BLIF CLK_000_DD_i +.names cpu_est_0_.BLIF cpu_est_i_0__n 0 1 .names inst_UDS_000_INTreg.BLIF un2_clk_030_1.BLIF uds_000_int_0_un1_n 11 1 -.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n +.names cpu_est_2_.BLIF cpu_est_i_2__n 0 1 .names state_machine_uds_000_int_8_n.BLIF uds_000_int_0_un3_n.BLIF \ uds_000_int_0_un0_n 11 1 -.names a_c_30__n.BLIF a_i_30__n +.names cpu_est_3_reg.BLIF cpu_est_i_3__n 0 1 -.names state_machine_un1_clk_030_n.BLIF bg_000_0_un3_n +.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_3__un3_n 0 1 -.names a_c_31__n.BLIF a_i_31__n +.names cpu_est_1_.BLIF cpu_est_i_1__n 0 1 -.names un1_bg_030.BLIF state_machine_un1_clk_030_n.BLIF bg_000_0_un1_n +.names clk_cpu_est_11_3__n.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_3__un1_n 11 1 -.names a_c_28__n.BLIF a_i_28__n +.names UDS_000_INT_0_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_1_i 0 1 -.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +.names cpu_est_3_reg.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n 11 1 -.names a_c_29__n.BLIF a_i_29__n +.names UDS_000_INT_0_sqmuxa.BLIF UDS_000_INT_0_sqmuxa_i +0 1 +.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_2__un3_n +0 1 +.names DS_030_c.BLIF DS_030_i +0 1 +.names N_122_i.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_2__un1_n +11 1 +.names inst_VPA_D.BLIF VPA_D_i +0 1 +.names cpu_est_2_.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n +11 1 +.names state_machine_un42_clk_030_n.BLIF state_machine_un42_clk_030_i_n +0 1 +.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_1__un3_n +0 1 +.names VPA_SYNC_1_sqmuxa.BLIF VPA_SYNC_1_sqmuxa_i +0 1 +.names clk_cpu_est_11_1__n.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_1__un1_n +11 1 +.names N_102.BLIF N_102_i +0 1 +.names cpu_est_1_.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n +11 1 +.names DTACK_SYNC_1_sqmuxa.BLIF DTACK_SYNC_1_sqmuxa_i +0 1 +.names state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un3_n +0 1 +.names N_98.BLIF N_98_i +0 1 +.names un1_as_030_2.BLIF state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un1_n +11 1 +.names a_c_18__n.BLIF a_i_18__n +0 1 +.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n +11 1 +.names a_c_16__n.BLIF a_i_16__n +0 1 +.names AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un3_n +0 1 +.names a_c_19__n.BLIF a_i_19__n +0 1 +.names inst_AS_000_INTreg.BLIF AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un1_n +11 1 +.names CLK_030_c.BLIF CLK_030_i +0 1 +.names N_102_i.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n +11 1 +.names inst_VMA_INTreg.BLIF VMA_INT_i +0 1 +.names VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un3_n +0 1 +.names DTACK_c.BLIF DTACK_i +0 1 +.names inst_VPA_SYNC.BLIF VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un1_n +11 1 +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names VPA_SYNC_1_sqmuxa_i.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n +11 1 +.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n 0 1 .names state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un3_n 0 1 -.names a_c_26__n.BLIF a_i_26__n +.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n 0 1 .names state_machine_as_030_000_sync_3_n.BLIF \ state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un1_n 11 1 -.names a_c_27__n.BLIF a_i_27__n +.names a_c_30__n.BLIF a_i_30__n 0 1 .names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ as_030_000_sync_0_un0_n 11 1 -.names a_c_24__n.BLIF a_i_24__n +.names a_c_31__n.BLIF a_i_31__n 0 1 -.names state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un3_n -0 1 -.names a_c_25__n.BLIF a_i_25__n -0 1 -.names un1_as_030_2.BLIF state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un1_n -11 1 -.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n -11 1 .names inst_RISING_CLK_AMIGA.BLIF ipl_030_0_2__un3_n 0 1 -.names RST_c.BLIF RST_i +.names a_c_28__n.BLIF a_i_28__n 0 1 .names ipl_c_2__n.BLIF inst_RISING_CLK_AMIGA.BLIF ipl_030_0_2__un1_n 11 1 -.names N_107.BLIF N_107_i +.names a_c_29__n.BLIF a_i_29__n 0 1 .names IPL_030DFFSH_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n 11 1 -.names N_106.BLIF N_106_i +.names a_c_26__n.BLIF a_i_26__n 0 1 .names inst_RISING_CLK_AMIGA.BLIF ipl_030_0_1__un3_n 0 1 -.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i +.names a_c_27__n.BLIF a_i_27__n 0 1 .names ipl_c_1__n.BLIF inst_RISING_CLK_AMIGA.BLIF ipl_030_0_1__un1_n 11 1 -.names CPU_SPACE_c.BLIF CPU_SPACE_i +.names a_c_24__n.BLIF a_i_24__n 0 1 .names IPL_030DFFSH_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n 11 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +.names a_c_25__n.BLIF a_i_25__n 0 1 .names inst_RISING_CLK_AMIGA.BLIF ipl_030_0_0__un3_n 0 1 @@ -950,43 +879,39 @@ as_030_000_sync_0_un0_n 11 1 .names IPL_030DFFSH_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n 11 1 +.names RST_c.BLIF RST_i +0 1 .names state_machine_un4_bgack_000_n.BLIF bgack_030_int_0_un3_n 0 1 +.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i +0 1 .names BGACK_000_c.BLIF state_machine_un4_bgack_000_n.BLIF \ bgack_030_int_0_un1_n 11 1 +.names CPU_SPACE_c.BLIF CPU_SPACE_i +0 1 .names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \ bgack_030_int_0_un0_n 11 1 -.names RST_c.BLIF sm_amiga_d_0_0__un3_n +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i 0 1 -.names N_106_i.BLIF RST_c.BLIF sm_amiga_d_0_0__un1_n -11 1 -.names SM_AMIGA_D_0_.BLIF sm_amiga_d_0_0__un3_n.BLIF sm_amiga_d_0_0__un0_n -11 1 -.names RST_c.BLIF sm_amiga_d_0_1__un3_n +.names DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un3_n 0 1 -.names N_107_i.BLIF RST_c.BLIF sm_amiga_d_0_1__un1_n +.names DSACK_INT_1_.BLIF DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un1_n 11 1 -.names SM_AMIGA_D_1_.BLIF sm_amiga_d_0_1__un3_n.BLIF sm_amiga_d_0_1__un0_n +.names N_98_i.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un0_n 11 1 -.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_1__un3_n +.names state_machine_un1_clk_030_n.BLIF bg_000_0_un3_n 0 1 -.names clk_cpu_est_11_1__n.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_1__un1_n +.names un1_bg_030.BLIF state_machine_un1_clk_030_n.BLIF bg_000_0_un1_n 11 1 -.names cpu_est_1_.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n +.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n 11 1 -.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_2__un3_n +.names DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un3_n 0 1 -.names N_134_i.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_2__un1_n +.names inst_DTACK_SYNC.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un1_n 11 1 -.names cpu_est_2_.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n -11 1 -.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_3__un3_n -0 1 -.names clk_cpu_est_11_3__n.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_3__un1_n -11 1 -.names cpu_est_3_reg.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n +.names DTACK_SYNC_1_sqmuxa_i.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n 11 1 .names cpu_est_0_.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_0_ 01 1 @@ -998,21 +923,6 @@ bgack_030_int_0_un0_n 10 1 11 0 00 0 -.names SM_AMIGA_D_0_.BLIF N_106.BLIF G_98 -01 1 -10 1 -11 0 -00 0 -.names SM_AMIGA_D_1_.BLIF N_107.BLIF G_99 -01 1 -10 1 -11 0 -00 0 -.names SM_AMIGA_D_2_.BLIF N_108.BLIF G_100 -01 1 -10 1 -11 0 -00 0 .names IPL_030DFFSH_2_reg.BLIF IPL_030_2_ 1 1 0 0 @@ -1034,10 +944,10 @@ bgack_030_int_0_un0_n .names inst_BGACK_030_INTreg.BLIF BGACK_030 1 1 0 0 -.names inst_CLK_OUT_INTreg.BLIF CLK_DIV_OUT +.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT 1 1 0 0 -.names clk_exp_i.BLIF CLK_EXP +.names CLK_OUT_INTreg.BLIF CLK_EXP 1 1 0 0 .names inst_FPU_CS_INTreg.BLIF FPU_CS @@ -1067,7 +977,7 @@ bgack_030_int_0_un0_n .names vcc_n_n.BLIF AMIGA_BUS_ENABLE_LOW 1 1 0 0 -.names N_189.BLIF CIIN +.names N_170.BLIF CIIN 1 1 0 0 .names IPL_030DFFSH_1_reg.BLIF IPL_030_1_ @@ -1076,6 +986,15 @@ bgack_030_int_0_un0_n .names IPL_030DFFSH_0_reg.BLIF IPL_030_0_ 1 1 0 0 +.names CLK_OSZI_c.BLIF cpu_est_3_reg.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF SM_AMIGA_7_.C +1 1 +0 0 +.names RST_i.BLIF SM_AMIGA_7_.AP +1 1 +0 0 .names CLK_OSZI_c.BLIF SM_AMIGA_6_.C 1 1 0 0 @@ -1118,39 +1037,6 @@ bgack_030_int_0_un0_n .names RST_i.BLIF SM_AMIGA_0_.AR 1 1 0 0 -.names CLK_OSZI_c.BLIF IPL_030DFFSH_1_reg.C -1 1 -0 0 -.names RST_i.BLIF IPL_030DFFSH_1_reg.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF IPL_030DFFSH_2_reg.C -1 1 -0 0 -.names RST_i.BLIF IPL_030DFFSH_2_reg.AP -1 1 -0 0 -.names cpu_est_0_0_.BLIF cpu_est_0_.D -1 1 -0 0 -.names CLK_OSZI_c.BLIF cpu_est_0_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF cpu_est_1_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF cpu_est_2_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF cpu_est_3_reg.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_7_.C -1 1 -0 0 -.names RST_i.BLIF SM_AMIGA_7_.AP -1 1 -0 0 .names cpu_est_0_.BLIF cpu_est_d_0_.D 1 1 0 0 @@ -1175,25 +1061,34 @@ bgack_030_int_0_un0_n .names CLK_OSZI_c.BLIF cpu_est_d_3_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_D_0_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_D_1_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_D_2_.C -1 1 -0 0 .names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C 1 1 0 0 .names RST_i.BLIF IPL_030DFFSH_0_reg.AP 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_AS_000_INTreg.C +.names CLK_OSZI_c.BLIF IPL_030DFFSH_1_reg.C 1 1 0 0 -.names RST_i.BLIF inst_AS_000_INTreg.AP +.names RST_i.BLIF IPL_030DFFSH_1_reg.AP +1 1 +0 0 +.names CLK_OSZI_c.BLIF IPL_030DFFSH_2_reg.C +1 1 +0 0 +.names RST_i.BLIF IPL_030DFFSH_2_reg.AP +1 1 +0 0 +.names cpu_est_0_0_.BLIF cpu_est_0_.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF cpu_est_0_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF cpu_est_1_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF cpu_est_2_.C 1 1 0 0 .names CLK_OSZI_c.BLIF inst_VPA_SYNC.C @@ -1262,6 +1157,12 @@ bgack_030_int_0_un0_n .names RST_i.BLIF inst_FPU_CS_INTreg.AP 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_AS_000_INTreg.C +1 1 +0 0 +.names RST_i.BLIF inst_AS_000_INTreg.AP +1 1 +0 0 .names CLK_OSZI_c.BLIF inst_DTACK_DMA.C 1 1 0 0 @@ -1298,10 +1199,10 @@ bgack_030_int_0_un0_n .names CLK_OSZI_c.BLIF inst_CLK_000_DD.C 1 1 0 0 -.names inst_CLK_OUT_PRE.BLIF inst_CLK_OUT_INTreg.D +.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_CLK_OUT_INTreg.C +.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C 1 1 0 0 .names DSACK_INT_1_.BLIF DSACK_1_ @@ -1313,27 +1214,6 @@ bgack_030_int_0_un0_n .names vcc_n_n.BLIF DSACK_0_ 1 1 0 0 -.names A_30_.BLIF a_c_30__n -1 1 -0 0 -.names A_31_.BLIF a_c_31__n -1 1 -0 0 -.names CPU_SPACE.BLIF CPU_SPACE_c -1 1 -0 0 -.names BG_030.BLIF BG_030_c -1 1 -0 0 -.names BGACK_000.BLIF BGACK_000_c -1 1 -0 0 -.names CLK_030.BLIF CLK_030_c -1 1 -0 0 -.names CLK_000.BLIF CLK_000_c -1 1 -0 0 .names CLK_OSZI.BLIF CLK_OSZI_c 1 1 0 0 @@ -1373,90 +1253,90 @@ bgack_030_int_0_un0_n .names SIZE_0_.BLIF size_c_0__n 1 1 0 0 -.names SIZE_1_.BLIF size_c_1__n -1 1 -0 0 -.names A_0_.BLIF a_c_0__n -1 1 -0 0 .names A_15_.BLIF a_15__n 1 1 0 0 +.names SIZE_1_.BLIF size_c_1__n +1 1 +0 0 .names A_14_.BLIF a_14__n 1 1 0 0 +.names A_0_.BLIF a_c_0__n +1 1 +0 0 .names A_13_.BLIF a_13__n 1 1 0 0 .names A_12_.BLIF a_12__n 1 1 0 0 -.names A_16_.BLIF a_c_16__n -1 1 -0 0 .names A_11_.BLIF a_11__n 1 1 0 0 -.names A_17_.BLIF a_c_17__n -1 1 -0 0 .names A_10_.BLIF a_10__n 1 1 0 0 -.names A_18_.BLIF a_c_18__n -1 1 -0 0 .names A_9_.BLIF a_9__n 1 1 0 0 -.names A_19_.BLIF a_c_19__n -1 1 -0 0 .names A_8_.BLIF a_8__n 1 1 0 0 -.names A_20_.BLIF a_c_20__n -1 1 -0 0 .names A_7_.BLIF a_7__n 1 1 0 0 -.names A_21_.BLIF a_c_21__n -1 1 -0 0 .names A_6_.BLIF a_6__n 1 1 0 0 -.names A_22_.BLIF a_c_22__n +.names A_16_.BLIF a_c_16__n 1 1 0 0 .names A_5_.BLIF a_5__n 1 1 0 0 -.names A_23_.BLIF a_c_23__n +.names A_17_.BLIF a_c_17__n 1 1 0 0 .names A_4_.BLIF a_4__n 1 1 0 0 -.names A_24_.BLIF a_c_24__n +.names A_18_.BLIF a_c_18__n 1 1 0 0 .names A_3_.BLIF a_3__n 1 1 0 0 -.names A_25_.BLIF a_c_25__n +.names A_19_.BLIF a_c_19__n 1 1 0 0 .names A_2_.BLIF a_2__n 1 1 0 0 -.names A_26_.BLIF a_c_26__n +.names A_20_.BLIF a_c_20__n 1 1 0 0 .names A_1_.BLIF a_1__n 1 1 0 0 +.names A_21_.BLIF a_c_21__n +1 1 +0 0 +.names A_22_.BLIF a_c_22__n +1 1 +0 0 +.names A_23_.BLIF a_c_23__n +1 1 +0 0 +.names A_24_.BLIF a_c_24__n +1 1 +0 0 +.names A_25_.BLIF a_c_25__n +1 1 +0 0 +.names A_26_.BLIF a_c_26__n +1 1 +0 0 .names A_27_.BLIF a_c_27__n 1 1 0 0 @@ -1466,6 +1346,27 @@ bgack_030_int_0_un0_n .names A_29_.BLIF a_c_29__n 1 1 0 0 +.names A_30_.BLIF a_c_30__n +1 1 +0 0 +.names A_31_.BLIF a_c_31__n +1 1 +0 0 +.names CPU_SPACE.BLIF CPU_SPACE_c +1 1 +0 0 +.names BG_030.BLIF BG_030_c +1 1 +0 0 +.names BGACK_000.BLIF BGACK_000_c +1 1 +0 0 +.names CLK_030.BLIF CLK_030_c +1 1 +0 0 +.names CLK_000.BLIF CLK_000_c +1 1 +0 0 .names CPU_SPACE_i.BLIF DSACK_1_.OE 1 1 0 0 @@ -1490,7 +1391,7 @@ bgack_030_int_0_un0_n .names FPU_CS_INT_i.BLIF AVEC_EXP.OE 1 1 0 0 -.names N_186.BLIF CIIN.OE +.names N_167.BLIF CIIN.OE 1 1 0 0 .end diff --git a/Logic/68030_tk.bl3 b/Logic/68030_tk.bl3 index 0999ae7..e914de1 100644 --- a/Logic/68030_tk.bl3 +++ b/Logic/68030_tk.bl3 @@ -1,82 +1,84 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Thu May 15 22:17:27 2014 +#$ DATE Thu May 15 22:21:53 2014 #$ MODULE 68030_tk -#$ PINS 59 FC_0_ SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 DS_030 \ -# UDS_000 LDS_000 CPU_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 \ -# CLK_OSZI CLK_DIV_OUT SIZE_0_ CLK_EXP A_30_ FPU_CS A_29_ DTACK A_28_ AVEC A_27_ AVEC_EXP \ -# A_26_ E A_25_ VPA A_24_ VMA A_23_ RST A_22_ RESET A_21_ RW A_20_ AMIGA_BUS_ENABLE A_19_ \ -# AMIGA_BUS_DATA_DIR A_18_ AMIGA_BUS_ENABLE_LOW A_17_ CIIN A_16_ A_0_ IPL_030_1_ \ -# IPL_030_0_ IPL_1_ IPL_0_ DSACK_0_ -#$ NODES 42 inst_BGACK_030_INTreg inst_CLK_OUT_INTreg inst_FPU_CS_INTreg \ -# BG_000DFFSHreg cpu_est_3_reg inst_VMA_INTreg cpu_est_0_ cpu_est_1_ cpu_est_d_0_ \ -# cpu_est_d_3_ inst_AS_000_INTreg inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_D \ -# inst_VPA_SYNC inst_CLK_000_D inst_CLK_000_DD IPL_030DFFSH_0_reg inst_CLK_OUT_PRE \ -# IPL_030DFFSH_1_reg cpu_est_d_1_ cpu_est_d_2_ IPL_030DFFSH_2_reg cpu_est_2_ \ -# CLK_CNT_0_ SM_AMIGA_6_ SM_AMIGA_7_ inst_UDS_000_INTreg inst_LDS_000_INTreg \ -# inst_RISING_CLK_AMIGA SM_AMIGA_1_ DSACK_INT_1_ inst_DTACK_DMA SM_AMIGA_4_ \ -# SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_ SM_AMIGA_D_0_ SM_AMIGA_D_1_ \ -# SM_AMIGA_D_2_ RESETDFFreg +#$ PINS 59 A_28_ A_27_ SIZE_1_ A_26_ A_25_ A_31_ A_24_ A_23_ IPL_030_2_ A_22_ A_21_ \ +# IPL_2_ A_20_ A_19_ DSACK_1_ A_18_ A_17_ FC_1_ A_16_ AS_030 AS_000 DS_030 UDS_000 LDS_000 \ +# CPU_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT \ +# CLK_EXP A_0_ FPU_CS IPL_030_1_ DTACK IPL_030_0_ AVEC IPL_1_ AVEC_EXP IPL_0_ E DSACK_0_ VPA \ +# FC_0_ VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN \ +# SIZE_0_ A_30_ A_29_ +#$ NODES 39 CLK_OUT_INTreg IPL_030DFFSH_0_reg inst_BGACK_030_INTreg \ +# inst_FPU_CS_INTreg IPL_030DFFSH_1_reg cpu_est_3_reg inst_VMA_INTreg \ +# IPL_030DFFSH_2_reg cpu_est_0_ cpu_est_1_ cpu_est_d_0_ cpu_est_d_3_ \ +# inst_AS_000_INTreg inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_D inst_VPA_SYNC \ +# inst_CLK_000_D inst_CLK_000_DD inst_CLK_OUT_PRE cpu_est_d_1_ cpu_est_d_2_ \ +# cpu_est_2_ CLK_CNT_0_ SM_AMIGA_6_ SM_AMIGA_7_ inst_UDS_000_INTreg RESETDFFreg \ +# inst_LDS_000_INTreg inst_RISING_CLK_AMIGA SM_AMIGA_1_ DSACK_INT_1_ inst_DTACK_DMA \ +# SM_AMIGA_4_ SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_ BG_000DFFSHreg .model bus68030 .inputs SIZE_1_.BLIF A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF AS_030.BLIF DS_030.BLIF \ CPU_SPACE.BLIF BG_030.BLIF BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF \ CLK_OSZI.BLIF VPA.BLIF RST.BLIF RW.BLIF SIZE_0_.BLIF A_30_.BLIF A_29_.BLIF \ A_28_.BLIF A_27_.BLIF A_26_.BLIF A_25_.BLIF A_24_.BLIF A_23_.BLIF A_22_.BLIF \ A_21_.BLIF A_20_.BLIF A_19_.BLIF A_18_.BLIF A_17_.BLIF A_16_.BLIF A_0_.BLIF \ -IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF inst_BGACK_030_INTreg.BLIF \ -inst_CLK_OUT_INTreg.BLIF inst_FPU_CS_INTreg.BLIF BG_000DFFSHreg.BLIF \ -cpu_est_3_reg.BLIF inst_VMA_INTreg.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF \ -cpu_est_d_0_.BLIF cpu_est_d_3_.BLIF inst_AS_000_INTreg.BLIF \ -inst_AS_030_000_SYNC.BLIF inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF \ -inst_VPA_SYNC.BLIF inst_CLK_000_D.BLIF inst_CLK_000_DD.BLIF \ -IPL_030DFFSH_0_reg.BLIF inst_CLK_OUT_PRE.BLIF IPL_030DFFSH_1_reg.BLIF \ -cpu_est_d_1_.BLIF cpu_est_d_2_.BLIF IPL_030DFFSH_2_reg.BLIF cpu_est_2_.BLIF \ +IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF CLK_OUT_INTreg.BLIF IPL_030DFFSH_0_reg.BLIF \ +inst_BGACK_030_INTreg.BLIF inst_FPU_CS_INTreg.BLIF IPL_030DFFSH_1_reg.BLIF \ +cpu_est_3_reg.BLIF inst_VMA_INTreg.BLIF IPL_030DFFSH_2_reg.BLIF \ +cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_d_0_.BLIF cpu_est_d_3_.BLIF \ +inst_AS_000_INTreg.BLIF inst_AS_030_000_SYNC.BLIF inst_DTACK_SYNC.BLIF \ +inst_VPA_D.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D.BLIF inst_CLK_000_DD.BLIF \ +inst_CLK_OUT_PRE.BLIF cpu_est_d_1_.BLIF cpu_est_d_2_.BLIF cpu_est_2_.BLIF \ CLK_CNT_0_.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_7_.BLIF inst_UDS_000_INTreg.BLIF \ -inst_LDS_000_INTreg.BLIF inst_RISING_CLK_AMIGA.BLIF SM_AMIGA_1_.BLIF \ -DSACK_INT_1_.BLIF inst_DTACK_DMA.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_3_.BLIF \ -SM_AMIGA_5_.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_D_0_.BLIF \ -SM_AMIGA_D_1_.BLIF SM_AMIGA_D_2_.BLIF RESETDFFreg.BLIF DSACK_1_.PIN.BLIF \ -DTACK.PIN.BLIF +RESETDFFreg.BLIF inst_LDS_000_INTreg.BLIF inst_RISING_CLK_AMIGA.BLIF \ +SM_AMIGA_1_.BLIF DSACK_INT_1_.BLIF inst_DTACK_DMA.BLIF SM_AMIGA_4_.BLIF \ +SM_AMIGA_3_.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_0_.BLIF \ +BG_000DFFSHreg.BLIF DSACK_1_.PIN.BLIF DTACK.PIN.BLIF .outputs IPL_030_2_ AS_000 UDS_000 LDS_000 BERR BG_000 BGACK_030 CLK_DIV_OUT \ -FPU_CS AVEC AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \ -AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_6_.D SM_AMIGA_6_.C \ -SM_AMIGA_6_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D \ -SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR \ -SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C \ -SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR IPL_030DFFSH_1_reg.D \ -IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D \ -IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP cpu_est_0_.D cpu_est_0_.C \ -cpu_est_1_.D cpu_est_1_.C cpu_est_2_.D cpu_est_2_.C cpu_est_3_reg.C \ -SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP cpu_est_d_0_.D cpu_est_d_0_.C \ +CLK_EXP FPU_CS AVEC AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \ +AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ cpu_est_3_reg.C SM_AMIGA_7_.D \ +SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR \ +SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C \ +SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D \ +SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR \ +SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR cpu_est_d_0_.D cpu_est_d_0_.C \ cpu_est_d_1_.D cpu_est_d_1_.C cpu_est_d_2_.D cpu_est_d_2_.C cpu_est_d_3_.D \ -cpu_est_d_3_.C SM_AMIGA_D_0_.D SM_AMIGA_D_0_.C SM_AMIGA_D_1_.D SM_AMIGA_D_1_.C \ -SM_AMIGA_D_2_.D SM_AMIGA_D_2_.C IPL_030DFFSH_0_reg.D IPL_030DFFSH_0_reg.C \ -IPL_030DFFSH_0_reg.AP inst_AS_000_INTreg.D inst_AS_000_INTreg.C \ -inst_AS_000_INTreg.AP inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP \ -inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP \ -inst_VMA_INTreg.C inst_VMA_INTreg.AP BG_000DFFSHreg.D BG_000DFFSHreg.C \ -BG_000DFFSHreg.AP DSACK_INT_1_.D DSACK_INT_1_.C DSACK_INT_1_.AP \ -inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP \ -inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C inst_UDS_000_INTreg.D \ -inst_UDS_000_INTreg.C inst_UDS_000_INTreg.AP inst_LDS_000_INTreg.D \ -inst_LDS_000_INTreg.C inst_LDS_000_INTreg.AP inst_DTACK_SYNC.D \ -inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_FPU_CS_INTreg.D inst_FPU_CS_INTreg.C \ -inst_FPU_CS_INTreg.AP inst_DTACK_DMA.D inst_DTACK_DMA.C inst_DTACK_DMA.AP \ -inst_RISING_CLK_AMIGA.D inst_RISING_CLK_AMIGA.C CLK_CNT_0_.D CLK_CNT_0_.C \ -inst_VPA_D.D inst_VPA_D.C inst_CLK_000_D.D inst_CLK_000_D.C RESETDFFreg.D \ -RESETDFFreg.C inst_CLK_000_DD.D inst_CLK_000_DD.C inst_CLK_OUT_INTreg.D \ -inst_CLK_OUT_INTreg.C DSACK_1_ DTACK DSACK_0_ DSACK_1_.OE DTACK.OE AS_000.OE \ -UDS_000.OE LDS_000.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_EXP.X1 \ -CLK_EXP.X2 cpu_est_3_reg.D.X1 cpu_est_3_reg.D.X2 inst_VMA_INTreg.D.X1 \ -inst_VMA_INTreg.D.X2 +cpu_est_d_3_.C IPL_030DFFSH_0_reg.D IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP \ +IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP \ +IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP cpu_est_0_.D \ +cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C cpu_est_2_.D cpu_est_2_.C \ +inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_AS_030_000_SYNC.D \ +inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_VMA_INTreg.C \ +inst_VMA_INTreg.AP BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP \ +DSACK_INT_1_.D DSACK_INT_1_.C DSACK_INT_1_.AP inst_BGACK_030_INTreg.D \ +inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE.D \ +inst_CLK_OUT_PRE.C inst_UDS_000_INTreg.D inst_UDS_000_INTreg.C \ +inst_UDS_000_INTreg.AP inst_LDS_000_INTreg.D inst_LDS_000_INTreg.C \ +inst_LDS_000_INTreg.AP inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP \ +inst_FPU_CS_INTreg.D inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP \ +inst_AS_000_INTreg.D inst_AS_000_INTreg.C inst_AS_000_INTreg.AP \ +inst_DTACK_DMA.D inst_DTACK_DMA.C inst_DTACK_DMA.AP inst_RISING_CLK_AMIGA.D \ +inst_RISING_CLK_AMIGA.C CLK_CNT_0_.D CLK_CNT_0_.C inst_VPA_D.D inst_VPA_D.C \ +inst_CLK_000_D.D inst_CLK_000_D.C RESETDFFreg.D RESETDFFreg.C \ +inst_CLK_000_DD.D inst_CLK_000_DD.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C DSACK_1_ \ +DTACK DSACK_0_ DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE LDS_000.OE BERR.OE \ +DSACK_0_.OE AVEC_EXP.OE CIIN.OE cpu_est_3_reg.D.X1 cpu_est_3_reg.D.X2 \ +inst_VMA_INTreg.D.X1 inst_VMA_INTreg.D.X2 +.names inst_AS_000_INTreg.BLIF inst_CLK_000_D.BLIF SM_AMIGA_7_.BLIF \ +SM_AMIGA_0_.BLIF SM_AMIGA_7_.D +-11- 1 +11-1 1 +0-0- 0 +--00 0 +-0-- 0 .names inst_AS_030_000_SYNC.BLIF inst_CLK_000_D.BLIF inst_CLK_000_DD.BLIF \ SM_AMIGA_6_.BLIF SM_AMIGA_7_.BLIF SM_AMIGA_6_.D ---110 1 -1--10 1 --0--1 1 +--11- 1 -0-1- 1 +1--1- 1 +-0--1 1 010-- 0 +-1-0- 0 ---00 0 --1--1 0 .names inst_AS_030_000_SYNC.BLIF inst_CLK_000_D.BLIF inst_CLK_000_DD.BLIF \ SM_AMIGA_6_.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_5_.D 0101- 1 @@ -109,12 +111,12 @@ SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_2_.D ---00 0 .names inst_CLK_000_D.BLIF inst_CLK_OUT_PRE.BLIF SM_AMIGA_1_.BLIF \ SM_AMIGA_2_.BLIF SM_AMIGA_1_.D --01- 1 +-010 1 1-1- 1 1--1 1 01-- 0 -0-0- 0 --00 0 +0--1 0 .names inst_AS_000_INTreg.BLIF inst_CLK_000_D.BLIF inst_CLK_OUT_PRE.BLIF \ SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_0_.D -011- 1 @@ -124,6 +126,12 @@ SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_0_.D ---00 0 --0-0 0 -1--0 0 +.names IPL_0_.BLIF IPL_030DFFSH_0_reg.BLIF inst_RISING_CLK_AMIGA.BLIF \ +IPL_030DFFSH_0_reg.D +-10 1 +1-1 1 +-00 0 +0-1 0 .names IPL_1_.BLIF IPL_030DFFSH_1_reg.BLIF inst_RISING_CLK_AMIGA.BLIF \ IPL_030DFFSH_1_reg.D -10 1 @@ -163,58 +171,6 @@ inst_CLK_000_DD.BLIF cpu_est_2_.BLIF cpu_est_2_.D -01--0 0 ----10 0 ---0-0 0 -.names inst_AS_000_INTreg.BLIF inst_CLK_000_D.BLIF SM_AMIGA_7_.BLIF \ -SM_AMIGA_0_.BLIF SM_AMIGA_7_.D --11- 1 -11-1 1 -0-0- 0 ---00 0 --0-- 0 -.names RST.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_2_.BLIF \ -SM_AMIGA_0_.BLIF SM_AMIGA_D_0_.BLIF SM_AMIGA_D_0_.D -1---1- 1 -1--1-- 1 -1-1--- 1 -11---- 1 -0----1 1 -10000- 0 -0----0 0 -.names RST.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_5_.BLIF \ -SM_AMIGA_0_.BLIF SM_AMIGA_D_1_.BLIF SM_AMIGA_D_1_.D -1---1- 1 -1--1-- 1 -1-1--- 1 -11---- 1 -0----1 1 -10000- 0 -0----0 0 -.names RST.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF \ -SM_AMIGA_0_.BLIF SM_AMIGA_D_2_.BLIF SM_AMIGA_D_2_.D -1---1- 1 -1--1-- 1 -1-1--- 1 -11---- 1 -0----1 1 -10000- 0 -0----0 0 -.names IPL_0_.BLIF IPL_030DFFSH_0_reg.BLIF inst_RISING_CLK_AMIGA.BLIF \ -IPL_030DFFSH_0_reg.D --10 1 -1-1 1 --00 0 -0-1 0 -.names AS_030.BLIF inst_AS_000_INTreg.BLIF inst_AS_030_000_SYNC.BLIF \ -inst_CLK_000_D.BLIF inst_CLK_000_DD.BLIF SM_AMIGA_6_.BLIF inst_AS_000_INTreg.D --1--1- 1 --1-0-- 1 --11--- 1 --1---0 1 -1---1- 1 -1--0-- 1 -1-1--- 1 -1----0 1 ---0101 0 -00---- 0 .names AS_030.BLIF cpu_est_3_reg.BLIF inst_VMA_INTreg.BLIF cpu_est_0_.BLIF \ cpu_est_1_.BLIF inst_VPA_D.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D.BLIF \ cpu_est_2_.BLIF SM_AMIGA_3_.BLIF inst_VPA_SYNC.D @@ -251,16 +207,16 @@ inst_AS_030_000_SYNC.BLIF inst_AS_030_000_SYNC.D -0001------ 0 000-1------ 0 -0--0-----0 0 -.names AS_030.BLIF CPU_SPACE.BLIF BG_030.BLIF CLK_030.BLIF BG_000DFFSHreg.BLIF \ -SM_AMIGA_6_.BLIF SM_AMIGA_7_.BLIF BG_000DFFSHreg.D ----11-- 1 ----0-00 1 +.names AS_030.BLIF CPU_SPACE.BLIF BG_030.BLIF CLK_030.BLIF SM_AMIGA_6_.BLIF \ +SM_AMIGA_7_.BLIF BG_000DFFSHreg.BLIF BG_000DFFSHreg.D +---000- 1 +---1--1 1 -1-0--- 1 0--0--- 1 --1---- 1 1000-1- 0 -1000--1 0 ---010-- 0 +10001-- 0 +--01--0 0 .names AS_030.BLIF inst_CLK_000_D.BLIF inst_CLK_OUT_PRE.BLIF SM_AMIGA_1_.BLIF \ DSACK_INT_1_.BLIF DSACK_INT_1_.D 1--0- 1 @@ -358,6 +314,18 @@ inst_FPU_CS_INTreg.D -1-------- 1 101100101- 0 -0-0-----0 0 +.names AS_030.BLIF inst_AS_000_INTreg.BLIF inst_AS_030_000_SYNC.BLIF \ +inst_CLK_000_D.BLIF inst_CLK_000_DD.BLIF SM_AMIGA_6_.BLIF inst_AS_000_INTreg.D +-1--1- 1 +-1-0-- 1 +-11--- 1 +-1---0 1 +1---1- 1 +1--0-- 1 +1-1--- 1 +1----0 1 +--0101 0 +00---- 0 .names inst_AS_000_INTreg.BLIF DSACK_1_.PIN.BLIF inst_DTACK_DMA.D 1- 1 -1 1 @@ -389,7 +357,10 @@ inst_FPU_CS_INTreg.D .names inst_BGACK_030_INTreg.BLIF BGACK_030 1 1 0 0 -.names inst_CLK_OUT_INTreg.BLIF CLK_DIV_OUT +.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT +1 1 +0 0 +.names CLK_OUT_INTreg.BLIF CLK_EXP 1 1 0 0 .names inst_FPU_CS_INTreg.BLIF FPU_CS @@ -427,6 +398,15 @@ inst_FPU_CS_INTreg.D .names IPL_030DFFSH_0_reg.BLIF IPL_030_0_ 1 1 0 0 +.names CLK_OSZI.BLIF cpu_est_3_reg.C +1 1 +0 0 +.names CLK_OSZI.BLIF SM_AMIGA_7_.C +1 1 +0 0 +.names RST.BLIF SM_AMIGA_7_.AP +0 1 +1 0 .names CLK_OSZI.BLIF SM_AMIGA_6_.C 1 1 0 0 @@ -469,6 +449,36 @@ inst_FPU_CS_INTreg.D .names RST.BLIF SM_AMIGA_0_.AR 0 1 1 0 +.names cpu_est_0_.BLIF cpu_est_d_0_.D +1 1 +0 0 +.names CLK_OSZI.BLIF cpu_est_d_0_.C +1 1 +0 0 +.names cpu_est_1_.BLIF cpu_est_d_1_.D +1 1 +0 0 +.names CLK_OSZI.BLIF cpu_est_d_1_.C +1 1 +0 0 +.names cpu_est_2_.BLIF cpu_est_d_2_.D +1 1 +0 0 +.names CLK_OSZI.BLIF cpu_est_d_2_.C +1 1 +0 0 +.names cpu_est_3_reg.BLIF cpu_est_d_3_.D +1 1 +0 0 +.names CLK_OSZI.BLIF cpu_est_d_3_.C +1 1 +0 0 +.names CLK_OSZI.BLIF IPL_030DFFSH_0_reg.C +1 1 +0 0 +.names RST.BLIF IPL_030DFFSH_0_reg.AP +0 1 +1 0 .names CLK_OSZI.BLIF IPL_030DFFSH_1_reg.C 1 1 0 0 @@ -497,60 +507,6 @@ inst_FPU_CS_INTreg.D .names CLK_OSZI.BLIF cpu_est_2_.C 1 1 0 0 -.names CLK_OSZI.BLIF cpu_est_3_reg.C -1 1 -0 0 -.names CLK_OSZI.BLIF SM_AMIGA_7_.C -1 1 -0 0 -.names RST.BLIF SM_AMIGA_7_.AP -0 1 -1 0 -.names cpu_est_0_.BLIF cpu_est_d_0_.D -1 1 -0 0 -.names CLK_OSZI.BLIF cpu_est_d_0_.C -1 1 -0 0 -.names cpu_est_1_.BLIF cpu_est_d_1_.D -1 1 -0 0 -.names CLK_OSZI.BLIF cpu_est_d_1_.C -1 1 -0 0 -.names cpu_est_2_.BLIF cpu_est_d_2_.D -1 1 -0 0 -.names CLK_OSZI.BLIF cpu_est_d_2_.C -1 1 -0 0 -.names cpu_est_3_reg.BLIF cpu_est_d_3_.D -1 1 -0 0 -.names CLK_OSZI.BLIF cpu_est_d_3_.C -1 1 -0 0 -.names CLK_OSZI.BLIF SM_AMIGA_D_0_.C -1 1 -0 0 -.names CLK_OSZI.BLIF SM_AMIGA_D_1_.C -1 1 -0 0 -.names CLK_OSZI.BLIF SM_AMIGA_D_2_.C -1 1 -0 0 -.names CLK_OSZI.BLIF IPL_030DFFSH_0_reg.C -1 1 -0 0 -.names RST.BLIF IPL_030DFFSH_0_reg.AP -0 1 -1 0 -.names CLK_OSZI.BLIF inst_AS_000_INTreg.C -1 1 -0 0 -.names RST.BLIF inst_AS_000_INTreg.AP -0 1 -1 0 .names CLK_OSZI.BLIF inst_VPA_SYNC.C 1 1 0 0 @@ -619,6 +575,12 @@ inst_FPU_CS_INTreg.D .names RST.BLIF inst_FPU_CS_INTreg.AP 0 1 1 0 +.names CLK_OSZI.BLIF inst_AS_000_INTreg.C +1 1 +0 0 +.names RST.BLIF inst_AS_000_INTreg.AP +0 1 +1 0 .names CLK_OSZI.BLIF inst_DTACK_DMA.C 1 1 0 0 @@ -655,10 +617,10 @@ inst_FPU_CS_INTreg.D .names CLK_OSZI.BLIF inst_CLK_000_DD.C 1 1 0 0 -.names inst_CLK_OUT_PRE.BLIF inst_CLK_OUT_INTreg.D +.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D 1 1 0 0 -.names CLK_OSZI.BLIF inst_CLK_OUT_INTreg.C +.names CLK_OSZI.BLIF CLK_OUT_INTreg.C 1 1 0 0 .names DSACK_INT_1_.BLIF DSACK_1_ @@ -704,46 +666,6 @@ A_25_.BLIF A_24_.BLIF CIIN.OE -1------ 0 1------- 0 -------1 0 -.names SM_AMIGA_0_.BLIF SM_AMIGA_D_0_.BLIF SM_AMIGA_D_1_.BLIF \ -SM_AMIGA_D_2_.BLIF CLK_EXP.X1 -1111 1 -0--- 0 --0-- 0 ---0- 0 ----0 0 -.names SM_AMIGA_6_.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_3_.BLIF \ -SM_AMIGA_5_.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_D_0_.BLIF \ -SM_AMIGA_D_1_.BLIF SM_AMIGA_D_2_.BLIF CLK_EXP.X2 -0-0--0-1-- 1 --00-0---1- 1 --0-0-0---1 1 -----1---0- 1 ----1-----0 1 -1------0-- 1 ------1-0-- 1 ------1---0 1 ---1----0-- 1 ---1-----0- 1 --1------0- 1 --1-------0 1 -------1--- 1 -11----0111 0 --11---0111 0 ---11--0111 0 --1---10111 0 ---1--10111 0 -----110111 0 -1--11-0111 0 -010--00011 0 --00-010101 0 --010-00110 0 -0-01100011 0 -10010-0101 0 -10-0100110 0 -0001000001 0 -0000100010 0 -1000000100 0 -0000000000 0 .names cpu_est_3_reg.BLIF cpu_est_0_.BLIF cpu_est_3_reg.D.X1 11 1 0- 0 diff --git a/Logic/68030_tk.crf b/Logic/68030_tk.crf index 08f099e..0596034 100644 --- a/Logic/68030_tk.crf +++ b/Logic/68030_tk.crf @@ -1,7 +1,7 @@ // Signal Name Cross Reference File // ispLEVER Classic 1.7.00.05.28.13 -// Design '68030_tk' created Thu May 15 22:17:27 2014 +// Design '68030_tk' created Thu May 15 22:21:53 2014 // LEGEND: '>' Functional Block Port Separator diff --git a/Logic/68030_tk.eq3 b/Logic/68030_tk.eq3 index 3164363..fb805dd 100644 --- a/Logic/68030_tk.eq3 +++ b/Logic/68030_tk.eq3 @@ -2,25 +2,25 @@ Copyright(C), 1992-2013, Lattice Semiconductor Corp. All Rights Reserved. -Design bus68030 created Thu May 15 22:17:27 2014 +Design bus68030 created Thu May 15 22:21:53 2014 P-Terms Fan-in Fan-out Type Name (attributes) --------- ------ ------- ---- ----------------- 0 0 1 Pin BERR 1 1 1 Pin BERR.OE - 13 10 1 PinX1 CLK_EXP.X1 - 1 4 1 PinX2 CLK_EXP.X2 + 1 1 1 Pin CLK_DIV_OUT.D + 1 1 1 Pin CLK_DIV_OUT.C 1 0 1 Pin AVEC 0 0 1 Pin AVEC_EXP 1 1 1 Pin AVEC_EXP.OE + 1 0 1 Pin DSACK_0_ + 1 1 1 Pin DSACK_0_.OE 0 0 1 Pin AMIGA_BUS_ENABLE 1 1 1 Pin AMIGA_BUS_DATA_DIR 1 0 1 Pin AMIGA_BUS_ENABLE_LOW 1 4 1 Pin CIIN 1 8 1 Pin CIIN.OE - 1 0 1 Pin DSACK_0_ - 1 1 1 Pin DSACK_0_.OE 2 3 1 Pin IPL_030_2_.D 1 1 1 Pin IPL_030_2_.AP 1 1 1 Pin IPL_030_2_.C @@ -46,15 +46,21 @@ Design bus68030 created Thu May 15 22:17:27 2014 2 3 1 Pin BGACK_030.D 1 1 1 Pin BGACK_030.AP 1 1 1 Pin BGACK_030.C - 1 1 1 Pin CLK_DIV_OUT.D - 1 1 1 Pin CLK_DIV_OUT.C + 1 1 1 Pin CLK_EXP.D + 1 1 1 Pin CLK_EXP.C 2 10 1 Pin FPU_CS.D- 1 1 1 Pin FPU_CS.AP 1 1 1 Pin FPU_CS.C + 2 3 1 Pin IPL_030_1_.D + 1 1 1 Pin IPL_030_1_.AP + 1 1 1 Pin IPL_030_1_.C 1 1 1 Pin DTACK.OE 1 2 1 Pin DTACK.D- 1 1 1 Pin DTACK.AP 1 1 1 Pin DTACK.C + 2 3 1 Pin IPL_030_0_.D + 1 1 1 Pin IPL_030_0_.AP + 1 1 1 Pin IPL_030_0_.C 3 6 1 Pin E.T 1 1 1 Pin E.C 1 1 1 Pin VMA.AP @@ -62,12 +68,6 @@ Design bus68030 created Thu May 15 22:17:27 2014 1 1 1 Pin VMA.C 1 1 1 Pin RESET.D 1 1 1 Pin RESET.C - 2 3 1 Pin IPL_030_1_.D - 1 1 1 Pin IPL_030_1_.AP - 1 1 1 Pin IPL_030_1_.C - 2 3 1 Pin IPL_030_0_.D - 1 1 1 Pin IPL_030_0_.AP - 1 1 1 Pin IPL_030_0_.C 3 3 1 Node cpu_est_0_.D 1 1 1 Node cpu_est_0_.C 4 6 1 Node cpu_est_1_.T @@ -128,16 +128,10 @@ Design bus68030 created Thu May 15 22:17:27 2014 1 1 1 Node SM_AMIGA_0_.AR 3 5 1 Node SM_AMIGA_0_.D 1 1 1 Node SM_AMIGA_0_.C - 2 6 1 Node SM_AMIGA_D_0_.D- - 1 1 1 Node SM_AMIGA_D_0_.C - 2 6 1 Node SM_AMIGA_D_1_.D- - 1 1 1 Node SM_AMIGA_D_1_.C - 2 6 1 Node SM_AMIGA_D_2_.D- - 1 1 1 Node SM_AMIGA_D_2_.C ========= - 195 P-Term Total: 195 + 174 P-Term Total: 174 Total Pins: 59 - Total Nodes: 27 + Total Nodes: 24 Average P-Term/Output: 2 @@ -147,21 +141,9 @@ BERR = (0); BERR.OE = (!FPU_CS.Q); -CLK_EXP.X1 = (SM_AMIGA_0_.Q - # SM_AMIGA_6_.Q & !SM_AMIGA_D_0_.Q - # SM_AMIGA_4_.Q & !SM_AMIGA_D_0_.Q - # SM_AMIGA_2_.Q & !SM_AMIGA_D_0_.Q - # SM_AMIGA_1_.Q & !SM_AMIGA_D_1_.Q - # SM_AMIGA_4_.Q & !SM_AMIGA_D_1_.Q - # SM_AMIGA_5_.Q & !SM_AMIGA_D_1_.Q - # SM_AMIGA_1_.Q & !SM_AMIGA_D_2_.Q - # SM_AMIGA_3_.Q & !SM_AMIGA_D_2_.Q - # SM_AMIGA_2_.Q & !SM_AMIGA_D_2_.Q - # !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q & SM_AMIGA_D_0_.Q - # !SM_AMIGA_1_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_5_.Q & SM_AMIGA_D_1_.Q - # !SM_AMIGA_1_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & SM_AMIGA_D_2_.Q); +CLK_DIV_OUT.D = (inst_CLK_OUT_PRE.Q); -CLK_EXP.X2 = (SM_AMIGA_0_.Q & SM_AMIGA_D_0_.Q & SM_AMIGA_D_1_.Q & SM_AMIGA_D_2_.Q); +CLK_DIV_OUT.C = (CLK_OSZI); AVEC = (1); @@ -169,6 +151,10 @@ AVEC_EXP = (0); AVEC_EXP.OE = (!FPU_CS.Q); +DSACK_0_ = (1); + +DSACK_0_.OE = (!CPU_SPACE); + AMIGA_BUS_ENABLE = (0); AMIGA_BUS_DATA_DIR = (!RW); @@ -179,10 +165,6 @@ CIIN = (A_23_ & A_22_ & A_21_ & A_20_); CIIN.OE = (!A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_); -DSACK_0_ = (1); - -DSACK_0_.OE = (!CPU_SPACE); - IPL_030_2_.D = (IPL_2_ & inst_RISING_CLK_AMIGA.Q # IPL_030_2_.Q & !inst_RISING_CLK_AMIGA.Q); @@ -257,9 +239,9 @@ BGACK_030.AP = (!RST); BGACK_030.C = (CLK_OSZI); -CLK_DIV_OUT.D = (inst_CLK_OUT_PRE.Q); +CLK_EXP.D = (inst_CLK_OUT_PRE.Q); -CLK_DIV_OUT.C = (CLK_OSZI); +CLK_EXP.C = (CLK_OSZI); !FPU_CS.D = (!AS_030 & !CLK_030 & !FPU_CS.Q # FC_1_ & !AS_030 & BGACK_000 & CLK_030 & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_); @@ -268,6 +250,13 @@ FPU_CS.AP = (!RST); FPU_CS.C = (CLK_OSZI); +IPL_030_1_.D = (IPL_1_ & inst_RISING_CLK_AMIGA.Q + # IPL_030_1_.Q & !inst_RISING_CLK_AMIGA.Q); + +IPL_030_1_.AP = (!RST); + +IPL_030_1_.C = (CLK_OSZI); + DTACK.OE = (!BGACK_030.Q); !DTACK.D = (!AS_000.Q & !DSACK_1_.PIN); @@ -276,6 +265,13 @@ DTACK.AP = (!RST); DTACK.C = (CLK_OSZI); +IPL_030_0_.D = (IPL_0_ & inst_RISING_CLK_AMIGA.Q + # IPL_030_0_.Q & !inst_RISING_CLK_AMIGA.Q); + +IPL_030_0_.AP = (!RST); + +IPL_030_0_.C = (CLK_OSZI); + E.T = (E.Q & cpu_est_0_.Q & cpu_est_1_.Q & inst_CLK_000_D.Q & !inst_CLK_000_DD.Q & cpu_est_2_.Q # !E.Q & cpu_est_0_.Q & cpu_est_1_.Q & inst_CLK_000_D.Q & !inst_CLK_000_DD.Q & !cpu_est_2_.Q # !E.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & inst_CLK_000_D.Q & !inst_CLK_000_DD.Q & !cpu_est_2_.Q); @@ -293,20 +289,6 @@ RESET.D = (RST); RESET.C = (CLK_OSZI); -IPL_030_1_.D = (IPL_1_ & inst_RISING_CLK_AMIGA.Q - # IPL_030_1_.Q & !inst_RISING_CLK_AMIGA.Q); - -IPL_030_1_.AP = (!RST); - -IPL_030_1_.C = (CLK_OSZI); - -IPL_030_0_.D = (IPL_0_ & inst_RISING_CLK_AMIGA.Q - # IPL_030_0_.Q & !inst_RISING_CLK_AMIGA.Q); - -IPL_030_0_.AP = (!RST); - -IPL_030_0_.C = (CLK_OSZI); - cpu_est_0_.D = (cpu_est_0_.Q & !inst_CLK_000_D.Q # cpu_est_0_.Q & inst_CLK_000_DD.Q # !cpu_est_0_.Q & inst_CLK_000_D.Q & !inst_CLK_000_DD.Q); @@ -390,7 +372,7 @@ CLK_CNT_0_.C = (CLK_OSZI); SM_AMIGA_6_.AR = (!RST); -!SM_AMIGA_6_.D = (inst_CLK_000_D.Q & SM_AMIGA_7_.Q +!SM_AMIGA_6_.D = (inst_CLK_000_D.Q & !SM_AMIGA_6_.Q # !SM_AMIGA_6_.Q & !SM_AMIGA_7_.Q # !inst_AS_030_000_SYNC.Q & inst_CLK_000_D.Q & !inst_CLK_000_DD.Q); @@ -410,8 +392,8 @@ inst_RISING_CLK_AMIGA.C = (CLK_OSZI); SM_AMIGA_1_.AR = (!RST); SM_AMIGA_1_.D = (inst_CLK_000_D.Q & SM_AMIGA_1_.Q - # !inst_CLK_OUT_PRE.Q & SM_AMIGA_1_.Q - # inst_CLK_000_D.Q & SM_AMIGA_2_.Q); + # inst_CLK_000_D.Q & SM_AMIGA_2_.Q + # !inst_CLK_OUT_PRE.Q & SM_AMIGA_1_.Q & !SM_AMIGA_2_.Q); SM_AMIGA_1_.C = (CLK_OSZI); @@ -453,21 +435,6 @@ SM_AMIGA_0_.D = (!AS_000.Q & SM_AMIGA_0_.Q SM_AMIGA_0_.C = (CLK_OSZI); -!SM_AMIGA_D_0_.D = (!RST & !SM_AMIGA_D_0_.Q - # RST & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q & !SM_AMIGA_0_.Q); - -SM_AMIGA_D_0_.C = (CLK_OSZI); - -!SM_AMIGA_D_1_.D = (!RST & !SM_AMIGA_D_1_.Q - # RST & !SM_AMIGA_1_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_0_.Q); - -SM_AMIGA_D_1_.C = (CLK_OSZI); - -!SM_AMIGA_D_2_.D = (!RST & !SM_AMIGA_D_2_.Q - # RST & !SM_AMIGA_1_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & !SM_AMIGA_0_.Q); - -SM_AMIGA_D_2_.C = (CLK_OSZI); - Reverse-Polarity Equations: diff --git a/Logic/68030_tk.fti b/Logic/68030_tk.fti index a568afd..bcb58ba 100644 --- a/Logic/68030_tk.fti +++ b/Logic/68030_tk.fti @@ -4,9 +4,9 @@ #DEVICE mach447a DATA LOCATION AMIGA_BUS_DATA_DIR:E_0_48 // OUT -DATA LOCATION AMIGA_BUS_ENABLE:D_9_34 // OUT +DATA LOCATION AMIGA_BUS_ENABLE:D_2_34 // OUT DATA LOCATION AMIGA_BUS_ENABLE_LOW:C_12_20 // OUT -DATA LOCATION AS_000:D_5_33 // IO {RN_AS_000} +DATA LOCATION AS_000:D_9_33 // IO {RN_AS_000} DATA LOCATION AS_030:H_*_82 // INP DATA LOCATION AVEC:A_4_92 // OUT DATA LOCATION AVEC_EXP:C_0_22 // OUT @@ -40,11 +40,11 @@ DATA LOCATION CLK_DIV_OUT:G_0_65 // OUT DATA LOCATION CLK_EXP:B_0_10 // OUT DATA LOCATION CLK_OSZI:*_*_61 // Cin DATA LOCATION CPU_SPACE:*_*_14 // INP -DATA LOCATION DSACK_0_:H_12_80 // OUT -DATA LOCATION DSACK_1_:H_8_81 // IO {RN_DSACK_1_} +DATA LOCATION DSACK_0_:H_1_80 // OUT +DATA LOCATION DSACK_1_:H_12_81 // IO {RN_DSACK_1_} DATA LOCATION DS_030:A_*_98 // INP DATA LOCATION DTACK:D_0_30 // IO -DATA LOCATION E:G_4_66 // IO {RN_E} +DATA LOCATION E:G_2_66 // IO {RN_E} DATA LOCATION FC_0_:F_*_57 // INP DATA LOCATION FC_1_:F_*_58 // INP DATA LOCATION FPU_CS:H_0_78 // IO {RN_FPU_CS} @@ -55,52 +55,49 @@ DATA LOCATION IPL_0_:G_*_67 // INP DATA LOCATION IPL_1_:F_*_56 // INP DATA LOCATION IPL_2_:G_*_68 // INP DATA LOCATION LDS_000:D_8_31 // IO {RN_LDS_000} -DATA LOCATION RESET:B_5_3 // OUT -DATA LOCATION RN_AS_000:D_5 // NOD {AS_000} +DATA LOCATION RESET:B_1_3 // OUT +DATA LOCATION RN_AS_000:D_9 // NOD {AS_000} DATA LOCATION RN_BGACK_030:H_4 // NOD {BGACK_030} DATA LOCATION RN_BG_000:D_1 // NOD {BG_000} -DATA LOCATION RN_DSACK_1_:H_8 // NOD {DSACK_1_} -DATA LOCATION RN_E:G_4 // NOD {E} +DATA LOCATION RN_DSACK_1_:H_12 // NOD {DSACK_1_} +DATA LOCATION RN_E:G_2 // NOD {E} DATA LOCATION RN_FPU_CS:H_0 // NOD {FPU_CS} DATA LOCATION RN_IPL_030_0_:B_8 // NOD {IPL_030_0_} DATA LOCATION RN_IPL_030_1_:B_12 // NOD {IPL_030_1_} DATA LOCATION RN_IPL_030_2_:B_4 // NOD {IPL_030_2_} DATA LOCATION RN_LDS_000:D_8 // NOD {LDS_000} DATA LOCATION RN_UDS_000:D_12 // NOD {UDS_000} -DATA LOCATION RN_VMA:D_4 // NOD {VMA} +DATA LOCATION RN_VMA:D_5 // NOD {VMA} DATA LOCATION RST:*_*_86 // INP DATA LOCATION RW:G_*_71 // INP DATA LOCATION SIZE_0_:G_*_70 // INP DATA LOCATION SIZE_1_:H_*_79 // INP -DATA LOCATION SM_AMIGA_0_:G_9 // NOD -DATA LOCATION SM_AMIGA_1_:G_12 // NOD -DATA LOCATION SM_AMIGA_2_:G_13 // NOD -DATA LOCATION SM_AMIGA_3_:G_8 // NOD +DATA LOCATION SM_AMIGA_0_:G_13 // NOD +DATA LOCATION SM_AMIGA_1_:G_5 // NOD +DATA LOCATION SM_AMIGA_2_:G_10 // NOD +DATA LOCATION SM_AMIGA_3_:B_5 // NOD DATA LOCATION SM_AMIGA_4_:D_13 // NOD -DATA LOCATION SM_AMIGA_5_:D_6 // NOD -DATA LOCATION SM_AMIGA_6_:D_2 // NOD -DATA LOCATION SM_AMIGA_7_:G_6 // NOD -DATA LOCATION SM_AMIGA_D_0_:B_6 // NOD -DATA LOCATION SM_AMIGA_D_1_:B_13 // NOD -DATA LOCATION SM_AMIGA_D_2_:B_9 // NOD +DATA LOCATION SM_AMIGA_5_:D_10 // NOD +DATA LOCATION SM_AMIGA_6_:D_6 // NOD +DATA LOCATION SM_AMIGA_7_:G_9 // NOD DATA LOCATION UDS_000:D_12_32 // IO {RN_UDS_000} -DATA LOCATION VMA:D_4_35 // IO {RN_VMA} +DATA LOCATION VMA:D_5_35 // IO {RN_VMA} DATA LOCATION VPA:*_*_36 // INP -DATA LOCATION cpu_est_0_:G_5 // NOD -DATA LOCATION cpu_est_1_:G_2 // NOD -DATA LOCATION cpu_est_2_:G_1 // NOD +DATA LOCATION cpu_est_0_:G_8 // NOD +DATA LOCATION cpu_est_1_:G_6 // NOD +DATA LOCATION cpu_est_2_:G_4 // NOD DATA LOCATION cpu_est_d_0_:G_15 // NOD DATA LOCATION cpu_est_d_1_:G_7 // NOD DATA LOCATION cpu_est_d_2_:G_3 // NOD DATA LOCATION cpu_est_d_3_:G_11 // NOD -DATA LOCATION inst_AS_030_000_SYNC:H_5 // NOD -DATA LOCATION inst_CLK_000_D:H_1 // NOD +DATA LOCATION inst_AS_030_000_SYNC:H_8 // NOD +DATA LOCATION inst_CLK_000_D:H_2 // NOD DATA LOCATION inst_CLK_000_DD:H_13 // NOD -DATA LOCATION inst_CLK_OUT_PRE:G_10 // NOD -DATA LOCATION inst_DTACK_SYNC:A_8 // NOD +DATA LOCATION inst_CLK_OUT_PRE:G_12 // NOD +DATA LOCATION inst_DTACK_SYNC:B_9 // NOD DATA LOCATION inst_RISING_CLK_AMIGA:H_9 // NOD -DATA LOCATION inst_VPA_D:A_0 // NOD -DATA LOCATION inst_VPA_SYNC:F_0 // NOD +DATA LOCATION inst_VPA_D:G_1 // NOD +DATA LOCATION inst_VPA_SYNC:A_0 // NOD DATA IO_DIR AMIGA_BUS_DATA_DIR:OUT DATA IO_DIR AMIGA_BUS_ENABLE:OUT DATA IO_DIR AMIGA_BUS_ENABLE_LOW:OUT @@ -161,16 +158,40 @@ DATA IO_DIR UDS_000:OUT DATA IO_DIR VMA:OUT DATA IO_DIR VPA:IN DATA GLB_CLOCK CLK_OSZI -DATA PW_LEVEL FC_0_:0 -DATA SLEW FC_0_:0 +DATA PW_LEVEL A_28_:0 +DATA SLEW A_28_:0 +DATA PW_LEVEL A_27_:0 +DATA SLEW A_27_:0 DATA PW_LEVEL SIZE_1_:0 DATA SLEW SIZE_1_:0 +DATA PW_LEVEL A_26_:0 +DATA SLEW A_26_:0 +DATA PW_LEVEL A_25_:0 +DATA SLEW A_25_:0 DATA PW_LEVEL A_31_:0 DATA SLEW A_31_:0 +DATA PW_LEVEL A_24_:0 +DATA SLEW A_24_:0 +DATA PW_LEVEL A_23_:0 +DATA SLEW A_23_:0 +DATA PW_LEVEL A_22_:0 +DATA SLEW A_22_:0 +DATA PW_LEVEL A_21_:0 +DATA SLEW A_21_:0 DATA PW_LEVEL IPL_2_:0 DATA SLEW IPL_2_:0 +DATA PW_LEVEL A_20_:0 +DATA SLEW A_20_:0 +DATA PW_LEVEL A_19_:0 +DATA SLEW A_19_:0 +DATA PW_LEVEL A_18_:0 +DATA SLEW A_18_:0 +DATA PW_LEVEL A_17_:0 +DATA SLEW A_17_:0 DATA PW_LEVEL FC_1_:0 DATA SLEW FC_1_:0 +DATA PW_LEVEL A_16_:0 +DATA SLEW A_16_:0 DATA PW_LEVEL AS_030:0 DATA SLEW AS_030:0 DATA PW_LEVEL DS_030:0 @@ -185,64 +206,40 @@ DATA SLEW BGACK_000:0 DATA SLEW CLK_030:0 DATA SLEW CLK_000:0 DATA SLEW CLK_OSZI:0 -DATA PW_LEVEL SIZE_0_:0 -DATA SLEW SIZE_0_:0 -DATA PW_LEVEL CLK_EXP:0 -DATA SLEW CLK_EXP:0 -DATA PW_LEVEL A_30_:0 -DATA SLEW A_30_:0 -DATA PW_LEVEL A_29_:0 -DATA SLEW A_29_:0 -DATA PW_LEVEL A_28_:0 -DATA SLEW A_28_:0 -DATA PW_LEVEL AVEC:0 -DATA SLEW AVEC:0 -DATA PW_LEVEL A_27_:0 -DATA SLEW A_27_:0 -DATA PW_LEVEL AVEC_EXP:0 -DATA SLEW AVEC_EXP:0 -DATA PW_LEVEL A_26_:0 -DATA SLEW A_26_:0 -DATA PW_LEVEL A_25_:0 -DATA SLEW A_25_:0 -DATA SLEW VPA:0 -DATA PW_LEVEL A_24_:0 -DATA SLEW A_24_:0 -DATA PW_LEVEL A_23_:0 -DATA SLEW A_23_:0 -DATA SLEW RST:0 -DATA PW_LEVEL A_22_:0 -DATA SLEW A_22_:0 -DATA PW_LEVEL A_21_:0 -DATA SLEW A_21_:0 -DATA PW_LEVEL RW:0 -DATA SLEW RW:0 -DATA PW_LEVEL A_20_:0 -DATA SLEW A_20_:0 -DATA PW_LEVEL AMIGA_BUS_ENABLE:0 -DATA SLEW AMIGA_BUS_ENABLE:0 -DATA PW_LEVEL A_19_:0 -DATA SLEW A_19_:0 -DATA PW_LEVEL AMIGA_BUS_DATA_DIR:0 -DATA SLEW AMIGA_BUS_DATA_DIR:0 -DATA PW_LEVEL A_18_:0 -DATA SLEW A_18_:0 -DATA PW_LEVEL AMIGA_BUS_ENABLE_LOW:0 -DATA SLEW AMIGA_BUS_ENABLE_LOW:0 -DATA PW_LEVEL A_17_:0 -DATA SLEW A_17_:0 -DATA PW_LEVEL CIIN:0 -DATA SLEW CIIN:0 -DATA PW_LEVEL A_16_:0 -DATA SLEW A_16_:0 +DATA PW_LEVEL CLK_DIV_OUT:0 +DATA SLEW CLK_DIV_OUT:0 DATA PW_LEVEL A_0_:0 DATA SLEW A_0_:0 +DATA PW_LEVEL AVEC:0 +DATA SLEW AVEC:0 DATA PW_LEVEL IPL_1_:0 DATA SLEW IPL_1_:0 +DATA PW_LEVEL AVEC_EXP:0 +DATA SLEW AVEC_EXP:0 DATA PW_LEVEL IPL_0_:0 DATA SLEW IPL_0_:0 DATA PW_LEVEL DSACK_0_:0 DATA SLEW DSACK_0_:0 +DATA SLEW VPA:0 +DATA PW_LEVEL FC_0_:0 +DATA SLEW FC_0_:0 +DATA SLEW RST:0 +DATA PW_LEVEL RW:0 +DATA SLEW RW:0 +DATA PW_LEVEL AMIGA_BUS_ENABLE:0 +DATA SLEW AMIGA_BUS_ENABLE:0 +DATA PW_LEVEL AMIGA_BUS_DATA_DIR:0 +DATA SLEW AMIGA_BUS_DATA_DIR:0 +DATA PW_LEVEL AMIGA_BUS_ENABLE_LOW:0 +DATA SLEW AMIGA_BUS_ENABLE_LOW:0 +DATA PW_LEVEL CIIN:0 +DATA SLEW CIIN:0 +DATA PW_LEVEL SIZE_0_:0 +DATA SLEW SIZE_0_:0 +DATA PW_LEVEL A_30_:0 +DATA SLEW A_30_:0 +DATA PW_LEVEL A_29_:0 +DATA SLEW A_29_:0 DATA PW_LEVEL IPL_030_2_:0 DATA SLEW IPL_030_2_:0 DATA PW_LEVEL DSACK_1_:0 @@ -257,22 +254,22 @@ DATA PW_LEVEL BG_000:0 DATA SLEW BG_000:0 DATA PW_LEVEL BGACK_030:0 DATA SLEW BGACK_030:0 -DATA PW_LEVEL CLK_DIV_OUT:0 -DATA SLEW CLK_DIV_OUT:0 +DATA PW_LEVEL CLK_EXP:0 +DATA SLEW CLK_EXP:0 DATA PW_LEVEL FPU_CS:0 DATA SLEW FPU_CS:0 +DATA PW_LEVEL IPL_030_1_:0 +DATA SLEW IPL_030_1_:0 DATA PW_LEVEL DTACK:0 DATA SLEW DTACK:0 +DATA PW_LEVEL IPL_030_0_:0 +DATA SLEW IPL_030_0_:0 DATA PW_LEVEL E:0 DATA SLEW E:0 DATA PW_LEVEL VMA:0 DATA SLEW VMA:0 DATA PW_LEVEL RESET:0 DATA SLEW RESET:0 -DATA PW_LEVEL IPL_030_1_:0 -DATA SLEW IPL_030_1_:0 -DATA PW_LEVEL IPL_030_0_:0 -DATA SLEW IPL_030_0_:0 DATA PW_LEVEL cpu_est_0_:0 DATA SLEW cpu_est_0_:0 DATA PW_LEVEL cpu_est_1_:0 @@ -321,12 +318,6 @@ DATA PW_LEVEL SM_AMIGA_2_:0 DATA SLEW SM_AMIGA_2_:0 DATA PW_LEVEL SM_AMIGA_0_:0 DATA SLEW SM_AMIGA_0_:0 -DATA PW_LEVEL SM_AMIGA_D_0_:0 -DATA SLEW SM_AMIGA_D_0_:0 -DATA PW_LEVEL SM_AMIGA_D_1_:0 -DATA SLEW SM_AMIGA_D_1_:0 -DATA PW_LEVEL SM_AMIGA_D_2_:0 -DATA SLEW SM_AMIGA_D_2_:0 DATA PW_LEVEL RN_IPL_030_2_:0 DATA PW_LEVEL RN_DSACK_1_:0 DATA PW_LEVEL RN_AS_000:0 @@ -335,8 +326,8 @@ DATA PW_LEVEL RN_LDS_000:0 DATA PW_LEVEL RN_BG_000:0 DATA PW_LEVEL RN_BGACK_030:0 DATA PW_LEVEL RN_FPU_CS:0 -DATA PW_LEVEL RN_E:0 -DATA PW_LEVEL RN_VMA:0 DATA PW_LEVEL RN_IPL_030_1_:0 DATA PW_LEVEL RN_IPL_030_0_:0 +DATA PW_LEVEL RN_E:0 +DATA PW_LEVEL RN_VMA:0 END diff --git a/Logic/68030_tk.grp b/Logic/68030_tk.grp index 5197407..5912e58 100644 --- a/Logic/68030_tk.grp +++ b/Logic/68030_tk.grp @@ -1,15 +1,14 @@ -GROUP MACH_SEG_A inst_DTACK_SYNC inst_VPA_D AVEC -GROUP MACH_SEG_B SM_AMIGA_D_1_ SM_AMIGA_D_2_ SM_AMIGA_D_0_ IPL_030_1_ RN_IPL_030_1_ - IPL_030_0_ RN_IPL_030_0_ IPL_030_2_ RN_IPL_030_2_ RESET CLK_EXP +GROUP MACH_SEG_A inst_VPA_SYNC AVEC +GROUP MACH_SEG_B inst_DTACK_SYNC SM_AMIGA_3_ IPL_030_1_ RN_IPL_030_1_ IPL_030_0_ + RN_IPL_030_0_ IPL_030_2_ RN_IPL_030_2_ CLK_EXP RESET GROUP MACH_SEG_C AVEC_EXP AMIGA_BUS_ENABLE_LOW GROUP MACH_SEG_D LDS_000 RN_LDS_000 VMA RN_VMA UDS_000 RN_UDS_000 BG_000 - RN_BG_000 AS_000 RN_AS_000 SM_AMIGA_6_ SM_AMIGA_5_ SM_AMIGA_4_ DTACK + RN_BG_000 AS_000 RN_AS_000 SM_AMIGA_5_ SM_AMIGA_6_ SM_AMIGA_4_ DTACK AMIGA_BUS_ENABLE GROUP MACH_SEG_E CIIN BERR AMIGA_BUS_DATA_DIR -GROUP MACH_SEG_F inst_VPA_SYNC -GROUP MACH_SEG_G E RN_E cpu_est_1_ cpu_est_2_ SM_AMIGA_2_ SM_AMIGA_3_ SM_AMIGA_0_ - SM_AMIGA_7_ SM_AMIGA_1_ cpu_est_0_ inst_CLK_OUT_PRE CLK_CNT_0_ CLK_DIV_OUT +GROUP MACH_SEG_G E RN_E cpu_est_1_ cpu_est_2_ SM_AMIGA_2_ SM_AMIGA_0_ SM_AMIGA_7_ + SM_AMIGA_1_ cpu_est_0_ inst_CLK_OUT_PRE inst_VPA_D CLK_CNT_0_ CLK_DIV_OUT cpu_est_d_3_ cpu_est_d_1_ cpu_est_d_2_ cpu_est_d_0_ GROUP MACH_SEG_H inst_AS_030_000_SYNC FPU_CS RN_FPU_CS DSACK_1_ RN_DSACK_1_ BGACK_030 RN_BGACK_030 inst_RISING_CLK_AMIGA inst_CLK_000_D inst_CLK_000_DD diff --git a/Logic/68030_tk.ipr b/Logic/68030_tk.ipr index 2b14e0d..91e36a6 100644 --- a/Logic/68030_tk.ipr +++ b/Logic/68030_tk.ipr @@ -1 +1 @@ -7526<46^3ðt( \ No newline at end of file +4016<466m'D+v_ \ No newline at end of file diff --git a/Logic/68030_tk.jed b/Logic/68030_tk.jed index 12ba74d..d1d7b73 100644 --- a/Logic/68030_tk.jed +++ b/Logic/68030_tk.jed @@ -10,7 +10,7 @@ AUTHOR: PATTERN: COMPANY: REVISION: -DATE: Thu May 15 22:17:31 2014 +DATE: Thu May 15 22:21:57 2014 ABEL mach447a * @@ -31,50 +31,49 @@ NOTE Spread Placement? Y * NOTE Run Time Upper Bound in 15 minutes 0 * NOTE Zero Hold Time For Input Registers? Y * NOTE Table of pin names and numbers* -NOTE PINS FC_0_:57 SIZE_1_:79 A_31_:4 IPL_2_:68 FC_1_:58* +NOTE PINS A_28_:15 A_27_:16 SIZE_1_:79 A_26_:17 A_25_:18* +NOTE PINS A_31_:4 A_24_:19 A_23_:84 A_22_:85 A_21_:94 IPL_2_:68* +NOTE PINS A_20_:93 A_19_:97 A_18_:95 A_17_:59 FC_1_:58 A_16_:96* NOTE PINS AS_030:82 DS_030:98 CPU_SPACE:14 BERR:41 BG_030:21* NOTE PINS BGACK_000:28 CLK_030:64 CLK_000:11 CLK_OSZI:61* -NOTE PINS SIZE_0_:70 CLK_EXP:10 A_30_:5 A_29_:6 A_28_:15* -NOTE PINS AVEC:92 A_27_:16 AVEC_EXP:22 A_26_:17 A_25_:18* -NOTE PINS VPA:36 A_24_:19 A_23_:84 RST:86 A_22_:85 A_21_:94* -NOTE PINS RW:71 A_20_:93 AMIGA_BUS_ENABLE:34 A_19_:97 AMIGA_BUS_DATA_DIR:48* -NOTE PINS A_18_:95 AMIGA_BUS_ENABLE_LOW:20 A_17_:59 CIIN:47* -NOTE PINS A_16_:96 A_0_:69 IPL_1_:56 IPL_0_:67 DSACK_0_:80* -NOTE PINS IPL_030_2_:9 DSACK_1_:81 AS_000:33 UDS_000:32 LDS_000:31* -NOTE PINS BG_000:29 BGACK_030:83 CLK_DIV_OUT:65 FPU_CS:78* -NOTE PINS DTACK:30 E:66 VMA:35 RESET:3 IPL_030_1_:7 IPL_030_0_:8* +NOTE PINS CLK_DIV_OUT:65 A_0_:69 AVEC:92 IPL_1_:56 AVEC_EXP:22* +NOTE PINS IPL_0_:67 DSACK_0_:80 VPA:36 FC_0_:57 RST:86 RW:71* +NOTE PINS AMIGA_BUS_ENABLE:34 AMIGA_BUS_DATA_DIR:48 AMIGA_BUS_ENABLE_LOW:20* +NOTE PINS CIIN:47 SIZE_0_:70 A_30_:5 A_29_:6 IPL_030_2_:9* +NOTE PINS DSACK_1_:81 AS_000:33 UDS_000:32 LDS_000:31 BG_000:29* +NOTE PINS BGACK_030:83 CLK_EXP:10 FPU_CS:78 IPL_030_1_:7* +NOTE PINS DTACK:30 IPL_030_0_:8 E:66 VMA:35 RESET:3 * NOTE Table of node names and numbers* -NOTE NODES RN_IPL_030_2_:131 RN_DSACK_1_:281 RN_AS_000:181 * +NOTE NODES RN_IPL_030_2_:131 RN_DSACK_1_:287 RN_AS_000:187 * NOTE NODES RN_UDS_000:191 RN_LDS_000:185 RN_BG_000:175 RN_BGACK_030:275 * -NOTE NODES RN_FPU_CS:269 RN_DTACK:173 RN_E:251 RN_VMA:179 * -NOTE NODES RN_IPL_030_1_:143 RN_IPL_030_0_:137 cpu_est_0_:253 * -NOTE NODES cpu_est_1_:248 cpu_est_d_0_:268 cpu_est_d_3_:262 * -NOTE NODES inst_AS_030_000_SYNC:277 inst_DTACK_SYNC:113 * -NOTE NODES inst_VPA_D:101 inst_VPA_SYNC:221 inst_CLK_000_D:271 * -NOTE NODES inst_CLK_000_DD:289 inst_CLK_OUT_PRE:260 cpu_est_d_1_:256 * -NOTE NODES cpu_est_d_2_:250 cpu_est_2_:247 CLK_CNT_0_:266 * -NOTE NODES SM_AMIGA_6_:176 SM_AMIGA_7_:254 inst_RISING_CLK_AMIGA:283 * -NOTE NODES SM_AMIGA_1_:263 SM_AMIGA_4_:193 SM_AMIGA_3_:257 * -NOTE NODES SM_AMIGA_5_:182 SM_AMIGA_2_:265 SM_AMIGA_0_:259 * -NOTE NODES SM_AMIGA_D_0_:134 SM_AMIGA_D_1_:145 SM_AMIGA_D_2_:139 * +NOTE NODES RN_FPU_CS:269 RN_IPL_030_1_:143 RN_DTACK:173 * +NOTE NODES RN_IPL_030_0_:137 RN_E:248 RN_VMA:181 cpu_est_0_:257 * +NOTE NODES cpu_est_1_:254 cpu_est_d_0_:268 cpu_est_d_3_:262 * +NOTE NODES inst_AS_030_000_SYNC:281 inst_DTACK_SYNC:139 * +NOTE NODES inst_VPA_D:247 inst_VPA_SYNC:101 inst_CLK_000_D:272 * +NOTE NODES inst_CLK_000_DD:289 inst_CLK_OUT_PRE:263 cpu_est_d_1_:256 * +NOTE NODES cpu_est_d_2_:250 cpu_est_2_:251 CLK_CNT_0_:266 * +NOTE NODES SM_AMIGA_6_:182 SM_AMIGA_7_:259 inst_RISING_CLK_AMIGA:283 * +NOTE NODES SM_AMIGA_1_:253 SM_AMIGA_4_:193 SM_AMIGA_3_:133 * +NOTE NODES SM_AMIGA_5_:188 SM_AMIGA_2_:260 SM_AMIGA_0_:265 * NOTE BLOCK 0 * L000000 111111111111111111111111111111111111111111111111111111111111111111 111111111011111111111111111111111111111111111111111111111111111111 - 111111111111111111111111111011111111111111111111111111111111111111 + 111111111110111111111011111111111111111111111111111111110111111111 + 111110111111111111111111111111111111111111111110111111111111111111 + 111111111111111111111111111111111111111111111111101111111111111111 111111111111111111111111111111111111111111111111111111111111111111 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111111111111111111111111111111111111111111111111111 - 111111011111111111111111111101111111111111111111111111111111111111 - 111111111111111111101111111111111111111111111111111111111111111111 - 101111111111111111110111101111011111111111111111111111111111111111* + 111111111111110111101111111111111111111111111111111111111111111111 + 101111111111111111111111111110011111111111111111111111111111111111* L000594 000000000000000000000000000000000000000000000000000000000000000000* -L000660 111111111111111111110111111111111111111111111111111111111111111111* -L000726 111111110111111111111111111111111111111111111111111111111111111111* +L000660 111111111111111111101111111111101111111111111111111111111111111111* +L000726 111101111110111011111011111101111111111111111101101111110111111111* L000792 000000000000000000000000000000000000000000000000000000000000000000* -L000858 111111111111111111111111111111111111111111111111111111111111111111* -L000924 111111111111111111111111111111111111111111111111111111111111111111* +L000858 000000000000000000000000000000000000000000000000000000000000000000* +L000924 000000000000000000000000000000000000000000000000000000000000000000* L000990 111111111111111111111111111111111111111111111111111111111111111111* L001056 111111111111111111111111111111111111111111111111111111111111111111* L001122 111111111111111111111111111111111111111111111111111111111111111111* @@ -118,11 +117,11 @@ L003366 111111111111111111111111111111111111111111111111111111111111111111* L003432 111111111111111111111111111111111111111111111111111111111111111111* L003498 000000000000000000000000000000000000000000000000000000000000000000* -L003564 111111101111111111101111111111111111111111111111111111111111111111* -L003630 111111111111111111111111010110011111111111111111111111111111111111* -L003696 000000000000000000000000000000000000000000000000000000000000000000* -L003762 000000000000000000000000000000000000000000000000000000000000000000* -L003828 000000000000000000000000000000000000000000000000000000000000000000* +L003564 111111111111111111111111111111111111111111111111111111111111111111* +L003630 111111111111111111111111111111111111111111111111111111111111111111* +L003696 111111111111111111111111111111111111111111111111111111111111111111* +L003762 111111111111111111111111111111111111111111111111111111111111111111* +L003828 111111111111111111111111111111111111111111111111111111111111111111* L003894 111111111111111111111111111111111111111111111111111111111111111111* L003960 111111111111111111111111111111111111111111111111111111111111111111* L004026 111111111111111111111111111111111111111111111111111111111111111111* @@ -168,7 +167,7 @@ L006402 000000000000000000000000000000000000000000000000000000000000000000 101111111111111111111111111111111111111111111111111111111111111111* L006534 0010* -L006538 00011110000000* +L006538 11100110010000* L006552 11011011111110* L006566 11110011110101* L006580 11110111111111* @@ -176,44 +175,44 @@ L006594 00110011111000* L006608 11000111110011* L006622 11110011110001* L006636 11110111110011* -L006650 11100110010000* -L006664 11000011110011* -L006678 11111011110001* -L006692 11110111110011* -L006706 11111111110000* -L006720 11110011110011* -L006734 11111011110001* -L006748 11110111110011* +L006650 11110011110000* +L006664 11111011110011* +L006678 11110111110001* +L006692 11111111110011* +L006706 11110011110000* +L006720 11111011110011* +L006734 11110111110001* +L006748 11111111110011* NOTE BLOCK 1 * L006762 - 111111111111111011101111011111111111111111011111111111111111111111 - 111111111111011111111011111111111111111111111111111111111110111111 - 111101101111111101111111111011111111111111111011111111111111111111 - 111111111111111111111111111111111011111111111111111111011111111111 - 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111111011111111011111111111111111111111111111111111111111 + 111111111111011111111111111111111111111111111111111111111110111111 + 111111101011111101111111111111111111111111111111111111110111111111 + 101111111111111111111111111111111111111111111111111111011111111111 + 111111111111111111111111111111111111111111111111101111111111111111 110111111111111111111111111111111111111111111111111111111111111111 - 111111111110111111111111111111111111111111111111111111111111111111 - 111111110111111111111111111111111111111111111111111111111111111111 - 101111111111111111111111111111111111111111111111111111110111111111* + 111111111110111111111111111111111111111111111101111111111111111111 + 111111111111111111101111111111111111111111111111111111111111111111 + 111111111111111111111111111110011111111111101111111111111111111111* L007356 111111111111111111111111111111111111111111111111111111111111111111* -L007422 111101111111011111110111111111111111111111011111111111111111111111* -L007488 111111111111111111110111111111111111111111111111111111111111111111* -L007554 111001111111111111101111111111111111111111111111111111111011111111* -L007620 111110111111111111111111111111111111111111111111111111110111111111* -L007686 110110111111111111111111111111111111111111111111111111111111111111* -L007752 111110111111111111011111111111111111111111111111111111111111111111* -L007818 111011111011111011111111111111111111111111011111111111111111111111* -L007884 111111111111110111111111111111111111111111101111111111111111111111* -L007950 110111111111111111111111111111111111111111101111111111111111111111* -L008016 111111110111111111111111111111111111111111101111111111111111111111* +L007422 111111111111110111111111111111111111111111111111111111111111111111* +L007488 111111111111111111111111111111111111111111111111111111111101111111* +L007554 000000000000000000000000000000000000000000000000000000000000000000* +L007620 000000000000000000000000000000000000000000000000000000000000000000* +L007686 000000000000000000000000000000000000000000000000000000000000000000* +L007752 111111111111111111111111111111111111111111011111111111111111111111* +L007818 111111111111111111111111111111111111111111111111111111111101111111* +L007884 000000000000000000000000000000000000000000000000000000000000000000* +L007950 111111111111111111111111111111111111111111111111111111111111111111* +L008016 111111111111111111111111111111111111111111111111111111111111111111* L008082 111111111111111111111111111111111111111111111111111111111111111111* -L008148 111111111111011011101111111011111111111111111111111111111111111111* -L008214 111111111111100111111111111111111111111111111111111111111111111111* -L008280 111111111111101111111111110111111111111111111111111111111111111111* -L008346 111111111111101111011111111111111111111111111111111111111111111111* -L008412 000000000000000000000000000000000000000000000000000000000000000000* +L008148 111111111111111111111111111111111111111111111111111111111111111111* +L008214 111111111111111111111111111111111111111111111111111111111111111111* +L008280 111111111111111111111111111111111111111111111111111111111111111111* +L008346 111111111111111111111111111111111111111111111111111111111111111111* +L008412 111111111111111111111111111111111111111111111111111111111111111111* L008478 111111111111111111111111111111111111111111111111111111111111111111* L008544 111111111111111111111111111111111111111111111111111111111111111111* L008610 111111111111111111111111111111111111111111111111111111111111111111* @@ -221,23 +220,23 @@ L008676 111111111111111111111111111111111111111111111111111111111111111111* L008742 111111111111111111111111111111111111111111111111111111111111111111* L008808 111111111111111111111111111111111111111111111111111111111111111111* -L008874 111111111101111111111111111111111111111111110111111111111111111111* +L008874 111111110101111111111111111111111111111111111111111111111111111111* L008940 111111111110111111111111111111111111111111111111111111011111111111* L009006 000000000000000000000000000000000000000000000000000000000000000000* L009072 000000000000000000000000000000000000000000000000000000000000000000* L009138 000000000000000000000000000000000000000000000000000000000000000000* -L009204 011111111111111111111111111111111111111111111111111111111111111111* -L009270 111111111111111111111111111111111111111111111111111111111101111111* -L009336 000000000000000000000000000000000000000000000000000000000000000000* -L009402 111111111111111111111111111111111111111111111111111111111111111111* -L009468 111111111111111111111111111111111111111111111111111111111111111111* +L009204 110111111111111111111111111101111111111111111111111111111111111111* +L009270 111111111111011111111111111111011111111111111111111111110111111111* +L009336 111111111111111111111111111101111111111111111111111111110111111111* +L009402 000000000000000000000000000000000000000000000000000000000000000000* +L009468 000000000000000000000000000000000000000000000000000000000000000000* L009534 111111111111111111111111111111111111111111111111111111111111111111* -L009600 011011111111111111101011111111111111111111111111111111111011111111* -L009666 111111111111111111111111111111111111111111111111111111111101111111* -L009732 000000000000000000000000000000000000000000000000000000000000000000* -L009798 101110111111111111111111111111111111111111111111111111111111111111* -L009864 000000000000000000000000000000000000000000000000000000000000000000* +L009600 111111111111111111111111111111111111111111111111111111111111111111* +L009666 111111111111111111111111111111111111111111111111111111111111111111* +L009732 111111111111111111111111111111111111111111111111111111111111111111* +L009798 111111111111111111111111111111111111111111111111111111111111111111* +L009864 111111111111111111111111111111111111111111111111111111111111111111* L009930 111111111111111111111111111111111111111111111111111111111111111111* L009996 111111111111111111111111111111111111111111111111111111111111111111* L010062 111111111111111111111111111111111111111111111111111111111111111111* @@ -245,15 +244,15 @@ L010128 111111111111111111111111111111111111111111111111111111111111111111* L010194 111111111111111111111111111111111111111111111111111111111111111111* L010260 000000000000000000000000000000000000000000000000000000000000000000* -L010326 111111111101111111111111111111110111111111111111111111111111111111* +L010326 011111111101111111111111111111111111111111111111111111111111111111* L010392 111111111110111101111111111111111111111111111111111111111111111111* L010458 000000000000000000000000000000000000000000000000000000000000000000* L010524 000000000000000000000000000000000000000000000000000000000000000000* L010590 000000000000000000000000000000000000000000000000000000000000000000* -L010656 011111111111111011101011111011111111111111111111111111111111111111* -L010722 111111111111111111111111111111111111111111111111111111111101111111* +L010656 111111111111101111101111111111111111111111111111111111111111111111* +L010722 111111111111111111111111111101111111111111111110011111110111111111* L010788 000000000000000000000000000000000000000000000000000000000000000000* -L010854 101111111111101111111111111111111111111111111111111111111111111111* +L010854 000000000000000000000000000000000000000000000000000000000000000000* L010920 000000000000000000000000000000000000000000000000000000000000000000* L010986 000000000000000000000000000000000000000000000000000000000000000000* @@ -274,11 +273,11 @@ L011844 111111111110111111111111011111111111111111111111111111111111111111* L011910 000000000000000000000000000000000000000000000000000000000000000000* L011976 000000000000000000000000000000000000000000000000000000000000000000* L012042 000000000000000000000000000000000000000000000000000000000000000000* -L012108 011011111011111011111011111111111111111111111111111111111111111111* -L012174 111111111111111111111111111111111111111111111111111111111101111111* -L012240 000000000000000000000000000000000000000000000000000000000000000000* -L012306 101111111111111111111111111111111111111111101111111111111111111111* -L012372 000000000000000000000000000000000000000000000000000000000000000000* +L012108 111111111111111111111111111111111111111111111111111111111111111111* +L012174 111111111111111111111111111111111111111111111111111111111111111111* +L012240 111111111111111111111111111111111111111111111111111111111111111111* +L012306 111111111111111111111111111111111111111111111111111111111111111111* +L012372 111111111111111111111111111111111111111111111111111111111111111111* L012438 111111111111111111111111111111111111111111111111111111111111111111* L012504 111111111111111111111111111111111111111111111111111111111111111111* @@ -293,24 +292,24 @@ L013032 111111111111111111111111111111111111111111111111111111111111111111* L013098 111111111111111111111111111111111111111111111111111111111111111111* L013164 000000000000000000000000000000000000000000000000000000000000000000 - 101111111111111111111111111111111111111111111111111111111111111111* + 111111111111111111111111111111111111111111101111111111111111111111* L013296 0010* -L013300 00100011110000* -L013314 11111111111111* -L013328 11001011110100* -L013342 11110011111110* -L013356 10100110010011* -L013370 00001110001111* -L013384 11101110000110* -L013398 11100111111111* -L013412 10100110011001* -L013426 11101110000011* +L013300 00101110000000* +L013314 00011110001110* +L013328 11011111110100* +L013342 11111011111111* +L013356 10100110010010* +L013370 10100100011110* +L013384 11011111110111* +L013398 11111011111111* +L013412 10100110011000* +L013426 11100110010010* L013440 11010011110000* -L013454 11111011110010* +L013454 11111011110011* L013468 10100110011000* -L013482 11101110000011* -L013496 11010111111111* -L013510 11111111111111* +L013482 11001111110010* +L013496 11110011111101* +L013510 11111011111111* NOTE BLOCK 2 * L013524 111111111111111111111111111111111111111111111111111111111111111111 @@ -440,104 +439,104 @@ L020258 11110111110101* L020272 11111111111111* NOTE BLOCK 3 * L020286 - 111111111111111111111111111111111111101110111111111111111111111111 - 111111110101111111111111111111111110111111111111111010111111111111 - 111111111111111110111111111111101111111111111110111111111111111111 - 111110111111111111111111111111111111111111111011101111111111111011 - 111111111111111111111111011111111111111111111111111111111111111110 - 110111111111101111111101111111111111111111111111111111111011111111 - 111111111111111111111011111111110111111111111111111111111111111111 - 101111111111110111101111111001111111111111111111111111111111011111 - 111111011111111111111111111111111111111011101111111111011101111111* + 111111111111111111111111111111111111101111111111111111111011111111 + 111111111111111110101111111110011111111111110111111111101111111111 + 101111111111111111111111111011111111111111111111111110111110111111 + 111110111111111111111111111111111111111111111111111111111111101011 + 111111111111111111111111011111111111111111111111101111111111111111 + 110111111101101011111111111111111111111101111111111111111111111111 + 111111101111111111111011111111111111111111111111110111111111111101 + 111111111111111111111101111111110111111011111110111111111111111111 + 111111111011111111111111111111111101111111101111111111111111111111* L020880 111111111111111111111111111111111111111111111111111111111111111111* -L020946 111111111111111011111011111111111111111111111111111111111111111111* +L020946 111111111111111111111011111111111111111111111111111011111111111111* L021012 000000000000000000000000000000000000000000000000000000000000000000* L021078 000000000000000000000000000000000000000000000000000000000000000000* L021144 000000000000000000000000000000000000000000000000000000000000000000* L021210 000000000000000000000000000000000000000000000000000000000000000000* -L021276 111111111011111111111111111111111111111101111111111111101111111111* -L021342 111111011010111111011111111111111111111110111111111111111111111111* -L021408 111111111010111111011111111111111111111110111101111111111111111111* +L021276 111111111111111111111111111111100111110111111011111111111011111111* +L021342 111111111111111111111111111111101111110111111011111111011011111111* +L021408 111111111111111111111111111111111110111111111011111111110111111111* L021474 000000000000000000000000000000000000000000000000000000000000000000* L021540 000000000000000000000000000000000000000000000000000000000000000000* L021606 111111111111111111111111111111111111111111111111111111111111111111* -L021672 111111111111111111111111111011111111110111111111111111111011111111* -L021738 111111111111111111111111111111111111110111111101111111111111111111* -L021804 111111101111111111111111111111111111111111111110111111111111111111* -L021870 000000000000000000000000000000000000000000000000000000000000000000* -L021936 000000000000000000000000000000000000000000000000000000000000000000* +L021672 000000000000000000000000000000000000000000000000000000000000000000* +L021738 111111111111111111111111111111111111111111111111111111111111111111* +L021804 111111111111111111111111111111111111111111111111111111111111111111* +L021870 111111111111111111111111111111111111111111111111111111111111111111* +L021936 111111111111111111111111111111111111111111111111111111111111111111* L022002 111111111111111111111111111111111111111111111111111111111111111111* L022068 111111111111111111111111111111111111111111111111111111111111111111* L022134 111111111111111111111111111111111111111111111111111111111111111111* L022200 111111111111111111111111111111111111111111111111111111111111111111* L022266 111111111111111111111111111111111111111111111111111111111111111111* L022332 - 011111111111111111111111111111111111111111111111111111111111111111* -L022398 111111111111110101111111111110111111100111111111011110111111111111* -L022464 111110111111111111111111111101111111111011110111111111111110111001* -L022530 000000000000000000000000000000000000000000000000000000000000000000* -L022596 000000000000000000000000000000000000000000000000000000000000000000* -L022662 000000000000000000000000000000000000000000000000000000000000000000* -L022728 111111111111111011101111111111111111111111111111111111111111111111* -L022794 111111011111111111111111111011111111110111111111111111111011111111* + 111111111111111111111111111111111111111111111101111111111111111111* +L022398 111111111111111111111111111111111111111111111111111111111111111111* +L022464 111111111111111111111111111111111111111111111111111111111111111111* +L022530 111111111111111111111111111111111111111111111111111111111111111111* +L022596 111111111111111111111111111111111111111111111111111111111111111111* +L022662 111111111111111111111111111111111111111111111111111111111111111111* +L022728 111111110111111111101110111111111111101111111111110101111111011111* +L022794 111101111011111111111101110111111111111111111111101111111110111011* L022860 000000000000000000000000000000000000000000000000000000000000000000* L022926 000000000000000000000000000000000000000000000000000000000000000000* L022992 000000000000000000000000000000000000000000000000000000000000000000* L023058 - 011111111111111111111111111111111111111111111111111111111111111111* -L023124 111111011111111111111111111011111111110111111111111111111011111111* -L023190 111111111111111111111111111111111111110111111111111111111111011111* -L023256 000000000000000000000000000000000000000000000000000000000000000000* + 111111111111111111111111111111111111111111111101111111111111111111* +L023124 111111100111111011111111111111111111111111111111111111111111111111* +L023190 111111110111111111111111111111111011111111111111111111111111111111* +L023256 111111111111111111111111111111111011111111111111111111101111111111* L023322 000000000000000000000000000000000000000000000000000000000000000000* L023388 000000000000000000000000000000000000000000000000000000000000000000* -L023454 111111111111111111111111111111111111111111111111111111111111111111* -L023520 111111111111111111111111111111111111111111111111111111111111111111* -L023586 111111111111111111111111111111111111111111111111111111111111111111* -L023652 111111111111111111111111111111111111111111111111111111111111111111* -L023718 111111111111111111111111111111111111111111111111111111111111111111* +L023454 111111100111011001111111101111110111111111111111111111111111111111* +L023520 111111100111111001111111101110110111111111111111111111111111111111* +L023586 011111100111111001111111101111110111111111111111111111111111111111* +L023652 111111111111111111111111011111111111111011111111111111111111111110* +L023718 111111011111111101111111111111111111111011111111111111111111111110* L023784 - 011111111111111111111111111111111111111111111111111111111111111111* -L023850 111111011111011111111111101011111111110111111111110111111011111111* -L023916 111111011111111111111111101011111110110111111111110111111011111111* -L023982 111111011111111111111111101011011111110111111111110111111011111111* -L024048 111111111111111111101111011111111011111111111111111111111111111111* -L024114 111111111111111111101111110111111011111111111111110111111111111111* -L024180 000000000000000000000000000000000000000000000000000000000000000000* -L024246 111111111111111111101111111111111011111011111111111111111111111111* -L024312 111111111111111111101111111111111011111111111111110111110111111111* -L024378 111111101111111111101111111111111011111111111111110111111111111111* -L024444 110111111111011111111111101111111111110111111111111011111111111111* + 111111111111111111111111111111111111111111111101111111111111111111* +L023850 111111111011111111111111111111111111111011111111111111111111111110* +L023916 111111111111110101111111111111111111111011111111111111111111111110* +L023982 111111111111111101111111111111111011111011111111111111111111111110* +L024048 110111110111011110111111101111111111111111111111111111111111111111* +L024114 110111110111111110111111101110111111111111111111111111111111111111* +L024180 010111110111111110111111101111111111111111111111111111111111111111* +L024246 111011111111111110111111111111111111111011111111111111111111111110* +L024312 000000000000000000000000000000000000000000000000000000000000000000* +L024378 000000000000000000000000000000000000000000000000000000000000000000* +L024444 000000000000000000000000000000000000000000000000000000000000000000* L024510 - 101111111111111111111111111111111111111111111111111111111111111111* -L024576 110111111111111111111111101111111110110111111111111011111111111111* -L024642 110111111111111111111111101111011111110111111111111011111111111111* -L024708 111011111111111111101111111111111011111111111111111011111111111111* + 111111111111111111111111111111111111111111111110111111111111111111* +L024576 111111100111111011111111111111110111111111111111111111111111111111* +L024642 111111110111111111111111111111111111111101111111111111111111111111* +L024708 000000000000000000000000000000000000000000000000000000000000000000* L024774 000000000000000000000000000000000000000000000000000000000000000000* L024840 000000000000000000000000000000000000000000000000000000000000000000* -L024906 111111111111111111111111111111111111111111111111111111111111111111* -L024972 111111111111111111111111111111111111111111111111111111111111111111* -L025038 111111111111111111111111111111111111111111111111111111111111111111* -L025104 111111111111111111111111111111111111111111111111111111111111111111* -L025170 111111111111111111111111111111111111111111111111111111111111111111* +L024906 111111111111111111111111111111111111111011111111111011111111111111* +L024972 111111100111111011111111111111110111111111111111111111111111111111* +L025038 000000000000000000000000000000000000000000000000000000000000000000* +L025104 000000000000000000000000000000000000000000000000000000000000000000* +L025170 000000000000000000000000000000000000000000000000000000000000000000* L025236 111111111111111111111111111111111111111111111111111111111111111111* -L025302 111111011111111111111111101011101111110111111111110111111011111111* -L025368 111111111111111111101110011111111111111111111111111111111111111111* -L025434 111111111111111111101110110111111111111111111111110111111111111111* -L025500 111111111111111111101110111111111111111011111111111111111111111111* -L025566 111111111111111111101110111111111111111111111111110111110111111111* -L025632 110111111111111111111111111111111111111011111111111111111111111111* -L025698 111111111111111111111111111111111111111011111111111111111111011111* +L025302 101111100111111001111111101111110111111111111111111111111111111111* +L025368 111111111110111111111111011111111111111011111111111111111111111111* +L025434 111111011110111101111111111111111111111011111111111111111111111111* +L025500 111111111010111111111111111111111111111011111111111111111111111111* +L025566 111111111110110101111111111111111111111011111111111111111111111111* +L025632 110111111011111111111111111111111111111111111111111111111111111111* +L025698 111111111011111111111111111111111111111101111111111111111111111111* L025764 000000000000000000000000000000000000000000000000000000000000000000* L025830 000000000000000000000000000000000000000000000000000000000000000000* L025896 000000000000000000000000000000000000000000000000000000000000000000* L025962 000000000000000000000000000000000000000000000000000000000000000000* -L026028 111111101111111111101110111111111111111111111111110111111111111111* -L026094 110111111111111111111111101111101111110111111111111011111111111111* -L026160 111011111111111111101110111111111111111111111111111011111111111111* +L026028 111111111110111101111111111111111011111011111111111111111111111111* +L026094 100111110111111110111111101111111111111111111111111111111111111111* +L026160 111011111110111110111111111111111111111011111111111111111111111111* L026226 000000000000000000000000000000000000000000000000000000000000000000* L026292 000000000000000000000000000000000000000000000000000000000000000000* L026358 111111111111111111111111111111111111111111111111111111111111111111* @@ -549,22 +548,22 @@ L026688 000000000000000000000000000000000000000000000000000000000000000000 111111111111111111111111111111111111111111101111111111111111111111* L026820 0010* -L026824 01100110010010* +L026824 01100110011010* L026838 11100110011110* -L026852 11100100011110* -L026866 11100011111111* -L026880 10100111011001* -L026894 11100110011111* -L026908 10100100010110* -L026922 11101111111111* -L026936 11100110010001* -L026950 00111011111111* -L026964 11001111110110* -L026978 11110011110010* +L026852 00011111110000* +L026866 11011011111111* +L026880 11110011111010* +L026894 10100111011110* +L026908 11100100010111* +L026922 11011011111111* +L026936 11100110010000* +L026950 11110110011111* +L026964 10100100010111* +L026978 11000011110011* L026992 11100110011010* -L027006 10100100011111* -L027020 11001011110000* -L027034 11111111110010* +L027006 10100100011110* +L027020 11001011110001* +L027034 11111111110011* NOTE BLOCK 4 * L027048 111111111111111111111111111111111111111111111111111111111111111111 @@ -695,21 +694,21 @@ L033796 11111111111111* NOTE BLOCK 5 * L033810 111111111111111111111111111111111111111111111111111111111111111111 - 111111111011111111111111111111111111111111111111111111111111111111 - 111111111111111111111111111011111111111111111111111111111111111111 - 111110101111111111111111111111111111111111111110111111111111111111 - 111111111110111111111111111111111111111111111111101111111111111111 111111111111111111111111111111111111111111111111111111111111111111 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111100111111111111111111111111111111111111111111111 - 101111111111111111111111101111011111111111111111111111111111111111* + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111111111111111111111111111111111111111111111111111111111* L034404 000000000000000000000000000000000000000000000000000000000000000000* -L034470 111111111110111111101111111111111111111111111111111111111111111111* -L034536 111101101111111111111011010111101111111111111110011111111111111111* -L034602 000000000000000000000000000000000000000000000000000000000000000000* -L034668 000000000000000000000000000000000000000000000000000000000000000000* -L034734 000000000000000000000000000000000000000000000000000000000000000000* +L034470 111111111111111111111111111111111111111111111111111111111111111111* +L034536 111111111111111111111111111111111111111111111111111111111111111111* +L034602 111111111111111111111111111111111111111111111111111111111111111111* +L034668 111111111111111111111111111111111111111111111111111111111111111111* +L034734 111111111111111111111111111111111111111111111111111111111111111111* L034800 111111111111111111111111111111111111111111111111111111111111111111* L034866 111111111111111111111111111111111111111111111111111111111111111111* L034932 111111111111111111111111111111111111111111111111111111111111111111* @@ -801,10 +800,10 @@ L040080 111111111111111111111111111111111111111111111111111111111111111111* L040146 111111111111111111111111111111111111111111111111111111111111111111* L040212 000000000000000000000000000000000000000000000000000000000000000000 - 101111111111111111111111111111111111111111111111111111111111111111* -L040344 0010* -L040348 11100110011110* -L040362 11011011111110* + 000000000000000000000000000000000000000000000000000000000000000000* +L040344 0000* +L040348 11010011111110* +L040362 11110111111111* L040376 11110011111111* L040390 11110111110011* L040404 11110011111110* @@ -821,107 +820,107 @@ L040544 11110111111111* L040558 11111111111111* NOTE BLOCK 6 * L040572 - 111111111111111111101011111110111111111111111111111111111111111111 - 111111111011111111111111101111111111111111111011111111111111111111 - 111111111111111111111111111011111111111111111110111111111111111111 - 111110111111111111111111111111111111111111111111111111111111111010 - 111111111110111111111111111111111111111111111111101111111111111111 - 110111111111111011111111111111111111111111111111111111111111111111 - 111111011111111111111111111111111111111111111111111111111111111111 - 111111111111111111111101111111111111111111111111111111111111111111 - 101111111111111111111111111111111111111011111111111111111111111111* + 111111111111111111101110111110111111111111111111111111111111111111 + 111111111110011111111111101111111111111111101111111111111111111111 + 111111111111111111111111111011111111111111111111111111110110111111 + 111110101111111111111111111111111111111111111110111111111111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111111011111111111111111111111111111111111111111111111111 + 111111111111111111111111111111111111111111111111110111111111111111 + 111111111111111111111111111111111111111111111111111111111111111111 + 101111111011111111110111111111011111111111111111111111111111111111* L041166 111111111111111111111111111111111111111111111111111111111111111111* -L041232 111111111111111111111111111111111111111111110111111111111111111111* +L041232 111111111111111111111111111101111111111111111111111111111111111111* L041298 000000000000000000000000000000000000000000000000000000000000000000* L041364 000000000000000000000000000000000000000000000000000000000000000000* L041430 000000000000000000000000000000000000000000000000000000000000000000* L041496 000000000000000000000000000000000000000000000000000000000000000000* -L041562 111111111111111111111111111111111111111111111111011111111111111111* -L041628 111101111111111011111111111111111111110111111111101111111111111101* -L041694 111111111111111011111111111111111111110111111111101111111111111010* -L041760 111110111111111011111111111111111111110111111111011111111111111001* +L041562 111111111111111111110111111111111111111111111111111111111111111111* +L041628 000000000000000000000000000000000000000000000000000000000000000000* +L041694 000000000000000000000000000000000000000000000000000000000000000000* +L041760 000000000000000000000000000000000000000000000000000000000000000000* L041826 000000000000000000000000000000000000000000000000000000000000000000* L041892 111111111111111111111111111111111111111111111111111111111111111111* -L041958 111101111111111011111111111111111111110111111111111111111111111010* -L042024 111110111111111011111111111111111111110111111111011111111111111101* -L042090 111101111111111011111111111111111111110111111111101111111111110101* -L042156 111110111111111011111111111111111111110111111111101111111111111011* +L041958 111101110111111011111111110111111111111111111101111111111101111111* +L042024 111110110111111011111111110111111111111111111110111111111101111111* +L042090 111110110111111011111111111011111111111111111110111111111110111111* +L042156 000000000000000000000000000000000000000000000000000000000000000000* L042222 000000000000000000000000000000000000000000000000000000000000000000* -L042288 111111111111111111111111111111111111111111111111011111111111111111* +L042288 111101111111111111111111111111111111111111111111111111111111111111* L042354 000000000000000000000000000000000000000000000000000000000000000000* L042420 000000000000000000000000000000000000000000000000000000000000000000* L042486 000000000000000000000000000000000000000000000000000000000000000000* L042552 000000000000000000000000000000000000000000000000000000000000000000* L042618 000000000000000000000000000000000000000000000000000000000000000000* -L042684 111101111111111011111111111111111111110111111111011111111111110101* -L042750 111110111111111011111111111111111111110111111111101111111111110101* -L042816 111110111111111011111111111111111111110111111111101111111111111010* -L042882 000000000000000000000000000000000000000000000000000000000000000000* +L042684 111101111111111111111111111111111111111111111111111111111111111111* +L042750 111110110111111011111111110111111111111111111101111111111111111111* +L042816 111110110111111011111111111011111111111111111111111111111110111111* +L042882 111101110111111011111111110111111111111111111110111111111110111111* L042948 000000000000000000000000000000000000000000000000000000000000000000* -L043014 111111111111111111111111111111111111111011111111111111111111111101* -L043080 111111111111110111111111111111111111111111111111111111111111111101* -L043146 111111111111111011111111111111111111110111111111111111111111111110* -L043212 000000000000000000000000000000000000000000000000000000000000000000* -L043278 000000000000000000000000000000000000000000000000000000000000000000* +L043014 111111010111111111111111111111111111111111111111111111111111111111* +L043080 111111111111111111111111111111111111111111011111111111111111111111* +L043146 101111111111111111111111111111111111111111111111111111111111111111* +L043212 111111110101111111111111111111111111111111111111111111111111111111* +L043278 111111011110111111111111111110111111111111111111111111111111111111* L043344 000000000000000000000000000000000000000000000000000000000000000000* -L043410 111111111111111111111111111111111111110111111101111111111111111111* -L043476 111111110111111111111111111111111111111111111111111111111111111111* -L043542 101111111111111111111111111111111111111111111111111111111111111111* -L043608 111111111111111111111101011111111111110111111111111111111111111111* +L043410 111111110111111011111111111011111111111111111101111111111110111111* +L043476 111101110111111011111111110111111111111111111110111111111111111111* +L043542 111110110111111011111111110111111111111111111101111111111101111111* +L043608 111110110111111011111111111111111111111111111110111111111110111111* L043674 000000000000000000000000000000000000000000000000000000000000000000* -L043740 111111111111111111111111111111111111111111111111111111111111110111* +L043740 111111111111111111111111111111111111111111111111111111111101111111* L043806 000000000000000000000000000000000000000000000000000000000000000000* L043872 000000000000000000000000000000000000000000000000000000000000000000* L043938 000000000000000000000000000000000000000000000000000000000000000000* L044004 000000000000000000000000000000000000000000000000000000000000000000* L044070 000000000000000000000000000000000000000000000000000000000000000000* -L044136 110111111111111111111111111111111111110111111111111111111111111111* -L044202 111111110111111111111111111111111111111111111111111111111111111111* -L044268 101111111111111111111111111111111111111111111111111111111111111111* -L044334 111111011101111111111111110111111111111111111111111111111111111111* -L044400 111111111111111111111111110111111111110111111111111111111111111111* -L044466 111111111111111111111111111101111111111011110111111111111111111111* -L044532 111111110111111111111111111111111111111111111111111111111111111111* +L044136 111111111011111111111111110111111111111111111111111111111111111111* +L044202 111111111111110111111111110111111111111111111111111111111111111111* +L044268 111111110111111011111111111011111111111111111111111111111111111111* +L044334 000000000000000000000000000000000000000000000000000000000000000000* +L044400 000000000000000000000000000000000000000000000000000000000000000000* +L044466 111111110111111111111111011111111111111111111111111111111111111111* +L044532 111111111111111111111111111111111111111111011111111111111111111111* L044598 101111111111111111111111111111111111111111111111111111111111111111* -L044664 111111111111111111111110011111111111111111111111111111111111111111* -L044730 111111111111111111111111011111111111111011111111111111111111111111* +L044664 111111110111111111011111111111111111111111111111110111111111111111* +L044730 000000000000000000000000000000000000000000000000000000000000000000* L044796 000000000000000000000000000000000000000000000000000000000000000000* -L044862 111111111111111111110111111111111111111111111011111111111111111111* -L044928 111111111111111111111011111111111111111111110111111111111111111111* -L044994 000000000000000000000000000000000000000000000000000000000000000000* -L045060 000000000000000000000000000000000000000000000000000000000000000000* -L045126 000000000000000000000000000000000000000000000000000000000000000000* -L045192 111101111111111111111111111111111111111111111111111111111111111111* +L044862 111111111011101111111111111111111111111111111111111111110111111111* +L044928 111111111111111111111111111111111111111111011111111111111111111111* +L044994 101111111111111111111111111111111111111111111111111111111111111111* +L045060 111111111011111111111111111111101111111111111111111111110111111111* +L045126 111111111001111111111111111111111111111111111111111111111111111111* +L045192 111111111111111111111111111111111111111111111101111111111111111111* L045258 000000000000000000000000000000000000000000000000000000000000000000* L045324 000000000000000000000000000000000000000000000000000000000000000000* L045390 000000000000000000000000000000000000000000000000000000000000000000* L045456 000000000000000000000000000000000000000000000000000000000000000000* L045522 000000000000000000000000000000000000000000000000000000000000000000* -L045588 111111111111111111111111111101111111110111111111111111111111111111* -L045654 111111110111111111111111111111111111111111111111111111111111111111* -L045720 101111111111111111111111111111111111111111111111111111111111111111* -L045786 111111111111111111111111111101111111111111111011111111111111111111* -L045852 111111111111111111011111111111111111110111111111111111111111111111* -L045918 111111101111111111111111110111111111111011111111111111111111111111* -L045984 111111110111111111111111111111111111111111111111111111111111111111* +L045588 111111111111111111111101111110111111111111111111111111111111111111* +L045654 111111111111111111111110111101111111111111111111111111111111111111* +L045720 000000000000000000000000000000000000000000000000000000000000000000* +L045786 000000000000000000000000000000000000000000000000000000000000000000* +L045852 000000000000000000000000000000000000000000000000000000000000000000* +L045918 111111011011111111111111111101111111111111111111111111111111111111* +L045984 111111111111111111111111111111111111111111011111111111111111111111* L046050 101111111111111111111111111111111111111111111111111111111111111111* -L046116 111111111110111111111111110111111111111011111111111111111111111111* -L046182 111111111111111111011111111111111111111011111111111111111111111111* +L046116 111111111111111111011111111111111111111111111111111011111111111111* +L046182 111111111011111111011111111111111111111111111111111111111111111111* L046248 000000000000000000000000000000000000000000000000000000000000000000* -L046314 111111111111111111111011111111111111111111111111111111111111111111* +L046314 111111111111111111111110111111111111111111111111111111111111111111* L046380 000000000000000000000000000000000000000000000000000000000000000000* L046446 000000000000000000000000000000000000000000000000000000000000000000* L046512 000000000000000000000000000000000000000000000000000000000000000000* L046578 000000000000000000000000000000000000000000000000000000000000000000* -L046644 111111111111111111111111111111111111111111111111111111111111111101* +L046644 111111111111111111111111110111111111111111111111111111111111111111* L046710 000000000000000000000000000000000000000000000000000000000000000000* L046776 000000000000000000000000000000000000000000000000000000000000000000* L046842 000000000000000000000000000000000000000000000000000000000000000000* @@ -932,48 +931,48 @@ L046974 L047106 0010* L047110 00100110010000* L047124 00100110011110* -L047138 10100111010100* +L047138 10100111010000* L047152 00100110011111* -L047166 10100111011001* -L047180 10100110010011* -L047194 10101100000000* +L047166 00100110010001* +L047180 10101110000011* +L047194 10100111010000* L047208 00100110010010* -L047222 10101110000000* -L047236 10101110000011* -L047250 10100110010001* +L047222 10100110010000* +L047236 10101100000011* +L047250 10101110000001* L047264 00100110010011* -L047278 10101110000000* +L047278 10100110010000* L047292 10101110000010* L047306 00100110010000* L047320 00100110011111* NOTE BLOCK 7 * L047334 111111011111111011111111111111111111111110111111111111111111111111 - 111111111101111111111111111111111111111111101011111111111111111111 + 111111111101111111111111111111111111111111101111111111111111111111 111111111111101111111111111111111111111111111111111111111111111111 - 111011111111111110111111111111111111111111111111111111111111111111 + 111011111111111110111111111111111111111111111011111111111111111111 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111111111011111111111011111111111111111111111111111 + 111111110111111111111111011111101111111111111111111111111111111111 111111111111111111111101111011111101111111111111111111101111111111 - 111111111011111111101111111111111111111111111110111111111111111111 - 101111111111111111111011111111111111111111111111111111111111101111* + 111111111111111111101111111111111111111111111110111111111111111111 + 101111111111111111111111111110111111111111111111111111111111101111* L047928 000000000000000000000000000000000000000000000000000000000000000000* -L047994 110111111111011101101110101111111110011101111111111111111111111111* +L047994 110111110111011101101110101111111110111101111111111111111111111111* L048060 111111111111111111101111111111111111111110111111111111111111101111* L048126 000000000000000000000000000000000000000000000000000000000000000000* L048192 000000000000000000000000000000000000000000000000000000000000000000* L048258 000000000000000000000000000000000000000000000000000000000000000000* -L048324 111111011111111111111111111111111111111111111111111111111111111111* -L048390 111111111111111111111111111111111111111111011111111111111111111111* +L048324 111111111111111111111111111111111111111111111111111111111111111111* +L048390 000000000000000000000000000000000000000000000000000000000000000000* L048456 000000000000000000000000000000000000000000000000000000000000000000* -L048522 111111111111111111111111111111111111111111111111111111111111111111* -L048588 111111111111111111111111111111111111111111111111111111111111111111* +L048522 000000000000000000000000000000000000000000000000000000000000000000* +L048588 000000000000000000000000000000000000000000000000000000000000000000* L048654 000000000000000000000000000000000000000000000000000000000000000000* -L048720 111111111111111111111111111111111111111111111111111111111111111111* -L048786 111111111111111111111111111111111111111111111111111111111111111111* -L048852 111111111111111111111111111111111111111111111111111111111111111111* +L048720 111111011111111111111111111111111111111111111111111111111111111111* +L048786 111111111111111111111111111111111111111111011111111111111111111111* +L048852 000000000000000000000000000000000000000000000000000000000000000000* L048918 111111111111111111111111111111111111111111111111111111111111111111* L048984 111111111111111111111111111111111111111111111111111111111111111111* L049050 111111111111111111111111111111111111111111111111111111111111111111* @@ -983,16 +982,16 @@ L049248 111111111111111111111111111111111111111111111111111111111111111111* L049314 111111111111111111111111111111111111111111111111111111111111111111* L049380 111111111111111111111111111111111111111111111111111111111111111111* -L049446 111111111111111111111111111111111111011111111101111111111111111111* -L049512 111111111111111111111111111111111111011111111111111111011111111111* +L049446 111111110111111111111111111111111111111111111101111111111111111111* +L049512 111111110111111111111111111111111111111111111111111111011111111111* L049578 000000000000000000000000000000000000000000000000000000000000000000* L049644 000000000000000000000000000000000000000000000000000000000000000000* L049710 000000000000000000000000000000000000000000000000000000000000000000* -L049776 111111111111111111011111111111111111111111111111111111111111111111* -L049842 111111111101111111111111111111111111111101111111111111111111111111* -L049908 110111111111011101111110101111111110011101111111111111111111111111* -L049974 111111110111111111111111111111111111111110111111111111111111111111* -L050040 000000000000000000000000000000000000000000000000000000000000000000* +L049776 111111111111111111111111111111111111111111111111111111111111111111* +L049842 111111111111111111111111111111111111111111111111111111111111111111* +L049908 111111111111111111111111111111111111111111111111111111111111111111* +L049974 111111111111111111111111111111111111111111111111111111111111111111* +L050040 111111111111111111111111111111111111111111111111111111111111111111* L050106 000000000000000000000000000000000000000000000000000000000000000000* L050172 111111111111111111111111111111111111111111111111111111111111111111* @@ -1007,12 +1006,12 @@ L050700 111111111111111111111111111111111111111111111111111111111111111111* L050766 111111111111111111111111111111111111111111111111111111111111111111* L050832 111111111110111111111111111111111111111111111111111111111111111111* -L050898 111111111111110111111011111111111111111111110111111111111111111111* -L050964 111111111111111111101111111011111111111111111111111111111111111111* -L051030 000000000000000000000000000000000000000000000000000000000000000000* -L051096 000000000000000000000000000000000000000000000000000000000000000000* +L050898 111111111111111111011111111111111111111111111111111111111111111111* +L050964 111111111101111111111111111111111111111101111111111111111111111111* +L051030 110111110111011101111110101111111110111101111111111111111111111111* +L051096 111111111111111111111111110111111111111110111111111111111111111111* L051162 000000000000000000000000000000000000000000000000000000000000000000* -L051228 111111011111111111111011111111111111111111111111111111111111111111* +L051228 111111011111111111111111111110111111111111111111111111111111111111* L051294 111111111111111111111111111111111111111111011111111111111111111111* L051360 000000000000000000000000000000000000000000000000000000000000000000* L051426 111111111111111111111111111111111111111111111111111111111111111111* @@ -1031,12 +1030,12 @@ L052152 111111111111111111111111111111111111111111111111111111111111111111* L052218 111111111111111111111111111111111111111111111111111111111111111111* L052284 000000000000000000000000000000000000000000000000000000000000000000* -L052350 111111111111111111111111111111111111111111111111111111111111111111* -L052416 111111111111111111111111111111111111111111111111111111111111111111* -L052482 111111111111111111111111111111111111111111111111111111111111111111* -L052548 111111111111111111111111111111111111111111111111111111111111111111* -L052614 111111111111111111111111111111111111111111111111111111111111111111* -L052680 111111111111111111110111111111111111111111111111111111111111111111* +L052350 111111111111110111111111111110111111111111110111111111111111111111* +L052416 111111111111111111101111111111101111111111111111111111111111111111* +L052482 000000000000000000000000000000000000000000000000000000000000000000* +L052548 000000000000000000000000000000000000000000000000000000000000000000* +L052614 000000000000000000000000000000000000000000000000000000000000000000* +L052680 111111111111111111111111111101111111111111111111111111111111111111* L052746 111111111111111111111111111111111111111111011111111111111111111111* L052812 000000000000000000000000000000000000000000000000000000000000000000* L052878 111111111111111111111111111111111111111111111111111111111111111111* @@ -1057,22 +1056,22 @@ L053736 000000000000000000000000000000000000000000000000000000000000000000 101111111111111111111111111111111111111111111111111111111111111111* L053868 0010* -L053872 11100110011000* -L053886 00011110000010* -L053900 11011111110000* -L053914 11111011110011* +L053872 11100110011100* +L053886 00101011110010* +L053900 00011110000001* +L053914 11101011110011* L053928 10100110010000* -L053942 10100110011110* -L053956 11011111110001* -L053970 11111011110011* -L053984 11100110010000* +L053942 11001011111110* +L053956 11110011110001* +L053970 11111111110011* +L053984 10100110010010* L053998 00001110000010* -L054012 11010011110100* -L054026 11111011111111* -L054040 00110111111000* -L054054 00001110000010* -L054068 11011111110101* -L054082 11110011111111* +L054012 11011011111111* +L054026 11110111111111* +L054040 11100110011000* +L054054 00001110000011* +L054068 11011111110100* +L054082 11110011111110* E1 0 00000000 @@ -1092,6 +1091,6 @@ E1 00000000 1 * -CEB62* +CBB2F* U00000000000000000000000000000000* -CFEF +BCCB diff --git a/Logic/68030_tk.lco b/Logic/68030_tk.lco index 74b2228..f580561 100644 --- a/Logic/68030_tk.lco +++ b/Logic/68030_tk.lco @@ -17,7 +17,7 @@ Parent = m4a5.lci; SDS_File = m4a5.sds; Design = 68030_tk.tt4; DATE = 5/15/14; -TIME = 22:17:31; +TIME = 22:21:57; Source_Format = Pure_VHDL; Type = TT2; Pre_Fit_Time = 1; @@ -76,11 +76,23 @@ Usercode_Format = Hex; [LOCATION ASSIGNMENTS] Layer = OFF; -FC_0_ = pin,57,-,F,-; +A_28_ = pin,15,-,C,-; +A_27_ = pin,16,-,C,-; SIZE_1_ = pin,79,-,H,-; +A_26_ = pin,17,-,C,-; +A_25_ = pin,18,-,C,-; A_31_ = pin,4,-,B,-; +A_24_ = pin,19,-,C,-; +A_23_ = pin,84,-,H,-; +A_22_ = pin,85,-,H,-; +A_21_ = pin,94,-,A,-; IPL_2_ = pin,68,-,G,-; +A_20_ = pin,93,-,A,-; +A_19_ = pin,97,-,A,-; +A_18_ = pin,95,-,A,-; +A_17_ = pin,59,-,F,-; FC_1_ = pin,58,-,F,-; +A_16_ = pin,96,-,A,-; AS_030 = pin,82,-,H,-; DS_030 = pin,98,-,A,-; CPU_SPACE = pin,14,-,-,-; @@ -90,36 +102,24 @@ BGACK_000 = pin,28,-,D,-; CLK_030 = pin,64,-,-,-; CLK_000 = pin,11,-,-,-; CLK_OSZI = pin,61,-,-,-; -SIZE_0_ = pin,70,-,G,-; -CLK_EXP = pin,10,-,B,-; -A_30_ = pin,5,-,B,-; -A_29_ = pin,6,-,B,-; -A_28_ = pin,15,-,C,-; -AVEC = pin,92,-,A,-; -A_27_ = pin,16,-,C,-; -AVEC_EXP = pin,22,-,C,-; -A_26_ = pin,17,-,C,-; -A_25_ = pin,18,-,C,-; -VPA = pin,36,-,-,-; -A_24_ = pin,19,-,C,-; -A_23_ = pin,84,-,H,-; -RST = pin,86,-,-,-; -A_22_ = pin,85,-,H,-; -A_21_ = pin,94,-,A,-; -RW = pin,71,-,G,-; -A_20_ = pin,93,-,A,-; -AMIGA_BUS_ENABLE = pin,34,-,D,-; -A_19_ = pin,97,-,A,-; -AMIGA_BUS_DATA_DIR = pin,48,-,E,-; -A_18_ = pin,95,-,A,-; -AMIGA_BUS_ENABLE_LOW = pin,20,-,C,-; -A_17_ = pin,59,-,F,-; -CIIN = pin,47,-,E,-; -A_16_ = pin,96,-,A,-; +CLK_DIV_OUT = pin,65,-,G,-; A_0_ = pin,69,-,G,-; +AVEC = pin,92,-,A,-; IPL_1_ = pin,56,-,F,-; +AVEC_EXP = pin,22,-,C,-; IPL_0_ = pin,67,-,G,-; DSACK_0_ = pin,80,-,H,-; +VPA = pin,36,-,-,-; +FC_0_ = pin,57,-,F,-; +RST = pin,86,-,-,-; +RW = pin,71,-,G,-; +AMIGA_BUS_ENABLE = pin,34,-,D,-; +AMIGA_BUS_DATA_DIR = pin,48,-,E,-; +AMIGA_BUS_ENABLE_LOW = pin,20,-,C,-; +CIIN = pin,47,-,E,-; +SIZE_0_ = pin,70,-,G,-; +A_30_ = pin,5,-,B,-; +A_29_ = pin,6,-,B,-; IPL_030_2_ = pin,9,-,B,-; DSACK_1_ = pin,81,-,H,-; AS_000 = pin,33,-,D,-; @@ -127,41 +127,38 @@ UDS_000 = pin,32,-,D,-; LDS_000 = pin,31,-,D,-; BG_000 = pin,29,-,D,-; BGACK_030 = pin,83,-,H,-; -CLK_DIV_OUT = pin,65,-,G,-; +CLK_EXP = pin,10,-,B,-; FPU_CS = pin,78,-,H,-; +IPL_030_1_ = pin,7,-,B,-; DTACK = pin,30,-,D,-; +IPL_030_0_ = pin,8,-,B,-; E = pin,66,-,G,-; VMA = pin,35,-,D,-; RESET = pin,3,-,B,-; -IPL_030_1_ = pin,7,-,B,-; -IPL_030_0_ = pin,8,-,B,-; -cpu_est_0_ = node,-,-,G,5; -cpu_est_1_ = node,-,-,G,2; +cpu_est_0_ = node,-,-,G,8; +cpu_est_1_ = node,-,-,G,6; cpu_est_d_0_ = node,-,-,G,15; cpu_est_d_3_ = node,-,-,G,11; -inst_AS_030_000_SYNC = node,-,-,H,5; -inst_DTACK_SYNC = node,-,-,A,8; -inst_VPA_D = node,-,-,A,0; -inst_VPA_SYNC = node,-,-,F,0; -inst_CLK_000_D = node,-,-,H,1; +inst_AS_030_000_SYNC = node,-,-,H,8; +inst_DTACK_SYNC = node,-,-,B,9; +inst_VPA_D = node,-,-,G,1; +inst_VPA_SYNC = node,-,-,A,0; +inst_CLK_000_D = node,-,-,H,2; inst_CLK_000_DD = node,-,-,H,13; -inst_CLK_OUT_PRE = node,-,-,G,10; +inst_CLK_OUT_PRE = node,-,-,G,12; cpu_est_d_1_ = node,-,-,G,7; cpu_est_d_2_ = node,-,-,G,3; -cpu_est_2_ = node,-,-,G,1; +cpu_est_2_ = node,-,-,G,4; CLK_CNT_0_ = node,-,-,G,14; -SM_AMIGA_6_ = node,-,-,D,2; -SM_AMIGA_7_ = node,-,-,G,6; +SM_AMIGA_6_ = node,-,-,D,6; +SM_AMIGA_7_ = node,-,-,G,9; inst_RISING_CLK_AMIGA = node,-,-,H,9; -SM_AMIGA_1_ = node,-,-,G,12; +SM_AMIGA_1_ = node,-,-,G,5; SM_AMIGA_4_ = node,-,-,D,13; -SM_AMIGA_3_ = node,-,-,G,8; -SM_AMIGA_5_ = node,-,-,D,6; -SM_AMIGA_2_ = node,-,-,G,13; -SM_AMIGA_0_ = node,-,-,G,9; -SM_AMIGA_D_0_ = node,-,-,B,6; -SM_AMIGA_D_1_ = node,-,-,B,13; -SM_AMIGA_D_2_ = node,-,-,B,9; +SM_AMIGA_3_ = node,-,-,B,5; +SM_AMIGA_5_ = node,-,-,D,10; +SM_AMIGA_2_ = node,-,-,G,10; +SM_AMIGA_0_ = node,-,-,G,13; [GROUP ASSIGNMENTS] Layer = OFF; diff --git a/Logic/68030_tk.out b/Logic/68030_tk.out index a4175e0..61ce612 100644 --- a/Logic/68030_tk.out +++ b/Logic/68030_tk.out @@ -49035,6 +49035,107 @@ 16 A_26_ 1 -1 -1 1 4 16 -1 15 A_27_ 1 -1 -1 1 4 15 -1 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 7 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +95 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21 + 29 DTACK 5 -1 3 1 1 29 -1 1 0 21 + 30 LDS_000 5 321 3 0 30 -1 12 0 21 + 31 UDS_000 5 320 3 0 31 -1 8 0 21 + 65 E 5 327 6 0 65 -1 3 0 21 + 28 BG_000 5 322 3 0 28 -1 3 0 21 + 82 BGACK_030 5 323 7 0 82 -1 2 0 21 + 77 FPU_CS 5 324 7 0 77 -1 2 0 21 + 34 VMA 5 328 3 0 34 -1 2 0 21 + 32 AS_000 5 319 3 0 32 -1 2 0 21 + 8 IPL_030_2_ 5 317 1 0 8 -1 2 0 21 + 7 IPL_030_0_ 5 326 1 0 7 -1 2 0 21 + 6 IPL_030_1_ 5 325 1 0 6 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 20 + 2 RESET 0 1 0 2 -1 1 0 20 + 301 inst_CLK_000_D 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20 + 294 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 327 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21 + 313 SM_AMIGA_3_ 3 -1 1 3 0 1 6 -1 -1 3 0 21 + 306 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21 + 293 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21 + 324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 2 0 21 + 300 inst_VPA_SYNC 3 -1 0 3 0 1 6 -1 -1 2 0 21 + 299 inst_VPA_D 3 -1 6 3 0 1 3 -1 -1 1 0 21 + 297 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21 + 311 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20 + 328 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21 + 323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21 + 319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21 + 312 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21 + 309 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20 + 298 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21 + 310 inst_RISING_CLK_AMIGA 3 -1 7 2 1 7 -1 -1 1 0 20 + 302 inst_CLK_000_DD 3 -1 7 2 3 6 -1 -1 1 0 20 + 321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21 + 320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21 + 322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21 + 316 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20 + 315 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20 + 308 SM_AMIGA_6_ 3 -1 3 1 3 -1 -1 3 0 21 + 326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 2 0 21 + 325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 2 0 21 + 318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 2 0 21 + 314 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21 + 307 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 1 0 21 + 305 cpu_est_d_2_ 3 -1 6 1 3 -1 -1 1 0 21 + 304 cpu_est_d_1_ 3 -1 6 1 3 -1 -1 1 0 21 + 296 cpu_est_d_3_ 3 -1 6 1 3 -1 -1 1 0 21 + 295 cpu_est_d_0_ 3 -1 6 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 4 0 1 6 7 60 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 81 AS_030 1 -1 -1 4 0 1 3 7 81 -1 + 70 RW 1 -1 -1 2 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 3 7 63 -1 + 13 CPU_SPACE 1 -1 -1 2 3 7 13 -1 + 97 DS_030 1 -1 -1 1 3 97 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 78 SIZE_1_ 1 -1 -1 1 3 78 -1 + 69 SIZE_0_ 1 -1 -1 1 3 69 -1 + 68 A_0_ 1 -1 -1 1 3 68 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 10 CLK_000 1 -1 -1 1 7 10 -1 5 A_29_ 1 -1 -1 1 4 5 -1 4 A_30_ 1 -1 -1 1 4 4 -1 diff --git a/Logic/68030_tk.plc b/Logic/68030_tk.plc index ee64943..78e4159 100644 --- a/Logic/68030_tk.plc +++ b/Logic/68030_tk.plc @@ -8,14 +8,26 @@ ; Source file 68030_tk.tt4 ; FITTER-generated Placements. ; DEVICE mach447a -; DATE Thu May 15 22:17:31 2014 +; DATE Thu May 15 22:21:57 2014 -Pin 57 FC_0_ +Pin 15 A_28_ +Pin 16 A_27_ Pin 79 SIZE_1_ +Pin 17 A_26_ +Pin 18 A_25_ Pin 4 A_31_ +Pin 19 A_24_ +Pin 84 A_23_ +Pin 85 A_22_ +Pin 94 A_21_ Pin 68 IPL_2_ +Pin 93 A_20_ +Pin 97 A_19_ +Pin 95 A_18_ +Pin 59 A_17_ Pin 58 FC_1_ +Pin 96 A_16_ Pin 82 AS_030 Pin 98 DS_030 Pin 14 CPU_SPACE @@ -25,90 +37,75 @@ Pin 28 BGACK_000 Pin 64 CLK_030 Pin 11 CLK_000 Pin 61 CLK_OSZI +Pin 65 CLK_DIV_OUT Reg ; S6=1 S9=1 Pair 245 +Pin 69 A_0_ +Pin 92 AVEC Comb ; S6=1 S9=1 Pair 107 +Pin 56 IPL_1_ +Pin 22 AVEC_EXP Comb ; S6=1 S9=1 Pair 149 +Pin 67 IPL_0_ +Pin 80 DSACK_0_ Comb ; S6=1 S9=1 Pair 271 +Pin 36 VPA +Pin 57 FC_0_ +Pin 86 RST +Pin 71 RW +Pin 34 AMIGA_BUS_ENABLE Comb ; S6=1 S9=1 Pair 176 +Pin 48 AMIGA_BUS_DATA_DIR Comb ; S6=1 S9=1 Pair 197 +Pin 20 AMIGA_BUS_ENABLE_LOW Comb ; S6=1 S9=1 Pair 167 +Pin 47 CIIN Comb ; S6=1 S9=1 Pair 215 Pin 70 SIZE_0_ -Pin 10 CLK_EXP Comb ; S6=1 S9=1 Pair 125 Pin 5 A_30_ Pin 6 A_29_ -Pin 15 A_28_ -Pin 92 AVEC Comb ; S6=1 S9=1 Pair 107 -Pin 16 A_27_ -Pin 22 AVEC_EXP Comb ; S6=1 S9=1 Pair 149 -Pin 17 A_26_ -Pin 18 A_25_ -Pin 36 VPA -Pin 19 A_24_ -Pin 84 A_23_ -Pin 86 RST -Pin 85 A_22_ -Pin 94 A_21_ -Pin 71 RW -Pin 93 A_20_ -Pin 34 AMIGA_BUS_ENABLE Comb ; S6=1 S9=1 Pair 187 -Pin 97 A_19_ -Pin 48 AMIGA_BUS_DATA_DIR Comb ; S6=1 S9=1 Pair 197 -Pin 95 A_18_ -Pin 20 AMIGA_BUS_ENABLE_LOW Comb ; S6=1 S9=1 Pair 167 -Pin 59 A_17_ -Pin 47 CIIN Comb ; S6=1 S9=1 Pair 215 -Pin 96 A_16_ -Pin 69 A_0_ -Pin 56 IPL_1_ -Pin 67 IPL_0_ -Pin 80 DSACK_0_ Comb ; S6=1 S9=1 Pair 287 Pin 9 IPL_030_2_ Reg ; S6=1 S9=1 Pair 131 -Pin 81 DSACK_1_ Reg ; S6=1 S9=1 Pair 281 -Pin 33 AS_000 Reg ; S6=1 S9=1 Pair 181 +Pin 81 DSACK_1_ Reg ; S6=1 S9=1 Pair 287 +Pin 33 AS_000 Reg ; S6=1 S9=1 Pair 187 Pin 32 UDS_000 Reg ; S6=1 S9=1 Pair 191 Pin 31 LDS_000 Reg ; S6=1 S9=1 Pair 185 Pin 29 BG_000 Reg ; S6=1 S9=1 Pair 175 Pin 83 BGACK_030 Reg ; S6=1 S9=1 Pair 275 -Pin 65 CLK_DIV_OUT Reg ; S6=1 S9=1 Pair 245 +Pin 10 CLK_EXP Reg ; S6=1 S9=0 Pair 125 Pin 78 FPU_CS Reg ; S6=1 S9=1 Pair 269 -Pin 30 DTACK Reg ; S6=1 S9=1 Pair 173 -Pin 66 E Reg ; S6=1 S9=1 Pair 251 -Pin 35 VMA Reg ; S6=1 S9=1 Pair 179 -Pin 3 RESET Reg ; S6=1 S9=0 Pair 133 Pin 7 IPL_030_1_ Reg ; S6=1 S9=1 Pair 143 +Pin 30 DTACK Reg ; S6=1 S9=1 Pair 173 Pin 8 IPL_030_0_ Reg ; S6=1 S9=1 Pair 137 +Pin 66 E Reg ; S6=1 S9=1 Pair 248 +Pin 35 VMA Reg ; S6=1 S9=1 Pair 181 +Pin 3 RESET Reg ; S6=1 S9=0 Pair 127 Node 131 RN_IPL_030_2_ Reg ; S6=1 S9=1 -Node 281 RN_DSACK_1_ Reg ; S6=1 S9=1 -Node 181 RN_AS_000 Reg ; S6=1 S9=1 +Node 287 RN_DSACK_1_ Reg ; S6=1 S9=1 +Node 187 RN_AS_000 Reg ; S6=1 S9=1 Node 191 RN_UDS_000 Reg ; S6=1 S9=1 Node 185 RN_LDS_000 Reg ; S6=1 S9=1 Node 175 RN_BG_000 Reg ; S6=1 S9=1 Node 275 RN_BGACK_030 Reg ; S6=1 S9=1 Node 269 RN_FPU_CS Reg ; S6=1 S9=1 -Node 173 RN_DTACK Reg ; S6=1 S9=1 -Node 251 RN_E Reg ; S6=1 S9=1 -Node 179 RN_VMA Reg ; S6=1 S9=1 Node 143 RN_IPL_030_1_ Reg ; S6=1 S9=1 +Node 173 RN_DTACK Reg ; S6=1 S9=1 Node 137 RN_IPL_030_0_ Reg ; S6=1 S9=1 -Node 253 cpu_est_0_ Reg ; S6=1 S9=1 -Node 248 cpu_est_1_ Reg ; S6=1 S9=1 +Node 248 RN_E Reg ; S6=1 S9=1 +Node 181 RN_VMA Reg ; S6=1 S9=1 +Node 257 cpu_est_0_ Reg ; S6=1 S9=1 +Node 254 cpu_est_1_ Reg ; S6=1 S9=1 Node 268 cpu_est_d_0_ Reg ; S6=1 S9=1 Node 262 cpu_est_d_3_ Reg ; S6=1 S9=1 -Node 277 inst_AS_030_000_SYNC Reg ; S6=1 S9=1 -Node 113 inst_DTACK_SYNC Reg ; S6=1 S9=1 -Node 101 inst_VPA_D Reg ; S6=1 S9=0 -Node 221 inst_VPA_SYNC Reg ; S6=1 S9=1 -Node 271 inst_CLK_000_D Reg ; S6=1 S9=0 +Node 281 inst_AS_030_000_SYNC Reg ; S6=1 S9=1 +Node 139 inst_DTACK_SYNC Reg ; S6=1 S9=1 +Node 247 inst_VPA_D Reg ; S6=1 S9=1 +Node 101 inst_VPA_SYNC Reg ; S6=1 S9=1 +Node 272 inst_CLK_000_D Reg ; S6=1 S9=0 Node 289 inst_CLK_000_DD Reg ; S6=1 S9=0 -Node 260 inst_CLK_OUT_PRE Reg ; S6=1 S9=1 +Node 263 inst_CLK_OUT_PRE Reg ; S6=1 S9=1 Node 256 cpu_est_d_1_ Reg ; S6=1 S9=1 Node 250 cpu_est_d_2_ Reg ; S6=1 S9=1 -Node 247 cpu_est_2_ Reg ; S6=1 S9=1 +Node 251 cpu_est_2_ Reg ; S6=1 S9=1 Node 266 CLK_CNT_0_ Reg ; S6=1 S9=1 -Node 176 SM_AMIGA_6_ Reg ; S6=0 S9=1 -Node 254 SM_AMIGA_7_ Reg ; S6=0 S9=0 +Node 182 SM_AMIGA_6_ Reg ; S6=0 S9=1 +Node 259 SM_AMIGA_7_ Reg ; S6=0 S9=0 Node 283 inst_RISING_CLK_AMIGA Reg ; S6=1 S9=0 -Node 263 SM_AMIGA_1_ Reg ; S6=1 S9=0 +Node 253 SM_AMIGA_1_ Reg ; S6=1 S9=0 Node 193 SM_AMIGA_4_ Reg ; S6=0 S9=1 -Node 257 SM_AMIGA_3_ Reg ; S6=1 S9=0 -Node 182 SM_AMIGA_5_ Reg ; S6=0 S9=1 -Node 265 SM_AMIGA_2_ Reg ; S6=1 S9=0 -Node 259 SM_AMIGA_0_ Reg ; S6=1 S9=0 -Node 134 SM_AMIGA_D_0_ Reg ; S6=1 S9=0 -Node 145 SM_AMIGA_D_1_ Reg ; S6=1 S9=0 -Node 139 SM_AMIGA_D_2_ Reg ; S6=1 S9=0 +Node 133 SM_AMIGA_3_ Reg ; S6=0 S9=1 +Node 188 SM_AMIGA_5_ Reg ; S6=0 S9=1 +Node 260 SM_AMIGA_2_ Reg ; S6=1 S9=0 +Node 265 SM_AMIGA_0_ Reg ; S6=1 S9=0 ; Unused Pins & Nodes ; -> None Found. diff --git a/Logic/68030_tk.prd b/Logic/68030_tk.prd index 9ee789b..c12bcf9 100644 --- a/Logic/68030_tk.prd +++ b/Logic/68030_tk.prd @@ -5,8 +5,8 @@ |--------------------------------------------| -Start: Thu May 15 22:17:31 2014 -End : Thu May 15 22:17:31 2014 $$$ Elapsed time: 00:00:00 +Start: Thu May 15 22:21:57 2014 +End : Thu May 15 22:21:57 2014 $$$ Elapsed time: 00:00:00 =========================================================================== Part [C:/Program Files (x86)/ispLever/ispcpld/dat/mach4a/mach447a] Design [68030_tk.tt4] @@ -21,16 +21,16 @@ Part [C:/Program Files (x86)/ispLever/ispcpld/dat/mach4a/mach447a] Design [68030 | | +- Signals to Place | | +----- Logic Array Inputs | | | +- Placed | | | +- Array Inputs Used _|____|____|____|_______________|____|_____________|___|________________ - 0 | 16 | 3 | 3 => 100% | 8 | 7 => 87% | 33 | 9 => 27% - 1 | 16 | 8 | 8 => 100% | 8 | 8 => 100% | 33 | 19 => 57% + 0 | 16 | 2 | 2 => 100% | 8 | 7 => 87% | 33 | 12 => 36% + 1 | 16 | 7 | 7 => 100% | 8 | 8 => 100% | 33 | 18 => 54% 2 | 16 | 2 | 2 => 100% | 8 | 8 => 100% | 33 | 1 => 3% 3 | 16 | 10 | 10 => 100% | 8 | 8 => 100% | 33 | 33 => 100% 4 | 16 | 3 | 3 => 100% | 8 | 3 => 37% | 33 | 14 => 42% - 5 | 16 | 1 | 1 => 100% | 8 | 4 => 50% | 33 | 12 => 36% + 5 | 16 | 0 | 0 => n/a | 8 | 4 => 50% | 33 | 0 => 0% 6 | 16 | 16 | 16 => 100% | 8 | 7 => 87% | 33 | 19 => 57% 7 | 16 | 8 | 8 => 100% | 8 | 8 => 100% | 33 | 21 => 63% ---|----|----|------------|-------|------------|-----|------------------ - | Avg number of array inputs in used blocks : 16.00 => 48% + | Avg number of array inputs in used blocks : 16.86 => 51% * Input/Clock Signal count: 35 -> placed: 35 = 100% @@ -40,14 +40,14 @@ _|____|____|____|_______________|____|_____________|___|________________ I/O Pins : 64 53 => 82% Clock Only Pins : 0 0 => 0% Clock/Input Pins : 4 4 => 100% - Logic Blocks : 8 8 => 100% - Macrocells : 128 51 => 39% - PT Clusters : 128 36 => 28% - - Single PT Clusters : 128 20 => 15% + Logic Blocks : 8 7 => 87% + Macrocells : 128 48 => 37% + PT Clusters : 128 30 => 23% + - Single PT Clusters : 128 21 => 16% Input Registers : 0 * Routing Completion: 100% -* Attempts: Place [ 170] Route [ 0] +* Attempts: Place [ 1176] Route [ 0] =========================================================================== Signal Fanout Table =========================================================================== @@ -62,7 +62,7 @@ ___|__|__|____|____________________________________________________________ 3| 2|OUT| 20|=> ....|....| AMIGA_BUS_ENABLE_LOW 4| 3| IO| 33|=> ....|....| AS_000 |=> Paired w/: RN_AS_000 - 5| 7|INP| 82|=> 0..3|.5.7| AS_030 + 5| 7|INP| 82|=> 01.3|...7| AS_030 6| 0|OUT| 92|=> ....|....| AVEC 7| 2|OUT| 22|=> ....|....| AVEC_EXP 8| 6|INP| 69|=> ...3|....| A_0_ @@ -95,13 +95,13 @@ ___|__|__|____|____________________________________________________________ 33| 6|NOD| . |=> ....|..6.| CLK_CNT_0_ 34| 6|OUT| 65|=> ....|....| CLK_DIV_OUT 35| 1|OUT| 10|=> ....|....| CLK_EXP - 36| +|Cin| 61|=> 01..|.567| CLK_OSZI + 36| +|Cin| 61|=> 01..|..67| CLK_OSZI 37| +|INP| 14|=> ...3|...7| CPU_SPACE 38| 7|OUT| 80|=> ....|....| DSACK_0_ 39| 7| IO| 81|=> ...3|....| DSACK_1_ |=> Paired w/: RN_DSACK_1_ 40| 0|INP| 98|=> ...3|....| DS_030 - 41| 3| IO| 30|=> 0...|....| DTACK + 41| 3| IO| 30|=> .1..|....| DTACK 42| 6| IO| 66|=> ....|....| E |=> Paired w/: RN_E 43| 5|INP| 57|=> ....|...7| FC_0_ @@ -128,7 +128,7 @@ ___|__|__|____|____________________________________________________________ |=> Paired w/: BG_000 57| 7|NOD| . |=> ....|...7| RN_DSACK_1_ |=> Paired w/: DSACK_1_ - 58| 6|NOD| . |=> ...3|.56.| RN_E + 58| 6|NOD| . |=> 0..3|..6.| RN_E |=> Paired w/: E 59| 7|NOD| . |=> ..2.|4..7| RN_FPU_CS |=> Paired w/: FPU_CS @@ -142,43 +142,40 @@ ___|__|__|____|____________________________________________________________ |=> Paired w/: LDS_000 64| 3|NOD| . |=> ...3|....| RN_UDS_000 |=> Paired w/: UDS_000 - 65| 3|NOD| . |=> ...3|.5..| RN_VMA + 65| 3|NOD| . |=> 0..3|....| RN_VMA |=> Paired w/: VMA - 66| +|INP| 86|=> 01.3|.567| RST + 66| +|INP| 86|=> 01.3|..67| RST 67| 6|INP| 71|=> ...3|4...| RW 68| 6|INP| 70|=> ...3|....| SIZE_0_ 69| 7|INP| 79|=> ...3|....| SIZE_1_ - 70| 6|NOD| . |=> .1..|..6.| SM_AMIGA_0_ - 71| 6|NOD| . |=> .1..|..67| SM_AMIGA_1_ - 72| 6|NOD| . |=> .1..|..6.| SM_AMIGA_2_ - 73| 6|NOD| . |=> 01..|.56.| SM_AMIGA_3_ - 74| 3|NOD| . |=> .1.3|..6.| SM_AMIGA_4_ - 75| 3|NOD| . |=> .1.3|....| SM_AMIGA_5_ - 76| 3|NOD| . |=> .1.3|....| SM_AMIGA_6_ + 70| 6|NOD| . |=> ....|..6.| SM_AMIGA_0_ + 71| 6|NOD| . |=> ....|..67| SM_AMIGA_1_ + 72| 6|NOD| . |=> ....|..6.| SM_AMIGA_2_ + 73| 1|NOD| . |=> 01..|..6.| SM_AMIGA_3_ + 74| 3|NOD| . |=> .1.3|....| SM_AMIGA_4_ + 75| 3|NOD| . |=> ...3|....| SM_AMIGA_5_ + 76| 3|NOD| . |=> ...3|....| SM_AMIGA_6_ 77| 6|NOD| . |=> ...3|..6.| SM_AMIGA_7_ - 78| 1|NOD| . |=> .1..|....| SM_AMIGA_D_0_ - 79| 1|NOD| . |=> .1..|....| SM_AMIGA_D_1_ - 80| 1|NOD| . |=> .1..|....| SM_AMIGA_D_2_ - 81| 3| IO| 32|=> ....|....| UDS_000 + 78| 3| IO| 32|=> ....|....| UDS_000 |=> Paired w/: RN_UDS_000 - 82| 3| IO| 35|=> ....|....| VMA + 79| 3| IO| 35|=> ....|....| VMA |=> Paired w/: RN_VMA - 83| +|INP| 36|=> 0...|....| VPA - 84| 6|NOD| . |=> ...3|.56.| cpu_est_0_ - 85| 6|NOD| . |=> ...3|.56.| cpu_est_1_ - 86| 6|NOD| . |=> ...3|.56.| cpu_est_2_ - 87| 6|NOD| . |=> ...3|....| cpu_est_d_0_ - 88| 6|NOD| . |=> ...3|....| cpu_est_d_1_ - 89| 6|NOD| . |=> ...3|....| cpu_est_d_2_ - 90| 6|NOD| . |=> ...3|....| cpu_est_d_3_ - 91| 7|NOD| . |=> ...3|...7| inst_AS_030_000_SYNC - 92| 7|NOD| . |=> 0..3|.567| inst_CLK_000_D - 93| 7|NOD| . |=> ...3|..6.| inst_CLK_000_DD - 94| 6|NOD| . |=> ....|..67| inst_CLK_OUT_PRE - 95| 0|NOD| . |=> 0...|..6.| inst_DTACK_SYNC - 96| 7|NOD| . |=> .1..|...7| inst_RISING_CLK_AMIGA - 97| 0|NOD| . |=> 0..3|.5..| inst_VPA_D - 98| 5|NOD| . |=> ....|.56.| inst_VPA_SYNC + 80| +|INP| 36|=> ....|..6.| VPA + 81| 6|NOD| . |=> 0..3|..6.| cpu_est_0_ + 82| 6|NOD| . |=> 0..3|..6.| cpu_est_1_ + 83| 6|NOD| . |=> 0..3|..6.| cpu_est_2_ + 84| 6|NOD| . |=> ...3|....| cpu_est_d_0_ + 85| 6|NOD| . |=> ...3|....| cpu_est_d_1_ + 86| 6|NOD| . |=> ...3|....| cpu_est_d_2_ + 87| 6|NOD| . |=> ...3|....| cpu_est_d_3_ + 88| 7|NOD| . |=> ...3|...7| inst_AS_030_000_SYNC + 89| 7|NOD| . |=> 01.3|..67| inst_CLK_000_D + 90| 7|NOD| . |=> ...3|..6.| inst_CLK_000_DD + 91| 6|NOD| . |=> .1..|..67| inst_CLK_OUT_PRE + 92| 1|NOD| . |=> .1..|..6.| inst_DTACK_SYNC + 93| 7|NOD| . |=> .1..|...7| inst_RISING_CLK_AMIGA + 94| 6|NOD| . |=> 01.3|....| inst_VPA_D + 95| 0|NOD| . |=> 01..|..6.| inst_VPA_SYNC --------------------------------------------------------------------------- =========================================================================== < C:/Program Files (x86)/ispLever/ispcpld/dat/mach4a/mach447a Device Pin Assignments > @@ -298,7 +295,7 @@ ____|_____|_________|______________________________________________________ | Sig Type-+ | | | | | | | XOR to Mcell Assignment | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| inst_VPA_D|NOD| | A | 1 | 2 free | 1 XOR to [ 0] for 1 PT sig + 0| inst_VPA_SYNC|NOD| | S | 2 | 4 to [ 0]| 1 XOR free 1| | ? | | S | | 4 free | 1 XOR free 2| | ? | | S | | 4 free | 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free @@ -306,7 +303,7 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ 5| | ? | | S | | 4 free | 1 XOR free 6| | ? | | S | | 4 free | 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free - 8|inst_DTACK_SYNC|NOD| | S | 2 | 4 to [ 8]| 1 XOR free + 8| | ? | | S | | 4 free | 1 XOR free 9| | ? | | S | | 4 free | 1 XOR free 10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free @@ -325,16 +322,16 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| inst_VPA_D|NOD| | A | 1 |=> can support up to [ 13] logic PT(s) - 1| | ? | | S | |=> can support up to [ 17] logic PT(s) + 0| inst_VPA_SYNC|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) + 1| | ? | | S | |=> can support up to [ 15] logic PT(s) 2| | ? | | S | |=> can support up to [ 19] logic PT(s) 3| | ? | | S | |=> can support up to [ 19] logic PT(s) 4| AVEC|OUT| | S | 1 |=> can support up to [ 20] logic PT(s) 5| | ? | | S | |=> can support up to [ 19] logic PT(s) - 6| | ? | | S | |=> can support up to [ 15] logic PT(s) - 7| | ? | | S | |=> can support up to [ 15] logic PT(s) - 8|inst_DTACK_SYNC|NOD| | S | 2 |=> can support up to [ 20] logic PT(s) - 9| | ? | | S | |=> can support up to [ 15] logic PT(s) + 6| | ? | | S | |=> can support up to [ 20] logic PT(s) + 7| | ? | | S | |=> can support up to [ 20] logic PT(s) + 8| | ? | | S | |=> can support up to [ 20] logic PT(s) + 9| | ? | | S | |=> can support up to [ 20] logic PT(s) 10| | ? | | S | |=> can support up to [ 20] logic PT(s) 11| | ? | | S | |=> can support up to [ 20] logic PT(s) 12| | ? | | S | |=> can support up to [ 20] logic PT(s) @@ -350,7 +347,7 @@ _|_________________|__|__|___|_____|_______________________________________ | Sig Type---+ | to | Block [ 0] IO Pin | Device Pin | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ - 0| inst_VPA_D|NOD| | => | 5 6 7 0 | 96 97 98 91 + 0| inst_VPA_SYNC|NOD| | => | 5 6 7 0 | 96 97 98 91 1| | | | => | 5 6 7 0 | 96 97 98 91 2| | | | => | 6 7 0 1 | 97 98 91 92 3| | | | => | 6 7 0 1 | 97 98 91 92 @@ -358,7 +355,7 @@ _|_________________|__|_____|____________________|________________________ 5| | | | => | 7 0 1 2 | 98 91 92 93 6| | | | => | 0 1 2 3 | 91 92 93 94 7| | | | => | 0 1 2 3 | 91 92 93 94 - 8|inst_DTACK_SYNC|NOD| | => | 1 2 3 4 | 92 93 94 95 + 8| | | | => | 1 2 3 4 | 92 93 94 95 9| | | | => | 1 2 3 4 | 92 93 94 95 10| | | | => | 2 3 4 5 | 93 94 95 96 11| | | | => | 2 3 4 5 | 93 94 95 96 @@ -414,7 +411,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number ---|-------|----|---|---|----------|------|-|------------------------------ 0 [IOpin 0 | 91| -| | ] [RegIn 0 |102| -| | ] - [MCell 0 |101|NOD inst_VPA_D| |*] + [MCell 0 |101|NOD inst_VPA_SYNC| |*] [MCell 1 |103| -| | ] 1 [IOpin 1 | 92|OUT AVEC|*| ] @@ -434,7 +431,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 4 [IOpin 4 | 95|INP A_18_|*|*] [RegIn 4 |114| -| | ] - [MCell 8 |113|NOD inst_DTACK_SYNC| |*] + [MCell 8 |113| -| | ] [MCell 9 |115| -| | ] 5 [IOpin 5 | 96|INP A_16_|*|*] @@ -460,20 +457,20 @@ IMX No. | +---- Block IO Pin or Macrocell Number --|--|--------------------|--------------------------------------------------- Mux00| Input Pin ( 86)| RST Mux01| ... | ... -Mux02| ... | ... -Mux03| Mcel 0 8 ( 113)| inst_DTACK_SYNC +Mux02| Mcel 6 4 ( 251)| cpu_est_2_ +Mux03| ... | ... Mux04| Input Pin ( 61)| CLK_OSZI -Mux05| ... | ... +Mux05| Mcel 6 6 ( 254)| cpu_est_1_ Mux06| ... | ... -Mux07| ... | ... +Mux07| Mcel 3 5 ( 181)| RN_VMA Mux08| ... | ... Mux09| IOPin 7 3 ( 82)| AS_030 -Mux10| Input Pin ( 36)| VPA +Mux10| Mcel 6 8 ( 257)| cpu_est_0_ Mux11| ... | ... -Mux12| Mcel 7 1 ( 271)| inst_CLK_000_D -Mux13| Mcel 6 8 ( 257)| SM_AMIGA_3_ -Mux14| IOPin 3 5 ( 30)| DTACK -Mux15| Mcel 0 0 ( 101)| inst_VPA_D +Mux12| ... | ... +Mux13| ... | ... +Mux14| Mcel 7 2 ( 272)| inst_CLK_000_D +Mux15| Mcel 0 0 ( 101)| inst_VPA_SYNC Mux16| ... | ... Mux17| ... | ... Mux18| ... | ... @@ -481,12 +478,12 @@ Mux19| ... | ... Mux20| ... | ... Mux21| ... | ... Mux22| ... | ... -Mux23| ... | ... -Mux24| ... | ... +Mux23| Mcel 6 2 ( 248)| RN_E +Mux24| Mcel 6 1 ( 247)| inst_VPA_D Mux25| ... | ... Mux26| ... | ... Mux27| ... | ... -Mux28| ... | ... +Mux28| Mcel 1 5 ( 133)| SM_AMIGA_3_ Mux29| ... | ... Mux30| ... | ... Mux31| ... | ... @@ -502,20 +499,20 @@ Mux32| ... | ... | Sig Type-+ | | | | | | | XOR to Mcell Assignment | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| CLK_EXP|OUT| | S |13 :+: 1| 4 to [ 0]| 1 XOR to [ 0] - 1| | ? | | S | | 4 to [ 0]| 1 XOR to [ 0] as logic PT - 2| | ? | | S | | 4 to [ 0]| 1 XOR free + 0| CLK_EXP|OUT| | A | 1 | 2 free | 1 XOR to [ 0] for 1 PT sig + 1| RESET|OUT| | A | 1 | 2 free | 1 XOR to [ 1] for 1 PT sig + 2| | ? | | S | | 4 free | 1 XOR free 3| | ? | | S | | 4 free | 1 XOR free 4| IPL_030_2_| IO| | S | 2 | 4 to [ 4]| 1 XOR free - 5| RESET|OUT| | A | 1 | 2 free | 1 XOR to [ 5] for 1 PT sig - 6| SM_AMIGA_D_0_|NOD| | A | 2 | 2 to [ 6]| 1 XOR free + 5| SM_AMIGA_3_|NOD| | S | 3 | 4 to [ 5]| 1 XOR free + 6| | ? | | S | | 4 free | 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free 8| IPL_030_0_| IO| | S | 2 | 4 to [ 8]| 1 XOR free - 9| SM_AMIGA_D_2_|NOD| | A | 2 | 2 to [ 9]| 1 XOR free + 9|inst_DTACK_SYNC|NOD| | S | 2 | 4 to [ 9]| 1 XOR free 10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free 12| IPL_030_1_| IO| | S | 2 | 4 to [12]| 1 XOR free -13| SM_AMIGA_D_1_|NOD| | A | 2 | 2 to [13]| 1 XOR free +13| | ? | | S | | 4 free | 1 XOR free 14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- @@ -529,21 +526,21 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| CLK_EXP|OUT| | S |13 :+: 1|=> can support up to [ 14] logic PT(s) - 1| | ? | | S | |=> can support up to [ 5] logic PT(s) - 2| | ? | | S | |=> can support up to [ 6] logic PT(s) - 3| | ? | | S | |=> can support up to [ 7] logic PT(s) - 4| IPL_030_2_| IO| | S | 2 |=> can support up to [ 12] logic PT(s) - 5| RESET|OUT| | A | 1 |=> can support up to [ 8] logic PT(s) - 6| SM_AMIGA_D_0_|NOD| | A | 2 |=> can support up to [ 10] logic PT(s) - 7| | ? | | S | |=> can support up to [ 5] logic PT(s) + 0| CLK_EXP|OUT| | A | 1 |=> can support up to [ 10] logic PT(s) + 1| RESET|OUT| | A | 1 |=> can support up to [ 15] logic PT(s) + 2| | ? | | S | |=> can support up to [ 12] logic PT(s) + 3| | ? | | S | |=> can support up to [ 10] logic PT(s) + 4| IPL_030_2_| IO| | S | 2 |=> can support up to [ 15] logic PT(s) + 5| SM_AMIGA_3_|NOD| | S | 3 |=> can support up to [ 15] logic PT(s) + 6| | ? | | S | |=> can support up to [ 10] logic PT(s) + 7| | ? | | S | |=> can support up to [ 10] logic PT(s) 8| IPL_030_0_| IO| | S | 2 |=> can support up to [ 15] logic PT(s) - 9| SM_AMIGA_D_2_|NOD| | A | 2 |=> can support up to [ 13] logic PT(s) + 9|inst_DTACK_SYNC|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) 10| | ? | | S | |=> can support up to [ 10] logic PT(s) -11| | ? | | S | |=> can support up to [ 10] logic PT(s) -12| IPL_030_1_| IO| | S | 2 |=> can support up to [ 15] logic PT(s) -13| SM_AMIGA_D_1_|NOD| | A | 2 |=> can support up to [ 13] logic PT(s) -14| | ? | | S | |=> can support up to [ 10] logic PT(s) +11| | ? | | S | |=> can support up to [ 15] logic PT(s) +12| IPL_030_1_| IO| | S | 2 |=> can support up to [ 20] logic PT(s) +13| | ? | | S | |=> can support up to [ 15] logic PT(s) +14| | ? | | S | |=> can support up to [ 15] logic PT(s) 15| | ? | | S | |=> can support up to [ 10] logic PT(s) --------------------------------------------------------------------------- =========================================================================== @@ -555,19 +552,19 @@ _|_________________|__|__|___|_____|_______________________________________ | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ 0| CLK_EXP|OUT| | => | 5 6 7 ( 0)| 5 4 3 ( 10) - 1| | | | => | 5 6 7 0 | 5 4 3 10 + 1| RESET|OUT| | => | 5 6 ( 7) 0 | 5 4 ( 3) 10 2| | | | => | 6 7 0 1 | 4 3 10 9 3| | | | => | 6 7 0 1 | 4 3 10 9 4| IPL_030_2_| IO| | => | 7 0 ( 1) 2 | 3 10 ( 9) 8 - 5| RESET|OUT| | => |( 7) 0 1 2 |( 3) 10 9 8 - 6| SM_AMIGA_D_0_|NOD| | => | 0 1 2 3 | 10 9 8 7 + 5| SM_AMIGA_3_|NOD| | => | 7 0 1 2 | 3 10 9 8 + 6| | | | => | 0 1 2 3 | 10 9 8 7 7| | | | => | 0 1 2 3 | 10 9 8 7 8| IPL_030_0_| IO| | => | 1 ( 2) 3 4 | 9 ( 8) 7 6 - 9| SM_AMIGA_D_2_|NOD| | => | 1 2 3 4 | 9 8 7 6 + 9|inst_DTACK_SYNC|NOD| | => | 1 2 3 4 | 9 8 7 6 10| | | | => | 2 3 4 5 | 8 7 6 5 11| | | | => | 2 3 4 5 | 8 7 6 5 12| IPL_030_1_| IO| | => |( 3) 4 5 6 |( 7) 6 5 4 -13| SM_AMIGA_D_1_|NOD| | => | 3 4 5 6 | 7 6 5 4 +13| | | | => | 3 4 5 6 | 7 6 5 4 14| | | | => | 4 5 6 7 | 6 5 4 3 15| | | | => | 4 5 6 7 | 6 5 4 3 --------------------------------------------------------------------------- @@ -587,7 +584,7 @@ _|_________________|__|___|_____|___________________________________________ 4| A_29_|INP|*| 6| => | 8 9 10 11 12 13 14 15 5| A_30_|INP|*| 5| => | 10 11 12 13 14 15 0 1 6| A_31_|INP|*| 4| => | 12 13 14 15 0 1 2 3 - 7| RESET|OUT|*| 3| => | 14 15 0 1 2 3 4 ( 5) + 7| RESET|OUT|*| 3| => | 14 15 0 ( 1) 2 3 4 5 --------------------------------------------------------------------------- =========================================================================== < Block [ 1] > IO/Node and IO/Input Macrocell Pairing Table @@ -622,7 +619,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 0 [IOpin 0 | 10|OUT CLK_EXP|*| ] [RegIn 0 |126| -| | ] [MCell 0 |125|OUT CLK_EXP| | ] - [MCell 1 |127| -| | ] + [MCell 1 |127|OUT RESET| | ] 1 [IOpin 1 | 9| IO IPL_030_2_|*| ] paired w/[ RN_IPL_030_2_] [RegIn 1 |129| -| | ] @@ -632,17 +629,17 @@ IMX No. | +---- Block IO Pin or Macrocell Number 2 [IOpin 2 | 8| IO IPL_030_0_|*| ] paired w/[ RN_IPL_030_0_] [RegIn 2 |132| -| | ] [MCell 4 |131|NOD RN_IPL_030_2_| |*] paired w/[ IPL_030_2_] - [MCell 5 |133|OUT RESET| | ] + [MCell 5 |133|NOD SM_AMIGA_3_| |*] 3 [IOpin 3 | 7| IO IPL_030_1_|*| ] paired w/[ RN_IPL_030_1_] [RegIn 3 |135| -| | ] - [MCell 6 |134|NOD SM_AMIGA_D_0_| |*] + [MCell 6 |134| -| | ] [MCell 7 |136| -| | ] 4 [IOpin 4 | 6|INP A_29_|*|*] [RegIn 4 |138| -| | ] [MCell 8 |137|NOD RN_IPL_030_0_| |*] paired w/[ IPL_030_0_] - [MCell 9 |139|NOD SM_AMIGA_D_2_| |*] + [MCell 9 |139|NOD inst_DTACK_SYNC| |*] 5 [IOpin 5 | 5|INP A_30_|*|*] [RegIn 5 |141| -| | ] @@ -652,7 +649,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 6 [IOpin 6 | 4|INP A_31_|*|*] [RegIn 6 |144| -| | ] [MCell 12 |143|NOD RN_IPL_030_1_| |*] paired w/[ IPL_030_1_] - [MCell 13 |145|NOD SM_AMIGA_D_1_| |*] + [MCell 13 |145| -| | ] 7 [IOpin 7 | 3|OUT RESET|*| ] [RegIn 7 |147| -| | ] @@ -665,35 +662,35 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| Input Pin ( 86)| RST +Mux00| IOPin 6 2 ( 67)| IPL_0_ Mux01| Mcel 3 13 ( 193)| SM_AMIGA_4_ -Mux02| Mcel 1 6 ( 134)| SM_AMIGA_D_0_ +Mux02| ... | ... Mux03| IOPin 5 4 ( 56)| IPL_1_ -Mux04| Mcel 3 6 ( 182)| SM_AMIGA_5_ +Mux04| IOPin 6 3 ( 68)| IPL_2_ Mux05| Mcel 7 9 ( 283)| inst_RISING_CLK_AMIGA -Mux06| Mcel 1 9 ( 139)| SM_AMIGA_D_2_ -Mux07| Mcel 6 12 ( 263)| SM_AMIGA_1_ +Mux06| Mcel 1 9 ( 139)| inst_DTACK_SYNC +Mux07| Mcel 6 12 ( 263)| inst_CLK_OUT_PRE Mux08| Mcel 1 8 ( 137)| RN_IPL_030_0_ -Mux09| Mcel 6 13 ( 265)| SM_AMIGA_2_ -Mux10| Mcel 6 9 ( 259)| SM_AMIGA_0_ +Mux09| IOPin 7 3 ( 82)| AS_030 +Mux10| ... | ... Mux11| ... | ... Mux12| Mcel 1 12 ( 143)| RN_IPL_030_1_ -Mux13| Mcel 6 8 ( 257)| SM_AMIGA_3_ -Mux14| ... | ... -Mux15| ... | ... -Mux16| IOPin 6 2 ( 67)| IPL_0_ +Mux13| ... | ... +Mux14| Mcel 7 2 ( 272)| inst_CLK_000_D +Mux15| Mcel 0 0 ( 101)| inst_VPA_SYNC +Mux16| ... | ... Mux17| ... | ... Mux18| ... | ... Mux19| ... | ... Mux20| ... | ... -Mux21| Mcel 1 13 ( 145)| SM_AMIGA_D_1_ -Mux22| IOPin 6 3 ( 68)| IPL_2_ -Mux23| ... | ... -Mux24| ... | ... +Mux21| Input Pin ( 86)| RST +Mux22| ... | ... +Mux23| IOPin 3 5 ( 30)| DTACK +Mux24| Mcel 6 1 ( 247)| inst_VPA_D Mux25| ... | ... Mux26| ... | ... Mux27| Mcel 1 4 ( 131)| RN_IPL_030_2_ -Mux28| Mcel 3 2 ( 176)| SM_AMIGA_6_ +Mux28| Mcel 1 5 ( 133)| SM_AMIGA_3_ Mux29| Input Pin ( 61)| CLK_OSZI Mux30| ... | ... Mux31| ... | ... @@ -915,16 +912,16 @@ Mux32| ... | ... _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| DTACK| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig 1| BG_000| IO| | S | 3 | 4 to [ 1]| 1 XOR free - 2| SM_AMIGA_6_|NOD| | S | 3 | 4 to [ 2]| 1 XOR free + 2|AMIGA_BUS_ENABLE|OUT| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig 3| | ? | | S | | 4 free | 1 XOR free - 4| VMA| IO| | S | 2 | 4 to [ 4]| 1 XOR free - 5| AS_000| IO| | S | 2 | 4 to [ 5]| 1 XOR free - 6| SM_AMIGA_5_|NOD| | S | 2 | 4 to [ 6]| 1 XOR free - 7| | ? | | S | | 4 free | 1 XOR free + 4| | ? | | S | | 4 free | 1 XOR free + 5| VMA| IO| | S | 2 | 4 to [ 5]| 1 XOR free + 6| SM_AMIGA_6_|NOD| | S | 3 | 4 to [ 6]| 1 XOR free + 7| | ? | | S | | 4 to [ 8]| 1 XOR free 8| LDS_000| IO| | S |12 | 4 to [ 8]| 1 XOR to [ 8] as logic PT - 9|AMIGA_BUS_ENABLE|OUT| | S | 1 | 4 to [ 8]| 1 XOR to [ 9] for 1 PT sig -10| | ? | | S | | 4 to [ 8]| 1 XOR free -11| | ? | | S | | 4 free | 1 XOR free + 9| AS_000| IO| | S | 2 | 4 to [ 8]| 1 XOR free +10| SM_AMIGA_5_|NOD| | S | 2 | 4 to [10]| 1 XOR free +11| | ? | | S | | 4 to [ 9]| 1 XOR free 12| UDS_000| IO| | S | 8 | 4 to [12]| 1 XOR to [12] as logic PT 13| SM_AMIGA_4_|NOD| | S | 2 | 4 to [13]| 1 XOR free 14| | ? | | S | | 4 to [12]| 1 XOR free @@ -940,19 +937,19 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| DTACK| IO| | S | 1 |=> can support up to [ 5] logic PT(s) - 1| BG_000| IO| | S | 3 |=> can support up to [ 14] logic PT(s) - 2| SM_AMIGA_6_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s) - 3| | ? | | S | |=> can support up to [ 5] logic PT(s) - 4| VMA| IO| | S | 2 |=> can support up to [ 10] logic PT(s) - 5| AS_000| IO| | S | 2 |=> can support up to [ 10] logic PT(s) - 6| SM_AMIGA_5_|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) - 7| | ? | | S | |=> can support up to [ 5] logic PT(s) - 8| LDS_000| IO| | S |12 |=> can support up to [ 19] logic PT(s) - 9|AMIGA_BUS_ENABLE|OUT| | S | 1 |=> can support up to [ 6] logic PT(s) -10| | ? | | S | |=> can support up to [ 6] logic PT(s) -11| | ? | | S | |=> can support up to [ 5] logic PT(s) -12| UDS_000| IO| | S | 8 |=> can support up to [ 15] logic PT(s) + 0| DTACK| IO| | S | 1 |=> can support up to [ 9] logic PT(s) + 1| BG_000| IO| | S | 3 |=> can support up to [ 18] logic PT(s) + 2|AMIGA_BUS_ENABLE|OUT| | S | 1 |=> can support up to [ 15] logic PT(s) + 3| | ? | | S | |=> can support up to [ 14] logic PT(s) + 4| | ? | | S | |=> can support up to [ 10] logic PT(s) + 5| VMA| IO| | S | 2 |=> can support up to [ 10] logic PT(s) + 6| SM_AMIGA_6_|NOD| | S | 3 |=> can support up to [ 5] logic PT(s) + 7| | ? | | S | |=> can support up to [ 1] logic PT(s) + 8| LDS_000| IO| | S |12 |=> can support up to [ 15] logic PT(s) + 9| AS_000| IO| | S | 2 |=> can support up to [ 5] logic PT(s) +10| SM_AMIGA_5_|NOD| | S | 2 |=> can support up to [ 5] logic PT(s) +11| | ? | | S | |=> can support up to [ 1] logic PT(s) +12| UDS_000| IO| | S | 8 |=> can support up to [ 10] logic PT(s) 13| SM_AMIGA_4_|NOD| | S | 2 |=> can support up to [ 10] logic PT(s) 14| | ? | | S | |=> can support up to [ 6] logic PT(s) 15| | ? | | S | |=> can support up to [ 5] logic PT(s) @@ -967,15 +964,15 @@ _|_________________|__|__|___|_____|_______________________________________ _|_________________|__|_____|____________________|________________________ 0| DTACK| IO| | => |( 5) 6 7 0 |( 30) 29 28 35 1| BG_000| IO| | => | 5 ( 6) 7 0 | 30 ( 29) 28 35 - 2| SM_AMIGA_6_|NOD| | => | 6 7 0 1 | 29 28 35 34 + 2|AMIGA_BUS_ENABLE|OUT| | => | 6 7 0 ( 1)| 29 28 35 ( 34) 3| | | | => | 6 7 0 1 | 29 28 35 34 - 4| VMA| IO| | => | 7 ( 0) 1 2 | 28 ( 35) 34 33 - 5| AS_000| IO| | => | 7 0 1 ( 2)| 28 35 34 ( 33) - 6| SM_AMIGA_5_|NOD| | => | 0 1 2 3 | 35 34 33 32 + 4| | | | => | 7 0 1 2 | 28 35 34 33 + 5| VMA| IO| | => | 7 ( 0) 1 2 | 28 ( 35) 34 33 + 6| SM_AMIGA_6_|NOD| | => | 0 1 2 3 | 35 34 33 32 7| | | | => | 0 1 2 3 | 35 34 33 32 8| LDS_000| IO| | => | 1 2 3 ( 4)| 34 33 32 ( 31) - 9|AMIGA_BUS_ENABLE|OUT| | => |( 1) 2 3 4 |( 34) 33 32 31 -10| | | | => | 2 3 4 5 | 33 32 31 30 + 9| AS_000| IO| | => | 1 ( 2) 3 4 | 34 ( 33) 32 31 +10| SM_AMIGA_5_|NOD| | => | 2 3 4 5 | 33 32 31 30 11| | | | => | 2 3 4 5 | 33 32 31 30 12| UDS_000| IO| | => |( 3) 4 5 6 |( 32) 31 30 29 13| SM_AMIGA_4_|NOD| | => | 3 4 5 6 | 32 31 30 29 @@ -991,9 +988,9 @@ _|_________________|__|_____|____________________|________________________ | Sig Type--+ | | | | Signal Name | | | | Node Destinations Via Output Matrix _|_________________|__|___|_____|___________________________________________ - 0| VMA| IO|*| 35| => | 0 1 2 3 ( 4) 5 6 7 - 1|AMIGA_BUS_ENABLE|OUT|*| 34| => | 2 3 4 5 6 7 8 ( 9) - 2| AS_000| IO|*| 33| => | 4 ( 5) 6 7 8 9 10 11 + 0| VMA| IO|*| 35| => | 0 1 2 3 4 ( 5) 6 7 + 1|AMIGA_BUS_ENABLE|OUT|*| 34| => | ( 2) 3 4 5 6 7 8 9 + 2| AS_000| IO|*| 33| => | 4 5 6 7 8 ( 9) 10 11 3| UDS_000| IO|*| 32| => | 6 7 8 9 10 11 (12) 13 4| LDS_000| IO|*| 31| => | ( 8) 9 10 11 12 13 14 15 5| DTACK| IO|*| 30| => | 10 11 12 13 14 15 ( 0) 1 @@ -1039,27 +1036,27 @@ IMX No. | +---- Block IO Pin or Macrocell Number 1 [IOpin 1 | 34|OUT AMIGA_BUS_ENABLE|*| ] [RegIn 1 |177| -| | ] - [MCell 2 |176|NOD SM_AMIGA_6_| |*] + [MCell 2 |176|OUT AMIGA_BUS_ENABLE| | ] [MCell 3 |178| -| | ] 2 [IOpin 2 | 33| IO AS_000|*| ] paired w/[ RN_AS_000] [RegIn 2 |180| -| | ] - [MCell 4 |179|NOD RN_VMA| |*] paired w/[ VMA] - [MCell 5 |181|NOD RN_AS_000| |*] paired w/[ AS_000] + [MCell 4 |179| -| | ] + [MCell 5 |181|NOD RN_VMA| |*] paired w/[ VMA] 3 [IOpin 3 | 32| IO UDS_000|*| ] paired w/[ RN_UDS_000] [RegIn 3 |183| -| | ] - [MCell 6 |182|NOD SM_AMIGA_5_| |*] + [MCell 6 |182|NOD SM_AMIGA_6_| |*] [MCell 7 |184| -| | ] 4 [IOpin 4 | 31| IO LDS_000|*| ] paired w/[ RN_LDS_000] [RegIn 4 |186| -| | ] [MCell 8 |185|NOD RN_LDS_000| |*] paired w/[ LDS_000] - [MCell 9 |187|OUT AMIGA_BUS_ENABLE| | ] + [MCell 9 |187|NOD RN_AS_000| |*] paired w/[ AS_000] 5 [IOpin 5 | 30| IO DTACK|*|*] [RegIn 5 |189| -| | ] - [MCell 10 |188| -| | ] + [MCell 10 |188|NOD SM_AMIGA_5_| |*] [MCell 11 |190| -| | ] 6 [IOpin 6 | 29| IO BG_000|*| ] paired w/[ RN_BG_000] @@ -1078,39 +1075,39 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux00| IOPin 6 4 ( 69)| A_0_ Mux01| Mcel 3 13 ( 193)| SM_AMIGA_4_ -Mux02| Mcel 6 4 ( 251)| RN_E -Mux03| Mcel 3 2 ( 176)| SM_AMIGA_6_ -Mux04| IOPin 2 6 ( 21)| BG_030 -Mux05| Input Pin ( 14)| CPU_SPACE +Mux02| Mcel 6 4 ( 251)| cpu_est_2_ +Mux03| Mcel 7 8 ( 281)| inst_AS_030_000_SYNC +Mux04| Mcel 7 2 ( 272)| inst_CLK_000_D +Mux05| Mcel 3 12 ( 191)| RN_UDS_000 Mux06| IOPin 7 6 ( 79)| SIZE_1_ -Mux07| Mcel 3 5 ( 181)| RN_AS_000 -Mux08| Mcel 6 7 ( 256)| cpu_est_d_1_ -Mux09| IOPin 7 3 ( 82)| AS_030 +Mux07| Mcel 7 13 ( 289)| inst_CLK_000_DD +Mux08| IOPin 6 6 ( 71)| RW +Mux09| Mcel 6 11 ( 262)| cpu_est_d_3_ Mux10| IOPin 7 4 ( 81)| DSACK_1_ -Mux11| Mcel 3 12 ( 191)| RN_UDS_000 +Mux11| Mcel 3 5 ( 181)| RN_VMA Mux12| IOPin 0 7 ( 98)| DS_030 -Mux13| Mcel 7 5 ( 277)| inst_AS_030_000_SYNC -Mux14| Mcel 3 4 ( 179)| RN_VMA -Mux15| IOPin 6 4 ( 69)| A_0_ -Mux16| Mcel 3 8 ( 185)| RN_LDS_000 -Mux17| IOPin 6 5 ( 70)| SIZE_0_ +Mux13| Mcel 6 8 ( 257)| cpu_est_0_ +Mux14| IOPin 6 5 ( 70)| SIZE_0_ +Mux15| Input Pin ( 14)| CPU_SPACE +Mux16| Mcel 3 6 ( 182)| SM_AMIGA_6_ +Mux17| Mcel 3 1 ( 175)| RN_BG_000 Mux18| Mcel 6 15 ( 268)| cpu_est_d_0_ -Mux19| Mcel 7 1 ( 271)| inst_CLK_000_D -Mux20| Input Pin ( 64)| CLK_030 +Mux19| IOPin 7 3 ( 82)| AS_030 +Mux20| Mcel 3 10 ( 188)| SM_AMIGA_5_ Mux21| Input Pin ( 86)| RST -Mux22| Mcel 6 5 ( 253)| cpu_est_0_ -Mux23| Mcel 6 6 ( 254)| SM_AMIGA_7_ -Mux24| Mcel 6 3 ( 250)| cpu_est_d_2_ -Mux25| IOPin 6 6 ( 71)| RW -Mux26| Mcel 6 11 ( 262)| cpu_est_d_3_ -Mux27| Mcel 3 1 ( 175)| RN_BG_000 -Mux28| Mcel 7 13 ( 289)| inst_CLK_000_DD -Mux29| Mcel 0 0 ( 101)| inst_VPA_D -Mux30| Mcel 3 6 ( 182)| SM_AMIGA_5_ -Mux31| Mcel 6 2 ( 248)| cpu_est_1_ -Mux32| Mcel 6 1 ( 247)| cpu_est_2_ +Mux22| IOPin 2 6 ( 21)| BG_030 +Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux24| Mcel 6 1 ( 247)| inst_VPA_D +Mux25| Mcel 3 9 ( 187)| RN_AS_000 +Mux26| Mcel 6 7 ( 256)| cpu_est_d_1_ +Mux27| Mcel 6 9 ( 259)| SM_AMIGA_7_ +Mux28| Input Pin ( 64)| CLK_030 +Mux29| Mcel 6 6 ( 254)| cpu_est_1_ +Mux30| Mcel 6 3 ( 250)| cpu_est_d_2_ +Mux31| Mcel 6 2 ( 248)| RN_E +Mux32| Mcel 3 8 ( 185)| RN_LDS_000 --------------------------------------------------------------------------- =========================================================================== < Block [ 4] > Macrocell (MCell) Cluster Assignments @@ -1316,85 +1313,6 @@ Mux30| ... | ... Mux31| ... | ... Mux32| ... | ... --------------------------------------------------------------------------- -=========================================================================== - < Block [ 5] > Macrocell (MCell) Cluster Assignments -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size - | Sync/Async-------+ | | | Cluster to Mcell Assignment - | Node Fixed(*)----+ | | | | | +- XOR PT Size - | Sig Type-+ | | | | | | | XOR to Mcell Assignment - | Signal Name | | | | | | | | | -_|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| inst_VPA_SYNC|NOD| | S | 2 | 4 to [ 0]| 1 XOR free - 1| | ? | | S | | 4 free | 1 XOR free - 2| | ? | | S | | 4 free | 1 XOR free - 3| | ? | | S | | 4 free | 1 XOR free - 4| | ? | | S | | 4 free | 1 XOR free - 5| | ? | | S | | 4 free | 1 XOR free - 6| | ? | | S | | 4 free | 1 XOR free - 7| | ? | | S | | 4 free | 1 XOR free - 8| | ? | | S | | 4 free | 1 XOR free - 9| | ? | | S | | 4 free | 1 XOR free -10| | ? | | S | | 4 free | 1 XOR free -11| | ? | | S | | 4 free | 1 XOR free -12| | ? | | S | | 4 free | 1 XOR free -13| | ? | | S | | 4 free | 1 XOR free -14| | ? | | S | | 4 free | 1 XOR free -15| | ? | | S | | 4 free | 1 XOR free ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 5] > Maximum PT Capacity -=========================================================================== - + Macrocell Number - | PT Requirements------ Logic XOR+ - | Sync/Async-------+ | | - | Node Fixed(*)----+ | | | - | Sig Type-+ | | | | - | Signal Name | | | | | Maximum PT Capacity -_|_________________|__|__|___|_____|_______________________________________ - 0| inst_VPA_SYNC|NOD| | S | 2 |=> can support up to [ 15] logic PT(s) - 1| | ? | | S | |=> can support up to [ 15] logic PT(s) - 2| | ? | | S | |=> can support up to [ 20] logic PT(s) - 3| | ? | | S | |=> can support up to [ 20] logic PT(s) - 4| | ? | | S | |=> can support up to [ 20] logic PT(s) - 5| | ? | | S | |=> can support up to [ 20] logic PT(s) - 6| | ? | | S | |=> can support up to [ 20] logic PT(s) - 7| | ? | | S | |=> can support up to [ 20] logic PT(s) - 8| | ? | | S | |=> can support up to [ 20] logic PT(s) - 9| | ? | | S | |=> can support up to [ 20] logic PT(s) -10| | ? | | S | |=> can support up to [ 20] logic PT(s) -11| | ? | | S | |=> can support up to [ 20] logic PT(s) -12| | ? | | S | |=> can support up to [ 20] logic PT(s) -13| | ? | | S | |=> can support up to [ 20] logic PT(s) -14| | ? | | S | |=> can support up to [ 15] logic PT(s) -15| | ? | | S | |=> can support up to [ 10] logic PT(s) ---------------------------------------------------------------------------- -=========================================================================== - < Block [ 5] > Node-Pin Assignments -=========================================================================== - + Macrocell Number - | Node Fixed(*)------+ - | Sig Type---+ | to | Block [ 5] IO Pin | Device Pin - | Signal Name | | pin | Numbers | Numbers -_|_________________|__|_____|____________________|________________________ - 0| inst_VPA_SYNC|NOD| | => | 5 6 7 0 | 55 54 53 60 - 1| | | | => | 5 6 7 0 | 55 54 53 60 - 2| | | | => | 6 7 0 1 | 54 53 60 59 - 3| | | | => | 6 7 0 1 | 54 53 60 59 - 4| | | | => | 7 0 1 2 | 53 60 59 58 - 5| | | | => | 7 0 1 2 | 53 60 59 58 - 6| | | | => | 0 1 2 3 | 60 59 58 57 - 7| | | | => | 0 1 2 3 | 60 59 58 57 - 8| | | | => | 1 2 3 4 | 59 58 57 56 - 9| | | | => | 1 2 3 4 | 59 58 57 56 -10| | | | => | 2 3 4 5 | 58 57 56 55 -11| | | | => | 2 3 4 5 | 58 57 56 55 -12| | | | => | 3 4 5 6 | 57 56 55 54 -13| | | | => | 3 4 5 6 | 57 56 55 54 -14| | | | => | 4 5 6 7 | 56 55 54 53 -15| | | | => | 4 5 6 7 | 56 55 54 53 ---------------------------------------------------------------------------- =========================================================================== < Block [ 5] > IO-to-Node Pin Mapping =========================================================================== @@ -1442,7 +1360,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number ---|-------|----|---|---|----------|------|-|------------------------------ 0 [IOpin 0 | 60| -| | ] [RegIn 0 |222| -| | ] - [MCell 0 |221|NOD inst_VPA_SYNC| |*] + [MCell 0 |221| -| | ] [MCell 1 |223| -| | ] 1 [IOpin 1 | 59|INP A_17_|*|*] @@ -1480,46 +1398,6 @@ IMX No. | +---- Block IO Pin or Macrocell Number [MCell 14 |242| -| | ] [MCell 15 |244| -| | ] --------------------------------------------------------------------------- -=========================================================================== - < Block [ 5] > Logic Array Fan-in -=========================================================================== - +- Central Switch Matrix No. - | Src (ABEL Node/Pin#) Signal ---|--|--------------------|--------------------------------------------------- -Mux00| Input Pin ( 86)| RST -Mux01| ... | ... -Mux02| Mcel 6 4 ( 251)| RN_E -Mux03| Mcel 6 5 ( 253)| cpu_est_0_ -Mux04| Input Pin ( 61)| CLK_OSZI -Mux05| Mcel 5 0 ( 221)| inst_VPA_SYNC -Mux06| ... | ... -Mux07| ... | ... -Mux08| ... | ... -Mux09| IOPin 7 3 ( 82)| AS_030 -Mux10| Mcel 3 4 ( 179)| RN_VMA -Mux11| ... | ... -Mux12| Mcel 7 1 ( 271)| inst_CLK_000_D -Mux13| Mcel 6 8 ( 257)| SM_AMIGA_3_ -Mux14| ... | ... -Mux15| Mcel 0 0 ( 101)| inst_VPA_D -Mux16| ... | ... -Mux17| ... | ... -Mux18| ... | ... -Mux19| ... | ... -Mux20| ... | ... -Mux21| ... | ... -Mux22| ... | ... -Mux23| Mcel 6 2 ( 248)| cpu_est_1_ -Mux24| Mcel 6 1 ( 247)| cpu_est_2_ -Mux25| ... | ... -Mux26| ... | ... -Mux27| ... | ... -Mux28| ... | ... -Mux29| ... | ... -Mux30| ... | ... -Mux31| ... | ... -Mux32| ... | ... ---------------------------------------------------------------------------- =========================================================================== < Block [ 6] > Macrocell (MCell) Cluster Assignments =========================================================================== @@ -1531,19 +1409,19 @@ Mux32| ... | ... | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| CLK_DIV_OUT|OUT| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig - 1| cpu_est_2_|NOD| | S | 3 :+: 1| 4 to [ 1]| 1 XOR to [ 1] - 2| cpu_est_1_|NOD| | S | 4 | 4 to [ 2]| 1 XOR free + 1| inst_VPA_D|NOD| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig + 2| E| IO| | S | 3 | 4 to [ 2]| 1 XOR free 3| cpu_est_d_2_|NOD| | S | 1 | 4 free | 1 XOR to [ 3] for 1 PT sig - 4| E| IO| | S | 3 | 4 to [ 4]| 1 XOR free - 5| cpu_est_0_|NOD| | S | 3 | 4 to [ 5]| 1 XOR free - 6| SM_AMIGA_7_|NOD| | A | 2 | 2 to [ 6]| 1 XOR free + 4| cpu_est_2_|NOD| | S | 3 :+: 1| 4 to [ 4]| 1 XOR to [ 4] + 5| SM_AMIGA_1_|NOD| | A | 3 | 2 to [ 5]| 1 XOR to [ 5] as logic PT + 6| cpu_est_1_|NOD| | S | 4 | 4 to [ 6]| 1 XOR free 7| cpu_est_d_1_|NOD| | S | 1 | 4 free | 1 XOR to [ 7] for 1 PT sig - 8| SM_AMIGA_3_|NOD| | A | 3 | 2 to [ 8]| 1 XOR to [ 8] as logic PT - 9| SM_AMIGA_0_|NOD| | A | 3 | 2 to [ 9]| 1 XOR to [ 9] as logic PT -10|inst_CLK_OUT_PRE|NOD| | S | 2 | 4 to [10]| 1 XOR free + 8| cpu_est_0_|NOD| | S | 3 | 4 to [ 8]| 1 XOR free + 9| SM_AMIGA_7_|NOD| | A | 2 | 2 to [ 9]| 1 XOR free +10| SM_AMIGA_2_|NOD| | A | 3 | 2 to [10]| 1 XOR to [10] as logic PT 11| cpu_est_d_3_|NOD| | S | 1 | 4 free | 1 XOR to [11] for 1 PT sig -12| SM_AMIGA_1_|NOD| | A | 3 | 2 to [12]| 1 XOR to [12] as logic PT -13| SM_AMIGA_2_|NOD| | A | 3 | 2 to [13]| 1 XOR to [13] as logic PT +12|inst_CLK_OUT_PRE|NOD| | S | 2 | 4 to [12]| 1 XOR free +13| SM_AMIGA_0_|NOD| | A | 3 | 2 to [13]| 1 XOR to [13] as logic PT 14| CLK_CNT_0_|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig 15| cpu_est_d_0_|NOD| | S | 1 | 4 free | 1 XOR to [15] for 1 PT sig --------------------------------------------------------------------------- @@ -1557,20 +1435,20 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| CLK_DIV_OUT|OUT| | S | 1 |=> can support up to [ 5] logic PT(s) - 1| cpu_est_2_|NOD| | S | 3 :+: 1|=> can support up to [ 12] logic PT(s) - 2| cpu_est_1_|NOD| | S | 4 |=> can support up to [ 9] logic PT(s) + 0| CLK_DIV_OUT|OUT| | S | 1 |=> can support up to [ 9] logic PT(s) + 1| inst_VPA_D|NOD| | S | 1 |=> can support up to [ 13] logic PT(s) + 2| E| IO| | S | 3 |=> can support up to [ 13] logic PT(s) 3| cpu_est_d_2_|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) - 4| E| IO| | S | 3 |=> can support up to [ 9] logic PT(s) - 5| cpu_est_0_|NOD| | S | 3 |=> can support up to [ 9] logic PT(s) - 6| SM_AMIGA_7_|NOD| | A | 2 |=> can support up to [ 7] logic PT(s) + 4| cpu_est_2_|NOD| | S | 3 :+: 1|=> can support up to [ 8] logic PT(s) + 5| SM_AMIGA_1_|NOD| | A | 3 |=> can support up to [ 7] logic PT(s) + 6| cpu_est_1_|NOD| | S | 4 |=> can support up to [ 9] logic PT(s) 7| cpu_est_d_1_|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) - 8| SM_AMIGA_3_|NOD| | A | 3 |=> can support up to [ 7] logic PT(s) - 9| SM_AMIGA_0_|NOD| | A | 3 |=> can support up to [ 7] logic PT(s) -10|inst_CLK_OUT_PRE|NOD| | S | 2 |=> can support up to [ 9] logic PT(s) + 8| cpu_est_0_|NOD| | S | 3 |=> can support up to [ 9] logic PT(s) + 9| SM_AMIGA_7_|NOD| | A | 2 |=> can support up to [ 7] logic PT(s) +10| SM_AMIGA_2_|NOD| | A | 3 |=> can support up to [ 7] logic PT(s) 11| cpu_est_d_3_|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) -12| SM_AMIGA_1_|NOD| | A | 3 |=> can support up to [ 11] logic PT(s) -13| SM_AMIGA_2_|NOD| | A | 3 |=> can support up to [ 11] logic PT(s) +12|inst_CLK_OUT_PRE|NOD| | S | 2 |=> can support up to [ 13] logic PT(s) +13| SM_AMIGA_0_|NOD| | A | 3 |=> can support up to [ 11] logic PT(s) 14| CLK_CNT_0_|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) 15| cpu_est_d_0_|NOD| | S | 1 |=> can support up to [ 9] logic PT(s) --------------------------------------------------------------------------- @@ -1583,19 +1461,19 @@ _|_________________|__|__|___|_____|_______________________________________ | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ 0| CLK_DIV_OUT|OUT| | => | 5 6 7 ( 0)| 70 71 72 ( 65) - 1| cpu_est_2_|NOD| | => | 5 6 7 0 | 70 71 72 65 - 2| cpu_est_1_|NOD| | => | 6 7 0 1 | 71 72 65 66 + 1| inst_VPA_D|NOD| | => | 5 6 7 0 | 70 71 72 65 + 2| E| IO| | => | 6 7 0 ( 1)| 71 72 65 ( 66) 3| cpu_est_d_2_|NOD| | => | 6 7 0 1 | 71 72 65 66 - 4| E| IO| | => | 7 0 ( 1) 2 | 72 65 ( 66) 67 - 5| cpu_est_0_|NOD| | => | 7 0 1 2 | 72 65 66 67 - 6| SM_AMIGA_7_|NOD| | => | 0 1 2 3 | 65 66 67 68 + 4| cpu_est_2_|NOD| | => | 7 0 1 2 | 72 65 66 67 + 5| SM_AMIGA_1_|NOD| | => | 7 0 1 2 | 72 65 66 67 + 6| cpu_est_1_|NOD| | => | 0 1 2 3 | 65 66 67 68 7| cpu_est_d_1_|NOD| | => | 0 1 2 3 | 65 66 67 68 - 8| SM_AMIGA_3_|NOD| | => | 1 2 3 4 | 66 67 68 69 - 9| SM_AMIGA_0_|NOD| | => | 1 2 3 4 | 66 67 68 69 -10|inst_CLK_OUT_PRE|NOD| | => | 2 3 4 5 | 67 68 69 70 + 8| cpu_est_0_|NOD| | => | 1 2 3 4 | 66 67 68 69 + 9| SM_AMIGA_7_|NOD| | => | 1 2 3 4 | 66 67 68 69 +10| SM_AMIGA_2_|NOD| | => | 2 3 4 5 | 67 68 69 70 11| cpu_est_d_3_|NOD| | => | 2 3 4 5 | 67 68 69 70 -12| SM_AMIGA_1_|NOD| | => | 3 4 5 6 | 68 69 70 71 -13| SM_AMIGA_2_|NOD| | => | 3 4 5 6 | 68 69 70 71 +12|inst_CLK_OUT_PRE|NOD| | => | 3 4 5 6 | 68 69 70 71 +13| SM_AMIGA_0_|NOD| | => | 3 4 5 6 | 68 69 70 71 14| CLK_CNT_0_|NOD| | => | 4 5 6 7 | 69 70 71 72 15| cpu_est_d_0_|NOD| | => | 4 5 6 7 | 69 70 71 72 --------------------------------------------------------------------------- @@ -1609,7 +1487,7 @@ _|_________________|__|_____|____________________|________________________ | Signal Name | | | | Node Destinations Via Output Matrix _|_________________|__|___|_____|___________________________________________ 0| CLK_DIV_OUT|OUT|*| 65| => | ( 0) 1 2 3 4 5 6 7 - 1| E| IO|*| 66| => | 2 3 ( 4) 5 6 7 8 9 + 1| E| IO|*| 66| => | ( 2) 3 4 5 6 7 8 9 2| IPL_0_|INP|*| 67| => | 4 5 6 7 8 9 10 11 3| IPL_2_|INP|*| 68| => | 6 7 8 9 10 11 12 13 4| A_0_|INP|*| 69| => | 8 9 10 11 12 13 14 15 @@ -1648,37 +1526,37 @@ IMX No. | +---- Block IO Pin or Macrocell Number 0 [IOpin 0 | 65|OUT CLK_DIV_OUT|*| ] [RegIn 0 |246| -| | ] [MCell 0 |245|OUT CLK_DIV_OUT| | ] - [MCell 1 |247|NOD cpu_est_2_| |*] + [MCell 1 |247|NOD inst_VPA_D| |*] 1 [IOpin 1 | 66| IO E|*| ] paired w/[ RN_E] [RegIn 1 |249| -| | ] - [MCell 2 |248|NOD cpu_est_1_| |*] + [MCell 2 |248|NOD RN_E| |*] paired w/[ E] [MCell 3 |250|NOD cpu_est_d_2_| |*] 2 [IOpin 2 | 67|INP IPL_0_|*|*] [RegIn 2 |252| -| | ] - [MCell 4 |251|NOD RN_E| |*] paired w/[ E] - [MCell 5 |253|NOD cpu_est_0_| |*] + [MCell 4 |251|NOD cpu_est_2_| |*] + [MCell 5 |253|NOD SM_AMIGA_1_| |*] 3 [IOpin 3 | 68|INP IPL_2_|*|*] [RegIn 3 |255| -| | ] - [MCell 6 |254|NOD SM_AMIGA_7_| |*] + [MCell 6 |254|NOD cpu_est_1_| |*] [MCell 7 |256|NOD cpu_est_d_1_| |*] 4 [IOpin 4 | 69|INP A_0_|*|*] [RegIn 4 |258| -| | ] - [MCell 8 |257|NOD SM_AMIGA_3_| |*] - [MCell 9 |259|NOD SM_AMIGA_0_| |*] + [MCell 8 |257|NOD cpu_est_0_| |*] + [MCell 9 |259|NOD SM_AMIGA_7_| |*] 5 [IOpin 5 | 70|INP SIZE_0_|*|*] [RegIn 5 |261| -| | ] - [MCell 10 |260|NOD inst_CLK_OUT_PRE| |*] + [MCell 10 |260|NOD SM_AMIGA_2_| |*] [MCell 11 |262|NOD cpu_est_d_3_| |*] 6 [IOpin 6 | 71|INP RW|*|*] [RegIn 6 |264| -| | ] - [MCell 12 |263|NOD SM_AMIGA_1_| |*] - [MCell 13 |265|NOD SM_AMIGA_2_| |*] + [MCell 12 |263|NOD inst_CLK_OUT_PRE| |*] + [MCell 13 |265|NOD SM_AMIGA_0_| |*] 7 [IOpin 7 | 72| -| | ] [RegIn 7 |267| -| | ] @@ -1692,38 +1570,38 @@ IMX No. | +---- Block IO Pin or Macrocell Number | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- Mux00| Input Pin ( 86)| RST -Mux01| Mcel 3 13 ( 193)| SM_AMIGA_4_ -Mux02| Mcel 6 4 ( 251)| RN_E -Mux03| Mcel 0 8 ( 113)| inst_DTACK_SYNC -Mux04| Input Pin ( 61)| CLK_OSZI -Mux05| Mcel 5 0 ( 221)| inst_VPA_SYNC -Mux06| ... | ... +Mux01| ... | ... +Mux02| Mcel 6 4 ( 251)| cpu_est_2_ +Mux03| Mcel 6 5 ( 253)| SM_AMIGA_1_ +Mux04| Mcel 7 2 ( 272)| inst_CLK_000_D +Mux05| Mcel 6 10 ( 260)| SM_AMIGA_2_ +Mux06| Mcel 1 9 ( 139)| inst_DTACK_SYNC Mux07| Mcel 7 13 ( 289)| inst_CLK_000_DD Mux08| ... | ... -Mux09| Mcel 6 13 ( 265)| SM_AMIGA_2_ -Mux10| Mcel 6 14 ( 266)| CLK_CNT_0_ -Mux11| Mcel 3 5 ( 181)| RN_AS_000 -Mux12| Mcel 6 9 ( 259)| SM_AMIGA_0_ -Mux13| Mcel 6 8 ( 257)| SM_AMIGA_3_ -Mux14| Mcel 6 12 ( 263)| SM_AMIGA_1_ -Mux15| ... | ... +Mux09| Mcel 6 13 ( 265)| SM_AMIGA_0_ +Mux10| Input Pin ( 36)| VPA +Mux11| Mcel 6 14 ( 266)| CLK_CNT_0_ +Mux12| Mcel 6 9 ( 259)| SM_AMIGA_7_ +Mux13| Mcel 6 8 ( 257)| cpu_est_0_ +Mux14| Mcel 6 12 ( 263)| inst_CLK_OUT_PRE +Mux15| Mcel 0 0 ( 101)| inst_VPA_SYNC Mux16| ... | ... Mux17| ... | ... Mux18| ... | ... -Mux19| Mcel 7 1 ( 271)| inst_CLK_000_D +Mux19| ... | ... Mux20| ... | ... -Mux21| ... | ... -Mux22| Mcel 6 10 ( 260)| inst_CLK_OUT_PRE -Mux23| Mcel 6 6 ( 254)| SM_AMIGA_7_ -Mux24| Mcel 6 1 ( 247)| cpu_est_2_ -Mux25| ... | ... +Mux21| Input Pin ( 61)| CLK_OSZI +Mux22| ... | ... +Mux23| Mcel 6 2 ( 248)| RN_E +Mux24| ... | ... +Mux25| Mcel 3 9 ( 187)| RN_AS_000 Mux26| ... | ... Mux27| ... | ... -Mux28| ... | ... -Mux29| ... | ... +Mux28| Mcel 1 5 ( 133)| SM_AMIGA_3_ +Mux29| Mcel 6 6 ( 254)| cpu_est_1_ Mux30| ... | ... -Mux31| Mcel 6 2 ( 248)| cpu_est_1_ -Mux32| Mcel 6 5 ( 253)| cpu_est_0_ +Mux31| ... | ... +Mux32| ... | ... --------------------------------------------------------------------------- =========================================================================== < Block [ 7] > Macrocell (MCell) Cluster Assignments @@ -1736,18 +1614,18 @@ Mux32| Mcel 6 5 ( 253)| cpu_est_0_ | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| FPU_CS| IO| | S | 2 | 4 to [ 0]| 1 XOR free - 1|inst_CLK_000_D|NOD| | A | 1 | 2 free | 1 XOR to [ 1] for 1 PT sig - 2| | ? | | S | | 4 free | 1 XOR free + 1| DSACK_0_|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig + 2|inst_CLK_000_D|NOD| | A | 1 | 2 free | 1 XOR to [ 2] for 1 PT sig 3| | ? | | S | | 4 free | 1 XOR free 4| BGACK_030| IO| | S | 2 | 4 to [ 4]| 1 XOR free - 5|inst_AS_030_000_SYNC|NOD| | S | 4 | 4 to [ 5]| 1 XOR free + 5| | ? | | S | | 4 free | 1 XOR free 6| | ? | | S | | 4 free | 1 XOR free 7| | ? | | S | | 4 free | 1 XOR free - 8| DSACK_1_| IO| | S | 2 | 4 to [ 8]| 1 XOR free + 8|inst_AS_030_000_SYNC|NOD| | S | 4 | 4 to [ 8]| 1 XOR free 9|inst_RISING_CLK_AMIGA|NOD| | A | 1 | 2 free | 1 XOR to [ 9] for 1 PT sig 10| | ? | | S | | 4 free | 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free -12| DSACK_0_|OUT| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig +12| DSACK_1_| IO| | S | 2 | 4 to [12]| 1 XOR free 13|inst_CLK_000_DD|NOD| | A | 1 | 2 free | 1 XOR to [13] for 1 PT sig 14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free @@ -1762,20 +1640,20 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| FPU_CS| IO| | S | 2 |=> can support up to [ 12] logic PT(s) - 1|inst_CLK_000_D|NOD| | A | 1 |=> can support up to [ 13] logic PT(s) - 2| | ? | | S | |=> can support up to [ 12] logic PT(s) - 3| | ? | | S | |=> can support up to [ 10] logic PT(s) - 4| BGACK_030| IO| | S | 2 |=> can support up to [ 15] logic PT(s) - 5|inst_AS_030_000_SYNC|NOD| | S | 4 |=> can support up to [ 15] logic PT(s) - 6| | ? | | S | |=> can support up to [ 10] logic PT(s) + 0| FPU_CS| IO| | S | 2 |=> can support up to [ 11] logic PT(s) + 1| DSACK_0_|OUT| | S | 1 |=> can support up to [ 12] logic PT(s) + 2|inst_CLK_000_D|NOD| | A | 1 |=> can support up to [ 12] logic PT(s) + 3| | ? | | S | |=> can support up to [ 12] logic PT(s) + 4| BGACK_030| IO| | S | 2 |=> can support up to [ 20] logic PT(s) + 5| | ? | | S | |=> can support up to [ 15] logic PT(s) + 6| | ? | | S | |=> can support up to [ 15] logic PT(s) 7| | ? | | S | |=> can support up to [ 12] logic PT(s) - 8| DSACK_1_| IO| | S | 2 |=> can support up to [ 17] logic PT(s) + 8|inst_AS_030_000_SYNC|NOD| | S | 4 |=> can support up to [ 17] logic PT(s) 9|inst_RISING_CLK_AMIGA|NOD| | A | 1 |=> can support up to [ 13] logic PT(s) -10| | ? | | S | |=> can support up to [ 16] logic PT(s) -11| | ? | | S | |=> can support up to [ 16] logic PT(s) -12| DSACK_0_|OUT| | S | 1 |=> can support up to [ 17] logic PT(s) -13|inst_CLK_000_DD|NOD| | A | 1 |=> can support up to [ 17] logic PT(s) +10| | ? | | S | |=> can support up to [ 12] logic PT(s) +11| | ? | | S | |=> can support up to [ 12] logic PT(s) +12| DSACK_1_| IO| | S | 2 |=> can support up to [ 17] logic PT(s) +13|inst_CLK_000_DD|NOD| | A | 1 |=> can support up to [ 13] logic PT(s) 14| | ? | | S | |=> can support up to [ 12] logic PT(s) 15| | ? | | S | |=> can support up to [ 10] logic PT(s) --------------------------------------------------------------------------- @@ -1788,18 +1666,18 @@ _|_________________|__|__|___|_____|_______________________________________ | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ 0| FPU_CS| IO| | => | 5 6 ( 7) 0 | 80 79 ( 78) 85 - 1|inst_CLK_000_D|NOD| | => | 5 6 7 0 | 80 79 78 85 - 2| | | | => | 6 7 0 1 | 79 78 85 84 + 1| DSACK_0_|OUT| | => |( 5) 6 7 0 |( 80) 79 78 85 + 2|inst_CLK_000_D|NOD| | => | 6 7 0 1 | 79 78 85 84 3| | | | => | 6 7 0 1 | 79 78 85 84 4| BGACK_030| IO| | => | 7 0 1 ( 2)| 78 85 84 ( 83) - 5|inst_AS_030_000_SYNC|NOD| | => | 7 0 1 2 | 78 85 84 83 + 5| | | | => | 7 0 1 2 | 78 85 84 83 6| | | | => | 0 1 2 3 | 85 84 83 82 7| | | | => | 0 1 2 3 | 85 84 83 82 - 8| DSACK_1_| IO| | => | 1 2 3 ( 4)| 84 83 82 ( 81) + 8|inst_AS_030_000_SYNC|NOD| | => | 1 2 3 4 | 84 83 82 81 9|inst_RISING_CLK_AMIGA|NOD| | => | 1 2 3 4 | 84 83 82 81 10| | | | => | 2 3 4 5 | 83 82 81 80 11| | | | => | 2 3 4 5 | 83 82 81 80 -12| DSACK_0_|OUT| | => | 3 4 ( 5) 6 | 82 81 ( 80) 79 +12| DSACK_1_| IO| | => | 3 ( 4) 5 6 | 82 ( 81) 80 79 13|inst_CLK_000_DD|NOD| | => | 3 4 5 6 | 82 81 80 79 14| | | | => | 4 5 6 7 | 81 80 79 78 15| | | | => | 4 5 6 7 | 81 80 79 78 @@ -1817,8 +1695,8 @@ _|_________________|__|___|_____|___________________________________________ 1| A_23_|INP|*| 84| => | 2 3 4 5 6 7 8 9 2| BGACK_030| IO|*| 83| => | ( 4) 5 6 7 8 9 10 11 3| AS_030|INP|*| 82| => | 6 7 8 9 10 11 12 13 - 4| DSACK_1_| IO|*| 81| => | ( 8) 9 10 11 12 13 14 15 - 5| DSACK_0_|OUT|*| 80| => | 10 11 (12) 13 14 15 0 1 + 4| DSACK_1_| IO|*| 81| => | 8 9 10 11 (12) 13 14 15 + 5| DSACK_0_|OUT|*| 80| => | 10 11 12 13 14 15 0 ( 1) 6| SIZE_1_|INP|*| 79| => | 12 13 14 15 0 1 2 3 7| FPU_CS| IO|*| 78| => | 14 15 ( 0) 1 2 3 4 5 --------------------------------------------------------------------------- @@ -1855,17 +1733,17 @@ IMX No. | +---- Block IO Pin or Macrocell Number 0 [IOpin 0 | 85|INP A_22_|*|*] [RegIn 0 |270| -| | ] [MCell 0 |269|NOD RN_FPU_CS| |*] paired w/[ FPU_CS] - [MCell 1 |271|NOD inst_CLK_000_D| |*] + [MCell 1 |271|OUT DSACK_0_| | ] 1 [IOpin 1 | 84|INP A_23_|*|*] [RegIn 1 |273| -| | ] - [MCell 2 |272| -| | ] + [MCell 2 |272|NOD inst_CLK_000_D| |*] [MCell 3 |274| -| | ] 2 [IOpin 2 | 83| IO BGACK_030|*| ] paired w/[ RN_BGACK_030] [RegIn 2 |276| -| | ] [MCell 4 |275|NOD RN_BGACK_030| |*] paired w/[ BGACK_030] - [MCell 5 |277|NOD inst_AS_030_000_SYNC| |*] + [MCell 5 |277| -| | ] 3 [IOpin 3 | 82|INP AS_030|*|*] [RegIn 3 |279| -| | ] @@ -1874,7 +1752,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 4 [IOpin 4 | 81| IO DSACK_1_|*|*] paired w/[ RN_DSACK_1_] [RegIn 4 |282| -| | ] - [MCell 8 |281|NOD RN_DSACK_1_| |*] paired w/[ DSACK_1_] + [MCell 8 |281|NOD inst_AS_030_000_SYNC| |*] [MCell 9 |283|NOD inst_RISING_CLK_AMIGA| |*] 5 [IOpin 5 | 80|OUT DSACK_0_|*| ] @@ -1884,7 +1762,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 6 [IOpin 6 | 79|INP SIZE_1_|*|*] [RegIn 6 |288| -| | ] - [MCell 12 |287|OUT DSACK_0_| | ] + [MCell 12 |287|NOD RN_DSACK_1_| |*] paired w/[ DSACK_1_] [MCell 13 |289|NOD inst_CLK_000_DD| |*] 7 [IOpin 7 | 78| IO FPU_CS|*| ] paired w/[ RN_FPU_CS] @@ -1902,25 +1780,25 @@ Mux00| Input Pin ( 86)| RST Mux01| IOPin 5 2 ( 58)| FC_1_ Mux02| ... | ... Mux03| Input Pin ( 11)| CLK_000 -Mux04| Mcel 7 5 ( 277)| inst_AS_030_000_SYNC +Mux04| IOPin 3 7 ( 28)| BGACK_000 Mux05| Input Pin ( 14)| CPU_SPACE Mux06| IOPin 5 3 ( 57)| FC_0_ -Mux07| Mcel 6 12 ( 263)| SM_AMIGA_1_ +Mux07| Mcel 6 12 ( 263)| inst_CLK_OUT_PRE Mux08| IOPin 5 1 ( 59)| A_17_ Mux09| IOPin 7 3 ( 82)| AS_030 -Mux10| Mcel 7 1 ( 271)| inst_CLK_000_D +Mux10| ... | ... Mux11| IOPin 0 5 ( 96)| A_16_ Mux12| IOPin 0 6 ( 97)| A_19_ -Mux13| Mcel 7 8 ( 281)| RN_DSACK_1_ -Mux14| ... | ... -Mux15| ... | ... +Mux13| Mcel 7 8 ( 281)| inst_AS_030_000_SYNC +Mux14| Mcel 7 2 ( 272)| inst_CLK_000_D +Mux15| Mcel 7 12 ( 287)| RN_DSACK_1_ Mux16| ... | ... Mux17| IOPin 0 4 ( 95)| A_18_ -Mux18| IOPin 3 7 ( 28)| BGACK_000 +Mux18| ... | ... Mux19| ... | ... Mux20| Input Pin ( 64)| CLK_030 Mux21| Input Pin ( 61)| CLK_OSZI -Mux22| Mcel 6 10 ( 260)| inst_CLK_OUT_PRE +Mux22| Mcel 6 5 ( 253)| SM_AMIGA_1_ Mux23| Mcel 7 4 ( 275)| RN_BGACK_030 Mux24| ... | ... Mux25| ... | ... diff --git a/Logic/68030_tk.rpt b/Logic/68030_tk.rpt index e8861ff..5cec7a8 100644 --- a/Logic/68030_tk.rpt +++ b/Logic/68030_tk.rpt @@ -12,7 +12,7 @@ Project_Summary Project Name : 68030_tk Project Path : C:\Users\Matze\Documents\GitHub\68030tk\Logic -Project Fitted on : Thu May 15 22:17:31 2014 +Project Fitted on : Thu May 15 22:21:57 2014 Device : M4A5-128/64 Package : 100TQFP @@ -40,8 +40,8 @@ Design_Summary Total Input Pins : 35 Total Output Pins : 22 Total Bidir I/O Pins : 2 - Total Flip-Flops : 42 - Total Product Terms : 122 + Total Flip-Flops : 40 + Total Product Terms : 104 Total Reserved Pins : 0 Total Reserved Blocks : 0 @@ -54,13 +54,13 @@ Dedicated Pins Input-Only Pins 2 2 0 --> 100% Clock/Input Pins 4 4 0 --> 100% I/O Pins 64 53 11 --> 82% -Logic Macrocells 128 51 77 --> 39% +Logic Macrocells 128 48 80 --> 37% Input Registers 64 0 64 --> 0% Unusable Macrocells .. 0 .. -CSM Outputs/Total Block Inputs 264 128 136 --> 48% -Logical Product Terms 640 124 516 --> 19% -Product Term Clusters 128 40 88 --> 31% +CSM Outputs/Total Block Inputs 264 118 146 --> 44% +Logical Product Terms 640 105 535 --> 16% +Product Term Clusters 128 33 95 --> 25%  Blocks_Resource_Summary @@ -71,13 +71,13 @@ Blocks_Resource_Summary --------------------------------------------------------------------------------- Maximum 33 8 8 -- -- 16 80 16 - --------------------------------------------------------------------------------- -Block A 9 7 0 3 0 13 4 15 Hi -Block B 19 8 0 8 0 8 27 7 Hi +Block A 12 7 0 2 0 14 3 15 Hi +Block B 18 8 0 7 0 9 13 11 Hi Block C 1 8 0 2 0 14 2 16 Hi Block D 33 8 0 10 0 6 36 5 Hi Block E 14 3 0 3 0 13 3 16 Hi -Block F 12 4 0 1 0 15 2 15 Hi -Block G 19 7 0 16 0 0 36 6 Hi +Block F 0 4 0 0 0 16 0 16 Hi +Block G 19 7 0 16 0 0 34 7 Hi Block H 21 8 0 8 0 8 14 12 Hi --------------------------------------------------------------------------------- @@ -287,7 +287,7 @@ Input_Signal_List Pin r e O Input Pin Blk PTs Type e s E Fanout Pwr Slew Signal ---------------------------------------------------------------------- - 82 H . I/O A--D-F-H Hi Fast AS_030 + 82 H . I/O AB-D---H Hi Fast AS_030 69 G . I/O ---D---- Hi Fast A_0_ 96 A . I/O -------H Hi Fast A_16_ 59 F . I/O -------H Hi Fast A_17_ @@ -318,10 +318,10 @@ Pin Blk PTs Type e s E Fanout Pwr Slew Signal 79 H . I/O ---D---- Hi Fast SIZE_1_ 11 . . Ck/I -------H - Fast CLK_000 14 . . Ck/I ---D---H - Fast CPU_SPACE - 36 . . Ded A------- - Fast VPA - 61 . . Ck/I AB-D-FGH - Fast CLK_OSZI + 36 . . Ded ------G- - Fast VPA + 61 . . Ck/I AB-D--GH - Fast CLK_OSZI 64 . . Ck/I ---D---H - Fast CLK_030 - 86 . . Ded AB-D-FGH - Fast RST + 86 . . Ded AB-D--GH - Fast RST ---------------------------------------------------------------------- Power : Hi = High @@ -348,7 +348,7 @@ Pin Blk PTs Type e s E Fanout Pwr Slew Signal 29 D 3 DFF * * -------- Hi Fast BG_000 47 E 1 COM -------- Hi Fast CIIN 65 G 1 DFF * * -------- Hi Fast CLK_DIV_OUT - 10 B 13 COM -------- Hi Fast CLK_EXP + 10 B 1 DFF * * -------- Hi Fast CLK_EXP 80 H 1 COM -------- Hi Fast DSACK_0_ 66 G 3 TFF * * -------- Hi Fast E 78 H 2 DFF * * -------- Hi Fast FPU_CS @@ -375,7 +375,7 @@ Bidir_Signal_List Pin Blk PTs Type e s E Fanout Pwr Slew Signal ---------------------------------------------------------------------- 81 H 2 DFF * * ---D---- Hi Fast DSACK_1_ - 30 D 1 DFF * * A------- Hi Fast DTACK + 30 D 1 DFF * * -B------ Hi Fast DTACK ---------------------------------------------------------------------- Power : Hi = High @@ -392,44 +392,41 @@ Buried_Signal_List #Mc Blk PTs Type e s E Fanout Pwr Slew Signal ---------------------------------------------------------------------- G14 G 1 DFF * * ------G- Hi Fast CLK_CNT_0_ - D5 D 2 DFF * * ---D--G- Hi - RN_AS_000 --> AS_000 + D9 D 2 DFF * * ---D--G- Hi - RN_AS_000 --> AS_000 H4 H 2 DFF * * ---D---H Hi - RN_BGACK_030 --> BGACK_030 D1 D 3 DFF * * ---D---- Hi - RN_BG_000 --> BG_000 - H8 H 2 DFF * * -------H Hi - RN_DSACK_1_ --> DSACK_1_ - G4 G 3 TFF * * ---D-FG- Hi - RN_E --> E + H12 H 2 DFF * * -------H Hi - RN_DSACK_1_ --> DSACK_1_ + G2 G 3 TFF * * A--D--G- Hi - RN_E --> E H0 H 2 DFF * * --C-E--H Hi - RN_FPU_CS --> FPU_CS B8 B 2 DFF * * -B------ Hi - RN_IPL_030_0_ --> IPL_030_0_ B12 B 2 DFF * * -B------ Hi - RN_IPL_030_1_ --> IPL_030_1_ B4 B 2 DFF * * -B------ Hi - RN_IPL_030_2_ --> IPL_030_2_ D8 D 12 DFF * * ---D---- Hi - RN_LDS_000 --> LDS_000 D12 D 8 DFF * * ---D---- Hi - RN_UDS_000 --> UDS_000 - D4 D 2 TFF * * ---D-F-- Hi - RN_VMA --> VMA - G9 G 3 DFF * * -B----G- Hi Fast SM_AMIGA_0_ - G12 G 3 DFF * * -B----GH Hi Fast SM_AMIGA_1_ - G13 G 3 DFF * * -B----G- Hi Fast SM_AMIGA_2_ - G8 G 3 DFF * * AB---FG- Hi Fast SM_AMIGA_3_ - D13 D 2 DFF * * -B-D--G- Hi Fast SM_AMIGA_4_ - D6 D 2 DFF * * -B-D---- Hi Fast SM_AMIGA_5_ - D2 D 3 DFF * * -B-D---- Hi Fast SM_AMIGA_6_ - G6 G 2 DFF * * ---D--G- Hi Fast SM_AMIGA_7_ - B6 B 2 DFF * * -B------ Hi Fast SM_AMIGA_D_0_ - B13 B 2 DFF * * -B------ Hi Fast SM_AMIGA_D_1_ - B9 B 2 DFF * * -B------ Hi Fast SM_AMIGA_D_2_ - G5 G 3 DFF * * ---D-FG- Hi Fast cpu_est_0_ - G2 G 4 TFF * * ---D-FG- Hi Fast cpu_est_1_ - G1 G 3 DFF * * ---D-FG- Hi Fast cpu_est_2_ + D5 D 2 TFF * * A--D---- Hi - RN_VMA --> VMA + G13 G 3 DFF * * ------G- Hi Fast SM_AMIGA_0_ + G5 G 3 DFF * * ------GH Hi Fast SM_AMIGA_1_ + G10 G 3 DFF * * ------G- Hi Fast SM_AMIGA_2_ + B5 B 3 DFF * * AB----G- Hi Fast SM_AMIGA_3_ + D13 D 2 DFF * * -B-D---- Hi Fast SM_AMIGA_4_ + D10 D 2 DFF * * ---D---- Hi Fast SM_AMIGA_5_ + D6 D 3 DFF * * ---D---- Hi Fast SM_AMIGA_6_ + G9 G 2 DFF * * ---D--G- Hi Fast SM_AMIGA_7_ + G8 G 3 DFF * * A--D--G- Hi Fast cpu_est_0_ + G6 G 4 TFF * * A--D--G- Hi Fast cpu_est_1_ + G4 G 3 DFF * * A--D--G- Hi Fast cpu_est_2_ G15 G 1 DFF * * ---D---- Hi Fast cpu_est_d_0_ G7 G 1 DFF * * ---D---- Hi Fast cpu_est_d_1_ G3 G 1 DFF * * ---D---- Hi Fast cpu_est_d_2_ G11 G 1 DFF * * ---D---- Hi Fast cpu_est_d_3_ - H5 H 4 DFF * * ---D---H Hi Fast inst_AS_030_000_SYNC - H1 H 1 DFF * * A--D-FGH Hi Fast inst_CLK_000_D + H8 H 4 DFF * * ---D---H Hi Fast inst_AS_030_000_SYNC + H2 H 1 DFF * * AB-D--GH Hi Fast inst_CLK_000_D H13 H 1 DFF * * ---D--G- Hi Fast inst_CLK_000_DD - G10 G 2 DFF * * ------GH Hi Fast inst_CLK_OUT_PRE - A8 A 2 DFF * * A-----G- Hi Fast inst_DTACK_SYNC + G12 G 2 DFF * * -B----GH Hi Fast inst_CLK_OUT_PRE + B9 B 2 DFF * * -B----G- Hi Fast inst_DTACK_SYNC H9 H 1 DFF * * -B-----H Hi Fast inst_RISING_CLK_AMIGA - A0 A 1 DFF * * A--D-F-- Hi Fast inst_VPA_D - F0 F 2 DFF * * -----FG- Hi Fast inst_VPA_SYNC + G1 G 1 DFF * * AB-D---- Hi Fast inst_VPA_D + A0 A 2 DFF * * AB----G- Hi Fast inst_VPA_SYNC ---------------------------------------------------------------------- Power : Hi = High @@ -444,14 +441,26 @@ Signals_Fanout_List ~~~~~~~~~~~~~~~~~~~ Signal Source : Fanout List ----------------------------------------------------------------------------- - FC_0_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} + A_28_{ D}: CIIN{ E} + A_27_{ D}: CIIN{ E} SIZE_1_{ I}: LDS_000{ D} + A_26_{ D}: CIIN{ E} + A_25_{ D}: CIIN{ E} A_31_{ C}: CIIN{ E} + A_24_{ D}: CIIN{ E} + A_23_{ I}: CIIN{ E} + A_22_{ I}: CIIN{ E} + A_21_{ B}: CIIN{ E} IPL_2_{ H}: IPL_030_2_{ B} + A_20_{ B}: CIIN{ E} + A_19_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} + A_18_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} + A_17_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} FC_1_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} + A_16_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} AS_030{ I}: DSACK_1_{ H} AS_000{ D} UDS_000{ D} : LDS_000{ D} BG_000{ D} FPU_CS{ H} - :inst_AS_030_000_SYNC{ H}inst_DTACK_SYNC{ A} inst_VPA_SYNC{ F} + :inst_AS_030_000_SYNC{ H}inst_DTACK_SYNC{ B} inst_VPA_SYNC{ A} DS_030{ B}: UDS_000{ D} LDS_000{ D} CPU_SPACE{. }: DSACK_0_{ H} DSACK_1_{ H} BG_000{ D} :inst_AS_030_000_SYNC{ H} @@ -459,36 +468,23 @@ Signal Source : Fanout List BGACK_000{ E}: BGACK_030{ H} FPU_CS{ H}inst_AS_030_000_SYNC{ H} CLK_030{. }: BG_000{ D} FPU_CS{ H}inst_AS_030_000_SYNC{ H} CLK_000{. }: inst_CLK_000_D{ H}inst_RISING_CLK_AMIGA{ H} - SIZE_0_{ H}: LDS_000{ D} - A_30_{ C}: CIIN{ E} - A_29_{ C}: CIIN{ E} - A_28_{ D}: CIIN{ E} - A_27_{ D}: CIIN{ E} - A_26_{ D}: CIIN{ E} - A_25_{ D}: CIIN{ E} - VPA{. }: inst_VPA_D{ A} - A_24_{ D}: CIIN{ E} - A_23_{ I}: CIIN{ E} - RST{. }: IPL_030_2_{ B} DSACK_1_{ H} AS_000{ D} - : UDS_000{ D} LDS_000{ D} BG_000{ D} - : BGACK_030{ H} FPU_CS{ H} DTACK{ D} - : VMA{ D} RESET{ B} IPL_030_1_{ B} - : IPL_030_0_{ B}inst_AS_030_000_SYNC{ H}inst_DTACK_SYNC{ A} - : inst_VPA_SYNC{ F} SM_AMIGA_6_{ D} SM_AMIGA_7_{ G} - : SM_AMIGA_1_{ G} SM_AMIGA_4_{ D} SM_AMIGA_3_{ G} - : SM_AMIGA_5_{ D} SM_AMIGA_2_{ G} SM_AMIGA_0_{ G} - : SM_AMIGA_D_0_{ B} SM_AMIGA_D_1_{ B} SM_AMIGA_D_2_{ B} - A_22_{ I}: CIIN{ E} - A_21_{ B}: CIIN{ E} - RW{ H}:AMIGA_BUS_DATA_DIR{ E} UDS_000{ D} LDS_000{ D} - A_20_{ B}: CIIN{ E} - A_19_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} - A_18_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} - A_17_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} - A_16_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} A_0_{ H}: UDS_000{ D} LDS_000{ D} IPL_1_{ G}: IPL_030_1_{ B} IPL_0_{ H}: IPL_030_0_{ B} + VPA{. }: inst_VPA_D{ G} + FC_0_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} + RST{. }: IPL_030_2_{ B} DSACK_1_{ H} AS_000{ D} + : UDS_000{ D} LDS_000{ D} BG_000{ D} + : BGACK_030{ H} FPU_CS{ H} IPL_030_1_{ B} + : DTACK{ D} IPL_030_0_{ B} VMA{ D} + : RESET{ B}inst_AS_030_000_SYNC{ H}inst_DTACK_SYNC{ B} + : inst_VPA_SYNC{ A} SM_AMIGA_6_{ D} SM_AMIGA_7_{ G} + : SM_AMIGA_1_{ G} SM_AMIGA_4_{ D} SM_AMIGA_3_{ B} + : SM_AMIGA_5_{ D} SM_AMIGA_2_{ G} SM_AMIGA_0_{ G} + RW{ H}:AMIGA_BUS_DATA_DIR{ E} UDS_000{ D} LDS_000{ D} + SIZE_0_{ H}: LDS_000{ D} + A_30_{ C}: CIIN{ E} + A_29_{ C}: CIIN{ E} RN_IPL_030_2_{ C}: IPL_030_2_{ B} DSACK_1_{ I}: DTACK{ D} RN_DSACK_1_{ I}: DSACK_1_{ H} @@ -500,63 +496,54 @@ RN_DSACK_1_{ I}: DSACK_1_{ H} RN_BGACK_030{ I}: AS_000{ D} UDS_000{ D} LDS_000{ D} : BGACK_030{ H} DTACK{ D} RN_FPU_CS{ I}: BERR{ E} AVEC_EXP{ C} FPU_CS{ H} - DTACK{ E}:inst_DTACK_SYNC{ A} - RN_E{ H}: E{ G} VMA{ D} cpu_est_1_{ G} - : cpu_est_d_3_{ G} inst_VPA_SYNC{ F} cpu_est_2_{ G} - RN_VMA{ E}: VMA{ D} inst_VPA_SYNC{ F} RN_IPL_030_1_{ C}: IPL_030_1_{ B} + DTACK{ E}:inst_DTACK_SYNC{ B} RN_IPL_030_0_{ C}: IPL_030_0_{ B} + RN_E{ H}: E{ G} VMA{ D} cpu_est_1_{ G} + : cpu_est_d_3_{ G} inst_VPA_SYNC{ A} cpu_est_2_{ G} + RN_VMA{ E}: VMA{ D} inst_VPA_SYNC{ A} cpu_est_0_{ H}: E{ G} VMA{ D} cpu_est_0_{ G} - : cpu_est_1_{ G} cpu_est_d_0_{ G} inst_VPA_SYNC{ F} + : cpu_est_1_{ G} cpu_est_d_0_{ G} inst_VPA_SYNC{ A} : cpu_est_2_{ G} cpu_est_1_{ H}: E{ G} VMA{ D} cpu_est_1_{ G} - : inst_VPA_SYNC{ F} cpu_est_d_1_{ G} cpu_est_2_{ G} + : inst_VPA_SYNC{ A} cpu_est_d_1_{ G} cpu_est_2_{ G} cpu_est_d_0_{ H}: VMA{ D} cpu_est_d_3_{ H}: VMA{ D} inst_AS_030_000_SYNC{ I}: AS_000{ D} UDS_000{ D} LDS_000{ D} :inst_AS_030_000_SYNC{ H} SM_AMIGA_6_{ D} SM_AMIGA_5_{ D} -inst_DTACK_SYNC{ B}:inst_DTACK_SYNC{ A} SM_AMIGA_3_{ G} SM_AMIGA_2_{ G} - inst_VPA_D{ B}: VMA{ D}inst_DTACK_SYNC{ A} inst_VPA_SYNC{ F} -inst_VPA_SYNC{ G}: inst_VPA_SYNC{ F} SM_AMIGA_3_{ G} SM_AMIGA_2_{ G} +inst_DTACK_SYNC{ C}:inst_DTACK_SYNC{ B} SM_AMIGA_3_{ B} SM_AMIGA_2_{ G} + inst_VPA_D{ H}: VMA{ D}inst_DTACK_SYNC{ B} inst_VPA_SYNC{ A} +inst_VPA_SYNC{ B}: inst_VPA_SYNC{ A} SM_AMIGA_3_{ B} SM_AMIGA_2_{ G} inst_CLK_000_D{ I}: DSACK_1_{ H} AS_000{ D} UDS_000{ D} : LDS_000{ D} E{ G} VMA{ D} - : cpu_est_0_{ G} cpu_est_1_{ G}inst_DTACK_SYNC{ A} - : inst_VPA_SYNC{ F}inst_CLK_000_DD{ H} cpu_est_2_{ G} + : cpu_est_0_{ G} cpu_est_1_{ G}inst_DTACK_SYNC{ B} + : inst_VPA_SYNC{ A}inst_CLK_000_DD{ H} cpu_est_2_{ G} : SM_AMIGA_6_{ D} SM_AMIGA_7_{ G}inst_RISING_CLK_AMIGA{ H} - : SM_AMIGA_1_{ G} SM_AMIGA_4_{ D} SM_AMIGA_3_{ G} + : SM_AMIGA_1_{ G} SM_AMIGA_4_{ D} SM_AMIGA_3_{ B} : SM_AMIGA_5_{ D} SM_AMIGA_2_{ G} SM_AMIGA_0_{ G} inst_CLK_000_DD{ I}: AS_000{ D} UDS_000{ D} LDS_000{ D} : E{ G} cpu_est_0_{ G} cpu_est_1_{ G} : cpu_est_2_{ G} SM_AMIGA_6_{ D} SM_AMIGA_5_{ D} -inst_CLK_OUT_PRE{ H}: DSACK_1_{ H} CLK_DIV_OUT{ G}inst_CLK_OUT_PRE{ G} - : SM_AMIGA_1_{ G} SM_AMIGA_0_{ G} +inst_CLK_OUT_PRE{ H}: CLK_DIV_OUT{ G} DSACK_1_{ H} CLK_EXP{ B} + :inst_CLK_OUT_PRE{ G} SM_AMIGA_1_{ G} SM_AMIGA_0_{ G} cpu_est_d_1_{ H}: VMA{ D} cpu_est_d_2_{ H}: VMA{ D} cpu_est_2_{ H}: E{ G} VMA{ D} cpu_est_1_{ G} - : inst_VPA_SYNC{ F} cpu_est_d_2_{ G} cpu_est_2_{ G} + : inst_VPA_SYNC{ A} cpu_est_d_2_{ G} cpu_est_2_{ G} CLK_CNT_0_{ H}:inst_CLK_OUT_PRE{ G} CLK_CNT_0_{ G} -SM_AMIGA_6_{ E}: CLK_EXP{ B} AS_000{ D} UDS_000{ D} - : LDS_000{ D} BG_000{ D} SM_AMIGA_6_{ D} - : SM_AMIGA_5_{ D} SM_AMIGA_D_0_{ B} +SM_AMIGA_6_{ E}: AS_000{ D} UDS_000{ D} LDS_000{ D} + : BG_000{ D} SM_AMIGA_6_{ D} SM_AMIGA_5_{ D} SM_AMIGA_7_{ H}: BG_000{ D} SM_AMIGA_6_{ D} SM_AMIGA_7_{ G} inst_RISING_CLK_AMIGA{ I}: IPL_030_2_{ B} BGACK_030{ H} IPL_030_1_{ B} : IPL_030_0_{ B} -SM_AMIGA_1_{ H}: CLK_EXP{ B} DSACK_1_{ H} SM_AMIGA_1_{ G} - : SM_AMIGA_0_{ G} SM_AMIGA_D_1_{ B} SM_AMIGA_D_2_{ B} -SM_AMIGA_4_{ E}: CLK_EXP{ B} UDS_000{ D} LDS_000{ D} - : SM_AMIGA_4_{ D} SM_AMIGA_3_{ G} SM_AMIGA_D_0_{ B} - : SM_AMIGA_D_1_{ B} -SM_AMIGA_3_{ H}: CLK_EXP{ B}inst_DTACK_SYNC{ A} inst_VPA_SYNC{ F} - : SM_AMIGA_3_{ G} SM_AMIGA_2_{ G} SM_AMIGA_D_2_{ B} -SM_AMIGA_5_{ E}: CLK_EXP{ B} SM_AMIGA_4_{ D} SM_AMIGA_5_{ D} - : SM_AMIGA_D_1_{ B} -SM_AMIGA_2_{ H}: CLK_EXP{ B} SM_AMIGA_1_{ G} SM_AMIGA_2_{ G} - : SM_AMIGA_D_0_{ B} SM_AMIGA_D_2_{ B} -SM_AMIGA_0_{ H}: CLK_EXP{ B} SM_AMIGA_7_{ G} SM_AMIGA_0_{ G} - : SM_AMIGA_D_0_{ B} SM_AMIGA_D_1_{ B} SM_AMIGA_D_2_{ B} -SM_AMIGA_D_0_{ C}: CLK_EXP{ B} SM_AMIGA_D_0_{ B} -SM_AMIGA_D_1_{ C}: CLK_EXP{ B} SM_AMIGA_D_1_{ B} -SM_AMIGA_D_2_{ C}: CLK_EXP{ B} SM_AMIGA_D_2_{ B} +SM_AMIGA_1_{ H}: DSACK_1_{ H} SM_AMIGA_1_{ G} SM_AMIGA_0_{ G} +SM_AMIGA_4_{ E}: UDS_000{ D} LDS_000{ D} SM_AMIGA_4_{ D} + : SM_AMIGA_3_{ B} +SM_AMIGA_3_{ C}:inst_DTACK_SYNC{ B} inst_VPA_SYNC{ A} SM_AMIGA_3_{ B} + : SM_AMIGA_2_{ G} +SM_AMIGA_5_{ E}: SM_AMIGA_4_{ D} SM_AMIGA_5_{ D} +SM_AMIGA_2_{ H}: SM_AMIGA_1_{ G} SM_AMIGA_2_{ G} +SM_AMIGA_0_{ H}: SM_AMIGA_7_{ G} SM_AMIGA_0_{ G} ----------------------------------------------------------------------------- {.} : Indicates block location of signal @@ -573,8 +560,7 @@ Equations : | Reg |Mode |Set |Reset| Name +-----+-----+-----+-----+------------------------ | | | | | AVEC -| * | A | | | inst_VPA_D -| * | S | BS | BR | inst_DTACK_SYNC +| * | S | BS | BR | inst_VPA_SYNC | | | | | DS_030 | | | | | A_19_ | | | | | A_16_ @@ -590,17 +576,16 @@ Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name +-----+-----+-----+-----+------------------------ -| | | | | CLK_EXP | * | S | BS | BR | IPL_030_2_ | * | S | BS | BR | IPL_030_0_ | * | S | BS | BR | IPL_030_1_ +| * | A | | | CLK_EXP | * | A | | | RESET +| * | S | BR | BS | SM_AMIGA_3_ +| * | S | BS | BR | inst_DTACK_SYNC | * | S | BS | BR | RN_IPL_030_0_ | * | S | BS | BR | RN_IPL_030_1_ | * | S | BS | BR | RN_IPL_030_2_ -| * | A | | | SM_AMIGA_D_2_ -| * | A | | | SM_AMIGA_D_1_ -| * | A | | | SM_AMIGA_D_0_ | | | | | A_29_ | | | | | A_30_ | | | | | A_31_ @@ -637,14 +622,14 @@ Equations : | * | S | BS | BR | VMA | * | S | BS | BR | AS_000 | | | | | AMIGA_BUS_ENABLE -| * | S | BR | BS | SM_AMIGA_4_ -| * | S | BR | BS | SM_AMIGA_6_ | * | S | BS | BR | RN_VMA | * | S | BS | BR | RN_AS_000 -| * | S | BR | BS | SM_AMIGA_5_ +| * | S | BR | BS | SM_AMIGA_4_ | * | S | BS | BR | RN_LDS_000 | * | S | BS | BR | RN_UDS_000 | * | S | BS | BR | RN_BG_000 +| * | S | BR | BS | SM_AMIGA_6_ +| * | S | BR | BS | SM_AMIGA_5_ | | | | | BGACK_000 @@ -661,13 +646,12 @@ Equations : Block F -block level set pt : !RST -block level reset pt : GND +block level set pt : +block level reset pt : Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name +-----+-----+-----+-----+------------------------ -| * | S | BS | BR | inst_VPA_SYNC | | | | | A_17_ | | | | | FC_1_ | | | | | FC_0_ @@ -683,16 +667,16 @@ Equations : +-----+-----+-----+-----+------------------------ | * | S | BS | BR | E | * | S | BS | BR | CLK_DIV_OUT -| * | A | | | SM_AMIGA_3_ | * | S | BS | BR | cpu_est_1_ | * | S | BS | BR | RN_E -| * | A | | | SM_AMIGA_1_ | * | S | BS | BR | cpu_est_2_ | * | S | BS | BR | cpu_est_0_ +| * | S | BS | BR | inst_CLK_OUT_PRE +| * | S | BS | BR | inst_VPA_D +| * | A | | | SM_AMIGA_1_ +| * | A | | | SM_AMIGA_7_ | * | A | | | SM_AMIGA_0_ | * | A | | | SM_AMIGA_2_ -| * | A | | | SM_AMIGA_7_ -| * | S | BS | BR | inst_CLK_OUT_PRE | * | S | BS | BR | CLK_CNT_0_ | * | S | BS | BR | cpu_est_d_2_ | * | S | BS | BR | cpu_est_d_1_ @@ -745,20 +729,20 @@ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ mx A0 RST pin 86 mx A17 ... ... mx A1 ... ... mx A18 ... ... -mx A2 ... ... mx A19 ... ... -mx A3 inst_DTACK_SYNC mcell A8 mx A20 ... ... +mx A2 cpu_est_2_ mcell G4 mx A19 ... ... +mx A3 ... ... mx A20 ... ... mx A4 CLK_OSZI pin 61 mx A21 ... ... -mx A5 ... ... mx A22 ... ... -mx A6 ... ... mx A23 ... ... -mx A7 ... ... mx A24 ... ... +mx A5 cpu_est_1_ mcell G6 mx A22 ... ... +mx A6 ... ... mx A23 RN_E mcell G2 +mx A7 RN_VMA mcell D5 mx A24 inst_VPA_D mcell G1 mx A8 ... ... mx A25 ... ... mx A9 AS_030 pin 82 mx A26 ... ... -mx A10 VPA pin 36 mx A27 ... ... -mx A11 ... ... mx A28 ... ... -mx A12 inst_CLK_000_D mcell H1 mx A29 ... ... -mx A13 SM_AMIGA_3_ mcell G8 mx A30 ... ... -mx A14 DTACK pin 30 mx A31 ... ... -mx A15 inst_VPA_D mcell A0 mx A32 ... ... +mx A10 cpu_est_0_ mcell G8 mx A27 ... ... +mx A11 ... ... mx A28 SM_AMIGA_3_ mcell B5 +mx A12 ... ... mx A29 ... ... +mx A13 ... ... mx A30 ... ... +mx A14 inst_CLK_000_D mcell H2 mx A31 ... ... +mx A15 inst_VPA_SYNC mcell A0 mx A32 ... ... mx A16 ... ... ---------------------------------------------------------------------------- @@ -767,23 +751,23 @@ BLOCK_B_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx B0 RST pin 86 mx B17 ... ... +mx B0 IPL_0_ pin 67 mx B17 ... ... mx B1 SM_AMIGA_4_ mcell D13 mx B18 ... ... -mx B2 SM_AMIGA_D_0_ mcell B6 mx B19 ... ... +mx B2 ... ... mx B19 ... ... mx B3 IPL_1_ pin 56 mx B20 ... ... -mx B4 SM_AMIGA_5_ mcell D6 mx B21 SM_AMIGA_D_1_ mcell B13 -mx B5inst_RISING_CLK_AMIGA mcell H9 mx B22 IPL_2_ pin 68 -mx B6 SM_AMIGA_D_2_ mcell B9 mx B23 ... ... -mx B7 SM_AMIGA_1_ mcell G12 mx B24 ... ... +mx B4 IPL_2_ pin 68 mx B21 RST pin 86 +mx B5inst_RISING_CLK_AMIGA mcell H9 mx B22 ... ... +mx B6 inst_DTACK_SYNC mcell B9 mx B23 DTACK pin 30 +mx B7inst_CLK_OUT_PRE mcell G12 mx B24 inst_VPA_D mcell G1 mx B8 RN_IPL_030_0_ mcell B8 mx B25 ... ... -mx B9 SM_AMIGA_2_ mcell G13 mx B26 ... ... -mx B10 SM_AMIGA_0_ mcell G9 mx B27 RN_IPL_030_2_ mcell B4 -mx B11 ... ... mx B28 SM_AMIGA_6_ mcell D2 +mx B9 AS_030 pin 82 mx B26 ... ... +mx B10 ... ... mx B27 RN_IPL_030_2_ mcell B4 +mx B11 ... ... mx B28 SM_AMIGA_3_ mcell B5 mx B12 RN_IPL_030_1_ mcell B12 mx B29 CLK_OSZI pin 61 -mx B13 SM_AMIGA_3_ mcell G8 mx B30 ... ... -mx B14 ... ... mx B31 ... ... -mx B15 ... ... mx B32 ... ... -mx B16 IPL_0_ pin 67 +mx B13 ... ... mx B30 ... ... +mx B14 inst_CLK_000_D mcell H2 mx B31 ... ... +mx B15 inst_VPA_SYNC mcell A0 mx B32 ... ... +mx B16 ... ... ---------------------------------------------------------------------------- @@ -815,23 +799,23 @@ BLOCK_D_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx D0 RN_BGACK_030 mcell H4 mx D17 SIZE_0_ pin 70 +mx D0 A_0_ pin 69 mx D17 RN_BG_000 mcell D1 mx D1 SM_AMIGA_4_ mcell D13 mx D18 cpu_est_d_0_ mcell G15 -mx D2 RN_E mcell G4 mx D19 inst_CLK_000_D mcell H1 -mx D3 SM_AMIGA_6_ mcell D2 mx D20 CLK_030 pin 64 -mx D4 BG_030 pin 21 mx D21 RST pin 86 -mx D5 CPU_SPACE pin 14 mx D22 cpu_est_0_ mcell G5 -mx D6 SIZE_1_ pin 79 mx D23 SM_AMIGA_7_ mcell G6 -mx D7 RN_AS_000 mcell D5 mx D24 cpu_est_d_2_ mcell G3 -mx D8 cpu_est_d_1_ mcell G7 mx D25 RW pin 71 -mx D9 AS_030 pin 82 mx D26 cpu_est_d_3_ mcell G11 -mx D10 DSACK_1_ pin 81 mx D27 RN_BG_000 mcell D1 -mx D11 RN_UDS_000 mcell D12 mx D28 inst_CLK_000_DD mcell H13 -mx D12 DS_030 pin 98 mx D29 inst_VPA_D mcell A0 -mx D13inst_AS_030_000_SYNC mcell H5 mx D30 SM_AMIGA_5_ mcell D6 -mx D14 RN_VMA mcell D4 mx D31 cpu_est_1_ mcell G2 -mx D15 A_0_ pin 69 mx D32 cpu_est_2_ mcell G1 -mx D16 RN_LDS_000 mcell D8 +mx D2 cpu_est_2_ mcell G4 mx D19 AS_030 pin 82 +mx D3inst_AS_030_000_SYNC mcell H8 mx D20 SM_AMIGA_5_ mcell D10 +mx D4 inst_CLK_000_D mcell H2 mx D21 RST pin 86 +mx D5 RN_UDS_000 mcell D12 mx D22 BG_030 pin 21 +mx D6 SIZE_1_ pin 79 mx D23 RN_BGACK_030 mcell H4 +mx D7 inst_CLK_000_DD mcell H13 mx D24 inst_VPA_D mcell G1 +mx D8 RW pin 71 mx D25 RN_AS_000 mcell D9 +mx D9 cpu_est_d_3_ mcell G11 mx D26 cpu_est_d_1_ mcell G7 +mx D10 DSACK_1_ pin 81 mx D27 SM_AMIGA_7_ mcell G9 +mx D11 RN_VMA mcell D5 mx D28 CLK_030 pin 64 +mx D12 DS_030 pin 98 mx D29 cpu_est_1_ mcell G6 +mx D13 cpu_est_0_ mcell G8 mx D30 cpu_est_d_2_ mcell G3 +mx D14 SIZE_0_ pin 70 mx D31 RN_E mcell G2 +mx D15 CPU_SPACE pin 14 mx D32 RN_LDS_000 mcell D8 +mx D16 SM_AMIGA_6_ mcell D6 ---------------------------------------------------------------------------- @@ -859,50 +843,26 @@ mx E16 ... ... ---------------------------------------------------------------------------- -BLOCK_F_LOGIC_ARRAY_FANIN -~~~~~~~~~~~~~~~~~~~~~~~~~ -CSM Signal Source CSM Signal Source ------------------------------------- ------------------------------------ -mx F0 RST pin 86 mx F17 ... ... -mx F1 ... ... mx F18 ... ... -mx F2 RN_E mcell G4 mx F19 ... ... -mx F3 cpu_est_0_ mcell G5 mx F20 ... ... -mx F4 CLK_OSZI pin 61 mx F21 ... ... -mx F5 inst_VPA_SYNC mcell F0 mx F22 ... ... -mx F6 ... ... mx F23 cpu_est_1_ mcell G2 -mx F7 ... ... mx F24 cpu_est_2_ mcell G1 -mx F8 ... ... mx F25 ... ... -mx F9 AS_030 pin 82 mx F26 ... ... -mx F10 RN_VMA mcell D4 mx F27 ... ... -mx F11 ... ... mx F28 ... ... -mx F12 inst_CLK_000_D mcell H1 mx F29 ... ... -mx F13 SM_AMIGA_3_ mcell G8 mx F30 ... ... -mx F14 ... ... mx F31 ... ... -mx F15 inst_VPA_D mcell A0 mx F32 ... ... -mx F16 ... ... ----------------------------------------------------------------------------- - - BLOCK_G_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ mx G0 RST pin 86 mx G17 ... ... -mx G1 SM_AMIGA_4_ mcell D13 mx G18 ... ... -mx G2 RN_E mcell G4 mx G19 inst_CLK_000_D mcell H1 -mx G3 inst_DTACK_SYNC mcell A8 mx G20 ... ... -mx G4 CLK_OSZI pin 61 mx G21 ... ... -mx G5 inst_VPA_SYNC mcell F0 mx G22inst_CLK_OUT_PRE mcell G10 -mx G6 ... ... mx G23 SM_AMIGA_7_ mcell G6 -mx G7 inst_CLK_000_DD mcell H13 mx G24 cpu_est_2_ mcell G1 -mx G8 ... ... mx G25 ... ... -mx G9 SM_AMIGA_2_ mcell G13 mx G26 ... ... -mx G10 CLK_CNT_0_ mcell G14 mx G27 ... ... -mx G11 RN_AS_000 mcell D5 mx G28 ... ... -mx G12 SM_AMIGA_0_ mcell G9 mx G29 ... ... -mx G13 SM_AMIGA_3_ mcell G8 mx G30 ... ... -mx G14 SM_AMIGA_1_ mcell G12 mx G31 cpu_est_1_ mcell G2 -mx G15 ... ... mx G32 cpu_est_0_ mcell G5 +mx G1 ... ... mx G18 ... ... +mx G2 cpu_est_2_ mcell G4 mx G19 ... ... +mx G3 SM_AMIGA_1_ mcell G5 mx G20 ... ... +mx G4 inst_CLK_000_D mcell H2 mx G21 CLK_OSZI pin 61 +mx G5 SM_AMIGA_2_ mcell G10 mx G22 ... ... +mx G6 inst_DTACK_SYNC mcell B9 mx G23 RN_E mcell G2 +mx G7 inst_CLK_000_DD mcell H13 mx G24 ... ... +mx G8 ... ... mx G25 RN_AS_000 mcell D9 +mx G9 SM_AMIGA_0_ mcell G13 mx G26 ... ... +mx G10 VPA pin 36 mx G27 ... ... +mx G11 CLK_CNT_0_ mcell G14 mx G28 SM_AMIGA_3_ mcell B5 +mx G12 SM_AMIGA_7_ mcell G9 mx G29 cpu_est_1_ mcell G6 +mx G13 cpu_est_0_ mcell G8 mx G30 ... ... +mx G14inst_CLK_OUT_PRE mcell G12 mx G31 ... ... +mx G15 inst_VPA_SYNC mcell A0 mx G32 ... ... mx G16 ... ... ---------------------------------------------------------------------------- @@ -912,21 +872,21 @@ BLOCK_H_LOGIC_ARRAY_FANIN CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ mx H0 RST pin 86 mx H17 A_18_ pin 95 -mx H1 FC_1_ pin 58 mx H18 BGACK_000 pin 28 +mx H1 FC_1_ pin 58 mx H18 ... ... mx H2 ... ... mx H19 ... ... mx H3 CLK_000 pin 11 mx H20 CLK_030 pin 64 -mx H4inst_AS_030_000_SYNC mcell H5 mx H21 CLK_OSZI pin 61 -mx H5 CPU_SPACE pin 14 mx H22inst_CLK_OUT_PRE mcell G10 +mx H4 BGACK_000 pin 28 mx H21 CLK_OSZI pin 61 +mx H5 CPU_SPACE pin 14 mx H22 SM_AMIGA_1_ mcell G5 mx H6 FC_0_ pin 57 mx H23 RN_BGACK_030 mcell H4 -mx H7 SM_AMIGA_1_ mcell G12 mx H24 ... ... +mx H7inst_CLK_OUT_PRE mcell G12 mx H24 ... ... mx H8 A_17_ pin 59 mx H25 ... ... mx H9 AS_030 pin 82 mx H26 ... ... -mx H10 inst_CLK_000_D mcell H1 mx H27inst_RISING_CLK_AMIGA mcell H9 +mx H10 ... ... mx H27inst_RISING_CLK_AMIGA mcell H9 mx H11 A_16_ pin 96 mx H28 ... ... mx H12 A_19_ pin 97 mx H29 ... ... -mx H13 RN_DSACK_1_ mcell H8 mx H30 RN_FPU_CS mcell H0 -mx H14 ... ... mx H31 ... ... -mx H15 ... ... mx H32 ... ... +mx H13inst_AS_030_000_SYNC mcell H8 mx H30 RN_FPU_CS mcell H0 +mx H14 inst_CLK_000_D mcell H2 mx H31 ... ... +mx H15 RN_DSACK_1_ mcell H12 mx H32 ... ... mx H16 ... ... ---------------------------------------------------------------------------- @@ -944,18 +904,18 @@ PostFit_Equations --------- ------ ------- ---- ----------------- 0 0 1 Pin BERR 1 1 1 Pin BERR.OE - 13 10 1 PinX1 CLK_EXP.X1 - 1 4 1 PinX2 CLK_EXP.X2 + 1 1 1 Pin CLK_DIV_OUT.D + 1 1 1 Pin CLK_DIV_OUT.C 1 0 1 Pin AVEC 0 0 1 Pin AVEC_EXP 1 1 1 Pin AVEC_EXP.OE + 1 0 1 Pin DSACK_0_ + 1 1 1 Pin DSACK_0_.OE 0 0 1 Pin AMIGA_BUS_ENABLE 1 1 1 Pin AMIGA_BUS_DATA_DIR 1 0 1 Pin AMIGA_BUS_ENABLE_LOW 1 4 1 Pin CIIN 1 8 1 Pin CIIN.OE - 1 0 1 Pin DSACK_0_ - 1 1 1 Pin DSACK_0_.OE 2 3 1 Pin IPL_030_2_.D 1 1 1 Pin IPL_030_2_.AP 1 1 1 Pin IPL_030_2_.C @@ -981,15 +941,21 @@ PostFit_Equations 2 3 1 Pin BGACK_030.D 1 1 1 Pin BGACK_030.AP 1 1 1 Pin BGACK_030.C - 1 1 1 Pin CLK_DIV_OUT.D - 1 1 1 Pin CLK_DIV_OUT.C + 1 1 1 Pin CLK_EXP.D + 1 1 1 Pin CLK_EXP.C 2 10 1 Pin FPU_CS.D- 1 1 1 Pin FPU_CS.AP 1 1 1 Pin FPU_CS.C + 2 3 1 Pin IPL_030_1_.D + 1 1 1 Pin IPL_030_1_.AP + 1 1 1 Pin IPL_030_1_.C 1 1 1 Pin DTACK.OE 1 2 1 Pin DTACK.D- 1 1 1 Pin DTACK.AP 1 1 1 Pin DTACK.C + 2 3 1 Pin IPL_030_0_.D + 1 1 1 Pin IPL_030_0_.AP + 1 1 1 Pin IPL_030_0_.C 3 6 1 Pin E.T 1 1 1 Pin E.C 1 1 1 Pin VMA.AP @@ -997,12 +963,6 @@ PostFit_Equations 1 1 1 Pin VMA.C 1 1 1 Pin RESET.D 1 1 1 Pin RESET.C - 2 3 1 Pin IPL_030_1_.D - 1 1 1 Pin IPL_030_1_.AP - 1 1 1 Pin IPL_030_1_.C - 2 3 1 Pin IPL_030_0_.D - 1 1 1 Pin IPL_030_0_.AP - 1 1 1 Pin IPL_030_0_.C 3 3 1 Node cpu_est_0_.D 1 1 1 Node cpu_est_0_.C 4 6 1 Node cpu_est_1_.T @@ -1063,16 +1023,10 @@ PostFit_Equations 1 1 1 Node SM_AMIGA_0_.AR 3 5 1 Node SM_AMIGA_0_.D 1 1 1 Node SM_AMIGA_0_.C - 2 6 1 Node SM_AMIGA_D_0_.D- - 1 1 1 Node SM_AMIGA_D_0_.C - 2 6 1 Node SM_AMIGA_D_1_.D- - 1 1 1 Node SM_AMIGA_D_1_.C - 2 6 1 Node SM_AMIGA_D_2_.D- - 1 1 1 Node SM_AMIGA_D_2_.C ========= - 195 P-Term Total: 195 + 174 P-Term Total: 174 Total Pins: 59 - Total Nodes: 27 + Total Nodes: 24 Average P-Term/Output: 2 @@ -1082,21 +1036,9 @@ BERR = (0); BERR.OE = (!FPU_CS.Q); -CLK_EXP.X1 = (SM_AMIGA_0_.Q - # SM_AMIGA_6_.Q & !SM_AMIGA_D_0_.Q - # SM_AMIGA_4_.Q & !SM_AMIGA_D_0_.Q - # SM_AMIGA_2_.Q & !SM_AMIGA_D_0_.Q - # SM_AMIGA_1_.Q & !SM_AMIGA_D_1_.Q - # SM_AMIGA_4_.Q & !SM_AMIGA_D_1_.Q - # SM_AMIGA_5_.Q & !SM_AMIGA_D_1_.Q - # SM_AMIGA_1_.Q & !SM_AMIGA_D_2_.Q - # SM_AMIGA_3_.Q & !SM_AMIGA_D_2_.Q - # SM_AMIGA_2_.Q & !SM_AMIGA_D_2_.Q - # !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q & SM_AMIGA_D_0_.Q - # !SM_AMIGA_1_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_5_.Q & SM_AMIGA_D_1_.Q - # !SM_AMIGA_1_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & SM_AMIGA_D_2_.Q); +CLK_DIV_OUT.D = (inst_CLK_OUT_PRE.Q); -CLK_EXP.X2 = (SM_AMIGA_0_.Q & SM_AMIGA_D_0_.Q & SM_AMIGA_D_1_.Q & SM_AMIGA_D_2_.Q); +CLK_DIV_OUT.C = (CLK_OSZI); AVEC = (1); @@ -1104,6 +1046,10 @@ AVEC_EXP = (0); AVEC_EXP.OE = (!FPU_CS.Q); +DSACK_0_ = (1); + +DSACK_0_.OE = (!CPU_SPACE); + AMIGA_BUS_ENABLE = (0); AMIGA_BUS_DATA_DIR = (!RW); @@ -1114,10 +1060,6 @@ CIIN = (A_23_ & A_22_ & A_21_ & A_20_); CIIN.OE = (!A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_); -DSACK_0_ = (1); - -DSACK_0_.OE = (!CPU_SPACE); - IPL_030_2_.D = (IPL_2_ & inst_RISING_CLK_AMIGA.Q # IPL_030_2_.Q & !inst_RISING_CLK_AMIGA.Q); @@ -1192,9 +1134,9 @@ BGACK_030.AP = (!RST); BGACK_030.C = (CLK_OSZI); -CLK_DIV_OUT.D = (inst_CLK_OUT_PRE.Q); +CLK_EXP.D = (inst_CLK_OUT_PRE.Q); -CLK_DIV_OUT.C = (CLK_OSZI); +CLK_EXP.C = (CLK_OSZI); !FPU_CS.D = (!AS_030 & !CLK_030 & !FPU_CS.Q # FC_1_ & !AS_030 & BGACK_000 & CLK_030 & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_); @@ -1203,6 +1145,13 @@ FPU_CS.AP = (!RST); FPU_CS.C = (CLK_OSZI); +IPL_030_1_.D = (IPL_1_ & inst_RISING_CLK_AMIGA.Q + # IPL_030_1_.Q & !inst_RISING_CLK_AMIGA.Q); + +IPL_030_1_.AP = (!RST); + +IPL_030_1_.C = (CLK_OSZI); + DTACK.OE = (!BGACK_030.Q); !DTACK.D = (!AS_000.Q & !DSACK_1_.PIN); @@ -1211,6 +1160,13 @@ DTACK.AP = (!RST); DTACK.C = (CLK_OSZI); +IPL_030_0_.D = (IPL_0_ & inst_RISING_CLK_AMIGA.Q + # IPL_030_0_.Q & !inst_RISING_CLK_AMIGA.Q); + +IPL_030_0_.AP = (!RST); + +IPL_030_0_.C = (CLK_OSZI); + E.T = (E.Q & cpu_est_0_.Q & cpu_est_1_.Q & inst_CLK_000_D.Q & !inst_CLK_000_DD.Q & cpu_est_2_.Q # !E.Q & cpu_est_0_.Q & cpu_est_1_.Q & inst_CLK_000_D.Q & !inst_CLK_000_DD.Q & !cpu_est_2_.Q # !E.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & inst_CLK_000_D.Q & !inst_CLK_000_DD.Q & !cpu_est_2_.Q); @@ -1228,20 +1184,6 @@ RESET.D = (RST); RESET.C = (CLK_OSZI); -IPL_030_1_.D = (IPL_1_ & inst_RISING_CLK_AMIGA.Q - # IPL_030_1_.Q & !inst_RISING_CLK_AMIGA.Q); - -IPL_030_1_.AP = (!RST); - -IPL_030_1_.C = (CLK_OSZI); - -IPL_030_0_.D = (IPL_0_ & inst_RISING_CLK_AMIGA.Q - # IPL_030_0_.Q & !inst_RISING_CLK_AMIGA.Q); - -IPL_030_0_.AP = (!RST); - -IPL_030_0_.C = (CLK_OSZI); - cpu_est_0_.D = (cpu_est_0_.Q & !inst_CLK_000_D.Q # cpu_est_0_.Q & inst_CLK_000_DD.Q # !cpu_est_0_.Q & inst_CLK_000_D.Q & !inst_CLK_000_DD.Q); @@ -1325,7 +1267,7 @@ CLK_CNT_0_.C = (CLK_OSZI); SM_AMIGA_6_.AR = (!RST); -!SM_AMIGA_6_.D = (inst_CLK_000_D.Q & SM_AMIGA_7_.Q +!SM_AMIGA_6_.D = (inst_CLK_000_D.Q & !SM_AMIGA_6_.Q # !SM_AMIGA_6_.Q & !SM_AMIGA_7_.Q # !inst_AS_030_000_SYNC.Q & inst_CLK_000_D.Q & !inst_CLK_000_DD.Q); @@ -1345,8 +1287,8 @@ inst_RISING_CLK_AMIGA.C = (CLK_OSZI); SM_AMIGA_1_.AR = (!RST); SM_AMIGA_1_.D = (inst_CLK_000_D.Q & SM_AMIGA_1_.Q - # !inst_CLK_OUT_PRE.Q & SM_AMIGA_1_.Q - # inst_CLK_000_D.Q & SM_AMIGA_2_.Q); + # inst_CLK_000_D.Q & SM_AMIGA_2_.Q + # !inst_CLK_OUT_PRE.Q & SM_AMIGA_1_.Q & !SM_AMIGA_2_.Q); SM_AMIGA_1_.C = (CLK_OSZI); @@ -1388,21 +1330,6 @@ SM_AMIGA_0_.D = (!AS_000.Q & SM_AMIGA_0_.Q SM_AMIGA_0_.C = (CLK_OSZI); -!SM_AMIGA_D_0_.D = (!RST & !SM_AMIGA_D_0_.Q - # RST & !SM_AMIGA_6_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_2_.Q & !SM_AMIGA_0_.Q); - -SM_AMIGA_D_0_.C = (CLK_OSZI); - -!SM_AMIGA_D_1_.D = (!RST & !SM_AMIGA_D_1_.Q - # RST & !SM_AMIGA_1_.Q & !SM_AMIGA_4_.Q & !SM_AMIGA_5_.Q & !SM_AMIGA_0_.Q); - -SM_AMIGA_D_1_.C = (CLK_OSZI); - -!SM_AMIGA_D_2_.D = (!RST & !SM_AMIGA_D_2_.Q - # RST & !SM_AMIGA_1_.Q & !SM_AMIGA_3_.Q & !SM_AMIGA_2_.Q & !SM_AMIGA_0_.Q); - -SM_AMIGA_D_2_.C = (CLK_OSZI); - Reverse-Polarity Equations: diff --git a/Logic/68030_tk.tal b/Logic/68030_tk.tal index 3f37f9e..eea3929 100644 --- a/Logic/68030_tk.tal +++ b/Logic/68030_tk.tal @@ -50,16 +50,16 @@ AMIGA_BUS_DATA_DIR .. .. .. .. 1 1 .. .. RN_BGACK_030 1 1 0 0 .. .. 1 1 FPU_CS 1 1 0 0 .. .. 1 1 RN_FPU_CS 1 1 0 0 .. .. 1 1 + IPL_030_1_ 1 1 0 0 .. .. 1 1 + RN_IPL_030_1_ 1 1 0 0 .. .. 1 1 DTACK 1 1 0 0 .. .. .. .. + IPL_030_0_ 1 1 0 0 .. .. 1 1 + RN_IPL_030_0_ 1 1 0 0 .. .. 1 1 E .. .. 0 0 .. .. 1 1 RN_E .. .. 0 0 .. .. 1 1 VMA .. .. 0 0 .. .. 1 1 RN_VMA .. .. 0 0 .. .. 1 1 RESET 1 1 0 0 .. .. .. .. - IPL_030_1_ 1 1 0 0 .. .. 1 1 - RN_IPL_030_1_ 1 1 0 0 .. .. 1 1 - IPL_030_0_ 1 1 0 0 .. .. 1 1 - RN_IPL_030_0_ 1 1 0 0 .. .. 1 1 cpu_est_0_ .. .. .. .. .. .. 1 1 cpu_est_1_ .. .. .. .. .. .. 1 1 cpu_est_d_0_ .. .. .. .. .. .. 1 1 @@ -75,15 +75,12 @@ inst_CLK_OUT_PRE .. .. .. .. .. .. 1 1 cpu_est_d_2_ .. .. .. .. .. .. 1 1 cpu_est_2_ .. .. .. .. .. .. 1 1 CLK_CNT_0_ .. .. .. .. .. .. 1 1 - SM_AMIGA_6_ .. .. 1 1 .. .. 1 1 + SM_AMIGA_6_ .. .. .. .. .. .. 1 1 SM_AMIGA_7_ .. .. .. .. .. .. 1 1 inst_RISING_CLK_AMIGA 1 1 .. .. .. .. 1 1 - SM_AMIGA_1_ .. .. 1 1 .. .. 1 1 - SM_AMIGA_4_ .. .. 1 1 .. .. 1 1 - SM_AMIGA_3_ .. .. 1 1 .. .. 1 1 - SM_AMIGA_5_ .. .. 1 1 .. .. 1 1 - SM_AMIGA_2_ .. .. 1 1 .. .. 1 1 - SM_AMIGA_0_ .. .. 1 1 .. .. 1 1 - SM_AMIGA_D_0_ 1 1 1 1 .. .. .. .. - SM_AMIGA_D_1_ 1 1 1 1 .. .. .. .. - SM_AMIGA_D_2_ 1 1 1 1 .. .. .. .. \ No newline at end of file + SM_AMIGA_1_ .. .. .. .. .. .. 1 1 + SM_AMIGA_4_ .. .. .. .. .. .. 1 1 + SM_AMIGA_3_ .. .. .. .. .. .. 1 1 + SM_AMIGA_5_ .. .. .. .. .. .. 1 1 + SM_AMIGA_2_ .. .. .. .. .. .. 1 1 + SM_AMIGA_0_ .. .. .. .. .. .. 1 1 \ No newline at end of file diff --git a/Logic/68030_tk.tt2 b/Logic/68030_tk.tt2 index 0917fbf..9982b1b 100644 --- a/Logic/68030_tk.tt2 +++ b/Logic/68030_tk.tt2 @@ -1,340 +1,289 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Thu May 15 22:17:27 2014 +#$ DATE Thu May 15 22:21:53 2014 #$ MODULE 68030_tk -#$ PINS 59 FC_0_ SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 CPU_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI SIZE_0_ CLK_EXP A_30_ A_29_ A_28_ AVEC A_27_ AVEC_EXP A_26_ A_25_ VPA A_24_ A_23_ RST A_22_ A_21_ RW A_20_ AMIGA_BUS_ENABLE A_19_ AMIGA_BUS_DATA_DIR A_18_ AMIGA_BUS_ENABLE_LOW A_17_ CIIN A_16_ A_0_ IPL_1_ IPL_0_ DSACK_0_ IPL_030_2_ DSACK_1_ AS_000 UDS_000 LDS_000 BG_000 BGACK_030 CLK_DIV_OUT FPU_CS DTACK E VMA RESET IPL_030_1_ IPL_030_0_ -#$ NODES 27 cpu_est_0_ cpu_est_1_ cpu_est_d_0_ cpu_est_d_3_ inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_D inst_VPA_SYNC inst_CLK_000_D inst_CLK_000_DD inst_CLK_OUT_PRE cpu_est_d_1_ cpu_est_d_2_ cpu_est_2_ CLK_CNT_0_ SM_AMIGA_6_ SM_AMIGA_7_ inst_RISING_CLK_AMIGA SM_AMIGA_1_ SM_AMIGA_4_ SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_ SM_AMIGA_D_0_ SM_AMIGA_D_1_ SM_AMIGA_D_2_ +#$ PINS 59 A_28_ A_27_ SIZE_1_ A_26_ A_25_ A_31_ A_24_ A_23_ A_22_ A_21_ IPL_2_ A_20_ A_19_ A_18_ A_17_ FC_1_ A_16_ AS_030 DS_030 CPU_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT A_0_ AVEC IPL_1_ AVEC_EXP IPL_0_ DSACK_0_ VPA FC_0_ RST RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ IPL_030_2_ DSACK_1_ AS_000 UDS_000 LDS_000 BG_000 BGACK_030 CLK_EXP FPU_CS IPL_030_1_ DTACK IPL_030_0_ E VMA RESET +#$ NODES 24 cpu_est_0_ cpu_est_1_ cpu_est_d_0_ cpu_est_d_3_ inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_D inst_VPA_SYNC inst_CLK_000_D inst_CLK_000_DD inst_CLK_OUT_PRE cpu_est_d_1_ cpu_est_d_2_ cpu_est_2_ CLK_CNT_0_ SM_AMIGA_6_ SM_AMIGA_7_ inst_RISING_CLK_AMIGA SM_AMIGA_1_ SM_AMIGA_4_ SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_ .type fr -.i 76 -.o 126 -.ilb SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 CPU_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ A_0_ IPL_1_ IPL_0_ FC_0_ BGACK_030.Q FPU_CS.Q BG_000.Q E.Q VMA.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_d_0_.Q cpu_est_d_3_.Q AS_000.Q inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_D.Q inst_VPA_SYNC.Q inst_CLK_000_D.Q inst_CLK_000_DD.Q IPL_030_0_.Q inst_CLK_OUT_PRE.Q IPL_030_1_.Q cpu_est_d_1_.Q cpu_est_d_2_.Q IPL_030_2_.Q cpu_est_2_.Q CLK_CNT_0_.Q SM_AMIGA_6_.Q SM_AMIGA_7_.Q UDS_000.Q LDS_000.Q inst_RISING_CLK_AMIGA.Q SM_AMIGA_1_.Q DSACK_1_.Q SM_AMIGA_4_.Q SM_AMIGA_3_.Q SM_AMIGA_5_.Q SM_AMIGA_2_.Q SM_AMIGA_0_.Q SM_AMIGA_D_0_.Q SM_AMIGA_D_1_.Q SM_AMIGA_D_2_.Q DSACK_1_.PIN DTACK.PIN -.ob BERR AVEC AVEC_EXP AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.C SM_AMIGA_0_.AR IPL_030_1_.C IPL_030_1_.AP IPL_030_2_.C IPL_030_2_.AP cpu_est_0_.C cpu_est_1_.C cpu_est_2_.C E.C SM_AMIGA_7_.C SM_AMIGA_7_.AP cpu_est_d_0_.C cpu_est_d_1_.C cpu_est_d_2_.C cpu_est_d_3_.C SM_AMIGA_D_0_.C SM_AMIGA_D_1_.C SM_AMIGA_D_2_.C IPL_030_0_.C IPL_030_0_.AP AS_000.C AS_000.AP inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP VMA.C VMA.AP BG_000.C BG_000.AP DSACK_1_.C DSACK_1_.AP BGACK_030.C BGACK_030.AP inst_CLK_OUT_PRE.C UDS_000.C UDS_000.AP LDS_000.C LDS_000.AP inst_DTACK_SYNC.C inst_DTACK_SYNC.AP FPU_CS.C FPU_CS.AP DTACK.C DTACK.AP inst_RISING_CLK_AMIGA.C CLK_CNT_0_.C inst_VPA_D.C inst_CLK_000_D.C RESET.C inst_CLK_000_DD.C CLK_DIV_OUT.C DSACK_0_ DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE LDS_000.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_EXP.X1 CLK_EXP.X2 BGACK_030.D CLK_DIV_OUT.D FPU_CS.D BG_000.D E.T VMA.T cpu_est_0_.D cpu_est_1_.T cpu_est_d_0_.D cpu_est_d_3_.D AS_000.D inst_AS_030_000_SYNC.D inst_DTACK_SYNC.D inst_VPA_D.D inst_VPA_SYNC.D inst_CLK_000_D.D inst_CLK_000_DD.D IPL_030_0_.D inst_CLK_OUT_PRE.D IPL_030_1_.D cpu_est_d_1_.D cpu_est_d_2_.D IPL_030_2_.D cpu_est_2_.D CLK_CNT_0_.D SM_AMIGA_6_.D SM_AMIGA_7_.D UDS_000.D LDS_000.D inst_RISING_CLK_AMIGA.D SM_AMIGA_1_.D DSACK_1_.D DTACK.D SM_AMIGA_4_.D SM_AMIGA_3_.D SM_AMIGA_5_.D SM_AMIGA_2_.D SM_AMIGA_0_.D SM_AMIGA_D_0_.D SM_AMIGA_D_1_.D SM_AMIGA_D_2_.D RESET.D -.p 328 ----------------------------------------------------------------------------- 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-----0--------------------------------------------0------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ -----0---------1-----------------------------------1-----------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ -----0---------1--------------------------------------------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ ---0------------------------------------------------------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ ---------------------------------0------------------------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------0-----------------------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------0---------------------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------------0-----------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------0---------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------------------0------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ --------------------------------------------------0--1-----------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ --------------------------------------------------0--------------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ -----0------------------------------------------------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ -1----0--------0----------------------------------1----------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ ------0--------00---------------------------------1----------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ ------0--------0----------------1-----------------1----------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ ------0--------0----------------0-----------------1----------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ -----0---------0----------------------------------------------0----0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ -----0---------0-----------------------------------------------0---0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ ---------------------------------------1000-----0-1-------1---------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------0-----------------0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ -------------------------------------------------------------------00-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ----------------------------------------------1----------------------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ---------------------------------------------------1-----------------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ------------------------------------------------------------0--------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ -------------------------------------------------------------------0-0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ -----------------------------------------------1-1--------------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ -----------------------------------------------------------------0----0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ --------------------------------------------------------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ -----------------------------------------------------------------------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------1--------------------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ -----------------------------------------------------0-----------------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ -------------------------------------------------------------0---------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ -----------------------------------------------------------------0-----0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ --------------1--------------------------------------------------0-0-0-0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ --------------1---------------------------------------------0------0--00----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ --------------1--------------------------------------------------0--0-00----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ ------------------------------------------------------------------------0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------0---------------------------------------------------------0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ -------------------------------------------------------------------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------0----------------------------------------------------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ ------------------------------------------------------------1----1-----0111-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------1-1---0111-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------------------------------11--0111-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------1-------11-0111-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------1----10111-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------------------------------1--10111-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------------------------------110111-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------0----1-0--00011-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------0------01100011-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------1----0-010-0101-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------0-0-010101-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------0----0-01000001-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------0-----------------------------------------------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ -----------------------------------------------------------------0-10-00110-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------1----0--0100110-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------0----0-00100010-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------1----0-00000100-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------0----0-00000000-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------0-----------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ ------------------------------------------------1-1-----------------1-------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +.i 73 +.o 120 +.ilb SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 CPU_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ A_0_ IPL_1_ IPL_0_ FC_0_ IPL_030_0_.Q BGACK_030.Q FPU_CS.Q IPL_030_1_.Q E.Q VMA.Q IPL_030_2_.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_d_0_.Q cpu_est_d_3_.Q AS_000.Q inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_D.Q inst_VPA_SYNC.Q inst_CLK_000_D.Q inst_CLK_000_DD.Q inst_CLK_OUT_PRE.Q cpu_est_d_1_.Q cpu_est_d_2_.Q cpu_est_2_.Q CLK_CNT_0_.Q SM_AMIGA_6_.Q SM_AMIGA_7_.Q UDS_000.Q LDS_000.Q inst_RISING_CLK_AMIGA.Q SM_AMIGA_1_.Q DSACK_1_.Q SM_AMIGA_4_.Q SM_AMIGA_3_.Q SM_AMIGA_5_.Q SM_AMIGA_2_.Q SM_AMIGA_0_.Q BG_000.Q DSACK_1_.PIN DTACK.PIN +.ob BERR AVEC AVEC_EXP AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN E.C SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.C SM_AMIGA_0_.AR cpu_est_d_0_.C cpu_est_d_1_.C cpu_est_d_2_.C cpu_est_d_3_.C IPL_030_0_.C IPL_030_0_.AP IPL_030_1_.C IPL_030_1_.AP IPL_030_2_.C IPL_030_2_.AP cpu_est_0_.C cpu_est_1_.C cpu_est_2_.C inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP VMA.C VMA.AP BG_000.C BG_000.AP DSACK_1_.C DSACK_1_.AP BGACK_030.C BGACK_030.AP inst_CLK_OUT_PRE.C UDS_000.C UDS_000.AP LDS_000.C LDS_000.AP inst_DTACK_SYNC.C inst_DTACK_SYNC.AP FPU_CS.C FPU_CS.AP AS_000.C AS_000.AP DTACK.C DTACK.AP inst_RISING_CLK_AMIGA.C CLK_CNT_0_.C inst_VPA_D.C inst_CLK_000_D.C RESET.C inst_CLK_000_DD.C CLK_EXP.C DSACK_0_ DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE LDS_000.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_DIV_OUT.C CLK_DIV_OUT.D CLK_EXP.D IPL_030_0_.D BGACK_030.D FPU_CS.D IPL_030_1_.D E.T VMA.T IPL_030_2_.D cpu_est_0_.D cpu_est_1_.T cpu_est_d_0_.D cpu_est_d_3_.D AS_000.D inst_AS_030_000_SYNC.D inst_DTACK_SYNC.D inst_VPA_D.D inst_VPA_SYNC.D inst_CLK_000_D.D inst_CLK_000_DD.D inst_CLK_OUT_PRE.D cpu_est_d_1_.D cpu_est_d_2_.D cpu_est_2_.D CLK_CNT_0_.D SM_AMIGA_6_.D SM_AMIGA_7_.D UDS_000.D RESET.D LDS_000.D inst_RISING_CLK_AMIGA.D SM_AMIGA_1_.D DSACK_1_.D DTACK.D SM_AMIGA_4_.D SM_AMIGA_3_.D SM_AMIGA_5_.D SM_AMIGA_2_.D SM_AMIGA_0_.D BG_000.D +.p 277 +------------------------------------------------------------------------- ~1~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1-------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +----11------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~ +------0------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------1----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +---0-----1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1--1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +--------01--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----0----0--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +------1--0--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +----------1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------------------------------------- ~~~~~~~11~1~1~1~1~1~1~1~11111~1~1~1111~1~1~1~1~1~11~1~1~1~1~1~1111111~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ +-------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +-------------0----------------------------------------------------------- ~~~~~~~~~1~1~1~1~1~1~1~1~~~~~1~1~1~~~~1~1~1~1~1~1~~1~1~1~1~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------0---------------------------------------------------------- ~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-0--------------0000000-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1111---------------------------------------------- ~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1-----------------1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1------------------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1-------------------0------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1--------------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1----11-----------------0010---1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1------------------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------1---------------------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------0---------------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------0----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1----------------------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +----1-----------------------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1-------------------------------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +----1--------------------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +----1------------------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------0-------------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +----1---------1--------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~ +----------------------------------------------11------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1--------------------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +----1--------------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------10----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0----------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------1---------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1-------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------11---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +----1----------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +----1----------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~1~~~~~~~~~1~1~~~~~~~~~~ +----------1----------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +------------------------------------------1--------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------1----0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------1--0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------10--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +----1-----------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1---------1-------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~ +------------------------------------------1---------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------1-----1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1--1--------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +------------------------------------------0--------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------00-------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +---------------------------------------1--00-------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1------------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +----------------------------------------0---001----1--11----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-------------------------------------------1------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +---------------------------------------------------0----1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +---------------------------------------01-10-----0-0----1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------1---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +---------------------------------------0--1--------10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1--11-------10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1---------------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------1-----0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1--11-------10---0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0--11-------10---0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0---0-------10---0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0--00-------10---0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------0---1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +-----------------------------------------------------1---0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------1----------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +---------------------------------------------------0------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +----------------------------------------------------1-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +-----------------------------------------------0---10-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-----0--------1----------------1---------------0---10-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +0----0--------11---------------0---------------0---10-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +----1-----------------------------------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1---------1-------------------------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~ +----------------------------------------------1-----------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1-------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +---------------------------------------------------0-------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +---------0------------------------------------------------00------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-----1------------------------------------------------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +--------------1--------------------------------1------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +---------------------------------------------------0--------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +--------------1-------------------------------------1-------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +--------------1-------------------------------------------0-1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +-----1-------------------------------------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--------------1--------------------------------1-------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +---------------------------------------------------0---------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--------------1-------------------------------------1--------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--------------1-------------------------------------------0--1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--1-----------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------1-----------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1-----------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------1----------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------1--------------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------1-----------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------1--------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1-----------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +---------------------------------------------------0-1---------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +----1----------------------------------------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +---------------------------------------------------1------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------------------------------------------------0----------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +---------------------------------------------------------------01-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +---------------------------------------------------1-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +-----0--------0----------------1-------------------1-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +0----0--------01---------------0-------------------1-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +---------------------------------------------------0-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +----1---------0--------------------------------------------------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~ +--------------0---------------------------------------------1----0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +--------------0----------------------------------------------1---0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +------------------------------------------------1-1---------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +---------------------------------------------------1--------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +------------------------------------------------0--0--------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------------------------------------00--------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +----1-------------------------------------------------------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------1-----------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------1---------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1---------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +---------------------------------------------------0---------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +---------------------------------------------------1----------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +---------------------------------------------------0----------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-----------------------------------------------------0---------1----0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +----------------------------------------------0----------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +----------------------------------------------1----1-----------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +---------------------------------------------------0-----------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +---------1------------------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-----------------------------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +----1-------------------------------------------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------1-----------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------- 0~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-1----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------0---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---00-0--1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +----0-0-01--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +----------0-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~0~~~~~~~~~ +-----------0------------------------------------------------------------- ~~~~~~~00~0~0~0~0~0~0~0~00000~0~0~0000~0~0~0~0~0~00~0~0~0~0~0~0000000~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------0------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ +-------------1----------------------------------------------------------- ~~~~~~~~~0~0~0~0~0~0~0~0~~~~~0~0~0~~~~0~0~0~0~0~0~~0~0~0~0~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------0----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +--------------1---------------------------------------------------------- ~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------1-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------1--------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0------------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0------------------------------------------------ ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------0----------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0---------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----0-0--1-----------------1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +----0-0--1------------------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +----0-0--1-------------------0------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +----0-0--1--------------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +---10---11-----------------0010---1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----0-0--1------------------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----0----0---------------------------0----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------01----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +------------------------------------------10----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1--10----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----0-----------------------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +----0----0-------------------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +----0-------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ +----0---------------------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~0~~0~~ +----------------------------------------1----------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------1------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------1-----1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------1----1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +----------------------------------------------0----1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~0~~~~~~~~0~~~~~~0~~~~~~~~~0~~~ +---------------------------------------1-----------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------0----------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------0--------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1-------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------0--0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +-------------------------------------------------1-0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------00--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +----------------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------0---------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1--------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0--10-------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +-----------------------------------------------0---10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +---------------------------------------------------0-1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +-----------------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1--0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1---0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0----------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------0-------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0--0-------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1---1------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +---------------------------------------1----------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0---1------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +------------------------------------------01------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +---------------------------------------------------0----0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +----------------------------------------------------1---0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +---------------------------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +-----------------------------------------------------1---1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------0---0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +----1-00-0------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------------------------------------------0---10-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +1----0--------1--------------------------------0---10-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-----0--------10-------------------------------0---10-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-----0--------1----------------1---------------0---10-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-----0--------1----------------0---------------0---10-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +---------------------------------------------------1------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +----1-00-0-------------------------------------------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +----------------------------------------------0------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +----------------------------------------------------------00------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +----01------------------------------------------------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----0---------1--------------------------------1------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----0----------------------------------------------0--------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----0---------1-------------------------------------1-------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----0---------1-------------------------------------------0-0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----01-------------------------------------------------------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +----0---------1--------------------------------1-------------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +----0----------------------------------------------0---------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +----0---------1-------------------------------------1--------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +----0---------1-------------------------------------------0--0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +--0-----------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------0-----------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------0----------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------0--------------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------0-------------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------0-----------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------0--------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------0-1---------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +----0-----------------------------------------------------------0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +1----0--------0------------------------------------1-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-----0--------00-----------------------------------1-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-----0--------0----------------1-------------------1-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-----0--------0----------------0-------------------1-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----0---------0---------------------------------------------0----0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----0---------0----------------------------------------------0---0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +---------------------------------------10-00-----0-1----1---------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------0--------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +-----------------------------------------------------------------00------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +-----------------------------------------------1-------------------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +----------------------------------------------------1--------------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +----------------------------------------------------------0--------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-----------------------------------------------------------------0-0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +---------------------------------------------------0----------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +------------------------------------------------1-1-----------------0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +---------------------------------------------------------------0----0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +------------------------------------------------------------------0-0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +---------------------------------------------------1-----------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------------------------------------------------0---------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------------------------------------------------------0---------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +---------------------------------------------------------------0-----0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-------0-1------------------------------------------------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +----------------------------------------------0------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-------------------------------------------------1-1--------------1-----0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ .end diff --git a/Logic/68030_tk.tt3 b/Logic/68030_tk.tt3 index e63bcfc..e87bcd4 100644 --- a/Logic/68030_tk.tt3 +++ b/Logic/68030_tk.tt3 @@ -1,340 +1,289 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Thu May 15 22:17:27 2014 +#$ DATE Thu May 15 22:21:53 2014 #$ MODULE 68030_tk -#$ PINS 59 FC_0_ SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 CPU_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI SIZE_0_ CLK_EXP A_30_ A_29_ A_28_ AVEC A_27_ AVEC_EXP A_26_ A_25_ VPA A_24_ A_23_ RST A_22_ A_21_ RW A_20_ AMIGA_BUS_ENABLE A_19_ AMIGA_BUS_DATA_DIR A_18_ AMIGA_BUS_ENABLE_LOW A_17_ CIIN A_16_ A_0_ IPL_1_ IPL_0_ DSACK_0_ IPL_030_2_ DSACK_1_ AS_000 UDS_000 LDS_000 BG_000 BGACK_030 CLK_DIV_OUT FPU_CS DTACK E VMA RESET IPL_030_1_ IPL_030_0_ -#$ NODES 27 cpu_est_0_ cpu_est_1_ cpu_est_d_0_ cpu_est_d_3_ inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_D inst_VPA_SYNC inst_CLK_000_D inst_CLK_000_DD inst_CLK_OUT_PRE cpu_est_d_1_ cpu_est_d_2_ cpu_est_2_ CLK_CNT_0_ SM_AMIGA_6_ SM_AMIGA_7_ inst_RISING_CLK_AMIGA SM_AMIGA_1_ SM_AMIGA_4_ SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_ SM_AMIGA_D_0_ SM_AMIGA_D_1_ SM_AMIGA_D_2_ +#$ PINS 59 A_28_ A_27_ SIZE_1_ A_26_ A_25_ A_31_ A_24_ A_23_ A_22_ A_21_ IPL_2_ A_20_ A_19_ A_18_ A_17_ FC_1_ A_16_ AS_030 DS_030 CPU_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT A_0_ AVEC IPL_1_ AVEC_EXP IPL_0_ DSACK_0_ VPA FC_0_ RST RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ IPL_030_2_ DSACK_1_ AS_000 UDS_000 LDS_000 BG_000 BGACK_030 CLK_EXP FPU_CS IPL_030_1_ DTACK IPL_030_0_ E VMA RESET +#$ NODES 24 cpu_est_0_ cpu_est_1_ cpu_est_d_0_ cpu_est_d_3_ inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_D inst_VPA_SYNC inst_CLK_000_D inst_CLK_000_DD inst_CLK_OUT_PRE cpu_est_d_1_ cpu_est_d_2_ cpu_est_2_ CLK_CNT_0_ SM_AMIGA_6_ SM_AMIGA_7_ inst_RISING_CLK_AMIGA SM_AMIGA_1_ SM_AMIGA_4_ SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_ .type fr -.i 76 -.o 126 -.ilb SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 CPU_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ A_0_ IPL_1_ IPL_0_ FC_0_ BGACK_030.Q FPU_CS.Q BG_000.Q E.Q VMA.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_d_0_.Q cpu_est_d_3_.Q AS_000.Q inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_D.Q inst_VPA_SYNC.Q inst_CLK_000_D.Q inst_CLK_000_DD.Q IPL_030_0_.Q inst_CLK_OUT_PRE.Q IPL_030_1_.Q cpu_est_d_1_.Q cpu_est_d_2_.Q IPL_030_2_.Q cpu_est_2_.Q CLK_CNT_0_.Q SM_AMIGA_6_.Q SM_AMIGA_7_.Q UDS_000.Q LDS_000.Q inst_RISING_CLK_AMIGA.Q SM_AMIGA_1_.Q DSACK_1_.Q SM_AMIGA_4_.Q SM_AMIGA_3_.Q SM_AMIGA_5_.Q SM_AMIGA_2_.Q SM_AMIGA_0_.Q SM_AMIGA_D_0_.Q SM_AMIGA_D_1_.Q SM_AMIGA_D_2_.Q DSACK_1_.PIN DTACK.PIN -.ob BERR AVEC AVEC_EXP AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.C SM_AMIGA_0_.AR IPL_030_1_.C IPL_030_1_.AP IPL_030_2_.C IPL_030_2_.AP cpu_est_0_.C cpu_est_1_.C cpu_est_2_.C E.C SM_AMIGA_7_.C SM_AMIGA_7_.AP cpu_est_d_0_.C cpu_est_d_1_.C cpu_est_d_2_.C cpu_est_d_3_.C SM_AMIGA_D_0_.C SM_AMIGA_D_1_.C SM_AMIGA_D_2_.C IPL_030_0_.C IPL_030_0_.AP AS_000.C AS_000.AP inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP VMA.C VMA.AP BG_000.C BG_000.AP DSACK_1_.C DSACK_1_.AP BGACK_030.C BGACK_030.AP inst_CLK_OUT_PRE.C UDS_000.C UDS_000.AP LDS_000.C LDS_000.AP inst_DTACK_SYNC.C inst_DTACK_SYNC.AP FPU_CS.C FPU_CS.AP DTACK.C DTACK.AP inst_RISING_CLK_AMIGA.C CLK_CNT_0_.C inst_VPA_D.C inst_CLK_000_D.C RESET.C inst_CLK_000_DD.C CLK_DIV_OUT.C DSACK_0_ DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE LDS_000.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_EXP.X1 CLK_EXP.X2 BGACK_030.D CLK_DIV_OUT.D FPU_CS.D BG_000.D E.T VMA.T cpu_est_0_.D cpu_est_1_.T cpu_est_d_0_.D cpu_est_d_3_.D AS_000.D inst_AS_030_000_SYNC.D inst_DTACK_SYNC.D inst_VPA_D.D inst_VPA_SYNC.D inst_CLK_000_D.D inst_CLK_000_DD.D IPL_030_0_.D inst_CLK_OUT_PRE.D IPL_030_1_.D cpu_est_d_1_.D cpu_est_d_2_.D IPL_030_2_.D cpu_est_2_.D CLK_CNT_0_.D SM_AMIGA_6_.D SM_AMIGA_7_.D UDS_000.D LDS_000.D inst_RISING_CLK_AMIGA.D SM_AMIGA_1_.D DSACK_1_.D DTACK.D SM_AMIGA_4_.D SM_AMIGA_3_.D SM_AMIGA_5_.D SM_AMIGA_2_.D SM_AMIGA_0_.D SM_AMIGA_D_0_.D SM_AMIGA_D_1_.D SM_AMIGA_D_2_.D RESET.D -.p 328 ----------------------------------------------------------------------------- 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-----0--------------------------------------------0------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ -----0---------1-----------------------------------1-----------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ -----0---------1--------------------------------------------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ ---0------------------------------------------------------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ ---------------------------------0------------------------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------0-----------------------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------0---------------------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------------------------0-----------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------0---------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------------------0------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ --------------------------------------------------0--1-----------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ --------------------------------------------------0--------------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ -----0------------------------------------------------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ -1----0--------0----------------------------------1----------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ ------0--------00---------------------------------1----------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ ------0--------0----------------1-----------------1----------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ ------0--------0----------------0-----------------1----------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ -----0---------0----------------------------------------------0----0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ -----0---------0-----------------------------------------------0---0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ ---------------------------------------1000-----0-1-------1---------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------0-----------------0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ -------------------------------------------------------------------00-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ ----------------------------------------------1----------------------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ---------------------------------------------------1-----------------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ ------------------------------------------------------------0--------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ -------------------------------------------------------------------0-0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ -----------------------------------------------1-1--------------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ -----------------------------------------------------------------0----0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ --------------------------------------------------------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ -----------------------------------------------------------------------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------1--------------------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ -----------------------------------------------------0-----------------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ -------------------------------------------------------------0---------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ -----------------------------------------------------------------0-----0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ --------------1--------------------------------------------------0-0-0-0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ --------------1---------------------------------------------0------0--00----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ --------------1--------------------------------------------------0--0-00----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ ------------------------------------------------------------------------0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------0---------------------------------------------------------0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ -------------------------------------------------------------------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------0----------------------------------------------------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ ------------------------------------------------------------1----1-----0111-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------1-1---0111-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------------------------------11--0111-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------1-------11-0111-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------1----10111-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------------------------------------1--10111-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------------------------------110111-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------0----1-0--00011-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------0------01100011-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------1----0-010-0101-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------------------------------0-0-010101-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------0----0-01000001-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------------------------------------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------0-----------------------------------------------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ -----------------------------------------------------------------0-10-00110-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------1----0--0100110-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------0----0-00100010-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------1----0-00000100-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------------0----0-00000000-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------------0-----------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ ------------------------------------------------1-1-----------------1-------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +.i 73 +.o 120 +.ilb SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 CPU_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ A_0_ IPL_1_ IPL_0_ FC_0_ IPL_030_0_.Q BGACK_030.Q FPU_CS.Q IPL_030_1_.Q E.Q VMA.Q IPL_030_2_.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_d_0_.Q cpu_est_d_3_.Q AS_000.Q inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_D.Q inst_VPA_SYNC.Q inst_CLK_000_D.Q inst_CLK_000_DD.Q inst_CLK_OUT_PRE.Q cpu_est_d_1_.Q cpu_est_d_2_.Q cpu_est_2_.Q CLK_CNT_0_.Q SM_AMIGA_6_.Q SM_AMIGA_7_.Q UDS_000.Q LDS_000.Q inst_RISING_CLK_AMIGA.Q SM_AMIGA_1_.Q DSACK_1_.Q SM_AMIGA_4_.Q SM_AMIGA_3_.Q SM_AMIGA_5_.Q SM_AMIGA_2_.Q SM_AMIGA_0_.Q BG_000.Q DSACK_1_.PIN DTACK.PIN +.ob BERR AVEC AVEC_EXP AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN E.C SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.C SM_AMIGA_0_.AR cpu_est_d_0_.C cpu_est_d_1_.C cpu_est_d_2_.C cpu_est_d_3_.C IPL_030_0_.C IPL_030_0_.AP IPL_030_1_.C IPL_030_1_.AP IPL_030_2_.C IPL_030_2_.AP cpu_est_0_.C cpu_est_1_.C cpu_est_2_.C inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP VMA.C VMA.AP BG_000.C BG_000.AP DSACK_1_.C DSACK_1_.AP BGACK_030.C BGACK_030.AP inst_CLK_OUT_PRE.C UDS_000.C UDS_000.AP LDS_000.C LDS_000.AP inst_DTACK_SYNC.C inst_DTACK_SYNC.AP FPU_CS.C FPU_CS.AP AS_000.C AS_000.AP DTACK.C DTACK.AP inst_RISING_CLK_AMIGA.C CLK_CNT_0_.C inst_VPA_D.C inst_CLK_000_D.C RESET.C inst_CLK_000_DD.C CLK_EXP.C DSACK_0_ DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE LDS_000.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_DIV_OUT.C CLK_DIV_OUT.D CLK_EXP.D IPL_030_0_.D BGACK_030.D FPU_CS.D IPL_030_1_.D E.T VMA.T IPL_030_2_.D cpu_est_0_.D cpu_est_1_.T cpu_est_d_0_.D cpu_est_d_3_.D AS_000.D inst_AS_030_000_SYNC.D inst_DTACK_SYNC.D inst_VPA_D.D inst_VPA_SYNC.D inst_CLK_000_D.D inst_CLK_000_DD.D inst_CLK_OUT_PRE.D cpu_est_d_1_.D cpu_est_d_2_.D cpu_est_2_.D CLK_CNT_0_.D SM_AMIGA_6_.D SM_AMIGA_7_.D UDS_000.D RESET.D LDS_000.D inst_RISING_CLK_AMIGA.D SM_AMIGA_1_.D DSACK_1_.D DTACK.D SM_AMIGA_4_.D SM_AMIGA_3_.D SM_AMIGA_5_.D SM_AMIGA_2_.D SM_AMIGA_0_.D BG_000.D +.p 277 +------------------------------------------------------------------------- ~1~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1-------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +----11------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~ +------0------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------1----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +---0-----1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1--1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +--------01--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----0----0--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +------1--0--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +----------1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------------------------------------------- ~~~~~~~11~1~1~1~1~1~1~1~11111~1~1~1111~1~1~1~1~1~11~1~1~1~1~1~1111111~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ +-------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +-------------0----------------------------------------------------------- ~~~~~~~~~1~1~1~1~1~1~1~1~~~~~1~1~1~~~~1~1~1~1~1~1~~1~1~1~1~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------0---------------------------------------------------------- ~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-0--------------0000000-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1111---------------------------------------------- ~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1-----------------1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1------------------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1-------------------0------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1--------------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1----11-----------------0010---1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1------------------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------1---------------------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------0---------------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------0----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1----------------------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +----1-----------------------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1-------------------------------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +----1--------------------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +----1------------------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------0-------------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +----1---------1--------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~ +----------------------------------------------11------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1--------------------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +----1--------------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------10----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0----------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------1---------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1-------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------11---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +----1----------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +----1----------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~1~~~~~~~~~1~1~~~~~~~~~~ +----------1----------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +------------------------------------------1--------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------1----0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------1--0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------10--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +----1-----------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1---------1-------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~ +------------------------------------------1---------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------1-----1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1--1--------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +------------------------------------------0--------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------00-------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +---------------------------------------1--00-------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1------------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +----------------------------------------0---001----1--11----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-------------------------------------------1------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +---------------------------------------------------0----1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +---------------------------------------01-10-----0-0----1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------------1---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +---------------------------------------0--1--------10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1--11-------10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1---------------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------1-----0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1--11-------10---0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0--11-------10---0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0---0-------10---0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0--00-------10---0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------0---1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +-----------------------------------------------------1---0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------1----------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +---------------------------------------------------0------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +----------------------------------------------------1-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +-----------------------------------------------0---10-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-----0--------1----------------1---------------0---10-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +0----0--------11---------------0---------------0---10-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +----1-----------------------------------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1---------1-------------------------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~ +----------------------------------------------1-----------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1-------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +---------------------------------------------------0-------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +---------0------------------------------------------------00------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-----1------------------------------------------------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +--------------1--------------------------------1------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +---------------------------------------------------0--------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +--------------1-------------------------------------1-------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +--------------1-------------------------------------------0-1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +-----1-------------------------------------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--------------1--------------------------------1-------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +---------------------------------------------------0---------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--------------1-------------------------------------1--------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--------------1-------------------------------------------0--1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +--1-----------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------1-----------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1-----------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------1----------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------1--------------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------1-----------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------1--------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1-----------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +---------------------------------------------------0-1---------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +----1----------------------------------------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +---------------------------------------------------1------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------------------------------------------------0----------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +---------------------------------------------------------------01-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +---------------------------------------------------1-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +-----0--------0----------------1-------------------1-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +0----0--------01---------------0-------------------1-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +---------------------------------------------------0-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +----1---------0--------------------------------------------------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~ +--------------0---------------------------------------------1----0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +--------------0----------------------------------------------1---0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +------------------------------------------------1-1---------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +---------------------------------------------------1--------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +------------------------------------------------0--0--------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +--------------------------------------------------00--------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +----1-------------------------------------------------------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------1-----------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------1---------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1---------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +---------------------------------------------------0---------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +---------------------------------------------------1----------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +---------------------------------------------------0----------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-----------------------------------------------------0---------1----0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +----------------------------------------------0----------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +----------------------------------------------1----1-----------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +---------------------------------------------------0-----------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +---------1------------------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-----------------------------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +----1-------------------------------------------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------1-----------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------- 0~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-1----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------0---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---00-0--1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +----0-0-01--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +----------0-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~0~~~~~~~~~ +-----------0------------------------------------------------------------- ~~~~~~~00~0~0~0~0~0~0~0~00000~0~0~0000~0~0~0~0~0~00~0~0~0~0~0~0000000~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------0------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ +-------------1----------------------------------------------------------- ~~~~~~~~~0~0~0~0~0~0~0~0~~~~~0~0~0~~~~0~0~0~0~0~0~~0~0~0~0~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------0----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +--------------1---------------------------------------------------------- ~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------1-------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------1----------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------1---------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------1--------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------0------------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------0------------------------------------------------ ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------0----------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------0---------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----0-0--1-----------------1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +----0-0--1------------------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +----0-0--1-------------------0------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +----0-0--1--------------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +---10---11-----------------0010---1-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----0-0--1------------------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----0----0---------------------------0----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------01----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +------------------------------------------10----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1--10----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----0-----------------------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +----0----0-------------------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +----0-------------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ +----0---------------------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~0~~0~~ +----------------------------------------1----------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------1------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------1-----1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------1----1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +----------------------------------------------0----1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~0~~~~~~~~0~~~~~~0~~~~~~~~~0~~~ +---------------------------------------1-----------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------0----------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------0--------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1-------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------0--0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +-------------------------------------------------1-0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------00--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +----------------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------0---------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1--------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0--10-------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +-----------------------------------------------0---10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +---------------------------------------------------0-1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +-----------------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1--0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------1---0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0----------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------0-------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0--0-------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1---1------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +---------------------------------------1----------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0---1------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +------------------------------------------01------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +---------------------------------------------------0----0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +----------------------------------------------------1---0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +---------------------------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +-----------------------------------------------------1---1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------0---0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +----1-00-0------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +-----------------------------------------------0---10-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +1----0--------1--------------------------------0---10-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-----0--------10-------------------------------0---10-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-----0--------1----------------1---------------0---10-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-----0--------1----------------0---------------0---10-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +---------------------------------------------------1------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +----1-00-0-------------------------------------------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +----------------------------------------------0------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +----------------------------------------------------------00------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~ +----01------------------------------------------------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----0---------1--------------------------------1------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----0----------------------------------------------0--------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----0---------1-------------------------------------1-------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----0---------1-------------------------------------------0-0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----01-------------------------------------------------------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +----0---------1--------------------------------1-------------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +----0----------------------------------------------0---------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +----0---------1-------------------------------------1--------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +----0---------1-------------------------------------------0--0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +--0-----------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------0-----------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------0----------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------0--------------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------0-------------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------0-----------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------0--------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------0-1---------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +----0-----------------------------------------------------------0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +1----0--------0------------------------------------1-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-----0--------00-----------------------------------1-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-----0--------0----------------1-------------------1-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +-----0--------0----------------0-------------------1-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----0---------0---------------------------------------------0----0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +----0---------0----------------------------------------------0---0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +---------------------------------------10-00-----0-1----1---------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------0--------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +-----------------------------------------------------------------00------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +-----------------------------------------------1-------------------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +----------------------------------------------------1--------------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +----------------------------------------------------------0--------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-----------------------------------------------------------------0-0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +---------------------------------------------------0----------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +------------------------------------------------1-1-----------------0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +---------------------------------------------------------------0----0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +------------------------------------------------------------------0-0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +---------------------------------------------------1-----------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------------------------------------------------0---------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------------------------------------------------------0---------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +---------------------------------------------------------------0-----0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-------0-1------------------------------------------------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +----------------------------------------------0------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-------------------------------------------------1-1--------------1-----0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ .end diff --git a/Logic/68030_tk.tt4 b/Logic/68030_tk.tt4 index 38f32ff..89d9184 100644 --- a/Logic/68030_tk.tt4 +++ b/Logic/68030_tk.tt4 @@ -1,178 +1,156 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Thu May 15 22:17:27 2014 +#$ DATE Thu May 15 22:21:53 2014 #$ MODULE BUS68030 -#$ PINS 59 FC_0_ SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 CPU_SPACE BERR BG_030 - BGACK_000 CLK_030 CLK_000 CLK_OSZI SIZE_0_ CLK_EXP A_30_ A_29_ A_28_ AVEC A_27_ - AVEC_EXP A_26_ A_25_ VPA A_24_ A_23_ RST A_22_ A_21_ RW A_20_ AMIGA_BUS_ENABLE - A_19_ AMIGA_BUS_DATA_DIR A_18_ AMIGA_BUS_ENABLE_LOW A_17_ CIIN A_16_ A_0_ IPL_1_ - IPL_0_ DSACK_0_ IPL_030_2_ DSACK_1_ AS_000 UDS_000 LDS_000 BG_000 BGACK_030 - CLK_DIV_OUT FPU_CS DTACK E VMA RESET IPL_030_1_ IPL_030_0_ -#$ NODES 27 cpu_est_0_ cpu_est_1_ cpu_est_d_0_ cpu_est_d_3_ +#$ PINS 59 A_28_ A_27_ SIZE_1_ A_26_ A_25_ A_31_ A_24_ A_23_ A_22_ A_21_ IPL_2_ + A_20_ A_19_ A_18_ A_17_ FC_1_ A_16_ AS_030 DS_030 CPU_SPACE BERR BG_030 + BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT A_0_ AVEC IPL_1_ AVEC_EXP IPL_0_ + DSACK_0_ VPA FC_0_ RST RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR + AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ IPL_030_2_ DSACK_1_ AS_000 UDS_000 + LDS_000 BG_000 BGACK_030 CLK_EXP FPU_CS IPL_030_1_ DTACK IPL_030_0_ E VMA RESET +#$ NODES 24 cpu_est_0_ cpu_est_1_ cpu_est_d_0_ cpu_est_d_3_ inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_D inst_VPA_SYNC inst_CLK_000_D inst_CLK_000_DD inst_CLK_OUT_PRE cpu_est_d_1_ cpu_est_d_2_ cpu_est_2_ CLK_CNT_0_ SM_AMIGA_6_ SM_AMIGA_7_ inst_RISING_CLK_AMIGA SM_AMIGA_1_ SM_AMIGA_4_ - SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_ SM_AMIGA_D_0_ SM_AMIGA_D_1_ - SM_AMIGA_D_2_ + SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_ .type f -.i 76 -.o 127 +.i 73 +.o 121 .ilb SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 CPU_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ A_0_ IPL_1_ IPL_0_ FC_0_ - BGACK_030.Q FPU_CS.Q BG_000.Q E.Q VMA.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_d_0_.Q - cpu_est_d_3_.Q AS_000.Q inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_D.Q - inst_VPA_SYNC.Q inst_CLK_000_D.Q inst_CLK_000_DD.Q IPL_030_0_.Q - inst_CLK_OUT_PRE.Q IPL_030_1_.Q cpu_est_d_1_.Q cpu_est_d_2_.Q IPL_030_2_.Q - cpu_est_2_.Q CLK_CNT_0_.Q SM_AMIGA_6_.Q SM_AMIGA_7_.Q UDS_000.Q LDS_000.Q - inst_RISING_CLK_AMIGA.Q SM_AMIGA_1_.Q DSACK_1_.Q SM_AMIGA_4_.Q SM_AMIGA_3_.Q - SM_AMIGA_5_.Q SM_AMIGA_2_.Q SM_AMIGA_0_.Q SM_AMIGA_D_0_.Q SM_AMIGA_D_1_.Q - SM_AMIGA_D_2_.Q DSACK_1_.PIN DTACK.PIN -.ob BERR BERR.OE CLK_EXP.X1 CLK_EXP.X2 AVEC AVEC_EXP AVEC_EXP.OE - AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN CIIN.OE DSACK_0_ - DSACK_0_.OE IPL_030_2_.D IPL_030_2_.C IPL_030_2_.AP DSACK_1_.D% DSACK_1_.C + IPL_030_0_.Q BGACK_030.Q FPU_CS.Q IPL_030_1_.Q E.Q VMA.Q IPL_030_2_.Q + cpu_est_0_.Q cpu_est_1_.Q cpu_est_d_0_.Q cpu_est_d_3_.Q AS_000.Q + inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_D.Q inst_VPA_SYNC.Q + inst_CLK_000_D.Q inst_CLK_000_DD.Q inst_CLK_OUT_PRE.Q cpu_est_d_1_.Q + cpu_est_d_2_.Q cpu_est_2_.Q CLK_CNT_0_.Q SM_AMIGA_6_.Q SM_AMIGA_7_.Q UDS_000.Q + LDS_000.Q inst_RISING_CLK_AMIGA.Q SM_AMIGA_1_.Q DSACK_1_.Q SM_AMIGA_4_.Q + SM_AMIGA_3_.Q SM_AMIGA_5_.Q SM_AMIGA_2_.Q SM_AMIGA_0_.Q BG_000.Q DSACK_1_.PIN + DTACK.PIN +.ob BERR BERR.OE CLK_DIV_OUT.D CLK_DIV_OUT.C AVEC AVEC_EXP AVEC_EXP.OE DSACK_0_ + DSACK_0_.OE AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN + CIIN.OE IPL_030_2_.D IPL_030_2_.C IPL_030_2_.AP DSACK_1_.D% DSACK_1_.C DSACK_1_.AP DSACK_1_.OE AS_000.D% AS_000.C AS_000.AP AS_000.OE UDS_000.D% UDS_000.C UDS_000.AP UDS_000.OE LDS_000.D% LDS_000.C LDS_000.AP LDS_000.OE - BG_000.D% BG_000.C BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_DIV_OUT.D - CLK_DIV_OUT.C FPU_CS.D% FPU_CS.C FPU_CS.AP DTACK.D% DTACK.C DTACK.AP DTACK.OE - E.T E.C VMA.T VMA.C VMA.AP RESET.D RESET.C IPL_030_1_.D IPL_030_1_.C - IPL_030_1_.AP IPL_030_0_.D IPL_030_0_.C IPL_030_0_.AP cpu_est_0_.D cpu_est_0_.C - cpu_est_1_.T cpu_est_1_.C cpu_est_d_0_.D cpu_est_d_0_.C cpu_est_d_3_.D - cpu_est_d_3_.C inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C - inst_AS_030_000_SYNC.AP inst_DTACK_SYNC.D% inst_DTACK_SYNC.C inst_DTACK_SYNC.AP - inst_VPA_D.D inst_VPA_D.C inst_VPA_SYNC.D% inst_VPA_SYNC.C inst_VPA_SYNC.AP - inst_CLK_000_D.D inst_CLK_000_D.C inst_CLK_000_DD.D inst_CLK_000_DD.C - inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C cpu_est_d_1_.D cpu_est_d_1_.C - cpu_est_d_2_.D cpu_est_d_2_.C cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C - CLK_CNT_0_.D CLK_CNT_0_.C SM_AMIGA_6_.D% SM_AMIGA_6_.C SM_AMIGA_6_.AR - SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP inst_RISING_CLK_AMIGA.D - inst_RISING_CLK_AMIGA.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_4_.D - SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR - SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C - SM_AMIGA_2_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR SM_AMIGA_D_0_.D% - SM_AMIGA_D_0_.C SM_AMIGA_D_1_.D% SM_AMIGA_D_1_.C SM_AMIGA_D_2_.D% - SM_AMIGA_D_2_.C -.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 -.p 122 ----------------------------------------------------------------------------- 0000100001001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------0--------------------------------------- 0100001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------------------------1----- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------------------------------0------0--0-1---- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------------------------------1-----------0---- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------------------------------------1----0---- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------------------------------------1-0---- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------------------0-0-0---1--- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------------------1-------0--- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------------------------------------1-----0--- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------------------------------1---0--- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------------------0--0-0---1-- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------------------1--------0-- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------------------------------------1-----0-- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------------------------------------1---0-- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------------------------1111-- 0001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------0------------------------------------------------------------- 0000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------1111------------------------------------------------- 0000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0--------------0000000----------------------------------------------------- 0000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------0--------------------------------------------------------------------- 0000000000000100000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---1------------------------------------------------------------1------------ 0000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------------------1------0------------ 0000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1---------------------------------------------------------------- 0000000000000001001000100010001000100100101001000101001010010010101010100100101001010101010010101001001010010010010010010010101 --------------0-------------------------------------------------------------- 0000000000000000100100010001000100010010000100100000100001001000000000010010000100000000000000000100100001001001001001001000000 --------------------------------------------------0--1-----------1----------- 0000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 -----0------------------------------------------------------------0---------- 0000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------------------------------------0------------------------------- 0000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------------0---10--------1---------------- 0000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 ------------------------------------1---------------------------------------- 0000000000000000000000001000100010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------0--------1----------------0-------------0---10--------1---------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----01-------------------------------------------------------0-------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------1------------------------------1---------------0-------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0--------------------------------------------0-----------0-------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------1-----------------------------------1----------0-------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------1--------------------------------------------0-0-------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------0--------0----------------0-----------------1----------------1--------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------0----------------------------------------------0----0--------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -1----0--------1------------------------------0---10--------1---------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------0--------10-----------------------------0---10--------1---------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------0--------1----------------1-------------0---10--------1---------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----01--------------------------------------------------------0------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------1------------------------------1----------------0------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0--------------------------------------------0------------0------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------1-----------------------------------1-----------0------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------1--------------------------------------------0--0------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -1----0--------0----------------------------------1----------------1--------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------0--------00---------------------------------1----------------1--------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------0--------0----------------1-----------------1----------------1--------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------0-----------------------------------------------0---0--------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------0-1---------------------------0-------------------------------------- 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----1-00-0-------------------------------------------------1---------------- 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----1-00-0--------------------------------------------------1--------------- 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------1--------------------------1---------------------------------------- 0000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------1------------------------------------------------------1------------ 0000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------1----------------------- 0000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----10---11-----------------0010---1----------------------------------------- 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0----0--------------------------0--------------------------------------- 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------0-----------------------------0- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------0---------------------------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------1-11-------10------1------------------ 0000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------0-11-------10------0------------------ 0000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------0-00-------10------0------------------ 0000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------0--001----1----11-------------------- 0000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------0110-----0-0-------1------------------ 0000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000 --------------1-------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------1------------------------------1------------ 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------------------------1---------0------------ 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------1-----------------------------1------------ 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------------------1-----------0------------ 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------1--------0-------------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------1---------1------------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------0--------10------------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------1-00-------10------------------------- 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------0-1--------10------1------------------ 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------1-11-------10------0------------------ 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------0--0-------10------0------------------ 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------1----------------------------------- 0000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000 ---------------------------------------1------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000 -----1----------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 -------1--1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 ----1----11-----------------0010---1----------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 ----------0-----------------------------------1------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 -----0-----------------------------------------0----------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000 ------------------------------------------------1-1-----------------1-------0 0000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000 -------------1--------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000 -----0-------------------------------------------0--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000 ---------------------------------------1000-----0-1-------1---------1-------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000 -----------1----------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000 --------------------------------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000 -----------------------------------------------------0-----1----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000 -----------------------------------------------------1-----0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000 ------------------------------------------1---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 ----------------------------------------------------------1------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100100000000000000000000000000000000000 ---------------------------------------1-1--------10------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 -----------------------------------------00-------10------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 ---------------------------------------0-10-------10------1------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 -----------------------------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000 ----------------------------------------------0---10------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 --------------------------------------------------1----------1--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010010000000000000000000000000000 ------------------------------------------------------------00--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 ---------------------------------------------1----1--------------------1----- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 -----------1--------------------------------------0-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 --------------------------------------------------1--------------1----------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 -----------------------------------------------------0-----------1----------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 --------------------------------------------------1-------------------1------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 --------------------------------------------------0----------------1--------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 --------------------------------------------------0------------------1------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 --------------------------------------------------1----------------1--------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 -----------------------------------------------1-1------------------1-------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 --------------------------------------------------1-----------------1-------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 --------------------------------------------------1------------------1------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -----------------------------------------------0--0-----------------1-------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 -------------------------------------------------00-----------------1-------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 --------------------------------------------------0-------------------1------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 ---------------------------------------------0-------------------------1----- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 --------------------------------------------------0--------------------1----- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 --------------1---------------------------------------------0------0--00----- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 --------------0---------------------------------------------------------0---- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 --------------1--------------------------------------------------0-0-0-0----- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 --------------0----------------------------------------------------------0--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 --------------1--------------------------------------------------0--0-00----- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010 --------------0-----------------------------------------------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010 + BG_000.D% BG_000.C BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_EXP.D + CLK_EXP.C FPU_CS.D% FPU_CS.C FPU_CS.AP IPL_030_1_.D IPL_030_1_.C IPL_030_1_.AP + DTACK.D% DTACK.C DTACK.AP DTACK.OE IPL_030_0_.D IPL_030_0_.C IPL_030_0_.AP E.T + E.C VMA.T VMA.C VMA.AP RESET.D RESET.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.T + cpu_est_1_.C cpu_est_d_0_.D cpu_est_d_0_.C cpu_est_d_3_.D cpu_est_d_3_.C + inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP + inst_DTACK_SYNC.D% inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_VPA_D.D + inst_VPA_D.C inst_VPA_SYNC.D% inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_CLK_000_D.D + inst_CLK_000_D.C inst_CLK_000_DD.D inst_CLK_000_DD.C inst_CLK_OUT_PRE.D + inst_CLK_OUT_PRE.C cpu_est_d_1_.D cpu_est_d_1_.C cpu_est_d_2_.D cpu_est_d_2_.C + cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C CLK_CNT_0_.D CLK_CNT_0_.C + SM_AMIGA_6_.D% SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_7_.D SM_AMIGA_7_.C + SM_AMIGA_7_.AP inst_RISING_CLK_AMIGA.D inst_RISING_CLK_AMIGA.C SM_AMIGA_1_.D + SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR + SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C + SM_AMIGA_5_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_0_.D + SM_AMIGA_0_.C SM_AMIGA_0_.AR +.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 +.p 103 +------------------------------------------------------------------------- 0000100100010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------0----------------------------------- 0100001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------------------------1------------------- 0010000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------------------------------------------------------- 0001000000000001001000100010001000100100101001001000100101001010101010100100101001010101010010101001001010010010010010010 +------0------------------------------------------------------------------ 0000000010000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------0---------------------------------------------------------- 0000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------1111---------------------------------------------- 0000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0--------------0000000-------------------------------------------------- 0000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--1-----------------------------------------------------------1---------- 0000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------------1--------------------0---------- 0000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------0----------------------------------------------------------- 0000000000000000100100010001000100010010000100100100010000100000000000010010000100000000000000000100100001001001001001001 +---------------------------------------------------0-1---------1--------- 0000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 +----0-----------------------------------------------------------0-------- 0000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0-----------------------------------------0-------------------------- 0000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------------------0---10-----1-------------- 0000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 +------------------------------------1------------------------------------ 0000000000000000000000001000100010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----0--------1----------------0---------------0---10-----1-------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----01------------------------------------------------------0------------ 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0---------1--------------------------------1------------0------------ 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0----------------------------------------------0--------0------------ 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0---------1-------------------------------------1-------0------------ 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0---------1-------------------------------------------0-0------------ 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----0--------0----------------0-------------------1-------------1------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0---------0---------------------------------------------0----0------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +1----0--------1--------------------------------0---10-----1-------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----0--------10-------------------------------0---10-----1-------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----0--------1----------------1---------------0---10-----1-------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----01-------------------------------------------------------0----------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0---------1--------------------------------1-------------0----------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0----------------------------------------------0---------0----------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0---------1-------------------------------------1--------0----------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0---------1-------------------------------------------0--0----------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +1----0--------0------------------------------------1-------------1------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----0--------00-----------------------------------1-------------1------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----0--------0----------------1-------------------1-------------1------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0---------0----------------------------------------------0---0------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----1-00-0------------------------------------------------1-------------- 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----1-00-0-------------------------------------------------1------------- 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------0-1------------------------------------------------------------0-- 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------1---------------------------1------------------------------------ 0000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------1-----------------------------------------------------1---------- 0000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---10---11-----------------0010---1-------------------------------------- 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0----0---------------------------0----------------------------------- 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------------1-----------------------------1---------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------------------1-----------------------0---------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------------0------------------------0- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------0------------------------------------ 0000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------------1----------------------------1---------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------1--------------------------0---------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------------------1--11-------10---1---------------- 0000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 +---------------------------------------0--11-------10---0---------------- 0000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 +---------------------------------------0--00-------10---0---------------- 0000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------0---001----1--11----------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 +---------------------------------------01-10-----0-0----1---------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 +-------------1----------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000 +------------------------------------------1--------0--------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000 +------------------------------------------1---------1-------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000 +------------------------------------------0--------10-------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000 +---------------------------------------1--00-------10-------------------- 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 +---------------------------------------0--1--------10---1---------------- 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 +---------------------------------------1--11-------10---0---------------- 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 +---------------------------------------0---0-------10---0---------------- 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 +------------------------------------------1------------------------------ 0000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000 +---------------------------------------1--------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000 +----1-------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000 +------1--1--------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000 +---1----11-----------------0010---1-------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000 +---------0-------------------------------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000 +----0-------------------------------------------0------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000 +-------------------------------------------------1-1--------------1-----0 0000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000 +------------1------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000 +----0---------------------------------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000 +---------------------------------------10-00-----0-1----1---------1------ 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000 +----------1-------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 +---------------------------------------------------1--------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000 +-----------------------------------------------------0---1--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 +-----------------------------------------------------1---0--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 +-------------------------------------------1----------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 +--------------------------------------------------------1---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100100000000000000000000000000000 +---------------------------------------1--1--------10---0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 +------------------------------------------00-------10---0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 +---------------------------------------0--10-------10---1---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 +---------------------------------------------------------0--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 +-----------------------------------------------0---10-------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +---------------------------------------------------1------0-------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +----------------------------------------------------------00------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +---------------------------------------------------1-------1------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 +----------------------------------------------1----1-----------------1--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 +----------1----------------------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 +---------------------------------------------------1-----------1--------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 +---------------------------------------------------1----------------1---- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 +-----------------------------------------------------0---------1----0---- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 +---------------------------------------------------0-------------1------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +---------------------------------------------------0---------------1----- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +---------------------------------------------------1-------------1------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 +------------------------------------------------1-1---------------1------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 +---------------------------------------------------1--------------1------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 +---------------------------------------------------1---------------1----- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 +------------------------------------------------0--0--------------1------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +--------------------------------------------------00--------------1------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +---------------------------------------------------0----------------1---- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +----------------------------------------------0----------------------1--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 +---------------------------------------------------0-----------------1--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 .end diff --git a/Logic/68030_tk.tte b/Logic/68030_tk.tte index cd40279..a188f96 100644 --- a/Logic/68030_tk.tte +++ b/Logic/68030_tk.tte @@ -1,178 +1,156 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Thu May 15 22:17:27 2014 +#$ DATE Thu May 15 22:21:53 2014 #$ MODULE BUS68030 -#$ PINS 59 FC_0_ SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 CPU_SPACE BERR BG_030 - BGACK_000 CLK_030 CLK_000 CLK_OSZI SIZE_0_ CLK_EXP A_30_ A_29_ A_28_ AVEC A_27_ - AVEC_EXP A_26_ A_25_ VPA A_24_ A_23_ RST A_22_ A_21_ RW A_20_ AMIGA_BUS_ENABLE - A_19_ AMIGA_BUS_DATA_DIR A_18_ AMIGA_BUS_ENABLE_LOW A_17_ CIIN A_16_ A_0_ IPL_1_ - IPL_0_ DSACK_0_ IPL_030_2_ DSACK_1_ AS_000 UDS_000 LDS_000 BG_000 BGACK_030 - CLK_DIV_OUT FPU_CS DTACK E VMA RESET IPL_030_1_ IPL_030_0_ -#$ NODES 27 cpu_est_0_ cpu_est_1_ cpu_est_d_0_ cpu_est_d_3_ +#$ PINS 59 A_28_ A_27_ SIZE_1_ A_26_ A_25_ A_31_ A_24_ A_23_ A_22_ A_21_ IPL_2_ + A_20_ A_19_ A_18_ A_17_ FC_1_ A_16_ AS_030 DS_030 CPU_SPACE BERR BG_030 + BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT A_0_ AVEC IPL_1_ AVEC_EXP IPL_0_ + DSACK_0_ VPA FC_0_ RST RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR + AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ IPL_030_2_ DSACK_1_ AS_000 UDS_000 + LDS_000 BG_000 BGACK_030 CLK_EXP FPU_CS IPL_030_1_ DTACK IPL_030_0_ E VMA RESET +#$ NODES 24 cpu_est_0_ cpu_est_1_ cpu_est_d_0_ cpu_est_d_3_ inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_D inst_VPA_SYNC inst_CLK_000_D inst_CLK_000_DD inst_CLK_OUT_PRE cpu_est_d_1_ cpu_est_d_2_ cpu_est_2_ CLK_CNT_0_ SM_AMIGA_6_ SM_AMIGA_7_ inst_RISING_CLK_AMIGA SM_AMIGA_1_ SM_AMIGA_4_ - SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_ SM_AMIGA_D_0_ SM_AMIGA_D_1_ - SM_AMIGA_D_2_ + SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_ .type f -.i 76 -.o 127 +.i 73 +.o 121 .ilb SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 CPU_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ A_0_ IPL_1_ IPL_0_ FC_0_ - BGACK_030.Q FPU_CS.Q BG_000.Q E.Q VMA.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_d_0_.Q - cpu_est_d_3_.Q AS_000.Q inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_D.Q - inst_VPA_SYNC.Q inst_CLK_000_D.Q inst_CLK_000_DD.Q IPL_030_0_.Q - inst_CLK_OUT_PRE.Q IPL_030_1_.Q cpu_est_d_1_.Q cpu_est_d_2_.Q IPL_030_2_.Q - cpu_est_2_.Q CLK_CNT_0_.Q SM_AMIGA_6_.Q SM_AMIGA_7_.Q UDS_000.Q LDS_000.Q - inst_RISING_CLK_AMIGA.Q SM_AMIGA_1_.Q DSACK_1_.Q SM_AMIGA_4_.Q SM_AMIGA_3_.Q - SM_AMIGA_5_.Q SM_AMIGA_2_.Q SM_AMIGA_0_.Q SM_AMIGA_D_0_.Q SM_AMIGA_D_1_.Q - SM_AMIGA_D_2_.Q DSACK_1_.PIN DTACK.PIN -.ob BERR BERR.OE CLK_EXP.X1 CLK_EXP.X2 AVEC AVEC_EXP AVEC_EXP.OE - AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN CIIN.OE DSACK_0_ - DSACK_0_.OE IPL_030_2_.D IPL_030_2_.C IPL_030_2_.AP DSACK_1_.D- DSACK_1_.C + IPL_030_0_.Q BGACK_030.Q FPU_CS.Q IPL_030_1_.Q E.Q VMA.Q IPL_030_2_.Q + cpu_est_0_.Q cpu_est_1_.Q cpu_est_d_0_.Q cpu_est_d_3_.Q AS_000.Q + inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_D.Q inst_VPA_SYNC.Q + inst_CLK_000_D.Q inst_CLK_000_DD.Q inst_CLK_OUT_PRE.Q cpu_est_d_1_.Q + cpu_est_d_2_.Q cpu_est_2_.Q CLK_CNT_0_.Q SM_AMIGA_6_.Q SM_AMIGA_7_.Q UDS_000.Q + LDS_000.Q inst_RISING_CLK_AMIGA.Q SM_AMIGA_1_.Q DSACK_1_.Q SM_AMIGA_4_.Q + SM_AMIGA_3_.Q SM_AMIGA_5_.Q SM_AMIGA_2_.Q SM_AMIGA_0_.Q BG_000.Q DSACK_1_.PIN + DTACK.PIN +.ob BERR BERR.OE CLK_DIV_OUT.D CLK_DIV_OUT.C AVEC AVEC_EXP AVEC_EXP.OE DSACK_0_ + DSACK_0_.OE AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN + CIIN.OE IPL_030_2_.D IPL_030_2_.C IPL_030_2_.AP DSACK_1_.D- DSACK_1_.C DSACK_1_.AP DSACK_1_.OE AS_000.D- AS_000.C AS_000.AP AS_000.OE UDS_000.D- UDS_000.C UDS_000.AP UDS_000.OE LDS_000.D- LDS_000.C LDS_000.AP LDS_000.OE - BG_000.D- BG_000.C BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_DIV_OUT.D - CLK_DIV_OUT.C FPU_CS.D- FPU_CS.C FPU_CS.AP DTACK.D- DTACK.C DTACK.AP DTACK.OE - E.T E.C VMA.T VMA.C VMA.AP RESET.D RESET.C IPL_030_1_.D IPL_030_1_.C - IPL_030_1_.AP IPL_030_0_.D IPL_030_0_.C IPL_030_0_.AP cpu_est_0_.D cpu_est_0_.C - cpu_est_1_.T cpu_est_1_.C cpu_est_d_0_.D cpu_est_d_0_.C cpu_est_d_3_.D - cpu_est_d_3_.C inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C - inst_AS_030_000_SYNC.AP inst_DTACK_SYNC.D- inst_DTACK_SYNC.C inst_DTACK_SYNC.AP - inst_VPA_D.D inst_VPA_D.C inst_VPA_SYNC.D- inst_VPA_SYNC.C inst_VPA_SYNC.AP - inst_CLK_000_D.D inst_CLK_000_D.C inst_CLK_000_DD.D inst_CLK_000_DD.C - inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C cpu_est_d_1_.D cpu_est_d_1_.C - cpu_est_d_2_.D cpu_est_d_2_.C cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C - CLK_CNT_0_.D CLK_CNT_0_.C SM_AMIGA_6_.D- SM_AMIGA_6_.C SM_AMIGA_6_.AR - SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP inst_RISING_CLK_AMIGA.D - inst_RISING_CLK_AMIGA.C SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_4_.D - SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR - SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C - SM_AMIGA_2_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR SM_AMIGA_D_0_.D- - SM_AMIGA_D_0_.C SM_AMIGA_D_1_.D- SM_AMIGA_D_1_.C SM_AMIGA_D_2_.D- - SM_AMIGA_D_2_.C -.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 -.p 122 ----------------------------------------------------------------------------- 0000100001001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------0--------------------------------------- 0100001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------------------------1----- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------------------------------0------0--0-1---- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------------------------------1-----------0---- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------------------------------------1----0---- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------------------------------------1-0---- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------------------0-0-0---1--- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------------------1-------0--- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------------------------------------------------------------------1-----0--- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------------------------------1---0--- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------------------0--0-0---1-- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------------------1--------0-- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------------------------------------------------------------------1-----0-- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------------------------------------1---0-- 0010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------------------------1111-- 0001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------0------------------------------------------------------------- 0000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------1111------------------------------------------------- 0000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --0--------------0000000----------------------------------------------------- 0000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -------0--------------------------------------------------------------------- 0000000000000100000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---1------------------------------------------------------------1------------ 0000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------------------1------0------------ 0000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------1---------------------------------------------------------------- 0000000000000001001000100010001000100100101001000101001010010010101010100100101001010101010010101001001010010010010010010010101 --------------0-------------------------------------------------------------- 0000000000000000100100010001000100010010000100100000100001001000000000010010000100000000000000000100100001001001001001001000000 --------------------------------------------------0--1-----------1----------- 0000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 -----0------------------------------------------------------------0---------- 0000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------------------------------------0------------------------------- 0000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------------0---10--------1---------------- 0000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 ------------------------------------1---------------------------------------- 0000000000000000000000001000100010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------0--------1----------------0-------------0---10--------1---------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----01-------------------------------------------------------0-------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------1------------------------------1---------------0-------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0--------------------------------------------0-----------0-------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------1-----------------------------------1----------0-------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------1--------------------------------------------0-0-------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------0--------0----------------0-----------------1----------------1--------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------0----------------------------------------------0----0--------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -1----0--------1------------------------------0---10--------1---------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------0--------10-----------------------------0---10--------1---------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------0--------1----------------1-------------0---10--------1---------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----01--------------------------------------------------------0------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------1------------------------------1----------------0------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0--------------------------------------------0------------0------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------1-----------------------------------1-----------0------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------1--------------------------------------------0--0------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -1----0--------0----------------------------------1----------------1--------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------0--------00---------------------------------1----------------1--------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------0--------0----------------1-----------------1----------------1--------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0---------0-----------------------------------------------0---0--------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 --------0-1---------------------------0-------------------------------------- 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----1-00-0-------------------------------------------------1---------------- 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----1-00-0--------------------------------------------------1--------------- 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------1--------------------------1---------------------------------------- 0000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------1------------------------------------------------------1------------ 0000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------------------1----------------------- 0000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ----10---11-----------------0010---1----------------------------------------- 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 -----0----0--------------------------0--------------------------------------- 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------------0-----------------------------0- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------0---------------------------------------- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------1-11-------10------1------------------ 0000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------0-11-------10------0------------------ 0000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------0-00-------10------0------------------ 0000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------0--001----1----11-------------------- 0000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------0110-----0-0-------1------------------ 0000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000 --------------1-------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000 ---------------------------------1------------------------------1------------ 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000 ------------------------------------------------------1---------0------------ 0000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------1-----------------------------1------------ 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000 ----------------------------------------------------1-----------0------------ 0000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------1--------0-------------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------1---------1------------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------0--------10------------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------1-00-------10------------------------- 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------0-1--------10------1------------------ 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------1-11-------10------0------------------ 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000 ---------------------------------------0--0-------10------0------------------ 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000 -----------------------------------------1----------------------------------- 0000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000 ---------------------------------------1------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000 -----1----------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 -------1--1------------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 ----1----11-----------------0010---1----------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 ----------0-----------------------------------1------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 -----0-----------------------------------------0----------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000 ------------------------------------------------1-1-----------------1-------0 0000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000 -------------1--------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000 -----0-------------------------------------------0--------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000 ---------------------------------------1000-----0-1-------1---------1-------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000 -----------1----------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000 --------------------------------------------------1-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000 -----------------------------------------------------0-----1----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000 -----------------------------------------------------1-----0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000 ------------------------------------------1---------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 ----------------------------------------------------------1------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100100000000000000000000000000000000000 ---------------------------------------1-1--------10------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 -----------------------------------------00-------10------0------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 ---------------------------------------0-10-------10------1------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 -----------------------------------------------------------0----------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000 ----------------------------------------------0---10------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 --------------------------------------------------1----------1--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010010000000000000000000000000000 ------------------------------------------------------------00--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000 ---------------------------------------------1----1--------------------1----- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000 -----------1--------------------------------------0-------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 --------------------------------------------------1--------------1----------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 -----------------------------------------------------0-----------1----------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 --------------------------------------------------1-------------------1------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000 --------------------------------------------------0----------------1--------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 --------------------------------------------------0------------------1------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000 --------------------------------------------------1----------------1--------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 -----------------------------------------------1-1------------------1-------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 --------------------------------------------------1-----------------1-------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 --------------------------------------------------1------------------1------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 -----------------------------------------------0--0-----------------1-------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 -------------------------------------------------00-----------------1-------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 --------------------------------------------------0-------------------1------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 ---------------------------------------------0-------------------------1----- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 --------------------------------------------------0--------------------1----- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 --------------1---------------------------------------------0------0--00----- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 --------------0---------------------------------------------------------0---- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 --------------1--------------------------------------------------0-0-0-0----- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 --------------0----------------------------------------------------------0--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 --------------1--------------------------------------------------0--0-00----- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010 --------------0-----------------------------------------------------------0-- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010 + BG_000.D- BG_000.C BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_EXP.D + CLK_EXP.C FPU_CS.D- FPU_CS.C FPU_CS.AP IPL_030_1_.D IPL_030_1_.C IPL_030_1_.AP + DTACK.D- DTACK.C DTACK.AP DTACK.OE IPL_030_0_.D IPL_030_0_.C IPL_030_0_.AP E.T + E.C VMA.T VMA.C VMA.AP RESET.D RESET.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.T + cpu_est_1_.C cpu_est_d_0_.D cpu_est_d_0_.C cpu_est_d_3_.D cpu_est_d_3_.C + inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP + inst_DTACK_SYNC.D- inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_VPA_D.D + inst_VPA_D.C inst_VPA_SYNC.D- inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_CLK_000_D.D + inst_CLK_000_D.C inst_CLK_000_DD.D inst_CLK_000_DD.C inst_CLK_OUT_PRE.D + inst_CLK_OUT_PRE.C cpu_est_d_1_.D cpu_est_d_1_.C cpu_est_d_2_.D cpu_est_d_2_.C + cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C CLK_CNT_0_.D CLK_CNT_0_.C + SM_AMIGA_6_.D- SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_7_.D SM_AMIGA_7_.C + SM_AMIGA_7_.AP inst_RISING_CLK_AMIGA.D inst_RISING_CLK_AMIGA.C SM_AMIGA_1_.D + SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR + SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C + SM_AMIGA_5_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_0_.D + SM_AMIGA_0_.C SM_AMIGA_0_.AR +.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 +.p 103 +------------------------------------------------------------------------- 0000100100010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------------------------------0----------------------------------- 0100001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------------------------1------------------- 0010000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------1------------------------------------------------------------- 0001000000000001001000100010001000100100101001001000100101001010101010100100101001010101010010101001001010010010010010010 +------0------------------------------------------------------------------ 0000000010000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------0---------------------------------------------------------- 0000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------1111---------------------------------------------- 0000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-0--------------0000000-------------------------------------------------- 0000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--1-----------------------------------------------------------1---------- 0000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------------1--------------------0---------- 0000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------------0----------------------------------------------------------- 0000000000000000100100010001000100010010000100100100010000100000000000010010000100000000000000000100100001001001001001001 +---------------------------------------------------0-1---------1--------- 0000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 +----0-----------------------------------------------------------0-------- 0000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0-----------------------------------------0-------------------------- 0000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------------------0---10-----1-------------- 0000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 +------------------------------------1------------------------------------ 0000000000000000000000001000100010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----0--------1----------------0---------------0---10-----1-------------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----01------------------------------------------------------0------------ 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0---------1--------------------------------1------------0------------ 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0----------------------------------------------0--------0------------ 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0---------1-------------------------------------1-------0------------ 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0---------1-------------------------------------------0-0------------ 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----0--------0----------------0-------------------1-------------1------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0---------0---------------------------------------------0----0------- 0000000000000000000000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +1----0--------1--------------------------------0---10-----1-------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----0--------10-------------------------------0---10-----1-------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----0--------1----------------1---------------0---10-----1-------------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----01-------------------------------------------------------0----------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0---------1--------------------------------1-------------0----------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0----------------------------------------------0---------0----------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0---------1-------------------------------------1--------0----------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0---------1-------------------------------------------0--0----------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +1----0--------0------------------------------------1-------------1------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----0--------00-----------------------------------1-------------1------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-----0--------0----------------1-------------------1-------------1------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0---------0----------------------------------------------0---0------- 0000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----1-00-0------------------------------------------------1-------------- 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +----1-00-0-------------------------------------------------1------------- 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +-------0-1------------------------------------------------------------0-- 0000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------1---------------------------1------------------------------------ 0000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------1-----------------------------------------------------1---------- 0000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +---10---11-----------------0010---1-------------------------------------- 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 +----0----0---------------------------0----------------------------------- 0000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------------1-----------------------------1---------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000 +--------------------------------------1-----------------------0---------- 0000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------------0------------------------0- 0000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000 +------------------------------------0------------------------------------ 0000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------------1----------------------------1---------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000 +-----------------------------------1--------------------------0---------- 0000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000 +---------------------------------------1--11-------10---1---------------- 0000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 +---------------------------------------0--11-------10---0---------------- 0000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 +---------------------------------------0--00-------10---0---------------- 0000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000 +----------------------------------------0---001----1--11----------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 +---------------------------------------01-10-----0-0----1---------------- 0000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000 +-------------1----------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000 +------------------------------------------1--------0--------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000 +------------------------------------------1---------1-------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000 +------------------------------------------0--------10-------------------- 0000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000000000 +---------------------------------------1--00-------10-------------------- 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 +---------------------------------------0--1--------10---1---------------- 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 +---------------------------------------1--11-------10---0---------------- 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 +---------------------------------------0---0-------10---0---------------- 0000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000 +------------------------------------------1------------------------------ 0000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000 +---------------------------------------1--------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000000000000 +----1-------------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000 +------1--1--------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000 +---1----11-----------------0010---1-------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000 +---------0-------------------------------------1------------------------- 0000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000 +----0-------------------------------------------0------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000 +-------------------------------------------------1-1--------------1-----0 0000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000 +------------1------------------------------------------------------------ 0000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000 +----0---------------------------------------------0---------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000 +---------------------------------------10-00-----0-1----1---------1------ 0000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000 +----------1-------------------------------------------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000 +---------------------------------------------------1--------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000000000000 +-----------------------------------------------------0---1--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 +-----------------------------------------------------1---0--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000 +-------------------------------------------1----------------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000 +--------------------------------------------------------1---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100100000000000000000000000000000 +---------------------------------------1--1--------10---0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 +------------------------------------------00-------10---0---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 +---------------------------------------0--10-------10---1---------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000 +---------------------------------------------------------0--------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000 +-----------------------------------------------0---10-------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +---------------------------------------------------1------0-------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +----------------------------------------------------------00------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000 +---------------------------------------------------1-------1------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 +----------------------------------------------1----1-----------------1--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000 +----------1----------------------------------------0--------------------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000 +---------------------------------------------------1-----------1--------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 +---------------------------------------------------1----------------1---- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 +-----------------------------------------------------0---------1----0---- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000 +---------------------------------------------------0-------------1------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +---------------------------------------------------0---------------1----- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000 +---------------------------------------------------1-------------1------- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 +------------------------------------------------1-1---------------1------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 +---------------------------------------------------1--------------1------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000 +---------------------------------------------------1---------------1----- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000 +------------------------------------------------0--0--------------1------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +--------------------------------------------------00--------------1------ 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +---------------------------------------------------0----------------1---- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000 +----------------------------------------------0----------------------1--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 +---------------------------------------------------0-----------------1--- 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 .end diff --git a/Logic/68030_tk.vcl b/Logic/68030_tk.vcl index 5fee938..9784d60 100644 --- a/Logic/68030_tk.vcl +++ b/Logic/68030_tk.vcl @@ -18,7 +18,7 @@ SDS_file = m4a5.sds; Design = 68030_tk.tt4; Rev = 0.01; DATE = 5/15/14; -TIME = 22:17:31; +TIME = 22:21:57; Type = TT2; Pre_Fit_Time = 1; Source_Format = Pure_VHDL; @@ -133,7 +133,6 @@ Usercode_Format = Hex; Layer = OFF DSACK_1_ = BIDIR,81,7,-; DTACK = OUTPUT,30,3,-; -CLK_EXP = OUTPUT,10,1,-; LDS_000 = OUTPUT,31,3,-; UDS_000 = OUTPUT,32,3,-; E = OUTPUT,66,6,-; @@ -154,41 +153,39 @@ BERR = OUTPUT,41,4,-; AMIGA_BUS_ENABLE = OUTPUT,34,3,-; AVEC_EXP = OUTPUT,22,2,-; AMIGA_BUS_ENABLE_LOW = OUTPUT,20,2,-; +CLK_EXP = OUTPUT,10,1,-; RESET = OUTPUT,3,1,-; inst_CLK_000_D = NODE,*,7,-; -SM_AMIGA_3_ = NODE,*,6,-; cpu_est_1_ = NODE,*,6,-; RN_E = NODE,-1,6,-; -SM_AMIGA_1_ = NODE,*,6,-; +SM_AMIGA_3_ = NODE,*,1,-; cpu_est_2_ = NODE,*,6,-; cpu_est_0_ = NODE,*,6,-; RN_FPU_CS = NODE,-1,7,-; -SM_AMIGA_4_ = NODE,*,3,-; -inst_VPA_D = NODE,*,0,-; +inst_CLK_OUT_PRE = NODE,*,6,-; +inst_VPA_SYNC = NODE,*,0,-; +inst_VPA_D = NODE,*,6,-; inst_AS_030_000_SYNC = NODE,*,7,-; -SM_AMIGA_0_ = NODE,*,6,-; -SM_AMIGA_2_ = NODE,*,6,-; -SM_AMIGA_6_ = NODE,*,3,-; +SM_AMIGA_1_ = NODE,*,6,-; RN_VMA = NODE,-1,3,-; RN_BGACK_030 = NODE,-1,7,-; RN_AS_000 = NODE,-1,3,-; -SM_AMIGA_5_ = NODE,*,3,-; +SM_AMIGA_4_ = NODE,*,3,-; SM_AMIGA_7_ = NODE,*,6,-; -inst_CLK_OUT_PRE = NODE,*,6,-; -inst_VPA_SYNC = NODE,*,5,-; -inst_DTACK_SYNC = NODE,*,0,-; +inst_DTACK_SYNC = NODE,*,1,-; inst_RISING_CLK_AMIGA = NODE,*,7,-; inst_CLK_000_DD = NODE,*,7,-; RN_LDS_000 = NODE,-1,3,-; RN_UDS_000 = NODE,-1,3,-; RN_BG_000 = NODE,-1,3,-; +SM_AMIGA_0_ = NODE,*,6,-; +SM_AMIGA_2_ = NODE,*,6,-; +SM_AMIGA_6_ = NODE,*,3,-; RN_IPL_030_0_ = NODE,-1,1,-; RN_IPL_030_1_ = NODE,-1,1,-; RN_DSACK_1_ = NODE,-1,7,-; RN_IPL_030_2_ = NODE,-1,1,-; -SM_AMIGA_D_2_ = NODE,*,1,-; -SM_AMIGA_D_1_ = NODE,*,1,-; -SM_AMIGA_D_0_ = NODE,*,1,-; +SM_AMIGA_5_ = NODE,*,3,-; CLK_CNT_0_ = NODE,*,6,-; cpu_est_d_2_ = NODE,*,6,-; cpu_est_d_1_ = NODE,*,6,-; diff --git a/Logic/68030_tk.vco b/Logic/68030_tk.vco index 905b04e..944c26d 100644 --- a/Logic/68030_tk.vco +++ b/Logic/68030_tk.vco @@ -18,7 +18,7 @@ SDS_file = m4a5.sds; Design = 68030_tk.tt4; Rev = 0.01; DATE = 5/15/14; -TIME = 22:17:31; +TIME = 22:21:57; Type = TT2; Pre_Fit_Time = 1; Source_Format = Pure_VHDL; @@ -131,11 +131,23 @@ Usercode_Format = Hex; [LOCATION ASSIGNMENT] Layer = OFF; -FC_0_ = INPUT,57, F,-; +A_28_ = INPUT,15, C,-; +A_27_ = INPUT,16, C,-; SIZE_1_ = INPUT,79, H,-; +A_26_ = INPUT,17, C,-; +A_25_ = INPUT,18, C,-; A_31_ = INPUT,4, B,-; +A_24_ = INPUT,19, C,-; +A_23_ = INPUT,84, H,-; +A_22_ = INPUT,85, H,-; +A_21_ = INPUT,94, A,-; IPL_2_ = INPUT,68, G,-; +A_20_ = INPUT,93, A,-; +A_19_ = INPUT,97, A,-; +A_18_ = INPUT,95, A,-; +A_17_ = INPUT,59, F,-; FC_1_ = INPUT,58, F,-; +A_16_ = INPUT,96, A,-; AS_030 = INPUT,82, H,-; DS_030 = INPUT,98, A,-; CPU_SPACE = INPUT,14,-,-; @@ -145,36 +157,24 @@ BGACK_000 = INPUT,28, D,-; CLK_030 = INPUT,64,-,-; CLK_000 = INPUT,11,-,-; CLK_OSZI = INPUT,61,-,-; -SIZE_0_ = INPUT,70, G,-; -CLK_EXP = OUTPUT,10, B,-; -A_30_ = INPUT,5, B,-; -A_29_ = INPUT,6, B,-; -A_28_ = INPUT,15, C,-; -AVEC = OUTPUT,92, A,-; -A_27_ = INPUT,16, C,-; -AVEC_EXP = OUTPUT,22, C,-; -A_26_ = INPUT,17, C,-; -A_25_ = INPUT,18, C,-; -VPA = INPUT,36,-,-; -A_24_ = INPUT,19, C,-; -A_23_ = INPUT,84, H,-; -RST = INPUT,86,-,-; -A_22_ = INPUT,85, H,-; -A_21_ = INPUT,94, A,-; -RW = INPUT,71, G,-; -A_20_ = INPUT,93, A,-; -AMIGA_BUS_ENABLE = OUTPUT,34, D,-; -A_19_ = INPUT,97, A,-; -AMIGA_BUS_DATA_DIR = OUTPUT,48, E,-; -A_18_ = INPUT,95, A,-; -AMIGA_BUS_ENABLE_LOW = OUTPUT,20, C,-; -A_17_ = INPUT,59, F,-; -CIIN = OUTPUT,47, E,-; -A_16_ = INPUT,96, A,-; +CLK_DIV_OUT = OUTPUT,65, G,-; A_0_ = INPUT,69, G,-; +AVEC = OUTPUT,92, A,-; IPL_1_ = INPUT,56, F,-; +AVEC_EXP = OUTPUT,22, C,-; IPL_0_ = INPUT,67, G,-; DSACK_0_ = OUTPUT,80, H,-; +VPA = INPUT,36,-,-; +FC_0_ = INPUT,57, F,-; +RST = INPUT,86,-,-; +RW = INPUT,71, G,-; +AMIGA_BUS_ENABLE = OUTPUT,34, D,-; +AMIGA_BUS_DATA_DIR = OUTPUT,48, E,-; +AMIGA_BUS_ENABLE_LOW = OUTPUT,20, C,-; +CIIN = OUTPUT,47, E,-; +SIZE_0_ = INPUT,70, G,-; +A_30_ = INPUT,5, B,-; +A_29_ = INPUT,6, B,-; IPL_030_2_ = OUTPUT,9, B,-; DSACK_1_ = BIDIR,81, H,-; AS_000 = OUTPUT,33, D,-; @@ -182,38 +182,35 @@ UDS_000 = OUTPUT,32, D,-; LDS_000 = OUTPUT,31, D,-; BG_000 = OUTPUT,29, D,-; BGACK_030 = OUTPUT,83, H,-; -CLK_DIV_OUT = OUTPUT,65, G,-; +CLK_EXP = OUTPUT,10, B,-; FPU_CS = OUTPUT,78, H,-; +IPL_030_1_ = OUTPUT,7, B,-; DTACK = BIDIR,30, D,-; +IPL_030_0_ = OUTPUT,8, B,-; E = OUTPUT,66, G,-; VMA = OUTPUT,35, D,-; RESET = OUTPUT,3, B,-; -IPL_030_1_ = OUTPUT,7, B,-; -IPL_030_0_ = OUTPUT,8, B,-; -cpu_est_0_ = NODE,5, G,-; -cpu_est_1_ = NODE,2, G,-; +cpu_est_0_ = NODE,8, G,-; +cpu_est_1_ = NODE,6, G,-; cpu_est_d_0_ = NODE,15, G,-; cpu_est_d_3_ = NODE,11, G,-; -inst_AS_030_000_SYNC = NODE,5, H,-; -inst_DTACK_SYNC = NODE,8, A,-; -inst_VPA_D = NODE,0, A,-; -inst_VPA_SYNC = NODE,0, F,-; -inst_CLK_000_D = NODE,1, H,-; +inst_AS_030_000_SYNC = NODE,8, H,-; +inst_DTACK_SYNC = NODE,9, B,-; +inst_VPA_D = NODE,1, G,-; +inst_VPA_SYNC = NODE,0, A,-; +inst_CLK_000_D = NODE,2, H,-; inst_CLK_000_DD = NODE,13, H,-; -inst_CLK_OUT_PRE = NODE,10, G,-; +inst_CLK_OUT_PRE = NODE,12, G,-; cpu_est_d_1_ = NODE,7, G,-; cpu_est_d_2_ = NODE,3, G,-; -cpu_est_2_ = NODE,1, G,-; +cpu_est_2_ = NODE,4, G,-; CLK_CNT_0_ = NODE,14, G,-; -SM_AMIGA_6_ = NODE,2, D,-; -SM_AMIGA_7_ = NODE,6, G,-; +SM_AMIGA_6_ = NODE,6, D,-; +SM_AMIGA_7_ = NODE,9, G,-; inst_RISING_CLK_AMIGA = NODE,9, H,-; -SM_AMIGA_1_ = NODE,12, G,-; +SM_AMIGA_1_ = NODE,5, G,-; SM_AMIGA_4_ = NODE,13, D,-; -SM_AMIGA_3_ = NODE,8, G,-; -SM_AMIGA_5_ = NODE,6, D,-; -SM_AMIGA_2_ = NODE,13, G,-; -SM_AMIGA_0_ = NODE,9, G,-; -SM_AMIGA_D_0_ = NODE,6, B,-; -SM_AMIGA_D_1_ = NODE,13, B,-; -SM_AMIGA_D_2_ = NODE,9, B,-; +SM_AMIGA_3_ = NODE,5, B,-; +SM_AMIGA_5_ = NODE,10, D,-; +SM_AMIGA_2_ = NODE,10, G,-; +SM_AMIGA_0_ = NODE,13, G,-; diff --git a/Logic/68030_tk.xrf b/Logic/68030_tk.xrf index d28f785..7979ab7 100644 --- a/Logic/68030_tk.xrf +++ b/Logic/68030_tk.xrf @@ -2,7 +2,7 @@ Signal Name Cross Reference File ispLEVER Classic 1.7.00.05.28.13 -Design '68030_tk' created Thu May 15 22:17:27 2014 +Design '68030_tk' created Thu May 15 22:21:53 2014 LEGEND: '>' Functional Block Port Separator diff --git a/Logic/BUS68030.bl0 b/Logic/BUS68030.bl0 index 51ee47f..477021d 100644 --- a/Logic/BUS68030.bl0 +++ b/Logic/BUS68030.bl0 @@ -1,137 +1,129 @@ -#$ DATE Thu May 15 22:17:27 2014 +#$ DATE Thu May 15 22:21:53 2014 #$ TOOL EDIF2BLIF version IspLever 1.0 #$ MODULE bus68030 -#$ PINS 74 FC_0_ SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 CPU_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT SIZE_0_ CLK_EXP A_30_ FPU_CS A_29_ DTACK A_28_ AVEC A_27_ AVEC_EXP A_26_ E A_25_ VPA A_24_ VMA A_23_ RST A_22_ RESET A_21_ RW A_20_ AMIGA_BUS_ENABLE A_19_ AMIGA_BUS_DATA_DIR A_18_ AMIGA_BUS_ENABLE_LOW A_17_ CIIN A_16_ A_15_ A_14_ A_13_ A_12_ A_11_ A_10_ A_9_ A_8_ A_7_ A_6_ A_5_ A_4_ A_3_ A_2_ A_1_ A_0_ IPL_030_1_ IPL_030_0_ IPL_1_ IPL_0_ DSACK_0_ -#$ NODES 378 a_c_30__n a_c_31__n CPU_SPACE_c inst_BGACK_030_INTreg BG_030_c inst_CLK_OUT_INTreg inst_FPU_CS_INTreg BG_000DFFSHreg cpu_est_3_reg inst_VMA_INTreg \ -# gnd_n_n BGACK_000_c cpu_est_0_ cpu_est_1_ CLK_030_c cpu_est_d_0_ cpu_est_d_3_ CLK_000_c inst_AS_000_INTreg inst_AS_030_000_SYNC \ -# CLK_OSZI_c inst_DTACK_SYNC inst_VPA_D inst_VPA_SYNC inst_CLK_000_D inst_CLK_000_DD IPL_030DFFSH_0_reg inst_CLK_OUT_PRE vcc_n_n IPL_030DFFSH_1_reg \ -# cpu_est_d_1_ cpu_est_d_2_ IPL_030DFFSH_2_reg cpu_est_2_ CLK_CNT_0_ ipl_c_0__n SM_AMIGA_6_ SM_AMIGA_7_ ipl_c_1__n inst_UDS_000_INTreg \ -# inst_LDS_000_INTreg ipl_c_2__n inst_RISING_CLK_AMIGA state_machine_un57_clk_000_d_n dsack_c_1__n SM_AMIGA_1_ DSACK_INT_1_ DTACK_c inst_DTACK_DMA SM_AMIGA_4_ \ -# SM_AMIGA_3_ state_machine_un13_as_000_int_n SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_ SM_AMIGA_D_0_ RST_c SM_AMIGA_D_1_ SM_AMIGA_D_2_ RESETDFFreg \ -# clk_exp RW_c fc_c_0__n fc_c_1__n state_machine_un57_clk_000_d_0_n N_161_i a_c_i_0__n state_machine_uds_000_int_8_0_n state_machine_lds_000_int_8_0_n N_113_i \ -# cpu_est_0_0_ sm_amiga_ns_0_2__n N_118_i N_117_i sm_amiga_ns_0_5__n N_123_i CLK_OUT_PRE_0 N_119_i N_120_i sm_amiga_ns_0_7__n \ -# CLK_OUT_PRE_i N_106 N_102_0 N_107 size_c_i_1__n clk_un3_clk_000_dd_n state_machine_un31_clk_000_d_i_n clk_cpu_est_11_1__n RISING_CLK_AMIGA_i clk_cpu_est_11_3__n \ -# state_machine_un4_bgack_000_0_n G_98 BG_030_c_i G_99 state_machine_un1_clk_030_0_n G_100 state_machine_un17_clk_030_0_n N_161 un1_as_030_2_0 N_114 \ -# state_machine_as_030_000_sync_3_2_n N_109 N_109_i N_111 un1_bg_030_0 N_112 N_111_i N_122 N_122_i N_115 \ -# N_101 N_147_i N_116 clk_cpu_est_11_0_3__n N_124 N_145_i N_139 N_146_i N_137 N_142_i \ -# N_140 clk_cpu_est_11_0_1__n N_141 N_140_i N_136 N_139_i N_142 N_141_i N_145 N_138_i \ -# N_138 N_137_i N_146 N_136_i N_143 N_143_i N_144 N_144_i UDS_000_INT_0_sqmuxa N_134_i \ -# UDS_000_INT_0_sqmuxa_1 N_101_0 N_147 N_115_i N_147_1 N_116_i state_machine_un13_clk_000_d_1_n N_186 N_124_i N_189 \ -# state_machine_un42_clk_030_n N_112_i un1_bg_030 sm_amiga_ns_0_0__n state_machine_as_030_000_sync_3_n N_86_i_1 un1_as_030_2 un1_bg_030_0_1 state_machine_un17_clk_030_n un1_bg_030_0_2 \ -# state_machine_un1_clk_030_n state_machine_as_030_000_sync_3_2_1_n state_machine_un4_bgack_000_n state_machine_un31_clk_000_d_i_1_n N_108 N_186_1 state_machine_un31_clk_000_d_n N_186_2 state_machine_un13_clk_000_d_n N_186_3 \ -# state_machine_un13_clk_000_d_4_n N_186_4 state_machine_un8_clk_000_d_n N_186_5 DTACK_SYNC_1_sqmuxa N_186_6 VPA_SYNC_1_sqmuxa_1_0 N_189_1 VPA_SYNC_1_sqmuxa N_189_2 \ -# N_123 clk_cpu_est_11_0_1_1__n N_118 clk_cpu_est_11_0_2_1__n N_110 clk_cpu_est_11_0_1_3__n N_102 N_143_1 N_120 N_144_1 \ -# N_119 N_106_1 N_117 N_106_2 N_113 N_107_1 state_machine_lds_000_int_8_n UDS_000_INT_0_sqmuxa_1_1 state_machine_uds_000_int_8_n UDS_000_INT_0_sqmuxa_1_2 \ -# DTACK_SYNC_1_sqmuxa_1 UDS_000_INT_0_sqmuxa_1_3 un2_clk_030_1 UDS_000_INT_0_sqmuxa_1_0 VPA_SYNC_1_sqmuxa_1 UDS_000_INT_0_sqmuxa_2 AS_000_INT_1_sqmuxa state_machine_un42_clk_030_1_n VMA_INT_1_sqmuxa state_machine_un42_clk_030_2_n \ -# DSACK_INT_1_sqmuxa state_machine_un42_clk_030_3_n RW_i state_machine_un42_clk_030_4_n clk_exp_i state_machine_un42_clk_030_5_n DTACK_SYNC_1_sqmuxa_i state_machine_un13_clk_000_d_1_0_n N_114_i state_machine_un13_clk_000_d_4_1_n \ -# VPA_SYNC_1_sqmuxa_i state_machine_un8_clk_000_d_1_n N_110_i state_machine_un8_clk_000_d_2_n N_108_i state_machine_un8_clk_000_d_3_n cpu_est_d_i_3__n state_machine_un8_clk_000_d_4_n cpu_est_d_i_0__n DTACK_SYNC_1_sqmuxa_1_0 \ -# CLK_000_D_i VPA_SYNC_1_sqmuxa_1_1 AS_030_i VPA_SYNC_1_sqmuxa_2 AS_000_INT_i VPA_SYNC_1_sqmuxa_3 dsack_i_1__n VPA_SYNC_1_sqmuxa_4 state_machine_un13_clk_000_d_i_n N_108_1 \ -# state_machine_un8_clk_000_d_i_n N_118_1 state_machine_un13_clk_000_d_1_i_n N_110_1 sm_amiga_i_1__n clk_exp_1 sm_amiga_i_2__n sm_amiga_d_0_2__un3_n sm_amiga_i_0__n sm_amiga_d_0_2__un1_n \ -# sm_amiga_i_3__n sm_amiga_d_0_2__un0_n VPA_D_i dsack_int_0_1__un3_n VMA_INT_i dsack_int_0_1__un1_n DTACK_i dsack_int_0_1__un0_n cpu_est_i_3__n vma_int_0_un3_n \ -# a_i_18__n vma_int_0_un1_n a_i_16__n vma_int_0_un0_n a_i_19__n vpa_sync_0_un3_n CLK_030_i vpa_sync_0_un1_n state_machine_un42_clk_030_i_n vpa_sync_0_un0_n \ -# DS_030_i as_000_int_0_un3_n cpu_est_i_1__n as_000_int_0_un1_n AS_030_000_SYNC_i as_000_int_0_un0_n cpu_est_i_0__n dtack_sync_0_un3_n sm_amiga_i_4__n dtack_sync_0_un1_n \ -# sm_amiga_i_6__n dtack_sync_0_un0_n cpu_est_i_2__n lds_000_int_0_un3_n UDS_000_INT_0_sqmuxa_1_i lds_000_int_0_un1_n UDS_000_INT_0_sqmuxa_i lds_000_int_0_un0_n sm_amiga_i_5__n uds_000_int_0_un3_n \ -# CLK_000_DD_i uds_000_int_0_un1_n sm_amiga_i_7__n uds_000_int_0_un0_n a_i_30__n bg_000_0_un3_n a_i_31__n bg_000_0_un1_n a_i_28__n bg_000_0_un0_n \ -# a_i_29__n as_030_000_sync_0_un3_n a_i_26__n as_030_000_sync_0_un1_n a_i_27__n as_030_000_sync_0_un0_n a_i_24__n fpu_cs_int_0_un3_n a_i_25__n fpu_cs_int_0_un1_n \ -# fpu_cs_int_0_un0_n ipl_030_0_2__un3_n RST_i ipl_030_0_2__un1_n N_107_i ipl_030_0_2__un0_n N_106_i ipl_030_0_1__un3_n FPU_CS_INT_i ipl_030_0_1__un1_n \ -# CPU_SPACE_i ipl_030_0_1__un0_n BGACK_030_INT_i ipl_030_0_0__un3_n AS_030_c ipl_030_0_0__un1_n ipl_030_0_0__un0_n bgack_030_int_0_un3_n DS_030_c bgack_030_int_0_un1_n \ -# bgack_030_int_0_un0_n sm_amiga_d_0_0__un3_n sm_amiga_d_0_0__un1_n size_c_0__n sm_amiga_d_0_0__un0_n sm_amiga_d_0_1__un3_n size_c_1__n sm_amiga_d_0_1__un1_n sm_amiga_d_0_1__un0_n a_c_0__n \ -# cpu_est_0_1__un3_n cpu_est_0_1__un1_n cpu_est_0_1__un0_n cpu_est_0_2__un3_n cpu_est_0_2__un1_n cpu_est_0_2__un0_n cpu_est_0_3__un3_n cpu_est_0_3__un1_n cpu_est_0_3__un0_n a_15__n \ -# a_14__n a_13__n a_12__n a_c_16__n a_11__n a_c_17__n a_10__n a_c_18__n a_9__n a_c_19__n \ -# a_8__n a_c_20__n a_7__n a_c_21__n a_6__n a_c_22__n a_5__n a_c_23__n a_4__n a_c_24__n \ -# a_3__n a_c_25__n a_2__n a_c_26__n a_1__n a_c_27__n a_c_28__n a_c_29__n +#$ PINS 74 A_28_ A_27_ SIZE_1_ A_26_ A_25_ A_31_ A_24_ A_23_ IPL_030_2_ A_22_ A_21_ IPL_2_ A_20_ A_19_ DSACK_1_ A_18_ A_17_ FC_1_ A_16_ AS_030 A_15_ AS_000 A_14_ DS_030 A_13_ UDS_000 A_12_ LDS_000 A_11_ CPU_SPACE A_10_ BERR A_9_ BG_030 A_8_ BG_000 A_7_ BGACK_030 A_6_ BGACK_000 A_5_ CLK_030 A_4_ CLK_000 A_3_ CLK_OSZI A_2_ CLK_DIV_OUT A_1_ CLK_EXP A_0_ FPU_CS IPL_030_1_ DTACK IPL_030_0_ AVEC IPL_1_ AVEC_EXP IPL_0_ E DSACK_0_ VPA FC_0_ VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ +#$ NODES 351 CLK_OSZI_c CLK_OUT_INTreg IPL_030DFFSH_0_reg inst_BGACK_030_INTreg inst_FPU_CS_INTreg IPL_030DFFSH_1_reg cpu_est_3_reg inst_VMA_INTreg IPL_030DFFSH_2_reg gnd_n_n \ +# cpu_est_0_ ipl_c_0__n cpu_est_1_ cpu_est_d_0_ ipl_c_1__n cpu_est_d_3_ inst_AS_000_INTreg ipl_c_2__n inst_AS_030_000_SYNC inst_DTACK_SYNC \ +# inst_VPA_D dsack_c_1__n inst_VPA_SYNC inst_CLK_000_D DTACK_c inst_CLK_000_DD inst_CLK_OUT_PRE vcc_n_n cpu_est_d_1_ cpu_est_d_2_ \ +# cpu_est_2_ CLK_CNT_0_ SM_AMIGA_6_ RST_c SM_AMIGA_7_ inst_UDS_000_INTreg RESETDFFreg inst_LDS_000_INTreg RW_c inst_RISING_CLK_AMIGA \ +# state_machine_un57_clk_000_d_n fc_c_0__n SM_AMIGA_1_ DSACK_INT_1_ fc_c_1__n inst_DTACK_DMA SM_AMIGA_4_ SM_AMIGA_3_ state_machine_un13_as_000_int_n SM_AMIGA_5_ \ +# SM_AMIGA_2_ N_145_i SM_AMIGA_0_ a_c_i_0__n state_machine_uds_000_int_8_0_n state_machine_lds_000_int_8_0_n N_99_i N_112_i N_100_i N_101_i \ +# sm_amiga_ns_0_2__n N_103_i N_110_i sm_amiga_ns_0_7__n cpu_est_0_0_ N_91_0 N_92_0 N_131_i N_132_i N_122_i \ +# CLK_OUT_PRE_0 N_124_i N_125_i N_126_i N_129_i N_98 N_127_i N_97 N_128_i N_104 \ +# N_130_i N_93 clk_cpu_est_11_0_1__n N_105 N_134_i N_106 N_133_i N_108 N_135_i N_94 \ +# clk_cpu_est_11_0_3__n N_109 size_c_i_1__n N_107 state_machine_un31_clk_000_d_i_n N_135_1 state_machine_as_030_000_sync_3_0_n VPA_SYNC_1_sqmuxa_1_0 un1_as_030_2_0 N_167 \ +# state_machine_un17_clk_030_0_n N_170 state_machine_un57_clk_000_d_0_n state_machine_un42_clk_030_n RISING_CLK_AMIGA_i DTACK_SYNC_1_sqmuxa state_machine_un4_bgack_000_0_n VPA_SYNC_1_sqmuxa BG_030_c_i un1_bg_030 \ +# state_machine_un1_clk_030_0_n DTACK_SYNC_1_sqmuxa_1 N_97_i DSACK_INT_1_sqmuxa un1_bg_030_0 state_machine_un1_clk_030_n CLK_OUT_PRE_i state_machine_un4_bgack_000_n N_94_0 un1_as_030_2 \ +# N_93_0 state_machine_un17_clk_030_n N_108_i N_102 N_109_i AS_000_INT_1_sqmuxa VPA_SYNC_1_sqmuxa_1 N_106_i state_machine_as_030_000_sync_3_n N_107_i \ +# clk_un3_clk_000_dd_n sm_amiga_ns_0_5__n state_machine_un31_clk_000_d_n N_104_i UDS_000_INT_0_sqmuxa N_105_i state_machine_un13_clk_000_d_n state_machine_un13_clk_000_d_4_n un1_bg_030_0_1 state_machine_un13_clk_000_d_1_n \ +# un1_bg_030_0_2 state_machine_un8_clk_000_d_n state_machine_un31_clk_000_d_i_1_n UDS_000_INT_0_sqmuxa_1 clk_cpu_est_11_0_1_3__n N_132 clk_cpu_est_11_0_1_1__n N_131 clk_cpu_est_11_0_2_1__n N_124 \ +# N_167_1 clk_cpu_est_11_3__n N_167_2 N_135 N_167_3 N_133 N_167_4 N_134 N_167_5 clk_cpu_est_11_1__n \ +# N_167_6 N_130 N_170_1 N_128 N_170_2 N_145 N_107_1 N_127 state_machine_un42_clk_030_1_n N_129 \ +# state_machine_un42_clk_030_2_n N_126 state_machine_un42_clk_030_3_n N_125 state_machine_un42_clk_030_4_n N_92 state_machine_un42_clk_030_5_n N_91 DTACK_SYNC_1_sqmuxa_1_0 N_110 \ +# VPA_SYNC_1_sqmuxa_1_1 N_103 VPA_SYNC_1_sqmuxa_2 N_101 VPA_SYNC_1_sqmuxa_3 N_100 VPA_SYNC_1_sqmuxa_4 N_112 N_98_1 N_99 \ +# state_machine_as_030_000_sync_3_0_1_n state_machine_lds_000_int_8_n UDS_000_INT_0_sqmuxa_1_0 state_machine_uds_000_int_8_n UDS_000_INT_0_sqmuxa_2 un2_clk_030_1 state_machine_un13_clk_000_d_1_0_n VMA_INT_1_sqmuxa state_machine_un13_clk_000_d_4_1_n RW_i \ +# state_machine_un8_clk_000_d_1_n cpu_est_d_i_3__n state_machine_un8_clk_000_d_2_n cpu_est_d_i_0__n state_machine_un8_clk_000_d_3_n CLK_000_D_i state_machine_un8_clk_000_d_4_n AS_000_INT_i UDS_000_INT_0_sqmuxa_1_1 dsack_i_1__n \ +# UDS_000_INT_0_sqmuxa_1_2 state_machine_un13_clk_000_d_i_n UDS_000_INT_0_sqmuxa_1_3 state_machine_un8_clk_000_d_i_n N_132_1 AS_030_i N_131_1 sm_amiga_i_6__n vma_int_0_un3_n sm_amiga_i_7__n \ +# vma_int_0_un1_n sm_amiga_i_5__n vma_int_0_un0_n sm_amiga_i_4__n lds_000_int_0_un3_n state_machine_un13_clk_000_d_1_i_n lds_000_int_0_un1_n CLK_000_DD_i lds_000_int_0_un0_n AS_030_000_SYNC_i \ +# uds_000_int_0_un3_n cpu_est_i_0__n uds_000_int_0_un1_n cpu_est_i_2__n uds_000_int_0_un0_n cpu_est_i_3__n cpu_est_0_3__un3_n cpu_est_i_1__n cpu_est_0_3__un1_n UDS_000_INT_0_sqmuxa_1_i \ +# cpu_est_0_3__un0_n UDS_000_INT_0_sqmuxa_i cpu_est_0_2__un3_n DS_030_i cpu_est_0_2__un1_n VPA_D_i cpu_est_0_2__un0_n state_machine_un42_clk_030_i_n cpu_est_0_1__un3_n VPA_SYNC_1_sqmuxa_i \ +# cpu_est_0_1__un1_n N_102_i cpu_est_0_1__un0_n DTACK_SYNC_1_sqmuxa_i fpu_cs_int_0_un3_n N_98_i fpu_cs_int_0_un1_n a_i_18__n fpu_cs_int_0_un0_n a_i_16__n \ +# as_000_int_0_un3_n a_i_19__n as_000_int_0_un1_n CLK_030_i as_000_int_0_un0_n VMA_INT_i vpa_sync_0_un3_n DTACK_i vpa_sync_0_un1_n sm_amiga_i_3__n \ +# vpa_sync_0_un0_n sm_amiga_i_1__n as_030_000_sync_0_un3_n sm_amiga_i_2__n as_030_000_sync_0_un1_n a_i_30__n as_030_000_sync_0_un0_n a_i_31__n ipl_030_0_2__un3_n a_i_28__n \ +# ipl_030_0_2__un1_n a_i_29__n ipl_030_0_2__un0_n a_i_26__n ipl_030_0_1__un3_n a_i_27__n ipl_030_0_1__un1_n a_i_24__n ipl_030_0_1__un0_n a_i_25__n \ +# ipl_030_0_0__un3_n ipl_030_0_0__un1_n ipl_030_0_0__un0_n RST_i bgack_030_int_0_un3_n FPU_CS_INT_i bgack_030_int_0_un1_n CPU_SPACE_i bgack_030_int_0_un0_n BGACK_030_INT_i \ +# dsack_int_0_1__un3_n AS_030_c dsack_int_0_1__un1_n dsack_int_0_1__un0_n bg_000_0_un3_n DS_030_c bg_000_0_un1_n bg_000_0_un0_n dtack_sync_0_un3_n dtack_sync_0_un1_n \ +# size_c_0__n dtack_sync_0_un0_n a_15__n size_c_1__n a_14__n a_c_0__n a_13__n a_12__n a_11__n a_10__n \ +# a_9__n a_8__n a_7__n a_6__n a_c_16__n a_5__n a_c_17__n a_4__n a_c_18__n a_3__n \ +# a_c_19__n a_2__n a_c_20__n a_1__n a_c_21__n a_c_22__n a_c_23__n a_c_24__n a_c_25__n a_c_26__n \ +# a_c_27__n a_c_28__n a_c_29__n a_c_30__n a_c_31__n CPU_SPACE_c BG_030_c BG_000DFFSHreg BGACK_000_c CLK_030_c \ +# CLK_000_c .model bus68030 .inputs SIZE_1_.BLIF A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF AS_030.BLIF DS_030.BLIF CPU_SPACE.BLIF BG_030.BLIF BGACK_000.BLIF \ CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF VPA.BLIF RST.BLIF RW.BLIF SIZE_0_.BLIF A_30_.BLIF A_29_.BLIF \ A_28_.BLIF A_27_.BLIF A_26_.BLIF A_25_.BLIF A_24_.BLIF A_23_.BLIF A_22_.BLIF A_21_.BLIF A_20_.BLIF \ A_19_.BLIF A_18_.BLIF A_17_.BLIF A_16_.BLIF A_15_.BLIF A_14_.BLIF A_13_.BLIF A_12_.BLIF A_11_.BLIF \ A_10_.BLIF A_9_.BLIF A_8_.BLIF A_7_.BLIF A_6_.BLIF A_5_.BLIF A_4_.BLIF A_3_.BLIF A_2_.BLIF \ - A_1_.BLIF A_0_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF DSACK_1_.BLIF DTACK.BLIF DSACK_0_.BLIF a_c_30__n.BLIF a_c_31__n.BLIF CPU_SPACE_c.BLIF inst_BGACK_030_INTreg.BLIF \ - BG_030_c.BLIF inst_CLK_OUT_INTreg.BLIF inst_FPU_CS_INTreg.BLIF BG_000DFFSHreg.BLIF cpu_est_3_reg.BLIF inst_VMA_INTreg.BLIF gnd_n_n.BLIF BGACK_000_c.BLIF cpu_est_0_.BLIF \ - cpu_est_1_.BLIF CLK_030_c.BLIF cpu_est_d_0_.BLIF cpu_est_d_3_.BLIF CLK_000_c.BLIF inst_AS_000_INTreg.BLIF inst_AS_030_000_SYNC.BLIF CLK_OSZI_c.BLIF inst_DTACK_SYNC.BLIF \ - inst_VPA_D.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D.BLIF inst_CLK_000_DD.BLIF IPL_030DFFSH_0_reg.BLIF inst_CLK_OUT_PRE.BLIF vcc_n_n.BLIF IPL_030DFFSH_1_reg.BLIF cpu_est_d_1_.BLIF \ - cpu_est_d_2_.BLIF IPL_030DFFSH_2_reg.BLIF cpu_est_2_.BLIF CLK_CNT_0_.BLIF ipl_c_0__n.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_7_.BLIF ipl_c_1__n.BLIF inst_UDS_000_INTreg.BLIF \ - inst_LDS_000_INTreg.BLIF ipl_c_2__n.BLIF inst_RISING_CLK_AMIGA.BLIF state_machine_un57_clk_000_d_n.BLIF dsack_c_1__n.BLIF SM_AMIGA_1_.BLIF DSACK_INT_1_.BLIF DTACK_c.BLIF inst_DTACK_DMA.BLIF \ - SM_AMIGA_4_.BLIF SM_AMIGA_3_.BLIF state_machine_un13_as_000_int_n.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_D_0_.BLIF RST_c.BLIF SM_AMIGA_D_1_.BLIF \ - SM_AMIGA_D_2_.BLIF RESETDFFreg.BLIF clk_exp.BLIF RW_c.BLIF fc_c_0__n.BLIF fc_c_1__n.BLIF state_machine_un57_clk_000_d_0_n.BLIF N_161_i.BLIF a_c_i_0__n.BLIF \ - state_machine_uds_000_int_8_0_n.BLIF state_machine_lds_000_int_8_0_n.BLIF N_113_i.BLIF cpu_est_0_0_.BLIF sm_amiga_ns_0_2__n.BLIF N_118_i.BLIF N_117_i.BLIF sm_amiga_ns_0_5__n.BLIF N_123_i.BLIF \ - CLK_OUT_PRE_0.BLIF N_119_i.BLIF N_120_i.BLIF sm_amiga_ns_0_7__n.BLIF CLK_OUT_PRE_i.BLIF N_106.BLIF N_102_0.BLIF N_107.BLIF size_c_i_1__n.BLIF \ - clk_un3_clk_000_dd_n.BLIF state_machine_un31_clk_000_d_i_n.BLIF clk_cpu_est_11_1__n.BLIF RISING_CLK_AMIGA_i.BLIF clk_cpu_est_11_3__n.BLIF state_machine_un4_bgack_000_0_n.BLIF G_98.BLIF BG_030_c_i.BLIF G_99.BLIF \ - state_machine_un1_clk_030_0_n.BLIF G_100.BLIF state_machine_un17_clk_030_0_n.BLIF N_161.BLIF un1_as_030_2_0.BLIF N_114.BLIF state_machine_as_030_000_sync_3_2_n.BLIF N_109.BLIF N_109_i.BLIF \ - N_111.BLIF un1_bg_030_0.BLIF N_112.BLIF N_111_i.BLIF N_122.BLIF N_122_i.BLIF N_115.BLIF N_101.BLIF N_147_i.BLIF \ - N_116.BLIF clk_cpu_est_11_0_3__n.BLIF N_124.BLIF N_145_i.BLIF N_139.BLIF N_146_i.BLIF N_137.BLIF N_142_i.BLIF N_140.BLIF \ - clk_cpu_est_11_0_1__n.BLIF N_141.BLIF N_140_i.BLIF N_136.BLIF N_139_i.BLIF N_142.BLIF N_141_i.BLIF N_145.BLIF N_138_i.BLIF \ - N_138.BLIF N_137_i.BLIF N_146.BLIF N_136_i.BLIF N_143.BLIF N_143_i.BLIF N_144.BLIF N_144_i.BLIF UDS_000_INT_0_sqmuxa.BLIF \ - N_134_i.BLIF UDS_000_INT_0_sqmuxa_1.BLIF N_101_0.BLIF N_147.BLIF N_115_i.BLIF N_147_1.BLIF N_116_i.BLIF state_machine_un13_clk_000_d_1_n.BLIF N_186.BLIF \ - N_124_i.BLIF N_189.BLIF state_machine_un42_clk_030_n.BLIF N_112_i.BLIF un1_bg_030.BLIF sm_amiga_ns_0_0__n.BLIF state_machine_as_030_000_sync_3_n.BLIF N_86_i_1.BLIF un1_as_030_2.BLIF \ - un1_bg_030_0_1.BLIF state_machine_un17_clk_030_n.BLIF un1_bg_030_0_2.BLIF state_machine_un1_clk_030_n.BLIF state_machine_as_030_000_sync_3_2_1_n.BLIF state_machine_un4_bgack_000_n.BLIF state_machine_un31_clk_000_d_i_1_n.BLIF N_108.BLIF N_186_1.BLIF \ - state_machine_un31_clk_000_d_n.BLIF N_186_2.BLIF state_machine_un13_clk_000_d_n.BLIF N_186_3.BLIF state_machine_un13_clk_000_d_4_n.BLIF N_186_4.BLIF state_machine_un8_clk_000_d_n.BLIF N_186_5.BLIF DTACK_SYNC_1_sqmuxa.BLIF \ - N_186_6.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF N_189_1.BLIF VPA_SYNC_1_sqmuxa.BLIF N_189_2.BLIF N_123.BLIF clk_cpu_est_11_0_1_1__n.BLIF N_118.BLIF clk_cpu_est_11_0_2_1__n.BLIF \ - N_110.BLIF clk_cpu_est_11_0_1_3__n.BLIF N_102.BLIF N_143_1.BLIF N_120.BLIF N_144_1.BLIF N_119.BLIF N_106_1.BLIF N_117.BLIF \ - N_106_2.BLIF N_113.BLIF N_107_1.BLIF state_machine_lds_000_int_8_n.BLIF UDS_000_INT_0_sqmuxa_1_1.BLIF state_machine_uds_000_int_8_n.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_1_3.BLIF \ - un2_clk_030_1.BLIF UDS_000_INT_0_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_2.BLIF AS_000_INT_1_sqmuxa.BLIF state_machine_un42_clk_030_1_n.BLIF VMA_INT_1_sqmuxa.BLIF state_machine_un42_clk_030_2_n.BLIF DSACK_INT_1_sqmuxa.BLIF \ - state_machine_un42_clk_030_3_n.BLIF RW_i.BLIF state_machine_un42_clk_030_4_n.BLIF clk_exp_i.BLIF state_machine_un42_clk_030_5_n.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF state_machine_un13_clk_000_d_1_0_n.BLIF N_114_i.BLIF state_machine_un13_clk_000_d_4_1_n.BLIF \ - VPA_SYNC_1_sqmuxa_i.BLIF state_machine_un8_clk_000_d_1_n.BLIF N_110_i.BLIF state_machine_un8_clk_000_d_2_n.BLIF N_108_i.BLIF state_machine_un8_clk_000_d_3_n.BLIF cpu_est_d_i_3__n.BLIF state_machine_un8_clk_000_d_4_n.BLIF cpu_est_d_i_0__n.BLIF \ - DTACK_SYNC_1_sqmuxa_1_0.BLIF CLK_000_D_i.BLIF VPA_SYNC_1_sqmuxa_1_1.BLIF AS_030_i.BLIF VPA_SYNC_1_sqmuxa_2.BLIF AS_000_INT_i.BLIF VPA_SYNC_1_sqmuxa_3.BLIF dsack_i_1__n.BLIF VPA_SYNC_1_sqmuxa_4.BLIF \ - state_machine_un13_clk_000_d_i_n.BLIF N_108_1.BLIF state_machine_un8_clk_000_d_i_n.BLIF N_118_1.BLIF state_machine_un13_clk_000_d_1_i_n.BLIF N_110_1.BLIF sm_amiga_i_1__n.BLIF clk_exp_1.BLIF sm_amiga_i_2__n.BLIF \ - sm_amiga_d_0_2__un3_n.BLIF sm_amiga_i_0__n.BLIF sm_amiga_d_0_2__un1_n.BLIF sm_amiga_i_3__n.BLIF sm_amiga_d_0_2__un0_n.BLIF VPA_D_i.BLIF dsack_int_0_1__un3_n.BLIF VMA_INT_i.BLIF dsack_int_0_1__un1_n.BLIF \ - DTACK_i.BLIF dsack_int_0_1__un0_n.BLIF cpu_est_i_3__n.BLIF vma_int_0_un3_n.BLIF a_i_18__n.BLIF vma_int_0_un1_n.BLIF a_i_16__n.BLIF vma_int_0_un0_n.BLIF a_i_19__n.BLIF \ - vpa_sync_0_un3_n.BLIF CLK_030_i.BLIF vpa_sync_0_un1_n.BLIF state_machine_un42_clk_030_i_n.BLIF vpa_sync_0_un0_n.BLIF DS_030_i.BLIF as_000_int_0_un3_n.BLIF cpu_est_i_1__n.BLIF as_000_int_0_un1_n.BLIF \ - AS_030_000_SYNC_i.BLIF as_000_int_0_un0_n.BLIF cpu_est_i_0__n.BLIF dtack_sync_0_un3_n.BLIF sm_amiga_i_4__n.BLIF dtack_sync_0_un1_n.BLIF sm_amiga_i_6__n.BLIF dtack_sync_0_un0_n.BLIF cpu_est_i_2__n.BLIF \ - lds_000_int_0_un3_n.BLIF UDS_000_INT_0_sqmuxa_1_i.BLIF lds_000_int_0_un1_n.BLIF UDS_000_INT_0_sqmuxa_i.BLIF lds_000_int_0_un0_n.BLIF sm_amiga_i_5__n.BLIF uds_000_int_0_un3_n.BLIF CLK_000_DD_i.BLIF uds_000_int_0_un1_n.BLIF \ - sm_amiga_i_7__n.BLIF uds_000_int_0_un0_n.BLIF a_i_30__n.BLIF bg_000_0_un3_n.BLIF a_i_31__n.BLIF bg_000_0_un1_n.BLIF a_i_28__n.BLIF bg_000_0_un0_n.BLIF a_i_29__n.BLIF \ - as_030_000_sync_0_un3_n.BLIF a_i_26__n.BLIF as_030_000_sync_0_un1_n.BLIF a_i_27__n.BLIF as_030_000_sync_0_un0_n.BLIF a_i_24__n.BLIF fpu_cs_int_0_un3_n.BLIF a_i_25__n.BLIF fpu_cs_int_0_un1_n.BLIF \ - fpu_cs_int_0_un0_n.BLIF ipl_030_0_2__un3_n.BLIF RST_i.BLIF ipl_030_0_2__un1_n.BLIF N_107_i.BLIF ipl_030_0_2__un0_n.BLIF N_106_i.BLIF ipl_030_0_1__un3_n.BLIF FPU_CS_INT_i.BLIF \ - ipl_030_0_1__un1_n.BLIF CPU_SPACE_i.BLIF ipl_030_0_1__un0_n.BLIF BGACK_030_INT_i.BLIF ipl_030_0_0__un3_n.BLIF AS_030_c.BLIF ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF bgack_030_int_0_un3_n.BLIF \ - DS_030_c.BLIF bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF sm_amiga_d_0_0__un3_n.BLIF sm_amiga_d_0_0__un1_n.BLIF size_c_0__n.BLIF sm_amiga_d_0_0__un0_n.BLIF sm_amiga_d_0_1__un3_n.BLIF size_c_1__n.BLIF \ - sm_amiga_d_0_1__un1_n.BLIF sm_amiga_d_0_1__un0_n.BLIF a_c_0__n.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF \ - cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF a_15__n.BLIF a_14__n.BLIF a_13__n.BLIF a_12__n.BLIF a_c_16__n.BLIF a_11__n.BLIF \ - a_c_17__n.BLIF a_10__n.BLIF a_c_18__n.BLIF a_9__n.BLIF a_c_19__n.BLIF a_8__n.BLIF a_c_20__n.BLIF a_7__n.BLIF a_c_21__n.BLIF \ - a_6__n.BLIF a_c_22__n.BLIF a_5__n.BLIF a_c_23__n.BLIF a_4__n.BLIF a_c_24__n.BLIF a_3__n.BLIF a_c_25__n.BLIF a_2__n.BLIF \ - a_c_26__n.BLIF a_1__n.BLIF a_c_27__n.BLIF a_c_28__n.BLIF a_c_29__n.BLIF DSACK_1_.PIN DTACK.PIN + A_1_.BLIF A_0_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF DSACK_1_.BLIF DTACK.BLIF DSACK_0_.BLIF CLK_OSZI_c.BLIF CLK_OUT_INTreg.BLIF IPL_030DFFSH_0_reg.BLIF inst_BGACK_030_INTreg.BLIF \ + inst_FPU_CS_INTreg.BLIF IPL_030DFFSH_1_reg.BLIF cpu_est_3_reg.BLIF inst_VMA_INTreg.BLIF IPL_030DFFSH_2_reg.BLIF gnd_n_n.BLIF cpu_est_0_.BLIF ipl_c_0__n.BLIF cpu_est_1_.BLIF \ + cpu_est_d_0_.BLIF ipl_c_1__n.BLIF cpu_est_d_3_.BLIF inst_AS_000_INTreg.BLIF ipl_c_2__n.BLIF inst_AS_030_000_SYNC.BLIF inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF dsack_c_1__n.BLIF \ + inst_VPA_SYNC.BLIF inst_CLK_000_D.BLIF DTACK_c.BLIF inst_CLK_000_DD.BLIF inst_CLK_OUT_PRE.BLIF vcc_n_n.BLIF cpu_est_d_1_.BLIF cpu_est_d_2_.BLIF cpu_est_2_.BLIF \ + CLK_CNT_0_.BLIF SM_AMIGA_6_.BLIF RST_c.BLIF SM_AMIGA_7_.BLIF inst_UDS_000_INTreg.BLIF RESETDFFreg.BLIF inst_LDS_000_INTreg.BLIF RW_c.BLIF inst_RISING_CLK_AMIGA.BLIF \ + state_machine_un57_clk_000_d_n.BLIF fc_c_0__n.BLIF SM_AMIGA_1_.BLIF DSACK_INT_1_.BLIF fc_c_1__n.BLIF inst_DTACK_DMA.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_3_.BLIF state_machine_un13_as_000_int_n.BLIF \ + SM_AMIGA_5_.BLIF SM_AMIGA_2_.BLIF N_145_i.BLIF SM_AMIGA_0_.BLIF a_c_i_0__n.BLIF state_machine_uds_000_int_8_0_n.BLIF state_machine_lds_000_int_8_0_n.BLIF N_99_i.BLIF N_112_i.BLIF \ + N_100_i.BLIF N_101_i.BLIF sm_amiga_ns_0_2__n.BLIF N_103_i.BLIF N_110_i.BLIF sm_amiga_ns_0_7__n.BLIF cpu_est_0_0_.BLIF N_91_0.BLIF N_92_0.BLIF \ + N_131_i.BLIF N_132_i.BLIF N_122_i.BLIF CLK_OUT_PRE_0.BLIF N_124_i.BLIF N_125_i.BLIF N_126_i.BLIF N_129_i.BLIF N_98.BLIF \ + N_127_i.BLIF N_97.BLIF N_128_i.BLIF N_104.BLIF N_130_i.BLIF N_93.BLIF clk_cpu_est_11_0_1__n.BLIF N_105.BLIF N_134_i.BLIF \ + N_106.BLIF N_133_i.BLIF N_108.BLIF N_135_i.BLIF N_94.BLIF clk_cpu_est_11_0_3__n.BLIF N_109.BLIF size_c_i_1__n.BLIF N_107.BLIF \ + state_machine_un31_clk_000_d_i_n.BLIF N_135_1.BLIF state_machine_as_030_000_sync_3_0_n.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF un1_as_030_2_0.BLIF N_167.BLIF state_machine_un17_clk_030_0_n.BLIF N_170.BLIF state_machine_un57_clk_000_d_0_n.BLIF \ + state_machine_un42_clk_030_n.BLIF RISING_CLK_AMIGA_i.BLIF DTACK_SYNC_1_sqmuxa.BLIF state_machine_un4_bgack_000_0_n.BLIF VPA_SYNC_1_sqmuxa.BLIF BG_030_c_i.BLIF un1_bg_030.BLIF state_machine_un1_clk_030_0_n.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF \ + N_97_i.BLIF DSACK_INT_1_sqmuxa.BLIF un1_bg_030_0.BLIF state_machine_un1_clk_030_n.BLIF CLK_OUT_PRE_i.BLIF state_machine_un4_bgack_000_n.BLIF N_94_0.BLIF un1_as_030_2.BLIF N_93_0.BLIF \ + state_machine_un17_clk_030_n.BLIF N_108_i.BLIF N_102.BLIF N_109_i.BLIF AS_000_INT_1_sqmuxa.BLIF VPA_SYNC_1_sqmuxa_1.BLIF N_106_i.BLIF state_machine_as_030_000_sync_3_n.BLIF N_107_i.BLIF \ + clk_un3_clk_000_dd_n.BLIF sm_amiga_ns_0_5__n.BLIF state_machine_un31_clk_000_d_n.BLIF N_104_i.BLIF UDS_000_INT_0_sqmuxa.BLIF N_105_i.BLIF state_machine_un13_clk_000_d_n.BLIF state_machine_un13_clk_000_d_4_n.BLIF un1_bg_030_0_1.BLIF \ + state_machine_un13_clk_000_d_1_n.BLIF un1_bg_030_0_2.BLIF state_machine_un8_clk_000_d_n.BLIF state_machine_un31_clk_000_d_i_1_n.BLIF UDS_000_INT_0_sqmuxa_1.BLIF clk_cpu_est_11_0_1_3__n.BLIF N_132.BLIF clk_cpu_est_11_0_1_1__n.BLIF N_131.BLIF \ + clk_cpu_est_11_0_2_1__n.BLIF N_124.BLIF N_167_1.BLIF clk_cpu_est_11_3__n.BLIF N_167_2.BLIF N_135.BLIF N_167_3.BLIF N_133.BLIF N_167_4.BLIF \ + N_134.BLIF N_167_5.BLIF clk_cpu_est_11_1__n.BLIF N_167_6.BLIF N_130.BLIF N_170_1.BLIF N_128.BLIF N_170_2.BLIF N_145.BLIF \ + N_107_1.BLIF N_127.BLIF state_machine_un42_clk_030_1_n.BLIF N_129.BLIF state_machine_un42_clk_030_2_n.BLIF N_126.BLIF state_machine_un42_clk_030_3_n.BLIF N_125.BLIF state_machine_un42_clk_030_4_n.BLIF \ + N_92.BLIF state_machine_un42_clk_030_5_n.BLIF N_91.BLIF DTACK_SYNC_1_sqmuxa_1_0.BLIF N_110.BLIF VPA_SYNC_1_sqmuxa_1_1.BLIF N_103.BLIF VPA_SYNC_1_sqmuxa_2.BLIF N_101.BLIF \ + VPA_SYNC_1_sqmuxa_3.BLIF N_100.BLIF VPA_SYNC_1_sqmuxa_4.BLIF N_112.BLIF N_98_1.BLIF N_99.BLIF state_machine_as_030_000_sync_3_0_1_n.BLIF state_machine_lds_000_int_8_n.BLIF UDS_000_INT_0_sqmuxa_1_0.BLIF \ + state_machine_uds_000_int_8_n.BLIF UDS_000_INT_0_sqmuxa_2.BLIF un2_clk_030_1.BLIF state_machine_un13_clk_000_d_1_0_n.BLIF VMA_INT_1_sqmuxa.BLIF state_machine_un13_clk_000_d_4_1_n.BLIF RW_i.BLIF state_machine_un8_clk_000_d_1_n.BLIF cpu_est_d_i_3__n.BLIF \ + state_machine_un8_clk_000_d_2_n.BLIF cpu_est_d_i_0__n.BLIF state_machine_un8_clk_000_d_3_n.BLIF CLK_000_D_i.BLIF state_machine_un8_clk_000_d_4_n.BLIF AS_000_INT_i.BLIF UDS_000_INT_0_sqmuxa_1_1.BLIF dsack_i_1__n.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF \ + state_machine_un13_clk_000_d_i_n.BLIF UDS_000_INT_0_sqmuxa_1_3.BLIF state_machine_un8_clk_000_d_i_n.BLIF N_132_1.BLIF AS_030_i.BLIF N_131_1.BLIF sm_amiga_i_6__n.BLIF vma_int_0_un3_n.BLIF sm_amiga_i_7__n.BLIF \ + vma_int_0_un1_n.BLIF sm_amiga_i_5__n.BLIF vma_int_0_un0_n.BLIF sm_amiga_i_4__n.BLIF lds_000_int_0_un3_n.BLIF state_machine_un13_clk_000_d_1_i_n.BLIF lds_000_int_0_un1_n.BLIF CLK_000_DD_i.BLIF lds_000_int_0_un0_n.BLIF \ + AS_030_000_SYNC_i.BLIF uds_000_int_0_un3_n.BLIF cpu_est_i_0__n.BLIF uds_000_int_0_un1_n.BLIF cpu_est_i_2__n.BLIF uds_000_int_0_un0_n.BLIF cpu_est_i_3__n.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_i_1__n.BLIF \ + cpu_est_0_3__un1_n.BLIF UDS_000_INT_0_sqmuxa_1_i.BLIF cpu_est_0_3__un0_n.BLIF UDS_000_INT_0_sqmuxa_i.BLIF cpu_est_0_2__un3_n.BLIF DS_030_i.BLIF cpu_est_0_2__un1_n.BLIF VPA_D_i.BLIF cpu_est_0_2__un0_n.BLIF \ + state_machine_un42_clk_030_i_n.BLIF cpu_est_0_1__un3_n.BLIF VPA_SYNC_1_sqmuxa_i.BLIF cpu_est_0_1__un1_n.BLIF N_102_i.BLIF cpu_est_0_1__un0_n.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF fpu_cs_int_0_un3_n.BLIF N_98_i.BLIF \ + fpu_cs_int_0_un1_n.BLIF a_i_18__n.BLIF fpu_cs_int_0_un0_n.BLIF a_i_16__n.BLIF as_000_int_0_un3_n.BLIF a_i_19__n.BLIF as_000_int_0_un1_n.BLIF CLK_030_i.BLIF as_000_int_0_un0_n.BLIF \ + VMA_INT_i.BLIF vpa_sync_0_un3_n.BLIF DTACK_i.BLIF vpa_sync_0_un1_n.BLIF sm_amiga_i_3__n.BLIF vpa_sync_0_un0_n.BLIF sm_amiga_i_1__n.BLIF as_030_000_sync_0_un3_n.BLIF sm_amiga_i_2__n.BLIF \ + as_030_000_sync_0_un1_n.BLIF a_i_30__n.BLIF as_030_000_sync_0_un0_n.BLIF a_i_31__n.BLIF ipl_030_0_2__un3_n.BLIF a_i_28__n.BLIF ipl_030_0_2__un1_n.BLIF a_i_29__n.BLIF ipl_030_0_2__un0_n.BLIF \ + a_i_26__n.BLIF ipl_030_0_1__un3_n.BLIF a_i_27__n.BLIF ipl_030_0_1__un1_n.BLIF a_i_24__n.BLIF ipl_030_0_1__un0_n.BLIF a_i_25__n.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un1_n.BLIF \ + ipl_030_0_0__un0_n.BLIF RST_i.BLIF bgack_030_int_0_un3_n.BLIF FPU_CS_INT_i.BLIF bgack_030_int_0_un1_n.BLIF CPU_SPACE_i.BLIF bgack_030_int_0_un0_n.BLIF BGACK_030_INT_i.BLIF dsack_int_0_1__un3_n.BLIF \ + AS_030_c.BLIF dsack_int_0_1__un1_n.BLIF dsack_int_0_1__un0_n.BLIF bg_000_0_un3_n.BLIF DS_030_c.BLIF bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un1_n.BLIF \ + size_c_0__n.BLIF dtack_sync_0_un0_n.BLIF a_15__n.BLIF size_c_1__n.BLIF a_14__n.BLIF a_c_0__n.BLIF a_13__n.BLIF a_12__n.BLIF a_11__n.BLIF \ + a_10__n.BLIF a_9__n.BLIF a_8__n.BLIF a_7__n.BLIF a_6__n.BLIF a_c_16__n.BLIF a_5__n.BLIF a_c_17__n.BLIF a_4__n.BLIF \ + a_c_18__n.BLIF a_3__n.BLIF a_c_19__n.BLIF a_2__n.BLIF a_c_20__n.BLIF a_1__n.BLIF a_c_21__n.BLIF a_c_22__n.BLIF a_c_23__n.BLIF \ + a_c_24__n.BLIF a_c_25__n.BLIF a_c_26__n.BLIF a_c_27__n.BLIF a_c_28__n.BLIF a_c_29__n.BLIF a_c_30__n.BLIF a_c_31__n.BLIF CPU_SPACE_c.BLIF \ + BG_030_c.BLIF BG_000DFFSHreg.BLIF BGACK_000_c.BLIF CLK_030_c.BLIF CLK_000_c.BLIF DSACK_1_.PIN DTACK.PIN .outputs IPL_030_2_ AS_000 UDS_000 LDS_000 BERR BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS AVEC \ - AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_6_.D \ - SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR \ - SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C \ - IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C cpu_est_2_.D cpu_est_2_.C cpu_est_3_reg.D \ - cpu_est_3_reg.C SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP cpu_est_d_0_.D cpu_est_d_0_.C cpu_est_d_1_.D cpu_est_d_1_.C cpu_est_d_2_.D cpu_est_d_2_.C cpu_est_d_3_.D \ - cpu_est_d_3_.C SM_AMIGA_D_0_.D SM_AMIGA_D_0_.C SM_AMIGA_D_1_.D SM_AMIGA_D_1_.C SM_AMIGA_D_2_.D SM_AMIGA_D_2_.C IPL_030DFFSH_0_reg.D IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP inst_AS_000_INTreg.D \ - inst_AS_000_INTreg.C inst_AS_000_INTreg.AP inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_VMA_INTreg.D inst_VMA_INTreg.C inst_VMA_INTreg.AP \ - BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP DSACK_INT_1_.D DSACK_INT_1_.C DSACK_INT_1_.AP inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C \ - inst_UDS_000_INTreg.D inst_UDS_000_INTreg.C inst_UDS_000_INTreg.AP inst_LDS_000_INTreg.D inst_LDS_000_INTreg.C inst_LDS_000_INTreg.AP inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_FPU_CS_INTreg.D inst_FPU_CS_INTreg.C \ - inst_FPU_CS_INTreg.AP inst_DTACK_DMA.D inst_DTACK_DMA.C inst_DTACK_DMA.AP inst_RISING_CLK_AMIGA.D inst_RISING_CLK_AMIGA.C CLK_CNT_0_.D CLK_CNT_0_.C inst_VPA_D.D inst_VPA_D.C inst_CLK_000_D.D \ - inst_CLK_000_D.C RESETDFFreg.D RESETDFFreg.C inst_CLK_000_DD.D inst_CLK_000_DD.C inst_CLK_OUT_INTreg.D inst_CLK_OUT_INTreg.C G_100.X1 G_100.X2 CLK_OUT_PRE_0.X1 CLK_OUT_PRE_0.X2 \ - G_98.X1 G_98.X2 G_99.X1 G_99.X2 cpu_est_0_0_.X1 cpu_est_0_0_.X2 DSACK_1_ DTACK DSACK_0_ a_c_30__n a_c_31__n CPU_SPACE_c BG_030_c gnd_n_n \ - BGACK_000_c CLK_030_c CLK_000_c CLK_OSZI_c vcc_n_n ipl_c_0__n ipl_c_1__n ipl_c_2__n state_machine_un57_clk_000_d_n dsack_c_1__n DTACK_c \ - state_machine_un13_as_000_int_n RST_c clk_exp RW_c fc_c_0__n fc_c_1__n state_machine_un57_clk_000_d_0_n N_161_i a_c_i_0__n state_machine_uds_000_int_8_0_n state_machine_lds_000_int_8_0_n \ - N_113_i sm_amiga_ns_0_2__n N_118_i N_117_i sm_amiga_ns_0_5__n N_123_i N_119_i N_120_i sm_amiga_ns_0_7__n CLK_OUT_PRE_i N_106 \ - N_102_0 N_107 size_c_i_1__n clk_un3_clk_000_dd_n state_machine_un31_clk_000_d_i_n clk_cpu_est_11_1__n RISING_CLK_AMIGA_i clk_cpu_est_11_3__n state_machine_un4_bgack_000_0_n BG_030_c_i state_machine_un1_clk_030_0_n \ - state_machine_un17_clk_030_0_n N_161 un1_as_030_2_0 N_114 state_machine_as_030_000_sync_3_2_n N_109 N_109_i N_111 un1_bg_030_0 N_112 N_111_i \ - N_122 N_122_i N_115 N_101 N_147_i N_116 clk_cpu_est_11_0_3__n N_124 N_145_i N_139 N_146_i \ - N_137 N_142_i N_140 clk_cpu_est_11_0_1__n N_141 N_140_i N_136 N_139_i N_142 N_141_i N_145 \ - N_138_i N_138 N_137_i N_146 N_136_i N_143 N_143_i N_144 N_144_i UDS_000_INT_0_sqmuxa N_134_i \ - UDS_000_INT_0_sqmuxa_1 N_101_0 N_147 N_115_i N_147_1 N_116_i state_machine_un13_clk_000_d_1_n N_186 N_124_i N_189 state_machine_un42_clk_030_n \ - N_112_i un1_bg_030 sm_amiga_ns_0_0__n state_machine_as_030_000_sync_3_n N_86_i_1 un1_as_030_2 un1_bg_030_0_1 state_machine_un17_clk_030_n un1_bg_030_0_2 state_machine_un1_clk_030_n state_machine_as_030_000_sync_3_2_1_n \ - state_machine_un4_bgack_000_n state_machine_un31_clk_000_d_i_1_n N_108 N_186_1 state_machine_un31_clk_000_d_n N_186_2 state_machine_un13_clk_000_d_n N_186_3 state_machine_un13_clk_000_d_4_n N_186_4 state_machine_un8_clk_000_d_n \ - N_186_5 DTACK_SYNC_1_sqmuxa N_186_6 VPA_SYNC_1_sqmuxa_1_0 N_189_1 VPA_SYNC_1_sqmuxa N_189_2 N_123 clk_cpu_est_11_0_1_1__n N_118 clk_cpu_est_11_0_2_1__n \ - N_110 clk_cpu_est_11_0_1_3__n N_102 N_143_1 N_120 N_144_1 N_119 N_106_1 N_117 N_106_2 N_113 \ - N_107_1 state_machine_lds_000_int_8_n UDS_000_INT_0_sqmuxa_1_1 state_machine_uds_000_int_8_n UDS_000_INT_0_sqmuxa_1_2 DTACK_SYNC_1_sqmuxa_1 UDS_000_INT_0_sqmuxa_1_3 un2_clk_030_1 UDS_000_INT_0_sqmuxa_1_0 VPA_SYNC_1_sqmuxa_1 UDS_000_INT_0_sqmuxa_2 \ - AS_000_INT_1_sqmuxa state_machine_un42_clk_030_1_n VMA_INT_1_sqmuxa state_machine_un42_clk_030_2_n DSACK_INT_1_sqmuxa state_machine_un42_clk_030_3_n RW_i state_machine_un42_clk_030_4_n clk_exp_i state_machine_un42_clk_030_5_n DTACK_SYNC_1_sqmuxa_i \ - state_machine_un13_clk_000_d_1_0_n N_114_i state_machine_un13_clk_000_d_4_1_n VPA_SYNC_1_sqmuxa_i state_machine_un8_clk_000_d_1_n N_110_i state_machine_un8_clk_000_d_2_n N_108_i state_machine_un8_clk_000_d_3_n cpu_est_d_i_3__n state_machine_un8_clk_000_d_4_n \ - cpu_est_d_i_0__n DTACK_SYNC_1_sqmuxa_1_0 CLK_000_D_i VPA_SYNC_1_sqmuxa_1_1 AS_030_i VPA_SYNC_1_sqmuxa_2 AS_000_INT_i VPA_SYNC_1_sqmuxa_3 dsack_i_1__n VPA_SYNC_1_sqmuxa_4 state_machine_un13_clk_000_d_i_n \ - N_108_1 state_machine_un8_clk_000_d_i_n N_118_1 state_machine_un13_clk_000_d_1_i_n N_110_1 sm_amiga_i_1__n clk_exp_1 sm_amiga_i_2__n sm_amiga_d_0_2__un3_n sm_amiga_i_0__n sm_amiga_d_0_2__un1_n \ - sm_amiga_i_3__n sm_amiga_d_0_2__un0_n VPA_D_i dsack_int_0_1__un3_n VMA_INT_i dsack_int_0_1__un1_n DTACK_i dsack_int_0_1__un0_n cpu_est_i_3__n vma_int_0_un3_n a_i_18__n \ - vma_int_0_un1_n a_i_16__n vma_int_0_un0_n a_i_19__n vpa_sync_0_un3_n CLK_030_i vpa_sync_0_un1_n state_machine_un42_clk_030_i_n vpa_sync_0_un0_n DS_030_i as_000_int_0_un3_n \ - cpu_est_i_1__n as_000_int_0_un1_n AS_030_000_SYNC_i as_000_int_0_un0_n cpu_est_i_0__n dtack_sync_0_un3_n sm_amiga_i_4__n dtack_sync_0_un1_n sm_amiga_i_6__n dtack_sync_0_un0_n cpu_est_i_2__n \ - lds_000_int_0_un3_n UDS_000_INT_0_sqmuxa_1_i lds_000_int_0_un1_n UDS_000_INT_0_sqmuxa_i lds_000_int_0_un0_n sm_amiga_i_5__n uds_000_int_0_un3_n CLK_000_DD_i uds_000_int_0_un1_n sm_amiga_i_7__n uds_000_int_0_un0_n \ - a_i_30__n bg_000_0_un3_n a_i_31__n bg_000_0_un1_n a_i_28__n bg_000_0_un0_n a_i_29__n as_030_000_sync_0_un3_n a_i_26__n as_030_000_sync_0_un1_n a_i_27__n \ - as_030_000_sync_0_un0_n a_i_24__n fpu_cs_int_0_un3_n a_i_25__n fpu_cs_int_0_un1_n fpu_cs_int_0_un0_n ipl_030_0_2__un3_n RST_i ipl_030_0_2__un1_n N_107_i ipl_030_0_2__un0_n \ - N_106_i ipl_030_0_1__un3_n FPU_CS_INT_i ipl_030_0_1__un1_n CPU_SPACE_i ipl_030_0_1__un0_n BGACK_030_INT_i ipl_030_0_0__un3_n AS_030_c ipl_030_0_0__un1_n ipl_030_0_0__un0_n \ - bgack_030_int_0_un3_n DS_030_c bgack_030_int_0_un1_n bgack_030_int_0_un0_n sm_amiga_d_0_0__un3_n sm_amiga_d_0_0__un1_n size_c_0__n sm_amiga_d_0_0__un0_n sm_amiga_d_0_1__un3_n size_c_1__n sm_amiga_d_0_1__un1_n \ - sm_amiga_d_0_1__un0_n a_c_0__n cpu_est_0_1__un3_n cpu_est_0_1__un1_n cpu_est_0_1__un0_n cpu_est_0_2__un3_n cpu_est_0_2__un1_n cpu_est_0_2__un0_n cpu_est_0_3__un3_n cpu_est_0_3__un1_n cpu_est_0_3__un0_n \ - a_15__n a_14__n a_13__n a_12__n a_c_16__n a_11__n a_c_17__n a_10__n a_c_18__n a_9__n a_c_19__n \ - a_8__n a_c_20__n a_7__n a_c_21__n a_6__n a_c_22__n a_5__n a_c_23__n a_4__n a_c_24__n a_3__n \ - a_c_25__n a_2__n a_c_26__n a_1__n a_c_27__n a_c_28__n a_c_29__n DSACK_1_.OE DTACK.OE \ + AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ cpu_est_3_reg.D \ + cpu_est_3_reg.C SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D \ + SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR \ + SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR cpu_est_d_0_.D cpu_est_d_0_.C cpu_est_d_1_.D cpu_est_d_1_.C cpu_est_d_2_.D cpu_est_d_2_.C cpu_est_d_3_.D cpu_est_d_3_.C \ + IPL_030DFFSH_0_reg.D IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP cpu_est_0_.D cpu_est_0_.C \ + cpu_est_1_.D cpu_est_1_.C cpu_est_2_.D cpu_est_2_.C inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_VMA_INTreg.D \ + inst_VMA_INTreg.C inst_VMA_INTreg.AP BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP DSACK_INT_1_.D DSACK_INT_1_.C DSACK_INT_1_.AP inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP \ + inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C inst_UDS_000_INTreg.D inst_UDS_000_INTreg.C inst_UDS_000_INTreg.AP inst_LDS_000_INTreg.D inst_LDS_000_INTreg.C inst_LDS_000_INTreg.AP inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP \ + inst_FPU_CS_INTreg.D inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP inst_AS_000_INTreg.D inst_AS_000_INTreg.C inst_AS_000_INTreg.AP inst_DTACK_DMA.D inst_DTACK_DMA.C inst_DTACK_DMA.AP inst_RISING_CLK_AMIGA.D inst_RISING_CLK_AMIGA.C \ + CLK_CNT_0_.D CLK_CNT_0_.C inst_VPA_D.D inst_VPA_D.C inst_CLK_000_D.D inst_CLK_000_D.C RESETDFFreg.D RESETDFFreg.C inst_CLK_000_DD.D inst_CLK_000_DD.C CLK_OUT_INTreg.D \ + CLK_OUT_INTreg.C cpu_est_0_0_.X1 cpu_est_0_0_.X2 CLK_OUT_PRE_0.X1 CLK_OUT_PRE_0.X2 DSACK_1_ DTACK DSACK_0_ CLK_OSZI_c gnd_n_n ipl_c_0__n ipl_c_1__n ipl_c_2__n dsack_c_1__n \ + DTACK_c vcc_n_n RST_c RW_c state_machine_un57_clk_000_d_n fc_c_0__n fc_c_1__n state_machine_un13_as_000_int_n N_145_i a_c_i_0__n state_machine_uds_000_int_8_0_n \ + state_machine_lds_000_int_8_0_n N_99_i N_112_i N_100_i N_101_i sm_amiga_ns_0_2__n N_103_i N_110_i sm_amiga_ns_0_7__n N_91_0 N_92_0 \ + N_131_i N_132_i N_122_i N_124_i N_125_i N_126_i N_129_i N_98 N_127_i N_97 N_128_i \ + N_104 N_130_i N_93 clk_cpu_est_11_0_1__n N_105 N_134_i N_106 N_133_i N_108 N_135_i N_94 \ + clk_cpu_est_11_0_3__n N_109 size_c_i_1__n N_107 state_machine_un31_clk_000_d_i_n N_135_1 state_machine_as_030_000_sync_3_0_n VPA_SYNC_1_sqmuxa_1_0 un1_as_030_2_0 N_167 state_machine_un17_clk_030_0_n \ + N_170 state_machine_un57_clk_000_d_0_n state_machine_un42_clk_030_n RISING_CLK_AMIGA_i DTACK_SYNC_1_sqmuxa state_machine_un4_bgack_000_0_n VPA_SYNC_1_sqmuxa BG_030_c_i un1_bg_030 state_machine_un1_clk_030_0_n DTACK_SYNC_1_sqmuxa_1 \ + N_97_i DSACK_INT_1_sqmuxa un1_bg_030_0 state_machine_un1_clk_030_n CLK_OUT_PRE_i state_machine_un4_bgack_000_n N_94_0 un1_as_030_2 N_93_0 state_machine_un17_clk_030_n N_108_i \ + N_102 N_109_i AS_000_INT_1_sqmuxa VPA_SYNC_1_sqmuxa_1 N_106_i state_machine_as_030_000_sync_3_n N_107_i clk_un3_clk_000_dd_n sm_amiga_ns_0_5__n state_machine_un31_clk_000_d_n N_104_i \ + UDS_000_INT_0_sqmuxa N_105_i state_machine_un13_clk_000_d_n state_machine_un13_clk_000_d_4_n un1_bg_030_0_1 state_machine_un13_clk_000_d_1_n un1_bg_030_0_2 state_machine_un8_clk_000_d_n state_machine_un31_clk_000_d_i_1_n UDS_000_INT_0_sqmuxa_1 clk_cpu_est_11_0_1_3__n \ + N_132 clk_cpu_est_11_0_1_1__n N_131 clk_cpu_est_11_0_2_1__n N_124 N_167_1 clk_cpu_est_11_3__n N_167_2 N_135 N_167_3 N_133 \ + N_167_4 N_134 N_167_5 clk_cpu_est_11_1__n N_167_6 N_130 N_170_1 N_128 N_170_2 N_145 N_107_1 \ + N_127 state_machine_un42_clk_030_1_n N_129 state_machine_un42_clk_030_2_n N_126 state_machine_un42_clk_030_3_n N_125 state_machine_un42_clk_030_4_n N_92 state_machine_un42_clk_030_5_n N_91 \ + DTACK_SYNC_1_sqmuxa_1_0 N_110 VPA_SYNC_1_sqmuxa_1_1 N_103 VPA_SYNC_1_sqmuxa_2 N_101 VPA_SYNC_1_sqmuxa_3 N_100 VPA_SYNC_1_sqmuxa_4 N_112 N_98_1 \ + N_99 state_machine_as_030_000_sync_3_0_1_n state_machine_lds_000_int_8_n UDS_000_INT_0_sqmuxa_1_0 state_machine_uds_000_int_8_n UDS_000_INT_0_sqmuxa_2 un2_clk_030_1 state_machine_un13_clk_000_d_1_0_n VMA_INT_1_sqmuxa state_machine_un13_clk_000_d_4_1_n RW_i \ + state_machine_un8_clk_000_d_1_n cpu_est_d_i_3__n state_machine_un8_clk_000_d_2_n cpu_est_d_i_0__n state_machine_un8_clk_000_d_3_n CLK_000_D_i state_machine_un8_clk_000_d_4_n AS_000_INT_i UDS_000_INT_0_sqmuxa_1_1 dsack_i_1__n UDS_000_INT_0_sqmuxa_1_2 \ + state_machine_un13_clk_000_d_i_n UDS_000_INT_0_sqmuxa_1_3 state_machine_un8_clk_000_d_i_n N_132_1 AS_030_i N_131_1 sm_amiga_i_6__n vma_int_0_un3_n sm_amiga_i_7__n vma_int_0_un1_n sm_amiga_i_5__n \ + vma_int_0_un0_n sm_amiga_i_4__n lds_000_int_0_un3_n state_machine_un13_clk_000_d_1_i_n lds_000_int_0_un1_n CLK_000_DD_i lds_000_int_0_un0_n AS_030_000_SYNC_i uds_000_int_0_un3_n cpu_est_i_0__n uds_000_int_0_un1_n \ + cpu_est_i_2__n uds_000_int_0_un0_n cpu_est_i_3__n cpu_est_0_3__un3_n cpu_est_i_1__n cpu_est_0_3__un1_n UDS_000_INT_0_sqmuxa_1_i cpu_est_0_3__un0_n UDS_000_INT_0_sqmuxa_i cpu_est_0_2__un3_n DS_030_i \ + cpu_est_0_2__un1_n VPA_D_i cpu_est_0_2__un0_n state_machine_un42_clk_030_i_n cpu_est_0_1__un3_n VPA_SYNC_1_sqmuxa_i cpu_est_0_1__un1_n N_102_i cpu_est_0_1__un0_n DTACK_SYNC_1_sqmuxa_i fpu_cs_int_0_un3_n \ + N_98_i fpu_cs_int_0_un1_n a_i_18__n fpu_cs_int_0_un0_n a_i_16__n as_000_int_0_un3_n a_i_19__n as_000_int_0_un1_n CLK_030_i as_000_int_0_un0_n VMA_INT_i \ + vpa_sync_0_un3_n DTACK_i vpa_sync_0_un1_n sm_amiga_i_3__n vpa_sync_0_un0_n sm_amiga_i_1__n as_030_000_sync_0_un3_n sm_amiga_i_2__n as_030_000_sync_0_un1_n a_i_30__n as_030_000_sync_0_un0_n \ + a_i_31__n ipl_030_0_2__un3_n a_i_28__n ipl_030_0_2__un1_n a_i_29__n ipl_030_0_2__un0_n a_i_26__n ipl_030_0_1__un3_n a_i_27__n ipl_030_0_1__un1_n a_i_24__n \ + ipl_030_0_1__un0_n a_i_25__n ipl_030_0_0__un3_n ipl_030_0_0__un1_n ipl_030_0_0__un0_n RST_i bgack_030_int_0_un3_n FPU_CS_INT_i bgack_030_int_0_un1_n CPU_SPACE_i bgack_030_int_0_un0_n \ + BGACK_030_INT_i dsack_int_0_1__un3_n AS_030_c dsack_int_0_1__un1_n dsack_int_0_1__un0_n bg_000_0_un3_n DS_030_c bg_000_0_un1_n bg_000_0_un0_n dtack_sync_0_un3_n dtack_sync_0_un1_n \ + size_c_0__n dtack_sync_0_un0_n a_15__n size_c_1__n a_14__n a_c_0__n a_13__n a_12__n a_11__n a_10__n a_9__n \ + a_8__n a_7__n a_6__n a_c_16__n a_5__n a_c_17__n a_4__n a_c_18__n a_3__n a_c_19__n a_2__n \ + a_c_20__n a_1__n a_c_21__n a_c_22__n a_c_23__n a_c_24__n a_c_25__n a_c_26__n a_c_27__n a_c_28__n a_c_29__n \ + a_c_30__n a_c_31__n CPU_SPACE_c BG_030_c BGACK_000_c CLK_030_c CLK_000_c DSACK_1_.OE DTACK.OE \ AS_000.OE UDS_000.OE LDS_000.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE .names DSACK_INT_1_.BLIF DSACK_1_ 1 1 @@ -169,949 +161,880 @@ 1 1 .names FPU_CS_INT_i.BLIF AVEC_EXP.OE 1 1 -.names N_189.BLIF CIIN +.names N_170.BLIF CIIN 1 1 -.names N_186.BLIF CIIN.OE +.names N_167.BLIF CIIN.OE 1 1 -.names N_123.BLIF N_123_i -0 1 -.names N_119.BLIF N_119_i -0 1 -.names N_120.BLIF N_120_i -0 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C -1 1 -.names sm_amiga_ns_0_7__n.BLIF SM_AMIGA_0_.D -0 1 -.names inst_CLK_OUT_PRE.BLIF CLK_OUT_PRE_i -0 1 -.names RST_i.BLIF SM_AMIGA_6_.AR -1 1 -.names N_102_0.BLIF N_102 -0 1 -.names state_machine_un57_clk_000_d_0_n.BLIF state_machine_un57_clk_000_d_n -0 1 -.names RST_c.BLIF sm_amiga_d_0_2__un3_n -0 1 -.names N_108_i.BLIF RST_c.BLIF sm_amiga_d_0_2__un1_n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C -1 1 -.names SM_AMIGA_D_2_.BLIF sm_amiga_d_0_2__un3_n.BLIF sm_amiga_d_0_2__un0_n -11 1 -.names sm_amiga_d_0_2__un1_n.BLIF sm_amiga_d_0_2__un0_n.BLIF SM_AMIGA_D_2_.D -1- 1 --1 1 -.names RST_i.BLIF SM_AMIGA_5_.AR -1 1 -.names N_110.BLIF N_110_i -0 1 -.names DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un3_n -0 1 -.names DSACK_INT_1_.BLIF DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un1_n -11 1 -.names N_110_i.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un0_n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C -1 1 -.names dsack_int_0_1__un1_n.BLIF dsack_int_0_1__un0_n.BLIF DSACK_INT_1_.D -1- 1 --1 1 -.names VMA_INT_1_sqmuxa.BLIF vma_int_0_un3_n -0 1 -.names RST_i.BLIF SM_AMIGA_4_.AR -1 1 -.names inst_VMA_INTreg.BLIF VMA_INT_1_sqmuxa.BLIF vma_int_0_un1_n -11 1 -.names state_machine_un13_clk_000_d_4_n.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n -11 1 -.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF inst_VMA_INTreg.D -1- 1 --1 1 -.names VPA_SYNC_1_sqmuxa.BLIF VPA_SYNC_1_sqmuxa_i -0 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C -1 1 -.names VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un3_n -0 1 -.names inst_VPA_SYNC.BLIF VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un1_n -11 1 -.names RST_i.BLIF SM_AMIGA_3_.AR -1 1 -.names VPA_SYNC_1_sqmuxa_i.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n -11 1 -.names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D -1- 1 --1 1 -.names N_114.BLIF N_114_i -0 1 -.names AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un3_n -0 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C -1 1 -.names inst_AS_000_INTreg.BLIF AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un1_n -11 1 -.names N_114_i.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n -11 1 -.names RST_i.BLIF SM_AMIGA_2_.AR -1 1 -.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INTreg.D -1- 1 --1 1 -.names DTACK_SYNC_1_sqmuxa.BLIF DTACK_SYNC_1_sqmuxa_i -0 1 -.names DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un3_n -0 1 -.names inst_DTACK_SYNC.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un1_n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C -1 1 -.names DTACK_SYNC_1_sqmuxa_i.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n -11 1 -.names dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.D -1- 1 --1 1 -.names RST_i.BLIF SM_AMIGA_1_.AR -1 1 -.names un2_clk_030_1.BLIF lds_000_int_0_un3_n -0 1 -.names inst_LDS_000_INTreg.BLIF un2_clk_030_1.BLIF lds_000_int_0_un1_n -11 1 .names state_machine_lds_000_int_8_n.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n 11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C +1 1 .names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INTreg.D 1- 1 -1 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C -1 1 .names un2_clk_030_1.BLIF uds_000_int_0_un3_n 0 1 +.names RST_i.BLIF SM_AMIGA_3_.AR +1 1 .names inst_UDS_000_INTreg.BLIF un2_clk_030_1.BLIF uds_000_int_0_un1_n 11 1 -.names RST_i.BLIF SM_AMIGA_0_.AR -1 1 .names state_machine_uds_000_int_8_n.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n 11 1 .names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF inst_UDS_000_INTreg.D 1- 1 -1 1 -.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF state_machine_un57_clk_000_d_0_n -11 1 .names RW_c.BLIF RW_i 0 1 -.names CLK_OSZI_c.BLIF IPL_030DFFSH_1_reg.C +.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C 1 1 -.names clk_exp.BLIF clk_exp_i +.names AS_030_c.BLIF AS_030_i 0 1 -.names AS_030_i.BLIF VPA_SYNC_1_sqmuxa_i.BLIF VPA_SYNC_1_sqmuxa_1 +.names AS_030_i.BLIF N_145.BLIF un2_clk_030_1 11 1 -.names RST_i.BLIF IPL_030DFFSH_1_reg.AP +.names RST_i.BLIF SM_AMIGA_2_.AR 1 1 -.names AS_030_i.BLIF N_114_i.BLIF AS_000_INT_1_sqmuxa -11 1 .names state_machine_un13_clk_000_d_n.BLIF state_machine_un13_clk_000_d_i_n 0 1 .names state_machine_un8_clk_000_d_n.BLIF state_machine_un8_clk_000_d_i_n 0 1 .names state_machine_un8_clk_000_d_i_n.BLIF state_machine_un13_clk_000_d_i_n.BLIF VMA_INT_1_sqmuxa 11 1 -.names CLK_OSZI_c.BLIF IPL_030DFFSH_2_reg.C -1 1 .names inst_AS_000_INTreg.BLIF AS_000_INT_i 0 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C +1 1 .names dsack_c_1__n.BLIF dsack_i_1__n 0 1 -.names RST_i.BLIF IPL_030DFFSH_2_reg.AP -1 1 .names AS_000_INT_i.BLIF dsack_i_1__n.BLIF state_machine_un13_as_000_int_n 11 1 -.names AS_030_c.BLIF AS_030_i -0 1 -.names AS_030_i.BLIF N_110_i.BLIF DSACK_INT_1_sqmuxa -11 1 +.names RST_i.BLIF SM_AMIGA_1_.AR +1 1 .names inst_CLK_000_D.BLIF CLK_000_D_i 0 1 -.names CLK_OSZI_c.BLIF cpu_est_0_.C -1 1 .names CLK_000_D_i.BLIF CLK_000_c.BLIF inst_RISING_CLK_AMIGA.D 11 1 .names cpu_est_d_3_.BLIF cpu_est_d_i_3__n 0 1 .names cpu_est_d_0_.BLIF cpu_est_d_i_0__n 0 1 -.names N_108.BLIF N_108_i -0 1 -.names CLK_OSZI_c.BLIF cpu_est_1_.C +.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C 1 1 -.names N_119_i.BLIF N_123_i.BLIF SM_AMIGA_1_.D -11 1 -.names N_117_i.BLIF N_118_i.BLIF sm_amiga_ns_0_5__n -11 1 -.names N_113_i.BLIF N_114_i.BLIF sm_amiga_ns_0_2__n -11 1 -.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n -0 1 -.names CLK_OSZI_c.BLIF cpu_est_2_.C -1 1 -.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n -0 1 -.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_123 -11 1 -.names state_machine_un13_clk_000_d_1_n.BLIF state_machine_un13_clk_000_d_1_i_n -0 1 -.names SM_AMIGA_0_.BLIF state_machine_un13_clk_000_d_1_i_n.BLIF N_120 -11 1 -.names CLK_OSZI_c.BLIF cpu_est_3_reg.C -1 1 -.names CLK_000_D_i.BLIF N_102.BLIF N_119 -11 1 -.names CLK_000_D_i.BLIF SM_AMIGA_2_.BLIF N_117 -11 1 -.names inst_CLK_000_D.BLIF SM_AMIGA_5_.BLIF N_113 -11 1 -.names N_161_i.BLIF state_machine_un31_clk_000_d_n.BLIF state_machine_lds_000_int_8_0_n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_7_.C -1 1 -.names a_c_i_0__n.BLIF N_161_i.BLIF state_machine_uds_000_int_8_0_n -11 1 -.names AS_030_i.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF DTACK_SYNC_1_sqmuxa_1 -11 1 -.names RST_i.BLIF SM_AMIGA_7_.AP -1 1 -.names AS_030_i.BLIF N_161.BLIF un2_clk_030_1 -11 1 -.names state_machine_un1_clk_030_n.BLIF bg_000_0_un3_n -0 1 -.names un1_bg_030.BLIF state_machine_un1_clk_030_n.BLIF bg_000_0_un1_n -11 1 -.names cpu_est_0_.BLIF cpu_est_d_0_.D -1 1 -.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n -11 1 -.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF BG_000DFFSHreg.D -1- 1 --1 1 -.names CLK_OSZI_c.BLIF cpu_est_d_0_.C -1 1 -.names state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un3_n -0 1 -.names state_machine_as_030_000_sync_3_n.BLIF state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un1_n -11 1 -.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n -11 1 -.names cpu_est_1_.BLIF cpu_est_d_1_.D -1 1 -.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF inst_AS_030_000_SYNC.D -1- 1 --1 1 -.names state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un3_n -0 1 -.names CLK_OSZI_c.BLIF cpu_est_d_1_.C -1 1 -.names AS_030.BLIF AS_030_c -1 1 -.names un1_as_030_2.BLIF state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un1_n -11 1 -.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n -11 1 -.names DS_030.BLIF DS_030_c -1 1 -.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D -1- 1 --1 1 -.names cpu_est_2_.BLIF cpu_est_d_2_.D -1 1 -.names CLK_OSZI_c.BLIF cpu_est_d_2_.C -1 1 -.names SIZE_0_.BLIF size_c_0__n -1 1 -.names inst_AS_000_INTreg.BLIF inst_CLK_000_D.BLIF state_machine_un13_clk_000_d_1_n -11 1 -.names SIZE_1_.BLIF size_c_1__n -1 1 -.names cpu_est_3_reg.BLIF cpu_est_i_3__n -0 1 -.names A_0_.BLIF a_c_0__n -1 1 -.names DTACK_c.BLIF DTACK_i -0 1 -.names cpu_est_3_reg.BLIF cpu_est_d_3_.D -1 1 -.names A_16_.BLIF a_c_16__n -1 1 -.names inst_CLK_000_D.BLIF SM_AMIGA_3_.BLIF VPA_SYNC_1_sqmuxa_1_0 -11 1 -.names A_17_.BLIF a_c_17__n -1 1 -.names inst_VPA_D.BLIF VPA_D_i -0 1 -.names CLK_OSZI_c.BLIF cpu_est_d_3_.C -1 1 -.names A_18_.BLIF a_c_18__n -1 1 -.names inst_VMA_INTreg.BLIF VMA_INT_i -0 1 -.names A_19_.BLIF a_c_19__n -1 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n -0 1 -.names A_20_.BLIF a_c_20__n -1 1 -.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n -0 1 -.names A_21_.BLIF a_c_21__n -1 1 -.names CLK_OUT_PRE_i.BLIF SM_AMIGA_1_.BLIF N_102_0 -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_D_0_.C -1 1 -.names A_22_.BLIF a_c_22__n -1 1 -.names N_110_i.BLIF N_120_i.BLIF sm_amiga_ns_0_7__n -11 1 -.names A_23_.BLIF a_c_23__n -1 1 -.names A_24_.BLIF a_c_24__n -1 1 -.names A_25_.BLIF a_c_25__n -1 1 -.names state_machine_un42_clk_030_n.BLIF state_machine_un42_clk_030_i_n -0 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_D_1_.C -1 1 -.names A_26_.BLIF a_c_26__n -1 1 -.names AS_030_i.BLIF state_machine_un42_clk_030_n.BLIF un1_as_030_2_0 -11 1 -.names A_27_.BLIF a_c_27__n -1 1 -.names AS_030_i.BLIF CLK_030_i.BLIF state_machine_un17_clk_030_0_n -11 1 -.names A_28_.BLIF a_c_28__n -1 1 -.names CLK_030_c.BLIF CLK_030_i -0 1 -.names A_29_.BLIF a_c_29__n -1 1 -.names BG_030_c_i.BLIF CLK_030_c.BLIF state_machine_un1_clk_030_0_n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_D_2_.C -1 1 -.names A_30_.BLIF a_c_30__n -1 1 -.names BGACK_000_c.BLIF RISING_CLK_AMIGA_i.BLIF state_machine_un4_bgack_000_0_n -11 1 -.names A_31_.BLIF a_c_31__n -1 1 -.names a_c_19__n.BLIF a_i_19__n -0 1 -.names CPU_SPACE.BLIF CPU_SPACE_c -1 1 -.names a_c_18__n.BLIF a_i_18__n -0 1 -.names a_c_16__n.BLIF a_i_16__n -0 1 -.names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C -1 1 -.names BG_030.BLIF BG_030_c -1 1 -.names inst_RISING_CLK_AMIGA.BLIF ipl_030_0_2__un3_n -0 1 -.names BG_000DFFSHreg.BLIF BG_000 -1 1 -.names ipl_c_2__n.BLIF inst_RISING_CLK_AMIGA.BLIF ipl_030_0_2__un1_n -11 1 -.names RST_i.BLIF IPL_030DFFSH_0_reg.AP -1 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030 -1 1 -.names IPL_030DFFSH_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n -11 1 -.names BGACK_000.BLIF BGACK_000_c -1 1 -.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF IPL_030DFFSH_2_reg.D -1- 1 --1 1 -.names CLK_030.BLIF CLK_030_c -1 1 -.names inst_RISING_CLK_AMIGA.BLIF ipl_030_0_1__un3_n -0 1 -.names CLK_000.BLIF CLK_000_c -1 1 -.names ipl_c_1__n.BLIF inst_RISING_CLK_AMIGA.BLIF ipl_030_0_1__un1_n -11 1 -.names CLK_OSZI_c.BLIF inst_AS_000_INTreg.C -1 1 -.names CLK_OSZI.BLIF CLK_OSZI_c -1 1 -.names IPL_030DFFSH_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n -11 1 -.names inst_CLK_OUT_INTreg.BLIF CLK_DIV_OUT -1 1 -.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF IPL_030DFFSH_1_reg.D -1- 1 --1 1 -.names RST_i.BLIF inst_AS_000_INTreg.AP -1 1 -.names clk_exp_i.BLIF CLK_EXP -1 1 -.names inst_RISING_CLK_AMIGA.BLIF ipl_030_0_0__un3_n -0 1 -.names inst_FPU_CS_INTreg.BLIF FPU_CS -1 1 -.names ipl_c_0__n.BLIF inst_RISING_CLK_AMIGA.BLIF ipl_030_0_0__un1_n -11 1 -.names IPL_030DFFSH_0_reg.BLIF IPL_030_0_ -1 1 -.names IPL_030DFFSH_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n -11 1 -.names IPL_030DFFSH_1_reg.BLIF IPL_030_1_ -1 1 -.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF IPL_030DFFSH_0_reg.D -1- 1 --1 1 -.names CLK_OSZI_c.BLIF inst_VPA_SYNC.C -1 1 -.names IPL_030DFFSH_2_reg.BLIF IPL_030_2_ -1 1 -.names state_machine_un4_bgack_000_n.BLIF bgack_030_int_0_un3_n -0 1 -.names IPL_0_.BLIF ipl_c_0__n -1 1 -.names BGACK_000_c.BLIF state_machine_un4_bgack_000_n.BLIF bgack_030_int_0_un1_n -11 1 -.names RST_i.BLIF inst_VPA_SYNC.AP -1 1 -.names IPL_1_.BLIF ipl_c_1__n -1 1 -.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un0_n -11 1 -.names IPL_2_.BLIF ipl_c_2__n -1 1 -.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF inst_BGACK_030_INTreg.D -1- 1 --1 1 -.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_137_i -11 1 -.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_138_i -11 1 -.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C -1 1 -.names UDS_000_INT_0_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_1_i -0 1 -.names vcc_n_n.BLIF AVEC -1 1 -.names UDS_000_INT_0_sqmuxa.BLIF UDS_000_INT_0_sqmuxa_i -0 1 -.names RST_i.BLIF inst_AS_030_000_SYNC.AP -1 1 -.names UDS_000_INT_0_sqmuxa_1_i.BLIF UDS_000_INT_0_sqmuxa_i.BLIF N_161 -11 1 -.names cpu_est_3_reg.BLIF E -1 1 -.names cpu_est_2_.BLIF cpu_est_i_2__n -0 1 -.names VPA.BLIF inst_VPA_D.D -1 1 -.names N_147_1.BLIF cpu_est_i_2__n.BLIF N_147 -11 1 -.names inst_VMA_INTreg.BLIF VMA -1 1 -.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n -0 1 -.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C -1 1 -.names RST.BLIF RST_c -1 1 -.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n -0 1 -.names RESETDFFreg.BLIF RESET -1 1 -.names cpu_est_0_.BLIF cpu_est_i_0__n -0 1 -.names RST_i.BLIF inst_VMA_INTreg.AP -1 1 -.names RW.BLIF RW_c -1 1 -.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_147_1 -11 1 -.names FC_0_.BLIF fc_c_0__n -1 1 -.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i -0 1 -.names FC_1_.BLIF fc_c_1__n -1 1 -.names cpu_est_1_.BLIF cpu_est_i_1__n -0 1 -.names gnd_n_n.BLIF AMIGA_BUS_ENABLE -1 1 -.names DS_030_c.BLIF DS_030_i -0 1 -.names CLK_OSZI_c.BLIF BG_000DFFSHreg.C -1 1 -.names RW_i.BLIF AMIGA_BUS_DATA_DIR -1 1 -.names vcc_n_n.BLIF AMIGA_BUS_ENABLE_LOW -1 1 -.names AS_030_000_SYNC_i.BLIF clk_un3_clk_000_dd_n.BLIF N_122 -11 1 -.names RST_i.BLIF BG_000DFFSHreg.AP -1 1 -.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n -0 1 -.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF VPA_SYNC_1_sqmuxa_1_1 -11 1 -.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_124 -11 1 -.names N_147_1.BLIF VMA_INT_i.BLIF VPA_SYNC_1_sqmuxa_2 -11 1 -.names N_111_i.BLIF N_112_i.BLIF sm_amiga_ns_0_0__n -11 1 -.names VPA_D_i.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_3 -11 1 -.names CLK_000_D_i.BLIF N_124_i.BLIF SM_AMIGA_4_.D -11 1 -.names CLK_OSZI_c.BLIF DSACK_INT_1_.C -1 1 -.names VPA_SYNC_1_sqmuxa_1_1.BLIF VPA_SYNC_1_sqmuxa_2.BLIF VPA_SYNC_1_sqmuxa_4 -11 1 -.names N_115_i.BLIF N_116_i.BLIF SM_AMIGA_3_.D -11 1 -.names VPA_SYNC_1_sqmuxa_4.BLIF VPA_SYNC_1_sqmuxa_3.BLIF VPA_SYNC_1_sqmuxa -11 1 -.names SM_AMIGA_3_.BLIF state_machine_un57_clk_000_d_0_n.BLIF N_101_0 -11 1 -.names RST_i.BLIF DSACK_INT_1_.AP -1 1 -.names N_123.BLIF sm_amiga_i_0__n.BLIF N_108_1 -11 1 -.names N_137.BLIF cpu_est_i_0__n.BLIF N_139 -11 1 -.names N_108_1.BLIF sm_amiga_i_3__n.BLIF N_108 -11 1 -.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_140 -11 1 -.names CLK_000_D_i.BLIF SM_AMIGA_3_.BLIF N_118_1 -11 1 -.names N_137_i.BLIF cpu_est_0_.BLIF N_141 -11 1 -.names N_118_1.BLIF state_machine_un57_clk_000_d_n.BLIF N_118 -11 1 -.names N_136_i.BLIF cpu_est_3_reg.BLIF N_142 -11 1 -.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C -1 1 -.names CLK_000_D_i.BLIF inst_CLK_OUT_PRE.BLIF N_110_1 -11 1 -.names N_138.BLIF cpu_est_3_reg.BLIF N_145 -11 1 -.names N_110_1.BLIF SM_AMIGA_1_.BLIF N_110 -11 1 -.names N_138_i.BLIF cpu_est_i_2__n.BLIF N_146 -11 1 -.names RST_i.BLIF inst_BGACK_030_INTreg.AP -1 1 -.names G_100.BLIF G_98.BLIF clk_exp_1 -11 1 -.names N_143_i.BLIF N_144_i.BLIF N_134_i -11 1 -.names clk_exp_1.BLIF G_99.BLIF clk_exp -11 1 -.names cpu_est_1_.BLIF cpu_est_2_.BLIF N_136_i -11 1 -.names fc_c_1__n.BLIF BGACK_000_c.BLIF state_machine_un42_clk_030_3_n -11 1 -.names a_c_26__n.BLIF a_i_26__n -0 1 -.names state_machine_un42_clk_030_1_n.BLIF state_machine_un42_clk_030_2_n.BLIF state_machine_un42_clk_030_4_n -11 1 -.names a_c_27__n.BLIF a_i_27__n -0 1 -.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C -1 1 -.names state_machine_un42_clk_030_3_n.BLIF fc_c_0__n.BLIF state_machine_un42_clk_030_5_n -11 1 -.names a_c_28__n.BLIF a_i_28__n -0 1 -.names state_machine_un42_clk_030_4_n.BLIF state_machine_un42_clk_030_5_n.BLIF state_machine_un42_clk_030_n -11 1 -.names a_c_29__n.BLIF a_i_29__n -0 1 -.names cpu_est_d_i_0__n.BLIF cpu_est_d_i_3__n.BLIF state_machine_un13_clk_000_d_1_0_n -11 1 -.names a_c_30__n.BLIF a_i_30__n -0 1 -.names state_machine_un13_clk_000_d_1_0_n.BLIF state_machine_un13_clk_000_d_4_n.BLIF state_machine_un13_clk_000_d_n -11 1 -.names a_c_31__n.BLIF a_i_31__n -0 1 -.names CLK_OSZI_c.BLIF inst_UDS_000_INTreg.C -1 1 -.names state_machine_un13_clk_000_d_1_n.BLIF cpu_est_d_1_.BLIF state_machine_un13_clk_000_d_4_1_n -11 1 -.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n -0 1 -.names state_machine_un13_clk_000_d_4_1_n.BLIF cpu_est_d_2_.BLIF state_machine_un13_clk_000_d_4_n -11 1 -.names sm_amiga_i_6__n.BLIF sm_amiga_i_7__n.BLIF N_109 -11 1 -.names RST_i.BLIF inst_UDS_000_INTreg.AP -1 1 -.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF state_machine_un8_clk_000_d_1_n -11 1 -.names inst_CLK_000_D.BLIF SM_AMIGA_7_.BLIF N_111 -11 1 -.names CLK_000_D_i.BLIF VPA_D_i.BLIF state_machine_un8_clk_000_d_2_n -11 1 -.names SM_AMIGA_0_.BLIF state_machine_un13_clk_000_d_1_n.BLIF N_112 -11 1 -.names cpu_est_0_.BLIF cpu_est_2_.BLIF state_machine_un8_clk_000_d_3_n -11 1 -.names N_122.BLIF SM_AMIGA_6_.BLIF N_114 -11 1 -.names state_machine_un8_clk_000_d_1_n.BLIF state_machine_un8_clk_000_d_2_n.BLIF state_machine_un8_clk_000_d_4_n -11 1 -.names CLK_000_D_i.BLIF N_101.BLIF N_115 -11 1 -.names CLK_OSZI_c.BLIF inst_LDS_000_INTreg.C -1 1 -.names state_machine_un8_clk_000_d_4_n.BLIF state_machine_un8_clk_000_d_3_n.BLIF state_machine_un8_clk_000_d_n -11 1 -.names sm_amiga_i_3__n.BLIF sm_amiga_i_4__n.BLIF N_116 -11 1 -.names DTACK_i.BLIF inst_VPA_D.BLIF DTACK_SYNC_1_sqmuxa_1_0 -11 1 -.names inst_CLK_000_DD.BLIF CLK_000_DD_i -0 1 -.names RST_i.BLIF inst_LDS_000_INTreg.AP -1 1 -.names DTACK_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF DTACK_SYNC_1_sqmuxa -11 1 -.names inst_CLK_000_D.BLIF CLK_000_DD_i.BLIF clk_un3_clk_000_dd_n -11 1 -.names N_144_1.BLIF cpu_est_i_2__n.BLIF N_144 -11 1 -.names state_machine_un13_as_000_int_n.BLIF inst_DTACK_DMA.D -0 1 -.names sm_amiga_i_0__n.BLIF sm_amiga_i_2__n.BLIF N_106_1 -11 1 -.names RST_c.BLIF RST_i -0 1 -.names sm_amiga_i_4__n.BLIF sm_amiga_i_6__n.BLIF N_106_2 -11 1 -.names CLK_CNT_0_.BLIF CLK_CNT_0_.D -0 1 -.names CLK_OSZI_c.BLIF inst_DTACK_SYNC.C -1 1 -.names N_106_1.BLIF N_106_2.BLIF N_106 -11 1 -.names a_c_24__n.BLIF a_i_24__n -0 1 -.names N_124.BLIF sm_amiga_i_0__n.BLIF N_107_1 -11 1 -.names a_c_25__n.BLIF a_i_25__n -0 1 -.names RST_i.BLIF inst_DTACK_SYNC.AP -1 1 -.names N_107_1.BLIF sm_amiga_i_1__n.BLIF N_107 -11 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i -0 1 -.names AS_030_000_SYNC_i.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_1 -11 1 -.names CPU_SPACE_c.BLIF CPU_SPACE_i -0 1 -.names RW_c.BLIF SM_AMIGA_6_.BLIF UDS_000_INT_0_sqmuxa_1_2 -11 1 -.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i -0 1 -.names UDS_000_INT_0_sqmuxa_1_1.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF UDS_000_INT_0_sqmuxa_1_3 -11 1 -.names N_106.BLIF N_106_i -0 1 -.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C -1 1 -.names UDS_000_INT_0_sqmuxa_1_3.BLIF clk_un3_clk_000_dd_n.BLIF UDS_000_INT_0_sqmuxa_1 -11 1 -.names RST_c.BLIF sm_amiga_d_0_0__un3_n -0 1 -.names inst_CLK_000_D.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_0 -11 1 -.names N_106_i.BLIF RST_c.BLIF sm_amiga_d_0_0__un1_n -11 1 -.names RST_i.BLIF inst_FPU_CS_INTreg.AP -1 1 -.names RW_i.BLIF SM_AMIGA_4_.BLIF UDS_000_INT_0_sqmuxa_2 -11 1 -.names SM_AMIGA_D_0_.BLIF sm_amiga_d_0_0__un3_n.BLIF sm_amiga_d_0_0__un0_n -11 1 -.names UDS_000_INT_0_sqmuxa_1_0.BLIF UDS_000_INT_0_sqmuxa_2.BLIF UDS_000_INT_0_sqmuxa -11 1 -.names sm_amiga_d_0_0__un1_n.BLIF sm_amiga_d_0_0__un0_n.BLIF SM_AMIGA_D_0_.D -1- 1 --1 1 -.names a_c_17__n.BLIF a_i_16__n.BLIF state_machine_un42_clk_030_1_n -11 1 -.names N_107.BLIF N_107_i -0 1 -.names a_i_18__n.BLIF a_i_19__n.BLIF state_machine_un42_clk_030_2_n -11 1 -.names RST_c.BLIF sm_amiga_d_0_1__un3_n -0 1 -.names CLK_OSZI_c.BLIF inst_DTACK_DMA.C -1 1 -.names a_i_30__n.BLIF a_i_31__n.BLIF N_186_4 -11 1 -.names N_107_i.BLIF RST_c.BLIF sm_amiga_d_0_1__un1_n -11 1 -.names N_186_1.BLIF N_186_2.BLIF N_186_5 -11 1 -.names SM_AMIGA_D_1_.BLIF sm_amiga_d_0_1__un3_n.BLIF sm_amiga_d_0_1__un0_n -11 1 -.names RST_i.BLIF inst_DTACK_DMA.AP -1 1 -.names N_186_3.BLIF N_186_4.BLIF N_186_6 -11 1 -.names sm_amiga_d_0_1__un1_n.BLIF sm_amiga_d_0_1__un0_n.BLIF SM_AMIGA_D_1_.D -1- 1 --1 1 -.names N_186_5.BLIF N_186_6.BLIF N_186 -11 1 -.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_1__un3_n -0 1 -.names a_c_20__n.BLIF a_c_21__n.BLIF N_189_1 -11 1 -.names clk_cpu_est_11_1__n.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_1__un1_n -11 1 -.names a_c_22__n.BLIF a_c_23__n.BLIF N_189_2 -11 1 -.names cpu_est_1_.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n -11 1 -.names CLK_OSZI_c.BLIF inst_RISING_CLK_AMIGA.C -1 1 -.names N_189_1.BLIF N_189_2.BLIF N_189 -11 1 -.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D -1- 1 --1 1 -.names N_139_i.BLIF N_140_i.BLIF clk_cpu_est_11_0_1_1__n -11 1 -.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_2__un3_n -0 1 -.names N_141_i.BLIF N_142_i.BLIF clk_cpu_est_11_0_2_1__n -11 1 -.names N_134_i.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_2__un1_n -11 1 -.names clk_cpu_est_11_0_1_1__n.BLIF clk_cpu_est_11_0_2_1__n.BLIF clk_cpu_est_11_0_1__n -11 1 -.names cpu_est_2_.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n -11 1 -.names CLK_OSZI_c.BLIF CLK_CNT_0_.C -1 1 -.names N_147_i.BLIF N_145_i.BLIF clk_cpu_est_11_0_1_3__n -11 1 -.names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D -1- 1 --1 1 -.names clk_cpu_est_11_0_1_3__n.BLIF N_146_i.BLIF clk_cpu_est_11_0_3__n -11 1 .names clk_un3_clk_000_dd_n.BLIF cpu_est_0_3__un3_n 0 1 -.names N_136.BLIF cpu_est_0_.BLIF N_143_1 -11 1 .names clk_cpu_est_11_3__n.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_3__un1_n 11 1 -.names N_143_1.BLIF cpu_est_i_3__n.BLIF N_143 -11 1 -.names cpu_est_3_reg.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n -11 1 -.names CLK_OSZI_c.BLIF inst_VPA_D.C +.names RST_i.BLIF SM_AMIGA_0_.AR 1 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_144_1 +.names cpu_est_3_reg.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n 11 1 .names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_reg.D 1- 1 -1 1 -.names N_124.BLIF N_124_i +.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_2__un3_n 0 1 -.names gnd_n_n -.names N_112.BLIF N_112_i +.names cpu_est_0_.BLIF cpu_est_d_0_.D +1 1 +.names N_122_i.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_2__un1_n +11 1 +.names cpu_est_2_.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n +11 1 +.names CLK_OSZI_c.BLIF cpu_est_d_0_.C +1 1 +.names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D +1- 1 +-1 1 +.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_1__un3_n +0 1 +.names clk_cpu_est_11_1__n.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_1__un1_n +11 1 +.names cpu_est_1_.BLIF cpu_est_d_1_.D +1 1 +.names cpu_est_1_.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n +11 1 +.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D +1- 1 +-1 1 +.names CLK_OSZI_c.BLIF cpu_est_d_1_.C +1 1 +.names inst_CLK_000_D.BLIF CLK_000_DD_i.BLIF clk_un3_clk_000_dd_n +11 1 +.names state_machine_un13_clk_000_d_1_n.BLIF state_machine_un13_clk_000_d_1_i_n +0 1 +.names SM_AMIGA_0_.BLIF state_machine_un13_clk_000_d_1_i_n.BLIF N_110 +11 1 +.names cpu_est_2_.BLIF cpu_est_d_2_.D +1 1 +.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n +0 1 +.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n +0 1 +.names CLK_OSZI_c.BLIF cpu_est_d_2_.C +1 1 +.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_103 +11 1 +.names N_112.BLIF SM_AMIGA_6_.BLIF N_102 +11 1 +.names inst_CLK_000_D.BLIF SM_AMIGA_5_.BLIF N_101 +11 1 +.names cpu_est_3_reg.BLIF cpu_est_d_3_.D +1 1 +.names N_92.BLIF sm_amiga_i_6__n.BLIF N_100 +11 1 +.names N_91.BLIF sm_amiga_i_7__n.BLIF N_99 +11 1 +.names CLK_OSZI_c.BLIF cpu_est_d_3_.C +1 1 +.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n +0 1 +.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n +0 1 +.names sm_amiga_i_6__n.BLIF sm_amiga_i_7__n.BLIF N_97 +11 1 +.names N_145_i.BLIF state_machine_un31_clk_000_d_n.BLIF state_machine_lds_000_int_8_0_n +11 1 +.names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C +1 1 +.names a_c_i_0__n.BLIF N_145_i.BLIF state_machine_uds_000_int_8_0_n +11 1 +.names cpu_est_2_.BLIF cpu_est_i_2__n +0 1 +.names RST_i.BLIF IPL_030DFFSH_0_reg.AP +1 1 +.names cpu_est_3_reg.BLIF cpu_est_i_3__n +0 1 +.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_128 +11 1 +.names cpu_est_0_.BLIF cpu_est_i_0__n +0 1 +.names N_125.BLIF cpu_est_i_0__n.BLIF N_127 +11 1 +.names CLK_OSZI_c.BLIF IPL_030DFFSH_1_reg.C +1 1 +.names CLK_000_D_i.BLIF SM_AMIGA_7_.BLIF N_92_0 +11 1 +.names inst_AS_000_INTreg.BLIF SM_AMIGA_0_.BLIF N_91_0 +11 1 +.names RST_i.BLIF IPL_030DFFSH_1_reg.AP +1 1 +.names N_98_i.BLIF N_110_i.BLIF sm_amiga_ns_0_7__n +11 1 +.names CLK_000_D_i.BLIF N_103_i.BLIF SM_AMIGA_4_.D +11 1 +.names N_101_i.BLIF N_102_i.BLIF sm_amiga_ns_0_2__n +11 1 +.names N_100_i.BLIF N_112_i.BLIF SM_AMIGA_6_.D +11 1 +.names CLK_OSZI_c.BLIF IPL_030DFFSH_2_reg.C +1 1 +.names inst_CLK_000_D.BLIF N_99_i.BLIF SM_AMIGA_7_.D +11 1 +.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i +0 1 +.names RST_i.BLIF IPL_030DFFSH_2_reg.AP +1 1 +.names AS_030_000_SYNC_i.BLIF clk_un3_clk_000_dd_n.BLIF N_112 +11 1 +.names inst_CLK_000_DD.BLIF CLK_000_DD_i +0 1 +.names DS_030_c.BLIF DS_030_i +0 1 +.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_135_1 +11 1 +.names CLK_OSZI_c.BLIF cpu_est_0_.C +1 1 +.names N_135_1.BLIF cpu_est_i_2__n.BLIF N_135 +11 1 +.names UDS_000_INT_0_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_1_i +0 1 +.names UDS_000_INT_0_sqmuxa.BLIF UDS_000_INT_0_sqmuxa_i +0 1 +.names UDS_000_INT_0_sqmuxa_1_i.BLIF UDS_000_INT_0_sqmuxa_i.BLIF N_145 +11 1 +.names CLK_OSZI_c.BLIF cpu_est_1_.C +1 1 +.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_126_i +11 1 +.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_125_i +11 1 +.names cpu_est_1_.BLIF cpu_est_i_1__n +0 1 +.names cpu_est_1_.BLIF cpu_est_2_.BLIF N_124_i +11 1 +.names CLK_OSZI_c.BLIF cpu_est_2_.C +1 1 +.names N_131_i.BLIF N_132_i.BLIF N_122_i +11 1 +.names N_126_i.BLIF cpu_est_i_2__n.BLIF N_134 +11 1 +.names N_126.BLIF cpu_est_3_reg.BLIF N_133 +11 1 +.names N_124_i.BLIF cpu_est_3_reg.BLIF N_130 +11 1 +.names CLK_OSZI_c.BLIF inst_VPA_SYNC.C +1 1 +.names N_125_i.BLIF cpu_est_0_.BLIF N_129 +11 1 +.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF state_machine_un57_clk_000_d_0_n +11 1 +.names RST_i.BLIF inst_VPA_SYNC.AP +1 1 +.names state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un3_n +0 1 +.names un1_as_030_2.BLIF state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un1_n +11 1 +.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n +11 1 +.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D +1- 1 +-1 1 +.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C +1 1 +.names AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un3_n +0 1 +.names AS_030.BLIF AS_030_c +1 1 +.names inst_AS_000_INTreg.BLIF AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un1_n +11 1 +.names RST_i.BLIF inst_AS_030_000_SYNC.AP +1 1 +.names N_102_i.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n +11 1 +.names DS_030.BLIF DS_030_c +1 1 +.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INTreg.D +1- 1 +-1 1 +.names VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un3_n +0 1 +.names inst_VPA_SYNC.BLIF VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un1_n +11 1 +.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C +1 1 +.names SIZE_0_.BLIF size_c_0__n +1 1 +.names VPA_SYNC_1_sqmuxa_i.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n +11 1 +.names SIZE_1_.BLIF size_c_1__n +1 1 +.names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D +1- 1 +-1 1 +.names RST_i.BLIF inst_VMA_INTreg.AP +1 1 +.names A_0_.BLIF a_c_0__n +1 1 +.names state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un3_n +0 1 +.names A_16_.BLIF a_c_16__n +1 1 +.names state_machine_as_030_000_sync_3_n.BLIF state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un1_n +11 1 +.names A_17_.BLIF a_c_17__n +1 1 +.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n +11 1 +.names A_18_.BLIF a_c_18__n +1 1 +.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF inst_AS_030_000_SYNC.D +1- 1 +-1 1 +.names CLK_OSZI_c.BLIF BG_000DFFSHreg.C +1 1 +.names A_19_.BLIF a_c_19__n +1 1 +.names AS_030_i.BLIF CLK_030_i.BLIF state_machine_un17_clk_030_0_n +11 1 +.names A_20_.BLIF a_c_20__n +1 1 +.names N_102.BLIF N_102_i +0 1 +.names RST_i.BLIF BG_000DFFSHreg.AP +1 1 +.names A_21_.BLIF a_c_21__n +1 1 +.names AS_030_i.BLIF N_102_i.BLIF AS_000_INT_1_sqmuxa +11 1 +.names A_22_.BLIF a_c_22__n +1 1 +.names VPA_SYNC_1_sqmuxa.BLIF VPA_SYNC_1_sqmuxa_i +0 1 +.names A_23_.BLIF a_c_23__n +1 1 +.names AS_030_i.BLIF VPA_SYNC_1_sqmuxa_i.BLIF VPA_SYNC_1_sqmuxa_1 +11 1 +.names A_24_.BLIF a_c_24__n +1 1 +.names state_machine_un42_clk_030_n.BLIF state_machine_un42_clk_030_i_n +0 1 +.names CLK_OSZI_c.BLIF DSACK_INT_1_.C +1 1 +.names A_25_.BLIF a_c_25__n +1 1 +.names AS_030_i.BLIF state_machine_un42_clk_030_n.BLIF un1_as_030_2_0 +11 1 +.names A_26_.BLIF a_c_26__n +1 1 +.names RST_i.BLIF DSACK_INT_1_.AP +1 1 +.names A_27_.BLIF a_c_27__n +1 1 +.names inst_AS_000_INTreg.BLIF inst_CLK_000_D.BLIF state_machine_un13_clk_000_d_1_n +11 1 +.names A_28_.BLIF a_c_28__n +1 1 +.names inst_VPA_D.BLIF VPA_D_i +0 1 +.names A_29_.BLIF a_c_29__n +1 1 +.names CLK_030_c.BLIF CLK_030_i +0 1 +.names A_30_.BLIF a_c_30__n +1 1 +.names BG_030_c_i.BLIF CLK_030_c.BLIF state_machine_un1_clk_030_0_n +11 1 +.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C +1 1 +.names A_31_.BLIF a_c_31__n +1 1 +.names BGACK_000_c.BLIF RISING_CLK_AMIGA_i.BLIF state_machine_un4_bgack_000_0_n +11 1 +.names CPU_SPACE.BLIF CPU_SPACE_c +1 1 +.names a_c_19__n.BLIF a_i_19__n +0 1 +.names RST_i.BLIF inst_BGACK_030_INTreg.AP +1 1 +.names a_c_18__n.BLIF a_i_18__n +0 1 +.names BG_030.BLIF BG_030_c +1 1 +.names a_c_16__n.BLIF a_i_16__n +0 1 +.names BG_000DFFSHreg.BLIF BG_000 +1 1 +.names inst_RISING_CLK_AMIGA.BLIF ipl_030_0_2__un3_n +0 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030 +1 1 +.names ipl_c_2__n.BLIF inst_RISING_CLK_AMIGA.BLIF ipl_030_0_2__un1_n +11 1 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C +1 1 +.names BGACK_000.BLIF BGACK_000_c +1 1 +.names IPL_030DFFSH_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n +11 1 +.names CLK_030.BLIF CLK_030_c +1 1 +.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF IPL_030DFFSH_2_reg.D +1- 1 +-1 1 +.names CLK_000.BLIF CLK_000_c +1 1 +.names inst_RISING_CLK_AMIGA.BLIF ipl_030_0_1__un3_n +0 1 +.names CLK_OSZI.BLIF CLK_OSZI_c +1 1 +.names ipl_c_1__n.BLIF inst_RISING_CLK_AMIGA.BLIF ipl_030_0_1__un1_n +11 1 +.names CLK_OSZI_c.BLIF inst_UDS_000_INTreg.C +1 1 +.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT +1 1 +.names IPL_030DFFSH_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n +11 1 +.names CLK_OUT_INTreg.BLIF CLK_EXP +1 1 +.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF IPL_030DFFSH_1_reg.D +1- 1 +-1 1 +.names RST_i.BLIF inst_UDS_000_INTreg.AP +1 1 +.names inst_FPU_CS_INTreg.BLIF FPU_CS +1 1 +.names inst_RISING_CLK_AMIGA.BLIF ipl_030_0_0__un3_n +0 1 +.names IPL_030DFFSH_0_reg.BLIF IPL_030_0_ +1 1 +.names ipl_c_0__n.BLIF inst_RISING_CLK_AMIGA.BLIF ipl_030_0_0__un1_n +11 1 +.names IPL_030DFFSH_1_reg.BLIF IPL_030_1_ +1 1 +.names IPL_030DFFSH_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n +11 1 +.names IPL_030DFFSH_2_reg.BLIF IPL_030_2_ +1 1 +.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF IPL_030DFFSH_0_reg.D +1- 1 +-1 1 +.names CLK_OSZI_c.BLIF inst_LDS_000_INTreg.C +1 1 +.names IPL_0_.BLIF ipl_c_0__n +1 1 +.names state_machine_un4_bgack_000_n.BLIF bgack_030_int_0_un3_n +0 1 +.names IPL_1_.BLIF ipl_c_1__n +1 1 +.names BGACK_000_c.BLIF state_machine_un4_bgack_000_n.BLIF bgack_030_int_0_un1_n +11 1 +.names RST_i.BLIF inst_LDS_000_INTreg.AP +1 1 +.names IPL_2_.BLIF ipl_c_2__n +1 1 +.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un0_n +11 1 +.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF inst_BGACK_030_INTreg.D +1- 1 +-1 1 +.names N_98.BLIF N_98_i +0 1 +.names DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un3_n +0 1 +.names CLK_OSZI_c.BLIF inst_DTACK_SYNC.C +1 1 +.names vcc_n_n.BLIF AVEC +1 1 +.names DSACK_INT_1_.BLIF DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un1_n +11 1 +.names N_98_i.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un0_n +11 1 +.names RST_i.BLIF inst_DTACK_SYNC.AP +1 1 +.names cpu_est_3_reg.BLIF E +1 1 +.names dsack_int_0_1__un1_n.BLIF dsack_int_0_1__un0_n.BLIF DSACK_INT_1_.D +1- 1 +-1 1 +.names VPA.BLIF inst_VPA_D.D +1 1 +.names state_machine_un1_clk_030_n.BLIF bg_000_0_un3_n +0 1 +.names inst_VMA_INTreg.BLIF VMA +1 1 +.names un1_bg_030.BLIF state_machine_un1_clk_030_n.BLIF bg_000_0_un1_n +11 1 +.names RST.BLIF RST_c +1 1 +.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C +1 1 +.names RESETDFFreg.BLIF RESET +1 1 +.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF BG_000DFFSHreg.D +1- 1 +-1 1 +.names RW.BLIF RW_c +1 1 +.names DTACK_SYNC_1_sqmuxa.BLIF DTACK_SYNC_1_sqmuxa_i +0 1 +.names RST_i.BLIF inst_FPU_CS_INTreg.AP +1 1 +.names FC_0_.BLIF fc_c_0__n +1 1 +.names DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un3_n +0 1 +.names FC_1_.BLIF fc_c_1__n +1 1 +.names inst_DTACK_SYNC.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un1_n +11 1 +.names gnd_n_n.BLIF AMIGA_BUS_ENABLE +1 1 +.names DTACK_SYNC_1_sqmuxa_i.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n +11 1 +.names RW_i.BLIF AMIGA_BUS_DATA_DIR +1 1 +.names dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.D +1- 1 +-1 1 +.names CLK_OSZI_c.BLIF inst_AS_000_INTreg.C +1 1 +.names vcc_n_n.BLIF AMIGA_BUS_ENABLE_LOW +1 1 +.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +0 1 +.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n +0 1 +.names RST_i.BLIF inst_AS_000_INTreg.AP +1 1 +.names RW_c.BLIF SM_AMIGA_6_.BLIF UDS_000_INT_0_sqmuxa_1_2 +11 1 +.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_109 +11 1 +.names UDS_000_INT_0_sqmuxa_1_1.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF UDS_000_INT_0_sqmuxa_1_3 +11 1 +.names N_104_i.BLIF N_105_i.BLIF SM_AMIGA_3_.D +11 1 +.names UDS_000_INT_0_sqmuxa_1_3.BLIF clk_un3_clk_000_dd_n.BLIF UDS_000_INT_0_sqmuxa_1 +11 1 +.names N_106_i.BLIF N_107_i.BLIF sm_amiga_ns_0_5__n +11 1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_132_1 +11 1 +.names N_108_i.BLIF N_109_i.BLIF SM_AMIGA_1_.D +11 1 +.names CLK_OSZI_c.BLIF inst_DTACK_DMA.C +1 1 +.names N_132_1.BLIF cpu_est_i_2__n.BLIF N_132 +11 1 +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names N_124.BLIF cpu_est_0_.BLIF N_131_1 +11 1 +.names SM_AMIGA_3_.BLIF state_machine_un57_clk_000_d_0_n.BLIF N_93_0 +11 1 +.names RST_i.BLIF inst_DTACK_DMA.AP +1 1 +.names N_131_1.BLIF cpu_est_i_3__n.BLIF N_131 +11 1 +.names CLK_OUT_PRE_i.BLIF sm_amiga_i_2__n.BLIF N_94_0 +11 1 +.names AS_030_i.BLIF CPU_SPACE_i.BLIF state_machine_as_030_000_sync_3_0_1_n +11 1 +.names inst_CLK_000_D.BLIF SM_AMIGA_3_.BLIF VPA_SYNC_1_sqmuxa_1_0 +11 1 +.names state_machine_as_030_000_sync_3_0_1_n.BLIF state_machine_un42_clk_030_i_n.BLIF state_machine_as_030_000_sync_3_0_n +11 1 +.names inst_CLK_000_D.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_0 +11 1 +.names DTACK_c.BLIF DTACK_i +0 1 +.names CLK_OSZI_c.BLIF inst_RISING_CLK_AMIGA.C +1 1 +.names RW_i.BLIF SM_AMIGA_4_.BLIF UDS_000_INT_0_sqmuxa_2 +11 1 +.names inst_VMA_INTreg.BLIF VMA_INT_i +0 1 +.names UDS_000_INT_0_sqmuxa_1_0.BLIF UDS_000_INT_0_sqmuxa_2.BLIF UDS_000_INT_0_sqmuxa +11 1 +.names AS_030_i.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF DTACK_SYNC_1_sqmuxa_1 +11 1 +.names cpu_est_d_i_0__n.BLIF cpu_est_d_i_3__n.BLIF state_machine_un13_clk_000_d_1_0_n +11 1 +.names AS_030_i.BLIF N_98_i.BLIF DSACK_INT_1_sqmuxa +11 1 +.names state_machine_un13_clk_000_d_1_0_n.BLIF state_machine_un13_clk_000_d_4_n.BLIF state_machine_un13_clk_000_d_n +11 1 +.names a_c_24__n.BLIF a_i_24__n +0 1 +.names CLK_OSZI_c.BLIF CLK_CNT_0_.C +1 1 +.names state_machine_un13_clk_000_d_1_n.BLIF cpu_est_d_1_.BLIF state_machine_un13_clk_000_d_4_1_n +11 1 +.names a_c_25__n.BLIF a_i_25__n +0 1 +.names state_machine_un13_clk_000_d_4_1_n.BLIF cpu_est_d_2_.BLIF state_machine_un13_clk_000_d_4_n +11 1 +.names a_c_26__n.BLIF a_i_26__n +0 1 +.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF state_machine_un8_clk_000_d_1_n +11 1 +.names a_c_27__n.BLIF a_i_27__n +0 1 +.names CLK_000_D_i.BLIF VPA_D_i.BLIF state_machine_un8_clk_000_d_2_n +11 1 +.names a_c_28__n.BLIF a_i_28__n +0 1 +.names CLK_OSZI_c.BLIF inst_VPA_D.C +1 1 +.names cpu_est_0_.BLIF cpu_est_2_.BLIF state_machine_un8_clk_000_d_3_n +11 1 +.names a_c_29__n.BLIF a_i_29__n +0 1 +.names state_machine_un8_clk_000_d_1_n.BLIF state_machine_un8_clk_000_d_2_n.BLIF state_machine_un8_clk_000_d_4_n +11 1 +.names a_c_30__n.BLIF a_i_30__n +0 1 +.names state_machine_un8_clk_000_d_4_n.BLIF state_machine_un8_clk_000_d_3_n.BLIF state_machine_un8_clk_000_d_n +11 1 +.names a_c_31__n.BLIF a_i_31__n 0 1 -.names vcc_n_n -1 .names CLK_000_c.BLIF inst_CLK_000_D.D 1 1 -.names sm_amiga_ns_0_0__n.BLIF SM_AMIGA_7_.D +.names AS_030_000_SYNC_i.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_1 +11 1 +.names CLK_000_D_i.BLIF N_93.BLIF N_104 +11 1 +.names a_c_17__n.BLIF a_i_16__n.BLIF state_machine_un42_clk_030_1_n +11 1 +.names sm_amiga_i_3__n.BLIF sm_amiga_i_4__n.BLIF N_105 +11 1 +.names CLK_OSZI_c.BLIF inst_CLK_000_D.C +1 1 +.names a_i_18__n.BLIF a_i_19__n.BLIF state_machine_un42_clk_030_2_n +11 1 +.names CLK_000_D_i.BLIF SM_AMIGA_2_.BLIF N_106 +11 1 +.names fc_c_1__n.BLIF BGACK_000_c.BLIF state_machine_un42_clk_030_3_n +11 1 +.names CLK_000_D_i.BLIF N_94.BLIF N_108 +11 1 +.names state_machine_un42_clk_030_1_n.BLIF state_machine_un42_clk_030_2_n.BLIF state_machine_un42_clk_030_4_n +11 1 +.names state_machine_un13_as_000_int_n.BLIF inst_DTACK_DMA.D 0 1 +.names RST_c.BLIF RESETDFFreg.D +1 1 +.names state_machine_un42_clk_030_3_n.BLIF fc_c_0__n.BLIF state_machine_un42_clk_030_5_n +11 1 +.names RST_c.BLIF RST_i +0 1 +.names state_machine_un42_clk_030_4_n.BLIF state_machine_un42_clk_030_5_n.BLIF state_machine_un42_clk_030_n +11 1 +.names CLK_CNT_0_.BLIF CLK_CNT_0_.D +0 1 +.names CLK_OSZI_c.BLIF RESETDFFreg.C +1 1 +.names DTACK_i.BLIF inst_VPA_D.BLIF DTACK_SYNC_1_sqmuxa_1_0 +11 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +0 1 +.names DTACK_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF DTACK_SYNC_1_sqmuxa +11 1 +.names CPU_SPACE_c.BLIF CPU_SPACE_i +0 1 +.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF VPA_SYNC_1_sqmuxa_1_1 +11 1 +.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i +0 1 +.names inst_CLK_000_D.BLIF inst_CLK_000_DD.D +1 1 +.names N_135_1.BLIF VMA_INT_i.BLIF VPA_SYNC_1_sqmuxa_2 +11 1 +.names gnd_n_n +.names VPA_D_i.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_3 +11 1 +.names vcc_n_n +1 +.names CLK_OSZI_c.BLIF inst_CLK_000_DD.C +1 1 +.names VPA_SYNC_1_sqmuxa_1_1.BLIF VPA_SYNC_1_sqmuxa_2.BLIF VPA_SYNC_1_sqmuxa_4 +11 1 .names A_15_.BLIF a_15__n 1 1 -.names N_109_i.BLIF N_111_i.BLIF N_86_i_1 +.names VPA_SYNC_1_sqmuxa_4.BLIF VPA_SYNC_1_sqmuxa_3.BLIF VPA_SYNC_1_sqmuxa 11 1 .names A_14_.BLIF a_14__n 1 1 -.names CLK_OSZI_c.BLIF inst_CLK_000_D.C -1 1 -.names N_86_i_1.BLIF N_122_i.BLIF SM_AMIGA_6_.D +.names CLK_000_D_i.BLIF inst_CLK_OUT_PRE.BLIF N_98_1 11 1 .names A_13_.BLIF a_13__n 1 1 -.names BG_030_c_i.BLIF CPU_SPACE_i.BLIF un1_bg_030_0_1 +.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D +1 1 +.names N_98_1.BLIF SM_AMIGA_1_.BLIF N_98 11 1 .names A_12_.BLIF a_12__n 1 1 -.names AS_030_c.BLIF N_109_i.BLIF un1_bg_030_0_2 +.names N_130_i.BLIF N_128_i.BLIF clk_cpu_est_11_0_1_1__n 11 1 .names A_11_.BLIF a_11__n 1 1 -.names RST_c.BLIF RESETDFFreg.D +.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C 1 1 -.names un1_bg_030_0_1.BLIF un1_bg_030_0_2.BLIF un1_bg_030_0 +.names N_127_i.BLIF N_129_i.BLIF clk_cpu_est_11_0_2_1__n 11 1 .names A_10_.BLIF a_10__n 1 1 -.names AS_030_i.BLIF CPU_SPACE_i.BLIF state_machine_as_030_000_sync_3_2_1_n +.names clk_cpu_est_11_0_1_1__n.BLIF clk_cpu_est_11_0_2_1__n.BLIF clk_cpu_est_11_0_1__n 11 1 .names A_9_.BLIF a_9__n 1 1 -.names CLK_OSZI_c.BLIF RESETDFFreg.C -1 1 -.names state_machine_as_030_000_sync_3_2_1_n.BLIF state_machine_un42_clk_030_i_n.BLIF state_machine_as_030_000_sync_3_2_n +.names a_i_24__n.BLIF a_i_25__n.BLIF N_167_1 11 1 .names A_8_.BLIF a_8__n 1 1 -.names size_c_0__n.BLIF a_c_i_0__n.BLIF state_machine_un31_clk_000_d_i_1_n +.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_0_.X1 +1 1 +.names a_i_26__n.BLIF a_i_27__n.BLIF N_167_2 11 1 .names A_7_.BLIF a_7__n 1 1 -.names state_machine_un31_clk_000_d_i_1_n.BLIF size_c_i_1__n.BLIF state_machine_un31_clk_000_d_i_n +.names a_i_28__n.BLIF a_i_29__n.BLIF N_167_3 11 1 .names A_6_.BLIF a_6__n 1 1 -.names inst_CLK_000_D.BLIF inst_CLK_000_DD.D +.names cpu_est_0_.BLIF cpu_est_0_0_.X2 1 1 -.names a_i_24__n.BLIF a_i_25__n.BLIF N_186_1 +.names a_i_30__n.BLIF a_i_31__n.BLIF N_167_4 11 1 .names A_5_.BLIF a_5__n 1 1 -.names a_i_26__n.BLIF a_i_27__n.BLIF N_186_2 +.names N_167_1.BLIF N_167_2.BLIF N_167_5 11 1 .names A_4_.BLIF a_4__n 1 1 -.names CLK_OSZI_c.BLIF inst_CLK_000_DD.C -1 1 -.names a_i_28__n.BLIF a_i_29__n.BLIF N_186_3 +.names N_167_3.BLIF N_167_4.BLIF N_167_6 11 1 .names A_3_.BLIF a_3__n 1 1 -.names N_145.BLIF N_145_i -0 1 -.names A_2_.BLIF a_2__n -1 1 -.names N_146.BLIF N_146_i -0 1 -.names A_1_.BLIF a_1__n -1 1 -.names inst_CLK_OUT_PRE.BLIF inst_CLK_OUT_INTreg.D -1 1 -.names N_142.BLIF N_142_i -0 1 -.names clk_cpu_est_11_0_1__n.BLIF clk_cpu_est_11_1__n -0 1 -.names CLK_OSZI_c.BLIF inst_CLK_OUT_INTreg.C -1 1 -.names N_140.BLIF N_140_i -0 1 -.names N_139.BLIF N_139_i -0 1 -.names N_141.BLIF N_141_i -0 1 -.names N_108.BLIF G_100.X1 -1 1 -.names N_138_i.BLIF N_138 -0 1 -.names N_137_i.BLIF N_137 -0 1 -.names SM_AMIGA_D_2_.BLIF G_100.X2 -1 1 -.names N_136_i.BLIF N_136 -0 1 -.names N_143.BLIF N_143_i -0 1 -.names N_144.BLIF N_144_i -0 1 .names CLK_CNT_0_.BLIF CLK_OUT_PRE_0.X1 1 1 -.names N_101_0.BLIF N_101 -0 1 -.names N_115.BLIF N_115_i -0 1 +.names N_167_5.BLIF N_167_6.BLIF N_167 +11 1 +.names A_2_.BLIF a_2__n +1 1 +.names a_c_20__n.BLIF a_c_21__n.BLIF N_170_1 +11 1 +.names A_1_.BLIF a_1__n +1 1 .names inst_CLK_OUT_PRE.BLIF CLK_OUT_PRE_0.X2 1 1 -.names N_116.BLIF N_116_i +.names a_c_22__n.BLIF a_c_23__n.BLIF N_170_2 +11 1 +.names N_170_1.BLIF N_170_2.BLIF N_170 +11 1 +.names CLK_000_D_i.BLIF SM_AMIGA_3_.BLIF N_107_1 +11 1 +.names cpu_est_0_0_.BLIF cpu_est_0_.D +1 1 +.names N_107_1.BLIF state_machine_un57_clk_000_d_n.BLIF N_107 +11 1 +.names CLK_OUT_PRE_0.BLIF inst_CLK_OUT_PRE.D +1 1 +.names N_93_0.BLIF N_93 +0 1 +.names N_108.BLIF N_108_i +0 1 +.names N_109.BLIF N_109_i +0 1 +.names N_106.BLIF N_106_i +0 1 +.names N_107.BLIF N_107_i +0 1 +.names sm_amiga_ns_0_5__n.BLIF SM_AMIGA_2_.D +0 1 +.names N_104.BLIF N_104_i +0 1 +.names N_105.BLIF N_105_i +0 1 +.names BG_030_c_i.BLIF CPU_SPACE_i.BLIF un1_bg_030_0_1 +11 1 +.names AS_030_c.BLIF N_97_i.BLIF un1_bg_030_0_2 +11 1 +.names un1_bg_030_0_1.BLIF un1_bg_030_0_2.BLIF un1_bg_030_0 +11 1 +.names size_c_0__n.BLIF a_c_i_0__n.BLIF state_machine_un31_clk_000_d_i_1_n +11 1 +.names state_machine_un31_clk_000_d_i_1_n.BLIF size_c_i_1__n.BLIF state_machine_un31_clk_000_d_i_n +11 1 +.names N_135_i.BLIF N_133_i.BLIF clk_cpu_est_11_0_1_3__n +11 1 +.names clk_cpu_est_11_0_1_3__n.BLIF N_134_i.BLIF clk_cpu_est_11_0_3__n +11 1 +.names clk_cpu_est_11_0_3__n.BLIF clk_cpu_est_11_3__n 0 1 .names size_c_1__n.BLIF size_c_i_1__n 0 1 .names state_machine_un31_clk_000_d_i_n.BLIF state_machine_un31_clk_000_d_n 0 1 -.names N_106.BLIF G_98.X1 -1 1 +.names state_machine_as_030_000_sync_3_0_n.BLIF state_machine_as_030_000_sync_3_n +0 1 +.names un1_as_030_2_0.BLIF un1_as_030_2 +0 1 +.names state_machine_un17_clk_030_0_n.BLIF state_machine_un17_clk_030_n +0 1 +.names state_machine_un57_clk_000_d_0_n.BLIF state_machine_un57_clk_000_d_n +0 1 .names inst_RISING_CLK_AMIGA.BLIF RISING_CLK_AMIGA_i 0 1 .names state_machine_un4_bgack_000_0_n.BLIF state_machine_un4_bgack_000_n 0 1 -.names SM_AMIGA_D_0_.BLIF G_98.X2 -1 1 .names BG_030_c.BLIF BG_030_c_i 0 1 .names state_machine_un1_clk_030_0_n.BLIF state_machine_un1_clk_030_n 0 1 -.names state_machine_un17_clk_030_0_n.BLIF state_machine_un17_clk_030_n -0 1 -.names N_107.BLIF G_99.X1 -1 1 -.names un1_as_030_2_0.BLIF un1_as_030_2 -0 1 -.names state_machine_as_030_000_sync_3_2_n.BLIF state_machine_as_030_000_sync_3_n -0 1 -.names SM_AMIGA_D_1_.BLIF G_99.X2 -1 1 -.names N_109.BLIF N_109_i +.names N_97.BLIF N_97_i 0 1 .names un1_bg_030_0.BLIF un1_bg_030 0 1 -.names N_111.BLIF N_111_i +.names inst_CLK_OUT_PRE.BLIF CLK_OUT_PRE_i 0 1 -.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_0_.X1 +.names N_94_0.BLIF N_94 +0 1 +.names N_91_0.BLIF N_91 +0 1 +.names N_92_0.BLIF N_92 +0 1 +.names N_131.BLIF N_131_i +0 1 +.names N_132.BLIF N_132_i +0 1 +.names N_124_i.BLIF N_124 +0 1 +.names N_125_i.BLIF N_125 +0 1 +.names CLK_OSZI_c.BLIF cpu_est_3_reg.C 1 1 -.names N_122.BLIF N_122_i +.names N_126_i.BLIF N_126 0 1 -.names N_147.BLIF N_147_i +.names N_129.BLIF N_129_i 0 1 -.names cpu_est_0_.BLIF cpu_est_0_0_.X2 +.names N_127.BLIF N_127_i +0 1 +.names N_128.BLIF N_128_i +0 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_7_.C 1 1 -.names clk_cpu_est_11_0_3__n.BLIF clk_cpu_est_11_3__n +.names N_130.BLIF N_130_i 0 1 -.names N_161.BLIF N_161_i +.names clk_cpu_est_11_0_1__n.BLIF clk_cpu_est_11_1__n 0 1 +.names RST_i.BLIF SM_AMIGA_7_.AP +1 1 +.names N_134.BLIF N_134_i +0 1 +.names N_133.BLIF N_133_i +0 1 +.names N_135.BLIF N_135_i +0 1 +.names N_145.BLIF N_145_i +0 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C +1 1 .names a_c_0__n.BLIF a_c_i_0__n 0 1 -.names cpu_est_0_0_.BLIF cpu_est_0_.D -1 1 .names state_machine_uds_000_int_8_0_n.BLIF state_machine_uds_000_int_8_n 0 1 -.names CLK_OUT_PRE_0.BLIF inst_CLK_OUT_PRE.D +.names RST_i.BLIF SM_AMIGA_6_.AR 1 1 .names state_machine_lds_000_int_8_0_n.BLIF state_machine_lds_000_int_8_n 0 1 -.names N_113.BLIF N_113_i +.names N_99.BLIF N_99_i +0 1 +.names N_112.BLIF N_112_i +0 1 +.names N_100.BLIF N_100_i +0 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C +1 1 +.names N_101.BLIF N_101_i 0 1 .names sm_amiga_ns_0_2__n.BLIF SM_AMIGA_5_.D 0 1 -.names N_118.BLIF N_118_i +.names RST_i.BLIF SM_AMIGA_5_.AR +1 1 +.names N_103.BLIF N_103_i 0 1 -.names N_117.BLIF N_117_i +.names N_110.BLIF N_110_i 0 1 -.names sm_amiga_ns_0_5__n.BLIF SM_AMIGA_2_.D +.names sm_amiga_ns_0_7__n.BLIF SM_AMIGA_0_.D 0 1 +.names VMA_INT_1_sqmuxa.BLIF vma_int_0_un3_n +0 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C +1 1 +.names inst_VMA_INTreg.BLIF VMA_INT_1_sqmuxa.BLIF vma_int_0_un1_n +11 1 +.names state_machine_un13_clk_000_d_4_n.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n +11 1 +.names RST_i.BLIF SM_AMIGA_4_.AR +1 1 +.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF inst_VMA_INTreg.D +1- 1 +-1 1 +.names un2_clk_030_1.BLIF lds_000_int_0_un3_n +0 1 +.names inst_LDS_000_INTreg.BLIF un2_clk_030_1.BLIF lds_000_int_0_un1_n +11 1 .end diff --git a/Logic/BUS68030.bl1 b/Logic/BUS68030.bl1 index b90f347..e70e888 100644 --- a/Logic/BUS68030.bl1 +++ b/Logic/BUS68030.bl1 @@ -1,91 +1,85 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Thu May 15 22:17:27 2014 +#$ DATE Thu May 15 22:21:53 2014 #$ MODULE bus68030 -#$ PINS 74 FC_0_ SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 DS_030 \ -# UDS_000 LDS_000 CPU_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 \ -# CLK_OSZI CLK_DIV_OUT SIZE_0_ CLK_EXP A_30_ FPU_CS A_29_ DTACK A_28_ AVEC A_27_ AVEC_EXP \ -# A_26_ E A_25_ VPA A_24_ VMA A_23_ RST A_22_ RESET A_21_ RW A_20_ AMIGA_BUS_ENABLE A_19_ \ -# AMIGA_BUS_DATA_DIR A_18_ AMIGA_BUS_ENABLE_LOW A_17_ CIIN A_16_ A_15_ A_14_ A_13_ A_12_ \ -# A_11_ A_10_ A_9_ A_8_ A_7_ A_6_ A_5_ A_4_ A_3_ A_2_ A_1_ A_0_ IPL_030_1_ IPL_030_0_ IPL_1_ \ -# IPL_0_ DSACK_0_ -#$ NODES 378 a_c_30__n a_c_31__n CPU_SPACE_c inst_BGACK_030_INTreg BG_030_c \ -# inst_CLK_OUT_INTreg inst_FPU_CS_INTreg BG_000DFFSHreg cpu_est_3_reg \ -# inst_VMA_INTreg gnd_n_n BGACK_000_c cpu_est_0_ cpu_est_1_ CLK_030_c cpu_est_d_0_ \ -# cpu_est_d_3_ CLK_000_c inst_AS_000_INTreg inst_AS_030_000_SYNC CLK_OSZI_c \ -# inst_DTACK_SYNC inst_VPA_D inst_VPA_SYNC inst_CLK_000_D inst_CLK_000_DD \ -# IPL_030DFFSH_0_reg inst_CLK_OUT_PRE vcc_n_n IPL_030DFFSH_1_reg cpu_est_d_1_ \ -# cpu_est_d_2_ IPL_030DFFSH_2_reg cpu_est_2_ CLK_CNT_0_ ipl_c_0__n SM_AMIGA_6_ \ -# SM_AMIGA_7_ ipl_c_1__n inst_UDS_000_INTreg inst_LDS_000_INTreg ipl_c_2__n \ -# inst_RISING_CLK_AMIGA state_machine_un57_clk_000_d_n dsack_c_1__n SM_AMIGA_1_ \ -# DSACK_INT_1_ DTACK_c inst_DTACK_DMA SM_AMIGA_4_ SM_AMIGA_3_ \ -# state_machine_un13_as_000_int_n SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_ SM_AMIGA_D_0_ \ -# RST_c SM_AMIGA_D_1_ SM_AMIGA_D_2_ RESETDFFreg clk_exp RW_c fc_c_0__n fc_c_1__n \ -# state_machine_un57_clk_000_d_0_n N_161_i a_c_i_0__n \ -# state_machine_uds_000_int_8_0_n state_machine_lds_000_int_8_0_n N_113_i \ -# cpu_est_0_0_ sm_amiga_ns_0_2__n N_118_i N_117_i sm_amiga_ns_0_5__n N_123_i \ -# CLK_OUT_PRE_0 N_119_i N_120_i sm_amiga_ns_0_7__n CLK_OUT_PRE_i N_106 N_102_0 N_107 \ -# size_c_i_1__n clk_un3_clk_000_dd_n state_machine_un31_clk_000_d_i_n \ -# clk_cpu_est_11_1__n RISING_CLK_AMIGA_i clk_cpu_est_11_3__n \ -# state_machine_un4_bgack_000_0_n G_98 BG_030_c_i G_99 state_machine_un1_clk_030_0_n \ -# G_100 state_machine_un17_clk_030_0_n N_161 un1_as_030_2_0 N_114 \ -# state_machine_as_030_000_sync_3_2_n N_109 N_109_i N_111 un1_bg_030_0 N_112 N_111_i \ -# N_122 N_122_i N_115 N_101 N_147_i N_116 clk_cpu_est_11_0_3__n N_124 N_145_i N_139 \ -# N_146_i N_137 N_142_i N_140 clk_cpu_est_11_0_1__n N_141 N_140_i N_136 N_139_i N_142 \ -# N_141_i N_145 N_138_i N_138 N_137_i N_146 N_136_i N_143 N_143_i N_144 N_144_i \ -# UDS_000_INT_0_sqmuxa N_134_i UDS_000_INT_0_sqmuxa_1 N_101_0 N_147 N_115_i N_147_1 \ -# N_116_i state_machine_un13_clk_000_d_1_n N_186 N_124_i N_189 \ -# state_machine_un42_clk_030_n N_112_i un1_bg_030 sm_amiga_ns_0_0__n \ -# state_machine_as_030_000_sync_3_n N_86_i_1 un1_as_030_2 un1_bg_030_0_1 \ -# state_machine_un17_clk_030_n un1_bg_030_0_2 state_machine_un1_clk_030_n \ -# state_machine_as_030_000_sync_3_2_1_n state_machine_un4_bgack_000_n \ -# state_machine_un31_clk_000_d_i_1_n N_108 N_186_1 state_machine_un31_clk_000_d_n \ -# N_186_2 state_machine_un13_clk_000_d_n N_186_3 state_machine_un13_clk_000_d_4_n \ -# N_186_4 state_machine_un8_clk_000_d_n N_186_5 DTACK_SYNC_1_sqmuxa N_186_6 \ -# VPA_SYNC_1_sqmuxa_1_0 N_189_1 VPA_SYNC_1_sqmuxa N_189_2 N_123 \ -# clk_cpu_est_11_0_1_1__n N_118 clk_cpu_est_11_0_2_1__n N_110 \ -# clk_cpu_est_11_0_1_3__n N_102 N_143_1 N_120 N_144_1 N_119 N_106_1 N_117 N_106_2 N_113 \ -# N_107_1 state_machine_lds_000_int_8_n UDS_000_INT_0_sqmuxa_1_1 \ -# state_machine_uds_000_int_8_n UDS_000_INT_0_sqmuxa_1_2 DTACK_SYNC_1_sqmuxa_1 \ -# UDS_000_INT_0_sqmuxa_1_3 un2_clk_030_1 UDS_000_INT_0_sqmuxa_1_0 \ -# VPA_SYNC_1_sqmuxa_1 UDS_000_INT_0_sqmuxa_2 AS_000_INT_1_sqmuxa \ -# state_machine_un42_clk_030_1_n VMA_INT_1_sqmuxa state_machine_un42_clk_030_2_n \ -# DSACK_INT_1_sqmuxa state_machine_un42_clk_030_3_n RW_i \ -# state_machine_un42_clk_030_4_n clk_exp_i state_machine_un42_clk_030_5_n \ -# DTACK_SYNC_1_sqmuxa_i state_machine_un13_clk_000_d_1_0_n N_114_i \ -# state_machine_un13_clk_000_d_4_1_n VPA_SYNC_1_sqmuxa_i \ -# state_machine_un8_clk_000_d_1_n N_110_i state_machine_un8_clk_000_d_2_n N_108_i \ -# state_machine_un8_clk_000_d_3_n cpu_est_d_i_3__n state_machine_un8_clk_000_d_4_n \ -# cpu_est_d_i_0__n DTACK_SYNC_1_sqmuxa_1_0 CLK_000_D_i VPA_SYNC_1_sqmuxa_1_1 \ -# AS_030_i VPA_SYNC_1_sqmuxa_2 AS_000_INT_i VPA_SYNC_1_sqmuxa_3 dsack_i_1__n \ -# VPA_SYNC_1_sqmuxa_4 state_machine_un13_clk_000_d_i_n N_108_1 \ -# state_machine_un8_clk_000_d_i_n N_118_1 state_machine_un13_clk_000_d_1_i_n \ -# N_110_1 sm_amiga_i_1__n clk_exp_1 sm_amiga_i_2__n sm_amiga_d_0_2__un3_n \ -# sm_amiga_i_0__n sm_amiga_d_0_2__un1_n sm_amiga_i_3__n sm_amiga_d_0_2__un0_n \ -# VPA_D_i dsack_int_0_1__un3_n VMA_INT_i dsack_int_0_1__un1_n DTACK_i \ -# dsack_int_0_1__un0_n cpu_est_i_3__n vma_int_0_un3_n a_i_18__n vma_int_0_un1_n \ -# a_i_16__n vma_int_0_un0_n a_i_19__n vpa_sync_0_un3_n CLK_030_i vpa_sync_0_un1_n \ -# state_machine_un42_clk_030_i_n vpa_sync_0_un0_n DS_030_i as_000_int_0_un3_n \ -# cpu_est_i_1__n as_000_int_0_un1_n AS_030_000_SYNC_i as_000_int_0_un0_n \ -# cpu_est_i_0__n dtack_sync_0_un3_n sm_amiga_i_4__n dtack_sync_0_un1_n \ -# sm_amiga_i_6__n dtack_sync_0_un0_n cpu_est_i_2__n lds_000_int_0_un3_n \ -# UDS_000_INT_0_sqmuxa_1_i lds_000_int_0_un1_n UDS_000_INT_0_sqmuxa_i \ -# lds_000_int_0_un0_n sm_amiga_i_5__n uds_000_int_0_un3_n CLK_000_DD_i \ -# uds_000_int_0_un1_n sm_amiga_i_7__n uds_000_int_0_un0_n a_i_30__n bg_000_0_un3_n \ -# a_i_31__n bg_000_0_un1_n a_i_28__n bg_000_0_un0_n a_i_29__n as_030_000_sync_0_un3_n \ -# a_i_26__n as_030_000_sync_0_un1_n a_i_27__n as_030_000_sync_0_un0_n a_i_24__n \ -# fpu_cs_int_0_un3_n a_i_25__n fpu_cs_int_0_un1_n fpu_cs_int_0_un0_n \ -# ipl_030_0_2__un3_n RST_i ipl_030_0_2__un1_n N_107_i ipl_030_0_2__un0_n N_106_i \ -# ipl_030_0_1__un3_n FPU_CS_INT_i ipl_030_0_1__un1_n CPU_SPACE_i ipl_030_0_1__un0_n \ -# BGACK_030_INT_i ipl_030_0_0__un3_n AS_030_c ipl_030_0_0__un1_n ipl_030_0_0__un0_n \ -# bgack_030_int_0_un3_n DS_030_c bgack_030_int_0_un1_n bgack_030_int_0_un0_n \ -# sm_amiga_d_0_0__un3_n sm_amiga_d_0_0__un1_n size_c_0__n sm_amiga_d_0_0__un0_n \ -# sm_amiga_d_0_1__un3_n size_c_1__n sm_amiga_d_0_1__un1_n sm_amiga_d_0_1__un0_n \ -# a_c_0__n cpu_est_0_1__un3_n cpu_est_0_1__un1_n cpu_est_0_1__un0_n \ -# cpu_est_0_2__un3_n cpu_est_0_2__un1_n cpu_est_0_2__un0_n cpu_est_0_3__un3_n \ -# cpu_est_0_3__un1_n cpu_est_0_3__un0_n a_15__n a_14__n a_13__n a_12__n a_c_16__n \ -# a_11__n a_c_17__n a_10__n a_c_18__n a_9__n a_c_19__n a_8__n a_c_20__n a_7__n a_c_21__n \ -# a_6__n a_c_22__n a_5__n a_c_23__n a_4__n a_c_24__n a_3__n a_c_25__n a_2__n a_c_26__n \ -# a_1__n a_c_27__n a_c_28__n a_c_29__n +#$ PINS 74 A_28_ A_27_ SIZE_1_ A_26_ A_25_ A_31_ A_24_ A_23_ IPL_030_2_ A_22_ A_21_ \ +# IPL_2_ A_20_ A_19_ DSACK_1_ A_18_ A_17_ FC_1_ A_16_ AS_030 A_15_ AS_000 A_14_ DS_030 A_13_ \ +# UDS_000 A_12_ LDS_000 A_11_ CPU_SPACE A_10_ BERR A_9_ BG_030 A_8_ BG_000 A_7_ BGACK_030 \ +# A_6_ BGACK_000 A_5_ CLK_030 A_4_ CLK_000 A_3_ CLK_OSZI A_2_ CLK_DIV_OUT A_1_ CLK_EXP A_0_ \ +# FPU_CS IPL_030_1_ DTACK IPL_030_0_ AVEC IPL_1_ AVEC_EXP IPL_0_ E DSACK_0_ VPA FC_0_ VMA RST \ +# RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ \ +# A_29_ +#$ NODES 351 CLK_OSZI_c CLK_OUT_INTreg IPL_030DFFSH_0_reg inst_BGACK_030_INTreg \ +# inst_FPU_CS_INTreg IPL_030DFFSH_1_reg cpu_est_3_reg inst_VMA_INTreg \ +# IPL_030DFFSH_2_reg gnd_n_n cpu_est_0_ ipl_c_0__n cpu_est_1_ cpu_est_d_0_ ipl_c_1__n \ +# cpu_est_d_3_ inst_AS_000_INTreg ipl_c_2__n inst_AS_030_000_SYNC inst_DTACK_SYNC \ +# inst_VPA_D dsack_c_1__n inst_VPA_SYNC inst_CLK_000_D DTACK_c inst_CLK_000_DD \ +# inst_CLK_OUT_PRE vcc_n_n cpu_est_d_1_ cpu_est_d_2_ cpu_est_2_ CLK_CNT_0_ SM_AMIGA_6_ \ +# RST_c SM_AMIGA_7_ inst_UDS_000_INTreg RESETDFFreg inst_LDS_000_INTreg RW_c \ +# inst_RISING_CLK_AMIGA state_machine_un57_clk_000_d_n fc_c_0__n SM_AMIGA_1_ \ +# DSACK_INT_1_ fc_c_1__n inst_DTACK_DMA SM_AMIGA_4_ SM_AMIGA_3_ \ +# state_machine_un13_as_000_int_n SM_AMIGA_5_ SM_AMIGA_2_ N_145_i SM_AMIGA_0_ \ +# a_c_i_0__n state_machine_uds_000_int_8_0_n state_machine_lds_000_int_8_0_n N_99_i \ +# N_112_i N_100_i N_101_i sm_amiga_ns_0_2__n N_103_i N_110_i sm_amiga_ns_0_7__n \ +# cpu_est_0_0_ N_91_0 N_92_0 N_131_i N_132_i N_122_i CLK_OUT_PRE_0 N_124_i N_125_i \ +# N_126_i N_129_i N_98 N_127_i N_97 N_128_i N_104 N_130_i N_93 clk_cpu_est_11_0_1__n N_105 \ +# N_134_i N_106 N_133_i N_108 N_135_i N_94 clk_cpu_est_11_0_3__n N_109 size_c_i_1__n \ +# N_107 state_machine_un31_clk_000_d_i_n N_135_1 \ +# state_machine_as_030_000_sync_3_0_n VPA_SYNC_1_sqmuxa_1_0 un1_as_030_2_0 N_167 \ +# state_machine_un17_clk_030_0_n N_170 state_machine_un57_clk_000_d_0_n \ +# state_machine_un42_clk_030_n RISING_CLK_AMIGA_i DTACK_SYNC_1_sqmuxa \ +# state_machine_un4_bgack_000_0_n VPA_SYNC_1_sqmuxa BG_030_c_i un1_bg_030 \ +# state_machine_un1_clk_030_0_n DTACK_SYNC_1_sqmuxa_1 N_97_i DSACK_INT_1_sqmuxa \ +# un1_bg_030_0 state_machine_un1_clk_030_n CLK_OUT_PRE_i \ +# state_machine_un4_bgack_000_n N_94_0 un1_as_030_2 N_93_0 \ +# state_machine_un17_clk_030_n N_108_i N_102 N_109_i AS_000_INT_1_sqmuxa \ +# VPA_SYNC_1_sqmuxa_1 N_106_i state_machine_as_030_000_sync_3_n N_107_i \ +# clk_un3_clk_000_dd_n sm_amiga_ns_0_5__n state_machine_un31_clk_000_d_n N_104_i \ +# UDS_000_INT_0_sqmuxa N_105_i state_machine_un13_clk_000_d_n \ +# state_machine_un13_clk_000_d_4_n un1_bg_030_0_1 state_machine_un13_clk_000_d_1_n \ +# un1_bg_030_0_2 state_machine_un8_clk_000_d_n state_machine_un31_clk_000_d_i_1_n \ +# UDS_000_INT_0_sqmuxa_1 clk_cpu_est_11_0_1_3__n N_132 clk_cpu_est_11_0_1_1__n N_131 \ +# clk_cpu_est_11_0_2_1__n N_124 N_167_1 clk_cpu_est_11_3__n N_167_2 N_135 N_167_3 N_133 \ +# N_167_4 N_134 N_167_5 clk_cpu_est_11_1__n N_167_6 N_130 N_170_1 N_128 N_170_2 N_145 \ +# N_107_1 N_127 state_machine_un42_clk_030_1_n N_129 state_machine_un42_clk_030_2_n \ +# N_126 state_machine_un42_clk_030_3_n N_125 state_machine_un42_clk_030_4_n N_92 \ +# state_machine_un42_clk_030_5_n N_91 DTACK_SYNC_1_sqmuxa_1_0 N_110 \ +# VPA_SYNC_1_sqmuxa_1_1 N_103 VPA_SYNC_1_sqmuxa_2 N_101 VPA_SYNC_1_sqmuxa_3 N_100 \ +# VPA_SYNC_1_sqmuxa_4 N_112 N_98_1 N_99 state_machine_as_030_000_sync_3_0_1_n \ +# state_machine_lds_000_int_8_n UDS_000_INT_0_sqmuxa_1_0 \ +# state_machine_uds_000_int_8_n UDS_000_INT_0_sqmuxa_2 un2_clk_030_1 \ +# state_machine_un13_clk_000_d_1_0_n VMA_INT_1_sqmuxa \ +# state_machine_un13_clk_000_d_4_1_n RW_i state_machine_un8_clk_000_d_1_n \ +# cpu_est_d_i_3__n state_machine_un8_clk_000_d_2_n cpu_est_d_i_0__n \ +# state_machine_un8_clk_000_d_3_n CLK_000_D_i state_machine_un8_clk_000_d_4_n \ +# AS_000_INT_i UDS_000_INT_0_sqmuxa_1_1 dsack_i_1__n UDS_000_INT_0_sqmuxa_1_2 \ +# state_machine_un13_clk_000_d_i_n UDS_000_INT_0_sqmuxa_1_3 \ +# state_machine_un8_clk_000_d_i_n N_132_1 AS_030_i N_131_1 sm_amiga_i_6__n \ +# vma_int_0_un3_n sm_amiga_i_7__n vma_int_0_un1_n sm_amiga_i_5__n vma_int_0_un0_n \ +# sm_amiga_i_4__n lds_000_int_0_un3_n state_machine_un13_clk_000_d_1_i_n \ +# lds_000_int_0_un1_n CLK_000_DD_i lds_000_int_0_un0_n AS_030_000_SYNC_i \ +# uds_000_int_0_un3_n cpu_est_i_0__n uds_000_int_0_un1_n cpu_est_i_2__n \ +# uds_000_int_0_un0_n cpu_est_i_3__n cpu_est_0_3__un3_n cpu_est_i_1__n \ +# cpu_est_0_3__un1_n UDS_000_INT_0_sqmuxa_1_i cpu_est_0_3__un0_n \ +# UDS_000_INT_0_sqmuxa_i cpu_est_0_2__un3_n DS_030_i cpu_est_0_2__un1_n VPA_D_i \ +# cpu_est_0_2__un0_n state_machine_un42_clk_030_i_n cpu_est_0_1__un3_n \ +# VPA_SYNC_1_sqmuxa_i cpu_est_0_1__un1_n N_102_i cpu_est_0_1__un0_n \ +# DTACK_SYNC_1_sqmuxa_i fpu_cs_int_0_un3_n N_98_i fpu_cs_int_0_un1_n a_i_18__n \ +# fpu_cs_int_0_un0_n a_i_16__n as_000_int_0_un3_n a_i_19__n as_000_int_0_un1_n \ +# CLK_030_i as_000_int_0_un0_n VMA_INT_i vpa_sync_0_un3_n DTACK_i vpa_sync_0_un1_n \ +# sm_amiga_i_3__n vpa_sync_0_un0_n sm_amiga_i_1__n as_030_000_sync_0_un3_n \ +# sm_amiga_i_2__n as_030_000_sync_0_un1_n a_i_30__n as_030_000_sync_0_un0_n \ +# a_i_31__n ipl_030_0_2__un3_n a_i_28__n ipl_030_0_2__un1_n a_i_29__n \ +# ipl_030_0_2__un0_n a_i_26__n ipl_030_0_1__un3_n a_i_27__n ipl_030_0_1__un1_n \ +# a_i_24__n ipl_030_0_1__un0_n a_i_25__n ipl_030_0_0__un3_n ipl_030_0_0__un1_n \ +# ipl_030_0_0__un0_n RST_i bgack_030_int_0_un3_n FPU_CS_INT_i bgack_030_int_0_un1_n \ +# CPU_SPACE_i bgack_030_int_0_un0_n BGACK_030_INT_i dsack_int_0_1__un3_n AS_030_c \ +# dsack_int_0_1__un1_n dsack_int_0_1__un0_n bg_000_0_un3_n DS_030_c bg_000_0_un1_n \ +# bg_000_0_un0_n dtack_sync_0_un3_n dtack_sync_0_un1_n size_c_0__n \ +# dtack_sync_0_un0_n a_15__n size_c_1__n a_14__n a_c_0__n a_13__n a_12__n a_11__n \ +# a_10__n a_9__n a_8__n a_7__n a_6__n a_c_16__n a_5__n a_c_17__n a_4__n a_c_18__n a_3__n \ +# a_c_19__n a_2__n a_c_20__n a_1__n a_c_21__n a_c_22__n a_c_23__n a_c_24__n a_c_25__n \ +# a_c_26__n a_c_27__n a_c_28__n a_c_29__n a_c_30__n a_c_31__n CPU_SPACE_c BG_030_c \ +# BG_000DFFSHreg BGACK_000_c CLK_030_c CLK_000_c .model bus68030 .inputs SIZE_1_.BLIF A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF AS_030.BLIF DS_030.BLIF \ CPU_SPACE.BLIF BG_030.BLIF BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF \ @@ -95,140 +89,127 @@ A_21_.BLIF A_20_.BLIF A_19_.BLIF A_18_.BLIF A_17_.BLIF A_16_.BLIF A_15_.BLIF \ A_14_.BLIF A_13_.BLIF A_12_.BLIF A_11_.BLIF A_10_.BLIF A_9_.BLIF A_8_.BLIF \ A_7_.BLIF A_6_.BLIF A_5_.BLIF A_4_.BLIF A_3_.BLIF A_2_.BLIF A_1_.BLIF \ A_0_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF DSACK_1_.BLIF DTACK.BLIF \ -DSACK_0_.BLIF a_c_30__n.BLIF a_c_31__n.BLIF CPU_SPACE_c.BLIF \ -inst_BGACK_030_INTreg.BLIF BG_030_c.BLIF inst_CLK_OUT_INTreg.BLIF \ -inst_FPU_CS_INTreg.BLIF BG_000DFFSHreg.BLIF cpu_est_3_reg.BLIF \ -inst_VMA_INTreg.BLIF gnd_n_n.BLIF BGACK_000_c.BLIF cpu_est_0_.BLIF \ -cpu_est_1_.BLIF CLK_030_c.BLIF cpu_est_d_0_.BLIF cpu_est_d_3_.BLIF \ -CLK_000_c.BLIF inst_AS_000_INTreg.BLIF inst_AS_030_000_SYNC.BLIF \ -CLK_OSZI_c.BLIF inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF inst_VPA_SYNC.BLIF \ -inst_CLK_000_D.BLIF inst_CLK_000_DD.BLIF IPL_030DFFSH_0_reg.BLIF \ -inst_CLK_OUT_PRE.BLIF vcc_n_n.BLIF IPL_030DFFSH_1_reg.BLIF cpu_est_d_1_.BLIF \ -cpu_est_d_2_.BLIF IPL_030DFFSH_2_reg.BLIF cpu_est_2_.BLIF CLK_CNT_0_.BLIF \ -ipl_c_0__n.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_7_.BLIF ipl_c_1__n.BLIF \ -inst_UDS_000_INTreg.BLIF inst_LDS_000_INTreg.BLIF ipl_c_2__n.BLIF \ -inst_RISING_CLK_AMIGA.BLIF state_machine_un57_clk_000_d_n.BLIF \ -dsack_c_1__n.BLIF SM_AMIGA_1_.BLIF DSACK_INT_1_.BLIF DTACK_c.BLIF \ -inst_DTACK_DMA.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_3_.BLIF \ -state_machine_un13_as_000_int_n.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_2_.BLIF \ -SM_AMIGA_0_.BLIF SM_AMIGA_D_0_.BLIF RST_c.BLIF SM_AMIGA_D_1_.BLIF \ -SM_AMIGA_D_2_.BLIF RESETDFFreg.BLIF clk_exp.BLIF RW_c.BLIF fc_c_0__n.BLIF \ -fc_c_1__n.BLIF state_machine_un57_clk_000_d_0_n.BLIF N_161_i.BLIF \ -a_c_i_0__n.BLIF state_machine_uds_000_int_8_0_n.BLIF \ -state_machine_lds_000_int_8_0_n.BLIF N_113_i.BLIF cpu_est_0_0_.BLIF \ -sm_amiga_ns_0_2__n.BLIF N_118_i.BLIF N_117_i.BLIF sm_amiga_ns_0_5__n.BLIF \ -N_123_i.BLIF CLK_OUT_PRE_0.BLIF N_119_i.BLIF N_120_i.BLIF \ -sm_amiga_ns_0_7__n.BLIF CLK_OUT_PRE_i.BLIF N_106.BLIF N_102_0.BLIF N_107.BLIF \ -size_c_i_1__n.BLIF clk_un3_clk_000_dd_n.BLIF \ -state_machine_un31_clk_000_d_i_n.BLIF clk_cpu_est_11_1__n.BLIF \ -RISING_CLK_AMIGA_i.BLIF clk_cpu_est_11_3__n.BLIF \ -state_machine_un4_bgack_000_0_n.BLIF G_98.BLIF BG_030_c_i.BLIF G_99.BLIF \ -state_machine_un1_clk_030_0_n.BLIF G_100.BLIF \ -state_machine_un17_clk_030_0_n.BLIF N_161.BLIF un1_as_030_2_0.BLIF N_114.BLIF \ -state_machine_as_030_000_sync_3_2_n.BLIF N_109.BLIF N_109_i.BLIF N_111.BLIF \ -un1_bg_030_0.BLIF N_112.BLIF N_111_i.BLIF N_122.BLIF N_122_i.BLIF N_115.BLIF \ -N_101.BLIF N_147_i.BLIF N_116.BLIF clk_cpu_est_11_0_3__n.BLIF N_124.BLIF \ -N_145_i.BLIF N_139.BLIF N_146_i.BLIF N_137.BLIF N_142_i.BLIF N_140.BLIF \ -clk_cpu_est_11_0_1__n.BLIF N_141.BLIF N_140_i.BLIF N_136.BLIF N_139_i.BLIF \ -N_142.BLIF N_141_i.BLIF N_145.BLIF N_138_i.BLIF N_138.BLIF N_137_i.BLIF \ -N_146.BLIF N_136_i.BLIF N_143.BLIF N_143_i.BLIF N_144.BLIF N_144_i.BLIF \ -UDS_000_INT_0_sqmuxa.BLIF N_134_i.BLIF UDS_000_INT_0_sqmuxa_1.BLIF \ -N_101_0.BLIF N_147.BLIF N_115_i.BLIF N_147_1.BLIF N_116_i.BLIF \ -state_machine_un13_clk_000_d_1_n.BLIF N_186.BLIF N_124_i.BLIF N_189.BLIF \ -state_machine_un42_clk_030_n.BLIF N_112_i.BLIF un1_bg_030.BLIF \ -sm_amiga_ns_0_0__n.BLIF state_machine_as_030_000_sync_3_n.BLIF N_86_i_1.BLIF \ -un1_as_030_2.BLIF un1_bg_030_0_1.BLIF state_machine_un17_clk_030_n.BLIF \ -un1_bg_030_0_2.BLIF state_machine_un1_clk_030_n.BLIF \ -state_machine_as_030_000_sync_3_2_1_n.BLIF state_machine_un4_bgack_000_n.BLIF \ -state_machine_un31_clk_000_d_i_1_n.BLIF N_108.BLIF N_186_1.BLIF \ -state_machine_un31_clk_000_d_n.BLIF N_186_2.BLIF \ -state_machine_un13_clk_000_d_n.BLIF N_186_3.BLIF \ -state_machine_un13_clk_000_d_4_n.BLIF N_186_4.BLIF \ -state_machine_un8_clk_000_d_n.BLIF N_186_5.BLIF DTACK_SYNC_1_sqmuxa.BLIF \ -N_186_6.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF N_189_1.BLIF VPA_SYNC_1_sqmuxa.BLIF \ -N_189_2.BLIF N_123.BLIF clk_cpu_est_11_0_1_1__n.BLIF N_118.BLIF \ -clk_cpu_est_11_0_2_1__n.BLIF N_110.BLIF clk_cpu_est_11_0_1_3__n.BLIF \ -N_102.BLIF N_143_1.BLIF N_120.BLIF N_144_1.BLIF N_119.BLIF N_106_1.BLIF \ -N_117.BLIF N_106_2.BLIF N_113.BLIF N_107_1.BLIF \ -state_machine_lds_000_int_8_n.BLIF UDS_000_INT_0_sqmuxa_1_1.BLIF \ -state_machine_uds_000_int_8_n.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF \ -DTACK_SYNC_1_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_1_3.BLIF un2_clk_030_1.BLIF \ -UDS_000_INT_0_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_1.BLIF \ -UDS_000_INT_0_sqmuxa_2.BLIF AS_000_INT_1_sqmuxa.BLIF \ -state_machine_un42_clk_030_1_n.BLIF VMA_INT_1_sqmuxa.BLIF \ -state_machine_un42_clk_030_2_n.BLIF DSACK_INT_1_sqmuxa.BLIF \ -state_machine_un42_clk_030_3_n.BLIF RW_i.BLIF \ -state_machine_un42_clk_030_4_n.BLIF clk_exp_i.BLIF \ -state_machine_un42_clk_030_5_n.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF \ -state_machine_un13_clk_000_d_1_0_n.BLIF N_114_i.BLIF \ -state_machine_un13_clk_000_d_4_1_n.BLIF VPA_SYNC_1_sqmuxa_i.BLIF \ -state_machine_un8_clk_000_d_1_n.BLIF N_110_i.BLIF \ -state_machine_un8_clk_000_d_2_n.BLIF N_108_i.BLIF \ -state_machine_un8_clk_000_d_3_n.BLIF cpu_est_d_i_3__n.BLIF \ -state_machine_un8_clk_000_d_4_n.BLIF cpu_est_d_i_0__n.BLIF \ -DTACK_SYNC_1_sqmuxa_1_0.BLIF CLK_000_D_i.BLIF VPA_SYNC_1_sqmuxa_1_1.BLIF \ -AS_030_i.BLIF VPA_SYNC_1_sqmuxa_2.BLIF AS_000_INT_i.BLIF \ -VPA_SYNC_1_sqmuxa_3.BLIF dsack_i_1__n.BLIF VPA_SYNC_1_sqmuxa_4.BLIF \ -state_machine_un13_clk_000_d_i_n.BLIF N_108_1.BLIF \ -state_machine_un8_clk_000_d_i_n.BLIF N_118_1.BLIF \ -state_machine_un13_clk_000_d_1_i_n.BLIF N_110_1.BLIF sm_amiga_i_1__n.BLIF \ -clk_exp_1.BLIF sm_amiga_i_2__n.BLIF sm_amiga_d_0_2__un3_n.BLIF \ -sm_amiga_i_0__n.BLIF sm_amiga_d_0_2__un1_n.BLIF sm_amiga_i_3__n.BLIF \ -sm_amiga_d_0_2__un0_n.BLIF VPA_D_i.BLIF dsack_int_0_1__un3_n.BLIF \ -VMA_INT_i.BLIF dsack_int_0_1__un1_n.BLIF DTACK_i.BLIF \ -dsack_int_0_1__un0_n.BLIF cpu_est_i_3__n.BLIF vma_int_0_un3_n.BLIF \ -a_i_18__n.BLIF vma_int_0_un1_n.BLIF a_i_16__n.BLIF vma_int_0_un0_n.BLIF \ -a_i_19__n.BLIF vpa_sync_0_un3_n.BLIF CLK_030_i.BLIF vpa_sync_0_un1_n.BLIF \ -state_machine_un42_clk_030_i_n.BLIF vpa_sync_0_un0_n.BLIF DS_030_i.BLIF \ -as_000_int_0_un3_n.BLIF cpu_est_i_1__n.BLIF as_000_int_0_un1_n.BLIF \ -AS_030_000_SYNC_i.BLIF as_000_int_0_un0_n.BLIF cpu_est_i_0__n.BLIF \ -dtack_sync_0_un3_n.BLIF sm_amiga_i_4__n.BLIF dtack_sync_0_un1_n.BLIF \ -sm_amiga_i_6__n.BLIF dtack_sync_0_un0_n.BLIF cpu_est_i_2__n.BLIF \ -lds_000_int_0_un3_n.BLIF UDS_000_INT_0_sqmuxa_1_i.BLIF \ -lds_000_int_0_un1_n.BLIF UDS_000_INT_0_sqmuxa_i.BLIF lds_000_int_0_un0_n.BLIF \ -sm_amiga_i_5__n.BLIF uds_000_int_0_un3_n.BLIF CLK_000_DD_i.BLIF \ -uds_000_int_0_un1_n.BLIF sm_amiga_i_7__n.BLIF uds_000_int_0_un0_n.BLIF \ -a_i_30__n.BLIF bg_000_0_un3_n.BLIF a_i_31__n.BLIF bg_000_0_un1_n.BLIF \ -a_i_28__n.BLIF bg_000_0_un0_n.BLIF a_i_29__n.BLIF as_030_000_sync_0_un3_n.BLIF \ -a_i_26__n.BLIF as_030_000_sync_0_un1_n.BLIF a_i_27__n.BLIF \ -as_030_000_sync_0_un0_n.BLIF a_i_24__n.BLIF fpu_cs_int_0_un3_n.BLIF \ -a_i_25__n.BLIF fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF \ -ipl_030_0_2__un3_n.BLIF RST_i.BLIF ipl_030_0_2__un1_n.BLIF N_107_i.BLIF \ -ipl_030_0_2__un0_n.BLIF N_106_i.BLIF ipl_030_0_1__un3_n.BLIF FPU_CS_INT_i.BLIF \ -ipl_030_0_1__un1_n.BLIF CPU_SPACE_i.BLIF ipl_030_0_1__un0_n.BLIF \ -BGACK_030_INT_i.BLIF ipl_030_0_0__un3_n.BLIF AS_030_c.BLIF \ -ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF bgack_030_int_0_un3_n.BLIF \ -DS_030_c.BLIF bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF \ -sm_amiga_d_0_0__un3_n.BLIF sm_amiga_d_0_0__un1_n.BLIF size_c_0__n.BLIF \ -sm_amiga_d_0_0__un0_n.BLIF sm_amiga_d_0_1__un3_n.BLIF size_c_1__n.BLIF \ -sm_amiga_d_0_1__un1_n.BLIF sm_amiga_d_0_1__un0_n.BLIF a_c_0__n.BLIF \ -cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF \ -cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF \ -cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF \ -a_15__n.BLIF a_14__n.BLIF a_13__n.BLIF a_12__n.BLIF a_c_16__n.BLIF \ -a_11__n.BLIF a_c_17__n.BLIF a_10__n.BLIF a_c_18__n.BLIF a_9__n.BLIF \ -a_c_19__n.BLIF a_8__n.BLIF a_c_20__n.BLIF a_7__n.BLIF a_c_21__n.BLIF \ -a_6__n.BLIF a_c_22__n.BLIF a_5__n.BLIF a_c_23__n.BLIF a_4__n.BLIF \ -a_c_24__n.BLIF a_3__n.BLIF a_c_25__n.BLIF a_2__n.BLIF a_c_26__n.BLIF \ -a_1__n.BLIF a_c_27__n.BLIF a_c_28__n.BLIF a_c_29__n.BLIF DSACK_1_.PIN.BLIF \ -DTACK.PIN.BLIF +DSACK_0_.BLIF CLK_OSZI_c.BLIF CLK_OUT_INTreg.BLIF IPL_030DFFSH_0_reg.BLIF \ +inst_BGACK_030_INTreg.BLIF inst_FPU_CS_INTreg.BLIF IPL_030DFFSH_1_reg.BLIF \ +cpu_est_3_reg.BLIF inst_VMA_INTreg.BLIF IPL_030DFFSH_2_reg.BLIF gnd_n_n.BLIF \ +cpu_est_0_.BLIF ipl_c_0__n.BLIF cpu_est_1_.BLIF cpu_est_d_0_.BLIF \ +ipl_c_1__n.BLIF cpu_est_d_3_.BLIF inst_AS_000_INTreg.BLIF ipl_c_2__n.BLIF \ +inst_AS_030_000_SYNC.BLIF inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF \ +dsack_c_1__n.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D.BLIF DTACK_c.BLIF \ +inst_CLK_000_DD.BLIF inst_CLK_OUT_PRE.BLIF vcc_n_n.BLIF cpu_est_d_1_.BLIF \ +cpu_est_d_2_.BLIF cpu_est_2_.BLIF CLK_CNT_0_.BLIF SM_AMIGA_6_.BLIF RST_c.BLIF \ +SM_AMIGA_7_.BLIF inst_UDS_000_INTreg.BLIF RESETDFFreg.BLIF \ +inst_LDS_000_INTreg.BLIF RW_c.BLIF inst_RISING_CLK_AMIGA.BLIF \ +state_machine_un57_clk_000_d_n.BLIF fc_c_0__n.BLIF SM_AMIGA_1_.BLIF \ +DSACK_INT_1_.BLIF fc_c_1__n.BLIF inst_DTACK_DMA.BLIF SM_AMIGA_4_.BLIF \ +SM_AMIGA_3_.BLIF state_machine_un13_as_000_int_n.BLIF SM_AMIGA_5_.BLIF \ +SM_AMIGA_2_.BLIF N_145_i.BLIF SM_AMIGA_0_.BLIF a_c_i_0__n.BLIF \ +state_machine_uds_000_int_8_0_n.BLIF state_machine_lds_000_int_8_0_n.BLIF \ +N_99_i.BLIF N_112_i.BLIF N_100_i.BLIF N_101_i.BLIF sm_amiga_ns_0_2__n.BLIF \ +N_103_i.BLIF N_110_i.BLIF sm_amiga_ns_0_7__n.BLIF cpu_est_0_0_.BLIF \ +N_91_0.BLIF N_92_0.BLIF N_131_i.BLIF N_132_i.BLIF N_122_i.BLIF \ +CLK_OUT_PRE_0.BLIF N_124_i.BLIF N_125_i.BLIF N_126_i.BLIF N_129_i.BLIF \ +N_98.BLIF N_127_i.BLIF N_97.BLIF N_128_i.BLIF N_104.BLIF N_130_i.BLIF \ +N_93.BLIF clk_cpu_est_11_0_1__n.BLIF N_105.BLIF N_134_i.BLIF N_106.BLIF \ +N_133_i.BLIF N_108.BLIF N_135_i.BLIF N_94.BLIF clk_cpu_est_11_0_3__n.BLIF \ +N_109.BLIF size_c_i_1__n.BLIF N_107.BLIF state_machine_un31_clk_000_d_i_n.BLIF \ +N_135_1.BLIF state_machine_as_030_000_sync_3_0_n.BLIF \ +VPA_SYNC_1_sqmuxa_1_0.BLIF un1_as_030_2_0.BLIF N_167.BLIF \ +state_machine_un17_clk_030_0_n.BLIF N_170.BLIF \ +state_machine_un57_clk_000_d_0_n.BLIF state_machine_un42_clk_030_n.BLIF \ +RISING_CLK_AMIGA_i.BLIF DTACK_SYNC_1_sqmuxa.BLIF \ +state_machine_un4_bgack_000_0_n.BLIF VPA_SYNC_1_sqmuxa.BLIF BG_030_c_i.BLIF \ +un1_bg_030.BLIF state_machine_un1_clk_030_0_n.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF \ +N_97_i.BLIF DSACK_INT_1_sqmuxa.BLIF un1_bg_030_0.BLIF \ +state_machine_un1_clk_030_n.BLIF CLK_OUT_PRE_i.BLIF \ +state_machine_un4_bgack_000_n.BLIF N_94_0.BLIF un1_as_030_2.BLIF N_93_0.BLIF \ +state_machine_un17_clk_030_n.BLIF N_108_i.BLIF N_102.BLIF N_109_i.BLIF \ +AS_000_INT_1_sqmuxa.BLIF VPA_SYNC_1_sqmuxa_1.BLIF N_106_i.BLIF \ +state_machine_as_030_000_sync_3_n.BLIF N_107_i.BLIF clk_un3_clk_000_dd_n.BLIF \ +sm_amiga_ns_0_5__n.BLIF state_machine_un31_clk_000_d_n.BLIF N_104_i.BLIF \ +UDS_000_INT_0_sqmuxa.BLIF N_105_i.BLIF state_machine_un13_clk_000_d_n.BLIF \ +state_machine_un13_clk_000_d_4_n.BLIF un1_bg_030_0_1.BLIF \ +state_machine_un13_clk_000_d_1_n.BLIF un1_bg_030_0_2.BLIF \ +state_machine_un8_clk_000_d_n.BLIF state_machine_un31_clk_000_d_i_1_n.BLIF \ +UDS_000_INT_0_sqmuxa_1.BLIF clk_cpu_est_11_0_1_3__n.BLIF N_132.BLIF \ +clk_cpu_est_11_0_1_1__n.BLIF N_131.BLIF clk_cpu_est_11_0_2_1__n.BLIF \ +N_124.BLIF N_167_1.BLIF clk_cpu_est_11_3__n.BLIF N_167_2.BLIF N_135.BLIF \ +N_167_3.BLIF N_133.BLIF N_167_4.BLIF N_134.BLIF N_167_5.BLIF \ +clk_cpu_est_11_1__n.BLIF N_167_6.BLIF N_130.BLIF N_170_1.BLIF N_128.BLIF \ +N_170_2.BLIF N_145.BLIF N_107_1.BLIF N_127.BLIF \ +state_machine_un42_clk_030_1_n.BLIF N_129.BLIF \ +state_machine_un42_clk_030_2_n.BLIF N_126.BLIF \ +state_machine_un42_clk_030_3_n.BLIF N_125.BLIF \ +state_machine_un42_clk_030_4_n.BLIF N_92.BLIF \ +state_machine_un42_clk_030_5_n.BLIF N_91.BLIF DTACK_SYNC_1_sqmuxa_1_0.BLIF \ +N_110.BLIF VPA_SYNC_1_sqmuxa_1_1.BLIF N_103.BLIF VPA_SYNC_1_sqmuxa_2.BLIF \ +N_101.BLIF VPA_SYNC_1_sqmuxa_3.BLIF N_100.BLIF VPA_SYNC_1_sqmuxa_4.BLIF \ +N_112.BLIF N_98_1.BLIF N_99.BLIF state_machine_as_030_000_sync_3_0_1_n.BLIF \ +state_machine_lds_000_int_8_n.BLIF UDS_000_INT_0_sqmuxa_1_0.BLIF \ +state_machine_uds_000_int_8_n.BLIF UDS_000_INT_0_sqmuxa_2.BLIF \ +un2_clk_030_1.BLIF state_machine_un13_clk_000_d_1_0_n.BLIF \ +VMA_INT_1_sqmuxa.BLIF state_machine_un13_clk_000_d_4_1_n.BLIF RW_i.BLIF \ +state_machine_un8_clk_000_d_1_n.BLIF cpu_est_d_i_3__n.BLIF \ +state_machine_un8_clk_000_d_2_n.BLIF cpu_est_d_i_0__n.BLIF \ +state_machine_un8_clk_000_d_3_n.BLIF CLK_000_D_i.BLIF \ +state_machine_un8_clk_000_d_4_n.BLIF AS_000_INT_i.BLIF \ +UDS_000_INT_0_sqmuxa_1_1.BLIF dsack_i_1__n.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF \ +state_machine_un13_clk_000_d_i_n.BLIF UDS_000_INT_0_sqmuxa_1_3.BLIF \ +state_machine_un8_clk_000_d_i_n.BLIF N_132_1.BLIF AS_030_i.BLIF N_131_1.BLIF \ +sm_amiga_i_6__n.BLIF vma_int_0_un3_n.BLIF sm_amiga_i_7__n.BLIF \ +vma_int_0_un1_n.BLIF sm_amiga_i_5__n.BLIF vma_int_0_un0_n.BLIF \ +sm_amiga_i_4__n.BLIF lds_000_int_0_un3_n.BLIF \ +state_machine_un13_clk_000_d_1_i_n.BLIF lds_000_int_0_un1_n.BLIF \ +CLK_000_DD_i.BLIF lds_000_int_0_un0_n.BLIF AS_030_000_SYNC_i.BLIF \ +uds_000_int_0_un3_n.BLIF cpu_est_i_0__n.BLIF uds_000_int_0_un1_n.BLIF \ +cpu_est_i_2__n.BLIF uds_000_int_0_un0_n.BLIF cpu_est_i_3__n.BLIF \ +cpu_est_0_3__un3_n.BLIF cpu_est_i_1__n.BLIF cpu_est_0_3__un1_n.BLIF \ +UDS_000_INT_0_sqmuxa_1_i.BLIF cpu_est_0_3__un0_n.BLIF \ +UDS_000_INT_0_sqmuxa_i.BLIF cpu_est_0_2__un3_n.BLIF DS_030_i.BLIF \ +cpu_est_0_2__un1_n.BLIF VPA_D_i.BLIF cpu_est_0_2__un0_n.BLIF \ +state_machine_un42_clk_030_i_n.BLIF cpu_est_0_1__un3_n.BLIF \ +VPA_SYNC_1_sqmuxa_i.BLIF cpu_est_0_1__un1_n.BLIF N_102_i.BLIF \ +cpu_est_0_1__un0_n.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF fpu_cs_int_0_un3_n.BLIF \ +N_98_i.BLIF fpu_cs_int_0_un1_n.BLIF a_i_18__n.BLIF fpu_cs_int_0_un0_n.BLIF \ +a_i_16__n.BLIF as_000_int_0_un3_n.BLIF a_i_19__n.BLIF as_000_int_0_un1_n.BLIF \ +CLK_030_i.BLIF as_000_int_0_un0_n.BLIF VMA_INT_i.BLIF vpa_sync_0_un3_n.BLIF \ +DTACK_i.BLIF vpa_sync_0_un1_n.BLIF sm_amiga_i_3__n.BLIF vpa_sync_0_un0_n.BLIF \ +sm_amiga_i_1__n.BLIF as_030_000_sync_0_un3_n.BLIF sm_amiga_i_2__n.BLIF \ +as_030_000_sync_0_un1_n.BLIF a_i_30__n.BLIF as_030_000_sync_0_un0_n.BLIF \ +a_i_31__n.BLIF ipl_030_0_2__un3_n.BLIF a_i_28__n.BLIF ipl_030_0_2__un1_n.BLIF \ +a_i_29__n.BLIF ipl_030_0_2__un0_n.BLIF a_i_26__n.BLIF ipl_030_0_1__un3_n.BLIF \ +a_i_27__n.BLIF ipl_030_0_1__un1_n.BLIF a_i_24__n.BLIF ipl_030_0_1__un0_n.BLIF \ +a_i_25__n.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un1_n.BLIF \ +ipl_030_0_0__un0_n.BLIF RST_i.BLIF bgack_030_int_0_un3_n.BLIF \ +FPU_CS_INT_i.BLIF bgack_030_int_0_un1_n.BLIF CPU_SPACE_i.BLIF \ +bgack_030_int_0_un0_n.BLIF BGACK_030_INT_i.BLIF dsack_int_0_1__un3_n.BLIF \ +AS_030_c.BLIF dsack_int_0_1__un1_n.BLIF dsack_int_0_1__un0_n.BLIF \ +bg_000_0_un3_n.BLIF DS_030_c.BLIF bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF \ +dtack_sync_0_un3_n.BLIF dtack_sync_0_un1_n.BLIF size_c_0__n.BLIF \ +dtack_sync_0_un0_n.BLIF a_15__n.BLIF size_c_1__n.BLIF a_14__n.BLIF \ +a_c_0__n.BLIF a_13__n.BLIF a_12__n.BLIF a_11__n.BLIF a_10__n.BLIF a_9__n.BLIF \ +a_8__n.BLIF a_7__n.BLIF a_6__n.BLIF a_c_16__n.BLIF a_5__n.BLIF a_c_17__n.BLIF \ +a_4__n.BLIF a_c_18__n.BLIF a_3__n.BLIF a_c_19__n.BLIF a_2__n.BLIF \ +a_c_20__n.BLIF a_1__n.BLIF a_c_21__n.BLIF a_c_22__n.BLIF a_c_23__n.BLIF \ +a_c_24__n.BLIF a_c_25__n.BLIF a_c_26__n.BLIF a_c_27__n.BLIF a_c_28__n.BLIF \ +a_c_29__n.BLIF a_c_30__n.BLIF a_c_31__n.BLIF CPU_SPACE_c.BLIF BG_030_c.BLIF \ +BG_000DFFSHreg.BLIF BGACK_000_c.BLIF CLK_030_c.BLIF CLK_000_c.BLIF \ +DSACK_1_.PIN.BLIF DTACK.PIN.BLIF .outputs IPL_030_2_ AS_000 UDS_000 LDS_000 BERR BG_000 BGACK_030 CLK_DIV_OUT \ CLK_EXP FPU_CS AVEC AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \ -AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_6_.D SM_AMIGA_6_.C \ -SM_AMIGA_6_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D \ -SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR \ -SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C \ -SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR IPL_030DFFSH_1_reg.D \ +AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ cpu_est_3_reg.D \ +cpu_est_3_reg.C SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.D \ +SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR \ +SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C \ +SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D \ +SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR \ +cpu_est_d_0_.D cpu_est_d_0_.C cpu_est_d_1_.D cpu_est_d_1_.C cpu_est_d_2_.D \ +cpu_est_d_2_.C cpu_est_d_3_.D cpu_est_d_3_.C IPL_030DFFSH_0_reg.D \ +IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP IPL_030DFFSH_1_reg.D \ IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D \ IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP cpu_est_0_.D cpu_est_0_.C \ -cpu_est_1_.D cpu_est_1_.C cpu_est_2_.D cpu_est_2_.C cpu_est_3_reg.D \ -cpu_est_3_reg.C SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP cpu_est_d_0_.D \ -cpu_est_d_0_.C cpu_est_d_1_.D cpu_est_d_1_.C cpu_est_d_2_.D cpu_est_d_2_.C \ -cpu_est_d_3_.D cpu_est_d_3_.C SM_AMIGA_D_0_.D SM_AMIGA_D_0_.C SM_AMIGA_D_1_.D \ -SM_AMIGA_D_1_.C SM_AMIGA_D_2_.D SM_AMIGA_D_2_.C IPL_030DFFSH_0_reg.D \ -IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP inst_AS_000_INTreg.D \ -inst_AS_000_INTreg.C inst_AS_000_INTreg.AP inst_VPA_SYNC.D inst_VPA_SYNC.C \ -inst_VPA_SYNC.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C \ +cpu_est_1_.D cpu_est_1_.C cpu_est_2_.D cpu_est_2_.C inst_VPA_SYNC.D \ +inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C \ inst_AS_030_000_SYNC.AP inst_VMA_INTreg.D inst_VMA_INTreg.C inst_VMA_INTreg.AP \ BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP DSACK_INT_1_.D \ DSACK_INT_1_.C DSACK_INT_1_.AP inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C \ @@ -236,99 +217,102 @@ inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C \ inst_UDS_000_INTreg.D inst_UDS_000_INTreg.C inst_UDS_000_INTreg.AP \ inst_LDS_000_INTreg.D inst_LDS_000_INTreg.C inst_LDS_000_INTreg.AP \ inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_FPU_CS_INTreg.D \ -inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP inst_DTACK_DMA.D inst_DTACK_DMA.C \ +inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP inst_AS_000_INTreg.D \ +inst_AS_000_INTreg.C inst_AS_000_INTreg.AP inst_DTACK_DMA.D inst_DTACK_DMA.C \ inst_DTACK_DMA.AP inst_RISING_CLK_AMIGA.D inst_RISING_CLK_AMIGA.C CLK_CNT_0_.D \ CLK_CNT_0_.C inst_VPA_D.D inst_VPA_D.C inst_CLK_000_D.D inst_CLK_000_D.C \ RESETDFFreg.D RESETDFFreg.C inst_CLK_000_DD.D inst_CLK_000_DD.C \ -inst_CLK_OUT_INTreg.D inst_CLK_OUT_INTreg.C DSACK_1_ DTACK DSACK_0_ a_c_30__n \ -a_c_31__n CPU_SPACE_c BG_030_c gnd_n_n BGACK_000_c CLK_030_c CLK_000_c \ -CLK_OSZI_c vcc_n_n ipl_c_0__n ipl_c_1__n ipl_c_2__n \ -state_machine_un57_clk_000_d_n dsack_c_1__n DTACK_c \ -state_machine_un13_as_000_int_n RST_c clk_exp RW_c fc_c_0__n fc_c_1__n \ -state_machine_un57_clk_000_d_0_n N_161_i a_c_i_0__n \ -state_machine_uds_000_int_8_0_n state_machine_lds_000_int_8_0_n N_113_i \ -sm_amiga_ns_0_2__n N_118_i N_117_i sm_amiga_ns_0_5__n N_123_i N_119_i N_120_i \ -sm_amiga_ns_0_7__n CLK_OUT_PRE_i N_106 N_102_0 N_107 size_c_i_1__n \ -clk_un3_clk_000_dd_n state_machine_un31_clk_000_d_i_n clk_cpu_est_11_1__n \ -RISING_CLK_AMIGA_i clk_cpu_est_11_3__n state_machine_un4_bgack_000_0_n \ -BG_030_c_i state_machine_un1_clk_030_0_n state_machine_un17_clk_030_0_n N_161 \ -un1_as_030_2_0 N_114 state_machine_as_030_000_sync_3_2_n N_109 N_109_i N_111 \ -un1_bg_030_0 N_112 N_111_i N_122 N_122_i N_115 N_101 N_147_i N_116 \ -clk_cpu_est_11_0_3__n N_124 N_145_i N_139 N_146_i N_137 N_142_i N_140 \ -clk_cpu_est_11_0_1__n N_141 N_140_i N_136 N_139_i N_142 N_141_i N_145 N_138_i \ -N_138 N_137_i N_146 N_136_i N_143 N_143_i N_144 N_144_i UDS_000_INT_0_sqmuxa \ -N_134_i UDS_000_INT_0_sqmuxa_1 N_101_0 N_147 N_115_i N_147_1 N_116_i \ -state_machine_un13_clk_000_d_1_n N_186 N_124_i N_189 \ -state_machine_un42_clk_030_n N_112_i un1_bg_030 sm_amiga_ns_0_0__n \ -state_machine_as_030_000_sync_3_n N_86_i_1 un1_as_030_2 un1_bg_030_0_1 \ -state_machine_un17_clk_030_n un1_bg_030_0_2 state_machine_un1_clk_030_n \ -state_machine_as_030_000_sync_3_2_1_n state_machine_un4_bgack_000_n \ -state_machine_un31_clk_000_d_i_1_n N_108 N_186_1 \ -state_machine_un31_clk_000_d_n N_186_2 state_machine_un13_clk_000_d_n N_186_3 \ -state_machine_un13_clk_000_d_4_n N_186_4 state_machine_un8_clk_000_d_n N_186_5 \ -DTACK_SYNC_1_sqmuxa N_186_6 VPA_SYNC_1_sqmuxa_1_0 N_189_1 VPA_SYNC_1_sqmuxa \ -N_189_2 N_123 clk_cpu_est_11_0_1_1__n N_118 clk_cpu_est_11_0_2_1__n N_110 \ -clk_cpu_est_11_0_1_3__n N_102 N_143_1 N_120 N_144_1 N_119 N_106_1 N_117 \ -N_106_2 N_113 N_107_1 state_machine_lds_000_int_8_n UDS_000_INT_0_sqmuxa_1_1 \ -state_machine_uds_000_int_8_n UDS_000_INT_0_sqmuxa_1_2 DTACK_SYNC_1_sqmuxa_1 \ -UDS_000_INT_0_sqmuxa_1_3 un2_clk_030_1 UDS_000_INT_0_sqmuxa_1_0 \ -VPA_SYNC_1_sqmuxa_1 UDS_000_INT_0_sqmuxa_2 AS_000_INT_1_sqmuxa \ -state_machine_un42_clk_030_1_n VMA_INT_1_sqmuxa state_machine_un42_clk_030_2_n \ -DSACK_INT_1_sqmuxa state_machine_un42_clk_030_3_n RW_i \ -state_machine_un42_clk_030_4_n clk_exp_i state_machine_un42_clk_030_5_n \ -DTACK_SYNC_1_sqmuxa_i state_machine_un13_clk_000_d_1_0_n N_114_i \ -state_machine_un13_clk_000_d_4_1_n VPA_SYNC_1_sqmuxa_i \ -state_machine_un8_clk_000_d_1_n N_110_i state_machine_un8_clk_000_d_2_n \ -N_108_i state_machine_un8_clk_000_d_3_n cpu_est_d_i_3__n \ -state_machine_un8_clk_000_d_4_n cpu_est_d_i_0__n DTACK_SYNC_1_sqmuxa_1_0 \ -CLK_000_D_i VPA_SYNC_1_sqmuxa_1_1 AS_030_i VPA_SYNC_1_sqmuxa_2 AS_000_INT_i \ -VPA_SYNC_1_sqmuxa_3 dsack_i_1__n VPA_SYNC_1_sqmuxa_4 \ -state_machine_un13_clk_000_d_i_n N_108_1 state_machine_un8_clk_000_d_i_n \ -N_118_1 state_machine_un13_clk_000_d_1_i_n N_110_1 sm_amiga_i_1__n clk_exp_1 \ -sm_amiga_i_2__n sm_amiga_d_0_2__un3_n sm_amiga_i_0__n sm_amiga_d_0_2__un1_n \ -sm_amiga_i_3__n sm_amiga_d_0_2__un0_n VPA_D_i dsack_int_0_1__un3_n VMA_INT_i \ -dsack_int_0_1__un1_n DTACK_i dsack_int_0_1__un0_n cpu_est_i_3__n \ -vma_int_0_un3_n a_i_18__n vma_int_0_un1_n a_i_16__n vma_int_0_un0_n a_i_19__n \ -vpa_sync_0_un3_n CLK_030_i vpa_sync_0_un1_n state_machine_un42_clk_030_i_n \ -vpa_sync_0_un0_n DS_030_i as_000_int_0_un3_n cpu_est_i_1__n as_000_int_0_un1_n \ -AS_030_000_SYNC_i as_000_int_0_un0_n cpu_est_i_0__n dtack_sync_0_un3_n \ -sm_amiga_i_4__n dtack_sync_0_un1_n sm_amiga_i_6__n dtack_sync_0_un0_n \ -cpu_est_i_2__n lds_000_int_0_un3_n UDS_000_INT_0_sqmuxa_1_i \ -lds_000_int_0_un1_n UDS_000_INT_0_sqmuxa_i lds_000_int_0_un0_n sm_amiga_i_5__n \ -uds_000_int_0_un3_n CLK_000_DD_i uds_000_int_0_un1_n sm_amiga_i_7__n \ -uds_000_int_0_un0_n a_i_30__n bg_000_0_un3_n a_i_31__n bg_000_0_un1_n \ -a_i_28__n bg_000_0_un0_n a_i_29__n as_030_000_sync_0_un3_n a_i_26__n \ -as_030_000_sync_0_un1_n a_i_27__n as_030_000_sync_0_un0_n a_i_24__n \ -fpu_cs_int_0_un3_n a_i_25__n fpu_cs_int_0_un1_n fpu_cs_int_0_un0_n \ -ipl_030_0_2__un3_n RST_i ipl_030_0_2__un1_n N_107_i ipl_030_0_2__un0_n N_106_i \ -ipl_030_0_1__un3_n FPU_CS_INT_i ipl_030_0_1__un1_n CPU_SPACE_i \ -ipl_030_0_1__un0_n BGACK_030_INT_i ipl_030_0_0__un3_n AS_030_c \ -ipl_030_0_0__un1_n ipl_030_0_0__un0_n bgack_030_int_0_un3_n DS_030_c \ -bgack_030_int_0_un1_n bgack_030_int_0_un0_n sm_amiga_d_0_0__un3_n \ -sm_amiga_d_0_0__un1_n size_c_0__n sm_amiga_d_0_0__un0_n sm_amiga_d_0_1__un3_n \ -size_c_1__n sm_amiga_d_0_1__un1_n sm_amiga_d_0_1__un0_n a_c_0__n \ -cpu_est_0_1__un3_n cpu_est_0_1__un1_n cpu_est_0_1__un0_n cpu_est_0_2__un3_n \ -cpu_est_0_2__un1_n cpu_est_0_2__un0_n cpu_est_0_3__un3_n cpu_est_0_3__un1_n \ -cpu_est_0_3__un0_n a_15__n a_14__n a_13__n a_12__n a_c_16__n a_11__n a_c_17__n \ -a_10__n a_c_18__n a_9__n a_c_19__n a_8__n a_c_20__n a_7__n a_c_21__n a_6__n \ -a_c_22__n a_5__n a_c_23__n a_4__n a_c_24__n a_3__n a_c_25__n a_2__n a_c_26__n \ -a_1__n a_c_27__n a_c_28__n a_c_29__n DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE \ -LDS_000.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE cpu_est_0_0_ CLK_OUT_PRE_0 \ -G_98 G_99 G_100 -.names N_86_i_1.BLIF N_122_i.BLIF SM_AMIGA_6_.D +CLK_OUT_INTreg.D CLK_OUT_INTreg.C DSACK_1_ DTACK DSACK_0_ CLK_OSZI_c gnd_n_n \ +ipl_c_0__n ipl_c_1__n ipl_c_2__n dsack_c_1__n DTACK_c vcc_n_n RST_c RW_c \ +state_machine_un57_clk_000_d_n fc_c_0__n fc_c_1__n \ +state_machine_un13_as_000_int_n N_145_i a_c_i_0__n \ +state_machine_uds_000_int_8_0_n state_machine_lds_000_int_8_0_n N_99_i N_112_i \ +N_100_i N_101_i sm_amiga_ns_0_2__n N_103_i N_110_i sm_amiga_ns_0_7__n N_91_0 \ +N_92_0 N_131_i N_132_i N_122_i N_124_i N_125_i N_126_i N_129_i N_98 N_127_i \ +N_97 N_128_i N_104 N_130_i N_93 clk_cpu_est_11_0_1__n N_105 N_134_i N_106 \ +N_133_i N_108 N_135_i N_94 clk_cpu_est_11_0_3__n N_109 size_c_i_1__n N_107 \ +state_machine_un31_clk_000_d_i_n N_135_1 state_machine_as_030_000_sync_3_0_n \ +VPA_SYNC_1_sqmuxa_1_0 un1_as_030_2_0 N_167 state_machine_un17_clk_030_0_n \ +N_170 state_machine_un57_clk_000_d_0_n state_machine_un42_clk_030_n \ +RISING_CLK_AMIGA_i DTACK_SYNC_1_sqmuxa state_machine_un4_bgack_000_0_n \ +VPA_SYNC_1_sqmuxa BG_030_c_i un1_bg_030 state_machine_un1_clk_030_0_n \ +DTACK_SYNC_1_sqmuxa_1 N_97_i DSACK_INT_1_sqmuxa un1_bg_030_0 \ +state_machine_un1_clk_030_n CLK_OUT_PRE_i state_machine_un4_bgack_000_n N_94_0 \ +un1_as_030_2 N_93_0 state_machine_un17_clk_030_n N_108_i N_102 N_109_i \ +AS_000_INT_1_sqmuxa VPA_SYNC_1_sqmuxa_1 N_106_i \ +state_machine_as_030_000_sync_3_n N_107_i clk_un3_clk_000_dd_n \ +sm_amiga_ns_0_5__n state_machine_un31_clk_000_d_n N_104_i UDS_000_INT_0_sqmuxa \ +N_105_i state_machine_un13_clk_000_d_n state_machine_un13_clk_000_d_4_n \ +un1_bg_030_0_1 state_machine_un13_clk_000_d_1_n un1_bg_030_0_2 \ +state_machine_un8_clk_000_d_n state_machine_un31_clk_000_d_i_1_n \ +UDS_000_INT_0_sqmuxa_1 clk_cpu_est_11_0_1_3__n N_132 clk_cpu_est_11_0_1_1__n \ +N_131 clk_cpu_est_11_0_2_1__n N_124 N_167_1 clk_cpu_est_11_3__n N_167_2 N_135 \ +N_167_3 N_133 N_167_4 N_134 N_167_5 clk_cpu_est_11_1__n N_167_6 N_130 N_170_1 \ +N_128 N_170_2 N_145 N_107_1 N_127 state_machine_un42_clk_030_1_n N_129 \ +state_machine_un42_clk_030_2_n N_126 state_machine_un42_clk_030_3_n N_125 \ +state_machine_un42_clk_030_4_n N_92 state_machine_un42_clk_030_5_n N_91 \ +DTACK_SYNC_1_sqmuxa_1_0 N_110 VPA_SYNC_1_sqmuxa_1_1 N_103 VPA_SYNC_1_sqmuxa_2 \ +N_101 VPA_SYNC_1_sqmuxa_3 N_100 VPA_SYNC_1_sqmuxa_4 N_112 N_98_1 N_99 \ +state_machine_as_030_000_sync_3_0_1_n state_machine_lds_000_int_8_n \ +UDS_000_INT_0_sqmuxa_1_0 state_machine_uds_000_int_8_n UDS_000_INT_0_sqmuxa_2 \ +un2_clk_030_1 state_machine_un13_clk_000_d_1_0_n VMA_INT_1_sqmuxa \ +state_machine_un13_clk_000_d_4_1_n RW_i state_machine_un8_clk_000_d_1_n \ +cpu_est_d_i_3__n state_machine_un8_clk_000_d_2_n cpu_est_d_i_0__n \ +state_machine_un8_clk_000_d_3_n CLK_000_D_i state_machine_un8_clk_000_d_4_n \ +AS_000_INT_i UDS_000_INT_0_sqmuxa_1_1 dsack_i_1__n UDS_000_INT_0_sqmuxa_1_2 \ +state_machine_un13_clk_000_d_i_n UDS_000_INT_0_sqmuxa_1_3 \ +state_machine_un8_clk_000_d_i_n N_132_1 AS_030_i N_131_1 sm_amiga_i_6__n \ +vma_int_0_un3_n sm_amiga_i_7__n vma_int_0_un1_n sm_amiga_i_5__n \ +vma_int_0_un0_n sm_amiga_i_4__n lds_000_int_0_un3_n \ +state_machine_un13_clk_000_d_1_i_n lds_000_int_0_un1_n CLK_000_DD_i \ +lds_000_int_0_un0_n AS_030_000_SYNC_i uds_000_int_0_un3_n cpu_est_i_0__n \ +uds_000_int_0_un1_n cpu_est_i_2__n uds_000_int_0_un0_n cpu_est_i_3__n \ +cpu_est_0_3__un3_n cpu_est_i_1__n cpu_est_0_3__un1_n UDS_000_INT_0_sqmuxa_1_i \ +cpu_est_0_3__un0_n UDS_000_INT_0_sqmuxa_i cpu_est_0_2__un3_n DS_030_i \ +cpu_est_0_2__un1_n VPA_D_i cpu_est_0_2__un0_n state_machine_un42_clk_030_i_n \ +cpu_est_0_1__un3_n VPA_SYNC_1_sqmuxa_i cpu_est_0_1__un1_n N_102_i \ +cpu_est_0_1__un0_n DTACK_SYNC_1_sqmuxa_i fpu_cs_int_0_un3_n N_98_i \ +fpu_cs_int_0_un1_n a_i_18__n fpu_cs_int_0_un0_n a_i_16__n as_000_int_0_un3_n \ +a_i_19__n as_000_int_0_un1_n CLK_030_i as_000_int_0_un0_n VMA_INT_i \ +vpa_sync_0_un3_n DTACK_i vpa_sync_0_un1_n sm_amiga_i_3__n vpa_sync_0_un0_n \ +sm_amiga_i_1__n as_030_000_sync_0_un3_n sm_amiga_i_2__n \ +as_030_000_sync_0_un1_n a_i_30__n as_030_000_sync_0_un0_n a_i_31__n \ +ipl_030_0_2__un3_n a_i_28__n ipl_030_0_2__un1_n a_i_29__n ipl_030_0_2__un0_n \ +a_i_26__n ipl_030_0_1__un3_n a_i_27__n ipl_030_0_1__un1_n a_i_24__n \ +ipl_030_0_1__un0_n a_i_25__n ipl_030_0_0__un3_n ipl_030_0_0__un1_n \ +ipl_030_0_0__un0_n RST_i bgack_030_int_0_un3_n FPU_CS_INT_i \ +bgack_030_int_0_un1_n CPU_SPACE_i bgack_030_int_0_un0_n BGACK_030_INT_i \ +dsack_int_0_1__un3_n AS_030_c dsack_int_0_1__un1_n dsack_int_0_1__un0_n \ +bg_000_0_un3_n DS_030_c bg_000_0_un1_n bg_000_0_un0_n dtack_sync_0_un3_n \ +dtack_sync_0_un1_n size_c_0__n dtack_sync_0_un0_n a_15__n size_c_1__n a_14__n \ +a_c_0__n a_13__n a_12__n a_11__n a_10__n a_9__n a_8__n a_7__n a_6__n a_c_16__n \ +a_5__n a_c_17__n a_4__n a_c_18__n a_3__n a_c_19__n a_2__n a_c_20__n a_1__n \ +a_c_21__n a_c_22__n a_c_23__n a_c_24__n a_c_25__n a_c_26__n a_c_27__n \ +a_c_28__n a_c_29__n a_c_30__n a_c_31__n CPU_SPACE_c BG_030_c BGACK_000_c \ +CLK_030_c CLK_000_c DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE LDS_000.OE \ +BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE cpu_est_0_0_ CLK_OUT_PRE_0 +.names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_reg.D +1- 1 +-1 1 +.names inst_CLK_000_D.BLIF N_99_i.BLIF SM_AMIGA_7_.D +11 1 +.names N_100_i.BLIF N_112_i.BLIF SM_AMIGA_6_.D 11 1 .names sm_amiga_ns_0_2__n.BLIF SM_AMIGA_5_.D 0 1 -.names CLK_000_D_i.BLIF N_124_i.BLIF SM_AMIGA_4_.D +.names CLK_000_D_i.BLIF N_103_i.BLIF SM_AMIGA_4_.D 11 1 -.names N_115_i.BLIF N_116_i.BLIF SM_AMIGA_3_.D +.names N_104_i.BLIF N_105_i.BLIF SM_AMIGA_3_.D 11 1 .names sm_amiga_ns_0_5__n.BLIF SM_AMIGA_2_.D 0 1 -.names N_119_i.BLIF N_123_i.BLIF SM_AMIGA_1_.D +.names N_108_i.BLIF N_109_i.BLIF SM_AMIGA_1_.D 11 1 .names sm_amiga_ns_0_7__n.BLIF SM_AMIGA_0_.D 0 1 +.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF IPL_030DFFSH_0_reg.D +1- 1 +-1 1 .names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF IPL_030DFFSH_1_reg.D 1- 1 -1 1 @@ -341,26 +325,6 @@ G_98 G_99 G_100 .names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D 1- 1 -1 1 -.names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_reg.D -1- 1 --1 1 -.names sm_amiga_ns_0_0__n.BLIF SM_AMIGA_7_.D -0 1 -.names sm_amiga_d_0_0__un1_n.BLIF sm_amiga_d_0_0__un0_n.BLIF SM_AMIGA_D_0_.D -1- 1 --1 1 -.names sm_amiga_d_0_1__un1_n.BLIF sm_amiga_d_0_1__un0_n.BLIF SM_AMIGA_D_1_.D -1- 1 --1 1 -.names sm_amiga_d_0_2__un1_n.BLIF sm_amiga_d_0_2__un0_n.BLIF SM_AMIGA_D_2_.D -1- 1 --1 1 -.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF IPL_030DFFSH_0_reg.D -1- 1 --1 1 -.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INTreg.D -1- 1 --1 1 .names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D 1- 1 -1 1 @@ -393,6 +357,9 @@ inst_BGACK_030_INTreg.D .names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D 1- 1 -1 1 +.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INTreg.D +1- 1 +-1 1 .names state_machine_un13_as_000_int_n.BLIF inst_DTACK_DMA.D 0 1 .names CLK_000_D_i.BLIF CLK_000_c.BLIF inst_RISING_CLK_AMIGA.D @@ -406,543 +373,505 @@ inst_BGACK_030_INTreg.D 0 1 .names AS_000_INT_i.BLIF dsack_i_1__n.BLIF state_machine_un13_as_000_int_n 11 1 -.names clk_exp_1.BLIF G_99.BLIF clk_exp -11 1 -.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \ -state_machine_un57_clk_000_d_0_n -11 1 -.names N_161.BLIF N_161_i +.names N_145.BLIF N_145_i 0 1 .names a_c_0__n.BLIF a_c_i_0__n 0 1 -.names a_c_i_0__n.BLIF N_161_i.BLIF state_machine_uds_000_int_8_0_n +.names a_c_i_0__n.BLIF N_145_i.BLIF state_machine_uds_000_int_8_0_n 11 1 -.names N_161_i.BLIF state_machine_un31_clk_000_d_n.BLIF \ +.names N_145_i.BLIF state_machine_un31_clk_000_d_n.BLIF \ state_machine_lds_000_int_8_0_n 11 1 -.names N_113.BLIF N_113_i +.names N_99.BLIF N_99_i 0 1 -.names N_113_i.BLIF N_114_i.BLIF sm_amiga_ns_0_2__n +.names N_112.BLIF N_112_i +0 1 +.names N_100.BLIF N_100_i +0 1 +.names N_101.BLIF N_101_i +0 1 +.names N_101_i.BLIF N_102_i.BLIF sm_amiga_ns_0_2__n 11 1 -.names N_118.BLIF N_118_i +.names N_103.BLIF N_103_i 0 1 -.names N_117.BLIF N_117_i +.names N_110.BLIF N_110_i 0 1 -.names N_117_i.BLIF N_118_i.BLIF sm_amiga_ns_0_5__n +.names N_98_i.BLIF N_110_i.BLIF sm_amiga_ns_0_7__n 11 1 -.names N_123.BLIF N_123_i -0 1 -.names N_119.BLIF N_119_i -0 1 -.names N_120.BLIF N_120_i -0 1 -.names N_110_i.BLIF N_120_i.BLIF sm_amiga_ns_0_7__n +.names inst_AS_000_INTreg.BLIF SM_AMIGA_0_.BLIF N_91_0 11 1 -.names inst_CLK_OUT_PRE.BLIF CLK_OUT_PRE_i +.names CLK_000_D_i.BLIF SM_AMIGA_7_.BLIF N_92_0 +11 1 +.names N_131.BLIF N_131_i 0 1 -.names N_106_1.BLIF N_106_2.BLIF N_106 +.names N_132.BLIF N_132_i +0 1 +.names N_131_i.BLIF N_132_i.BLIF N_122_i 11 1 -.names CLK_OUT_PRE_i.BLIF SM_AMIGA_1_.BLIF N_102_0 +.names cpu_est_1_.BLIF cpu_est_2_.BLIF N_124_i 11 1 -.names N_107_1.BLIF sm_amiga_i_1__n.BLIF N_107 +.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_125_i +11 1 +.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_126_i +11 1 +.names N_129.BLIF N_129_i +0 1 +.names N_98_1.BLIF SM_AMIGA_1_.BLIF N_98 +11 1 +.names N_127.BLIF N_127_i +0 1 +.names sm_amiga_i_6__n.BLIF sm_amiga_i_7__n.BLIF N_97 +11 1 +.names N_128.BLIF N_128_i +0 1 +.names CLK_000_D_i.BLIF N_93.BLIF N_104 +11 1 +.names N_130.BLIF N_130_i +0 1 +.names N_93_0.BLIF N_93 +0 1 +.names clk_cpu_est_11_0_1_1__n.BLIF clk_cpu_est_11_0_2_1__n.BLIF \ +clk_cpu_est_11_0_1__n +11 1 +.names sm_amiga_i_3__n.BLIF sm_amiga_i_4__n.BLIF N_105 +11 1 +.names N_134.BLIF N_134_i +0 1 +.names CLK_000_D_i.BLIF SM_AMIGA_2_.BLIF N_106 +11 1 +.names N_133.BLIF N_133_i +0 1 +.names CLK_000_D_i.BLIF N_94.BLIF N_108 +11 1 +.names N_135.BLIF N_135_i +0 1 +.names N_94_0.BLIF N_94 +0 1 +.names clk_cpu_est_11_0_1_3__n.BLIF N_134_i.BLIF clk_cpu_est_11_0_3__n +11 1 +.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_109 11 1 .names size_c_1__n.BLIF size_c_i_1__n 0 1 -.names inst_CLK_000_D.BLIF CLK_000_DD_i.BLIF clk_un3_clk_000_dd_n +.names N_107_1.BLIF state_machine_un57_clk_000_d_n.BLIF N_107 11 1 .names state_machine_un31_clk_000_d_i_1_n.BLIF size_c_i_1__n.BLIF \ state_machine_un31_clk_000_d_i_n 11 1 -.names clk_cpu_est_11_0_1__n.BLIF clk_cpu_est_11_1__n -0 1 -.names inst_RISING_CLK_AMIGA.BLIF RISING_CLK_AMIGA_i -0 1 -.names clk_cpu_est_11_0_3__n.BLIF clk_cpu_est_11_3__n -0 1 -.names BGACK_000_c.BLIF RISING_CLK_AMIGA_i.BLIF \ -state_machine_un4_bgack_000_0_n +.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_135_1 11 1 -.names BG_030_c.BLIF BG_030_c_i -0 1 -.names BG_030_c_i.BLIF CLK_030_c.BLIF state_machine_un1_clk_030_0_n +.names state_machine_as_030_000_sync_3_0_1_n.BLIF \ +state_machine_un42_clk_030_i_n.BLIF state_machine_as_030_000_sync_3_0_n 11 1 -.names AS_030_i.BLIF CLK_030_i.BLIF state_machine_un17_clk_030_0_n -11 1 -.names UDS_000_INT_0_sqmuxa_1_i.BLIF UDS_000_INT_0_sqmuxa_i.BLIF N_161 +.names inst_CLK_000_D.BLIF SM_AMIGA_3_.BLIF VPA_SYNC_1_sqmuxa_1_0 11 1 .names AS_030_i.BLIF state_machine_un42_clk_030_n.BLIF un1_as_030_2_0 11 1 -.names N_122.BLIF SM_AMIGA_6_.BLIF N_114 +.names N_167_5.BLIF N_167_6.BLIF N_167 11 1 -.names state_machine_as_030_000_sync_3_2_1_n.BLIF \ -state_machine_un42_clk_030_i_n.BLIF state_machine_as_030_000_sync_3_2_n +.names AS_030_i.BLIF CLK_030_i.BLIF state_machine_un17_clk_030_0_n 11 1 -.names sm_amiga_i_6__n.BLIF sm_amiga_i_7__n.BLIF N_109 +.names N_170_1.BLIF N_170_2.BLIF N_170 11 1 -.names N_109.BLIF N_109_i -0 1 -.names inst_CLK_000_D.BLIF SM_AMIGA_7_.BLIF N_111 -11 1 -.names un1_bg_030_0_1.BLIF un1_bg_030_0_2.BLIF un1_bg_030_0 -11 1 -.names SM_AMIGA_0_.BLIF state_machine_un13_clk_000_d_1_n.BLIF N_112 -11 1 -.names N_111.BLIF N_111_i -0 1 -.names AS_030_000_SYNC_i.BLIF clk_un3_clk_000_dd_n.BLIF N_122 -11 1 -.names N_122.BLIF N_122_i -0 1 -.names CLK_000_D_i.BLIF N_101.BLIF N_115 -11 1 -.names N_101_0.BLIF N_101 -0 1 -.names N_147.BLIF N_147_i -0 1 -.names sm_amiga_i_3__n.BLIF sm_amiga_i_4__n.BLIF N_116 -11 1 -.names clk_cpu_est_11_0_1_3__n.BLIF N_146_i.BLIF clk_cpu_est_11_0_3__n -11 1 -.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_124 -11 1 -.names N_145.BLIF N_145_i -0 1 -.names N_137.BLIF cpu_est_i_0__n.BLIF N_139 -11 1 -.names N_146.BLIF N_146_i -0 1 -.names N_137_i.BLIF N_137 -0 1 -.names N_142.BLIF N_142_i -0 1 -.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_140 -11 1 -.names clk_cpu_est_11_0_1_1__n.BLIF clk_cpu_est_11_0_2_1__n.BLIF \ -clk_cpu_est_11_0_1__n -11 1 -.names N_137_i.BLIF cpu_est_0_.BLIF N_141 -11 1 -.names N_140.BLIF N_140_i -0 1 -.names N_136_i.BLIF N_136 -0 1 -.names N_139.BLIF N_139_i -0 1 -.names N_136_i.BLIF cpu_est_3_reg.BLIF N_142 -11 1 -.names N_141.BLIF N_141_i -0 1 -.names N_138.BLIF cpu_est_3_reg.BLIF N_145 -11 1 -.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_138_i -11 1 -.names N_138_i.BLIF N_138 -0 1 -.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_137_i -11 1 -.names N_138_i.BLIF cpu_est_i_2__n.BLIF N_146 -11 1 -.names cpu_est_1_.BLIF cpu_est_2_.BLIF N_136_i -11 1 -.names N_143_1.BLIF cpu_est_i_3__n.BLIF N_143 -11 1 -.names N_143.BLIF N_143_i -0 1 -.names N_144_1.BLIF cpu_est_i_2__n.BLIF N_144 -11 1 -.names N_144.BLIF N_144_i -0 1 -.names UDS_000_INT_0_sqmuxa_1_0.BLIF UDS_000_INT_0_sqmuxa_2.BLIF \ -UDS_000_INT_0_sqmuxa -11 1 -.names N_143_i.BLIF N_144_i.BLIF N_134_i -11 1 -.names UDS_000_INT_0_sqmuxa_1_3.BLIF clk_un3_clk_000_dd_n.BLIF \ -UDS_000_INT_0_sqmuxa_1 -11 1 -.names SM_AMIGA_3_.BLIF state_machine_un57_clk_000_d_0_n.BLIF N_101_0 -11 1 -.names N_147_1.BLIF cpu_est_i_2__n.BLIF N_147 -11 1 -.names N_115.BLIF N_115_i -0 1 -.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_147_1 -11 1 -.names N_116.BLIF N_116_i -0 1 -.names inst_AS_000_INTreg.BLIF inst_CLK_000_D.BLIF \ -state_machine_un13_clk_000_d_1_n -11 1 -.names N_186_5.BLIF N_186_6.BLIF N_186 -11 1 -.names N_124.BLIF N_124_i -0 1 -.names N_189_1.BLIF N_189_2.BLIF N_189 +.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \ +state_machine_un57_clk_000_d_0_n 11 1 .names state_machine_un42_clk_030_4_n.BLIF state_machine_un42_clk_030_5_n.BLIF \ state_machine_un42_clk_030_n 11 1 -.names N_112.BLIF N_112_i +.names inst_RISING_CLK_AMIGA.BLIF RISING_CLK_AMIGA_i +0 1 +.names DTACK_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF \ +DTACK_SYNC_1_sqmuxa +11 1 +.names BGACK_000_c.BLIF RISING_CLK_AMIGA_i.BLIF \ +state_machine_un4_bgack_000_0_n +11 1 +.names VPA_SYNC_1_sqmuxa_4.BLIF VPA_SYNC_1_sqmuxa_3.BLIF VPA_SYNC_1_sqmuxa +11 1 +.names BG_030_c.BLIF BG_030_c_i 0 1 .names un1_bg_030_0.BLIF un1_bg_030 0 1 -.names N_111_i.BLIF N_112_i.BLIF sm_amiga_ns_0_0__n +.names BG_030_c_i.BLIF CLK_030_c.BLIF state_machine_un1_clk_030_0_n 11 1 -.names state_machine_as_030_000_sync_3_2_n.BLIF \ -state_machine_as_030_000_sync_3_n -0 1 -.names N_109_i.BLIF N_111_i.BLIF N_86_i_1 +.names AS_030_i.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF DTACK_SYNC_1_sqmuxa_1 11 1 -.names un1_as_030_2_0.BLIF un1_as_030_2 +.names N_97.BLIF N_97_i 0 1 -.names BG_030_c_i.BLIF CPU_SPACE_i.BLIF un1_bg_030_0_1 +.names AS_030_i.BLIF N_98_i.BLIF DSACK_INT_1_sqmuxa 11 1 -.names state_machine_un17_clk_030_0_n.BLIF state_machine_un17_clk_030_n -0 1 -.names AS_030_c.BLIF N_109_i.BLIF un1_bg_030_0_2 +.names un1_bg_030_0_1.BLIF un1_bg_030_0_2.BLIF un1_bg_030_0 11 1 .names state_machine_un1_clk_030_0_n.BLIF state_machine_un1_clk_030_n 0 1 -.names AS_030_i.BLIF CPU_SPACE_i.BLIF state_machine_as_030_000_sync_3_2_1_n -11 1 +.names inst_CLK_OUT_PRE.BLIF CLK_OUT_PRE_i +0 1 .names state_machine_un4_bgack_000_0_n.BLIF state_machine_un4_bgack_000_n 0 1 -.names size_c_0__n.BLIF a_c_i_0__n.BLIF state_machine_un31_clk_000_d_i_1_n +.names CLK_OUT_PRE_i.BLIF sm_amiga_i_2__n.BLIF N_94_0 11 1 -.names N_108_1.BLIF sm_amiga_i_3__n.BLIF N_108 +.names un1_as_030_2_0.BLIF un1_as_030_2 +0 1 +.names SM_AMIGA_3_.BLIF state_machine_un57_clk_000_d_0_n.BLIF N_93_0 11 1 -.names a_i_24__n.BLIF a_i_25__n.BLIF N_186_1 +.names state_machine_un17_clk_030_0_n.BLIF state_machine_un17_clk_030_n +0 1 +.names N_108.BLIF N_108_i +0 1 +.names N_112.BLIF SM_AMIGA_6_.BLIF N_102 +11 1 +.names N_109.BLIF N_109_i +0 1 +.names AS_030_i.BLIF N_102_i.BLIF AS_000_INT_1_sqmuxa +11 1 +.names AS_030_i.BLIF VPA_SYNC_1_sqmuxa_i.BLIF VPA_SYNC_1_sqmuxa_1 +11 1 +.names N_106.BLIF N_106_i +0 1 +.names state_machine_as_030_000_sync_3_0_n.BLIF \ +state_machine_as_030_000_sync_3_n +0 1 +.names N_107.BLIF N_107_i +0 1 +.names inst_CLK_000_D.BLIF CLK_000_DD_i.BLIF clk_un3_clk_000_dd_n +11 1 +.names N_106_i.BLIF N_107_i.BLIF sm_amiga_ns_0_5__n 11 1 .names state_machine_un31_clk_000_d_i_n.BLIF state_machine_un31_clk_000_d_n 0 1 -.names a_i_26__n.BLIF a_i_27__n.BLIF N_186_2 +.names N_104.BLIF N_104_i +0 1 +.names UDS_000_INT_0_sqmuxa_1_0.BLIF UDS_000_INT_0_sqmuxa_2.BLIF \ +UDS_000_INT_0_sqmuxa 11 1 +.names N_105.BLIF N_105_i +0 1 .names state_machine_un13_clk_000_d_1_0_n.BLIF \ state_machine_un13_clk_000_d_4_n.BLIF state_machine_un13_clk_000_d_n 11 1 -.names a_i_28__n.BLIF a_i_29__n.BLIF N_186_3 -11 1 .names state_machine_un13_clk_000_d_4_1_n.BLIF cpu_est_d_2_.BLIF \ state_machine_un13_clk_000_d_4_n 11 1 -.names a_i_30__n.BLIF a_i_31__n.BLIF N_186_4 +.names BG_030_c_i.BLIF CPU_SPACE_i.BLIF un1_bg_030_0_1 +11 1 +.names inst_AS_000_INTreg.BLIF inst_CLK_000_D.BLIF \ +state_machine_un13_clk_000_d_1_n +11 1 +.names AS_030_c.BLIF N_97_i.BLIF un1_bg_030_0_2 11 1 .names state_machine_un8_clk_000_d_4_n.BLIF \ state_machine_un8_clk_000_d_3_n.BLIF state_machine_un8_clk_000_d_n 11 1 -.names N_186_1.BLIF N_186_2.BLIF N_186_5 +.names size_c_0__n.BLIF a_c_i_0__n.BLIF state_machine_un31_clk_000_d_i_1_n 11 1 -.names DTACK_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF \ -DTACK_SYNC_1_sqmuxa +.names UDS_000_INT_0_sqmuxa_1_3.BLIF clk_un3_clk_000_dd_n.BLIF \ +UDS_000_INT_0_sqmuxa_1 11 1 -.names N_186_3.BLIF N_186_4.BLIF N_186_6 +.names N_135_i.BLIF N_133_i.BLIF clk_cpu_est_11_0_1_3__n 11 1 -.names inst_CLK_000_D.BLIF SM_AMIGA_3_.BLIF VPA_SYNC_1_sqmuxa_1_0 +.names N_132_1.BLIF cpu_est_i_2__n.BLIF N_132 11 1 -.names a_c_20__n.BLIF a_c_21__n.BLIF N_189_1 +.names N_130_i.BLIF N_128_i.BLIF clk_cpu_est_11_0_1_1__n 11 1 -.names VPA_SYNC_1_sqmuxa_4.BLIF VPA_SYNC_1_sqmuxa_3.BLIF VPA_SYNC_1_sqmuxa +.names N_131_1.BLIF cpu_est_i_3__n.BLIF N_131 11 1 -.names a_c_22__n.BLIF a_c_23__n.BLIF N_189_2 +.names N_127_i.BLIF N_129_i.BLIF clk_cpu_est_11_0_2_1__n 11 1 -.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_123 -11 1 -.names N_139_i.BLIF N_140_i.BLIF clk_cpu_est_11_0_1_1__n -11 1 -.names N_118_1.BLIF state_machine_un57_clk_000_d_n.BLIF N_118 -11 1 -.names N_141_i.BLIF N_142_i.BLIF clk_cpu_est_11_0_2_1__n -11 1 -.names N_110_1.BLIF SM_AMIGA_1_.BLIF N_110 -11 1 -.names N_147_i.BLIF N_145_i.BLIF clk_cpu_est_11_0_1_3__n -11 1 -.names N_102_0.BLIF N_102 +.names N_124_i.BLIF N_124 0 1 -.names N_136.BLIF cpu_est_0_.BLIF N_143_1 +.names a_i_24__n.BLIF a_i_25__n.BLIF N_167_1 11 1 -.names SM_AMIGA_0_.BLIF state_machine_un13_clk_000_d_1_i_n.BLIF N_120 -11 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_144_1 -11 1 -.names CLK_000_D_i.BLIF N_102.BLIF N_119 -11 1 -.names sm_amiga_i_0__n.BLIF sm_amiga_i_2__n.BLIF N_106_1 -11 1 -.names CLK_000_D_i.BLIF SM_AMIGA_2_.BLIF N_117 -11 1 -.names sm_amiga_i_4__n.BLIF sm_amiga_i_6__n.BLIF N_106_2 -11 1 -.names inst_CLK_000_D.BLIF SM_AMIGA_5_.BLIF N_113 -11 1 -.names N_124.BLIF sm_amiga_i_0__n.BLIF N_107_1 -11 1 -.names state_machine_lds_000_int_8_0_n.BLIF state_machine_lds_000_int_8_n +.names clk_cpu_est_11_0_3__n.BLIF clk_cpu_est_11_3__n 0 1 -.names AS_030_000_SYNC_i.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_1 +.names a_i_26__n.BLIF a_i_27__n.BLIF N_167_2 11 1 -.names state_machine_uds_000_int_8_0_n.BLIF state_machine_uds_000_int_8_n +.names N_135_1.BLIF cpu_est_i_2__n.BLIF N_135 +11 1 +.names a_i_28__n.BLIF a_i_29__n.BLIF N_167_3 +11 1 +.names N_126.BLIF cpu_est_3_reg.BLIF N_133 +11 1 +.names a_i_30__n.BLIF a_i_31__n.BLIF N_167_4 +11 1 +.names N_126_i.BLIF cpu_est_i_2__n.BLIF N_134 +11 1 +.names N_167_1.BLIF N_167_2.BLIF N_167_5 +11 1 +.names clk_cpu_est_11_0_1__n.BLIF clk_cpu_est_11_1__n 0 1 -.names RW_c.BLIF SM_AMIGA_6_.BLIF UDS_000_INT_0_sqmuxa_1_2 +.names N_167_3.BLIF N_167_4.BLIF N_167_6 11 1 -.names AS_030_i.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF DTACK_SYNC_1_sqmuxa_1 +.names N_124_i.BLIF cpu_est_3_reg.BLIF N_130 11 1 -.names UDS_000_INT_0_sqmuxa_1_1.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF \ -UDS_000_INT_0_sqmuxa_1_3 +.names a_c_20__n.BLIF a_c_21__n.BLIF N_170_1 11 1 -.names AS_030_i.BLIF N_161.BLIF un2_clk_030_1 +.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_128 11 1 -.names inst_CLK_000_D.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_0 +.names a_c_22__n.BLIF a_c_23__n.BLIF N_170_2 11 1 -.names AS_030_i.BLIF VPA_SYNC_1_sqmuxa_i.BLIF VPA_SYNC_1_sqmuxa_1 +.names UDS_000_INT_0_sqmuxa_1_i.BLIF UDS_000_INT_0_sqmuxa_i.BLIF N_145 11 1 -.names RW_i.BLIF SM_AMIGA_4_.BLIF UDS_000_INT_0_sqmuxa_2 +.names CLK_000_D_i.BLIF SM_AMIGA_3_.BLIF N_107_1 11 1 -.names AS_030_i.BLIF N_114_i.BLIF AS_000_INT_1_sqmuxa +.names N_125.BLIF cpu_est_i_0__n.BLIF N_127 11 1 .names a_c_17__n.BLIF a_i_16__n.BLIF state_machine_un42_clk_030_1_n 11 1 -.names state_machine_un8_clk_000_d_i_n.BLIF \ -state_machine_un13_clk_000_d_i_n.BLIF VMA_INT_1_sqmuxa +.names N_125_i.BLIF cpu_est_0_.BLIF N_129 11 1 .names a_i_18__n.BLIF a_i_19__n.BLIF state_machine_un42_clk_030_2_n 11 1 -.names AS_030_i.BLIF N_110_i.BLIF DSACK_INT_1_sqmuxa -11 1 +.names N_126_i.BLIF N_126 +0 1 .names fc_c_1__n.BLIF BGACK_000_c.BLIF state_machine_un42_clk_030_3_n 11 1 -.names RW_c.BLIF RW_i +.names N_125_i.BLIF N_125 0 1 .names state_machine_un42_clk_030_1_n.BLIF state_machine_un42_clk_030_2_n.BLIF \ state_machine_un42_clk_030_4_n 11 1 -.names clk_exp.BLIF clk_exp_i +.names N_92_0.BLIF N_92 0 1 .names state_machine_un42_clk_030_3_n.BLIF fc_c_0__n.BLIF \ state_machine_un42_clk_030_5_n 11 1 -.names DTACK_SYNC_1_sqmuxa.BLIF DTACK_SYNC_1_sqmuxa_i +.names N_91_0.BLIF N_91 0 1 +.names DTACK_i.BLIF inst_VPA_D.BLIF DTACK_SYNC_1_sqmuxa_1_0 +11 1 +.names SM_AMIGA_0_.BLIF state_machine_un13_clk_000_d_1_i_n.BLIF N_110 +11 1 +.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF VPA_SYNC_1_sqmuxa_1_1 +11 1 +.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_103 +11 1 +.names N_135_1.BLIF VMA_INT_i.BLIF VPA_SYNC_1_sqmuxa_2 +11 1 +.names inst_CLK_000_D.BLIF SM_AMIGA_5_.BLIF N_101 +11 1 +.names VPA_D_i.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_3 +11 1 +.names N_92.BLIF sm_amiga_i_6__n.BLIF N_100 +11 1 +.names VPA_SYNC_1_sqmuxa_1_1.BLIF VPA_SYNC_1_sqmuxa_2.BLIF VPA_SYNC_1_sqmuxa_4 +11 1 +.names AS_030_000_SYNC_i.BLIF clk_un3_clk_000_dd_n.BLIF N_112 +11 1 +.names CLK_000_D_i.BLIF inst_CLK_OUT_PRE.BLIF N_98_1 +11 1 +.names N_91.BLIF sm_amiga_i_7__n.BLIF N_99 +11 1 +.names AS_030_i.BLIF CPU_SPACE_i.BLIF state_machine_as_030_000_sync_3_0_1_n +11 1 +.names state_machine_lds_000_int_8_0_n.BLIF state_machine_lds_000_int_8_n +0 1 +.names inst_CLK_000_D.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_0 +11 1 +.names state_machine_uds_000_int_8_0_n.BLIF state_machine_uds_000_int_8_n +0 1 +.names RW_i.BLIF SM_AMIGA_4_.BLIF UDS_000_INT_0_sqmuxa_2 +11 1 +.names AS_030_i.BLIF N_145.BLIF un2_clk_030_1 +11 1 .names cpu_est_d_i_0__n.BLIF cpu_est_d_i_3__n.BLIF \ state_machine_un13_clk_000_d_1_0_n 11 1 -.names N_114.BLIF N_114_i -0 1 +.names state_machine_un8_clk_000_d_i_n.BLIF \ +state_machine_un13_clk_000_d_i_n.BLIF VMA_INT_1_sqmuxa +11 1 .names state_machine_un13_clk_000_d_1_n.BLIF cpu_est_d_1_.BLIF \ state_machine_un13_clk_000_d_4_1_n 11 1 -.names VPA_SYNC_1_sqmuxa.BLIF VPA_SYNC_1_sqmuxa_i +.names RW_c.BLIF RW_i 0 1 .names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF state_machine_un8_clk_000_d_1_n 11 1 -.names N_110.BLIF N_110_i +.names cpu_est_d_3_.BLIF cpu_est_d_i_3__n 0 1 .names CLK_000_D_i.BLIF VPA_D_i.BLIF state_machine_un8_clk_000_d_2_n 11 1 -.names N_108.BLIF N_108_i +.names cpu_est_d_0_.BLIF cpu_est_d_i_0__n 0 1 .names cpu_est_0_.BLIF cpu_est_2_.BLIF state_machine_un8_clk_000_d_3_n 11 1 -.names cpu_est_d_3_.BLIF cpu_est_d_i_3__n +.names inst_CLK_000_D.BLIF CLK_000_D_i 0 1 .names state_machine_un8_clk_000_d_1_n.BLIF \ state_machine_un8_clk_000_d_2_n.BLIF state_machine_un8_clk_000_d_4_n 11 1 -.names cpu_est_d_0_.BLIF cpu_est_d_i_0__n -0 1 -.names DTACK_i.BLIF inst_VPA_D.BLIF DTACK_SYNC_1_sqmuxa_1_0 -11 1 -.names inst_CLK_000_D.BLIF CLK_000_D_i -0 1 -.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF VPA_SYNC_1_sqmuxa_1_1 -11 1 -.names AS_030_c.BLIF AS_030_i -0 1 -.names N_147_1.BLIF VMA_INT_i.BLIF VPA_SYNC_1_sqmuxa_2 -11 1 .names inst_AS_000_INTreg.BLIF AS_000_INT_i 0 1 -.names VPA_D_i.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_3 +.names AS_030_000_SYNC_i.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_1 11 1 .names dsack_c_1__n.BLIF dsack_i_1__n 0 1 -.names VPA_SYNC_1_sqmuxa_1_1.BLIF VPA_SYNC_1_sqmuxa_2.BLIF VPA_SYNC_1_sqmuxa_4 +.names RW_c.BLIF SM_AMIGA_6_.BLIF UDS_000_INT_0_sqmuxa_1_2 11 1 .names state_machine_un13_clk_000_d_n.BLIF state_machine_un13_clk_000_d_i_n 0 1 -.names N_123.BLIF sm_amiga_i_0__n.BLIF N_108_1 +.names UDS_000_INT_0_sqmuxa_1_1.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF \ +UDS_000_INT_0_sqmuxa_1_3 11 1 .names state_machine_un8_clk_000_d_n.BLIF state_machine_un8_clk_000_d_i_n 0 1 -.names CLK_000_D_i.BLIF SM_AMIGA_3_.BLIF N_118_1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_132_1 11 1 -.names state_machine_un13_clk_000_d_1_n.BLIF \ -state_machine_un13_clk_000_d_1_i_n +.names AS_030_c.BLIF AS_030_i 0 1 -.names CLK_000_D_i.BLIF inst_CLK_OUT_PRE.BLIF N_110_1 +.names N_124.BLIF cpu_est_0_.BLIF N_131_1 11 1 -.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n -0 1 -.names G_100.BLIF G_98.BLIF clk_exp_1 -11 1 -.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n -0 1 -.names RST_c.BLIF sm_amiga_d_0_2__un3_n -0 1 -.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n -0 1 -.names N_108_i.BLIF RST_c.BLIF sm_amiga_d_0_2__un1_n -11 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n -0 1 -.names SM_AMIGA_D_2_.BLIF sm_amiga_d_0_2__un3_n.BLIF sm_amiga_d_0_2__un0_n -11 1 -.names inst_VPA_D.BLIF VPA_D_i -0 1 -.names DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un3_n -0 1 -.names inst_VMA_INTreg.BLIF VMA_INT_i -0 1 -.names DSACK_INT_1_.BLIF DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un1_n -11 1 -.names DTACK_c.BLIF DTACK_i -0 1 -.names N_110_i.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un0_n -11 1 -.names cpu_est_3_reg.BLIF cpu_est_i_3__n +.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n 0 1 .names VMA_INT_1_sqmuxa.BLIF vma_int_0_un3_n 0 1 -.names a_c_18__n.BLIF a_i_18__n +.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n 0 1 .names inst_VMA_INTreg.BLIF VMA_INT_1_sqmuxa.BLIF vma_int_0_un1_n 11 1 -.names a_c_16__n.BLIF a_i_16__n +.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n 0 1 .names state_machine_un13_clk_000_d_4_n.BLIF vma_int_0_un3_n.BLIF \ vma_int_0_un0_n 11 1 -.names a_c_19__n.BLIF a_i_19__n -0 1 -.names VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un3_n -0 1 -.names CLK_030_c.BLIF CLK_030_i -0 1 -.names inst_VPA_SYNC.BLIF VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un1_n -11 1 -.names state_machine_un42_clk_030_n.BLIF state_machine_un42_clk_030_i_n -0 1 -.names VPA_SYNC_1_sqmuxa_i.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n -11 1 -.names DS_030_c.BLIF DS_030_i -0 1 -.names AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un3_n -0 1 -.names cpu_est_1_.BLIF cpu_est_i_1__n -0 1 -.names inst_AS_000_INTreg.BLIF AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un1_n -11 1 -.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i -0 1 -.names N_114_i.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n -11 1 -.names cpu_est_0_.BLIF cpu_est_i_0__n -0 1 -.names DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un3_n -0 1 .names SM_AMIGA_4_.BLIF sm_amiga_i_4__n 0 1 -.names inst_DTACK_SYNC.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un1_n -11 1 -.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n -0 1 -.names DTACK_SYNC_1_sqmuxa_i.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n -11 1 -.names cpu_est_2_.BLIF cpu_est_i_2__n -0 1 .names un2_clk_030_1.BLIF lds_000_int_0_un3_n 0 1 -.names UDS_000_INT_0_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_1_i +.names state_machine_un13_clk_000_d_1_n.BLIF \ +state_machine_un13_clk_000_d_1_i_n 0 1 .names inst_LDS_000_INTreg.BLIF un2_clk_030_1.BLIF lds_000_int_0_un1_n 11 1 -.names UDS_000_INT_0_sqmuxa.BLIF UDS_000_INT_0_sqmuxa_i +.names inst_CLK_000_DD.BLIF CLK_000_DD_i 0 1 .names state_machine_lds_000_int_8_n.BLIF lds_000_int_0_un3_n.BLIF \ lds_000_int_0_un0_n 11 1 -.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n +.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i 0 1 .names un2_clk_030_1.BLIF uds_000_int_0_un3_n 0 1 -.names inst_CLK_000_DD.BLIF CLK_000_DD_i +.names cpu_est_0_.BLIF cpu_est_i_0__n 0 1 .names inst_UDS_000_INTreg.BLIF un2_clk_030_1.BLIF uds_000_int_0_un1_n 11 1 -.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n +.names cpu_est_2_.BLIF cpu_est_i_2__n 0 1 .names state_machine_uds_000_int_8_n.BLIF uds_000_int_0_un3_n.BLIF \ uds_000_int_0_un0_n 11 1 -.names a_c_30__n.BLIF a_i_30__n +.names cpu_est_3_reg.BLIF cpu_est_i_3__n 0 1 -.names state_machine_un1_clk_030_n.BLIF bg_000_0_un3_n +.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_3__un3_n 0 1 -.names a_c_31__n.BLIF a_i_31__n +.names cpu_est_1_.BLIF cpu_est_i_1__n 0 1 -.names un1_bg_030.BLIF state_machine_un1_clk_030_n.BLIF bg_000_0_un1_n +.names clk_cpu_est_11_3__n.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_3__un1_n 11 1 -.names a_c_28__n.BLIF a_i_28__n +.names UDS_000_INT_0_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_1_i 0 1 -.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +.names cpu_est_3_reg.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n 11 1 -.names a_c_29__n.BLIF a_i_29__n +.names UDS_000_INT_0_sqmuxa.BLIF UDS_000_INT_0_sqmuxa_i +0 1 +.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_2__un3_n +0 1 +.names DS_030_c.BLIF DS_030_i +0 1 +.names N_122_i.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_2__un1_n +11 1 +.names inst_VPA_D.BLIF VPA_D_i +0 1 +.names cpu_est_2_.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n +11 1 +.names state_machine_un42_clk_030_n.BLIF state_machine_un42_clk_030_i_n +0 1 +.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_1__un3_n +0 1 +.names VPA_SYNC_1_sqmuxa.BLIF VPA_SYNC_1_sqmuxa_i +0 1 +.names clk_cpu_est_11_1__n.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_1__un1_n +11 1 +.names N_102.BLIF N_102_i +0 1 +.names cpu_est_1_.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n +11 1 +.names DTACK_SYNC_1_sqmuxa.BLIF DTACK_SYNC_1_sqmuxa_i +0 1 +.names state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un3_n +0 1 +.names N_98.BLIF N_98_i +0 1 +.names un1_as_030_2.BLIF state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un1_n +11 1 +.names a_c_18__n.BLIF a_i_18__n +0 1 +.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n +11 1 +.names a_c_16__n.BLIF a_i_16__n +0 1 +.names AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un3_n +0 1 +.names a_c_19__n.BLIF a_i_19__n +0 1 +.names inst_AS_000_INTreg.BLIF AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un1_n +11 1 +.names CLK_030_c.BLIF CLK_030_i +0 1 +.names N_102_i.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n +11 1 +.names inst_VMA_INTreg.BLIF VMA_INT_i +0 1 +.names VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un3_n +0 1 +.names DTACK_c.BLIF DTACK_i +0 1 +.names inst_VPA_SYNC.BLIF VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un1_n +11 1 +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names VPA_SYNC_1_sqmuxa_i.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n +11 1 +.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n 0 1 .names state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un3_n 0 1 -.names a_c_26__n.BLIF a_i_26__n +.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n 0 1 .names state_machine_as_030_000_sync_3_n.BLIF \ state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un1_n 11 1 -.names a_c_27__n.BLIF a_i_27__n +.names a_c_30__n.BLIF a_i_30__n 0 1 .names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ as_030_000_sync_0_un0_n 11 1 -.names a_c_24__n.BLIF a_i_24__n +.names a_c_31__n.BLIF a_i_31__n 0 1 -.names state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un3_n -0 1 -.names a_c_25__n.BLIF a_i_25__n -0 1 -.names un1_as_030_2.BLIF state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un1_n -11 1 -.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n -11 1 .names inst_RISING_CLK_AMIGA.BLIF ipl_030_0_2__un3_n 0 1 -.names RST_c.BLIF RST_i +.names a_c_28__n.BLIF a_i_28__n 0 1 .names ipl_c_2__n.BLIF inst_RISING_CLK_AMIGA.BLIF ipl_030_0_2__un1_n 11 1 -.names N_107.BLIF N_107_i +.names a_c_29__n.BLIF a_i_29__n 0 1 .names IPL_030DFFSH_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n 11 1 -.names N_106.BLIF N_106_i +.names a_c_26__n.BLIF a_i_26__n 0 1 .names inst_RISING_CLK_AMIGA.BLIF ipl_030_0_1__un3_n 0 1 -.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i +.names a_c_27__n.BLIF a_i_27__n 0 1 .names ipl_c_1__n.BLIF inst_RISING_CLK_AMIGA.BLIF ipl_030_0_1__un1_n 11 1 -.names CPU_SPACE_c.BLIF CPU_SPACE_i +.names a_c_24__n.BLIF a_i_24__n 0 1 .names IPL_030DFFSH_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n 11 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +.names a_c_25__n.BLIF a_i_25__n 0 1 .names inst_RISING_CLK_AMIGA.BLIF ipl_030_0_0__un3_n 0 1 @@ -950,43 +879,39 @@ as_030_000_sync_0_un0_n 11 1 .names IPL_030DFFSH_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n 11 1 +.names RST_c.BLIF RST_i +0 1 .names state_machine_un4_bgack_000_n.BLIF bgack_030_int_0_un3_n 0 1 +.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i +0 1 .names BGACK_000_c.BLIF state_machine_un4_bgack_000_n.BLIF \ bgack_030_int_0_un1_n 11 1 +.names CPU_SPACE_c.BLIF CPU_SPACE_i +0 1 .names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \ bgack_030_int_0_un0_n 11 1 -.names RST_c.BLIF sm_amiga_d_0_0__un3_n +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i 0 1 -.names N_106_i.BLIF RST_c.BLIF sm_amiga_d_0_0__un1_n -11 1 -.names SM_AMIGA_D_0_.BLIF sm_amiga_d_0_0__un3_n.BLIF sm_amiga_d_0_0__un0_n -11 1 -.names RST_c.BLIF sm_amiga_d_0_1__un3_n +.names DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un3_n 0 1 -.names N_107_i.BLIF RST_c.BLIF sm_amiga_d_0_1__un1_n +.names DSACK_INT_1_.BLIF DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un1_n 11 1 -.names SM_AMIGA_D_1_.BLIF sm_amiga_d_0_1__un3_n.BLIF sm_amiga_d_0_1__un0_n +.names N_98_i.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un0_n 11 1 -.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_1__un3_n +.names state_machine_un1_clk_030_n.BLIF bg_000_0_un3_n 0 1 -.names clk_cpu_est_11_1__n.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_1__un1_n +.names un1_bg_030.BLIF state_machine_un1_clk_030_n.BLIF bg_000_0_un1_n 11 1 -.names cpu_est_1_.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n +.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n 11 1 -.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_2__un3_n +.names DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un3_n 0 1 -.names N_134_i.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_2__un1_n +.names inst_DTACK_SYNC.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un1_n 11 1 -.names cpu_est_2_.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n -11 1 -.names clk_un3_clk_000_dd_n.BLIF cpu_est_0_3__un3_n -0 1 -.names clk_cpu_est_11_3__n.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_3__un1_n -11 1 -.names cpu_est_3_reg.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n +.names DTACK_SYNC_1_sqmuxa_i.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n 11 1 .names IPL_030DFFSH_2_reg.BLIF IPL_030_2_ 1 1 @@ -1009,10 +934,10 @@ bgack_030_int_0_un0_n .names inst_BGACK_030_INTreg.BLIF BGACK_030 1 1 0 0 -.names inst_CLK_OUT_INTreg.BLIF CLK_DIV_OUT +.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT 1 1 0 0 -.names clk_exp_i.BLIF CLK_EXP +.names CLK_OUT_INTreg.BLIF CLK_EXP 1 1 0 0 .names inst_FPU_CS_INTreg.BLIF FPU_CS @@ -1042,7 +967,7 @@ bgack_030_int_0_un0_n .names vcc_n_n.BLIF AMIGA_BUS_ENABLE_LOW 1 1 0 0 -.names N_189.BLIF CIIN +.names N_170.BLIF CIIN 1 1 0 0 .names IPL_030DFFSH_1_reg.BLIF IPL_030_1_ @@ -1051,6 +976,15 @@ bgack_030_int_0_un0_n .names IPL_030DFFSH_0_reg.BLIF IPL_030_0_ 1 1 0 0 +.names CLK_OSZI_c.BLIF cpu_est_3_reg.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF SM_AMIGA_7_.C +1 1 +0 0 +.names RST_i.BLIF SM_AMIGA_7_.AP +1 1 +0 0 .names CLK_OSZI_c.BLIF SM_AMIGA_6_.C 1 1 0 0 @@ -1093,39 +1027,6 @@ bgack_030_int_0_un0_n .names RST_i.BLIF SM_AMIGA_0_.AR 1 1 0 0 -.names CLK_OSZI_c.BLIF IPL_030DFFSH_1_reg.C -1 1 -0 0 -.names RST_i.BLIF IPL_030DFFSH_1_reg.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF IPL_030DFFSH_2_reg.C -1 1 -0 0 -.names RST_i.BLIF IPL_030DFFSH_2_reg.AP -1 1 -0 0 -.names cpu_est_0_0_.BLIF cpu_est_0_.D -1 1 -0 0 -.names CLK_OSZI_c.BLIF cpu_est_0_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF cpu_est_1_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF cpu_est_2_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF cpu_est_3_reg.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_7_.C -1 1 -0 0 -.names RST_i.BLIF SM_AMIGA_7_.AP -1 1 -0 0 .names cpu_est_0_.BLIF cpu_est_d_0_.D 1 1 0 0 @@ -1150,25 +1051,34 @@ bgack_030_int_0_un0_n .names CLK_OSZI_c.BLIF cpu_est_d_3_.C 1 1 0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_D_0_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_D_1_.C -1 1 -0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_D_2_.C -1 1 -0 0 .names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C 1 1 0 0 .names RST_i.BLIF IPL_030DFFSH_0_reg.AP 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_AS_000_INTreg.C +.names CLK_OSZI_c.BLIF IPL_030DFFSH_1_reg.C 1 1 0 0 -.names RST_i.BLIF inst_AS_000_INTreg.AP +.names RST_i.BLIF IPL_030DFFSH_1_reg.AP +1 1 +0 0 +.names CLK_OSZI_c.BLIF IPL_030DFFSH_2_reg.C +1 1 +0 0 +.names RST_i.BLIF IPL_030DFFSH_2_reg.AP +1 1 +0 0 +.names cpu_est_0_0_.BLIF cpu_est_0_.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF cpu_est_0_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF cpu_est_1_.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF cpu_est_2_.C 1 1 0 0 .names CLK_OSZI_c.BLIF inst_VPA_SYNC.C @@ -1237,6 +1147,12 @@ bgack_030_int_0_un0_n .names RST_i.BLIF inst_FPU_CS_INTreg.AP 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_AS_000_INTreg.C +1 1 +0 0 +.names RST_i.BLIF inst_AS_000_INTreg.AP +1 1 +0 0 .names CLK_OSZI_c.BLIF inst_DTACK_DMA.C 1 1 0 0 @@ -1273,10 +1189,10 @@ bgack_030_int_0_un0_n .names CLK_OSZI_c.BLIF inst_CLK_000_DD.C 1 1 0 0 -.names inst_CLK_OUT_PRE.BLIF inst_CLK_OUT_INTreg.D +.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_CLK_OUT_INTreg.C +.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C 1 1 0 0 .names DSACK_INT_1_.BLIF DSACK_1_ @@ -1288,27 +1204,6 @@ bgack_030_int_0_un0_n .names vcc_n_n.BLIF DSACK_0_ 1 1 0 0 -.names A_30_.BLIF a_c_30__n -1 1 -0 0 -.names A_31_.BLIF a_c_31__n -1 1 -0 0 -.names CPU_SPACE.BLIF CPU_SPACE_c -1 1 -0 0 -.names BG_030.BLIF BG_030_c -1 1 -0 0 -.names BGACK_000.BLIF BGACK_000_c -1 1 -0 0 -.names CLK_030.BLIF CLK_030_c -1 1 -0 0 -.names CLK_000.BLIF CLK_000_c -1 1 -0 0 .names CLK_OSZI.BLIF CLK_OSZI_c 1 1 0 0 @@ -1348,90 +1243,90 @@ bgack_030_int_0_un0_n .names SIZE_0_.BLIF size_c_0__n 1 1 0 0 -.names SIZE_1_.BLIF size_c_1__n -1 1 -0 0 -.names A_0_.BLIF a_c_0__n -1 1 -0 0 .names A_15_.BLIF a_15__n 1 1 0 0 +.names SIZE_1_.BLIF size_c_1__n +1 1 +0 0 .names A_14_.BLIF a_14__n 1 1 0 0 +.names A_0_.BLIF a_c_0__n +1 1 +0 0 .names A_13_.BLIF a_13__n 1 1 0 0 .names A_12_.BLIF a_12__n 1 1 0 0 -.names A_16_.BLIF a_c_16__n -1 1 -0 0 .names A_11_.BLIF a_11__n 1 1 0 0 -.names A_17_.BLIF a_c_17__n -1 1 -0 0 .names A_10_.BLIF a_10__n 1 1 0 0 -.names A_18_.BLIF a_c_18__n -1 1 -0 0 .names A_9_.BLIF a_9__n 1 1 0 0 -.names A_19_.BLIF a_c_19__n -1 1 -0 0 .names A_8_.BLIF a_8__n 1 1 0 0 -.names A_20_.BLIF a_c_20__n -1 1 -0 0 .names A_7_.BLIF a_7__n 1 1 0 0 -.names A_21_.BLIF a_c_21__n -1 1 -0 0 .names A_6_.BLIF a_6__n 1 1 0 0 -.names A_22_.BLIF a_c_22__n +.names A_16_.BLIF a_c_16__n 1 1 0 0 .names A_5_.BLIF a_5__n 1 1 0 0 -.names A_23_.BLIF a_c_23__n +.names A_17_.BLIF a_c_17__n 1 1 0 0 .names A_4_.BLIF a_4__n 1 1 0 0 -.names A_24_.BLIF a_c_24__n +.names A_18_.BLIF a_c_18__n 1 1 0 0 .names A_3_.BLIF a_3__n 1 1 0 0 -.names A_25_.BLIF a_c_25__n +.names A_19_.BLIF a_c_19__n 1 1 0 0 .names A_2_.BLIF a_2__n 1 1 0 0 -.names A_26_.BLIF a_c_26__n +.names A_20_.BLIF a_c_20__n 1 1 0 0 .names A_1_.BLIF a_1__n 1 1 0 0 +.names A_21_.BLIF a_c_21__n +1 1 +0 0 +.names A_22_.BLIF a_c_22__n +1 1 +0 0 +.names A_23_.BLIF a_c_23__n +1 1 +0 0 +.names A_24_.BLIF a_c_24__n +1 1 +0 0 +.names A_25_.BLIF a_c_25__n +1 1 +0 0 +.names A_26_.BLIF a_c_26__n +1 1 +0 0 .names A_27_.BLIF a_c_27__n 1 1 0 0 @@ -1441,6 +1336,27 @@ bgack_030_int_0_un0_n .names A_29_.BLIF a_c_29__n 1 1 0 0 +.names A_30_.BLIF a_c_30__n +1 1 +0 0 +.names A_31_.BLIF a_c_31__n +1 1 +0 0 +.names CPU_SPACE.BLIF CPU_SPACE_c +1 1 +0 0 +.names BG_030.BLIF BG_030_c +1 1 +0 0 +.names BGACK_000.BLIF BGACK_000_c +1 1 +0 0 +.names CLK_030.BLIF CLK_030_c +1 1 +0 0 +.names CLK_000.BLIF CLK_000_c +1 1 +0 0 .names CPU_SPACE_i.BLIF DSACK_1_.OE 1 1 0 0 @@ -1465,7 +1381,7 @@ bgack_030_int_0_un0_n .names FPU_CS_INT_i.BLIF AVEC_EXP.OE 1 1 0 0 -.names N_186.BLIF CIIN.OE +.names N_167.BLIF CIIN.OE 1 1 0 0 .names cpu_est_0_.BLIF clk_un3_clk_000_dd_n.BLIF cpu_est_0_0_ @@ -1478,19 +1394,4 @@ bgack_030_int_0_un0_n 10 1 11 0 00 0 -.names SM_AMIGA_D_0_.BLIF N_106.BLIF G_98 -01 1 -10 1 -11 0 -00 0 -.names SM_AMIGA_D_1_.BLIF N_107.BLIF G_99 -01 1 -10 1 -11 0 -00 0 -.names SM_AMIGA_D_2_.BLIF N_108.BLIF G_100 -01 1 -10 1 -11 0 -00 0 .end diff --git a/Logic/BUS68030.cmd b/Logic/BUS68030.cmd deleted file mode 100644 index e7c37a0..0000000 --- a/Logic/BUS68030.cmd +++ /dev/null @@ -1,8 +0,0 @@ -STYFILENAME: 68030_tk.sty -PROJECT: BUS68030 -WORKING_PATH: "c:/users/matze/documents/github/68030tk/logic" -MODULE: BUS68030 -VHDL_FILE_LIST: 68030-68000-bus.vhd -OUTPUT_FILE_NAME: BUS68030 -SUFFIX_NAME: edi -PART: M4A5-128/64-10VC diff --git a/Logic/BUS68030.edi b/Logic/BUS68030.edi index e72b29e..046cfca 100644 --- a/Logic/BUS68030.edi +++ b/Logic/BUS68030.edi @@ -4,7 +4,7 @@ (keywordMap (keywordLevel 0)) (status (written - (timeStamp 2014 5 15 22 17 22) + (timeStamp 2014 5 15 22 21 49) (author "Synopsys, Inc.") (program "Synplify Pro" (version "G-2012.09LC-SP1 , mapper maplat, Build 621R")) ) @@ -156,6 +156,10 @@ (port CIIN (direction OUTPUT)) ) (contents + (instance (rename cpu_est_3 "cpu_est[3]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename SM_AMIGA_7 "SM_AMIGA[7]") (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) (instance (rename SM_AMIGA_6 "SM_AMIGA[6]") (viewRef prim (cellRef DFFRH (libraryRef mach))) ) (instance (rename SM_AMIGA_5 "SM_AMIGA[5]") (viewRef prim (cellRef DFFRH (libraryRef mach))) @@ -170,6 +174,16 @@ ) (instance (rename SM_AMIGA_0 "SM_AMIGA[0]") (viewRef prim (cellRef DFFRH (libraryRef mach))) ) + (instance (rename cpu_est_d_0 "cpu_est_d[0]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename cpu_est_d_1 "cpu_est_d[1]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename cpu_est_d_2 "cpu_est_d[2]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename cpu_est_d_3 "cpu_est_d[3]") (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance (rename IPL_030DFFSH_0 "IPL_030DFFSH[0]") (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) (instance (rename IPL_030DFFSH_1 "IPL_030DFFSH[1]") (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance (rename IPL_030DFFSH_2 "IPL_030DFFSH[2]") (viewRef prim (cellRef DFFSH (libraryRef mach))) @@ -180,28 +194,6 @@ ) (instance (rename cpu_est_2 "cpu_est[2]") (viewRef prim (cellRef DFF (libraryRef mach))) ) - (instance (rename cpu_est_3 "cpu_est[3]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename SM_AMIGA_7 "SM_AMIGA[7]") (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance (rename cpu_est_d_0 "cpu_est_d[0]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename cpu_est_d_1 "cpu_est_d[1]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename cpu_est_d_2 "cpu_est_d[2]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename cpu_est_d_3 "cpu_est_d[3]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename SM_AMIGA_D_0 "SM_AMIGA_D[0]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename SM_AMIGA_D_1 "SM_AMIGA_D[1]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename SM_AMIGA_D_2 "SM_AMIGA_D[2]") (viewRef prim (cellRef DFF (libraryRef mach))) - ) - (instance (rename IPL_030DFFSH_0 "IPL_030DFFSH[0]") (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance AS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) (instance VPA_SYNC (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance AS_030_000_SYNC (viewRef prim (cellRef DFFSH (libraryRef mach))) @@ -224,6 +216,8 @@ ) (instance FPU_CS_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) ) + (instance AS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) (instance DTACK_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance RISING_CLK_AMIGA (viewRef prim (cellRef DFF (libraryRef mach))) @@ -299,23 +293,18 @@ (instance AMIGA_BUS_DATA_DIR (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance AMIGA_BUS_ENABLE_LOW (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance CIIN (viewRef prim (cellRef BUFTH (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename un9_i_a2_1_0 "un9_i_a2_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename un9_i_a2_0 "un9_i_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a2_0_1_5 "SM_AMIGA_ns_a2_0_1[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a2_0_5 "SM_AMIGA_ns_a2_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_DSACK_INT_0_sqmuxa_i_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_DSACK_INT_0_sqmuxa_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance G_101_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance G_101 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un42_clk_030_3 "state_machine.un42_clk_030_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un42_clk_030_4 "state_machine.un42_clk_030_4") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un42_clk_030_5 "state_machine.un42_clk_030_5") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un42_clk_030 "state_machine.un42_clk_030") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance UDS_000_INT_0_sqmuxa_1_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance UDS_000_INT_0_sqmuxa_1_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance UDS_000_INT_0_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_i_a4_0_1_2 "clk.cpu_est_11_i_a4_0_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_i_a4_0_2 "clk.cpu_est_11_i_a4_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_i_a4_1_2 "clk.cpu_est_11_i_a4_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_i_a4_2 "clk.cpu_est_11_i_a4[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_AS_030_000_SYNC_3_1 "state_machine.AS_030_000_SYNC_3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_AS_030_000_SYNC_3 "state_machine.AS_030_000_SYNC_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance UDS_000_INT_0_sqmuxa_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance UDS_000_INT_0_sqmuxa_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance UDS_000_INT_0_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_un13_clk_000_d_1_0 "state_machine.un13_clk_000_d_1_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_un13_clk_000_d "state_machine.un13_clk_000_d") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_un13_clk_000_d_4_1 "state_machine.un13_clk_000_d_4_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) @@ -325,23 +314,28 @@ (instance (rename state_machine_un8_clk_000_d_3 "state_machine.un8_clk_000_d_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_un8_clk_000_d_4 "state_machine.un8_clk_000_d_4") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_un8_clk_000_d "state_machine.un8_clk_000_d") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DTACK_SYNC_1_sqmuxa_1_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DTACK_SYNC_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_i_a4_0_2 "clk.cpu_est_11_i_a4_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename un9_i_a2_1_2 "un9_i_a2_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename un9_i_a2_2_2 "un9_i_a2_2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename un9_i_a2_2 "un9_i_a2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename un9_i_a2_1_1 "un9_i_a2_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename un9_i_a2_1 "un9_i_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance UDS_000_INT_0_sqmuxa_1_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance UDS_000_INT_0_sqmuxa_1_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance UDS_000_INT_0_sqmuxa_1_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance UDS_000_INT_0_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance UDS_000_INT_0_sqmuxa_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance UDS_000_INT_0_sqmuxa_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance UDS_000_INT_0_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_un42_clk_030_1 "state_machine.un42_clk_030_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_un42_clk_030_2 "state_machine.un42_clk_030_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un42_clk_030_3 "state_machine.un42_clk_030_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un42_clk_030_4 "state_machine.un42_clk_030_4") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un42_clk_030_5 "state_machine.un42_clk_030_5") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un42_clk_030 "state_machine.un42_clk_030") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DTACK_SYNC_1_sqmuxa_1_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DTACK_SYNC_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_SYNC_1_sqmuxa_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_SYNC_1_sqmuxa_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_SYNC_1_sqmuxa_3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_SYNC_1_sqmuxa_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_SYNC_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_DSACK_INT_0_sqmuxa_i_a2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_DSACK_INT_0_sqmuxa_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_1_1 "clk.cpu_est_11_0_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_2_1 "clk.cpu_est_11_0_2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_1 "clk.cpu_est_11_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un8_ciin_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un8_ciin_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un8_ciin_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un8_ciin_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un8_ciin_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un8_ciin_6 (viewRef prim (cellRef AND2 (libraryRef mach))) ) @@ -349,103 +343,69 @@ (instance un4_ciin_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un4_ciin_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un4_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_1_1 "clk.cpu_est_11_0_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_2_1 "clk.cpu_est_11_0_2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_1 "clk.cpu_est_11_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_1_3 "clk.cpu_est_11_0_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_3 "clk.cpu_est_11_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_i_a4_1_2 "clk.cpu_est_11_i_a4_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_i_a4_2 "clk.cpu_est_11_i_a4[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_i_a4_0_1_2 "clk.cpu_est_11_i_a4_0_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_124_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_112_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_0 "SM_AMIGA_ns_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_1_1 "SM_AMIGA_ns_i_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_1 "SM_AMIGA_ns_i[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a2_0_1_5 "SM_AMIGA_ns_a2_0_1[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a2_0_5 "SM_AMIGA_ns_a2_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_i_4 "SM_AMIGA_ns_i_o2_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_108_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_109_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_106_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_107_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_5 "SM_AMIGA_ns_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_104_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_105_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance un1_bg_030_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un1_bg_030_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un1_bg_030 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_AS_030_000_SYNC_3_1 "state_machine.AS_030_000_SYNC_3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_AS_030_000_SYNC_3 "state_machine.AS_030_000_SYNC_3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_un31_clk_000_d_1 "state_machine.un31_clk_000_d_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_un31_clk_000_d "state_machine.un31_clk_000_d") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un8_ciin_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un8_ciin_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un8_ciin_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_145_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_146_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_142_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_i_1 "clk.cpu_est_11_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_140_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_139_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_141_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_o4_i_3 "clk.cpu_est_11_0_o4_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_o4_i_1 "clk.cpu_est_11_0_o4_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_i_o4_i_2 "clk.cpu_est_11_i_o4_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_143_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_144_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_o2_i_4 "SM_AMIGA_ns_i_o2_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_115_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_116_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_1_3 "clk.cpu_est_11_0_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_3 "clk.cpu_est_11_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_i_3 "clk.cpu_est_11_0_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename SIZE_c_i_1 "SIZE_c_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename state_machine_un31_clk_000_d_i_0 "state_machine.un31_clk_000_d_i_0") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_AS_030_000_SYNC_3_i "state_machine.AS_030_000_SYNC_3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_as_030_2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un17_clk_030_i "state_machine.un17_clk_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un57_clk_000_d_i "state_machine.un57_clk_000_d_i") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance RISING_CLK_AMIGA_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename state_machine_un4_bgack_000_i "state_machine.un4_bgack_000_i") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance BG_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename state_machine_un1_clk_030_i "state_machine.un1_clk_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un17_clk_030_i "state_machine.un17_clk_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_as_030_2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_AS_030_000_SYNC_3_i "state_machine.AS_030_000_SYNC_3_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_109_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_97_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance un1_bg_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_111_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_122_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_147_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_i_3 "clk.cpu_est_11_0_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_161_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_OUT_PRE_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_i_6 "SM_AMIGA_ns_i_o2_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_i_0 "SM_AMIGA_ns_i_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_i_1 "SM_AMIGA_ns_i_o2_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_131_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_132_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_i_o4_i_2 "clk.cpu_est_11_i_o4_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_o4_i_1 "clk.cpu_est_11_0_o4_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_o4_i_3 "clk.cpu_est_11_0_o4_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_129_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_127_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_128_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_130_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_i_1 "clk.cpu_est_11_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_134_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_133_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_135_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_145_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_c_i_0 "A_c_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename state_machine_UDS_000_INT_8_i "state_machine.UDS_000_INT_8_i") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename state_machine_LDS_000_INT_8_i "state_machine.LDS_000_INT_8_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_113_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_99_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_112_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_100_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_101_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename SM_AMIGA_ns_i_2 "SM_AMIGA_ns_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_118_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_117_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_5 "SM_AMIGA_ns_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_123_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_119_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_120_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_7 "SM_AMIGA_ns_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_OUT_PRE_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_o2_i_6 "SM_AMIGA_ns_i_o2_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un57_clk_000_d_i "state_machine.un57_clk_000_d_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_D_0_2__r "SM_AMIGA_D_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_D_0_2__m "SM_AMIGA_D_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_D_0_2__n "SM_AMIGA_D_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_D_0_2__p "SM_AMIGA_D_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance N_103_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_110_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DSACK_INT_0_1__r "DSACK_INT_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DSACK_INT_0_1__m "DSACK_INT_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DSACK_INT_0_1__n "DSACK_INT_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DSACK_INT_0_1__p "DSACK_INT_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_7 "SM_AMIGA_ns_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename VMA_INT_0_r "VMA_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename VMA_INT_0_m "VMA_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename VMA_INT_0_n "VMA_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename VMA_INT_0_p "VMA_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename VPA_SYNC_0_r "VPA_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename VPA_SYNC_0_m "VPA_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename VPA_SYNC_0_n "VPA_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename VPA_SYNC_0_p "VPA_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance N_114_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_INT_0_r "AS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_INT_0_m "AS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_INT_0_n "AS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_INT_0_p "AS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance DTACK_SYNC_1_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DTACK_SYNC_0_r "DTACK_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DTACK_SYNC_0_m "DTACK_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DTACK_SYNC_0_n "DTACK_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DTACK_SYNC_0_p "DTACK_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (instance (rename LDS_000_INT_0_r "LDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename LDS_000_INT_0_m "LDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename LDS_000_INT_0_n "LDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) @@ -454,68 +414,103 @@ (instance (rename UDS_000_INT_0_m "UDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename UDS_000_INT_0_n "UDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename UDS_000_INT_0_p "UDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename state_machine_un57_clk_000_d "state_machine.un57_clk_000_d") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance RW_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance clk_exp_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_INT_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un2_clk_030_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_un13_clk_000_d_i "state_machine.un13_clk_000_d_i") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename state_machine_un8_clk_000_d_i "state_machine.un8_clk_000_d_i") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance VMA_INT_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance AS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_119 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_106 (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename state_machine_un13_as_000_int "state_machine.un13_as_000_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DSACK_INT_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance CLK_000_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename clk_RISING_CLK_AMIGA_1 "clk.RISING_CLK_AMIGA_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_est_d_i_3 "cpu_est_d_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename cpu_est_d_i_0 "cpu_est_d_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_108_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_6 "SM_AMIGA_ns_i[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_5 "SM_AMIGA_ns[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_2 "SM_AMIGA_ns[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_a2_0_6 "SM_AMIGA_ns_i_a2_0[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_3__r "cpu_est_0_3_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_0_3__m "cpu_est_0_3_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_3__n "cpu_est_0_3_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_3__p "cpu_est_0_3_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename cpu_est_0_2__r "cpu_est_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_0_2__m "cpu_est_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_2__n "cpu_est_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_2__p "cpu_est_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename cpu_est_0_1__r "cpu_est_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_0_1__m "cpu_est_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_1__n "cpu_est_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_1__p "cpu_est_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename clk_un3_clk_000_dd_0_a2 "clk.un3_clk_000_dd_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_un13_clk_000_d_1_i "state_machine.un13_clk_000_d_1_i") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename SM_AMIGA_ns_a2_7 "SM_AMIGA_ns_a2[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_a2_6 "SM_AMIGA_ns_i_a2[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a2_5 "SM_AMIGA_ns_a2[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a2_3 "SM_AMIGA_ns_i_a2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a2_0_2 "SM_AMIGA_ns_a2_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename SM_AMIGA_ns_a2_2 "SM_AMIGA_ns_a2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a2_1 "SM_AMIGA_ns_i_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a2_0 "SM_AMIGA_ns_i_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un5_clk_030_i_a2 "state_machine.un5_clk_030_i_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_LDS_000_INT_8 "state_machine.LDS_000_INT_8") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_UDS_000_INT_8 "state_machine.UDS_000_INT_8") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DTACK_SYNC_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un2_clk_030_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BG_000_0_r "BG_000_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename BG_000_0_m "BG_000_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BG_000_0_n "BG_000_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename BG_000_0_p "BG_000_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_r "AS_030_000_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_m "AS_030_000_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_n "AS_030_000_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_p "AS_030_000_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename cpu_est_i_2 "cpu_est_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_i_3 "cpu_est_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_a4_0_1 "clk.cpu_est_11_0_a4_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_i_0 "cpu_est_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_a4_1 "clk.cpu_est_11_0_a4[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_1 "SM_AMIGA_ns_i_o2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_0 "SM_AMIGA_ns_i_o2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_7 "SM_AMIGA_ns[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_3 "SM_AMIGA_ns_i[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_2 "SM_AMIGA_ns[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_1 "SM_AMIGA_ns_i[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_0 "SM_AMIGA_ns_i[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a2_0_1 "SM_AMIGA_ns_i_a2_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance CLK_000_DD_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DS_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VPA_SYNC_1_sqmuxa_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_a4_1_3 "clk.cpu_est_11_0_a4_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance UDS_000_INT_0_sqmuxa_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance UDS_000_INT_0_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un2_clk_030_1_93 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_o4_3 "clk.cpu_est_11_0_o4[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_o4_1 "clk.cpu_est_11_0_o4[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_i_1 "cpu_est_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_i_o4_2 "clk.cpu_est_11_i_o4[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_i_2 "clk.cpu_est_11_i[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_a4_0_3 "clk.cpu_est_11_0_a4_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_a4_3 "clk.cpu_est_11_0_a4[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_a4_2_1 "clk.cpu_est_11_0_a4_2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename clk_cpu_est_11_0_a4_1_1 "clk.cpu_est_11_0_a4_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un57_clk_000_d "state_machine.un57_clk_000_d") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename FPU_CS_INT_0_r "FPU_CS_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename FPU_CS_INT_0_m "FPU_CS_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename FPU_CS_INT_0_n "FPU_CS_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename FPU_CS_INT_0_p "FPU_CS_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance G_100 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance CLK_OUT_PRE_0 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance (rename state_machine_un13_clk_000_d_1 "state_machine.un13_clk_000_d_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_i_3 "cpu_est_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_120 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DTACK_SYNC_1_sqmuxa_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VMA_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_o2_6 "SM_AMIGA_ns_i_o2[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_7 "SM_AMIGA_ns[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance G_98 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance G_99 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance (rename AS_000_INT_0_r "AS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_000_INT_0_m "AS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_INT_0_n "AS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_INT_0_p "AS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename VPA_SYNC_0_r "VPA_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename VPA_SYNC_0_m "VPA_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename VPA_SYNC_0_n "VPA_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename VPA_SYNC_0_p "VPA_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_r "AS_030_000_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_m "AS_030_000_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_n "AS_030_000_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_p "AS_030_000_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename state_machine_un17_clk_030 "state_machine.un17_clk_030") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance N_102_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_000_INT_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_SYNC_1_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VPA_SYNC_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_un42_clk_030_i "state_machine.un42_clk_030_i") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance un1_as_030_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un17_clk_030 "state_machine.un17_clk_030") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_0_0 "cpu_est_0[0]") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance (rename state_machine_un13_clk_000_d_1 "state_machine.un13_clk_000_d_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VPA_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance CLK_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename state_machine_un1_clk_030 "state_machine.un1_clk_030") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_un4_bgack_000 "state_machine.un4_bgack_000") (viewRef prim (cellRef AND2 (libraryRef mach))) ) @@ -538,81 +533,53 @@ (instance (rename BGACK_030_INT_0_m "BGACK_030_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename BGACK_030_INT_0_n "BGACK_030_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename BGACK_030_INT_0_p "BGACK_030_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_o4_1 "clk.cpu_est_11_0_o4[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_o4_3 "clk.cpu_est_11_0_o4[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance UDS_000_INT_0_sqmuxa_1_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance UDS_000_INT_0_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un2_clk_030_1_106 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_i_2 "cpu_est_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_a4_1_3 "clk.cpu_est_11_0_a4_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_i_0 "cpu_est_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_i_1 "cpu_est_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DS_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_0_0 "cpu_est_0[0]") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_a2_1 "SM_AMIGA_ns_i_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_a2_3 "SM_AMIGA_ns_i_a2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_0 "SM_AMIGA_ns[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_i_3 "SM_AMIGA_ns_i[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance N_98_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DSACK_INT_0_1__r "DSACK_INT_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DSACK_INT_0_1__m "DSACK_INT_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DSACK_INT_0_1__n "DSACK_INT_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DSACK_INT_0_1__p "DSACK_INT_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename BG_000_0_r "BG_000_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename BG_000_0_m "BG_000_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BG_000_0_n "BG_000_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename BG_000_0_p "BG_000_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance DTACK_SYNC_1_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DTACK_SYNC_0_r "DTACK_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DTACK_SYNC_0_m "DTACK_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DTACK_SYNC_0_n "DTACK_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DTACK_SYNC_0_p "DTACK_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a2_0_6 "SM_AMIGA_ns_i_a2_0[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename SM_AMIGA_ns_i_4 "SM_AMIGA_ns_i[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_5 "SM_AMIGA_ns[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_6 "SM_AMIGA_ns_i[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename SM_AMIGA_ns_i_o2_4 "SM_AMIGA_ns_i_o2[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_a4_1 "clk.cpu_est_11_0_a4[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_a4_0_1 "clk.cpu_est_11_0_a4_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_a4_1_1 "clk.cpu_est_11_0_a4_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_a4_2_1 "clk.cpu_est_11_0_a4_2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_a4_3 "clk.cpu_est_11_0_a4[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_0_a4_0_3 "clk.cpu_est_11_0_a4_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_i_2 "clk.cpu_est_11_i[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename clk_cpu_est_11_i_o4_2 "clk.cpu_est_11_i_o4[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_6 "SM_AMIGA_ns_i_o2[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DTACK_SYNC_1_sqmuxa_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance CLK_OUT_PRE_0 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance I_107 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VMA_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DTACK_SYNC_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK_INT_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename A_i_24 "A_i[24]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_25 "A_i[25]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_i_26 "A_i[26]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_i_27 "A_i[27]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_i_28 "A_i[28]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_i_29 "A_i[29]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_i_30 "A_i[30]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_i_31 "A_i[31]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un5_clk_030_i_a2 "state_machine.un5_clk_030_i_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a2_0 "SM_AMIGA_ns_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a2_0_0 "SM_AMIGA_ns_a2_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_ns_a2_0_2 "SM_AMIGA_ns_a2_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename SM_AMIGA_ns_i_a2_4 "SM_AMIGA_ns_i_a2[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename SM_AMIGA_ns_i_a2_0_4 "SM_AMIGA_ns_i_a2_0[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_000_DD_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename clk_un3_clk_000_dd_0_a2 "clk.un3_clk_000_dd_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_a2_5 "SM_AMIGA_ns_a2[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a2_6 "SM_AMIGA_ns_i_a2[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_un13_as_000_int_i "state_machine.un13_as_000_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance RST_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename CLK_CNT_i_0 "CLK_CNT_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_24 "A_i[24]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_25 "A_i[25]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance BGACK_030_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance CPU_SPACE_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance FPU_CS_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_106_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_D_0_0__r "SM_AMIGA_D_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_D_0_0__m "SM_AMIGA_D_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_D_0_0__n "SM_AMIGA_D_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_D_0_0__p "SM_AMIGA_D_0_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance N_107_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_D_0_1__r "SM_AMIGA_D_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_D_0_1__m "SM_AMIGA_D_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_D_0_1__n "SM_AMIGA_D_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_D_0_1__p "SM_AMIGA_D_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename cpu_est_0_1__r "cpu_est_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_0_1__m "cpu_est_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_1__n "cpu_est_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_1__p "cpu_est_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename cpu_est_0_2__r "cpu_est_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_0_2__m "cpu_est_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_2__n "cpu_est_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_2__p "cpu_est_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename cpu_est_0_3__r "cpu_est_0_3_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_0_3__m "cpu_est_0_3_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_3__n "cpu_est_0_3_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_0_3__p "cpu_est_0_3_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (net BGACK_030_INT (joined (portRef Q (instanceRef BGACK_030_INT)) (portRef I0 (instanceRef BGACK_030_INT_i)) @@ -622,10 +589,6 @@ (portRef OE (instanceRef LDS_000)) (portRef OE (instanceRef UDS_000)) )) - (net CLK_OUT_INT (joined - (portRef Q (instanceRef CLK_OUT_INT)) - (portRef I0 (instanceRef CLK_DIV_OUT)) - )) (net FPU_CS_INT (joined (portRef Q (instanceRef FPU_CS_INT)) (portRef I0 (instanceRef FPU_CS_INT_i)) @@ -634,10 +597,10 @@ )) (net (rename cpu_est_3 "cpu_est[3]") (joined (portRef Q (instanceRef cpu_est_3)) - (portRef I0 (instanceRef cpu_est_0_3__n)) - (portRef I1 (instanceRef clk_cpu_est_11_0_a4_3)) (portRef I1 (instanceRef clk_cpu_est_11_0_a4_2_1)) + (portRef I1 (instanceRef clk_cpu_est_11_0_a4_3)) (portRef I0 (instanceRef cpu_est_i_3)) + (portRef I0 (instanceRef cpu_est_0_3__n)) (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_1_0)) (portRef I0 (instanceRef E)) (portRef D (instanceRef cpu_est_d_3)) @@ -655,20 +618,20 @@ )) (net (rename cpu_est_0 "cpu_est[0]") (joined (portRef Q (instanceRef cpu_est_0)) - (portRef I1 (instanceRef clk_cpu_est_11_0_a4_1_1)) (portRef I1 (instanceRef cpu_est_0_0)) - (portRef I0 (instanceRef cpu_est_i_0)) + (portRef I1 (instanceRef clk_cpu_est_11_0_a4_1_1)) (portRef I0 (instanceRef clk_cpu_est_11_0_o4_3)) - (portRef I1 (instanceRef clk_cpu_est_11_i_a4_1_2)) + (portRef I0 (instanceRef cpu_est_i_0)) (portRef I0 (instanceRef state_machine_un8_clk_000_d_3)) + (portRef I1 (instanceRef clk_cpu_est_11_i_a4_1_2)) (portRef D (instanceRef cpu_est_d_0)) )) (net (rename cpu_est_1 "cpu_est[1]") (joined (portRef Q (instanceRef cpu_est_1)) - (portRef I0 (instanceRef cpu_est_0_1__n)) (portRef I0 (instanceRef clk_cpu_est_11_i_o4_2)) (portRef I0 (instanceRef cpu_est_i_1)) (portRef I1 (instanceRef clk_cpu_est_11_0_o4_3)) + (portRef I0 (instanceRef cpu_est_0_1__n)) (portRef I0 (instanceRef clk_cpu_est_11_i_a4_0_1_2)) (portRef D (instanceRef cpu_est_d_1)) )) @@ -683,19 +646,20 @@ (net AS_000_INT (joined (portRef Q (instanceRef AS_000_INT)) (portRef I0 (instanceRef state_machine_un13_clk_000_d_1)) - (portRef I0 (instanceRef AS_000_INT_i)) (portRef I0 (instanceRef AS_000_INT_0_m)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_0)) + (portRef I0 (instanceRef AS_000_INT_i)) (portRef I0 (instanceRef AS_000)) )) (net AS_030_000_SYNC (joined (portRef Q (instanceRef AS_030_000_SYNC)) - (portRef I0 (instanceRef AS_030_000_SYNC_i)) (portRef I0 (instanceRef AS_030_000_SYNC_0_n)) + (portRef I0 (instanceRef AS_030_000_SYNC_i)) )) (net DTACK_SYNC (joined (portRef Q (instanceRef DTACK_SYNC)) - (portRef I0 (instanceRef state_machine_un57_clk_000_d)) (portRef I0 (instanceRef DTACK_SYNC_0_m)) + (portRef I0 (instanceRef state_machine_un57_clk_000_d)) )) (net VPA_D (joined (portRef Q (instanceRef VPA_D)) @@ -704,16 +668,16 @@ )) (net VPA_SYNC (joined (portRef Q (instanceRef VPA_SYNC)) - (portRef I1 (instanceRef state_machine_un57_clk_000_d)) (portRef I0 (instanceRef VPA_SYNC_0_m)) + (portRef I1 (instanceRef state_machine_un57_clk_000_d)) )) (net CLK_000_D (joined (portRef Q (instanceRef CLK_000_D)) - (portRef I0 (instanceRef clk_un3_clk_000_dd_0_a2)) - (portRef I0 (instanceRef SM_AMIGA_ns_a2_0)) (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_1_0)) (portRef I1 (instanceRef state_machine_un13_clk_000_d_1)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_0)) (portRef I0 (instanceRef SM_AMIGA_ns_a2_2)) + (portRef I0 (instanceRef clk_un3_clk_000_dd_0_a2)) (portRef I0 (instanceRef CLK_000_D_i)) (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_1_0)) (portRef D (instanceRef CLK_000_DD)) @@ -744,11 +708,11 @@ )) (net (rename cpu_est_2 "cpu_est[2]") (joined (portRef Q (instanceRef cpu_est_2)) - (portRef I0 (instanceRef cpu_est_0_2__n)) (portRef I1 (instanceRef clk_cpu_est_11_i_o4_2)) (portRef I0 (instanceRef cpu_est_i_2)) - (portRef I1 (instanceRef state_machine_un8_clk_000_d_3)) + (portRef I0 (instanceRef cpu_est_0_2__n)) (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_1_0)) + (portRef I1 (instanceRef state_machine_un8_clk_000_d_3)) (portRef D (instanceRef cpu_est_d_2)) )) (net (rename CLK_CNT_0 "CLK_CNT[0]") (joined @@ -758,13 +722,13 @@ )) (net (rename SM_AMIGA_6 "SM_AMIGA[6]") (joined (portRef Q (instanceRef SM_AMIGA_6)) - (portRef I1 (instanceRef SM_AMIGA_ns_a2_0_2)) (portRef I0 (instanceRef SM_AMIGA_i_6)) + (portRef I1 (instanceRef SM_AMIGA_ns_a2_0_2)) (portRef I1 (instanceRef UDS_000_INT_0_sqmuxa_1_2)) )) (net (rename SM_AMIGA_7 "SM_AMIGA[7]") (joined (portRef Q (instanceRef SM_AMIGA_7)) - (portRef I1 (instanceRef SM_AMIGA_ns_a2_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_o2_1)) (portRef I0 (instanceRef SM_AMIGA_i_7)) )) (net UDS_000_INT (joined @@ -797,7 +761,6 @@ )) (net (rename SM_AMIGA_1 "SM_AMIGA[1]") (joined (portRef Q (instanceRef SM_AMIGA_1)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_o2_6)) (portRef I0 (instanceRef SM_AMIGA_i_1)) (portRef I1 (instanceRef un1_DSACK_INT_0_sqmuxa_i_a2)) )) @@ -817,9 +780,9 @@ )) (net (rename SM_AMIGA_3 "SM_AMIGA[3]") (joined (portRef Q (instanceRef SM_AMIGA_3)) + (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa_1_0)) (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_4)) (portRef I0 (instanceRef SM_AMIGA_i_3)) - (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa_1_0)) (portRef I1 (instanceRef SM_AMIGA_ns_a2_0_1_5)) )) (net (rename state_machine_un13_as_000_int "state_machine.un13_as_000_int") (joined @@ -828,8 +791,8 @@ )) (net (rename SM_AMIGA_5 "SM_AMIGA[5]") (joined (portRef Q (instanceRef SM_AMIGA_5)) - (portRef I0 (instanceRef SM_AMIGA_i_5)) (portRef I1 (instanceRef SM_AMIGA_ns_a2_2)) + (portRef I0 (instanceRef SM_AMIGA_i_5)) )) (net (rename SM_AMIGA_2 "SM_AMIGA[2]") (joined (portRef Q (instanceRef SM_AMIGA_2)) @@ -838,29 +801,9 @@ )) (net (rename SM_AMIGA_0 "SM_AMIGA[0]") (joined (portRef Q (instanceRef SM_AMIGA_0)) - (portRef I0 (instanceRef SM_AMIGA_ns_a2_0_0)) - (portRef I0 (instanceRef SM_AMIGA_i_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_o2_0)) (portRef I0 (instanceRef SM_AMIGA_ns_a2_7)) )) - (net (rename SM_AMIGA_D_0 "SM_AMIGA_D[0]") (joined - (portRef Q (instanceRef SM_AMIGA_D_0)) - (portRef I0 (instanceRef SM_AMIGA_D_0_0__n)) - (portRef I1 (instanceRef G_98)) - )) - (net (rename SM_AMIGA_D_1 "SM_AMIGA_D[1]") (joined - (portRef Q (instanceRef SM_AMIGA_D_1)) - (portRef I0 (instanceRef SM_AMIGA_D_0_1__n)) - (portRef I1 (instanceRef G_99)) - )) - (net (rename SM_AMIGA_D_2 "SM_AMIGA_D[2]") (joined - (portRef Q (instanceRef SM_AMIGA_D_2)) - (portRef I1 (instanceRef G_100)) - (portRef I0 (instanceRef SM_AMIGA_D_0_2__n)) - )) - (net (rename clk_expZ0 "clk_exp") (joined - (portRef O (instanceRef G_101)) - (portRef I0 (instanceRef clk_exp_i)) - )) (net N_1 (joined (portRef O (instanceRef UDS_000_INT_0_p)) (portRef D (instanceRef UDS_000_INT)) @@ -890,69 +833,53 @@ (portRef D (instanceRef AS_030_000_SYNC)) )) (net N_8 (joined - (portRef O (instanceRef SM_AMIGA_D_0_0__p)) - (portRef D (instanceRef SM_AMIGA_D_0)) - )) - (net N_9 (joined - (portRef O (instanceRef SM_AMIGA_D_0_1__p)) - (portRef D (instanceRef SM_AMIGA_D_1)) - )) - (net N_10 (joined - (portRef O (instanceRef SM_AMIGA_D_0_2__p)) - (portRef D (instanceRef SM_AMIGA_D_2)) - )) - (net N_11 (joined (portRef O (instanceRef VMA_INT_0_p)) (portRef D (instanceRef VMA_INT)) )) - (net N_12 (joined + (net N_9 (joined (portRef O (instanceRef BG_000_0_p)) (portRef D (instanceRef BG_000DFFSH)) )) - (net N_13 (joined + (net N_10 (joined (portRef O (instanceRef DSACK_INT_0_1__p)) (portRef D (instanceRef DSACK_INT_1)) )) - (net N_14 (joined + (net N_11 (joined (portRef O (instanceRef IPL_030_0_0__p)) (portRef D (instanceRef IPL_030DFFSH_0)) )) - (net N_15 (joined + (net N_12 (joined (portRef O (instanceRef IPL_030_0_1__p)) (portRef D (instanceRef IPL_030DFFSH_1)) )) - (net N_16 (joined + (net N_13 (joined (portRef O (instanceRef IPL_030_0_2__p)) (portRef D (instanceRef IPL_030DFFSH_2)) )) - (net N_17 (joined + (net N_14 (joined (portRef O (instanceRef cpu_est_0_0)) (portRef D (instanceRef cpu_est_0)) )) - (net N_18 (joined + (net N_15 (joined (portRef O (instanceRef cpu_est_0_1__p)) (portRef D (instanceRef cpu_est_1)) )) - (net N_19 (joined + (net N_16 (joined (portRef O (instanceRef cpu_est_0_2__p)) (portRef D (instanceRef cpu_est_2)) )) - (net N_20 (joined + (net N_17 (joined (portRef O (instanceRef cpu_est_0_3__p)) (portRef D (instanceRef cpu_est_3)) )) - (net N_21 (joined + (net N_18 (joined (portRef O (instanceRef BGACK_030_INT_0_p)) (portRef D (instanceRef BGACK_030_INT)) )) - (net N_22 (joined + (net N_19 (joined (portRef O (instanceRef CLK_OUT_PRE_0)) (portRef D (instanceRef CLK_OUT_PRE)) )) - (net (rename SM_AMIGA_ns_0 "SM_AMIGA_ns[0]") (joined - (portRef O (instanceRef SM_AMIGA_ns_i_0)) - (portRef D (instanceRef SM_AMIGA_7)) - )) (net (rename SM_AMIGA_ns_2 "SM_AMIGA_ns[2]") (joined (portRef O (instanceRef SM_AMIGA_ns_i_2)) (portRef D (instanceRef SM_AMIGA_5)) @@ -965,163 +892,61 @@ (portRef O (instanceRef SM_AMIGA_ns_i_7)) (portRef D (instanceRef SM_AMIGA_0)) )) - (net N_106 (joined - (portRef O (instanceRef un9_i_a2_2)) - (portRef I0 (instanceRef N_106_i)) - (portRef I0 (instanceRef G_98)) + (net N_98 (joined + (portRef O (instanceRef un1_DSACK_INT_0_sqmuxa_i_a2)) + (portRef I0 (instanceRef N_98_i)) )) - (net N_107 (joined - (portRef O (instanceRef un9_i_a2_1)) - (portRef I0 (instanceRef N_107_i)) - (portRef I0 (instanceRef G_99)) - )) - (net (rename clk_un3_clk_000_dd "clk.un3_clk_000_dd") (joined - (portRef O (instanceRef clk_un3_clk_000_dd_0_a2)) - (portRef I1 (instanceRef cpu_est_0_3__m)) - (portRef I0 (instanceRef cpu_est_0_3__r)) - (portRef I1 (instanceRef cpu_est_0_2__m)) - (portRef I0 (instanceRef cpu_est_0_2__r)) - (portRef I1 (instanceRef cpu_est_0_1__m)) - (portRef I0 (instanceRef cpu_est_0_1__r)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_1)) - (portRef I0 (instanceRef cpu_est_0_0)) - (portRef I1 (instanceRef UDS_000_INT_0_sqmuxa_1)) - )) - (net (rename clk_cpu_est_11_1 "clk.cpu_est_11[1]") (joined - (portRef O (instanceRef clk_cpu_est_11_0_i_1)) - (portRef I0 (instanceRef cpu_est_0_1__m)) - )) - (net (rename clk_cpu_est_11_3 "clk.cpu_est_11[3]") (joined - (portRef O (instanceRef clk_cpu_est_11_0_i_3)) - (portRef I0 (instanceRef cpu_est_0_3__m)) - )) - (net N_162 (joined - (portRef O (instanceRef G_98)) - (portRef I1 (instanceRef G_101_1)) - )) - (net N_163 (joined - (portRef O (instanceRef G_99)) - (portRef I1 (instanceRef G_101)) - )) - (net N_164 (joined - (portRef O (instanceRef G_100)) - (portRef I0 (instanceRef G_101_1)) - )) - (net N_161 (joined - (portRef O (instanceRef un2_clk_030_1_106)) - (portRef I1 (instanceRef un2_clk_030_1)) - (portRef I0 (instanceRef N_161_i)) - )) - (net N_114 (joined - (portRef O (instanceRef SM_AMIGA_ns_a2_0_2)) - (portRef I0 (instanceRef N_114_i)) - )) - (net N_109 (joined + (net N_97 (joined (portRef O (instanceRef state_machine_un5_clk_030_i_a2)) - (portRef I0 (instanceRef N_109_i)) + (portRef I0 (instanceRef N_97_i)) )) - (net N_111 (joined - (portRef O (instanceRef SM_AMIGA_ns_a2_0)) - (portRef I0 (instanceRef N_111_i)) - )) - (net N_112 (joined - (portRef O (instanceRef SM_AMIGA_ns_a2_0_0)) - (portRef I0 (instanceRef N_112_i)) - )) - (net N_122 (joined - (portRef O (instanceRef SM_AMIGA_ns_i_a2_1)) - (portRef I0 (instanceRef SM_AMIGA_ns_a2_0_2)) - (portRef I0 (instanceRef N_122_i)) - )) - (net N_115 (joined + (net N_104 (joined (portRef O (instanceRef SM_AMIGA_ns_i_a2_4)) - (portRef I0 (instanceRef N_115_i)) + (portRef I0 (instanceRef N_104_i)) )) - (net N_101 (joined + (net N_93 (joined (portRef O (instanceRef SM_AMIGA_ns_i_o2_i_4)) (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_4)) )) - (net N_116 (joined + (net N_105 (joined (portRef O (instanceRef SM_AMIGA_ns_i_a2_0_4)) - (portRef I0 (instanceRef N_116_i)) + (portRef I0 (instanceRef N_105_i)) )) - (net N_124 (joined - (portRef O (instanceRef SM_AMIGA_ns_i_a2_3)) - (portRef I0 (instanceRef N_124_i)) - (portRef I0 (instanceRef un9_i_a2_1_1)) + (net N_106 (joined + (portRef O (instanceRef SM_AMIGA_ns_a2_5)) + (portRef I0 (instanceRef N_106_i)) )) - (net N_139 (joined - (portRef O (instanceRef clk_cpu_est_11_0_a4_1)) - (portRef I0 (instanceRef N_139_i)) + (net N_108 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_a2_6)) + (portRef I0 (instanceRef N_108_i)) )) - (net N_137 (joined - (portRef O (instanceRef clk_cpu_est_11_0_o4_i_1)) - (portRef I0 (instanceRef clk_cpu_est_11_0_a4_1)) + (net N_94 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_o2_i_6)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_6)) )) - (net N_140 (joined - (portRef O (instanceRef clk_cpu_est_11_0_a4_0_1)) - (portRef I0 (instanceRef N_140_i)) + (net N_109 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_a2_0_6)) + (portRef I0 (instanceRef N_109_i)) )) - (net N_141 (joined - (portRef O (instanceRef clk_cpu_est_11_0_a4_1_1)) - (portRef I0 (instanceRef N_141_i)) + (net N_107 (joined + (portRef O (instanceRef SM_AMIGA_ns_a2_0_5)) + (portRef I0 (instanceRef N_107_i)) )) - (net N_136 (joined - (portRef O (instanceRef clk_cpu_est_11_i_o4_i_2)) - (portRef I0 (instanceRef clk_cpu_est_11_i_a4_1_2)) - )) - (net N_142 (joined - (portRef O (instanceRef clk_cpu_est_11_0_a4_2_1)) - (portRef I0 (instanceRef N_142_i)) - )) - (net N_145 (joined - (portRef O (instanceRef clk_cpu_est_11_0_a4_3)) - (portRef I0 (instanceRef N_145_i)) - )) - (net N_138 (joined - (portRef O (instanceRef clk_cpu_est_11_0_o4_i_3)) - (portRef I0 (instanceRef clk_cpu_est_11_0_a4_3)) - )) - (net N_146 (joined - (portRef O (instanceRef clk_cpu_est_11_0_a4_0_3)) - (portRef I0 (instanceRef N_146_i)) - )) - (net N_143 (joined - (portRef O (instanceRef clk_cpu_est_11_i_a4_2)) - (portRef I0 (instanceRef N_143_i)) - )) - (net N_144 (joined - (portRef O (instanceRef clk_cpu_est_11_i_a4_0_2)) - (portRef I0 (instanceRef N_144_i)) - )) - (net UDS_000_INT_0_sqmuxa (joined - (portRef O (instanceRef UDS_000_INT_0_sqmuxa)) - (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_i)) - )) - (net UDS_000_INT_0_sqmuxa_1 (joined - (portRef O (instanceRef UDS_000_INT_0_sqmuxa_1)) - (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_1_i)) - )) - (net N_147 (joined - (portRef O (instanceRef clk_cpu_est_11_0_a4_1_3)) - (portRef I0 (instanceRef N_147_i)) - )) - (net N_147_1 (joined + (net N_135_1 (joined (portRef O (instanceRef VPA_SYNC_1_sqmuxa_3)) (portRef I0 (instanceRef clk_cpu_est_11_0_a4_1_3)) (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_2)) )) - (net (rename state_machine_un13_clk_000_d_1 "state_machine.un13_clk_000_d_1") (joined - (portRef O (instanceRef state_machine_un13_clk_000_d_1)) - (portRef I1 (instanceRef SM_AMIGA_ns_a2_0_0)) - (portRef I0 (instanceRef state_machine_un13_clk_000_d_1_i)) - (portRef I0 (instanceRef state_machine_un13_clk_000_d_4_1)) + (net VPA_SYNC_1_sqmuxa_1_0 (joined + (portRef O (instanceRef DTACK_SYNC_1_sqmuxa_1_0)) + (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_3_0)) + (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa)) )) - (net N_186 (joined + (net N_167 (joined (portRef O (instanceRef un8_ciin)) (portRef OE (instanceRef CIIN)) )) - (net N_189 (joined + (net N_170 (joined (portRef O (instanceRef un4_ciin)) (portRef I0 (instanceRef CIIN)) )) @@ -1130,24 +955,27 @@ (portRef I1 (instanceRef un1_as_030_2)) (portRef I0 (instanceRef state_machine_un42_clk_030_i)) )) + (net DTACK_SYNC_1_sqmuxa (joined + (portRef O (instanceRef DTACK_SYNC_1_sqmuxa)) + (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_i)) + )) + (net VPA_SYNC_1_sqmuxa (joined + (portRef O (instanceRef VPA_SYNC_1_sqmuxa)) + (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_i)) + )) (net un1_bg_030 (joined (portRef O (instanceRef un1_bg_030_i)) (portRef I0 (instanceRef BG_000_0_m)) )) - (net (rename state_machine_AS_030_000_SYNC_3 "state_machine.AS_030_000_SYNC_3") (joined - (portRef O (instanceRef state_machine_AS_030_000_SYNC_3_i)) - (portRef I0 (instanceRef AS_030_000_SYNC_0_m)) + (net DTACK_SYNC_1_sqmuxa_1 (joined + (portRef O (instanceRef DTACK_SYNC_1_sqmuxa_1)) + (portRef I1 (instanceRef DTACK_SYNC_0_m)) + (portRef I0 (instanceRef DTACK_SYNC_0_r)) )) - (net un1_as_030_2 (joined - (portRef O (instanceRef un1_as_030_2_i)) - (portRef I0 (instanceRef FPU_CS_INT_0_m)) - )) - (net (rename state_machine_un17_clk_030 "state_machine.un17_clk_030") (joined - (portRef O (instanceRef state_machine_un17_clk_030_i)) - (portRef I1 (instanceRef FPU_CS_INT_0_m)) - (portRef I0 (instanceRef FPU_CS_INT_0_r)) - (portRef I1 (instanceRef AS_030_000_SYNC_0_m)) - (portRef I0 (instanceRef AS_030_000_SYNC_0_r)) + (net DSACK_INT_1_sqmuxa (joined + (portRef O (instanceRef DSACK_INT_1_sqmuxa)) + (portRef I1 (instanceRef DSACK_INT_0_1__m)) + (portRef I0 (instanceRef DSACK_INT_0_1__r)) )) (net (rename state_machine_un1_clk_030 "state_machine.un1_clk_030") (joined (portRef O (instanceRef state_machine_un1_clk_030_i)) @@ -1159,15 +987,55 @@ (portRef I1 (instanceRef BGACK_030_INT_0_m)) (portRef I0 (instanceRef BGACK_030_INT_0_r)) )) - (net N_108 (joined - (portRef O (instanceRef un9_i_a2_0)) - (portRef I0 (instanceRef G_100)) - (portRef I0 (instanceRef N_108_i)) + (net un1_as_030_2 (joined + (portRef O (instanceRef un1_as_030_2_i)) + (portRef I0 (instanceRef FPU_CS_INT_0_m)) + )) + (net (rename state_machine_un17_clk_030 "state_machine.un17_clk_030") (joined + (portRef O (instanceRef state_machine_un17_clk_030_i)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_m)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_r)) + (portRef I1 (instanceRef FPU_CS_INT_0_m)) + (portRef I0 (instanceRef FPU_CS_INT_0_r)) + )) + (net N_102 (joined + (portRef O (instanceRef SM_AMIGA_ns_a2_0_2)) + (portRef I0 (instanceRef N_102_i)) + )) + (net AS_000_INT_1_sqmuxa (joined + (portRef O (instanceRef AS_000_INT_1_sqmuxa)) + (portRef I1 (instanceRef AS_000_INT_0_m)) + (portRef I0 (instanceRef AS_000_INT_0_r)) + )) + (net VPA_SYNC_1_sqmuxa_1 (joined + (portRef O (instanceRef VPA_SYNC_1_sqmuxa_1)) + (portRef I1 (instanceRef VPA_SYNC_0_m)) + (portRef I0 (instanceRef VPA_SYNC_0_r)) + )) + (net (rename state_machine_AS_030_000_SYNC_3 "state_machine.AS_030_000_SYNC_3") (joined + (portRef O (instanceRef state_machine_AS_030_000_SYNC_3_i)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_m)) + )) + (net (rename clk_un3_clk_000_dd "clk.un3_clk_000_dd") (joined + (portRef O (instanceRef clk_un3_clk_000_dd_0_a2)) + (portRef I0 (instanceRef cpu_est_0_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_0_1)) + (portRef I1 (instanceRef cpu_est_0_1__m)) + (portRef I0 (instanceRef cpu_est_0_1__r)) + (portRef I1 (instanceRef cpu_est_0_2__m)) + (portRef I0 (instanceRef cpu_est_0_2__r)) + (portRef I1 (instanceRef cpu_est_0_3__m)) + (portRef I0 (instanceRef cpu_est_0_3__r)) + (portRef I1 (instanceRef UDS_000_INT_0_sqmuxa_1)) )) (net (rename state_machine_un31_clk_000_d "state_machine.un31_clk_000_d") (joined (portRef O (instanceRef state_machine_un31_clk_000_d_i_0)) (portRef I1 (instanceRef state_machine_LDS_000_INT_8)) )) + (net UDS_000_INT_0_sqmuxa (joined + (portRef O (instanceRef UDS_000_INT_0_sqmuxa)) + (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_i)) + )) (net (rename state_machine_un13_clk_000_d "state_machine.un13_clk_000_d") (joined (portRef O (instanceRef state_machine_un13_clk_000_d)) (portRef I0 (instanceRef state_machine_un13_clk_000_d_i)) @@ -1177,55 +1045,112 @@ (portRef I0 (instanceRef VMA_INT_0_n)) (portRef I1 (instanceRef state_machine_un13_clk_000_d)) )) + (net (rename state_machine_un13_clk_000_d_1 "state_machine.un13_clk_000_d_1") (joined + (portRef O (instanceRef state_machine_un13_clk_000_d_1)) + (portRef I0 (instanceRef state_machine_un13_clk_000_d_1_i)) + (portRef I0 (instanceRef state_machine_un13_clk_000_d_4_1)) + )) (net (rename state_machine_un8_clk_000_d "state_machine.un8_clk_000_d") (joined (portRef O (instanceRef state_machine_un8_clk_000_d)) (portRef I0 (instanceRef state_machine_un8_clk_000_d_i)) )) - (net DTACK_SYNC_1_sqmuxa (joined - (portRef O (instanceRef DTACK_SYNC_1_sqmuxa)) - (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_i)) + (net UDS_000_INT_0_sqmuxa_1 (joined + (portRef O (instanceRef UDS_000_INT_0_sqmuxa_1)) + (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_1_i)) )) - (net VPA_SYNC_1_sqmuxa_1_0 (joined - (portRef O (instanceRef DTACK_SYNC_1_sqmuxa_1_0)) - (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa)) - (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_3_0)) + (net N_132 (joined + (portRef O (instanceRef clk_cpu_est_11_i_a4_0_2)) + (portRef I0 (instanceRef N_132_i)) )) - (net VPA_SYNC_1_sqmuxa (joined - (portRef O (instanceRef VPA_SYNC_1_sqmuxa)) - (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_i)) + (net N_131 (joined + (portRef O (instanceRef clk_cpu_est_11_i_a4_2)) + (portRef I0 (instanceRef N_131_i)) )) - (net N_123 (joined - (portRef O (instanceRef SM_AMIGA_ns_i_a2_0_6)) - (portRef I0 (instanceRef N_123_i)) - (portRef I0 (instanceRef un9_i_a2_1_0)) + (net N_124 (joined + (portRef O (instanceRef clk_cpu_est_11_i_o4_i_2)) + (portRef I0 (instanceRef clk_cpu_est_11_i_a4_1_2)) )) - (net N_118 (joined - (portRef O (instanceRef SM_AMIGA_ns_a2_0_5)) - (portRef I0 (instanceRef N_118_i)) + (net (rename clk_cpu_est_11_3 "clk.cpu_est_11[3]") (joined + (portRef O (instanceRef clk_cpu_est_11_0_i_3)) + (portRef I0 (instanceRef cpu_est_0_3__m)) + )) + (net N_135 (joined + (portRef O (instanceRef clk_cpu_est_11_0_a4_1_3)) + (portRef I0 (instanceRef N_135_i)) + )) + (net N_133 (joined + (portRef O (instanceRef clk_cpu_est_11_0_a4_3)) + (portRef I0 (instanceRef N_133_i)) + )) + (net N_134 (joined + (portRef O (instanceRef clk_cpu_est_11_0_a4_0_3)) + (portRef I0 (instanceRef N_134_i)) + )) + (net (rename clk_cpu_est_11_1 "clk.cpu_est_11[1]") (joined + (portRef O (instanceRef clk_cpu_est_11_0_i_1)) + (portRef I0 (instanceRef cpu_est_0_1__m)) + )) + (net N_130 (joined + (portRef O (instanceRef clk_cpu_est_11_0_a4_2_1)) + (portRef I0 (instanceRef N_130_i)) + )) + (net N_128 (joined + (portRef O (instanceRef clk_cpu_est_11_0_a4_0_1)) + (portRef I0 (instanceRef N_128_i)) + )) + (net N_145 (joined + (portRef O (instanceRef un2_clk_030_1_93)) + (portRef I1 (instanceRef un2_clk_030_1)) + (portRef I0 (instanceRef N_145_i)) + )) + (net N_127 (joined + (portRef O (instanceRef clk_cpu_est_11_0_a4_1)) + (portRef I0 (instanceRef N_127_i)) + )) + (net N_129 (joined + (portRef O (instanceRef clk_cpu_est_11_0_a4_1_1)) + (portRef I0 (instanceRef N_129_i)) + )) + (net N_126 (joined + (portRef O (instanceRef clk_cpu_est_11_0_o4_i_3)) + (portRef I0 (instanceRef clk_cpu_est_11_0_a4_3)) + )) + (net N_125 (joined + (portRef O (instanceRef clk_cpu_est_11_0_o4_i_1)) + (portRef I0 (instanceRef clk_cpu_est_11_0_a4_1)) + )) + (net N_92 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_o2_i_1)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_1)) + )) + (net N_91 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_o2_i_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_0)) )) (net N_110 (joined - (portRef O (instanceRef un1_DSACK_INT_0_sqmuxa_i_a2)) + (portRef O (instanceRef SM_AMIGA_ns_a2_7)) (portRef I0 (instanceRef N_110_i)) )) - (net N_102 (joined - (portRef O (instanceRef SM_AMIGA_ns_i_o2_i_6)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_6)) + (net N_103 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_a2_3)) + (portRef I0 (instanceRef N_103_i)) )) - (net N_120 (joined - (portRef O (instanceRef SM_AMIGA_ns_a2_7)) - (portRef I0 (instanceRef N_120_i)) - )) - (net N_119 (joined - (portRef O (instanceRef SM_AMIGA_ns_i_a2_6)) - (portRef I0 (instanceRef N_119_i)) - )) - (net N_117 (joined - (portRef O (instanceRef SM_AMIGA_ns_a2_5)) - (portRef I0 (instanceRef N_117_i)) - )) - (net N_113 (joined + (net N_101 (joined (portRef O (instanceRef SM_AMIGA_ns_a2_2)) - (portRef I0 (instanceRef N_113_i)) + (portRef I0 (instanceRef N_101_i)) + )) + (net N_100 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_a2_1)) + (portRef I0 (instanceRef N_100_i)) + )) + (net N_112 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_a2_0_1)) + (portRef I0 (instanceRef SM_AMIGA_ns_a2_0_2)) + (portRef I0 (instanceRef N_112_i)) + )) + (net N_99 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_a2_0)) + (portRef I0 (instanceRef N_99_i)) )) (net (rename state_machine_LDS_000_INT_8 "state_machine.LDS_000_INT_8") (joined (portRef O (instanceRef state_machine_LDS_000_INT_8_i)) @@ -1235,11 +1160,6 @@ (portRef O (instanceRef state_machine_UDS_000_INT_8_i)) (portRef I0 (instanceRef UDS_000_INT_0_n)) )) - (net DTACK_SYNC_1_sqmuxa_1 (joined - (portRef O (instanceRef DTACK_SYNC_1_sqmuxa_1)) - (portRef I1 (instanceRef DTACK_SYNC_0_m)) - (portRef I0 (instanceRef DTACK_SYNC_0_r)) - )) (net un2_clk_030_1 (joined (portRef O (instanceRef un2_clk_030_1)) (portRef I1 (instanceRef UDS_000_INT_0_m)) @@ -1247,61 +1167,16 @@ (portRef I1 (instanceRef LDS_000_INT_0_m)) (portRef I0 (instanceRef LDS_000_INT_0_r)) )) - (net VPA_SYNC_1_sqmuxa_1 (joined - (portRef O (instanceRef VPA_SYNC_1_sqmuxa_1)) - (portRef I1 (instanceRef VPA_SYNC_0_m)) - (portRef I0 (instanceRef VPA_SYNC_0_r)) - )) - (net AS_000_INT_1_sqmuxa (joined - (portRef O (instanceRef AS_000_INT_1_sqmuxa)) - (portRef I1 (instanceRef AS_000_INT_0_m)) - (portRef I0 (instanceRef AS_000_INT_0_r)) - )) (net VMA_INT_1_sqmuxa (joined (portRef O (instanceRef VMA_INT_1_sqmuxa)) (portRef I1 (instanceRef VMA_INT_0_m)) (portRef I0 (instanceRef VMA_INT_0_r)) )) - (net DSACK_INT_1_sqmuxa (joined - (portRef O (instanceRef DSACK_INT_1_sqmuxa)) - (portRef I1 (instanceRef DSACK_INT_0_1__m)) - (portRef I0 (instanceRef DSACK_INT_0_1__r)) - )) (net RW_i (joined (portRef O (instanceRef RW_i)) (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_2)) (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR)) )) - (net clk_exp_i (joined - (portRef O (instanceRef clk_exp_i)) - (portRef I0 (instanceRef CLK_EXP)) - )) - (net DTACK_SYNC_1_sqmuxa_i (joined - (portRef O (instanceRef DTACK_SYNC_1_sqmuxa_i)) - (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa_1)) - (portRef I0 (instanceRef DTACK_SYNC_0_n)) - )) - (net N_114_i (joined - (portRef O (instanceRef N_114_i)) - (portRef I1 (instanceRef SM_AMIGA_ns_2)) - (portRef I1 (instanceRef AS_000_INT_1_sqmuxa)) - (portRef I0 (instanceRef AS_000_INT_0_n)) - )) - (net VPA_SYNC_1_sqmuxa_i (joined - (portRef O (instanceRef VPA_SYNC_1_sqmuxa_i)) - (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_1)) - (portRef I0 (instanceRef VPA_SYNC_0_n)) - )) - (net N_110_i (joined - (portRef O (instanceRef N_110_i)) - (portRef I0 (instanceRef SM_AMIGA_ns_7)) - (portRef I1 (instanceRef DSACK_INT_1_sqmuxa)) - (portRef I0 (instanceRef DSACK_INT_0_1__n)) - )) - (net N_108_i (joined - (portRef O (instanceRef N_108_i)) - (portRef I0 (instanceRef SM_AMIGA_D_0_2__m)) - )) (net (rename cpu_est_d_i_3 "cpu_est_d_i[3]") (joined (portRef O (instanceRef cpu_est_d_i_3)) (portRef I1 (instanceRef state_machine_un13_clk_000_d_1_0)) @@ -1312,32 +1187,22 @@ )) (net CLK_000_D_i (joined (portRef O (instanceRef CLK_000_D_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_6)) + (portRef I0 (instanceRef SM_AMIGA_ns_a2_5)) (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_4)) (portRef I0 (instanceRef SM_AMIGA_ns_i_3)) - (portRef I0 (instanceRef SM_AMIGA_ns_a2_5)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_6)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_1)) (portRef I0 (instanceRef clk_RISING_CLK_AMIGA_1)) - (portRef I0 (instanceRef state_machine_un8_clk_000_d_2)) - (portRef I0 (instanceRef un1_DSACK_INT_0_sqmuxa_i_a2_1)) (portRef I0 (instanceRef SM_AMIGA_ns_a2_0_1_5)) - )) - (net AS_030_i (joined - (portRef O (instanceRef AS_030_i)) - (portRef I0 (instanceRef state_machine_un17_clk_030)) - (portRef I0 (instanceRef un1_as_030_2)) - (portRef I0 (instanceRef un2_clk_030_1)) - (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_1)) - (portRef I0 (instanceRef DSACK_INT_1_sqmuxa)) - (portRef I0 (instanceRef AS_000_INT_1_sqmuxa)) - (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_1)) - (portRef I0 (instanceRef state_machine_AS_030_000_SYNC_3_1)) + (portRef I0 (instanceRef un1_DSACK_INT_0_sqmuxa_i_a2_1)) + (portRef I0 (instanceRef state_machine_un8_clk_000_d_2)) )) (net AS_000_INT_i (joined (portRef O (instanceRef AS_000_INT_i)) (portRef I0 (instanceRef state_machine_un13_as_000_int)) )) (net (rename DSACK_i_1 "DSACK_i[1]") (joined - (portRef O (instanceRef I_119)) + (portRef O (instanceRef I_106)) (portRef I1 (instanceRef state_machine_un13_as_000_int)) )) (net (rename state_machine_un13_clk_000_d_i "state_machine.un13_clk_000_d_i") (joined @@ -1348,50 +1213,118 @@ (portRef O (instanceRef state_machine_un8_clk_000_d_i)) (portRef I0 (instanceRef VMA_INT_1_sqmuxa)) )) + (net AS_030_i (joined + (portRef O (instanceRef AS_030_i)) + (portRef I0 (instanceRef DSACK_INT_1_sqmuxa)) + (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_1)) + (portRef I0 (instanceRef un1_as_030_2)) + (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_1)) + (portRef I0 (instanceRef AS_000_INT_1_sqmuxa)) + (portRef I0 (instanceRef state_machine_un17_clk_030)) + (portRef I0 (instanceRef un2_clk_030_1)) + (portRef I0 (instanceRef state_machine_AS_030_000_SYNC_3_1)) + )) + (net (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (joined + (portRef O (instanceRef SM_AMIGA_i_6)) + (portRef I0 (instanceRef state_machine_un5_clk_030_i_a2)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_1)) + )) + (net (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (joined + (portRef O (instanceRef SM_AMIGA_i_7)) + (portRef I1 (instanceRef state_machine_un5_clk_030_i_a2)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_0)) + )) + (net (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (joined + (portRef O (instanceRef SM_AMIGA_i_5)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_3)) + )) + (net (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (joined + (portRef O (instanceRef SM_AMIGA_i_4)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_0_4)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_3)) + )) (net (rename state_machine_un13_clk_000_d_1_i "state_machine.un13_clk_000_d_1_i") (joined (portRef O (instanceRef state_machine_un13_clk_000_d_1_i)) (portRef I1 (instanceRef SM_AMIGA_ns_a2_7)) )) - (net (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (joined - (portRef O (instanceRef SM_AMIGA_i_1)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_0_6)) - (portRef I1 (instanceRef un9_i_a2_1)) + (net CLK_000_DD_i (joined + (portRef O (instanceRef CLK_000_DD_i)) + (portRef I1 (instanceRef clk_un3_clk_000_dd_0_a2)) )) - (net (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (joined - (portRef O (instanceRef SM_AMIGA_i_2)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_0_6)) - (portRef I1 (instanceRef un9_i_a2_1_2)) + (net AS_030_000_SYNC_i (joined + (portRef O (instanceRef AS_030_000_SYNC_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_0_1)) + (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_1_1)) )) - (net (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (joined - (portRef O (instanceRef SM_AMIGA_i_0)) - (portRef I1 (instanceRef un9_i_a2_1_1)) - (portRef I0 (instanceRef un9_i_a2_1_2)) - (portRef I1 (instanceRef un9_i_a2_1_0)) + (net (rename cpu_est_i_0 "cpu_est_i[0]") (joined + (portRef O (instanceRef cpu_est_i_0)) + (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_3)) + (portRef I1 (instanceRef clk_cpu_est_11_0_a4_1)) + (portRef I1 (instanceRef clk_cpu_est_11_i_a4_0_1_2)) )) - (net (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (joined - (portRef O (instanceRef SM_AMIGA_i_3)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_0_4)) - (portRef I1 (instanceRef un9_i_a2_0)) - )) - (net VPA_D_i (joined - (portRef O (instanceRef VPA_D_i)) - (portRef I1 (instanceRef state_machine_un8_clk_000_d_2)) - (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_3_0)) - )) - (net VMA_INT_i (joined - (portRef O (instanceRef VMA_INT_i)) - (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_2)) - )) - (net DTACK_i (joined - (portRef O (instanceRef I_120)) - (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_1_1)) + (net (rename cpu_est_i_2 "cpu_est_i[2]") (joined + (portRef O (instanceRef cpu_est_i_2)) + (portRef I1 (instanceRef clk_cpu_est_11_0_a4_0_3)) + (portRef I1 (instanceRef clk_cpu_est_11_0_a4_1_3)) + (portRef I0 (instanceRef clk_cpu_est_11_0_a4_0_1)) + (portRef I1 (instanceRef clk_cpu_est_11_i_a4_0_2)) )) (net (rename cpu_est_i_3 "cpu_est_i[3]") (joined (portRef O (instanceRef cpu_est_i_3)) - (portRef I1 (instanceRef clk_cpu_est_11_0_a4_0_1)) (portRef I1 (instanceRef clk_cpu_est_11_0_o4_1)) - (portRef I1 (instanceRef clk_cpu_est_11_i_a4_2)) + (portRef I1 (instanceRef clk_cpu_est_11_0_a4_0_1)) (portRef I1 (instanceRef state_machine_un8_clk_000_d_1)) + (portRef I1 (instanceRef clk_cpu_est_11_i_a4_2)) + )) + (net (rename cpu_est_i_1 "cpu_est_i[1]") (joined + (portRef O (instanceRef cpu_est_i_1)) + (portRef I0 (instanceRef clk_cpu_est_11_0_o4_1)) + (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_3)) + (portRef I0 (instanceRef state_machine_un8_clk_000_d_1)) + )) + (net UDS_000_INT_0_sqmuxa_1_i (joined + (portRef O (instanceRef UDS_000_INT_0_sqmuxa_1_i)) + (portRef I0 (instanceRef un2_clk_030_1_93)) + )) + (net UDS_000_INT_0_sqmuxa_i (joined + (portRef O (instanceRef UDS_000_INT_0_sqmuxa_i)) + (portRef I1 (instanceRef un2_clk_030_1_93)) + )) + (net DS_030_i (joined + (portRef O (instanceRef DS_030_i)) + (portRef I1 (instanceRef UDS_000_INT_0_sqmuxa_1_1)) + (portRef I1 (instanceRef UDS_000_INT_0_sqmuxa_1_0)) + )) + (net VPA_D_i (joined + (portRef O (instanceRef VPA_D_i)) + (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_3_0)) + (portRef I1 (instanceRef state_machine_un8_clk_000_d_2)) + )) + (net (rename state_machine_un42_clk_030_i "state_machine.un42_clk_030_i") (joined + (portRef O (instanceRef state_machine_un42_clk_030_i)) + (portRef I1 (instanceRef state_machine_AS_030_000_SYNC_3)) + )) + (net VPA_SYNC_1_sqmuxa_i (joined + (portRef O (instanceRef VPA_SYNC_1_sqmuxa_i)) + (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_1)) + (portRef I0 (instanceRef VPA_SYNC_0_n)) + )) + (net N_102_i (joined + (portRef O (instanceRef N_102_i)) + (portRef I1 (instanceRef AS_000_INT_1_sqmuxa)) + (portRef I0 (instanceRef AS_000_INT_0_n)) + (portRef I1 (instanceRef SM_AMIGA_ns_2)) + )) + (net DTACK_SYNC_1_sqmuxa_i (joined + (portRef O (instanceRef DTACK_SYNC_1_sqmuxa_i)) + (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa_1)) + (portRef I0 (instanceRef DTACK_SYNC_0_n)) + )) + (net N_98_i (joined + (portRef O (instanceRef N_98_i)) + (portRef I1 (instanceRef DSACK_INT_1_sqmuxa)) + (portRef I0 (instanceRef DSACK_INT_0_1__n)) + (portRef I0 (instanceRef SM_AMIGA_ns_7)) )) (net (rename A_i_18 "A_i[18]") (joined (portRef O (instanceRef A_i_18)) @@ -1409,69 +1342,26 @@ (portRef O (instanceRef CLK_030_i)) (portRef I1 (instanceRef state_machine_un17_clk_030)) )) - (net (rename state_machine_un42_clk_030_i "state_machine.un42_clk_030_i") (joined - (portRef O (instanceRef state_machine_un42_clk_030_i)) - (portRef I1 (instanceRef state_machine_AS_030_000_SYNC_3)) + (net VMA_INT_i (joined + (portRef O (instanceRef VMA_INT_i)) + (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_2)) )) - (net DS_030_i (joined - (portRef O (instanceRef DS_030_i)) - (portRef I1 (instanceRef UDS_000_INT_0_sqmuxa_1_0)) - (portRef I1 (instanceRef UDS_000_INT_0_sqmuxa_1_1)) + (net DTACK_i (joined + (portRef O (instanceRef I_107)) + (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_1_1)) )) - (net (rename cpu_est_i_1 "cpu_est_i[1]") (joined - (portRef O (instanceRef cpu_est_i_1)) - (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_3)) - (portRef I0 (instanceRef clk_cpu_est_11_0_o4_1)) - (portRef I0 (instanceRef state_machine_un8_clk_000_d_1)) + (net (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (joined + (portRef O (instanceRef SM_AMIGA_i_3)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_0_4)) )) - (net AS_030_000_SYNC_i (joined - (portRef O (instanceRef AS_030_000_SYNC_i)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_1)) - (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_1_1)) + (net (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (joined + (portRef O (instanceRef SM_AMIGA_i_1)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_0_6)) )) - (net (rename cpu_est_i_0 "cpu_est_i[0]") (joined - (portRef O (instanceRef cpu_est_i_0)) - (portRef I1 (instanceRef clk_cpu_est_11_0_a4_1)) - (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_3)) - (portRef I1 (instanceRef clk_cpu_est_11_i_a4_0_1_2)) - )) - (net (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (joined - (portRef O (instanceRef SM_AMIGA_i_4)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_0_4)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_3)) - (portRef I0 (instanceRef un9_i_a2_2_2)) - )) - (net (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (joined - (portRef O (instanceRef SM_AMIGA_i_6)) - (portRef I0 (instanceRef state_machine_un5_clk_030_i_a2)) - (portRef I1 (instanceRef un9_i_a2_2_2)) - )) - (net (rename cpu_est_i_2 "cpu_est_i[2]") (joined - (portRef O (instanceRef cpu_est_i_2)) - (portRef I1 (instanceRef clk_cpu_est_11_0_a4_0_3)) - (portRef I0 (instanceRef clk_cpu_est_11_0_a4_0_1)) - (portRef I1 (instanceRef clk_cpu_est_11_0_a4_1_3)) - (portRef I1 (instanceRef clk_cpu_est_11_i_a4_0_2)) - )) - (net UDS_000_INT_0_sqmuxa_1_i (joined - (portRef O (instanceRef UDS_000_INT_0_sqmuxa_1_i)) - (portRef I0 (instanceRef un2_clk_030_1_106)) - )) - (net UDS_000_INT_0_sqmuxa_i (joined - (portRef O (instanceRef UDS_000_INT_0_sqmuxa_i)) - (portRef I1 (instanceRef un2_clk_030_1_106)) - )) - (net (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (joined - (portRef O (instanceRef SM_AMIGA_i_5)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_3)) - )) - (net CLK_000_DD_i (joined - (portRef O (instanceRef CLK_000_DD_i)) - (portRef I1 (instanceRef clk_un3_clk_000_dd_0_a2)) - )) - (net (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (joined - (portRef O (instanceRef SM_AMIGA_i_7)) - (portRef I1 (instanceRef state_machine_un5_clk_030_i_a2)) + (net (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (joined + (portRef O (instanceRef SM_AMIGA_i_2)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_o2_6)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_0_6)) )) (net (rename A_i_30 "A_i[30]") (joined (portRef O (instanceRef A_i_30)) @@ -1539,14 +1429,6 @@ (portRef S (instanceRef VMA_INT)) (portRef S (instanceRef VPA_SYNC)) )) - (net N_107_i (joined - (portRef O (instanceRef N_107_i)) - (portRef I0 (instanceRef SM_AMIGA_D_0_1__m)) - )) - (net N_106_i (joined - (portRef O (instanceRef N_106_i)) - (portRef I0 (instanceRef SM_AMIGA_D_0_0__m)) - )) (net FPU_CS_INT_i (joined (portRef O (instanceRef FPU_CS_INT_i)) (portRef OE (instanceRef AVEC_EXP)) @@ -1554,8 +1436,8 @@ )) (net CPU_SPACE_i (joined (portRef O (instanceRef CPU_SPACE_i)) - (portRef I1 (instanceRef state_machine_AS_030_000_SYNC_3_1)) (portRef I1 (instanceRef un1_bg_030_1)) + (portRef I1 (instanceRef state_machine_AS_030_000_SYNC_3_1)) (portRef OE (instanceRef DSACK_0)) (portRef OE (instanceRef DSACK_1)) )) @@ -1879,9 +1761,6 @@ (portRef CLK (instanceRef SM_AMIGA_5)) (portRef CLK (instanceRef SM_AMIGA_6)) (portRef CLK (instanceRef SM_AMIGA_7)) - (portRef CLK (instanceRef SM_AMIGA_D_0)) - (portRef CLK (instanceRef SM_AMIGA_D_1)) - (portRef CLK (instanceRef SM_AMIGA_D_2)) (portRef CLK (instanceRef UDS_000_INT)) (portRef CLK (instanceRef VMA_INT)) (portRef CLK (instanceRef VPA_D)) @@ -1903,6 +1782,11 @@ (portRef O (instanceRef CLK_DIV_OUT)) (portRef CLK_DIV_OUT) )) + (net CLK_EXP_c (joined + (portRef Q (instanceRef CLK_OUT_INT)) + (portRef I0 (instanceRef CLK_DIV_OUT)) + (portRef I0 (instanceRef CLK_EXP)) + )) (net CLK_EXP (joined (portRef O (instanceRef CLK_EXP)) (portRef CLK_EXP) @@ -1968,7 +1852,7 @@ )) (net (rename DSACK_c_1 "DSACK_c[1]") (joined (portRef O (instanceRef DSACK_1)) - (portRef I0 (instanceRef I_119)) + (portRef I0 (instanceRef I_106)) )) (net (rename DSACK_1 "DSACK[1]") (joined (portRef (member dsack 0)) @@ -1976,7 +1860,7 @@ )) (net DTACK_c (joined (portRef O (instanceRef DTACK)) - (portRef I0 (instanceRef I_120)) + (portRef I0 (instanceRef I_107)) )) (net DTACK (joined (portRef IO (instanceRef DTACK)) @@ -2008,13 +1892,7 @@ )) (net RST_c (joined (portRef O (instanceRef RST)) - (portRef I1 (instanceRef SM_AMIGA_D_0_1__m)) - (portRef I0 (instanceRef SM_AMIGA_D_0_1__r)) - (portRef I1 (instanceRef SM_AMIGA_D_0_0__m)) - (portRef I0 (instanceRef SM_AMIGA_D_0_0__r)) (portRef I0 (instanceRef RST_i)) - (portRef I1 (instanceRef SM_AMIGA_D_0_2__m)) - (portRef I0 (instanceRef SM_AMIGA_D_0_2__r)) (portRef D (instanceRef RESETDFF)) )) (net RST (joined @@ -2070,13 +1948,8 @@ (portRef O (instanceRef CIIN)) (portRef CIIN) )) - (net (rename state_machine_un57_clk_000_d_0 "state_machine.un57_clk_000_d_0") (joined - (portRef O (instanceRef state_machine_un57_clk_000_d)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_o2_4)) - (portRef I0 (instanceRef state_machine_un57_clk_000_d_i)) - )) - (net N_161_i (joined - (portRef O (instanceRef N_161_i)) + (net N_145_i (joined + (portRef O (instanceRef N_145_i)) (portRef I1 (instanceRef state_machine_UDS_000_INT_8)) (portRef I0 (instanceRef state_machine_LDS_000_INT_8)) )) @@ -2093,53 +1966,120 @@ (portRef O (instanceRef state_machine_LDS_000_INT_8)) (portRef I0 (instanceRef state_machine_LDS_000_INT_8_i)) )) - (net N_113_i (joined - (portRef O (instanceRef N_113_i)) + (net N_99_i (joined + (portRef O (instanceRef N_99_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_0)) + )) + (net N_75_i (joined + (portRef O (instanceRef SM_AMIGA_ns_i_0)) + (portRef D (instanceRef SM_AMIGA_7)) + )) + (net N_112_i (joined + (portRef O (instanceRef N_112_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_1)) + )) + (net N_100_i (joined + (portRef O (instanceRef N_100_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_1)) + )) + (net N_77_i (joined + (portRef O (instanceRef SM_AMIGA_ns_i_1)) + (portRef D (instanceRef SM_AMIGA_6)) + )) + (net N_101_i (joined + (portRef O (instanceRef N_101_i)) (portRef I0 (instanceRef SM_AMIGA_ns_2)) )) (net (rename SM_AMIGA_ns_0_2 "SM_AMIGA_ns_0[2]") (joined (portRef O (instanceRef SM_AMIGA_ns_2)) (portRef I0 (instanceRef SM_AMIGA_ns_i_2)) )) - (net N_118_i (joined - (portRef O (instanceRef N_118_i)) - (portRef I1 (instanceRef SM_AMIGA_ns_5)) + (net N_103_i (joined + (portRef O (instanceRef N_103_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_3)) )) - (net N_117_i (joined - (portRef O (instanceRef N_117_i)) - (portRef I0 (instanceRef SM_AMIGA_ns_5)) + (net N_80_i (joined + (portRef O (instanceRef SM_AMIGA_ns_i_3)) + (portRef D (instanceRef SM_AMIGA_4)) )) - (net (rename SM_AMIGA_ns_0_5 "SM_AMIGA_ns_0[5]") (joined - (portRef O (instanceRef SM_AMIGA_ns_5)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_5)) - )) - (net N_123_i (joined - (portRef O (instanceRef N_123_i)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_6)) - )) - (net N_119_i (joined - (portRef O (instanceRef N_119_i)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_6)) - )) - (net N_94_i (joined - (portRef O (instanceRef SM_AMIGA_ns_i_6)) - (portRef D (instanceRef SM_AMIGA_1)) - )) - (net N_120_i (joined - (portRef O (instanceRef N_120_i)) + (net N_110_i (joined + (portRef O (instanceRef N_110_i)) (portRef I1 (instanceRef SM_AMIGA_ns_7)) )) (net (rename SM_AMIGA_ns_0_7 "SM_AMIGA_ns_0[7]") (joined (portRef O (instanceRef SM_AMIGA_ns_7)) (portRef I0 (instanceRef SM_AMIGA_ns_i_7)) )) - (net CLK_OUT_PRE_i (joined - (portRef O (instanceRef CLK_OUT_PRE_i)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_6)) + (net N_91_0 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_o2_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_i_0)) )) - (net N_102_0 (joined - (portRef O (instanceRef SM_AMIGA_ns_i_o2_6)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_i_6)) + (net N_92_0 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_o2_1)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_i_1)) + )) + (net N_131_i (joined + (portRef O (instanceRef N_131_i)) + (portRef I0 (instanceRef clk_cpu_est_11_i_2)) + )) + (net N_132_i (joined + (portRef O (instanceRef N_132_i)) + (portRef I1 (instanceRef clk_cpu_est_11_i_2)) + )) + (net N_122_i (joined + (portRef O (instanceRef clk_cpu_est_11_i_2)) + (portRef I0 (instanceRef cpu_est_0_2__m)) + )) + (net N_124_i (joined + (portRef O (instanceRef clk_cpu_est_11_i_o4_2)) + (portRef I0 (instanceRef clk_cpu_est_11_0_a4_2_1)) + (portRef I0 (instanceRef clk_cpu_est_11_i_o4_i_2)) + )) + (net N_125_i (joined + (portRef O (instanceRef clk_cpu_est_11_0_o4_1)) + (portRef I0 (instanceRef clk_cpu_est_11_0_a4_1_1)) + (portRef I0 (instanceRef clk_cpu_est_11_0_o4_i_1)) + )) + (net N_126_i (joined + (portRef O (instanceRef clk_cpu_est_11_0_o4_3)) + (portRef I0 (instanceRef clk_cpu_est_11_0_a4_0_3)) + (portRef I0 (instanceRef clk_cpu_est_11_0_o4_i_3)) + )) + (net N_129_i (joined + (portRef O (instanceRef N_129_i)) + (portRef I1 (instanceRef clk_cpu_est_11_0_2_1)) + )) + (net N_127_i (joined + (portRef O (instanceRef N_127_i)) + (portRef I0 (instanceRef clk_cpu_est_11_0_2_1)) + )) + (net N_128_i (joined + (portRef O (instanceRef N_128_i)) + (portRef I1 (instanceRef clk_cpu_est_11_0_1_1)) + )) + (net N_130_i (joined + (portRef O (instanceRef N_130_i)) + (portRef I0 (instanceRef clk_cpu_est_11_0_1_1)) + )) + (net (rename clk_cpu_est_11_0_1 "clk.cpu_est_11_0[1]") (joined + (portRef O (instanceRef clk_cpu_est_11_0_1)) + (portRef I0 (instanceRef clk_cpu_est_11_0_i_1)) + )) + (net N_134_i (joined + (portRef O (instanceRef N_134_i)) + (portRef I1 (instanceRef clk_cpu_est_11_0_3)) + )) + (net N_133_i (joined + (portRef O (instanceRef N_133_i)) + (portRef I1 (instanceRef clk_cpu_est_11_0_1_3)) + )) + (net N_135_i (joined + (portRef O (instanceRef N_135_i)) + (portRef I0 (instanceRef clk_cpu_est_11_0_1_3)) + )) + (net (rename clk_cpu_est_11_0_3 "clk.cpu_est_11_0[3]") (joined + (portRef O (instanceRef clk_cpu_est_11_0_3)) + (portRef I0 (instanceRef clk_cpu_est_11_0_i_3)) )) (net (rename SIZE_c_i_1 "SIZE_c_i[1]") (joined (portRef O (instanceRef SIZE_c_i_1)) @@ -2149,6 +2089,23 @@ (portRef O (instanceRef state_machine_un31_clk_000_d)) (portRef I0 (instanceRef state_machine_un31_clk_000_d_i_0)) )) + (net (rename state_machine_AS_030_000_SYNC_3_0 "state_machine.AS_030_000_SYNC_3_0") (joined + (portRef O (instanceRef state_machine_AS_030_000_SYNC_3)) + (portRef I0 (instanceRef state_machine_AS_030_000_SYNC_3_i)) + )) + (net un1_as_030_2_0 (joined + (portRef O (instanceRef un1_as_030_2)) + (portRef I0 (instanceRef un1_as_030_2_i)) + )) + (net (rename state_machine_un17_clk_030_0 "state_machine.un17_clk_030_0") (joined + (portRef O (instanceRef state_machine_un17_clk_030)) + (portRef I0 (instanceRef state_machine_un17_clk_030_i)) + )) + (net (rename state_machine_un57_clk_000_d_0 "state_machine.un57_clk_000_d_0") (joined + (portRef O (instanceRef state_machine_un57_clk_000_d)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_o2_4)) + (portRef I0 (instanceRef state_machine_un57_clk_000_d_i)) + )) (net RISING_CLK_AMIGA_i (joined (portRef O (instanceRef RISING_CLK_AMIGA_i)) (portRef I1 (instanceRef state_machine_un4_bgack_000)) @@ -2166,139 +2123,62 @@ (portRef O (instanceRef state_machine_un1_clk_030)) (portRef I0 (instanceRef state_machine_un1_clk_030_i)) )) - (net (rename state_machine_un17_clk_030_0 "state_machine.un17_clk_030_0") (joined - (portRef O (instanceRef state_machine_un17_clk_030)) - (portRef I0 (instanceRef state_machine_un17_clk_030_i)) - )) - (net un1_as_030_2_0 (joined - (portRef O (instanceRef un1_as_030_2)) - (portRef I0 (instanceRef un1_as_030_2_i)) - )) - (net (rename state_machine_AS_030_000_SYNC_3_2 "state_machine.AS_030_000_SYNC_3_2") (joined - (portRef O (instanceRef state_machine_AS_030_000_SYNC_3)) - (portRef I0 (instanceRef state_machine_AS_030_000_SYNC_3_i)) - )) - (net N_109_i (joined - (portRef O (instanceRef N_109_i)) + (net N_97_i (joined + (portRef O (instanceRef N_97_i)) (portRef I1 (instanceRef un1_bg_030_2)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_1_1)) )) (net un1_bg_030_0 (joined (portRef O (instanceRef un1_bg_030)) (portRef I0 (instanceRef un1_bg_030_i)) )) - (net N_111_i (joined - (portRef O (instanceRef N_111_i)) - (portRef I0 (instanceRef SM_AMIGA_ns_0)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_1_1)) + (net CLK_OUT_PRE_i (joined + (portRef O (instanceRef CLK_OUT_PRE_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_6)) )) - (net N_122_i (joined - (portRef O (instanceRef N_122_i)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_1)) + (net N_94_0 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_o2_6)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_i_6)) )) - (net N_86_i (joined - (portRef O (instanceRef SM_AMIGA_ns_i_1)) - (portRef D (instanceRef SM_AMIGA_6)) - )) - (net N_147_i (joined - (portRef O (instanceRef N_147_i)) - (portRef I0 (instanceRef clk_cpu_est_11_0_1_3)) - )) - (net (rename clk_cpu_est_11_0_3 "clk.cpu_est_11_0[3]") (joined - (portRef O (instanceRef clk_cpu_est_11_0_3)) - (portRef I0 (instanceRef clk_cpu_est_11_0_i_3)) - )) - (net N_145_i (joined - (portRef O (instanceRef N_145_i)) - (portRef I1 (instanceRef clk_cpu_est_11_0_1_3)) - )) - (net N_146_i (joined - (portRef O (instanceRef N_146_i)) - (portRef I1 (instanceRef clk_cpu_est_11_0_3)) - )) - (net N_142_i (joined - (portRef O (instanceRef N_142_i)) - (portRef I1 (instanceRef clk_cpu_est_11_0_2_1)) - )) - (net (rename clk_cpu_est_11_0_1 "clk.cpu_est_11_0[1]") (joined - (portRef O (instanceRef clk_cpu_est_11_0_1)) - (portRef I0 (instanceRef clk_cpu_est_11_0_i_1)) - )) - (net N_140_i (joined - (portRef O (instanceRef N_140_i)) - (portRef I1 (instanceRef clk_cpu_est_11_0_1_1)) - )) - (net N_139_i (joined - (portRef O (instanceRef N_139_i)) - (portRef I0 (instanceRef clk_cpu_est_11_0_1_1)) - )) - (net N_141_i (joined - (portRef O (instanceRef N_141_i)) - (portRef I0 (instanceRef clk_cpu_est_11_0_2_1)) - )) - (net N_138_i (joined - (portRef O (instanceRef clk_cpu_est_11_0_o4_3)) - (portRef I0 (instanceRef clk_cpu_est_11_0_a4_0_3)) - (portRef I0 (instanceRef clk_cpu_est_11_0_o4_i_3)) - )) - (net N_137_i (joined - (portRef O (instanceRef clk_cpu_est_11_0_o4_1)) - (portRef I0 (instanceRef clk_cpu_est_11_0_a4_1_1)) - (portRef I0 (instanceRef clk_cpu_est_11_0_o4_i_1)) - )) - (net N_136_i (joined - (portRef O (instanceRef clk_cpu_est_11_i_o4_2)) - (portRef I0 (instanceRef clk_cpu_est_11_0_a4_2_1)) - (portRef I0 (instanceRef clk_cpu_est_11_i_o4_i_2)) - )) - (net N_143_i (joined - (portRef O (instanceRef N_143_i)) - (portRef I0 (instanceRef clk_cpu_est_11_i_2)) - )) - (net N_144_i (joined - (portRef O (instanceRef N_144_i)) - (portRef I1 (instanceRef clk_cpu_est_11_i_2)) - )) - (net N_134_i (joined - (portRef O (instanceRef clk_cpu_est_11_i_2)) - (portRef I0 (instanceRef cpu_est_0_2__m)) - )) - (net N_101_0 (joined + (net N_93_0 (joined (portRef O (instanceRef SM_AMIGA_ns_i_o2_4)) (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_i_4)) )) - (net N_115_i (joined - (portRef O (instanceRef N_115_i)) + (net N_108_i (joined + (portRef O (instanceRef N_108_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_6)) + )) + (net N_109_i (joined + (portRef O (instanceRef N_109_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_6)) + )) + (net N_85_i (joined + (portRef O (instanceRef SM_AMIGA_ns_i_6)) + (portRef D (instanceRef SM_AMIGA_1)) + )) + (net N_106_i (joined + (portRef O (instanceRef N_106_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_5)) + )) + (net N_107_i (joined + (portRef O (instanceRef N_107_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_5)) + )) + (net (rename SM_AMIGA_ns_0_5 "SM_AMIGA_ns_0[5]") (joined + (portRef O (instanceRef SM_AMIGA_ns_5)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_5)) + )) + (net N_104_i (joined + (portRef O (instanceRef N_104_i)) (portRef I0 (instanceRef SM_AMIGA_ns_i_4)) )) - (net N_116_i (joined - (portRef O (instanceRef N_116_i)) + (net N_105_i (joined + (portRef O (instanceRef N_105_i)) (portRef I1 (instanceRef SM_AMIGA_ns_i_4)) )) - (net N_91_i (joined + (net N_82_i (joined (portRef O (instanceRef SM_AMIGA_ns_i_4)) (portRef D (instanceRef SM_AMIGA_3)) )) - (net N_124_i (joined - (portRef O (instanceRef N_124_i)) - (portRef I1 (instanceRef SM_AMIGA_ns_i_3)) - )) - (net N_89_i (joined - (portRef O (instanceRef SM_AMIGA_ns_i_3)) - (portRef D (instanceRef SM_AMIGA_4)) - )) - (net N_112_i (joined - (portRef O (instanceRef N_112_i)) - (portRef I1 (instanceRef SM_AMIGA_ns_0)) - )) - (net (rename SM_AMIGA_ns_0_0 "SM_AMIGA_ns_0[0]") (joined - (portRef O (instanceRef SM_AMIGA_ns_0)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_0)) - )) - (net N_86_i_1 (joined - (portRef O (instanceRef SM_AMIGA_ns_i_1_1)) - (portRef I0 (instanceRef SM_AMIGA_ns_i_1)) - )) (net un1_bg_030_0_1 (joined (portRef O (instanceRef un1_bg_030_1)) (portRef I0 (instanceRef un1_bg_030)) @@ -2307,45 +2187,13 @@ (portRef O (instanceRef un1_bg_030_2)) (portRef I1 (instanceRef un1_bg_030)) )) - (net (rename state_machine_AS_030_000_SYNC_3_2_1 "state_machine.AS_030_000_SYNC_3_2_1") (joined - (portRef O (instanceRef state_machine_AS_030_000_SYNC_3_1)) - (portRef I0 (instanceRef state_machine_AS_030_000_SYNC_3)) - )) (net (rename state_machine_un31_clk_000_d_i_1 "state_machine.un31_clk_000_d_i_1") (joined (portRef O (instanceRef state_machine_un31_clk_000_d_1)) (portRef I0 (instanceRef state_machine_un31_clk_000_d)) )) - (net N_186_1 (joined - (portRef O (instanceRef un8_ciin_1)) - (portRef I0 (instanceRef un8_ciin_5)) - )) - (net N_186_2 (joined - (portRef O (instanceRef un8_ciin_2)) - (portRef I1 (instanceRef un8_ciin_5)) - )) - (net N_186_3 (joined - (portRef O (instanceRef un8_ciin_3)) - (portRef I0 (instanceRef un8_ciin_6)) - )) - (net N_186_4 (joined - (portRef O (instanceRef un8_ciin_4)) - (portRef I1 (instanceRef un8_ciin_6)) - )) - (net N_186_5 (joined - (portRef O (instanceRef un8_ciin_5)) - (portRef I0 (instanceRef un8_ciin)) - )) - (net N_186_6 (joined - (portRef O (instanceRef un8_ciin_6)) - (portRef I1 (instanceRef un8_ciin)) - )) - (net N_189_1 (joined - (portRef O (instanceRef un4_ciin_1)) - (portRef I0 (instanceRef un4_ciin)) - )) - (net N_189_2 (joined - (portRef O (instanceRef un4_ciin_2)) - (portRef I1 (instanceRef un4_ciin)) + (net (rename clk_cpu_est_11_0_1_3 "clk.cpu_est_11_0_1[3]") (joined + (portRef O (instanceRef clk_cpu_est_11_0_1_3)) + (portRef I0 (instanceRef clk_cpu_est_11_0_3)) )) (net (rename clk_cpu_est_11_0_1_1 "clk.cpu_est_11_0_1[1]") (joined (portRef O (instanceRef clk_cpu_est_11_0_1_1)) @@ -2355,49 +2203,41 @@ (portRef O (instanceRef clk_cpu_est_11_0_2_1)) (portRef I1 (instanceRef clk_cpu_est_11_0_1)) )) - (net (rename clk_cpu_est_11_0_1_3 "clk.cpu_est_11_0_1[3]") (joined - (portRef O (instanceRef clk_cpu_est_11_0_1_3)) - (portRef I0 (instanceRef clk_cpu_est_11_0_3)) + (net N_167_1 (joined + (portRef O (instanceRef un8_ciin_1)) + (portRef I0 (instanceRef un8_ciin_5)) )) - (net N_143_1 (joined - (portRef O (instanceRef clk_cpu_est_11_i_a4_1_2)) - (portRef I0 (instanceRef clk_cpu_est_11_i_a4_2)) + (net N_167_2 (joined + (portRef O (instanceRef un8_ciin_2)) + (portRef I1 (instanceRef un8_ciin_5)) )) - (net N_144_1 (joined - (portRef O (instanceRef clk_cpu_est_11_i_a4_0_1_2)) - (portRef I0 (instanceRef clk_cpu_est_11_i_a4_0_2)) + (net N_167_3 (joined + (portRef O (instanceRef un8_ciin_3)) + (portRef I0 (instanceRef un8_ciin_6)) )) - (net N_106_1 (joined - (portRef O (instanceRef un9_i_a2_1_2)) - (portRef I0 (instanceRef un9_i_a2_2)) + (net N_167_4 (joined + (portRef O (instanceRef un8_ciin_4)) + (portRef I1 (instanceRef un8_ciin_6)) )) - (net N_106_2 (joined - (portRef O (instanceRef un9_i_a2_2_2)) - (portRef I1 (instanceRef un9_i_a2_2)) + (net N_167_5 (joined + (portRef O (instanceRef un8_ciin_5)) + (portRef I0 (instanceRef un8_ciin)) + )) + (net N_167_6 (joined + (portRef O (instanceRef un8_ciin_6)) + (portRef I1 (instanceRef un8_ciin)) + )) + (net N_170_1 (joined + (portRef O (instanceRef un4_ciin_1)) + (portRef I0 (instanceRef un4_ciin)) + )) + (net N_170_2 (joined + (portRef O (instanceRef un4_ciin_2)) + (portRef I1 (instanceRef un4_ciin)) )) (net N_107_1 (joined - (portRef O (instanceRef un9_i_a2_1_1)) - (portRef I0 (instanceRef un9_i_a2_1)) - )) - (net UDS_000_INT_0_sqmuxa_1_1 (joined - (portRef O (instanceRef UDS_000_INT_0_sqmuxa_1_1)) - (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_1_3)) - )) - (net UDS_000_INT_0_sqmuxa_1_2 (joined - (portRef O (instanceRef UDS_000_INT_0_sqmuxa_1_2)) - (portRef I1 (instanceRef UDS_000_INT_0_sqmuxa_1_3)) - )) - (net UDS_000_INT_0_sqmuxa_1_3 (joined - (portRef O (instanceRef UDS_000_INT_0_sqmuxa_1_3)) - (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_1)) - )) - (net UDS_000_INT_0_sqmuxa_1_0 (joined - (portRef O (instanceRef UDS_000_INT_0_sqmuxa_1_0)) - (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa)) - )) - (net UDS_000_INT_0_sqmuxa_2 (joined - (portRef O (instanceRef UDS_000_INT_0_sqmuxa_2)) - (portRef I1 (instanceRef UDS_000_INT_0_sqmuxa)) + (portRef O (instanceRef SM_AMIGA_ns_a2_0_1_5)) + (portRef I0 (instanceRef SM_AMIGA_ns_a2_0_5)) )) (net (rename state_machine_un42_clk_030_1 "state_machine.un42_clk_030_1") (joined (portRef O (instanceRef state_machine_un42_clk_030_1)) @@ -2419,6 +2259,42 @@ (portRef O (instanceRef state_machine_un42_clk_030_5)) (portRef I1 (instanceRef state_machine_un42_clk_030)) )) + (net DTACK_SYNC_1_sqmuxa_1_0 (joined + (portRef O (instanceRef DTACK_SYNC_1_sqmuxa_1_1)) + (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa)) + )) + (net VPA_SYNC_1_sqmuxa_1_1 (joined + (portRef O (instanceRef VPA_SYNC_1_sqmuxa_1_0)) + (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_4)) + )) + (net VPA_SYNC_1_sqmuxa_2 (joined + (portRef O (instanceRef VPA_SYNC_1_sqmuxa_2)) + (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_4)) + )) + (net VPA_SYNC_1_sqmuxa_3 (joined + (portRef O (instanceRef VPA_SYNC_1_sqmuxa_3_0)) + (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa)) + )) + (net VPA_SYNC_1_sqmuxa_4 (joined + (portRef O (instanceRef VPA_SYNC_1_sqmuxa_4)) + (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa)) + )) + (net N_98_1 (joined + (portRef O (instanceRef un1_DSACK_INT_0_sqmuxa_i_a2_1)) + (portRef I0 (instanceRef un1_DSACK_INT_0_sqmuxa_i_a2)) + )) + (net (rename state_machine_AS_030_000_SYNC_3_0_1 "state_machine.AS_030_000_SYNC_3_0_1") (joined + (portRef O (instanceRef state_machine_AS_030_000_SYNC_3_1)) + (portRef I0 (instanceRef state_machine_AS_030_000_SYNC_3)) + )) + (net UDS_000_INT_0_sqmuxa_1_0 (joined + (portRef O (instanceRef UDS_000_INT_0_sqmuxa_1_0)) + (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa)) + )) + (net UDS_000_INT_0_sqmuxa_2 (joined + (portRef O (instanceRef UDS_000_INT_0_sqmuxa_2)) + (portRef I1 (instanceRef UDS_000_INT_0_sqmuxa)) + )) (net (rename state_machine_un13_clk_000_d_1_0 "state_machine.un13_clk_000_d_1_0") (joined (portRef O (instanceRef state_machine_un13_clk_000_d_1_0)) (portRef I0 (instanceRef state_machine_un13_clk_000_d)) @@ -2443,65 +2319,25 @@ (portRef O (instanceRef state_machine_un8_clk_000_d_4)) (portRef I0 (instanceRef state_machine_un8_clk_000_d)) )) - (net DTACK_SYNC_1_sqmuxa_1_0 (joined - (portRef O (instanceRef DTACK_SYNC_1_sqmuxa_1_1)) - (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa)) + (net UDS_000_INT_0_sqmuxa_1_1 (joined + (portRef O (instanceRef UDS_000_INT_0_sqmuxa_1_1)) + (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_1_3)) )) - (net VPA_SYNC_1_sqmuxa_1_1 (joined - (portRef O (instanceRef VPA_SYNC_1_sqmuxa_1_0)) - (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_4)) + (net UDS_000_INT_0_sqmuxa_1_2 (joined + (portRef O (instanceRef UDS_000_INT_0_sqmuxa_1_2)) + (portRef I1 (instanceRef UDS_000_INT_0_sqmuxa_1_3)) )) - (net VPA_SYNC_1_sqmuxa_2 (joined - (portRef O (instanceRef VPA_SYNC_1_sqmuxa_2)) - (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_4)) + (net UDS_000_INT_0_sqmuxa_1_3 (joined + (portRef O (instanceRef UDS_000_INT_0_sqmuxa_1_3)) + (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_1)) )) - (net VPA_SYNC_1_sqmuxa_3 (joined - (portRef O (instanceRef VPA_SYNC_1_sqmuxa_3_0)) - (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa)) + (net N_132_1 (joined + (portRef O (instanceRef clk_cpu_est_11_i_a4_0_1_2)) + (portRef I0 (instanceRef clk_cpu_est_11_i_a4_0_2)) )) - (net VPA_SYNC_1_sqmuxa_4 (joined - (portRef O (instanceRef VPA_SYNC_1_sqmuxa_4)) - (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa)) - )) - (net N_108_1 (joined - (portRef O (instanceRef un9_i_a2_1_0)) - (portRef I0 (instanceRef un9_i_a2_0)) - )) - (net N_118_1 (joined - (portRef O (instanceRef SM_AMIGA_ns_a2_0_1_5)) - (portRef I0 (instanceRef SM_AMIGA_ns_a2_0_5)) - )) - (net N_110_1 (joined - (portRef O (instanceRef un1_DSACK_INT_0_sqmuxa_i_a2_1)) - (portRef I0 (instanceRef un1_DSACK_INT_0_sqmuxa_i_a2)) - )) - (net clk_exp_1 (joined - (portRef O (instanceRef G_101_1)) - (portRef I0 (instanceRef G_101)) - )) - (net (rename SM_AMIGA_D_0_2__un3 "SM_AMIGA_D_0_2_.un3") (joined - (portRef O (instanceRef SM_AMIGA_D_0_2__r)) - (portRef I1 (instanceRef SM_AMIGA_D_0_2__n)) - )) - (net (rename SM_AMIGA_D_0_2__un1 "SM_AMIGA_D_0_2_.un1") (joined - (portRef O (instanceRef SM_AMIGA_D_0_2__m)) - (portRef I0 (instanceRef SM_AMIGA_D_0_2__p)) - )) - (net (rename SM_AMIGA_D_0_2__un0 "SM_AMIGA_D_0_2_.un0") (joined - (portRef O (instanceRef SM_AMIGA_D_0_2__n)) - (portRef I1 (instanceRef SM_AMIGA_D_0_2__p)) - )) - (net (rename DSACK_INT_0_1__un3 "DSACK_INT_0_1_.un3") (joined - (portRef O (instanceRef DSACK_INT_0_1__r)) - (portRef I1 (instanceRef DSACK_INT_0_1__n)) - )) - (net (rename DSACK_INT_0_1__un1 "DSACK_INT_0_1_.un1") (joined - (portRef O (instanceRef DSACK_INT_0_1__m)) - (portRef I0 (instanceRef DSACK_INT_0_1__p)) - )) - (net (rename DSACK_INT_0_1__un0 "DSACK_INT_0_1_.un0") (joined - (portRef O (instanceRef DSACK_INT_0_1__n)) - (portRef I1 (instanceRef DSACK_INT_0_1__p)) + (net N_131_1 (joined + (portRef O (instanceRef clk_cpu_est_11_i_a4_1_2)) + (portRef I0 (instanceRef clk_cpu_est_11_i_a4_2)) )) (net (rename VMA_INT_0_un3 "VMA_INT_0.un3") (joined (portRef O (instanceRef VMA_INT_0_r)) @@ -2515,42 +2351,6 @@ (portRef O (instanceRef VMA_INT_0_n)) (portRef I1 (instanceRef VMA_INT_0_p)) )) - (net (rename VPA_SYNC_0_un3 "VPA_SYNC_0.un3") (joined - (portRef O (instanceRef VPA_SYNC_0_r)) - (portRef I1 (instanceRef VPA_SYNC_0_n)) - )) - (net (rename VPA_SYNC_0_un1 "VPA_SYNC_0.un1") (joined - (portRef O (instanceRef VPA_SYNC_0_m)) - (portRef I0 (instanceRef VPA_SYNC_0_p)) - )) - (net (rename VPA_SYNC_0_un0 "VPA_SYNC_0.un0") (joined - (portRef O (instanceRef VPA_SYNC_0_n)) - (portRef I1 (instanceRef VPA_SYNC_0_p)) - )) - (net (rename AS_000_INT_0_un3 "AS_000_INT_0.un3") (joined - (portRef O (instanceRef AS_000_INT_0_r)) - (portRef I1 (instanceRef AS_000_INT_0_n)) - )) - (net (rename AS_000_INT_0_un1 "AS_000_INT_0.un1") (joined - (portRef O (instanceRef AS_000_INT_0_m)) - (portRef I0 (instanceRef AS_000_INT_0_p)) - )) - (net (rename AS_000_INT_0_un0 "AS_000_INT_0.un0") (joined - (portRef O (instanceRef AS_000_INT_0_n)) - (portRef I1 (instanceRef AS_000_INT_0_p)) - )) - (net (rename DTACK_SYNC_0_un3 "DTACK_SYNC_0.un3") (joined - (portRef O (instanceRef DTACK_SYNC_0_r)) - (portRef I1 (instanceRef DTACK_SYNC_0_n)) - )) - (net (rename DTACK_SYNC_0_un1 "DTACK_SYNC_0.un1") (joined - (portRef O (instanceRef DTACK_SYNC_0_m)) - (portRef I0 (instanceRef DTACK_SYNC_0_p)) - )) - (net (rename DTACK_SYNC_0_un0 "DTACK_SYNC_0.un0") (joined - (portRef O (instanceRef DTACK_SYNC_0_n)) - (portRef I1 (instanceRef DTACK_SYNC_0_p)) - )) (net (rename LDS_000_INT_0_un3 "LDS_000_INT_0.un3") (joined (portRef O (instanceRef LDS_000_INT_0_r)) (portRef I1 (instanceRef LDS_000_INT_0_n)) @@ -2575,29 +2375,41 @@ (portRef O (instanceRef UDS_000_INT_0_n)) (portRef I1 (instanceRef UDS_000_INT_0_p)) )) - (net (rename BG_000_0_un3 "BG_000_0.un3") (joined - (portRef O (instanceRef BG_000_0_r)) - (portRef I1 (instanceRef BG_000_0_n)) + (net (rename cpu_est_0_3__un3 "cpu_est_0_3_.un3") (joined + (portRef O (instanceRef cpu_est_0_3__r)) + (portRef I1 (instanceRef cpu_est_0_3__n)) )) - (net (rename BG_000_0_un1 "BG_000_0.un1") (joined - (portRef O (instanceRef BG_000_0_m)) - (portRef I0 (instanceRef BG_000_0_p)) + (net (rename cpu_est_0_3__un1 "cpu_est_0_3_.un1") (joined + (portRef O (instanceRef cpu_est_0_3__m)) + (portRef I0 (instanceRef cpu_est_0_3__p)) )) - (net (rename BG_000_0_un0 "BG_000_0.un0") (joined - (portRef O (instanceRef BG_000_0_n)) - (portRef I1 (instanceRef BG_000_0_p)) + (net (rename cpu_est_0_3__un0 "cpu_est_0_3_.un0") (joined + (portRef O (instanceRef cpu_est_0_3__n)) + (portRef I1 (instanceRef cpu_est_0_3__p)) )) - (net (rename AS_030_000_SYNC_0_un3 "AS_030_000_SYNC_0.un3") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_r)) - (portRef I1 (instanceRef AS_030_000_SYNC_0_n)) + (net (rename cpu_est_0_2__un3 "cpu_est_0_2_.un3") (joined + (portRef O (instanceRef cpu_est_0_2__r)) + (portRef I1 (instanceRef cpu_est_0_2__n)) )) - (net (rename AS_030_000_SYNC_0_un1 "AS_030_000_SYNC_0.un1") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_m)) - (portRef I0 (instanceRef AS_030_000_SYNC_0_p)) + (net (rename cpu_est_0_2__un1 "cpu_est_0_2_.un1") (joined + (portRef O (instanceRef cpu_est_0_2__m)) + (portRef I0 (instanceRef cpu_est_0_2__p)) )) - (net (rename AS_030_000_SYNC_0_un0 "AS_030_000_SYNC_0.un0") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_n)) - (portRef I1 (instanceRef AS_030_000_SYNC_0_p)) + (net (rename cpu_est_0_2__un0 "cpu_est_0_2_.un0") (joined + (portRef O (instanceRef cpu_est_0_2__n)) + (portRef I1 (instanceRef cpu_est_0_2__p)) + )) + (net (rename cpu_est_0_1__un3 "cpu_est_0_1_.un3") (joined + (portRef O (instanceRef cpu_est_0_1__r)) + (portRef I1 (instanceRef cpu_est_0_1__n)) + )) + (net (rename cpu_est_0_1__un1 "cpu_est_0_1_.un1") (joined + (portRef O (instanceRef cpu_est_0_1__m)) + (portRef I0 (instanceRef cpu_est_0_1__p)) + )) + (net (rename cpu_est_0_1__un0 "cpu_est_0_1_.un0") (joined + (portRef O (instanceRef cpu_est_0_1__n)) + (portRef I1 (instanceRef cpu_est_0_1__p)) )) (net (rename FPU_CS_INT_0_un3 "FPU_CS_INT_0.un3") (joined (portRef O (instanceRef FPU_CS_INT_0_r)) @@ -2611,6 +2423,42 @@ (portRef O (instanceRef FPU_CS_INT_0_n)) (portRef I1 (instanceRef FPU_CS_INT_0_p)) )) + (net (rename AS_000_INT_0_un3 "AS_000_INT_0.un3") (joined + (portRef O (instanceRef AS_000_INT_0_r)) + (portRef I1 (instanceRef AS_000_INT_0_n)) + )) + (net (rename AS_000_INT_0_un1 "AS_000_INT_0.un1") (joined + (portRef O (instanceRef AS_000_INT_0_m)) + (portRef I0 (instanceRef AS_000_INT_0_p)) + )) + (net (rename AS_000_INT_0_un0 "AS_000_INT_0.un0") (joined + (portRef O (instanceRef AS_000_INT_0_n)) + (portRef I1 (instanceRef AS_000_INT_0_p)) + )) + (net (rename VPA_SYNC_0_un3 "VPA_SYNC_0.un3") (joined + (portRef O (instanceRef VPA_SYNC_0_r)) + (portRef I1 (instanceRef VPA_SYNC_0_n)) + )) + (net (rename VPA_SYNC_0_un1 "VPA_SYNC_0.un1") (joined + (portRef O (instanceRef VPA_SYNC_0_m)) + (portRef I0 (instanceRef VPA_SYNC_0_p)) + )) + (net (rename VPA_SYNC_0_un0 "VPA_SYNC_0.un0") (joined + (portRef O (instanceRef VPA_SYNC_0_n)) + (portRef I1 (instanceRef VPA_SYNC_0_p)) + )) + (net (rename AS_030_000_SYNC_0_un3 "AS_030_000_SYNC_0.un3") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_r)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_n)) + )) + (net (rename AS_030_000_SYNC_0_un1 "AS_030_000_SYNC_0.un1") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_m)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_p)) + )) + (net (rename AS_030_000_SYNC_0_un0 "AS_030_000_SYNC_0.un0") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_n)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_p)) + )) (net (rename IPL_030_0_2__un3 "IPL_030_0_2_.un3") (joined (portRef O (instanceRef IPL_030_0_2__r)) (portRef I1 (instanceRef IPL_030_0_2__n)) @@ -2659,65 +2507,41 @@ (portRef O (instanceRef BGACK_030_INT_0_n)) (portRef I1 (instanceRef BGACK_030_INT_0_p)) )) - (net (rename SM_AMIGA_D_0_0__un3 "SM_AMIGA_D_0_0_.un3") (joined - (portRef O (instanceRef SM_AMIGA_D_0_0__r)) - (portRef I1 (instanceRef SM_AMIGA_D_0_0__n)) + (net (rename DSACK_INT_0_1__un3 "DSACK_INT_0_1_.un3") (joined + (portRef O (instanceRef DSACK_INT_0_1__r)) + (portRef I1 (instanceRef DSACK_INT_0_1__n)) )) - (net (rename SM_AMIGA_D_0_0__un1 "SM_AMIGA_D_0_0_.un1") (joined - (portRef O (instanceRef SM_AMIGA_D_0_0__m)) - (portRef I0 (instanceRef SM_AMIGA_D_0_0__p)) + (net (rename DSACK_INT_0_1__un1 "DSACK_INT_0_1_.un1") (joined + (portRef O (instanceRef DSACK_INT_0_1__m)) + (portRef I0 (instanceRef DSACK_INT_0_1__p)) )) - (net (rename SM_AMIGA_D_0_0__un0 "SM_AMIGA_D_0_0_.un0") (joined - (portRef O (instanceRef SM_AMIGA_D_0_0__n)) - (portRef I1 (instanceRef SM_AMIGA_D_0_0__p)) + (net (rename DSACK_INT_0_1__un0 "DSACK_INT_0_1_.un0") (joined + (portRef O (instanceRef DSACK_INT_0_1__n)) + (portRef I1 (instanceRef DSACK_INT_0_1__p)) )) - (net (rename SM_AMIGA_D_0_1__un3 "SM_AMIGA_D_0_1_.un3") (joined - (portRef O (instanceRef SM_AMIGA_D_0_1__r)) - (portRef I1 (instanceRef SM_AMIGA_D_0_1__n)) + (net (rename BG_000_0_un3 "BG_000_0.un3") (joined + (portRef O (instanceRef BG_000_0_r)) + (portRef I1 (instanceRef BG_000_0_n)) )) - (net (rename SM_AMIGA_D_0_1__un1 "SM_AMIGA_D_0_1_.un1") (joined - (portRef O (instanceRef SM_AMIGA_D_0_1__m)) - (portRef I0 (instanceRef SM_AMIGA_D_0_1__p)) + (net (rename BG_000_0_un1 "BG_000_0.un1") (joined + (portRef O (instanceRef BG_000_0_m)) + (portRef I0 (instanceRef BG_000_0_p)) )) - (net (rename SM_AMIGA_D_0_1__un0 "SM_AMIGA_D_0_1_.un0") (joined - (portRef O (instanceRef SM_AMIGA_D_0_1__n)) - (portRef I1 (instanceRef SM_AMIGA_D_0_1__p)) + (net (rename BG_000_0_un0 "BG_000_0.un0") (joined + (portRef O (instanceRef BG_000_0_n)) + (portRef I1 (instanceRef BG_000_0_p)) )) - (net (rename cpu_est_0_1__un3 "cpu_est_0_1_.un3") (joined - (portRef O (instanceRef cpu_est_0_1__r)) - (portRef I1 (instanceRef cpu_est_0_1__n)) + (net (rename DTACK_SYNC_0_un3 "DTACK_SYNC_0.un3") (joined + (portRef O (instanceRef DTACK_SYNC_0_r)) + (portRef I1 (instanceRef DTACK_SYNC_0_n)) )) - (net (rename cpu_est_0_1__un1 "cpu_est_0_1_.un1") (joined - (portRef O (instanceRef cpu_est_0_1__m)) - (portRef I0 (instanceRef cpu_est_0_1__p)) + (net (rename DTACK_SYNC_0_un1 "DTACK_SYNC_0.un1") (joined + (portRef O (instanceRef DTACK_SYNC_0_m)) + (portRef I0 (instanceRef DTACK_SYNC_0_p)) )) - (net (rename cpu_est_0_1__un0 "cpu_est_0_1_.un0") (joined - (portRef O (instanceRef cpu_est_0_1__n)) - (portRef I1 (instanceRef cpu_est_0_1__p)) - )) - (net (rename cpu_est_0_2__un3 "cpu_est_0_2_.un3") (joined - (portRef O (instanceRef cpu_est_0_2__r)) - (portRef I1 (instanceRef cpu_est_0_2__n)) - )) - (net (rename cpu_est_0_2__un1 "cpu_est_0_2_.un1") (joined - (portRef O (instanceRef cpu_est_0_2__m)) - (portRef I0 (instanceRef cpu_est_0_2__p)) - )) - (net (rename cpu_est_0_2__un0 "cpu_est_0_2_.un0") (joined - (portRef O (instanceRef cpu_est_0_2__n)) - (portRef I1 (instanceRef cpu_est_0_2__p)) - )) - (net (rename cpu_est_0_3__un3 "cpu_est_0_3_.un3") (joined - (portRef O (instanceRef cpu_est_0_3__r)) - (portRef I1 (instanceRef cpu_est_0_3__n)) - )) - (net (rename cpu_est_0_3__un1 "cpu_est_0_3_.un1") (joined - (portRef O (instanceRef cpu_est_0_3__m)) - (portRef I0 (instanceRef cpu_est_0_3__p)) - )) - (net (rename cpu_est_0_3__un0 "cpu_est_0_3_.un0") (joined - (portRef O (instanceRef cpu_est_0_3__n)) - (portRef I1 (instanceRef cpu_est_0_3__p)) + (net (rename DTACK_SYNC_0_un0 "DTACK_SYNC_0.un0") (joined + (portRef O (instanceRef DTACK_SYNC_0_n)) + (portRef I1 (instanceRef DTACK_SYNC_0_p)) )) ) (property orig_inst_of (string "BUS68030")) diff --git a/Logic/BUS68030.prj b/Logic/BUS68030.prj index 9c21018..cb00d13 100644 --- a/Logic/BUS68030.prj +++ b/Logic/BUS68030.prj @@ -1,6 +1,6 @@ #-- Lattice Semiconductor Corporation Ltd. #-- Synplify OEM project file c:/users/matze/documents/github/68030tk/logic\BUS68030.prj -#-- Written on Thu May 15 22:17:20 2014 +#-- Written on Thu May 15 22:21:47 2014 #device options diff --git a/Logic/BUS68030.srm b/Logic/BUS68030.srm index 96b6227..a2f3fb9 100644 --- a/Logic/BUS68030.srm +++ b/Logic/BUS68030.srm @@ -33,9 +33,9 @@ af .is_vhdl 1; af .child_list "-1"; af .parent_list "-1"; VNAME 'mach.MACH_DFF.prim'; # view id 0 -VNAME 'mach.DFFRH.prim'; # view id 1 +VNAME 'mach.DFF.prim'; # view id 1 VNAME 'mach.DFFSH.prim'; # view id 2 -VNAME 'mach.DFF.prim'; # view id 3 +VNAME 'mach.DFFRH.prim'; # view id 3 VNAME 'mach.IBUF.prim'; # view id 4 VNAME 'mach.BUFTH.prim'; # view id 5 VNAME 'mach.OBUF.prim'; # view id 6 @@ -65,6 +65,42 @@ bfjj:RPHMR4kMR4kMR );bjRf:0jRsRkC0CskRBeB;R bfjj:RDVN#VCRNCD#R7th;R bfjj:RV8VsT#RR7TRRiBpR4kMRjkM;R +MROlNEwR7wsRbH +l;N3PRHs#bH4lR;R +FTMRkjH; +R +7;HpRBio; +MMRkjN; +M#R3N_PCM_C0VoDN#.4R6 +n;sjRf:ljRNROEv]qB_w7wRHbslhRQ1Sc +TM=kj7 +S=S7 +B=piB +piSe)=BSB +1B=eBh +SmwaQQ= )t;h7 +fbRjR:j0CskRk0sCBReBb; +R:fjjNRVDR#CV#NDChRt7M; +RNRlO7ERw]w1RHbslN; +PHR3#Hbsl;R4 +TFRRjkM;R +H7H; +RiBp;R +H1o; +MMRkjN; +M#R3N_PCM_C0VoDN#.4R6 +n;okMRM +4;N3MR#CNP_0MC_NVDoR#4.;6n +fsRjR:jlENORBvq]w_7wsRbHQlRh +16SkT=MSj +7 +=7SiBp=iBp +=S)e +BBSk1=MS4 +hQmaw)Q =7th;R +bfjj:RPHMR4kMR4kMR +1;bjRf:0jRsRkC0CskRBeB;R +bfjj:RDVN#VCRNCD#R7th;R MROlNEwR7wR)]blsH;P NR#3HblsHR 4;FRRTk;Mj @@ -85,42 +121,6 @@ SmwaQQ= )t;h7 fbRjR:jHRMPkRM4kRM4)b; R:fjjsR0k0CRsRkCe;BB fbRjR:jV#NDCNRVDR#Ct;h7 -RMRlENORw7w1b]Rs;Hl -RNP3bH#sRHl4F; -RkTRM -j;H;R7 -BHRp -i;H;R1 -RoMk;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR4kM;M -NRN3#PMC_CV0_D#No46R.ns; -R:fjjNRlOvERq_B]7RwwblsHR1Qh6T -S=jkM -=S77B -SpBi=pSi -)B=eB1 -S=4kM -mShaQQw t)=h -7;bjRf:HjRMkPRMk4RM14R;R -bfjj:Rk0sCsR0keCRB -B;bjRf:VjRNCD#RDVN#tCRh -7;MlRRNROE7RwwblsH;P -NR#3HblsHR -4;FRRTk;Mj -7HR;R -HB;pi -RoMk;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;R -sfjj:ROlNEqRvB7]_wbwRsRHlQch1 -=STk -MjS77= -pSBip=Bi) -S=BeB -=S1e -BBSahmQ wQ)h=t7b; -R:fjjsR0k0CRsRkCe;BB -fbRjR:jV#NDCNRVDR#Ct;h7 RMRlENORzQAwsRbH l;N3PRHs#bH4lR;R FmH; @@ -368,37 +368,9 @@ M_Rh. n;N3MR#CNP_0MC_NVDoR#4.;6n RoMh(_.;M NRN3#PMC_CV0_D#No46R.no; -M_Rh. -U;N3MR#CNP_0MC_NVDoR#4.;6n -RoMhg_.;M -NRN3#PMC_CV0_D#No46R.no; -M_Rhd -j;N3MR#CNP_0MC_NVDoR#4.;6n -RoMhj_4nN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_(4j;M -NRN3#PMC_CV0_D#No46R.no; -M_Rh4;n. +M_Rh4;n( RNM3P#NCC_M0D_VN4o#Rn.6;M -oR4h_n -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMhn_4cN; -M#R3N_PCM_C0VoDN#.4R6 -n;ohMR_n4U;M -NRN3#PMC_CV0_D#No46R.no; -M_Rh4;Ug -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_1vqtvQq__7j__.3dkM;M -NRN3#PMC_CV0_D#No46R.no; -MvR1_Qqvt7q__.j__M3k4N; -M#R3N_PCM_C0VoDN#.4R6 -n;o1MRvv_qQ_tq7__j.k_3M -j;N3MR#CNP_0MC_NVDoR#4.;6n -RoM7B1qih_Qa__j4k_3M -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoM7B1qih_Qa__j4k_3M -4;N3MR#CNP_0MC_NVDoR#4.;6n -RoM7B1qih_Qa__j4k_3M +oR4h_( j;N3MR#CNP_0MC_NVDoR#4.;6n RoMe_vqQ_hajM3kdN; M#R3N_PCM_C0VoDN#.4R6 @@ -406,24 +378,6 @@ n;oeMRvQq_hja_34kM;M NRN3#PMC_CV0_D#No46R.no; MvReqh_Qa3_jk;Mj RNM3P#NCC_M0D_VN4o#Rn.6;M -oRqeu_h1YB3_jk;Md -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRqeu_h1YB3_jk;M4 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRqeu_h1YB3_jk;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_q1j_jjQ_hajM3kdN; -M#R3N_PCM_C0VoDN#.4R6 -n;oqMR1j_jjh_Qa3_jk;M4 -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_q1j_jjQ_hajM3kjN; -M#R3N_PCM_C0VoDN#.4R6 -n;o7MRaiqB_h1YB3_jk;Md -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRq7aB1i_Y_hBjM3k4N; -M#R3N_PCM_C0VoDN#.4R6 -n;o7MRaiqB_h1YB3_jk;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M oR1p7_jjj_aQh_kj3M d;N3MR#CNP_0MC_NVDoR#4.;6n RoMp_71j_jjQ_hajM3k4N; @@ -436,65 +390,11 @@ oR1z7_jjj_aQh_kj3M 4;N3MR#CNP_0MC_NVDoR#4.;6n RoMz_71j_jjQ_hajM3kjN; M#R3N_PCM_C0VoDN#.4R6 -n;oAMRtj_jj3_jk;Md +n;oOMRbCk_#j0__3d_k;Md RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_Atj_jjjM3k4N; +oRkOb_0C#_dj__M3k4N; M#R3N_PCM_C0VoDN#.4R6 -n;oAMRtj_jj3_jk;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_q1j_djj_jj1BYh_kj3M -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMqj1_djj_j1j_Y_hBjM3k4N; -M#R3N_PCM_C0VoDN#.4R6 -n;oqMR1d_jjj_jjY_1hjB_3jkM;M -NRN3#PMC_CV0_D#No46R.no; -MuRwz1_B_aQh_kj3M -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMw_uzBQ1_hja_34kM;M -NRN3#PMC_CV0_D#No46R.no; -MuRwz1_B_aQh_kj3M -j;N3MR#CNP_0MC_NVDoR#4.;6n -RoMQ_upj_djj__.3dkM;M -NRN3#PMC_CV0_D#No46R.no; -MuRQpd_jj__j.k_3M -4;N3MR#CNP_0MC_NVDoR#4.;6n -RoMQ_upj_djj__.3jkM;M -NRN3#PMC_CV0_D#No46R.no; -MuRQpd_jj__j4k_3M -d;N3MR#CNP_0MC_NVDoR#4.;6n -RoMQ_upj_djj__434kM;M -NRN3#PMC_CV0_D#No46R.no; -MuRQpd_jj__j4k_3M -j;N3MR#CNP_0MC_NVDoR#4.;6n -RoMQ_upj_djj__j3dkM;M -NRN3#PMC_CV0_D#No46R.no; -MuRQpd_jj__jjk_3M -4;N3MR#CNP_0MC_NVDoR#4.;6n -RoMQ_upj_djj__j3jkM;M -NRN3#PMC_CV0_D#No46R.no; -MtRAq_Bij_djQ_hajM3kdN; -M#R3N_PCM_C0VoDN#.4R6 -n;oAMRtiqB_jjd_aQh_kj3M -4;N3MR#CNP_0MC_NVDoR#4.;6n -RoMABtqid_jjh_Qa3_jk;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_1vqtvQq__7j__j3dkM;M -NRN3#PMC_CV0_D#No46R.no; -MvR1_Qqvt7q__jj__M3k4N; -M#R3N_PCM_C0VoDN#.4R6 -n;o1MRvv_qQ_tq7__jjk_3M -j;N3MR#CNP_0MC_NVDoR#4.;6n -RoM1qv_vqQt_j7__34_k;Md -RNM3P#NCC_M0D_VN4o#Rn.6;M -oR_1vqtvQq__7j__434kM;M -NRN3#PMC_CV0_D#No46R.no; -MvR1_Qqvt7q__4j__M3kjN; -M#R3N_PCM_C0VoDN#.4R6 -n;oOMRbCk_#j0__34_k;Md -RNM3P#NCC_M0D_VN4o#Rn.6;M -oRkOb_0C#_4j__M3k4N; -M#R3N_PCM_C0VoDN#.4R6 -n;oOMRbCk_#j0__34_k;Mj +n;oOMRbCk_#j0__3d_k;Mj RNM3P#NCC_M0D_VN4o#Rn.6;M oRkOb_0C#_.j__M3kdN; M#R3N_PCM_C0VoDN#.4R6 @@ -502,169 +402,130 @@ n;oOMRbCk_#j0__3._k;M4 RNM3P#NCC_M0D_VN4o#Rn.6;M oRkOb_0C#_.j__M3kjN; M#R3N_PCM_C0VoDN#.4R6 -n;oOMRbCk_#j0__3d_k;Md +n;oOMRbCk_#j0__34_k;Md RNM3P#NCC_M0D_VN4o#Rn.6;M -oRkOb_0C#_dj__M3k4N; +oRkOb_0C#_4j__M3k4N; M#R3N_PCM_C0VoDN#.4R6 -n;oOMRbCk_#j0__3d_k;Mj -RNM3P#NCC_M0D_VN4o#Rn.6;R -b@:@44::44+:.40.:sRkCfjj:Rk0sCsR0keCRB -B;b@R@4::44::4..+4:DVN#fCRjR:jV#NDCNRVDR#Ct;h7 -@bR@.U:..j::j..:4d+.v:1_Qqvtjqr:R(9fjj:RFoE#10Rvv_qQrtqj9:(R.h_d_,h.hc,_,.6hn_.,.h_(_,h.hU,_,.ghj_d;H -NR03sD0C_F;R4 -RNH#_$MV_#lH"8R(j...j..4 -";N3HRs_0DFosHMCNlRv"1_Qqvt;q" -RNH3lV#_FVslR#0"_1vqtvQq"Rd;H -NR#3VlF_0#"0R1qv_vqQtR;U" -RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" -RNH3lV#_HFsolMNC1R"vv_qQ"tq;H -NR#3Vl0_#Ns0CC4oR;H -NR03#N_0ClbNbHRMo"RRRjjjjj4jjRR->jjjjj4jj\RMRRjjjj4jjj>R-Rjjjj4jjjR\MRjRjj4jjj-jR>jRjj4jjjMj\RjRRj4jjjRjj-j>Rj4jjj\jjMRRRj4jjjjjjRR->j4jjjjjj\RMRR4jjjjjjj>R-R4jjjjjjjR\MR4Rjjjjjj-jR>4RjjjjjjMj\R4RRjjjjjRjj-4>Rjjjjj\jjM -";s@R@U6:.d6:.:d.6:+c.41.:vv_qQrtqj9:(R:fjjNRlO7ERw]w)RHbslvR1_Qqvtnqr9T -S=_1vqtvQq9rn -=S7hn_U_SH -B=piB_pimQ1Z_SO -)1=)a;_H -RNH3Ds0CF_0R -4;N#HR$VM_#Hl_8(R"...j.4.j"N; -HsR30FD_sMHoNRlC"_1vqtvQq -";N3HRV_#lVlsF#"0R1qv_vqQtR;d" -RNH3lV#_#0F01R"vv_qQRtqU -";N3HRV_#l0DNLCR#0"jjjRj4jjjjjjjsj44Rjjjjjjjjs4jjRjj4jjsjjjR44j4jjjjjjsj4jRjjjjj4jjjs44jRjj4jjj4js4jjRjjjjjs4j4R44jjjjj4jjs -";N3HRV_#lFosHMCNlRv"1_Qqvt;q" -RNH3lV#_N#00CCso;R4 -RNH3HFso#HM0lMNC1R'vv_qQrtqj9:('s; -RU@@:6dd:dc:d.6:j.+4:_1vqtvQq:rj(f9RjR:jlENORw7w)b]RsRHl1qv_vqQtr -69S1T=vv_qQrtq6S9 -7v=1_QqvtMq_#9r. -pSBip=Bi1_mZOQ_ -=S))_1aHN; -HsR30_DC04FR;H -NRM#$_lV#_RH8".(.j...j;4" -RNH3Ds0_HFsolMNC1R"vv_qQ"tq;H -NR#3Vls_VF0l#Rv"1_QqvtdqR"N; -HVR3#0l_FR#0"_1vqtvQq"RU;H -NR#3VlN_0L#DC0jR"j4jRjjjjjsjjjRj4jj4jjjjjsjj4R4jjjjjjj4sj4jRjjj4jj4jsjjjRj4jjjsjj4Rj4jjjjjj4jsj44Rjjjj4jjj4s44jRjjjjjj"4s;H -NR#3Vls_FHNoMl"CR1qv_vqQt"N; -HVR3##l_0CN0sRCo4N; -HFR3sHHoMM#0NRlC'_1vqtvQq:rj(;9' -@sR@dU:dcg::gdd:+.j41.:vv_qQrtqj9:(R:fjjNRlO7ERw]w)RHbslvR1_Qqvtcqr9T -S=_1vqtvQq9rc -=S7hg_U_SH -B=piB_pimQ1Z_SO -)1=)a;_H -RNH3Ds0CF_0R -4;N#HR$VM_#Hl_8(R"...j.4.j"N; -HsR30FD_sMHoNRlC"_1vqtvQq -";N3HRV_#lVlsF#"0R1qv_vqQtR;d" -RNH3lV#_#0F01R"vv_qQRtqU -";N3HRV_#l0DNLCR#0"jjjRj4jjjjjjjsj44Rjjjjjjjjs4jjRjj4jjsjjjR44j4jjjjjjsj4jRjjjjj4jjjs44jRjj4jjj4js4jjRjjjjjs4j4R44jjjjj4jjs -";N3HRV_#lFosHMCNlRv"1_Qqvt;q" -RNH3lV#_N#00CCso;R4 -RNH3HFso#HM0lMNC1R'vv_qQrtqj9:('s; -RU@@:6d6:dc:6.6:c.+4:_1vqtvQq:rj(f9RjR:jlENORw7w)b]RsRHl1qv_vqQtr -d9S1T=vv_qQrtqdS9 -7_=hgH4_ -pSBip=Bi1_mZOQ_ -=S))_1aHN; -HsR30_DC04FR;H -NRM#$_lV#_RH8".(.j...j;4" -RNH3Ds0_HFsolMNC1R"vv_qQ"tq;H -NR#3Vls_VF0l#Rv"1_QqvtdqR"N; -HVR3#0l_FR#0"_1vqtvQq"RU;H -NR#3VlN_0L#DC0jR"j4jRjjjjjsjjjRj4jj4jjjjjsjj4R4jjjjjjj4sj4jRjjj4jj4jsjjjRj4jjjsjj4Rj4jjjjjj4jsj44Rjjjj4jjj4s44jRjjjjjj"4s;H -NR#3Vls_FHNoMl"CR1qv_vqQt"N; -HVR3##l_0CN0sRCo4N; -HFR3sHHoMM#0NRlC'_1vqtvQq:rj(;9' -@sR@dU:(cj::jd(:+..41.:vv_qQrtqj9:(R:fjjNRlO7ERw]w)RHbslvR1_Qqvt.qr9T -S=_1vqtvQq9r. -=S71qv_vqQt_rM#6S9 -B=piB_pimQ1Z_SO -)1=)a;_H -RNH3Ds0CF_0R -4;N#HR$VM_#Hl_8(R"...j.4.j"N; -HsR30FD_sMHoNRlC"_1vqtvQq -";N3HRV_#lVlsF#"0R1qv_vqQtR;d" -RNH3lV#_#0F01R"vv_qQRtqU -";N3HRV_#l0DNLCR#0"jjjRj4jjjjjjjsj44Rjjjjjjjjs4jjRjj4jjsjjjR44j4jjjjjjsj4jRjjjjj4jjjs44jRjj4jjj4js4jjRjjjjjs4j4R44jjjjj4jjs -";N3HRV_#lFosHMCNlRv"1_Qqvt;q" -RNH3lV#_N#00CCso;R4 -RNH3HFso#HM0lMNC1R'vv_qQrtqj9:('s; -RU@@:cd(:dc:(.c:d.+4:_1vqtvQq:rj(f9RjR:jlENORw7w)b]RsRHl1qv_vqQtr -49S1T=vv_qQrtq4S9 -7_=hgHc_ -pSBip=Bi1_mZOQ_ -=S))_1aHN; -HsR30_DC04FR;H -NRM#$_lV#_RH8".(.j...j;4" -RNH3Ds0_HFsolMNC1R"vv_qQ"tq;H -NR#3Vls_VF0l#Rv"1_QqvtdqR"N; -HVR3#0l_FR#0"_1vqtvQq"RU;H -NR#3VlN_0L#DC0jR"j4jRjjjjjsjjjRj4jj4jjjjjsjj4R4jjjjjjj4sj4jRjjj4jj4jsjjjRj4jjjsjj4Rj4jjjjjj4jsj44Rjjjj4jjj4s44jRjjjjjj"4s;H -NR#3Vls_FHNoMl"CR1qv_vqQt"N; -HVR3##l_0CN0sRCo4N; -HFR3sHHoMM#0NRlC'_1vqtvQq:rj(;9' -@sR@dU:Ucj::jdU:+..41.:vv_qQrtqj9:(R:fjjNRlO7ERw]w)RHbslvR1_Qqvtjqr9T -S=_1vqtvQq9rj -=S71qv_vqQt_rM#(S9 -B=piB_pimQ1Z_SO -)1=)a;_H -RNH3Ds0CF_0R -4;N#HR$VM_#Hl_8(R"...j.4.j"N; -HsR30FD_sMHoNRlC"_1vqtvQq -";N3HRV_#lVlsF#"0R1qv_vqQtR;d" -RNH3lV#_#0F01R"vv_qQRtqU -";N3HRV_#l0DNLCR#0"jjjRj4jjjjjjjsj44Rjjjjjjjjs4jjRjj4jjsjjjR44j4jjjjjjsj4jRjjjjj4jjjs44jRjj4jjj4js4jjRjjjjjs4j4R44jjjjj4jjs -";N3HRV_#lFosHMCNlRv"1_Qqvt;q" -RNH3lV#_N#00CCso;R4 -RNH3HFso#HM0lMNC1R'vv_qQrtqj9:('s; -RU@@:j4j::.g4:jjd44+.u:Qpd_jj:r.jf9RjR:jlENORw7w1b]RsRHlQ_upj7djw]w1r -49SQT=ujp_dOj_r -49Sh7=_ -46SiBp=iBp_Zm1Q -_OS)1=1Ha_;H -NR03sDs_FHNoMl"CRQ_upj"dj;H -NRM3kVOsN_8HMC4GR;R -s@:@U4:jj.4g:jdj:4.+4:pQu_jjdrj.:9jRf:ljRNROE71ww]sRbHQlRujp_dwj7wr1].S9 -Tu=Qpd_jjr_O.S9 -7_=h4Sn +n;oOMRbCk_#j0__34_k;Mj +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRzwu__B1Q_hajM3kdN; +M#R3N_PCM_C0VoDN#.4R6 +n;owMRuBz_1h_Qa3_jk;M4 +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRzwu__B1Q_hajM3kjN; +M#R3N_PCM_C0VoDN#.4R6 +n;oqMR1j_jjh_Qa3_jk;Md +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR_q1j_jjQ_hajM3k4N; +M#R3N_PCM_C0VoDN#.4R6 +n;oqMR1j_jjh_Qa3_jk;Mj +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRqeu_h1YB3_jk;Md +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRqeu_h1YB3_jk;M4 +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRqeu_h1YB3_jk;Mj +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR_q1j_djj_jj1BYh_kj3M +d;N3MR#CNP_0MC_NVDoR#4.;6n +RoMqj1_djj_j1j_Y_hBjM3k4N; +M#R3N_PCM_C0VoDN#.4R6 +n;oqMR1d_jjj_jjY_1hjB_3jkM;M +NRN3#PMC_CV0_D#No46R.no; +MuRQpd_jj__j.k_3M +d;N3MR#CNP_0MC_NVDoR#4.;6n +RoMQ_upj_djj__.34kM;M +NRN3#PMC_CV0_D#No46R.no; +MuRQpd_jj__j.k_3M +j;N3MR#CNP_0MC_NVDoR#4.;6n +RoMQ_upj_djj__43dkM;M +NRN3#PMC_CV0_D#No46R.no; +MuRQpd_jj__j4k_3M +4;N3MR#CNP_0MC_NVDoR#4.;6n +RoMQ_upj_djj__43jkM;M +NRN3#PMC_CV0_D#No46R.no; +MuRQpd_jj__jjk_3M +d;N3MR#CNP_0MC_NVDoR#4.;6n +RoMQ_upj_djj__j34kM;M +NRN3#PMC_CV0_D#No46R.no; +MuRQpd_jj__jjk_3M +j;N3MR#CNP_0MC_NVDoR#4.;6n +RoMABtqid_jjh_Qa3_jk;Md +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRqAtBji_dQj_hja_34kM;M +NRN3#PMC_CV0_D#No46R.no; +MtRAq_Bij_djQ_hajM3kjN; +M#R3N_PCM_C0VoDN#.4R6 +n;o7MR1iqB_aQh_4j__M3kdN; +M#R3N_PCM_C0VoDN#.4R6 +n;o7MR1iqB_aQh_4j__M3k4N; +M#R3N_PCM_C0VoDN#.4R6 +n;o7MR1iqB_aQh_4j__M3kjN; +M#R3N_PCM_C0VoDN#.4R6 +n;oAMRtj_jj3_jk;Md +RNM3P#NCC_M0D_VN4o#Rn.6;M +oR_Atj_jjjM3k4N; +M#R3N_PCM_C0VoDN#.4R6 +n;oAMRtj_jj3_jk;Mj +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRq7aB1i_Y_hBjM3kdN; +M#R3N_PCM_C0VoDN#.4R6 +n;o7MRaiqB_h1YB3_jk;M4 +RNM3P#NCC_M0D_VN4o#Rn.6;M +oRq7aB1i_Y_hBjM3kjN; +M#R3N_PCM_C0VoDN#.4R6 +n;b@R@4::44::4..+4:k0sCjRf:0jRsRkC0CskRBeB;R +b@:@44::44+:.4V.:NCD#R:fjjNRVDR#CV#NDChRt7b; +RU@@:j..:..:.dj:+:4.1qv_vqQtr(j:9jRf:ojRE0F#R_1vqtvQq:rj(h9R_,.jh4_.,.h_._,h.hd,_,.ch6_.,.h_n_,h. +(;N3HRsC0D_R0F4N; +H$R#M#_Vl8_HR."(..j.."j4;H +NR03sDs_FHNoMl"CR1qv_vqQt"N; +HVR3#Vl_s#Fl01R"vv_qQRtqd +";N3HRV_#l00F#Rv"1_QqvtUqR"N; +HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; +HVR3#Fl_sMHoNRlC"_1vqtvQq +";N3HRV_#l#00NCosCR +4;N3HR#00NCN_lbMbHoRR"RjRjjjjjj-4R>jRjjjjjjM4\RjRRjjjjjR4j-j>Rjjjjj\4jMRRRjjjjjj4jRR->jjjjjj4j\RMRRjjjjj4jj>R-Rjjjjj4jjR\MRjRjjj4jj-jR>jRjjj4jjMj\RjRRjj4jjRjj-j>Rjj4jj\jjMRRRjj4jjjjjRR->jj4jjjjj\RMRRj4jjjjjj>R-Rj4jjjjjj"\M;R +s@:@U4:4dd4U:4cd:j.+4:kOb_0C#rjd:9jRf:ljRNROE7RwwblsHRkOb_0C#r +d9SOT=bCk_#d0r97 +S=4h_(B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"kOb_0C#"N; +HkR3MNVsOM_H8RCGdN; +H#R3$HM_MPH0N"DRj +";s@R@U6:.d(:c:d.6:+nc41.:vv_qQrtqj9:(R:fjjNRlO7ERw]w1RHbslvR1_Qqvt(qr9T +S=_1vqtvQq9r( +=S7h6_(_SH B=piB_pimQ1Z_SO 11=)a;_H -RNH3Ds0_HFsolMNCQR"ujp_d;j" -RNH3VkMs_NOHCM8G;R. -@sR@4U:4dd:U4:4dj:c+:4.O_bkCr#0d9:jR:fjjNRlO7ERwbwRsRHlO_bkCr#0jS9 -Tb=Ok#_C09rj -=S7h(_4 -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRO_bkC"#0;H -NRM3kVOsN_8HMCjGR;H -NR$3#MM_HHN0PDjR""s; -RU@@:d44::dU4:4dc4j+.b:Ok#_C0:rdjf9RjR:jlENORw7wRHbslbROk#_C09r4 -=STO_bkCr#04S9 -7_=h4SU -B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRb"Ok#_C0 -";N3HRksMVNHO_MG8CR -4;N3HR#_$MH0MHPRND";j" -@sR@4U:4dd:U4:4dj:c+:4.O_bkCr#0d9:jR:fjjNRlO7ERwbwRsRHlO_bkCr#0.S9 -Tb=Ok#_C09r. -=S7hg_4 -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CRO_bkC"#0;H -NRM3kVOsN_8HMC.GR;H -NR$3#MM_HHN0PDjR""s; -RU@@:d44::dU4:4dc4j+.b:Ok#_C0:rdjf9RjR:jlENORw7wRHbslbROk#_C09rd -=STO_bkCr#0dS9 -7_=h.Sj -B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRb"Ok#_C0 -";N3HRksMVNHO_MG8CR -d;N3HR#_$MH0MHPRND";j" -@sR@.U:6cd:(6:.dc:n+:4.1qv_vqQtr(j:9jRf:ljRNROE71ww]sRbH1lRvv_qQrtq(S9 -Tv=1_Qqvt(qr97 +RNH3Ds0CF_0R +4;N#HR$VM_#Hl_8(R"...j.4.j"N; +HsR30FD_sMHoNRlC"_1vqtvQq +";N3HRV_#lVlsF#"0R1qv_vqQtR;d" +RNH3lV#_#0F01R"vv_qQRtqU +";N3HRV_#l0DNLCR#0"jjjRj4jjjjjjjsj44Rjjjjjjjjs4jjRjj4jjsjjjR44j4jjjjjjsj4jRjjjjj4jjjs44jRjj4jjj4js4jjRjjjjjs4j4R44jjjjj4jjs +";N3HRV_#lFosHMCNlRv"1_Qqvt;q" +RNH3lV#_N#00CCso;R4 +RNH3HFso#HM0lMNC1R'vv_qQrtqj9:('s; +RU@@:d.6::.6.:6dc4.+.v:1_Qqvtjqr:R(9fjj:ROlNEwR7wR)]blsHR_1vqtvQq9rn +=ST1qv_vqQtr +n9Sh7=__((HB +SpBi=pmi_1_ZQO) +S=a)1_ +H;N3HRsC0D_R0F4N; +H$R#M#_Vl8_HR."(..j.."j4;H +NR03sDs_FHNoMl"CR1qv_vqQt"N; +HVR3#Vl_s#Fl01R"vv_qQRtqd +";N3HRV_#l00F#Rv"1_QqvtUqR"N; +HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; +HVR3#Fl_sMHoNRlC"_1vqtvQq +";N3HRV_#l#00NCosCR +4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R +s@:@Ud:d6cd:d6j:.+:4.1qv_vqQtr(j:9jRf:ljRNROE7)ww]sRbH1lRvv_qQrtq6S9 +Tv=1_Qqvt6qr97 S=_1vqtvQq#_Mr -j9SiBp=iBp_Zm1Q -_OS)1=1Ha_;H +.9SiBp=iBp_Zm1Q +_OS))=1Ha_;H NR03sD0C_F;R4 RNH#_$MV_#lH"8R(j...j..4 ";N3HRs_0DFosHMCNlRv"1_Qqvt;q" @@ -674,70 +535,146 @@ RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j RNH3lV#_HFsolMNC1R"vv_qQ"tq;H NR#3Vl0_#Ns0CC4oR;H NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 -';s@R@U4:4dU:d:d44:+cj4O.:bCk_#80_rjd:9jRf:ljRNROE7RwwblsHRkOb_0C#_j8r9T -S=kOb_0C#_j8r97 -S=kOb_0C#r -j9SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCOR"bCk_#80_"N; -HkR3MNVsOM_H8RCGjN; -H#R3$HM_MPH0N"DRj -";s@R@U4:4dU:d:d44:+cj4O.:bCk_#80_rjd:9jRf:ljRNROE7RwwblsHRkOb_0C#_48r9T -S=kOb_0C#_48r97 -S=kOb_0C#r -49SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCOR"bCk_#80_"N; -HkR3MNVsOM_H8RCG4N; -H#R3$HM_MPH0N"DRj -";s@R@U4:4dU:d:d44:+cj4O.:bCk_#80_rjd:9jRf:ljRNROE7RwwblsHRkOb_0C#_.8r9T -S=kOb_0C#_.8r97 -S=kOb_0C#r -.9SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCOR"bCk_#80_"N; -HkR3MNVsOM_H8RCG.N; -H#R3$HM_MPH0N"DRj -";s@R@U4:4dU:d:d44:+cj4O.:bCk_#80_rjd:9jRf:ljRNROE7RwwblsHRkOb_0C#_d8r9T -S=kOb_0C#_d8r97 -S=kOb_0C#r -d9SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCOR"bCk_#80_"N; -HkR3MNVsOM_H8RCGdN; -H#R3$HM_MPH0N"DRj -";s@R@Uj:4jg:.:j4j:+d441.:vv_qQ_tq7:r.jf9RjR:jlENORw7wRHbslvR1_Qqvt7q_r -j9S1T=vv_qQ_tq79rj -=S7h -_USiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNC1R"vv_qQ_tq7 -";N3HRksMVNHO_MG8CR -j;N3HR#_$MH0MHPRND";j" -@sR@4U:j.j:gj:4j4:d+:4.1qv_vqQt_.7r:Rj9fjj:ROlNEwR7wsRbH1lRvv_qQ_tq79r4 -=ST1qv_vqQt_47r97 -S=gh_ -pSBip=Bi1_mZOQ_;H -NR03sDs_FHNoMl"CR1qv_vqQt_;7" +';s@R@Ud:dg::cd:dg.4j+.v:1_Qqvtjqr:R(9fjj:ROlNEwR7wR)]blsHR_1vqtvQq9rc +=ST1qv_vqQtr +c9Sh7=__UjHB +SpBi=pmi_1_ZQO) +S=a)1_ +H;N3HRsC0D_R0F4N; +H$R#M#_Vl8_HR."(..j.."j4;H +NR03sDs_FHNoMl"CR1qv_vqQt"N; +HVR3#Vl_s#Fl01R"vv_qQRtqd +";N3HRV_#l00F#Rv"1_QqvtUqR"N; +HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; +HVR3#Fl_sMHoNRlC"_1vqtvQq +";N3HRV_#l#00NCosCR +4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R +s@:@Ud:66c6:d6c:.+:4.1qv_vqQtr(j:9jRf:ljRNROE7)ww]sRbH1lRvv_qQrtqdS9 +Tv=1_Qqvtdqr97 +S=Uh_. +_HSiBp=iBp_Zm1Q +_OS))=1Ha_;H +NR03sD0C_F;R4 +RNH#_$MV_#lH"8R(j...j..4 +";N3HRs_0DFosHMCNlRv"1_Qqvt;q" +RNH3lV#_FVslR#0"_1vqtvQq"Rd;H +NR#3VlF_0#"0R1qv_vqQtR;U" +RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" +RNH3lV#_HFsolMNC1R"vv_qQ"tq;H +NR#3Vl0_#Ns0CC4oR;H +NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 +';s@R@U(:dj::cd:(j.4.+.v:1_Qqvtjqr:R(9fjj:ROlNEwR7wR)]blsHR_1vqtvQq9r. +=ST1qv_vqQtr +.9S17=vv_qQ_tqM6#r9B +SpBi=pmi_1_ZQO) +S=a)1_ +H;N3HRsC0D_R0F4N; +H$R#M#_Vl8_HR."(..j.."j4;H +NR03sDs_FHNoMl"CR1qv_vqQt"N; +HVR3#Vl_s#Fl01R"vv_qQRtqd +";N3HRV_#l00F#Rv"1_QqvtUqR"N; +HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; +HVR3#Fl_sMHoNRlC"_1vqtvQq +";N3HRV_#l#00NCosCR +4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R +s@:@Ud:(cc(:dcd:.+:4.1qv_vqQtr(j:9jRf:ljRNROE7)ww]sRbH1lRvv_qQrtq4S9 +Tv=1_Qqvt4qr97 +S=Uh_6 +_HSiBp=iBp_Zm1Q +_OS))=1Ha_;H +NR03sD0C_F;R4 +RNH#_$MV_#lH"8R(j...j..4 +";N3HRs_0DFosHMCNlRv"1_Qqvt;q" +RNH3lV#_FVslR#0"_1vqtvQq"Rd;H +NR#3VlF_0#"0R1qv_vqQtR;U" +RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s" +RNH3lV#_HFsolMNC1R"vv_qQ"tq;H +NR#3Vl0_#Ns0CC4oR;H +NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9 +';s@R@UU:dj::cd:Uj.4.+.v:1_Qqvtjqr:R(9fjj:ROlNEwR7wR)]blsHR_1vqtvQq9rj +=ST1qv_vqQtr +j9S17=vv_qQ_tqM(#r9B +SpBi=pmi_1_ZQO) +S=a)1_ +H;N3HRsC0D_R0F4N; +H$R#M#_Vl8_HR."(..j.."j4;H +NR03sDs_FHNoMl"CR1qv_vqQt"N; +HVR3#Vl_s#Fl01R"vv_qQRtqd +";N3HRV_#l00F#Rv"1_QqvtUqR"N; +HVR3#0l_NCLD#"0RjRjj4jjjjjjjs4jjRjj4jjjjj4sjjjRj4jjjjjjs4j4Rjjj4jsjj4Rjjjjjj4jjjs44jRjjjjjj4j4s4jjRjjjjj44js4j4Rjjjjjsj4"N; +HVR3#Fl_sMHoNRlC"_1vqtvQq +";N3HRV_#l#00NCosCR +4;N3HRFosHH0M#MCNlRv'1_Qqvtjqr:'(9;R +s@:@U4:4dd4U:4cd:j.+4:kOb_0C#_d8r:Rj9fjj:ROlNEwR7wsRbHOlRbCk_#80_r +j9SOT=bCk_#80_r +j9SO7=bCk_#j0r9B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"kOb_0C#_;8" +RNH3VkMs_NOHCM8G;Rj +RNH3M#$_HHM0DPNR""j;R +s@:@U4:4dd4U:4cd:j.+4:kOb_0C#_d8r:Rj9fjj:ROlNEwR7wsRbHOlRbCk_#80_r +49SOT=bCk_#80_r +49SO7=bCk_#40r9B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"kOb_0C#_;8" RNH3VkMs_NOHCM8G;R4 RNH3M#$_HHM0DPNR""j;R -s@:@U4:jj.4g:jdj:4.+4:_1vqtvQqr_7.9:jR:fjjNRlO7ERwbwRsRHl1qv_vqQt_.7r9T -S=_1vqtvQqr_7.S9 -7_=h4Sj -B=piB_pimQ1Z_ -O;N3HRs_0DFosHMCNlRv"1_Qqvt7q_"N; -HkR3MNVsOM_H8RCG.N; -H#R3$HM_MPH0N"DRj -";s@R@Uj:4jg:.:j4j:+d44Q.:ujp_d.jr:Rj9fjj:ROlNEwR7wR1]blsHRpQu_jjd71ww]9rj -=STQ_upj_djO9rj -=S7hc_4 +s@:@U4:4dd4U:4cd:j.+4:kOb_0C#_d8r:Rj9fjj:ROlNEwR7wsRbHOlRbCk_#80_r +.9SOT=bCk_#80_r +.9SO7=bCk_#.0r9B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"kOb_0C#_;8" +RNH3VkMs_NOHCM8G;R. +RNH3M#$_HHM0DPNR""j;R +s@:@U4:4dd4U:4cd:j.+4:kOb_0C#_d8r:Rj9fjj:ROlNEwR7wsRbHOlRbCk_#80_r +d9SOT=bCk_#80_r +d9SO7=bCk_#d0r9B +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"kOb_0C#_;8" +RNH3VkMs_NOHCM8G;Rd +RNH3M#$_HHM0DPNR""j;R +s@:@U4:jj.4g:jdj:4.+4:pQu_jjdrj.:9jRf:ljRNROE71ww]sRbHQlRujp_dwj7wr1]jS9 +Tu=Qpd_jjr_OjS9 +7_=h4S4 +B=piB_pimQ1Z_SO +11=)a;_H +RNH3Ds0_HFsolMNCQR"ujp_d;j" +RNH3VkMs_NOHCM8G;Rj +@sR@4U:j.j:gj:4j4:d+:4.Q_upjrdj.9:jR:fjjNRlO7ERw]w1RHbsluRQpd_jjw7w14]r9T +S=pQu_jjd_4Or97 +S=4h_.B +SpBi=pmi_1_ZQO1 +S=a)1_ +H;N3HRs_0DFosHMCNlRu"Qpd_jj +";N3HRksMVNHO_MG8CR +4;s@R@Uj:4jg:.:j4j:+d44Q.:ujp_d.jr:Rj9fjj:ROlNEwR7wR1]blsHRpQu_jjd71ww]9r. +=STQ_upj_djO9r. +=S7hd_4 pSBip=Bi1_mZOQ_ =S1)_1aHN; HsR30FD_sMHoNRlC"pQu_jjd"N; -HkR3MNVsOM_H8RCGjs; -RU@@:j..:..:.dj:+:4.qj1_jQj_hfaRjR:jlENORw7w1b]RsRHlqj1_jQj_hSa -T1=q_jjj_aQh -=S7h -_6SiBp=iBp_Zm1Q -_OS)1=1Ha_;H -NR03sDs_FHNoMl"CRqj1_jQj_h;a" -RNH3M#$_HHM0DPNR""4;H -NRM3H_FDFb;Rj +HkR3MNVsOM_H8RCG.s; +RU@@:d44::dU4:4dc4j+.b:Ok#_C0:rdjf9RjR:jlENORw7wRHbslbROk#_C09rj +=STO_bkCr#0jS9 +7_=h4Sc +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRb"Ok#_C0 +";N3HRksMVNHO_MG8CR +j;N3HR#_$MH0MHPRND";j" +@sR@4U:4dd:U4:4dj:c+:4.O_bkCr#0d9:jR:fjjNRlO7ERwbwRsRHlO_bkCr#04S9 +Tb=Ok#_C09r4 +=S7h6_4 +pSBip=Bi1_mZOQ_;H +NR03sDs_FHNoMl"CRO_bkC"#0;H +NRM3kVOsN_8HMC4GR;H +NR$3#MM_HHN0PDjR""s; +RU@@:d44::dU4:4dc4j+.b:Ok#_C0:rdjf9RjR:jlENORw7wRHbslbROk#_C09r. +=STO_bkCr#0.S9 +7_=h4Sn +B=piB_pimQ1Z_ +O;N3HRs_0DFosHMCNlRb"Ok#_C0 +";N3HRksMVNHO_MG8CR +.;N3HR#_$MH0MHPRND";j" @sR@4U:j.j:gj:4j4:d+:4.e_uq1BYhR:fjjNRlO7ERw]w1RHbsluReqY_1hSB Tu=eqY_1hSB 7_=hnB @@ -754,72 +691,80 @@ H;N3HRs_0DFosHMCNlR1"q_jjd_jjj_h1YB ";N3HR#_$MH0MHPRND";4" @sR@4U:j66:.j:466:6+:4.e_vqQRhafjj:ROlNEwR7wR1]blsHRqev_aQh =STe_vqQ -haSh7=_ -44SiBp=iBp_Zm1Q -_OS)1=1Ha_;H -NR03sDs_FHNoMl"CRe_vqQ"ha;H -NR$3#MM_HHN0PD4R""N; -HHR3MF_DF(bR;R -s@:@U4:jj.4g:jdj:4.+4:_AtjRjjfjj:ROlNEwR7wR1]blsHR_Atj7jjw]w1 -=STAjt_jOj_ -=S7h._4 -pSBip=Bi1_mZOQ_ -=S1)_1aHN; -HsR30FD_sMHoNRlC"_Atj"jj;H -NRM3H_FDFb;Rd -@sR@4U:j.j:gj:4j4:d+:4.7B1qih_Qa9r4R:fjjNRlO7ERw]w1RHbsl1R7q_BiQrha4S9 -T1=7q_BiQrha4S9 -7_=h4Sd +haSh7=_SU B=piB_pimQ1Z_SO 11=)a;_H +RNH3Ds0_HFsolMNCeR"vQq_h;a" RNH3M#$_HHM0DPNR""4;H -NR03sDs_FHNoMl"CR7B1qih_Qa -";s@R@Uj:4jg:.:j4j:+d44A.:tiqB_jjd_aQhR:fjjNRlO7ERw]w1RHbsltRAq_Bij_djQ -haSAT=tiqB_jjd_aQh -=S7h4_. +NRM3H_FDFb;R( +@sR@4U:j.j:gj:4j4:d+:4.Ajt_jfjRjR:jlENORw7w1b]RsRHlAjt_jwj7w +1]SAT=tj_jj +_OSh7=_Sg +B=piB_pimQ1Z_SO +11=)a;_H +RNH3Ds0_HFsolMNCAR"tj_jj +";N3HRHDM_FRFbds; +RU@@:j4j::.g4:jjd44+.1:7q_BiQrha4f9RjR:jlENORw7w1b]RsRHl7B1qih_Qa9r4 +=ST7B1qih_Qa9r4 +=S7hj_4 pSBip=Bi1_mZOQ_ =S1)_1aHN; -HsR30FD_sMHoNRlC"qAtBji_dQj_h;a" -RNH3M#$_HHM0DPNR""4;H -NRM3H_FDFb;Rc -@sR@4U:..c::c4.:4d+.p:Biz_ma)_u jRf:ljRNROE7RwwblsHRiBp_amz_ u) -=STB_pim_zau -) Sh7=_ -..SiBp=iBp_Zm1Q;_O -RNH3Ds0_HFsolMNCBR"pmi_zua_); " -RNH3_HMDbFFR -6;N3HR#_$MH0MHPRND";4" -@sR@gU:4.:d::g4d4c+.7:z1j_jjh_QajRf:ljRNROE71ww]sRbHzlR7j1_jQj_hSa -T7=z1j_jjh_Qa7 -S=4h_ -pSBip=Bi1_mZOQ_ -=S1)_1aHN; -HsR30FD_sMHoNRlC"1z7_jjj_aQh"N; H#R3$HM_MPH0N"DR4 -";N3HRHDM_FRFb4s; -RU@@::g4dg.:4c:d+:4.p_71j_jjQRhafjj:ROlNEwR7wR1]blsHR1p7_jjj_aQh -=STp_71j_jjQ -haSh7=_S. +";N3HRs_0DFosHMCNlR1"7q_BiQ"ha;R +s@:@U4:jj.4g:jdj:4.+4:qAtBji_dQj_hfaRjR:jlENORw7w1b]RsRHlABtqid_jjh_QaT +S=qAtBji_dQj_hSa +7_=h4SU B=piB_pimQ1Z_SO 11=)a;_H -RNH3Ds0_HFsolMNCpR"7j1_jQj_h;a" +RNH3Ds0_HFsolMNCAR"tiqB_jjd_aQh"N; +H#R3$HM_MPH0N"DR4 +";N3HRHDM_FRFbcs; +RU@@:c4.:4.:.dc:+:4.B_pim_zauR) fjj:ROlNEwR7wsRbHBlRpmi_zua_)S +Tp=Biz_ma)_u 7 +S=4h_gB +SpBi=pmi_1_ZQON; +HsR30FD_sMHoNRlC"iBp_amz_ u)"N; +HHR3MF_DF6bR;H +NR$3#MM_HHN0PD4R""s; +RU@@::g4dg.:4c:d+:4.z_71j_jjQRhafjj:ROlNEwR7wR1]blsHR1z7_jjj_aQh +=STz_71j_jjQ +haSh7=_S4 +B=piB_pimQ1Z_SO +11=)a;_H +RNH3Ds0_HFsolMNCzR"7j1_jQj_h;a" RNH3M#$_HHM0DPNR""4;H -NRM3H_FDFb;R. -@sR@4U:j.j:gj:4j4:d+:4.7BaqiY_1hfBRjR:jlENORw7w1b]RsRHl7BaqiY_1hSB -Ta=7q_Bi1BYh -=S7h -_dSiBp=iBp_Zm1Q -_OS)1=1Ha_;H -NR03sDs_FHNoMl"CR7BaqiY_1h;B" -RNH3M#$_HHM0DPNR""4;R -s@:@U4:jj.4g:jdj:4.+4:zwu__B1QRhafjj:ROlNEwR7wR1]blsHRzwu__B1Q -haSwT=uBz_1h_Qa7 -S=ch_ +NRM3H_FDFb;R4 +@sR@gU:4.:d::g4d4c+.7:p1j_jjh_QajRf:ljRNROE71ww]sRbHplR7j1_jQj_hSa +T7=p1j_jjh_Qa7 +S=.h_ pSBip=Bi1_mZOQ_ =S1)_1aHN; -HsR30FD_sMHoNRlC"zwu__B1Q"ha;H +HsR30FD_sMHoNRlC"1p7_jjj_aQh"N; +H#R3$HM_MPH0N"DR4 +";N3HRHDM_FRFb.s; +RU@@:j4j::.g4:jjd44+.a:7q_Bi1BYhR:fjjNRlO7ERw]w1RHbslaR7q_Bi1BYh +=ST7BaqiY_1hSB +7_=hdB +SpBi=pmi_1_ZQO1 +S=a)1_ +H;N3HRs_0DFosHMCNlRa"7q_Bi1BYh"N; +H#R3$HM_MPH0N"DR4 +";s@R@Uj:4jg:.:j4j:+d44w.:uBz_1h_QajRf:ljRNROE71ww]sRbHwlRuBz_1h_QaT +S=zwu__B1Q +haSh7=_Sc +B=piB_pimQ1Z_SO +11=)a;_H +RNH3Ds0_HFsolMNCwR"uBz_1h_Qa +";N3HR#_$MH0MHPRND";4" +RNH3_HMDbFFR +n;s@R@U.:.j::..:.jd.+4:_q1j_jjQRhafjj:ROlNEwR7wR1]blsHR_q1j_jjQ +haSqT=1j_jjh_Qa7 +S=6h_ +pSBip=Bi1_mZOQ_ +=S1)_1aHN; +HsR30FD_sMHoNRlC"_q1j_jjQ"ha;H NR$3#MM_HHN0PD4R""N; -HHR3MF_DFnbR;R +HHR3MF_DFjbR;R s@:@U4:jj.4g:jdj:4.+4:q7aB7i_vfqRjR:jlENORw7w1b]RsRHl7Baqiv_7qT S=q7aB7i_vSq 70=#N_0ClENOH\MC34kMd#_N_jjj_0HM_SH @@ -863,120 +808,120 @@ B=piB_pimQ1Z_ O;N3HRs_0DFosHMCNlRp"Bij_jj7_7"N; H#R3$HM_MPH0N"DR4 ";s@R@U.:4c::.4:.cd.+4:iBp_amz_aQhR:fjjNRlO7ERwbwRsRHlB_pim_zaQ -haSBT=pmi_zQa_hSa -7p=Biz_ma)_u B -SpBi=pmi_1_ZQON; -HsR30FD_sMHoNRlC"iBp_amz_aQh"N; -H#R3$HM_MPH0N"DR4 -";sjRf:ljRNROEQwAzRHbsl1Rq_jjd -=Smqj1_dOj_ -jSQ=_q1j;dj -fsRjR:jlENORwAzab]RsRHlqj1_jSj -m1=q_jjj -jSQ=_q1j_jjQ -haS=m ABtqid_jjh_Qas; -R:fjjNRlOQERARzwblsHR_71j -djS7m=1d_jj -_OS=Qj7j1_d -j;sjRf:ljRNROEAazw]sRbHzlR7j1_jSj -m7=z1j_jjQ -Sj7=z1j_jjh_Qam +haSBT=p i_XOu_ +=S7B_pim_zau +) SiBp=iBp_Zm1Q;_O +RNH3Ds0_HFsolMNCBR"pmi_zQa_h;a" +RNH3M#$_HHM0DPNR""4;R +sfjj:ROlNEARQzbwRsRHlqj1_dSj +m1=q_jjd_SO +Qqj=1d_jjs; +R:fjjNRlOAERz]waRHbsl1Rq_jjj +=Smqj1_jSj +Qqj=1j_jjh_Qam S t=Aq_Bij_djQ;ha -fsRjR:jlENORwAzab]RsRHlp_71j -jjSpm=7j1_jSj -Qpj=7j1_jQj_hSa -mA =tiqB_jjd_aQh;R -sfjj:ROlNEARQzbwRsRHl1 QZr -j9S1m=Q_Z O9rj -jSQ=Z1Q 9rj;R -sfjj:ROlNEARQzbwRsRHl1 QZr -49S1m=Q_Z O9r4 -jSQ=Z1Q 9r4;R -sfjj:ROlNEARQzbwRsRHlq9rj -=Smqr_OjS9 -Qqj=r;j9 -fsRjR:jlENORzQAwsRbHqlRr94n +fsRjR:jlENORzQAwsRbH7lR1d_jjm +S=_71j_djOQ +Sj1=7_jjd;R +sfjj:ROlNEzRAwRa]blsHR1z7_jjj +=Smz_71j +jjS=Qjz_71j_jjQ +haS=m ABtqid_jjh_Qas; +R:fjjNRlOAERz]waRHbsl7Rp1j_jjm +S=1p7_jjj +jSQ=1p7_jjj_aQh + Sm=qAtBji_dQj_h +a;sjRf:ljRNROEQwAzRHbslQR1Zj r9m +S=Z1Q r_OjS9 +Q1j=QrZ j +9;sjRf:ljRNROEQwAzRHbslQR1Z4 r9m +S=Z1Q r_O4S9 +Q1j=QrZ 4 +9;sjRf:ljRNROEQwAzRHbslrRqjS9 +m_=qO9rj +jSQ=jqr9s; +R:fjjNRlOQERARzwblsHR4qrnS9 +m_=qOnr49Q +Sjr=q4;n9 +fsRjR:jlENORzQAwsRbHqlRr94( =Smqr_O4 -n9S=Qjqnr49s; -R:fjjNRlOQERARzwblsHR4qr(S9 -m_=qO(r49Q -Sjr=q4;(9 -fsRjR:jlENORzQAwsRbHqlRr94U +(9S=Qjq(r49s; +R:fjjNRlOQERARzwblsHR4qrUS9 +m_=qOUr49Q +Sjr=q4;U9 +fsRjR:jlENORzQAwsRbHqlRr94g =Smqr_O4 -U9S=QjqUr49s; -R:fjjNRlOQERARzwblsHR4qrgS9 -m_=qOgr49Q -Sjr=q4;g9 -fsRjR:jlENORzQAwsRbHqlRr9.j +g9S=Qjqgr49s; +R:fjjNRlOQERARzwblsHR.qrjS9 +m_=qOjr.9Q +Sjr=q.;j9 +fsRjR:jlENORzQAwsRbHqlRr9.4 =Smqr_O. -j9S=Qjqjr.9s; -R:fjjNRlOQERARzwblsHR.qr4S9 -m_=qO4r.9Q -Sjr=q.;49 -fsRjR:jlENORzQAwsRbHqlRr9.. +49S=Qjq4r.9s; +R:fjjNRlOQERARzwblsHR.qr.S9 +m_=qO.r.9Q +Sjr=q.;.9 +fsRjR:jlENORzQAwsRbHqlRr9.d =Smqr_O. -.9S=Qjq.r.9s; -R:fjjNRlOQERARzwblsHR.qrdS9 -m_=qOdr.9Q -Sjr=q.;d9 -fsRjR:jlENORzQAwsRbHqlRr9.c +d9S=Qjqdr.9s; +R:fjjNRlOQERARzwblsHR.qrcS9 +m_=qOcr.9Q +Sjr=q.;c9 +fsRjR:jlENORzQAwsRbHqlRr9.6 =Smqr_O. -c9S=Qjqcr.9s; -R:fjjNRlOQERARzwblsHR.qr6S9 -m_=qO6r.9Q -Sjr=q.;69 -fsRjR:jlENORzQAwsRbHqlRr9.n +69S=Qjq6r.9s; +R:fjjNRlOQERARzwblsHR.qrnS9 +m_=qOnr.9Q +Sjr=q.;n9 +fsRjR:jlENORzQAwsRbHqlRr9.( =Smqr_O. -n9S=Qjqnr.9s; -R:fjjNRlOQERARzwblsHR.qr(S9 -m_=qO(r.9Q -Sjr=q.;(9 -fsRjR:jlENORzQAwsRbHqlRr9.U +(9S=Qjq(r.9s; +R:fjjNRlOQERARzwblsHR.qrUS9 +m_=qOUr.9Q +Sjr=q.;U9 +fsRjR:jlENORzQAwsRbHqlRr9.g =Smqr_O. -U9S=QjqUr.9s; -R:fjjNRlOQERARzwblsHR.qrgS9 -m_=qOgr.9Q -Sjr=q.;g9 -fsRjR:jlENORzQAwsRbHqlRr9dj +g9S=Qjqgr.9s; +R:fjjNRlOQERARzwblsHRdqrjS9 +m_=qOjrd9Q +Sjr=qd;j9 +fsRjR:jlENORzQAwsRbHqlRr9d4 =Smqr_Od -j9S=Qjqjrd9s; -R:fjjNRlOQERARzwblsHRdqr4S9 -m_=qO4rd9Q -Sjr=qd;49 -fsRjR:jlENORzQAwsRbHBlRu1z_u qB -=SmB_uz1Buq -_OS=QjB_uz1Buq s; -R:fjjNRlOAERz]waRHbsl RA)S) -m =A)S) -Qtj=hS7 -mw =uBz_1h_Qa;_H -fsRjR:jlENORzQAwsRbHAlRtd_jjm -S=_Atj_djOQ -Sjt=A_jjd;R -sfjj:ROlNEARmzbwRsRHlAjt_jSj -mt=A_jjj -jSQ=_Atj_jjOs; -R:fjjNRlOmERARzwblsHRqAtBji_dSj -mt=Aq_Bij -djS=QjABtqid_jjh_Qas; -R:fjjNRlOQERARzwblsHRqAtBji_jSj -mt=Aq_Bij_jjOQ -Sjt=Aq_Bij;jj -fsRjR:jlENORzQAwsRbHBlRpji_dSj -mp=Bid_jj -_OS=QjB_pij;dj -fsRjR:jlENORzQAwsRbHBlRpji_jSj -mp=Bij_jj -_OS=QjB_pij;jj -fsRjR:jlENORzQAwsRbHBlRpmi_1 -ZQSBm=pmi_1_ZQOQ -Sjp=Bi1_mZ -Q;sjRf:ljRNROEmwAzRHbslpRBiQ_7ez_mam -S=iBp_e7Q_amz -jSQ=iBp_amz_aQh;R +49S=Qjq4rd9s; +R:fjjNRlOQERARzwblsHRzBu_q1uBS +mu=Bzu_1q_B OQ +Sju=Bzu_1q;B +fsRjR:jlENORwAzab]RsRHlA) ) +=SmA) ) +jSQ=7th + Sm=zwu__B1Q_haHs; +R:fjjNRlOQERARzwblsHR_Atj +djSAm=td_jj +_OS=QjAjt_d +j;sjRf:ljRNROEmwAzRHbsltRA_jjj +=SmAjt_jSj +QAj=tj_jj;_O +fsRjR:jlENORzmAwsRbHAlRtiqB_jjd +=SmABtqid_jjQ +Sjt=Aq_Bij_djQ;ha +fsRjR:jlENORzQAwsRbHAlRtiqB_jjj +=SmABtqij_jj +_OS=QjABtqij_jjs; +R:fjjNRlOQERARzwblsHRiBp_jjd +=SmB_pij_djOQ +Sjp=Bid_jjs; +R:fjjNRlOQERARzwblsHRiBp_jjj +=SmB_pij_jjOQ +Sjp=Bij_jjs; +R:fjjNRlOQERARzwblsHRiBp_Zm1Qm +S=iBp_Zm1Q +_OS=QjB_pimQ1Z;R +sfjj:ROlNEARmzbwRsRHlB_pi7_Qem +zaSBm=p7i_Qme_zSa +QBj=p i_XOu_;R sfjj:ROlNEARmzbwRsRHlB_pi XuSBm=p i_XSu -QOj=DC _GHb_;R +QBj=p i_XOu_;R sfjj:ROlNEARmzbwRsRHlw_uzBS1 mu=wz1_B jSQ=zwu__B1Q;ha @@ -1054,15 +999,135 @@ mWSqm=vqQt_1Az_q hA_p p mWS=Qje;BB fsRjR:jlENORwAzab]RsRHlBhQQ =SmBhQQ -jSQ=4h_USg -mh =_n4U;R +jSQ=4h_(Sj +mh =_(4n;R +sfjj:ROlNEhRq7b.RsRHlz_71j_jjQ_hajJ_#lNkG_.4_ +=Smz_71j_jjQ_hajJ_#lNkG_.4_ +jSQ=_)WOQ +S4v=1_Qqvtnqr9s; +R:fjjNRlOqERhR7.blsHR1z7_jjj_aQh_#j_JGlkN__4dm +S=1z7_jjj_aQh_#j_JGlkN__4dQ +Sj7=z1j_jjh_Qa__j#kJlG4N__S4 +Qz4=7j1_jQj_hja__l#Jk_GN4;_. +fsRjR:jlENOR7qh.sRbHzlR7j1_jQj_hja__l#Jk_GN4m +S=1z7_jjj_aQh_#j_JGlkN +_4S=Qjz_71j_jjQ_hajJ_#lNkG_d4_ +4SQ= OD\M3kdD_O j_jj8_8;R +sfjj:ROlNEhRq7b.RsRHlO\D 3kOb_0C#__44Hc_N_4j_r +.9Shm=_.4d_S4 +QOj=bCk_#40r9Q +S4b=Ok#_C0r_Hj +9;sjRf:ljRNROEq.h7RHbslDRO O\3bCk_#40_4__HNjc_r +.9Shm=_.4d +jSQ=4h_d4._ +4SQ=kOb_0C#_.Hr9s; +R:fjjNRlOqERhR7.blsHR OD\b3Ok#_C04_4_NH_cr_4.S9 +m_=h4_d44Q +Sj_=h4 +.cS=Q4O_bkCr#0j +9;sjRf:ljRNROEq.h7RHbslDRO O\3bCk_#40_4__HN.cr9m +S=4h_dS4 +Qhj=_44d_S4 +QO4=bCk_#H0_r;d9 +fsRjR:jlENOR7qh.sRbH#lR0CN0_OlNECHM\13q_jjd_jjj_h1YB__d4m +S=N#00lC_NHOEM3C\qj1_djj_j1j_Y_hBd__j4Q +Sj1=q_jjd_SH +QB4=u1z_u qB_ +H;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC3_q1j_djj_jj1BYh_Sd +m0=#N_0ClENOH\MC3_q1j_djj_jj1BYh_jd_ +jSQ=N#00lC_NHOEM3C\qj1_djj_j1j_Y_hBd__j4Q +S40=#N_0ClENOH\MC3ckM.D_O d_jj;_H +fsRjR:jlENOR7qh.sRbHzlR7j1_jQj_hja__l#Jk_GN4 +_jSzm=7j1_jQj_hja__l#Jk_GN4 +_jS=QjB_pij_jj7Q +S41=7_jjd_ +H;sjRf:ljRNROEq.h7RHbsl7Rz1j_jjh_Qa__j#kJlG.N_ +=Smz_71j_jjQ_hajJ_#lNkG_S. +Q)j=W +_HS=Q41qv_vqQtr;c9 +fsRjR:jlENOR7qh.sRbHzlR7j1_jQj_hja__l#Jk +GNSzm=7j1_jQj_hja__l#Jk +GNS=Qjz_71j_jjQ_hajJ_#lNkG_j4_ +4SQ=1z7_jjj_aQh_#j_JGlkN;_. +fsRjR:jlENOR7qh.sRbH#lR0CN0_OlNECHM\M3k4Od_Dj _j8j__j4_ +=Sm#00NCN_lOMEHCk\3M_4dO_D j_jj8__4jQ +Sjb=Ok#_C0__8H9rj +4SQ=kOb_0C#_H8_r;d9 +fsRjR:jlENOR7qh.sRbH#lR0CN0_OlNECHM\M3k4Od_Dj _j8j_ +=Sm#00NCN_lOMEHCk\3M_4dO_D j_jj8Q +Sj0=#N_0ClENOH\MC34kMdD_O j_jj__84 +_jS=Q4#00NCN_lOMEHCk\3M_4dO_D j_jj8;_c +fsRjR:jlENOR7qh.sRbH#lR0CN0_OlNECHM\M3k4Od_Dj _j8j__4c_ +=Sm#00NCN_lOMEHCk\3M_4dO_D j_jj8__c4Q +Sj0=#N_0ClENOH\MC34kMdD_O j_jj__84Q +S4b=Ok#_C0r_84 +9;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC34kMdD_O j_jj__8cm +S=N#00lC_NHOEM3C\kdM4_ OD_jjj_c8_ +jSQ=N#00lC_NHOEM3C\kdM4_ OD_jjj_c8__S4 +QO4=bCk_#80_r;.9 +fsRjR:jlENOR7qh.sRbH#lR0CN0_OlNECHM\M3kUD_O j_jj__84m +S=N#00lC_NHOEM3C\k_MUO_D j_jj8 +_4S=QjO_bkC_#0H9r4 +4SQ=kOb_0C#_dHr9s; +R:fjjNRlOqERhR7.blsHRN#00lC_NHOEM3C\k_MUO_D j_jj8 +_.S#m=0CN0_OlNECHM\M3kUD_O j_jj__8.Q +Sjp=Bij_jj__7HQ +S4u=eq__7Hs; +R:fjjNRlOqERhR7.blsHRN#00lC_NHOEM3C\k_MUO_D j_jj8 +_dS#m=0CN0_OlNECHM\M3kUD_O j_jj__8dQ +Sjb=Ok#_C09rj +4SQ=kOb_0C#r;.9 +fsRjR:jlENOR7qh.sRbH#lR0CN0_OlNECHM\M3kUD_O j_jj__8cm +S=N#00lC_NHOEM3C\k_MUO_D j_jj8 +_cS=Qj#00NCN_lOMEHCk\3MOU_Dj _j8j__S4 +Q#4=0CN0_OlNECHM\M3kUD_O j_jj__8.s; +R:fjjNRlOqERhR7.blsHRN#00lC_NHOEM3C\k_MUO_D j_jj8m +S=N#00lC_NHOEM3C\k_MUO_D j_jj8Q +Sj0=#N_0ClENOH\MC3UkM_ OD_jjj_c8_ +4SQ=N#00lC_NHOEM3C\k_MUO_D j_jj8;_d +fsRjR:jlENOR7qh.sRbHzlR7j1_jQj_hja__l#Jk_GN4 +_4Szm=7j1_jQj_hja__l#Jk_GN4 +_4S=Qjqj1_djj_j1j_Y_hBHQ +S41=7_jjd_ +H;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC3ckM.D_O d_jj +_4S#m=0CN0_OlNECHM\M3kcO._Dj _d4j_ +jSQ=Oq_r94( +4SQ=Hq_r94n;R +sfjj:ROlNEhRq7b.RsRHl#00NCN_lOMEHCk\3M_c.O_D j_dj.m +S=N#00lC_NHOEM3C\k.Mc_ OD_jjd_S. +Qqj=_4HrUS9 +Qq4=_4Hrg +9;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC3ckM.D_O d_jj +_dS#m=0CN0_OlNECHM\M3kcO._Dj _ddj_ +jSQ=_wBO9r4 +4SQ=qAtBji_jOj_;R +sfjj:ROlNEhRq7b.RsRHl#00NCN_lOMEHCk\3M_c.O_D j_djcm +S=N#00lC_NHOEM3C\k.Mc_ OD_jjd_Sc +Q#j=0CN0_OlNECHM\M3kcO._Dj _d4j_ +4SQ=N#00lC_NHOEM3C\k.Mc_ OD_jjd_ +.;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC3ckM.D_O d_jj +_6S#m=0CN0_OlNECHM\M3kcO._Dj _d6j_ +jSQ=N#00lC_NHOEM3C\k.Mc_ OD_jjd_Sd +Qw4=Br_Oj +9;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC3ckM.D_O d_jjm +S=N#00lC_NHOEM3C\k.Mc_ OD_jjd +jSQ=N#00lC_NHOEM3C\k.Mc_ OD_jjd_Sc +Q#4=0CN0_OlNECHM\M3kcO._Dj _d6j_;R +sfjj:ROlNEhRq7b.RsRHl7BaqiY_1h4B__l#Jk_GN4 +_4S7m=aiqB_h1YB__4#kJlG4N__Sj +Q7j=aiqB_SH +Qe4=u7q_;R +sfjj:ROlNEhRq7b.RsRHl7BaqiY_1h4B__l#Jk +GNS7m=aiqB_h1YB__4#kJlGSN +Q7j=aiqB_h1YB__4#kJlG4N__Sj +Qe4=u1q_Y_hB4J_#lNkG_j4_;R sfjj:ROlNEhRq7b.RsRHle_uq1BYh_#4_JGlkN__4jm S=qeu_h1YB__4#kJlG4N__S4 QOj=bCk_#.0r9Q S4b=Ok#_C09rd;R sfjj:ROlNEhRq7b.RsRHle_uq1BYh_#4_JGlkN _.Sem=u1q_Y_hB4J_#lNkG_S. -Qhj=_(4c_S4 +Qhj=_64d_S4 Qe4=vQq_hHa_;R sfjj:ROlNEhRq7b.RsRHle_uq1BYh_#4_JGlkN__djm S=qeu_h1YB__4#kJlGdN_ @@ -1076,326 +1141,147 @@ Qe4=u1q_Y_hB4J_#lNkG_ GNSem=u1q_Y_hB4J_#lNkG jSQ=qeu_h1YB__4#kJlGcN_ 4SQ=qeu_h1YB__4#kJlGdN_;R -sfjj:ROlNEhRq7b.RsRHlk_MgH._N_j4r9m -S=4h_j4U_ -jSQ=4h_.Sd -Q14=vv_qQ_tqH9rj;R -sfjj:ROlNEhRq7b.RsRHlk_MgH._Nr -j9Shm=_U4j -jSQ=4h_j4U_ -4SQ=_1vqtvQqr_Hd -9;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#._N_4j_r -69Shm=_U44_S4 -QBj=pji_j7j__SH -Q14=vv_qQrtqd -9;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#._N_6jr9m -S=4h_4SU -Qhj=_U44_S4 -Q#4=0CN0_OlNECHM\M3k6O(_Dj _j8j_;R sfjj:ROlNEhRq7b.RsRHlk_M47B1qih_Qa__j#kJlGHN___N.4m -S=4h_44j_ -jSQ=iBp_jjj_H7_ -4SQ=iBp_amz_ u);R -sfjj:ROlNEhRq7b.RsRHlk_M47B1qih_Qa__j#kJlGHN__ -N.Shm=_j44 -jSQ=4h_44j_ -4SQ=_1vqtvQq9r4;R -sfjj:ROlNEhRq7b.RsRHltj_44 -_4SOm=DC _G4b_ -jSQ=4h_nSc -Qh4=_.4n;R -sfjj:ROlNEhRq7b.RsRHltj_44m -S= OD_bCG -jSQ= OD_bCG_S4 -Qh4=_d4n;R -sfjj:ROlNEhRq7b.RsRHl#00NCN_lOMEHCk\3M_c.O_D j_djdm -S=N#00lC_NHOEM3C\k.Mc_ OD_jjd_Sd -Qwj=Br_O4S9 -QA4=tiqB_jjj_ -O;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC3ckM.D_O d_jj -_cS#m=0CN0_OlNECHM\M3kcO._Dj _dcj_ -jSQ=N#00lC_NHOEM3C\k.Mc_ OD_jjd_S4 -Q#4=0CN0_OlNECHM\M3kcO._Dj _d.j_;R -sfjj:ROlNEhRq7b.RsRHl#00NCN_lOMEHCk\3M_c.O_D j_dj6m -S=N#00lC_NHOEM3C\k.Mc_ OD_jjd_S6 -Q#j=0CN0_OlNECHM\M3kcO._Dj _ddj_ -4SQ=_wBO9rj;R -sfjj:ROlNEhRq7b.RsRHl#00NCN_lOMEHCk\3M_c.O_D j -djS#m=0CN0_OlNECHM\M3kcO._Dj _dSj -Q#j=0CN0_OlNECHM\M3kcO._Dj _dcj_ -4SQ=N#00lC_NHOEM3C\k.Mc_ OD_jjd_ -6;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC34kMdD_O j_jj__84 -_jS#m=0CN0_OlNECHM\M3k4Od_Dj _j8j__j4_ -jSQ=kOb_0C#_H8_r -j9S=Q4O_bkC_#08r_Hd -9;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC34kMdD_O j_jj -_8S#m=0CN0_OlNECHM\M3k4Od_Dj _j8j_ -jSQ=N#00lC_NHOEM3C\kdM4_ OD_jjj_48__Sj -Q#4=0CN0_OlNECHM\M3k4Od_Dj _j8j__ -c;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC34kMdD_O j_jj__8c -_4S#m=0CN0_OlNECHM\M3k4Od_Dj _j8j__4c_ -jSQ=N#00lC_NHOEM3C\kdM4_ OD_jjj_48_ -4SQ=kOb_0C#_48r9s; -R:fjjNRlOqERhR7.blsHRN#00lC_NHOEM3C\kdM4_ OD_jjj_c8_ -=Sm#00NCN_lOMEHCk\3M_4dO_D j_jj8 -_cS=Qj#00NCN_lOMEHCk\3M_4dO_D j_jj8__c4Q -S4b=Ok#_C0r_8. -9;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC3UkM_ OD_jjj_48_ -=Sm#00NCN_lOMEHCk\3MOU_Dj _j8j__S4 -QOj=bCk_#H0_r -49S=Q4O_bkC_#0H9rd;R -sfjj:ROlNEhRq7b.RsRHl#00NCN_lOMEHCk\3MOU_Dj _j8j__S. -m0=#N_0ClENOH\MC3UkM_ OD_jjj_.8_ -jSQ=iBp_jjj_H7_ -4SQ=qeu_H7_;R -sfjj:ROlNEhRq7b.RsRHl#00NCN_lOMEHCk\3MOU_Dj _j8j__Sd -m0=#N_0ClENOH\MC3UkM_ OD_jjj_d8_ -jSQ=kOb_0C#r -j9S=Q4O_bkCr#0. -9;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC3UkM_ OD_jjj_c8_ -=Sm#00NCN_lOMEHCk\3MOU_Dj _j8j__Sc -Q#j=0CN0_OlNECHM\M3kUD_O j_jj__84Q -S40=#N_0ClENOH\MC3UkM_ OD_jjj_.8_;R -sfjj:ROlNEhRq7b.RsRHl#00NCN_lOMEHCk\3MOU_Dj _j8j_ -=Sm#00NCN_lOMEHCk\3MOU_Dj _j8j_ -jSQ=N#00lC_NHOEM3C\k_MUO_D j_jj8 -_cS=Q4#00NCN_lOMEHCk\3MOU_Dj _j8j__ -d;sjRf:ljRNROEq.h7RHbslaR7q_Bi1BYh_#4_JGlkN__44m -S=q7aB1i_Y_hB4J_#lNkG_j4_ -jSQ=q7aBHi_ -4SQ=qeu_ -7;sjRf:ljRNROEq.h7RHbslaR7q_Bi1BYh_#4_JGlkNm -S=q7aB1i_Y_hB4J_#lNkG -jSQ=q7aB1i_Y_hB4J_#lNkG_j4_ -4SQ=qeu_h1YB__4#kJlG4N__ -j;sjRf:ljRNROEq.h7RHbslDRO O\3bCk_#40_4__HNjc_r -.9Shm=_c4c -jSQ=4h_c4c_ -4SQ=kOb_0C#_.Hr9s; -R:fjjNRlOqERhR7.blsHRgkM_NH_.r_4.S9 -m_=h4_jn4Q -Sjv=1_QqvtHq_r -j9S=Q41qv_vqQt_.Hr9s; -R:fjjNRlOqERhR7.blsHRgkM_NH_.r_..S9 -m_=h4_jn.Q -Sjv=1_QqvtHq_r -c9S=Q41qv_vqQt_nHr9s; -R:fjjNRlOqERhR7.blsHRgkM_NH_.9r. -=Smhj_4nQ -Sj_=h4_jn4Q -S4_=h4_jn.s; -R:fjjNRlOqERhR7.blsHRgkM_NH_.r_44S9 -m_=h4_j(4Q -Sj_=h4 -.cS=Q41qv_vqQt_jHr9s; -R:fjjNRlOqERhR7.blsHRgkM_NH_.9r4 -=Smhj_4(Q -Sj_=h4_j(4Q -S4v=1_QqvtHq_r;49 -fsRjR:jlENOR7qh.sRbHzlR7j1_jQj_hja__l#Jk_GN4 -_4Szm=7j1_jQj_hja__l#Jk_GN4 -_4S=Qjqj1_djj_j1j_Y_hBHQ -S41=7_jjd_ -H;sjRf:ljRNROEq.h7RHbsl7Rz1j_jjh_Qa__j#kJlG4N__S. -m7=z1j_jjh_Qa__j#kJlG4N__S. -Q)j=W -_OS=Q41qv_vqQtr;n9 -fsRjR:jlENOR7qh.sRbHzlR7j1_jQj_hja__l#Jk_GN4 -_dSzm=7j1_jQj_hja__l#Jk_GN4 -_dS=Qjz_71j_jjQ_hajJ_#lNkG_44_ -4SQ=1z7_jjj_aQh_#j_JGlkN__4.s; -R:fjjNRlOqERhR7.blsHR1z7_jjj_aQh_#j_JGlkN -_4Szm=7j1_jQj_hja__l#Jk_GN4Q -Sj7=z1j_jjh_Qa__j#kJlG4N__Sd -QO4=D3 \k_MdO_D j_jj8 -8;sjRf:ljRNROEq.h7RHbsl7Rz1j_jjh_Qa__j#kJlG4N__Sj -m7=z1j_jjh_Qa__j#kJlG4N__Sj -QBj=pji_j7j_ -4SQ=_71j_djHs; -R:fjjNRlOqERhR7.blsHR1z7_jjj_aQh_#j_JGlkN -_.Szm=7j1_jQj_hja__l#Jk_GN.Q -SjW=)_SH -Q14=vv_qQrtqc -9;sjRf:ljRNROEq.h7RHbsl7Rz1j_jjh_Qa__j#kJlGSN -m7=z1j_jjh_Qa__j#kJlGSN -Qzj=7j1_jQj_hja__l#Jk_GN4 -_jS=Q4z_71j_jjQ_hajJ_#lNkG_ -.;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC3ckM.D_O d_jj -_4S#m=0CN0_OlNECHM\M3kcO._Dj _d4j_ -jSQ=Oq_r94( -4SQ=Hq_r94n;R -sfjj:ROlNEhRq7b.RsRHl#00NCN_lOMEHCk\3M_c.O_D j_dj.m -S=N#00lC_NHOEM3C\k.Mc_ OD_jjd_S. -Qqj=_4HrUS9 -Qq4=_4Hrg -9;sjRf:ljRNROEq.h7RHbslMRkUH_OHcM_ -=SmhU_4n -_cS=Qjqr_Hd -j9S=Q4qr_Hd;49 -fsRjR:jlENOR7qh.sRbHklRMOU_H_HM6m -S=4h_U6n_ -jSQ=4h_U4n_ -4SQ=4h_U.n_;R -sfjj:ROlNEhRq7b.RsRHlk_MUOMHH_Sn -m_=h4_UnnQ -Sj_=h4_UndQ -S4_=h4_Uncs; -R:fjjNRlOqERhR7.blsHRUkM_HOHMm -S=4h_USn -Qhj=_n4U_S6 -Qh4=_n4U_ -n;sjRf:ljRNROEq.h7RHbslMRkcH_OH4M_ -=SmhU_4g -_4S=Qjqr_O. -j9S=Q4qr_O.;49 -fsRjR:jlENOR7qh.sRbHklRMOc_H_HM.m -S=4h_U.g_ -jSQ=Oq_r9.. -4SQ=Oq_r9.d;R -sfjj:ROlNEhRq7b.RsRHlk_McOMHH -=SmhU_4gQ -Sj_=h4_Ug4Q -S4_=h4_Ug.s; +S=gh_U +_4S=QjB_pij_jj7 +_HS=Q4B_pim_zau;) +fsRjR:jlENOR7qh.sRbHklRM74_1iqB_aQh_#j_JGlkN__HNS. +m_=hgSU +Qhj=__gU4Q +S4v=1_Qqvt4qr9s; R:fjjNRlOqERhR7.blsHR OD\b3Ok#_C04_4_4j_r 49SOm=D3 \O_bkC_#04j4__44r9Q -Sj_=h4_dgHQ -S4_=h4_cjHs; +Sj_=h4_djHQ +S4_=h4_.UHs; R:fjjNRlOqERhR7.blsHR OD\b3Ok#_C04_4_.j_r 49SOm=D3 \O_bkC_#04j4__4.r9Q -Sj_=h4_c4HQ -S4_=h4_c.Hs; +Sj_=h4_.(HQ +S4_=h4_.gHs; R:fjjNRlOqERhR7.blsHR OD\b3Ok#_C04_4_4jr9m S= OD\b3Ok#_C04_4_4jr9Q SjD=O O\3bCk_#40_4__j49r4 4SQ= OD\b3Ok#_C04_4_.j_r;49 -fsRjR:jlENOR7qh.sRbHOlRD3 \O_bkC_#04j4__d4r9m -S= OD\b3Ok#_C04_4_4j_r -d9S=Qjhc_4( -_HS=Q4hc_46;_H -fsRjR:jlENOR7qh.sRbHOlRD3 \O_bkC_#04j4_r -d9SOm=D3 \O_bkC_#04j4_r -d9S=QjO\D 3kOb_0C#__44jr_4dS9 -Qh4=_n4c_ -H;sjRf:ljRNROEq.h7RHbslDRO O\3bCk_#40_4__HN4c_r -.9Shm=_d4c_S4 -Qhj=_n4d -4SQ=kOb_0C#r;j9 -fsRjR:jlENOR7qh.sRbHOlRD3 \O_bkC_#04H4__rNc.S9 -m_=h4 -cdS=Qjhc_4d -_4S=Q4O_bkC_#0H9rd;R -sfjj:ROlNEhRq7b.RsRHlO\D 3kOb_0C#__44Hc_N_4j_r -.9Shm=_c4c_S4 -QOj=bCk_#40r9Q -S4b=Ok#_C0r_Hj -9;sjRf:ljRNROEQRheblsHR4h_.Hc_ -=Smh._4c -_HS=Qjh._4cs; -R:fjjNRlOQERhbeRsRHlh4_4. -_HShm=_.44_SH -Qhj=_.44;R -sfjj:ROlNEhRQesRbH1lRvv_qQ_tqMH#_r -j9S1m=vv_qQ_tqMj#r9Q -Sjv=1_QqvtMq_#r_jj -9;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#__H49r4 -=Smhn_U_4H_ -jSQ=4h_jHg_ -4SQ=4h_4H4_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt__M#H9r4 -=Smhn_U_SH -Qhj=__UnH -_4S=Q4h._4.;_H -fsRjR:jlENOR7qh.sRbHklRML4_od_jj -_4Skm=ML4_od_jj__j4Q -Sjt=A_jjd_HO_ -4SQ=zBu_q1uBH _;R -sfjj:ROlNEhRq7b.RsRHlk_M4Ljo_d.j_ -=Smk_M4Ljo_djj__S. -Qqj=1d_jj -_OS=Q4hj_4g;_H -fsRjR:jlENOR7qh.sRbHklRML4_od_jjm -S=4kM__Loj_djjQ -SjM=k4o_L_jjd_4j_ -4SQ=4kM__Loj_djj;_. -fsRjR:jlENOR7qh.sRbH#lR0CN0_OlNECHM\13q_jjd_jjj_h1YB__d4m -S=N#00lC_NHOEM3C\qj1_djj_j1j_Y_hBd__.4Q -Sj1=q_jjd_SH -QB4=u1z_u qB_ -H;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC3_q1j_djj_jj1BYh_Sd -m0=#N_0ClENOH\MC3_q1j_djj_jj1BYh_.d_ -jSQ=N#00lC_NHOEM3C\qj1_djj_j1j_Y_hBd__.4Q -S40=#N_0ClENOH\MC3ckM.D_O d_jj;_H -fsRjR:jlENOR7qh.sRbH#lR0CN0_OlNECHM\M3kdO4_Dj _j8j__S4 -m0=#N_0ClENOH\MC3dkM4D_O j_jj__8H -_4S=Qj1 QZ_jOr9Q -S4_=qOr_Hj -9;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC3dkM4D_O j_jj -_8S#m=0CN0_OlNECHM\M3kdO4_Dj _j8j__SH -Q#j=0CN0_OlNECHM\M3kdO4_Dj _j8j__4H_ -4SQ=Z1Q __OH9r4;R -sfjj:ROlNEhRq7b.RsRHlk_MUOMHH_S4 -m_=h4_Un4Q -Sj_=qHcr.9Q -S4_=qH6r.9s; +fsRjR:jlENOR7qh.sRbHklRMOU_H_HM4m +S=4h_n4(_ +jSQ=Hq_r9.c +4SQ=Hq_r9.6;R +sfjj:ROlNEhRq7b.RsRHlk_MUOMHH_S. +m_=h4_n(.Q +Sj_=qHnr.9Q +S4_=qH(r.9s; R:fjjNRlOqERhR7.blsHRUkM_HOHM -_.Shm=_n4U_S. -Qqj=_.HrnS9 -Qq4=_.Hr( -9;sjRf:ljRNROEq.h7RHbslMRkUH_OHdM_ -=SmhU_4n -_dS=Qjqr_H. -U9S=Q4qr_H.;g9 -fsRjR:jlENOReQhRHbsl_Rh4_c6Hm -S=4h_cH6_ -jSQ=4h_c -6;sjRf:ljRNROEQRheblsHR4h_cHn_ -=Smhc_4n -_HS=Qjhc_4ns; -R:fjjNRlOQERhbeRsRHlhc_4. -_HShm=_.4c_SH -Qhj=_.4c;R -sfjj:ROlNEhRQesRbHOlRD3 \O_bkC_#04j4__4Hr9m -S= OD\b3Ok#_C04_4r -49S=QjO\D 3kOb_0C#__44j9r4;R -sfjj:ROlNEhRQesRbHhlR_j4c_SH -m_=h4_cjHQ -Sj_=h4;cj -fsRjR:jlENOReQhRHbsl_Rh4_dgHm -S=4h_dHg_ -jSQ=4h_d -g;sjRf:ljRNROEQRheblsHR4h_cH4_ -=Smhc_44 -_HS=Qjhc_44s; -R:fjjNRlOQERhbeRsRHlO\D 3kOb_0C#__44jc_F_dHr9m -S=4h_dSU -Qhj=_U4d_ -H;sjRf:ljRNROEQRheblsHR OD\b3Ok#_C04_4_Fj_cr_H4S9 -m_=h4 -d(S=Qjhd_4(;_H -fsRjR:jlENOReQhRHbslDRO O\3bCk_#40_4__HFHc_r -.9Shm=_n4d -jSQ=4h_dHn_;R -sfjj:ROlNEhRQesRbHhlR_d4c_SH -m_=h4_cdHQ -Sj_=h4;cd -fsRjR:jlENOReQhRHbsl_Rh4_ccHm -S=4h_cHc_ -jSQ=4h_c -c;sjRf:ljRNROEQRheblsHR_1vqtvQq#_M_FH_.r_HcS9 -m_=h4 -j4S=Qjhj_44;_j -fsRjR:jlENOReQhRHbsl_Rh4_46Hm -S=4h_4H6_ -jSQ=4h_4 -6;sjRf:ljRNROEQRheblsHR4h_4Hn_ -=Smh4_4n -_HS=Qjh4_4ns; +_dShm=_(4n_Sd +Qqj=_.HrUS9 +Qq4=_.Hrg +9;sjRf:ljRNROEq.h7RHbslMRkUH_OHcM_ +=Smhn_4( +_cS=Qjqr_Hd +j9S=Q4qr_Hd;49 +fsRjR:jlENOR7qh.sRbHklRMOU_H_HM6m +S=4h_n6(_ +jSQ=4h_n4(_ +4SQ=4h_n.(_;R +sfjj:ROlNEhRq7b.RsRHlk_MUOMHH_Sn +m_=h4_n(nQ +Sj_=h4_n(dQ +S4_=h4_n(cs; +R:fjjNRlOqERhR7.blsHRUkM_HOHMm +S=4h_nS( +Qhj=_(4n_S6 +Qh4=_(4n_ +n;sjRf:ljRNROEq.h7RHbslMRkcH_OH4M_ +=Smh(_4j +_4S=Qjqr_O. +j9S=Q4qr_O.;49 +fsRjR:jlENOR7qh.sRbHklRMOc_H_HM.m +S=4h_(.j_ +jSQ=Oq_r9.. +4SQ=Oq_r9.d;R +sfjj:ROlNEhRq7b.RsRHlk_McOMHH +=Smh(_4jQ +Sj_=h4_(j4Q +S4_=h4_(j.s; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M__N.jr_46S9 +m_=h4_j(4Q +Sjp=Bij_jj__7HQ +S4v=1_Qqvtdqr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M__N.j9r6 +=Smhj_4(Q +Sj_=h4_j(4Q +S40=#N_0ClENOH\MC36kM(D_O j_jj;_8 +fsRjR:jlENOReQhRHbslvR1_QqvtMq_#__HFH._r +c9Shm=_ +gdS=Qjhd_g_ +j;sjRf:ljRNROEQRheblsHR4h_jHU_ +=Smhj_4U +_HS=Qjhj_4Us; +R:fjjNRlOQERhbeRsRHlhj_4g +_HShm=_g4j_SH +Qhj=_g4j;R +sfjj:ROlNEhRQesRbHhlR_n4j_SH +m_=h4_jnHQ +Sj_=h4;jn +fsRjR:jlENOReQhRHbsl_Rh4_j(Hm +S=4h_jH(_ +jSQ=4h_j +(;sjRf:ljRNROEQRheblsHR_1vqtvQq#_M_6Hr9m +S=_1vqtvQq#_Mr +69S=Qj1qv_vqQt__M#j9r6;R +sfjj:ROlNEhRQesRbHhlR_c4j_SH +m_=h4_jcHQ +Sj_=h4;jc +fsRjR:jlENOReQhRHbsl_Rh4_j6Hm +S=4h_jH6_ +jSQ=4h_j +6;sjRf:ljRNROEq.h7RHbslMRk4o_L_jjd_S4 +mM=k4o_L_jjd_4j_ +jSQ=_Atj_djO +_HS=Q4B_uz1Buq ;_H +fsRjR:jlENOR7qh.sRbHklRML4_od_jj +_.Skm=ML4_od_jj__j.Q +Sj1=q_jjd_SO +Qh4=__g(Hs; +R:fjjNRlOqERhR7.blsHR4kM__Loj +djSkm=ML4_od_jj +_jS=Qjk_M4Ljo_djj__S4 +Qk4=ML4_od_jj__j.s; +R:fjjNRlOqERhR7.blsHRN#00lC_NHOEM3C\k4Md_ OD_jjj_48_ +=Sm#00NCN_lOMEHCk\3M_d4O_D j_jj8__H4Q +SjQ=1ZO _r +j9S=Q4q__OH9rj;R +sfjj:ROlNEhRq7b.RsRHl#00NCN_lOMEHCk\3M_d4O_D j_jj8m +S=N#00lC_NHOEM3C\k4Md_ OD_jjj_H8_ +jSQ=N#00lC_NHOEM3C\k4Md_ OD_jjj_H8__S4 +Q14=Q_Z Or_H4 +9;sjRf:ljRNROEq.h7RHbslDRO O\3bCk_#40_4__j49rd +=SmO\D 3kOb_0C#__44jr_4dS9 +Qhj=_64d_SH +Qh4=_d4d_ +H;sjRf:ljRNROEq.h7RHbslDRO O\3bCk_#40_4r_jdS9 +mD=O O\3bCk_#40_4r_jdS9 +QOj=D3 \O_bkC_#04j4__d4r9Q +S4_=h4_dcHs; +R:fjjNRlOQERhbeRsRHlO\D 3kOb_0C#__44jr_HdS9 +mD=O O\3bCk_#40_49rd +jSQ= OD\b3Ok#_C04_4_djr9s; R:fjjNRlOQERhbeRsRHl1 QZ_HO_r 49S1m=Q_Z Or_H4S9 Q1j=Q_Z O9r4;R sfjj:ROlNEhRQesRbH#lR0CN0_OlNECHM\M3kdO4_Dj _j8j__jH_ =Sm#00NCN_lOMEHCk\3M_d4O_D j_jj8Q Sj0=#N_0ClENOH\MC3dkM4D_O j_jj__8Hs; +R:fjjNRlOQERhbeRsRHl#00NCN_lOMEHCq\31d_jjj_jjY_1hdB__SH +m0=#N_0ClENOH\MC3_q1j_djj_jj1BYh_Sd +Q#j=0CN0_OlNECHM\13q_jjd_jjj_h1YB__djs; +R:fjjNRlOQERhbeRsRHlk_M4Nj#_d.j__SH +mM=k4#_N_jjd_S. +Qkj=MN4_#d_jj__.js; +R:fjjNRlOQERhbeRsRHl#00NCN_lOMEHCk\3M_4(O_D j_djHm +S=N#00lC_NHOEM3C\k(M4_ OD_jjd +jSQ=N#00lC_NHOEM3C\k(M4_ OD_jjd_ +j;sjRf:ljRNROEQRheblsHRN#00lC_NHOEM3C\k(M6_ OD_jjj_H8_ +=Sm#00NCN_lOMEHCk\3M_6(O_D j_jj8Q +Sj0=#N_0ClENOH\MC36kM(D_O j_jj__8js; R:fjjNRlOQERhbeRsRHl)QQ1hBt_pqi_vqQt_SH mQ=)1tQh_iBp_QqvtHq_ jSQ=1)QQ_htB_piqtvQqs; @@ -1408,183 +1294,114 @@ jSQ=_Atj_djOs; R:fjjNRlOQERhbeRsRHl#00NCN_lOMEHCk\3MO4_Dj _dHj_ =Sm#00NCN_lOMEHCk\3MO4_Dj _dSj Q#j=0CN0_OlNECHM\M3k4D_O d_jj;_j -fsRjR:jlENOReQhRHbsl0R#N_0ClENOH\MC34kM(D_O d_jj -_HS#m=0CN0_OlNECHM\M3k4O(_Dj _dSj -Q#j=0CN0_OlNECHM\M3k4O(_Dj _djj_;R -sfjj:ROlNEhRQesRbHklRMN4_#d_jj__.Hm -S=4kM__N#j_dj.Q -SjM=k4#_N_jjd_j._;R -sfjj:ROlNEhRQesRbH#lR0CN0_OlNECHM\13q_jjd_jjj_h1YB__dHm -S=N#00lC_NHOEM3C\qj1_djj_j1j_Y_hBdQ -Sj0=#N_0ClENOH\MC3_q1j_djj_jj1BYh_.d_;R -sfjj:ROlNEhRQesRbHhlR_g4j_SH -m_=h4_jgHQ -Sj_=h4;jg +fsRjR:jlENOReQhRHbsl_RhgH(_ +=Smh(_g_SH +Qhj=_;g( fsRjR:jlENOReQhRHbslMRk4o_L_jjd_SH mM=k4o_L_jjd jSQ=4kM__Loj_djjs; -R:fjjNRlOQERhbeRsRHlh4_44 -_HShm=_444_SH -Qhj=_444;R -sfjj:ROlNEhRQesRbHhlR_.4._SH -m_=h4_..HQ -Sj_=h4;.. -fsRjR:jlENOReQhRHbsl_Rh4_c(Hm -S=4h_cH(_ -jSQ=4h_c -(;sjRf:ljRNROEQRheblsHR OD\b3Ok#_C04_4_Hj_r -d9SOm=D3 \O_bkC_#04d4r9Q -SjD=O O\3bCk_#40_4r_jd -9;sjRf:ljRNROEQRheblsHR4h_nH4_ -=Smhn_44 -_HS=Qjhn_44s; -R:fjjNRlOQERhbeRsRHlq__OH9rj -=Smq__OH9rj -jSQ=Oq_r;j9 -fsRjR:jlENOReQhRHbsl0R#N_0ClENOH\MC31z7_jjj_aQh_HU_ -=Sm#00NCN_lOMEHCz\37j1_jQj_hUa_ -jSQ=N#00lC_NHOEM3C\z_71j_jjQ_haU;_j -fsRjR:jlENOReQhRHbsl0R#N_0ClENOH\MC31p7_jjj_aQh_HU_ -=Sm#00NCN_lOMEHCp\37j1_jQj_hUa_ -jSQ=N#00lC_NHOEM3C\p_71j_jjQ_haU;_j -fsRjR:jlENOReQhRHbsl_Rh4_4dHm -S=4h_4Hd_ -jSQ=4h_4 -d;sjRf:ljRNROEQRheblsHR_1vqtvQq#_M_.Hr9m -S=_1vqtvQq#_Mr -.9S=Qj1qv_vqQt__M#j9r.;R -sfjj:ROlNEhRQesRbHhlR_U44_SH -m_=h4_4UHQ -Sj_=h4;4U -fsRjR:jlENOReQhRHbsl_Rh4_4(Hm -S=4h_4H(_ -jSQ=4h_4 -(;sjRf:ljRNROEQRheblsHR_1vqtvQq#_M_6Hr9m -S=_1vqtvQq#_Mr -69S=Qj1qv_vqQt__M#j9r6;R -sfjj:ROlNEhRQesRbHhlR_d4._SH -m_=h4_.dHQ -Sj_=h4;.d -fsRjR:jlENOReQhRHbsl_Rh4_4gHm -S=4h_4Hg_ -jSQ=4h_4 -g;sjRf:ljRNROEQRheblsHR4h_.Hj_ -=Smh._4j -_HS=Qjh._4js; -R:fjjNRlOQERhbeRsRHl1qv_vqQt__M#H9r( -=Sm1qv_vqQt_rM#(S9 -Q1j=vv_qQ_tqMj#_r;(9 -fsRjR:jlENOReQhRHbslpRBiz_ma)_u -_HSBm=pmi_zua_)H _ -jSQ=iBp_amz_ u);R -sfjj:ROlNEhRQesRbH1lRvv_qQ_tqMH#___F.H9rn -=Smhj_4.Q -Sj_=h4_j.js; -R:fjjNRlOQERhbeRsRHl#00NCN_lOMEHCk\3M_6(O_D j_jj8 -_HS#m=0CN0_OlNECHM\M3k6O(_Dj _j8j_ -jSQ=N#00lC_NHOEM3C\k(M6_ OD_jjj_j8_;R -sfjj:ROlNEhRQesRbH1lRvv_qQ_tq7__j.s_3 -=Sm1qv_vqQt_j7__3._k -MdS=Qj)_1aOs; -R:fjjNRlOqERhR7.blsHR_1vqtvQq__7j__.3Sl -mv=1_Qqvt7q__.j__M3k4Q -Sj_=h4_jUHQ -S41=)a;_O -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq7__j.M_3 -=Sm1qv_vqQt_j7__3._k -MjS=Qj1qv_vqQt_.7r9Q -S4v=1_Qqvt7q__.j__M3kds; -R:fjjNRlOmER)b.RsRHl1qv_vqQt_j7__3._bm -S=4h_jQ -Sjv=1_Qqvt7q__.j__M3k4Q -S4v=1_Qqvt7q__.j__M3kjs; -R:fjjNRlOQERhbeRsRHlh4_4j -_HShm=_j44_SH -Qhj=_j44;R -sfjj:ROlNEhRQesRbH7lR1iqB_aQh_4j__ -3sS7m=1iqB_aQh_4j__M3kdQ -Sj1=7q_BiQ_ha4J_#lNkG;R -sfjj:ROlNEhRq7b.RsRHl7B1qih_Qa__j4l_3 -=Sm7B1qih_Qa__j4k_3MS4 -Q7j=1iqB_aQhr -49S=Q47B1qih_Qa__4#kJlG -N;sjRf:ljRNROEq.h7RHbsl1R7q_BiQ_haj__43SM -m1=7q_BiQ_haj__43jkM -jSQ=4h_4Hj_ -4SQ=q71BQi_hja__34_k;Md -fsRjR:jlENOR.m)RHbsl1R7q_BiQ_haj__43Sb -m_=h4Sd -Q7j=1iqB_aQh_4j__M3k4Q -S41=7q_BiQ_haj__43jkM;R -sfjj:ROlNEhRQesRbHelRvQq_hja_3Ss -mv=eqh_Qa3_jk -MdS=Qje_vqQ_ha4J_#lNkG;R -sfjj:ROlNEhRq7b.RsRHle_vqQ_haj -3lSem=vQq_hja_34kM -jSQ=qev_aQh -4SQ=qev_aQh_#4_JGlkNs; -R:fjjNRlOqERhR7.blsHRqev_aQh_Mj3 -=Sme_vqQ_hajM3kjQ -Sj0=#N_0ClENOH\MC34kMdD_O j_jj__8cQ -S4v=eqh_Qa3_jk;Md -fsRjR:jlENOR.m)RHbslvReqh_Qa3_jbm -S=4h_4Q +R:fjjNRlOQERhbeRsRHlB_pim_zau_) Hm +S=iBp_amz_ u)_SH +QBj=pmi_zua_) + ;sjRf:ljRNROEQRheblsHR_1vqtvQq#_M_FH_.r_HnS9 +m_=hgSc +Qhj=__gcjs; +R:fjjNRlOQERhbeRsRHl1qv_vqQt__M#H._F_jHr9m +S=gh_4Q +Sj_=hgj4_;R +sfjj:ROlNEhRQesRbH1lRvv_qQ_tqMH#___F.H9r4 +=Smh._g +jSQ=gh_.;_j +fsRjR:jlENOReQhRHbsl_Rh4_d4Hm +S=4h_dH4_ +jSQ=4h_d +4;sjRf:ljRNROEQRheblsHR4h_dH._ +=Smhd_4. +_HS=Qjhd_4.s; +R:fjjNRlOQERhbeRsRHlO\D 3kOb_0C#__44Hc_F_.Hr9m +S=4h_.Sc +Qhj=_c4._ +H;sjRf:ljRNROEQRheblsHR OD\b3Ok#_C04_4_Fj_cr_H4S9 +m_=h4 +.6S=Qjh._46;_H +fsRjR:jlENOReQhRHbslDRO O\3bCk_#40_4__jFHc_r +d9Shm=_n4. +jSQ=4h_.Hn_;R +sfjj:ROlNEhRQesRbHhlR_g4._SH +m_=h4_.gHQ +Sj_=h4;.g +fsRjR:jlENOReQhRHbsl_Rh4_.(Hm +S=4h_.H(_ +jSQ=4h_. +(;sjRf:ljRNROEQRheblsHR4h_.HU_ +=Smh._4U +_HS=Qjh._4Us; +R:fjjNRlOQERhbeRsRHlhd_4j +_HShm=_j4d_SH +Qhj=_j4d;R +sfjj:ROlNEhRQesRbHOlRD3 \O_bkC_#04j4__4Hr9m +S= OD\b3Ok#_C04_4r +49S=QjO\D 3kOb_0C#__44j9r4;R +sfjj:ROlNEhRQesRbHhlR_c4d_SH +m_=h4_dcHQ +Sj_=h4;dc +fsRjR:jlENOReQhRHbsl_Rh4_ddHm +S=4h_dHd_ +jSQ=4h_d +d;sjRf:ljRNROEQRheblsHR4h_dH6_ +=Smhd_46 +_HS=Qjhd_46s; +R:fjjNRlOQERhbeRsRHlhc_46 +_HShm=_64c_SH +Qhj=_64c;R +sfjj:ROlNEhRQesRbHqlR_HO_r +j9Sqm=_HO_r +j9S=Qjqr_Oj +9;sjRf:ljRNROEQRheblsHRN#00lC_NHOEM3C\z_71j_jjQ_haU +_HS#m=0CN0_OlNECHM\73z1j_jjh_Qa +_US=Qj#00NCN_lOMEHCz\37j1_jQj_hUa__ +j;sjRf:ljRNROEQRheblsHRN#00lC_NHOEM3C\p_71j_jjQ_haU +_HS#m=0CN0_OlNECHM\73p1j_jjh_Qa +_US=Qj#00NCN_lOMEHCp\37j1_jQj_hUa__ +j;sjRf:ljRNROEQRheblsHRgh_g +_HShm=__ggHQ +Sj_=hg +g;sjRf:ljRNROEQRheblsHR4h_4H._ +=Smh4_4. +_HS=Qjh4_4.s; +R:fjjNRlOQERhbeRsRHlhj_4j +_HShm=_j4j_SH +Qhj=_j4j;R +sfjj:ROlNEhRQesRbHhlR_44j_SH +m_=h4_j4HQ +Sj_=h4;j4 +fsRjR:jlENOReQhRHbslvR1_QqvtMq_#r_H.S9 +mv=1_QqvtMq_#9r. +jSQ=_1vqtvQq#_M_.jr9s; +R:fjjNRlOQERhbeRsRHlhj_4d +_HShm=_d4j_SH +Qhj=_d4j;R +sfjj:ROlNEhRQesRbHhlR_j44_SH +m_=h4_4jHQ +Sj_=h4;4j +fsRjR:jlENOReQhRHbslvR1_QqvtMq_#r_H(S9 +mv=1_QqvtMq_#9r( +jSQ=_1vqtvQq#_M_(jr9s; +R:fjjNRlOQERhbeRsRHle_vqQ_haj +3sSem=vQq_hja_3dkM +jSQ=qev_aQh_#4_JGlkNs; +R:fjjNRlOqERhR7.blsHRqev_aQh_lj3 +=Sme_vqQ_hajM3k4Q +Sjv=eqh_QaQ +S4v=eqh_Qa__4#kJlG +N;sjRf:ljRNROEq.h7RHbslvReqh_Qa3_jMm +S=qev_aQh_kj3MSj +Q#j=0CN0_OlNECHM\M3k4Od_Dj _j8j__Sc +Qe4=vQq_hja_3dkM;R +sfjj:ROlNE)Rm.sRbHelRvQq_hja_3Sb +m_=hUQ Sjv=eqh_Qa3_jk M4S=Q4e_vqQ_hajM3kjs; -R:fjjNRlOQERhbeRsRHle_uq1BYh_#4_JGlkN -_HSem=u1q_Y_hB4J_#lNkG_SH -Qej=u1q_Y_hB4J_#lNkG;R -sfjj:ROlNEhRQesRbHelRu1q_Y_hBj -3sSem=u1q_Y_hBjM3kdQ -Sju=eqY_1h4B__l#Jk_GN4s; -R:fjjNRlOqERhR7.blsHRqeu_h1YB3_jlm -S=qeu_h1YB3_jk -M4S=Qje_uq1BYh -4SQ=qeu_h1YB__4#kJlG4N_;R -sfjj:ROlNEhRq7b.RsRHle_uq1BYh_Mj3 -=Sme_uq1BYh_kj3MSj -Qej=u1q_Y_hB4J_#lNkG_SH -Qe4=u1q_Y_hBjM3kds; -R:fjjNRlOmER)b.RsRHle_uq1BYh_bj3 -=Smh -_nS=Qje_uq1BYh_kj3MS4 -Qe4=u1q_Y_hBjM3kjs; -R:fjjNRlOQERhbeRsRHlh4_4c -_HShm=_c44_SH -Qhj=_c44;R -sfjj:ROlNEhRQesRbHqlR1j_jjh_Qa3_jsm -S=_q1j_jjQ_hajM3kdQ -Sj1=q_jjj_aQh_#4_JGlkNs; -R:fjjNRlOqERhR7.blsHR_q1j_jjQ_haj -3lSqm=1j_jjh_Qa3_jk -M4S=Qjqj1_jQj_hSa -Qq4=1j_jjh_Qa__4#kJlG -N;sjRf:ljRNROEq.h7RHbsl1Rq_jjj_aQh_Mj3 -=Smqj1_jQj_hja_3jkM -jSQ=4h_4Hc_ -4SQ=_q1j_jjQ_hajM3kds; -R:fjjNRlOmER)b.RsRHlqj1_jQj_hja_3Sb -m_=h6Q -Sj1=q_jjj_aQh_kj3MS4 -Qq4=1j_jjh_Qa3_jk;Mj -fsRjR:jlENOReQhRHbslaR7q_Bi1BYh_#4_JGlkN -_HS7m=aiqB_h1YB__4#kJlGHN_ -jSQ=q7aB1i_Y_hB4J_#lNkG;R -sfjj:ROlNEhRQesRbH7lRaiqB_h1YB3_jsm -S=q7aB1i_Y_hBjM3kdQ -Sja=7q_Bi1BYh_#4_JGlkN;_4 -fsRjR:jlENOR7qh.sRbH7lRaiqB_h1YB3_jlm -S=q7aB1i_Y_hBjM3k4Q -Sja=7q_Bi1BYh -4SQ=q7aB1i_Y_hB4J_#lNkG_ -4;sjRf:ljRNROEq.h7RHbslaR7q_Bi1BYh_Mj3 -=Sm7BaqiY_1hjB_3jkM -jSQ=q7aB1i_Y_hB4J_#lNkG_SH -Q74=aiqB_h1YB3_jk;Md -fsRjR:jlENOR.m)RHbslaR7q_Bi1BYh_bj3 -=Smh -_dS=Qj7BaqiY_1hjB_34kM -4SQ=q7aB1i_Y_hBjM3kjs; R:fjjNRlOQERhbeRsRHlp_71j_jjQ_haj 3sSpm=7j1_jQj_hja_3dkM jSQ=.kM_ OD_jjd_ @@ -1615,230 +1432,360 @@ d;sjRf:ljRNROEmR).blsHR1z7_jjj_aQh_bj3 =Smh _4S=Qjz_71j_jjQ_hajM3k4Q S47=z1j_jjh_Qa3_jk;Mj -fsRjR:jlENOR7qh.sRbH#lR0CN0_OlNECHM\M3k6O(_Dj _j8j_ -=Sm#00NCN_lOMEHCk\3M_6(O_D j_jj8 -_jS=Qj7BaqiY_1hSB -Qe4=u1q_Y;hB fsRjR:jlENOReQhRHbslWR)_SH mW=)_SH Q)j=W;_O -fsRjR:jlENOReQhRHbslDRO G_Cb -_HSOm=DC _GHb_ -jSQ= OD_bCG;R -sfjj:ROlNEhRq7b.RsRHle_uq1BYh_#4_JGlkN -_4Sem=u1q_Y_hB4J_#lNkG_S4 -Qqj=1d_jj -_HS=Q4e_uq1BYh_#4_JGlkN;_H -fsRjR:jlENOR7qh.sRbHqlR1j_jjh_Qa__4#kJlGSN -m1=q_jjj_aQh_#4_JGlkNQ -Sj1=q_jjd_SH -Qh4=_c44_ -H;sjRf:ljRNROEQRheblsHRN#00lC_NHOEM3C\kdM4_ OD_jjj_H8_ -=Sm#00NCN_lOMEHCk\3M_4dO_D j_jj8 -_HS=Qj#00NCN_lOMEHCk\3M_4dO_D j_jj8s; -R:fjjNRlOQERhbeRsRHl#00NCN_lOMEHCk\3MOU_Dj _j8j__SH -m0=#N_0ClENOH\MC3UkM_ OD_jjj_H8_ -jSQ=N#00lC_NHOEM3C\k_MUO_D j_jj8s; -R:fjjNRlOqERhR7.blsHRqev_aQh_#4_JGlkNm -S=qev_aQh_#4_JGlkNQ -Sj0=#N_0ClENOH\MC3UkM_ OD_jjj_H8_ -4SQ=N#00lC_NHOEM3C\kdM4_ OD_jjj_H8_;R -sfjj:ROlNEhRQesRbHqlR1j_jjh_Qa -_HSqm=1j_jjh_Qa -_HS=Qjqj1_jQj_h -a;sjRf:ljRNROEQRheblsHR4Q_4Sg -m1=7q_BiH9r4 -jSQ=q71BOi_r;49 -fsRjR:jlENOR7qh.sRbH#lR0CN0_OlNECHM\M3k4Nd_#j_jjM_H0m -S=N#00lC_NHOEM3C\kdM4__N#j_jjH -M0S=Qjqj1_jQj_hHa_ -4SQ=q71BHi_r;49 fsRjR:jlENOReQhRHbsl1Rq_jjd_SH m1=q_jjd_SH Qqj=1d_jj;_O -fsRjR:jlENOR7qh.sRbH7lR1iqB_aQh_#4_JGlkNm -S=q71BQi_h4a__l#Jk -GNS=Qjqj1_dHj_ -4SQ=4h_4Hj_;R -sfjj:ROlNEhRQesRbHBlRpji_j7j__SH -mp=Bij_jj__7HQ -Sjp=Bij_jj;_7 -fsRjR:jlENOR7qh.sRbHOlRD3 \)QQ1hBt_pqi_vqQt_S4 -mD=O )\3Qh1Qtp_Biv_qQ_tq4Q -Sjp=Bij_jj__7HQ -S4p=Bij_jj;_O -fsRjR:jlENOReQhRHbslbROk#_C0__8H9rd -=SmO_bkC_#08r_HdS9 -QOj=bCk_#80_r;d9 -fsRjR:jlENOReQhRHbslbROk#_C0__8H9rj -=SmO_bkC_#08r_HjS9 -QOj=bCk_#80_r;j9 -fsRjR:jlENOReQhRHbsl_Rh4_jUHm -S=4h_jHU_ -jSQ=4h_j -U;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#r_HnS9 -m_=hgHc_ -jSQ=4h_4Hg_ -4SQ=4h_.Hd_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_rM#6S9 -mv=1_QqvtMq_#r_j6S9 -Qhj=_(44_SH -Qh4=_U44_ -H;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#9r. -=Sm1qv_vqQt__M#j9r. -jSQ=4h_4Hd_ -4SQ=4h_4Hc_;R -sfjj:ROlNEhRQesRbH1lRvv_qQ_tqH9r4 -=Sm1qv_vqQt_4Hr9Q -Sjv=1_Qqvt4qr9s; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_.Hr9m -S=_1vqtvQqr_H.S9 -Q1j=vv_qQrtq. -9;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#__HNj._r -n9Shm=_d4. -jSQ=_1vqtvQqr_H4S9 -Q14=vv_qQ_tqH9r.;R +fsRjR:jlENOR7qh.sRbHklRMO._Dj _d4j_ +=Smk_M.O_D j_dj4Q +Sj1=q_jjd_SH +Qh4=_64c;R +sfjj:ROlNEhRQesRbH#lR0CN0_OlNECHM\M3k4Od_Dj _j8j__SH +m0=#N_0ClENOH\MC34kMdD_O j_jj__8HQ +Sj0=#N_0ClENOH\MC34kMdD_O j_jj;_8 +fsRjR:jlENOReQhRHbsl0R#N_0ClENOH\MC3UkM_ OD_jjj_H8_ +=Sm#00NCN_lOMEHCk\3MOU_Dj _j8j__SH +Q#j=0CN0_OlNECHM\M3kUD_O j_jj;_8 +fsRjR:jlENOR7qh.sRbHelRvQq_h4a__l#Jk +GNSem=vQq_h4a__l#Jk +GNS=Qj#00NCN_lOMEHCk\3MOU_Dj _j8j__SH +Q#4=0CN0_OlNECHM\M3k4Od_Dj _j8j__ +H;sjRf:ljRNROEQRheblsHR_q1j_jjQ_haHm +S=_q1j_jjQ_haHQ +Sj1=q_jjj_aQh;R +sfjj:ROlNEhRQesRbHQlR_n4j +=Sm7B1qir_H4S9 +Q7j=1iqB_4Or9s; +R:fjjNRlOqERhR7.blsHRN#00lC_NHOEM3C\kdM4__N#j_jjH +M0S#m=0CN0_OlNECHM\M3k4Nd_#j_jjM_H0Q +Sj1=q_jjj_aQh_SH +Q74=1iqB_4Hr9s; +R:fjjNRlOQERhbeRsRHlB_pij_jj7 +_HSBm=pji_j7j__SH +QBj=pji_j7j_;R +sfjj:ROlNEhRq7b.RsRHlO\D 31)QQ_htB_piqtvQq +_4SOm=D3 \)QQ1hBt_pqi_vqQt_S4 +QBj=pji_j7j__SH +QB4=pji_jOj_;R +sfjj:ROlNEhRQesRbHOlRbCk_#80__dHr9m +S=kOb_0C#_H8_r +d9S=QjO_bkC_#089rd;R +sfjj:ROlNEhRQesRbHOlRbCk_#80__jHr9m +S=kOb_0C#_H8_r +j9S=QjO_bkC_#089rj;R +sfjj:ROlNEhRQesRbHOlRbCk_#j0__3d_sm +S=kOb_0C#_dj__M3kdQ +SjD=O k\3MOd_Dj _j8j_8s; +R:fjjNRlOqERhR7.blsHRkOb_0C#_dj__ +3lSOm=bCk_#j0__3d_k +M4S=QjO\D 3kOb_0C#_r44dS9 +QO4=D3 \k_MdO_D j_jj8 +8;sjRf:ljRNROEq.h7RHbslbROk#_C0__jdM_3 +=SmO_bkC_#0j__d3jkM +jSQ=kOb_0C#r +d9S=Q4O_bkC_#0j__d3dkM;R +sfjj:ROlNE)Rm.sRbHOlRbCk_#j0__3d_bm +S=4h_(Q +Sjb=Ok#_C0__jdk_3MS4 +QO4=bCk_#j0__3d_k;Mj +fsRjR:jlENOReQhRHbslbROk#_C0__j.s_3 +=SmO_bkC_#0j__.3dkM +jSQ= OD\M3kdD_O j_jj8_8;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0j__.3Sl +mb=Ok#_C0__j.k_3MS4 +Qhj=_.4._SH +QO4=D3 \k_MdO_D j_jj8 +8;sjRf:ljRNROEq.h7RHbslbROk#_C0__j.M_3 +=SmO_bkC_#0j__.3jkM +jSQ=kOb_0C#r +.9S=Q4O_bkC_#0j__.3dkM;R +sfjj:ROlNE)Rm.sRbHOlRbCk_#j0__3._bm +S=4h_nQ +Sjb=Ok#_C0__j.k_3MS4 +QO4=bCk_#j0__3._k;Mj +fsRjR:jlENOReQhRHbslbROk#_C0__j4s_3 +=SmO_bkC_#0j__43dkM +jSQ= OD\M3kdD_O j_jj8_8;R +sfjj:ROlNEhRq7b.RsRHlO_bkC_#0j__43Sl +mb=Ok#_C0__j4k_3MS4 +QOj=D3 \O_bkC_#0444r9Q +S4D=O k\3MOd_Dj _j8j_8s; +R:fjjNRlOqERhR7.blsHRkOb_0C#_4j__ +3MSOm=bCk_#j0__34_k +MjS=QjO_bkCr#04S9 +QO4=bCk_#j0__34_k;Md +fsRjR:jlENOR.m)RHbslbROk#_C0__j4b_3 +=Smh6_4 +jSQ=kOb_0C#_4j__M3k4Q +S4b=Ok#_C0__j4k_3M +j;sjRf:ljRNROEq.h7RHbslDRO k\3MOd_Dj _j8j_8__jNS. +mD=O k\3MOd_Dj _j8j_8Q +Sjp=Bij_jj +_7S=Q4B_pij_jj7H7_;R sfjj:ROlNEhRQesRbH#lR0CN0_OlNECHM\M3k4Od_Dj _j8j__H4_ =Sm#00NCN_lOMEHCk\3M_4dO_D j_jj8__4HQ Sj0=#N_0ClENOH\MC34kMdD_O j_jj__84s; R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M_rN.(S9 m_=h4 -.jS=Qj1qv_vqQtr +4jS=Qj1qv_vqQtr j9S=Q4#00NCN_lOMEHCk\3M_4dO_D j_jj8__4Hs; -R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M_NH_.9rn -=Smh4_4gQ -Sjp=Bij_jj__7HQ -S4_=h4;j. -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqMN#_.9r6 -=Smh4_4(Q -Sjp=Bij_jj__7HQ -S4v=1_Qqvt.qr9s; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_6Hr9m +S=_1vqtvQqr_H6S9 +Q1j=vv_qQrtq6 +9;sjRf:ljRNROEQRheblsHR_1vqtvQqr_HcS9 +mv=1_QqvtHq_r +c9S=Qj1qv_vqQtr;c9 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqMH#__rN.dS9 +m_=h4 +jdS=Qj1qv_vqQt_cHr9Q +S4v=1_QqvtHq_r;69 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqMN#_.r_j.S9 +m_=h4 +j.S=Qjh4_4.Q +S4v=1_Qqvtnqr9s; R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M_rN..S9 m_=h4 -4dS=QjB_pij_jj7Q +j4S=QjB_pij_jj7Q S4v=1_Qqvt6qr9s; -R:fjjNRlOqERhR7.blsHRN#00lC_NHOEM3C\p_71j_jjQ_haUm -S=N#00lC_NHOEM3C\p_71j_jjQ_haU -_jS=Qjhn_44 -_HS=Q4#00NCN_lOMEHCk\3M_d4O_D j_jj8s; -R:fjjNRlOqERhR7.blsHRN#00lC_NHOEM3C\z_71j_jjQ_haUm -S=N#00lC_NHOEM3C\z_71j_jjQ_haU -_jS=Qjq__OH9rj -4SQ=4h_nH4_;R -sfjj:ROlNEhRq7b.RsRHl7BaqiY_1h4B__l#Jk_GN4m -S=q7aB1i_Y_hB4J_#lNkG_S4 -Qqj=1d_jj -_HS=Q47BaqiY_1h4B__l#Jk_GNHs; -R:fjjNRlOqERhR7.blsHR.kM_ OD_jjd_S4 -mM=k.D_O d_jj -_4S=Qjqj1_dHj_ -4SQ=4h_n -4;sjRf:ljRNROEQRheblsHR_Atj_jjj -3sSAm=tj_jj3_jk -MdS=Qj#00NCN_lOMEHCk\3MO4_Dj _d -j;sjRf:ljRNROEq.h7RHbsltRA_jjj_lj3 -=SmAjt_jjj_34kM -jSQ=4kM__Loj -djS=Q4#00NCN_lOMEHCk\3MO4_Dj _d -j;sjRf:ljRNROEq.h7RHbsltRA_jjj_Mj3 -=SmAjt_jjj_3jkM -jSQ=_Atj_jjOQ -S4t=A_jjj_kj3M -d;sjRf:ljRNROEmR).blsHR_Atj_jjj -3bShm=_ -4.S=QjAjt_jjj_34kM -4SQ=_Atj_jjjM3kjs; -R:fjjNRlOQERhbeRsRHlqj1_djj_j1j_Y_hBj -3sSqm=1d_jjj_jjY_1hjB_3dkM -jSQ=N#00lC_NHOEM3C\k(M4_ OD_jjd;R -sfjj:ROlNEhRq7b.RsRHlqj1_djj_j1j_Y_hBj -3lSqm=1d_jjj_jjY_1hjB_34kM -jSQ=N#00lC_NHOEM3C\qj1_djj_j1j_Y_hBdQ -S40=#N_0ClENOH\MC34kM(D_O d_jjs; -R:fjjNRlOqERhR7.blsHR_q1j_djj_jj1BYh_Mj3 -=Smqj1_djj_j1j_Y_hBjM3kjQ -Sj1=q_jjd_jjj_h1YBQ -S41=q_jjd_jjj_h1YB3_jk;Md -fsRjR:jlENOR.m)RHbsl1Rq_jjd_jjj_h1YB3_jbm -S=(h_ -jSQ=_q1j_djj_jj1BYh_kj3MS4 -Qq4=1d_jjj_jjY_1hjB_3jkM;R -sfjj:ROlNEhRQesRbHwlRuBz_1h_Qa3_jsm -S=zwu__B1Q_hajM3kdQ -Sj0=#N_0ClENOH\MC34kM(D_O d_jjs; -R:fjjNRlOqERhR7.blsHRzwu__B1Q_haj -3lSwm=uBz_1h_Qa3_jk -M4S=Qjk_M4Nj#_d.j_ -4SQ=N#00lC_NHOEM3C\k(M4_ OD_jjd;R -sfjj:ROlNEhRq7b.RsRHlw_uzBQ1_hja_3SM -mu=wz1_B_aQh_kj3MSj -Qwj=uBz_1h_QaQ +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M_NH_.9r4 +=Smhj_4jQ +Sj_=hgS. +Q14=vv_qQ_tqH9rn;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt__M#H._Nr +j9Shm=_ +ggS=Qjh4_g +4SQ=_1vqtvQqr_H( +9;sjRf:ljRNROEQRheblsHR_1vqtvQqr_HnS9 +mv=1_QqvtHq_r +n9S=Qj1qv_vqQtr;n9 +fsRjR:jlENOReQhRHbslvR1_QqvtHq_r +(9S1m=vv_qQ_tqH9r( +jSQ=_1vqtvQq9r(;R +sfjj:ROlNEhRq7b.RsRHl#00NCN_lOMEHCk\3MO6_Dj _dHj__ +N.Shm=_ +g(S=Qj1qv_vqQt_nHr9Q +S4v=1_QqvtHq_r;(9 +fsRjR:jlENOR7qh.sRbH#lR0CN0_OlNECHM\73p1j_jjh_Qa +_US#m=0CN0_OlNECHM\73p1j_jjh_Qa__UjQ +Sj_=h4_c6HQ +S40=#N_0ClENOH\MC3dkM4D_O j_jj;_8 +fsRjR:jlENOR7qh.sRbH#lR0CN0_OlNECHM\73z1j_jjh_Qa +_US#m=0CN0_OlNECHM\73z1j_jjh_Qa__UjQ +Sj_=qOr_HjS9 +Qh4=_64c_ +H;sjRf:ljRNROEQRheblsHRkOb_0C#_.Hr9m +S=kOb_0C#_.Hr9Q +Sjb=Ok#_C09r.;R +sfjj:ROlNEhRQesRbHOlRbCk_#H0_r +d9SOm=bCk_#H0_r +d9S=QjO_bkCr#0d +9;sjRf:ljRNROEq.h7RHbslDRO O\3bCk_#40_4__jNjc_r +49Shm=_U4. +jSQ=kOb_0C#_.Hr9Q +S4b=Ok#_C0r_Hd +9;sjRf:ljRNROEQRheblsHRkOb_0C#_jHr9m +S=kOb_0C#_jHr9Q +Sjb=Ok#_C09rj;R +sfjj:ROlNEhRq7b.RsRHlO\D 3kOb_0C#__44jc_Nr +49Shm=_(4. +jSQ=4h_.S6 +QO4=bCk_#H0_r;j9 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqMH#__rF.4S9 +m_=hgj._ +jSQ=iBp_jjj_H7_ +4SQ=_1vqtvQq9r(;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt__M#H._Fr +j9Shm=__g4jQ +Sj1=q_jjj_aQh +4SQ=_1vqtvQq9rj;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_rM#(S9 +mv=1_QqvtMq_#r_j(S9 +Qhj=__gUHQ +S4_=h4_4jHs; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M_dHr9m +S=Uh_j +_HS=QjB_pij_jj7 +_HS=Q4hj_4d;_H +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqM.#r9m +S=_1vqtvQq#_M_.jr9Q +Sj_=h4_j4HQ +S4_=h4_j.Hs; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M_4Hr9m +S=(h_( +_HS=Qjhj_4j +_HS=Q4h4_4.;_H +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqMH#_r +j9Shm=__(6HQ +Sjp=Bij_jj +_7S=Q4hg_g_ +H;sjRf:ljRNROEQRheblsHR_q1j_djj_jj1BYh_SH +m1=q_jjd_jjj_h1YB +_HS=Qjqj1_djj_j1j_Y;hB +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqMH#___N.j9r4 +=Smh4_4.Q +Sj1=q_jjd_jjj_h1YB +_HS=Q4O\D 3dkM_ OD_jjj_;88 +fsRjR:jlENOReQhRHbslpRBij_jj7_7_SH +mp=Bij_jj7_7_SH +QBj=pji_j7j_7s; +R:fjjNRlOQERhbeRsRHl7j1_dHj_ +=Sm7j1_dHj_ +jSQ=_71j_djOs; +R:fjjNRlOqERhR7.blsHRqeu_h1YB__4#kJlGdN_ +=Smhd_46 +_4S=QjO_bkC_#0H9rj +4SQ=kOb_0C#_4Hr9s; +R:fjjNRlOqERhR7.blsHR OD\b3Ok#_C04_4_Nj_cr_4dS9 +m_=h4 +d6S=Qjhd_46 +_4S=Q4O_bkC_#0H9r.;R +sfjj:ROlNEhRQesRbHzlR7j1_jQj_hja__l#Jk_GN4 +_HSzm=7j1_jQj_hja__l#Jk_GN4 +_HS=Qjz_71j_jjQ_hajJ_#lNkG_ +4;sjRf:ljRNROEQRheblsHR1z7_jjj_aQh_#j_JGlkN +_HSzm=7j1_jQj_hja__l#Jk_GNHQ +Sj7=z1j_jjh_Qa__j#kJlG +N;sjRf:ljRNROEq.h7RHbslMRk.D_O d_jj__4gSd +m_=h4 +c6S=Qjz_71j_jjQ_hajJ_#lNkG_H4_ +4SQ=1z7_jjj_aQh_#j_JGlkN;_H +fsRjR:jlENOR7qh.sRbHOlRD3 \O_bkC_#04j4__rFcdS9 +m_=h4_.nHQ +Sjb=Ok#_C09rj +4SQ=kOb_0C#r;49 +fsRjR:jlENOR7qh.sRbHOlRD3 \O_bkC_#04j4__rFc4S9 +m_=h4_.6HQ +Sjb=Ok#_C0r_H4S9 +QO4=bCk_#H0_r;d9 +fsRjR:jlENOReQhRHbslbROk#_C0r_H4S9 +mb=Ok#_C0r_H4S9 +QOj=bCk_#40r9s; +R:fjjNRlOqERhR7.blsHR OD\b3Ok#_C04_4_FH_c9r. +=Smh._4c +_HS=QjO_bkCr#04S9 +QO4=bCk_#.0r9s; +R:fjjNRlOqERhR7.blsHR OD\b3Ok#_C04_4_.Hr9m +S=4h_.H._ +jSQ=4h_dH4_ +4SQ=4h_dH._;R +sfjj:ROlNEhRq7b.RsRHlO\D 3kOb_0C#__44jc_N_djr9m +S=4h_dSc +Qhj=_n4._SH +QO4=bCk_#H0_r;.9 +fsRjR:jlENOR7qh.sRbHOlRD3 \O_bkC_#04j4__rNcdS9 +m_=h4 +ddS=Qjh._4nQ +S4b=Ok#_C09rd;R +sfjj:ROlNEhRq7b.RsRHlO\D 3kOb_0C#__44jc_N_4.r9m +S=4h_dSj +Qhj=_c4._SH +QO4=bCk_#d0r9s; +R:fjjNRlOqERhR7.blsHR OD\b3Ok#_C04_4_Nj_cr_44S9 +m_=h4 +.gS=Qjh._46 +_HS=Q4O_bkCr#0j +9;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC36kM(D_O j_jj +_8S#m=0CN0_OlNECHM\M3k6O(_Dj _j8j__Sj +Q7j=aiqB_h1YBQ +S4u=eqY_1h +B;sjRf:ljRNROEQRheblsHRzwu__B1Q_haj +3sSwm=uBz_1h_Qa3_jk +MdS=Qj#00NCN_lOMEHCk\3M_4(O_D j;dj +fsRjR:jlENOR7qh.sRbHwlRuBz_1h_Qa3_jlm +S=zwu__B1Q_hajM3k4Q +SjM=k4#_N_jjd_S. +Q#4=0CN0_OlNECHM\M3k4O(_Dj _d +j;sjRf:ljRNROEq.h7RHbsluRwz1_B_aQh_Mj3 +=Smw_uzBQ1_hja_3jkM +jSQ=zwu__B1Q +haS=Q4w_uzBQ1_hja_3dkM;R +sfjj:ROlNE)Rm.sRbHwlRuBz_1h_Qa3_jbm +S=ch_ +jSQ=zwu__B1Q_hajM3k4Q S4u=wz1_B_aQh_kj3M -d;sjRf:ljRNROEmR).blsHRzwu__B1Q_haj -3bShm=_Sc -Qwj=uBz_1h_Qa3_jk -M4S=Q4w_uzBQ1_hja_3jkM;R -sfjj:ROlNEmRX)b.RsRHltj_4jm -S=4h_nSc -Qhj=_U4j -4SQ=_1vqtvQqr_7. -9;sjRf:ljRNROEX.m)RHbslpRBiz_ma)_u -_jShm=_ -..S=QjB_piBrhajS9 -QB4=pmi_zua_) - ;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC34kMdD_O j_jj__84m -S=N#00lC_NHOEM3C\kdM4_ OD_jjj_48_ -jSQ=_q1j_jjQ -haS=Q4B_pij_jj7s; -R:fjjNRlOQERhbeRsRHlO_bkC_#0H9rd -=SmO_bkC_#0H9rd -jSQ=kOb_0C#r;d9 -fsRjR:jlENOReQhRHbsl_RQ4 -.jS7m=aiqB_SH -Q7j=aiqB_ -O;sjRf:ljRNROEq.h7RHbslaR7q_Bi1BYh_#4_JGlkN__4jm -S=qeu_h1YB__4#kJlG4N__Sj -QBj=pji_j7j_ -4SQ=_1vqtvQq9rd;R -sfjj:ROlNEhRQesRbHelRu7q__SH -mu=eq__7HQ -Sju=eq;_7 -fsRjR:jlENOReQhRHbslvReqh_Qa -_HSem=vQq_hHa_ -jSQ=qev_aQh;R -sfjj:ROlNEhRQesRbH1lRvv_qQ_tqH9rd -=Sm1qv_vqQt_dHr9Q -Sjv=1_Qqvtdqr9s; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_jHr9m -S=_1vqtvQqr_HjS9 -Q1j=vv_qQrtqj -9;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#__HFn.r9m -S=4h_jj._ -jSQ=iBp_amz_ u)_SH -Q14=vv_qQrtq4 -9;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#9r( -=Sm1qv_vqQt__M#j9r( -jSQ=4h_4Hj_ -4SQ=4h_.Hj_;R -sfjj:ROlNEmRX)b.RsRHltU_g -=Smhn_4.Q -Sj_=h4 -jnS=Q41qv_vqQt_j7r9s; -R:fjjNRlOXERmR).blsHRgt_gm -S=4h_nSd -Qhj=_(4j -4SQ=_1vqtvQqr_74 -9;sjRf:ljRNROEQRheblsHRN#00lC_NHOEM3C\k.Mc_ OD_jjd_SH -m0=#N_0ClENOH\MC3ckM.D_O d_jj -_HS=Qj#00NCN_lOMEHCk\3M_c.O_D j;dj -fsRjR:jlENOR7qh.sRbHklRMN4_#d_jj -_.Skm=MN4_#d_jj__.jQ +j;sjRf:ljRNROEQRheblsHR_q1j_jjQ_haj +3sSqm=1j_jjh_Qa3_jk +MdS=Qjqj1_jQj_h4a__l#Jk;GN +fsRjR:jlENOR7qh.sRbHqlR1j_jjh_Qa3_jlm +S=_q1j_jjQ_hajM3k4Q +Sj1=q_jjj_aQh +4SQ=_q1j_jjQ_ha4J_#lNkG;R +sfjj:ROlNEhRq7b.RsRHlqj1_jQj_hja_3SM +m1=q_jjj_aQh_kj3MSj +Qhj=_.4j_SH +Qq4=1j_jjh_Qa3_jk;Md +fsRjR:jlENOR.m)RHbsl1Rq_jjj_aQh_bj3 +=Smh +_6S=Qjqj1_jQj_hja_34kM +4SQ=_q1j_jjQ_hajM3kjs; +R:fjjNRlOQERhbeRsRHle_uq1BYh_sj3 +=Sme_uq1BYh_kj3MSd +Qej=u1q_Y_hB4J_#lNkG_ +4;sjRf:ljRNROEq.h7RHbsluReqY_1hjB_3Sl +mu=eqY_1hjB_34kM +jSQ=qeu_h1YBQ +S4u=eqY_1h4B__l#Jk_GN4s; +R:fjjNRlOqERhR7.blsHRqeu_h1YB3_jMm +S=qeu_h1YB3_jk +MjS=Qje_uq1BYh_#4_JGlkN +_HS=Q4e_uq1BYh_kj3M +d;sjRf:ljRNROEmR).blsHRqeu_h1YB3_jbm +S=nh_ +jSQ=qeu_h1YB3_jk +M4S=Q4e_uq1BYh_kj3M +j;sjRf:ljRNROEQRheblsHR_q1j_djj_jj1BYh_sj3 +=Smqj1_djj_j1j_Y_hBjM3kdQ +Sj0=#N_0ClENOH\MC34kM(D_O d_jjs; +R:fjjNRlOqERhR7.blsHR_q1j_djj_jj1BYh_lj3 +=Smqj1_djj_j1j_Y_hBjM3k4Q +Sj0=#N_0ClENOH\MC3_q1j_djj_jj1BYh_Sd +Q#4=0CN0_OlNECHM\M3k4O(_Dj _d +j;sjRf:ljRNROEq.h7RHbsl1Rq_jjd_jjj_h1YB3_jMm +S=_q1j_djj_jj1BYh_kj3MSj +Qqj=1d_jjj_jjY_1hSB +Qq4=1d_jjj_jjY_1hjB_3dkM;R +sfjj:ROlNE)Rm.sRbHqlR1d_jjj_jjY_1hjB_3Sb +m_=h(Q +Sj1=q_jjd_jjj_h1YB3_jk +M4S=Q4qj1_djj_j1j_Y_hBjM3kjs; +R:fjjNRlOqERhR7.blsHRN#00lC_NHOEM3C\k(M4_ OD_jjd +=Sm#00NCN_lOMEHCk\3M_4(O_D j_djjQ Sj1=q_jjd_SH -Q#4=0CN0_OlNECHM\M3kcO._Dj _d -j;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC34kM(D_O d_jjm -S=N#00lC_NHOEM3C\k(M4_ OD_jjd_Sj -Qqj=1d_jj -_HS=Q4B_pij_djHs; +QB4=pji_dHj_;R +sfjj:ROlNEhRQesRbHhlR_.4j_SH +m_=h4_j.HQ +Sj_=h4;j. +fsRjR:jlENOR7qh.sRbHqlR1j_jjh_Qa__4#kJlGSN +m1=q_jjj_aQh_#4_JGlkNQ +Sj1=q_jjd_SH +Qh4=_.4j_ +H;sjRf:ljRNROEQRheblsHRqeu_h1YB__4#kJlGHN_ +=Sme_uq1BYh_#4_JGlkN +_HS=Qje_uq1BYh_#4_JGlkNs; +R:fjjNRlOqERhR7.blsHRqeu_h1YB__4#kJlG4N_ +=Sme_uq1BYh_#4_JGlkN +_4S=Qjqj1_dHj_ +4SQ=qeu_h1YB__4#kJlGHN_;R +sfjj:ROlNEhRQesRbH#lR0CN0_OlNECHM\M3kcO._Dj _dHj_ +=Sm#00NCN_lOMEHCk\3M_c.O_D j_djHQ +Sj0=#N_0ClENOH\MC3ckM.D_O d_jjs; +R:fjjNRlOqERhR7.blsHR4kM__N#j_dj.m +S=4kM__N#j_dj. +_jS=Qjqj1_dHj_ +4SQ=N#00lC_NHOEM3C\k.Mc_ OD_jjd;R +sfjj:ROlNEmRX)b.RsRHlO_bkC_#0j9rj +=Smhc_4 +jSQ= OD\M3kdD_O j_jj8_8 +4SQ=kOb_0C#r;j9 +fsRjR:jlENOR7qh.sRbH#lR0CN0_OlNECHM\M3k4Od_Dj _j8j__S4 +m0=#N_0ClENOH\MC34kMdD_O j_jj__84Q +Sj1=q_jjj_aQh +4SQ=iBp_jjj_ +7;sjRf:ljRNROEQRheblsHRqeu_H7_ +=Sme_uq7 +_HS=Qje_uq7s; R:fjjNRlOQERhbeRsRHlB_pij_djHm S=iBp_jjd_SH QBj=pji_dOj_;R @@ -1871,7 +1818,7 @@ R:fjjNRlOqERhR7.blsHRpQu_jjd_.j__ MjS=QjQ_upj_djO9r. 4SQ=pQu_jjd_.j__M3kds; R:fjjNRlOmER)b.RsRHlQ_upj_djj__.3Sb -m_=h4Sn +m_=h4Sd QQj=ujp_djj__3._k M4S=Q4Q_upj_djj__.3jkM;R sfjj:ROlNEhRQesRbHQlRujp_djj__34_sm @@ -1887,7 +1834,7 @@ jSQ=pQu_jjd_4Or9Q S4u=Qpd_jj__j4k_3M d;sjRf:ljRNROEmR).blsHRpQu_jjd_4j__ 3bShm=_ -46S=QjQ_upj_djj__434kM +4.S=QjQ_upj_djj__434kM 4SQ=pQu_jjd_4j__M3kjs; R:fjjNRlOQERhbeRsRHlQ_upj_djj__j3Ss mu=Qpd_jj__jjk_3MSd @@ -1901,7 +1848,7 @@ S=pQu_jjd_jj__M3kjQ Sju=Qpd_jjr_OjS9 QQ4=ujp_djj__3j_k;Md fsRjR:jlENOR.m)RHbsluRQpd_jj__jjb_3 -=Smhc_4 +=Smh4_4 jSQ=pQu_jjd_jj__M3k4Q S4u=Qpd_jj__jjk_3M j;sjRf:ljRNROEQRheblsHRqAtBji_dQj_hja_3Ss @@ -1916,186 +1863,164 @@ fsRjR:jlENOR7qh.sRbHAlRtiqB_jjd_aQh_Mj3 MjS=QjABtqid_jjh_QaQ S4t=Aq_Bij_djQ_hajM3kds; R:fjjNRlOmER)b.RsRHlABtqid_jjh_Qa3_jbm -S=.h_4Q +S=4h_UQ Sjt=Aq_Bij_djQ_hajM3k4Q S4t=Aq_Bij_djQ_hajM3kjs; -R:fjjNRlOqERhR7.blsHR OD\b3Ok#_C04_4_Fj_c9r4 -=Smhd_4( -_HS=QjO_bkC_#0H9r4 -4SQ=kOb_0C#_dHr9s; -R:fjjNRlOqERhR7.blsHR OD\b3Ok#_C04_4_Fj_c9rd -=Smhd_4U -_HS=QjO_bkCr#0jS9 -QO4=bCk_#40r9s; -R:fjjNRlOQERhbeRsRHlz_71j_jjQ_hajJ_#lNkG_H4_ -=Smz_71j_jjQ_hajJ_#lNkG_H4_ -jSQ=1z7_jjj_aQh_#j_JGlkN;_4 -fsRjR:jlENOReQhRHbsl7Rz1j_jjh_Qa__j#kJlGHN_ -=Smz_71j_jjQ_hajJ_#lNkG_SH -Qzj=7j1_jQj_hja__l#Jk;GN -fsRjR:jlENOR7qh.sRbHklRMO._Dj _d4j__n4j -=Smhn_44Q -Sj7=z1j_jjh_Qa__j#kJlG4N__SH -Qz4=7j1_jQj_hja__l#Jk_GNHs; -R:fjjNRlOQERhbeRsRHlO_bkC_#0H9r. -=SmO_bkC_#0H9r. -jSQ=kOb_0C#r;.9 -fsRjR:jlENOR7qh.sRbHOlRD3 \O_bkC_#04j4___Nc49rd -=Smhc_4(Q -Sj_=h4_c(4Q -S4b=Ok#_C0r_H. -9;sjRf:ljRNROEQRheblsHR_1vqtvQqr_HcS9 +R:fjjNRlOQERhbeRsRHlhU_g_SH +m_=hgHU_ +jSQ=gh_Us; +R:fjjNRlOQERhbeRsRHl7B1qih_Qa__j4s_3 +=Sm7B1qih_Qa__j4k_3MSd +Q7j=1iqB_aQh_#4_JGlkNs; +R:fjjNRlOqERhR7.blsHRq71BQi_hja__34_lm +S=q71BQi_hja__34_k +M4S=Qj7B1qih_Qa9r4 +4SQ=q71BQi_h4a__l#Jk;GN +fsRjR:jlENOR7qh.sRbH7lR1iqB_aQh_4j__ +3MS7m=1iqB_aQh_4j__M3kjQ +Sj_=hgHU_ +4SQ=q71BQi_hja__34_k;Md +fsRjR:jlENOR.m)RHbsl1R7q_BiQ_haj__43Sb +m_=h4Sj +Q7j=1iqB_aQh_4j__M3k4Q +S41=7q_BiQ_haj__43jkM;R +sfjj:ROlNEhRQesRbHAlRtj_jj3_jsm +S=_Atj_jjjM3kdQ +Sj0=#N_0ClENOH\MC34kM_ OD_jjd;R +sfjj:ROlNEhRq7b.RsRHlAjt_jjj_3Sl +mt=A_jjj_kj3MS4 +Qkj=ML4_od_jjQ +S40=#N_0ClENOH\MC34kM_ OD_jjd;R +sfjj:ROlNEhRq7b.RsRHlAjt_jjj_3SM +mt=A_jjj_kj3MSj +QAj=tj_jj +_OS=Q4Ajt_jjj_3dkM;R +sfjj:ROlNE)Rm.sRbHAlRtj_jj3_jbm +S=gh_ +jSQ=_Atj_jjjM3k4Q +S4t=A_jjj_kj3M +j;sjRf:ljRNROEQRheblsHRq7aB1i_Y_hB4J_#lNkG_SH +ma=7q_Bi1BYh_#4_JGlkN +_HS=Qj7BaqiY_1h4B__l#Jk;GN +fsRjR:jlENOReQhRHbslaR7q_Bi1BYh_sj3 +=Sm7BaqiY_1hjB_3dkM +jSQ=q7aB1i_Y_hB4J_#lNkG_ +4;sjRf:ljRNROEq.h7RHbslaR7q_Bi1BYh_lj3 +=Sm7BaqiY_1hjB_34kM +jSQ=q7aB1i_Y +hBS=Q47BaqiY_1h4B__l#Jk_GN4s; +R:fjjNRlOqERhR7.blsHRq7aB1i_Y_hBj +3MS7m=aiqB_h1YB3_jk +MjS=Qj7BaqiY_1h4B__l#Jk_GNHQ +S4a=7q_Bi1BYh_kj3M +d;sjRf:ljRNROEmR).blsHRq7aB1i_Y_hBj +3bShm=_Sd +Q7j=aiqB_h1YB3_jk +M4S=Q47BaqiY_1hjB_3jkM;R +sfjj:ROlNEhRQesRbH1lRvv_qQ_tqH9r4 +=Sm1qv_vqQt_4Hr9Q +Sjv=1_Qqvt4qr9s; +R:fjjNRlOQERhbeRsRHl1qv_vqQt_.Hr9m +S=_1vqtvQqr_H.S9 +Q1j=vv_qQrtq. +9;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#__HNj._r +n9Shm=_g4j +jSQ=_1vqtvQqr_H4S9 +Q14=vv_qQ_tqH9r.;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt__M#H9rc +=Smh._U_SH +Qhj=_c4j_SH +Qh4=_64j_ +H;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#9r6 +=Sm1qv_vqQt__M#j9r6 +jSQ=4h_jHn_ +4SQ=4h_jH(_;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt__M#H9rn +=Smh6_U_SH +Qhj=_U4j_SH +Qh4=_g4j_ +H;sjRf:ljRNROEQRheblsHR_1vqtvQqr_HdS9 mv=1_QqvtHq_r -c9S=Qj1qv_vqQtr;c9 -fsRjR:jlENOReQhRHbslvR1_QqvtHq_r -n9S1m=vv_qQ_tqH9rn -jSQ=_1vqtvQq9rn;R -sfjj:ROlNEhRQesRbHOlRbCk_#H0_r -j9SOm=bCk_#H0_r -j9S=QjO_bkCr#0j -9;sjRf:ljRNROEq.h7RHbsluReqY_1h4B__l#Jk_GNdm -S=4h_c4(_ -jSQ=kOb_0C#_jHr9Q -S4b=Ok#_C0r_H4 -9;sjRf:ljRNROEQRheblsHR_q1j_djj_jj1BYh_SH -m1=q_jjd_jjj_h1YB -_HS=Qjqj1_djj_j1j_Y;hB -fsRjR:jlENOReQhRHbslbROk#_C0r_H4S9 -mb=Ok#_C0r_H4S9 -QOj=bCk_#40r9s; -R:fjjNRlOQERhbeRsRHl7j1_dHj_ -=Sm7j1_dHj_ -jSQ=_71j_djOs; -R:fjjNRlOXERmR).blsHRkOb_0C#_jjr9m -S=4h_(Q -SjD=O k\3MOd_Dj _j8j_8Q -S4b=Ok#_C09rj;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt__M#H._Nr -49Shm=_.4. -jSQ=_q1j_djj_jj1BYh_SH -QO4=D3 \k_MdO_D j_jj8 -8;sjRf:ljRNROEQRheblsHR_1vqtvQqr_H6S9 -mv=1_QqvtHq_r -69S=Qj1qv_vqQtr;69 -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqMH#__rN.dS9 -m_=h4 -.cS=Qj1qv_vqQt_cHr9Q -S4v=1_QqvtHq_r;69 -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqMj#r9m -S=_1vqtvQq#_M_jjr9Q -Sj_=h4_44HQ -S4_=h4_4.Hs; -R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M_dHr9m -S=Uh_g -_HS=QjB_pij_jj7 -_HS=Q4h._4c;_H -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqMH#_r -c9Shm=__g4HQ -Sj_=h4_46HQ -S4_=h4_4nHs; -R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M_FH_.9rc -=Smhj_44 -_jS=Qj1qv_vqQtr -d9S=Q4#00NCN_lOMEHCk\3M_6(O_D j_jj8;_j -fsRjR:jlENOR7qh.sRbHOlRD3 \O_bkC_#04j4__rNc4S9 -m_=h4 -dgS=Qjhd_4(Q -S4b=Ok#_C0r_Hj -9;sjRf:ljRNROEq.h7RHbslDRO O\3bCk_#40_4__jNjc_r -49Shm=_j4c -jSQ=kOb_0C#_.Hr9Q -S4b=Ok#_C0r_Hd -9;sjRf:ljRNROEq.h7RHbslDRO O\3bCk_#40_4__jN4c_r -49Shm=_44c -jSQ=4h_dH(_ -4SQ=kOb_0C#r;j9 -fsRjR:jlENOR7qh.sRbHOlRD3 \O_bkC_#04j4___Nc.9r4 -=Smhc_4.Q -Sj_=h4_dnHQ -S4b=Ok#_C09rd;R -sfjj:ROlNEhRq7b.RsRHlO\D 3kOb_0C#__44jc_Nr -d9Shm=_64c -jSQ=4h_dSU -QO4=bCk_#d0r9s; -R:fjjNRlOqERhR7.blsHR OD\b3Ok#_C04_4_Nj_cr_jdS9 -m_=h4 -cnS=Qjhd_4U -_HS=Q4O_bkC_#0H9r.;R -sfjj:ROlNEhRq7b.RsRHlO\D 3kOb_0C#__44H9r. -=Smhd_4c -_HS=Qjhc_4d -_HS=Q4hc_4c;_H -fsRjR:jlENOR7qh.sRbHOlRD3 \O_bkC_#04H4__rFc.S9 -m_=h4_dnHQ -Sjb=Ok#_C09r4 -4SQ=kOb_0C#r;.9 -fsRjR:jlENOReQhRHbsl_RqHnr.9m -S=Hq_r9.n -jSQ=Oq_r9.n;R -sfjj:ROlNEhRQesRbHqlR_.Hr(S9 -m_=qH(r.9Q -Sj_=qO(r.9s; -R:fjjNRlOQERhbeRsRHlqr_H. -U9Sqm=_.HrUS9 -Qqj=_.OrU -9;sjRf:ljRNROEQRheblsHRHq_r9.g -=Smqr_H. -g9S=Qjqr_O.;g9 -fsRjR:jlENOReQhRHbsl_RqHjrd9m -S=Hq_r9dj -jSQ=Oq_r9dj;R -sfjj:ROlNEhRQesRbHqlR_dHr4S9 -m_=qH4rd9Q -Sj_=qO4rd9s; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_(Hr9m -S=_1vqtvQqr_H(S9 -Q1j=vv_qQrtq( -9;sjRf:ljRNROEq.h7RHbsl0R#N_0ClENOH\MC36kM_ OD_jjd_NH_.m -S=4h_jSg -Q1j=vv_qQ_tqH9rn -4SQ=_1vqtvQqr_H( -9;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#._Nr -j9Shm=_444 -jSQ=iBp_jjj_S7 -Q14=vv_qQrtq( -9;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#._N_jjr9m -S=4h_4S. -Q1j=vv_qQrtqjS9 -Q#4=0CN0_OlNECHM\M3k4Od_Dj _j8j__ -4;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#._N_.jr9m -S=4h_4Sc -Qhj=_.4. -4SQ=_1vqtvQq9rn;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt__M#H._Nr -c9Shm=_644 -jSQ=iBp_jjj_H7_ -4SQ=4h_j -4;sjRf:ljRNROEq.h7RHbslvR1_QqvtMq_#__HNj._r -c9Shm=_n44 -jSQ=_1vqtvQqr_HdS9 -Q14=vv_qQ_tqH9rc;R -sfjj:ROlNEhRQesRbHBlRpji_j7j_7 -_HSBm=pji_j7j_7 -_HS=QjB_pij_jj7 -7;sjRf:ljRNROEq.h7RHbslDRO k\3MOd_Dj _j8j_8__jNS. -mD=O k\3MOd_Dj _j8j_8Q +d9S=Qj1qv_vqQtr;d9 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqMH#__rF.cS9 +m_=hgjd_ +jSQ=_1vqtvQq9rd +4SQ=N#00lC_NHOEM3C\k(M6_ OD_jjj_j8_;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt__M#H._Fr +n9Shm=__gcjQ +Sjp=Biz_ma)_u +_HS=Q41qv_vqQt_.Hr9s; +R:fjjNRlOqERhR7.blsHRq7aB1i_Y_hB4J_#lNkG_j4_ +=Sme_uq1BYh_#4_JGlkN__4jQ Sjp=Bij_jj -_7S=Q4B_pij_jj7H7_;R -sfjj:ROlNEhRQesRbH#lR0CN0_OlNECHM\M3k4Nd_#j_jjM_H0 -_HS#m=0CN0_OlNECHM\M3k4Nd_#j_jjM_H0 -_HS=Qj#00NCN_lOMEHCk\3M_4dNj#_jHj_M -0;sjRf:ljRNROEQRheblsHRa)1_SH -m1=)a -_HS=Qj)_1aOs; -R:fjjNRlOQERhbeRsRHlB_piB_haH9rj -=SmB_piB_haH9rj -jSQ=iBp_aBhr;j9 -fsRjR:jlENOReQhRHbsl_RqHcr.9m -S=Hq_r9.c -jSQ=Oq_r9.c;R -sfjj:ROlNEhRQesRbHqlR_.Hr6S9 -m_=qH6r.9Q -Sj_=qO6r.9s; +_7S=Q41qv_vqQtr;d9 +fsRjR:jlENOR)Xm.sRbHBlRpmi_zua_)j _ +=Smhg_4 +jSQ=iBp_aBhr +j9S=Q4B_pim_zau;) +fsRjR:jlENOReQhRHbsl_RQ4 +j(S7m=aiqB_SH +Q7j=aiqB_ +O;sjRf:ljRNROEQRheblsHRqev_aQh_SH +mv=eqh_Qa +_HS=Qje_vqQ;ha +fsRjR:jlENOR7qh.sRbH7lRaiqB_h1YB__4#kJlG4N_ +=Sm7BaqiY_1h4B__l#Jk_GN4Q +Sj1=q_jjd_SH +Q74=aiqB_h1YB__4#kJlGHN_;R +sfjj:ROlNEhRq7b.RsRHl7B1qih_Qa__4#kJlGSN +m1=7q_BiQ_ha4J_#lNkG +jSQ=_q1j_djHQ +S4_=hgHU_;R +sfjj:ROlNEhRQesRbHqlR_.HrcS9 +m_=qHcr.9Q +Sj_=qOcr.9s; +R:fjjNRlOQERhbeRsRHlqr_H. +69Sqm=_.Hr6S9 +Qqj=_.Or6 +9;sjRf:ljRNROEQRheblsHRHq_r9.n +=Smqr_H. +n9S=Qjqr_O.;n9 +fsRjR:jlENOReQhRHbsl_RqH(r.9m +S=Hq_r9.( +jSQ=Oq_r9.(;R +sfjj:ROlNEhRQesRbHqlR_.HrUS9 +m_=qHUr.9Q +Sj_=qOUr.9s; +R:fjjNRlOQERhbeRsRHlqr_H. +g9Sqm=_.HrgS9 +Qqj=_.Org +9;sjRf:ljRNROEQRheblsHRHq_r9dj +=Smqr_Hd +j9S=Qjqr_Od;j9 +fsRjR:jlENOReQhRHbsl_RqH4rd9m +S=Hq_r9d4 +jSQ=Oq_r9d4;R +sfjj:ROlNEhRq7b.RsRHl1qv_vqQt__M#H._Nr +c9Shm=_c4j +jSQ=iBp_jjj_H7_ +4SQ=gh_ds; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M_NH_.r_jcS9 +m_=h4 +j6S=Qj1qv_vqQt_dHr9Q +S4v=1_QqvtHq_r;c9 +fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tqMN#_.9r6 +=Smhj_4nQ +Sjp=Bij_jj__7HQ +S4v=1_Qqvt.qr9s; +R:fjjNRlOqERhR7.blsHR_1vqtvQq#_M_NH_.9rn +=Smhj_4UQ +Sjp=Bij_jj__7HQ +S4_=hg +c;sjRf:ljRNROEQRheblsHRN#00lC_NHOEM3C\kdM4__N#j_jjH_M0Hm +S=N#00lC_NHOEM3C\kdM4__N#j_jjH_M0HQ +Sj0=#N_0ClENOH\MC34kMd#_N_jjj_0HM;R +sfjj:ROlNEhRQesRbH)lR1Ha_ +=Sm)_1aHQ +Sj1=)a;_O +fsRjR:jlENOReQhRHbslpRBih_Bar_HjS9 +mp=Bih_Bar_HjS9 +QBj=pBi_hjar9s; R:fjjNRlOQERhbeRsRHlABtqid_jjh_Qa _HSAm=tiqB_jjd_aQh_SH QAj=tiqB_jjd_aQh;R @@ -2105,84 +2030,3 @@ Sju=Bzu_1q_B Os; R:fjjNRlOQERhbeRsRHlw_uzBQ1_hHa_ =Smw_uzBQ1_hHa_ jSQ=zwu__B1Q;ha -fsRjR:jlENOReQhRHbsl_Rh4_jnHm -S=4h_jHn_ -jSQ=4h_j -n;sjRf:ljRNROEQRheblsHR_1vqtvQq__7j__j3Ss -mv=1_Qqvt7q__jj__M3kdQ -Sj1=)a;_O -fsRjR:jlENOR7qh.sRbH1lRvv_qQ_tq7__jjl_3 -=Sm1qv_vqQt_j7__3j_k -M4S=Qjhj_4n -_HS=Q4)_1aOs; -R:fjjNRlOqERhR7.blsHR_1vqtvQq__7j__j3SM -mv=1_Qqvt7q__jj__M3kjQ -Sjv=1_Qqvt7q_r -j9S=Q41qv_vqQt_j7__3j_k;Md -fsRjR:jlENOR.m)RHbslvR1_Qqvt7q__jj__ -3bShm=_SU -Q1j=vv_qQ_tq7__jjk_3MS4 -Q14=vv_qQ_tq7__jjk_3M -j;sjRf:ljRNROEQRheblsHR4h_jH(_ -=Smhj_4( -_HS=Qjhj_4(s; -R:fjjNRlOQERhbeRsRHl1qv_vqQt_j7__34_sm -S=_1vqtvQq__7j__43dkM -jSQ=a)1_ -O;sjRf:ljRNROEq.h7RHbslvR1_Qqvt7q__4j__ -3lS1m=vv_qQ_tq7__j4k_3MS4 -Qhj=_(4j_SH -Q)4=1Oa_;R -sfjj:ROlNEhRq7b.RsRHl1qv_vqQt_j7__34_Mm -S=_1vqtvQq__7j__43jkM -jSQ=_1vqtvQqr_74S9 -Q14=vv_qQ_tq7__j4k_3M -d;sjRf:ljRNROEmR).blsHR_1vqtvQq__7j__43Sb -m_=hgQ -Sjv=1_Qqvt7q__4j__M3k4Q -S4v=1_Qqvt7q__4j__M3kjs; -R:fjjNRlOQERhbeRsRHlO_bkC_#0j__43Ss -mb=Ok#_C0__j4k_3MSd -QOj=D3 \k_MdO_D j_jj8 -8;sjRf:ljRNROEq.h7RHbslbROk#_C0__j4l_3 -=SmO_bkC_#0j__434kM -jSQ= OD\b3Ok#_C04_4r -49S=Q4O\D 3dkM_ OD_jjj_;88 -fsRjR:jlENOR7qh.sRbHOlRbCk_#j0__34_Mm -S=kOb_0C#_4j__M3kjQ -Sjb=Ok#_C09r4 -4SQ=kOb_0C#_4j__M3kds; -R:fjjNRlOmER)b.RsRHlO_bkC_#0j__43Sb -m_=h4SU -QOj=bCk_#j0__34_k -M4S=Q4O_bkC_#0j__43jkM;R -sfjj:ROlNEhRQesRbHOlRbCk_#j0__3._sm -S=kOb_0C#_.j__M3kdQ -SjD=O k\3MOd_Dj _j8j_8s; -R:fjjNRlOqERhR7.blsHRkOb_0C#_.j__ -3lSOm=bCk_#j0__3._k -M4S=Qjhd_4c -_HS=Q4O\D 3dkM_ OD_jjj_;88 -fsRjR:jlENOR7qh.sRbHOlRbCk_#j0__3._Mm -S=kOb_0C#_.j__M3kjQ -Sjb=Ok#_C09r. -4SQ=kOb_0C#_.j__M3kds; -R:fjjNRlOmER)b.RsRHlO_bkC_#0j__.3Sb -m_=h4Sg -QOj=bCk_#j0__3._k -M4S=Q4O_bkC_#0j__.3jkM;R -sfjj:ROlNEhRQesRbHOlRbCk_#j0__3d_sm -S=kOb_0C#_dj__M3kdQ -SjD=O k\3MOd_Dj _j8j_8s; -R:fjjNRlOqERhR7.blsHRkOb_0C#_dj__ -3lSOm=bCk_#j0__3d_k -M4S=QjO\D 3kOb_0C#_r44dS9 -QO4=D3 \k_MdO_D j_jj8 -8;sjRf:ljRNROEq.h7RHbslbROk#_C0__jdM_3 -=SmO_bkC_#0j__d3jkM -jSQ=kOb_0C#r -d9S=Q4O_bkC_#0j__d3dkM;R -sfjj:ROlNE)Rm.sRbHOlRbCk_#j0__3d_bm -S=.h_jQ -Sjb=Ok#_C0__jdk_3MS4 -QO4=bCk_#j0__3d_k;Mj diff --git a/Logic/BUS68030.srr b/Logic/BUS68030.srr index b6c1b9f..051b806 100644 --- a/Logic/BUS68030.srr +++ b/Logic/BUS68030.srr @@ -6,7 +6,7 @@ #Implementation: logic $ Start of Compile -#Thu May 15 22:17:20 2014 +#Thu May 15 22:21:47 2014 Synopsys VHDL Compiler, version comp201209rcp1, Build 283R, built Mar 19 2013 @N|Running in 64-bit mode @@ -20,12 +20,12 @@ File C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd changed - @N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":6:7:6:14|Synthesizing work.bus68030.behavioral @W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":109:7:109:15|Signal clk_030_d is undriven Post processing for work.bus68030.behavioral +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":100:29:100:31|Pruning register SM_AMIGA_D(2 downto 0) @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":105:52:105:55|Pruning register VMA_INT_D @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":91:32:91:34|Pruning register CLK_REF(1 downto 0) @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":220:2:220:3|Pruning register AS_000_START @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":113:38:113:40|Pruning register CLK_000_CNT(3 downto 0) @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":112:37:112:39|Pruning register FALLING_CLK_AMIGA -@A: CL282 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":100:29:100:31|Feedback mux created for signal SM_AMIGA_D[2:0] -- possible set/reset assignment for signal missing. Specifying a reset value will improve timing and area. @W: CL190 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":100:29:100:31|Optimizing register bit DSACK_INT(0) to a constant 1 @W: CL260 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":100:29:100:31|Pruning register bit 0 of DSACK_INT(1 downto 0) @W: CL189 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":124:2:124:3|Register bit CLK_CNT(1) is always 0, optimizing ... @@ -45,7 +45,7 @@ State machine has 8 reachable states with original encodings of: @W: CL249 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":220:2:220:3|Initial value is not supported on state machine SM_AMIGA @END Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Thu May 15 22:17:20 2014 +# Thu May 15 22:21:47 2014 ###########################################################] Map & Optimize Report @@ -69,17 +69,17 @@ original code -> new code Resource Usage Report Simple gate primitives: -DFFRH 7 uses +DFF 16 uses DFFSH 16 uses -DFF 19 uses +DFFRH 7 uses IBUF 35 uses BUFTH 7 uses OBUF 15 uses BI_DIR 2 uses -AND2 163 uses -INV 126 uses -OR2 20 uses -XOR2 5 uses +AND2 149 uses +INV 119 uses +OR2 17 uses +XOR2 2 uses @N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis. @@ -89,6 +89,6 @@ Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 31MB peak: 95MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Thu May 15 22:17:22 2014 +# Thu May 15 22:21:49 2014 ###########################################################] diff --git a/Logic/BUS68030.srs b/Logic/BUS68030.srs index 32e46a3..1cdfca0 100644 Binary files a/Logic/BUS68030.srs and b/Logic/BUS68030.srs differ diff --git a/Logic/bus68030.exf b/Logic/bus68030.exf index 122bd13..d611d91 100644 --- a/Logic/bus68030.exf +++ b/Logic/bus68030.exf @@ -55,136 +55,141 @@ Section Member Rename Array-Notation Array Number Port FC_0_ FC[0] 4 1 End Section Cross Reference File -Design 'BUS68030' created Thu May 15 22:17:27 2014 +Design 'BUS68030' created Thu May 15 22:21:53 2014 Type New Name Original Name // ---------------------------------------------------------------------- - Inst i_z2M2M AS_000 - Inst i_z2O2O UDS_000 - Inst i_z2P2P LDS_000 - Inst i_z3E3E BERR - Inst i_z4141 DTACK - Inst i_z4343 AVEC_EXP - Inst i_z4F4F CIIN - Inst SM_AMIGA_ns_i_7_ SM_AMIGA_ns_i[7] - Inst SM_AMIGA_ns_i_o2_i_6_ SM_AMIGA_ns_i_o2_i[6] - Inst state_machine_un57_clk_000_d_i state_machine.un57_clk_000_d_i - Inst SM_AMIGA_D_0_2__r SM_AMIGA_D_0_2_.r - Inst SM_AMIGA_D_0_2__m SM_AMIGA_D_0_2_.m - Inst SM_AMIGA_D_0_2__n SM_AMIGA_D_0_2_.n - Inst SM_AMIGA_D_0_2__p SM_AMIGA_D_0_2_.p - Inst DSACK_INT_0_1__r DSACK_INT_0_1_.r - Inst DSACK_INT_0_1__m DSACK_INT_0_1_.m - Inst DSACK_INT_0_1__n DSACK_INT_0_1_.n - Inst DSACK_INT_0_1__p DSACK_INT_0_1_.p - Inst VMA_INT_0_r VMA_INT_0.r - Inst VMA_INT_0_m VMA_INT_0.m - Inst VMA_INT_0_n VMA_INT_0.n - Inst VMA_INT_0_p VMA_INT_0.p - Inst VPA_SYNC_0_r VPA_SYNC_0.r - Inst VPA_SYNC_0_m VPA_SYNC_0.m - Inst VPA_SYNC_0_n VPA_SYNC_0.n - Inst VPA_SYNC_0_p VPA_SYNC_0.p - Inst AS_000_INT_0_r AS_000_INT_0.r - Inst AS_000_INT_0_m AS_000_INT_0.m - Inst AS_000_INT_0_n AS_000_INT_0.n - Inst AS_000_INT_0_p AS_000_INT_0.p - Inst DTACK_SYNC_0_r DTACK_SYNC_0.r - Inst DTACK_SYNC_0_m DTACK_SYNC_0.m - Inst DTACK_SYNC_0_n DTACK_SYNC_0.n - Inst DTACK_SYNC_0_p DTACK_SYNC_0.p - Inst LDS_000_INT_0_r LDS_000_INT_0.r - Inst LDS_000_INT_0_m LDS_000_INT_0.m + Inst i_z2J2J AS_000 + Inst i_z2L2L UDS_000 + Inst i_z2M2M LDS_000 + Inst i_z3B3B BERR + Inst i_z3U3U DTACK + Inst i_z4040 AVEC_EXP + Inst i_z4C4C CIIN Inst LDS_000_INT_0_n LDS_000_INT_0.n Inst LDS_000_INT_0_p LDS_000_INT_0.p Inst UDS_000_INT_0_r UDS_000_INT_0.r Inst UDS_000_INT_0_m UDS_000_INT_0.m Inst UDS_000_INT_0_n UDS_000_INT_0.n Inst UDS_000_INT_0_p UDS_000_INT_0.p - Inst SM_AMIGA_6_ SM_AMIGA[6] - Inst state_machine_un57_clk_000_d state_machine.un57_clk_000_d - Inst SM_AMIGA_5_ SM_AMIGA[5] - Inst SM_AMIGA_4_ SM_AMIGA[4] - Inst SM_AMIGA_3_ SM_AMIGA[3] - Inst SM_AMIGA_2_ SM_AMIGA[2] - Inst SM_AMIGA_1_ SM_AMIGA[1] Inst state_machine_un13_clk_000_d_i state_machine.un13_clk_000_d_i - Inst SM_AMIGA_0_ SM_AMIGA[0] Inst state_machine_un8_clk_000_d_i state_machine.un8_clk_000_d_i - Inst IPL_030DFFSH_1_ IPL_030DFFSH[1] - Inst IPL_030DFFSH_2_ IPL_030DFFSH[2] - Inst cpu_est_0_ cpu_est[0] - Inst cpu_est_1_ cpu_est[1] Inst state_machine_un13_as_000_int state_machine.un13_as_000_int - Inst cpu_est_2_ cpu_est[2] - Inst cpu_est_3_ cpu_est[3] - Inst SM_AMIGA_7_ SM_AMIGA[7] - Inst cpu_est_d_0_ cpu_est_d[0] Inst clk_RISING_CLK_AMIGA_1 clk.RISING_CLK_AMIGA_1 - Inst cpu_est_d_1_ cpu_est_d[1] Inst cpu_est_d_i_3_ cpu_est_d_i[3] - Inst cpu_est_d_2_ cpu_est_d[2] Inst cpu_est_d_i_0_ cpu_est_d_i[0] - Inst cpu_est_d_3_ cpu_est_d[3] - Inst SM_AMIGA_D_0_ SM_AMIGA_D[0] - Inst SM_AMIGA_ns_i_6_ SM_AMIGA_ns_i[6] - Inst SM_AMIGA_D_1_ SM_AMIGA_D[1] - Inst SM_AMIGA_ns_5_ SM_AMIGA_ns[5] - Inst SM_AMIGA_D_2_ SM_AMIGA_D[2] - Inst SM_AMIGA_ns_2_ SM_AMIGA_ns[2] - Inst IPL_030DFFSH_0_ IPL_030DFFSH[0] - Inst SM_AMIGA_i_1_ SM_AMIGA_i[1] - Inst SM_AMIGA_i_2_ SM_AMIGA_i[2] - Inst SM_AMIGA_ns_i_a2_0_6_ SM_AMIGA_ns_i_a2_0[6] + Inst cpu_est_0_3__r cpu_est_0_3_.r + Inst cpu_est_0_3__m cpu_est_0_3_.m + Inst cpu_est_0_3__n cpu_est_0_3_.n + Inst cpu_est_0_3__p cpu_est_0_3_.p + Inst cpu_est_0_2__r cpu_est_0_2_.r + Inst cpu_est_0_2__m cpu_est_0_2_.m + Inst cpu_est_0_2__n cpu_est_0_2_.n + Inst cpu_est_0_2__p cpu_est_0_2_.p + Inst cpu_est_0_1__r cpu_est_0_1_.r + Inst cpu_est_0_1__m cpu_est_0_1_.m + Inst cpu_est_0_1__n cpu_est_0_1_.n + Inst cpu_est_0_1__p cpu_est_0_1_.p + Inst clk_un3_clk_000_dd_0_a2 clk.un3_clk_000_dd_0_a2 Inst state_machine_un13_clk_000_d_1_i state_machine.un13_clk_000_d_1_i Inst SM_AMIGA_ns_a2_7_ SM_AMIGA_ns_a2[7] - Inst SM_AMIGA_ns_i_a2_6_ SM_AMIGA_ns_i_a2[6] - Inst DSACK_INT_1_ DSACK_INT[1] - Inst SM_AMIGA_ns_a2_5_ SM_AMIGA_ns_a2[5] + Inst SM_AMIGA_i_5_ SM_AMIGA_i[5] + Inst SM_AMIGA_i_4_ SM_AMIGA_i[4] + Inst SM_AMIGA_ns_i_a2_3_ SM_AMIGA_ns_i_a2[3] + Inst SM_AMIGA_ns_a2_0_2_ SM_AMIGA_ns_a2_0[2] Inst SM_AMIGA_ns_a2_2_ SM_AMIGA_ns_a2[2] + Inst SM_AMIGA_ns_i_a2_1_ SM_AMIGA_ns_i_a2[1] + Inst SM_AMIGA_ns_i_a2_0_ SM_AMIGA_ns_i_a2[0] + Inst SM_AMIGA_i_6_ SM_AMIGA_i[6] + Inst SM_AMIGA_i_7_ SM_AMIGA_i[7] + Inst cpu_est_3_ cpu_est[3] + Inst state_machine_un5_clk_030_i_a2 state_machine.un5_clk_030_i_a2 + Inst SM_AMIGA_7_ SM_AMIGA[7] Inst state_machine_LDS_000_INT_8 state_machine.LDS_000_INT_8 + Inst SM_AMIGA_6_ SM_AMIGA[6] Inst state_machine_UDS_000_INT_8 state_machine.UDS_000_INT_8 - Inst BG_000_0_r BG_000_0.r - Inst BG_000_0_m BG_000_0.m - Inst BG_000_0_n BG_000_0.n + Inst SM_AMIGA_5_ SM_AMIGA[5] + Inst cpu_est_i_2_ cpu_est_i[2] + Inst SM_AMIGA_4_ SM_AMIGA[4] + Inst cpu_est_i_3_ cpu_est_i[3] + Inst SM_AMIGA_3_ SM_AMIGA[3] + Inst clk_cpu_est_11_0_a4_0_1_ clk.cpu_est_11_0_a4_0[1] + Inst SM_AMIGA_2_ SM_AMIGA[2] + Inst cpu_est_i_0_ cpu_est_i[0] + Inst SM_AMIGA_1_ SM_AMIGA[1] + Inst clk_cpu_est_11_0_a4_1_ clk.cpu_est_11_0_a4[1] + Inst SM_AMIGA_0_ SM_AMIGA[0] + Inst SM_AMIGA_ns_i_o2_1_ SM_AMIGA_ns_i_o2[1] + Inst cpu_est_d_0_ cpu_est_d[0] + Inst SM_AMIGA_ns_i_o2_0_ SM_AMIGA_ns_i_o2[0] + Inst cpu_est_d_1_ cpu_est_d[1] + Inst SM_AMIGA_ns_7_ SM_AMIGA_ns[7] + Inst cpu_est_d_2_ cpu_est_d[2] + Inst SM_AMIGA_ns_i_3_ SM_AMIGA_ns_i[3] + Inst cpu_est_d_3_ cpu_est_d[3] + Inst SM_AMIGA_ns_2_ SM_AMIGA_ns[2] + Inst IPL_030DFFSH_0_ IPL_030DFFSH[0] + Inst SM_AMIGA_ns_i_1_ SM_AMIGA_ns_i[1] + Inst IPL_030DFFSH_1_ IPL_030DFFSH[1] + Inst SM_AMIGA_ns_i_0_ SM_AMIGA_ns_i[0] + Inst IPL_030DFFSH_2_ IPL_030DFFSH[2] + Inst cpu_est_0_ cpu_est[0] + Inst SM_AMIGA_ns_i_a2_0_1_ SM_AMIGA_ns_i_a2_0[1] + Inst cpu_est_1_ cpu_est[1] + Inst cpu_est_2_ cpu_est[2] + Inst clk_cpu_est_11_0_a4_1_3_ clk.cpu_est_11_0_a4_1[3] + Inst DSACK_INT_1_ DSACK_INT[1] + Inst clk_cpu_est_11_0_o4_3_ clk.cpu_est_11_0_o4[3] + Inst clk_cpu_est_11_0_o4_1_ clk.cpu_est_11_0_o4[1] + Inst cpu_est_i_1_ cpu_est_i[1] + Inst clk_cpu_est_11_i_o4_2_ clk.cpu_est_11_i_o4[2] + Inst clk_cpu_est_11_i_2_ clk.cpu_est_11_i[2] + Inst clk_cpu_est_11_0_a4_0_3_ clk.cpu_est_11_0_a4_0[3] + Inst clk_cpu_est_11_0_a4_3_ clk.cpu_est_11_0_a4[3] + Inst clk_cpu_est_11_0_a4_2_1_ clk.cpu_est_11_0_a4_2[1] + Inst clk_cpu_est_11_0_a4_1_1_ clk.cpu_est_11_0_a4_1[1] Inst CLK_CNT_0_ CLK_CNT[0] - Inst BG_000_0_p BG_000_0.p - Inst AS_030_000_SYNC_0_r AS_030_000_SYNC_0.r - Inst AS_030_000_SYNC_0_m AS_030_000_SYNC_0.m - Inst AS_030_000_SYNC_0_n AS_030_000_SYNC_0.n - Inst AS_030_000_SYNC_0_p AS_030_000_SYNC_0.p + Inst state_machine_un57_clk_000_d state_machine.un57_clk_000_d Inst FPU_CS_INT_0_r FPU_CS_INT_0.r Inst FPU_CS_INT_0_m FPU_CS_INT_0.m Inst FPU_CS_INT_0_n FPU_CS_INT_0.n Inst FPU_CS_INT_0_p FPU_CS_INT_0.p + Inst AS_000_INT_0_r AS_000_INT_0.r + Inst AS_000_INT_0_m AS_000_INT_0.m + Inst AS_000_INT_0_n AS_000_INT_0.n + Inst AS_000_INT_0_p AS_000_INT_0.p + Inst VPA_SYNC_0_r VPA_SYNC_0.r + Inst VPA_SYNC_0_m VPA_SYNC_0.m Inst SIZE_0_ SIZE[0] - Inst state_machine_un13_clk_000_d_1 state_machine.un13_clk_000_d_1 + Inst VPA_SYNC_0_n VPA_SYNC_0.n Inst SIZE_1_ SIZE[1] - Inst cpu_est_i_3_ cpu_est_i[3] + Inst VPA_SYNC_0_p VPA_SYNC_0.p Inst A_0_ A[0] + Inst AS_030_000_SYNC_0_r AS_030_000_SYNC_0.r Inst A_16_ A[16] + Inst AS_030_000_SYNC_0_m AS_030_000_SYNC_0.m Inst A_17_ A[17] + Inst AS_030_000_SYNC_0_n AS_030_000_SYNC_0.n Inst A_18_ A[18] + Inst AS_030_000_SYNC_0_p AS_030_000_SYNC_0.p Inst A_19_ A[19] - Inst SM_AMIGA_i_3_ SM_AMIGA_i[3] + Inst state_machine_un17_clk_030 state_machine.un17_clk_030 Inst A_20_ A[20] - Inst SM_AMIGA_i_0_ SM_AMIGA_i[0] Inst A_21_ A[21] - Inst SM_AMIGA_ns_i_o2_6_ SM_AMIGA_ns_i_o2[6] Inst A_22_ A[22] - Inst SM_AMIGA_ns_7_ SM_AMIGA_ns[7] Inst A_23_ A[23] Inst A_24_ A[24] - Inst A_25_ A[25] Inst state_machine_un42_clk_030_i state_machine.un42_clk_030_i + Inst A_25_ A[25] Inst A_26_ A[26] + Inst cpu_est_0_0_ cpu_est_0[0] Inst A_27_ A[27] - Inst state_machine_un17_clk_030 state_machine.un17_clk_030 + Inst state_machine_un13_clk_000_d_1 state_machine.un13_clk_000_d_1 Inst A_28_ A[28] Inst A_29_ A[29] - Inst state_machine_un1_clk_030 state_machine.un1_clk_030 Inst A_30_ A[30] - Inst state_machine_un4_bgack_000 state_machine.un4_bgack_000 + Inst state_machine_un1_clk_030 state_machine.un1_clk_030 Inst A_31_ A[31] + Inst state_machine_un4_bgack_000 state_machine.un4_bgack_000 Inst A_i_19_ A_i[19] Inst A_i_18_ A_i[18] Inst A_i_16_ A_i[16] @@ -197,370 +202,326 @@ Design 'BUS68030' created Thu May 15 22:17:27 2014 Inst IPL_030_0_1__n IPL_030_0_1_.n Inst IPL_030_0_1__p IPL_030_0_1_.p Inst IPL_030_0_0__r IPL_030_0_0_.r - Inst IPL_030_0_0__m IPL_030_0_0_.m Inst IPL_030_0_ IPL_030[0] - Inst IPL_030_0_0__n IPL_030_0_0_.n + Inst IPL_030_0_0__m IPL_030_0_0_.m Inst IPL_030_1_ IPL_030[1] - Inst IPL_030_0_0__p IPL_030_0_0_.p + Inst IPL_030_0_0__n IPL_030_0_0_.n Inst IPL_030_2_ IPL_030[2] - Inst BGACK_030_INT_0_r BGACK_030_INT_0.r + Inst IPL_030_0_0__p IPL_030_0_0_.p Inst IPL_0_ IPL[0] - Inst BGACK_030_INT_0_m BGACK_030_INT_0.m + Inst BGACK_030_INT_0_r BGACK_030_INT_0.r Inst IPL_1_ IPL[1] - Inst BGACK_030_INT_0_n BGACK_030_INT_0.n + Inst BGACK_030_INT_0_m BGACK_030_INT_0.m Inst IPL_2_ IPL[2] - Inst BGACK_030_INT_0_p BGACK_030_INT_0.p + Inst BGACK_030_INT_0_n BGACK_030_INT_0.n Inst DSACK_0_ DSACK[0] - Inst clk_cpu_est_11_0_o4_1_ clk.cpu_est_11_0_o4[1] + Inst BGACK_030_INT_0_p BGACK_030_INT_0.p Inst DSACK_1_ DSACK[1] - Inst clk_cpu_est_11_0_o4_3_ clk.cpu_est_11_0_o4[3] - Inst cpu_est_i_2_ cpu_est_i[2] - Inst clk_cpu_est_11_0_a4_1_3_ clk.cpu_est_11_0_a4_1[3] - Inst SM_AMIGA_i_4_ SM_AMIGA_i[4] - Inst SM_AMIGA_i_6_ SM_AMIGA_i[6] - Inst cpu_est_i_0_ cpu_est_i[0] + Inst DSACK_INT_0_1__r DSACK_INT_0_1_.r + Inst DSACK_INT_0_1__m DSACK_INT_0_1_.m + Inst DSACK_INT_0_1__n DSACK_INT_0_1_.n + Inst DSACK_INT_0_1__p DSACK_INT_0_1_.p + Inst BG_000_0_r BG_000_0.r + Inst BG_000_0_m BG_000_0.m + Inst BG_000_0_n BG_000_0.n + Inst BG_000_0_p BG_000_0.p Inst FC_0_ FC[0] + Inst DTACK_SYNC_0_r DTACK_SYNC_0.r Inst FC_1_ FC[1] - Inst cpu_est_i_1_ cpu_est_i[1] - Inst cpu_est_0_0_ cpu_est_0[0] - Inst SM_AMIGA_ns_i_a2_1_ SM_AMIGA_ns_i_a2[1] - Inst SM_AMIGA_i_5_ SM_AMIGA_i[5] - Inst SM_AMIGA_ns_i_a2_3_ SM_AMIGA_ns_i_a2[3] - Inst SM_AMIGA_ns_0_ SM_AMIGA_ns[0] - Inst SM_AMIGA_ns_i_3_ SM_AMIGA_ns_i[3] + Inst DTACK_SYNC_0_m DTACK_SYNC_0.m + Inst DTACK_SYNC_0_n DTACK_SYNC_0.n + Inst DTACK_SYNC_0_p DTACK_SYNC_0.p + Inst SM_AMIGA_i_1_ SM_AMIGA_i[1] + Inst SM_AMIGA_i_2_ SM_AMIGA_i[2] + Inst SM_AMIGA_ns_i_a2_0_6_ SM_AMIGA_ns_i_a2_0[6] Inst SM_AMIGA_ns_i_4_ SM_AMIGA_ns_i[4] - Inst SM_AMIGA_ns_i_o2_4_ SM_AMIGA_ns_i_o2[4] - Inst un9_i_a2_1_0_ un9_i_a2_1[0] - Inst clk_cpu_est_11_0_a4_1_ clk.cpu_est_11_0_a4[1] - Inst un9_i_a2_0_ un9_i_a2[0] - Inst clk_cpu_est_11_0_a4_0_1_ clk.cpu_est_11_0_a4_0[1] - Inst SM_AMIGA_ns_a2_0_1_5_ SM_AMIGA_ns_a2_0_1[5] - Inst clk_cpu_est_11_0_a4_1_1_ clk.cpu_est_11_0_a4_1[1] - Inst SM_AMIGA_ns_a2_0_5_ SM_AMIGA_ns_a2_0[5] - Inst clk_cpu_est_11_0_a4_2_1_ clk.cpu_est_11_0_a4_2[1] - Inst clk_cpu_est_11_0_a4_3_ clk.cpu_est_11_0_a4[3] - Inst clk_cpu_est_11_0_a4_0_3_ clk.cpu_est_11_0_a4_0[3] - Inst clk_cpu_est_11_i_2_ clk.cpu_est_11_i[2] - Inst clk_cpu_est_11_i_o4_2_ clk.cpu_est_11_i_o4[2] - Inst state_machine_un42_clk_030_3 state_machine.un42_clk_030_3 - Inst A_i_26_ A_i[26] - Inst state_machine_un42_clk_030_4 state_machine.un42_clk_030_4 - Inst A_i_27_ A_i[27] - Inst state_machine_un42_clk_030_5 state_machine.un42_clk_030_5 - Inst A_i_28_ A_i[28] - Inst state_machine_un42_clk_030 state_machine.un42_clk_030 - Inst A_i_29_ A_i[29] - Inst state_machine_un13_clk_000_d_1_0 state_machine.un13_clk_000_d_1_0 - Inst A_i_30_ A_i[30] - Inst state_machine_un13_clk_000_d state_machine.un13_clk_000_d - Inst A_i_31_ A_i[31] - Inst state_machine_un13_clk_000_d_4_1 state_machine.un13_clk_000_d_4_1 - Inst SM_AMIGA_i_7_ SM_AMIGA_i[7] - Inst state_machine_un13_clk_000_d_4 state_machine.un13_clk_000_d_4 - Inst state_machine_un5_clk_030_i_a2 state_machine.un5_clk_030_i_a2 - Inst state_machine_un8_clk_000_d_1 state_machine.un8_clk_000_d_1 - Inst SM_AMIGA_ns_a2_0_ SM_AMIGA_ns_a2[0] - Inst state_machine_un8_clk_000_d_2 state_machine.un8_clk_000_d_2 - Inst SM_AMIGA_ns_a2_0_0_ SM_AMIGA_ns_a2_0[0] - Inst state_machine_un8_clk_000_d_3 state_machine.un8_clk_000_d_3 - Inst SM_AMIGA_ns_a2_0_2_ SM_AMIGA_ns_a2_0[2] - Inst state_machine_un8_clk_000_d_4 state_machine.un8_clk_000_d_4 - Inst SM_AMIGA_ns_i_a2_4_ SM_AMIGA_ns_i_a2[4] - Inst state_machine_un8_clk_000_d state_machine.un8_clk_000_d - Inst SM_AMIGA_ns_i_a2_0_4_ SM_AMIGA_ns_i_a2_0[4] - Inst clk_un3_clk_000_dd_0_a2 clk.un3_clk_000_dd_0_a2 - Inst clk_cpu_est_11_i_a4_0_2_ clk.cpu_est_11_i_a4_0[2] - Inst state_machine_un13_as_000_int_i state_machine.un13_as_000_int_i - Inst un9_i_a2_1_2_ un9_i_a2_1[2] - Inst un9_i_a2_2_2_ un9_i_a2_2[2] - Inst CLK_CNT_i_0_ CLK_CNT_i[0] - Inst un9_i_a2_2_ un9_i_a2[2] - Inst A_i_24_ A_i[24] - Inst un9_i_a2_1_1_ un9_i_a2_1[1] - Inst A_i_25_ A_i[25] - Inst un9_i_a2_1_ un9_i_a2[1] - Inst SM_AMIGA_D_0_0__r SM_AMIGA_D_0_0_.r - Inst SM_AMIGA_D_0_0__m SM_AMIGA_D_0_0_.m - Inst SM_AMIGA_D_0_0__n SM_AMIGA_D_0_0_.n - Inst SM_AMIGA_D_0_0__p SM_AMIGA_D_0_0_.p - Inst state_machine_un42_clk_030_1 state_machine.un42_clk_030_1 - Inst state_machine_un42_clk_030_2 state_machine.un42_clk_030_2 - Inst SM_AMIGA_D_0_1__r SM_AMIGA_D_0_1_.r - Inst SM_AMIGA_D_0_1__m SM_AMIGA_D_0_1_.m - Inst SM_AMIGA_D_0_1__n SM_AMIGA_D_0_1_.n - Inst SM_AMIGA_D_0_1__p SM_AMIGA_D_0_1_.p - Inst cpu_est_0_1__r cpu_est_0_1_.r - Inst cpu_est_0_1__m cpu_est_0_1_.m - Inst cpu_est_0_1__n cpu_est_0_1_.n - Inst cpu_est_0_1__p cpu_est_0_1_.p - Inst clk_cpu_est_11_0_1_1_ clk.cpu_est_11_0_1[1] - Inst cpu_est_0_2__r cpu_est_0_2_.r - Inst clk_cpu_est_11_0_2_1_ clk.cpu_est_11_0_2[1] - Inst cpu_est_0_2__m cpu_est_0_2_.m - Inst clk_cpu_est_11_0_1_ clk.cpu_est_11_0[1] - Inst cpu_est_0_2__n cpu_est_0_2_.n - Inst clk_cpu_est_11_0_1_3_ clk.cpu_est_11_0_1[3] - Inst cpu_est_0_2__p cpu_est_0_2_.p - Inst clk_cpu_est_11_0_3_ clk.cpu_est_11_0[3] - Inst cpu_est_0_3__r cpu_est_0_3_.r - Inst clk_cpu_est_11_i_a4_1_2_ clk.cpu_est_11_i_a4_1[2] - Inst cpu_est_0_3__m cpu_est_0_3_.m - Inst clk_cpu_est_11_i_a4_2_ clk.cpu_est_11_i_a4[2] - Inst cpu_est_0_3__n cpu_est_0_3_.n + Inst SM_AMIGA_ns_5_ SM_AMIGA_ns[5] Inst clk_cpu_est_11_i_a4_0_1_2_ clk.cpu_est_11_i_a4_0_1[2] - Inst cpu_est_0_3__p cpu_est_0_3_.p - Inst SM_AMIGA_ns_i_0_ SM_AMIGA_ns_i[0] - Inst SM_AMIGA_ns_i_1_1_ SM_AMIGA_ns_i_1[1] - Inst SM_AMIGA_ns_i_1_ SM_AMIGA_ns_i[1] + Inst SM_AMIGA_ns_i_6_ SM_AMIGA_ns_i[6] + Inst clk_cpu_est_11_i_a4_0_2_ clk.cpu_est_11_i_a4_0[2] + Inst SM_AMIGA_i_3_ SM_AMIGA_i[3] + Inst clk_cpu_est_11_i_a4_1_2_ clk.cpu_est_11_i_a4_1[2] + Inst SM_AMIGA_ns_i_o2_4_ SM_AMIGA_ns_i_o2[4] + Inst clk_cpu_est_11_i_a4_2_ clk.cpu_est_11_i_a4[2] + Inst SM_AMIGA_ns_i_o2_6_ SM_AMIGA_ns_i_o2[6] Inst state_machine_AS_030_000_SYNC_3_1 state_machine.AS_030_000_SYNC_3_1 Inst state_machine_AS_030_000_SYNC_3 state_machine.AS_030_000_SYNC_3 + Inst state_machine_un13_clk_000_d_1_0 state_machine.un13_clk_000_d_1_0 + Inst state_machine_un13_clk_000_d state_machine.un13_clk_000_d + Inst A_i_24_ A_i[24] + Inst state_machine_un13_clk_000_d_4_1 state_machine.un13_clk_000_d_4_1 + Inst A_i_25_ A_i[25] + Inst state_machine_un13_clk_000_d_4 state_machine.un13_clk_000_d_4 + Inst A_i_26_ A_i[26] + Inst state_machine_un8_clk_000_d_1 state_machine.un8_clk_000_d_1 + Inst A_i_27_ A_i[27] + Inst state_machine_un8_clk_000_d_2 state_machine.un8_clk_000_d_2 + Inst A_i_28_ A_i[28] + Inst state_machine_un8_clk_000_d_3 state_machine.un8_clk_000_d_3 + Inst A_i_29_ A_i[29] + Inst state_machine_un8_clk_000_d_4 state_machine.un8_clk_000_d_4 + Inst A_i_30_ A_i[30] + Inst state_machine_un8_clk_000_d state_machine.un8_clk_000_d + Inst A_i_31_ A_i[31] + Inst SM_AMIGA_ns_i_a2_4_ SM_AMIGA_ns_i_a2[4] + Inst state_machine_un42_clk_030_1 state_machine.un42_clk_030_1 + Inst SM_AMIGA_ns_i_a2_0_4_ SM_AMIGA_ns_i_a2_0[4] + Inst state_machine_un42_clk_030_2 state_machine.un42_clk_030_2 + Inst SM_AMIGA_ns_a2_5_ SM_AMIGA_ns_a2[5] + Inst state_machine_un42_clk_030_3 state_machine.un42_clk_030_3 + Inst SM_AMIGA_ns_i_a2_6_ SM_AMIGA_ns_i_a2[6] + Inst state_machine_un42_clk_030_4 state_machine.un42_clk_030_4 + Inst state_machine_un13_as_000_int_i state_machine.un13_as_000_int_i + Inst state_machine_un42_clk_030_5 state_machine.un42_clk_030_5 + Inst state_machine_un42_clk_030 state_machine.un42_clk_030 + Inst CLK_CNT_i_0_ CLK_CNT_i[0] + Inst clk_cpu_est_11_0_1_1_ clk.cpu_est_11_0_1[1] + Inst clk_cpu_est_11_0_2_1_ clk.cpu_est_11_0_2[1] + Inst clk_cpu_est_11_0_1_ clk.cpu_est_11_0[1] + Inst SM_AMIGA_ns_a2_0_1_5_ SM_AMIGA_ns_a2_0_1[5] + Inst SM_AMIGA_ns_a2_0_5_ SM_AMIGA_ns_a2_0[5] + Inst SM_AMIGA_ns_i_o2_i_4_ SM_AMIGA_ns_i_o2_i[4] + Inst SM_AMIGA_ns_i_5_ SM_AMIGA_ns_i[5] Inst state_machine_un31_clk_000_d_1 state_machine.un31_clk_000_d_1 Inst state_machine_un31_clk_000_d state_machine.un31_clk_000_d - Inst clk_cpu_est_11_0_i_1_ clk.cpu_est_11_0_i[1] - Inst clk_cpu_est_11_0_o4_i_3_ clk.cpu_est_11_0_o4_i[3] - Inst clk_cpu_est_11_0_o4_i_1_ clk.cpu_est_11_0_o4_i[1] - Inst clk_cpu_est_11_i_o4_i_2_ clk.cpu_est_11_i_o4_i[2] - Inst SM_AMIGA_ns_i_o2_i_4_ SM_AMIGA_ns_i_o2_i[4] + Inst clk_cpu_est_11_0_1_3_ clk.cpu_est_11_0_1[3] + Inst clk_cpu_est_11_0_3_ clk.cpu_est_11_0[3] + Inst clk_cpu_est_11_0_i_3_ clk.cpu_est_11_0_i[3] Inst SIZE_c_i_1_ SIZE_c_i[1] Inst state_machine_un31_clk_000_d_i_0 state_machine.un31_clk_000_d_i_0 + Inst state_machine_AS_030_000_SYNC_3_i state_machine.AS_030_000_SYNC_3_i + Inst state_machine_un17_clk_030_i state_machine.un17_clk_030_i + Inst state_machine_un57_clk_000_d_i state_machine.un57_clk_000_d_i Inst state_machine_un4_bgack_000_i state_machine.un4_bgack_000_i Inst state_machine_un1_clk_030_i state_machine.un1_clk_030_i - Inst state_machine_un17_clk_030_i state_machine.un17_clk_030_i - Inst state_machine_AS_030_000_SYNC_3_i state_machine.AS_030_000_SYNC_3_i - Inst clk_cpu_est_11_0_i_3_ clk.cpu_est_11_0_i[3] + Inst SM_AMIGA_ns_i_o2_i_6_ SM_AMIGA_ns_i_o2_i[6] + Inst SM_AMIGA_ns_i_o2_i_0_ SM_AMIGA_ns_i_o2_i[0] + Inst SM_AMIGA_ns_i_o2_i_1_ SM_AMIGA_ns_i_o2_i[1] + Inst clk_cpu_est_11_i_o4_i_2_ clk.cpu_est_11_i_o4_i[2] + Inst clk_cpu_est_11_0_o4_i_1_ clk.cpu_est_11_0_o4_i[1] + Inst clk_cpu_est_11_0_o4_i_3_ clk.cpu_est_11_0_o4_i[3] + Inst clk_cpu_est_11_0_i_1_ clk.cpu_est_11_0_i[1] Inst A_c_i_0_ A_c_i[0] Inst state_machine_UDS_000_INT_8_i state_machine.UDS_000_INT_8_i Inst state_machine_LDS_000_INT_8_i state_machine.LDS_000_INT_8_i Inst SM_AMIGA_ns_i_2_ SM_AMIGA_ns_i[2] - Inst SM_AMIGA_ns_i_5_ SM_AMIGA_ns_i[5] - Net a_c_30__n A_c[30] - Net a_30__n A[30] - Net a_c_31__n A_c[31] - Net cpu_est_3__n cpu_est[3] - Net gnd_n_n GND - Net cpu_est_0__n cpu_est[0] - Net cpu_est_1__n cpu_est[1] - Net cpu_est_d_0__n cpu_est_d[0] - Net cpu_est_d_3__n cpu_est_d[3] + Inst SM_AMIGA_ns_i_7_ SM_AMIGA_ns_i[7] + Inst VMA_INT_0_r VMA_INT_0.r + Inst VMA_INT_0_m VMA_INT_0.m + Inst VMA_INT_0_n VMA_INT_0.n + Inst VMA_INT_0_p VMA_INT_0.p + Inst LDS_000_INT_0_r LDS_000_INT_0.r + Inst LDS_000_INT_0_m LDS_000_INT_0.m Net ipl_030_c_0__n IPL_030_c[0] Net ipl_030_0__n IPL_030[0] - Net vcc_n_n VCC Net ipl_030_c_1__n IPL_030_c[1] - Net cpu_est_d_1__n cpu_est_d[1] + Net cpu_est_3__n cpu_est[3] Net ipl_030_1__n IPL_030[1] - Net cpu_est_d_2__n cpu_est_d[2] Net ipl_030_c_2__n IPL_030_c[2] - Net cpu_est_2__n cpu_est[2] - Net clk_cnt_0__n CLK_CNT[0] + Net gnd_n_n GND + Net cpu_est_0__n cpu_est[0] Net ipl_c_0__n IPL_c[0] - Net sm_amiga_6__n SM_AMIGA[6] + Net cpu_est_1__n cpu_est[1] Net ipl_0__n IPL[0] - Net sm_amiga_7__n SM_AMIGA[7] + Net cpu_est_d_0__n cpu_est_d[0] Net ipl_c_1__n IPL_c[1] + Net cpu_est_d_3__n cpu_est_d[3] Net ipl_1__n IPL[1] Net ipl_c_2__n IPL_c[2] - Net clk_rising_clk_amiga_1_n clk.RISING_CLK_AMIGA_1 Net dsack_0__n DSACK[0] - Net state_machine_un57_clk_000_d_n state_machine.un57_clk_000_d Net dsack_c_1__n DSACK_c[1] + Net vcc_n_n VCC + Net cpu_est_d_1__n cpu_est_d[1] + Net cpu_est_d_2__n cpu_est_d[2] + Net cpu_est_2__n cpu_est[2] + Net clk_cnt_0__n CLK_CNT[0] + Net sm_amiga_6__n SM_AMIGA[6] + Net sm_amiga_7__n SM_AMIGA[7] + Net clk_rising_clk_amiga_1_n clk.RISING_CLK_AMIGA_1 + Net state_machine_un57_clk_000_d_n state_machine.un57_clk_000_d + Net fc_c_0__n FC_c[0] Net sm_amiga_1__n SM_AMIGA[1] + Net fc_0__n FC[0] Net dsack_int_1__n DSACK_INT[1] + Net fc_c_1__n FC_c[1] Net sm_amiga_4__n SM_AMIGA[4] Net sm_amiga_3__n SM_AMIGA[3] Net state_machine_un13_as_000_int_n state_machine.un13_as_000_int Net sm_amiga_5__n SM_AMIGA[5] Net sm_amiga_2__n SM_AMIGA[2] Net sm_amiga_0__n SM_AMIGA[0] - Net sm_amiga_d_0__n SM_AMIGA_D[0] - Net sm_amiga_d_1__n SM_AMIGA_D[1] - Net sm_amiga_d_2__n SM_AMIGA_D[2] - Net fc_c_0__n FC_c[0] - Net fc_0__n FC[0] - Net fc_c_1__n FC_c[1] - Net state_machine_un57_clk_000_d_0_n state_machine.un57_clk_000_d_0 Net a_c_i_0__n A_c_i[0] Net state_machine_uds_000_int_8_0_n state_machine.UDS_000_INT_8_0 Net state_machine_lds_000_int_8_0_n state_machine.LDS_000_INT_8_0 Net sm_amiga_ns_0_2__n SM_AMIGA_ns_0[2] - Net sm_amiga_ns_0_5__n SM_AMIGA_ns_0[5] - Net sm_amiga_ns_0__n SM_AMIGA_ns[0] + Net sm_amiga_ns_0_7__n SM_AMIGA_ns_0[7] Net sm_amiga_ns_2__n SM_AMIGA_ns[2] Net sm_amiga_ns_5__n SM_AMIGA_ns[5] - Net sm_amiga_ns_0_7__n SM_AMIGA_ns_0[7] Net sm_amiga_ns_7__n SM_AMIGA_ns[7] + Net clk_cpu_est_11_0_1__n clk.cpu_est_11_0[1] + Net clk_cpu_est_11_0_3__n clk.cpu_est_11_0[3] Net size_c_i_1__n SIZE_c_i[1] - Net clk_un3_clk_000_dd_n clk.un3_clk_000_dd Net state_machine_un31_clk_000_d_i_n state_machine.un31_clk_000_d_i - Net clk_cpu_est_11_1__n clk.cpu_est_11[1] - Net clk_cpu_est_11_3__n clk.cpu_est_11[3] + Net state_machine_as_030_000_sync_3_0_n state_machine.AS_030_000_SYNC_3_0 + Net state_machine_un17_clk_030_0_n state_machine.un17_clk_030_0 + Net state_machine_un57_clk_000_d_0_n state_machine.un57_clk_000_d_0 + Net state_machine_un42_clk_030_n state_machine.un42_clk_030 Net state_machine_un4_bgack_000_0_n state_machine.un4_bgack_000_0 Net state_machine_un1_clk_030_0_n state_machine.un1_clk_030_0 - Net state_machine_un17_clk_030_0_n state_machine.un17_clk_030_0 - Net state_machine_as_030_000_sync_3_2_n state_machine.AS_030_000_SYNC_3_2 - Net clk_cpu_est_11_0_3__n clk.cpu_est_11_0[3] - Net clk_cpu_est_11_0_1__n clk.cpu_est_11_0[1] - Net state_machine_un13_clk_000_d_1_n state_machine.un13_clk_000_d_1 - Net state_machine_un42_clk_030_n state_machine.un42_clk_030 - Net sm_amiga_ns_0_0__n SM_AMIGA_ns_0[0] - Net state_machine_as_030_000_sync_3_n state_machine.AS_030_000_SYNC_3 - Net state_machine_un17_clk_030_n state_machine.un17_clk_030 Net state_machine_un1_clk_030_n state_machine.un1_clk_030 - Net state_machine_as_030_000_sync_3_2_1_n state_machine.AS_030_000_SYNC_3_2_1 Net state_machine_un4_bgack_000_n state_machine.un4_bgack_000 - Net state_machine_un31_clk_000_d_i_1_n state_machine.un31_clk_000_d_i_1 + Net state_machine_un17_clk_030_n state_machine.un17_clk_030 + Net state_machine_as_030_000_sync_3_n state_machine.AS_030_000_SYNC_3 + Net clk_un3_clk_000_dd_n clk.un3_clk_000_dd + Net sm_amiga_ns_0_5__n SM_AMIGA_ns_0[5] Net state_machine_un31_clk_000_d_n state_machine.un31_clk_000_d Net state_machine_un13_clk_000_d_n state_machine.un13_clk_000_d Net state_machine_un13_clk_000_d_4_n state_machine.un13_clk_000_d_4 + Net state_machine_un13_clk_000_d_1_n state_machine.un13_clk_000_d_1 Net state_machine_un8_clk_000_d_n state_machine.un8_clk_000_d + Net state_machine_un31_clk_000_d_i_1_n state_machine.un31_clk_000_d_i_1 + Net clk_cpu_est_11_0_1_3__n clk.cpu_est_11_0_1[3] Net clk_cpu_est_11_0_1_1__n clk.cpu_est_11_0_1[1] Net clk_cpu_est_11_0_2_1__n clk.cpu_est_11_0_2[1] - Net clk_cpu_est_11_0_1_3__n clk.cpu_est_11_0_1[3] - Net state_machine_lds_000_int_8_n state_machine.LDS_000_INT_8 - Net state_machine_uds_000_int_8_n state_machine.UDS_000_INT_8 + Net clk_cpu_est_11_3__n clk.cpu_est_11[3] + Net clk_cpu_est_11_1__n clk.cpu_est_11[1] Net state_machine_un42_clk_030_1_n state_machine.un42_clk_030_1 Net state_machine_un42_clk_030_2_n state_machine.un42_clk_030_2 Net state_machine_un42_clk_030_3_n state_machine.un42_clk_030_3 Net state_machine_un42_clk_030_4_n state_machine.un42_clk_030_4 Net state_machine_un42_clk_030_5_n state_machine.un42_clk_030_5 + Net state_machine_as_030_000_sync_3_0_1_n state_machine.AS_030_000_SYNC_3_0_1 + Net state_machine_lds_000_int_8_n state_machine.LDS_000_INT_8 + Net state_machine_uds_000_int_8_n state_machine.UDS_000_INT_8 Net state_machine_un13_clk_000_d_1_0_n state_machine.un13_clk_000_d_1_0 Net state_machine_un13_clk_000_d_4_1_n state_machine.un13_clk_000_d_4_1 Net state_machine_un8_clk_000_d_1_n state_machine.un8_clk_000_d_1 - Net state_machine_un8_clk_000_d_2_n state_machine.un8_clk_000_d_2 - Net state_machine_un8_clk_000_d_3_n state_machine.un8_clk_000_d_3 Net cpu_est_d_i_3__n cpu_est_d_i[3] - Net state_machine_un8_clk_000_d_4_n state_machine.un8_clk_000_d_4 + Net state_machine_un8_clk_000_d_2_n state_machine.un8_clk_000_d_2 Net cpu_est_d_i_0__n cpu_est_d_i[0] + Net state_machine_un8_clk_000_d_3_n state_machine.un8_clk_000_d_3 + Net state_machine_un8_clk_000_d_4_n state_machine.un8_clk_000_d_4 Net dsack_i_1__n DSACK_i[1] Net state_machine_un13_clk_000_d_i_n state_machine.un13_clk_000_d_i Net state_machine_un8_clk_000_d_i_n state_machine.un8_clk_000_d_i - Net state_machine_un13_clk_000_d_1_i_n state_machine.un13_clk_000_d_1_i - Net sm_amiga_i_1__n SM_AMIGA_i[1] - Net sm_amiga_i_2__n SM_AMIGA_i[2] - Net sm_amiga_d_0_2__un3_n SM_AMIGA_D_0_2_.un3 - Net sm_amiga_i_0__n SM_AMIGA_i[0] - Net sm_amiga_d_0_2__un1_n SM_AMIGA_D_0_2_.un1 - Net sm_amiga_i_3__n SM_AMIGA_i[3] - Net sm_amiga_d_0_2__un0_n SM_AMIGA_D_0_2_.un0 - Net dsack_int_0_1__un3_n DSACK_INT_0_1_.un3 - Net dsack_int_0_1__un1_n DSACK_INT_0_1_.un1 - Net dsack_int_0_1__un0_n DSACK_INT_0_1_.un0 - Net cpu_est_i_3__n cpu_est_i[3] - Net vma_int_0_un3_n VMA_INT_0.un3 - Net a_i_18__n A_i[18] - Net vma_int_0_un1_n VMA_INT_0.un1 - Net a_i_16__n A_i[16] - Net vma_int_0_un0_n VMA_INT_0.un0 - Net a_i_19__n A_i[19] - Net vpa_sync_0_un3_n VPA_SYNC_0.un3 - Net vpa_sync_0_un1_n VPA_SYNC_0.un1 - Net state_machine_un42_clk_030_i_n state_machine.un42_clk_030_i - Net vpa_sync_0_un0_n VPA_SYNC_0.un0 - Net as_000_int_0_un3_n AS_000_INT_0.un3 - Net cpu_est_i_1__n cpu_est_i[1] - Net as_000_int_0_un1_n AS_000_INT_0.un1 - Net as_000_int_0_un0_n AS_000_INT_0.un0 - Net cpu_est_i_0__n cpu_est_i[0] - Net dtack_sync_0_un3_n DTACK_SYNC_0.un3 - Net sm_amiga_i_4__n SM_AMIGA_i[4] - Net dtack_sync_0_un1_n DTACK_SYNC_0.un1 Net sm_amiga_i_6__n SM_AMIGA_i[6] - Net dtack_sync_0_un0_n DTACK_SYNC_0.un0 - Net cpu_est_i_2__n cpu_est_i[2] + Net vma_int_0_un3_n VMA_INT_0.un3 + Net sm_amiga_i_7__n SM_AMIGA_i[7] + Net vma_int_0_un1_n VMA_INT_0.un1 + Net sm_amiga_i_5__n SM_AMIGA_i[5] + Net vma_int_0_un0_n VMA_INT_0.un0 + Net sm_amiga_i_4__n SM_AMIGA_i[4] Net lds_000_int_0_un3_n LDS_000_INT_0.un3 + Net state_machine_un13_clk_000_d_1_i_n state_machine.un13_clk_000_d_1_i Net lds_000_int_0_un1_n LDS_000_INT_0.un1 Net lds_000_int_0_un0_n LDS_000_INT_0.un0 - Net sm_amiga_i_5__n SM_AMIGA_i[5] Net uds_000_int_0_un3_n UDS_000_INT_0.un3 + Net cpu_est_i_0__n cpu_est_i[0] Net uds_000_int_0_un1_n UDS_000_INT_0.un1 - Net sm_amiga_i_7__n SM_AMIGA_i[7] + Net cpu_est_i_2__n cpu_est_i[2] Net uds_000_int_0_un0_n UDS_000_INT_0.un0 - Net a_i_30__n A_i[30] - Net bg_000_0_un3_n BG_000_0.un3 - Net a_i_31__n A_i[31] - Net bg_000_0_un1_n BG_000_0.un1 - Net a_i_28__n A_i[28] - Net bg_000_0_un0_n BG_000_0.un0 - Net a_i_29__n A_i[29] - Net as_030_000_sync_0_un3_n AS_030_000_SYNC_0.un3 - Net a_i_26__n A_i[26] - Net as_030_000_sync_0_un1_n AS_030_000_SYNC_0.un1 - Net a_i_27__n A_i[27] - Net as_030_000_sync_0_un0_n AS_030_000_SYNC_0.un0 - Net a_i_24__n A_i[24] + Net cpu_est_i_3__n cpu_est_i[3] + Net cpu_est_0_3__un3_n cpu_est_0_3_.un3 + Net cpu_est_i_1__n cpu_est_i[1] + Net cpu_est_0_3__un1_n cpu_est_0_3_.un1 + Net cpu_est_0_3__un0_n cpu_est_0_3_.un0 + Net cpu_est_0_2__un3_n cpu_est_0_2_.un3 + Net cpu_est_0_2__un1_n cpu_est_0_2_.un1 + Net cpu_est_0_2__un0_n cpu_est_0_2_.un0 + Net state_machine_un42_clk_030_i_n state_machine.un42_clk_030_i + Net cpu_est_0_1__un3_n cpu_est_0_1_.un3 + Net cpu_est_0_1__un1_n cpu_est_0_1_.un1 + Net cpu_est_0_1__un0_n cpu_est_0_1_.un0 Net fpu_cs_int_0_un3_n FPU_CS_INT_0.un3 - Net a_i_25__n A_i[25] Net fpu_cs_int_0_un1_n FPU_CS_INT_0.un1 - Net clk_cnt_i_0__n CLK_CNT_i[0] + Net a_i_18__n A_i[18] Net fpu_cs_int_0_un0_n FPU_CS_INT_0.un0 - Net state_machine_un13_as_000_int_i_n state_machine.un13_as_000_int_i + Net a_i_16__n A_i[16] + Net as_000_int_0_un3_n AS_000_INT_0.un3 + Net a_i_19__n A_i[19] + Net as_000_int_0_un1_n AS_000_INT_0.un1 + Net as_000_int_0_un0_n AS_000_INT_0.un0 + Net vpa_sync_0_un3_n VPA_SYNC_0.un3 + Net vpa_sync_0_un1_n VPA_SYNC_0.un1 + Net sm_amiga_i_3__n SM_AMIGA_i[3] + Net vpa_sync_0_un0_n VPA_SYNC_0.un0 + Net sm_amiga_i_1__n SM_AMIGA_i[1] + Net as_030_000_sync_0_un3_n AS_030_000_SYNC_0.un3 + Net sm_amiga_i_2__n SM_AMIGA_i[2] + Net as_030_000_sync_0_un1_n AS_030_000_SYNC_0.un1 + Net a_i_30__n A_i[30] + Net as_030_000_sync_0_un0_n AS_030_000_SYNC_0.un0 + Net a_i_31__n A_i[31] Net ipl_030_0_2__un3_n IPL_030_0_2_.un3 + Net a_i_28__n A_i[28] Net ipl_030_0_2__un1_n IPL_030_0_2_.un1 + Net a_i_29__n A_i[29] Net ipl_030_0_2__un0_n IPL_030_0_2_.un0 + Net a_i_26__n A_i[26] Net ipl_030_0_1__un3_n IPL_030_0_1_.un3 + Net a_i_27__n A_i[27] Net ipl_030_0_1__un1_n IPL_030_0_1_.un1 + Net a_i_24__n A_i[24] Net ipl_030_0_1__un0_n IPL_030_0_1_.un0 + Net a_i_25__n A_i[25] Net ipl_030_0_0__un3_n IPL_030_0_0_.un3 + Net clk_cnt_i_0__n CLK_CNT_i[0] Net ipl_030_0_0__un1_n IPL_030_0_0_.un1 + Net state_machine_un13_as_000_int_i_n state_machine.un13_as_000_int_i Net ipl_030_0_0__un0_n IPL_030_0_0_.un0 Net bgack_030_int_0_un3_n BGACK_030_INT_0.un3 Net bgack_030_int_0_un1_n BGACK_030_INT_0.un1 Net bgack_030_int_0_un0_n BGACK_030_INT_0.un0 - Net sm_amiga_d_0_0__un3_n SM_AMIGA_D_0_0_.un3 - Net sm_amiga_d_0_0__un1_n SM_AMIGA_D_0_0_.un1 + Net dsack_int_0_1__un3_n DSACK_INT_0_1_.un3 + Net dsack_int_0_1__un1_n DSACK_INT_0_1_.un1 + Net dsack_int_0_1__un0_n DSACK_INT_0_1_.un0 + Net bg_000_0_un3_n BG_000_0.un3 + Net bg_000_0_un1_n BG_000_0.un1 + Net bg_000_0_un0_n BG_000_0.un0 + Net dtack_sync_0_un3_n DTACK_SYNC_0.un3 + Net dtack_sync_0_un1_n DTACK_SYNC_0.un1 Net size_c_0__n SIZE_c[0] - Net sm_amiga_d_0_0__un0_n SM_AMIGA_D_0_0_.un0 + Net dtack_sync_0_un0_n DTACK_SYNC_0.un0 Net size_0__n SIZE[0] - Net sm_amiga_d_0_1__un3_n SM_AMIGA_D_0_1_.un3 - Net size_c_1__n SIZE_c[1] - Net sm_amiga_d_0_1__un1_n SM_AMIGA_D_0_1_.un1 - Net sm_amiga_d_0_1__un0_n SM_AMIGA_D_0_1_.un0 - Net a_c_0__n A_c[0] - Net cpu_est_0_1__un3_n cpu_est_0_1_.un3 - Net a_0__n A[0] - Net cpu_est_0_1__un1_n cpu_est_0_1_.un1 - Net cpu_est_0_1__un0_n cpu_est_0_1_.un0 - Net cpu_est_0_2__un3_n cpu_est_0_2_.un3 - Net cpu_est_0_2__un1_n cpu_est_0_2_.un1 - Net cpu_est_0_2__un0_n cpu_est_0_2_.un0 - Net cpu_est_0_3__un3_n cpu_est_0_3_.un3 - Net cpu_est_0_3__un1_n cpu_est_0_3_.un1 - Net cpu_est_0_3__un0_n cpu_est_0_3_.un0 Net a_15__n A[15] + Net size_c_1__n SIZE_c[1] Net a_14__n A[14] + Net a_c_0__n A_c[0] + Net a_0__n A[0] Net a_13__n A[13] Net a_12__n A[12] - Net a_c_16__n A_c[16] Net a_11__n A[11] + Net a_10__n A[10] + Net a_9__n A[9] + Net a_8__n A[8] + Net a_7__n A[7] + Net a_6__n A[6] + Net a_c_16__n A_c[16] + Net a_5__n A[5] Net a_16__n A[16] Net a_c_17__n A_c[17] - Net a_10__n A[10] + Net a_4__n A[4] Net a_17__n A[17] Net a_c_18__n A_c[18] - Net a_9__n A[9] + Net a_3__n A[3] Net a_18__n A[18] Net a_c_19__n A_c[19] - Net a_8__n A[8] + Net a_2__n A[2] Net a_19__n A[19] Net a_c_20__n A_c[20] - Net a_7__n A[7] + Net a_1__n A[1] Net a_20__n A[20] Net a_c_21__n A_c[21] - Net a_6__n A[6] Net a_21__n A[21] Net a_c_22__n A_c[22] - Net a_5__n A[5] Net a_22__n A[22] Net a_c_23__n A_c[23] - Net a_4__n A[4] Net a_23__n A[23] Net a_c_24__n A_c[24] - Net a_3__n A[3] Net a_24__n A[24] Net a_c_25__n A_c[25] - Net a_2__n A[2] Net a_25__n A[25] Net a_c_26__n A_c[26] - Net a_1__n A[1] Net a_26__n A[26] Net a_c_27__n A_c[27] Net a_27__n A[27] @@ -568,6 +529,9 @@ Design 'BUS68030' created Thu May 15 22:17:27 2014 Net a_28__n A[28] Net a_c_29__n A_c[29] Net a_29__n A[29] + Net a_c_30__n A_c[30] + Net a_30__n A[30] + Net a_c_31__n A_c[31] End Section Type Name // ---------------------------------------------------------------------- diff --git a/Logic/bus68030.srf b/Logic/bus68030.srf index b6c1b9f..051b806 100644 --- a/Logic/bus68030.srf +++ b/Logic/bus68030.srf @@ -6,7 +6,7 @@ #Implementation: logic $ Start of Compile -#Thu May 15 22:17:20 2014 +#Thu May 15 22:21:47 2014 Synopsys VHDL Compiler, version comp201209rcp1, Build 283R, built Mar 19 2013 @N|Running in 64-bit mode @@ -20,12 +20,12 @@ File C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd changed - @N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":6:7:6:14|Synthesizing work.bus68030.behavioral @W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":109:7:109:15|Signal clk_030_d is undriven Post processing for work.bus68030.behavioral +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":100:29:100:31|Pruning register SM_AMIGA_D(2 downto 0) @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":105:52:105:55|Pruning register VMA_INT_D @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":91:32:91:34|Pruning register CLK_REF(1 downto 0) @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":220:2:220:3|Pruning register AS_000_START @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":113:38:113:40|Pruning register CLK_000_CNT(3 downto 0) @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":112:37:112:39|Pruning register FALLING_CLK_AMIGA -@A: CL282 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":100:29:100:31|Feedback mux created for signal SM_AMIGA_D[2:0] -- possible set/reset assignment for signal missing. Specifying a reset value will improve timing and area. @W: CL190 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":100:29:100:31|Optimizing register bit DSACK_INT(0) to a constant 1 @W: CL260 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":100:29:100:31|Pruning register bit 0 of DSACK_INT(1 downto 0) @W: CL189 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":124:2:124:3|Register bit CLK_CNT(1) is always 0, optimizing ... @@ -45,7 +45,7 @@ State machine has 8 reachable states with original encodings of: @W: CL249 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":220:2:220:3|Initial value is not supported on state machine SM_AMIGA @END Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Thu May 15 22:17:20 2014 +# Thu May 15 22:21:47 2014 ###########################################################] Map & Optimize Report @@ -69,17 +69,17 @@ original code -> new code Resource Usage Report Simple gate primitives: -DFFRH 7 uses +DFF 16 uses DFFSH 16 uses -DFF 19 uses +DFFRH 7 uses IBUF 35 uses BUFTH 7 uses OBUF 15 uses BI_DIR 2 uses -AND2 163 uses -INV 126 uses -OR2 20 uses -XOR2 5 uses +AND2 149 uses +INV 119 uses +OR2 17 uses +XOR2 2 uses @N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis. @@ -89,6 +89,6 @@ Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 31MB peak: 95MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Thu May 15 22:17:22 2014 +# Thu May 15 22:21:49 2014 ###########################################################] diff --git a/Logic/run_options.txt b/Logic/run_options.txt index 87edc67..7ede2e0 100644 --- a/Logic/run_options.txt +++ b/Logic/run_options.txt @@ -1,7 +1,7 @@ #-- Synopsys, Inc. #-- Version G-2012.09LC-SP1 #-- Project file C:\users\matze\documents\github\68030tk\logic\run_options.txt -#-- Written on Thu May 15 22:17:20 2014 +#-- Written on Thu May 15 22:21:47 2014 #project files diff --git a/Logic/synlog/bus68030_fpga_mapper.srr b/Logic/synlog/bus68030_fpga_mapper.srr index 2d14f58..767bd24 100644 --- a/Logic/synlog/bus68030_fpga_mapper.srr +++ b/Logic/synlog/bus68030_fpga_mapper.srr @@ -17,17 +17,17 @@ original code -> new code Resource Usage Report Simple gate primitives: -DFFRH 7 uses +DFF 16 uses DFFSH 16 uses -DFF 19 uses +DFFRH 7 uses IBUF 35 uses BUFTH 7 uses OBUF 15 uses BI_DIR 2 uses -AND2 163 uses -INV 126 uses -OR2 20 uses -XOR2 5 uses +AND2 149 uses +INV 119 uses +OR2 17 uses +XOR2 2 uses @N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis. @@ -37,6 +37,6 @@ Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 31MB peak: 95MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Thu May 15 22:17:22 2014 +# Thu May 15 22:21:49 2014 ###########################################################] diff --git a/Logic/synlog/report/BUS68030_compiler_runstatus.xml b/Logic/synlog/report/BUS68030_compiler_runstatus.xml index 4db8131..ca18850 100644 --- a/Logic/synlog/report/BUS68030_compiler_runstatus.xml +++ b/Logic/synlog/report/BUS68030_compiler_runstatus.xml @@ -18,7 +18,7 @@ The file contains the job information from compiler to be displayed as part of t C:\users\matze\documents\github\68030tk\logic\synlog\report\BUS68030_compiler_notes.txt - 11 + 12 C:\users\matze\documents\github\68030tk\logic\synlog\report\BUS68030_compiler_warnings.txt @@ -29,13 +29,13 @@ The file contains the job information from compiler to be displayed as part of t - - 0h:00m:01s + 0h:00m:00s - - 1400185040 + 1400185307 \ No newline at end of file diff --git a/Logic/synlog/report/BUS68030_compiler_warnings.txt b/Logic/synlog/report/BUS68030_compiler_warnings.txt index 787dc1a..2bed995 100644 --- a/Logic/synlog/report/BUS68030_compiler_warnings.txt +++ b/Logic/synlog/report/BUS68030_compiler_warnings.txt @@ -1,4 +1,5 @@ @W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":109:7:109:15|Signal clk_030_d is undriven +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":100:29:100:31|Pruning register SM_AMIGA_D(2 downto 0) @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":105:52:105:55|Pruning register VMA_INT_D @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":91:32:91:34|Pruning register CLK_REF(1 downto 0) @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":220:2:220:3|Pruning register AS_000_START diff --git a/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml b/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml index 6c183fe..e519c5c 100644 --- a/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml +++ b/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml @@ -39,7 +39,7 @@ The file contains the job information from mapper to be displayed as part of the 95MB -1400185042 +1400185309 diff --git a/Logic/syntmp/run_option.xml b/Logic/syntmp/run_option.xml index 3a71ee4..19d9ce5 100644 --- a/Logic/syntmp/run_option.xml +++ b/Logic/syntmp/run_option.xml @@ -3,7 +3,7 @@ Synopsys, Inc. Version G-2012.09LC-SP1 Project file C:\users\matze\documents\github\68030tk\logic\syntmp\run_option.xml - Written on Thu May 15 22:17:20 2014 + Written on Thu May 15 22:21:47 2014 --> diff --git a/Logic/synwork/BUS68030_compiler.fdep b/Logic/synwork/BUS68030_compiler.fdep index ac55656..057f8f6 100644 --- a/Logic/synwork/BUS68030_compiler.fdep +++ b/Logic/synwork/BUS68030_compiler.fdep @@ -10,7 +10,7 @@ #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\umr_capim.vhd":1363694328 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\arith.vhd":1363694328 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\unsigned.vhd":1363694328 -#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1400185029 +#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1400185298 0 "C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd" vhdl # Dependency Lists (Uses list) diff --git a/Logic/synwork/BUS68030_compiler.fdeporig b/Logic/synwork/BUS68030_compiler.fdeporig index 87a5c25..94c6d2a 100644 --- a/Logic/synwork/BUS68030_compiler.fdeporig +++ b/Logic/synwork/BUS68030_compiler.fdeporig @@ -10,7 +10,7 @@ #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\umr_capim.vhd":1363694328 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\arith.vhd":1363694328 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\unsigned.vhd":1363694328 -#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1400185029 +#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1400185298 0 "C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd" vhdl # Dependency Lists (Uses list) diff --git a/Logic/synwork/BUS68030_compiler.srs b/Logic/synwork/BUS68030_compiler.srs index 32e46a3..1cdfca0 100644 Binary files a/Logic/synwork/BUS68030_compiler.srs and b/Logic/synwork/BUS68030_compiler.srs differ diff --git a/Logic/synwork/BUS68030_compiler.tlg b/Logic/synwork/BUS68030_compiler.tlg index ce77941..457e5e3 100644 --- a/Logic/synwork/BUS68030_compiler.tlg +++ b/Logic/synwork/BUS68030_compiler.tlg @@ -1,12 +1,12 @@ @N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":6:7:6:14|Synthesizing work.bus68030.behavioral @W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":109:7:109:15|Signal clk_030_d is undriven Post processing for work.bus68030.behavioral +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":100:29:100:31|Pruning register SM_AMIGA_D(2 downto 0) @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":105:52:105:55|Pruning register VMA_INT_D @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":91:32:91:34|Pruning register CLK_REF(1 downto 0) @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":220:2:220:3|Pruning register AS_000_START @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":113:38:113:40|Pruning register CLK_000_CNT(3 downto 0) @W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":112:37:112:39|Pruning register FALLING_CLK_AMIGA -@A: CL282 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":100:29:100:31|Feedback mux created for signal SM_AMIGA_D[2:0] -- possible set/reset assignment for signal missing. Specifying a reset value will improve timing and area. @W: CL190 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":100:29:100:31|Optimizing register bit DSACK_INT(0) to a constant 1 @W: CL260 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":100:29:100:31|Pruning register bit 0 of DSACK_INT(1 downto 0) @W: CL189 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":124:2:124:3|Register bit CLK_CNT(1) is always 0, optimizing ...