diff --git a/Layout and PCB/68030-TK-V09c.b#1 b/Layout and PCB/68030-TK-V09c.b#1
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+TOP
+Bot
+a1k.org 68030-TK v0.9b
+(c) 2013 Matthias
+Heinrichs
+a1k.org 68030-TK V0.9
+(c)2013 Matthias Heinrichs
+Free for non commercial
+reproduction
+
+JTAG
+
+
+
+<b>Motorola MC68000 Processors</b><p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>micro Ball Grid Array</b>
+
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+>NAME
+>VALUE
+
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+<b>Dual In Line</b>
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+>NAME
+>VALUE
+
+
+<b>PLASTIC LEADED CHIP CARRIER</b><p>
+square
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+>NAME
+>VALUE
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+
+<b>Resistors, Capacitors, Inductors</b><p>
+Based on the previous libraries:
+<ul>
+<li>r.lbr
+<li>cap.lbr
+<li>cap-fe.lbr
+<li>captant.lbr
+<li>polcap.lbr
+<li>ipc-smd.lbr
+</ul>
+All SMD packages are defined according to the IPC specifications and CECC<p>
+<author>Created by librarian@cadsoft.de</author><p>
+<p>
+for Electrolyt Capacitors see also :<p>
+www.bccomponents.com <p>
+www.panasonic.com<p>
+www.kemet.com<p>
+http://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf <b>(SANYO)</b>
+<p>
+for trimmer refence see : <u>www.electrospec-inc.com/cross_references/trimpotcrossref.asp</u><p>
+
+<table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0>
+<tr valign="top">
+
+<! <td width="10"> </td>
+<td width="90%">
+
+<b><font color="#0000FF" size="4">TRIM-POT CROSS REFERENCE</font></b>
+<P>
+<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2>
+ <TR>
+ <TD COLSPAN=8>
+ <FONT SIZE=3 FACE=ARIAL><B>RECTANGULAR MULTI-TURN</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">BOURNS</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">BI TECH</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">DALE-VISHAY</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">PHILIPS/MEPCO</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">MURATA</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">PANASONIC</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">SPECTROL</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">MILSPEC</FONT>
+ </B>
+ </TD><TD> </TD>
+ </TR>
+ <TR>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3 >
+ 3005P<BR>
+ 3006P<BR>
+ 3006W<BR>
+ 3006Y<BR>
+ 3009P<BR>
+ 3009W<BR>
+ 3009Y<BR>
+ 3057J<BR>
+ 3057L<BR>
+ 3057P<BR>
+ 3057Y<BR>
+ 3059J<BR>
+ 3059L<BR>
+ 3059P<BR>
+ 3059Y<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ 89P<BR>
+ 89W<BR>
+ 89X<BR>
+ 89PH<BR>
+ 76P<BR>
+ 89XH<BR>
+ 78SLT<BR>
+ 78L ALT<BR>
+ 56P ALT<BR>
+ 78P ALT<BR>
+ T8S<BR>
+ 78L<BR>
+ 56P<BR>
+ 78P<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ T18/784<BR>
+ 783<BR>
+ 781<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 2199<BR>
+ 1697/1897<BR>
+ 1680/1880<BR>
+ 2187<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ 8035EKP/CT20/RJ-20P<BR>
+ -<BR>
+ RJ-20X<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 1211L<BR>
+ 8012EKQ ALT<BR>
+ 8012EKR ALT<BR>
+ 1211P<BR>
+ 8012EKJ<BR>
+ 8012EKL<BR>
+ 8012EKQ<BR>
+ 8012EKR<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ 2101P<BR>
+ 2101W<BR>
+ 2101Y<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 2102L<BR>
+ 2102S<BR>
+ 2102Y<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ EVMCOG<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ 43P<BR>
+ 43W<BR>
+ 43Y<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 40L<BR>
+ 40P<BR>
+ 40Y<BR>
+ 70Y-T602<BR>
+ 70L<BR>
+ 70P<BR>
+ 70Y<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ RT/RTR12<BR>
+ RT/RTR12<BR>
+ RT/RTR12<BR>
+ -<BR>
+ RJ/RJR12<BR>
+ RJ/RJR12<BR>
+ RJ/RJR12<BR></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=8>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=8>
+ <FONT SIZE=4 FACE=ARIAL><B>SQUARE MULTI-TURN</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>BI TECH</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 3250L<BR>
+ 3250P<BR>
+ 3250W<BR>
+ 3250X<BR>
+ 3252P<BR>
+ 3252W<BR>
+ 3252X<BR>
+ 3260P<BR>
+ 3260W<BR>
+ 3260X<BR>
+ 3262P<BR>
+ 3262W<BR>
+ 3262X<BR>
+ 3266P<BR>
+ 3266W<BR>
+ 3266X<BR>
+ 3290H<BR>
+ 3290P<BR>
+ 3290W<BR>
+ 3292P<BR>
+ 3292W<BR>
+ 3292X<BR>
+ 3296P<BR>
+ 3296W<BR>
+ 3296X<BR>
+ 3296Y<BR>
+ 3296Z<BR>
+ 3299P<BR>
+ 3299W<BR>
+ 3299X<BR>
+ 3299Y<BR>
+ 3299Z<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ 66P ALT<BR>
+ 66W ALT<BR>
+ 66X ALT<BR>
+ 66P ALT<BR>
+ 66W ALT<BR>
+ 66X ALT<BR>
+ -<BR>
+ 64W ALT<BR>
+ -<BR>
+ 64P ALT<BR>
+ 64W ALT<BR>
+ 64X ALT<BR>
+ 64P<BR>
+ 64W<BR>
+ 64X<BR>
+ 66X ALT<BR>
+ 66P ALT<BR>
+ 66W ALT<BR>
+ 66P<BR>
+ 66W<BR>
+ 66X<BR>
+ 67P<BR>
+ 67W<BR>
+ 67X<BR>
+ 67Y<BR>
+ 67Z<BR>
+ 68P<BR>
+ 68W<BR>
+ 68X<BR>
+ 67Y ALT<BR>
+ 67Z ALT<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 5050<BR>
+ 5091<BR>
+ 5080<BR>
+ 5087<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ T63YB<BR>
+ T63XB<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 5887<BR>
+ 5891<BR>
+ 5880<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ T93Z<BR>
+ T93YA<BR>
+ T93XA<BR>
+ T93YB<BR>
+ T93XB<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 8026EKP<BR>
+ 8026EKW<BR>
+ 8026EKM<BR>
+ 8026EKP<BR>
+ 8026EKB<BR>
+ 8026EKM<BR>
+ 1309X<BR>
+ 1309P<BR>
+ 1309W<BR>
+ 8024EKP<BR>
+ 8024EKW<BR>
+ 8024EKN<BR>
+ RJ-9P/CT9P<BR>
+ RJ-9W<BR>
+ RJ-9X<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 3103P<BR>
+ 3103Y<BR>
+ 3103Z<BR>
+ 3103P<BR>
+ 3103Y<BR>
+ 3103Z<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 3105P/3106P<BR>
+ 3105W/3106W<BR>
+ 3105X/3106X<BR>
+ 3105Y/3106Y<BR>
+ 3105Z/3105Z<BR>
+ 3102P<BR>
+ 3102W<BR>
+ 3102X<BR>
+ 3102Y<BR>
+ 3102Z<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ EVMCBG<BR>
+ EVMCCG<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 55-1-X<BR>
+ 55-4-X<BR>
+ 55-3-X<BR>
+ 55-2-X<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 50-2-X<BR>
+ 50-4-X<BR>
+ 50-3-X<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 64P<BR>
+ 64W<BR>
+ 64X<BR>
+ 64Y<BR>
+ 64Z<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ RT/RTR22<BR>
+ RT/RTR22<BR>
+ RT/RTR22<BR>
+ RT/RTR22<BR>
+ RJ/RJR22<BR>
+ RJ/RJR22<BR>
+ RJ/RJR22<BR>
+ RT/RTR26<BR>
+ RT/RTR26<BR>
+ RT/RTR26<BR>
+ RJ/RJR26<BR>
+ RJ/RJR26<BR>
+ RJ/RJR26<BR>
+ RJ/RJR26<BR>
+ RJ/RJR26<BR>
+ RJ/RJR26<BR>
+ RT/RTR24<BR>
+ RT/RTR24<BR>
+ RT/RTR24<BR>
+ RJ/RJR24<BR>
+ RJ/RJR24<BR>
+ RJ/RJR24<BR>
+ RJ/RJR24<BR>
+ RJ/RJR24<BR>
+ RJ/RJR24<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=8>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=8>
+ <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>BI TECH</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 3323P<BR>
+ 3323S<BR>
+ 3323W<BR>
+ 3329H<BR>
+ 3329P<BR>
+ 3329W<BR>
+ 3339H<BR>
+ 3339P<BR>
+ 3339W<BR>
+ 3352E<BR>
+ 3352H<BR>
+ 3352K<BR>
+ 3352P<BR>
+ 3352T<BR>
+ 3352V<BR>
+ 3352W<BR>
+ 3362H<BR>
+ 3362M<BR>
+ 3362P<BR>
+ 3362R<BR>
+ 3362S<BR>
+ 3362U<BR>
+ 3362W<BR>
+ 3362X<BR>
+ 3386B<BR>
+ 3386C<BR>
+ 3386F<BR>
+ 3386H<BR>
+ 3386K<BR>
+ 3386M<BR>
+ 3386P<BR>
+ 3386S<BR>
+ 3386W<BR>
+ 3386X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 25P<BR>
+ 25S<BR>
+ 25RX<BR>
+ 82P<BR>
+ 82M<BR>
+ 82PA<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 91E<BR>
+ 91X<BR>
+ 91T<BR>
+ 91B<BR>
+ 91A<BR>
+ 91V<BR>
+ 91W<BR>
+ 25W<BR>
+ 25V<BR>
+ 25P<BR>
+ -<BR>
+ 25S<BR>
+ 25U<BR>
+ 25RX<BR>
+ 25X<BR>
+ 72XW<BR>
+ 72XL<BR>
+ 72PM<BR>
+ 72RX<BR>
+ -<BR>
+ 72PX<BR>
+ 72P<BR>
+ 72RXW<BR>
+ 72RXL<BR>
+ 72X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ T7YB<BR>
+ T7YA<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ TXD<BR>
+ TYA<BR>
+ TYP<BR>
+ -<BR>
+ TYD<BR>
+ TX<BR>
+ -<BR>
+ 150SX<BR>
+ 100SX<BR>
+ 102T<BR>
+ 101S<BR>
+ 190T<BR>
+ 150TX<BR>
+ 101<BR>
+ -<BR>
+ -<BR>
+ 101SX<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ ET6P<BR>
+ ET6S<BR>
+ ET6X<BR>
+ RJ-6W/8014EMW<BR>
+ RJ-6P/8014EMP<BR>
+ RJ-6X/8014EMX<BR>
+ TM7W<BR>
+ TM7P<BR>
+ TM7X<BR>
+ -<BR>
+ 8017SMS<BR>
+ -<BR>
+ 8017SMB<BR>
+ 8017SMA<BR>
+ -<BR>
+ -<BR>
+ CT-6W<BR>
+ CT-6H<BR>
+ CT-6P<BR>
+ CT-6R<BR>
+ -<BR>
+ CT-6V<BR>
+ CT-6X<BR>
+ -<BR>
+ -<BR>
+ 8038EKV<BR>
+ -<BR>
+ 8038EKX<BR>
+ -<BR>
+ -<BR>
+ 8038EKP<BR>
+ 8038EKZ<BR>
+ 8038EKW<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ 3321H<BR>
+ 3321P<BR>
+ 3321N<BR>
+ 1102H<BR>
+ 1102P<BR>
+ 1102T<BR>
+ RVA0911V304A<BR>
+ -<BR>
+ RVA0911H413A<BR>
+ RVG0707V100A<BR>
+ RVA0607V(H)306A<BR>
+ RVA1214H213A<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 3104B<BR>
+ 3104C<BR>
+ 3104F<BR>
+ 3104H<BR>
+ -<BR>
+ 3104M<BR>
+ 3104P<BR>
+ 3104S<BR>
+ 3104W<BR>
+ 3104X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ EVMQ0G<BR>
+ EVMQIG<BR>
+ EVMQ3G<BR>
+ EVMS0G<BR>
+ EVMQ0G<BR>
+ EVMG0G<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ EVMK4GA00B<BR>
+ EVM30GA00B<BR>
+ EVMK0GA00B<BR>
+ EVM38GA00B<BR>
+ EVMB6<BR>
+ EVLQ0<BR>
+ -<BR>
+ EVMMSG<BR>
+ EVMMBG<BR>
+ EVMMAG<BR>
+ -<BR>
+ -<BR>
+ EVMMCS<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ EVMM1<BR>
+ -<BR>
+ -<BR>
+ EVMM0<BR>
+ -<BR>
+ -<BR>
+ EVMM3<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ 62-3-1<BR>
+ 62-1-2<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 67R<BR>
+ -<BR>
+ 67P<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 67X<BR>
+ 63V<BR>
+ 63S<BR>
+ 63M<BR>
+ -<BR>
+ -<BR>
+ 63H<BR>
+ 63P<BR>
+ -<BR>
+ -<BR>
+ 63X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ RJ/RJR50<BR>
+ RJ/RJR50<BR>
+ RJ/RJR50<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ </TR>
+</TABLE>
+<P> <P>
+<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3>
+ <TR>
+ <TD COLSPAN=7>
+ <FONT color="#0000FF" SIZE=4 FACE=ARIAL><B>SMD TRIM-POT CROSS REFERENCE</B></FONT>
+ <P>
+ <FONT SIZE=4 FACE=ARIAL><B>MULTI-TURN</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>BI TECH</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 3224G<BR>
+ 3224J<BR>
+ 3224W<BR>
+ 3269P<BR>
+ 3269W<BR>
+ 3269X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 44G<BR>
+ 44J<BR>
+ 44W<BR>
+ 84P<BR>
+ 84W<BR>
+ 84X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ ST63Z<BR>
+ ST63Y<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ ST5P<BR>
+ ST5W<BR>
+ ST5X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=7>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=7>
+ <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>BI TECH</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 3314G<BR>
+ 3314J<BR>
+ 3364A/B<BR>
+ 3364C/D<BR>
+ 3364W/X<BR>
+ 3313G<BR>
+ 3313J<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 23B<BR>
+ 23A<BR>
+ 21X<BR>
+ 21W<BR>
+ -<BR>
+ 22B<BR>
+ 22A<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ ST5YL/ST53YL<BR>
+ ST5YJ/5T53YJ<BR>
+ ST-23A<BR>
+ ST-22B<BR>
+ ST-22<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ ST-4B<BR>
+ ST-4A<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ ST-3B<BR>
+ ST-3A<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ EVM-6YS<BR>
+ EVM-1E<BR>
+ EVM-1G<BR>
+ EVM-1D<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ G4B<BR>
+ G4A<BR>
+ TR04-3S1<BR>
+ TRG04-2S1<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ DVR-43A<BR>
+ CVR-42C<BR>
+ CVR-42A/C<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ </TR>
+</TABLE>
+<P>
+<FONT SIZE=4 FACE=ARIAL><B>ALT = ALTERNATE</B></FONT>
+<P>
+
+
+<P>
+</td>
+</tr>
+</table>
+
+
+<b>Ceramic Chip Capacitor KEMET 0603 reflow solder</b><p>
+Metric Code Size 1608
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Ceramic Chip Capacitor KEMET 0805 reflow solder</b><p>
+Metric Code Size 2012
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+<b>TTL Devices, 74xx Series with European Symbols</b><p>
+Based on the following sources:
+<ul>
+<li>Texas Instruments <i>TTL Data Book</i> Volume 1, 1996.
+<li>TTL Data Book, Volume 2 , 1993
+<li>National Seminconductor Databook 1990, ALS/LS Logic
+<li>ttl 74er digital data dictionary, ECA Electronic + Acustic GmbH, ISBN 3-88109-032-0
+<li>http://icmaster.com/ViewCompare.asp
+</ul>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>Wide Small Outline package</b> 300 mil
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>VALUE
+>NAME
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>Harting & 3M Connectors</b><p>
+Low profile connectors, straight<p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>HARTING</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+10
+>NAME
+>VALUE
+1
+2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>Crystals and Crystal Resonators</b><p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>CRYSTAL RESONATOR</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+1
+
+
+
+
+<b>VG Connectors (DIN 41612/DIN 41617)</b><p>
+The library contains devices which allow to place the contacts individually or
+in one or several blocks.<p>
+This behavior is indicated by the key words <i>single</i> and <i>block</i> in
+the respective device descriptions.<p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>CONNECTOR</b><p>
+female, 96 pins, type R, rows ABC, grid 2.54 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+1
+a
+b
+c
+32
+DIN41612-R
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>Resistors in DIL Packages</b><p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>Chip Resistor Array 0603x4</b> 4 resistors in 3.20 mm x 1.60 mm size<p>
+Source: PANASONIC .. aoc0000ce1.pdf
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>AMD MACH4/MACH5 Family (Vantis)</b><p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>THIN QUAD FLAT PACK</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+TQFP 100
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>LeitOn Design-Regeln</b>
+<p>
+Diese DRU-Datei enthält viele erforderliche Design Einstellungen, damit Ihre Standardleiterplatte bei uns fehlerfrei und ohne Zusatzkosten produziert werden kann. Die Optionen Shapes und Misc sind nicht relevant und der minimale und maximale Wert für Roundness Shapes kann frei gewählt werden. Nach unten abweichende Design-Regeln sind möglich, können jedoch Aufpreise erfordern. Hinweis: Freistellungen und Streichstärken von Bestückungsdruck werden nicht im DRC geprüft!
+<br><br>
+<b>Übersicht der LeitOn Regeln:</b<<br><br>
+<u>allgemein:</u><br>
+minimale Leiterbahnbreite/-abstand: <b>0.15 mm</b><br>
+(Strichstärke für Kupferschrift sollte mind. 0.2 mm sein um gut lesbar zu bleiben)<br>
+kleinster Bohrdurchmesser: <b>0.3 mm</b><br><br>
+<u>Kupferrestringe um DK-Bohrungen:</u><br>
+Aussenlagen: <b>0.15 mm</b><br>
+Innenlagen: <b>0.2 mm</b><br>
+<br>
+<u>Masselagen-Freimachungen:</u><br>
+Innenlagen: <b>0.35 mm</b><br>
+<br>
+<u>Bestückungsdruck</u><br>
+minimale Strichstärke: <b>0.2 mm</b><br><br>
+<b><u><font color= "blue">Wichtig:</font></b></u> Verwenden Sie als Strichstärke für Masseflächen keine Strichstärken kleiner 0.1mm. Es entstehen sonst extrem große Datenmengen, weil Eagle die Massefläche stets mit Polygonen der gleichen Strichstärke füllt.
+
+</p>
+
+
+
+
+
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+which will not be processed correctly with this version.
+
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diff --git a/Layout and PCB/68030-TK-V09c.brd b/Layout and PCB/68030-TK-V09c.brd
new file mode 100644
index 0000000..45cfeac
--- /dev/null
+++ b/Layout and PCB/68030-TK-V09c.brd
@@ -0,0 +1,7870 @@
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+TOP
+Bot
+a1k.org 68030-TK v0.9b
+(c) 2013 Matthias
+Heinrichs
+a1k.org 68030-TK V0.9
+(c)2013 Matthias Heinrichs
+Free for non commercial
+reproduction
+
+JTAG
+
+
+
+<b>Motorola MC68000 Processors</b><p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>micro Ball Grid Array</b>
+
+
+
+
+
+
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+>NAME
+>VALUE
+
+
+<b>Dual In Line</b>
+
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+>NAME
+>VALUE
+
+
+<b>PLASTIC LEADED CHIP CARRIER</b><p>
+square
+
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+>NAME
+>VALUE
+
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+
+
+<b>Resistors, Capacitors, Inductors</b><p>
+Based on the previous libraries:
+<ul>
+<li>r.lbr
+<li>cap.lbr
+<li>cap-fe.lbr
+<li>captant.lbr
+<li>polcap.lbr
+<li>ipc-smd.lbr
+</ul>
+All SMD packages are defined according to the IPC specifications and CECC<p>
+<author>Created by librarian@cadsoft.de</author><p>
+<p>
+for Electrolyt Capacitors see also :<p>
+www.bccomponents.com <p>
+www.panasonic.com<p>
+www.kemet.com<p>
+http://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf <b>(SANYO)</b>
+<p>
+for trimmer refence see : <u>www.electrospec-inc.com/cross_references/trimpotcrossref.asp</u><p>
+
+<table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0>
+<tr valign="top">
+
+<! <td width="10"> </td>
+<td width="90%">
+
+<b><font color="#0000FF" size="4">TRIM-POT CROSS REFERENCE</font></b>
+<P>
+<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2>
+ <TR>
+ <TD COLSPAN=8>
+ <FONT SIZE=3 FACE=ARIAL><B>RECTANGULAR MULTI-TURN</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">BOURNS</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">BI TECH</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">DALE-VISHAY</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">PHILIPS/MEPCO</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">MURATA</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">PANASONIC</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">SPECTROL</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">MILSPEC</FONT>
+ </B>
+ </TD><TD> </TD>
+ </TR>
+ <TR>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3 >
+ 3005P<BR>
+ 3006P<BR>
+ 3006W<BR>
+ 3006Y<BR>
+ 3009P<BR>
+ 3009W<BR>
+ 3009Y<BR>
+ 3057J<BR>
+ 3057L<BR>
+ 3057P<BR>
+ 3057Y<BR>
+ 3059J<BR>
+ 3059L<BR>
+ 3059P<BR>
+ 3059Y<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ 89P<BR>
+ 89W<BR>
+ 89X<BR>
+ 89PH<BR>
+ 76P<BR>
+ 89XH<BR>
+ 78SLT<BR>
+ 78L ALT<BR>
+ 56P ALT<BR>
+ 78P ALT<BR>
+ T8S<BR>
+ 78L<BR>
+ 56P<BR>
+ 78P<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ T18/784<BR>
+ 783<BR>
+ 781<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 2199<BR>
+ 1697/1897<BR>
+ 1680/1880<BR>
+ 2187<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ 8035EKP/CT20/RJ-20P<BR>
+ -<BR>
+ RJ-20X<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 1211L<BR>
+ 8012EKQ ALT<BR>
+ 8012EKR ALT<BR>
+ 1211P<BR>
+ 8012EKJ<BR>
+ 8012EKL<BR>
+ 8012EKQ<BR>
+ 8012EKR<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ 2101P<BR>
+ 2101W<BR>
+ 2101Y<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 2102L<BR>
+ 2102S<BR>
+ 2102Y<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ EVMCOG<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ 43P<BR>
+ 43W<BR>
+ 43Y<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 40L<BR>
+ 40P<BR>
+ 40Y<BR>
+ 70Y-T602<BR>
+ 70L<BR>
+ 70P<BR>
+ 70Y<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ RT/RTR12<BR>
+ RT/RTR12<BR>
+ RT/RTR12<BR>
+ -<BR>
+ RJ/RJR12<BR>
+ RJ/RJR12<BR>
+ RJ/RJR12<BR></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=8>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=8>
+ <FONT SIZE=4 FACE=ARIAL><B>SQUARE MULTI-TURN</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>BI TECH</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 3250L<BR>
+ 3250P<BR>
+ 3250W<BR>
+ 3250X<BR>
+ 3252P<BR>
+ 3252W<BR>
+ 3252X<BR>
+ 3260P<BR>
+ 3260W<BR>
+ 3260X<BR>
+ 3262P<BR>
+ 3262W<BR>
+ 3262X<BR>
+ 3266P<BR>
+ 3266W<BR>
+ 3266X<BR>
+ 3290H<BR>
+ 3290P<BR>
+ 3290W<BR>
+ 3292P<BR>
+ 3292W<BR>
+ 3292X<BR>
+ 3296P<BR>
+ 3296W<BR>
+ 3296X<BR>
+ 3296Y<BR>
+ 3296Z<BR>
+ 3299P<BR>
+ 3299W<BR>
+ 3299X<BR>
+ 3299Y<BR>
+ 3299Z<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ 66P ALT<BR>
+ 66W ALT<BR>
+ 66X ALT<BR>
+ 66P ALT<BR>
+ 66W ALT<BR>
+ 66X ALT<BR>
+ -<BR>
+ 64W ALT<BR>
+ -<BR>
+ 64P ALT<BR>
+ 64W ALT<BR>
+ 64X ALT<BR>
+ 64P<BR>
+ 64W<BR>
+ 64X<BR>
+ 66X ALT<BR>
+ 66P ALT<BR>
+ 66W ALT<BR>
+ 66P<BR>
+ 66W<BR>
+ 66X<BR>
+ 67P<BR>
+ 67W<BR>
+ 67X<BR>
+ 67Y<BR>
+ 67Z<BR>
+ 68P<BR>
+ 68W<BR>
+ 68X<BR>
+ 67Y ALT<BR>
+ 67Z ALT<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 5050<BR>
+ 5091<BR>
+ 5080<BR>
+ 5087<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ T63YB<BR>
+ T63XB<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 5887<BR>
+ 5891<BR>
+ 5880<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ T93Z<BR>
+ T93YA<BR>
+ T93XA<BR>
+ T93YB<BR>
+ T93XB<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 8026EKP<BR>
+ 8026EKW<BR>
+ 8026EKM<BR>
+ 8026EKP<BR>
+ 8026EKB<BR>
+ 8026EKM<BR>
+ 1309X<BR>
+ 1309P<BR>
+ 1309W<BR>
+ 8024EKP<BR>
+ 8024EKW<BR>
+ 8024EKN<BR>
+ RJ-9P/CT9P<BR>
+ RJ-9W<BR>
+ RJ-9X<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 3103P<BR>
+ 3103Y<BR>
+ 3103Z<BR>
+ 3103P<BR>
+ 3103Y<BR>
+ 3103Z<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 3105P/3106P<BR>
+ 3105W/3106W<BR>
+ 3105X/3106X<BR>
+ 3105Y/3106Y<BR>
+ 3105Z/3105Z<BR>
+ 3102P<BR>
+ 3102W<BR>
+ 3102X<BR>
+ 3102Y<BR>
+ 3102Z<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ EVMCBG<BR>
+ EVMCCG<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 55-1-X<BR>
+ 55-4-X<BR>
+ 55-3-X<BR>
+ 55-2-X<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 50-2-X<BR>
+ 50-4-X<BR>
+ 50-3-X<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 64P<BR>
+ 64W<BR>
+ 64X<BR>
+ 64Y<BR>
+ 64Z<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ RT/RTR22<BR>
+ RT/RTR22<BR>
+ RT/RTR22<BR>
+ RT/RTR22<BR>
+ RJ/RJR22<BR>
+ RJ/RJR22<BR>
+ RJ/RJR22<BR>
+ RT/RTR26<BR>
+ RT/RTR26<BR>
+ RT/RTR26<BR>
+ RJ/RJR26<BR>
+ RJ/RJR26<BR>
+ RJ/RJR26<BR>
+ RJ/RJR26<BR>
+ RJ/RJR26<BR>
+ RJ/RJR26<BR>
+ RT/RTR24<BR>
+ RT/RTR24<BR>
+ RT/RTR24<BR>
+ RJ/RJR24<BR>
+ RJ/RJR24<BR>
+ RJ/RJR24<BR>
+ RJ/RJR24<BR>
+ RJ/RJR24<BR>
+ RJ/RJR24<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=8>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=8>
+ <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>BI TECH</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 3323P<BR>
+ 3323S<BR>
+ 3323W<BR>
+ 3329H<BR>
+ 3329P<BR>
+ 3329W<BR>
+ 3339H<BR>
+ 3339P<BR>
+ 3339W<BR>
+ 3352E<BR>
+ 3352H<BR>
+ 3352K<BR>
+ 3352P<BR>
+ 3352T<BR>
+ 3352V<BR>
+ 3352W<BR>
+ 3362H<BR>
+ 3362M<BR>
+ 3362P<BR>
+ 3362R<BR>
+ 3362S<BR>
+ 3362U<BR>
+ 3362W<BR>
+ 3362X<BR>
+ 3386B<BR>
+ 3386C<BR>
+ 3386F<BR>
+ 3386H<BR>
+ 3386K<BR>
+ 3386M<BR>
+ 3386P<BR>
+ 3386S<BR>
+ 3386W<BR>
+ 3386X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 25P<BR>
+ 25S<BR>
+ 25RX<BR>
+ 82P<BR>
+ 82M<BR>
+ 82PA<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 91E<BR>
+ 91X<BR>
+ 91T<BR>
+ 91B<BR>
+ 91A<BR>
+ 91V<BR>
+ 91W<BR>
+ 25W<BR>
+ 25V<BR>
+ 25P<BR>
+ -<BR>
+ 25S<BR>
+ 25U<BR>
+ 25RX<BR>
+ 25X<BR>
+ 72XW<BR>
+ 72XL<BR>
+ 72PM<BR>
+ 72RX<BR>
+ -<BR>
+ 72PX<BR>
+ 72P<BR>
+ 72RXW<BR>
+ 72RXL<BR>
+ 72X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ T7YB<BR>
+ T7YA<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ TXD<BR>
+ TYA<BR>
+ TYP<BR>
+ -<BR>
+ TYD<BR>
+ TX<BR>
+ -<BR>
+ 150SX<BR>
+ 100SX<BR>
+ 102T<BR>
+ 101S<BR>
+ 190T<BR>
+ 150TX<BR>
+ 101<BR>
+ -<BR>
+ -<BR>
+ 101SX<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ ET6P<BR>
+ ET6S<BR>
+ ET6X<BR>
+ RJ-6W/8014EMW<BR>
+ RJ-6P/8014EMP<BR>
+ RJ-6X/8014EMX<BR>
+ TM7W<BR>
+ TM7P<BR>
+ TM7X<BR>
+ -<BR>
+ 8017SMS<BR>
+ -<BR>
+ 8017SMB<BR>
+ 8017SMA<BR>
+ -<BR>
+ -<BR>
+ CT-6W<BR>
+ CT-6H<BR>
+ CT-6P<BR>
+ CT-6R<BR>
+ -<BR>
+ CT-6V<BR>
+ CT-6X<BR>
+ -<BR>
+ -<BR>
+ 8038EKV<BR>
+ -<BR>
+ 8038EKX<BR>
+ -<BR>
+ -<BR>
+ 8038EKP<BR>
+ 8038EKZ<BR>
+ 8038EKW<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ 3321H<BR>
+ 3321P<BR>
+ 3321N<BR>
+ 1102H<BR>
+ 1102P<BR>
+ 1102T<BR>
+ RVA0911V304A<BR>
+ -<BR>
+ RVA0911H413A<BR>
+ RVG0707V100A<BR>
+ RVA0607V(H)306A<BR>
+ RVA1214H213A<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 3104B<BR>
+ 3104C<BR>
+ 3104F<BR>
+ 3104H<BR>
+ -<BR>
+ 3104M<BR>
+ 3104P<BR>
+ 3104S<BR>
+ 3104W<BR>
+ 3104X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ EVMQ0G<BR>
+ EVMQIG<BR>
+ EVMQ3G<BR>
+ EVMS0G<BR>
+ EVMQ0G<BR>
+ EVMG0G<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ EVMK4GA00B<BR>
+ EVM30GA00B<BR>
+ EVMK0GA00B<BR>
+ EVM38GA00B<BR>
+ EVMB6<BR>
+ EVLQ0<BR>
+ -<BR>
+ EVMMSG<BR>
+ EVMMBG<BR>
+ EVMMAG<BR>
+ -<BR>
+ -<BR>
+ EVMMCS<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ EVMM1<BR>
+ -<BR>
+ -<BR>
+ EVMM0<BR>
+ -<BR>
+ -<BR>
+ EVMM3<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ 62-3-1<BR>
+ 62-1-2<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 67R<BR>
+ -<BR>
+ 67P<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 67X<BR>
+ 63V<BR>
+ 63S<BR>
+ 63M<BR>
+ -<BR>
+ -<BR>
+ 63H<BR>
+ 63P<BR>
+ -<BR>
+ -<BR>
+ 63X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ RJ/RJR50<BR>
+ RJ/RJR50<BR>
+ RJ/RJR50<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ </TR>
+</TABLE>
+<P> <P>
+<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3>
+ <TR>
+ <TD COLSPAN=7>
+ <FONT color="#0000FF" SIZE=4 FACE=ARIAL><B>SMD TRIM-POT CROSS REFERENCE</B></FONT>
+ <P>
+ <FONT SIZE=4 FACE=ARIAL><B>MULTI-TURN</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>BI TECH</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 3224G<BR>
+ 3224J<BR>
+ 3224W<BR>
+ 3269P<BR>
+ 3269W<BR>
+ 3269X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 44G<BR>
+ 44J<BR>
+ 44W<BR>
+ 84P<BR>
+ 84W<BR>
+ 84X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ ST63Z<BR>
+ ST63Y<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ ST5P<BR>
+ ST5W<BR>
+ ST5X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=7>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=7>
+ <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>BI TECH</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 3314G<BR>
+ 3314J<BR>
+ 3364A/B<BR>
+ 3364C/D<BR>
+ 3364W/X<BR>
+ 3313G<BR>
+ 3313J<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 23B<BR>
+ 23A<BR>
+ 21X<BR>
+ 21W<BR>
+ -<BR>
+ 22B<BR>
+ 22A<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ ST5YL/ST53YL<BR>
+ ST5YJ/5T53YJ<BR>
+ ST-23A<BR>
+ ST-22B<BR>
+ ST-22<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ ST-4B<BR>
+ ST-4A<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ ST-3B<BR>
+ ST-3A<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ EVM-6YS<BR>
+ EVM-1E<BR>
+ EVM-1G<BR>
+ EVM-1D<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ G4B<BR>
+ G4A<BR>
+ TR04-3S1<BR>
+ TRG04-2S1<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ DVR-43A<BR>
+ CVR-42C<BR>
+ CVR-42A/C<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ </TR>
+</TABLE>
+<P>
+<FONT SIZE=4 FACE=ARIAL><B>ALT = ALTERNATE</B></FONT>
+<P>
+
+
+<P>
+</td>
+</tr>
+</table>
+
+
+<b>Ceramic Chip Capacitor KEMET 0603 reflow solder</b><p>
+Metric Code Size 1608
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Ceramic Chip Capacitor KEMET 0805 reflow solder</b><p>
+Metric Code Size 2012
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+<b>TTL Devices, 74xx Series with European Symbols</b><p>
+Based on the following sources:
+<ul>
+<li>Texas Instruments <i>TTL Data Book</i> Volume 1, 1996.
+<li>TTL Data Book, Volume 2 , 1993
+<li>National Seminconductor Databook 1990, ALS/LS Logic
+<li>ttl 74er digital data dictionary, ECA Electronic + Acustic GmbH, ISBN 3-88109-032-0
+<li>http://icmaster.com/ViewCompare.asp
+</ul>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>Wide Small Outline package</b> 300 mil
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>VALUE
+>NAME
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>Harting & 3M Connectors</b><p>
+Low profile connectors, straight<p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>HARTING</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+10
+>NAME
+>VALUE
+1
+2
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>Crystals and Crystal Resonators</b><p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>CRYSTAL RESONATOR</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+1
+
+
+
+
+<b>VG Connectors (DIN 41612/DIN 41617)</b><p>
+The library contains devices which allow to place the contacts individually or
+in one or several blocks.<p>
+This behavior is indicated by the key words <i>single</i> and <i>block</i> in
+the respective device descriptions.<p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>CONNECTOR</b><p>
+female, 96 pins, type R, rows ABC, grid 2.54 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+1
+a
+b
+c
+32
+DIN41612-R
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>Resistors in DIL Packages</b><p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>Chip Resistor Array 0603x4</b> 4 resistors in 3.20 mm x 1.60 mm size<p>
+Source: PANASONIC .. aoc0000ce1.pdf
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>AMD MACH4/MACH5 Family (Vantis)</b><p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>THIN QUAD FLAT PACK</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+TQFP 100
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>LeitOn Design-Regeln</b>
+<p>
+Diese DRU-Datei enthält viele erforderliche Design Einstellungen, damit Ihre Standardleiterplatte bei uns fehlerfrei und ohne Zusatzkosten produziert werden kann. Die Optionen Shapes und Misc sind nicht relevant und der minimale und maximale Wert für Roundness Shapes kann frei gewählt werden. Nach unten abweichende Design-Regeln sind möglich, können jedoch Aufpreise erfordern. Hinweis: Freistellungen und Streichstärken von Bestückungsdruck werden nicht im DRC geprüft!
+<br><br>
+<b>Übersicht der LeitOn Regeln:</b<<br><br>
+<u>allgemein:</u><br>
+minimale Leiterbahnbreite/-abstand: <b>0.15 mm</b><br>
+(Strichstärke für Kupferschrift sollte mind. 0.2 mm sein um gut lesbar zu bleiben)<br>
+kleinster Bohrdurchmesser: <b>0.3 mm</b><br><br>
+<u>Kupferrestringe um DK-Bohrungen:</u><br>
+Aussenlagen: <b>0.15 mm</b><br>
+Innenlagen: <b>0.2 mm</b><br>
+<br>
+<u>Masselagen-Freimachungen:</u><br>
+Innenlagen: <b>0.35 mm</b><br>
+<br>
+<u>Bestückungsdruck</u><br>
+minimale Strichstärke: <b>0.2 mm</b><br><br>
+<b><u><font color= "blue">Wichtig:</font></b></u> Verwenden Sie als Strichstärke für Masseflächen keine Strichstärken kleiner 0.1mm. Es entstehen sonst extrem große Datenmengen, weil Eagle die Massefläche stets mit Polygonen der gleichen Strichstärke füllt.
+
+</p>
+
+
+
+
+
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+Since Version 6.2.2 text objects can contain more than one line,
+which will not be processed correctly with this version.
+
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+
diff --git a/Layout and PCB/68030-TK-V09c.sch b/Layout and PCB/68030-TK-V09c.sch
new file mode 100644
index 0000000..a7a04df
--- /dev/null
+++ b/Layout and PCB/68030-TK-V09c.sch
@@ -0,0 +1,14401 @@
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+<b>Motorola MC68000 Processors</b><p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>micro Ball Grid Array</b>
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>Dual In Line</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>PLASTIC LEADED CHIP CARRIER</b><p>
+square
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
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+
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+
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+
+
+
+
+
+
+
+
+
+
+
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+
+
+
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+
+
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+
+
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+
+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
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+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>PLCC Socked</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>VALUE
+>NAME
+68
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>VALUE
+>NAME
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+VCC
+GND
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>VALUE
+>NAME
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+VCC
+GND
+
+
+
+
+
+
+
+
+
+
+>VALUE
+>NAME
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+GND
+VCC
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>68xxx PROCESSOR</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>68xxx PROCESSOR</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>68xxx PROCESSOR</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>Resistors, Capacitors, Inductors</b><p>
+Based on the previous libraries:
+<ul>
+<li>r.lbr
+<li>cap.lbr
+<li>cap-fe.lbr
+<li>captant.lbr
+<li>polcap.lbr
+<li>ipc-smd.lbr
+</ul>
+All SMD packages are defined according to the IPC specifications and CECC<p>
+<author>Created by librarian@cadsoft.de</author><p>
+<p>
+for Electrolyt Capacitors see also :<p>
+www.bccomponents.com <p>
+www.panasonic.com<p>
+www.kemet.com<p>
+http://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf <b>(SANYO)</b>
+<p>
+for trimmer refence see : <u>www.electrospec-inc.com/cross_references/trimpotcrossref.asp</u><p>
+
+<table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0>
+<tr valign="top">
+
+<! <td width="10"> </td>
+<td width="90%">
+
+<b><font color="#0000FF" size="4">TRIM-POT CROSS REFERENCE</font></b>
+<P>
+<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2>
+ <TR>
+ <TD COLSPAN=8>
+ <FONT SIZE=3 FACE=ARIAL><B>RECTANGULAR MULTI-TURN</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">BOURNS</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">BI TECH</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">DALE-VISHAY</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">PHILIPS/MEPCO</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">MURATA</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">PANASONIC</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">SPECTROL</FONT>
+ </B>
+ </TD>
+ <TD ALIGN=CENTER>
+ <B>
+ <FONT SIZE=3 FACE=ARIAL color="#FF0000">MILSPEC</FONT>
+ </B>
+ </TD><TD> </TD>
+ </TR>
+ <TR>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3 >
+ 3005P<BR>
+ 3006P<BR>
+ 3006W<BR>
+ 3006Y<BR>
+ 3009P<BR>
+ 3009W<BR>
+ 3009Y<BR>
+ 3057J<BR>
+ 3057L<BR>
+ 3057P<BR>
+ 3057Y<BR>
+ 3059J<BR>
+ 3059L<BR>
+ 3059P<BR>
+ 3059Y<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ 89P<BR>
+ 89W<BR>
+ 89X<BR>
+ 89PH<BR>
+ 76P<BR>
+ 89XH<BR>
+ 78SLT<BR>
+ 78L ALT<BR>
+ 56P ALT<BR>
+ 78P ALT<BR>
+ T8S<BR>
+ 78L<BR>
+ 56P<BR>
+ 78P<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ T18/784<BR>
+ 783<BR>
+ 781<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 2199<BR>
+ 1697/1897<BR>
+ 1680/1880<BR>
+ 2187<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ 8035EKP/CT20/RJ-20P<BR>
+ -<BR>
+ RJ-20X<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 1211L<BR>
+ 8012EKQ ALT<BR>
+ 8012EKR ALT<BR>
+ 1211P<BR>
+ 8012EKJ<BR>
+ 8012EKL<BR>
+ 8012EKQ<BR>
+ 8012EKR<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ 2101P<BR>
+ 2101W<BR>
+ 2101Y<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 2102L<BR>
+ 2102S<BR>
+ 2102Y<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ EVMCOG<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ 43P<BR>
+ 43W<BR>
+ 43Y<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 40L<BR>
+ 40P<BR>
+ 40Y<BR>
+ 70Y-T602<BR>
+ 70L<BR>
+ 70P<BR>
+ 70Y<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ RT/RTR12<BR>
+ RT/RTR12<BR>
+ RT/RTR12<BR>
+ -<BR>
+ RJ/RJR12<BR>
+ RJ/RJR12<BR>
+ RJ/RJR12<BR></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=8>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=8>
+ <FONT SIZE=4 FACE=ARIAL><B>SQUARE MULTI-TURN</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>BI TECH</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 3250L<BR>
+ 3250P<BR>
+ 3250W<BR>
+ 3250X<BR>
+ 3252P<BR>
+ 3252W<BR>
+ 3252X<BR>
+ 3260P<BR>
+ 3260W<BR>
+ 3260X<BR>
+ 3262P<BR>
+ 3262W<BR>
+ 3262X<BR>
+ 3266P<BR>
+ 3266W<BR>
+ 3266X<BR>
+ 3290H<BR>
+ 3290P<BR>
+ 3290W<BR>
+ 3292P<BR>
+ 3292W<BR>
+ 3292X<BR>
+ 3296P<BR>
+ 3296W<BR>
+ 3296X<BR>
+ 3296Y<BR>
+ 3296Z<BR>
+ 3299P<BR>
+ 3299W<BR>
+ 3299X<BR>
+ 3299Y<BR>
+ 3299Z<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ 66P ALT<BR>
+ 66W ALT<BR>
+ 66X ALT<BR>
+ 66P ALT<BR>
+ 66W ALT<BR>
+ 66X ALT<BR>
+ -<BR>
+ 64W ALT<BR>
+ -<BR>
+ 64P ALT<BR>
+ 64W ALT<BR>
+ 64X ALT<BR>
+ 64P<BR>
+ 64W<BR>
+ 64X<BR>
+ 66X ALT<BR>
+ 66P ALT<BR>
+ 66W ALT<BR>
+ 66P<BR>
+ 66W<BR>
+ 66X<BR>
+ 67P<BR>
+ 67W<BR>
+ 67X<BR>
+ 67Y<BR>
+ 67Z<BR>
+ 68P<BR>
+ 68W<BR>
+ 68X<BR>
+ 67Y ALT<BR>
+ 67Z ALT<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 5050<BR>
+ 5091<BR>
+ 5080<BR>
+ 5087<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ T63YB<BR>
+ T63XB<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 5887<BR>
+ 5891<BR>
+ 5880<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ T93Z<BR>
+ T93YA<BR>
+ T93XA<BR>
+ T93YB<BR>
+ T93XB<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 8026EKP<BR>
+ 8026EKW<BR>
+ 8026EKM<BR>
+ 8026EKP<BR>
+ 8026EKB<BR>
+ 8026EKM<BR>
+ 1309X<BR>
+ 1309P<BR>
+ 1309W<BR>
+ 8024EKP<BR>
+ 8024EKW<BR>
+ 8024EKN<BR>
+ RJ-9P/CT9P<BR>
+ RJ-9W<BR>
+ RJ-9X<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 3103P<BR>
+ 3103Y<BR>
+ 3103Z<BR>
+ 3103P<BR>
+ 3103Y<BR>
+ 3103Z<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 3105P/3106P<BR>
+ 3105W/3106W<BR>
+ 3105X/3106X<BR>
+ 3105Y/3106Y<BR>
+ 3105Z/3105Z<BR>
+ 3102P<BR>
+ 3102W<BR>
+ 3102X<BR>
+ 3102Y<BR>
+ 3102Z<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ EVMCBG<BR>
+ EVMCCG<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 55-1-X<BR>
+ 55-4-X<BR>
+ 55-3-X<BR>
+ 55-2-X<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 50-2-X<BR>
+ 50-4-X<BR>
+ 50-3-X<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 64P<BR>
+ 64W<BR>
+ 64X<BR>
+ 64Y<BR>
+ 64Z<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ RT/RTR22<BR>
+ RT/RTR22<BR>
+ RT/RTR22<BR>
+ RT/RTR22<BR>
+ RJ/RJR22<BR>
+ RJ/RJR22<BR>
+ RJ/RJR22<BR>
+ RT/RTR26<BR>
+ RT/RTR26<BR>
+ RT/RTR26<BR>
+ RJ/RJR26<BR>
+ RJ/RJR26<BR>
+ RJ/RJR26<BR>
+ RJ/RJR26<BR>
+ RJ/RJR26<BR>
+ RJ/RJR26<BR>
+ RT/RTR24<BR>
+ RT/RTR24<BR>
+ RT/RTR24<BR>
+ RJ/RJR24<BR>
+ RJ/RJR24<BR>
+ RJ/RJR24<BR>
+ RJ/RJR24<BR>
+ RJ/RJR24<BR>
+ RJ/RJR24<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=8>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=8>
+ <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>BI TECH</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT>
+ </TD>
+ <TD ALIGN=CENTER>
+ <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 3323P<BR>
+ 3323S<BR>
+ 3323W<BR>
+ 3329H<BR>
+ 3329P<BR>
+ 3329W<BR>
+ 3339H<BR>
+ 3339P<BR>
+ 3339W<BR>
+ 3352E<BR>
+ 3352H<BR>
+ 3352K<BR>
+ 3352P<BR>
+ 3352T<BR>
+ 3352V<BR>
+ 3352W<BR>
+ 3362H<BR>
+ 3362M<BR>
+ 3362P<BR>
+ 3362R<BR>
+ 3362S<BR>
+ 3362U<BR>
+ 3362W<BR>
+ 3362X<BR>
+ 3386B<BR>
+ 3386C<BR>
+ 3386F<BR>
+ 3386H<BR>
+ 3386K<BR>
+ 3386M<BR>
+ 3386P<BR>
+ 3386S<BR>
+ 3386W<BR>
+ 3386X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 25P<BR>
+ 25S<BR>
+ 25RX<BR>
+ 82P<BR>
+ 82M<BR>
+ 82PA<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 91E<BR>
+ 91X<BR>
+ 91T<BR>
+ 91B<BR>
+ 91A<BR>
+ 91V<BR>
+ 91W<BR>
+ 25W<BR>
+ 25V<BR>
+ 25P<BR>
+ -<BR>
+ 25S<BR>
+ 25U<BR>
+ 25RX<BR>
+ 25X<BR>
+ 72XW<BR>
+ 72XL<BR>
+ 72PM<BR>
+ 72RX<BR>
+ -<BR>
+ 72PX<BR>
+ 72P<BR>
+ 72RXW<BR>
+ 72RXL<BR>
+ 72X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ T7YB<BR>
+ T7YA<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ TXD<BR>
+ TYA<BR>
+ TYP<BR>
+ -<BR>
+ TYD<BR>
+ TX<BR>
+ -<BR>
+ 150SX<BR>
+ 100SX<BR>
+ 102T<BR>
+ 101S<BR>
+ 190T<BR>
+ 150TX<BR>
+ 101<BR>
+ -<BR>
+ -<BR>
+ 101SX<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ ET6P<BR>
+ ET6S<BR>
+ ET6X<BR>
+ RJ-6W/8014EMW<BR>
+ RJ-6P/8014EMP<BR>
+ RJ-6X/8014EMX<BR>
+ TM7W<BR>
+ TM7P<BR>
+ TM7X<BR>
+ -<BR>
+ 8017SMS<BR>
+ -<BR>
+ 8017SMB<BR>
+ 8017SMA<BR>
+ -<BR>
+ -<BR>
+ CT-6W<BR>
+ CT-6H<BR>
+ CT-6P<BR>
+ CT-6R<BR>
+ -<BR>
+ CT-6V<BR>
+ CT-6X<BR>
+ -<BR>
+ -<BR>
+ 8038EKV<BR>
+ -<BR>
+ 8038EKX<BR>
+ -<BR>
+ -<BR>
+ 8038EKP<BR>
+ 8038EKZ<BR>
+ 8038EKW<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ 3321H<BR>
+ 3321P<BR>
+ 3321N<BR>
+ 1102H<BR>
+ 1102P<BR>
+ 1102T<BR>
+ RVA0911V304A<BR>
+ -<BR>
+ RVA0911H413A<BR>
+ RVG0707V100A<BR>
+ RVA0607V(H)306A<BR>
+ RVA1214H213A<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 3104B<BR>
+ 3104C<BR>
+ 3104F<BR>
+ 3104H<BR>
+ -<BR>
+ 3104M<BR>
+ 3104P<BR>
+ 3104S<BR>
+ 3104W<BR>
+ 3104X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ EVMQ0G<BR>
+ EVMQIG<BR>
+ EVMQ3G<BR>
+ EVMS0G<BR>
+ EVMQ0G<BR>
+ EVMG0G<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ EVMK4GA00B<BR>
+ EVM30GA00B<BR>
+ EVMK0GA00B<BR>
+ EVM38GA00B<BR>
+ EVMB6<BR>
+ EVLQ0<BR>
+ -<BR>
+ EVMMSG<BR>
+ EVMMBG<BR>
+ EVMMAG<BR>
+ -<BR>
+ -<BR>
+ EVMMCS<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ EVMM1<BR>
+ -<BR>
+ -<BR>
+ EVMM0<BR>
+ -<BR>
+ -<BR>
+ EVMM3<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ 62-3-1<BR>
+ 62-1-2<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 67R<BR>
+ -<BR>
+ 67P<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ 67X<BR>
+ 63V<BR>
+ 63S<BR>
+ 63M<BR>
+ -<BR>
+ -<BR>
+ 63H<BR>
+ 63P<BR>
+ -<BR>
+ -<BR>
+ 63X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ RJ/RJR50<BR>
+ RJ/RJR50<BR>
+ RJ/RJR50<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ </TR>
+</TABLE>
+<P> <P>
+<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3>
+ <TR>
+ <TD COLSPAN=7>
+ <FONT color="#0000FF" SIZE=4 FACE=ARIAL><B>SMD TRIM-POT CROSS REFERENCE</B></FONT>
+ <P>
+ <FONT SIZE=4 FACE=ARIAL><B>MULTI-TURN</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>BI TECH</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 3224G<BR>
+ 3224J<BR>
+ 3224W<BR>
+ 3269P<BR>
+ 3269W<BR>
+ 3269X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 44G<BR>
+ 44J<BR>
+ 44W<BR>
+ 84P<BR>
+ 84W<BR>
+ 84X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ ST63Z<BR>
+ ST63Y<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ ST5P<BR>
+ ST5W<BR>
+ ST5X<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=7>
+ </TD>
+ </TR>
+ <TR>
+ <TD COLSPAN=7>
+ <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>BI TECH</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT>
+ </TD>
+ <TD>
+ <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT>
+ </TD>
+ </TR>
+ <TR>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 3314G<BR>
+ 3314J<BR>
+ 3364A/B<BR>
+ 3364C/D<BR>
+ 3364W/X<BR>
+ 3313G<BR>
+ 3313J<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ 23B<BR>
+ 23A<BR>
+ 21X<BR>
+ 21W<BR>
+ -<BR>
+ 22B<BR>
+ 22A<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ ST5YL/ST53YL<BR>
+ ST5YJ/5T53YJ<BR>
+ ST-23A<BR>
+ ST-22B<BR>
+ ST-22<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ ST-4B<BR>
+ ST-4A<BR>
+ -<BR>
+ -<BR>
+ -<BR>
+ ST-3B<BR>
+ ST-3A<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ EVM-6YS<BR>
+ EVM-1E<BR>
+ EVM-1G<BR>
+ EVM-1D<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ G4B<BR>
+ G4A<BR>
+ TR04-3S1<BR>
+ TRG04-2S1<BR>
+ -<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3>
+ -<BR>
+ -<BR>
+ DVR-43A<BR>
+ CVR-42C<BR>
+ CVR-42A/C<BR>
+ -<BR>
+ -<BR></FONT>
+ </TD>
+ </TR>
+</TABLE>
+<P>
+<FONT SIZE=4 FACE=ARIAL><B>ALT = ALTERNATE</B></FONT>
+<P>
+
+
+<P>
+</td>
+</tr>
+</table>
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b><p>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>CAPACITOR</b><p>
+grid 2.5 mm, outline 2.4 x 4.4 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 2.5 mm, outline 2.5 x 5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 2.5 mm, outline 3 x 5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 2.5 mm, outline 4 x 5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 2.5 mm, outline 5 x 5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 2.5 mm, outline 6 x 5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 2.5 mm + 5 mm, outline 2.4 x 7 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 2.5 + 5 mm, outline 2.5 x 7.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 2.5 + 5 mm, outline 3.5 x 7.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 2.5 + 5 mm, outline 4.5 x 7.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 2.5 + 5 mm, outline 5.5 x 7.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 5 mm, outline 2.4 x 4.4 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>CAPACITOR</b><p>
+grid 5 mm, outline 2.5 x 7.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 5 mm, outline 4.5 x 7.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 5 mm, outline 3 x 7.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 5 mm, outline 5 x 7.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 5 mm, outline 5.5 x 7.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 5 mm, outline 7.5 x 7.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+Horizontal, grid 5 mm, outline 7.5 x 7.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>CAPACITOR</b><p>
+grid 7.5 mm, outline 3.2 x 10.3 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 7.5 mm, outline 4.2 x 10.3 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 7.5 mm, outline 5.2 x 10.6 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 10.2 mm, outline 4.3 x 13.3 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 10.2 mm, outline 5.4 x 13.3 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 10.2 mm, outline 6.4 x 13.3 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 10.2 mm + 15.2 mm, outline 6.2 x 18.4 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 15 mm, outline 5.4 x 18.3 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 15 mm, outline 6.4 x 18.3 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 15 mm, outline 7.2 x 18.3 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 15 mm, outline 8.4 x 18.3 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 15 mm, outline 9.1 x 18.2 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 22.5 mm, outline 6.2 x 26.8 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 22.5 mm, outline 7.4 x 26.8 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 22.5 mm, outline 8.7 x 26.8 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 22.5 mm, outline 10.8 x 26.8 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 22.5 mm, outline 11.3 x 26.8 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 27.5 mm, outline 9.3 x 31.6 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 27.5 mm, outline 11.3 x 31.6 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 27.5 mm, outline 13.4 x 31.6 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 27.5 mm, outline 20.5 x 31.6 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 32.5 mm, outline 13.7 x 37.4 mm
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 32.5 mm, outline 16.2 x 37.4 mm
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 32.5 mm, outline 18.2 x 37.4 mm
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 37.5 mm, outline 19.2 x 41.8 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 37.5 mm, outline 20.3 x 41.8 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 5 mm, outline 3.5 x 7.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 37.5 mm, outline 15.5 x 41.8 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 7.5 mm, outline 6.3 x 10.6 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 27.5 mm, outline 15.4 x 31.6 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CAPACITOR</b><p>
+grid 27.5 mm, outline 17.3 x 31.6 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>Ceramic Chip Capacitor KEMET 0204 reflow solder</b><p>
+Metric Code Size 1005
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Ceramic Chip Capacitor KEMET 0603 reflow solder</b><p>
+Metric Code Size 1608
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Ceramic Chip Capacitor KEMET 0805 reflow solder</b><p>
+Metric Code Size 2012
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Ceramic Chip Capacitor KEMET 1206 reflow solder</b><p>
+Metric Code Size 3216
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Ceramic Chip Capacitor KEMET 1210 reflow solder</b><p>
+Metric Code Size 3225
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Ceramic Chip Capacitor KEMET 1812 reflow solder</b><p>
+Metric Code Size 4532
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Ceramic Chip Capacitor KEMET 1825 reflow solder</b><p>
+Metric Code Size 4564
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Ceramic Chip Capacitor KEMET 2220 reflow solder</b><p>Metric Code Size 5650
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Ceramic Chip Capacitor KEMET 2225 reflow solder</b><p>Metric Code Size 5664
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b> </b><p>
+Source: http://www.vishay.com/docs/10129/hpc0201a.pdf
+
+
+>NAME
+>VALUE
+
+
+
+Source: http://www.avxcorp.com/docs/catalogs/cx5r.pdf
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+<b>CAPACITOR</b><p>
+Source: AVX .. aphvc.pdf
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>CAPACITOR</b><p>
+Source: AVX .. aphvc.pdf
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b> wave soldering<p>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+wave soldering
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+wave soldering
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+wave soldering
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+wave soldering
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+wave soldering
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+wave soldering
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+wave soldering
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b>
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+wave soldering
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+Source: http://download.siliconexpert.com/pdfs/2005/02/24/Semi_Ap/2/VSH/Resistor/dcrcwfre.pdf
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b> wave soldering<p>
+Source: http://download.siliconexpert.com/pdfs/2005/02/24/Semi_Ap/2/VSH/Resistor/dcrcwfre.pdf
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+MELF 0.10 W
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+MELF 0.25 W
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+MELF 0.12 W
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+MELF 0.10 W
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+MELF 0.25 W
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+MELF 0.25 W
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+MELF 0.12 W
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+MELF 0.25 W
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+type 0204, grid 5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+type 0204, grid 7.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+type 0204, grid 2.5 mm
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>RESISTOR</b><p>
+type 0207, grid 10 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+type 0207, grid 12 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+<b>RESISTOR</b><p>
+type 0207, grid 15mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+<b>RESISTOR</b><p>
+type 0207, grid 2.5 mm
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>RESISTOR</b><p>
+type 0207, grid 5 mm
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>RESISTOR</b><p>
+type 0207, grid 7.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+type 0309, grid 10mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+type 0309, grid 12.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+type 0309, grid 2.5 mm
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>RESISTOR</b><p>
+type 0411, grid 12.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+type 0411, grid 15 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+type 0411, grid 3.81 mm
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+<b>RESISTOR</b><p>
+type 0414, grid 15 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+type 0414, grid 5 mm
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+<b>RESISTOR</b><p>
+type 0617, grid 17.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+type 0617, grid 22.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+type 0617, grid 5 mm
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+<b>RESISTOR</b><p>
+type 0922, grid 22.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+<b>RESISTOR</b><p>
+type 0613, grid 5 mm
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+<b>RESISTOR</b><p>
+type 0613, grid 15 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+type 0817, grid 22.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+0817
+
+
+
+
+<b>RESISTOR</b><p>
+type 0817, grid 6.35 mm
+
+
+
+
+
+
+>NAME
+>VALUE
+0817
+
+
+
+<b>RESISTOR</b><p>
+type V234, grid 12.5 mm
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+type V235, grid 17.78 mm
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>RESISTOR</b><p>
+type V526-0, grid 2.5 mm
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CECC Size RC2211</b> Reflow Soldering<p>
+source Beyschlag
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CECC Size RC2211</b> Wave Soldering<p>
+source Beyschlag
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CECC Size RC3715</b> Reflow Soldering<p>
+source Beyschlag
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CECC Size RC3715</b> Wave Soldering<p>
+source Beyschlag
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CECC Size RC6123</b> Reflow Soldering<p>
+source Beyschlag
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CECC Size RC6123</b> Wave Soldering<p>
+source Beyschlag
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>RESISTOR</b><p>
+type 0922, grid 7.5 mm
+
+
+
+
+
+
+>NAME
+>VALUE
+0922
+
+
+
+<b>RESISTOR</b><p>
+type RDH, grid 15 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+RDH
+
+
+
+
+<b>Mini MELF 0102 Axial</b>
+
+
+
+
+>NAME
+>VALUE
+
+
+
+<b>RESISTOR</b> chip<p>
+Source: http://www.vishay.com/docs/20008/dcrcw.pdf
+
+
+>NAME
+>VALUE
+
+
+
+
+
+<b>Bulk Metal® Foil Technology</b>, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements<p>
+MIL SIZE RBR52<br>
+Source: VISHAY .. vta56.pdf
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Bulk Metal® Foil Technology</b>, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements<p>
+MIL SIZE RBR53<br>
+Source: VISHAY .. vta56.pdf
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Bulk Metal® Foil Technology</b>, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements<p>
+MIL SIZE RBR54<br>
+Source: VISHAY .. vta56.pdf
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Bulk Metal® Foil Technology</b>, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements<p>
+MIL SIZE RBR55<br>
+Source: VISHAY .. vta56.pdf
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Bulk Metal® Foil Technology</b>, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements<p>
+MIL SIZE RBR56<br>
+Source: VISHAY .. vta56.pdf
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Bulk Metal® Foil Technology</b>, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements<p>
+MIL SIZE RNC55<br>
+Source: VISHAY .. vta56.pdf
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Bulk Metal® Foil Technology</b>, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements<p>
+MIL SIZE RNC60<br>
+Source: VISHAY .. vta56.pdf
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Package 4527</b><p>
+Source: http://www.vishay.com/docs/31059/wsrhigh.pdf
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>Wirewound Resistors, Precision Power</b><p>
+Source: VISHAY wscwsn.pdf
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>Wirewound Resistors, Precision Power</b><p>
+Source: VISHAY wscwsn.pdf
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>Wirewound Resistors, Precision Power</b><p>
+Source: VISHAY wscwsn.pdf
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>Wirewound Resistors, Precision Power</b><p>
+Source: VISHAY wscwsn.pdf
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>Wirewound Resistors, Precision Power</b><p>
+Source: VISHAY wscwsn.pdf
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>Wirewound Resistors, Precision Power</b><p>
+Source: VISHAY wscwsn.pdf
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>CRCW1218 Thick Film, Rectangular Chip Resistors</b><p>
+Source: http://www.vishay.com .. dcrcw.pdf
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+<b>Chip Monolithic Ceramic Capacitors</b> Medium Voltage High Capacitance for General Use<p>
+Source: http://www.murata.com .. GRM43DR72E224KW01.pdf
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+<B>CAPACITOR</B>, European symbol
+
+
+
+
+
+
+
+
+
+
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+
+
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+
+
+
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+<B>RESISTOR</B>, European symbol
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>Frames for Sheet and Layout</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>DRAWING_NAME
+>LAST_DATE_TIME
+>SHEET
+Sheet:
+
+
+
+
+
+<b>FRAME</b><p>
+DIN A4, landscape with location and doc. field
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>TTL Devices, 74xx Series with European Symbols</b><p>
+Based on the following sources:
+<ul>
+<li>Texas Instruments <i>TTL Data Book</i> Volume 1, 1996.
+<li>TTL Data Book, Volume 2 , 1993
+<li>National Seminconductor Databook 1990, ALS/LS Logic
+<li>ttl 74er digital data dictionary, ECA Electronic + Acustic GmbH, ISBN 3-88109-032-0
+<li>http://icmaster.com/ViewCompare.asp
+</ul>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>Dual In Line Package</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>Wide Small Outline package</b> 300 mil
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>VALUE
+>NAME
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>Leadless Chip Carrier</b><p> Ceramic Package
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+GND
+VCC
+
+
+
+
+
+
+Octal <b>BUS TRANSCEIVER</b>, 3-state
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>Harting & 3M Connectors</b><p>
+Low profile connectors, straight<p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>HARTING</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+10
+>NAME
+>VALUE
+1
+2
+
+
+
+
+
+
+
+
+
+
+
+
+<b>HARTING</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+1
+2
+>NAME
+>VALUE
+10
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>3M</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+<b>3M</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>VALUE
+>NAME
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>HARTING</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>Crystals and Crystal Resonators</b><p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>CRYSTAL RESONATOR</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+1
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+GND
+VCC
+OUT
+
+
+
+
+
+
+
+<b>CRYSTAL RESONATOR</b>
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>VG Connectors (DIN 41612/DIN 41617)</b><p>
+The library contains devices which allow to place the contacts individually or
+in one or several blocks.<p>
+This behavior is indicated by the key words <i>single</i> and <i>block</i> in
+the respective device descriptions.<p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>CONNECTOR</b><p>
+female, 96 pins, type R, rows ABC, grid 2.54 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+1
+a
+b
+c
+32
+DIN41612-R
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+>NAME
+
+
+
+
+
+<b>CONNECTOR</b> female, 96 pins, type R, rows ABC, grid 2.54 mm
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>Resistors in DIL Packages</b><p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>Chip Resistor Array</b> size 4 × 0603<p>
+concave termination - Phycomp Components<br>
+Source: RS Components
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>Chip Resistor Array</b> size 4 × 0603<p>
+convex termination - Phycomp Components<br>
+Source: RS Components
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>BOURNS</b> Chip Resistor Array<p>
+Source: RS Component / BUORNS
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>BOURNS</b> Chip Resistor Array<p>
+Source: RS Component / BUORNS
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>ARRAY CHIP RESISTOR</b> Size 4 x 0402<p>
+Source: www.yageo.com .. Pu-YC124_51_PbFree_L_1.pdf
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>Array chip resistor</b> size 4 × 0402<p>
+Source: http://docs-europe.electrocomponents.com/webdocs/0114/0900766b80114d99.pdf
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+<b>Chip Resistor Array 0201x4</b> 4 resistors in 1.4 mm x 0.6 mm size<p>
+Source: PANASONIC .. aoc0000ce1.pdf
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>Chip Resistor Array 0402x4</b> 4 resistors in 2.0 mm x 1.0 mm size<p>
+Source: PANASONIC .. aoc0000ce1.pdf
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>Chip Resistor Array 0603x4</b> 4 resistors in 3.2 mm x 1.6 mm size (EXB38V, V8V)<p>
+Source: PANASONIC .. aoc0000ce1.pdf
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>Chip Resistor Array 0402x4</b> 4 resistors in 2.0 mm x 1.0 mm size<p>
+Source: PANASONIC .. aoc0000ce1.pdf
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>Chip Resistor Array 0805x4</b> 4 resistors in 5.08 mm x 2.20 mm size<p>
+Source: PANASONIC .. aoc0000ce1.pdf
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+<b>Chip Resistor Array 0603x4</b> 4 resistors in 3.20 mm x 1.60 mm size<p>
+Source: PANASONIC .. aoc0000ce1.pdf
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+>NAME
+>VALUE
+
+
+
+
+
+
+
+
+>VALUE
+>NAME
+
+
+
+
+
+
+<b>Array Chip Resistor</b><p>
+Source: RS Component / Phycomp
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+<b>AMD MACH4/MACH5 Family (Vantis)</b><p>
+<author>Created by librarian@cadsoft.de</author>
+
+
+<b>THIN QUAD FLAT PACK</b>
+
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+
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+
+
+>NAME
+>VALUE
+TQFP 100
+
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+
+
+
+>NAME
+>VALUE
+GND
+GND
+VCC
+GND
+GND
+VCC
+GND
+GND
+VCC
+GND
+VCC
+GND
+GND
+GND
+VCC
+GND
+VCC
+GND
+GND
+GND
+GND
+GND
+GND
+GND
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+
+
+
+<b>AMD MACH SERIES</b>
+
+
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diff --git a/Logic/68030-68000-bus.vhd b/Logic/68030-68000-bus.vhd
index 9d34598..dc6d8c4 100644
--- a/Logic/68030-68000-bus.vhd
+++ b/Logic/68030-68000-bus.vhd
@@ -129,7 +129,7 @@ begin
RESET <= RST;
--clk generation : up to now just half the clock
- if(CLK_CNT="01") then
+ if(CLK_CNT = CLK_REF) then
CLK_OUT_PRE <= not CLK_OUT_PRE;
CLK_CNT <= "00";
else
@@ -181,21 +181,21 @@ begin
state_machine: process(RST, CLK_OSZI)
begin
if(RST = '0' ) then
- SM_AMIGA <= IDLE_P;
- AS_000_INT <='1';
- AS_030_000_SYNC <='1';
- UDS_000_INT <='1';
- LDS_000_INT <='1';
- CLK_REF <= "10";
- VMA_INT <= '1';
- FPU_CS_INT <= '1';
- BG_000 <= '1';
+ SM_AMIGA <= IDLE_P;
+ AS_000_INT <= '1';
+ AS_030_000_SYNC <= '1';
+ UDS_000_INT <= '1';
+ LDS_000_INT <= '1';
+ CLK_REF <= "00";
+ VMA_INT <= '1';
+ FPU_CS_INT <= '1';
+ BG_000 <= '1';
BGACK_030_INT <= '1';
- DSACK_INT <= "11";
- DTACK_DMA <= '1';
- DTACK_SYNC <= '1';
- VPA_SYNC <= '1';
- IPL_030 <= "111";
+ DSACK_INT <= "11";
+ DTACK_DMA <= '1';
+ DTACK_SYNC <= '1';
+ VPA_SYNC <= '1';
+ IPL_030 <= "111";
elsif(rising_edge(CLK_OSZI)) then
@@ -231,12 +231,13 @@ begin
if(AS_030 ='1') then -- "async" reset of various signals
AS_030_000_SYNC <= '1';
FPU_CS_INT <= '1';
- DSACK_INT<="11";
- AS_000_INT <= '1';
- UDS_000_INT <= '1';
- LDS_000_INT <= '1';
- DTACK_SYNC <= '1';
- VPA_SYNC <= '1';
+ DSACK_INT <="11";
+ AS_000_INT <= '1';
+ UDS_000_INT <= '1';
+ LDS_000_INT <= '1';
+ DTACK_SYNC <= '1';
+ VPA_SYNC <= '1';
+ AMIGA_BUS_ENABLE <= '1';
elsif( CLK_030 = '1' AND --68030 has a valid AS on high clocks
AS_030 = '0') then
@@ -268,7 +269,13 @@ begin
SM_AMIGA<=IDLE_N;
end if;
when IDLE_N => --68000:S1 wait for rising edge, on a rising CLK_000 look for a amiga adressrobe
- if(CLK_000_D0='1' and CLK_000_D1 = '0')then --sample AS only at the rising edge!
+ if(nEXP_SPACE ='1')then
+ AMIGA_BUS_ENABLE <= '0' ;--for now: allways on for amiga
+ else
+ AMIGA_BUS_ENABLE <= '1';
+ end if;
+
+ if(CLK_000_D1='1' and CLK_000_D2 = '0')then --sample AS only at the rising edge!
if( AS_030_000_SYNC = '0' )then
AS_000_INT <= '0';
if (RW='1' and DS_030 = '0') then --read: set udl/lds
@@ -291,19 +298,19 @@ begin
SM_AMIGA<=AS_SET_N;
end if;
when AS_SET_N => --68000:S3: nothing happens here; on a transition to s4: assert uds/lds on write
- if(CLK_000_D0='1')then
- if (RW='0' and DS_030 = '0') then --write: set udl/lds
- if(A(0)='0') then
- UDS_000_INT <= '0';
- else
- UDS_000_INT <= '1';
- end if;
- if((A(0)='1' OR SIZE(0)='0' OR SIZE(1)='1')) then
- LDS_000_INT <= '0';
- else
- LDS_000_INT <= '1';
- end if;
+ if (RW='0' and DS_030 = '0') then --write: set udl/lds earlier than in the specs. this does not seem to harm anything and is saver, than sampling uds/lds too late
+ if(A(0)='0') then
+ UDS_000_INT <= '0';
+ else
+ UDS_000_INT <= '1';
end if;
+ if((A(0)='1' OR SIZE(0)='0' OR SIZE(1)='1')) then
+ LDS_000_INT <= '0';
+ else
+ LDS_000_INT <= '1';
+ end if;
+ end if;
+ if(CLK_000_D0='1')then
SM_AMIGA <= SAMPLE_DTACK_P;
end if;
when SAMPLE_DTACK_P=> --68000:S4 wait for dtack or VMA
@@ -311,7 +318,7 @@ begin
if(DTACK_SYNC = '0' OR VPA_SYNC ='0')then
SM_AMIGA<=DATA_FETCH_N;
end if;
- else -- high clock: sample DTACK
+ elsif(CLK_000='1' )then -- high clock: sample DTACK
if(VPA_D = '1' AND DTACK='0') then
DTACK_SYNC <= '0';
elsif(VPA_D='0' AND cpu_est=E9 AND VMA_INT='0') then --vpa/vma cycle: sync VPA on E9: one 7M-clock to latch!
@@ -323,7 +330,7 @@ begin
SM_AMIGA<=DATA_FETCH_P;
end if;
when DATA_FETCH_P => --68000:S6: READ: here comes the data on the bus!
- if( CLK_000_D1 ='0' AND CLK_OUT_PRE='1' ) then --next 030-clock is high: dsack is sampled at the falling edge
+ if( CLK_000_D0 ='0' AND CLK_OUT_PRE='1' ) then --next 030-clock is high: dsack is sampled at the falling edge
DSACK_INT<="01";
SM_AMIGA<=END_CYCLE_N;
end if;
@@ -369,7 +376,6 @@ begin
'0';
--bus buffers
- AMIGA_BUS_ENABLE <= '0' WHEN nEXP_SPACE ='1' else '1'; --for now: allways on for amiga
AMIGA_BUS_DATA_DIR <='1' WHEN RW='0' ELSE '0';
AMIGA_BUS_ENABLE_LOW <= '1'; --for now: allways off
diff --git a/Logic/68030_TK.tcl b/Logic/68030_TK.tcl
index 0cdb15f..224f7dd 100644
--- a/Logic/68030_TK.tcl
+++ b/Logic/68030_TK.tcl
@@ -124405,3 +124405,8280 @@ if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m
########## Tcl recorder end at 05/16/14 20:27:52 ###########
+
+########## Tcl recorder starts at 05/17/14 14:55:21 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/17/14 14:55:21 ###########
+
+
+########## Tcl recorder starts at 05/17/14 14:55:25 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/17/14 14:55:25 ###########
+
+
+########## Tcl recorder starts at 05/17/14 14:58:01 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/17/14 14:58:01 ###########
+
+
+########## Tcl recorder starts at 05/17/14 14:58:06 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/17/14 14:58:06 ###########
+
+
+########## Tcl recorder starts at 05/18/14 09:42:16 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 09:42:16 ###########
+
+
+########## Tcl recorder starts at 05/18/14 09:42:24 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 09:42:24 ###########
+
+
+########## Tcl recorder starts at 05/18/14 13:10:02 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 13:10:02 ###########
+
+
+########## Tcl recorder starts at 05/18/14 13:10:04 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 13:10:04 ###########
+
+
+########## Tcl recorder starts at 05/18/14 13:10:58 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 13:10:58 ###########
+
+
+########## Tcl recorder starts at 05/18/14 13:11:03 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 13:11:03 ###########
+
+
+########## Tcl recorder starts at 05/18/14 13:13:37 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 13:13:37 ###########
+
+
+########## Tcl recorder starts at 05/18/14 13:13:41 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 13:13:41 ###########
+
+
+########## Tcl recorder starts at 05/18/14 13:14:56 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 13:14:56 ###########
+
+
+########## Tcl recorder starts at 05/18/14 13:15:00 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 13:15:00 ###########
+
+
+########## Tcl recorder starts at 05/18/14 14:48:07 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 14:48:07 ###########
+
+
+########## Tcl recorder starts at 05/18/14 14:48:30 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 14:48:30 ###########
+
+
+########## Tcl recorder starts at 05/18/14 14:49:29 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 14:49:29 ###########
+
+
+########## Tcl recorder starts at 05/18/14 14:49:40 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 14:49:40 ###########
+
+
+########## Tcl recorder starts at 05/18/14 15:46:00 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 15:46:00 ###########
+
+
+########## Tcl recorder starts at 05/18/14 15:46:03 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 15:46:03 ###########
+
+
+########## Tcl recorder starts at 05/18/14 15:47:01 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 15:47:01 ###########
+
+
+########## Tcl recorder starts at 05/18/14 15:47:19 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 15:47:19 ###########
+
+
+########## Tcl recorder starts at 05/18/14 15:48:43 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 15:48:43 ###########
+
+
+########## Tcl recorder starts at 05/18/14 15:48:48 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 15:48:48 ###########
+
+
+########## Tcl recorder starts at 05/18/14 15:51:00 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 15:51:00 ###########
+
+
+########## Tcl recorder starts at 05/18/14 15:51:05 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 15:51:05 ###########
+
+
+########## Tcl recorder starts at 05/18/14 15:52:11 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 15:52:11 ###########
+
+
+########## Tcl recorder starts at 05/18/14 15:52:20 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 15:52:20 ###########
+
+
+########## Tcl recorder starts at 05/18/14 16:14:13 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 16:14:13 ###########
+
+
+########## Tcl recorder starts at 05/18/14 16:14:19 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 16:14:19 ###########
+
+
+########## Tcl recorder starts at 05/18/14 16:15:12 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 16:15:12 ###########
+
+
+########## Tcl recorder starts at 05/18/14 16:15:16 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 16:15:16 ###########
+
+
+########## Tcl recorder starts at 05/18/14 16:15:52 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 16:15:52 ###########
+
+
+########## Tcl recorder starts at 05/18/14 16:15:56 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 16:15:56 ###########
+
+
+########## Tcl recorder starts at 05/18/14 16:40:44 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 16:40:44 ###########
+
+
+########## Tcl recorder starts at 05/18/14 16:40:50 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 16:40:50 ###########
+
+
+########## Tcl recorder starts at 05/18/14 16:40:52 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 16:40:52 ###########
+
+
+########## Tcl recorder starts at 05/18/14 16:41:12 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 16:41:12 ###########
+
+
+########## Tcl recorder starts at 05/18/14 16:42:21 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 16:42:21 ###########
+
+
+########## Tcl recorder starts at 05/18/14 16:42:27 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 16:42:27 ###########
+
+
+########## Tcl recorder starts at 05/18/14 16:44:41 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 16:44:41 ###########
+
+
+########## Tcl recorder starts at 05/18/14 16:44:54 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 16:44:54 ###########
+
+
+########## Tcl recorder starts at 05/18/14 17:37:53 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 17:37:53 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:26:28 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:26:28 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:27:11 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:27:11 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:27:16 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:27:16 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:28:11 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:28:11 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:28:41 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:28:41 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:29:42 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:29:42 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:29:58 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:29:58 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:30:01 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:30:01 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:30:59 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:30:59 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:31:05 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:31:05 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:32:00 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:32:00 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:32:07 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:32:07 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:32:09 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:32:09 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:32:14 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:32:14 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:33:40 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:33:40 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:33:54 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:33:54 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:34:00 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:34:00 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:35:18 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:35:18 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:35:22 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:35:22 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:36:39 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:36:39 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:36:42 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:36:42 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:37:41 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:37:41 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:37:49 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:37:49 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:38:40 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:38:40 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:39:23 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:39:23 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:39:26 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:39:26 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:39:38 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:39:38 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:39:39 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:39:39 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:43:16 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:43:16 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:43:17 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:43:17 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:46:25 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:46:25 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:46:38 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:46:38 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:46:42 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:46:42 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:49:02 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:49:02 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:49:30 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:49:30 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:49:39 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:49:39 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:50:11 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:50:11 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:50:13 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:50:13 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:50:53 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:50:53 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:50:56 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:50:56 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:52:51 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:52:51 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:52:56 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:52:56 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:54:01 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:54:01 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:54:05 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:54:05 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:55:10 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:55:10 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:55:14 ##########
+
+# Commands to make the Process:
+# Post-Fit Pinouts
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+# Application to view the Process:
+# Post-Fit Pinouts
+if [catch {open lattice_cmd.rs2 w} rspFile] {
+ puts stderr "Cannot create response file lattice_cmd.rs2: $rspFile"
+} else {
+ puts $rspFile "-src 68030_tk.tt4 -type PLA -devfile \"$install_dir/ispcpld/dat/mach4a/mach447ace.dev\" -postfit -lci 68030_tk.lco
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/lciedit\" @lattice_cmd.rs2"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:55:14 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:56:39 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:56:39 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:56:44 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:56:44 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:57:43 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:57:43 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:57:51 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:57:51 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:58:24 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:58:24 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:58:30 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:58:30 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:59:48 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:59:48 ###########
+
+
+########## Tcl recorder starts at 05/18/14 20:59:53 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 20:59:53 ###########
+
+
+########## Tcl recorder starts at 05/18/14 21:00:32 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 21:00:32 ###########
+
+
+########## Tcl recorder starts at 05/18/14 21:00:35 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 21:00:35 ###########
+
+
+########## Tcl recorder starts at 05/18/14 21:01:36 ##########
+
+# Commands to make the Process:
+# Hierarchy
+if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 21:01:36 ###########
+
+
+########## Tcl recorder starts at 05/18/14 21:01:40 ##########
+
+# Commands to make the Process:
+# JEDEC File
+if [catch {open BUS68030.cmd w} rspFile] {
+ puts stderr "Cannot create response file BUS68030.cmd: $rspFile"
+} else {
+ puts $rspFile "STYFILENAME: 68030_tk.sty
+PROJECT: BUS68030
+WORKING_PATH: \"$proj_dir\"
+MODULE: BUS68030
+VHDL_FILE_LIST: 68030-68000-bus.vhd
+OUTPUT_FILE_NAME: BUS68030
+SUFFIX_NAME: edi
+PART: M4A5-128/64-10VC
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete BUS68030.cmd
+if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [catch {open 68030_tk.rsp w} rspFile] {
+ puts stderr "Cannot create response file 68030_tk.rsp: $rspFile"
+} else {
+ puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\"
+"
+ close $rspFile
+}
+if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+file delete 68030_tk.rsp
+if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] {
+ return
+} else {
+ vwait done
+ if [checkResult $done] {
+ return
+ }
+}
+
+########## Tcl recorder end at 05/18/14 21:01:40 ###########
+
diff --git a/Logic/68030_tk.bl2 b/Logic/68030_tk.bl2
index 55926fd..201fe70 100644
--- a/Logic/68030_tk.bl2
+++ b/Logic/68030_tk.bl2
@@ -1,85 +1,92 @@
#$ TOOL ispLEVER Classic 1.7.00.05.28.13
-#$ DATE Fri May 16 17:07:08 2014
+#$ DATE Sun May 18 21:01:47 2014
#$ MODULE 68030_tk
-#$ PINS 74 A_17_ A_16_ SIZE_1_ A_15_ A_14_ A_31_ A_13_ A_12_ IPL_030_2_ A_11_ A_10_ \
-# IPL_2_ A_9_ A_8_ DSACK_1_ A_7_ A_6_ FC_1_ A_5_ AS_030 A_4_ AS_000 A_3_ DS_030 A_2_ UDS_000 \
-# A_1_ LDS_000 A_0_ nEXP_SPACE IPL_030_1_ BERR IPL_030_0_ BG_030 IPL_1_ BG_000 IPL_0_ \
-# BGACK_030 DSACK_0_ BGACK_000 FC_0_ CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS \
-# DTACK AVEC AVEC_EXP E VPA VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \
-# AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ \
-# A_21_ A_20_ A_19_ A_18_
-#$ NODES 340 ipl_c_0__n ipl_c_1__n ipl_c_2__n inst_BGACK_030_INTreg \
-# inst_FPU_CS_INTreg dsack_c_1__n cpu_est_3_reg inst_VMA_INTreg DTACK_c cpu_est_0_ \
-# cpu_est_1_ inst_AS_000_INTreg inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_D \
-# inst_VPA_SYNC inst_CLK_000_D0 RST_c inst_CLK_000_D1 inst_CLK_OUT_PRE RESETDFFreg \
-# vcc_n_n gnd_n_n RW_c cpu_est_2_ CLK_CNT_0_ fc_c_0__n SM_AMIGA_6_ SM_AMIGA_7_ fc_c_1__n \
-# inst_UDS_000_INTreg inst_LDS_000_INTreg DSACK_INT_1_ \
-# state_machine_un60_clk_000_d0_n SM_AMIGA_1_ inst_DTACK_DMA N_100_i SM_AMIGA_4_ \
-# sm_amiga_ns_0_2__n SM_AMIGA_3_ N_103_i DSACK_INT_1_sqmuxa N_104_i \
-# state_machine_un13_as_000_int_n VPA_SYNC_1_sqmuxa_1 N_106_i un1_as_030_4 N_105_i \
-# SM_AMIGA_5_ sm_amiga_ns_0_5__n SM_AMIGA_2_ N_107_i SM_AMIGA_0_ N_108_i \
-# state_machine_lds_000_int_8_n sm_amiga_ns_0_6__n state_machine_uds_000_int_8_n \
-# N_90_i N_93_0 N_128_i N_126_i N_127_i N_129_i clk_cpu_est_11_0_1__n N_133_i N_132_i \
-# N_134_i clk_cpu_est_11_0_3__n N_125_i cpu_est_0_0_ N_124_i N_130_i N_131_i N_121_i \
-# N_91_0 N_109_i sm_amiga_ns_0_7__n CLK_OUT_PRE_0 state_machine_un8_clk_000_d0_i_n \
-# state_machine_un13_clk_000_d0_i_n state_machine_un15_clk_000_d0_0_n BG_030_c_i \
-# state_machine_un1_clk_030_0_n clk_un4_clk_000_d1_n \
-# state_machine_un17_clk_030_0_n N_144 un1_as_030_3_0 N_101 \
-# state_machine_as_030_000_sync_3_2_n VPA_SYNC_1_sqmuxa N_96_i N_97 un1_bg_030_0 \
-# state_machine_un34_clk_000_d0_n clk_un4_clk_000_d1_i_n N_96 \
-# state_machine_un6_bgack_000_0_n N_102 N_98_i UDS_000_INT_0_sqmuxa \
-# UDS_000_INT_0_sqmuxa_1 N_111_i N_167 N_99_i N_170 N_92 N_92_0 N_91 \
-# state_machine_un34_clk_000_d0_i_n N_99 a_c_i_0__n N_111 size_c_i_1__n N_98 N_102_i \
-# state_machine_un6_bgack_000_n state_machine_un42_clk_030_n N_144_i \
-# DTACK_SYNC_1_sqmuxa state_machine_lds_000_int_8_0_n un1_bg_030 \
-# state_machine_uds_000_int_8_0_n state_machine_as_030_000_sync_3_n \
-# state_machine_un60_clk_000_d0_i_n DTACK_SYNC_1_sqmuxa_1 un1_bg_030_0_1 \
-# un1_as_030_3 un1_bg_030_0_2 state_machine_un17_clk_030_n \
-# state_machine_as_030_000_sync_3_2_1_n state_machine_un1_clk_030_n \
-# clk_cpu_est_11_0_1_3__n VPA_SYNC_1_sqmuxa_1_0 clk_cpu_est_11_0_1_1__n \
-# state_machine_un15_clk_000_d0_n clk_cpu_est_11_0_2_1__n \
-# state_machine_un13_clk_000_d0_n N_167_1 state_machine_un8_clk_000_d0_n N_167_2 \
-# N_109 N_167_3 state_machine_un13_clk_000_d0_1_n N_167_4 N_129 N_167_5 \
-# state_machine_un13_clk_000_d0_2_n N_167_6 N_130 N_170_1 N_131 N_170_2 N_124 \
-# UDS_000_INT_0_sqmuxa_1_1 N_125 UDS_000_INT_0_sqmuxa_1_2 N_134 \
-# UDS_000_INT_0_sqmuxa_1_3 N_134_1 UDS_000_INT_0_sqmuxa_1_0 N_106 \
-# UDS_000_INT_0_sqmuxa_2 clk_cpu_est_11_3__n state_machine_un34_clk_000_d0_i_1_n \
-# N_132 state_machine_un42_clk_030_1_n N_133 state_machine_un42_clk_030_2_n \
-# clk_cpu_est_11_1__n state_machine_un42_clk_030_3_n N_127 \
-# state_machine_un42_clk_030_4_n N_126 state_machine_un42_clk_030_5_n N_128 \
-# DTACK_SYNC_1_sqmuxa_1_0 N_93 N_130_1 N_90 N_131_1 N_107 \
-# state_machine_un8_clk_000_d0_1_n N_108 state_machine_un8_clk_000_d0_2_n N_105 \
-# state_machine_un8_clk_000_d0_3_n N_103 state_machine_un8_clk_000_d0_4_n N_104 \
-# state_machine_un13_clk_000_d0_1_0_n N_100 state_machine_un13_clk_000_d0_2_0_n \
-# AS_000_INT_1_sqmuxa VPA_SYNC_1_sqmuxa_1_1 RW_i VPA_SYNC_1_sqmuxa_2 nEXP_SPACE_i \
-# VPA_SYNC_1_sqmuxa_3 N_101_i VPA_SYNC_1_sqmuxa_4 AS_000_INT_i N_106_1 dsack_i_1__n \
-# cpu_est_0_3__un3_n AS_030_i cpu_est_0_3__un1_n CLK_000_D0_i cpu_est_0_3__un0_n \
-# sm_amiga_i_3__n cpu_est_0_1__un3_n sm_amiga_i_4__n cpu_est_0_1__un1_n CLK_000_D1_i \
-# cpu_est_0_1__un0_n cpu_est_i_0__n as_000_int_0_un3_n cpu_est_i_3__n \
-# as_000_int_0_un1_n cpu_est_i_2__n as_000_int_0_un0_n VPA_D_i bg_000_0_un3_n \
-# VMA_INT_i bg_000_0_un1_n cpu_est_i_1__n bg_000_0_un0_n \
-# state_machine_un13_clk_000_d0_2_i_n as_030_000_sync_0_un3_n \
-# state_machine_un13_clk_000_d0_1_i_n as_030_000_sync_0_un1_n DTACK_i \
-# as_030_000_sync_0_un0_n DTACK_SYNC_1_sqmuxa_i fpu_cs_int_0_un3_n a_i_18__n \
-# fpu_cs_int_0_un1_n a_i_16__n fpu_cs_int_0_un0_n a_i_19__n dtack_sync_0_un3_n \
-# CLK_030_i dtack_sync_0_un1_n state_machine_un42_clk_030_i_n dtack_sync_0_un0_n \
-# sm_amiga_i_6__n vma_int_0_un3_n sm_amiga_i_7__n vma_int_0_un1_n AS_030_000_SYNC_i \
-# vma_int_0_un0_n DS_030_i cpu_est_0_2__un3_n UDS_000_INT_0_sqmuxa_1_i \
-# cpu_est_0_2__un1_n UDS_000_INT_0_sqmuxa_i cpu_est_0_2__un0_n sm_amiga_i_5__n \
-# ipl_030_0_0__un3_n VPA_SYNC_1_sqmuxa_i ipl_030_0_0__un1_n N_97_i \
-# ipl_030_0_0__un0_n a_i_30__n ipl_030_0_1__un3_n a_i_31__n ipl_030_0_1__un1_n \
-# a_i_28__n ipl_030_0_1__un0_n a_i_29__n ipl_030_0_2__un3_n a_i_26__n \
-# ipl_030_0_2__un1_n a_i_27__n ipl_030_0_2__un0_n a_i_24__n bgack_030_int_0_un3_n \
-# a_i_25__n bgack_030_int_0_un1_n bgack_030_int_0_un0_n RST_i uds_000_int_0_un3_n \
-# uds_000_int_0_un1_n FPU_CS_INT_i uds_000_int_0_un0_n BGACK_030_INT_i \
-# lds_000_int_0_un3_n AS_030_c lds_000_int_0_un1_n lds_000_int_0_un0_n \
-# vpa_sync_0_un3_n DS_030_c vpa_sync_0_un1_n vpa_sync_0_un0_n dsack_int_0_1__un3_n \
-# dsack_int_0_1__un1_n size_c_0__n dsack_int_0_1__un0_n a_15__n size_c_1__n a_14__n \
-# a_c_0__n a_13__n a_12__n a_11__n a_10__n a_9__n a_8__n a_7__n a_6__n a_c_16__n a_5__n \
-# a_c_17__n a_4__n a_c_18__n a_3__n a_c_19__n a_2__n a_c_20__n a_1__n a_c_21__n a_c_22__n \
-# a_c_23__n a_c_24__n a_c_25__n a_c_26__n a_c_27__n a_c_28__n a_c_29__n a_c_30__n \
-# a_c_31__n nEXP_SPACE_c BG_030_c BG_000DFFSHreg BGACK_000_c CLK_030_c CLK_OSZI_c \
-# CLK_OUT_INTreg IPL_030DFFSH_0_reg IPL_030DFFSH_1_reg IPL_030DFFSH_2_reg
+#$ PINS 74 SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 DS_030 UDS_000 \
+# SIZE_0_ LDS_000 A_30_ nEXP_SPACE A_29_ BERR A_28_ BG_030 A_27_ BG_000 A_26_ BGACK_030 \
+# A_25_ BGACK_000 A_24_ CLK_030 A_23_ CLK_000 A_22_ CLK_OSZI A_21_ CLK_DIV_OUT A_20_ \
+# CLK_EXP A_19_ FPU_CS A_18_ DTACK A_17_ AVEC A_16_ AVEC_EXP A_15_ E A_14_ VPA A_13_ VMA A_12_ \
+# RST A_11_ RESET A_10_ RW A_9_ AMIGA_BUS_ENABLE A_8_ AMIGA_BUS_DATA_DIR A_7_ \
+# AMIGA_BUS_ENABLE_LOW A_6_ CIIN A_5_ A_4_ A_3_ A_2_ A_1_ A_0_ IPL_030_1_ IPL_030_0_ IPL_1_ \
+# IPL_0_ DSACK_0_ FC_0_
+#$ NODES 369 BGACK_000_c CLK_030_c CLK_000_c CLK_OSZI_c inst_BGACK_030_INTreg \
+# inst_FPU_CS_INTreg cpu_est_3_reg CLK_OUT_INTreg inst_VMA_INTreg cpu_est_0_ \
+# cpu_est_1_ IPL_030DFFSH_0_reg inst_AS_000_INTreg inst_AS_030_000_SYNC \
+# IPL_030DFFSH_1_reg inst_DTACK_SYNC inst_VPA_D IPL_030DFFSH_2_reg inst_VPA_SYNC \
+# inst_CLK_000_D0 ipl_c_0__n inst_CLK_000_D1 inst_CLK_000_D2 ipl_c_1__n \
+# inst_CLK_OUT_PRE SM_AMIGA_6_ ipl_c_2__n vcc_n_n gnd_n_n cpu_est_2_ dsack_c_1__n \
+# CLK_REF_1_ SM_AMIGA_7_ DTACK_c inst_UDS_000_INTreg inst_LDS_000_INTreg DSACK_INT_1_ \
+# clk_un4_clk_000_d1_n SM_AMIGA_4_ SM_AMIGA_1_ inst_DTACK_DMA clk_clk_cnt_n RST_c \
+# CLK_CNT_0_ CLK_CNT_1_ RESETDFFreg state_machine_un14_as_000_int_n SM_AMIGA_3_ RW_c \
+# fc_c_0__n un1_as_030_4 SM_AMIGA_5_ fc_c_1__n SM_AMIGA_2_ SM_AMIGA_0_ \
+# AMIGA_BUS_ENABLEDFFreg state_machine_lds_000_int_7_n \
+# state_machine_uds_000_int_7_n N_101_i N_102_i N_103_i N_90_0 N_91_0 N_127_i N_128_i \
+# CLK_OUT_PRE_0 N_118_i N_125_i cpu_est_0_0_ N_123_i N_124_i N_126_i \
+# clk_cpu_est_11_0_1__n N_131_i clk_cpu_est_11_0_3__n N_130_i N_129_i N_122_i N_121_i \
+# N_108_i G_86 sm_amiga_ns_0_7__n state_machine_un30_clk_000_d1_n \
+# state_machine_un8_clk_000_d0_i_n N_147 state_machine_un13_clk_000_d0_i_n N_96 \
+# state_machine_un15_clk_000_d0_0_n state_machine_un44_clk_000_d1_n \
+# state_machine_un23_clk_000_d0_i_n G_90 N_100_i N_89 sm_amiga_ns_0_2__n N_97 \
+# BG_030_c_i N_90 state_machine_un1_clk_030_0_n N_98 clk_un4_clk_000_d1_i_n N_99 \
+# state_machine_un6_bgack_000_0_n UDS_000_INT_0_sqmuxa \
+# state_machine_un17_clk_030_0_n UDS_000_INT_0_sqmuxa_1 un1_as_030_3_0 N_167 N_89_i \
+# N_170 AMIGA_BUS_ENABLE_i_m_i N_105 nEXP_SPACE_m_i N_92 \
+# state_machine_amiga_bus_enable_2_iv_i_n N_106 \
+# state_machine_as_030_000_sync_3_2_n N_107 N_94_i N_104 un1_bg_030_0 \
+# state_machine_un42_clk_030_n N_105_i un1_bg_030 N_104_i N_94 sm_amiga_ns_0_5__n \
+# state_machine_as_030_000_sync_3_n N_106_i AMIGA_BUS_ENABLE_i_m N_107_i \
+# nEXP_SPACE_m N_95 CLK_OUT_PRE_i un1_as_030_3 N_92_0 state_machine_un17_clk_030_n \
+# state_machine_un44_clk_000_d1_i_n state_machine_un6_bgack_000_n a_c_i_0__n \
+# state_machine_un1_clk_030_n size_c_i_1__n AS_000_INT_1_sqmuxa N_98_i \
+# DSACK_INT_1_sqmuxa N_99_i N_100 sm_amiga_ns_0_1__n state_machine_un23_clk_000_d0_n \
+# N_97_i DTACK_SYNC_1_sqmuxa DTACK_SYNC_1_sqmuxa_1 N_147_i VPA_SYNC_1_sqmuxa \
+# state_machine_lds_000_int_7_0_n VPA_SYNC_1_sqmuxa_1 \
+# state_machine_uds_000_int_7_0_n state_machine_un15_clk_000_d0_n un1_bg_030_0_1 \
+# clk_cpu_est_11_3__n un1_bg_030_0_2 state_machine_un2_clk_000_n \
+# state_machine_as_030_000_sync_3_2_1_n state_machine_un13_clk_000_d0_n \
+# clk_cpu_est_11_0_1_1__n state_machine_un8_clk_000_d0_n clk_cpu_est_11_0_2_1__n \
+# N_108 N_167_1 state_machine_un13_clk_000_d0_1_n N_167_2 N_124 N_167_3 N_126 N_167_4 \
+# state_machine_un13_clk_000_d0_2_n N_167_5 N_129 N_167_6 N_122 N_170_1 N_130 N_170_2 \
+# N_121 UDS_000_INT_0_sqmuxa_1_1 N_131 UDS_000_INT_0_sqmuxa_1_2 N_127 \
+# UDS_000_INT_0_sqmuxa_1_3 clk_cpu_est_11_1__n UDS_000_INT_0_sqmuxa_1_0 N_128 \
+# state_machine_un44_clk_000_d1_i_1_n N_123 state_machine_un42_clk_030_1_n N_125 \
+# state_machine_un42_clk_030_2_n N_91 state_machine_un42_clk_030_3_n N_102 \
+# state_machine_un42_clk_030_4_n N_103 state_machine_un42_clk_030_5_n N_101 N_96_1 \
+# RW_i AMIGA_BUS_ENABLE_i_m_1 AS_000_INT_i N_131_1 dsack_i_1__n \
+# clk_cpu_est_11_0_1_3__n sm_amiga_i_4__n N_105_1 sm_amiga_i_5__n \
+# VPA_SYNC_1_sqmuxa_1_0 CLK_000_D0_i VPA_SYNC_1_sqmuxa_2 sm_amiga_i_3__n \
+# VPA_SYNC_1_sqmuxa_3 cpu_est_i_0__n VPA_SYNC_1_sqmuxa_4 cpu_est_i_2__n \
+# VPA_SYNC_1_sqmuxa_5 state_machine_un13_clk_000_d0_2_i_n VPA_SYNC_1_sqmuxa_6 \
+# cpu_est_i_3__n DTACK_SYNC_1_sqmuxa_1_0 VPA_D_i DTACK_SYNC_1_sqmuxa_2 \
+# cpu_est_i_1__n state_machine_un8_clk_000_d0_1_n DTACK_i \
+# state_machine_un8_clk_000_d0_2_n VMA_INT_i state_machine_un8_clk_000_d0_3_n \
+# state_machine_un13_clk_000_d0_1_i_n state_machine_un8_clk_000_d0_4_n AS_030_i \
+# state_machine_un13_clk_000_d0_1_0_n DTACK_SYNC_1_sqmuxa_i \
+# state_machine_un13_clk_000_d0_2_0_n VPA_SYNC_1_sqmuxa_i N_127_1 CLK_000_D1_i \
+# N_128_1 N_95_i ipl_030_0_2__un3_n N_96_i ipl_030_0_2__un1_n a_i_18__n \
+# ipl_030_0_2__un0_n a_i_16__n ipl_030_0_1__un3_n a_i_19__n ipl_030_0_1__un1_n \
+# CLK_030_i ipl_030_0_1__un0_n CLK_000_D2_i ipl_030_0_0__un3_n \
+# state_machine_un42_clk_030_i_n ipl_030_0_0__un1_n sm_amiga_i_6__n \
+# ipl_030_0_0__un0_n sm_amiga_i_7__n cpu_est_0_2__un3_n AMIGA_BUS_ENABLE_i \
+# cpu_est_0_2__un1_n nEXP_SPACE_i cpu_est_0_2__un0_n sm_amiga_i_2__n \
+# cpu_est_0_1__un3_n sm_amiga_i_1__n cpu_est_0_1__un1_n DS_030_i cpu_est_0_1__un0_n \
+# AS_030_000_SYNC_i vpa_sync_0_un3_n UDS_000_INT_0_sqmuxa_1_i vpa_sync_0_un1_n \
+# UDS_000_INT_0_sqmuxa_i vpa_sync_0_un0_n clk_clk_cnt_i_n vma_int_0_un3_n \
+# clk_cnt_i_0__n vma_int_0_un1_n a_i_30__n vma_int_0_un0_n a_i_31__n \
+# cpu_est_0_3__un3_n a_i_28__n cpu_est_0_3__un1_n a_i_29__n cpu_est_0_3__un0_n \
+# a_i_26__n bgack_030_int_0_un3_n a_i_27__n bgack_030_int_0_un1_n a_i_24__n \
+# bgack_030_int_0_un0_n a_i_25__n bg_000_0_un3_n N_132_i bg_000_0_un1_n \
+# bg_000_0_un0_n RST_i amiga_bus_enable_0_un3_n FPU_CS_INT_i \
+# amiga_bus_enable_0_un1_n BGACK_030_INT_i amiga_bus_enable_0_un0_n AS_030_c \
+# as_030_000_sync_0_un3_n as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n DS_030_c \
+# fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n fpu_cs_int_0_un0_n as_000_int_0_un3_n \
+# size_c_0__n as_000_int_0_un1_n as_000_int_0_un0_n size_c_1__n dsack_int_0_1__un3_n \
+# dsack_int_0_1__un1_n a_c_0__n dsack_int_0_1__un0_n dtack_sync_0_un3_n \
+# dtack_sync_0_un1_n dtack_sync_0_un0_n uds_000_int_0_un3_n uds_000_int_0_un1_n \
+# uds_000_int_0_un0_n lds_000_int_0_un3_n lds_000_int_0_un1_n lds_000_int_0_un0_n \
+# a_15__n a_14__n a_13__n a_12__n a_c_16__n a_11__n a_c_17__n a_10__n a_c_18__n a_9__n \
+# a_c_19__n a_8__n a_c_20__n a_7__n a_c_21__n a_6__n a_c_22__n a_5__n a_c_23__n a_4__n \
+# a_c_24__n a_3__n a_c_25__n a_2__n a_c_26__n a_1__n a_c_27__n a_c_28__n a_c_29__n \
+# a_c_30__n a_c_31__n nEXP_SPACE_c BG_030_c BG_000DFFSHreg
.model bus68030
.inputs SIZE_1_.BLIF A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF AS_030.BLIF DS_030.BLIF \
nEXP_SPACE.BLIF BG_030.BLIF BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF \
@@ -89,214 +96,241 @@ A_21_.BLIF A_20_.BLIF A_19_.BLIF A_18_.BLIF A_17_.BLIF A_16_.BLIF A_15_.BLIF \
A_14_.BLIF A_13_.BLIF A_12_.BLIF A_11_.BLIF A_10_.BLIF A_9_.BLIF A_8_.BLIF \
A_7_.BLIF A_6_.BLIF A_5_.BLIF A_4_.BLIF A_3_.BLIF A_2_.BLIF A_1_.BLIF \
A_0_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF DSACK_1_.BLIF DTACK.BLIF \
-DSACK_0_.BLIF ipl_c_0__n.BLIF ipl_c_1__n.BLIF ipl_c_2__n.BLIF \
-inst_BGACK_030_INTreg.BLIF inst_FPU_CS_INTreg.BLIF dsack_c_1__n.BLIF \
-cpu_est_3_reg.BLIF inst_VMA_INTreg.BLIF DTACK_c.BLIF cpu_est_0_.BLIF \
-cpu_est_1_.BLIF inst_AS_000_INTreg.BLIF inst_AS_030_000_SYNC.BLIF \
-inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF \
-RST_c.BLIF inst_CLK_000_D1.BLIF inst_CLK_OUT_PRE.BLIF RESETDFFreg.BLIF \
-vcc_n_n.BLIF gnd_n_n.BLIF RW_c.BLIF cpu_est_2_.BLIF CLK_CNT_0_.BLIF \
-fc_c_0__n.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_7_.BLIF fc_c_1__n.BLIF \
-inst_UDS_000_INTreg.BLIF inst_LDS_000_INTreg.BLIF DSACK_INT_1_.BLIF \
-state_machine_un60_clk_000_d0_n.BLIF SM_AMIGA_1_.BLIF inst_DTACK_DMA.BLIF \
-N_100_i.BLIF SM_AMIGA_4_.BLIF sm_amiga_ns_0_2__n.BLIF SM_AMIGA_3_.BLIF \
-N_103_i.BLIF DSACK_INT_1_sqmuxa.BLIF N_104_i.BLIF \
-state_machine_un13_as_000_int_n.BLIF VPA_SYNC_1_sqmuxa_1.BLIF N_106_i.BLIF \
-un1_as_030_4.BLIF N_105_i.BLIF SM_AMIGA_5_.BLIF sm_amiga_ns_0_5__n.BLIF \
-SM_AMIGA_2_.BLIF N_107_i.BLIF SM_AMIGA_0_.BLIF N_108_i.BLIF \
-state_machine_lds_000_int_8_n.BLIF sm_amiga_ns_0_6__n.BLIF \
-state_machine_uds_000_int_8_n.BLIF N_90_i.BLIF N_93_0.BLIF N_128_i.BLIF \
-N_126_i.BLIF N_127_i.BLIF N_129_i.BLIF clk_cpu_est_11_0_1__n.BLIF N_133_i.BLIF \
-N_132_i.BLIF N_134_i.BLIF clk_cpu_est_11_0_3__n.BLIF N_125_i.BLIF \
-cpu_est_0_0_.BLIF N_124_i.BLIF N_130_i.BLIF N_131_i.BLIF N_121_i.BLIF \
-N_91_0.BLIF N_109_i.BLIF sm_amiga_ns_0_7__n.BLIF CLK_OUT_PRE_0.BLIF \
-state_machine_un8_clk_000_d0_i_n.BLIF state_machine_un13_clk_000_d0_i_n.BLIF \
-state_machine_un15_clk_000_d0_0_n.BLIF BG_030_c_i.BLIF \
-state_machine_un1_clk_030_0_n.BLIF clk_un4_clk_000_d1_n.BLIF \
-state_machine_un17_clk_030_0_n.BLIF N_144.BLIF un1_as_030_3_0.BLIF N_101.BLIF \
-state_machine_as_030_000_sync_3_2_n.BLIF VPA_SYNC_1_sqmuxa.BLIF N_96_i.BLIF \
-N_97.BLIF un1_bg_030_0.BLIF state_machine_un34_clk_000_d0_n.BLIF \
-clk_un4_clk_000_d1_i_n.BLIF N_96.BLIF state_machine_un6_bgack_000_0_n.BLIF \
-N_102.BLIF N_98_i.BLIF UDS_000_INT_0_sqmuxa.BLIF UDS_000_INT_0_sqmuxa_1.BLIF \
-N_111_i.BLIF N_167.BLIF N_99_i.BLIF N_170.BLIF N_92.BLIF N_92_0.BLIF N_91.BLIF \
-state_machine_un34_clk_000_d0_i_n.BLIF N_99.BLIF a_c_i_0__n.BLIF N_111.BLIF \
-size_c_i_1__n.BLIF N_98.BLIF N_102_i.BLIF state_machine_un6_bgack_000_n.BLIF \
-state_machine_un42_clk_030_n.BLIF N_144_i.BLIF DTACK_SYNC_1_sqmuxa.BLIF \
-state_machine_lds_000_int_8_0_n.BLIF un1_bg_030.BLIF \
-state_machine_uds_000_int_8_0_n.BLIF state_machine_as_030_000_sync_3_n.BLIF \
-state_machine_un60_clk_000_d0_i_n.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF \
-un1_bg_030_0_1.BLIF un1_as_030_3.BLIF un1_bg_030_0_2.BLIF \
-state_machine_un17_clk_030_n.BLIF state_machine_as_030_000_sync_3_2_1_n.BLIF \
-state_machine_un1_clk_030_n.BLIF clk_cpu_est_11_0_1_3__n.BLIF \
-VPA_SYNC_1_sqmuxa_1_0.BLIF clk_cpu_est_11_0_1_1__n.BLIF \
-state_machine_un15_clk_000_d0_n.BLIF clk_cpu_est_11_0_2_1__n.BLIF \
-state_machine_un13_clk_000_d0_n.BLIF N_167_1.BLIF \
-state_machine_un8_clk_000_d0_n.BLIF N_167_2.BLIF N_109.BLIF N_167_3.BLIF \
-state_machine_un13_clk_000_d0_1_n.BLIF N_167_4.BLIF N_129.BLIF N_167_5.BLIF \
-state_machine_un13_clk_000_d0_2_n.BLIF N_167_6.BLIF N_130.BLIF N_170_1.BLIF \
-N_131.BLIF N_170_2.BLIF N_124.BLIF UDS_000_INT_0_sqmuxa_1_1.BLIF N_125.BLIF \
-UDS_000_INT_0_sqmuxa_1_2.BLIF N_134.BLIF UDS_000_INT_0_sqmuxa_1_3.BLIF \
-N_134_1.BLIF UDS_000_INT_0_sqmuxa_1_0.BLIF N_106.BLIF \
-UDS_000_INT_0_sqmuxa_2.BLIF clk_cpu_est_11_3__n.BLIF \
-state_machine_un34_clk_000_d0_i_1_n.BLIF N_132.BLIF \
-state_machine_un42_clk_030_1_n.BLIF N_133.BLIF \
-state_machine_un42_clk_030_2_n.BLIF clk_cpu_est_11_1__n.BLIF \
-state_machine_un42_clk_030_3_n.BLIF N_127.BLIF \
-state_machine_un42_clk_030_4_n.BLIF N_126.BLIF \
-state_machine_un42_clk_030_5_n.BLIF N_128.BLIF DTACK_SYNC_1_sqmuxa_1_0.BLIF \
-N_93.BLIF N_130_1.BLIF N_90.BLIF N_131_1.BLIF N_107.BLIF \
-state_machine_un8_clk_000_d0_1_n.BLIF N_108.BLIF \
-state_machine_un8_clk_000_d0_2_n.BLIF N_105.BLIF \
-state_machine_un8_clk_000_d0_3_n.BLIF N_103.BLIF \
-state_machine_un8_clk_000_d0_4_n.BLIF N_104.BLIF \
-state_machine_un13_clk_000_d0_1_0_n.BLIF N_100.BLIF \
-state_machine_un13_clk_000_d0_2_0_n.BLIF AS_000_INT_1_sqmuxa.BLIF \
-VPA_SYNC_1_sqmuxa_1_1.BLIF RW_i.BLIF VPA_SYNC_1_sqmuxa_2.BLIF \
-nEXP_SPACE_i.BLIF VPA_SYNC_1_sqmuxa_3.BLIF N_101_i.BLIF \
-VPA_SYNC_1_sqmuxa_4.BLIF AS_000_INT_i.BLIF N_106_1.BLIF dsack_i_1__n.BLIF \
-cpu_est_0_3__un3_n.BLIF AS_030_i.BLIF cpu_est_0_3__un1_n.BLIF \
-CLK_000_D0_i.BLIF cpu_est_0_3__un0_n.BLIF sm_amiga_i_3__n.BLIF \
-cpu_est_0_1__un3_n.BLIF sm_amiga_i_4__n.BLIF cpu_est_0_1__un1_n.BLIF \
-CLK_000_D1_i.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_i_0__n.BLIF \
-as_000_int_0_un3_n.BLIF cpu_est_i_3__n.BLIF as_000_int_0_un1_n.BLIF \
-cpu_est_i_2__n.BLIF as_000_int_0_un0_n.BLIF VPA_D_i.BLIF bg_000_0_un3_n.BLIF \
-VMA_INT_i.BLIF bg_000_0_un1_n.BLIF cpu_est_i_1__n.BLIF bg_000_0_un0_n.BLIF \
-state_machine_un13_clk_000_d0_2_i_n.BLIF as_030_000_sync_0_un3_n.BLIF \
-state_machine_un13_clk_000_d0_1_i_n.BLIF as_030_000_sync_0_un1_n.BLIF \
-DTACK_i.BLIF as_030_000_sync_0_un0_n.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF \
-fpu_cs_int_0_un3_n.BLIF a_i_18__n.BLIF fpu_cs_int_0_un1_n.BLIF a_i_16__n.BLIF \
-fpu_cs_int_0_un0_n.BLIF a_i_19__n.BLIF dtack_sync_0_un3_n.BLIF CLK_030_i.BLIF \
-dtack_sync_0_un1_n.BLIF state_machine_un42_clk_030_i_n.BLIF \
-dtack_sync_0_un0_n.BLIF sm_amiga_i_6__n.BLIF vma_int_0_un3_n.BLIF \
-sm_amiga_i_7__n.BLIF vma_int_0_un1_n.BLIF AS_030_000_SYNC_i.BLIF \
-vma_int_0_un0_n.BLIF DS_030_i.BLIF cpu_est_0_2__un3_n.BLIF \
-UDS_000_INT_0_sqmuxa_1_i.BLIF cpu_est_0_2__un1_n.BLIF \
-UDS_000_INT_0_sqmuxa_i.BLIF cpu_est_0_2__un0_n.BLIF sm_amiga_i_5__n.BLIF \
-ipl_030_0_0__un3_n.BLIF VPA_SYNC_1_sqmuxa_i.BLIF ipl_030_0_0__un1_n.BLIF \
-N_97_i.BLIF ipl_030_0_0__un0_n.BLIF a_i_30__n.BLIF ipl_030_0_1__un3_n.BLIF \
-a_i_31__n.BLIF ipl_030_0_1__un1_n.BLIF a_i_28__n.BLIF ipl_030_0_1__un0_n.BLIF \
-a_i_29__n.BLIF ipl_030_0_2__un3_n.BLIF a_i_26__n.BLIF ipl_030_0_2__un1_n.BLIF \
-a_i_27__n.BLIF ipl_030_0_2__un0_n.BLIF a_i_24__n.BLIF \
-bgack_030_int_0_un3_n.BLIF a_i_25__n.BLIF bgack_030_int_0_un1_n.BLIF \
-bgack_030_int_0_un0_n.BLIF RST_i.BLIF uds_000_int_0_un3_n.BLIF \
-uds_000_int_0_un1_n.BLIF FPU_CS_INT_i.BLIF uds_000_int_0_un0_n.BLIF \
-BGACK_030_INT_i.BLIF lds_000_int_0_un3_n.BLIF AS_030_c.BLIF \
-lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF vpa_sync_0_un3_n.BLIF \
-DS_030_c.BLIF vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF \
-dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un1_n.BLIF size_c_0__n.BLIF \
-dsack_int_0_1__un0_n.BLIF a_15__n.BLIF size_c_1__n.BLIF a_14__n.BLIF \
-a_c_0__n.BLIF a_13__n.BLIF a_12__n.BLIF a_11__n.BLIF a_10__n.BLIF a_9__n.BLIF \
-a_8__n.BLIF a_7__n.BLIF a_6__n.BLIF a_c_16__n.BLIF a_5__n.BLIF a_c_17__n.BLIF \
-a_4__n.BLIF a_c_18__n.BLIF a_3__n.BLIF a_c_19__n.BLIF a_2__n.BLIF \
-a_c_20__n.BLIF a_1__n.BLIF a_c_21__n.BLIF a_c_22__n.BLIF a_c_23__n.BLIF \
-a_c_24__n.BLIF a_c_25__n.BLIF a_c_26__n.BLIF a_c_27__n.BLIF a_c_28__n.BLIF \
-a_c_29__n.BLIF a_c_30__n.BLIF a_c_31__n.BLIF nEXP_SPACE_c.BLIF BG_030_c.BLIF \
-BG_000DFFSHreg.BLIF BGACK_000_c.BLIF CLK_030_c.BLIF CLK_OSZI_c.BLIF \
-CLK_OUT_INTreg.BLIF IPL_030DFFSH_0_reg.BLIF IPL_030DFFSH_1_reg.BLIF \
-IPL_030DFFSH_2_reg.BLIF DSACK_1_.PIN.BLIF DTACK.PIN.BLIF
+DSACK_0_.BLIF BGACK_000_c.BLIF CLK_030_c.BLIF CLK_000_c.BLIF CLK_OSZI_c.BLIF \
+inst_BGACK_030_INTreg.BLIF inst_FPU_CS_INTreg.BLIF cpu_est_3_reg.BLIF \
+CLK_OUT_INTreg.BLIF inst_VMA_INTreg.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF \
+IPL_030DFFSH_0_reg.BLIF inst_AS_000_INTreg.BLIF inst_AS_030_000_SYNC.BLIF \
+IPL_030DFFSH_1_reg.BLIF inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF \
+IPL_030DFFSH_2_reg.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF \
+ipl_c_0__n.BLIF inst_CLK_000_D1.BLIF inst_CLK_000_D2.BLIF ipl_c_1__n.BLIF \
+inst_CLK_OUT_PRE.BLIF SM_AMIGA_6_.BLIF ipl_c_2__n.BLIF vcc_n_n.BLIF \
+gnd_n_n.BLIF cpu_est_2_.BLIF dsack_c_1__n.BLIF CLK_REF_1_.BLIF \
+SM_AMIGA_7_.BLIF DTACK_c.BLIF inst_UDS_000_INTreg.BLIF \
+inst_LDS_000_INTreg.BLIF DSACK_INT_1_.BLIF clk_un4_clk_000_d1_n.BLIF \
+SM_AMIGA_4_.BLIF SM_AMIGA_1_.BLIF inst_DTACK_DMA.BLIF clk_clk_cnt_n.BLIF \
+RST_c.BLIF CLK_CNT_0_.BLIF CLK_CNT_1_.BLIF RESETDFFreg.BLIF \
+state_machine_un14_as_000_int_n.BLIF SM_AMIGA_3_.BLIF RW_c.BLIF fc_c_0__n.BLIF \
+un1_as_030_4.BLIF SM_AMIGA_5_.BLIF fc_c_1__n.BLIF SM_AMIGA_2_.BLIF \
+SM_AMIGA_0_.BLIF AMIGA_BUS_ENABLEDFFreg.BLIF \
+state_machine_lds_000_int_7_n.BLIF state_machine_uds_000_int_7_n.BLIF \
+N_101_i.BLIF N_102_i.BLIF N_103_i.BLIF N_90_0.BLIF N_91_0.BLIF N_127_i.BLIF \
+N_128_i.BLIF CLK_OUT_PRE_0.BLIF N_118_i.BLIF N_125_i.BLIF cpu_est_0_0_.BLIF \
+N_123_i.BLIF N_124_i.BLIF N_126_i.BLIF clk_cpu_est_11_0_1__n.BLIF N_131_i.BLIF \
+clk_cpu_est_11_0_3__n.BLIF N_130_i.BLIF N_129_i.BLIF N_122_i.BLIF N_121_i.BLIF \
+N_108_i.BLIF G_86.BLIF sm_amiga_ns_0_7__n.BLIF \
+state_machine_un30_clk_000_d1_n.BLIF state_machine_un8_clk_000_d0_i_n.BLIF \
+N_147.BLIF state_machine_un13_clk_000_d0_i_n.BLIF N_96.BLIF \
+state_machine_un15_clk_000_d0_0_n.BLIF state_machine_un44_clk_000_d1_n.BLIF \
+state_machine_un23_clk_000_d0_i_n.BLIF G_90.BLIF N_100_i.BLIF N_89.BLIF \
+sm_amiga_ns_0_2__n.BLIF N_97.BLIF BG_030_c_i.BLIF N_90.BLIF \
+state_machine_un1_clk_030_0_n.BLIF N_98.BLIF clk_un4_clk_000_d1_i_n.BLIF \
+N_99.BLIF state_machine_un6_bgack_000_0_n.BLIF UDS_000_INT_0_sqmuxa.BLIF \
+state_machine_un17_clk_030_0_n.BLIF UDS_000_INT_0_sqmuxa_1.BLIF \
+un1_as_030_3_0.BLIF N_167.BLIF N_89_i.BLIF N_170.BLIF \
+AMIGA_BUS_ENABLE_i_m_i.BLIF N_105.BLIF nEXP_SPACE_m_i.BLIF N_92.BLIF \
+state_machine_amiga_bus_enable_2_iv_i_n.BLIF N_106.BLIF \
+state_machine_as_030_000_sync_3_2_n.BLIF N_107.BLIF N_94_i.BLIF N_104.BLIF \
+un1_bg_030_0.BLIF state_machine_un42_clk_030_n.BLIF N_105_i.BLIF \
+un1_bg_030.BLIF N_104_i.BLIF N_94.BLIF sm_amiga_ns_0_5__n.BLIF \
+state_machine_as_030_000_sync_3_n.BLIF N_106_i.BLIF AMIGA_BUS_ENABLE_i_m.BLIF \
+N_107_i.BLIF nEXP_SPACE_m.BLIF N_95.BLIF CLK_OUT_PRE_i.BLIF un1_as_030_3.BLIF \
+N_92_0.BLIF state_machine_un17_clk_030_n.BLIF \
+state_machine_un44_clk_000_d1_i_n.BLIF state_machine_un6_bgack_000_n.BLIF \
+a_c_i_0__n.BLIF state_machine_un1_clk_030_n.BLIF size_c_i_1__n.BLIF \
+AS_000_INT_1_sqmuxa.BLIF N_98_i.BLIF DSACK_INT_1_sqmuxa.BLIF N_99_i.BLIF \
+N_100.BLIF sm_amiga_ns_0_1__n.BLIF state_machine_un23_clk_000_d0_n.BLIF \
+N_97_i.BLIF DTACK_SYNC_1_sqmuxa.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF N_147_i.BLIF \
+VPA_SYNC_1_sqmuxa.BLIF state_machine_lds_000_int_7_0_n.BLIF \
+VPA_SYNC_1_sqmuxa_1.BLIF state_machine_uds_000_int_7_0_n.BLIF \
+state_machine_un15_clk_000_d0_n.BLIF un1_bg_030_0_1.BLIF \
+clk_cpu_est_11_3__n.BLIF un1_bg_030_0_2.BLIF state_machine_un2_clk_000_n.BLIF \
+state_machine_as_030_000_sync_3_2_1_n.BLIF \
+state_machine_un13_clk_000_d0_n.BLIF clk_cpu_est_11_0_1_1__n.BLIF \
+state_machine_un8_clk_000_d0_n.BLIF clk_cpu_est_11_0_2_1__n.BLIF N_108.BLIF \
+N_167_1.BLIF state_machine_un13_clk_000_d0_1_n.BLIF N_167_2.BLIF N_124.BLIF \
+N_167_3.BLIF N_126.BLIF N_167_4.BLIF state_machine_un13_clk_000_d0_2_n.BLIF \
+N_167_5.BLIF N_129.BLIF N_167_6.BLIF N_122.BLIF N_170_1.BLIF N_130.BLIF \
+N_170_2.BLIF N_121.BLIF UDS_000_INT_0_sqmuxa_1_1.BLIF N_131.BLIF \
+UDS_000_INT_0_sqmuxa_1_2.BLIF N_127.BLIF UDS_000_INT_0_sqmuxa_1_3.BLIF \
+clk_cpu_est_11_1__n.BLIF UDS_000_INT_0_sqmuxa_1_0.BLIF N_128.BLIF \
+state_machine_un44_clk_000_d1_i_1_n.BLIF N_123.BLIF \
+state_machine_un42_clk_030_1_n.BLIF N_125.BLIF \
+state_machine_un42_clk_030_2_n.BLIF N_91.BLIF \
+state_machine_un42_clk_030_3_n.BLIF N_102.BLIF \
+state_machine_un42_clk_030_4_n.BLIF N_103.BLIF \
+state_machine_un42_clk_030_5_n.BLIF N_101.BLIF N_96_1.BLIF RW_i.BLIF \
+AMIGA_BUS_ENABLE_i_m_1.BLIF AS_000_INT_i.BLIF N_131_1.BLIF dsack_i_1__n.BLIF \
+clk_cpu_est_11_0_1_3__n.BLIF sm_amiga_i_4__n.BLIF N_105_1.BLIF \
+sm_amiga_i_5__n.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF CLK_000_D0_i.BLIF \
+VPA_SYNC_1_sqmuxa_2.BLIF sm_amiga_i_3__n.BLIF VPA_SYNC_1_sqmuxa_3.BLIF \
+cpu_est_i_0__n.BLIF VPA_SYNC_1_sqmuxa_4.BLIF cpu_est_i_2__n.BLIF \
+VPA_SYNC_1_sqmuxa_5.BLIF state_machine_un13_clk_000_d0_2_i_n.BLIF \
+VPA_SYNC_1_sqmuxa_6.BLIF cpu_est_i_3__n.BLIF DTACK_SYNC_1_sqmuxa_1_0.BLIF \
+VPA_D_i.BLIF DTACK_SYNC_1_sqmuxa_2.BLIF cpu_est_i_1__n.BLIF \
+state_machine_un8_clk_000_d0_1_n.BLIF DTACK_i.BLIF \
+state_machine_un8_clk_000_d0_2_n.BLIF VMA_INT_i.BLIF \
+state_machine_un8_clk_000_d0_3_n.BLIF state_machine_un13_clk_000_d0_1_i_n.BLIF \
+state_machine_un8_clk_000_d0_4_n.BLIF AS_030_i.BLIF \
+state_machine_un13_clk_000_d0_1_0_n.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF \
+state_machine_un13_clk_000_d0_2_0_n.BLIF VPA_SYNC_1_sqmuxa_i.BLIF N_127_1.BLIF \
+CLK_000_D1_i.BLIF N_128_1.BLIF N_95_i.BLIF ipl_030_0_2__un3_n.BLIF N_96_i.BLIF \
+ipl_030_0_2__un1_n.BLIF a_i_18__n.BLIF ipl_030_0_2__un0_n.BLIF a_i_16__n.BLIF \
+ipl_030_0_1__un3_n.BLIF a_i_19__n.BLIF ipl_030_0_1__un1_n.BLIF CLK_030_i.BLIF \
+ipl_030_0_1__un0_n.BLIF CLK_000_D2_i.BLIF ipl_030_0_0__un3_n.BLIF \
+state_machine_un42_clk_030_i_n.BLIF ipl_030_0_0__un1_n.BLIF \
+sm_amiga_i_6__n.BLIF ipl_030_0_0__un0_n.BLIF sm_amiga_i_7__n.BLIF \
+cpu_est_0_2__un3_n.BLIF AMIGA_BUS_ENABLE_i.BLIF cpu_est_0_2__un1_n.BLIF \
+nEXP_SPACE_i.BLIF cpu_est_0_2__un0_n.BLIF sm_amiga_i_2__n.BLIF \
+cpu_est_0_1__un3_n.BLIF sm_amiga_i_1__n.BLIF cpu_est_0_1__un1_n.BLIF \
+DS_030_i.BLIF cpu_est_0_1__un0_n.BLIF AS_030_000_SYNC_i.BLIF \
+vpa_sync_0_un3_n.BLIF UDS_000_INT_0_sqmuxa_1_i.BLIF vpa_sync_0_un1_n.BLIF \
+UDS_000_INT_0_sqmuxa_i.BLIF vpa_sync_0_un0_n.BLIF clk_clk_cnt_i_n.BLIF \
+vma_int_0_un3_n.BLIF clk_cnt_i_0__n.BLIF vma_int_0_un1_n.BLIF a_i_30__n.BLIF \
+vma_int_0_un0_n.BLIF a_i_31__n.BLIF cpu_est_0_3__un3_n.BLIF a_i_28__n.BLIF \
+cpu_est_0_3__un1_n.BLIF a_i_29__n.BLIF cpu_est_0_3__un0_n.BLIF a_i_26__n.BLIF \
+bgack_030_int_0_un3_n.BLIF a_i_27__n.BLIF bgack_030_int_0_un1_n.BLIF \
+a_i_24__n.BLIF bgack_030_int_0_un0_n.BLIF a_i_25__n.BLIF bg_000_0_un3_n.BLIF \
+N_132_i.BLIF bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF RST_i.BLIF \
+amiga_bus_enable_0_un3_n.BLIF FPU_CS_INT_i.BLIF amiga_bus_enable_0_un1_n.BLIF \
+BGACK_030_INT_i.BLIF amiga_bus_enable_0_un0_n.BLIF AS_030_c.BLIF \
+as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un1_n.BLIF \
+as_030_000_sync_0_un0_n.BLIF DS_030_c.BLIF fpu_cs_int_0_un3_n.BLIF \
+fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF as_000_int_0_un3_n.BLIF \
+size_c_0__n.BLIF as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF \
+size_c_1__n.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un1_n.BLIF \
+a_c_0__n.BLIF dsack_int_0_1__un0_n.BLIF dtack_sync_0_un3_n.BLIF \
+dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF uds_000_int_0_un3_n.BLIF \
+uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF lds_000_int_0_un3_n.BLIF \
+lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF a_15__n.BLIF a_14__n.BLIF \
+a_13__n.BLIF a_12__n.BLIF a_c_16__n.BLIF a_11__n.BLIF a_c_17__n.BLIF \
+a_10__n.BLIF a_c_18__n.BLIF a_9__n.BLIF a_c_19__n.BLIF a_8__n.BLIF \
+a_c_20__n.BLIF a_7__n.BLIF a_c_21__n.BLIF a_6__n.BLIF a_c_22__n.BLIF \
+a_5__n.BLIF a_c_23__n.BLIF a_4__n.BLIF a_c_24__n.BLIF a_3__n.BLIF \
+a_c_25__n.BLIF a_2__n.BLIF a_c_26__n.BLIF a_1__n.BLIF a_c_27__n.BLIF \
+a_c_28__n.BLIF a_c_29__n.BLIF a_c_30__n.BLIF a_c_31__n.BLIF nEXP_SPACE_c.BLIF \
+BG_030_c.BLIF BG_000DFFSHreg.BLIF DSACK_1_.PIN.BLIF DTACK.PIN.BLIF
.outputs IPL_030_2_ AS_000 UDS_000 LDS_000 BERR BG_000 BGACK_030 CLK_DIV_OUT \
CLK_EXP FPU_CS AVEC AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \
-AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_3_.D SM_AMIGA_3_.C \
-SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D \
-SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR \
+AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_5_.D SM_AMIGA_5_.C \
+SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D \
+SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR \
+SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C \
+SM_AMIGA_0_.AR cpu_est_2_.D cpu_est_2_.C cpu_est_3_reg.D cpu_est_3_reg.C \
IPL_030DFFSH_0_reg.D IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP \
IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP \
IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D \
SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR \
-SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C \
-SM_AMIGA_4_.AR DSACK_INT_1_.D DSACK_INT_1_.C DSACK_INT_1_.AP inst_VMA_INTreg.D \
-inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_BGACK_030_INTreg.D \
-inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE.D \
-inst_CLK_OUT_PRE.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C \
-cpu_est_2_.D cpu_est_2_.C cpu_est_3_reg.D cpu_est_3_reg.C \
-inst_LDS_000_INTreg.D inst_LDS_000_INTreg.C inst_LDS_000_INTreg.AP \
-inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_FPU_CS_INTreg.D \
+inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C inst_BGACK_030_INTreg.D \
+inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP CLK_CNT_0_.D CLK_CNT_0_.C \
+CLK_CNT_1_.D CLK_CNT_1_.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C \
+inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_FPU_CS_INTreg.D \
inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP inst_AS_030_000_SYNC.D \
inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_AS_000_INTreg.D \
-inst_AS_000_INTreg.C inst_AS_000_INTreg.AP inst_VPA_SYNC.D inst_VPA_SYNC.C \
-inst_VPA_SYNC.AP BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP \
-inst_DTACK_DMA.D inst_DTACK_DMA.C inst_DTACK_DMA.AP inst_UDS_000_INTreg.D \
-inst_UDS_000_INTreg.C inst_UDS_000_INTreg.AP CLK_CNT_0_.D CLK_CNT_0_.C \
-inst_VPA_D.D inst_VPA_D.C inst_CLK_000_D0.D inst_CLK_000_D0.C RESETDFFreg.D \
-RESETDFFreg.C inst_CLK_000_D1.D inst_CLK_000_D1.C CLK_OUT_INTreg.D \
-CLK_OUT_INTreg.C DSACK_1_ DTACK DSACK_0_ ipl_c_0__n ipl_c_1__n ipl_c_2__n \
-dsack_c_1__n DTACK_c RST_c vcc_n_n gnd_n_n RW_c fc_c_0__n fc_c_1__n \
-state_machine_un60_clk_000_d0_n N_100_i sm_amiga_ns_0_2__n N_103_i \
-DSACK_INT_1_sqmuxa N_104_i state_machine_un13_as_000_int_n VPA_SYNC_1_sqmuxa_1 \
-N_106_i un1_as_030_4 N_105_i sm_amiga_ns_0_5__n N_107_i N_108_i \
-state_machine_lds_000_int_8_n sm_amiga_ns_0_6__n state_machine_uds_000_int_8_n \
-N_90_i N_93_0 N_128_i N_126_i N_127_i N_129_i clk_cpu_est_11_0_1__n N_133_i \
-N_132_i N_134_i clk_cpu_est_11_0_3__n N_125_i N_124_i N_130_i N_131_i N_121_i \
-N_91_0 N_109_i sm_amiga_ns_0_7__n state_machine_un8_clk_000_d0_i_n \
-state_machine_un13_clk_000_d0_i_n state_machine_un15_clk_000_d0_0_n BG_030_c_i \
-state_machine_un1_clk_030_0_n clk_un4_clk_000_d1_n \
-state_machine_un17_clk_030_0_n N_144 un1_as_030_3_0 N_101 \
-state_machine_as_030_000_sync_3_2_n VPA_SYNC_1_sqmuxa N_96_i N_97 un1_bg_030_0 \
-state_machine_un34_clk_000_d0_n clk_un4_clk_000_d1_i_n N_96 \
-state_machine_un6_bgack_000_0_n N_102 N_98_i UDS_000_INT_0_sqmuxa \
-UDS_000_INT_0_sqmuxa_1 N_111_i N_167 N_99_i N_170 N_92 N_92_0 N_91 \
-state_machine_un34_clk_000_d0_i_n N_99 a_c_i_0__n N_111 size_c_i_1__n N_98 \
-N_102_i state_machine_un6_bgack_000_n state_machine_un42_clk_030_n N_144_i \
-DTACK_SYNC_1_sqmuxa state_machine_lds_000_int_8_0_n un1_bg_030 \
-state_machine_uds_000_int_8_0_n state_machine_as_030_000_sync_3_n \
-state_machine_un60_clk_000_d0_i_n DTACK_SYNC_1_sqmuxa_1 un1_bg_030_0_1 \
-un1_as_030_3 un1_bg_030_0_2 state_machine_un17_clk_030_n \
-state_machine_as_030_000_sync_3_2_1_n state_machine_un1_clk_030_n \
-clk_cpu_est_11_0_1_3__n VPA_SYNC_1_sqmuxa_1_0 clk_cpu_est_11_0_1_1__n \
-state_machine_un15_clk_000_d0_n clk_cpu_est_11_0_2_1__n \
-state_machine_un13_clk_000_d0_n N_167_1 state_machine_un8_clk_000_d0_n N_167_2 \
-N_109 N_167_3 state_machine_un13_clk_000_d0_1_n N_167_4 N_129 N_167_5 \
-state_machine_un13_clk_000_d0_2_n N_167_6 N_130 N_170_1 N_131 N_170_2 N_124 \
-UDS_000_INT_0_sqmuxa_1_1 N_125 UDS_000_INT_0_sqmuxa_1_2 N_134 \
-UDS_000_INT_0_sqmuxa_1_3 N_134_1 UDS_000_INT_0_sqmuxa_1_0 N_106 \
-UDS_000_INT_0_sqmuxa_2 clk_cpu_est_11_3__n state_machine_un34_clk_000_d0_i_1_n \
-N_132 state_machine_un42_clk_030_1_n N_133 state_machine_un42_clk_030_2_n \
-clk_cpu_est_11_1__n state_machine_un42_clk_030_3_n N_127 \
-state_machine_un42_clk_030_4_n N_126 state_machine_un42_clk_030_5_n N_128 \
-DTACK_SYNC_1_sqmuxa_1_0 N_93 N_130_1 N_90 N_131_1 N_107 \
-state_machine_un8_clk_000_d0_1_n N_108 state_machine_un8_clk_000_d0_2_n N_105 \
-state_machine_un8_clk_000_d0_3_n N_103 state_machine_un8_clk_000_d0_4_n N_104 \
-state_machine_un13_clk_000_d0_1_0_n N_100 state_machine_un13_clk_000_d0_2_0_n \
-AS_000_INT_1_sqmuxa VPA_SYNC_1_sqmuxa_1_1 RW_i VPA_SYNC_1_sqmuxa_2 \
-nEXP_SPACE_i VPA_SYNC_1_sqmuxa_3 N_101_i VPA_SYNC_1_sqmuxa_4 AS_000_INT_i \
-N_106_1 dsack_i_1__n cpu_est_0_3__un3_n AS_030_i cpu_est_0_3__un1_n \
-CLK_000_D0_i cpu_est_0_3__un0_n sm_amiga_i_3__n cpu_est_0_1__un3_n \
-sm_amiga_i_4__n cpu_est_0_1__un1_n CLK_000_D1_i cpu_est_0_1__un0_n \
-cpu_est_i_0__n as_000_int_0_un3_n cpu_est_i_3__n as_000_int_0_un1_n \
-cpu_est_i_2__n as_000_int_0_un0_n VPA_D_i bg_000_0_un3_n VMA_INT_i \
-bg_000_0_un1_n cpu_est_i_1__n bg_000_0_un0_n \
-state_machine_un13_clk_000_d0_2_i_n as_030_000_sync_0_un3_n \
-state_machine_un13_clk_000_d0_1_i_n as_030_000_sync_0_un1_n DTACK_i \
-as_030_000_sync_0_un0_n DTACK_SYNC_1_sqmuxa_i fpu_cs_int_0_un3_n a_i_18__n \
-fpu_cs_int_0_un1_n a_i_16__n fpu_cs_int_0_un0_n a_i_19__n dtack_sync_0_un3_n \
-CLK_030_i dtack_sync_0_un1_n state_machine_un42_clk_030_i_n dtack_sync_0_un0_n \
-sm_amiga_i_6__n vma_int_0_un3_n sm_amiga_i_7__n vma_int_0_un1_n \
-AS_030_000_SYNC_i vma_int_0_un0_n DS_030_i cpu_est_0_2__un3_n \
-UDS_000_INT_0_sqmuxa_1_i cpu_est_0_2__un1_n UDS_000_INT_0_sqmuxa_i \
-cpu_est_0_2__un0_n sm_amiga_i_5__n ipl_030_0_0__un3_n VPA_SYNC_1_sqmuxa_i \
-ipl_030_0_0__un1_n N_97_i ipl_030_0_0__un0_n a_i_30__n ipl_030_0_1__un3_n \
-a_i_31__n ipl_030_0_1__un1_n a_i_28__n ipl_030_0_1__un0_n a_i_29__n \
-ipl_030_0_2__un3_n a_i_26__n ipl_030_0_2__un1_n a_i_27__n ipl_030_0_2__un0_n \
-a_i_24__n bgack_030_int_0_un3_n a_i_25__n bgack_030_int_0_un1_n \
-bgack_030_int_0_un0_n RST_i uds_000_int_0_un3_n uds_000_int_0_un1_n \
-FPU_CS_INT_i uds_000_int_0_un0_n BGACK_030_INT_i lds_000_int_0_un3_n AS_030_c \
-lds_000_int_0_un1_n lds_000_int_0_un0_n vpa_sync_0_un3_n DS_030_c \
-vpa_sync_0_un1_n vpa_sync_0_un0_n dsack_int_0_1__un3_n dsack_int_0_1__un1_n \
-size_c_0__n dsack_int_0_1__un0_n a_15__n size_c_1__n a_14__n a_c_0__n a_13__n \
-a_12__n a_11__n a_10__n a_9__n a_8__n a_7__n a_6__n a_c_16__n a_5__n a_c_17__n \
-a_4__n a_c_18__n a_3__n a_c_19__n a_2__n a_c_20__n a_1__n a_c_21__n a_c_22__n \
-a_c_23__n a_c_24__n a_c_25__n a_c_26__n a_c_27__n a_c_28__n a_c_29__n \
-a_c_30__n a_c_31__n nEXP_SPACE_c BG_030_c BGACK_000_c CLK_030_c CLK_OSZI_c \
-DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE LDS_000.OE BERR.OE DSACK_0_.OE \
-AVEC_EXP.OE CIIN.OE cpu_est_0_0_ CLK_OUT_PRE_0
-.names N_103_i.BLIF N_104_i.BLIF SM_AMIGA_3_.D
+inst_AS_000_INTreg.C inst_AS_000_INTreg.AP AMIGA_BUS_ENABLEDFFreg.D \
+AMIGA_BUS_ENABLEDFFreg.C BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP \
+DSACK_INT_1_.D DSACK_INT_1_.C DSACK_INT_1_.AP inst_VMA_INTreg.D \
+inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_UDS_000_INTreg.D \
+inst_UDS_000_INTreg.C inst_UDS_000_INTreg.AP inst_LDS_000_INTreg.D \
+inst_LDS_000_INTreg.C inst_LDS_000_INTreg.AP inst_DTACK_SYNC.D \
+inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_DTACK_DMA.D inst_DTACK_DMA.C \
+inst_DTACK_DMA.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_000_D2.D \
+inst_CLK_000_D2.C inst_VPA_D.D inst_VPA_D.C inst_CLK_000_D0.D \
+inst_CLK_000_D0.C RESETDFFreg.D RESETDFFreg.C inst_CLK_000_D1.D \
+inst_CLK_000_D1.C CLK_REF_1_.D CLK_REF_1_.LH CLK_REF_1_.AR DSACK_1_ DTACK \
+DSACK_0_ BGACK_000_c CLK_030_c CLK_000_c CLK_OSZI_c ipl_c_0__n ipl_c_1__n \
+ipl_c_2__n vcc_n_n gnd_n_n dsack_c_1__n DTACK_c clk_un4_clk_000_d1_n \
+clk_clk_cnt_n RST_c state_machine_un14_as_000_int_n RW_c fc_c_0__n \
+un1_as_030_4 fc_c_1__n state_machine_lds_000_int_7_n \
+state_machine_uds_000_int_7_n N_101_i N_102_i N_103_i N_90_0 N_91_0 N_127_i \
+N_128_i N_118_i N_125_i N_123_i N_124_i N_126_i clk_cpu_est_11_0_1__n N_131_i \
+clk_cpu_est_11_0_3__n N_130_i N_129_i N_122_i N_121_i N_108_i \
+sm_amiga_ns_0_7__n state_machine_un30_clk_000_d1_n \
+state_machine_un8_clk_000_d0_i_n N_147 state_machine_un13_clk_000_d0_i_n N_96 \
+state_machine_un15_clk_000_d0_0_n state_machine_un44_clk_000_d1_n \
+state_machine_un23_clk_000_d0_i_n N_100_i N_89 sm_amiga_ns_0_2__n N_97 \
+BG_030_c_i N_90 state_machine_un1_clk_030_0_n N_98 clk_un4_clk_000_d1_i_n N_99 \
+state_machine_un6_bgack_000_0_n UDS_000_INT_0_sqmuxa \
+state_machine_un17_clk_030_0_n UDS_000_INT_0_sqmuxa_1 un1_as_030_3_0 N_167 \
+N_89_i N_170 AMIGA_BUS_ENABLE_i_m_i N_105 nEXP_SPACE_m_i N_92 \
+state_machine_amiga_bus_enable_2_iv_i_n N_106 \
+state_machine_as_030_000_sync_3_2_n N_107 N_94_i N_104 un1_bg_030_0 \
+state_machine_un42_clk_030_n N_105_i un1_bg_030 N_104_i N_94 \
+sm_amiga_ns_0_5__n state_machine_as_030_000_sync_3_n N_106_i \
+AMIGA_BUS_ENABLE_i_m N_107_i nEXP_SPACE_m N_95 CLK_OUT_PRE_i un1_as_030_3 \
+N_92_0 state_machine_un17_clk_030_n state_machine_un44_clk_000_d1_i_n \
+state_machine_un6_bgack_000_n a_c_i_0__n state_machine_un1_clk_030_n \
+size_c_i_1__n AS_000_INT_1_sqmuxa N_98_i DSACK_INT_1_sqmuxa N_99_i N_100 \
+sm_amiga_ns_0_1__n state_machine_un23_clk_000_d0_n N_97_i DTACK_SYNC_1_sqmuxa \
+DTACK_SYNC_1_sqmuxa_1 N_147_i VPA_SYNC_1_sqmuxa \
+state_machine_lds_000_int_7_0_n VPA_SYNC_1_sqmuxa_1 \
+state_machine_uds_000_int_7_0_n state_machine_un15_clk_000_d0_n un1_bg_030_0_1 \
+clk_cpu_est_11_3__n un1_bg_030_0_2 state_machine_un2_clk_000_n \
+state_machine_as_030_000_sync_3_2_1_n state_machine_un13_clk_000_d0_n \
+clk_cpu_est_11_0_1_1__n state_machine_un8_clk_000_d0_n clk_cpu_est_11_0_2_1__n \
+N_108 N_167_1 state_machine_un13_clk_000_d0_1_n N_167_2 N_124 N_167_3 N_126 \
+N_167_4 state_machine_un13_clk_000_d0_2_n N_167_5 N_129 N_167_6 N_122 N_170_1 \
+N_130 N_170_2 N_121 UDS_000_INT_0_sqmuxa_1_1 N_131 UDS_000_INT_0_sqmuxa_1_2 \
+N_127 UDS_000_INT_0_sqmuxa_1_3 clk_cpu_est_11_1__n UDS_000_INT_0_sqmuxa_1_0 \
+N_128 state_machine_un44_clk_000_d1_i_1_n N_123 state_machine_un42_clk_030_1_n \
+N_125 state_machine_un42_clk_030_2_n N_91 state_machine_un42_clk_030_3_n N_102 \
+state_machine_un42_clk_030_4_n N_103 state_machine_un42_clk_030_5_n N_101 \
+N_96_1 RW_i AMIGA_BUS_ENABLE_i_m_1 AS_000_INT_i N_131_1 dsack_i_1__n \
+clk_cpu_est_11_0_1_3__n sm_amiga_i_4__n N_105_1 sm_amiga_i_5__n \
+VPA_SYNC_1_sqmuxa_1_0 CLK_000_D0_i VPA_SYNC_1_sqmuxa_2 sm_amiga_i_3__n \
+VPA_SYNC_1_sqmuxa_3 cpu_est_i_0__n VPA_SYNC_1_sqmuxa_4 cpu_est_i_2__n \
+VPA_SYNC_1_sqmuxa_5 state_machine_un13_clk_000_d0_2_i_n VPA_SYNC_1_sqmuxa_6 \
+cpu_est_i_3__n DTACK_SYNC_1_sqmuxa_1_0 VPA_D_i DTACK_SYNC_1_sqmuxa_2 \
+cpu_est_i_1__n state_machine_un8_clk_000_d0_1_n DTACK_i \
+state_machine_un8_clk_000_d0_2_n VMA_INT_i state_machine_un8_clk_000_d0_3_n \
+state_machine_un13_clk_000_d0_1_i_n state_machine_un8_clk_000_d0_4_n AS_030_i \
+state_machine_un13_clk_000_d0_1_0_n DTACK_SYNC_1_sqmuxa_i \
+state_machine_un13_clk_000_d0_2_0_n VPA_SYNC_1_sqmuxa_i N_127_1 CLK_000_D1_i \
+N_128_1 N_95_i ipl_030_0_2__un3_n N_96_i ipl_030_0_2__un1_n a_i_18__n \
+ipl_030_0_2__un0_n a_i_16__n ipl_030_0_1__un3_n a_i_19__n ipl_030_0_1__un1_n \
+CLK_030_i ipl_030_0_1__un0_n CLK_000_D2_i ipl_030_0_0__un3_n \
+state_machine_un42_clk_030_i_n ipl_030_0_0__un1_n sm_amiga_i_6__n \
+ipl_030_0_0__un0_n sm_amiga_i_7__n cpu_est_0_2__un3_n AMIGA_BUS_ENABLE_i \
+cpu_est_0_2__un1_n nEXP_SPACE_i cpu_est_0_2__un0_n sm_amiga_i_2__n \
+cpu_est_0_1__un3_n sm_amiga_i_1__n cpu_est_0_1__un1_n DS_030_i \
+cpu_est_0_1__un0_n AS_030_000_SYNC_i vpa_sync_0_un3_n UDS_000_INT_0_sqmuxa_1_i \
+vpa_sync_0_un1_n UDS_000_INT_0_sqmuxa_i vpa_sync_0_un0_n clk_clk_cnt_i_n \
+vma_int_0_un3_n clk_cnt_i_0__n vma_int_0_un1_n a_i_30__n vma_int_0_un0_n \
+a_i_31__n cpu_est_0_3__un3_n a_i_28__n cpu_est_0_3__un1_n a_i_29__n \
+cpu_est_0_3__un0_n a_i_26__n bgack_030_int_0_un3_n a_i_27__n \
+bgack_030_int_0_un1_n a_i_24__n bgack_030_int_0_un0_n a_i_25__n bg_000_0_un3_n \
+N_132_i bg_000_0_un1_n bg_000_0_un0_n RST_i amiga_bus_enable_0_un3_n \
+FPU_CS_INT_i amiga_bus_enable_0_un1_n BGACK_030_INT_i amiga_bus_enable_0_un0_n \
+AS_030_c as_030_000_sync_0_un3_n as_030_000_sync_0_un1_n \
+as_030_000_sync_0_un0_n DS_030_c fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n \
+fpu_cs_int_0_un0_n as_000_int_0_un3_n size_c_0__n as_000_int_0_un1_n \
+as_000_int_0_un0_n size_c_1__n dsack_int_0_1__un3_n dsack_int_0_1__un1_n \
+a_c_0__n dsack_int_0_1__un0_n dtack_sync_0_un3_n dtack_sync_0_un1_n \
+dtack_sync_0_un0_n uds_000_int_0_un3_n uds_000_int_0_un1_n uds_000_int_0_un0_n \
+lds_000_int_0_un3_n lds_000_int_0_un1_n lds_000_int_0_un0_n a_15__n a_14__n \
+a_13__n a_12__n a_c_16__n a_11__n a_c_17__n a_10__n a_c_18__n a_9__n a_c_19__n \
+a_8__n a_c_20__n a_7__n a_c_21__n a_6__n a_c_22__n a_5__n a_c_23__n a_4__n \
+a_c_24__n a_3__n a_c_25__n a_2__n a_c_26__n a_1__n a_c_27__n a_c_28__n \
+a_c_29__n a_c_30__n a_c_31__n nEXP_SPACE_c BG_030_c DSACK_1_.OE DTACK.OE \
+AS_000.OE UDS_000.OE LDS_000.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE \
+CLK_OUT_PRE_0 cpu_est_0_0_ G_86 G_90
+.names sm_amiga_ns_0_2__n.BLIF SM_AMIGA_5_.D
+0 1
+.names CLK_000_D0_i.BLIF N_101_i.BLIF SM_AMIGA_4_.D
+11 1
+.names N_102_i.BLIF N_103_i.BLIF SM_AMIGA_3_.D
11 1
.names sm_amiga_ns_0_5__n.BLIF SM_AMIGA_2_.D
0 1
-.names sm_amiga_ns_0_6__n.BLIF SM_AMIGA_1_.D
-0 1
+.names N_106_i.BLIF N_107_i.BLIF SM_AMIGA_1_.D
+11 1
.names sm_amiga_ns_0_7__n.BLIF SM_AMIGA_0_.D
0 1
+.names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D
+1- 1
+-1 1
+.names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_reg.D
+1- 1
+-1 1
.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF IPL_030DFFSH_0_reg.D
1- 1
-1 1
@@ -306,37 +340,22 @@ AVEC_EXP.OE CIIN.OE cpu_est_0_0_ CLK_OUT_PRE_0
.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF IPL_030DFFSH_2_reg.D
1- 1
-1 1
-.names inst_CLK_000_D0.BLIF N_98_i.BLIF SM_AMIGA_7_.D
+.names inst_CLK_000_D0.BLIF N_97_i.BLIF SM_AMIGA_7_.D
11 1
-.names N_99_i.BLIF N_111_i.BLIF SM_AMIGA_6_.D
-11 1
-.names sm_amiga_ns_0_2__n.BLIF SM_AMIGA_5_.D
+.names sm_amiga_ns_0_1__n.BLIF SM_AMIGA_6_.D
0 1
-.names CLK_000_D0_i.BLIF N_102_i.BLIF SM_AMIGA_4_.D
-11 1
-.names dsack_int_0_1__un1_n.BLIF dsack_int_0_1__un0_n.BLIF DSACK_INT_1_.D
-1- 1
--1 1
-.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF inst_VMA_INTreg.D
-1- 1
--1 1
.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF \
inst_BGACK_030_INTreg.D
1- 1
-1 1
+.names clk_cnt_i_0__n.BLIF clk_clk_cnt_i_n.BLIF CLK_CNT_0_.D
+11 1
+.names clk_clk_cnt_i_n.BLIF G_90.BLIF CLK_CNT_1_.D
+11 1
.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D
1- 1
-1 1
-.names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D
-1- 1
--1 1
-.names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_reg.D
-1- 1
--1 1
-.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INTreg.D
-1- 1
--1 1
-.names dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.D
+.names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D
1- 1
-1 1
.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D
@@ -349,562 +368,630 @@ inst_AS_030_000_SYNC.D
.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INTreg.D
1- 1
-1 1
-.names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D
+.names amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF \
+AMIGA_BUS_ENABLEDFFreg.D
1- 1
-1 1
.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF BG_000DFFSHreg.D
1- 1
-1 1
-.names state_machine_un13_as_000_int_n.BLIF inst_DTACK_DMA.D
-0 1
+.names dsack_int_0_1__un1_n.BLIF dsack_int_0_1__un0_n.BLIF DSACK_INT_1_.D
+1- 1
+-1 1
+.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF inst_VMA_INTreg.D
+1- 1
+-1 1
.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF inst_UDS_000_INTreg.D
1- 1
-1 1
-.names CLK_CNT_0_.BLIF CLK_CNT_0_.D
+.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INTreg.D
+1- 1
+-1 1
+.names dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.D
+1- 1
+-1 1
+.names state_machine_un14_as_000_int_n.BLIF inst_DTACK_DMA.D
0 1
.names vcc_n_n
1
.names gnd_n_n
-.names state_machine_un60_clk_000_d0_i_n.BLIF state_machine_un60_clk_000_d0_n
-0 1
-.names N_100.BLIF N_100_i
-0 1
-.names N_100_i.BLIF N_101_i.BLIF sm_amiga_ns_0_2__n
+.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF clk_un4_clk_000_d1_n
11 1
+.names clk_cnt_i_0__n.BLIF N_132_i.BLIF clk_clk_cnt_n
+11 1
+.names AS_000_INT_i.BLIF dsack_i_1__n.BLIF state_machine_un14_as_000_int_n
+11 1
+.names AS_030_i.BLIF N_147.BLIF un1_as_030_4
+11 1
+.names state_machine_lds_000_int_7_0_n.BLIF state_machine_lds_000_int_7_n
+0 1
+.names state_machine_uds_000_int_7_0_n.BLIF state_machine_uds_000_int_7_n
+0 1
+.names N_101.BLIF N_101_i
+0 1
+.names N_102.BLIF N_102_i
+0 1
.names N_103.BLIF N_103_i
0 1
-.names AS_030_i.BLIF N_97_i.BLIF DSACK_INT_1_sqmuxa
+.names inst_AS_000_INTreg.BLIF SM_AMIGA_0_.BLIF N_90_0
11 1
-.names N_104.BLIF N_104_i
-0 1
-.names AS_000_INT_i.BLIF dsack_i_1__n.BLIF state_machine_un13_as_000_int_n
+.names SM_AMIGA_3_.BLIF state_machine_un23_clk_000_d0_i_n.BLIF N_91_0
11 1
-.names AS_030_i.BLIF VPA_SYNC_1_sqmuxa_i.BLIF VPA_SYNC_1_sqmuxa_1
-11 1
-.names N_106.BLIF N_106_i
-0 1
-.names AS_030_i.BLIF N_144.BLIF un1_as_030_4
-11 1
-.names N_105.BLIF N_105_i
-0 1
-.names N_105_i.BLIF N_106_i.BLIF sm_amiga_ns_0_5__n
-11 1
-.names N_107.BLIF N_107_i
-0 1
-.names N_108.BLIF N_108_i
-0 1
-.names state_machine_lds_000_int_8_0_n.BLIF state_machine_lds_000_int_8_n
-0 1
-.names N_107_i.BLIF N_108_i.BLIF sm_amiga_ns_0_6__n
-11 1
-.names state_machine_uds_000_int_8_0_n.BLIF state_machine_uds_000_int_8_n
-0 1
-.names CLK_000_D1_i.BLIF inst_CLK_OUT_PRE.BLIF N_90_i
-11 1
-.names SM_AMIGA_3_.BLIF state_machine_un60_clk_000_d0_i_n.BLIF N_93_0
-11 1
-.names N_128.BLIF N_128_i
-0 1
-.names N_126.BLIF N_126_i
-0 1
.names N_127.BLIF N_127_i
0 1
-.names N_129.BLIF N_129_i
+.names N_128.BLIF N_128_i
+0 1
+.names N_127_i.BLIF N_128_i.BLIF N_118_i
+11 1
+.names N_125.BLIF N_125_i
+0 1
+.names N_123.BLIF N_123_i
+0 1
+.names N_124.BLIF N_124_i
+0 1
+.names N_126.BLIF N_126_i
0 1
.names clk_cpu_est_11_0_1_1__n.BLIF clk_cpu_est_11_0_2_1__n.BLIF \
clk_cpu_est_11_0_1__n
11 1
-.names N_133.BLIF N_133_i
+.names N_131.BLIF N_131_i
0 1
-.names N_132.BLIF N_132_i
-0 1
-.names N_134.BLIF N_134_i
-0 1
-.names clk_cpu_est_11_0_1_3__n.BLIF N_133_i.BLIF clk_cpu_est_11_0_3__n
-11 1
-.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_125_i
-11 1
-.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_124_i
+.names clk_cpu_est_11_0_1_3__n.BLIF N_130_i.BLIF clk_cpu_est_11_0_3__n
11 1
.names N_130.BLIF N_130_i
0 1
-.names N_131.BLIF N_131_i
+.names N_129.BLIF N_129_i
0 1
-.names N_130_i.BLIF N_131_i.BLIF N_121_i
+.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_122_i
11 1
-.names inst_AS_000_INTreg.BLIF SM_AMIGA_0_.BLIF N_91_0
+.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_121_i
11 1
-.names N_109.BLIF N_109_i
+.names N_108.BLIF N_108_i
0 1
-.names N_97_i.BLIF N_109_i.BLIF sm_amiga_ns_0_7__n
+.names N_96_i.BLIF N_108_i.BLIF sm_amiga_ns_0_7__n
+11 1
+.names inst_CLK_000_D1.BLIF CLK_000_D2_i.BLIF state_machine_un30_clk_000_d1_n
11 1
.names state_machine_un8_clk_000_d0_n.BLIF state_machine_un8_clk_000_d0_i_n
0 1
+.names UDS_000_INT_0_sqmuxa_1_i.BLIF UDS_000_INT_0_sqmuxa_i.BLIF N_147
+11 1
.names state_machine_un13_clk_000_d0_n.BLIF state_machine_un13_clk_000_d0_i_n
0 1
+.names N_96_1.BLIF SM_AMIGA_1_.BLIF N_96
+11 1
.names state_machine_un8_clk_000_d0_i_n.BLIF \
state_machine_un13_clk_000_d0_i_n.BLIF state_machine_un15_clk_000_d0_0_n
11 1
+.names state_machine_un44_clk_000_d1_i_n.BLIF state_machine_un44_clk_000_d1_n
+0 1
+.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \
+state_machine_un23_clk_000_d0_i_n
+11 1
+.names N_100.BLIF N_100_i
+0 1
+.names N_89_i.BLIF N_89
+0 1
+.names N_95_i.BLIF N_100_i.BLIF sm_amiga_ns_0_2__n
+11 1
+.names N_90.BLIF sm_amiga_i_7__n.BLIF N_97
+11 1
.names BG_030_c.BLIF BG_030_c_i
0 1
+.names N_90_0.BLIF N_90
+0 1
.names BG_030_c_i.BLIF CLK_030_c.BLIF state_machine_un1_clk_030_0_n
11 1
-.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF clk_un4_clk_000_d1_n
+.names N_89.BLIF SM_AMIGA_6_.BLIF N_98
11 1
-.names AS_030_i.BLIF CLK_030_i.BLIF state_machine_un17_clk_030_0_n
-11 1
-.names UDS_000_INT_0_sqmuxa_1_i.BLIF UDS_000_INT_0_sqmuxa_i.BLIF N_144
-11 1
-.names AS_030_i.BLIF state_machine_un42_clk_030_n.BLIF un1_as_030_3_0
-11 1
-.names N_111.BLIF SM_AMIGA_6_.BLIF N_101
-11 1
-.names state_machine_as_030_000_sync_3_2_1_n.BLIF \
-state_machine_un42_clk_030_i_n.BLIF state_machine_as_030_000_sync_3_2_n
-11 1
-.names VPA_SYNC_1_sqmuxa_4.BLIF VPA_SYNC_1_sqmuxa_3.BLIF VPA_SYNC_1_sqmuxa
-11 1
-.names N_96.BLIF N_96_i
-0 1
-.names N_90_i.BLIF SM_AMIGA_1_.BLIF N_97
-11 1
-.names un1_bg_030_0_1.BLIF un1_bg_030_0_2.BLIF un1_bg_030_0
-11 1
-.names state_machine_un34_clk_000_d0_i_n.BLIF state_machine_un34_clk_000_d0_n
-0 1
.names clk_un4_clk_000_d1_n.BLIF clk_un4_clk_000_d1_i_n
0 1
-.names sm_amiga_i_6__n.BLIF sm_amiga_i_7__n.BLIF N_96
+.names CLK_000_D0_i.BLIF SM_AMIGA_7_.BLIF N_99
11 1
.names BGACK_000_c.BLIF clk_un4_clk_000_d1_i_n.BLIF \
state_machine_un6_bgack_000_0_n
11 1
-.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_102
+.names UDS_000_INT_0_sqmuxa_1_0.BLIF RW_i.BLIF UDS_000_INT_0_sqmuxa
11 1
-.names N_98.BLIF N_98_i
-0 1
-.names UDS_000_INT_0_sqmuxa_1_0.BLIF UDS_000_INT_0_sqmuxa_2.BLIF \
-UDS_000_INT_0_sqmuxa
+.names AS_030_i.BLIF CLK_030_i.BLIF state_machine_un17_clk_030_0_n
11 1
-.names UDS_000_INT_0_sqmuxa_1_3.BLIF clk_un4_clk_000_d1_n.BLIF \
+.names UDS_000_INT_0_sqmuxa_1_3.BLIF state_machine_un30_clk_000_d1_n.BLIF \
UDS_000_INT_0_sqmuxa_1
11 1
-.names N_111.BLIF N_111_i
-0 1
+.names AS_030_i.BLIF state_machine_un42_clk_030_n.BLIF un1_as_030_3_0
+11 1
.names N_167_5.BLIF N_167_6.BLIF N_167
11 1
-.names N_99.BLIF N_99_i
-0 1
+.names AS_030_000_SYNC_i.BLIF state_machine_un30_clk_000_d1_n.BLIF N_89_i
+11 1
.names N_170_1.BLIF N_170_2.BLIF N_170
11 1
+.names AMIGA_BUS_ENABLE_i_m.BLIF AMIGA_BUS_ENABLE_i_m_i
+0 1
+.names N_105_1.BLIF state_machine_un23_clk_000_d0_n.BLIF N_105
+11 1
+.names nEXP_SPACE_m.BLIF nEXP_SPACE_m_i
+0 1
.names N_92_0.BLIF N_92
0 1
-.names CLK_000_D0_i.BLIF SM_AMIGA_7_.BLIF N_92_0
+.names AMIGA_BUS_ENABLE_i_m_i.BLIF nEXP_SPACE_m_i.BLIF \
+state_machine_amiga_bus_enable_2_iv_i_n
11 1
-.names N_91_0.BLIF N_91
-0 1
-.names state_machine_un34_clk_000_d0_i_1_n.BLIF size_c_0__n.BLIF \
-state_machine_un34_clk_000_d0_i_n
+.names CLK_000_D0_i.BLIF N_92.BLIF N_106
11 1
-.names N_92.BLIF sm_amiga_i_6__n.BLIF N_99
+.names state_machine_as_030_000_sync_3_2_1_n.BLIF \
+state_machine_un42_clk_030_i_n.BLIF state_machine_as_030_000_sync_3_2_n
11 1
-.names a_c_0__n.BLIF a_c_i_0__n
-0 1
-.names AS_030_000_SYNC_i.BLIF clk_un4_clk_000_d1_n.BLIF N_111
+.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_107
11 1
-.names size_c_1__n.BLIF size_c_i_1__n
+.names N_94.BLIF N_94_i
0 1
-.names N_91.BLIF sm_amiga_i_7__n.BLIF N_98
+.names CLK_000_D0_i.BLIF SM_AMIGA_2_.BLIF N_104
+11 1
+.names un1_bg_030_0_1.BLIF un1_bg_030_0_2.BLIF un1_bg_030_0
11 1
-.names N_102.BLIF N_102_i
-0 1
-.names state_machine_un6_bgack_000_0_n.BLIF state_machine_un6_bgack_000_n
-0 1
.names state_machine_un42_clk_030_4_n.BLIF state_machine_un42_clk_030_5_n.BLIF \
state_machine_un42_clk_030_n
11 1
-.names N_144.BLIF N_144_i
+.names N_105.BLIF N_105_i
0 1
-.names DTACK_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF \
-DTACK_SYNC_1_sqmuxa
-11 1
-.names N_144_i.BLIF state_machine_un34_clk_000_d0_n.BLIF \
-state_machine_lds_000_int_8_0_n
-11 1
.names un1_bg_030_0.BLIF un1_bg_030
0 1
-.names a_c_i_0__n.BLIF N_144_i.BLIF state_machine_uds_000_int_8_0_n
+.names N_104.BLIF N_104_i
+0 1
+.names sm_amiga_i_6__n.BLIF sm_amiga_i_7__n.BLIF N_94
+11 1
+.names N_104_i.BLIF N_105_i.BLIF sm_amiga_ns_0_5__n
11 1
.names state_machine_as_030_000_sync_3_2_n.BLIF \
state_machine_as_030_000_sync_3_n
0 1
-.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \
-state_machine_un60_clk_000_d0_i_n
+.names N_106.BLIF N_106_i
+0 1
+.names AMIGA_BUS_ENABLE_i_m_1.BLIF sm_amiga_i_6__n.BLIF AMIGA_BUS_ENABLE_i_m
11 1
-.names AS_030_i.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF DTACK_SYNC_1_sqmuxa_1
+.names N_107.BLIF N_107_i
+0 1
+.names SM_AMIGA_6_.BLIF nEXP_SPACE_c.BLIF nEXP_SPACE_m
11 1
-.names BG_030_c_i.BLIF N_96_i.BLIF un1_bg_030_0_1
+.names N_89_i.BLIF SM_AMIGA_6_.BLIF N_95
11 1
+.names inst_CLK_OUT_PRE.BLIF CLK_OUT_PRE_i
+0 1
.names un1_as_030_3_0.BLIF un1_as_030_3
0 1
-.names AS_030_c.BLIF nEXP_SPACE_i.BLIF un1_bg_030_0_2
+.names CLK_OUT_PRE_i.BLIF sm_amiga_i_2__n.BLIF N_92_0
11 1
.names state_machine_un17_clk_030_0_n.BLIF state_machine_un17_clk_030_n
0 1
-.names AS_030_i.BLIF nEXP_SPACE_c.BLIF state_machine_as_030_000_sync_3_2_1_n
+.names state_machine_un44_clk_000_d1_i_1_n.BLIF size_c_0__n.BLIF \
+state_machine_un44_clk_000_d1_i_n
11 1
+.names state_machine_un6_bgack_000_0_n.BLIF state_machine_un6_bgack_000_n
+0 1
+.names a_c_0__n.BLIF a_c_i_0__n
+0 1
.names state_machine_un1_clk_030_0_n.BLIF state_machine_un1_clk_030_n
0 1
-.names N_134_i.BLIF N_132_i.BLIF clk_cpu_est_11_0_1_3__n
+.names size_c_1__n.BLIF size_c_i_1__n
+0 1
+.names AS_030_i.BLIF N_95_i.BLIF AS_000_INT_1_sqmuxa
11 1
-.names inst_CLK_000_D0.BLIF SM_AMIGA_3_.BLIF VPA_SYNC_1_sqmuxa_1_0
+.names N_98.BLIF N_98_i
+0 1
+.names AS_030_i.BLIF N_96_i.BLIF DSACK_INT_1_sqmuxa
11 1
-.names N_129_i.BLIF N_127_i.BLIF clk_cpu_est_11_0_1_1__n
+.names N_99.BLIF N_99_i
+0 1
+.names inst_CLK_000_D0.BLIF SM_AMIGA_5_.BLIF N_100
+11 1
+.names N_98_i.BLIF N_99_i.BLIF sm_amiga_ns_0_1__n
+11 1
+.names state_machine_un23_clk_000_d0_i_n.BLIF state_machine_un23_clk_000_d0_n
+0 1
+.names N_97.BLIF N_97_i
+0 1
+.names DTACK_SYNC_1_sqmuxa_1_0.BLIF DTACK_SYNC_1_sqmuxa_2.BLIF \
+DTACK_SYNC_1_sqmuxa
+11 1
+.names AS_030_i.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF DTACK_SYNC_1_sqmuxa_1
+11 1
+.names N_147.BLIF N_147_i
+0 1
+.names VPA_SYNC_1_sqmuxa_5.BLIF VPA_SYNC_1_sqmuxa_6.BLIF VPA_SYNC_1_sqmuxa
+11 1
+.names N_147_i.BLIF state_machine_un44_clk_000_d1_n.BLIF \
+state_machine_lds_000_int_7_0_n
+11 1
+.names AS_030_i.BLIF VPA_SYNC_1_sqmuxa_i.BLIF VPA_SYNC_1_sqmuxa_1
+11 1
+.names a_c_i_0__n.BLIF N_147_i.BLIF state_machine_uds_000_int_7_0_n
11 1
.names state_machine_un15_clk_000_d0_0_n.BLIF state_machine_un15_clk_000_d0_n
0 1
-.names N_126_i.BLIF N_128_i.BLIF clk_cpu_est_11_0_2_1__n
+.names BG_030_c_i.BLIF N_94_i.BLIF un1_bg_030_0_1
+11 1
+.names clk_cpu_est_11_0_3__n.BLIF clk_cpu_est_11_3__n
+0 1
+.names AS_030_c.BLIF nEXP_SPACE_i.BLIF un1_bg_030_0_2
+11 1
+.names inst_CLK_000_D0.BLIF CLK_000_c.BLIF state_machine_un2_clk_000_n
+11 1
+.names AS_030_i.BLIF nEXP_SPACE_c.BLIF state_machine_as_030_000_sync_3_2_1_n
11 1
.names state_machine_un13_clk_000_d0_1_0_n.BLIF \
state_machine_un13_clk_000_d0_2_0_n.BLIF state_machine_un13_clk_000_d0_n
11 1
-.names a_i_24__n.BLIF a_i_25__n.BLIF N_167_1
+.names N_126_i.BLIF N_124_i.BLIF clk_cpu_est_11_0_1_1__n
11 1
.names state_machine_un8_clk_000_d0_4_n.BLIF \
state_machine_un8_clk_000_d0_3_n.BLIF state_machine_un8_clk_000_d0_n
11 1
-.names a_i_26__n.BLIF a_i_27__n.BLIF N_167_2
+.names N_123_i.BLIF N_125_i.BLIF clk_cpu_est_11_0_2_1__n
11 1
-.names SM_AMIGA_0_.BLIF state_machine_un13_clk_000_d0_1_i_n.BLIF N_109
+.names SM_AMIGA_0_.BLIF state_machine_un13_clk_000_d0_1_i_n.BLIF N_108
11 1
-.names a_i_28__n.BLIF a_i_29__n.BLIF N_167_3
+.names a_i_24__n.BLIF a_i_25__n.BLIF N_167_1
11 1
.names inst_AS_000_INTreg.BLIF inst_CLK_000_D0.BLIF \
state_machine_un13_clk_000_d0_1_n
11 1
+.names a_i_26__n.BLIF a_i_27__n.BLIF N_167_2
+11 1
+.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_124
+11 1
+.names a_i_28__n.BLIF a_i_29__n.BLIF N_167_3
+11 1
+.names cpu_est_3_reg.BLIF state_machine_un13_clk_000_d0_2_n.BLIF N_126
+11 1
.names a_i_30__n.BLIF a_i_31__n.BLIF N_167_4
11 1
-.names cpu_est_3_reg.BLIF state_machine_un13_clk_000_d0_2_n.BLIF N_129
-11 1
-.names N_167_1.BLIF N_167_2.BLIF N_167_5
-11 1
.names cpu_est_1_.BLIF cpu_est_2_.BLIF state_machine_un13_clk_000_d0_2_n
11 1
+.names N_167_1.BLIF N_167_2.BLIF N_167_5
+11 1
+.names N_122.BLIF cpu_est_3_reg.BLIF N_129
+11 1
.names N_167_3.BLIF N_167_4.BLIF N_167_6
11 1
-.names N_130_1.BLIF state_machine_un13_clk_000_d0_2_i_n.BLIF N_130
-11 1
+.names N_122_i.BLIF N_122
+0 1
.names a_c_20__n.BLIF a_c_21__n.BLIF N_170_1
11 1
-.names N_131_1.BLIF cpu_est_i_2__n.BLIF N_131
+.names N_122_i.BLIF cpu_est_i_2__n.BLIF N_130
11 1
.names a_c_22__n.BLIF a_c_23__n.BLIF N_170_2
11 1
-.names N_124_i.BLIF N_124
+.names N_121_i.BLIF N_121
0 1
.names AS_030_000_SYNC_i.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_1
11 1
-.names N_125_i.BLIF N_125
-0 1
+.names N_131_1.BLIF cpu_est_i_2__n.BLIF N_131
+11 1
.names RW_c.BLIF SM_AMIGA_6_.BLIF UDS_000_INT_0_sqmuxa_1_2
11 1
-.names N_134_1.BLIF cpu_est_i_2__n.BLIF N_134
+.names N_127_1.BLIF state_machine_un13_clk_000_d0_2_i_n.BLIF N_127
11 1
.names UDS_000_INT_0_sqmuxa_1_1.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF \
UDS_000_INT_0_sqmuxa_1_3
11 1
-.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_134_1
-11 1
-.names inst_CLK_000_D0.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_0
-11 1
-.names N_106_1.BLIF state_machine_un60_clk_000_d0_n.BLIF N_106
-11 1
-.names RW_i.BLIF SM_AMIGA_4_.BLIF UDS_000_INT_0_sqmuxa_2
-11 1
-.names clk_cpu_est_11_0_3__n.BLIF clk_cpu_est_11_3__n
+.names clk_cpu_est_11_0_1__n.BLIF clk_cpu_est_11_1__n
0 1
-.names size_c_i_1__n.BLIF a_c_i_0__n.BLIF state_machine_un34_clk_000_d0_i_1_n
+.names SM_AMIGA_4_.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_0
11 1
-.names N_125.BLIF cpu_est_3_reg.BLIF N_132
+.names N_128_1.BLIF cpu_est_i_2__n.BLIF N_128
+11 1
+.names size_c_i_1__n.BLIF a_c_i_0__n.BLIF state_machine_un44_clk_000_d1_i_1_n
+11 1
+.names N_121.BLIF cpu_est_i_0__n.BLIF N_123
11 1
.names a_c_17__n.BLIF a_i_16__n.BLIF state_machine_un42_clk_030_1_n
11 1
-.names N_125_i.BLIF cpu_est_i_2__n.BLIF N_133
+.names N_121_i.BLIF cpu_est_0_.BLIF N_125
11 1
.names a_i_18__n.BLIF a_i_19__n.BLIF state_machine_un42_clk_030_2_n
11 1
-.names clk_cpu_est_11_0_1__n.BLIF clk_cpu_est_11_1__n
+.names N_91_0.BLIF N_91
0 1
.names fc_c_1__n.BLIF BGACK_000_c.BLIF state_machine_un42_clk_030_3_n
11 1
-.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_127
+.names CLK_000_D0_i.BLIF N_91.BLIF N_102
11 1
.names state_machine_un42_clk_030_1_n.BLIF state_machine_un42_clk_030_2_n.BLIF \
state_machine_un42_clk_030_4_n
11 1
-.names N_124.BLIF cpu_est_i_0__n.BLIF N_126
+.names sm_amiga_i_3__n.BLIF sm_amiga_i_4__n.BLIF N_103
11 1
.names state_machine_un42_clk_030_3_n.BLIF fc_c_0__n.BLIF \
state_machine_un42_clk_030_5_n
11 1
-.names N_124_i.BLIF cpu_est_0_.BLIF N_128
+.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_101
11 1
-.names DTACK_i.BLIF inst_VPA_D.BLIF DTACK_SYNC_1_sqmuxa_1_0
-11 1
-.names N_93_0.BLIF N_93
-0 1
-.names cpu_est_0_.BLIF cpu_est_i_3__n.BLIF N_130_1
-11 1
-.names N_90_i.BLIF N_90
-0 1
-.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_131_1
-11 1
-.names N_90.BLIF SM_AMIGA_1_.BLIF N_107
-11 1
-.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF \
-state_machine_un8_clk_000_d0_1_n
-11 1
-.names inst_CLK_000_D0.BLIF SM_AMIGA_2_.BLIF N_108
-11 1
-.names CLK_000_D0_i.BLIF VPA_D_i.BLIF state_machine_un8_clk_000_d0_2_n
-11 1
-.names CLK_000_D0_i.BLIF SM_AMIGA_2_.BLIF N_105
-11 1
-.names cpu_est_0_.BLIF cpu_est_2_.BLIF state_machine_un8_clk_000_d0_3_n
-11 1
-.names CLK_000_D0_i.BLIF N_93.BLIF N_103
-11 1
-.names state_machine_un8_clk_000_d0_1_n.BLIF \
-state_machine_un8_clk_000_d0_2_n.BLIF state_machine_un8_clk_000_d0_4_n
-11 1
-.names sm_amiga_i_3__n.BLIF sm_amiga_i_4__n.BLIF N_104
-11 1
-.names cpu_est_i_0__n.BLIF cpu_est_i_3__n.BLIF \
-state_machine_un13_clk_000_d0_1_0_n
-11 1
-.names inst_CLK_000_D0.BLIF SM_AMIGA_5_.BLIF N_100
-11 1
-.names state_machine_un13_clk_000_d0_1_n.BLIF \
-state_machine_un13_clk_000_d0_2_n.BLIF state_machine_un13_clk_000_d0_2_0_n
-11 1
-.names AS_030_i.BLIF N_101_i.BLIF AS_000_INT_1_sqmuxa
-11 1
-.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF VPA_SYNC_1_sqmuxa_1_1
+.names CLK_000_D0_i.BLIF inst_CLK_OUT_PRE.BLIF N_96_1
11 1
.names RW_c.BLIF RW_i
0 1
-.names N_134_1.BLIF VMA_INT_i.BLIF VPA_SYNC_1_sqmuxa_2
-11 1
-.names nEXP_SPACE_c.BLIF nEXP_SPACE_i
-0 1
-.names VPA_D_i.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_3
-11 1
-.names N_101.BLIF N_101_i
-0 1
-.names VPA_SYNC_1_sqmuxa_1_1.BLIF VPA_SYNC_1_sqmuxa_2.BLIF VPA_SYNC_1_sqmuxa_4
+.names AMIGA_BUS_ENABLE_i.BLIF AS_030_i.BLIF AMIGA_BUS_ENABLE_i_m_1
11 1
.names inst_AS_000_INTreg.BLIF AS_000_INT_i
0 1
-.names CLK_000_D0_i.BLIF SM_AMIGA_3_.BLIF N_106_1
+.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_131_1
11 1
.names dsack_c_1__n.BLIF dsack_i_1__n
0 1
-.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_3__un3_n
+.names N_131_i.BLIF N_129_i.BLIF clk_cpu_est_11_0_1_3__n
+11 1
+.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n
0 1
-.names AS_030_c.BLIF AS_030_i
+.names CLK_000_D0_i.BLIF SM_AMIGA_3_.BLIF N_105_1
+11 1
+.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n
0 1
-.names clk_cpu_est_11_3__n.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_3__un1_n
+.names SM_AMIGA_3_.BLIF VMA_INT_i.BLIF VPA_SYNC_1_sqmuxa_1_0
11 1
.names inst_CLK_000_D0.BLIF CLK_000_D0_i
0 1
-.names cpu_est_3_reg.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n
+.names VPA_D_i.BLIF cpu_est_2_.BLIF VPA_SYNC_1_sqmuxa_2
11 1
.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n
0 1
-.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_1__un3_n
-0 1
-.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n
-0 1
-.names clk_cpu_est_11_1__n.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_1__un1_n
-11 1
-.names inst_CLK_000_D1.BLIF CLK_000_D1_i
-0 1
-.names cpu_est_1_.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n
+.names cpu_est_3_reg.BLIF cpu_est_i_0__n.BLIF VPA_SYNC_1_sqmuxa_3
11 1
.names cpu_est_0_.BLIF cpu_est_i_0__n
0 1
-.names AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un3_n
-0 1
-.names cpu_est_3_reg.BLIF cpu_est_i_3__n
-0 1
-.names inst_AS_000_INTreg.BLIF AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un1_n
+.names cpu_est_i_1__n.BLIF state_machine_un2_clk_000_n.BLIF \
+VPA_SYNC_1_sqmuxa_4
11 1
.names cpu_est_2_.BLIF cpu_est_i_2__n
0 1
-.names N_101_i.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n
-11 1
-.names inst_VPA_D.BLIF VPA_D_i
-0 1
-.names state_machine_un1_clk_030_n.BLIF bg_000_0_un3_n
-0 1
-.names inst_VMA_INTreg.BLIF VMA_INT_i
-0 1
-.names un1_bg_030.BLIF state_machine_un1_clk_030_n.BLIF bg_000_0_un1_n
-11 1
-.names cpu_est_1_.BLIF cpu_est_i_1__n
-0 1
-.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n
+.names VPA_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_2.BLIF VPA_SYNC_1_sqmuxa_5
11 1
.names state_machine_un13_clk_000_d0_2_n.BLIF \
state_machine_un13_clk_000_d0_2_i_n
0 1
-.names state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un3_n
+.names VPA_SYNC_1_sqmuxa_3.BLIF VPA_SYNC_1_sqmuxa_4.BLIF VPA_SYNC_1_sqmuxa_6
+11 1
+.names cpu_est_3_reg.BLIF cpu_est_i_3__n
0 1
-.names state_machine_un13_clk_000_d0_1_n.BLIF \
-state_machine_un13_clk_000_d0_1_i_n
+.names DTACK_i.BLIF SM_AMIGA_3_.BLIF DTACK_SYNC_1_sqmuxa_1_0
+11 1
+.names inst_VPA_D.BLIF VPA_D_i
0 1
-.names state_machine_as_030_000_sync_3_n.BLIF \
-state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un1_n
+.names inst_VPA_D.BLIF state_machine_un2_clk_000_n.BLIF DTACK_SYNC_1_sqmuxa_2
+11 1
+.names cpu_est_1_.BLIF cpu_est_i_1__n
+0 1
+.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF \
+state_machine_un8_clk_000_d0_1_n
11 1
.names DTACK_c.BLIF DTACK_i
0 1
-.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \
-as_030_000_sync_0_un0_n
+.names CLK_000_D0_i.BLIF VPA_D_i.BLIF state_machine_un8_clk_000_d0_2_n
+11 1
+.names inst_VMA_INTreg.BLIF VMA_INT_i
+0 1
+.names cpu_est_0_.BLIF cpu_est_2_.BLIF state_machine_un8_clk_000_d0_3_n
+11 1
+.names state_machine_un13_clk_000_d0_1_n.BLIF \
+state_machine_un13_clk_000_d0_1_i_n
+0 1
+.names state_machine_un8_clk_000_d0_1_n.BLIF \
+state_machine_un8_clk_000_d0_2_n.BLIF state_machine_un8_clk_000_d0_4_n
+11 1
+.names AS_030_c.BLIF AS_030_i
+0 1
+.names cpu_est_i_0__n.BLIF cpu_est_i_3__n.BLIF \
+state_machine_un13_clk_000_d0_1_0_n
11 1
.names DTACK_SYNC_1_sqmuxa.BLIF DTACK_SYNC_1_sqmuxa_i
0 1
-.names state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un3_n
-0 1
-.names a_c_18__n.BLIF a_i_18__n
-0 1
-.names un1_as_030_3.BLIF state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un1_n
+.names state_machine_un13_clk_000_d0_1_n.BLIF \
+state_machine_un13_clk_000_d0_2_n.BLIF state_machine_un13_clk_000_d0_2_0_n
11 1
-.names a_c_16__n.BLIF a_i_16__n
-0 1
-.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n
-11 1
-.names a_c_19__n.BLIF a_i_19__n
-0 1
-.names DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un3_n
-0 1
-.names CLK_030_c.BLIF CLK_030_i
-0 1
-.names inst_DTACK_SYNC.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un1_n
-11 1
-.names state_machine_un42_clk_030_n.BLIF state_machine_un42_clk_030_i_n
-0 1
-.names DTACK_SYNC_1_sqmuxa_i.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n
-11 1
-.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n
-0 1
-.names state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un3_n
-0 1
-.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n
-0 1
-.names N_124.BLIF state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un1_n
-11 1
-.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i
-0 1
-.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n
-11 1
-.names DS_030_c.BLIF DS_030_i
-0 1
-.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_2__un3_n
-0 1
-.names UDS_000_INT_0_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_1_i
-0 1
-.names N_121_i.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_2__un1_n
-11 1
-.names UDS_000_INT_0_sqmuxa.BLIF UDS_000_INT_0_sqmuxa_i
-0 1
-.names cpu_est_2_.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n
-11 1
-.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n
-0 1
-.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_0__un3_n
-0 1
.names VPA_SYNC_1_sqmuxa.BLIF VPA_SYNC_1_sqmuxa_i
0 1
-.names ipl_c_0__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_0__un1_n
+.names cpu_est_0_.BLIF cpu_est_i_3__n.BLIF N_127_1
11 1
-.names N_97.BLIF N_97_i
+.names inst_CLK_000_D1.BLIF CLK_000_D1_i
0 1
-.names IPL_030DFFSH_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n
+.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_128_1
11 1
-.names a_c_30__n.BLIF a_i_30__n
-0 1
-.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_1__un3_n
-0 1
-.names a_c_31__n.BLIF a_i_31__n
-0 1
-.names ipl_c_1__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_1__un1_n
-11 1
-.names a_c_28__n.BLIF a_i_28__n
-0 1
-.names IPL_030DFFSH_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n
-11 1
-.names a_c_29__n.BLIF a_i_29__n
+.names N_95.BLIF N_95_i
0 1
.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_2__un3_n
0 1
-.names a_c_26__n.BLIF a_i_26__n
+.names N_96.BLIF N_96_i
0 1
.names ipl_c_2__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_2__un1_n
11 1
-.names a_c_27__n.BLIF a_i_27__n
+.names a_c_18__n.BLIF a_i_18__n
0 1
.names IPL_030DFFSH_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n
11 1
-.names a_c_24__n.BLIF a_i_24__n
+.names a_c_16__n.BLIF a_i_16__n
+0 1
+.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_1__un3_n
+0 1
+.names a_c_19__n.BLIF a_i_19__n
+0 1
+.names ipl_c_1__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_1__un1_n
+11 1
+.names CLK_030_c.BLIF CLK_030_i
+0 1
+.names IPL_030DFFSH_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n
+11 1
+.names inst_CLK_000_D2.BLIF CLK_000_D2_i
+0 1
+.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_0__un3_n
+0 1
+.names state_machine_un42_clk_030_n.BLIF state_machine_un42_clk_030_i_n
+0 1
+.names ipl_c_0__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_0__un1_n
+11 1
+.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n
+0 1
+.names IPL_030DFFSH_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n
+11 1
+.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n
+0 1
+.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_2__un3_n
+0 1
+.names AMIGA_BUS_ENABLEDFFreg.BLIF AMIGA_BUS_ENABLE_i
+0 1
+.names N_118_i.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_2__un1_n
+11 1
+.names nEXP_SPACE_c.BLIF nEXP_SPACE_i
+0 1
+.names cpu_est_2_.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n
+11 1
+.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n
+0 1
+.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_1__un3_n
+0 1
+.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n
+0 1
+.names clk_cpu_est_11_1__n.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_1__un1_n
+11 1
+.names DS_030_c.BLIF DS_030_i
+0 1
+.names cpu_est_1_.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n
+11 1
+.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i
+0 1
+.names VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un3_n
+0 1
+.names UDS_000_INT_0_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_1_i
+0 1
+.names inst_VPA_SYNC.BLIF VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un1_n
+11 1
+.names UDS_000_INT_0_sqmuxa.BLIF UDS_000_INT_0_sqmuxa_i
+0 1
+.names VPA_SYNC_1_sqmuxa_i.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n
+11 1
+.names clk_clk_cnt_n.BLIF clk_clk_cnt_i_n
+0 1
+.names state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un3_n
+0 1
+.names CLK_CNT_0_.BLIF clk_cnt_i_0__n
+0 1
+.names N_121.BLIF state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un1_n
+11 1
+.names a_c_30__n.BLIF a_i_30__n
+0 1
+.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n
+11 1
+.names a_c_31__n.BLIF a_i_31__n
+0 1
+.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_3__un3_n
+0 1
+.names a_c_28__n.BLIF a_i_28__n
+0 1
+.names clk_cpu_est_11_3__n.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_3__un1_n
+11 1
+.names a_c_29__n.BLIF a_i_29__n
+0 1
+.names cpu_est_3_reg.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n
+11 1
+.names a_c_26__n.BLIF a_i_26__n
0 1
.names state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n
0 1
-.names a_c_25__n.BLIF a_i_25__n
+.names a_c_27__n.BLIF a_i_27__n
0 1
.names BGACK_000_c.BLIF state_machine_un6_bgack_000_n.BLIF \
bgack_030_int_0_un1_n
11 1
+.names a_c_24__n.BLIF a_i_24__n
+0 1
.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \
bgack_030_int_0_un0_n
11 1
+.names a_c_25__n.BLIF a_i_25__n
+0 1
+.names state_machine_un1_clk_030_n.BLIF bg_000_0_un3_n
+0 1
+.names G_86.BLIF N_132_i
+0 1
+.names un1_bg_030.BLIF state_machine_un1_clk_030_n.BLIF bg_000_0_un1_n
+11 1
+.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n
+11 1
.names RST_c.BLIF RST_i
0 1
-.names un1_as_030_4.BLIF uds_000_int_0_un3_n
+.names RST_c.BLIF amiga_bus_enable_0_un3_n
0 1
-.names inst_UDS_000_INTreg.BLIF un1_as_030_4.BLIF uds_000_int_0_un1_n
-11 1
.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i
0 1
-.names state_machine_uds_000_int_8_n.BLIF uds_000_int_0_un3_n.BLIF \
-uds_000_int_0_un0_n
+.names state_machine_amiga_bus_enable_2_iv_i_n.BLIF RST_c.BLIF \
+amiga_bus_enable_0_un1_n
11 1
.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i
0 1
-.names un1_as_030_4.BLIF lds_000_int_0_un3_n
+.names AMIGA_BUS_ENABLEDFFreg.BLIF amiga_bus_enable_0_un3_n.BLIF \
+amiga_bus_enable_0_un0_n
+11 1
+.names state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un3_n
0 1
-.names inst_LDS_000_INTreg.BLIF un1_as_030_4.BLIF lds_000_int_0_un1_n
+.names state_machine_as_030_000_sync_3_n.BLIF \
+state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un1_n
11 1
-.names state_machine_lds_000_int_8_n.BLIF lds_000_int_0_un3_n.BLIF \
-lds_000_int_0_un0_n
+.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \
+as_030_000_sync_0_un0_n
11 1
-.names VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un3_n
+.names state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un3_n
0 1
-.names inst_VPA_SYNC.BLIF VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un1_n
+.names un1_as_030_3.BLIF state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un1_n
11 1
-.names VPA_SYNC_1_sqmuxa_i.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n
+.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n
+11 1
+.names AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un3_n
+0 1
+.names inst_AS_000_INTreg.BLIF AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un1_n
+11 1
+.names N_95_i.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n
11 1
.names DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un3_n
0 1
.names DSACK_INT_1_.BLIF DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un1_n
11 1
-.names N_97_i.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un0_n
+.names N_96_i.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un0_n
11 1
+.names DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un3_n
+0 1
+.names inst_DTACK_SYNC.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un1_n
+11 1
+.names DTACK_SYNC_1_sqmuxa_i.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n
+11 1
+.names un1_as_030_4.BLIF uds_000_int_0_un3_n
+0 1
+.names inst_UDS_000_INTreg.BLIF un1_as_030_4.BLIF uds_000_int_0_un1_n
+11 1
+.names state_machine_uds_000_int_7_n.BLIF uds_000_int_0_un3_n.BLIF \
+uds_000_int_0_un0_n
+11 1
+.names un1_as_030_4.BLIF lds_000_int_0_un3_n
+0 1
+.names inst_LDS_000_INTreg.BLIF un1_as_030_4.BLIF lds_000_int_0_un1_n
+11 1
+.names state_machine_lds_000_int_7_n.BLIF lds_000_int_0_un3_n.BLIF \
+lds_000_int_0_un0_n
+11 1
+.names inst_CLK_OUT_PRE.BLIF clk_clk_cnt_n.BLIF CLK_OUT_PRE_0
+01 1
+10 1
+11 0
+00 0
.names cpu_est_0_.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_0_
01 1
10 1
11 0
00 0
-.names inst_CLK_OUT_PRE.BLIF CLK_CNT_0_.BLIF CLK_OUT_PRE_0
+.names CLK_REF_1_.BLIF CLK_CNT_1_.BLIF G_86
+01 1
+10 1
+11 0
+00 0
+.names CLK_CNT_0_.BLIF CLK_CNT_1_.BLIF G_90
01 1
10 1
11 0
@@ -954,7 +1041,7 @@ lds_000_int_0_un0_n
.names RESETDFFreg.BLIF RESET
1 1
0 0
-.names nEXP_SPACE_i.BLIF AMIGA_BUS_ENABLE
+.names AMIGA_BUS_ENABLEDFFreg.BLIF AMIGA_BUS_ENABLE
1 1
0 0
.names RW_i.BLIF AMIGA_BUS_DATA_DIR
@@ -972,6 +1059,18 @@ lds_000_int_0_un0_n
.names IPL_030DFFSH_0_reg.BLIF IPL_030_0_
1 1
0 0
+.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C
+1 1
+0 0
+.names RST_i.BLIF SM_AMIGA_5_.AR
+1 1
+0 0
+.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C
+1 1
+0 0
+.names RST_i.BLIF SM_AMIGA_4_.AR
+1 1
+0 0
.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C
1 1
0 0
@@ -996,6 +1095,12 @@ lds_000_int_0_un0_n
.names RST_i.BLIF SM_AMIGA_0_.AR
1 1
0 0
+.names CLK_OSZI_c.BLIF cpu_est_2_.C
+1 1
+0 0
+.names CLK_OSZI_c.BLIF cpu_est_3_reg.C
+1 1
+0 0
.names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C
1 1
0 0
@@ -1026,28 +1131,10 @@ lds_000_int_0_un0_n
.names RST_i.BLIF SM_AMIGA_6_.AR
1 1
0 0
-.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C
+.names CLK_OUT_PRE_0.BLIF inst_CLK_OUT_PRE.D
1 1
0 0
-.names RST_i.BLIF SM_AMIGA_5_.AR
-1 1
-0 0
-.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C
-1 1
-0 0
-.names RST_i.BLIF SM_AMIGA_4_.AR
-1 1
-0 0
-.names CLK_OSZI_c.BLIF DSACK_INT_1_.C
-1 1
-0 0
-.names RST_i.BLIF DSACK_INT_1_.AP
-1 1
-0 0
-.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C
-1 1
-0 0
-.names RST_i.BLIF inst_VMA_INTreg.AP
+.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C
1 1
0 0
.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C
@@ -1056,10 +1143,10 @@ lds_000_int_0_un0_n
.names RST_i.BLIF inst_BGACK_030_INTreg.AP
1 1
0 0
-.names CLK_OUT_PRE_0.BLIF inst_CLK_OUT_PRE.D
+.names CLK_OSZI_c.BLIF CLK_CNT_0_.C
1 1
0 0
-.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C
+.names CLK_OSZI_c.BLIF CLK_CNT_1_.C
1 1
0 0
.names cpu_est_0_0_.BLIF cpu_est_0_.D
@@ -1071,22 +1158,10 @@ lds_000_int_0_un0_n
.names CLK_OSZI_c.BLIF cpu_est_1_.C
1 1
0 0
-.names CLK_OSZI_c.BLIF cpu_est_2_.C
+.names CLK_OSZI_c.BLIF inst_VPA_SYNC.C
1 1
0 0
-.names CLK_OSZI_c.BLIF cpu_est_3_reg.C
-1 1
-0 0
-.names CLK_OSZI_c.BLIF inst_LDS_000_INTreg.C
-1 1
-0 0
-.names RST_i.BLIF inst_LDS_000_INTreg.AP
-1 1
-0 0
-.names CLK_OSZI_c.BLIF inst_DTACK_SYNC.C
-1 1
-0 0
-.names RST_i.BLIF inst_DTACK_SYNC.AP
+.names RST_i.BLIF inst_VPA_SYNC.AP
1 1
0 0
.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C
@@ -1107,10 +1182,7 @@ lds_000_int_0_un0_n
.names RST_i.BLIF inst_AS_000_INTreg.AP
1 1
0 0
-.names CLK_OSZI_c.BLIF inst_VPA_SYNC.C
-1 1
-0 0
-.names RST_i.BLIF inst_VPA_SYNC.AP
+.names CLK_OSZI_c.BLIF AMIGA_BUS_ENABLEDFFreg.C
1 1
0 0
.names CLK_OSZI_c.BLIF BG_000DFFSHreg.C
@@ -1119,10 +1191,16 @@ lds_000_int_0_un0_n
.names RST_i.BLIF BG_000DFFSHreg.AP
1 1
0 0
-.names CLK_OSZI_c.BLIF inst_DTACK_DMA.C
+.names CLK_OSZI_c.BLIF DSACK_INT_1_.C
1 1
0 0
-.names RST_i.BLIF inst_DTACK_DMA.AP
+.names RST_i.BLIF DSACK_INT_1_.AP
+1 1
+0 0
+.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C
+1 1
+0 0
+.names RST_i.BLIF inst_VMA_INTreg.AP
1 1
0 0
.names CLK_OSZI_c.BLIF inst_UDS_000_INTreg.C
@@ -1131,7 +1209,34 @@ lds_000_int_0_un0_n
.names RST_i.BLIF inst_UDS_000_INTreg.AP
1 1
0 0
-.names CLK_OSZI_c.BLIF CLK_CNT_0_.C
+.names CLK_OSZI_c.BLIF inst_LDS_000_INTreg.C
+1 1
+0 0
+.names RST_i.BLIF inst_LDS_000_INTreg.AP
+1 1
+0 0
+.names CLK_OSZI_c.BLIF inst_DTACK_SYNC.C
+1 1
+0 0
+.names RST_i.BLIF inst_DTACK_SYNC.AP
+1 1
+0 0
+.names CLK_OSZI_c.BLIF inst_DTACK_DMA.C
+1 1
+0 0
+.names RST_i.BLIF inst_DTACK_DMA.AP
+1 1
+0 0
+.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D
+1 1
+0 0
+.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C
+1 1
+0 0
+.names inst_CLK_000_D1.BLIF inst_CLK_000_D2.D
+1 1
+0 0
+.names CLK_OSZI_c.BLIF inst_CLK_000_D2.C
1 1
0 0
.names VPA.BLIF inst_VPA_D.D
@@ -1140,7 +1245,7 @@ lds_000_int_0_un0_n
.names CLK_OSZI_c.BLIF inst_VPA_D.C
1 1
0 0
-.names CLK_000.BLIF inst_CLK_000_D0.D
+.names CLK_000_c.BLIF inst_CLK_000_D0.D
1 1
0 0
.names CLK_OSZI_c.BLIF inst_CLK_000_D0.C
@@ -1158,10 +1263,13 @@ lds_000_int_0_un0_n
.names CLK_OSZI_c.BLIF inst_CLK_000_D1.C
1 1
0 0
-.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D
+.names gnd_n_n.BLIF CLK_REF_1_.D
1 1
0 0
-.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C
+.names gnd_n_n.BLIF CLK_REF_1_.LH
+1 1
+0 0
+.names RST_i.BLIF CLK_REF_1_.AR
1 1
0 0
.names DSACK_INT_1_.BLIF DSACK_1_
@@ -1173,6 +1281,18 @@ lds_000_int_0_un0_n
.names vcc_n_n.BLIF DSACK_0_
1 1
0 0
+.names BGACK_000.BLIF BGACK_000_c
+1 1
+0 0
+.names CLK_030.BLIF CLK_030_c
+1 1
+0 0
+.names CLK_000.BLIF CLK_000_c
+1 1
+0 0
+.names CLK_OSZI.BLIF CLK_OSZI_c
+1 1
+0 0
.names IPL_0_.BLIF ipl_c_0__n
1 1
0 0
@@ -1209,16 +1329,16 @@ lds_000_int_0_un0_n
.names SIZE_0_.BLIF size_c_0__n
1 1
0 0
-.names A_15_.BLIF a_15__n
-1 1
-0 0
.names SIZE_1_.BLIF size_c_1__n
1 1
0 0
-.names A_14_.BLIF a_14__n
+.names A_0_.BLIF a_c_0__n
1 1
0 0
-.names A_0_.BLIF a_c_0__n
+.names A_15_.BLIF a_15__n
+1 1
+0 0
+.names A_14_.BLIF a_14__n
1 1
0 0
.names A_13_.BLIF a_13__n
@@ -1227,72 +1347,72 @@ lds_000_int_0_un0_n
.names A_12_.BLIF a_12__n
1 1
0 0
-.names A_11_.BLIF a_11__n
-1 1
-0 0
-.names A_10_.BLIF a_10__n
-1 1
-0 0
-.names A_9_.BLIF a_9__n
-1 1
-0 0
-.names A_8_.BLIF a_8__n
-1 1
-0 0
-.names A_7_.BLIF a_7__n
-1 1
-0 0
-.names A_6_.BLIF a_6__n
-1 1
-0 0
.names A_16_.BLIF a_c_16__n
1 1
0 0
-.names A_5_.BLIF a_5__n
+.names A_11_.BLIF a_11__n
1 1
0 0
.names A_17_.BLIF a_c_17__n
1 1
0 0
-.names A_4_.BLIF a_4__n
+.names A_10_.BLIF a_10__n
1 1
0 0
.names A_18_.BLIF a_c_18__n
1 1
0 0
-.names A_3_.BLIF a_3__n
+.names A_9_.BLIF a_9__n
1 1
0 0
.names A_19_.BLIF a_c_19__n
1 1
0 0
-.names A_2_.BLIF a_2__n
+.names A_8_.BLIF a_8__n
1 1
0 0
.names A_20_.BLIF a_c_20__n
1 1
0 0
-.names A_1_.BLIF a_1__n
+.names A_7_.BLIF a_7__n
1 1
0 0
.names A_21_.BLIF a_c_21__n
1 1
0 0
+.names A_6_.BLIF a_6__n
+1 1
+0 0
.names A_22_.BLIF a_c_22__n
1 1
0 0
+.names A_5_.BLIF a_5__n
+1 1
+0 0
.names A_23_.BLIF a_c_23__n
1 1
0 0
+.names A_4_.BLIF a_4__n
+1 1
+0 0
.names A_24_.BLIF a_c_24__n
1 1
0 0
+.names A_3_.BLIF a_3__n
+1 1
+0 0
.names A_25_.BLIF a_c_25__n
1 1
0 0
+.names A_2_.BLIF a_2__n
+1 1
+0 0
.names A_26_.BLIF a_c_26__n
1 1
0 0
+.names A_1_.BLIF a_1__n
+1 1
+0 0
.names A_27_.BLIF a_c_27__n
1 1
0 0
@@ -1314,15 +1434,6 @@ lds_000_int_0_un0_n
.names BG_030.BLIF BG_030_c
1 1
0 0
-.names BGACK_000.BLIF BGACK_000_c
-1 1
-0 0
-.names CLK_030.BLIF CLK_030_c
-1 1
-0 0
-.names CLK_OSZI.BLIF CLK_OSZI_c
-1 1
-0 0
.names nEXP_SPACE_c.BLIF DSACK_1_.OE
1 1
0 0
diff --git a/Logic/68030_tk.bl3 b/Logic/68030_tk.bl3
index 9005ab2..6f3435c 100644
--- a/Logic/68030_tk.bl3
+++ b/Logic/68030_tk.bl3
@@ -1,19 +1,20 @@
#$ TOOL ispLEVER Classic 1.7.00.05.28.13
-#$ DATE Fri May 16 17:07:08 2014
+#$ DATE Sun May 18 21:01:47 2014
#$ MODULE 68030_tk
-#$ PINS 59 A_17_ A_16_ SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 \
-# DS_030 UDS_000 LDS_000 A_0_ nEXP_SPACE IPL_030_1_ BERR IPL_030_0_ BG_030 IPL_1_ BG_000 \
-# IPL_0_ BGACK_030 DSACK_0_ BGACK_000 FC_0_ CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP \
-# FPU_CS DTACK AVEC AVEC_EXP E VPA VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \
-# AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ \
-# A_21_ A_20_ A_19_ A_18_
-#$ NODES 34 inst_BGACK_030_INTreg inst_FPU_CS_INTreg cpu_est_3_reg \
-# inst_VMA_INTreg cpu_est_0_ cpu_est_1_ inst_AS_000_INTreg inst_AS_030_000_SYNC \
-# inst_DTACK_SYNC inst_VPA_D inst_VPA_SYNC inst_CLK_000_D0 inst_CLK_000_D1 \
-# inst_CLK_OUT_PRE RESETDFFreg cpu_est_2_ CLK_CNT_0_ SM_AMIGA_6_ SM_AMIGA_7_ \
-# inst_UDS_000_INTreg inst_LDS_000_INTreg DSACK_INT_1_ SM_AMIGA_1_ inst_DTACK_DMA \
-# SM_AMIGA_4_ SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_ BG_000DFFSHreg \
-# CLK_OUT_INTreg IPL_030DFFSH_0_reg IPL_030DFFSH_1_reg IPL_030DFFSH_2_reg
+#$ PINS 59 SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 DS_030 UDS_000 \
+# SIZE_0_ LDS_000 A_30_ nEXP_SPACE A_29_ BERR A_28_ BG_030 A_27_ BG_000 A_26_ BGACK_030 \
+# A_25_ BGACK_000 A_24_ CLK_030 A_23_ CLK_000 A_22_ CLK_OSZI A_21_ CLK_DIV_OUT A_20_ \
+# CLK_EXP A_19_ FPU_CS A_18_ DTACK A_17_ AVEC A_16_ AVEC_EXP E VPA VMA RST RESET RW \
+# AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN A_0_ IPL_030_1_ \
+# IPL_030_0_ IPL_1_ IPL_0_ DSACK_0_ FC_0_
+#$ NODES 38 inst_BGACK_030_INTreg inst_FPU_CS_INTreg cpu_est_3_reg CLK_OUT_INTreg \
+# inst_VMA_INTreg cpu_est_0_ cpu_est_1_ IPL_030DFFSH_0_reg inst_AS_000_INTreg \
+# inst_AS_030_000_SYNC IPL_030DFFSH_1_reg inst_DTACK_SYNC inst_VPA_D \
+# IPL_030DFFSH_2_reg inst_VPA_SYNC inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 \
+# inst_CLK_OUT_PRE SM_AMIGA_6_ cpu_est_2_ CLK_REF_1_ SM_AMIGA_7_ inst_UDS_000_INTreg \
+# inst_LDS_000_INTreg DSACK_INT_1_ SM_AMIGA_4_ SM_AMIGA_1_ inst_DTACK_DMA CLK_CNT_0_ \
+# CLK_CNT_1_ RESETDFFreg SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_ \
+# AMIGA_BUS_ENABLEDFFreg BG_000DFFSHreg
.model bus68030
.inputs SIZE_1_.BLIF A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF AS_030.BLIF DS_030.BLIF \
nEXP_SPACE.BLIF BG_030.BLIF BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF \
@@ -21,45 +22,66 @@ CLK_OSZI.BLIF VPA.BLIF RST.BLIF RW.BLIF SIZE_0_.BLIF A_30_.BLIF A_29_.BLIF \
A_28_.BLIF A_27_.BLIF A_26_.BLIF A_25_.BLIF A_24_.BLIF A_23_.BLIF A_22_.BLIF \
A_21_.BLIF A_20_.BLIF A_19_.BLIF A_18_.BLIF A_17_.BLIF A_16_.BLIF A_0_.BLIF \
IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF inst_BGACK_030_INTreg.BLIF \
-inst_FPU_CS_INTreg.BLIF cpu_est_3_reg.BLIF inst_VMA_INTreg.BLIF \
-cpu_est_0_.BLIF cpu_est_1_.BLIF inst_AS_000_INTreg.BLIF \
-inst_AS_030_000_SYNC.BLIF inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF \
+inst_FPU_CS_INTreg.BLIF cpu_est_3_reg.BLIF CLK_OUT_INTreg.BLIF \
+inst_VMA_INTreg.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF IPL_030DFFSH_0_reg.BLIF \
+inst_AS_000_INTreg.BLIF inst_AS_030_000_SYNC.BLIF IPL_030DFFSH_1_reg.BLIF \
+inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF IPL_030DFFSH_2_reg.BLIF \
inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \
-inst_CLK_OUT_PRE.BLIF RESETDFFreg.BLIF cpu_est_2_.BLIF CLK_CNT_0_.BLIF \
-SM_AMIGA_6_.BLIF SM_AMIGA_7_.BLIF inst_UDS_000_INTreg.BLIF \
-inst_LDS_000_INTreg.BLIF DSACK_INT_1_.BLIF SM_AMIGA_1_.BLIF \
-inst_DTACK_DMA.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_5_.BLIF \
-SM_AMIGA_2_.BLIF SM_AMIGA_0_.BLIF BG_000DFFSHreg.BLIF CLK_OUT_INTreg.BLIF \
-IPL_030DFFSH_0_reg.BLIF IPL_030DFFSH_1_reg.BLIF IPL_030DFFSH_2_reg.BLIF \
-DSACK_1_.PIN.BLIF DTACK.PIN.BLIF
+inst_CLK_000_D2.BLIF inst_CLK_OUT_PRE.BLIF SM_AMIGA_6_.BLIF cpu_est_2_.BLIF \
+CLK_REF_1_.BLIF SM_AMIGA_7_.BLIF inst_UDS_000_INTreg.BLIF \
+inst_LDS_000_INTreg.BLIF DSACK_INT_1_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_1_.BLIF \
+inst_DTACK_DMA.BLIF CLK_CNT_0_.BLIF CLK_CNT_1_.BLIF RESETDFFreg.BLIF \
+SM_AMIGA_3_.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_0_.BLIF \
+AMIGA_BUS_ENABLEDFFreg.BLIF BG_000DFFSHreg.BLIF DSACK_1_.PIN.BLIF \
+DTACK.PIN.BLIF
.outputs IPL_030_2_ AS_000 UDS_000 LDS_000 BERR BG_000 BGACK_030 CLK_DIV_OUT \
CLK_EXP FPU_CS AVEC AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \
-AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_3_.D SM_AMIGA_3_.C \
-SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D \
-SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR \
-IPL_030DFFSH_0_reg.D IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP \
-IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP \
-IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D \
-SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR \
-SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C \
-SM_AMIGA_4_.AR DSACK_INT_1_.D DSACK_INT_1_.C DSACK_INT_1_.AP inst_VMA_INTreg.C \
-inst_VMA_INTreg.AP inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C \
-inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C cpu_est_0_.D \
-cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C cpu_est_2_.D cpu_est_2_.C \
-cpu_est_3_reg.C inst_LDS_000_INTreg.D inst_LDS_000_INTreg.C \
-inst_LDS_000_INTreg.AP inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP \
+AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_5_.D SM_AMIGA_5_.C \
+SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D \
+SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR \
+SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C \
+SM_AMIGA_0_.AR cpu_est_2_.D cpu_est_2_.C cpu_est_3_reg.C IPL_030DFFSH_0_reg.D \
+IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP IPL_030DFFSH_1_reg.D \
+IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D \
+IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D SM_AMIGA_7_.C \
+SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR inst_CLK_OUT_PRE.C \
+inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP \
+CLK_CNT_0_.D CLK_CNT_0_.C CLK_CNT_1_.D CLK_CNT_1_.C cpu_est_0_.D cpu_est_0_.C \
+cpu_est_1_.D cpu_est_1_.C inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP \
inst_FPU_CS_INTreg.D inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP \
inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP \
inst_AS_000_INTreg.D inst_AS_000_INTreg.C inst_AS_000_INTreg.AP \
-inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP BG_000DFFSHreg.D \
-BG_000DFFSHreg.C BG_000DFFSHreg.AP inst_DTACK_DMA.D inst_DTACK_DMA.C \
-inst_DTACK_DMA.AP inst_UDS_000_INTreg.D inst_UDS_000_INTreg.C \
-inst_UDS_000_INTreg.AP CLK_CNT_0_.D CLK_CNT_0_.C inst_VPA_D.D inst_VPA_D.C \
-inst_CLK_000_D0.D inst_CLK_000_D0.C RESETDFFreg.D RESETDFFreg.C \
-inst_CLK_000_D1.D inst_CLK_000_D1.C CLK_OUT_INTreg.D CLK_OUT_INTreg.C DSACK_1_ \
-DTACK DSACK_0_ DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE LDS_000.OE BERR.OE \
+AMIGA_BUS_ENABLEDFFreg.D AMIGA_BUS_ENABLEDFFreg.C BG_000DFFSHreg.D \
+BG_000DFFSHreg.C BG_000DFFSHreg.AP DSACK_INT_1_.D DSACK_INT_1_.C \
+DSACK_INT_1_.AP inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_UDS_000_INTreg.D \
+inst_UDS_000_INTreg.C inst_UDS_000_INTreg.AP inst_LDS_000_INTreg.D \
+inst_LDS_000_INTreg.C inst_LDS_000_INTreg.AP inst_DTACK_SYNC.D \
+inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_DTACK_DMA.D inst_DTACK_DMA.C \
+inst_DTACK_DMA.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_000_D2.D \
+inst_CLK_000_D2.C inst_VPA_D.D inst_VPA_D.C inst_CLK_000_D0.D \
+inst_CLK_000_D0.C RESETDFFreg.D RESETDFFreg.C inst_CLK_000_D1.D \
+inst_CLK_000_D1.C CLK_REF_1_.D CLK_REF_1_.LH CLK_REF_1_.AR DSACK_1_ DTACK \
+DSACK_0_ DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE LDS_000.OE BERR.OE \
DSACK_0_.OE AVEC_EXP.OE CIIN.OE cpu_est_3_reg.D.X1 cpu_est_3_reg.D.X2 \
-inst_VMA_INTreg.D.X1 inst_VMA_INTreg.D.X2
+inst_VMA_INTreg.D.X1 inst_VMA_INTreg.D.X2 inst_CLK_OUT_PRE.D.X1 \
+inst_CLK_OUT_PRE.D.X2
+.names inst_AS_030_000_SYNC.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \
+inst_CLK_000_D2.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_5_.D
+0-101- 1
+-1---1 1
+-0--0- 0
+-0-1-- 0
+-00--- 0
+10---- 0
+----00 0
+---1-0 0
+--0--0 0
+1----0 0
+.names inst_CLK_000_D0.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_4_.D
+01- 1
+0-1 1
+-00 0
+1-- 0
.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF \
SM_AMIGA_4_.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_3_.D
--11- 1
@@ -77,50 +99,59 @@ SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_2_.D
11--0 0
--1-- 0
---00 0
-.names inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF inst_CLK_OUT_PRE.BLIF \
-SM_AMIGA_1_.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_1_.D
---01- 1
--1-1- 1
-1---1 1
-001-- 0
--01-0 0
-0--0- 0
+.names inst_CLK_000_D0.BLIF inst_CLK_OUT_PRE.BLIF SM_AMIGA_1_.BLIF \
+SM_AMIGA_2_.BLIF SM_AMIGA_1_.D
+-010 1
+1-1- 1
+1--1 1
+01-- 0
+--00 0
+0--1 0
+.names inst_AS_000_INTreg.BLIF inst_CLK_000_D0.BLIF inst_CLK_OUT_PRE.BLIF \
+SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_0_.D
+-011- 1
+0---1 1
+-0--1 1
+11--- 0
---00 0
-.names inst_AS_000_INTreg.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \
-inst_CLK_OUT_PRE.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_0_.D
---011- 1
--0---1 1
-0----1 1
-11--0- 0
-11-0-- 0
-111--- 0
-----00 0
+--0-0 0
+-1--0 0
+.names cpu_est_3_reg.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF inst_CLK_000_D0.BLIF \
+inst_CLK_000_D1.BLIF cpu_est_2_.BLIF cpu_est_2_.D
+-0010- 1
+11-10- 1
+--1--1 1
+----11 1
+---0-1 1
+0-1--0 0
+01010- 0
+-01--0 0
+----10 0
---0-0 0
---1--0 0
-.names IPL_0_.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \
-IPL_030DFFSH_0_reg.BLIF IPL_030DFFSH_0_reg.D
-110- 1
---11 1
--0-1 1
-010- 0
---10 0
--0-0 0
-.names IPL_1_.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \
-IPL_030DFFSH_1_reg.BLIF IPL_030DFFSH_1_reg.D
-110- 1
---11 1
--0-1 1
-010- 0
---10 0
--0-0 0
-.names IPL_2_.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \
-IPL_030DFFSH_2_reg.BLIF IPL_030DFFSH_2_reg.D
-110- 1
---11 1
--0-1 1
-010- 0
---10 0
--0-0 0
+.names IPL_0_.BLIF IPL_030DFFSH_0_reg.BLIF inst_CLK_000_D0.BLIF \
+inst_CLK_000_D1.BLIF IPL_030DFFSH_0_reg.D
+1-10 1
+-10- 1
+-1-1 1
+0-10 0
+-00- 0
+-0-1 0
+.names IPL_1_.BLIF IPL_030DFFSH_1_reg.BLIF inst_CLK_000_D0.BLIF \
+inst_CLK_000_D1.BLIF IPL_030DFFSH_1_reg.D
+1-10 1
+-10- 1
+-1-1 1
+0-10 0
+-00- 0
+-0-1 0
+.names IPL_2_.BLIF IPL_030DFFSH_2_reg.BLIF inst_CLK_000_D0.BLIF \
+inst_CLK_000_D1.BLIF IPL_030DFFSH_2_reg.D
+1-10 1
+-10- 1
+-1-1 1
+0-10 0
+-00- 0
+-0-1 0
.names inst_AS_000_INTreg.BLIF inst_CLK_000_D0.BLIF SM_AMIGA_7_.BLIF \
SM_AMIGA_0_.BLIF SM_AMIGA_7_.D
-11- 1
@@ -129,37 +160,15 @@ SM_AMIGA_0_.BLIF SM_AMIGA_7_.D
--00 0
-0-- 0
.names inst_AS_030_000_SYNC.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \
-SM_AMIGA_6_.BLIF SM_AMIGA_7_.BLIF SM_AMIGA_6_.D
---11- 1
--0-1- 1
-1--1- 1
--0--1 1
-010-- 0
--1-0- 0
----00 0
-.names inst_AS_030_000_SYNC.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \
-SM_AMIGA_6_.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_5_.D
-0101- 1
--1--1 1
--0--- 0
----00 0
---1-0 0
-1---0 0
-.names inst_CLK_000_D0.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_4_.D
-01- 1
-0-1 1
--00 0
-1-- 0
-.names AS_030.BLIF inst_CLK_000_D1.BLIF inst_CLK_OUT_PRE.BLIF \
-DSACK_INT_1_.BLIF SM_AMIGA_1_.BLIF DSACK_INT_1_.D
---01- 1
--1-1- 1
----10 1
-1-0-- 1
-11--- 1
-1---0 1
--01-1 0
-0--0- 0
+inst_CLK_000_D2.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_7_.BLIF SM_AMIGA_6_.D
+---11- 1
+--0-1- 1
+1---1- 1
+-0---1 1
+0110-- 0
+0-10-0 0
+-1--0- 0
+----00 0
.names BGACK_000.BLIF inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF \
inst_CLK_000_D1.BLIF inst_BGACK_030_INTreg.D
1-10 1
@@ -167,6 +176,18 @@ inst_CLK_000_D1.BLIF inst_BGACK_030_INTreg.D
-00- 0
0--- 0
-0-1 0
+.names CLK_REF_1_.BLIF CLK_CNT_0_.BLIF CLK_CNT_1_.BLIF CLK_CNT_0_.D
+100 1
+001 1
+0-0 0
+1-1 0
+-1- 0
+.names CLK_REF_1_.BLIF CLK_CNT_0_.BLIF CLK_CNT_1_.BLIF CLK_CNT_1_.D
+001 1
+-10 1
+1-1 0
+-00 0
+-11 0
.names cpu_est_3_reg.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF inst_CLK_000_D0.BLIF \
inst_CLK_000_D1.BLIF cpu_est_2_.BLIF cpu_est_1_.D
0--100 1
@@ -182,60 +203,29 @@ inst_CLK_000_D1.BLIF cpu_est_2_.BLIF cpu_est_1_.D
110--- 0
--0-1- 0
--00-- 0
-.names cpu_est_3_reg.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF inst_CLK_000_D0.BLIF \
-inst_CLK_000_D1.BLIF cpu_est_2_.BLIF cpu_est_2_.D
--0010- 1
-11-10- 1
---1--1 1
-----11 1
----0-1 1
-0-1--0 0
-01010- 0
--01--0 0
-----10 0
----0-0 0
-.names SIZE_1_.BLIF AS_030.BLIF DS_030.BLIF RW.BLIF SIZE_0_.BLIF A_0_.BLIF \
-inst_AS_030_000_SYNC.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \
-SM_AMIGA_6_.BLIF inst_LDS_000_INTreg.BLIF SM_AMIGA_4_.BLIF \
-inst_LDS_000_INTreg.D
-0-01100101-- 1
-0-0010-1---1 1
----1-----01- 1
----1----1-1- 1
----1--1---1- 1
--1-1-----0-- 1
--1-1----1--- 1
--1-1--1----- 1
----0------10 1
--1-0-------0 1
--------0--1- 1
---1-------1- 1
--1-----0---- 1
--11--------- 1
---01-10101-- 0
---010-0101-- 0
-1-01--0101-- 0
---00-1-1---1 0
---000--1---1 0
-1-00---1---1 0
--0-1-----00- 0
--0-1----1-0- 0
--0-1--1---0- 0
--0-----0--0- 0
--01-------0- 0
--0-0------00 0
-.names AS_030.BLIF inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF inst_CLK_000_D0.BLIF \
-SM_AMIGA_3_.BLIF DTACK.PIN.BLIF inst_DTACK_SYNC.D
--1--0- 1
--1-0-- 1
--10--- 1
--1---1 1
-1---0- 1
-1--0-- 1
-1-0--- 1
-1----1 1
---1110 0
-00---- 0
+.names AS_030.BLIF CLK_000.BLIF cpu_est_3_reg.BLIF inst_VMA_INTreg.BLIF \
+cpu_est_0_.BLIF cpu_est_1_.BLIF inst_VPA_D.BLIF inst_VPA_SYNC.BLIF \
+inst_CLK_000_D0.BLIF cpu_est_2_.BLIF SM_AMIGA_3_.BLIF inst_VPA_SYNC.D
+-------1-0- 1
+-------10-- 1
+------11--- 1
+-----1-1--- 1
+----1--1--- 1
+---1---1--- 1
+--0----1--- 1
+-0-----1--- 1
+-------1--0 1
+1--------0- 1
+1-------0-- 1
+1-----1---- 1
+1----1----- 1
+1---1------ 1
+1--1------- 1
+1-0-------- 1
+10--------- 1
+1---------0 1
+-110000-111 0
+0------0--- 0
.names FC_1_.BLIF AS_030.BLIF BGACK_000.BLIF CLK_030.BLIF A_19_.BLIF \
A_18_.BLIF A_17_.BLIF A_16_.BLIF FC_0_.BLIF inst_FPU_CS_INTreg.BLIF \
inst_FPU_CS_INTreg.D
@@ -266,7 +256,7 @@ inst_AS_030_000_SYNC.BLIF inst_AS_030_000_SYNC.D
001-1------ 0
-0--0-----0 0
.names AS_030.BLIF inst_AS_000_INTreg.BLIF inst_AS_030_000_SYNC.BLIF \
-inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF SM_AMIGA_6_.BLIF \
+inst_CLK_000_D1.BLIF inst_CLK_000_D2.BLIF SM_AMIGA_6_.BLIF \
inst_AS_000_INTreg.D
-1--1- 1
-1-0-- 1
@@ -278,27 +268,15 @@ inst_AS_000_INTreg.D
1----0 1
--0101 0
00---- 0
-.names AS_030.BLIF cpu_est_3_reg.BLIF inst_VMA_INTreg.BLIF cpu_est_0_.BLIF \
-cpu_est_1_.BLIF inst_VPA_D.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF \
-cpu_est_2_.BLIF SM_AMIGA_3_.BLIF inst_VPA_SYNC.D
-------1-0- 1
-------10-- 1
------11--- 1
-----1-1--- 1
----1--1--- 1
---1---1--- 1
--0----1--- 1
-------1--0 1
-1-------0- 1
-1------0-- 1
-1----1---- 1
-1---1----- 1
-1--1------ 1
-1-1------- 1
-10-------- 1
-1--------0 1
--10000-111 0
-0-----0--- 0
+.names AS_030.BLIF nEXP_SPACE.BLIF RST.BLIF SM_AMIGA_6_.BLIF \
+AMIGA_BUS_ENABLEDFFreg.BLIF AMIGA_BUS_ENABLEDFFreg.D
+1-10- 1
+-011- 1
+---01 1
+--0-1 1
+-111- 0
+0--00 0
+--0-0 0
.names AS_030.BLIF nEXP_SPACE.BLIF BG_030.BLIF CLK_030.BLIF SM_AMIGA_6_.BLIF \
SM_AMIGA_7_.BLIF BG_000DFFSHreg.BLIF BG_000DFFSHreg.D
---000- 1
@@ -309,38 +287,89 @@ SM_AMIGA_7_.BLIF BG_000DFFSHreg.BLIF BG_000DFFSHreg.D
1000-1- 0
10001-- 0
--01--0 0
+.names AS_030.BLIF inst_CLK_000_D0.BLIF inst_CLK_OUT_PRE.BLIF \
+DSACK_INT_1_.BLIF SM_AMIGA_1_.BLIF DSACK_INT_1_.D
+--01- 1
+-1-1- 1
+---10 1
+1-0-- 1
+11--- 1
+1---0 1
+-01-1 0
+0--0- 0
+.names AS_030.BLIF DS_030.BLIF RW.BLIF A_0_.BLIF inst_AS_030_000_SYNC.BLIF \
+inst_CLK_000_D1.BLIF inst_CLK_000_D2.BLIF SM_AMIGA_6_.BLIF \
+inst_UDS_000_INTreg.BLIF SM_AMIGA_4_.BLIF inst_UDS_000_INTreg.D
+-0110101-- 1
+--1----01- 1
+--1---1-1- 1
+--1--0--1- 1
+--1-1---1- 1
+-001-----1 1
+--0-----10 1
+-1------1- 1
+1-1----0-- 1
+1-1---1--- 1
+1-1--0---- 1
+1-1-1----- 1
+1-0------0 1
+11-------- 1
+-0100101-- 0
+-000-----1 0
+0-1----00- 0
+0-1---1-0- 0
+0-1--0--0- 0
+0-1-1---0- 0
+0-0-----00 0
+01------0- 0
+.names SIZE_1_.BLIF AS_030.BLIF DS_030.BLIF RW.BLIF SIZE_0_.BLIF A_0_.BLIF \
+inst_AS_030_000_SYNC.BLIF inst_CLK_000_D1.BLIF inst_CLK_000_D2.BLIF \
+SM_AMIGA_6_.BLIF inst_LDS_000_INTreg.BLIF SM_AMIGA_4_.BLIF \
+inst_LDS_000_INTreg.D
+0-01100101-- 1
+0-0010-----1 1
+---1-----01- 1
+---1----1-1- 1
+---1---0--1- 1
+---1--1---1- 1
+-1-1-----0-- 1
+-1-1----1--- 1
+-1-1---0---- 1
+-1-1--1----- 1
+---0------10 1
+-1-0-------0 1
+--1-------1- 1
+-11--------- 1
+--01-10101-- 0
+--010-0101-- 0
+1-01--0101-- 0
+-0-1-----00- 0
+-0-1----1-0- 0
+-0-1---0--0- 0
+-0-1--1---0- 0
+--00-1-----1 0
+--000------1 0
+1-00-------1 0
+-01-------0- 0
+-0-0------00 0
+.names AS_030.BLIF CLK_000.BLIF inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF \
+inst_CLK_000_D0.BLIF SM_AMIGA_3_.BLIF DTACK.PIN.BLIF inst_DTACK_SYNC.D
+--1--0- 1
+--1-0-- 1
+--10--- 1
+-01---- 1
+--1---1 1
+1----0- 1
+1---0-- 1
+1--0--- 1
+10----- 1
+1-----1 1
+-1-1110 0
+0-0---- 0
.names inst_AS_000_INTreg.BLIF DSACK_1_.PIN.BLIF inst_DTACK_DMA.D
1- 1
-1 1
00 0
-.names AS_030.BLIF DS_030.BLIF RW.BLIF A_0_.BLIF inst_AS_030_000_SYNC.BLIF \
-inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF SM_AMIGA_6_.BLIF \
-inst_UDS_000_INTreg.BLIF SM_AMIGA_4_.BLIF inst_UDS_000_INTreg.D
--0110101-- 1
--001-1---1 1
---1----01- 1
---1---1-1- 1
---1-1---1- 1
-1-1----0-- 1
-1-1---1--- 1
-1-1-1----- 1
---0-----10 1
------0--1- 1
--1------1- 1
-1-0------0 1
-1----0---- 1
-11-------- 1
--0100101-- 0
--000-1---1 0
-0-1----00- 0
-0-1---1-0- 0
-0-1-1---0- 0
-0----0--0- 0
-0-0-----00 0
-01------0- 0
-.names CLK_CNT_0_.BLIF CLK_CNT_0_.D
-0 1
-1 0
.names IPL_030DFFSH_2_reg.BLIF IPL_030_2_
1 1
0 0
@@ -383,9 +412,9 @@ inst_UDS_000_INTreg.BLIF SM_AMIGA_4_.BLIF inst_UDS_000_INTreg.D
.names RESETDFFreg.BLIF RESET
1 1
0 0
-.names nEXP_SPACE.BLIF AMIGA_BUS_ENABLE
-0 1
-1 0
+.names AMIGA_BUS_ENABLEDFFreg.BLIF AMIGA_BUS_ENABLE
+1 1
+0 0
.names RW.BLIF AMIGA_BUS_DATA_DIR
0 1
1 0
@@ -403,6 +432,18 @@ inst_UDS_000_INTreg.BLIF SM_AMIGA_4_.BLIF inst_UDS_000_INTreg.D
.names IPL_030DFFSH_0_reg.BLIF IPL_030_0_
1 1
0 0
+.names CLK_OSZI.BLIF SM_AMIGA_5_.C
+1 1
+0 0
+.names RST.BLIF SM_AMIGA_5_.AR
+0 1
+1 0
+.names CLK_OSZI.BLIF SM_AMIGA_4_.C
+1 1
+0 0
+.names RST.BLIF SM_AMIGA_4_.AR
+0 1
+1 0
.names CLK_OSZI.BLIF SM_AMIGA_3_.C
1 1
0 0
@@ -427,6 +468,12 @@ inst_UDS_000_INTreg.BLIF SM_AMIGA_4_.BLIF inst_UDS_000_INTreg.D
.names RST.BLIF SM_AMIGA_0_.AR
0 1
1 0
+.names CLK_OSZI.BLIF cpu_est_2_.C
+1 1
+0 0
+.names CLK_OSZI.BLIF cpu_est_3_reg.C
+1 1
+0 0
.names CLK_OSZI.BLIF IPL_030DFFSH_0_reg.C
1 1
0 0
@@ -457,42 +504,19 @@ inst_UDS_000_INTreg.BLIF SM_AMIGA_4_.BLIF inst_UDS_000_INTreg.D
.names RST.BLIF SM_AMIGA_6_.AR
0 1
1 0
-.names CLK_OSZI.BLIF SM_AMIGA_5_.C
+.names CLK_OSZI.BLIF inst_CLK_OUT_PRE.C
1 1
0 0
-.names RST.BLIF SM_AMIGA_5_.AR
-0 1
-1 0
-.names CLK_OSZI.BLIF SM_AMIGA_4_.C
-1 1
-0 0
-.names RST.BLIF SM_AMIGA_4_.AR
-0 1
-1 0
-.names CLK_OSZI.BLIF DSACK_INT_1_.C
-1 1
-0 0
-.names RST.BLIF DSACK_INT_1_.AP
-0 1
-1 0
-.names CLK_OSZI.BLIF inst_VMA_INTreg.C
-1 1
-0 0
-.names RST.BLIF inst_VMA_INTreg.AP
-0 1
-1 0
.names CLK_OSZI.BLIF inst_BGACK_030_INTreg.C
1 1
0 0
.names RST.BLIF inst_BGACK_030_INTreg.AP
0 1
1 0
-.names inst_CLK_OUT_PRE.BLIF CLK_CNT_0_.BLIF inst_CLK_OUT_PRE.D
-10 1
-01 1
-00 0
-11 0
-.names CLK_OSZI.BLIF inst_CLK_OUT_PRE.C
+.names CLK_OSZI.BLIF CLK_CNT_0_.C
+1 1
+0 0
+.names CLK_OSZI.BLIF CLK_CNT_1_.C
1 1
0 0
.names cpu_est_0_.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF cpu_est_0_.D
@@ -508,22 +532,10 @@ inst_UDS_000_INTreg.BLIF SM_AMIGA_4_.BLIF inst_UDS_000_INTreg.D
.names CLK_OSZI.BLIF cpu_est_1_.C
1 1
0 0
-.names CLK_OSZI.BLIF cpu_est_2_.C
+.names CLK_OSZI.BLIF inst_VPA_SYNC.C
1 1
0 0
-.names CLK_OSZI.BLIF cpu_est_3_reg.C
-1 1
-0 0
-.names CLK_OSZI.BLIF inst_LDS_000_INTreg.C
-1 1
-0 0
-.names RST.BLIF inst_LDS_000_INTreg.AP
-0 1
-1 0
-.names CLK_OSZI.BLIF inst_DTACK_SYNC.C
-1 1
-0 0
-.names RST.BLIF inst_DTACK_SYNC.AP
+.names RST.BLIF inst_VPA_SYNC.AP
0 1
1 0
.names CLK_OSZI.BLIF inst_FPU_CS_INTreg.C
@@ -544,22 +556,25 @@ inst_UDS_000_INTreg.BLIF SM_AMIGA_4_.BLIF inst_UDS_000_INTreg.D
.names RST.BLIF inst_AS_000_INTreg.AP
0 1
1 0
-.names CLK_OSZI.BLIF inst_VPA_SYNC.C
+.names CLK_OSZI.BLIF AMIGA_BUS_ENABLEDFFreg.C
1 1
0 0
-.names RST.BLIF inst_VPA_SYNC.AP
-0 1
-1 0
.names CLK_OSZI.BLIF BG_000DFFSHreg.C
1 1
0 0
.names RST.BLIF BG_000DFFSHreg.AP
0 1
1 0
-.names CLK_OSZI.BLIF inst_DTACK_DMA.C
+.names CLK_OSZI.BLIF DSACK_INT_1_.C
1 1
0 0
-.names RST.BLIF inst_DTACK_DMA.AP
+.names RST.BLIF DSACK_INT_1_.AP
+0 1
+1 0
+.names CLK_OSZI.BLIF inst_VMA_INTreg.C
+1 1
+0 0
+.names RST.BLIF inst_VMA_INTreg.AP
0 1
1 0
.names CLK_OSZI.BLIF inst_UDS_000_INTreg.C
@@ -568,7 +583,34 @@ inst_UDS_000_INTreg.BLIF SM_AMIGA_4_.BLIF inst_UDS_000_INTreg.D
.names RST.BLIF inst_UDS_000_INTreg.AP
0 1
1 0
-.names CLK_OSZI.BLIF CLK_CNT_0_.C
+.names CLK_OSZI.BLIF inst_LDS_000_INTreg.C
+1 1
+0 0
+.names RST.BLIF inst_LDS_000_INTreg.AP
+0 1
+1 0
+.names CLK_OSZI.BLIF inst_DTACK_SYNC.C
+1 1
+0 0
+.names RST.BLIF inst_DTACK_SYNC.AP
+0 1
+1 0
+.names CLK_OSZI.BLIF inst_DTACK_DMA.C
+1 1
+0 0
+.names RST.BLIF inst_DTACK_DMA.AP
+0 1
+1 0
+.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D
+1 1
+0 0
+.names CLK_OSZI.BLIF CLK_OUT_INTreg.C
+1 1
+0 0
+.names inst_CLK_000_D1.BLIF inst_CLK_000_D2.D
+1 1
+0 0
+.names CLK_OSZI.BLIF inst_CLK_000_D2.C
1 1
0 0
.names VPA.BLIF inst_VPA_D.D
@@ -595,12 +637,13 @@ inst_UDS_000_INTreg.BLIF SM_AMIGA_4_.BLIF inst_UDS_000_INTreg.D
.names CLK_OSZI.BLIF inst_CLK_000_D1.C
1 1
0 0
-.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D
-1 1
-0 0
-.names CLK_OSZI.BLIF CLK_OUT_INTreg.C
-1 1
-0 0
+.names CLK_REF_1_.D
+ 0
+.names CLK_REF_1_.LH
+ 0
+.names RST.BLIF CLK_REF_1_.AR
+0 1
+1 0
.names DSACK_INT_1_.BLIF DSACK_1_
1 1
0 0
@@ -683,4 +726,14 @@ inst_VMA_INTreg.D.X2
01-1---- 0
01---1-- 0
01----1- 0
+.names inst_CLK_OUT_PRE.BLIF inst_CLK_OUT_PRE.D.X1
+1 1
+0 0
+.names inst_CLK_OUT_PRE.BLIF CLK_REF_1_.BLIF CLK_CNT_0_.BLIF CLK_CNT_1_.BLIF \
+inst_CLK_OUT_PRE.D.X2
+-000 1
+-101 1
+--1- 0
+-0-1 0
+-1-0 0
.end
diff --git a/Logic/68030_tk.crf b/Logic/68030_tk.crf
index 461dc97..e87bbd0 100644
--- a/Logic/68030_tk.crf
+++ b/Logic/68030_tk.crf
@@ -1,7 +1,7 @@
// Signal Name Cross Reference File
// ispLEVER Classic 1.7.00.05.28.13
-// Design '68030_tk' created Fri May 16 17:07:08 2014
+// Design '68030_tk' created Sun May 18 21:01:47 2014
// LEGEND: '>' Functional Block Port Separator
diff --git a/Logic/68030_tk.eq3 b/Logic/68030_tk.eq3
index fa45602..a2cc192 100644
--- a/Logic/68030_tk.eq3
+++ b/Logic/68030_tk.eq3
@@ -2,25 +2,24 @@
Copyright(C), 1992-2013, Lattice Semiconductor Corp.
All Rights Reserved.
-Design bus68030 created Fri May 16 17:07:08 2014
+Design bus68030 created Sun May 18 21:01:47 2014
P-Terms Fan-in Fan-out Type Name (attributes)
--------- ------ ------- ---- -----------------
0 0 1 Pin BERR
1 1 1 Pin BERR.OE
- 1 0 1 Pin DSACK_0_
- 1 1 1 Pin DSACK_0_.OE
1 1 1 Pin CLK_DIV_OUT.D
1 1 1 Pin CLK_DIV_OUT.C
1 0 1 Pin AVEC
0 0 1 Pin AVEC_EXP
1 1 1 Pin AVEC_EXP.OE
- 1 1 1 Pin AMIGA_BUS_ENABLE
1 1 1 Pin AMIGA_BUS_DATA_DIR
1 0 1 Pin AMIGA_BUS_ENABLE_LOW
1 4 1 Pin CIIN
1 8 1 Pin CIIN.OE
+ 1 0 1 Pin DSACK_0_
+ 1 1 1 Pin DSACK_0_.OE
3 4 1 Pin IPL_030_2_.D
1 1 1 Pin IPL_030_2_.AP
1 1 1 Pin IPL_030_2_.C
@@ -40,12 +39,6 @@ Design bus68030 created Fri May 16 17:07:08 2014
12 12 1 Pin LDS_000.D-
1 1 1 Pin LDS_000.AP
1 1 1 Pin LDS_000.C
- 3 4 1 Pin IPL_030_1_.D
- 1 1 1 Pin IPL_030_1_.AP
- 1 1 1 Pin IPL_030_1_.C
- 3 4 1 Pin IPL_030_0_.D
- 1 1 1 Pin IPL_030_0_.AP
- 1 1 1 Pin IPL_030_0_.C
3 7 1 Pin BG_000.D-
1 1 1 Pin BG_000.AP
1 1 1 Pin BG_000.C
@@ -68,6 +61,14 @@ Design bus68030 created Fri May 16 17:07:08 2014
1 1 1 Pin VMA.C
1 1 1 Pin RESET.D
1 1 1 Pin RESET.C
+ 3 5 1 Pin AMIGA_BUS_ENABLE.D-
+ 1 1 1 Pin AMIGA_BUS_ENABLE.C
+ 3 4 1 Pin IPL_030_1_.D
+ 1 1 1 Pin IPL_030_1_.AP
+ 1 1 1 Pin IPL_030_1_.C
+ 3 4 1 Pin IPL_030_0_.D
+ 1 1 1 Pin IPL_030_0_.AP
+ 1 1 1 Pin IPL_030_0_.C
3 3 1 Node cpu_est_0_.D
1 1 1 Node cpu_est_0_.C
4 6 1 Node cpu_est_1_.T
@@ -75,53 +76,61 @@ Design bus68030 created Fri May 16 17:07:08 2014
4 11 1 Node inst_AS_030_000_SYNC.D
1 1 1 Node inst_AS_030_000_SYNC.AP
1 1 1 Node inst_AS_030_000_SYNC.C
- 2 6 1 Node inst_DTACK_SYNC.D-
+ 2 7 1 Node inst_DTACK_SYNC.D-
1 1 1 Node inst_DTACK_SYNC.AP
1 1 1 Node inst_DTACK_SYNC.C
1 1 1 Node inst_VPA_D.D
1 1 1 Node inst_VPA_D.C
- 2 10 1 Node inst_VPA_SYNC.D-
+ 2 11 1 Node inst_VPA_SYNC.D-
1 1 1 Node inst_VPA_SYNC.AP
1 1 1 Node inst_VPA_SYNC.C
1 1 1 Node inst_CLK_000_D0.D
1 1 1 Node inst_CLK_000_D0.C
1 1 1 Node inst_CLK_000_D1.D
1 1 1 Node inst_CLK_000_D1.C
- 2 2 1 Node inst_CLK_OUT_PRE.D
+ 1 1 1 Node inst_CLK_000_D2.D
+ 1 1 1 Node inst_CLK_000_D2.C
+ 3 3 1 NodeX1 inst_CLK_OUT_PRE.D.X1
+ 1 2 1 NodeX2 inst_CLK_OUT_PRE.D.X2
1 1 1 Node inst_CLK_OUT_PRE.C
+ 1 1 1 Node SM_AMIGA_6_.AR
+ 4 6 1 Node SM_AMIGA_6_.D
+ 1 1 1 Node SM_AMIGA_6_.C
3 6 1 NodeX1 cpu_est_2_.D.X1
1 1 1 NodeX2 cpu_est_2_.D.X2
1 1 1 Node cpu_est_2_.C
- 1 1 1 Node CLK_CNT_0_.D
- 1 1 1 Node CLK_CNT_0_.C
- 1 1 1 Node SM_AMIGA_6_.AR
- 3 5 1 Node SM_AMIGA_6_.D-
- 1 1 1 Node SM_AMIGA_6_.C
+ 1 1 1 Node CLK_REF_1_.AR
+ 0 0 1 Node CLK_REF_1_.D
+ 0 0 1 Node CLK_REF_1_.LH
2 4 1 Node SM_AMIGA_7_.D
1 1 1 Node SM_AMIGA_7_.AP
1 1 1 Node SM_AMIGA_7_.C
- 1 1 1 Node SM_AMIGA_1_.AR
- 3 5 1 Node SM_AMIGA_1_.D
- 1 1 1 Node SM_AMIGA_1_.C
1 1 1 Node SM_AMIGA_4_.AR
2 3 1 Node SM_AMIGA_4_.D
1 1 1 Node SM_AMIGA_4_.C
+ 1 1 1 Node SM_AMIGA_1_.AR
+ 3 4 1 Node SM_AMIGA_1_.D
+ 1 1 1 Node SM_AMIGA_1_.C
+ 2 3 1 Node CLK_CNT_0_.D
+ 1 1 1 Node CLK_CNT_0_.C
+ 2 3 1 Node CLK_CNT_1_.D
+ 1 1 1 Node CLK_CNT_1_.C
1 1 1 Node SM_AMIGA_3_.AR
3 5 1 Node SM_AMIGA_3_.D
1 1 1 Node SM_AMIGA_3_.C
1 1 1 Node SM_AMIGA_5_.AR
- 2 5 1 Node SM_AMIGA_5_.D
+ 2 6 1 Node SM_AMIGA_5_.D
1 1 1 Node SM_AMIGA_5_.C
1 1 1 Node SM_AMIGA_2_.AR
3 5 1 Node SM_AMIGA_2_.D
1 1 1 Node SM_AMIGA_2_.C
1 1 1 Node SM_AMIGA_0_.AR
- 3 6 1 Node SM_AMIGA_0_.D
+ 3 5 1 Node SM_AMIGA_0_.D
1 1 1 Node SM_AMIGA_0_.C
=========
- 168 P-Term Total: 168
+ 181 P-Term Total: 181
Total Pins: 59
- Total Nodes: 19
+ Total Nodes: 22
Average P-Term/Output: 2
@@ -131,10 +140,6 @@ BERR = (0);
BERR.OE = (!FPU_CS.Q);
-DSACK_0_ = (1);
-
-DSACK_0_.OE = (nEXP_SPACE);
-
CLK_DIV_OUT.D = (inst_CLK_OUT_PRE.Q);
CLK_DIV_OUT.C = (CLK_OSZI);
@@ -145,8 +150,6 @@ AVEC_EXP = (0);
AVEC_EXP.OE = (!FPU_CS.Q);
-AMIGA_BUS_ENABLE = (!nEXP_SPACE);
-
AMIGA_BUS_DATA_DIR = (!RW);
AMIGA_BUS_ENABLE_LOW = (1);
@@ -155,8 +158,12 @@ CIIN = (A_23_ & A_22_ & A_21_ & A_20_);
CIIN.OE = (!A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_);
-IPL_030_2_.D = (!inst_CLK_000_D0.Q & IPL_030_2_.Q
- # inst_CLK_000_D1.Q & IPL_030_2_.Q
+DSACK_0_ = (1);
+
+DSACK_0_.OE = (nEXP_SPACE);
+
+IPL_030_2_.D = (IPL_030_2_.Q & !inst_CLK_000_D0.Q
+ # IPL_030_2_.Q & inst_CLK_000_D1.Q
# IPL_2_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
IPL_030_2_.AP = (!RST);
@@ -166,7 +173,7 @@ IPL_030_2_.C = (CLK_OSZI);
DSACK_1_.OE = (nEXP_SPACE);
!DSACK_1_.D = (!AS_030 & !DSACK_1_.Q
- # !inst_CLK_000_D1.Q & inst_CLK_OUT_PRE.Q & SM_AMIGA_1_.Q);
+ # !inst_CLK_000_D0.Q & inst_CLK_OUT_PRE.Q & SM_AMIGA_1_.Q);
DSACK_1_.AP = (!RST);
@@ -175,7 +182,7 @@ DSACK_1_.C = (CLK_OSZI);
AS_000.OE = (BGACK_030.Q);
!AS_000.D = (!AS_030 & !AS_000.Q
- # !inst_AS_030_000_SYNC.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & SM_AMIGA_6_.Q);
+ # !inst_AS_030_000_SYNC.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D2.Q & SM_AMIGA_6_.Q);
AS_000.AP = (!RST);
@@ -184,13 +191,13 @@ AS_000.C = (CLK_OSZI);
UDS_000.OE = (BGACK_030.Q);
!UDS_000.D = (!AS_030 & DS_030 & !UDS_000.Q
- # !AS_030 & !inst_CLK_000_D0.Q & !UDS_000.Q
# !AS_030 & RW & inst_AS_030_000_SYNC.Q & !UDS_000.Q
- # !AS_030 & RW & inst_CLK_000_D1.Q & !UDS_000.Q
+ # !AS_030 & RW & !inst_CLK_000_D1.Q & !UDS_000.Q
+ # !AS_030 & RW & inst_CLK_000_D2.Q & !UDS_000.Q
# !AS_030 & RW & !SM_AMIGA_6_.Q & !UDS_000.Q
+ # !DS_030 & !RW & !A_0_ & SM_AMIGA_4_.Q
# !AS_030 & !RW & !UDS_000.Q & !SM_AMIGA_4_.Q
- # !DS_030 & !RW & !A_0_ & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q
- # !DS_030 & RW & !A_0_ & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & SM_AMIGA_6_.Q);
+ # !DS_030 & RW & !A_0_ & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D2.Q & SM_AMIGA_6_.Q);
UDS_000.AP = (!RST);
@@ -199,38 +206,22 @@ UDS_000.C = (CLK_OSZI);
LDS_000.OE = (BGACK_030.Q);
!LDS_000.D = (!AS_030 & DS_030 & !LDS_000.Q
- # !AS_030 & !inst_CLK_000_D0.Q & !LDS_000.Q
# !AS_030 & RW & inst_AS_030_000_SYNC.Q & !LDS_000.Q
- # !AS_030 & RW & inst_CLK_000_D1.Q & !LDS_000.Q
+ # !AS_030 & RW & !inst_CLK_000_D1.Q & !LDS_000.Q
+ # !AS_030 & RW & inst_CLK_000_D2.Q & !LDS_000.Q
# !AS_030 & RW & !SM_AMIGA_6_.Q & !LDS_000.Q
+ # SIZE_1_ & !DS_030 & !RW & SM_AMIGA_4_.Q
+ # !DS_030 & !RW & !SIZE_0_ & SM_AMIGA_4_.Q
+ # !DS_030 & !RW & A_0_ & SM_AMIGA_4_.Q
# !AS_030 & !RW & !LDS_000.Q & !SM_AMIGA_4_.Q
- # SIZE_1_ & !DS_030 & !RW & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q
- # !DS_030 & !RW & !SIZE_0_ & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q
- # !DS_030 & !RW & A_0_ & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q
- # SIZE_1_ & !DS_030 & RW & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & SM_AMIGA_6_.Q
- # !DS_030 & RW & !SIZE_0_ & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & SM_AMIGA_6_.Q
- # !DS_030 & RW & A_0_ & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & SM_AMIGA_6_.Q);
+ # SIZE_1_ & !DS_030 & RW & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D2.Q & SM_AMIGA_6_.Q
+ # !DS_030 & RW & !SIZE_0_ & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D2.Q & SM_AMIGA_6_.Q
+ # !DS_030 & RW & A_0_ & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D2.Q & SM_AMIGA_6_.Q);
LDS_000.AP = (!RST);
LDS_000.C = (CLK_OSZI);
-IPL_030_1_.D = (!inst_CLK_000_D0.Q & IPL_030_1_.Q
- # inst_CLK_000_D1.Q & IPL_030_1_.Q
- # IPL_1_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
-
-IPL_030_1_.AP = (!RST);
-
-IPL_030_1_.C = (CLK_OSZI);
-
-IPL_030_0_.D = (!inst_CLK_000_D0.Q & IPL_030_0_.Q
- # inst_CLK_000_D1.Q & IPL_030_0_.Q
- # IPL_0_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
-
-IPL_030_0_.AP = (!RST);
-
-IPL_030_0_.C = (CLK_OSZI);
-
!BG_000.D = (!BG_030 & CLK_030 & !BG_000.Q
# AS_030 & !nEXP_SPACE & !BG_030 & !CLK_030 & SM_AMIGA_6_.Q
# AS_030 & !nEXP_SPACE & !BG_030 & !CLK_030 & SM_AMIGA_7_.Q);
@@ -282,6 +273,28 @@ RESET.D = (RST);
RESET.C = (CLK_OSZI);
+!AMIGA_BUS_ENABLE.D = (!RST & !AMIGA_BUS_ENABLE.Q
+ # nEXP_SPACE & RST & SM_AMIGA_6_.Q
+ # !AS_030 & !SM_AMIGA_6_.Q & !AMIGA_BUS_ENABLE.Q);
+
+AMIGA_BUS_ENABLE.C = (CLK_OSZI);
+
+IPL_030_1_.D = (IPL_030_1_.Q & !inst_CLK_000_D0.Q
+ # IPL_030_1_.Q & inst_CLK_000_D1.Q
+ # IPL_1_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
+
+IPL_030_1_.AP = (!RST);
+
+IPL_030_1_.C = (CLK_OSZI);
+
+IPL_030_0_.D = (IPL_030_0_.Q & !inst_CLK_000_D0.Q
+ # IPL_030_0_.Q & inst_CLK_000_D1.Q
+ # IPL_0_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
+
+IPL_030_0_.AP = (!RST);
+
+IPL_030_0_.C = (CLK_OSZI);
+
cpu_est_0_.D = (cpu_est_0_.Q & !inst_CLK_000_D0.Q
# cpu_est_0_.Q & inst_CLK_000_D1.Q
# !cpu_est_0_.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
@@ -305,7 +318,7 @@ inst_AS_030_000_SYNC.AP = (!RST);
inst_AS_030_000_SYNC.C = (CLK_OSZI);
!inst_DTACK_SYNC.D = (!AS_030 & !inst_DTACK_SYNC.Q
- # inst_VPA_D.Q & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !DTACK.PIN);
+ # CLK_000 & inst_VPA_D.Q & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !DTACK.PIN);
inst_DTACK_SYNC.AP = (!RST);
@@ -316,7 +329,7 @@ inst_VPA_D.D = (VPA);
inst_VPA_D.C = (CLK_OSZI);
!inst_VPA_SYNC.D = (!AS_030 & !inst_VPA_SYNC.Q
- # E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & inst_CLK_000_D0.Q & cpu_est_2_.Q & SM_AMIGA_3_.Q);
+ # CLK_000 & E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & inst_CLK_000_D0.Q & cpu_est_2_.Q & SM_AMIGA_3_.Q);
inst_VPA_SYNC.AP = (!RST);
@@ -330,11 +343,27 @@ inst_CLK_000_D1.D = (inst_CLK_000_D0.Q);
inst_CLK_000_D1.C = (CLK_OSZI);
-inst_CLK_OUT_PRE.D = (!inst_CLK_OUT_PRE.Q & CLK_CNT_0_.Q
- # inst_CLK_OUT_PRE.Q & !CLK_CNT_0_.Q);
+inst_CLK_000_D2.D = (inst_CLK_000_D1.Q);
+
+inst_CLK_000_D2.C = (CLK_OSZI);
+
+inst_CLK_OUT_PRE.D.X1 = (inst_CLK_OUT_PRE.Q & CLK_CNT_0_.Q
+ # inst_CLK_OUT_PRE.Q & CLK_CNT_1_.Q
+ # !inst_CLK_OUT_PRE.Q & !CLK_CNT_0_.Q & !CLK_CNT_1_.Q);
+
+inst_CLK_OUT_PRE.D.X2 = (CLK_REF_1_.Q & !CLK_CNT_0_.Q);
inst_CLK_OUT_PRE.C = (CLK_OSZI);
+SM_AMIGA_6_.AR = (!RST);
+
+SM_AMIGA_6_.D = (inst_AS_030_000_SYNC.Q & SM_AMIGA_6_.Q
+ # !inst_CLK_000_D1.Q & SM_AMIGA_6_.Q
+ # inst_CLK_000_D2.Q & SM_AMIGA_6_.Q
+ # !inst_CLK_000_D0.Q & SM_AMIGA_7_.Q);
+
+SM_AMIGA_6_.C = (CLK_OSZI);
+
cpu_est_2_.D.X1 = (E.Q & cpu_est_0_.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & !cpu_est_2_.Q
# !cpu_est_0_.Q & !cpu_est_1_.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & !cpu_est_2_.Q
# !E.Q & cpu_est_0_.Q & !cpu_est_1_.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & cpu_est_2_.Q);
@@ -343,17 +372,11 @@ cpu_est_2_.D.X2 = (cpu_est_2_.Q);
cpu_est_2_.C = (CLK_OSZI);
-CLK_CNT_0_.D = (!CLK_CNT_0_.Q);
+CLK_REF_1_.AR = (!RST);
-CLK_CNT_0_.C = (CLK_OSZI);
+CLK_REF_1_.D = (0);
-SM_AMIGA_6_.AR = (!RST);
-
-!SM_AMIGA_6_.D = (inst_CLK_000_D0.Q & !SM_AMIGA_6_.Q
- # !SM_AMIGA_6_.Q & !SM_AMIGA_7_.Q
- # !inst_AS_030_000_SYNC.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
-
-SM_AMIGA_6_.C = (CLK_OSZI);
+CLK_REF_1_.LH = (0);
SM_AMIGA_7_.D = (inst_CLK_000_D0.Q & SM_AMIGA_7_.Q
# AS_000.Q & inst_CLK_000_D0.Q & SM_AMIGA_0_.Q);
@@ -362,14 +385,6 @@ SM_AMIGA_7_.AP = (!RST);
SM_AMIGA_7_.C = (CLK_OSZI);
-SM_AMIGA_1_.AR = (!RST);
-
-SM_AMIGA_1_.D = (inst_CLK_000_D1.Q & SM_AMIGA_1_.Q
- # !inst_CLK_OUT_PRE.Q & SM_AMIGA_1_.Q
- # inst_CLK_000_D0.Q & SM_AMIGA_2_.Q);
-
-SM_AMIGA_1_.C = (CLK_OSZI);
-
SM_AMIGA_4_.AR = (!RST);
SM_AMIGA_4_.D = (!inst_CLK_000_D0.Q & SM_AMIGA_4_.Q
@@ -377,6 +392,24 @@ SM_AMIGA_4_.D = (!inst_CLK_000_D0.Q & SM_AMIGA_4_.Q
SM_AMIGA_4_.C = (CLK_OSZI);
+SM_AMIGA_1_.AR = (!RST);
+
+SM_AMIGA_1_.D = (inst_CLK_000_D0.Q & SM_AMIGA_1_.Q
+ # inst_CLK_000_D0.Q & SM_AMIGA_2_.Q
+ # !inst_CLK_OUT_PRE.Q & SM_AMIGA_1_.Q & !SM_AMIGA_2_.Q);
+
+SM_AMIGA_1_.C = (CLK_OSZI);
+
+CLK_CNT_0_.D = (!CLK_REF_1_.Q & !CLK_CNT_0_.Q & CLK_CNT_1_.Q
+ # CLK_REF_1_.Q & !CLK_CNT_0_.Q & !CLK_CNT_1_.Q);
+
+CLK_CNT_0_.C = (CLK_OSZI);
+
+CLK_CNT_1_.D = (CLK_CNT_0_.Q & !CLK_CNT_1_.Q
+ # !CLK_REF_1_.Q & !CLK_CNT_0_.Q & CLK_CNT_1_.Q);
+
+CLK_CNT_1_.C = (CLK_OSZI);
+
SM_AMIGA_3_.AR = (!RST);
SM_AMIGA_3_.D = (inst_CLK_000_D0.Q & SM_AMIGA_4_.Q
@@ -388,7 +421,7 @@ SM_AMIGA_3_.C = (CLK_OSZI);
SM_AMIGA_5_.AR = (!RST);
SM_AMIGA_5_.D = (inst_CLK_000_D0.Q & SM_AMIGA_5_.Q
- # !inst_AS_030_000_SYNC.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & SM_AMIGA_6_.Q);
+ # !inst_AS_030_000_SYNC.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D2.Q & SM_AMIGA_6_.Q);
SM_AMIGA_5_.C = (CLK_OSZI);
@@ -404,7 +437,7 @@ SM_AMIGA_0_.AR = (!RST);
SM_AMIGA_0_.D = (!AS_000.Q & SM_AMIGA_0_.Q
# !inst_CLK_000_D0.Q & SM_AMIGA_0_.Q
- # !inst_CLK_000_D1.Q & inst_CLK_OUT_PRE.Q & SM_AMIGA_1_.Q);
+ # !inst_CLK_000_D0.Q & inst_CLK_OUT_PRE.Q & SM_AMIGA_1_.Q);
SM_AMIGA_0_.C = (CLK_OSZI);
diff --git a/Logic/68030_tk.fti b/Logic/68030_tk.fti
index 4a9a440..0f6eaff 100644
--- a/Logic/68030_tk.fti
+++ b/Logic/68030_tk.fti
@@ -4,9 +4,9 @@
#DEVICE mach447a
DATA LOCATION AMIGA_BUS_DATA_DIR:E_0_48 // OUT
-DATA LOCATION AMIGA_BUS_ENABLE:D_9_34 // OUT
+DATA LOCATION AMIGA_BUS_ENABLE:D_4_34 // IO {RN_AMIGA_BUS_ENABLE}
DATA LOCATION AMIGA_BUS_ENABLE_LOW:C_12_20 // OUT
-DATA LOCATION AS_000:D_5_33 // IO {RN_AS_000}
+DATA LOCATION AS_000:D_9_33 // IO {RN_AS_000}
DATA LOCATION AS_030:H_*_82 // INP
DATA LOCATION AVEC:A_4_92 // OUT
DATA LOCATION AVEC_EXP:C_0_22 // OUT
@@ -35,10 +35,12 @@ DATA LOCATION BG_030:C_*_21 // INP
DATA LOCATION CIIN:E_12_47 // OUT
DATA LOCATION CLK_000:*_*_11 // INP
DATA LOCATION CLK_030:*_*_64 // INP
-DATA LOCATION CLK_CNT_0_:H_6 // NOD
+DATA LOCATION CLK_CNT_0_:B_10 // NOD
+DATA LOCATION CLK_CNT_1_:B_6 // NOD
DATA LOCATION CLK_DIV_OUT:G_0_65 // OUT
DATA LOCATION CLK_EXP:B_0_10 // OUT
DATA LOCATION CLK_OSZI:*_*_61 // Cin
+DATA LOCATION CLK_REF_1_:D_6 // NOD
DATA LOCATION DSACK_0_:H_12_80 // OUT
DATA LOCATION DSACK_1_:H_8_81 // IO {RN_DSACK_1_}
DATA LOCATION DS_030:A_*_98 // INP
@@ -55,7 +57,8 @@ DATA LOCATION IPL_1_:F_*_56 // INP
DATA LOCATION IPL_2_:G_*_68 // INP
DATA LOCATION LDS_000:D_8_31 // IO {RN_LDS_000}
DATA LOCATION RESET:B_1_3 // OUT
-DATA LOCATION RN_AS_000:D_5 // NOD {AS_000}
+DATA LOCATION RN_AMIGA_BUS_ENABLE:D_4 // NOD {AMIGA_BUS_ENABLE}
+DATA LOCATION RN_AS_000:D_9 // NOD {AS_000}
DATA LOCATION RN_BGACK_030:H_4 // NOD {BGACK_030}
DATA LOCATION RN_BG_000:D_1 // NOD {BG_000}
DATA LOCATION RN_DSACK_1_:H_8 // NOD {DSACK_1_}
@@ -66,32 +69,33 @@ DATA LOCATION RN_IPL_030_1_:B_12 // NOD {IPL_030_1_}
DATA LOCATION RN_IPL_030_2_:B_4 // NOD {IPL_030_2_}
DATA LOCATION RN_LDS_000:D_8 // NOD {LDS_000}
DATA LOCATION RN_UDS_000:D_12 // NOD {UDS_000}
-DATA LOCATION RN_VMA:D_4 // NOD {VMA}
+DATA LOCATION RN_VMA:D_5 // NOD {VMA}
DATA LOCATION RST:*_*_86 // INP
DATA LOCATION RW:G_*_71 // INP
DATA LOCATION SIZE_0_:G_*_70 // INP
DATA LOCATION SIZE_1_:H_*_79 // INP
-DATA LOCATION SM_AMIGA_0_:H_2 // NOD
-DATA LOCATION SM_AMIGA_1_:G_12 // NOD
-DATA LOCATION SM_AMIGA_2_:G_1 // NOD
-DATA LOCATION SM_AMIGA_3_:G_5 // NOD
-DATA LOCATION SM_AMIGA_4_:F_0 // NOD
-DATA LOCATION SM_AMIGA_5_:A_0 // NOD
-DATA LOCATION SM_AMIGA_6_:D_6 // NOD
-DATA LOCATION SM_AMIGA_7_:H_9 // NOD
+DATA LOCATION SM_AMIGA_0_:G_5 // NOD
+DATA LOCATION SM_AMIGA_1_:H_5 // NOD
+DATA LOCATION SM_AMIGA_2_:G_9 // NOD
+DATA LOCATION SM_AMIGA_3_:G_2 // NOD
+DATA LOCATION SM_AMIGA_4_:B_9 // NOD
+DATA LOCATION SM_AMIGA_5_:B_2 // NOD
+DATA LOCATION SM_AMIGA_6_:A_0 // NOD
+DATA LOCATION SM_AMIGA_7_:B_13 // NOD
DATA LOCATION UDS_000:D_12_32 // IO {RN_UDS_000}
-DATA LOCATION VMA:D_4_35 // IO {RN_VMA}
+DATA LOCATION VMA:D_5_35 // IO {RN_VMA}
DATA LOCATION VPA:*_*_36 // INP
-DATA LOCATION cpu_est_0_:D_14 // NOD
-DATA LOCATION cpu_est_1_:D_2 // NOD
-DATA LOCATION cpu_est_2_:D_10 // NOD
+DATA LOCATION cpu_est_0_:D_2 // NOD
+DATA LOCATION cpu_est_1_:D_13 // NOD
+DATA LOCATION cpu_est_2_:G_13 // NOD
DATA LOCATION inst_AS_030_000_SYNC:H_1 // NOD
-DATA LOCATION inst_CLK_000_D0:G_8 // NOD
-DATA LOCATION inst_CLK_000_D1:D_13 // NOD
-DATA LOCATION inst_CLK_OUT_PRE:H_5 // NOD
-DATA LOCATION inst_DTACK_SYNC:G_13 // NOD
-DATA LOCATION inst_VPA_D:H_13 // NOD
-DATA LOCATION inst_VPA_SYNC:G_9 // NOD
+DATA LOCATION inst_CLK_000_D0:G_12 // NOD
+DATA LOCATION inst_CLK_000_D1:G_8 // NOD
+DATA LOCATION inst_CLK_000_D2:G_1 // NOD
+DATA LOCATION inst_CLK_OUT_PRE:B_5 // NOD
+DATA LOCATION inst_DTACK_SYNC:G_10 // NOD
+DATA LOCATION inst_VPA_D:H_9 // NOD
+DATA LOCATION inst_VPA_SYNC:G_6 // NOD
DATA LOCATION nEXP_SPACE:*_*_14 // INP
DATA IO_DIR AMIGA_BUS_DATA_DIR:OUT
DATA IO_DIR AMIGA_BUS_ENABLE:OUT
@@ -153,10 +157,6 @@ DATA IO_DIR VMA:OUT
DATA IO_DIR VPA:IN
DATA IO_DIR nEXP_SPACE:IN
DATA GLB_CLOCK CLK_OSZI
-DATA PW_LEVEL A_17_:0
-DATA SLEW A_17_:0
-DATA PW_LEVEL A_16_:0
-DATA SLEW A_16_:0
DATA PW_LEVEL SIZE_1_:0
DATA SLEW SIZE_1_:0
DATA PW_LEVEL A_31_:0
@@ -169,72 +169,74 @@ DATA PW_LEVEL AS_030:0
DATA SLEW AS_030:0
DATA PW_LEVEL DS_030:0
DATA SLEW DS_030:0
-DATA PW_LEVEL A_0_:0
-DATA SLEW A_0_:0
-DATA SLEW nEXP_SPACE:0
-DATA PW_LEVEL BERR:0
-DATA SLEW BERR:0
-DATA PW_LEVEL BG_030:0
-DATA SLEW BG_030:0
-DATA PW_LEVEL IPL_1_:0
-DATA SLEW IPL_1_:0
-DATA PW_LEVEL IPL_0_:0
-DATA SLEW IPL_0_:0
-DATA PW_LEVEL DSACK_0_:0
-DATA SLEW DSACK_0_:0
-DATA PW_LEVEL BGACK_000:0
-DATA SLEW BGACK_000:0
-DATA PW_LEVEL FC_0_:0
-DATA SLEW FC_0_:0
-DATA SLEW CLK_030:0
-DATA SLEW CLK_000:0
-DATA SLEW CLK_OSZI:0
-DATA PW_LEVEL CLK_DIV_OUT:0
-DATA SLEW CLK_DIV_OUT:0
-DATA PW_LEVEL AVEC:0
-DATA SLEW AVEC:0
-DATA PW_LEVEL AVEC_EXP:0
-DATA SLEW AVEC_EXP:0
-DATA SLEW VPA:0
-DATA SLEW RST:0
-DATA PW_LEVEL RW:0
-DATA SLEW RW:0
-DATA PW_LEVEL AMIGA_BUS_ENABLE:0
-DATA SLEW AMIGA_BUS_ENABLE:0
-DATA PW_LEVEL AMIGA_BUS_DATA_DIR:0
-DATA SLEW AMIGA_BUS_DATA_DIR:0
-DATA PW_LEVEL AMIGA_BUS_ENABLE_LOW:0
-DATA SLEW AMIGA_BUS_ENABLE_LOW:0
-DATA PW_LEVEL CIIN:0
-DATA SLEW CIIN:0
DATA PW_LEVEL SIZE_0_:0
DATA SLEW SIZE_0_:0
DATA PW_LEVEL A_30_:0
DATA SLEW A_30_:0
+DATA SLEW nEXP_SPACE:0
DATA PW_LEVEL A_29_:0
DATA SLEW A_29_:0
+DATA PW_LEVEL BERR:0
+DATA SLEW BERR:0
DATA PW_LEVEL A_28_:0
DATA SLEW A_28_:0
+DATA PW_LEVEL BG_030:0
+DATA SLEW BG_030:0
DATA PW_LEVEL A_27_:0
DATA SLEW A_27_:0
DATA PW_LEVEL A_26_:0
DATA SLEW A_26_:0
DATA PW_LEVEL A_25_:0
DATA SLEW A_25_:0
+DATA PW_LEVEL BGACK_000:0
+DATA SLEW BGACK_000:0
DATA PW_LEVEL A_24_:0
DATA SLEW A_24_:0
+DATA SLEW CLK_030:0
DATA PW_LEVEL A_23_:0
DATA SLEW A_23_:0
+DATA SLEW CLK_000:0
DATA PW_LEVEL A_22_:0
DATA SLEW A_22_:0
+DATA SLEW CLK_OSZI:0
DATA PW_LEVEL A_21_:0
DATA SLEW A_21_:0
+DATA PW_LEVEL CLK_DIV_OUT:0
+DATA SLEW CLK_DIV_OUT:0
DATA PW_LEVEL A_20_:0
DATA SLEW A_20_:0
DATA PW_LEVEL A_19_:0
DATA SLEW A_19_:0
DATA PW_LEVEL A_18_:0
DATA SLEW A_18_:0
+DATA PW_LEVEL A_17_:0
+DATA SLEW A_17_:0
+DATA PW_LEVEL AVEC:0
+DATA SLEW AVEC:0
+DATA PW_LEVEL A_16_:0
+DATA SLEW A_16_:0
+DATA PW_LEVEL AVEC_EXP:0
+DATA SLEW AVEC_EXP:0
+DATA SLEW VPA:0
+DATA SLEW RST:0
+DATA PW_LEVEL RW:0
+DATA SLEW RW:0
+DATA PW_LEVEL AMIGA_BUS_DATA_DIR:0
+DATA SLEW AMIGA_BUS_DATA_DIR:0
+DATA PW_LEVEL AMIGA_BUS_ENABLE_LOW:0
+DATA SLEW AMIGA_BUS_ENABLE_LOW:0
+DATA PW_LEVEL CIIN:0
+DATA SLEW CIIN:0
+DATA PW_LEVEL A_0_:0
+DATA SLEW A_0_:0
+DATA PW_LEVEL IPL_1_:0
+DATA SLEW IPL_1_:0
+DATA PW_LEVEL IPL_0_:0
+DATA SLEW IPL_0_:0
+DATA PW_LEVEL DSACK_0_:0
+DATA SLEW DSACK_0_:0
+DATA PW_LEVEL FC_0_:0
+DATA SLEW FC_0_:0
DATA PW_LEVEL IPL_030_2_:0
DATA SLEW IPL_030_2_:0
DATA PW_LEVEL DSACK_1_:0
@@ -245,10 +247,6 @@ DATA PW_LEVEL UDS_000:0
DATA SLEW UDS_000:0
DATA PW_LEVEL LDS_000:0
DATA SLEW LDS_000:0
-DATA PW_LEVEL IPL_030_1_:0
-DATA SLEW IPL_030_1_:0
-DATA PW_LEVEL IPL_030_0_:0
-DATA SLEW IPL_030_0_:0
DATA PW_LEVEL BG_000:0
DATA SLEW BG_000:0
DATA PW_LEVEL BGACK_030:0
@@ -265,6 +263,12 @@ DATA PW_LEVEL VMA:0
DATA SLEW VMA:0
DATA PW_LEVEL RESET:0
DATA SLEW RESET:0
+DATA PW_LEVEL AMIGA_BUS_ENABLE:0
+DATA SLEW AMIGA_BUS_ENABLE:0
+DATA PW_LEVEL IPL_030_1_:0
+DATA SLEW IPL_030_1_:0
+DATA PW_LEVEL IPL_030_0_:0
+DATA SLEW IPL_030_0_:0
DATA PW_LEVEL cpu_est_0_:0
DATA SLEW cpu_est_0_:0
DATA PW_LEVEL cpu_est_1_:0
@@ -281,20 +285,26 @@ DATA PW_LEVEL inst_CLK_000_D0:0
DATA SLEW inst_CLK_000_D0:0
DATA PW_LEVEL inst_CLK_000_D1:0
DATA SLEW inst_CLK_000_D1:0
+DATA PW_LEVEL inst_CLK_000_D2:0
+DATA SLEW inst_CLK_000_D2:0
DATA PW_LEVEL inst_CLK_OUT_PRE:0
DATA SLEW inst_CLK_OUT_PRE:0
-DATA PW_LEVEL cpu_est_2_:0
-DATA SLEW cpu_est_2_:0
-DATA PW_LEVEL CLK_CNT_0_:0
-DATA SLEW CLK_CNT_0_:0
DATA PW_LEVEL SM_AMIGA_6_:0
DATA SLEW SM_AMIGA_6_:0
+DATA PW_LEVEL cpu_est_2_:0
+DATA SLEW cpu_est_2_:0
+DATA PW_LEVEL CLK_REF_1_:0
+DATA SLEW CLK_REF_1_:0
DATA PW_LEVEL SM_AMIGA_7_:0
DATA SLEW SM_AMIGA_7_:0
-DATA PW_LEVEL SM_AMIGA_1_:0
-DATA SLEW SM_AMIGA_1_:0
DATA PW_LEVEL SM_AMIGA_4_:0
DATA SLEW SM_AMIGA_4_:0
+DATA PW_LEVEL SM_AMIGA_1_:0
+DATA SLEW SM_AMIGA_1_:0
+DATA PW_LEVEL CLK_CNT_0_:0
+DATA SLEW CLK_CNT_0_:0
+DATA PW_LEVEL CLK_CNT_1_:0
+DATA SLEW CLK_CNT_1_:0
DATA PW_LEVEL SM_AMIGA_3_:0
DATA SLEW SM_AMIGA_3_:0
DATA PW_LEVEL SM_AMIGA_5_:0
@@ -308,11 +318,12 @@ DATA PW_LEVEL RN_DSACK_1_:0
DATA PW_LEVEL RN_AS_000:0
DATA PW_LEVEL RN_UDS_000:0
DATA PW_LEVEL RN_LDS_000:0
-DATA PW_LEVEL RN_IPL_030_1_:0
-DATA PW_LEVEL RN_IPL_030_0_:0
DATA PW_LEVEL RN_BG_000:0
DATA PW_LEVEL RN_BGACK_030:0
DATA PW_LEVEL RN_FPU_CS:0
DATA PW_LEVEL RN_E:0
DATA PW_LEVEL RN_VMA:0
+DATA PW_LEVEL RN_AMIGA_BUS_ENABLE:0
+DATA PW_LEVEL RN_IPL_030_1_:0
+DATA PW_LEVEL RN_IPL_030_0_:0
END
diff --git a/Logic/68030_tk.grp b/Logic/68030_tk.grp
index b08563d..804ef82 100644
--- a/Logic/68030_tk.grp
+++ b/Logic/68030_tk.grp
@@ -1,15 +1,15 @@
-GROUP MACH_SEG_A SM_AMIGA_5_ AVEC
-GROUP MACH_SEG_B IPL_030_1_ RN_IPL_030_1_ IPL_030_0_ RN_IPL_030_0_ IPL_030_2_
- RN_IPL_030_2_ CLK_EXP RESET
+GROUP MACH_SEG_A SM_AMIGA_6_ AVEC
+GROUP MACH_SEG_B SM_AMIGA_5_ SM_AMIGA_7_ IPL_030_1_ RN_IPL_030_1_ IPL_030_0_
+ RN_IPL_030_0_ IPL_030_2_ RN_IPL_030_2_ inst_CLK_OUT_PRE SM_AMIGA_4_
+ CLK_CNT_0_ CLK_CNT_1_ CLK_EXP RESET
GROUP MACH_SEG_C AVEC_EXP AMIGA_BUS_ENABLE_LOW
GROUP MACH_SEG_D LDS_000 RN_LDS_000 UDS_000 RN_UDS_000 VMA RN_VMA BG_000
- RN_BG_000 AS_000 RN_AS_000 cpu_est_1_ cpu_est_2_ SM_AMIGA_6_ DTACK
- cpu_est_0_ inst_CLK_000_D1 AMIGA_BUS_ENABLE
+ RN_BG_000 AS_000 RN_AS_000 cpu_est_1_ AMIGA_BUS_ENABLE RN_AMIGA_BUS_ENABLE
+ DTACK cpu_est_0_ CLK_REF_1_
GROUP MACH_SEG_E CIIN BERR AMIGA_BUS_DATA_DIR
-GROUP MACH_SEG_F SM_AMIGA_4_
-GROUP MACH_SEG_G inst_VPA_SYNC inst_DTACK_SYNC SM_AMIGA_2_ E RN_E SM_AMIGA_3_
- SM_AMIGA_1_ inst_CLK_000_D0 CLK_DIV_OUT
+GROUP MACH_SEG_G inst_VPA_SYNC inst_DTACK_SYNC E RN_E cpu_est_2_ SM_AMIGA_2_
+ SM_AMIGA_3_ SM_AMIGA_0_ inst_CLK_000_D0 CLK_DIV_OUT inst_CLK_000_D2
+ inst_CLK_000_D1
GROUP MACH_SEG_H inst_AS_030_000_SYNC FPU_CS RN_FPU_CS DSACK_1_ RN_DSACK_1_
- SM_AMIGA_0_ SM_AMIGA_7_ BGACK_030 RN_BGACK_030 inst_CLK_OUT_PRE inst_VPA_D
- CLK_CNT_0_ DSACK_0_
\ No newline at end of file
+ SM_AMIGA_1_ BGACK_030 RN_BGACK_030 inst_VPA_D DSACK_0_
\ No newline at end of file
diff --git a/Logic/68030_tk.ipr b/Logic/68030_tk.ipr
index 06130dd..76f5e1b 100644
--- a/Logic/68030_tk.ipr
+++ b/Logic/68030_tk.ipr
@@ -1 +1 @@
-93:1176f=uNI
\ No newline at end of file
+715:716[ORb $
\ No newline at end of file
diff --git a/Logic/68030_tk.jed b/Logic/68030_tk.jed
index c9c994e..b70c97e 100644
--- a/Logic/68030_tk.jed
+++ b/Logic/68030_tk.jed
@@ -10,7 +10,7 @@ AUTHOR:
PATTERN:
COMPANY:
REVISION:
-DATE: Fri May 16 17:07:12 2014
+DATE: Sun May 18 21:01:51 2014
ABEL mach447a
*
@@ -31,47 +31,48 @@ NOTE Spread Placement? Y *
NOTE Run Time Upper Bound in 15 minutes 0 *
NOTE Zero Hold Time For Input Registers? Y *
NOTE Table of pin names and numbers*
-NOTE PINS A_17_:59 A_16_:96 SIZE_1_:79 A_31_:4 IPL_2_:68*
-NOTE PINS FC_1_:58 AS_030:82 DS_030:98 A_0_:69 nEXP_SPACE:14*
-NOTE PINS BERR:41 BG_030:21 IPL_1_:56 IPL_0_:67 DSACK_0_:80*
-NOTE PINS BGACK_000:28 FC_0_:57 CLK_030:64 CLK_000:11 CLK_OSZI:61*
-NOTE PINS CLK_DIV_OUT:65 AVEC:92 AVEC_EXP:22 VPA:36 RST:86*
-NOTE PINS RW:71 AMIGA_BUS_ENABLE:34 AMIGA_BUS_DATA_DIR:48*
-NOTE PINS AMIGA_BUS_ENABLE_LOW:20 CIIN:47 SIZE_0_:70 A_30_:5*
-NOTE PINS A_29_:6 A_28_:15 A_27_:16 A_26_:17 A_25_:18 A_24_:19*
-NOTE PINS A_23_:84 A_22_:85 A_21_:94 A_20_:93 A_19_:97 A_18_:95*
-NOTE PINS IPL_030_2_:9 DSACK_1_:81 AS_000:33 UDS_000:32 LDS_000:31*
-NOTE PINS IPL_030_1_:7 IPL_030_0_:8 BG_000:29 BGACK_030:83*
-NOTE PINS CLK_EXP:10 FPU_CS:78 DTACK:30 E:66 VMA:35 RESET:3*
+NOTE PINS SIZE_1_:79 A_31_:4 IPL_2_:68 FC_1_:58 AS_030:82*
+NOTE PINS DS_030:98 SIZE_0_:70 A_30_:5 nEXP_SPACE:14 A_29_:6*
+NOTE PINS BERR:41 A_28_:15 BG_030:21 A_27_:16 A_26_:17 A_25_:18*
+NOTE PINS BGACK_000:28 A_24_:19 CLK_030:64 A_23_:84 CLK_000:11*
+NOTE PINS A_22_:85 CLK_OSZI:61 A_21_:94 CLK_DIV_OUT:65 A_20_:93*
+NOTE PINS A_19_:97 A_18_:95 A_17_:59 AVEC:92 A_16_:96 AVEC_EXP:22*
+NOTE PINS VPA:36 RST:86 RW:71 AMIGA_BUS_DATA_DIR:48 AMIGA_BUS_ENABLE_LOW:20*
+NOTE PINS CIIN:47 A_0_:69 IPL_1_:56 IPL_0_:67 DSACK_0_:80*
+NOTE PINS FC_0_:57 IPL_030_2_:9 DSACK_1_:81 AS_000:33 UDS_000:32*
+NOTE PINS LDS_000:31 BG_000:29 BGACK_030:83 CLK_EXP:10 FPU_CS:78*
+NOTE PINS DTACK:30 E:66 VMA:35 RESET:3 AMIGA_BUS_ENABLE:34*
+NOTE PINS IPL_030_1_:7 IPL_030_0_:8 *
NOTE Table of node names and numbers*
-NOTE NODES RN_IPL_030_2_:131 RN_DSACK_1_:281 RN_AS_000:181 *
-NOTE NODES RN_UDS_000:191 RN_LDS_000:185 RN_IPL_030_1_:143 *
-NOTE NODES RN_IPL_030_0_:137 RN_BG_000:175 RN_BGACK_030:275 *
-NOTE NODES RN_FPU_CS:269 RN_DTACK:173 RN_E:251 RN_VMA:179 *
-NOTE NODES cpu_est_0_:194 cpu_est_1_:176 inst_AS_030_000_SYNC:271 *
-NOTE NODES inst_DTACK_SYNC:265 inst_VPA_D:289 inst_VPA_SYNC:259 *
-NOTE NODES inst_CLK_000_D0:257 inst_CLK_000_D1:193 inst_CLK_OUT_PRE:277 *
-NOTE NODES cpu_est_2_:188 CLK_CNT_0_:278 SM_AMIGA_6_:182 *
-NOTE NODES SM_AMIGA_7_:283 SM_AMIGA_1_:263 SM_AMIGA_4_:221 *
-NOTE NODES SM_AMIGA_3_:253 SM_AMIGA_5_:101 SM_AMIGA_2_:247 *
-NOTE NODES SM_AMIGA_0_:272 *
+NOTE NODES RN_IPL_030_2_:131 RN_DSACK_1_:281 RN_AS_000:187 *
+NOTE NODES RN_UDS_000:191 RN_LDS_000:185 RN_BG_000:175 RN_BGACK_030:275 *
+NOTE NODES RN_FPU_CS:269 RN_DTACK:173 RN_E:251 RN_VMA:181 *
+NOTE NODES RN_AMIGA_BUS_ENABLE:179 RN_IPL_030_1_:143 RN_IPL_030_0_:137 *
+NOTE NODES cpu_est_0_:176 cpu_est_1_:193 inst_AS_030_000_SYNC:271 *
+NOTE NODES inst_DTACK_SYNC:260 inst_VPA_D:283 inst_VPA_SYNC:254 *
+NOTE NODES inst_CLK_000_D0:263 inst_CLK_000_D1:257 inst_CLK_000_D2:247 *
+NOTE NODES inst_CLK_OUT_PRE:133 SM_AMIGA_6_:101 cpu_est_2_:265 *
+NOTE NODES CLK_REF_1_:182 SM_AMIGA_7_:145 SM_AMIGA_4_:139 *
+NOTE NODES SM_AMIGA_1_:277 CLK_CNT_0_:140 CLK_CNT_1_:134 *
+NOTE NODES SM_AMIGA_3_:248 SM_AMIGA_5_:128 SM_AMIGA_2_:259 *
+NOTE NODES SM_AMIGA_0_:253 *
NOTE BLOCK 0 *
L000000
- 111111111111111111111111111111111111111111111111111111111111111111
+ 111111111111111011110111111111111111111111111111111111111111111111
111111111011111111111111111111111111111111111111111111111111111111
111111111111111111111111111011111111111111111111111111111111111111
111111111111111111111111111111111111111111111111111111111111111111
+ 111111111111111111111111111111111111111111111111101111111111111111
111111111111111111111111111111111111111111111111111111111111111111
- 110111111111111111111111111111111111111111111111111111111111111111
111111111111111111111111111111111111111111111111111111111111111111
- 111111111111111111111111111111110111111111111111111111111111111111
- 101111111111111111111011111111011111111111111111111111111111111111*
+ 111111111111111111111111111111111111111111111111111111111111111111
+ 101111111111111111111111101111011111111111111111111111111111111111*
L000594
000000000000000000000000000000000000000000000000000000000000000000*
-L000660 111011111111111111111011110111110111111111111111111111111111111111*
-L000726 111111111111111111111111110111011111111111111111111111111111111111*
-L000792 000000000000000000000000000000000000000000000000000000000000000000*
-L000858 000000000000000000000000000000000000000000000000000000000000000000*
+L000660 111111111111111111111111011111011111111111111111111111111111111111*
+L000726 111111111111111111111111111011011111111111111111111111111111111111*
+L000792 111111111111111111111111111111011111111111111111011111111111111111*
+L000858 111111111111111011110111111111111111111111111111111111111111111111*
L000924 000000000000000000000000000000000000000000000000000000000000000000*
L000990 111111111111111111111111111111111111111111111111111111111111111111*
L001056 111111111111111111111111111111111111111111111111111111111111111111*
@@ -184,18 +185,18 @@ L006734 11110111110001*
L006748 11111111110011*
NOTE BLOCK 1 *
L006762
- 111111111111111111111111011111111111111111111111111111111111111111
- 111111111111111111111111111111111111111111111111111111111110111111
- 111111101011111101111011111111111111111111111111111111111111111111
- 101111111111111111111111111111111111111111111111111111011111111111
+ 110111111111111111111111111110111111111111111111111111110111111111
+ 111101111111011111111111111111111111111111111111111111111110111111
+ 111111101011111101111101111011111111111111111111111111111111110111
+ 101111111111111111110111111111111111111111111011111111011111111111
+ 111111111111111111111111111111111111111111111111101111111111111111
111111111111111111111111111111111111111111111111111111111111111111
- 110111111111111111111111111111111111111111111111111111111111111111
- 111111111111111111111111111111111111111111111111111111111111111111
- 111111111111111111111111111011111111111111111111111111111111111111
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L007356
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L008808
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L011712
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L012438
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L013524
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L020272 11111111111111*
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L020286
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L024510
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L025962
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L026622 111111111111111111111111111111111111111111111111111111111111111111*
L026688
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L027048
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L033810
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L040080 111111111111111111111111111111111111111111111111111111111111111111*
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L040212
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L040572
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L042618
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L044070
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L044598 101111111111111111111111111111111111111111111111111111111111111111*
-L044664 111101111111111011111101111110111010111111110111111111110111111111*
-L044730 000000000000000000000000000000000000000000000000000000000000000000*
+L044664 111111111111111111111111111110111111111111111110111111111111110111*
+L044730 111111111111111111110111111110111111111111111111111111111111111111*
L044796
000000000000000000000000000000000000000000000000000000000000000000*
-L044862 111111111111111111111111111111111111111111111111111111111111111111*
-L044928 111111111111111111111111111111111111111111111111111111111111111111*
-L044994 111111111111111111111111111111111111111111111111111111111111111111*
-L045060 111111111111111111111111111111111111111111111111111111111111111111*
-L045126 111111111111111111111111111111111111111111111111111111111111111111*
+L044862 111111111110111111111111111111111111111011111111111111111111111111*
+L044928 111111111111111111111111111111111111111111011111111111111111111111*
+L044994 101111111111111111111111111111111111111111111111111111111111111111*
+L045060 111111011111111111101101111101111111111111111111111111111111110111*
+L045126 000000000000000000000000000000000000000000000000000000000000000000*
L045192 111111111111111111111111111111111111111111111111111111111111111111*
L045258 111111111111111111111111111111111111111111111111111111111111111111*
L045324 111111111111111111111111111111111111111111111111111111111111111111*
@@ -902,15 +903,15 @@ L045390 111111111111111111111111111111111111111111111111111111111111111111*
L045456 111111111111111111111111111111111111111111111111111111111111111111*
L045522
000000000000000000000000000000000000000000000000000000000000000000*
-L045588 110111111111111111111111111111111111111111111101111111111111111111*
-L045654 111111110111111111111111111111111111111111111111111111111111111111*
-L045720 101111111111111111111111111111111111111111111111111111111111111111*
-L045786 111111111111111111111111111011111111111111111101111111111111111111*
-L045852 111111111111111111111111111111111111111111111111011111110111111111*
-L045918 111111111111111111111111101111111111111011111111111111111111111111*
-L045984 111111110111111111111111111111111111111111111111111111111111111111*
-L046050 101111111111111111111111111111111111111111111111111111111111111111*
-L046116 111111111111110111101111111111111111111111110111111111110111111111*
+L045588 111111011111111111111111111111111111111111111111111111111111111111*
+L045654 111111111111111111111111111111111111111111111111111111111111111111*
+L045720 111111111111111111111111111111111111111111111111111111111111111111*
+L045786 111111111111111111111111111111111111111111111111111111111111111111*
+L045852 111111111111111111111111111111111111111111111111111111111111111111*
+L045918 111111111111111111111111011111111111111111111111111111111111111111*
+L045984 111101111111111111111111101001110111111111111111111111111111111111*
+L046050 111011111111111111111111101001111011111111111111111111111111111111*
+L046116 111010111111111111111111011001110111111111111111111111111111111111*
L046182 000000000000000000000000000000000000000000000000000000000000000000*
L046248
000000000000000000000000000000000000000000000000000000000000000000*
@@ -929,32 +930,32 @@ L046974
000000000000000000000000000000000000000000000000000000000000000000*
L047106 0010*
L047110 00100110010000*
-L047124 10101110001110*
-L047138 11011111110100*
-L047152 11111011111111*
-L047166 10100111011000*
-L047180 10101110000010*
-L047194 11011111110001*
-L047208 11111011110011*
-L047222 00110110010000*
-L047236 11101100000010*
-L047250 11011111110000*
-L047264 11110011110011*
-L047278 10101110000000*
-L047292 11101100000010*
-L047306 11011011110001*
-L047320 11110111111110*
+L047124 00100110011110*
+L047138 10101110000100*
+L047152 11100011111111*
+L047166 10100111011001*
+L047180 10101110000011*
+L047194 11101100000000*
+L047208 11101111110011*
+L047222 00110110010001*
+L047236 10101110000011*
+L047250 11101100000000*
+L047264 11101011110010*
+L047278 00110110010000*
+L047292 00100110010011*
+L047306 11011111110000*
+L047320 11110011111110*
NOTE BLOCK 7 *
L047334
111111111111111011111111111111111111111110111111111111111111111111
- 111111111001111111111111111111111111111111111111111111111111111111
- 111111111111101111111111111111111111111111111111111111111011111111
+ 111111111101111111111111111111111111111111101111111111101111111111
+ 111111111111101111111011111111111111111111111111111111110111111111
111011111111111110111111111111111111111111111111111111111111111111
111111111111111111111111111111111111111111111111111111111111111111
- 111111111111111111111111011111111111011111111111111111111101111111
- 111111101111111111111101111111111101111111111111111111101111111111
- 111111111111111111101111111011111111111111101110011111111111111111
- 101111111111111111110111111110111111111011111111111111111111101111*
+ 111111111111111111111111011111111111011111111111111111111111111111
+ 111111101111111111111101111111111101111111111111111111111111111111
+ 111111111011111111101111111111111111111111111110111111111111111111
+ 101111111111111111111111110111111111111011111111111111111111101111*
L047928
000000000000000000000000000000000000000000000000000000000000000000*
L047994 110111111111011101101110101111111110011101111111111111111111111111*
@@ -969,11 +970,11 @@ L048522 111111111111111111111111111111111111110110111111111111111111111111*
L048588 000000000000000000000000000000000000000000000000000000000000000000*
L048654
000000000000000000000000000000000000000000000000000000000000000000*
-L048720 111111111111110111111111110111111111111111111111111111111110111111*
-L048786 111111111111111111111111111101111111111111111111101111111111111111*
-L048852 111111111111111111111111111101111111111111111111111111111011111111*
-L048918 000000000000000000000000000000000000000000000000000000000000000000*
-L048984 000000000000000000000000000000000000000000000000000000000000000000*
+L048720 111111111111111111111111111111111111111111111111111111111111111111*
+L048786 111111111111111111111111111111111111111111111111111111111111111111*
+L048852 111111111111111111111111111111111111111111111111111111111111111111*
+L048918 111111111111111111111111111111111111111111111111111111111111111111*
+L048984 111111111111111111111111111111111111111111111111111111111111111111*
L049050 111111111111111111111111111111111111111111111111111111111111111111*
L049116 111111111111111111111111111111111111111111111111111111111111111111*
L049182 111111111111111111111111111111111111111111111111111111111111111111*
@@ -982,20 +983,20 @@ L049314 111111111111111111111111111111111111111111111111111111111111111111*
L049380
111111111111111111111111111111111111111111111111111111111111111111*
L049446 111111111111111111111111111111111111011111111101111111111111111111*
-L049512 111111111111111111111111111111111111011111111111111111110110111111*
+L049512 111111111111110111111011111111111111011111111111111111111111111111*
L049578 000000000000000000000000000000000000000000000000000000000000000000*
L049644 000000000000000000000000000000000000000000000000000000000000000000*
L049710 000000000000000000000000000000000000000000000000000000000000000000*
-L049776 111111111111111111111111111011111111111111011111111111111111111111*
-L049842 111111110111111111111111111111111111111111111111111111111111111111*
-L049908 000000000000000000000000000000000000000000000000000000000000000000*
-L049974 111111111111111111111111110111111111111111101111111111111111111111*
+L049776 111111110111110111111111111111111111111111111111111111111111111111*
+L049842 111111111111110111111111111111111111111111111111111111011111111111*
+L049908 111111110111111111111111111111111111111111111111111111101011111111*
+L049974 000000000000000000000000000000000000000000000000000000000000000000*
L050040 000000000000000000000000000000000000000000000000000000000000000000*
L050106
000000000000000000000000000000000000000000000000000000000000000000*
-L050172 111111111111111111111111111111111111111111101111111111111111111111*
-L050238 111111110111111111111111111111111111111111111111111111111111111111*
-L050304 000000000000000000000000000000000000000000000000000000000000000000*
+L050172 111111111111111111111111111111111111111111111111111111111111111111*
+L050238 111111111111111111111111111111111111111111111111111111111111111111*
+L050304 111111111111111111111111111111111111111111111111111111111111111111*
L050370 111111111111111111111111111111111111111111111111111111111111111111*
L050436 111111111111111111111111111111111111111111111111111111111111111111*
L050502 111111111111111111111111111111111111111111111111111111111111111111*
@@ -1006,15 +1007,15 @@ L050766 111111111111111111111111111111111111111111111111111111111111111111*
L050832
111111111101111111111111111111111111111111111111111111111111111111*
L050898 111111101111111111101111111111111111111111111111111111111111111111*
-L050964 111111111111110111111111110111111111111111111111111111111110111111*
+L050964 111111110111111011111111111111111111111111111111111111110111111111*
L051030 000000000000000000000000000000000000000000000000000000000000000000*
L051096 000000000000000000000000000000000000000000000000000000000000000000*
L051162 000000000000000000000000000000000000000000000000000000000000000000*
-L051228 111111111111111111111111111111111111111111111111111111010111111111*
-L051294 111111111111111111111111111101111111111111111111011111110111111111*
+L051228 111111111111111111111111110111111111111111111111111111111111111111*
+L051294 111111111111111111111111111111111111111111011111111111111111111111*
L051360 000000000000000000000000000000000000000000000000000000000000000000*
-L051426 000000000000000000000000000000000000000000000000000000000000000000*
-L051492 000000000000000000000000000000000000000000000000000000000000000000*
+L051426 111111111111111111111111111111111111111111111111111111111111111111*
+L051492 111111111111111111111111111111111111111111111111111111111111111111*
L051558
111111111101111111111111111111111111111111111111111111111111111111*
L051624 111111111111111111111111111111111111111111111111111111111111111111*
@@ -1034,9 +1035,9 @@ L052416 111111111111111111111111111111111111111111111111111111111111111111*
L052482 111111111111111111111111111111111111111111111111111111111111111111*
L052548 111111111111111111111111111111111111111111111111111111111111111111*
L052614 111111111111111111111111111111111111111111111111111111111111111111*
-L052680 111111111111111111110111111111111111111111111111111111111111111111*
-L052746 111111110111111111111111111111111111111111111111111111111111111111*
-L052812 000000000000000000000000000000000000000000000000000000000000000000*
+L052680 111111111111111111111111111111111111111111111111111111111111111111*
+L052746 111111111111111111111111111111111111111111111111111111111111111111*
+L052812 111111111111111111111111111111111111111111111111111111111111111111*
L052878 111111111111111111111111111111111111111111111111111111111111111111*
L052944 111111111111111111111111111111111111111111111111111111111111111111*
L053010
@@ -1057,20 +1058,20 @@ L053736
L053868 0010*
L053872 11100110011000*
L053886 10100110010010*
-L053900 10100100010000*
-L053914 11100011110011*
-L053928 10100110010001*
-L053942 10101110001111*
-L053956 00011110000000*
-L053970 11101111110011*
-L053984 11100110010001*
-L053998 10100110010011*
-L054012 11011011110100*
-L054026 11111111111110*
-L054040 00110011111000*
-L054054 00001110000011*
-L054068 11011011110100*
-L054082 11111111111110*
+L053900 11011111110000*
+L053914 11111011110011*
+L053928 10100110010000*
+L053942 10100100011110*
+L053956 11011111110001*
+L053970 11111011110011*
+L053984 11100110010000*
+L053998 00001110000010*
+L054012 11010011110100*
+L054026 11111011111111*
+L054040 00111111111000*
+L054054 11000011110010*
+L054068 11111011110101*
+L054082 11110111111111*
E1
0
00000000
@@ -1090,6 +1091,6 @@ E1
00000000
1
*
-CF4AD*
+C9018*
U00000000000000000000000000000000*
-A5B2
+B9C5
diff --git a/Logic/68030_tk.lco b/Logic/68030_tk.lco
index 344e44c..ca16c3f 100644
--- a/Logic/68030_tk.lco
+++ b/Logic/68030_tk.lco
@@ -16,8 +16,8 @@ RCS = "$Revision: 1.2 $";
Parent = m4a5.lci;
SDS_File = m4a5.sds;
Design = 68030_tk.tt4;
-DATE = 5/16/14;
-TIME = 17:07:12;
+DATE = 5/18/14;
+TIME = 21:01:51;
Source_Format = Pure_VHDL;
Type = TT2;
Pre_Fit_Time = 1;
@@ -76,57 +76,54 @@ Usercode_Format = Hex;
[LOCATION ASSIGNMENTS]
Layer = OFF;
-A_17_ = pin,59,-,F,-;
-A_16_ = pin,96,-,A,-;
SIZE_1_ = pin,79,-,H,-;
A_31_ = pin,4,-,B,-;
IPL_2_ = pin,68,-,G,-;
FC_1_ = pin,58,-,F,-;
AS_030 = pin,82,-,H,-;
DS_030 = pin,98,-,A,-;
-A_0_ = pin,69,-,G,-;
+SIZE_0_ = pin,70,-,G,-;
+A_30_ = pin,5,-,B,-;
nEXP_SPACE = pin,14,-,-,-;
+A_29_ = pin,6,-,B,-;
BERR = pin,41,-,E,-;
+A_28_ = pin,15,-,C,-;
BG_030 = pin,21,-,C,-;
-IPL_1_ = pin,56,-,F,-;
-IPL_0_ = pin,67,-,G,-;
-DSACK_0_ = pin,80,-,H,-;
+A_27_ = pin,16,-,C,-;
+A_26_ = pin,17,-,C,-;
+A_25_ = pin,18,-,C,-;
BGACK_000 = pin,28,-,D,-;
-FC_0_ = pin,57,-,F,-;
+A_24_ = pin,19,-,C,-;
CLK_030 = pin,64,-,-,-;
+A_23_ = pin,84,-,H,-;
CLK_000 = pin,11,-,-,-;
+A_22_ = pin,85,-,H,-;
CLK_OSZI = pin,61,-,-,-;
+A_21_ = pin,94,-,A,-;
CLK_DIV_OUT = pin,65,-,G,-;
+A_20_ = pin,93,-,A,-;
+A_19_ = pin,97,-,A,-;
+A_18_ = pin,95,-,A,-;
+A_17_ = pin,59,-,F,-;
AVEC = pin,92,-,A,-;
+A_16_ = pin,96,-,A,-;
AVEC_EXP = pin,22,-,C,-;
VPA = pin,36,-,-,-;
RST = pin,86,-,-,-;
RW = pin,71,-,G,-;
-AMIGA_BUS_ENABLE = pin,34,-,D,-;
AMIGA_BUS_DATA_DIR = pin,48,-,E,-;
AMIGA_BUS_ENABLE_LOW = pin,20,-,C,-;
CIIN = pin,47,-,E,-;
-SIZE_0_ = pin,70,-,G,-;
-A_30_ = pin,5,-,B,-;
-A_29_ = pin,6,-,B,-;
-A_28_ = pin,15,-,C,-;
-A_27_ = pin,16,-,C,-;
-A_26_ = pin,17,-,C,-;
-A_25_ = pin,18,-,C,-;
-A_24_ = pin,19,-,C,-;
-A_23_ = pin,84,-,H,-;
-A_22_ = pin,85,-,H,-;
-A_21_ = pin,94,-,A,-;
-A_20_ = pin,93,-,A,-;
-A_19_ = pin,97,-,A,-;
-A_18_ = pin,95,-,A,-;
+A_0_ = pin,69,-,G,-;
+IPL_1_ = pin,56,-,F,-;
+IPL_0_ = pin,67,-,G,-;
+DSACK_0_ = pin,80,-,H,-;
+FC_0_ = pin,57,-,F,-;
IPL_030_2_ = pin,9,-,B,-;
DSACK_1_ = pin,81,-,H,-;
AS_000 = pin,33,-,D,-;
UDS_000 = pin,32,-,D,-;
LDS_000 = pin,31,-,D,-;
-IPL_030_1_ = pin,7,-,B,-;
-IPL_030_0_ = pin,8,-,B,-;
BG_000 = pin,29,-,D,-;
BGACK_030 = pin,83,-,H,-;
CLK_EXP = pin,10,-,B,-;
@@ -135,25 +132,31 @@ DTACK = pin,30,-,D,-;
E = pin,66,-,G,-;
VMA = pin,35,-,D,-;
RESET = pin,3,-,B,-;
-cpu_est_0_ = node,-,-,D,14;
-cpu_est_1_ = node,-,-,D,2;
+AMIGA_BUS_ENABLE = pin,34,-,D,-;
+IPL_030_1_ = pin,7,-,B,-;
+IPL_030_0_ = pin,8,-,B,-;
+cpu_est_0_ = node,-,-,D,2;
+cpu_est_1_ = node,-,-,D,13;
inst_AS_030_000_SYNC = node,-,-,H,1;
-inst_DTACK_SYNC = node,-,-,G,13;
-inst_VPA_D = node,-,-,H,13;
-inst_VPA_SYNC = node,-,-,G,9;
-inst_CLK_000_D0 = node,-,-,G,8;
-inst_CLK_000_D1 = node,-,-,D,13;
-inst_CLK_OUT_PRE = node,-,-,H,5;
-cpu_est_2_ = node,-,-,D,10;
-CLK_CNT_0_ = node,-,-,H,6;
-SM_AMIGA_6_ = node,-,-,D,6;
-SM_AMIGA_7_ = node,-,-,H,9;
-SM_AMIGA_1_ = node,-,-,G,12;
-SM_AMIGA_4_ = node,-,-,F,0;
-SM_AMIGA_3_ = node,-,-,G,5;
-SM_AMIGA_5_ = node,-,-,A,0;
-SM_AMIGA_2_ = node,-,-,G,1;
-SM_AMIGA_0_ = node,-,-,H,2;
+inst_DTACK_SYNC = node,-,-,G,10;
+inst_VPA_D = node,-,-,H,9;
+inst_VPA_SYNC = node,-,-,G,6;
+inst_CLK_000_D0 = node,-,-,G,12;
+inst_CLK_000_D1 = node,-,-,G,8;
+inst_CLK_000_D2 = node,-,-,G,1;
+inst_CLK_OUT_PRE = node,-,-,B,5;
+SM_AMIGA_6_ = node,-,-,A,0;
+cpu_est_2_ = node,-,-,G,13;
+CLK_REF_1_ = node,-,-,D,6;
+SM_AMIGA_7_ = node,-,-,B,13;
+SM_AMIGA_4_ = node,-,-,B,9;
+SM_AMIGA_1_ = node,-,-,H,5;
+CLK_CNT_0_ = node,-,-,B,10;
+CLK_CNT_1_ = node,-,-,B,6;
+SM_AMIGA_3_ = node,-,-,G,2;
+SM_AMIGA_5_ = node,-,-,B,2;
+SM_AMIGA_2_ = node,-,-,G,9;
+SM_AMIGA_0_ = node,-,-,G,5;
[GROUP ASSIGNMENTS]
Layer = OFF;
diff --git a/Logic/68030_tk.out b/Logic/68030_tk.out
index 69bdd83..220684f 100644
--- a/Logic/68030_tk.out
+++ b/Logic/68030_tk.out
@@ -51269,4 +51269,4298 @@
5 A_29_ 1 -1 -1 1 4 5 -1
4 A_30_ 1 -1 -1 1 4 4 -1
3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+91 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 315 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 6 29 -1 1 0 21
+ 30 LDS_000 5 318 3 0 30 -1 12 0 21
+ 31 UDS_000 5 317 3 0 31 -1 8 0 21
+ 65 E 5 324 6 0 65 -1 3 0 21
+ 28 BG_000 5 319 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 314 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 322 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 321 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 320 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 323 7 0 77 -1 2 0 21
+ 34 VMA 5 325 3 0 34 -1 2 0 21
+ 32 AS_000 5 316 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 302 inst_CLK_000_D0 3 -1 3 6 0 1 3 5 6 7 -1 -1 1 0 20
+ 303 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
+ 306 SM_AMIGA_6_ 3 -1 0 3 0 3 7 -1 -1 3 0 21
+ 304 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 0 20
+ 323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 309 SM_AMIGA_4_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
+ 307 SM_AMIGA_7_ 3 -1 6 3 0 3 6 -1 -1 2 0 20
+ 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
+ 324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
+ 308 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 305 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
+ 294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
+ 325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
+ 320 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 316 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
+ 311 SM_AMIGA_5_ 3 -1 7 2 5 7 -1 -1 2 0 21
+ 298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
+ 318 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 317 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 321 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 319 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 314 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 313 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
+ 312 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
+ 310 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
+ 315 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 301 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 300 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 3 3 6 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 7 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 3 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+93 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 2 29 -1 1 0 21
+ 30 LDS_000 5 320 3 0 30 -1 12 0 21
+ 31 UDS_000 5 319 3 0 31 -1 8 0 21
+ 65 E 5 326 6 0 65 -1 3 0 21
+ 28 BG_000 5 321 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 325 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 324 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 322 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 323 7 0 77 -1 2 0 21
+ 34 VMA 5 327 3 0 34 -1 2 0 21
+ 32 AS_000 5 318 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
+ 302 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 4 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
+ 326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 312 SM_AMIGA_3_ 3 -1 6 3 2 5 6 -1 -1 3 0 20
+ 303 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
+ 323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 318 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21
+ 311 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
+ 298 inst_VPA_D 3 -1 7 3 2 3 5 -1 -1 1 0 20
+ 310 CLK_CNT_1_ 3 -1 1 2 0 1 -1 -1 4 0 20
+ 315 SM_AMIGA_0_ 3 -1 6 2 0 6 -1 -1 3 0 20
+ 314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 309 CLK_CNT_0_ 3 -1 0 2 0 1 -1 -1 3 0 21
+ 308 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
+ 306 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 3 0 21
+ 327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 313 SM_AMIGA_5_ 3 -1 0 2 0 7 -1 -1 2 0 20
+ 307 SM_AMIGA_7_ 3 -1 0 2 0 3 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 2 2 2 6 -1 -1 2 0 21
+ 305 CLK_REF_1_ 3 -1 3 2 0 1 -1 -1 1 0 20
+ 304 CLK_REF_0_ 3 -1 7 2 0 1 -1 -1 1 0 20
+ 320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 60 CLK_OSZI 9 -1 6 0 1 2 3 6 7 60 -1
+ 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 2 3 5 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 7 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 7 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+92 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 1 29 -1 1 0 21
+ 30 LDS_000 5 319 3 0 30 -1 12 0 21
+ 31 UDS_000 5 318 3 0 31 -1 8 0 21
+ 65 E 5 325 6 0 65 -1 3 0 21
+ 28 BG_000 5 320 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 322 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 321 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 323 7 0 77 -1 2 0 21
+ 34 VMA 5 326 3 0 34 -1 2 0 21
+ 32 AS_000 5 317 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 6 5 1 3 5 6 7 -1 -1 1 0 21
+ 301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
+ 325 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 311 SM_AMIGA_3_ 3 -1 7 3 1 5 7 -1 -1 3 0 21
+ 303 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
+ 302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
+ 323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 298 inst_VPA_D 3 -1 6 3 1 3 5 -1 -1 1 0 21
+ 305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
+ 326 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 317 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
+ 312 SM_AMIGA_5_ 3 -1 6 2 6 7 -1 -1 2 0 20
+ 308 SM_AMIGA_4_ 3 -1 7 2 3 7 -1 -1 2 0 21
+ 306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 5 2 5 7 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 1 2 1 7 -1 -1 2 0 21
+ 319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 322 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
+ 313 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 3 0 21
+ 307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
+ 316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 304 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 1 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 5 0 1 3 5 7 81 -1
+ 63 CLK_030 1 -1 -1 3 0 3 7 63 -1
+ 96 A_19_ 1 -1 -1 2 0 7 96 -1
+ 95 A_16_ 1 -1 -1 2 0 7 95 -1
+ 94 A_18_ 1 -1 -1 2 0 7 94 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 58 A_17_ 1 -1 -1 2 0 7 58 -1
+ 57 FC_1_ 1 -1 -1 2 0 7 57 -1
+ 56 FC_0_ 1 -1 -1 2 0 7 56 -1
+ 27 BGACK_000 1 -1 -1 2 0 7 27 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 6 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 3 0 3 7 -1 -1
+93 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 6 29 -1 1 0 21
+ 30 LDS_000 5 320 3 0 30 -1 12 0 21
+ 31 UDS_000 5 319 3 0 31 -1 8 0 21
+ 65 E 5 326 6 0 65 -1 3 0 21
+ 28 BG_000 5 321 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 325 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 324 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 322 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 323 7 0 77 -1 2 0 21
+ 34 VMA 5 327 3 0 34 -1 2 0 21
+ 32 AS_000 5 318 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 0 5 1 3 5 6 7 -1 -1 1 0 21
+ 301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
+ 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
+ 326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 304 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 1 20
+ 303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
+ 323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 318 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
+ 308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
+ 298 inst_VPA_D 3 -1 7 3 3 5 6 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
+ 315 SM_AMIGA_0_ 3 -1 7 2 6 7 -1 -1 3 0 21
+ 312 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 311 SM_AMIGA_3_ 3 -1 6 2 5 6 -1 -1 3 0 20
+ 306 SM_AMIGA_6_ 3 -1 3 2 3 7 -1 -1 3 0 21
+ 327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 313 SM_AMIGA_5_ 3 -1 7 2 1 7 -1 -1 2 0 21
+ 307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
+ 302 inst_CLK_000_D2 3 -1 3 2 6 7 -1 -1 1 0 20
+ 320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 314 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
+ 317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 305 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 5 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 3 5 6 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 7 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 0 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+92 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 1 29 -1 1 0 21
+ 30 LDS_000 5 319 3 0 30 -1 12 0 21
+ 31 UDS_000 5 318 3 0 31 -1 8 0 21
+ 65 E 5 325 6 0 65 -1 3 0 21
+ 28 BG_000 5 320 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 321 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 322 7 0 77 -1 2 0 21
+ 34 VMA 5 326 3 0 34 -1 2 0 21
+ 32 AS_000 5 317 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 6 5 1 3 5 6 7 -1 -1 1 0 21
+ 301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
+ 325 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 311 SM_AMIGA_3_ 3 -1 7 3 1 5 7 -1 -1 3 0 21
+ 303 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
+ 302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
+ 322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 298 inst_VPA_D 3 -1 6 3 1 3 5 -1 -1 1 0 21
+ 305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
+ 326 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 317 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
+ 312 SM_AMIGA_5_ 3 -1 6 2 6 7 -1 -1 2 0 20
+ 308 SM_AMIGA_4_ 3 -1 7 2 3 7 -1 -1 2 0 21
+ 306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 5 2 5 7 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 1 2 1 7 -1 -1 2 0 21
+ 319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
+ 313 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 3 0 21
+ 307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
+ 316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 304 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 1 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 5 0 1 3 5 7 81 -1
+ 63 CLK_030 1 -1 -1 3 0 3 7 63 -1
+ 96 A_19_ 1 -1 -1 2 0 7 96 -1
+ 95 A_16_ 1 -1 -1 2 0 7 95 -1
+ 94 A_18_ 1 -1 -1 2 0 7 94 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 58 A_17_ 1 -1 -1 2 0 7 58 -1
+ 57 FC_1_ 1 -1 -1 2 0 7 57 -1
+ 56 FC_0_ 1 -1 -1 2 0 7 56 -1
+ 27 BGACK_000 1 -1 -1 2 0 7 27 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 6 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 3 0 3 7 -1 -1
+93 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 0 29 -1 1 0 21
+ 30 LDS_000 5 320 3 0 30 -1 12 0 21
+ 31 UDS_000 5 319 3 0 31 -1 8 0 21
+ 65 E 5 324 6 0 65 -1 3 0 21
+ 28 BG_000 5 321 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 326 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 325 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 322 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 323 7 0 77 -1 2 0 21
+ 34 VMA 5 327 3 0 34 -1 2 0 21
+ 32 AS_000 5 318 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 20
+ 302 inst_CLK_OUT_PRE 3 -1 1 4 1 2 6 7 -1 -1 4 0 20
+ 294 cpu_est_0_ 3 -1 7 4 3 5 6 7 -1 -1 3 0 20
+ 301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
+ 324 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 312 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
+ 308 SM_AMIGA_1_ 3 -1 6 3 2 6 7 -1 -1 3 0 20
+ 303 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 1 20
+ 323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 318 RN_AS_000 3 32 3 3 0 2 3 32 -1 2 0 21
+ 311 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
+ 298 inst_VPA_D 3 -1 7 3 0 3 5 -1 -1 1 0 20
+ 310 CLK_CNT_1_ 3 -1 0 2 0 1 -1 -1 4 0 21
+ 315 SM_AMIGA_0_ 3 -1 2 2 0 2 -1 -1 3 0 21
+ 309 CLK_CNT_0_ 3 -1 1 2 0 1 -1 -1 3 0 20
+ 306 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
+ 327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 313 SM_AMIGA_5_ 3 -1 6 2 6 7 -1 -1 2 0 20
+ 307 SM_AMIGA_7_ 3 -1 0 2 0 3 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 20
+ 305 CLK_REF_1_ 3 -1 7 2 0 1 -1 -1 1 0 20
+ 304 CLK_REF_0_ 3 -1 3 2 0 1 -1 -1 1 0 20
+ 320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 314 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
+ 317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 60 CLK_OSZI 9 -1 7 0 1 2 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 7 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 7 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+92 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 1 29 -1 1 0 21
+ 30 LDS_000 5 319 3 0 30 -1 12 0 21
+ 31 UDS_000 5 318 3 0 31 -1 8 0 21
+ 65 E 5 325 6 0 65 -1 3 0 21
+ 28 BG_000 5 320 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 321 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 322 7 0 77 -1 2 0 21
+ 34 VMA 5 326 3 0 34 -1 2 0 21
+ 32 AS_000 5 317 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 6 5 1 3 5 6 7 -1 -1 1 0 21
+ 301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
+ 325 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 311 SM_AMIGA_3_ 3 -1 7 3 1 5 7 -1 -1 3 0 21
+ 303 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
+ 302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
+ 322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 298 inst_VPA_D 3 -1 6 3 1 3 5 -1 -1 1 0 21
+ 305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
+ 326 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 317 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
+ 312 SM_AMIGA_5_ 3 -1 6 2 6 7 -1 -1 2 0 20
+ 308 SM_AMIGA_4_ 3 -1 7 2 3 7 -1 -1 2 0 21
+ 306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 5 2 5 7 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 1 2 1 7 -1 -1 2 0 21
+ 319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
+ 313 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 3 0 21
+ 307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
+ 316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 304 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 1 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 5 0 1 3 5 7 81 -1
+ 63 CLK_030 1 -1 -1 3 0 3 7 63 -1
+ 96 A_19_ 1 -1 -1 2 0 7 96 -1
+ 95 A_16_ 1 -1 -1 2 0 7 95 -1
+ 94 A_18_ 1 -1 -1 2 0 7 94 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 58 A_17_ 1 -1 -1 2 0 7 58 -1
+ 57 FC_1_ 1 -1 -1 2 0 7 57 -1
+ 56 FC_0_ 1 -1 -1 2 0 7 56 -1
+ 27 BGACK_000 1 -1 -1 2 0 7 27 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 6 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 3 0 3 7 -1 -1
+96 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 0 29 -1 1 0 21
+ 30 LDS_000 5 323 3 0 30 -1 13 0 21
+ 31 UDS_000 5 322 3 0 31 -1 9 0 21
+ 65 E 5 327 6 0 65 -1 3 0 21
+ 28 BG_000 5 324 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 325 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 326 7 0 77 -1 2 0 21
+ 34 VMA 5 328 3 0 34 -1 2 0 21
+ 32 AS_000 5 321 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
+ 294 cpu_est_0_ 3 -1 7 4 1 3 6 7 -1 -1 3 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 20
+ 327 RN_E 3 65 6 3 1 3 6 65 -1 3 0 21
+ 315 SM_AMIGA_3_ 3 -1 7 3 0 1 7 -1 -1 3 0 21
+ 305 cpu_est_2_ 3 -1 1 3 1 3 6 -1 -1 3 1 20
+ 304 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 312 SM_AMIGA_4_ 3 -1 6 3 3 6 7 -1 -1 2 0 20
+ 310 inst_CLK_000_D4 3 -1 6 3 0 1 7 -1 -1 1 0 21
+ 309 inst_CLK_000_D2 3 -1 7 3 3 6 7 -1 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 20
+ 298 inst_VPA_D 3 -1 5 3 0 1 3 -1 -1 1 0 21
+ 307 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
+ 311 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
+ 328 RN_VMA 3 34 3 2 1 3 34 -1 2 0 21
+ 325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
+ 308 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 1 2 1 7 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 0 2 0 7 -1 -1 2 0 21
+ 303 inst_CLK_000_D5 3 -1 7 2 0 1 -1 -1 1 0 20
+ 302 inst_CLK_000_D3 3 -1 7 2 3 6 -1 -1 1 0 20
+ 323 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
+ 322 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
+ 330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 318 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
+ 317 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 3 0 21
+ 320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 316 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
+ 314 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 313 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 306 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 4 1 5 6 7 60 -1
+ 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 5 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 7 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+93 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 1 29 -1 1 0 21
+ 30 LDS_000 5 320 3 0 30 -1 13 0 21
+ 31 UDS_000 5 319 3 0 31 -1 9 0 21
+ 65 E 5 324 6 0 65 -1 3 0 21
+ 28 BG_000 5 321 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 322 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 323 7 0 77 -1 2 0 21
+ 34 VMA 5 325 3 0 34 -1 2 0 21
+ 32 AS_000 5 318 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
+ 303 inst_CLK_OUT_PRE 3 -1 6 4 0 1 6 7 -1 -1 3 1 21
+ 301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
+ 324 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 312 SM_AMIGA_3_ 3 -1 6 3 1 5 6 -1 -1 3 0 20
+ 304 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
+ 323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 309 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
+ 307 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
+ 298 inst_VPA_D 3 -1 1 3 1 3 5 -1 -1 1 0 20
+ 306 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
+ 314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 20
+ 308 SM_AMIGA_1_ 3 -1 0 2 0 7 -1 -1 3 0 21
+ 325 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 318 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
+ 313 SM_AMIGA_5_ 3 -1 6 2 6 7 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
+ 302 inst_CLK_000_D2 3 -1 7 2 3 6 -1 -1 1 0 20
+ 320 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
+ 319 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
+ 327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 315 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
+ 317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 311 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 310 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 305 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 1 3 5 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 1 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 1 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+95 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 2 29 -1 1 0 21
+ 30 LDS_000 5 322 3 0 30 -1 13 0 21
+ 31 UDS_000 5 321 3 0 31 -1 9 0 21
+ 65 E 5 326 6 0 65 -1 3 0 21
+ 28 BG_000 5 323 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 324 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 325 7 0 77 -1 2 0 21
+ 34 VMA 5 327 3 0 34 -1 2 0 21
+ 32 AS_000 5 320 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 20
+ 304 inst_CLK_OUT_PRE 3 -1 6 4 0 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 7 4 3 5 6 7 -1 -1 3 0 20
+ 301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
+ 295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
+ 326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 314 SM_AMIGA_3_ 3 -1 6 3 2 5 6 -1 -1 3 0 20
+ 305 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
+ 325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 311 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
+ 303 inst_CLK_000_D3 3 -1 7 3 2 5 7 -1 -1 1 0 20
+ 302 inst_CLK_000_D2 3 -1 7 3 1 3 7 -1 -1 1 0 20
+ 298 inst_VPA_D 3 -1 6 3 2 3 5 -1 -1 1 0 21
+ 307 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 4 0 21
+ 296 inst_AS_030_000_SYNC 3 -1 1 2 1 3 -1 -1 4 0 21
+ 316 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 310 SM_AMIGA_1_ 3 -1 7 2 0 7 -1 -1 3 0 21
+ 327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 320 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
+ 315 SM_AMIGA_5_ 3 -1 1 2 1 7 -1 -1 2 0 21
+ 308 SM_AMIGA_7_ 3 -1 0 2 0 3 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 2 2 2 6 -1 -1 2 0 21
+ 309 inst_CLK_000_D4 3 -1 7 2 2 5 -1 -1 1 0 20
+ 322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
+ 321 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
+ 329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 317 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 3 0 21
+ 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 306 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 6 0 1 2 5 6 7 60 -1
+ 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 5 1 2 3 5 7 81 -1
+ 63 CLK_030 1 -1 -1 3 1 3 7 63 -1
+ 96 A_19_ 1 -1 -1 2 1 7 96 -1
+ 95 A_16_ 1 -1 -1 2 1 7 95 -1
+ 94 A_18_ 1 -1 -1 2 1 7 94 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 58 A_17_ 1 -1 -1 2 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 2 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 2 1 7 56 -1
+ 27 BGACK_000 1 -1 -1 2 1 7 27 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 7 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 3 1 3 7 -1 -1
+94 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 0 29 -1 1 0 21
+ 30 LDS_000 5 321 3 0 30 -1 13 0 21
+ 31 UDS_000 5 320 3 0 31 -1 9 0 21
+ 65 E 5 325 6 0 65 -1 3 0 21
+ 28 BG_000 5 322 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 323 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 324 7 0 77 -1 2 0 21
+ 34 VMA 5 326 3 0 34 -1 2 0 21
+ 32 AS_000 5 319 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
+ 294 cpu_est_0_ 3 -1 7 4 3 5 6 7 -1 -1 3 0 20
+ 302 inst_CLK_000_D2 3 -1 7 4 0 3 5 7 -1 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
+ 295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
+ 325 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 313 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
+ 304 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
+ 303 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 1 20
+ 324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 319 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
+ 298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
+ 296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
+ 316 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
+ 309 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 326 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
+ 307 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
+ 308 inst_CLK_000_D3 3 -1 7 2 0 5 -1 -1 1 0 20
+ 321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
+ 320 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
+ 306 SM_AMIGA_6_ 3 -1 3 1 3 -1 -1 4 0 21
+ 328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 315 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
+ 318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 314 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
+ 312 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
+ 311 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
+ 305 CLK_REF_1_ 3 -1 3 1 7 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 0 1 5 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 6 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+95 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 2 29 -1 1 0 21
+ 30 LDS_000 5 322 3 0 30 -1 13 0 21
+ 31 UDS_000 5 321 3 0 31 -1 9 0 21
+ 65 E 5 326 6 0 65 -1 3 0 21
+ 28 BG_000 5 323 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 324 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 325 7 0 77 -1 2 0 21
+ 34 VMA 5 327 3 0 34 -1 2 0 21
+ 32 AS_000 5 320 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 7 0 1 2 3 5 6 7 -1 -1 1 0 20
+ 304 inst_CLK_OUT_PRE 3 -1 6 4 0 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 7 4 3 5 6 7 -1 -1 3 0 20
+ 301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
+ 295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
+ 326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 314 SM_AMIGA_3_ 3 -1 6 3 2 5 6 -1 -1 3 0 20
+ 305 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
+ 325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 311 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
+ 309 inst_CLK_000_D3 3 -1 7 3 2 5 7 -1 -1 1 0 20
+ 302 inst_CLK_000_D2 3 -1 7 3 1 3 7 -1 -1 1 0 20
+ 298 inst_VPA_D 3 -1 6 3 2 3 5 -1 -1 1 0 21
+ 307 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 4 0 21
+ 296 inst_AS_030_000_SYNC 3 -1 1 2 1 3 -1 -1 4 0 21
+ 316 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 310 SM_AMIGA_1_ 3 -1 7 2 0 7 -1 -1 3 0 21
+ 327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 320 RN_AS_000 3 32 3 2 0 3 32 -1 2 0 21
+ 315 SM_AMIGA_5_ 3 -1 1 2 1 7 -1 -1 2 0 21
+ 308 SM_AMIGA_7_ 3 -1 0 2 0 3 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 2 2 2 6 -1 -1 2 0 21
+ 303 inst_CLK_000_D4 3 -1 7 2 2 5 -1 -1 1 0 20
+ 322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
+ 321 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
+ 329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 317 SM_AMIGA_0_ 3 -1 0 1 0 -1 -1 3 0 21
+ 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 306 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 6 0 1 2 5 6 7 60 -1
+ 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 5 1 2 3 5 7 81 -1
+ 63 CLK_030 1 -1 -1 3 1 3 7 63 -1
+ 96 A_19_ 1 -1 -1 2 1 7 96 -1
+ 95 A_16_ 1 -1 -1 2 1 7 95 -1
+ 94 A_18_ 1 -1 -1 2 1 7 94 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 58 A_17_ 1 -1 -1 2 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 2 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 2 1 7 56 -1
+ 27 BGACK_000 1 -1 -1 2 1 7 27 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 7 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 3 1 3 7 -1 -1
+96 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 0 29 -1 1 0 21
+ 30 LDS_000 5 323 3 0 30 -1 13 0 21
+ 31 UDS_000 5 322 3 0 31 -1 9 0 21
+ 65 E 5 327 6 0 65 -1 3 0 21
+ 28 BG_000 5 324 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 325 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 326 7 0 77 -1 2 0 21
+ 34 VMA 5 328 3 0 34 -1 2 0 21
+ 32 AS_000 5 321 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
+ 301 inst_CLK_000_D1 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 4 0 3 6 7 -1 -1 4 0 21
+ 314 SM_AMIGA_3_ 3 -1 6 4 0 1 5 6 -1 -1 3 0 20
+ 307 SM_AMIGA_6_ 3 -1 6 3 0 3 6 -1 -1 4 0 20
+ 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
+ 327 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 305 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 1 20
+ 304 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 1 20
+ 294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
+ 326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 5 3 1 5 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 0 3 0 1 6 -1 -1 2 0 21
+ 302 inst_CLK_000_D2 3 -1 3 3 0 3 6 -1 -1 1 0 20
+ 298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
+ 317 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
+ 309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
+ 328 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
+ 316 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 2 0 21
+ 310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 308 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 315 inst_CLK_000_D4 3 -1 7 2 0 6 -1 -1 1 0 20
+ 323 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
+ 322 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
+ 330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 318 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
+ 320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 313 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
+ 312 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
+ 311 inst_CLK_000_D3 3 -1 3 1 7 -1 -1 1 0 20
+ 306 CLK_REF_1_ 3 -1 7 1 7 -1 -1 1 0 20
+ 303 inst_CLK_000_D5 3 -1 6 1 0 -1 -1 1 0 21
+ 60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 6 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+95 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 0 29 -1 1 0 21
+ 30 LDS_000 5 322 3 0 30 -1 13 0 21
+ 31 UDS_000 5 321 3 0 31 -1 9 0 21
+ 65 E 5 326 6 0 65 -1 3 0 21
+ 28 BG_000 5 323 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 324 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 325 7 0 77 -1 2 0 21
+ 34 VMA 5 327 3 0 34 -1 2 0 21
+ 32 AS_000 5 320 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
+ 304 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
+ 325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 310 SM_AMIGA_4_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
+ 308 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
+ 298 inst_VPA_D 3 -1 7 3 0 3 6 -1 -1 1 0 20
+ 307 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
+ 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
+ 326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
+ 316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
+ 314 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 3 0 20
+ 309 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
+ 305 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
+ 327 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
+ 324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 320 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
+ 315 SM_AMIGA_5_ 3 -1 6 2 5 6 -1 -1 2 0 20
+ 297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
+ 311 inst_CLK_000_D3 3 -1 3 2 0 7 -1 -1 1 0 20
+ 302 inst_CLK_000_D2 3 -1 3 2 3 6 -1 -1 1 0 20
+ 322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
+ 321 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
+ 329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 317 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
+ 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 306 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
+ 303 inst_CLK_000_D4 3 -1 7 1 0 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 1 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 7 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 7 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+95 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 0 29 -1 1 0 21
+ 30 LDS_000 5 322 3 0 30 -1 12 0 21
+ 31 UDS_000 5 321 3 0 31 -1 8 0 21
+ 65 E 5 326 6 0 65 -1 3 0 21
+ 28 BG_000 5 323 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 324 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 325 7 0 77 -1 2 0 21
+ 34 VMA 5 327 3 0 34 -1 2 0 21
+ 32 AS_000 5 320 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 3 6 0 1 3 5 6 7 -1 -1 1 0 20
+ 294 cpu_est_0_ 3 -1 7 4 3 5 6 7 -1 -1 3 0 20
+ 295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
+ 326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 314 SM_AMIGA_3_ 3 -1 0 3 0 1 5 -1 -1 3 0 21
+ 304 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
+ 303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 5 3 0 1 5 -1 -1 2 0 21
+ 301 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 20
+ 298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
+ 296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
+ 316 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
+ 308 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
+ 327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
+ 310 SM_AMIGA_4_ 3 -1 3 2 0 3 -1 -1 2 0 21
+ 307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 297 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
+ 311 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 20
+ 322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 317 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
+ 306 SM_AMIGA_6_ 3 -1 3 1 3 -1 -1 3 0 21
+ 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 315 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
+ 313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 309 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 20
+ 305 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
+ 302 inst_CLK_000_D4 3 -1 7 1 0 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 10 CLK_000 1 -1 -1 2 0 3 10 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+95 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 0 29 -1 1 0 21
+ 30 LDS_000 5 322 3 0 30 -1 13 0 21
+ 31 UDS_000 5 321 3 0 31 -1 9 0 21
+ 65 E 5 326 6 0 65 -1 3 0 21
+ 28 BG_000 5 323 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 324 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 325 7 0 77 -1 2 0 21
+ 34 VMA 5 327 3 0 34 -1 2 0 21
+ 32 AS_000 5 320 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 3 6 0 1 3 5 6 7 -1 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
+ 326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 314 SM_AMIGA_3_ 3 -1 1 3 0 1 5 -1 -1 3 0 21
+ 309 SM_AMIGA_1_ 3 -1 1 3 1 6 7 -1 -1 3 0 21
+ 305 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
+ 304 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 1 20
+ 294 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 3 0 21
+ 325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 5 3 0 1 5 -1 -1 2 0 21
+ 298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
+ 307 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
+ 316 SM_AMIGA_2_ 3 -1 0 2 0 1 -1 -1 3 0 21
+ 327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
+ 315 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
+ 310 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
+ 308 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 297 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
+ 311 inst_CLK_000_D3 3 -1 6 2 0 7 -1 -1 1 0 21
+ 302 inst_CLK_000_D2 3 -1 3 2 3 6 -1 -1 1 0 20
+ 322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
+ 321 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
+ 329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 317 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
+ 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 313 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
+ 312 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
+ 306 CLK_REF_1_ 3 -1 7 1 7 -1 -1 1 0 20
+ 303 inst_CLK_000_D4 3 -1 7 1 0 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 10 CLK_000 1 -1 -1 2 1 3 10 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+95 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 0 29 -1 1 0 21
+ 30 LDS_000 5 322 3 0 30 -1 13 0 21
+ 31 UDS_000 5 321 3 0 31 -1 9 0 21
+ 65 E 5 326 6 0 65 -1 3 0 21
+ 28 BG_000 5 323 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 324 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 325 7 0 77 -1 2 0 21
+ 34 VMA 5 327 3 0 34 -1 2 0 21
+ 32 AS_000 5 320 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
+ 304 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
+ 325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 310 SM_AMIGA_4_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
+ 308 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
+ 298 inst_VPA_D 3 -1 7 3 0 3 6 -1 -1 1 0 20
+ 307 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
+ 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
+ 326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
+ 316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
+ 314 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 3 0 20
+ 309 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
+ 305 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
+ 327 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
+ 324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 320 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
+ 315 SM_AMIGA_5_ 3 -1 6 2 5 6 -1 -1 2 0 20
+ 297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
+ 311 inst_CLK_000_D3 3 -1 3 2 0 7 -1 -1 1 0 20
+ 302 inst_CLK_000_D2 3 -1 3 2 3 6 -1 -1 1 0 20
+ 322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
+ 321 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
+ 329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 317 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
+ 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 306 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
+ 303 inst_CLK_000_D4 3 -1 7 1 0 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 1 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 7 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 7 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+95 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 2 29 -1 1 0 21
+ 30 LDS_000 5 322 3 0 30 -1 13 0 21
+ 31 UDS_000 5 321 3 0 31 -1 9 0 21
+ 65 E 5 326 6 0 65 -1 3 0 21
+ 28 BG_000 5 323 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 324 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 325 7 0 77 -1 2 0 21
+ 34 VMA 5 327 3 0 34 -1 2 0 21
+ 32 AS_000 5 320 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 6 7 0 1 2 3 5 6 7 -1 -1 1 0 21
+ 301 inst_CLK_000_D1 3 -1 7 5 1 3 5 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 4 1 3 5 7 -1 -1 4 0 21
+ 307 SM_AMIGA_6_ 3 -1 5 3 1 3 5 -1 -1 4 0 21
+ 304 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 1 20
+ 294 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
+ 325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 320 RN_AS_000 3 32 3 3 0 3 7 32 -1 2 0 21
+ 308 SM_AMIGA_7_ 3 -1 0 3 0 3 5 -1 -1 2 0 21
+ 302 inst_CLK_000_D2 3 -1 3 3 1 3 5 -1 -1 1 0 20
+ 298 inst_VPA_D 3 -1 6 3 2 3 6 -1 -1 1 0 21
+ 295 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
+ 326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
+ 317 SM_AMIGA_0_ 3 -1 7 2 0 7 -1 -1 3 0 21
+ 314 SM_AMIGA_3_ 3 -1 6 2 2 6 -1 -1 3 0 20
+ 309 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 305 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
+ 327 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
+ 324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 315 SM_AMIGA_5_ 3 -1 1 2 1 6 -1 -1 2 0 21
+ 310 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 297 inst_DTACK_SYNC 3 -1 2 2 2 6 -1 -1 2 0 21
+ 311 inst_CLK_000_D3 3 -1 3 2 0 2 -1 -1 1 0 20
+ 303 inst_CLK_000_D4 3 -1 0 2 2 3 -1 -1 1 0 20
+ 322 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
+ 321 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
+ 329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
+ 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 313 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
+ 312 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 306 CLK_REF_1_ 3 -1 7 1 7 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 7 0 1 2 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 7 0 1 2 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 2 3 6 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 6 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+95 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 0 29 -1 1 0 21
+ 30 LDS_000 5 322 3 0 30 -1 12 0 21
+ 31 UDS_000 5 321 3 0 31 -1 8 0 21
+ 65 E 5 326 6 0 65 -1 3 0 21
+ 28 BG_000 5 323 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 324 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 325 7 0 77 -1 2 0 21
+ 34 VMA 5 327 3 0 34 -1 2 0 21
+ 32 AS_000 5 320 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
+ 304 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
+ 325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 309 SM_AMIGA_4_ 3 -1 5 3 3 5 6 -1 -1 2 0 21
+ 308 SM_AMIGA_7_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
+ 298 inst_VPA_D 3 -1 7 3 0 3 6 -1 -1 1 0 20
+ 307 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
+ 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
+ 326 RN_E 3 65 6 2 3 6 65 -1 3 0 21
+ 316 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
+ 314 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 3 0 20
+ 310 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
+ 305 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
+ 327 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
+ 324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 320 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
+ 315 SM_AMIGA_5_ 3 -1 6 2 5 6 -1 -1 2 0 20
+ 297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
+ 311 inst_CLK_000_D3 3 -1 3 2 0 7 -1 -1 1 0 20
+ 302 inst_CLK_000_D2 3 -1 3 2 3 6 -1 -1 1 0 20
+ 322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 317 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
+ 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 306 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
+ 303 inst_CLK_000_D4 3 -1 7 1 0 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 1 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 7 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 7 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+95 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 0 29 -1 1 0 21
+ 30 LDS_000 5 322 3 0 30 -1 12 0 21
+ 31 UDS_000 5 321 3 0 31 -1 8 0 21
+ 65 E 5 326 6 0 65 -1 3 0 21
+ 28 BG_000 5 323 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 324 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 325 7 0 77 -1 2 0 21
+ 34 VMA 5 327 3 0 34 -1 2 0 21
+ 32 AS_000 5 320 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
+ 294 cpu_est_0_ 3 -1 7 4 3 5 6 7 -1 -1 3 0 20
+ 301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
+ 295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
+ 326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 314 SM_AMIGA_3_ 3 -1 0 3 0 1 5 -1 -1 3 0 21
+ 304 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
+ 303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 5 3 0 1 5 -1 -1 2 0 21
+ 298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
+ 296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
+ 316 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
+ 309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
+ 327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
+ 308 SM_AMIGA_4_ 3 -1 3 2 0 3 -1 -1 2 0 21
+ 307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 297 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
+ 311 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 20
+ 322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 317 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
+ 306 SM_AMIGA_6_ 3 -1 3 1 3 -1 -1 3 0 21
+ 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 315 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
+ 313 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 312 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 310 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 20
+ 305 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
+ 302 inst_CLK_000_D4 3 -1 7 1 0 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 0 1 5 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 7 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+94 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 6 29 -1 1 0 21
+ 30 LDS_000 5 320 3 0 30 -1 13 0 21
+ 31 UDS_000 5 319 3 0 31 -1 9 0 21
+ 65 E 5 324 6 0 65 -1 3 0 21
+ 33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
+ 28 BG_000 5 321 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 322 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 323 7 0 77 -1 2 0 21
+ 34 VMA 5 325 3 0 34 -1 2 0 21
+ 32 AS_000 5 318 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
+ 300 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
+ 306 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 4 0 21
+ 303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 309 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
+ 307 SM_AMIGA_7_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
+ 302 inst_CLK_000_D2 3 -1 1 3 0 1 3 -1 -1 1 0 20
+ 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
+ 324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
+ 314 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
+ 308 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
+ 304 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
+ 294 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21
+ 325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
+ 322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 318 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
+ 313 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 2 0 21
+ 298 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 20
+ 320 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
+ 319 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
+ 328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
+ 321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 315 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
+ 312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
+ 317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 311 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 310 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 305 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 3 1 3 6 60 -1
+ 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
+ 81 AS_030 1 -1 -1 3 3 6 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 10 CLK_000 1 -1 -1 2 1 6 10 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 1 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+93 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 1 29 -1 1 0 21
+ 30 LDS_000 5 319 3 0 30 -1 12 0 21
+ 31 UDS_000 5 318 3 0 31 -1 8 0 21
+ 65 E 5 323 6 0 65 -1 3 0 21
+ 33 AMIGA_BUS_ENABLE 5 325 3 0 33 -1 3 0 20
+ 28 BG_000 5 320 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 321 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 322 7 0 77 -1 2 0 21
+ 34 VMA 5 324 3 0 34 -1 2 0 21
+ 32 AS_000 5 317 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 0 5 1 3 5 6 7 -1 -1 1 0 21
+ 301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
+ 323 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 311 SM_AMIGA_3_ 3 -1 7 3 1 5 7 -1 -1 3 0 21
+ 305 SM_AMIGA_6_ 3 -1 6 3 3 6 7 -1 -1 3 0 20
+ 303 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 1 20
+ 302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
+ 322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 298 inst_VPA_D 3 -1 6 3 1 3 5 -1 -1 1 0 21
+ 307 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
+ 324 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 317 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
+ 308 SM_AMIGA_4_ 3 -1 7 2 3 7 -1 -1 2 0 21
+ 306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 5 2 5 7 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 1 2 1 7 -1 -1 2 0 21
+ 319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 325 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
+ 320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 314 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
+ 313 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 3 0 21
+ 316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 312 SM_AMIGA_5_ 3 -1 7 1 7 -1 -1 2 0 21
+ 310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 304 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
+ 85 RST 1 -1 -1 5 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 1 3 5 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 0 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+94 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 0 29 -1 1 0 21
+ 30 LDS_000 5 321 3 0 30 -1 13 0 21
+ 31 UDS_000 5 320 3 0 31 -1 9 0 21
+ 65 E 5 325 6 0 65 -1 3 0 21
+ 28 BG_000 5 322 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 323 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 324 7 0 77 -1 2 0 21
+ 34 VMA 5 326 3 0 34 -1 2 0 21
+ 32 AS_000 5 319 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
+ 295 cpu_est_1_ 3 -1 6 3 3 5 6 -1 -1 4 0 21
+ 325 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 313 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
+ 304 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
+ 303 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 1 20
+ 294 cpu_est_0_ 3 -1 6 3 3 5 6 -1 -1 3 0 21
+ 324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 301 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 20
+ 298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
+ 296 inst_AS_030_000_SYNC 3 -1 1 2 1 3 -1 -1 4 0 21
+ 315 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
+ 326 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 319 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
+ 310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21
+ 307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
+ 308 inst_CLK_000_D2 3 -1 7 2 3 7 -1 -1 1 0 20
+ 321 RN_LDS_000 3 30 3 1 3 30 -1 13 0 21
+ 320 RN_UDS_000 3 31 3 1 3 31 -1 9 0 21
+ 306 SM_AMIGA_6_ 3 -1 3 1 3 -1 -1 4 0 21
+ 328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 316 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
+ 318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 314 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21
+ 312 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
+ 311 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
+ 305 CLK_REF_1_ 3 -1 3 1 7 -1 -1 1 0 20
+ 302 inst_CLK_000_D3 3 -1 7 1 3 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 3 1 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 5 0 1 3 5 7 81 -1
+ 10 CLK_000 1 -1 -1 4 0 5 6 7 10 -1
+ 63 CLK_030 1 -1 -1 3 1 3 7 63 -1
+ 96 A_19_ 1 -1 -1 2 1 7 96 -1
+ 95 A_16_ 1 -1 -1 2 1 7 95 -1
+ 94 A_18_ 1 -1 -1 2 1 7 94 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 58 A_17_ 1 -1 -1 2 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 2 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 2 1 7 56 -1
+ 27 BGACK_000 1 -1 -1 2 1 7 27 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 3 1 3 7 -1 -1
+92 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 6 29 -1 1 0 21
+ 30 LDS_000 5 319 3 0 30 -1 12 0 21
+ 31 UDS_000 5 318 3 0 31 -1 8 0 21
+ 65 E 5 325 6 0 65 -1 3 0 21
+ 28 BG_000 5 320 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 321 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 322 7 0 77 -1 2 0 21
+ 34 VMA 5 326 3 0 34 -1 2 0 21
+ 32 AS_000 5 317 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
+ 325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
+ 311 SM_AMIGA_3_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
+ 303 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
+ 302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
+ 322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 317 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
+ 298 inst_VPA_D 3 -1 7 3 0 3 6 -1 -1 1 0 20
+ 314 SM_AMIGA_0_ 3 -1 7 2 6 7 -1 -1 3 0 21
+ 313 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
+ 307 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
+ 326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
+ 321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 308 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
+ 306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
+ 319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 312 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
+ 310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 304 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
+ 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
+ 10 CLK_000 1 -1 -1 4 0 1 6 7 10 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 7 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+93 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 6 29 -1 1 0 21
+ 30 LDS_000 5 320 3 0 30 -1 12 0 21
+ 31 UDS_000 5 319 3 0 31 -1 8 0 21
+ 65 E 5 326 6 0 65 -1 3 0 21
+ 28 BG_000 5 321 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 325 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 324 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 322 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 323 7 0 77 -1 2 0 21
+ 34 VMA 5 327 3 0 34 -1 2 0 21
+ 32 AS_000 5 318 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 0 5 1 3 5 6 7 -1 -1 1 0 21
+ 301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
+ 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
+ 326 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 304 cpu_est_2_ 3 -1 3 3 3 5 6 -1 -1 3 1 20
+ 303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
+ 323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 318 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
+ 308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
+ 298 inst_VPA_D 3 -1 7 3 3 5 6 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 2 3 7 -1 -1 4 0 21
+ 315 SM_AMIGA_0_ 3 -1 7 2 6 7 -1 -1 3 0 21
+ 312 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 311 SM_AMIGA_3_ 3 -1 6 2 5 6 -1 -1 3 0 20
+ 306 SM_AMIGA_6_ 3 -1 3 2 3 7 -1 -1 3 0 21
+ 327 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 313 SM_AMIGA_5_ 3 -1 7 2 1 7 -1 -1 2 0 21
+ 307 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
+ 302 inst_CLK_000_D2 3 -1 3 2 6 7 -1 -1 1 0 20
+ 320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 314 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
+ 317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 305 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 5 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 3 5 6 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 7 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 0 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+92 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 6 29 -1 1 0 21
+ 30 LDS_000 5 319 3 0 30 -1 12 0 21
+ 31 UDS_000 5 318 3 0 31 -1 8 0 21
+ 65 E 5 325 6 0 65 -1 3 0 21
+ 28 BG_000 5 320 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 321 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 322 7 0 77 -1 2 0 21
+ 34 VMA 5 326 3 0 34 -1 2 0 21
+ 32 AS_000 5 317 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
+ 325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
+ 311 SM_AMIGA_3_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
+ 303 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
+ 302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
+ 322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 317 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
+ 298 inst_VPA_D 3 -1 7 3 0 3 6 -1 -1 1 0 20
+ 314 SM_AMIGA_0_ 3 -1 7 2 6 7 -1 -1 3 0 21
+ 313 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
+ 307 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
+ 326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
+ 321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 308 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
+ 306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
+ 319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 312 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
+ 310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 304 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
+ 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
+ 10 CLK_000 1 -1 -1 4 0 1 6 7 10 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 7 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+92 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 1 29 -1 1 0 21
+ 30 LDS_000 5 319 3 0 30 -1 12 0 21
+ 31 UDS_000 5 318 3 0 31 -1 8 0 21
+ 65 E 5 325 6 0 65 -1 3 0 21
+ 28 BG_000 5 320 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 321 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 322 7 0 77 -1 2 0 21
+ 34 VMA 5 326 3 0 34 -1 2 0 21
+ 32 AS_000 5 317 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 6 5 1 3 5 6 7 -1 -1 1 0 21
+ 301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 0 3 0 3 6 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 3 3 3 5 6 -1 -1 4 0 20
+ 325 RN_E 3 65 6 3 3 5 6 65 -1 3 0 21
+ 311 SM_AMIGA_3_ 3 -1 7 3 1 5 7 -1 -1 3 0 21
+ 303 cpu_est_2_ 3 -1 6 3 3 5 6 -1 -1 3 1 21
+ 302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 3 3 5 6 -1 -1 3 0 20
+ 322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 298 inst_VPA_D 3 -1 6 3 1 3 5 -1 -1 1 0 21
+ 305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
+ 326 RN_VMA 3 34 3 2 3 5 34 -1 2 0 21
+ 321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 317 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
+ 312 SM_AMIGA_5_ 3 -1 6 2 6 7 -1 -1 2 0 20
+ 308 SM_AMIGA_4_ 3 -1 7 2 3 7 -1 -1 2 0 21
+ 306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 5 2 5 7 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 1 2 1 7 -1 -1 2 0 21
+ 319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
+ 313 SM_AMIGA_2_ 3 -1 7 1 7 -1 -1 3 0 21
+ 307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
+ 316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 304 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 1 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 5 0 1 3 5 7 81 -1
+ 63 CLK_030 1 -1 -1 3 0 3 7 63 -1
+ 96 A_19_ 1 -1 -1 2 0 7 96 -1
+ 95 A_16_ 1 -1 -1 2 0 7 95 -1
+ 94 A_18_ 1 -1 -1 2 0 7 94 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 58 A_17_ 1 -1 -1 2 0 7 58 -1
+ 57 FC_1_ 1 -1 -1 2 0 7 57 -1
+ 56 FC_0_ 1 -1 -1 2 0 7 56 -1
+ 27 BGACK_000 1 -1 -1 2 0 7 27 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 6 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 3 0 3 7 -1 -1
+92 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 6 29 -1 1 0 21
+ 30 LDS_000 5 319 3 0 30 -1 12 0 21
+ 31 UDS_000 5 318 3 0 31 -1 8 0 21
+ 65 E 5 325 6 0 65 -1 3 0 21
+ 28 BG_000 5 320 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 324 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 321 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 322 7 0 77 -1 2 0 21
+ 34 VMA 5 326 3 0 34 -1 2 0 21
+ 32 AS_000 5 317 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
+ 325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
+ 311 SM_AMIGA_3_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
+ 303 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
+ 302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
+ 322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 317 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21
+ 298 inst_VPA_D 3 -1 7 3 0 3 6 -1 -1 1 0 20
+ 314 SM_AMIGA_0_ 3 -1 7 2 6 7 -1 -1 3 0 21
+ 313 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 3 0 21
+ 307 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
+ 326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
+ 321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 308 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
+ 306 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
+ 319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 324 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 312 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
+ 310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 304 CLK_REF_1_ 3 -1 7 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
+ 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
+ 10 CLK_000 1 -1 -1 4 0 1 6 7 10 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 7 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+92 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 5 29 -1 1 0 21
+ 30 LDS_000 5 319 3 0 30 -1 12 0 21
+ 31 UDS_000 5 318 3 0 31 -1 8 0 21
+ 65 E 5 323 6 0 65 -1 3 0 21
+ 28 BG_000 5 320 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 325 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 324 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 321 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 322 7 0 77 -1 2 0 21
+ 34 VMA 5 326 3 0 34 -1 2 0 21
+ 32 AS_000 5 317 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 33 AMIGA_BUS_ENABLE 0 3 0 33 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
+ 323 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
+ 311 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
+ 303 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
+ 302 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
+ 322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 317 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
+ 308 SM_AMIGA_4_ 3 -1 7 3 3 6 7 -1 -1 2 0 21
+ 298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
+ 314 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
+ 313 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 307 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
+ 305 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 3 0 21
+ 326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
+ 321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 312 SM_AMIGA_5_ 3 -1 1 2 1 7 -1 -1 2 0 21
+ 306 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
+ 319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 310 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 309 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 304 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
+ 10 CLK_000 1 -1 -1 3 0 5 7 10 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 1 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+93 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 1 29 -1 1 0 21
+ 30 LDS_000 5 319 3 0 30 -1 12 0 21
+ 31 UDS_000 5 318 3 0 31 -1 8 0 21
+ 65 E 5 323 6 0 65 -1 3 0 21
+ 33 AMIGA_BUS_ENABLE 5 325 3 0 33 -1 3 0 20
+ 28 BG_000 5 320 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 321 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 322 7 0 77 -1 2 0 21
+ 34 VMA 5 324 3 0 34 -1 2 0 21
+ 32 AS_000 5 317 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
+ 301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
+ 323 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
+ 311 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
+ 303 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
+ 302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 1 20
+ 294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
+ 322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 298 inst_VPA_D 3 -1 7 3 0 1 3 -1 -1 1 0 20
+ 313 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 305 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
+ 324 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
+ 321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 317 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
+ 308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
+ 319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 325 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
+ 320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
+ 307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
+ 316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 312 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
+ 310 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
+ 309 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
+ 304 CLK_REF_1_ 3 -1 7 1 7 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
+ 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
+ 10 CLK_000 1 -1 -1 3 0 1 6 10 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 7 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+93 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 316 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 1 29 -1 1 0 21
+ 30 LDS_000 5 319 3 0 30 -1 12 0 21
+ 31 UDS_000 5 318 3 0 31 -1 8 0 21
+ 65 E 5 323 6 0 65 -1 3 0 21
+ 33 AMIGA_BUS_ENABLE 5 325 3 0 33 -1 3 0 20
+ 28 BG_000 5 320 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 315 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 327 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 326 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 321 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 322 7 0 77 -1 2 0 21
+ 34 VMA 5 324 3 0 34 -1 2 0 21
+ 32 AS_000 5 317 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
+ 301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
+ 323 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
+ 311 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
+ 304 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
+ 302 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 3 1 20
+ 294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
+ 322 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 298 inst_VPA_D 3 -1 7 3 0 1 3 -1 -1 1 0 20
+ 313 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 303 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 3 0 21
+ 324 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
+ 321 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 317 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
+ 308 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 306 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
+ 319 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 318 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 327 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 326 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 325 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
+ 320 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 315 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 314 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
+ 307 SM_AMIGA_1_ 3 -1 7 1 7 -1 -1 3 0 21
+ 316 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 312 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
+ 310 CLK_CNT_1_ 3 -1 7 1 7 -1 -1 2 0 20
+ 309 CLK_CNT_0_ 3 -1 7 1 7 -1 -1 2 0 20
+ 305 CLK_REF_1_ 3 -1 7 1 7 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 4 1 3 6 7 60 -1
+ 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
+ 10 CLK_000 1 -1 -1 3 0 1 6 10 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 7 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+96 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 5 29 -1 1 0 21
+ 30 LDS_000 5 322 3 0 30 -1 12 0 21
+ 31 UDS_000 5 321 3 0 31 -1 8 0 21
+ 65 E 5 326 6 0 65 -1 3 0 21
+ 33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
+ 28 BG_000 5 323 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 324 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 325 7 0 77 -1 2 0 21
+ 34 VMA 5 327 3 0 34 -1 2 0 21
+ 32 AS_000 5 320 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
+ 326 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
+ 314 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
+ 305 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21
+ 303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
+ 294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
+ 325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 301 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 20
+ 298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
+ 304 SM_AMIGA_6_ 3 -1 3 2 1 3 -1 -1 4 0 21
+ 310 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 327 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
+ 324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 320 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
+ 315 SM_AMIGA_5_ 3 -1 1 2 1 6 -1 -1 2 0 21
+ 309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 307 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
+ 308 inst_CLK_000_D3 3 -1 6 2 1 3 -1 -1 1 0 21
+ 302 inst_CLK_000_D4 3 -1 3 2 1 3 -1 -1 1 0 20
+ 322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
+ 323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 317 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
+ 316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
+ 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 313 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
+ 312 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
+ 311 inst_CLK_000_D2 3 -1 1 1 6 -1 -1 1 0 20
+ 306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 0 1 3 5 6 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
+ 10 CLK_000 1 -1 -1 3 0 1 5 10 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+95 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 1 29 -1 1 0 21
+ 30 LDS_000 5 321 3 0 30 -1 12 0 21
+ 31 UDS_000 5 320 3 0 31 -1 8 0 21
+ 65 E 5 325 6 0 65 -1 3 0 21
+ 33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 20
+ 28 BG_000 5 322 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 323 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 324 7 0 77 -1 2 0 21
+ 34 VMA 5 326 3 0 34 -1 2 0 21
+ 32 AS_000 5 319 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 1 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
+ 325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
+ 313 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 3 0 20
+ 305 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
+ 303 inst_CLK_OUT_PRE 3 -1 6 3 1 6 7 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 6 3 0 3 6 -1 -1 3 0 21
+ 324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 307 SM_AMIGA_7_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
+ 308 inst_CLK_000_D2 3 -1 3 3 3 6 7 -1 -1 1 0 20
+ 298 inst_VPA_D 3 -1 1 3 0 1 3 -1 -1 1 0 20
+ 304 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
+ 315 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 20
+ 310 SM_AMIGA_1_ 3 -1 1 2 1 7 -1 -1 3 0 21
+ 326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
+ 323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 319 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
+ 309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21
+ 302 inst_CLK_000_D3 3 -1 7 2 3 6 -1 -1 1 0 20
+ 321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
+ 322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 316 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 3 0 21
+ 318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 314 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
+ 312 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 311 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 306 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
+ 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 1 3 7 81 -1
+ 10 CLK_000 1 -1 -1 3 0 1 7 10 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 1 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+94 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 6 29 -1 1 0 21
+ 30 LDS_000 5 320 3 0 30 -1 12 0 21
+ 31 UDS_000 5 319 3 0 31 -1 8 0 21
+ 65 E 5 324 6 0 65 -1 3 0 21
+ 33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
+ 28 BG_000 5 321 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 322 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 323 7 0 77 -1 2 0 21
+ 34 VMA 5 325 3 0 34 -1 2 0 21
+ 32 AS_000 5 318 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
+ 300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
+ 296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
+ 304 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
+ 303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
+ 323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 318 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
+ 308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
+ 307 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
+ 302 inst_CLK_000_D2 3 -1 6 3 0 1 3 -1 -1 1 0 21
+ 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
+ 324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
+ 315 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
+ 314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
+ 305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
+ 325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
+ 322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
+ 320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
+ 321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
+ 317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 313 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
+ 311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
+ 310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
+ 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
+ 81 AS_030 1 -1 -1 3 3 6 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 7 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 6 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+97 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 5 29 -1 1 0 21
+ 30 LDS_000 5 323 3 0 30 -1 12 0 21
+ 31 UDS_000 5 322 3 0 31 -1 8 0 21
+ 65 E 5 327 6 0 65 -1 3 0 21
+ 33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
+ 28 BG_000 5 324 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 325 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 326 7 0 77 -1 2 0 21
+ 34 VMA 5 328 3 0 34 -1 2 0 21
+ 32 AS_000 5 321 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
+ 327 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
+ 315 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
+ 306 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
+ 304 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
+ 294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
+ 326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 302 inst_CLK_000_D2 3 -1 7 3 0 3 6 -1 -1 1 0 20
+ 298 inst_VPA_D 3 -1 1 3 0 3 5 -1 -1 1 0 20
+ 305 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 4 0 21
+ 310 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 328 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
+ 325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
+ 316 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 2 0 21
+ 309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 308 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
+ 303 inst_CLK_000_D5 3 -1 1 2 0 5 -1 -1 1 0 20
+ 323 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 322 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
+ 324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 318 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
+ 317 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
+ 320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 313 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
+ 312 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
+ 314 inst_CLK_000_D4 3 -1 6 1 1 -1 -1 1 0 21
+ 311 inst_CLK_000_D3 3 -1 6 1 6 -1 -1 1 0 21
+ 307 CLK_REF_1_ 3 -1 7 1 1 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
+ 10 CLK_000 1 -1 -1 3 0 1 5 10 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 1 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+97 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 6 29 -1 1 0 21
+ 30 LDS_000 5 323 3 0 30 -1 12 0 21
+ 31 UDS_000 5 322 3 0 31 -1 8 0 21
+ 65 E 5 327 6 0 65 -1 3 0 21
+ 33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 3 0 20
+ 28 BG_000 5 324 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 325 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 326 7 0 77 -1 2 0 21
+ 34 VMA 5 328 3 0 34 -1 2 0 21
+ 32 AS_000 5 321 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 1 6 0 1 3 5 6 7 -1 -1 1 0 20
+ 304 inst_CLK_OUT_PRE 3 -1 1 5 0 1 5 6 7 -1 -1 3 1 20
+ 301 inst_CLK_000_D1 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
+ 313 SM_AMIGA_1_ 3 -1 0 3 0 5 7 -1 -1 3 0 21
+ 294 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 20
+ 326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 321 RN_AS_000 3 32 3 3 1 3 5 32 -1 2 0 21
+ 303 inst_CLK_000_D5 3 -1 6 3 0 5 7 -1 -1 1 0 21
+ 305 SM_AMIGA_6_ 3 -1 3 2 0 3 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
+ 327 RN_E 3 65 6 2 3 6 65 -1 3 0 21
+ 318 SM_AMIGA_0_ 3 -1 5 2 1 5 -1 -1 3 0 21
+ 317 SM_AMIGA_2_ 3 -1 1 2 0 1 -1 -1 3 0 21
+ 315 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 20
+ 306 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
+ 328 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
+ 325 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 316 SM_AMIGA_5_ 3 -1 0 2 0 6 -1 -1 2 0 21
+ 309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 308 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
+ 297 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
+ 302 inst_CLK_000_D2 3 -1 6 2 0 3 -1 -1 1 0 21
+ 298 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21
+ 323 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 322 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
+ 324 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 312 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
+ 311 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
+ 314 inst_CLK_000_D4 3 -1 6 1 6 -1 -1 1 0 21
+ 310 inst_CLK_000_D3 3 -1 3 1 6 -1 -1 1 0 20
+ 307 CLK_REF_1_ 3 -1 7 1 1 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 3 3 6 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 10 CLK_000 1 -1 -1 2 1 6 10 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+96 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 5 29 -1 1 0 21
+ 30 LDS_000 5 322 3 0 30 -1 12 0 21
+ 31 UDS_000 5 321 3 0 31 -1 8 0 21
+ 65 E 5 326 6 0 65 -1 3 0 21
+ 33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
+ 28 BG_000 5 323 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 324 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 325 7 0 77 -1 2 0 21
+ 34 VMA 5 327 3 0 34 -1 2 0 21
+ 32 AS_000 5 320 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
+ 326 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
+ 314 SM_AMIGA_3_ 3 -1 1 3 0 1 5 -1 -1 3 0 21
+ 306 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
+ 304 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
+ 294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
+ 325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
+ 305 SM_AMIGA_6_ 3 -1 6 2 3 6 -1 -1 4 0 20
+ 316 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21
+ 313 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
+ 327 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
+ 324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 320 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21
+ 315 SM_AMIGA_5_ 3 -1 6 2 1 6 -1 -1 2 0 20
+ 309 SM_AMIGA_4_ 3 -1 1 2 1 3 -1 -1 2 0 21
+ 308 SM_AMIGA_7_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 5 2 1 5 -1 -1 2 0 21
+ 303 inst_CLK_000_D4 3 -1 6 2 6 7 -1 -1 1 0 21
+ 302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
+ 322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
+ 323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 317 SM_AMIGA_0_ 3 -1 6 1 6 -1 -1 3 0 20
+ 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 312 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
+ 311 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
+ 310 inst_CLK_000_D3 3 -1 6 1 6 -1 -1 1 0 21
+ 307 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
+ 10 CLK_000 1 -1 -1 3 0 5 7 10 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+87 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 -1 7 1 3 80 -1 1 0 21
+ 30 LDS_000 5 313 3 0 30 -1 12 0 21
+ 31 UDS_000 5 312 3 0 31 -1 8 0 21
+ 65 E 5 317 6 0 65 -1 3 0 21
+ 33 AMIGA_BUS_ENABLE 5 321 3 0 33 -1 3 0 20
+ 28 BG_000 5 314 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 310 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 320 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 319 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 315 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 316 7 0 77 -1 2 0 21
+ 34 VMA 5 318 3 0 34 -1 2 0 21
+ 32 AS_000 5 311 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 29 DTACK 0 3 0 29 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 299 inst_CLK_000_D1 3 -1 3 6 0 1 3 5 6 7 -1 -1 1 0 20
+ 298 inst_CLK_000_D0 3 -1 6 6 0 1 3 5 6 7 -1 -1 1 0 21
+ 296 inst_AS_030_000_SYNC 3 -1 7 4 0 3 5 7 -1 -1 4 0 21
+ 302 SM_AMIGA_3_ 3 -1 0 3 0 3 5 -1 -1 4 0 21
+ 316 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 300 inst_CLK_000_D2 3 -1 6 3 0 3 5 -1 -1 1 0 21
+ 295 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21
+ 317 RN_E 3 65 6 2 3 6 65 -1 3 0 21
+ 303 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
+ 301 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
+ 315 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 309 SM_AMIGA_2_ 3 -1 5 2 1 5 -1 -1 2 0 21
+ 306 SM_AMIGA_1_ 3 -1 1 2 1 3 -1 -1 2 0 21
+ 305 SM_AMIGA_4_ 3 -1 3 2 0 3 -1 -1 1 0 21
+ 313 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 312 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 321 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
+ 320 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 319 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 314 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 310 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 318 RN_VMA 3 34 3 1 3 34 -1 2 0 21
+ 311 RN_AS_000 3 32 3 1 3 32 -1 2 0 21
+ 308 CLK_CNT_1_ 3 -1 6 1 6 -1 -1 2 0 21
+ 307 CLK_CNT_0_ 3 -1 6 1 6 -1 -1 2 0 21
+ 304 CLK_REF_1_ 3 -1 3 1 6 -1 -1 1 0 20
+ 297 inst_VPA_D 3 -1 6 1 3 -1 -1 1 0 21
+ 60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
+ 85 RST 1 -1 -1 5 0 1 3 5 7 85 -1
+ 81 AS_030 1 -1 -1 2 3 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 6 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+95 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 6 29 -1 1 0 21
+ 30 LDS_000 5 321 3 0 30 -1 12 0 21
+ 31 UDS_000 5 320 3 0 31 -1 8 0 21
+ 65 E 5 325 6 0 65 -1 3 0 21
+ 33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 20
+ 28 BG_000 5 322 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 323 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 324 7 0 77 -1 2 0 21
+ 34 VMA 5 326 3 0 34 -1 2 0 21
+ 32 AS_000 5 319 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
+ 294 cpu_est_0_ 3 -1 1 4 0 1 3 6 -1 -1 3 0 20
+ 301 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 1 3 7 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 3 3 0 3 6 -1 -1 4 0 20
+ 325 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
+ 306 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
+ 304 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
+ 324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 309 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
+ 308 SM_AMIGA_7_ 3 -1 7 3 1 3 7 -1 -1 2 0 21
+ 298 inst_VPA_D 3 -1 1 3 0 3 6 -1 -1 1 0 20
+ 305 SM_AMIGA_6_ 3 -1 1 2 1 3 -1 -1 4 0 21
+ 313 SM_AMIGA_3_ 3 -1 6 2 0 6 -1 -1 3 0 20
+ 310 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 326 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
+ 323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 319 RN_AS_000 3 32 3 2 3 7 32 -1 2 0 21
+ 312 CLK_CNT_1_ 3 -1 6 2 1 6 -1 -1 2 0 21
+ 311 CLK_CNT_0_ 3 -1 6 2 1 6 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
+ 307 CLK_REF_1_ 3 -1 6 2 1 6 -1 -1 1 0 20
+ 303 inst_CLK_000_D3 3 -1 3 2 0 6 -1 -1 1 0 20
+ 302 inst_CLK_000_D2 3 -1 6 2 1 3 -1 -1 1 0 21
+ 321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
+ 322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 316 SM_AMIGA_0_ 3 -1 7 1 7 -1 -1 3 0 21
+ 315 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
+ 318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 314 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 60 CLK_OSZI 9 -1 4 0 1 3 6 60 -1
+ 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 10 CLK_000 1 -1 -1 2 0 6 10 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 1 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+96 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 5 29 -1 1 0 21
+ 30 LDS_000 5 322 3 0 30 -1 12 0 21
+ 31 UDS_000 5 321 3 0 31 -1 8 0 21
+ 65 E 5 326 6 0 65 -1 3 0 21
+ 33 AMIGA_BUS_ENABLE 5 328 3 0 33 -1 3 0 20
+ 28 BG_000 5 323 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 330 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 329 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 324 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 325 7 0 77 -1 2 0 21
+ 34 VMA 5 327 3 0 34 -1 2 0 21
+ 32 AS_000 5 320 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 7 6 0 1 3 5 6 7 -1 -1 1 0 20
+ 296 inst_AS_030_000_SYNC 3 -1 7 4 1 3 6 7 -1 -1 4 0 21
+ 301 inst_CLK_000_D1 3 -1 7 4 1 3 6 7 -1 -1 1 0 20
+ 305 SM_AMIGA_6_ 3 -1 1 3 1 3 6 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21
+ 326 RN_E 3 65 6 3 0 3 6 65 -1 3 0 21
+ 314 SM_AMIGA_3_ 3 -1 6 3 0 5 6 -1 -1 3 0 20
+ 306 cpu_est_2_ 3 -1 3 3 0 3 6 -1 -1 3 1 20
+ 304 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
+ 294 cpu_est_0_ 3 -1 3 3 0 3 6 -1 -1 3 0 20
+ 325 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 320 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
+ 302 inst_CLK_000_D2 3 -1 6 3 1 3 6 -1 -1 1 0 21
+ 298 inst_VPA_D 3 -1 6 3 0 3 5 -1 -1 1 0 21
+ 317 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
+ 310 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 327 RN_VMA 3 34 3 2 0 3 34 -1 2 0 21
+ 324 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 309 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 20
+ 308 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21
+ 297 inst_DTACK_SYNC 3 -1 5 2 5 6 -1 -1 2 0 21
+ 303 inst_CLK_000_D4 3 -1 1 2 0 5 -1 -1 1 0 20
+ 322 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 321 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 330 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 329 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 328 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
+ 323 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
+ 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 315 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
+ 313 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
+ 312 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
+ 311 inst_CLK_000_D3 3 -1 3 1 1 -1 -1 1 0 20
+ 307 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 6 0 1 3 5 6 7 60 -1
+ 85 RST 1 -1 -1 6 0 1 3 5 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 5 7 81 -1
+ 10 CLK_000 1 -1 -1 3 0 5 7 10 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 6 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+94 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 0 29 -1 1 0 21
+ 30 LDS_000 5 320 3 0 30 -1 12 0 21
+ 31 UDS_000 5 319 3 0 31 -1 8 0 21
+ 65 E 5 324 6 0 65 -1 3 0 21
+ 33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
+ 28 BG_000 5 321 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 322 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 323 7 0 77 -1 2 0 21
+ 34 VMA 5 325 3 0 34 -1 2 0 21
+ 32 AS_000 5 318 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
+ 301 inst_CLK_000_D1 3 -1 6 4 1 3 6 7 -1 -1 1 0 21
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 3 6 7 -1 -1 4 0 21
+ 312 SM_AMIGA_3_ 3 -1 1 3 0 1 6 -1 -1 3 0 21
+ 311 SM_AMIGA_1_ 3 -1 6 3 1 6 7 -1 -1 3 0 20
+ 303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
+ 323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 308 SM_AMIGA_4_ 3 -1 6 3 1 3 6 -1 -1 2 0 20
+ 297 inst_DTACK_SYNC 3 -1 0 3 0 1 6 -1 -1 2 0 21
+ 298 inst_VPA_D 3 -1 7 3 0 3 6 -1 -1 1 0 20
+ 304 SM_AMIGA_6_ 3 -1 3 2 3 6 -1 -1 4 0 21
+ 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
+ 324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
+ 305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
+ 325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
+ 322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 318 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21
+ 307 SM_AMIGA_7_ 3 -1 1 2 1 3 -1 -1 2 0 21
+ 299 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 2 0 20
+ 302 inst_CLK_000_D2 3 -1 6 2 3 6 -1 -1 1 0 21
+ 320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
+ 321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 315 SM_AMIGA_0_ 3 -1 1 1 1 -1 -1 3 0 21
+ 314 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
+ 317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 313 SM_AMIGA_5_ 3 -1 6 1 6 -1 -1 2 0 20
+ 310 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
+ 309 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
+ 306 CLK_REF_1_ 3 -1 7 1 1 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
+ 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
+ 81 AS_030 1 -1 -1 4 0 3 6 7 81 -1
+ 10 CLK_000 1 -1 -1 4 0 1 6 7 10 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 7 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+95 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 6 29 -1 1 0 21
+ 30 LDS_000 5 321 3 0 30 -1 12 0 21
+ 31 UDS_000 5 320 3 0 31 -1 8 0 21
+ 65 E 5 325 6 0 65 -1 3 0 21
+ 33 AMIGA_BUS_ENABLE 5 327 3 0 33 -1 3 0 20
+ 28 BG_000 5 322 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 329 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 328 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 323 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 324 7 0 77 -1 2 0 21
+ 34 VMA 5 326 3 0 34 -1 2 0 21
+ 32 AS_000 5 319 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
+ 300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
+ 305 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 4 0 21
+ 296 inst_AS_030_000_SYNC 3 -1 7 3 0 3 7 -1 -1 4 0 21
+ 304 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
+ 324 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 319 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
+ 309 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
+ 308 SM_AMIGA_7_ 3 -1 1 3 1 3 7 -1 -1 2 0 21
+ 302 inst_CLK_000_D2 3 -1 7 3 0 3 7 -1 -1 1 0 20
+ 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
+ 325 RN_E 3 65 6 2 3 6 65 -1 3 0 21
+ 316 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
+ 312 SM_AMIGA_1_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 306 cpu_est_2_ 3 -1 3 2 3 6 -1 -1 3 1 20
+ 294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
+ 326 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
+ 323 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 314 SM_AMIGA_5_ 3 -1 0 2 0 1 -1 -1 2 0 21
+ 303 inst_CLK_000_D3 3 -1 7 2 6 7 -1 -1 1 0 20
+ 298 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 20
+ 321 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 320 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 329 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 328 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 327 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
+ 322 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 315 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 20
+ 313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
+ 318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
+ 310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 307 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
+ 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
+ 81 AS_030 1 -1 -1 3 3 6 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 1 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 6 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
+ 293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
+94 "number of signals after reading design file"
+
+"sig sig sig pair blk fan PT xor sync"
+"num name type sig num out pin node cnt PT type"
+"--- ---- ---- ---- --- --- --- ---- --- --- ----"
+
+ 80 DSACK_1_ 5 317 7 1 3 80 -1 2 0 21
+ 29 DTACK 5 -1 3 1 6 29 -1 1 0 21
+ 30 LDS_000 5 320 3 0 30 -1 12 0 21
+ 31 UDS_000 5 319 3 0 31 -1 8 0 21
+ 65 E 5 324 6 0 65 -1 3 0 21
+ 33 AMIGA_BUS_ENABLE 5 326 3 0 33 -1 3 0 20
+ 28 BG_000 5 321 3 0 28 -1 3 0 21
+ 8 IPL_030_2_ 5 316 1 0 8 -1 3 0 21
+ 7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21
+ 6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21
+ 82 BGACK_030 5 322 7 0 82 -1 2 0 21
+ 77 FPU_CS 5 323 7 0 77 -1 2 0 21
+ 34 VMA 5 325 3 0 34 -1 2 0 21
+ 32 AS_000 5 318 3 0 32 -1 2 0 21
+ 91 AVEC 0 0 0 91 -1 1 0 21
+ 79 DSACK_0_ 0 7 0 79 -1 1 0 21
+ 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21
+ 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 1 0 21
+ 46 CIIN 0 4 0 46 -1 1 0 21
+ 40 BERR 0 4 0 40 -1 1 0 21
+ 21 AVEC_EXP 0 2 0 21 -1 1 0 21
+ 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21
+ 9 CLK_EXP 0 1 0 9 -1 1 0 20
+ 2 RESET 0 1 0 2 -1 1 0 20
+ 301 inst_CLK_000_D1 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
+ 300 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21
+ 296 inst_AS_030_000_SYNC 3 -1 7 4 0 1 3 7 -1 -1 4 0 21
+ 304 SM_AMIGA_6_ 3 -1 0 3 0 1 3 -1 -1 4 0 21
+ 303 inst_CLK_OUT_PRE 3 -1 1 3 1 6 7 -1 -1 3 1 20
+ 323 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21
+ 318 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21
+ 308 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21
+ 307 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 2 0 21
+ 302 inst_CLK_000_D2 3 -1 6 3 0 1 3 -1 -1 1 0 21
+ 295 cpu_est_1_ 3 -1 3 2 3 6 -1 -1 4 0 20
+ 324 RN_E 3 65 6 2 3 6 65 -1 3 0 21
+ 315 SM_AMIGA_0_ 3 -1 6 2 1 6 -1 -1 3 0 20
+ 314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 20
+ 309 SM_AMIGA_1_ 3 -1 7 2 6 7 -1 -1 3 0 21
+ 305 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21
+ 294 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 20
+ 325 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21
+ 322 RN_BGACK_030 3 82 7 2 3 7 82 -1 2 0 21
+ 298 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 20
+ 320 RN_LDS_000 3 30 3 1 3 30 -1 12 0 21
+ 319 RN_UDS_000 3 31 3 1 3 31 -1 8 0 21
+ 328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21
+ 327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21
+ 326 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 3 0 20
+ 321 RN_BG_000 3 28 3 1 3 28 -1 3 0 21
+ 316 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21
+ 312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 20
+ 317 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21
+ 313 SM_AMIGA_5_ 3 -1 1 1 1 -1 -1 2 0 21
+ 311 CLK_CNT_1_ 3 -1 1 1 1 -1 -1 2 0 20
+ 310 CLK_CNT_0_ 3 -1 1 1 1 -1 -1 2 0 20
+ 299 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 297 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 20
+ 306 CLK_REF_1_ 3 -1 3 1 1 -1 -1 1 0 20
+ 60 CLK_OSZI 9 -1 5 0 1 3 6 7 60 -1
+ 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1
+ 81 AS_030 1 -1 -1 3 3 6 7 81 -1
+ 70 RW 1 -1 -1 2 3 4 70 -1
+ 63 CLK_030 1 -1 -1 2 3 7 63 -1
+ 97 DS_030 1 -1 -1 1 3 97 -1
+ 96 A_19_ 1 -1 -1 1 7 96 -1
+ 95 A_16_ 1 -1 -1 1 7 95 -1
+ 94 A_18_ 1 -1 -1 1 7 94 -1
+ 93 A_21_ 1 -1 -1 1 4 93 -1
+ 92 A_20_ 1 -1 -1 1 4 92 -1
+ 84 A_22_ 1 -1 -1 1 4 84 -1
+ 83 A_23_ 1 -1 -1 1 4 83 -1
+ 78 SIZE_1_ 1 -1 -1 1 3 78 -1
+ 69 SIZE_0_ 1 -1 -1 1 3 69 -1
+ 68 A_0_ 1 -1 -1 1 3 68 -1
+ 67 IPL_2_ 1 -1 -1 1 1 67 -1
+ 66 IPL_0_ 1 -1 -1 1 1 66 -1
+ 58 A_17_ 1 -1 -1 1 7 58 -1
+ 57 FC_1_ 1 -1 -1 1 7 57 -1
+ 56 FC_0_ 1 -1 -1 1 7 56 -1
+ 55 IPL_1_ 1 -1 -1 1 1 55 -1
+ 35 VPA 1 -1 -1 1 7 35 -1
+ 27 BGACK_000 1 -1 -1 1 7 27 -1
+ 20 BG_030 1 -1 -1 1 3 20 -1
+ 18 A_24_ 1 -1 -1 1 4 18 -1
+ 17 A_25_ 1 -1 -1 1 4 17 -1
+ 16 A_26_ 1 -1 -1 1 4 16 -1
+ 15 A_27_ 1 -1 -1 1 4 15 -1
+ 14 A_28_ 1 -1 -1 1 4 14 -1
+ 10 CLK_000 1 -1 -1 1 6 10 -1
+ 5 A_29_ 1 -1 -1 1 4 5 -1
+ 4 A_30_ 1 -1 -1 1 4 4 -1
+ 3 A_31_ 1 -1 -1 1 4 3 -1
293 nEXP_SPACE 1 -1 -1 2 3 7 -1 -1
\ No newline at end of file
diff --git a/Logic/68030_tk.plc b/Logic/68030_tk.plc
index 70b6a98..67068bb 100644
--- a/Logic/68030_tk.plc
+++ b/Logic/68030_tk.plc
@@ -8,99 +8,103 @@
; Source file 68030_tk.tt4
; FITTER-generated Placements.
; DEVICE mach447a
-; DATE Fri May 16 17:07:12 2014
+; DATE Sun May 18 21:01:51 2014
-Pin 59 A_17_
-Pin 96 A_16_
Pin 79 SIZE_1_
Pin 4 A_31_
Pin 68 IPL_2_
Pin 58 FC_1_
Pin 82 AS_030
Pin 98 DS_030
-Pin 69 A_0_
+Pin 70 SIZE_0_
+Pin 5 A_30_
Pin 14 nEXP_SPACE
+Pin 6 A_29_
Pin 41 BERR Comb ; S6=1 S9=1 Pair 203
+Pin 15 A_28_
Pin 21 BG_030
-Pin 56 IPL_1_
-Pin 67 IPL_0_
-Pin 80 DSACK_0_ Comb ; S6=1 S9=1 Pair 287
+Pin 16 A_27_
+Pin 17 A_26_
+Pin 18 A_25_
Pin 28 BGACK_000
-Pin 57 FC_0_
+Pin 19 A_24_
Pin 64 CLK_030
+Pin 84 A_23_
Pin 11 CLK_000
+Pin 85 A_22_
Pin 61 CLK_OSZI
+Pin 94 A_21_
Pin 65 CLK_DIV_OUT Reg ; S6=1 S9=1 Pair 245
+Pin 93 A_20_
+Pin 97 A_19_
+Pin 95 A_18_
+Pin 59 A_17_
Pin 92 AVEC Comb ; S6=1 S9=1 Pair 107
+Pin 96 A_16_
Pin 22 AVEC_EXP Comb ; S6=1 S9=1 Pair 149
Pin 36 VPA
Pin 86 RST
Pin 71 RW
-Pin 34 AMIGA_BUS_ENABLE Comb ; S6=1 S9=1 Pair 187
Pin 48 AMIGA_BUS_DATA_DIR Comb ; S6=1 S9=1 Pair 197
Pin 20 AMIGA_BUS_ENABLE_LOW Comb ; S6=1 S9=1 Pair 167
Pin 47 CIIN Comb ; S6=1 S9=1 Pair 215
-Pin 70 SIZE_0_
-Pin 5 A_30_
-Pin 6 A_29_
-Pin 15 A_28_
-Pin 16 A_27_
-Pin 17 A_26_
-Pin 18 A_25_
-Pin 19 A_24_
-Pin 84 A_23_
-Pin 85 A_22_
-Pin 94 A_21_
-Pin 93 A_20_
-Pin 97 A_19_
-Pin 95 A_18_
+Pin 69 A_0_
+Pin 56 IPL_1_
+Pin 67 IPL_0_
+Pin 80 DSACK_0_ Comb ; S6=1 S9=1 Pair 287
+Pin 57 FC_0_
Pin 9 IPL_030_2_ Reg ; S6=1 S9=1 Pair 131
Pin 81 DSACK_1_ Reg ; S6=1 S9=1 Pair 281
-Pin 33 AS_000 Reg ; S6=1 S9=1 Pair 181
+Pin 33 AS_000 Reg ; S6=1 S9=1 Pair 187
Pin 32 UDS_000 Reg ; S6=1 S9=1 Pair 191
Pin 31 LDS_000 Reg ; S6=1 S9=1 Pair 185
-Pin 7 IPL_030_1_ Reg ; S6=1 S9=1 Pair 143
-Pin 8 IPL_030_0_ Reg ; S6=1 S9=1 Pair 137
Pin 29 BG_000 Reg ; S6=1 S9=1 Pair 175
Pin 83 BGACK_030 Reg ; S6=1 S9=1 Pair 275
Pin 10 CLK_EXP Reg ; S6=1 S9=0 Pair 125
Pin 78 FPU_CS Reg ; S6=1 S9=1 Pair 269
Pin 30 DTACK Reg ; S6=1 S9=1 Pair 173
Pin 66 E Reg ; S6=1 S9=1 Pair 251
-Pin 35 VMA Reg ; S6=1 S9=1 Pair 179
+Pin 35 VMA Reg ; S6=1 S9=1 Pair 181
Pin 3 RESET Reg ; S6=1 S9=0 Pair 127
+Pin 34 AMIGA_BUS_ENABLE Reg ; S6=1 S9=0 Pair 179
+Pin 7 IPL_030_1_ Reg ; S6=1 S9=1 Pair 143
+Pin 8 IPL_030_0_ Reg ; S6=1 S9=1 Pair 137
Node 131 RN_IPL_030_2_ Reg ; S6=1 S9=1
Node 281 RN_DSACK_1_ Reg ; S6=1 S9=1
-Node 181 RN_AS_000 Reg ; S6=1 S9=1
+Node 187 RN_AS_000 Reg ; S6=1 S9=1
Node 191 RN_UDS_000 Reg ; S6=1 S9=1
Node 185 RN_LDS_000 Reg ; S6=1 S9=1
-Node 143 RN_IPL_030_1_ Reg ; S6=1 S9=1
-Node 137 RN_IPL_030_0_ Reg ; S6=1 S9=1
Node 175 RN_BG_000 Reg ; S6=1 S9=1
Node 275 RN_BGACK_030 Reg ; S6=1 S9=1
Node 269 RN_FPU_CS Reg ; S6=1 S9=1
Node 173 RN_DTACK Reg ; S6=1 S9=1
Node 251 RN_E Reg ; S6=1 S9=1
-Node 179 RN_VMA Reg ; S6=1 S9=1
-Node 194 cpu_est_0_ Reg ; S6=1 S9=0
-Node 176 cpu_est_1_ Reg ; S6=1 S9=0
+Node 181 RN_VMA Reg ; S6=1 S9=1
+Node 179 RN_AMIGA_BUS_ENABLE Reg ; S6=1 S9=0
+Node 143 RN_IPL_030_1_ Reg ; S6=1 S9=1
+Node 137 RN_IPL_030_0_ Reg ; S6=1 S9=1
+Node 176 cpu_est_0_ Reg ; S6=1 S9=0
+Node 193 cpu_est_1_ Reg ; S6=1 S9=0
Node 271 inst_AS_030_000_SYNC Reg ; S6=1 S9=1
-Node 265 inst_DTACK_SYNC Reg ; S6=0 S9=0
-Node 289 inst_VPA_D Reg ; S6=1 S9=0
-Node 259 inst_VPA_SYNC Reg ; S6=0 S9=0
-Node 257 inst_CLK_000_D0 Reg ; S6=1 S9=1
-Node 193 inst_CLK_000_D1 Reg ; S6=1 S9=0
-Node 277 inst_CLK_OUT_PRE Reg ; S6=1 S9=0
-Node 188 cpu_est_2_ Reg ; S6=1 S9=0
-Node 278 CLK_CNT_0_ Reg ; S6=1 S9=0
-Node 182 SM_AMIGA_6_ Reg ; S6=0 S9=1
-Node 283 SM_AMIGA_7_ Reg ; S6=1 S9=1
-Node 263 SM_AMIGA_1_ Reg ; S6=1 S9=0
-Node 221 SM_AMIGA_4_ Reg ; S6=1 S9=1
-Node 253 SM_AMIGA_3_ Reg ; S6=1 S9=0
-Node 101 SM_AMIGA_5_ Reg ; S6=1 S9=1
-Node 247 SM_AMIGA_2_ Reg ; S6=1 S9=0
-Node 272 SM_AMIGA_0_ Reg ; S6=0 S9=1
+Node 260 inst_DTACK_SYNC Reg ; S6=0 S9=0
+Node 283 inst_VPA_D Reg ; S6=1 S9=0
+Node 254 inst_VPA_SYNC Reg ; S6=0 S9=0
+Node 263 inst_CLK_000_D0 Reg ; S6=1 S9=1
+Node 257 inst_CLK_000_D1 Reg ; S6=1 S9=1
+Node 247 inst_CLK_000_D2 Reg ; S6=1 S9=1
+Node 133 inst_CLK_OUT_PRE Reg ; S6=1 S9=0
+Node 101 SM_AMIGA_6_ Reg ; S6=1 S9=1
+Node 265 cpu_est_2_ Reg ; S6=1 S9=1
+Node 182 CLK_REF_1_ Lat ; S6=1 S9=0
+Node 145 SM_AMIGA_7_ Reg ; S6=1 S9=1
+Node 139 SM_AMIGA_4_ Reg ; S6=0 S9=1
+Node 277 SM_AMIGA_1_ Reg ; S6=0 S9=1
+Node 140 CLK_CNT_0_ Reg ; S6=1 S9=0
+Node 134 CLK_CNT_1_ Reg ; S6=1 S9=0
+Node 248 SM_AMIGA_3_ Reg ; S6=1 S9=0
+Node 128 SM_AMIGA_5_ Reg ; S6=0 S9=1
+Node 259 SM_AMIGA_2_ Reg ; S6=1 S9=0
+Node 253 SM_AMIGA_0_ Reg ; S6=1 S9=0
; Unused Pins & Nodes
; -> None Found.
diff --git a/Logic/68030_tk.prd b/Logic/68030_tk.prd
index 0013c47..ef3832d 100644
--- a/Logic/68030_tk.prd
+++ b/Logic/68030_tk.prd
@@ -5,8 +5,8 @@
|--------------------------------------------|
-Start: Fri May 16 17:07:12 2014
-End : Fri May 16 17:07:12 2014 $$$ Elapsed time: 00:00:00
+Start: Sun May 18 21:01:51 2014
+End : Sun May 18 21:01:51 2014 $$$ Elapsed time: 00:00:00
===========================================================================
Part [C:/Program Files (x86)/ispLever/ispcpld/dat/mach4a/mach447a] Design [68030_tk.tt4]
@@ -21,16 +21,16 @@ Part [C:/Program Files (x86)/ispLever/ispcpld/dat/mach4a/mach447a] Design [68030
| | +- Signals to Place | | +----- Logic Array Inputs
| | | +- Placed | | | +- Array Inputs Used
_|____|____|____|_______________|____|_____________|___|________________
- 0 | 16 | 2 | 2 => 100% | 8 | 7 => 87% | 33 | 7 => 21%
- 1 | 16 | 5 | 5 => 100% | 8 | 8 => 100% | 33 | 11 => 33%
+ 0 | 16 | 2 | 2 => 100% | 8 | 7 => 87% | 33 | 8 => 24%
+ 1 | 16 | 11 | 11 => 100% | 8 | 8 => 100% | 33 | 22 => 66%
2 | 16 | 2 | 2 => 100% | 8 | 8 => 100% | 33 | 1 => 3%
- 3 | 16 | 12 | 12 => 100% | 8 | 8 => 100% | 33 | 29 => 87%
+ 3 | 16 | 10 | 10 => 100% | 8 | 8 => 100% | 33 | 31 => 93%
4 | 16 | 3 | 3 => 100% | 8 | 3 => 37% | 33 | 14 => 42%
- 5 | 16 | 1 | 1 => 100% | 8 | 4 => 50% | 33 | 5 => 15%
- 6 | 16 | 8 | 8 => 100% | 8 | 7 => 87% | 33 | 20 => 60%
- 7 | 16 | 10 | 10 => 100% | 8 | 8 => 100% | 33 | 25 => 75%
+ 5 | 16 | 0 | 0 => n/a | 8 | 4 => 50% | 33 | 0 => 0%
+ 6 | 16 | 11 | 11 => 100% | 8 | 7 => 87% | 33 | 22 => 66%
+ 7 | 16 | 7 | 7 => 100% | 8 | 8 => 100% | 33 | 22 => 66%
---|----|----|------------|-------|------------|-----|------------------
- | Avg number of array inputs in used blocks : 14.00 => 42%
+ | Avg number of array inputs in used blocks : 17.14 => 51%
* Input/Clock Signal count: 35 -> placed: 35 = 100%
@@ -40,14 +40,14 @@ _|____|____|____|_______________|____|_____________|___|________________
I/O Pins : 64 53 => 82%
Clock Only Pins : 0 0 => 0%
Clock/Input Pins : 4 4 => 100%
- Logic Blocks : 8 8 => 100%
- Macrocells : 128 43 => 33%
- PT Clusters : 128 31 => 24%
+ Logic Blocks : 8 7 => 87%
+ Macrocells : 128 46 => 35%
+ PT Clusters : 128 33 => 25%
- Single PT Clusters : 128 16 => 12%
Input Registers : 0
* Routing Completion: 100%
-* Attempts: Place [ 90] Route [ 0]
+* Attempts: Place [ 94] Route [ 0]
===========================================================================
Signal Fanout Table
===========================================================================
@@ -58,7 +58,8 @@ _|____|____|____|_______________|____|_____________|___|________________
| | | | Fanout to Logic Blocks Signal Name
___|__|__|____|____________________________________________________________
1| 4|OUT| 48|=> ....|....| AMIGA_BUS_DATA_DIR
- 2| 3|OUT| 34|=> ....|....| AMIGA_BUS_ENABLE
+ 2| 3| IO| 34|=> ....|....| AMIGA_BUS_ENABLE
+ |=> Paired w/: RN_AMIGA_BUS_ENABLE
3| 2|OUT| 20|=> ....|....| AMIGA_BUS_ENABLE_LOW
4| 3| IO| 33|=> ....|....| AS_000
|=> Paired w/: RN_AS_000
@@ -92,85 +93,90 @@ ___|__|__|____|____________________________________________________________
30| 4|OUT| 47|=> ....|....| CIIN
31| +|INP| 11|=> ....|..6.| CLK_000
32| +|INP| 64|=> ...3|...7| CLK_030
- 33| 7|NOD| . |=> ....|...7| CLK_CNT_0_
- 34| 6|OUT| 65|=> ....|....| CLK_DIV_OUT
- 35| 1|OUT| 10|=> ....|....| CLK_EXP
- 36| +|Cin| 61|=> 01.3|.567| CLK_OSZI
- 37| 7|OUT| 80|=> ....|....| DSACK_0_
- 38| 7| IO| 81|=> ...3|....| DSACK_1_
+ 33| 1|NOD| . |=> .1..|....| CLK_CNT_0_
+ 34| 1|NOD| . |=> .1..|....| CLK_CNT_1_
+ 35| 6|OUT| 65|=> ....|....| CLK_DIV_OUT
+ 36| 1|OUT| 10|=> ....|....| CLK_EXP
+ 37| +|Cin| 61|=> 01.3|..67| CLK_OSZI
+ 38| 3|NOD| . |=> .1..|....| CLK_REF_1_
+ 39| 7|OUT| 80|=> ....|....| DSACK_0_
+ 40| 7| IO| 81|=> ...3|....| DSACK_1_
|=> Paired w/: RN_DSACK_1_
- 39| 0|INP| 98|=> ...3|....| DS_030
- 40| 3| IO| 30|=> ....|..6.| DTACK
- 41| 6| IO| 66|=> ....|....| E
+ 41| 0|INP| 98|=> ...3|....| DS_030
+ 42| 3| IO| 30|=> ....|..6.| DTACK
+ 43| 6| IO| 66|=> ....|....| E
|=> Paired w/: RN_E
- 42| 5|INP| 57|=> ....|...7| FC_0_
- 43| 5|INP| 58|=> ....|...7| FC_1_
- 44| 7| IO| 78|=> ....|....| FPU_CS
+ 44| 5|INP| 57|=> ....|...7| FC_0_
+ 45| 5|INP| 58|=> ....|...7| FC_1_
+ 46| 7| IO| 78|=> ....|....| FPU_CS
|=> Paired w/: RN_FPU_CS
- 45| 1| IO| 8|=> ....|....| IPL_030_0_
+ 47| 1| IO| 8|=> ....|....| IPL_030_0_
|=> Paired w/: RN_IPL_030_0_
- 46| 1| IO| 7|=> ....|....| IPL_030_1_
+ 48| 1| IO| 7|=> ....|....| IPL_030_1_
|=> Paired w/: RN_IPL_030_1_
- 47| 1| IO| 9|=> ....|....| IPL_030_2_
+ 49| 1| IO| 9|=> ....|....| IPL_030_2_
|=> Paired w/: RN_IPL_030_2_
- 48| 6|INP| 67|=> .1..|....| IPL_0_
- 49| 5|INP| 56|=> .1..|....| IPL_1_
- 50| 6|INP| 68|=> .1..|....| IPL_2_
- 51| 3| IO| 31|=> ....|....| LDS_000
+ 50| 6|INP| 67|=> .1..|....| IPL_0_
+ 51| 5|INP| 56|=> .1..|....| IPL_1_
+ 52| 6|INP| 68|=> .1..|....| IPL_2_
+ 53| 3| IO| 31|=> ....|....| LDS_000
|=> Paired w/: RN_LDS_000
- 52| 1|OUT| 3|=> ....|....| RESET
- 53| 3|NOD| . |=> ...3|...7| RN_AS_000
+ 54| 1|OUT| 3|=> ....|....| RESET
+ 55| 3|NOD| . |=> ...3|....| RN_AMIGA_BUS_ENABLE
+ |=> Paired w/: AMIGA_BUS_ENABLE
+ 56| 3|NOD| . |=> .1.3|..6.| RN_AS_000
|=> Paired w/: AS_000
- 54| 7|NOD| . |=> ...3|...7| RN_BGACK_030
+ 57| 7|NOD| . |=> ...3|...7| RN_BGACK_030
|=> Paired w/: BGACK_030
- 55| 3|NOD| . |=> ...3|....| RN_BG_000
+ 58| 3|NOD| . |=> ...3|....| RN_BG_000
|=> Paired w/: BG_000
- 56| 7|NOD| . |=> ....|...7| RN_DSACK_1_
+ 59| 7|NOD| . |=> ....|...7| RN_DSACK_1_
|=> Paired w/: DSACK_1_
- 57| 6|NOD| . |=> ...3|..6.| RN_E
+ 60| 6|NOD| . |=> ...3|..6.| RN_E
|=> Paired w/: E
- 58| 7|NOD| . |=> ..2.|4..7| RN_FPU_CS
+ 61| 7|NOD| . |=> ..2.|4..7| RN_FPU_CS
|=> Paired w/: FPU_CS
- 59| 1|NOD| . |=> .1..|....| RN_IPL_030_0_
+ 62| 1|NOD| . |=> .1..|....| RN_IPL_030_0_
|=> Paired w/: IPL_030_0_
- 60| 1|NOD| . |=> .1..|....| RN_IPL_030_1_
+ 63| 1|NOD| . |=> .1..|....| RN_IPL_030_1_
|=> Paired w/: IPL_030_1_
- 61| 1|NOD| . |=> .1..|....| RN_IPL_030_2_
+ 64| 1|NOD| . |=> .1..|....| RN_IPL_030_2_
|=> Paired w/: IPL_030_2_
- 62| 3|NOD| . |=> ...3|....| RN_LDS_000
+ 65| 3|NOD| . |=> ...3|....| RN_LDS_000
|=> Paired w/: LDS_000
- 63| 3|NOD| . |=> ...3|....| RN_UDS_000
+ 66| 3|NOD| . |=> ...3|....| RN_UDS_000
|=> Paired w/: UDS_000
- 64| 3|NOD| . |=> ...3|..6.| RN_VMA
+ 67| 3|NOD| . |=> ...3|..6.| RN_VMA
|=> Paired w/: VMA
- 65| +|INP| 86|=> 01.3|.567| RST
- 66| 6|INP| 71|=> ...3|4...| RW
- 67| 6|INP| 70|=> ...3|....| SIZE_0_
- 68| 7|INP| 79|=> ...3|....| SIZE_1_
- 69| 7|NOD| . |=> ....|...7| SM_AMIGA_0_
- 70| 6|NOD| . |=> ....|..67| SM_AMIGA_1_
- 71| 6|NOD| . |=> ....|..6.| SM_AMIGA_2_
- 72| 6|NOD| . |=> ....|..6.| SM_AMIGA_3_
- 73| 5|NOD| . |=> ...3|.56.| SM_AMIGA_4_
- 74| 0|NOD| . |=> 0...|.5..| SM_AMIGA_5_
- 75| 3|NOD| . |=> 0..3|....| SM_AMIGA_6_
- 76| 7|NOD| . |=> ...3|...7| SM_AMIGA_7_
- 77| 3| IO| 32|=> ....|....| UDS_000
+ 68| +|INP| 86|=> 01.3|..67| RST
+ 69| 6|INP| 71|=> ...3|4...| RW
+ 70| 6|INP| 70|=> ...3|....| SIZE_0_
+ 71| 7|INP| 79|=> ...3|....| SIZE_1_
+ 72| 6|NOD| . |=> .1..|..6.| SM_AMIGA_0_
+ 73| 7|NOD| . |=> ....|..67| SM_AMIGA_1_
+ 74| 6|NOD| . |=> ....|..67| SM_AMIGA_2_
+ 75| 6|NOD| . |=> ....|..6.| SM_AMIGA_3_
+ 76| 1|NOD| . |=> .1.3|..6.| SM_AMIGA_4_
+ 77| 1|NOD| . |=> .1..|....| SM_AMIGA_5_
+ 78| 0|NOD| . |=> 01.3|....| SM_AMIGA_6_
+ 79| 1|NOD| . |=> 01.3|....| SM_AMIGA_7_
+ 80| 3| IO| 32|=> ....|....| UDS_000
|=> Paired w/: RN_UDS_000
- 78| 3| IO| 35|=> ....|....| VMA
+ 81| 3| IO| 35|=> ....|....| VMA
|=> Paired w/: RN_VMA
- 79| +|INP| 36|=> ....|...7| VPA
- 80| 3|NOD| . |=> ...3|..6.| cpu_est_0_
- 81| 3|NOD| . |=> ...3|..6.| cpu_est_1_
- 82| 3|NOD| . |=> ...3|..6.| cpu_est_2_
- 83| 7|NOD| . |=> 0..3|...7| inst_AS_030_000_SYNC
- 84| 6|NOD| . |=> 01.3|.567| inst_CLK_000_D0
- 85| 3|NOD| . |=> 01.3|..67| inst_CLK_000_D1
- 86| 7|NOD| . |=> .1..|..67| inst_CLK_OUT_PRE
- 87| 6|NOD| . |=> ....|..6.| inst_DTACK_SYNC
- 88| 7|NOD| . |=> ...3|..6.| inst_VPA_D
- 89| 6|NOD| . |=> ....|..6.| inst_VPA_SYNC
- 90| +|INP| 14|=> ...3|...7| nEXP_SPACE
+ 82| +|INP| 36|=> ....|...7| VPA
+ 83| 3|NOD| . |=> ...3|..6.| cpu_est_0_
+ 84| 3|NOD| . |=> ...3|..6.| cpu_est_1_
+ 85| 6|NOD| . |=> ...3|..6.| cpu_est_2_
+ 86| 7|NOD| . |=> 01.3|...7| inst_AS_030_000_SYNC
+ 87| 6|NOD| . |=> 01.3|..67| inst_CLK_000_D0
+ 88| 6|NOD| . |=> 01.3|..67| inst_CLK_000_D1
+ 89| 6|NOD| . |=> 01.3|....| inst_CLK_000_D2
+ 90| 1|NOD| . |=> .1..|..67| inst_CLK_OUT_PRE
+ 91| 6|NOD| . |=> ....|..6.| inst_DTACK_SYNC
+ 92| 7|NOD| . |=> ...3|..6.| inst_VPA_D
+ 93| 6|NOD| . |=> ....|..6.| inst_VPA_SYNC
+ 94| +|INP| 14|=> ...3|...7| nEXP_SPACE
---------------------------------------------------------------------------
===========================================================================
< C:/Program Files (x86)/ispLever/ispcpld/dat/mach4a/mach447a Device Pin Assignments >
@@ -290,7 +296,7 @@ ____|_____|_________|______________________________________________________
| Sig Type-+ | | | | | | | XOR to Mcell Assignment
| Signal Name | | | | | | | | |
_|_________________|__|__|___|_____|__|______|___|__________|______________
- 0| SM_AMIGA_5_|NOD| | S | 2 | 4 to [ 0]| 1 XOR free
+ 0| SM_AMIGA_6_|NOD| | S | 4 | 4 to [ 0]| 1 XOR free
1| | ? | | S | | 4 free | 1 XOR free
2| | ? | | S | | 4 free | 1 XOR free
3| | ? | | S | | 4 free | 1 XOR free
@@ -317,7 +323,7 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________
| Sig Type-+ | | | |
| Signal Name | | | | | Maximum PT Capacity
_|_________________|__|__|___|_____|_______________________________________
- 0| SM_AMIGA_5_|NOD| | S | 2 |=> can support up to [ 15] logic PT(s)
+ 0| SM_AMIGA_6_|NOD| | S | 4 |=> can support up to [ 15] logic PT(s)
1| | ? | | S | |=> can support up to [ 15] logic PT(s)
2| | ? | | S | |=> can support up to [ 19] logic PT(s)
3| | ? | | S | |=> can support up to [ 19] logic PT(s)
@@ -342,7 +348,7 @@ _|_________________|__|__|___|_____|_______________________________________
| Sig Type---+ | to | Block [ 0] IO Pin | Device Pin
| Signal Name | | pin | Numbers | Numbers
_|_________________|__|_____|____________________|________________________
- 0| SM_AMIGA_5_|NOD| | => | 5 6 7 0 | 96 97 98 91
+ 0| SM_AMIGA_6_|NOD| | => | 5 6 7 0 | 96 97 98 91
1| | | | => | 5 6 7 0 | 96 97 98 91
2| | | | => | 6 7 0 1 | 97 98 91 92
3| | | | => | 6 7 0 1 | 97 98 91 92
@@ -406,7 +412,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number
---|-------|----|---|---|----------|------|-|------------------------------
0 [IOpin 0 | 91| -| | ]
[RegIn 0 |102| -| | ]
- [MCell 0 |101|NOD SM_AMIGA_5_| |*]
+ [MCell 0 |101|NOD SM_AMIGA_6_| |*]
[MCell 1 |103| -| | ]
1 [IOpin 1 | 92|OUT AVEC|*| ]
@@ -451,22 +457,22 @@ IMX No. | +---- Block IO Pin or Macrocell Number
| Src (ABEL Node/Pin#) Signal
--|--|--------------------|---------------------------------------------------
Mux00| Input Pin ( 86)| RST
-Mux01| Mcel 3 13 ( 193)| inst_CLK_000_D1
+Mux01| ... | ...
Mux02| ... | ...
Mux03| ... | ...
Mux04| Input Pin ( 61)| CLK_OSZI
Mux05| ... | ...
Mux06| ... | ...
-Mux07| ... | ...
+Mux07| Mcel 6 12 ( 263)| inst_CLK_000_D0
Mux08| ... | ...
Mux09| ... | ...
-Mux10| Mcel 7 1 ( 271)| inst_AS_030_000_SYNC
+Mux10| Mcel 1 13 ( 145)| SM_AMIGA_7_
Mux11| ... | ...
-Mux12| ... | ...
-Mux13| Mcel 6 8 ( 257)| inst_CLK_000_D0
+Mux12| Mcel 7 1 ( 271)| inst_AS_030_000_SYNC
+Mux13| Mcel 6 8 ( 257)| inst_CLK_000_D1
Mux14| ... | ...
-Mux15| Mcel 0 0 ( 101)| SM_AMIGA_5_
-Mux16| Mcel 3 6 ( 182)| SM_AMIGA_6_
+Mux15| Mcel 0 0 ( 101)| SM_AMIGA_6_
+Mux16| ... | ...
Mux17| ... | ...
Mux18| ... | ...
Mux19| ... | ...
@@ -474,7 +480,7 @@ Mux20| ... | ...
Mux21| ... | ...
Mux22| ... | ...
Mux23| ... | ...
-Mux24| ... | ...
+Mux24| Mcel 6 1 ( 247)| inst_CLK_000_D2
Mux25| ... | ...
Mux26| ... | ...
Mux27| ... | ...
@@ -496,18 +502,18 @@ Mux32| ... | ...
_|_________________|__|__|___|_____|__|______|___|__________|______________
0| CLK_EXP|OUT| | A | 1 | 2 free | 1 XOR to [ 0] for 1 PT sig
1| RESET|OUT| | A | 1 | 2 free | 1 XOR to [ 1] for 1 PT sig
- 2| | ? | | S | | 4 free | 1 XOR free
+ 2| SM_AMIGA_5_|NOD| | S | 2 | 4 to [ 2]| 1 XOR free
3| | ? | | S | | 4 free | 1 XOR free
4| IPL_030_2_| IO| | S | 3 | 4 to [ 4]| 1 XOR free
- 5| | ? | | S | | 4 free | 1 XOR free
- 6| | ? | | S | | 4 free | 1 XOR free
- 7| | ? | | S | | 4 free | 1 XOR free
+ 5|inst_CLK_OUT_PRE|NOD| | A | 3 :+: 1| 2 free | 1 XOR to [ 5]
+ 6| CLK_CNT_1_|NOD| | A | 2 | 2 to [ 6]| 1 XOR free
+ 7| | ? | | S | | 4 to [ 5]| 1 XOR free
8| IPL_030_0_| IO| | S | 3 | 4 to [ 8]| 1 XOR free
- 9| | ? | | S | | 4 free | 1 XOR free
-10| | ? | | S | | 4 free | 1 XOR free
+ 9| SM_AMIGA_4_|NOD| | S | 2 | 4 to [ 9]| 1 XOR free
+10| CLK_CNT_0_|NOD| | A | 2 | 2 to [10]| 1 XOR free
11| | ? | | S | | 4 free | 1 XOR free
12| IPL_030_1_| IO| | S | 3 | 4 to [12]| 1 XOR free
-13| | ? | | S | | 4 free | 1 XOR free
+13| SM_AMIGA_7_|NOD| | S | 2 | 4 to [13]| 1 XOR free
14| | ? | | S | | 4 free | 1 XOR free
15| | ? | | S | | 4 free | 1 XOR free
---------------------------------------------------------------------------
@@ -521,21 +527,21 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________
| Sig Type-+ | | | |
| Signal Name | | | | | Maximum PT Capacity
_|_________________|__|__|___|_____|_______________________________________
- 0| CLK_EXP|OUT| | A | 1 |=> can support up to [ 10] logic PT(s)
- 1| RESET|OUT| | A | 1 |=> can support up to [ 15] logic PT(s)
- 2| | ? | | S | |=> can support up to [ 12] logic PT(s)
- 3| | ? | | S | |=> can support up to [ 15] logic PT(s)
- 4| IPL_030_2_| IO| | S | 3 |=> can support up to [ 20] logic PT(s)
- 5| | ? | | S | |=> can support up to [ 15] logic PT(s)
- 6| | ? | | S | |=> can support up to [ 15] logic PT(s)
- 7| | ? | | S | |=> can support up to [ 15] logic PT(s)
- 8| IPL_030_0_| IO| | S | 3 |=> can support up to [ 20] logic PT(s)
- 9| | ? | | S | |=> can support up to [ 15] logic PT(s)
-10| | ? | | S | |=> can support up to [ 15] logic PT(s)
-11| | ? | | S | |=> can support up to [ 15] logic PT(s)
-12| IPL_030_1_| IO| | S | 3 |=> can support up to [ 20] logic PT(s)
-13| | ? | | S | |=> can support up to [ 15] logic PT(s)
-14| | ? | | S | |=> can support up to [ 15] logic PT(s)
+ 0| CLK_EXP|OUT| | A | 1 |=> can support up to [ 5] logic PT(s)
+ 1| RESET|OUT| | A | 1 |=> can support up to [ 10] logic PT(s)
+ 2| SM_AMIGA_5_|NOD| | S | 2 |=> can support up to [ 12] logic PT(s)
+ 3| | ? | | S | |=> can support up to [ 7] logic PT(s)
+ 4| IPL_030_2_| IO| | S | 3 |=> can support up to [ 12] logic PT(s)
+ 5|inst_CLK_OUT_PRE|NOD| | A | 3 :+: 1|=> can support up to [ 7] logic PT(s)
+ 6| CLK_CNT_1_|NOD| | A | 2 |=> can support up to [ 5] logic PT(s)
+ 7| | ? | | S | |=> can support up to [ 1] logic PT(s)
+ 8| IPL_030_0_| IO| | S | 3 |=> can support up to [ 5] logic PT(s)
+ 9| SM_AMIGA_4_|NOD| | S | 2 |=> can support up to [ 10] logic PT(s)
+10| CLK_CNT_0_|NOD| | A | 2 |=> can support up to [ 8] logic PT(s)
+11| | ? | | S | |=> can support up to [ 5] logic PT(s)
+12| IPL_030_1_| IO| | S | 3 |=> can support up to [ 15] logic PT(s)
+13| SM_AMIGA_7_|NOD| | S | 2 |=> can support up to [ 15] logic PT(s)
+14| | ? | | S | |=> can support up to [ 10] logic PT(s)
15| | ? | | S | |=> can support up to [ 10] logic PT(s)
---------------------------------------------------------------------------
===========================================================================
@@ -548,18 +554,18 @@ _|_________________|__|__|___|_____|_______________________________________
_|_________________|__|_____|____________________|________________________
0| CLK_EXP|OUT| | => | 5 6 7 ( 0)| 5 4 3 ( 10)
1| RESET|OUT| | => | 5 6 ( 7) 0 | 5 4 ( 3) 10
- 2| | | | => | 6 7 0 1 | 4 3 10 9
+ 2| SM_AMIGA_5_|NOD| | => | 6 7 0 1 | 4 3 10 9
3| | | | => | 6 7 0 1 | 4 3 10 9
4| IPL_030_2_| IO| | => | 7 0 ( 1) 2 | 3 10 ( 9) 8
- 5| | | | => | 7 0 1 2 | 3 10 9 8
- 6| | | | => | 0 1 2 3 | 10 9 8 7
+ 5|inst_CLK_OUT_PRE|NOD| | => | 7 0 1 2 | 3 10 9 8
+ 6| CLK_CNT_1_|NOD| | => | 0 1 2 3 | 10 9 8 7
7| | | | => | 0 1 2 3 | 10 9 8 7
8| IPL_030_0_| IO| | => | 1 ( 2) 3 4 | 9 ( 8) 7 6
- 9| | | | => | 1 2 3 4 | 9 8 7 6
-10| | | | => | 2 3 4 5 | 8 7 6 5
+ 9| SM_AMIGA_4_|NOD| | => | 1 2 3 4 | 9 8 7 6
+10| CLK_CNT_0_|NOD| | => | 2 3 4 5 | 8 7 6 5
11| | | | => | 2 3 4 5 | 8 7 6 5
12| IPL_030_1_| IO| | => |( 3) 4 5 6 |( 7) 6 5 4
-13| | | | => | 3 4 5 6 | 7 6 5 4
+13| SM_AMIGA_7_|NOD| | => | 3 4 5 6 | 7 6 5 4
14| | | | => | 4 5 6 7 | 6 5 4 3
15| | | | => | 4 5 6 7 | 6 5 4 3
---------------------------------------------------------------------------
@@ -618,33 +624,33 @@ IMX No. | +---- Block IO Pin or Macrocell Number
1 [IOpin 1 | 9| IO IPL_030_2_|*| ] paired w/[ RN_IPL_030_2_]
[RegIn 1 |129| -| | ]
- [MCell 2 |128| -| | ]
+ [MCell 2 |128|NOD SM_AMIGA_5_| |*]
[MCell 3 |130| -| | ]
2 [IOpin 2 | 8| IO IPL_030_0_|*| ] paired w/[ RN_IPL_030_0_]
[RegIn 2 |132| -| | ]
[MCell 4 |131|NOD RN_IPL_030_2_| |*] paired w/[ IPL_030_2_]
- [MCell 5 |133| -| | ]
+ [MCell 5 |133|NOD inst_CLK_OUT_PRE| |*]
3 [IOpin 3 | 7| IO IPL_030_1_|*| ] paired w/[ RN_IPL_030_1_]
[RegIn 3 |135| -| | ]
- [MCell 6 |134| -| | ]
+ [MCell 6 |134|NOD CLK_CNT_1_| |*]
[MCell 7 |136| -| | ]
4 [IOpin 4 | 6|INP A_29_|*|*]
[RegIn 4 |138| -| | ]
[MCell 8 |137|NOD RN_IPL_030_0_| |*] paired w/[ IPL_030_0_]
- [MCell 9 |139| -| | ]
+ [MCell 9 |139|NOD SM_AMIGA_4_| |*]
5 [IOpin 5 | 5|INP A_30_|*|*]
[RegIn 5 |141| -| | ]
- [MCell 10 |140| -| | ]
+ [MCell 10 |140|NOD CLK_CNT_0_| |*]
[MCell 11 |142| -| | ]
6 [IOpin 6 | 4|INP A_31_|*|*]
[RegIn 6 |144| -| | ]
[MCell 12 |143|NOD RN_IPL_030_1_| |*] paired w/[ IPL_030_1_]
- [MCell 13 |145| -| | ]
+ [MCell 13 |145|NOD SM_AMIGA_7_| |*]
7 [IOpin 7 | 3|OUT RESET|*| ]
[RegIn 7 |147| -| | ]
@@ -658,37 +664,37 @@ IMX No. | +---- Block IO Pin or Macrocell Number
| Src (ABEL Node/Pin#) Signal
--|--|--------------------|---------------------------------------------------
Mux00| IOPin 6 2 ( 67)| IPL_0_
-Mux01| Mcel 3 13 ( 193)| inst_CLK_000_D1
-Mux02| ... | ...
+Mux01| Mcel 1 12 ( 143)| RN_IPL_030_1_
+Mux02| Mcel 1 10 ( 140)| CLK_CNT_0_
Mux03| IOPin 5 4 ( 56)| IPL_1_
Mux04| IOPin 6 3 ( 68)| IPL_2_
Mux05| ... | ...
-Mux06| ... | ...
-Mux07| ... | ...
+Mux06| Mcel 1 9 ( 139)| SM_AMIGA_4_
+Mux07| Mcel 3 9 ( 187)| RN_AS_000
Mux08| Mcel 1 8 ( 137)| RN_IPL_030_0_
Mux09| ... | ...
-Mux10| Mcel 6 8 ( 257)| inst_CLK_000_D0
-Mux11| ... | ...
-Mux12| Mcel 1 12 ( 143)| RN_IPL_030_1_
-Mux13| Mcel 7 5 ( 277)| inst_CLK_OUT_PRE
-Mux14| ... | ...
-Mux15| ... | ...
-Mux16| ... | ...
+Mux10| Mcel 1 2 ( 128)| SM_AMIGA_5_
+Mux11| Mcel 1 6 ( 134)| CLK_CNT_1_
+Mux12| Mcel 7 1 ( 271)| inst_AS_030_000_SYNC
+Mux13| Mcel 6 8 ( 257)| inst_CLK_000_D1
+Mux14| Mcel 6 12 ( 263)| inst_CLK_000_D0
+Mux15| Mcel 0 0 ( 101)| SM_AMIGA_6_
+Mux16| Mcel 3 6 ( 182)| CLK_REF_1_
Mux17| ... | ...
Mux18| ... | ...
Mux19| ... | ...
Mux20| ... | ...
Mux21| Input Pin ( 86)| RST
-Mux22| ... | ...
+Mux22| Mcel 6 5 ( 253)| SM_AMIGA_0_
Mux23| ... | ...
-Mux24| ... | ...
+Mux24| Mcel 6 1 ( 247)| inst_CLK_000_D2
Mux25| ... | ...
Mux26| ... | ...
Mux27| Mcel 1 4 ( 131)| RN_IPL_030_2_
-Mux28| ... | ...
+Mux28| Mcel 1 13 ( 145)| SM_AMIGA_7_
Mux29| Input Pin ( 61)| CLK_OSZI
Mux30| ... | ...
-Mux31| ... | ...
+Mux31| Mcel 1 5 ( 133)| inst_CLK_OUT_PRE
Mux32| ... | ...
---------------------------------------------------------------------------
===========================================================================
@@ -906,20 +912,20 @@ Mux32| ... | ...
| Signal Name | | | | | | | | |
_|_________________|__|__|___|_____|__|______|___|__________|______________
0| DTACK| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig
- 1| BG_000| IO| | S | 3 | 4 to [ 2]| 1 XOR free
- 2| cpu_est_1_|NOD| | A | 4 | 2 to [ 1]| 1 XOR to [ 1] as logic PT
- 3| | ? | | S | | 4 to [ 4]| 1 XOR free
- 4| VMA| IO| | S | 2 | 4 to [ 5]| 1 XOR free
- 5| AS_000| IO| | S | 2 | 4 to [ 6]| 1 XOR free
- 6| SM_AMIGA_6_|NOD| | S | 3 | 4 free | 1 XOR free
- 7| | ? | | S | | 4 to [ 8]| 1 XOR to [ 8] as logic PT
+ 1| BG_000| IO| | S | 3 | 4 to [ 1]| 1 XOR free
+ 2| cpu_est_0_|NOD| | A | 3 | 2 to [ 2]| 1 XOR to [ 2] as logic PT
+ 3| | ? | | S | | 4 free | 1 XOR free
+ 4|AMIGA_BUS_ENABLE| IO| | A | 3 | 2 to [ 4]| 1 XOR to [ 4] as logic PT
+ 5| VMA| IO| | S | 2 | 4 to [ 5]| 1 XOR free
+ 6| CLK_REF_1_|NOD| | A | 1 | 2 free | 1 XOR to [ 6] for 1 PT sig
+ 7| | ? | | S | | 4 to [ 8]| 1 XOR free
8| LDS_000| IO| | S |12 | 4 to [ 8]| 1 XOR to [ 8] as logic PT
- 9|AMIGA_BUS_ENABLE|OUT| | S | 1 | 4 to [10]| 1 XOR to [ 9] for 1 PT sig
-10| cpu_est_2_|NOD| | A | 3 :+: 1| 2 to [ 8]| 1 XOR to [10]
-11| | ? | | S | | 4 to [12]| 1 XOR free
+ 9| AS_000| IO| | S | 2 | 4 to [ 8]| 1 XOR to [ 8] as logic PT
+10| | ? | | S | | 4 to [ 9]| 1 XOR free
+11| | ? | | S | | 4 free | 1 XOR free
12| UDS_000| IO| | S | 8 | 4 to [12]| 1 XOR to [12] as logic PT
-13|inst_CLK_000_D1|NOD| | A | 1 | 2 to [12]| 1 XOR to [13] for 1 PT sig
-14| cpu_est_0_|NOD| | A | 3 | 2 to [14]| 1 XOR to [14] as logic PT
+13| cpu_est_1_|NOD| | A | 4 | 2 to [12]| 1 XOR to [12] as logic PT
+14| | ? | | S | | 4 to [13]| 1 XOR free
15| | ? | | S | | 4 free | 1 XOR free
---------------------------------------------------------------------------
===========================================================================
@@ -933,20 +939,20 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________
| Signal Name | | | | | Maximum PT Capacity
_|_________________|__|__|___|_____|_______________________________________
0| DTACK| IO| | S | 1 |=> can support up to [ 5] logic PT(s)
- 1| BG_000| IO| | S | 3 |=> can support up to [ 7] logic PT(s)
- 2| cpu_est_1_|NOD| | A | 4 |=> can support up to [ 5] logic PT(s)
- 3| | ? | | S | |=> can support up to [ 1] logic PT(s)
- 4| VMA| IO| | S | 2 |=> can support up to [ 10] logic PT(s)
- 5| AS_000| IO| | S | 2 |=> can support up to [ 10] logic PT(s)
- 6| SM_AMIGA_6_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s)
- 7| | ? | | S | |=> can support up to [ 5] logic PT(s)
- 8| LDS_000| IO| | S |12 |=> can support up to [ 12] logic PT(s)
- 9|AMIGA_BUS_ENABLE|OUT| | S | 1 |=> can support up to [ 1] logic PT(s)
-10| cpu_est_2_|NOD| | A | 3 :+: 1|=> can support up to [ 4] logic PT(s)
-11| | ? | | S | |=> can support up to [ 1] logic PT(s)
-12| UDS_000| IO| | S | 8 |=> can support up to [ 12] logic PT(s)
-13|inst_CLK_000_D1|NOD| | A | 1 |=> can support up to [ 6] logic PT(s)
-14| cpu_est_0_|NOD| | A | 3 |=> can support up to [ 8] logic PT(s)
+ 1| BG_000| IO| | S | 3 |=> can support up to [ 14] logic PT(s)
+ 2| cpu_est_0_|NOD| | A | 3 |=> can support up to [ 8] logic PT(s)
+ 3| | ? | | S | |=> can support up to [ 5] logic PT(s)
+ 4|AMIGA_BUS_ENABLE| IO| | A | 3 |=> can support up to [ 10] logic PT(s)
+ 5| VMA| IO| | S | 2 |=> can support up to [ 7] logic PT(s)
+ 6| CLK_REF_1_|NOD| | A | 1 |=> can support up to [ 3] logic PT(s)
+ 7| | ? | | S | |=> can support up to [ 3] logic PT(s)
+ 8| LDS_000| IO| | S |12 |=> can support up to [ 15] logic PT(s)
+ 9| AS_000| IO| | S | 2 |=> can support up to [ 10] logic PT(s)
+10| | ? | | S | |=> can support up to [ 6] logic PT(s)
+11| | ? | | S | |=> can support up to [ 5] logic PT(s)
+12| UDS_000| IO| | S | 8 |=> can support up to [ 13] logic PT(s)
+13| cpu_est_1_|NOD| | A | 4 |=> can support up to [ 10] logic PT(s)
+14| | ? | | S | |=> can support up to [ 6] logic PT(s)
15| | ? | | S | |=> can support up to [ 5] logic PT(s)
---------------------------------------------------------------------------
===========================================================================
@@ -959,19 +965,19 @@ _|_________________|__|__|___|_____|_______________________________________
_|_________________|__|_____|____________________|________________________
0| DTACK| IO| | => |( 5) 6 7 0 |( 30) 29 28 35
1| BG_000| IO| | => | 5 ( 6) 7 0 | 30 ( 29) 28 35
- 2| cpu_est_1_|NOD| | => | 6 7 0 1 | 29 28 35 34
+ 2| cpu_est_0_|NOD| | => | 6 7 0 1 | 29 28 35 34
3| | | | => | 6 7 0 1 | 29 28 35 34
- 4| VMA| IO| | => | 7 ( 0) 1 2 | 28 ( 35) 34 33
- 5| AS_000| IO| | => | 7 0 1 ( 2)| 28 35 34 ( 33)
- 6| SM_AMIGA_6_|NOD| | => | 0 1 2 3 | 35 34 33 32
+ 4|AMIGA_BUS_ENABLE| IO| | => | 7 0 ( 1) 2 | 28 35 ( 34) 33
+ 5| VMA| IO| | => | 7 ( 0) 1 2 | 28 ( 35) 34 33
+ 6| CLK_REF_1_|NOD| | => | 0 1 2 3 | 35 34 33 32
7| | | | => | 0 1 2 3 | 35 34 33 32
8| LDS_000| IO| | => | 1 2 3 ( 4)| 34 33 32 ( 31)
- 9|AMIGA_BUS_ENABLE|OUT| | => |( 1) 2 3 4 |( 34) 33 32 31
-10| cpu_est_2_|NOD| | => | 2 3 4 5 | 33 32 31 30
+ 9| AS_000| IO| | => | 1 ( 2) 3 4 | 34 ( 33) 32 31
+10| | | | => | 2 3 4 5 | 33 32 31 30
11| | | | => | 2 3 4 5 | 33 32 31 30
12| UDS_000| IO| | => |( 3) 4 5 6 |( 32) 31 30 29
-13|inst_CLK_000_D1|NOD| | => | 3 4 5 6 | 32 31 30 29
-14| cpu_est_0_|NOD| | => | 4 5 6 7 | 31 30 29 28
+13| cpu_est_1_|NOD| | => | 3 4 5 6 | 32 31 30 29
+14| | | | => | 4 5 6 7 | 31 30 29 28
15| | | | => | 4 5 6 7 | 31 30 29 28
---------------------------------------------------------------------------
===========================================================================
@@ -983,9 +989,9 @@ _|_________________|__|_____|____________________|________________________
| Sig Type--+ | | |
| Signal Name | | | | Node Destinations Via Output Matrix
_|_________________|__|___|_____|___________________________________________
- 0| VMA| IO|*| 35| => | 0 1 2 3 ( 4) 5 6 7
- 1|AMIGA_BUS_ENABLE|OUT|*| 34| => | 2 3 4 5 6 7 8 ( 9)
- 2| AS_000| IO|*| 33| => | 4 ( 5) 6 7 8 9 10 11
+ 0| VMA| IO|*| 35| => | 0 1 2 3 4 ( 5) 6 7
+ 1|AMIGA_BUS_ENABLE| IO|*| 34| => | 2 3 ( 4) 5 6 7 8 9
+ 2| AS_000| IO|*| 33| => | 4 5 6 7 8 ( 9) 10 11
3| UDS_000| IO|*| 32| => | 6 7 8 9 10 11 (12) 13
4| LDS_000| IO|*| 31| => | ( 8) 9 10 11 12 13 14 15
5| DTACK| IO|*| 30| => | 10 11 12 13 14 15 ( 0) 1
@@ -1003,7 +1009,8 @@ _|_________________|__|___|_____|___________________________________________
_|_________________|__|___|_____|__________________________________________
0| VMA| IO|*| 35| => | Input macrocell [ -]
| | | | | | IO paired w/ node [ RN_VMA]
- 1|AMIGA_BUS_ENABLE|OUT|*| 34| => | Input macrocell [ -]
+ 1|AMIGA_BUS_ENABLE| IO|*| 34| => | Input macrocell [ -]
+ | | | | | | IO paired w/ node [RN_AMIGA_BUS_ENABLE]
2| AS_000| IO|*| 33| => | Input macrocell [ -]
| | | | | | IO paired w/ node [ RN_AS_000]
3| UDS_000| IO|*| 32| => | Input macrocell [ -]
@@ -1029,39 +1036,39 @@ IMX No. | +---- Block IO Pin or Macrocell Number
[MCell 0 |173| IO DTACK| | ]
[MCell 1 |175|NOD RN_BG_000| |*] paired w/[ BG_000]
- 1 [IOpin 1 | 34|OUT AMIGA_BUS_ENABLE|*| ]
+ 1 [IOpin 1 | 34| IO AMIGA_BUS_ENABLE|*| ] paired w/[RN_AMIGA_BUS_ENABLE]
[RegIn 1 |177| -| | ]
- [MCell 2 |176|NOD cpu_est_1_| |*]
+ [MCell 2 |176|NOD cpu_est_0_| |*]
[MCell 3 |178| -| | ]
2 [IOpin 2 | 33| IO AS_000|*| ] paired w/[ RN_AS_000]
[RegIn 2 |180| -| | ]
- [MCell 4 |179|NOD RN_VMA| |*] paired w/[ VMA]
- [MCell 5 |181|NOD RN_AS_000| |*] paired w/[ AS_000]
+ [MCell 4 |179|NOD RN_AMIGA_BUS_ENABLE| |*] paired w/[AMIGA_BUS_ENABLE]
+ [MCell 5 |181|NOD RN_VMA| |*] paired w/[ VMA]
3 [IOpin 3 | 32| IO UDS_000|*| ] paired w/[ RN_UDS_000]
[RegIn 3 |183| -| | ]
- [MCell 6 |182|NOD SM_AMIGA_6_| |*]
+ [MCell 6 |182|NOD CLK_REF_1_| |*]
[MCell 7 |184| -| | ]
4 [IOpin 4 | 31| IO LDS_000|*| ] paired w/[ RN_LDS_000]
[RegIn 4 |186| -| | ]
[MCell 8 |185|NOD RN_LDS_000| |*] paired w/[ LDS_000]
- [MCell 9 |187|OUT AMIGA_BUS_ENABLE| | ]
+ [MCell 9 |187|NOD RN_AS_000| |*] paired w/[ AS_000]
5 [IOpin 5 | 30| IO DTACK|*|*]
[RegIn 5 |189| -| | ]
- [MCell 10 |188|NOD cpu_est_2_| |*]
+ [MCell 10 |188| -| | ]
[MCell 11 |190| -| | ]
6 [IOpin 6 | 29| IO BG_000|*| ] paired w/[ RN_BG_000]
[RegIn 6 |192| -| | ]
[MCell 12 |191|NOD RN_UDS_000| |*] paired w/[ UDS_000]
- [MCell 13 |193|NOD inst_CLK_000_D1| |*]
+ [MCell 13 |193|NOD cpu_est_1_| |*]
7 [IOpin 7 | 28|INP BGACK_000|*|*]
[RegIn 7 |195| -| | ]
- [MCell 14 |194|NOD cpu_est_0_| |*]
+ [MCell 14 |194| -| | ]
[MCell 15 |196| -| | ]
---------------------------------------------------------------------------
===========================================================================
@@ -1070,39 +1077,39 @@ IMX No. | +---- Block IO Pin or Macrocell Number
+- Central Switch Matrix No.
| Src (ABEL Node/Pin#) Signal
--|--|--------------------|---------------------------------------------------
-Mux00| IOPin 6 5 ( 70)| SIZE_0_
-Mux01| Mcel 3 13 ( 193)| inst_CLK_000_D1
-Mux02| Mcel 6 4 ( 251)| RN_E
-Mux03| Mcel 3 2 ( 176)| cpu_est_1_
-Mux04| IOPin 2 6 ( 21)| BG_030
-Mux05| Mcel 3 8 ( 185)| RN_LDS_000
+Mux00| Input Pin ( 86)| RST
+Mux01| Mcel 3 13 ( 193)| cpu_est_1_
+Mux02| Mcel 3 1 ( 175)| RN_BG_000
+Mux03| Mcel 3 2 ( 176)| cpu_est_0_
+Mux04| Mcel 0 0 ( 101)| SM_AMIGA_6_
+Mux05| IOPin 0 7 ( 98)| DS_030
Mux06| IOPin 7 6 ( 79)| SIZE_1_
-Mux07| Mcel 7 13 ( 289)| inst_VPA_D
+Mux07| Mcel 6 12 ( 263)| inst_CLK_000_D0
Mux08| IOPin 6 6 ( 71)| RW
Mux09| IOPin 7 3 ( 82)| AS_030
-Mux10| Mcel 3 14 ( 194)| cpu_est_0_
+Mux10| Mcel 3 4 ( 179)| RN_AMIGA_BUS_ENABLE
Mux11| Mcel 3 12 ( 191)| RN_UDS_000
-Mux12| IOPin 0 7 ( 98)| DS_030
-Mux13| Mcel 6 8 ( 257)| inst_CLK_000_D0
-Mux14| Mcel 3 4 ( 179)| RN_VMA
+Mux12| Mcel 3 9 ( 187)| RN_AS_000
+Mux13| Mcel 6 8 ( 257)| inst_CLK_000_D1
+Mux14| IOPin 6 5 ( 70)| SIZE_0_
Mux15| Input Pin ( 14)| nEXP_SPACE
-Mux16| Mcel 3 6 ( 182)| SM_AMIGA_6_
-Mux17| Mcel 3 1 ( 175)| RN_BG_000
+Mux16| Mcel 3 8 ( 185)| RN_LDS_000
+Mux17| IOPin 7 4 ( 81)| DSACK_1_
Mux18| IOPin 6 4 ( 69)| A_0_
Mux19| Mcel 7 1 ( 271)| inst_AS_030_000_SYNC
Mux20| Input Pin ( 64)| CLK_030
-Mux21| Input Pin ( 86)| RST
-Mux22| ... | ...
+Mux21| Mcel 6 4 ( 251)| RN_E
+Mux22| IOPin 2 6 ( 21)| BG_030
Mux23| Mcel 7 4 ( 275)| RN_BGACK_030
-Mux24| Mcel 3 5 ( 181)| RN_AS_000
-Mux25| Mcel 5 0 ( 221)| SM_AMIGA_4_
+Mux24| Mcel 3 5 ( 181)| RN_VMA
+Mux25| Mcel 6 13 ( 265)| cpu_est_2_
Mux26| ... | ...
-Mux27| Mcel 7 9 ( 283)| SM_AMIGA_7_
-Mux28| ... | ...
+Mux27| Mcel 7 9 ( 283)| inst_VPA_D
+Mux28| Mcel 1 13 ( 145)| SM_AMIGA_7_
Mux29| Input Pin ( 61)| CLK_OSZI
-Mux30| Mcel 3 10 ( 188)| cpu_est_2_
-Mux31| ... | ...
-Mux32| IOPin 7 4 ( 81)| DSACK_1_
+Mux30| ... | ...
+Mux31| Mcel 1 9 ( 139)| SM_AMIGA_4_
+Mux32| Mcel 6 1 ( 247)| inst_CLK_000_D2
---------------------------------------------------------------------------
===========================================================================
< Block [ 4] > Macrocell (MCell) Cluster Assignments
@@ -1308,85 +1315,6 @@ Mux30| ... | ...
Mux31| ... | ...
Mux32| ... | ...
---------------------------------------------------------------------------
-===========================================================================
- < Block [ 5] > Macrocell (MCell) Cluster Assignments
-===========================================================================
- + Macrocell Number
- | PT Requirements------ Logic XOR+ +--- Macrocell PT Cluster Size
- | Sync/Async-------+ | | | Cluster to Mcell Assignment
- | Node Fixed(*)----+ | | | | | +- XOR PT Size
- | Sig Type-+ | | | | | | | XOR to Mcell Assignment
- | Signal Name | | | | | | | | |
-_|_________________|__|__|___|_____|__|______|___|__________|______________
- 0| SM_AMIGA_4_|NOD| | S | 2 | 4 to [ 0]| 1 XOR free
- 1| | ? | | S | | 4 free | 1 XOR free
- 2| | ? | | S | | 4 free | 1 XOR free
- 3| | ? | | S | | 4 free | 1 XOR free
- 4| | ? | | S | | 4 free | 1 XOR free
- 5| | ? | | S | | 4 free | 1 XOR free
- 6| | ? | | S | | 4 free | 1 XOR free
- 7| | ? | | S | | 4 free | 1 XOR free
- 8| | ? | | S | | 4 free | 1 XOR free
- 9| | ? | | S | | 4 free | 1 XOR free
-10| | ? | | S | | 4 free | 1 XOR free
-11| | ? | | S | | 4 free | 1 XOR free
-12| | ? | | S | | 4 free | 1 XOR free
-13| | ? | | S | | 4 free | 1 XOR free
-14| | ? | | S | | 4 free | 1 XOR free
-15| | ? | | S | | 4 free | 1 XOR free
----------------------------------------------------------------------------
-===========================================================================
- < Block [ 5] > Maximum PT Capacity
-===========================================================================
- + Macrocell Number
- | PT Requirements------ Logic XOR+
- | Sync/Async-------+ | |
- | Node Fixed(*)----+ | | |
- | Sig Type-+ | | | |
- | Signal Name | | | | | Maximum PT Capacity
-_|_________________|__|__|___|_____|_______________________________________
- 0| SM_AMIGA_4_|NOD| | S | 2 |=> can support up to [ 15] logic PT(s)
- 1| | ? | | S | |=> can support up to [ 15] logic PT(s)
- 2| | ? | | S | |=> can support up to [ 20] logic PT(s)
- 3| | ? | | S | |=> can support up to [ 20] logic PT(s)
- 4| | ? | | S | |=> can support up to [ 20] logic PT(s)
- 5| | ? | | S | |=> can support up to [ 20] logic PT(s)
- 6| | ? | | S | |=> can support up to [ 20] logic PT(s)
- 7| | ? | | S | |=> can support up to [ 20] logic PT(s)
- 8| | ? | | S | |=> can support up to [ 20] logic PT(s)
- 9| | ? | | S | |=> can support up to [ 20] logic PT(s)
-10| | ? | | S | |=> can support up to [ 20] logic PT(s)
-11| | ? | | S | |=> can support up to [ 20] logic PT(s)
-12| | ? | | S | |=> can support up to [ 20] logic PT(s)
-13| | ? | | S | |=> can support up to [ 20] logic PT(s)
-14| | ? | | S | |=> can support up to [ 15] logic PT(s)
-15| | ? | | S | |=> can support up to [ 10] logic PT(s)
----------------------------------------------------------------------------
-===========================================================================
- < Block [ 5] > Node-Pin Assignments
-===========================================================================
- + Macrocell Number
- | Node Fixed(*)------+
- | Sig Type---+ | to | Block [ 5] IO Pin | Device Pin
- | Signal Name | | pin | Numbers | Numbers
-_|_________________|__|_____|____________________|________________________
- 0| SM_AMIGA_4_|NOD| | => | 5 6 7 0 | 55 54 53 60
- 1| | | | => | 5 6 7 0 | 55 54 53 60
- 2| | | | => | 6 7 0 1 | 54 53 60 59
- 3| | | | => | 6 7 0 1 | 54 53 60 59
- 4| | | | => | 7 0 1 2 | 53 60 59 58
- 5| | | | => | 7 0 1 2 | 53 60 59 58
- 6| | | | => | 0 1 2 3 | 60 59 58 57
- 7| | | | => | 0 1 2 3 | 60 59 58 57
- 8| | | | => | 1 2 3 4 | 59 58 57 56
- 9| | | | => | 1 2 3 4 | 59 58 57 56
-10| | | | => | 2 3 4 5 | 58 57 56 55
-11| | | | => | 2 3 4 5 | 58 57 56 55
-12| | | | => | 3 4 5 6 | 57 56 55 54
-13| | | | => | 3 4 5 6 | 57 56 55 54
-14| | | | => | 4 5 6 7 | 56 55 54 53
-15| | | | => | 4 5 6 7 | 56 55 54 53
----------------------------------------------------------------------------
===========================================================================
< Block [ 5] > IO-to-Node Pin Mapping
===========================================================================
@@ -1434,7 +1362,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number
---|-------|----|---|---|----------|------|-|------------------------------
0 [IOpin 0 | 60| -| | ]
[RegIn 0 |222| -| | ]
- [MCell 0 |221|NOD SM_AMIGA_4_| |*]
+ [MCell 0 |221| -| | ]
[MCell 1 |223| -| | ]
1 [IOpin 1 | 59|INP A_17_|*|*]
@@ -1472,46 +1400,6 @@ IMX No. | +---- Block IO Pin or Macrocell Number
[MCell 14 |242| -| | ]
[MCell 15 |244| -| | ]
---------------------------------------------------------------------------
-===========================================================================
- < Block [ 5] > Logic Array Fan-in
-===========================================================================
- +- Central Switch Matrix No.
- | Src (ABEL Node/Pin#) Signal
---|--|--------------------|---------------------------------------------------
-Mux00| Input Pin ( 86)| RST
-Mux01| ... | ...
-Mux02| ... | ...
-Mux03| ... | ...
-Mux04| Input Pin ( 61)| CLK_OSZI
-Mux05| Mcel 5 0 ( 221)| SM_AMIGA_4_
-Mux06| ... | ...
-Mux07| ... | ...
-Mux08| ... | ...
-Mux09| ... | ...
-Mux10| Mcel 6 8 ( 257)| inst_CLK_000_D0
-Mux11| ... | ...
-Mux12| ... | ...
-Mux13| ... | ...
-Mux14| ... | ...
-Mux15| Mcel 0 0 ( 101)| SM_AMIGA_5_
-Mux16| ... | ...
-Mux17| ... | ...
-Mux18| ... | ...
-Mux19| ... | ...
-Mux20| ... | ...
-Mux21| ... | ...
-Mux22| ... | ...
-Mux23| ... | ...
-Mux24| ... | ...
-Mux25| ... | ...
-Mux26| ... | ...
-Mux27| ... | ...
-Mux28| ... | ...
-Mux29| ... | ...
-Mux30| ... | ...
-Mux31| ... | ...
-Mux32| ... | ...
----------------------------------------------------------------------------
===========================================================================
< Block [ 6] > Macrocell (MCell) Cluster Assignments
===========================================================================
@@ -1523,19 +1411,19 @@ Mux32| ... | ...
| Signal Name | | | | | | | | |
_|_________________|__|__|___|_____|__|______|___|__________|______________
0| CLK_DIV_OUT|OUT| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig
- 1| SM_AMIGA_2_|NOD| | A | 3 | 2 to [ 1]| 1 XOR to [ 1] as logic PT
- 2| | ? | | S | | 4 free | 1 XOR free
+ 1|inst_CLK_000_D2|NOD| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig
+ 2| SM_AMIGA_3_|NOD| | A | 3 | 2 to [ 2]| 1 XOR to [ 2] as logic PT
3| | ? | | S | | 4 free | 1 XOR free
4| E| IO| | S | 3 | 4 to [ 4]| 1 XOR free
- 5| SM_AMIGA_3_|NOD| | A | 3 | 2 to [ 5]| 1 XOR to [ 5] as logic PT
- 6| | ? | | S | | 4 free | 1 XOR free
+ 5| SM_AMIGA_0_|NOD| | A | 3 | 2 to [ 5]| 1 XOR to [ 5] as logic PT
+ 6| inst_VPA_SYNC|NOD| | A | 2 | 2 to [ 6]| 1 XOR free
7| | ? | | S | | 4 free | 1 XOR free
- 8|inst_CLK_000_D0|NOD| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig
- 9| inst_VPA_SYNC|NOD| | A | 2 | 2 to [ 9]| 1 XOR free
-10| | ? | | S | | 4 free | 1 XOR free
+ 8|inst_CLK_000_D1|NOD| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig
+ 9| SM_AMIGA_2_|NOD| | A | 3 | 2 to [ 9]| 1 XOR to [ 9] as logic PT
+10|inst_DTACK_SYNC|NOD| | A | 2 | 2 to [10]| 1 XOR free
11| | ? | | S | | 4 free | 1 XOR free
-12| SM_AMIGA_1_|NOD| | A | 3 | 2 to [12]| 1 XOR to [12] as logic PT
-13|inst_DTACK_SYNC|NOD| | A | 2 | 2 to [13]| 1 XOR free
+12|inst_CLK_000_D0|NOD| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig
+13| cpu_est_2_|NOD| | S | 3 :+: 1| 4 to [13]| 1 XOR to [13]
14| | ? | | S | | 4 free | 1 XOR free
15| | ? | | S | | 4 free | 1 XOR free
---------------------------------------------------------------------------
@@ -1549,20 +1437,20 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________
| Sig Type-+ | | | |
| Signal Name | | | | | Maximum PT Capacity
_|_________________|__|__|___|_____|_______________________________________
- 0| CLK_DIV_OUT|OUT| | S | 1 |=> can support up to [ 10] logic PT(s)
- 1| SM_AMIGA_2_|NOD| | A | 3 |=> can support up to [ 17] logic PT(s)
- 2| | ? | | S | |=> can support up to [ 10] logic PT(s)
- 3| | ? | | S | |=> can support up to [ 10] logic PT(s)
- 4| E| IO| | S | 3 |=> can support up to [ 15] logic PT(s)
- 5| SM_AMIGA_3_|NOD| | A | 3 |=> can support up to [ 13] logic PT(s)
- 6| | ? | | S | |=> can support up to [ 14] logic PT(s)
- 7| | ? | | S | |=> can support up to [ 14] logic PT(s)
- 8|inst_CLK_000_D0|NOD| | S | 1 |=> can support up to [ 15] logic PT(s)
- 9| inst_VPA_SYNC|NOD| | A | 2 |=> can support up to [ 17] logic PT(s)
-10| | ? | | S | |=> can support up to [ 10] logic PT(s)
-11| | ? | | S | |=> can support up to [ 10] logic PT(s)
-12| SM_AMIGA_1_|NOD| | A | 3 |=> can support up to [ 13] logic PT(s)
-13|inst_DTACK_SYNC|NOD| | A | 2 |=> can support up to [ 13] logic PT(s)
+ 0| CLK_DIV_OUT|OUT| | S | 1 |=> can support up to [ 9] logic PT(s)
+ 1|inst_CLK_000_D2|NOD| | S | 1 |=> can support up to [ 14] logic PT(s)
+ 2| SM_AMIGA_3_|NOD| | A | 3 |=> can support up to [ 12] logic PT(s)
+ 3| | ? | | S | |=> can support up to [ 5] logic PT(s)
+ 4| E| IO| | S | 3 |=> can support up to [ 10] logic PT(s)
+ 5| SM_AMIGA_0_|NOD| | A | 3 |=> can support up to [ 8] logic PT(s)
+ 6| inst_VPA_SYNC|NOD| | A | 2 |=> can support up to [ 12] logic PT(s)
+ 7| | ? | | S | |=> can support up to [ 9] logic PT(s)
+ 8|inst_CLK_000_D1|NOD| | S | 1 |=> can support up to [ 10] logic PT(s)
+ 9| SM_AMIGA_2_|NOD| | A | 3 |=> can support up to [ 12] logic PT(s)
+10|inst_DTACK_SYNC|NOD| | A | 2 |=> can support up to [ 12] logic PT(s)
+11| | ? | | S | |=> can support up to [ 9] logic PT(s)
+12|inst_CLK_000_D0|NOD| | S | 1 |=> can support up to [ 15] logic PT(s)
+13| cpu_est_2_|NOD| | S | 3 :+: 1|=> can support up to [ 18] logic PT(s)
14| | ? | | S | |=> can support up to [ 10] logic PT(s)
15| | ? | | S | |=> can support up to [ 10] logic PT(s)
---------------------------------------------------------------------------
@@ -1575,19 +1463,19 @@ _|_________________|__|__|___|_____|_______________________________________
| Signal Name | | pin | Numbers | Numbers
_|_________________|__|_____|____________________|________________________
0| CLK_DIV_OUT|OUT| | => | 5 6 7 ( 0)| 70 71 72 ( 65)
- 1| SM_AMIGA_2_|NOD| | => | 5 6 7 0 | 70 71 72 65
- 2| | | | => | 6 7 0 1 | 71 72 65 66
+ 1|inst_CLK_000_D2|NOD| | => | 5 6 7 0 | 70 71 72 65
+ 2| SM_AMIGA_3_|NOD| | => | 6 7 0 1 | 71 72 65 66
3| | | | => | 6 7 0 1 | 71 72 65 66
4| E| IO| | => | 7 0 ( 1) 2 | 72 65 ( 66) 67
- 5| SM_AMIGA_3_|NOD| | => | 7 0 1 2 | 72 65 66 67
- 6| | | | => | 0 1 2 3 | 65 66 67 68
+ 5| SM_AMIGA_0_|NOD| | => | 7 0 1 2 | 72 65 66 67
+ 6| inst_VPA_SYNC|NOD| | => | 0 1 2 3 | 65 66 67 68
7| | | | => | 0 1 2 3 | 65 66 67 68
- 8|inst_CLK_000_D0|NOD| | => | 1 2 3 4 | 66 67 68 69
- 9| inst_VPA_SYNC|NOD| | => | 1 2 3 4 | 66 67 68 69
-10| | | | => | 2 3 4 5 | 67 68 69 70
+ 8|inst_CLK_000_D1|NOD| | => | 1 2 3 4 | 66 67 68 69
+ 9| SM_AMIGA_2_|NOD| | => | 1 2 3 4 | 66 67 68 69
+10|inst_DTACK_SYNC|NOD| | => | 2 3 4 5 | 67 68 69 70
11| | | | => | 2 3 4 5 | 67 68 69 70
-12| SM_AMIGA_1_|NOD| | => | 3 4 5 6 | 68 69 70 71
-13|inst_DTACK_SYNC|NOD| | => | 3 4 5 6 | 68 69 70 71
+12|inst_CLK_000_D0|NOD| | => | 3 4 5 6 | 68 69 70 71
+13| cpu_est_2_|NOD| | => | 3 4 5 6 | 68 69 70 71
14| | | | => | 4 5 6 7 | 69 70 71 72
15| | | | => | 4 5 6 7 | 69 70 71 72
---------------------------------------------------------------------------
@@ -1640,37 +1528,37 @@ IMX No. | +---- Block IO Pin or Macrocell Number
0 [IOpin 0 | 65|OUT CLK_DIV_OUT|*| ]
[RegIn 0 |246| -| | ]
[MCell 0 |245|OUT CLK_DIV_OUT| | ]
- [MCell 1 |247|NOD SM_AMIGA_2_| |*]
+ [MCell 1 |247|NOD inst_CLK_000_D2| |*]
1 [IOpin 1 | 66| IO E|*| ] paired w/[ RN_E]
[RegIn 1 |249| -| | ]
- [MCell 2 |248| -| | ]
+ [MCell 2 |248|NOD SM_AMIGA_3_| |*]
[MCell 3 |250| -| | ]
2 [IOpin 2 | 67|INP IPL_0_|*|*]
[RegIn 2 |252| -| | ]
[MCell 4 |251|NOD RN_E| |*] paired w/[ E]
- [MCell 5 |253|NOD SM_AMIGA_3_| |*]
+ [MCell 5 |253|NOD SM_AMIGA_0_| |*]
3 [IOpin 3 | 68|INP IPL_2_|*|*]
[RegIn 3 |255| -| | ]
- [MCell 6 |254| -| | ]
+ [MCell 6 |254|NOD inst_VPA_SYNC| |*]
[MCell 7 |256| -| | ]
4 [IOpin 4 | 69|INP A_0_|*|*]
[RegIn 4 |258| -| | ]
- [MCell 8 |257|NOD inst_CLK_000_D0| |*]
- [MCell 9 |259|NOD inst_VPA_SYNC| |*]
+ [MCell 8 |257|NOD inst_CLK_000_D1| |*]
+ [MCell 9 |259|NOD SM_AMIGA_2_| |*]
5 [IOpin 5 | 70|INP SIZE_0_|*|*]
[RegIn 5 |261| -| | ]
- [MCell 10 |260| -| | ]
+ [MCell 10 |260|NOD inst_DTACK_SYNC| |*]
[MCell 11 |262| -| | ]
6 [IOpin 6 | 71|INP RW|*|*]
[RegIn 6 |264| -| | ]
- [MCell 12 |263|NOD SM_AMIGA_1_| |*]
- [MCell 13 |265|NOD inst_DTACK_SYNC| |*]
+ [MCell 12 |263|NOD inst_CLK_000_D0| |*]
+ [MCell 13 |265|NOD cpu_est_2_| |*]
7 [IOpin 7 | 72| -| | ]
[RegIn 7 |267| -| | ]
@@ -1684,37 +1572,37 @@ IMX No. | +---- Block IO Pin or Macrocell Number
| Src (ABEL Node/Pin#) Signal
--|--|--------------------|---------------------------------------------------
Mux00| Input Pin ( 86)| RST
-Mux01| Mcel 3 13 ( 193)| inst_CLK_000_D1
-Mux02| Mcel 3 10 ( 188)| cpu_est_2_
+Mux01| Mcel 3 13 ( 193)| cpu_est_1_
+Mux02| Mcel 6 4 ( 251)| RN_E
Mux03| Input Pin ( 11)| CLK_000
-Mux04| Input Pin ( 61)| CLK_OSZI
-Mux05| Mcel 5 0 ( 221)| SM_AMIGA_4_
-Mux06| ... | ...
-Mux07| Mcel 7 13 ( 289)| inst_VPA_D
+Mux04| Mcel 7 5 ( 277)| SM_AMIGA_1_
+Mux05| Mcel 6 10 ( 260)| inst_DTACK_SYNC
+Mux06| Mcel 1 9 ( 139)| SM_AMIGA_4_
+Mux07| Mcel 3 5 ( 181)| RN_VMA
Mux08| ... | ...
Mux09| IOPin 3 5 ( 30)| DTACK
-Mux10| Mcel 6 9 ( 259)| inst_VPA_SYNC
-Mux11| Mcel 6 4 ( 251)| RN_E
-Mux12| Mcel 6 13 ( 265)| inst_DTACK_SYNC
-Mux13| Mcel 7 5 ( 277)| inst_CLK_OUT_PRE
-Mux14| Mcel 3 4 ( 179)| RN_VMA
+Mux10| Mcel 6 9 ( 259)| SM_AMIGA_2_
+Mux11| Mcel 7 9 ( 283)| inst_VPA_D
+Mux12| Mcel 6 13 ( 265)| cpu_est_2_
+Mux13| Mcel 6 8 ( 257)| inst_CLK_000_D1
+Mux14| Mcel 6 12 ( 263)| inst_CLK_000_D0
Mux15| ... | ...
-Mux16| Mcel 3 2 ( 176)| cpu_est_1_
-Mux17| Mcel 3 14 ( 194)| cpu_est_0_
+Mux16| Mcel 3 2 ( 176)| cpu_est_0_
+Mux17| ... | ...
Mux18| ... | ...
Mux19| IOPin 7 3 ( 82)| AS_030
Mux20| ... | ...
-Mux21| ... | ...
-Mux22| Mcel 6 5 ( 253)| SM_AMIGA_3_
-Mux23| Mcel 6 12 ( 263)| SM_AMIGA_1_
-Mux24| Mcel 6 1 ( 247)| SM_AMIGA_2_
-Mux25| ... | ...
+Mux21| Input Pin ( 61)| CLK_OSZI
+Mux22| Mcel 6 5 ( 253)| SM_AMIGA_0_
+Mux23| Mcel 6 6 ( 254)| inst_VPA_SYNC
+Mux24| ... | ...
+Mux25| Mcel 3 9 ( 187)| RN_AS_000
Mux26| ... | ...
Mux27| ... | ...
-Mux28| Mcel 6 8 ( 257)| inst_CLK_000_D0
+Mux28| Mcel 1 5 ( 133)| inst_CLK_OUT_PRE
Mux29| ... | ...
Mux30| ... | ...
-Mux31| ... | ...
+Mux31| Mcel 6 2 ( 248)| SM_AMIGA_3_
Mux32| ... | ...
---------------------------------------------------------------------------
===========================================================================
@@ -1729,18 +1617,18 @@ Mux32| ... | ...
_|_________________|__|__|___|_____|__|______|___|__________|______________
0| FPU_CS| IO| | S | 2 | 4 to [ 0]| 1 XOR free
1|inst_AS_030_000_SYNC|NOD| | S | 4 | 4 to [ 1]| 1 XOR free
- 2| SM_AMIGA_0_|NOD| | S | 3 | 4 to [ 2]| 1 XOR free
+ 2| | ? | | S | | 4 free | 1 XOR free
3| | ? | | S | | 4 free | 1 XOR free
4| BGACK_030| IO| | S | 2 | 4 to [ 4]| 1 XOR free
- 5|inst_CLK_OUT_PRE|NOD| | A | 2 | 2 to [ 5]| 1 XOR free
- 6| CLK_CNT_0_|NOD| | A | 1 | 2 free | 1 XOR to [ 6] for 1 PT sig
+ 5| SM_AMIGA_1_|NOD| | S | 3 | 4 to [ 5]| 1 XOR free
+ 6| | ? | | S | | 4 free | 1 XOR free
7| | ? | | S | | 4 free | 1 XOR free
8| DSACK_1_| IO| | S | 2 | 4 to [ 8]| 1 XOR free
- 9| SM_AMIGA_7_|NOD| | S | 2 | 4 to [ 9]| 1 XOR free
+ 9| inst_VPA_D|NOD| | A | 1 | 2 free | 1 XOR to [ 9] for 1 PT sig
10| | ? | | S | | 4 free | 1 XOR free
11| | ? | | S | | 4 free | 1 XOR free
12| DSACK_0_|OUT| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig
-13| inst_VPA_D|NOD| | A | 1 | 2 free | 1 XOR to [13] for 1 PT sig
+13| | ? | | S | | 4 free | 1 XOR free
14| | ? | | S | | 4 free | 1 XOR free
15| | ? | | S | | 4 free | 1 XOR free
---------------------------------------------------------------------------
@@ -1754,21 +1642,21 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________
| Sig Type-+ | | | |
| Signal Name | | | | | Maximum PT Capacity
_|_________________|__|__|___|_____|_______________________________________
- 0| FPU_CS| IO| | S | 2 |=> can support up to [ 5] logic PT(s)
- 1|inst_AS_030_000_SYNC|NOD| | S | 4 |=> can support up to [ 10] logic PT(s)
- 2| SM_AMIGA_0_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s)
- 3| | ? | | S | |=> can support up to [ 5] logic PT(s)
- 4| BGACK_030| IO| | S | 2 |=> can support up to [ 12] logic PT(s)
- 5|inst_CLK_OUT_PRE|NOD| | A | 2 |=> can support up to [ 10] logic PT(s)
- 6| CLK_CNT_0_|NOD| | A | 1 |=> can support up to [ 8] logic PT(s)
- 7| | ? | | S | |=> can support up to [ 7] logic PT(s)
- 8| DSACK_1_| IO| | S | 2 |=> can support up to [ 15] logic PT(s)
- 9| SM_AMIGA_7_|NOD| | S | 2 |=> can support up to [ 15] logic PT(s)
-10| | ? | | S | |=> can support up to [ 14] logic PT(s)
-11| | ? | | S | |=> can support up to [ 16] logic PT(s)
-12| DSACK_0_|OUT| | S | 1 |=> can support up to [ 17] logic PT(s)
-13| inst_VPA_D|NOD| | A | 1 |=> can support up to [ 17] logic PT(s)
-14| | ? | | S | |=> can support up to [ 12] logic PT(s)
+ 0| FPU_CS| IO| | S | 2 |=> can support up to [ 10] logic PT(s)
+ 1|inst_AS_030_000_SYNC|NOD| | S | 4 |=> can support up to [ 15] logic PT(s)
+ 2| | ? | | S | |=> can support up to [ 10] logic PT(s)
+ 3| | ? | | S | |=> can support up to [ 10] logic PT(s)
+ 4| BGACK_030| IO| | S | 2 |=> can support up to [ 15] logic PT(s)
+ 5| SM_AMIGA_1_|NOD| | S | 3 |=> can support up to [ 15] logic PT(s)
+ 6| | ? | | S | |=> can support up to [ 10] logic PT(s)
+ 7| | ? | | S | |=> can support up to [ 12] logic PT(s)
+ 8| DSACK_1_| IO| | S | 2 |=> can support up to [ 17] logic PT(s)
+ 9| inst_VPA_D|NOD| | A | 1 |=> can support up to [ 13] logic PT(s)
+10| | ? | | S | |=> can support up to [ 16] logic PT(s)
+11| | ? | | S | |=> can support up to [ 19] logic PT(s)
+12| DSACK_0_|OUT| | S | 1 |=> can support up to [ 20] logic PT(s)
+13| | ? | | S | |=> can support up to [ 19] logic PT(s)
+14| | ? | | S | |=> can support up to [ 15] logic PT(s)
15| | ? | | S | |=> can support up to [ 10] logic PT(s)
---------------------------------------------------------------------------
===========================================================================
@@ -1781,18 +1669,18 @@ _|_________________|__|__|___|_____|_______________________________________
_|_________________|__|_____|____________________|________________________
0| FPU_CS| IO| | => | 5 6 ( 7) 0 | 80 79 ( 78) 85
1|inst_AS_030_000_SYNC|NOD| | => | 5 6 7 0 | 80 79 78 85
- 2| SM_AMIGA_0_|NOD| | => | 6 7 0 1 | 79 78 85 84
+ 2| | | | => | 6 7 0 1 | 79 78 85 84
3| | | | => | 6 7 0 1 | 79 78 85 84
4| BGACK_030| IO| | => | 7 0 1 ( 2)| 78 85 84 ( 83)
- 5|inst_CLK_OUT_PRE|NOD| | => | 7 0 1 2 | 78 85 84 83
- 6| CLK_CNT_0_|NOD| | => | 0 1 2 3 | 85 84 83 82
+ 5| SM_AMIGA_1_|NOD| | => | 7 0 1 2 | 78 85 84 83
+ 6| | | | => | 0 1 2 3 | 85 84 83 82
7| | | | => | 0 1 2 3 | 85 84 83 82
8| DSACK_1_| IO| | => | 1 2 3 ( 4)| 84 83 82 ( 81)
- 9| SM_AMIGA_7_|NOD| | => | 1 2 3 4 | 84 83 82 81
+ 9| inst_VPA_D|NOD| | => | 1 2 3 4 | 84 83 82 81
10| | | | => | 2 3 4 5 | 83 82 81 80
11| | | | => | 2 3 4 5 | 83 82 81 80
12| DSACK_0_|OUT| | => | 3 4 ( 5) 6 | 82 81 ( 80) 79
-13| inst_VPA_D|NOD| | => | 3 4 5 6 | 82 81 80 79
+13| | | | => | 3 4 5 6 | 82 81 80 79
14| | | | => | 4 5 6 7 | 81 80 79 78
15| | | | => | 4 5 6 7 | 81 80 79 78
---------------------------------------------------------------------------
@@ -1851,23 +1739,23 @@ IMX No. | +---- Block IO Pin or Macrocell Number
1 [IOpin 1 | 84|INP A_23_|*|*]
[RegIn 1 |273| -| | ]
- [MCell 2 |272|NOD SM_AMIGA_0_| |*]
+ [MCell 2 |272| -| | ]
[MCell 3 |274| -| | ]
2 [IOpin 2 | 83| IO BGACK_030|*| ] paired w/[ RN_BGACK_030]
[RegIn 2 |276| -| | ]
[MCell 4 |275|NOD RN_BGACK_030| |*] paired w/[ BGACK_030]
- [MCell 5 |277|NOD inst_CLK_OUT_PRE| |*]
+ [MCell 5 |277|NOD SM_AMIGA_1_| |*]
3 [IOpin 3 | 82|INP AS_030|*|*]
[RegIn 3 |279| -| | ]
- [MCell 6 |278|NOD CLK_CNT_0_| |*]
+ [MCell 6 |278| -| | ]
[MCell 7 |280| -| | ]
4 [IOpin 4 | 81| IO DSACK_1_|*|*] paired w/[ RN_DSACK_1_]
[RegIn 4 |282| -| | ]
[MCell 8 |281|NOD RN_DSACK_1_| |*] paired w/[ DSACK_1_]
- [MCell 9 |283|NOD SM_AMIGA_7_| |*]
+ [MCell 9 |283|NOD inst_VPA_D| |*]
5 [IOpin 5 | 80|OUT DSACK_0_|*| ]
[RegIn 5 |285| -| | ]
@@ -1877,7 +1765,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number
6 [IOpin 6 | 79|INP SIZE_1_|*|*]
[RegIn 6 |288| -| | ]
[MCell 12 |287|OUT DSACK_0_| | ]
- [MCell 13 |289|NOD inst_VPA_D| |*]
+ [MCell 13 |289| -| | ]
7 [IOpin 7 | 78| IO FPU_CS|*| ] paired w/[ RN_FPU_CS]
[RegIn 7 |291| -| | ]
@@ -1894,32 +1782,32 @@ Mux00| Input Pin ( 86)| RST
Mux01| IOPin 5 2 ( 58)| FC_1_
Mux02| ... | ...
Mux03| Mcel 7 8 ( 281)| RN_DSACK_1_
-Mux04| Input Pin ( 61)| CLK_OSZI
+Mux04| Mcel 7 5 ( 277)| SM_AMIGA_1_
Mux05| Input Pin ( 14)| nEXP_SPACE
Mux06| IOPin 5 3 ( 57)| FC_0_
-Mux07| Mcel 6 12 ( 263)| SM_AMIGA_1_
+Mux07| Mcel 6 12 ( 263)| inst_CLK_000_D0
Mux08| IOPin 5 1 ( 59)| A_17_
Mux09| IOPin 7 3 ( 82)| AS_030
-Mux10| Input Pin ( 36)| VPA
+Mux10| Mcel 6 8 ( 257)| inst_CLK_000_D1
Mux11| IOPin 0 5 ( 96)| A_16_
Mux12| IOPin 0 6 ( 97)| A_19_
-Mux13| Mcel 7 5 ( 277)| inst_CLK_OUT_PRE
-Mux14| Mcel 7 2 ( 272)| SM_AMIGA_0_
+Mux13| Input Pin ( 36)| VPA
+Mux14| ... | ...
Mux15| ... | ...
Mux16| ... | ...
Mux17| IOPin 0 4 ( 95)| A_18_
Mux18| IOPin 3 7 ( 28)| BGACK_000
Mux19| Mcel 7 1 ( 271)| inst_AS_030_000_SYNC
Mux20| Input Pin ( 64)| CLK_030
-Mux21| Mcel 7 6 ( 278)| CLK_CNT_0_
+Mux21| Input Pin ( 61)| CLK_OSZI
Mux22| ... | ...
Mux23| Mcel 7 4 ( 275)| RN_BGACK_030
-Mux24| Mcel 3 5 ( 181)| RN_AS_000
+Mux24| ... | ...
Mux25| ... | ...
Mux26| ... | ...
-Mux27| Mcel 7 9 ( 283)| SM_AMIGA_7_
-Mux28| Mcel 6 8 ( 257)| inst_CLK_000_D0
-Mux29| Mcel 3 13 ( 193)| inst_CLK_000_D1
+Mux27| Mcel 6 9 ( 259)| SM_AMIGA_2_
+Mux28| Mcel 1 5 ( 133)| inst_CLK_OUT_PRE
+Mux29| ... | ...
Mux30| Mcel 7 0 ( 269)| RN_FPU_CS
Mux31| ... | ...
Mux32| ... | ...
diff --git a/Logic/68030_tk.rpt b/Logic/68030_tk.rpt
index 914eedd..22bf1c7 100644
--- a/Logic/68030_tk.rpt
+++ b/Logic/68030_tk.rpt
@@ -12,7 +12,7 @@ Project_Summary
Project Name : 68030_tk
Project Path : C:\Users\Matze\Documents\GitHub\68030tk\Logic
-Project Fitted on : Fri May 16 17:07:12 2014
+Project Fitted on : Sun May 18 21:01:51 2014
Device : M4A5-128/64
Package : 100TQFP
@@ -40,8 +40,8 @@ Design_Summary
Total Input Pins : 35
Total Output Pins : 22
Total Bidir I/O Pins : 2
- Total Flip-Flops : 35
- Total Product Terms : 102
+ Total Flip-Flops : 39
+ Total Product Terms : 111
Total Reserved Pins : 0
Total Reserved Blocks : 0
@@ -54,13 +54,13 @@ Dedicated Pins
Input-Only Pins 2 2 0 --> 100%
Clock/Input Pins 4 4 0 --> 100%
I/O Pins 64 53 11 --> 82%
-Logic Macrocells 128 43 85 --> 33%
+Logic Macrocells 128 46 82 --> 35%
Input Registers 64 0 64 --> 0%
Unusable Macrocells .. 0 ..
-CSM Outputs/Total Block Inputs 264 112 152 --> 42%
-Logical Product Terms 640 103 537 --> 16%
-Product Term Clusters 128 37 91 --> 28%
+CSM Outputs/Total Block Inputs 264 120 144 --> 45%
+Logical Product Terms 640 113 527 --> 17%
+Product Term Clusters 128 39 89 --> 30%
Blocks_Resource_Summary
@@ -71,14 +71,14 @@ Blocks_Resource_Summary
---------------------------------------------------------------------------------
Maximum 33 8 8 -- -- 16 80 16 -
---------------------------------------------------------------------------------
-Block A 7 7 0 2 0 14 3 15 Hi
-Block B 11 8 0 5 0 11 11 13 Hi
+Block A 8 7 0 2 0 14 5 15 Hi
+Block B 22 8 0 11 0 5 25 7 Hi
Block C 1 8 0 2 0 14 2 16 Hi
-Block D 29 8 0 12 0 4 44 3 Hi
+Block D 31 8 0 10 0 6 39 5 Hi
Block E 14 3 0 3 0 13 3 16 Hi
-Block F 5 4 0 1 0 15 2 15 Hi
-Block G 20 7 0 8 0 8 18 10 Hi
-Block H 25 8 0 10 0 6 20 9 Hi
+Block F 0 4 0 0 0 16 0 16 Hi
+Block G 22 7 0 11 0 5 24 9 Hi
+Block H 22 8 0 7 0 9 15 11 Hi
---------------------------------------------------------------------------------
Four rightmost columns above reflect last status of the placement process.
@@ -319,9 +319,9 @@ Pin Blk PTs Type e s E Fanout Pwr Slew Signal
11 . . Ck/I ------G- - Fast CLK_000
14 . . Ck/I ---D---H - Fast nEXP_SPACE
36 . . Ded -------H - Fast VPA
- 61 . . Ck/I AB-D-FGH - Fast CLK_OSZI
+ 61 . . Ck/I AB-D--GH - Fast CLK_OSZI
64 . . Ck/I ---D---H - Fast CLK_030
- 86 . . Ded AB-D-FGH - Fast RST
+ 86 . . Ded AB-D--GH - Fast RST
----------------------------------------------------------------------
Power : Hi = High
@@ -338,7 +338,7 @@ Output_Signal_List
Pin Blk PTs Type e s E Fanout Pwr Slew Signal
----------------------------------------------------------------------
48 E 1 COM -------- Hi Fast AMIGA_BUS_DATA_DIR
- 34 D 1 COM -------- Hi Fast AMIGA_BUS_ENABLE
+ 34 D 3 DFF * * -------- Hi Fast AMIGA_BUS_ENABLE
20 C 1 COM -------- Hi Fast AMIGA_BUS_ENABLE_LOW
33 D 2 DFF * * -------- Hi Fast AS_000
92 A 1 COM -------- Hi Fast AVEC
@@ -391,8 +391,11 @@ Buried_Signal_List
Pin r e O Node
#Mc Blk PTs Type e s E Fanout Pwr Slew Signal
----------------------------------------------------------------------
- H6 H 1 DFF * * -------H Hi Fast CLK_CNT_0_
- D5 D 2 DFF * * ---D---H Hi - RN_AS_000 --> AS_000
+ B10 B 2 DFF * * -B------ Hi Fast CLK_CNT_0_
+ B6 B 2 DFF * * -B------ Hi Fast CLK_CNT_1_
+ D6 D 1 LAT * * -B------ Hi Fast CLK_REF_1_
+ D4 D 3 DFF * * ---D---- Hi - RN_AMIGA_BUS_ENABLE --> AMIGA_BUS_ENABLE
+ D9 D 2 DFF * * -B-D--G- Hi - RN_AS_000 --> AS_000
H4 H 2 DFF * * ---D---H Hi - RN_BGACK_030 --> BGACK_030
D1 D 3 DFF * * ---D---- Hi - RN_BG_000 --> BG_000
H8 H 2 DFF * * -------H Hi - RN_DSACK_1_ --> DSACK_1_
@@ -403,25 +406,26 @@ Buried_Signal_List
B4 B 3 DFF * * -B------ Hi - RN_IPL_030_2_ --> IPL_030_2_
D8 D 12 DFF * * ---D---- Hi - RN_LDS_000 --> LDS_000
D12 D 8 DFF * * ---D---- Hi - RN_UDS_000 --> UDS_000
- D4 D 2 TFF * * ---D--G- Hi - RN_VMA --> VMA
- H2 H 3 DFF * * -------H Hi Fast SM_AMIGA_0_
- G12 G 3 DFF * * ------GH Hi Fast SM_AMIGA_1_
- G1 G 3 DFF * * ------G- Hi Fast SM_AMIGA_2_
- G5 G 3 DFF * * ------G- Hi Fast SM_AMIGA_3_
- F0 F 2 DFF * * ---D-FG- Hi Fast SM_AMIGA_4_
- A0 A 2 DFF * * A----F-- Hi Fast SM_AMIGA_5_
- D6 D 3 DFF * * A--D---- Hi Fast SM_AMIGA_6_
- H9 H 2 DFF * * ---D---H Hi Fast SM_AMIGA_7_
- D14 D 3 DFF * * ---D--G- Hi Fast cpu_est_0_
- D2 D 4 TFF * * ---D--G- Hi Fast cpu_est_1_
- D10 D 3 DFF * * ---D--G- Hi Fast cpu_est_2_
- H1 H 4 DFF * * A--D---H Hi Fast inst_AS_030_000_SYNC
- G8 G 1 DFF * * AB-D-FGH Hi Fast inst_CLK_000_D0
- D13 D 1 DFF * * AB-D--GH Hi Fast inst_CLK_000_D1
- H5 H 2 DFF * * -B----GH Hi Fast inst_CLK_OUT_PRE
- G13 G 2 DFF * * ------G- Hi Fast inst_DTACK_SYNC
- H13 H 1 DFF * * ---D--G- Hi Fast inst_VPA_D
- G9 G 2 DFF * * ------G- Hi Fast inst_VPA_SYNC
+ D5 D 2 TFF * * ---D--G- Hi - RN_VMA --> VMA
+ G5 G 3 DFF * * -B----G- Hi Fast SM_AMIGA_0_
+ H5 H 3 DFF * * ------GH Hi Fast SM_AMIGA_1_
+ G9 G 3 DFF * * ------GH Hi Fast SM_AMIGA_2_
+ G2 G 3 DFF * * ------G- Hi Fast SM_AMIGA_3_
+ B9 B 2 DFF * * -B-D--G- Hi Fast SM_AMIGA_4_
+ B2 B 2 DFF * * -B------ Hi Fast SM_AMIGA_5_
+ A0 A 4 DFF * * AB-D---- Hi Fast SM_AMIGA_6_
+ B13 B 2 DFF * * AB-D---- Hi Fast SM_AMIGA_7_
+ D2 D 3 DFF * * ---D--G- Hi Fast cpu_est_0_
+ D13 D 4 TFF * * ---D--G- Hi Fast cpu_est_1_
+ G13 G 3 DFF * * ---D--G- Hi Fast cpu_est_2_
+ H1 H 4 DFF * * AB-D---H Hi Fast inst_AS_030_000_SYNC
+ G12 G 1 DFF * * AB-D--GH Hi Fast inst_CLK_000_D0
+ G8 G 1 DFF * * AB-D--GH Hi Fast inst_CLK_000_D1
+ G1 G 1 DFF * * AB-D---- Hi Fast inst_CLK_000_D2
+ B5 B 3 DFF * * -B----GH Hi Fast inst_CLK_OUT_PRE
+ G10 G 2 DFF * * ------G- Hi Fast inst_DTACK_SYNC
+ H9 H 1 DFF * * ---D--G- Hi Fast inst_VPA_D
+ G6 G 2 DFF * * ------G- Hi Fast inst_VPA_SYNC
----------------------------------------------------------------------
Power : Hi = High
@@ -436,106 +440,112 @@ Signals_Fanout_List
~~~~~~~~~~~~~~~~~~~
Signal Source : Fanout List
-----------------------------------------------------------------------------
- A_17_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ H}
- A_16_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ H}
SIZE_1_{ I}: LDS_000{ D}
A_31_{ C}: CIIN{ E}
IPL_2_{ H}: IPL_030_2_{ B}
FC_1_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ H}
AS_030{ I}: DSACK_1_{ H} AS_000{ D} UDS_000{ D}
: LDS_000{ D} BG_000{ D} FPU_CS{ H}
- :inst_AS_030_000_SYNC{ H}inst_DTACK_SYNC{ G} inst_VPA_SYNC{ G}
+ :AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ H}inst_DTACK_SYNC{ G}
+ : inst_VPA_SYNC{ G}
DS_030{ B}: UDS_000{ D} LDS_000{ D}
- A_0_{ H}: UDS_000{ D} LDS_000{ D}
- nEXP_SPACE{. }: DSACK_0_{ H}AMIGA_BUS_ENABLE{ D} DSACK_1_{ H}
- : BG_000{ D}inst_AS_030_000_SYNC{ H}
- BG_030{ D}: BG_000{ D}
- IPL_1_{ G}: IPL_030_1_{ B}
- IPL_0_{ H}: IPL_030_0_{ B}
- BGACK_000{ E}: BGACK_030{ H} FPU_CS{ H}inst_AS_030_000_SYNC{ H}
- FC_0_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ H}
- CLK_030{. }: BG_000{ D} FPU_CS{ H}inst_AS_030_000_SYNC{ H}
- CLK_000{. }:inst_CLK_000_D0{ G}
- VPA{. }: inst_VPA_D{ H}
- RST{. }: IPL_030_2_{ B} DSACK_1_{ H} AS_000{ D}
- : UDS_000{ D} LDS_000{ D} IPL_030_1_{ B}
- : IPL_030_0_{ B} BG_000{ D} BGACK_030{ H}
- : FPU_CS{ H} DTACK{ D} VMA{ D}
- : RESET{ B}inst_AS_030_000_SYNC{ H}inst_DTACK_SYNC{ G}
- : inst_VPA_SYNC{ G} SM_AMIGA_6_{ D} SM_AMIGA_7_{ H}
- : SM_AMIGA_1_{ G} SM_AMIGA_4_{ F} SM_AMIGA_3_{ G}
- : SM_AMIGA_5_{ A} SM_AMIGA_2_{ G} SM_AMIGA_0_{ H}
- RW{ H}:AMIGA_BUS_DATA_DIR{ E} UDS_000{ D} LDS_000{ D}
SIZE_0_{ H}: LDS_000{ D}
A_30_{ C}: CIIN{ E}
+ nEXP_SPACE{. }: DSACK_0_{ H} DSACK_1_{ H} BG_000{ D}
+ :AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ H}
A_29_{ C}: CIIN{ E}
A_28_{ D}: CIIN{ E}
+ BG_030{ D}: BG_000{ D}
A_27_{ D}: CIIN{ E}
A_26_{ D}: CIIN{ E}
A_25_{ D}: CIIN{ E}
+ BGACK_000{ E}: BGACK_030{ H} FPU_CS{ H}inst_AS_030_000_SYNC{ H}
A_24_{ D}: CIIN{ E}
+ CLK_030{. }: BG_000{ D} FPU_CS{ H}inst_AS_030_000_SYNC{ H}
A_23_{ I}: CIIN{ E}
+ CLK_000{. }:inst_DTACK_SYNC{ G} inst_VPA_SYNC{ G}inst_CLK_000_D0{ G}
A_22_{ I}: CIIN{ E}
A_21_{ B}: CIIN{ E}
A_20_{ B}: CIIN{ E}
A_19_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ H}
A_18_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ H}
+ A_17_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ H}
+ A_16_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ H}
+ VPA{. }: inst_VPA_D{ H}
+ RST{. }: IPL_030_2_{ B} DSACK_1_{ H} AS_000{ D}
+ : UDS_000{ D} LDS_000{ D} BG_000{ D}
+ : BGACK_030{ H} FPU_CS{ H} DTACK{ D}
+ : VMA{ D} RESET{ B}AMIGA_BUS_ENABLE{ D}
+ : IPL_030_1_{ B} IPL_030_0_{ B}inst_AS_030_000_SYNC{ H}
+ :inst_DTACK_SYNC{ G} inst_VPA_SYNC{ G} SM_AMIGA_6_{ A}
+ : CLK_REF_1_{ D} SM_AMIGA_7_{ B} SM_AMIGA_4_{ B}
+ : SM_AMIGA_1_{ H} SM_AMIGA_3_{ G} SM_AMIGA_5_{ B}
+ : SM_AMIGA_2_{ G} SM_AMIGA_0_{ G}
+ RW{ H}:AMIGA_BUS_DATA_DIR{ E} UDS_000{ D} LDS_000{ D}
+ A_0_{ H}: UDS_000{ D} LDS_000{ D}
+ IPL_1_{ G}: IPL_030_1_{ B}
+ IPL_0_{ H}: IPL_030_0_{ B}
+ FC_0_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ H}
RN_IPL_030_2_{ C}: IPL_030_2_{ B}
DSACK_1_{ I}: DTACK{ D}
RN_DSACK_1_{ I}: DSACK_1_{ H}
RN_AS_000{ E}: AS_000{ D} DTACK{ D} VMA{ D}
- : SM_AMIGA_7_{ H} SM_AMIGA_0_{ H}
+ : SM_AMIGA_7_{ B} SM_AMIGA_0_{ G}
RN_UDS_000{ E}: UDS_000{ D}
RN_LDS_000{ E}: LDS_000{ D}
-RN_IPL_030_1_{ C}: IPL_030_1_{ B}
-RN_IPL_030_0_{ C}: IPL_030_0_{ B}
RN_BG_000{ E}: BG_000{ D}
RN_BGACK_030{ I}: AS_000{ D} UDS_000{ D} LDS_000{ D}
: BGACK_030{ H} DTACK{ D}
RN_FPU_CS{ I}: BERR{ E} AVEC_EXP{ C} FPU_CS{ H}
DTACK{ E}:inst_DTACK_SYNC{ G}
RN_E{ H}: E{ G} VMA{ D} cpu_est_1_{ D}
- : inst_VPA_SYNC{ G} cpu_est_2_{ D}
+ : inst_VPA_SYNC{ G} cpu_est_2_{ G}
RN_VMA{ E}: VMA{ D} inst_VPA_SYNC{ G}
+RN_AMIGA_BUS_ENABLE{ E}:AMIGA_BUS_ENABLE{ D}
+RN_IPL_030_1_{ C}: IPL_030_1_{ B}
+RN_IPL_030_0_{ C}: IPL_030_0_{ B}
cpu_est_0_{ E}: E{ G} VMA{ D} cpu_est_0_{ D}
- : cpu_est_1_{ D} inst_VPA_SYNC{ G} cpu_est_2_{ D}
+ : cpu_est_1_{ D} inst_VPA_SYNC{ G} cpu_est_2_{ G}
cpu_est_1_{ E}: E{ G} VMA{ D} cpu_est_1_{ D}
- : inst_VPA_SYNC{ G} cpu_est_2_{ D}
+ : inst_VPA_SYNC{ G} cpu_est_2_{ G}
inst_AS_030_000_SYNC{ I}: AS_000{ D} UDS_000{ D} LDS_000{ D}
- :inst_AS_030_000_SYNC{ H} SM_AMIGA_6_{ D} SM_AMIGA_5_{ A}
+ :inst_AS_030_000_SYNC{ H} SM_AMIGA_6_{ A} SM_AMIGA_5_{ B}
inst_DTACK_SYNC{ H}:inst_DTACK_SYNC{ G} SM_AMIGA_3_{ G} SM_AMIGA_2_{ G}
inst_VPA_D{ I}: VMA{ D}inst_DTACK_SYNC{ G} inst_VPA_SYNC{ G}
inst_VPA_SYNC{ H}: inst_VPA_SYNC{ G} SM_AMIGA_3_{ G} SM_AMIGA_2_{ G}
-inst_CLK_000_D0{ H}: IPL_030_2_{ B} AS_000{ D} UDS_000{ D}
- : LDS_000{ D} IPL_030_1_{ B} IPL_030_0_{ B}
- : BGACK_030{ H} E{ G} VMA{ D}
- : cpu_est_0_{ D} cpu_est_1_{ D}inst_DTACK_SYNC{ G}
- : inst_VPA_SYNC{ G}inst_CLK_000_D1{ D} cpu_est_2_{ D}
- : SM_AMIGA_6_{ D} SM_AMIGA_7_{ H} SM_AMIGA_1_{ G}
- : SM_AMIGA_4_{ F} SM_AMIGA_3_{ G} SM_AMIGA_5_{ A}
- : SM_AMIGA_2_{ G} SM_AMIGA_0_{ H}
-inst_CLK_000_D1{ E}: IPL_030_2_{ B} DSACK_1_{ H} AS_000{ D}
- : UDS_000{ D} LDS_000{ D} IPL_030_1_{ B}
- : IPL_030_0_{ B} BGACK_030{ H} E{ G}
- : cpu_est_0_{ D} cpu_est_1_{ D} cpu_est_2_{ D}
- : SM_AMIGA_6_{ D} SM_AMIGA_1_{ G} SM_AMIGA_5_{ A}
- : SM_AMIGA_0_{ H}
-inst_CLK_OUT_PRE{ I}: CLK_DIV_OUT{ G} DSACK_1_{ H} CLK_EXP{ B}
- :inst_CLK_OUT_PRE{ H} SM_AMIGA_1_{ G} SM_AMIGA_0_{ H}
- cpu_est_2_{ E}: E{ G} VMA{ D} cpu_est_1_{ D}
- : inst_VPA_SYNC{ G} cpu_est_2_{ D}
- CLK_CNT_0_{ I}:inst_CLK_OUT_PRE{ H} CLK_CNT_0_{ H}
-SM_AMIGA_6_{ E}: AS_000{ D} UDS_000{ D} LDS_000{ D}
- : BG_000{ D} SM_AMIGA_6_{ D} SM_AMIGA_5_{ A}
-SM_AMIGA_7_{ I}: BG_000{ D} SM_AMIGA_6_{ D} SM_AMIGA_7_{ H}
-SM_AMIGA_1_{ H}: DSACK_1_{ H} SM_AMIGA_1_{ G} SM_AMIGA_0_{ H}
-SM_AMIGA_4_{ G}: UDS_000{ D} LDS_000{ D} SM_AMIGA_4_{ F}
+inst_CLK_000_D0{ H}: IPL_030_2_{ B} DSACK_1_{ H} BGACK_030{ H}
+ : E{ G} VMA{ D} IPL_030_1_{ B}
+ : IPL_030_0_{ B} cpu_est_0_{ D} cpu_est_1_{ D}
+ :inst_DTACK_SYNC{ G} inst_VPA_SYNC{ G}inst_CLK_000_D1{ G}
+ : SM_AMIGA_6_{ A} cpu_est_2_{ G} SM_AMIGA_7_{ B}
+ : SM_AMIGA_4_{ B} SM_AMIGA_1_{ H} SM_AMIGA_3_{ G}
+ : SM_AMIGA_5_{ B} SM_AMIGA_2_{ G} SM_AMIGA_0_{ G}
+inst_CLK_000_D1{ H}: IPL_030_2_{ B} AS_000{ D} UDS_000{ D}
+ : LDS_000{ D} BGACK_030{ H} E{ G}
+ : IPL_030_1_{ B} IPL_030_0_{ B} cpu_est_0_{ D}
+ : cpu_est_1_{ D}inst_CLK_000_D2{ G} SM_AMIGA_6_{ A}
+ : cpu_est_2_{ G} SM_AMIGA_5_{ B}
+inst_CLK_000_D2{ H}: AS_000{ D} UDS_000{ D} LDS_000{ D}
+ : SM_AMIGA_6_{ A} SM_AMIGA_5_{ B}
+inst_CLK_OUT_PRE{ C}: CLK_DIV_OUT{ G} DSACK_1_{ H} CLK_EXP{ B}
+ :inst_CLK_OUT_PRE{ B} SM_AMIGA_1_{ H} SM_AMIGA_0_{ G}
+SM_AMIGA_6_{ B}: AS_000{ D} UDS_000{ D} LDS_000{ D}
+ : BG_000{ D}AMIGA_BUS_ENABLE{ D} SM_AMIGA_6_{ A}
+ : SM_AMIGA_5_{ B}
+ cpu_est_2_{ H}: E{ G} VMA{ D} cpu_est_1_{ D}
+ : inst_VPA_SYNC{ G} cpu_est_2_{ G}
+ CLK_REF_1_{ E}:inst_CLK_OUT_PRE{ B} CLK_CNT_0_{ B} CLK_CNT_1_{ B}
+SM_AMIGA_7_{ C}: BG_000{ D} SM_AMIGA_6_{ A} SM_AMIGA_7_{ B}
+SM_AMIGA_4_{ C}: UDS_000{ D} LDS_000{ D} SM_AMIGA_4_{ B}
: SM_AMIGA_3_{ G}
+SM_AMIGA_1_{ I}: DSACK_1_{ H} SM_AMIGA_1_{ H} SM_AMIGA_0_{ G}
+ CLK_CNT_0_{ C}:inst_CLK_OUT_PRE{ B} CLK_CNT_0_{ B} CLK_CNT_1_{ B}
+ CLK_CNT_1_{ C}:inst_CLK_OUT_PRE{ B} CLK_CNT_0_{ B} CLK_CNT_1_{ B}
SM_AMIGA_3_{ H}:inst_DTACK_SYNC{ G} inst_VPA_SYNC{ G} SM_AMIGA_3_{ G}
: SM_AMIGA_2_{ G}
-SM_AMIGA_5_{ B}: SM_AMIGA_4_{ F} SM_AMIGA_5_{ A}
-SM_AMIGA_2_{ H}: SM_AMIGA_1_{ G} SM_AMIGA_2_{ G}
-SM_AMIGA_0_{ I}: SM_AMIGA_7_{ H} SM_AMIGA_0_{ H}
+SM_AMIGA_5_{ C}: SM_AMIGA_4_{ B} SM_AMIGA_5_{ B}
+SM_AMIGA_2_{ H}: SM_AMIGA_1_{ H} SM_AMIGA_2_{ G}
+SM_AMIGA_0_{ H}: SM_AMIGA_7_{ B} SM_AMIGA_0_{ G}
-----------------------------------------------------------------------------
{.} : Indicates block location of signal
@@ -552,7 +562,7 @@ Equations :
| Reg |Mode |Set |Reset| Name
+-----+-----+-----+-----+------------------------
| | | | | AVEC
-| * | S | BS | BR | SM_AMIGA_5_
+| * | S | BS | BR | SM_AMIGA_6_
| | | | | DS_030
| | | | | A_19_
| | | | | A_16_
@@ -573,9 +583,15 @@ Equations :
| * | S | BS | BR | IPL_030_1_
| * | A | | | CLK_EXP
| * | A | | | RESET
+| * | A | | | inst_CLK_OUT_PRE
+| * | S | BR | BS | SM_AMIGA_4_
+| * | S | BS | BR | SM_AMIGA_7_
| * | S | BS | BR | RN_IPL_030_0_
| * | S | BS | BR | RN_IPL_030_1_
| * | S | BS | BR | RN_IPL_030_2_
+| * | S | BR | BS | SM_AMIGA_5_
+| * | A | | | CLK_CNT_1_
+| * | A | | | CLK_CNT_0_
| | | | | A_29_
| | | | | A_30_
| | | | | A_31_
@@ -608,20 +624,19 @@ Equations :
| * | S | BS | BR | DTACK
| * | S | BS | BR | LDS_000
| * | S | BS | BR | UDS_000
+| * | A | | | AMIGA_BUS_ENABLE
| * | S | BS | BR | BG_000
| * | S | BS | BR | VMA
| * | S | BS | BR | AS_000
-| | | | | AMIGA_BUS_ENABLE
-| * | A | | | inst_CLK_000_D1
+| * | S | BS | BR | RN_AS_000
| * | A | | | cpu_est_1_
-| * | S | BR | BS | SM_AMIGA_6_
-| * | A | | | cpu_est_2_
| * | A | | | cpu_est_0_
| * | S | BS | BR | RN_VMA
-| * | S | BS | BR | RN_AS_000
| * | S | BS | BR | RN_LDS_000
| * | S | BS | BR | RN_UDS_000
+| * | A | | | RN_AMIGA_BUS_ENABLE
| * | S | BS | BR | RN_BG_000
+| * | A | | | CLK_REF_1_
| | | | | BGACK_000
@@ -638,13 +653,12 @@ Equations :
Block F
-block level set pt : GND
-block level reset pt : !RST
+block level set pt :
+block level reset pt :
Equations :
| | |Block|Block| Signal
| Reg |Mode |Set |Reset| Name
+-----+-----+-----+-----+------------------------
-| * | S | BS | BR | SM_AMIGA_4_
| | | | | A_17_
| | | | | FC_1_
| | | | | FC_0_
@@ -660,10 +674,13 @@ Equations :
+-----+-----+-----+-----+------------------------
| * | S | BS | BR | E
| * | S | BS | BR | CLK_DIV_OUT
+| * | S | BS | BR | inst_CLK_000_D1
| * | S | BS | BR | inst_CLK_000_D0
+| * | S | BS | BR | inst_CLK_000_D2
| * | S | BS | BR | RN_E
-| * | A | | | SM_AMIGA_1_
+| * | A | | | SM_AMIGA_0_
| * | A | | | SM_AMIGA_2_
+| * | S | BS | BR | cpu_est_2_
| * | A | | | SM_AMIGA_3_
| * | A | | | inst_VPA_SYNC
| * | A | | | inst_DTACK_SYNC
@@ -687,13 +704,10 @@ Equations :
| | | | | DSACK_0_
| * | S | BS | BR | inst_AS_030_000_SYNC
| * | S | BS | BR | RN_FPU_CS
-| * | A | | | inst_CLK_OUT_PRE
+| * | S | BR | BS | SM_AMIGA_1_
| * | S | BS | BR | RN_BGACK_030
-| * | S | BS | BR | SM_AMIGA_7_
| * | A | | | inst_VPA_D
-| * | S | BR | BS | SM_AMIGA_0_
| * | S | BS | BR | RN_DSACK_1_
-| * | A | | | CLK_CNT_0_
| | | | | AS_030
| | | | | A_22_
| | | | | A_23_
@@ -715,22 +729,22 @@ BLOCK_A_LOGIC_ARRAY_FANIN
CSM Signal Source CSM Signal Source
------------------------------------ ------------------------------------
mx A0 RST pin 86 mx A17 ... ...
-mx A1 inst_CLK_000_D1 mcell D13 mx A18 ... ...
+mx A1 ... ... mx A18 ... ...
mx A2 ... ... mx A19 ... ...
mx A3 ... ... mx A20 ... ...
mx A4 CLK_OSZI pin 61 mx A21 ... ...
mx A5 ... ... mx A22 ... ...
mx A6 ... ... mx A23 ... ...
-mx A7 ... ... mx A24 ... ...
+mx A7 inst_CLK_000_D0 mcell G12 mx A24 inst_CLK_000_D2 mcell G1
mx A8 ... ... mx A25 ... ...
mx A9 ... ... mx A26 ... ...
-mx A10inst_AS_030_000_SYNC mcell H1 mx A27 ... ...
+mx A10 SM_AMIGA_7_ mcell B13 mx A27 ... ...
mx A11 ... ... mx A28 ... ...
-mx A12 ... ... mx A29 ... ...
-mx A13 inst_CLK_000_D0 mcell G8 mx A30 ... ...
+mx A12inst_AS_030_000_SYNC mcell H1 mx A29 ... ...
+mx A13 inst_CLK_000_D1 mcell G8 mx A30 ... ...
mx A14 ... ... mx A31 ... ...
-mx A15 SM_AMIGA_5_ mcell A0 mx A32 ... ...
-mx A16 SM_AMIGA_6_ mcell D6
+mx A15 SM_AMIGA_6_ mcell A0 mx A32 ... ...
+mx A16 ... ...
----------------------------------------------------------------------------
@@ -739,22 +753,22 @@ BLOCK_B_LOGIC_ARRAY_FANIN
CSM Signal Source CSM Signal Source
------------------------------------ ------------------------------------
mx B0 IPL_0_ pin 67 mx B17 ... ...
-mx B1 inst_CLK_000_D1 mcell D13 mx B18 ... ...
-mx B2 ... ... mx B19 ... ...
+mx B1 RN_IPL_030_1_ mcell B12 mx B18 ... ...
+mx B2 CLK_CNT_0_ mcell B10 mx B19 ... ...
mx B3 IPL_1_ pin 56 mx B20 ... ...
mx B4 IPL_2_ pin 68 mx B21 RST pin 86
-mx B5 ... ... mx B22 ... ...
-mx B6 ... ... mx B23 ... ...
-mx B7 ... ... mx B24 ... ...
+mx B5 ... ... mx B22 SM_AMIGA_0_ mcell G5
+mx B6 SM_AMIGA_4_ mcell B9 mx B23 ... ...
+mx B7 RN_AS_000 mcell D9 mx B24 inst_CLK_000_D2 mcell G1
mx B8 RN_IPL_030_0_ mcell B8 mx B25 ... ...
mx B9 ... ... mx B26 ... ...
-mx B10 inst_CLK_000_D0 mcell G8 mx B27 RN_IPL_030_2_ mcell B4
-mx B11 ... ... mx B28 ... ...
-mx B12 RN_IPL_030_1_ mcell B12 mx B29 CLK_OSZI pin 61
-mx B13inst_CLK_OUT_PRE mcell H5 mx B30 ... ...
-mx B14 ... ... mx B31 ... ...
-mx B15 ... ... mx B32 ... ...
-mx B16 ... ...
+mx B10 SM_AMIGA_5_ mcell B2 mx B27 RN_IPL_030_2_ mcell B4
+mx B11 CLK_CNT_1_ mcell B6 mx B28 SM_AMIGA_7_ mcell B13
+mx B12inst_AS_030_000_SYNC mcell H1 mx B29 CLK_OSZI pin 61
+mx B13 inst_CLK_000_D1 mcell G8 mx B30 ... ...
+mx B14 inst_CLK_000_D0 mcell G12 mx B31inst_CLK_OUT_PRE mcell B5
+mx B15 SM_AMIGA_6_ mcell A0 mx B32 ... ...
+mx B16 CLK_REF_1_ mcell D6
----------------------------------------------------------------------------
@@ -786,23 +800,23 @@ BLOCK_D_LOGIC_ARRAY_FANIN
~~~~~~~~~~~~~~~~~~~~~~~~~
CSM Signal Source CSM Signal Source
------------------------------------ ------------------------------------
-mx D0 SIZE_0_ pin 70 mx D17 RN_BG_000 mcell D1
-mx D1 inst_CLK_000_D1 mcell D13 mx D18 A_0_ pin 69
-mx D2 RN_E mcell G4 mx D19inst_AS_030_000_SYNC mcell H1
-mx D3 cpu_est_1_ mcell D2 mx D20 CLK_030 pin 64
-mx D4 BG_030 pin 21 mx D21 RST pin 86
-mx D5 RN_LDS_000 mcell D8 mx D22 ... ...
+mx D0 RST pin 86 mx D17 DSACK_1_ pin 81
+mx D1 cpu_est_1_ mcell D13 mx D18 A_0_ pin 69
+mx D2 RN_BG_000 mcell D1 mx D19inst_AS_030_000_SYNC mcell H1
+mx D3 cpu_est_0_ mcell D2 mx D20 CLK_030 pin 64
+mx D4 SM_AMIGA_6_ mcell A0 mx D21 RN_E mcell G4
+mx D5 DS_030 pin 98 mx D22 BG_030 pin 21
mx D6 SIZE_1_ pin 79 mx D23 RN_BGACK_030 mcell H4
-mx D7 inst_VPA_D mcell H13 mx D24 RN_AS_000 mcell D5
-mx D8 RW pin 71 mx D25 SM_AMIGA_4_ mcell F0
+mx D7 inst_CLK_000_D0 mcell G12 mx D24 RN_VMA mcell D5
+mx D8 RW pin 71 mx D25 cpu_est_2_ mcell G13
mx D9 AS_030 pin 82 mx D26 ... ...
-mx D10 cpu_est_0_ mcell D14 mx D27 SM_AMIGA_7_ mcell H9
-mx D11 RN_UDS_000 mcell D12 mx D28 ... ...
-mx D12 DS_030 pin 98 mx D29 CLK_OSZI pin 61
-mx D13 inst_CLK_000_D0 mcell G8 mx D30 cpu_est_2_ mcell D10
-mx D14 RN_VMA mcell D4 mx D31 ... ...
-mx D15 nEXP_SPACE pin 14 mx D32 DSACK_1_ pin 81
-mx D16 SM_AMIGA_6_ mcell D6
+mx D10RN_AMIGA_BUS_ENABLE mcell D4 mx D27 inst_VPA_D mcell H9
+mx D11 RN_UDS_000 mcell D12 mx D28 SM_AMIGA_7_ mcell B13
+mx D12 RN_AS_000 mcell D9 mx D29 CLK_OSZI pin 61
+mx D13 inst_CLK_000_D1 mcell G8 mx D30 ... ...
+mx D14 SIZE_0_ pin 70 mx D31 SM_AMIGA_4_ mcell B9
+mx D15 nEXP_SPACE pin 14 mx D32 inst_CLK_000_D2 mcell G1
+mx D16 RN_LDS_000 mcell D8
----------------------------------------------------------------------------
@@ -830,51 +844,27 @@ mx E16 ... ...
----------------------------------------------------------------------------
-BLOCK_F_LOGIC_ARRAY_FANIN
-~~~~~~~~~~~~~~~~~~~~~~~~~
-CSM Signal Source CSM Signal Source
------------------------------------- ------------------------------------
-mx F0 RST pin 86 mx F17 ... ...
-mx F1 ... ... mx F18 ... ...
-mx F2 ... ... mx F19 ... ...
-mx F3 ... ... mx F20 ... ...
-mx F4 CLK_OSZI pin 61 mx F21 ... ...
-mx F5 SM_AMIGA_4_ mcell F0 mx F22 ... ...
-mx F6 ... ... mx F23 ... ...
-mx F7 ... ... mx F24 ... ...
-mx F8 ... ... mx F25 ... ...
-mx F9 ... ... mx F26 ... ...
-mx F10 inst_CLK_000_D0 mcell G8 mx F27 ... ...
-mx F11 ... ... mx F28 ... ...
-mx F12 ... ... mx F29 ... ...
-mx F13 ... ... mx F30 ... ...
-mx F14 ... ... mx F31 ... ...
-mx F15 SM_AMIGA_5_ mcell A0 mx F32 ... ...
-mx F16 ... ...
-----------------------------------------------------------------------------
-
-
BLOCK_G_LOGIC_ARRAY_FANIN
~~~~~~~~~~~~~~~~~~~~~~~~~
CSM Signal Source CSM Signal Source
------------------------------------ ------------------------------------
-mx G0 RST pin 86 mx G17 cpu_est_0_ mcell D14
-mx G1 inst_CLK_000_D1 mcell D13 mx G18 ... ...
-mx G2 cpu_est_2_ mcell D10 mx G19 AS_030 pin 82
+mx G0 RST pin 86 mx G17 ... ...
+mx G1 cpu_est_1_ mcell D13 mx G18 ... ...
+mx G2 RN_E mcell G4 mx G19 AS_030 pin 82
mx G3 CLK_000 pin 11 mx G20 ... ...
-mx G4 CLK_OSZI pin 61 mx G21 ... ...
-mx G5 SM_AMIGA_4_ mcell F0 mx G22 SM_AMIGA_3_ mcell G5
-mx G6 ... ... mx G23 SM_AMIGA_1_ mcell G12
-mx G7 inst_VPA_D mcell H13 mx G24 SM_AMIGA_2_ mcell G1
-mx G8 ... ... mx G25 ... ...
+mx G4 SM_AMIGA_1_ mcell H5 mx G21 CLK_OSZI pin 61
+mx G5 inst_DTACK_SYNC mcell G10 mx G22 SM_AMIGA_0_ mcell G5
+mx G6 SM_AMIGA_4_ mcell B9 mx G23 inst_VPA_SYNC mcell G6
+mx G7 RN_VMA mcell D5 mx G24 ... ...
+mx G8 ... ... mx G25 RN_AS_000 mcell D9
mx G9 DTACK pin 30 mx G26 ... ...
-mx G10 inst_VPA_SYNC mcell G9 mx G27 ... ...
-mx G11 RN_E mcell G4 mx G28 inst_CLK_000_D0 mcell G8
-mx G12 inst_DTACK_SYNC mcell G13 mx G29 ... ...
-mx G13inst_CLK_OUT_PRE mcell H5 mx G30 ... ...
-mx G14 RN_VMA mcell D4 mx G31 ... ...
+mx G10 SM_AMIGA_2_ mcell G9 mx G27 ... ...
+mx G11 inst_VPA_D mcell H9 mx G28inst_CLK_OUT_PRE mcell B5
+mx G12 cpu_est_2_ mcell G13 mx G29 ... ...
+mx G13 inst_CLK_000_D1 mcell G8 mx G30 ... ...
+mx G14 inst_CLK_000_D0 mcell G12 mx G31 SM_AMIGA_3_ mcell G2
mx G15 ... ... mx G32 ... ...
-mx G16 cpu_est_1_ mcell D2
+mx G16 cpu_est_0_ mcell D2
----------------------------------------------------------------------------
@@ -886,17 +876,17 @@ mx H0 RST pin 86 mx H17 A_18_ pin 95
mx H1 FC_1_ pin 58 mx H18 BGACK_000 pin 28
mx H2 ... ... mx H19inst_AS_030_000_SYNC mcell H1
mx H3 RN_DSACK_1_ mcell H8 mx H20 CLK_030 pin 64
-mx H4 CLK_OSZI pin 61 mx H21 CLK_CNT_0_ mcell H6
+mx H4 SM_AMIGA_1_ mcell H5 mx H21 CLK_OSZI pin 61
mx H5 nEXP_SPACE pin 14 mx H22 ... ...
mx H6 FC_0_ pin 57 mx H23 RN_BGACK_030 mcell H4
-mx H7 SM_AMIGA_1_ mcell G12 mx H24 RN_AS_000 mcell D5
+mx H7 inst_CLK_000_D0 mcell G12 mx H24 ... ...
mx H8 A_17_ pin 59 mx H25 ... ...
mx H9 AS_030 pin 82 mx H26 ... ...
-mx H10 VPA pin 36 mx H27 SM_AMIGA_7_ mcell H9
-mx H11 A_16_ pin 96 mx H28 inst_CLK_000_D0 mcell G8
-mx H12 A_19_ pin 97 mx H29 inst_CLK_000_D1 mcell D13
-mx H13inst_CLK_OUT_PRE mcell H5 mx H30 RN_FPU_CS mcell H0
-mx H14 SM_AMIGA_0_ mcell H2 mx H31 ... ...
+mx H10 inst_CLK_000_D1 mcell G8 mx H27 SM_AMIGA_2_ mcell G9
+mx H11 A_16_ pin 96 mx H28inst_CLK_OUT_PRE mcell B5
+mx H12 A_19_ pin 97 mx H29 ... ...
+mx H13 VPA pin 36 mx H30 RN_FPU_CS mcell H0
+mx H14 ... ... mx H31 ... ...
mx H15 ... ... mx H32 ... ...
mx H16 ... ...
----------------------------------------------------------------------------
@@ -915,18 +905,17 @@ PostFit_Equations
--------- ------ ------- ---- -----------------
0 0 1 Pin BERR
1 1 1 Pin BERR.OE
- 1 0 1 Pin DSACK_0_
- 1 1 1 Pin DSACK_0_.OE
1 1 1 Pin CLK_DIV_OUT.D
1 1 1 Pin CLK_DIV_OUT.C
1 0 1 Pin AVEC
0 0 1 Pin AVEC_EXP
1 1 1 Pin AVEC_EXP.OE
- 1 1 1 Pin AMIGA_BUS_ENABLE
1 1 1 Pin AMIGA_BUS_DATA_DIR
1 0 1 Pin AMIGA_BUS_ENABLE_LOW
1 4 1 Pin CIIN
1 8 1 Pin CIIN.OE
+ 1 0 1 Pin DSACK_0_
+ 1 1 1 Pin DSACK_0_.OE
3 4 1 Pin IPL_030_2_.D
1 1 1 Pin IPL_030_2_.AP
1 1 1 Pin IPL_030_2_.C
@@ -946,12 +935,6 @@ PostFit_Equations
12 12 1 Pin LDS_000.D-
1 1 1 Pin LDS_000.AP
1 1 1 Pin LDS_000.C
- 3 4 1 Pin IPL_030_1_.D
- 1 1 1 Pin IPL_030_1_.AP
- 1 1 1 Pin IPL_030_1_.C
- 3 4 1 Pin IPL_030_0_.D
- 1 1 1 Pin IPL_030_0_.AP
- 1 1 1 Pin IPL_030_0_.C
3 7 1 Pin BG_000.D-
1 1 1 Pin BG_000.AP
1 1 1 Pin BG_000.C
@@ -974,6 +957,14 @@ PostFit_Equations
1 1 1 Pin VMA.C
1 1 1 Pin RESET.D
1 1 1 Pin RESET.C
+ 3 5 1 Pin AMIGA_BUS_ENABLE.D-
+ 1 1 1 Pin AMIGA_BUS_ENABLE.C
+ 3 4 1 Pin IPL_030_1_.D
+ 1 1 1 Pin IPL_030_1_.AP
+ 1 1 1 Pin IPL_030_1_.C
+ 3 4 1 Pin IPL_030_0_.D
+ 1 1 1 Pin IPL_030_0_.AP
+ 1 1 1 Pin IPL_030_0_.C
3 3 1 Node cpu_est_0_.D
1 1 1 Node cpu_est_0_.C
4 6 1 Node cpu_est_1_.T
@@ -981,53 +972,61 @@ PostFit_Equations
4 11 1 Node inst_AS_030_000_SYNC.D
1 1 1 Node inst_AS_030_000_SYNC.AP
1 1 1 Node inst_AS_030_000_SYNC.C
- 2 6 1 Node inst_DTACK_SYNC.D-
+ 2 7 1 Node inst_DTACK_SYNC.D-
1 1 1 Node inst_DTACK_SYNC.AP
1 1 1 Node inst_DTACK_SYNC.C
1 1 1 Node inst_VPA_D.D
1 1 1 Node inst_VPA_D.C
- 2 10 1 Node inst_VPA_SYNC.D-
+ 2 11 1 Node inst_VPA_SYNC.D-
1 1 1 Node inst_VPA_SYNC.AP
1 1 1 Node inst_VPA_SYNC.C
1 1 1 Node inst_CLK_000_D0.D
1 1 1 Node inst_CLK_000_D0.C
1 1 1 Node inst_CLK_000_D1.D
1 1 1 Node inst_CLK_000_D1.C
- 2 2 1 Node inst_CLK_OUT_PRE.D
+ 1 1 1 Node inst_CLK_000_D2.D
+ 1 1 1 Node inst_CLK_000_D2.C
+ 3 3 1 NodeX1 inst_CLK_OUT_PRE.D.X1
+ 1 2 1 NodeX2 inst_CLK_OUT_PRE.D.X2
1 1 1 Node inst_CLK_OUT_PRE.C
+ 1 1 1 Node SM_AMIGA_6_.AR
+ 4 6 1 Node SM_AMIGA_6_.D
+ 1 1 1 Node SM_AMIGA_6_.C
3 6 1 NodeX1 cpu_est_2_.D.X1
1 1 1 NodeX2 cpu_est_2_.D.X2
1 1 1 Node cpu_est_2_.C
- 1 1 1 Node CLK_CNT_0_.D
- 1 1 1 Node CLK_CNT_0_.C
- 1 1 1 Node SM_AMIGA_6_.AR
- 3 5 1 Node SM_AMIGA_6_.D-
- 1 1 1 Node SM_AMIGA_6_.C
+ 1 1 1 Node CLK_REF_1_.AR
+ 0 0 1 Node CLK_REF_1_.D
+ 0 0 1 Node CLK_REF_1_.LH
2 4 1 Node SM_AMIGA_7_.D
1 1 1 Node SM_AMIGA_7_.AP
1 1 1 Node SM_AMIGA_7_.C
- 1 1 1 Node SM_AMIGA_1_.AR
- 3 5 1 Node SM_AMIGA_1_.D
- 1 1 1 Node SM_AMIGA_1_.C
1 1 1 Node SM_AMIGA_4_.AR
2 3 1 Node SM_AMIGA_4_.D
1 1 1 Node SM_AMIGA_4_.C
+ 1 1 1 Node SM_AMIGA_1_.AR
+ 3 4 1 Node SM_AMIGA_1_.D
+ 1 1 1 Node SM_AMIGA_1_.C
+ 2 3 1 Node CLK_CNT_0_.D
+ 1 1 1 Node CLK_CNT_0_.C
+ 2 3 1 Node CLK_CNT_1_.D
+ 1 1 1 Node CLK_CNT_1_.C
1 1 1 Node SM_AMIGA_3_.AR
3 5 1 Node SM_AMIGA_3_.D
1 1 1 Node SM_AMIGA_3_.C
1 1 1 Node SM_AMIGA_5_.AR
- 2 5 1 Node SM_AMIGA_5_.D
+ 2 6 1 Node SM_AMIGA_5_.D
1 1 1 Node SM_AMIGA_5_.C
1 1 1 Node SM_AMIGA_2_.AR
3 5 1 Node SM_AMIGA_2_.D
1 1 1 Node SM_AMIGA_2_.C
1 1 1 Node SM_AMIGA_0_.AR
- 3 6 1 Node SM_AMIGA_0_.D
+ 3 5 1 Node SM_AMIGA_0_.D
1 1 1 Node SM_AMIGA_0_.C
=========
- 168 P-Term Total: 168
+ 181 P-Term Total: 181
Total Pins: 59
- Total Nodes: 19
+ Total Nodes: 22
Average P-Term/Output: 2
@@ -1037,10 +1036,6 @@ BERR = (0);
BERR.OE = (!FPU_CS.Q);
-DSACK_0_ = (1);
-
-DSACK_0_.OE = (nEXP_SPACE);
-
CLK_DIV_OUT.D = (inst_CLK_OUT_PRE.Q);
CLK_DIV_OUT.C = (CLK_OSZI);
@@ -1051,8 +1046,6 @@ AVEC_EXP = (0);
AVEC_EXP.OE = (!FPU_CS.Q);
-AMIGA_BUS_ENABLE = (!nEXP_SPACE);
-
AMIGA_BUS_DATA_DIR = (!RW);
AMIGA_BUS_ENABLE_LOW = (1);
@@ -1061,8 +1054,12 @@ CIIN = (A_23_ & A_22_ & A_21_ & A_20_);
CIIN.OE = (!A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_);
-IPL_030_2_.D = (!inst_CLK_000_D0.Q & IPL_030_2_.Q
- # inst_CLK_000_D1.Q & IPL_030_2_.Q
+DSACK_0_ = (1);
+
+DSACK_0_.OE = (nEXP_SPACE);
+
+IPL_030_2_.D = (IPL_030_2_.Q & !inst_CLK_000_D0.Q
+ # IPL_030_2_.Q & inst_CLK_000_D1.Q
# IPL_2_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
IPL_030_2_.AP = (!RST);
@@ -1072,7 +1069,7 @@ IPL_030_2_.C = (CLK_OSZI);
DSACK_1_.OE = (nEXP_SPACE);
!DSACK_1_.D = (!AS_030 & !DSACK_1_.Q
- # !inst_CLK_000_D1.Q & inst_CLK_OUT_PRE.Q & SM_AMIGA_1_.Q);
+ # !inst_CLK_000_D0.Q & inst_CLK_OUT_PRE.Q & SM_AMIGA_1_.Q);
DSACK_1_.AP = (!RST);
@@ -1081,7 +1078,7 @@ DSACK_1_.C = (CLK_OSZI);
AS_000.OE = (BGACK_030.Q);
!AS_000.D = (!AS_030 & !AS_000.Q
- # !inst_AS_030_000_SYNC.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & SM_AMIGA_6_.Q);
+ # !inst_AS_030_000_SYNC.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D2.Q & SM_AMIGA_6_.Q);
AS_000.AP = (!RST);
@@ -1090,13 +1087,13 @@ AS_000.C = (CLK_OSZI);
UDS_000.OE = (BGACK_030.Q);
!UDS_000.D = (!AS_030 & DS_030 & !UDS_000.Q
- # !AS_030 & !inst_CLK_000_D0.Q & !UDS_000.Q
# !AS_030 & RW & inst_AS_030_000_SYNC.Q & !UDS_000.Q
- # !AS_030 & RW & inst_CLK_000_D1.Q & !UDS_000.Q
+ # !AS_030 & RW & !inst_CLK_000_D1.Q & !UDS_000.Q
+ # !AS_030 & RW & inst_CLK_000_D2.Q & !UDS_000.Q
# !AS_030 & RW & !SM_AMIGA_6_.Q & !UDS_000.Q
+ # !DS_030 & !RW & !A_0_ & SM_AMIGA_4_.Q
# !AS_030 & !RW & !UDS_000.Q & !SM_AMIGA_4_.Q
- # !DS_030 & !RW & !A_0_ & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q
- # !DS_030 & RW & !A_0_ & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & SM_AMIGA_6_.Q);
+ # !DS_030 & RW & !A_0_ & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D2.Q & SM_AMIGA_6_.Q);
UDS_000.AP = (!RST);
@@ -1105,38 +1102,22 @@ UDS_000.C = (CLK_OSZI);
LDS_000.OE = (BGACK_030.Q);
!LDS_000.D = (!AS_030 & DS_030 & !LDS_000.Q
- # !AS_030 & !inst_CLK_000_D0.Q & !LDS_000.Q
# !AS_030 & RW & inst_AS_030_000_SYNC.Q & !LDS_000.Q
- # !AS_030 & RW & inst_CLK_000_D1.Q & !LDS_000.Q
+ # !AS_030 & RW & !inst_CLK_000_D1.Q & !LDS_000.Q
+ # !AS_030 & RW & inst_CLK_000_D2.Q & !LDS_000.Q
# !AS_030 & RW & !SM_AMIGA_6_.Q & !LDS_000.Q
+ # SIZE_1_ & !DS_030 & !RW & SM_AMIGA_4_.Q
+ # !DS_030 & !RW & !SIZE_0_ & SM_AMIGA_4_.Q
+ # !DS_030 & !RW & A_0_ & SM_AMIGA_4_.Q
# !AS_030 & !RW & !LDS_000.Q & !SM_AMIGA_4_.Q
- # SIZE_1_ & !DS_030 & !RW & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q
- # !DS_030 & !RW & !SIZE_0_ & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q
- # !DS_030 & !RW & A_0_ & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q
- # SIZE_1_ & !DS_030 & RW & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & SM_AMIGA_6_.Q
- # !DS_030 & RW & !SIZE_0_ & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & SM_AMIGA_6_.Q
- # !DS_030 & RW & A_0_ & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & SM_AMIGA_6_.Q);
+ # SIZE_1_ & !DS_030 & RW & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D2.Q & SM_AMIGA_6_.Q
+ # !DS_030 & RW & !SIZE_0_ & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D2.Q & SM_AMIGA_6_.Q
+ # !DS_030 & RW & A_0_ & !inst_AS_030_000_SYNC.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D2.Q & SM_AMIGA_6_.Q);
LDS_000.AP = (!RST);
LDS_000.C = (CLK_OSZI);
-IPL_030_1_.D = (!inst_CLK_000_D0.Q & IPL_030_1_.Q
- # inst_CLK_000_D1.Q & IPL_030_1_.Q
- # IPL_1_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
-
-IPL_030_1_.AP = (!RST);
-
-IPL_030_1_.C = (CLK_OSZI);
-
-IPL_030_0_.D = (!inst_CLK_000_D0.Q & IPL_030_0_.Q
- # inst_CLK_000_D1.Q & IPL_030_0_.Q
- # IPL_0_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
-
-IPL_030_0_.AP = (!RST);
-
-IPL_030_0_.C = (CLK_OSZI);
-
!BG_000.D = (!BG_030 & CLK_030 & !BG_000.Q
# AS_030 & !nEXP_SPACE & !BG_030 & !CLK_030 & SM_AMIGA_6_.Q
# AS_030 & !nEXP_SPACE & !BG_030 & !CLK_030 & SM_AMIGA_7_.Q);
@@ -1188,6 +1169,28 @@ RESET.D = (RST);
RESET.C = (CLK_OSZI);
+!AMIGA_BUS_ENABLE.D = (!RST & !AMIGA_BUS_ENABLE.Q
+ # nEXP_SPACE & RST & SM_AMIGA_6_.Q
+ # !AS_030 & !SM_AMIGA_6_.Q & !AMIGA_BUS_ENABLE.Q);
+
+AMIGA_BUS_ENABLE.C = (CLK_OSZI);
+
+IPL_030_1_.D = (IPL_030_1_.Q & !inst_CLK_000_D0.Q
+ # IPL_030_1_.Q & inst_CLK_000_D1.Q
+ # IPL_1_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
+
+IPL_030_1_.AP = (!RST);
+
+IPL_030_1_.C = (CLK_OSZI);
+
+IPL_030_0_.D = (IPL_030_0_.Q & !inst_CLK_000_D0.Q
+ # IPL_030_0_.Q & inst_CLK_000_D1.Q
+ # IPL_0_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
+
+IPL_030_0_.AP = (!RST);
+
+IPL_030_0_.C = (CLK_OSZI);
+
cpu_est_0_.D = (cpu_est_0_.Q & !inst_CLK_000_D0.Q
# cpu_est_0_.Q & inst_CLK_000_D1.Q
# !cpu_est_0_.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
@@ -1211,7 +1214,7 @@ inst_AS_030_000_SYNC.AP = (!RST);
inst_AS_030_000_SYNC.C = (CLK_OSZI);
!inst_DTACK_SYNC.D = (!AS_030 & !inst_DTACK_SYNC.Q
- # inst_VPA_D.Q & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !DTACK.PIN);
+ # CLK_000 & inst_VPA_D.Q & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !DTACK.PIN);
inst_DTACK_SYNC.AP = (!RST);
@@ -1222,7 +1225,7 @@ inst_VPA_D.D = (VPA);
inst_VPA_D.C = (CLK_OSZI);
!inst_VPA_SYNC.D = (!AS_030 & !inst_VPA_SYNC.Q
- # E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & inst_CLK_000_D0.Q & cpu_est_2_.Q & SM_AMIGA_3_.Q);
+ # CLK_000 & E.Q & !VMA.Q & !cpu_est_0_.Q & !cpu_est_1_.Q & !inst_VPA_D.Q & inst_CLK_000_D0.Q & cpu_est_2_.Q & SM_AMIGA_3_.Q);
inst_VPA_SYNC.AP = (!RST);
@@ -1236,11 +1239,27 @@ inst_CLK_000_D1.D = (inst_CLK_000_D0.Q);
inst_CLK_000_D1.C = (CLK_OSZI);
-inst_CLK_OUT_PRE.D = (!inst_CLK_OUT_PRE.Q & CLK_CNT_0_.Q
- # inst_CLK_OUT_PRE.Q & !CLK_CNT_0_.Q);
+inst_CLK_000_D2.D = (inst_CLK_000_D1.Q);
+
+inst_CLK_000_D2.C = (CLK_OSZI);
+
+inst_CLK_OUT_PRE.D.X1 = (inst_CLK_OUT_PRE.Q & CLK_CNT_0_.Q
+ # inst_CLK_OUT_PRE.Q & CLK_CNT_1_.Q
+ # !inst_CLK_OUT_PRE.Q & !CLK_CNT_0_.Q & !CLK_CNT_1_.Q);
+
+inst_CLK_OUT_PRE.D.X2 = (CLK_REF_1_.Q & !CLK_CNT_0_.Q);
inst_CLK_OUT_PRE.C = (CLK_OSZI);
+SM_AMIGA_6_.AR = (!RST);
+
+SM_AMIGA_6_.D = (inst_AS_030_000_SYNC.Q & SM_AMIGA_6_.Q
+ # !inst_CLK_000_D1.Q & SM_AMIGA_6_.Q
+ # inst_CLK_000_D2.Q & SM_AMIGA_6_.Q
+ # !inst_CLK_000_D0.Q & SM_AMIGA_7_.Q);
+
+SM_AMIGA_6_.C = (CLK_OSZI);
+
cpu_est_2_.D.X1 = (E.Q & cpu_est_0_.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & !cpu_est_2_.Q
# !cpu_est_0_.Q & !cpu_est_1_.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & !cpu_est_2_.Q
# !E.Q & cpu_est_0_.Q & !cpu_est_1_.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & cpu_est_2_.Q);
@@ -1249,17 +1268,11 @@ cpu_est_2_.D.X2 = (cpu_est_2_.Q);
cpu_est_2_.C = (CLK_OSZI);
-CLK_CNT_0_.D = (!CLK_CNT_0_.Q);
+CLK_REF_1_.AR = (!RST);
-CLK_CNT_0_.C = (CLK_OSZI);
+CLK_REF_1_.D = (0);
-SM_AMIGA_6_.AR = (!RST);
-
-!SM_AMIGA_6_.D = (inst_CLK_000_D0.Q & !SM_AMIGA_6_.Q
- # !SM_AMIGA_6_.Q & !SM_AMIGA_7_.Q
- # !inst_AS_030_000_SYNC.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q);
-
-SM_AMIGA_6_.C = (CLK_OSZI);
+CLK_REF_1_.LH = (0);
SM_AMIGA_7_.D = (inst_CLK_000_D0.Q & SM_AMIGA_7_.Q
# AS_000.Q & inst_CLK_000_D0.Q & SM_AMIGA_0_.Q);
@@ -1268,14 +1281,6 @@ SM_AMIGA_7_.AP = (!RST);
SM_AMIGA_7_.C = (CLK_OSZI);
-SM_AMIGA_1_.AR = (!RST);
-
-SM_AMIGA_1_.D = (inst_CLK_000_D1.Q & SM_AMIGA_1_.Q
- # !inst_CLK_OUT_PRE.Q & SM_AMIGA_1_.Q
- # inst_CLK_000_D0.Q & SM_AMIGA_2_.Q);
-
-SM_AMIGA_1_.C = (CLK_OSZI);
-
SM_AMIGA_4_.AR = (!RST);
SM_AMIGA_4_.D = (!inst_CLK_000_D0.Q & SM_AMIGA_4_.Q
@@ -1283,6 +1288,24 @@ SM_AMIGA_4_.D = (!inst_CLK_000_D0.Q & SM_AMIGA_4_.Q
SM_AMIGA_4_.C = (CLK_OSZI);
+SM_AMIGA_1_.AR = (!RST);
+
+SM_AMIGA_1_.D = (inst_CLK_000_D0.Q & SM_AMIGA_1_.Q
+ # inst_CLK_000_D0.Q & SM_AMIGA_2_.Q
+ # !inst_CLK_OUT_PRE.Q & SM_AMIGA_1_.Q & !SM_AMIGA_2_.Q);
+
+SM_AMIGA_1_.C = (CLK_OSZI);
+
+CLK_CNT_0_.D = (!CLK_REF_1_.Q & !CLK_CNT_0_.Q & CLK_CNT_1_.Q
+ # CLK_REF_1_.Q & !CLK_CNT_0_.Q & !CLK_CNT_1_.Q);
+
+CLK_CNT_0_.C = (CLK_OSZI);
+
+CLK_CNT_1_.D = (CLK_CNT_0_.Q & !CLK_CNT_1_.Q
+ # !CLK_REF_1_.Q & !CLK_CNT_0_.Q & CLK_CNT_1_.Q);
+
+CLK_CNT_1_.C = (CLK_OSZI);
+
SM_AMIGA_3_.AR = (!RST);
SM_AMIGA_3_.D = (inst_CLK_000_D0.Q & SM_AMIGA_4_.Q
@@ -1294,7 +1317,7 @@ SM_AMIGA_3_.C = (CLK_OSZI);
SM_AMIGA_5_.AR = (!RST);
SM_AMIGA_5_.D = (inst_CLK_000_D0.Q & SM_AMIGA_5_.Q
- # !inst_AS_030_000_SYNC.Q & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & SM_AMIGA_6_.Q);
+ # !inst_AS_030_000_SYNC.Q & inst_CLK_000_D1.Q & !inst_CLK_000_D2.Q & SM_AMIGA_6_.Q);
SM_AMIGA_5_.C = (CLK_OSZI);
@@ -1310,7 +1333,7 @@ SM_AMIGA_0_.AR = (!RST);
SM_AMIGA_0_.D = (!AS_000.Q & SM_AMIGA_0_.Q
# !inst_CLK_000_D0.Q & SM_AMIGA_0_.Q
- # !inst_CLK_000_D1.Q & inst_CLK_OUT_PRE.Q & SM_AMIGA_1_.Q);
+ # !inst_CLK_000_D0.Q & inst_CLK_OUT_PRE.Q & SM_AMIGA_1_.Q);
SM_AMIGA_0_.C = (CLK_OSZI);
diff --git a/Logic/68030_tk.tal b/Logic/68030_tk.tal
index f248157..36bd9c2 100644
--- a/Logic/68030_tk.tal
+++ b/Logic/68030_tk.tal
@@ -32,7 +32,6 @@ TCR, Clocked Output-to-Register Time,
TSU TCO TPD TCR
#passes #passes #passes #passes
SIGNAL NAME min max min max min max min max
-AMIGA_BUS_ENABLE .. .. .. .. 1 1 .. ..
AMIGA_BUS_DATA_DIR .. .. .. .. 1 1 .. ..
CIIN .. .. .. .. 1 1 .. ..
IPL_030_2_ 1 1 0 0 .. .. 1 1
@@ -45,10 +44,6 @@ AMIGA_BUS_DATA_DIR .. .. .. .. 1 1 .. ..
RN_UDS_000 1 1 0 0 .. .. 1 1
LDS_000 1 1 0 0 .. .. 1 1
RN_LDS_000 1 1 0 0 .. .. 1 1
- IPL_030_1_ 1 1 0 0 .. .. 1 1
- RN_IPL_030_1_ 1 1 0 0 .. .. 1 1
- IPL_030_0_ 1 1 0 0 .. .. 1 1
- RN_IPL_030_0_ 1 1 0 0 .. .. 1 1
BG_000 1 1 0 0 .. .. 1 1
RN_BG_000 1 1 0 0 .. .. 1 1
BGACK_030 1 1 0 0 .. .. 1 1
@@ -61,6 +56,12 @@ AMIGA_BUS_DATA_DIR .. .. .. .. 1 1 .. ..
VMA .. .. 0 0 .. .. 1 1
RN_VMA .. .. 0 0 .. .. 1 1
RESET 1 1 0 0 .. .. .. ..
+AMIGA_BUS_ENABLE 1 1 0 0 .. .. 1 1
+RN_AMIGA_BUS_ENABLE 1 1 0 0 .. .. 1 1
+ IPL_030_1_ 1 1 0 0 .. .. 1 1
+ RN_IPL_030_1_ 1 1 0 0 .. .. 1 1
+ IPL_030_0_ 1 1 0 0 .. .. 1 1
+ RN_IPL_030_0_ 1 1 0 0 .. .. 1 1
cpu_est_0_ .. .. .. .. .. .. 1 1
cpu_est_1_ .. .. .. .. .. .. 1 1
inst_AS_030_000_SYNC 1 1 .. .. .. .. 1 1
@@ -69,13 +70,16 @@ inst_AS_030_000_SYNC 1 1 .. .. .. .. 1 1
inst_VPA_SYNC 1 1 .. .. .. .. 1 1
inst_CLK_000_D0 1 1 .. .. .. .. 1 1
inst_CLK_000_D1 .. .. .. .. .. .. 1 1
+ inst_CLK_000_D2 .. .. .. .. .. .. 1 1
inst_CLK_OUT_PRE .. .. .. .. .. .. 1 1
- cpu_est_2_ .. .. .. .. .. .. 1 1
- CLK_CNT_0_ .. .. .. .. .. .. 1 1
SM_AMIGA_6_ .. .. .. .. .. .. 1 1
+ cpu_est_2_ .. .. .. .. .. .. 1 1
+ CLK_REF_1_ .. .. .. .. .. .. 1 1
SM_AMIGA_7_ .. .. .. .. .. .. 1 1
- SM_AMIGA_1_ .. .. .. .. .. .. 1 1
SM_AMIGA_4_ .. .. .. .. .. .. 1 1
+ SM_AMIGA_1_ .. .. .. .. .. .. 1 1
+ CLK_CNT_0_ .. .. .. .. .. .. 1 1
+ CLK_CNT_1_ .. .. .. .. .. .. 1 1
SM_AMIGA_3_ .. .. .. .. .. .. 1 1
SM_AMIGA_5_ .. .. .. .. .. .. 1 1
SM_AMIGA_2_ .. .. .. .. .. .. 1 1
diff --git a/Logic/68030_tk.tt2 b/Logic/68030_tk.tt2
index b021d93..e67db52 100644
--- a/Logic/68030_tk.tt2
+++ b/Logic/68030_tk.tt2
@@ -1,289 +1,317 @@
#$ TOOL ispLEVER Classic 1.7.00.05.28.13
-#$ DATE Fri May 16 17:07:08 2014
+#$ DATE Sun May 18 21:01:47 2014
#$ MODULE 68030_tk
-#$ PINS 59 A_17_ A_16_ SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 A_0_ nEXP_SPACE BERR BG_030 IPL_1_ IPL_0_ DSACK_0_ BGACK_000 FC_0_ CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT AVEC AVEC_EXP VPA RST RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ IPL_030_2_ DSACK_1_ AS_000 UDS_000 LDS_000 IPL_030_1_ IPL_030_0_ BG_000 BGACK_030 CLK_EXP FPU_CS DTACK E VMA RESET
-#$ NODES 19 cpu_est_0_ cpu_est_1_ inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_D inst_VPA_SYNC inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_OUT_PRE cpu_est_2_ CLK_CNT_0_ SM_AMIGA_6_ SM_AMIGA_7_ SM_AMIGA_1_ SM_AMIGA_4_ SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_
+#$ PINS 59 SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 SIZE_0_ A_30_ nEXP_SPACE A_29_ BERR A_28_ BG_030 A_27_ A_26_ A_25_ BGACK_000 A_24_ CLK_030 A_23_ CLK_000 A_22_ CLK_OSZI A_21_ CLK_DIV_OUT A_20_ A_19_ A_18_ A_17_ AVEC A_16_ AVEC_EXP VPA RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN A_0_ IPL_1_ IPL_0_ DSACK_0_ FC_0_ IPL_030_2_ DSACK_1_ AS_000 UDS_000 LDS_000 BG_000 BGACK_030 CLK_EXP FPU_CS DTACK E VMA RESET AMIGA_BUS_ENABLE IPL_030_1_ IPL_030_0_
+#$ NODES 22 cpu_est_0_ cpu_est_1_ inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_D inst_VPA_SYNC inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_OUT_PRE SM_AMIGA_6_ cpu_est_2_ CLK_REF_1_ SM_AMIGA_7_ SM_AMIGA_4_ SM_AMIGA_1_ CLK_CNT_0_ CLK_CNT_1_ SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_
.type fr
-.i 68
-.o 110
-.ilb SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ A_0_ IPL_1_ IPL_0_ FC_0_ BGACK_030.Q FPU_CS.Q E.Q VMA.Q cpu_est_0_.Q cpu_est_1_.Q AS_000.Q inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_D.Q inst_VPA_SYNC.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_OUT_PRE.Q cpu_est_2_.Q CLK_CNT_0_.Q SM_AMIGA_6_.Q SM_AMIGA_7_.Q UDS_000.Q LDS_000.Q DSACK_1_.Q SM_AMIGA_1_.Q SM_AMIGA_4_.Q SM_AMIGA_3_.Q SM_AMIGA_5_.Q SM_AMIGA_2_.Q SM_AMIGA_0_.Q BG_000.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q DSACK_1_.PIN DTACK.PIN
-.ob BERR AVEC AVEC_EXP AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.C SM_AMIGA_0_.AR IPL_030_0_.C IPL_030_0_.AP IPL_030_1_.C IPL_030_1_.AP IPL_030_2_.C IPL_030_2_.AP SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.C SM_AMIGA_4_.AR DSACK_1_.C DSACK_1_.AP VMA.C VMA.AP BGACK_030.C BGACK_030.AP inst_CLK_OUT_PRE.C cpu_est_0_.C cpu_est_1_.C cpu_est_2_.C E.C LDS_000.C LDS_000.AP inst_DTACK_SYNC.C inst_DTACK_SYNC.AP FPU_CS.C FPU_CS.AP inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP AS_000.C AS_000.AP inst_VPA_SYNC.C inst_VPA_SYNC.AP BG_000.C BG_000.AP DTACK.C DTACK.AP UDS_000.C UDS_000.AP CLK_CNT_0_.C inst_VPA_D.C inst_CLK_000_D0.C RESET.C inst_CLK_000_D1.C CLK_EXP.C DSACK_0_ DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE LDS_000.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_DIV_OUT.C CLK_DIV_OUT.D BGACK_030.D FPU_CS.D E.T VMA.T cpu_est_0_.D cpu_est_1_.T AS_000.D inst_AS_030_000_SYNC.D inst_DTACK_SYNC.D inst_VPA_D.D inst_VPA_SYNC.D inst_CLK_000_D0.D inst_CLK_000_D1.D inst_CLK_OUT_PRE.D RESET.D cpu_est_2_.D CLK_CNT_0_.D SM_AMIGA_6_.D SM_AMIGA_7_.D UDS_000.D LDS_000.D DSACK_1_.D SM_AMIGA_1_.D DTACK.D SM_AMIGA_4_.D SM_AMIGA_3_.D SM_AMIGA_5_.D SM_AMIGA_2_.D SM_AMIGA_0_.D BG_000.D CLK_EXP.D IPL_030_0_.D IPL_030_1_.D IPL_030_2_.D
-.p 277
--------------------------------------------------------------------- ~1~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
-----11-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
-------1------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------0------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------1------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~
----0-----1---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------0--1---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
---------01---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0----0---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~
-------1--0---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~
-----------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~
------------1-------------------------------------------------------- ~~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~111111~1~1~1~1~1~1~1~1~111111~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~
--------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~
--------------0------------------------------------------------------ ~~~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~~~~~~1~1~1~1~1~1~1~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
---------------0----------------------------------------------------- ~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--0--------------0000000--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------1111----------------------------------------- ~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------1-----------------1---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------1------------------1--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------1-------------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------1--------------------1------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----1----11-----------------0010---1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
----------1------------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
---------1--------------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------0--------------------------1------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------------------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----1--------------------------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
-----1---------------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
-----1----------------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
-----1-----------------------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~
-----1-------------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------0--------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
-----1---------1---------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
------------------------------------------11------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----1---------------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
-----1---------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------------10----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------0-------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
---------------------------------------1------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------1-----1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------1----1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
---------------------------------------------11---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~
-----1-----------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~1~~~~~~~~11~~~~~~~~~~~~~
----------------------------------------1------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------------1----0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------------1--0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------------10--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
-----1------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~1~~~~~~~~~~~~
-----1---------1--------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
----------------------------------------1-------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------------1-----1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~
---1-------------------------------------------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1
---------1-------------------------------------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
---------------------------------1-------------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~
----------------------------------1------------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~
--------------------------------------1-1------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~
----------------------------------------0------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------00-----10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~
--------------------------------------1-00-----10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------------------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~
-----1-------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~
-----------------------------------------1--------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~
--------------------------------------00011----1--1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------------0--1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~
--------------------------------------0110---0-0--1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------------------1-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~
--------------------------------------0-1------10-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------1-11-----10-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----1--------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------------1---0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------1-11-----10-0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------0-11-----10-0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------0--0-----10-0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------0-00-----10-0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------------------------------------------0-1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~
---------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~
-------------------------------------------------1-0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~
-------------------------------------------1--------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~
-----------------------------------------------0----1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~
------------------------------------------------1---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~
-------------------------------------------0---10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~
------0--------1----------------1----------0---10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
-0----0--------11---------------0----------0---10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
-----1----------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----1---------1------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
------------------------------------------1---------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------------1-----1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~
-----------------------------------------------0-----1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~
----------0-----------------------------------------00--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~
------1-----------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
---------------1---------------------------1----------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
-----------------------------------------------0------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
---------------1--------------------------------1-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
---------------1------------------------------------0-1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
------1------------------------------------------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
---------------1---------------------------1-----------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
-----------------------------------------------0-------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
---------------1--------------------------------1------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
---------------1------------------------------------0--1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
------------------------------------------------1-------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~
-------------------------------------------------0------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~
------------------------------------------------1--------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~
------------------------------------------------01-------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~
-------------------------------------------------0-------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~
-----1---------------------------------------------------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~
--------------------------------------------------------10----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~
-----------------------------------------------1----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~
------0--------0----------------1--------------1----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
-0----0--------01---------------0--------------1----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
-----------------------------------------------0----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~
-----1---------0------------------------------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
---------------0--------------------------------------1---0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
---------------0---------------------------------------1--0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
--------------------------------------------1-1------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~
-----------------------------------------------1-----------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~
--------------------------------------------0--0-----------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~
----------------------------------------------00-----------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~
-----1-----------------------------------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------------1--------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------------1------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------------1------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~
-----------------------------------------------0------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~
-----------------------------------------------1-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~
-----------------------------------------------0-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~
------------------------------------------0-------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~
------------------------------------------1----1--------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~
-----------------------------------------------0--------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~
----------1----------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~
-----------------------------------------------0----------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~
------------------------------------------------1---------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~
-----------------------------------------------0-----------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~
------------------------------------------------1----------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~
-----------------------------------------------0------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1
------------------------------------------------1-----------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1
-------------------------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~
-----1--------------------------------------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------------1-----------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------------------------------------- 0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------1------------------------------------------------------------- ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------0------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
---------0----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----00-1--1---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0-1-01---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
-----------0--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~
------------0-------------------------------------------------------- ~~~~~~~0~0~0~0~0~0~0~0~0~0~0~0~0~0~000000~0~0~0~0~0~0~0~0~000000~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------0------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~
--------------1------------------------------------------------------ ~~~~~~~~0~0~0~0~0~0~0~0~0~0~0~0~0~0~~~~~~0~0~0~0~0~0~0~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------0------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~
---------------1----------------------------------------------------- ~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----------------1--------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------------1------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
---------------------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------1---------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----------------------1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------0-------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------------------0------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------0------------------------------------------ ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
---------------------------0----------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0-1--1-----------------1---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0-1--1------------------1--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0-1--1-------------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0-1--1--------------------1------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
----10---11-----------------0010---1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0-1--1------------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------------------------------1------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0----0--------------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
---------------------------------------01---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------01--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------10--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------1-10--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------00--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0------------------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0----0--------------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0--------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~
-----0----------------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~0~~~~~~
---------------------------------------1-------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------------0----1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~0~~~~~~0~~~~~0~~~~~~~0~~~~~~~
------------------------------------0----------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------0------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------1-----0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------------0--0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~
---------------------------------------------1-0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------------00--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~
------------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------0-----------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------0-------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------------1----11-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
---0-------------------------------------------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0
---------------------------------0-------------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~
----------------------------------0------------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~
----------------------------------------1------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------0-10-----10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~
-------------------------------------------0---10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~
-----------------------------------------------001------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~
-------------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~
------------------------------------------1----1-0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
--------------------------------------0-----------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------0---------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------0-0---------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------1--1--------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------1-----------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------0--1--------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~0~~~~~~~~~~~~~~~~~~
----------------------------------------01--------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~
-----------------------------------------------0--0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~
------------------------------------------------1-0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~
---------------------------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~
-------------------------------------------------1-1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~
-------------------------------------------------0-0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~
-----1-00-0-----------------------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~
-------------------------------------------0---10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~
-1----0--------1---------------------------0---10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
------0--------10--------------------------0---10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
------0--------1----------------1----------0---10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
------0--------1----------------0----------0---10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
-----------------------------------------------1----0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~
-----1-00-0------------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~
------------------------------------------0----------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~
----------------------------------------------------00--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~
-----01-----------------------------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
-----0---------1---------------------------1----------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
-----0-----------------------------------------0------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
-----0---------1--------------------------------1-----0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
-----0---------1------------------------------------0-0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
-----01------------------------------------------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
-----0---------1---------------------------1-----------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
-----0-----------------------------------------0-------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
-----0---------1--------------------------------1------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
-----0---------1------------------------------------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
-----0--------------------------------------------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~
------------------------------------------------01-------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~
------------------------------------------1----1---------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
-----------------------------------------------0---------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~
-1----0--------0-------------------------------1----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
------0--------00------------------------------1----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
------0--------0----------------1--------------1----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
------0--------0----------------0--------------1----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
-----0---------0--------------------------------------0---0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
-----0---------0---------------------------------------0--0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
--------------------------------------1000---0-1--1--------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------------0-----------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~
----------------------------------------------------------00--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~
-------------------------------------------1----------------0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~
------------------------------------------------1-----------0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~
----------------------------------------------------0-------0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~
----------------------------------------------------------0-0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~
--------------------------------------------1-1--------------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~
------------------------------------------------01-----------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~
---------------------------------------------------------0---0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~
-----------------------------------------------------------0-0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~
------------------------------------------------1-------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
-------------------------------------------------0------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
-----------------------------------------------------0--------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~
---------------------------------------------------------0----0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
--------0-1----------------------------------------------------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~
-----------------------------------------------0----------------0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~
------------------------------------------------1---------------0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~
-----------------------------------------------0-----------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~
------------------------------------------------1----------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~
-----------------------------------------------0------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0
------------------------------------------------1-----------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0
------------------------------------------0------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~
---------------------------------------------1-1-----------1--------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~
+.i 72
+.o 118
+.ilb SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ A_0_ IPL_1_ IPL_0_ FC_0_ BGACK_030.Q FPU_CS.Q E.Q VMA.Q cpu_est_0_.Q cpu_est_1_.Q IPL_030_0_.Q AS_000.Q inst_AS_030_000_SYNC.Q IPL_030_1_.Q inst_DTACK_SYNC.Q inst_VPA_D.Q IPL_030_2_.Q inst_VPA_SYNC.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q inst_CLK_OUT_PRE.Q SM_AMIGA_6_.Q cpu_est_2_.Q CLK_REF_1_.Q SM_AMIGA_7_.Q UDS_000.Q LDS_000.Q DSACK_1_.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q CLK_CNT_0_.Q CLK_CNT_1_.Q SM_AMIGA_3_.Q SM_AMIGA_5_.Q SM_AMIGA_2_.Q SM_AMIGA_0_.Q AMIGA_BUS_ENABLE.Q BG_000.Q DSACK_1_.PIN DTACK.PIN
+.ob BERR AVEC AVEC_EXP AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.C SM_AMIGA_0_.AR cpu_est_2_.C E.C IPL_030_0_.C IPL_030_0_.AP IPL_030_1_.C IPL_030_1_.AP IPL_030_2_.C IPL_030_2_.AP SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.C SM_AMIGA_6_.AR inst_CLK_OUT_PRE.C BGACK_030.C BGACK_030.AP CLK_CNT_0_.C CLK_CNT_1_.C cpu_est_0_.C cpu_est_1_.C inst_VPA_SYNC.C inst_VPA_SYNC.AP FPU_CS.C FPU_CS.AP inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP AS_000.C AS_000.AP AMIGA_BUS_ENABLE.C BG_000.C BG_000.AP DSACK_1_.C DSACK_1_.AP VMA.C VMA.AP UDS_000.C UDS_000.AP LDS_000.C LDS_000.AP inst_DTACK_SYNC.C inst_DTACK_SYNC.AP DTACK.C DTACK.AP CLK_EXP.C inst_CLK_000_D2.C inst_VPA_D.C inst_CLK_000_D0.C RESET.C inst_CLK_000_D1.C CLK_REF_1_.LH CLK_REF_1_.AR DSACK_0_ DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE LDS_000.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_DIV_OUT.C CLK_DIV_OUT.D BGACK_030.D FPU_CS.D E.T CLK_EXP.D VMA.T cpu_est_0_.D cpu_est_1_.T IPL_030_0_.D AS_000.D inst_AS_030_000_SYNC.D IPL_030_1_.D inst_DTACK_SYNC.D inst_VPA_D.D IPL_030_2_.D inst_VPA_SYNC.D inst_CLK_000_D0.D inst_CLK_000_D1.D inst_CLK_000_D2.D inst_CLK_OUT_PRE.D SM_AMIGA_6_.D cpu_est_2_.D CLK_REF_1_.D SM_AMIGA_7_.D UDS_000.D LDS_000.D DSACK_1_.D SM_AMIGA_4_.D SM_AMIGA_1_.D DTACK.D CLK_CNT_0_.D CLK_CNT_1_.D RESET.D SM_AMIGA_3_.D SM_AMIGA_5_.D SM_AMIGA_2_.D SM_AMIGA_0_.D AMIGA_BUS_ENABLE.D BG_000.D
+.p 305
+------------------------------------------------------------------------ ~1~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----11------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
+------1----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------1---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1
+---0-----1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+------0--1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+--------01-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----0----0-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1
+------1--0-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1
+----------1------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~
+----1-----0------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~1~~~~~~~~~~~~~~~~~~~~~~~
+-----------1------------------------------------------------------------ ~~~~~~1~1~1~1~1~1~111~1~1~1~1~11~11111~1~1~1~11~1~1~1~1~1~1~111111~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------1---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~
+-------------0---------------------------------------------------------- ~~~~~~~1~1~1~1~1~1~~~1~1~1~1~1~~1~~~~~1~1~1~1~~1~1~1~1~1~1~1~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+--------------0--------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-0--------------0000000------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-----------------------1111--------------------------------------------- ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------1-----------------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------1------------------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------1-------------------0------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------1--------------------1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---1----11-----------------0010---1------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------1------------------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-----------------------------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+--------1--------------------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-----------------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------0--------------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+------------------------------------0----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----1--------------------------------0---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+----1---------------------------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+----1----------------------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+----1-----------------------------------1------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+------------------------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~
+----1--------------------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------0---------------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----1---------1----------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
+------------------------------------------11---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----------0----------------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
+----1-----------------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+----1-----------------------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------------------10------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
+----------0-------------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
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+----1--------------------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~1~~~~~~~~~~~~~~~~~~~~~~~
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+----1---------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+------------------------------------------1-------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+--1----------------------------------------------10--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~
+--------1----------------------------------------10--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+-------------------------------------------0------10-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~
+-----0--------1----------------1-----------0------10-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
+0----0--------11---------------0-----------0------10-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
+----1------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----1--------1---------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~
+----1---------1--------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
+------------------------------------------1----------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----------------------------------------1-------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~
+-------------------------------------0001-1------1----1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------------------0----1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~
+-------------------------------------0110-----0--0----1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+--------------------------------------------------1---1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~
+-------------------------------------0-1---------10---1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------1-11--------10---1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----1-------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
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+-------------------------------------1-11--------10---0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------0-11--------10---0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------0--0--------10---0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+0----0--------01---------------0----------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
+-------------------------------------------------1----------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~
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+----1---------0---------------------------------------------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
+--------------0------------------------------------------1--0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
+--------------0-------------------------------------------1-0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
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+-------------------------------------------------0--1--------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~
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+----------------------------------------------------1---------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~
+----------------------------------------------------1--0-------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~
+----------------------------------------------------0--1------01-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~
+-------------------------------------------------------0------01-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~
+----------------------------------------------------1--1-------0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~
+--------------------------------------------------------------10-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~
+-------------------------------------------------------1------00-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~
+----------------------------------------------------0--0------00-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~
+---------------------------------------------1--1---------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~
+-------------------------------------------------1--------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~
+---------------------------------------------0---0--------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~
+------------------------------------------------00--------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~
+----1-----------------------------------------------------------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~1~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------------------1------------------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
+------------------------------------------------1---------------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------------------1---------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~
+-------------------------------------------------0---------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~
+-------------------------------------------------1----------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~
+-------------------------------------------------0----------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~
+----------------------------------------------------0--------1----0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~
+------------------------------------------0------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~
+------------------------------------------1------1-----------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~
+-------------------------------------------------0-----------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~
+-------------0------------------------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~
+-----------------------------------------------------0--------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~
+---------1-----------------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1
+----------------------------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~
+----1------------------------------------------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------------------1-------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
+------------------------------------------------------------------------ 0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~
+-1---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+-----------0------------------------------------------------------------ ~~~~~~0~0~0~0~0~0~000~0~0~0~0~00~00000~0~0~0~00~0~0~0~0~0~0~000000~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+------------0----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------1---------------------------------------------------------- ~~~~~~~0~0~0~0~0~0~~~0~0~0~0~0~~0~~~~~0~0~0~0~~0~0~0~0~0~0~0~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+---10---11-----------------0010---1------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+-----------------------------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-----------------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+------------------------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----0----0--------------------------0----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+---------------------------------------10------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------1-10------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------------00------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+----0----0---------------------------------0---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+-------------------------------------------0------10----0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~
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+----0---------1--------------------------------------0----0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
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+1----0--------0---------------------------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
+-----0--------00--------------------------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
+-----0--------0----------------1----------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
+-----0--------0----------------0----------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
+----0---------0------------------------------------------0--0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
+----0---------0-------------------------------------------0-0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
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+----------------------------------------------------0---------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~
+-------------------------------------------------------1-------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~
+----------------------------------------------------0--0-------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~
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+----------------------------------------------------1--1------01-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~
+----------------------------------------------------0--1-------0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~
+-------------------------------------------------------0-------0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~
+--------------------------------------------------------------00-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~
+----------------------------------------------------1--0------00-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~
+----------1--------------------------1000-----0--1----1---------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------------------0--------------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
+------------------------------------------------------------0---0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
+-------------------------------------------1---------------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~
+--------------------------------------------------0--------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~
+---------------------------------------------------1-------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~
+-----------------------------------------------------0-----------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~
+------------------------------------------------------------0----0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~
+-------------------------------------------------0----------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~
+---------------------------------------------1--1-----------------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~
+-------------------------------------------------------------0----0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~
+----------------------------------------------------------------0-0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~
+-------------------------------------------------1-----------------0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~
+----------------------------------------------------0--------------0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~
+--------------------------------------------------------0----------0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~
+-------------------------------------------------------------0-----0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~
+-------------0------------------------------------------------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~
+----0------------------------------------------------0--------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~
+-------0-1-----------------------------------------------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0
+------------------------------------------0---------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~
+----------1-----------------------------------1--1--------------1------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
.end
diff --git a/Logic/68030_tk.tt3 b/Logic/68030_tk.tt3
index a9b3f77..53afa0c 100644
--- a/Logic/68030_tk.tt3
+++ b/Logic/68030_tk.tt3
@@ -1,289 +1,317 @@
#$ TOOL ispLEVER Classic 1.7.00.05.28.13
-#$ DATE Fri May 16 17:07:08 2014
+#$ DATE Sun May 18 21:01:47 2014
#$ MODULE 68030_tk
-#$ PINS 59 A_17_ A_16_ SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 A_0_ nEXP_SPACE BERR BG_030 IPL_1_ IPL_0_ DSACK_0_ BGACK_000 FC_0_ CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT AVEC AVEC_EXP VPA RST RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ IPL_030_2_ DSACK_1_ AS_000 UDS_000 LDS_000 IPL_030_1_ IPL_030_0_ BG_000 BGACK_030 CLK_EXP FPU_CS DTACK E VMA RESET
-#$ NODES 19 cpu_est_0_ cpu_est_1_ inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_D inst_VPA_SYNC inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_OUT_PRE cpu_est_2_ CLK_CNT_0_ SM_AMIGA_6_ SM_AMIGA_7_ SM_AMIGA_1_ SM_AMIGA_4_ SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_
+#$ PINS 59 SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 SIZE_0_ A_30_ nEXP_SPACE A_29_ BERR A_28_ BG_030 A_27_ A_26_ A_25_ BGACK_000 A_24_ CLK_030 A_23_ CLK_000 A_22_ CLK_OSZI A_21_ CLK_DIV_OUT A_20_ A_19_ A_18_ A_17_ AVEC A_16_ AVEC_EXP VPA RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN A_0_ IPL_1_ IPL_0_ DSACK_0_ FC_0_ IPL_030_2_ DSACK_1_ AS_000 UDS_000 LDS_000 BG_000 BGACK_030 CLK_EXP FPU_CS DTACK E VMA RESET AMIGA_BUS_ENABLE IPL_030_1_ IPL_030_0_
+#$ NODES 22 cpu_est_0_ cpu_est_1_ inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_D inst_VPA_SYNC inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_OUT_PRE SM_AMIGA_6_ cpu_est_2_ CLK_REF_1_ SM_AMIGA_7_ SM_AMIGA_4_ SM_AMIGA_1_ CLK_CNT_0_ CLK_CNT_1_ SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_
.type fr
-.i 68
-.o 110
-.ilb SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ A_0_ IPL_1_ IPL_0_ FC_0_ BGACK_030.Q FPU_CS.Q E.Q VMA.Q cpu_est_0_.Q cpu_est_1_.Q AS_000.Q inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_D.Q inst_VPA_SYNC.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_OUT_PRE.Q cpu_est_2_.Q CLK_CNT_0_.Q SM_AMIGA_6_.Q SM_AMIGA_7_.Q UDS_000.Q LDS_000.Q DSACK_1_.Q SM_AMIGA_1_.Q SM_AMIGA_4_.Q SM_AMIGA_3_.Q SM_AMIGA_5_.Q SM_AMIGA_2_.Q SM_AMIGA_0_.Q BG_000.Q IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q DSACK_1_.PIN DTACK.PIN
-.ob BERR AVEC AVEC_EXP AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.C SM_AMIGA_0_.AR IPL_030_0_.C IPL_030_0_.AP IPL_030_1_.C IPL_030_1_.AP IPL_030_2_.C IPL_030_2_.AP SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.C SM_AMIGA_4_.AR DSACK_1_.C DSACK_1_.AP VMA.C VMA.AP BGACK_030.C BGACK_030.AP inst_CLK_OUT_PRE.C cpu_est_0_.C cpu_est_1_.C cpu_est_2_.C E.C LDS_000.C LDS_000.AP inst_DTACK_SYNC.C inst_DTACK_SYNC.AP FPU_CS.C FPU_CS.AP inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP AS_000.C AS_000.AP inst_VPA_SYNC.C inst_VPA_SYNC.AP BG_000.C BG_000.AP DTACK.C DTACK.AP UDS_000.C UDS_000.AP CLK_CNT_0_.C inst_VPA_D.C inst_CLK_000_D0.C RESET.C inst_CLK_000_D1.C CLK_EXP.C DSACK_0_ DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE LDS_000.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_DIV_OUT.C CLK_DIV_OUT.D BGACK_030.D FPU_CS.D E.T VMA.T cpu_est_0_.D cpu_est_1_.T AS_000.D inst_AS_030_000_SYNC.D inst_DTACK_SYNC.D inst_VPA_D.D inst_VPA_SYNC.D inst_CLK_000_D0.D inst_CLK_000_D1.D inst_CLK_OUT_PRE.D RESET.D cpu_est_2_.D CLK_CNT_0_.D SM_AMIGA_6_.D SM_AMIGA_7_.D UDS_000.D LDS_000.D DSACK_1_.D SM_AMIGA_1_.D DTACK.D SM_AMIGA_4_.D SM_AMIGA_3_.D SM_AMIGA_5_.D SM_AMIGA_2_.D SM_AMIGA_0_.D BG_000.D CLK_EXP.D IPL_030_0_.D IPL_030_1_.D IPL_030_2_.D
-.p 277
--------------------------------------------------------------------- ~1~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
-----11-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
-------1------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------0------------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------1------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~
----0-----1---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------0--1---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
---------01---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0----0---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~
-------1--0---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~
-----------1--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~
------------1-------------------------------------------------------- ~~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~111111~1~1~1~1~1~1~1~1~111111~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~
--------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~
--------------0------------------------------------------------------ ~~~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~~~~~~1~1~1~1~1~1~1~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
---------------0----------------------------------------------------- ~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--0--------------0000000--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------1111----------------------------------------- ~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------1-----------------1---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------1------------------1--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------1-------------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------1--------------------1------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----1----11-----------------0010---1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
----------1------------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
---------1--------------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------0--------------------------1------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------------------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----1--------------------------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
-----1---------------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
-----1----------------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
-----1-----------------------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~
-----1-------------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------0--------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
-----1---------1---------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
------------------------------------------11------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----1---------------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
-----1---------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------------10----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------0-------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
---------------------------------------1------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------1-----1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------1----1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
---------------------------------------------11---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~
-----1-----------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~1~~~~~~~~11~~~~~~~~~~~~~
----------------------------------------1------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------------1----0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------------1--0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------------10--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
-----1------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~1~~~~~~~~~~~~
-----1---------1--------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
----------------------------------------1-------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------------1-----1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~
---1-------------------------------------------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1
---------1-------------------------------------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
---------------------------------1-------------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~
----------------------------------1------------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~
--------------------------------------1-1------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~
----------------------------------------0------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------00-----10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~
--------------------------------------1-00-----10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------------------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~
-----1-------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~
-----------------------------------------1--------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~
--------------------------------------00011----1--1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------------0--1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~
--------------------------------------0110---0-0--1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------------------1-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~
--------------------------------------0-1------10-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------1-11-----10-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----1--------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------------1---0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------1-11-----10-0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------0-11-----10-0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------0--0-----10-0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------0-00-----10-0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------------------------------------------0-1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~
---------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~
-------------------------------------------------1-0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~
-------------------------------------------1--------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~
-----------------------------------------------0----1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~
------------------------------------------------1---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~
-------------------------------------------0---10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~
------0--------1----------------1----------0---10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
-0----0--------11---------------0----------0---10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
-----1----------------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----1---------1------------------------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
------------------------------------------1---------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------------1-----1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~
-----------------------------------------------0-----1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~
----------0-----------------------------------------00--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~
------1-----------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
---------------1---------------------------1----------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
-----------------------------------------------0------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
---------------1--------------------------------1-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
---------------1------------------------------------0-1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
------1------------------------------------------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
---------------1---------------------------1-----------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
-----------------------------------------------0-------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
---------------1--------------------------------1------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
---------------1------------------------------------0--1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
------------------------------------------------1-------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~
-------------------------------------------------0------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~
------------------------------------------------1--------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~
------------------------------------------------01-------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~
-------------------------------------------------0-------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~
-----1---------------------------------------------------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~
--------------------------------------------------------10----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~
-----------------------------------------------1----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~
------0--------0----------------1--------------1----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
-0----0--------01---------------0--------------1----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
-----------------------------------------------0----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~
-----1---------0------------------------------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
---------------0--------------------------------------1---0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
---------------0---------------------------------------1--0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
--------------------------------------------1-1------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~
-----------------------------------------------1-----------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~
--------------------------------------------0--0-----------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~
----------------------------------------------00-----------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~
-----1-----------------------------------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------------1--------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------------1------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------------1------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~
-----------------------------------------------0------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~
-----------------------------------------------1-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~
-----------------------------------------------0-------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~
------------------------------------------0-------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~
------------------------------------------1----1--------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~
-----------------------------------------------0--------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~
----------1----------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~
-----------------------------------------------0----------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~
------------------------------------------------1---------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~
-----------------------------------------------0-----------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~
------------------------------------------------1----------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~
-----------------------------------------------0------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1
------------------------------------------------1-----------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1
-------------------------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~
-----1--------------------------------------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------------1-----------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------------------------------------- 0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------1------------------------------------------------------------- ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------0------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
---------0----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----00-1--1---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0-1-01---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
-----------0--------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~
------------0-------------------------------------------------------- ~~~~~~~0~0~0~0~0~0~0~0~0~0~0~0~0~0~000000~0~0~0~0~0~0~0~0~000000~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------0------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~
--------------1------------------------------------------------------ ~~~~~~~~0~0~0~0~0~0~0~0~0~0~0~0~0~0~~~~~~0~0~0~0~0~0~0~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------0------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~
---------------1----------------------------------------------------- ~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----------------1--------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------------1------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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------------------------0-------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------------------0------------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------0------------------------------------------ ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
---------------------------0----------------------------------------- ~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0-1--1-----------------1---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0-1--1------------------1--------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0-1--1-------------------0-------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0-1--1--------------------1------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
----10---11-----------------0010---1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0-1--1------------------------0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-------------------------------------1------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0----0--------------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
---------------------------------------01---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------01--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------10--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------1-10--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------00--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0------------------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0----0--------------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
-----0--------------------------------------0------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~
-----0----------------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~0~~~~~~
---------------------------------------1-------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------------0----1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~0~~~~~~0~~~~~0~~~~~~~0~~~~~~~
------------------------------------0----------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------0------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------1-----0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------------0--0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~
---------------------------------------------1-0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------------00--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~
------------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------0-----------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------0-------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
------------------------------------------1----11-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
---0-------------------------------------------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0
---------------------------------0-------------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~
----------------------------------0------------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~
----------------------------------------1------10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------0-10-----10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~
-------------------------------------------0---10-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~
-----------------------------------------------001------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~
-------------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~
------------------------------------------1----1-0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
--------------------------------------0-----------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
----------------------------------------0---------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
--------------------------------------0-0---------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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--------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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--------------------------------------0--1--------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~0~~~~~~~~~~~~~~~~~~
----------------------------------------01--------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~
-----------------------------------------------0--0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~
------------------------------------------------1-0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~
---------------------------------------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~
-------------------------------------------------1-1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~
-------------------------------------------------0-0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~
-----1-00-0-----------------------------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~
-------------------------------------------0---10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~
-1----0--------1---------------------------0---10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
------0--------10--------------------------0---10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
------0--------1----------------1----------0---10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
------0--------1----------------0----------0---10---1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
-----------------------------------------------1----0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~
-----1-00-0------------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~
------------------------------------------0----------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~
----------------------------------------------------00--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~
-----01-----------------------------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
-----0---------1---------------------------1----------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
-----0-----------------------------------------0------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
-----0---------1--------------------------------1-----0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
-----0---------1------------------------------------0-0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
-----01------------------------------------------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
-----0---------1---------------------------1-----------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
-----0-----------------------------------------0-------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
-----0---------1--------------------------------1------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
-----0---------1------------------------------------0--0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
-----0--------------------------------------------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~
------------------------------------------------01-------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~
------------------------------------------1----1---------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
-----------------------------------------------0---------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~
-1----0--------0-------------------------------1----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
------0--------00------------------------------1----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
------0--------0----------------1--------------1----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
------0--------0----------------0--------------1----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
-----0---------0--------------------------------------0---0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
-----0---------0---------------------------------------0--0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
--------------------------------------1000---0-1--1--------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~
-----------------------------------------------0-----------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~
----------------------------------------------------------00--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~
-------------------------------------------1----------------0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~
------------------------------------------------1-----------0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~
----------------------------------------------------0-------0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~
----------------------------------------------------------0-0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~
--------------------------------------------1-1--------------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~
------------------------------------------------01-----------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~
---------------------------------------------------------0---0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~
-----------------------------------------------------------0-0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~
------------------------------------------------1-------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
-------------------------------------------------0------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
-----------------------------------------------------0--------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~
---------------------------------------------------------0----0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
--------0-1----------------------------------------------------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~
-----------------------------------------------0----------------0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~
------------------------------------------------1---------------0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~
-----------------------------------------------0-----------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~
------------------------------------------------1----------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~
-----------------------------------------------0------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0
------------------------------------------------1-----------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0
------------------------------------------0------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~
---------------------------------------------1-1-----------1--------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~
+.i 72
+.o 118
+.ilb SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ A_0_ IPL_1_ IPL_0_ FC_0_ BGACK_030.Q FPU_CS.Q E.Q VMA.Q cpu_est_0_.Q cpu_est_1_.Q IPL_030_0_.Q AS_000.Q inst_AS_030_000_SYNC.Q IPL_030_1_.Q inst_DTACK_SYNC.Q inst_VPA_D.Q IPL_030_2_.Q inst_VPA_SYNC.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q inst_CLK_OUT_PRE.Q SM_AMIGA_6_.Q cpu_est_2_.Q CLK_REF_1_.Q SM_AMIGA_7_.Q UDS_000.Q LDS_000.Q DSACK_1_.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q CLK_CNT_0_.Q CLK_CNT_1_.Q SM_AMIGA_3_.Q SM_AMIGA_5_.Q SM_AMIGA_2_.Q SM_AMIGA_0_.Q AMIGA_BUS_ENABLE.Q BG_000.Q DSACK_1_.PIN DTACK.PIN
+.ob BERR AVEC AVEC_EXP AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.C SM_AMIGA_0_.AR cpu_est_2_.C E.C IPL_030_0_.C IPL_030_0_.AP IPL_030_1_.C IPL_030_1_.AP IPL_030_2_.C IPL_030_2_.AP SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.C SM_AMIGA_6_.AR inst_CLK_OUT_PRE.C BGACK_030.C BGACK_030.AP CLK_CNT_0_.C CLK_CNT_1_.C cpu_est_0_.C cpu_est_1_.C inst_VPA_SYNC.C inst_VPA_SYNC.AP FPU_CS.C FPU_CS.AP inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP AS_000.C AS_000.AP AMIGA_BUS_ENABLE.C BG_000.C BG_000.AP DSACK_1_.C DSACK_1_.AP VMA.C VMA.AP UDS_000.C UDS_000.AP LDS_000.C LDS_000.AP inst_DTACK_SYNC.C inst_DTACK_SYNC.AP DTACK.C DTACK.AP CLK_EXP.C inst_CLK_000_D2.C inst_VPA_D.C inst_CLK_000_D0.C RESET.C inst_CLK_000_D1.C CLK_REF_1_.LH CLK_REF_1_.AR DSACK_0_ DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE LDS_000.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_DIV_OUT.C CLK_DIV_OUT.D BGACK_030.D FPU_CS.D E.T CLK_EXP.D VMA.T cpu_est_0_.D cpu_est_1_.T IPL_030_0_.D AS_000.D inst_AS_030_000_SYNC.D IPL_030_1_.D inst_DTACK_SYNC.D inst_VPA_D.D IPL_030_2_.D inst_VPA_SYNC.D inst_CLK_000_D0.D inst_CLK_000_D1.D inst_CLK_000_D2.D inst_CLK_OUT_PRE.D SM_AMIGA_6_.D cpu_est_2_.D CLK_REF_1_.D SM_AMIGA_7_.D UDS_000.D LDS_000.D DSACK_1_.D SM_AMIGA_4_.D SM_AMIGA_1_.D DTACK.D CLK_CNT_0_.D CLK_CNT_1_.D RESET.D SM_AMIGA_3_.D SM_AMIGA_5_.D SM_AMIGA_2_.D SM_AMIGA_0_.D AMIGA_BUS_ENABLE.D BG_000.D
+.p 305
+------------------------------------------------------------------------ ~1~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----1------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----11------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
+------1----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------1---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1
+---0-----1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+------0--1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+--------01-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----0----0-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1
+------1--0-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1
+----------1------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~
+----1-----0------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~1~~~~~~~~~~~~~~~~~~~~~~~
+-----------1------------------------------------------------------------ ~~~~~~1~1~1~1~1~1~111~1~1~1~1~11~11111~1~1~1~11~1~1~1~1~1~1~111111~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+------------1----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------1---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~
+-------------0---------------------------------------------------------- ~~~~~~~1~1~1~1~1~1~~~1~1~1~1~1~~1~~~~~1~1~1~1~~1~1~1~1~1~1~1~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+--------------0--------------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-0--------------0000000------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-----------------------1111--------------------------------------------- ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------1-----------------1-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------1------------------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------1-------------------0------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------1--------------------1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---1----11-----------------0010---1------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------1------------------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-----------------------------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+--------1--------------------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-----------------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------0--------------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+------------------------------------0----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----1--------------------------------0---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+----1---------------------------------1--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+----1----------------------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+----1-----------------------------------1------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+------------------------------------------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~
+----1--------------------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------0---------------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----1---------1----------------------------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
+------------------------------------------11---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----------0----------------------------------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
+----1-----------------------------------------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+----1-----------------------------------------0------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------------------10------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
+----------0-------------------------------------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------0----------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+--------------------------------------1---------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------------1--------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+----------------------------------------1-------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+----------------------------------------------1-1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~
+----1--------------------------------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~
+----1--------------------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~1~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------------1---------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-----------------------------------------1-------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+--------------------------------------------1----0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------------------1---0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
+-----------------------------------------------1-0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~
+------------------------------------------------10---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+--------------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~
+---------------------------------------1----------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-----------------------------------------1--------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+--------------------------------------------1-----1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-----------------------------------------------1--1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~
+----1---------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----1---------1-----------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
+------------------------------------------1-------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+--1----------------------------------------------10--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~
+--------1----------------------------------------10--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+--------------------------------1----------------10--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------1---------------10--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------1-1---------10--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~
+---------------------------------------0---------10--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------------00--------10--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~
+-------------------------------------1-00--------10--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----1----------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----1---------1------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
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+----------------------------------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----1-----------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~
+------0------1---------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~
+-------------------------------------------1---------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~
+--------------------------------------------------0--1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~
+---------------------------------------------------1-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~
+-------------------------------------------0------10-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~
+-----0--------1----------------1-----------0------10-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
+0----0--------11---------------0-----------0------10-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
+----1------------------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----1--------1---------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~
+----1---------1--------------------------------------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
+------------------------------------------1----------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----------------------------------------1-------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~
+-------------------------------------0001-1------1----1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------------------0----1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~
+-------------------------------------0110-----0--0----1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+--------------------------------------------------1---1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~
+-------------------------------------0-1---------10---1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------1-11--------10---1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----1-------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+------------------------------------------------1-----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------1-11--------10---0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------0-11--------10---0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------0--0--------10---0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------0-00--------10---0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------------------1------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~
+-------------------------------------------------0------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~
+---------0-------------------------------------------0--0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1
+-----1---------------------------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
+--------------1----------------------------1-------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
+--------------1-----------------------------------0------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
+--------------1------------------------------------1-----1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
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+-----1----------------------------------------------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
+--------------1----------------------------1--------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
+--------------1-----------------------------------0-------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
+--------------1------------------------------------1------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
+--------------1--------------------------------------0----1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
+-------------------------------------------------1---------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~
+----------------------------------------------------0------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~
+-----0--------0----------------1----------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
+0----0--------01---------------0----------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
+-------------------------------------------------1----------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~
+-------------------------------------------------0----------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~
+----1---------0---------------------------------------------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~
+--------------0------------------------------------------1--0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~
+--------------0-------------------------------------------1-0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~
+-------------------------------------------------1-----------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~
+-------------------------------------------------0--1--------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~
+----1--------------------------------------------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~
+-----------------------------------------------------------1-0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~
+----------------------------------------------------1---------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~
+----------------------------------------------------1--0-------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~
+----------------------------------------------------0--1------01-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~
+-------------------------------------------------------0------01-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~
+----------------------------------------------------1--1-------0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~
+--------------------------------------------------------------10-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~
+-------------------------------------------------------1------00-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~
+----------------------------------------------------0--0------00-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~
+---------------------------------------------1--1---------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~
+-------------------------------------------------1--------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~
+---------------------------------------------0---0--------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~
+------------------------------------------------00--------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~
+----1-----------------------------------------------------------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~1~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------------------1------------------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
+------------------------------------------------1---------------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------------------1---------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~
+-------------------------------------------------0---------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~
+-------------------------------------------------1----------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~
+-------------------------------------------------0----------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~
+----------------------------------------------------0--------1----0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~
+------------------------------------------0------------------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~
+------------------------------------------1------1-----------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~
+-------------------------------------------------0-----------------1---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~
+-------------0------------------------------------------------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~
+-----------------------------------------------------0--------------1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~
+---------1-----------------------------------------------------------1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1
+----------------------------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~
+----1------------------------------------------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------------------1-------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~
+------------------------------------------------------------------------ 0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~
+-1---------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+------0----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+--------0--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---00-1--1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----0-1-01-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----------0------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~
+-----------0------------------------------------------------------------ ~~~~~~0~0~0~0~0~0~000~0~0~0~0~00~00000~0~0~0~00~0~0~0~0~0~0~000000~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+------------0----------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------1---------------------------------------------------------- ~~~~~~~0~0~0~0~0~0~~~0~0~0~0~0~~0~~~~~0~0~0~0~~0~0~0~0~0~0~0~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------0---------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~
+--------------1--------------------------------------------------------- ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----------------1------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-----------------1------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+----0-1--1--------------------1----------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---10---11-----------------0010---1------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----0-1--1------------------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-----------------------------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-----------------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~000~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+------------------------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----0----0--------------------------0----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------1---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+--------------------------------------01-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------------01------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------------10------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------1-10------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------------00------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----0-------------------------------------0----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----0----0---------------------------------0---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+----0----------------------------------------0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
+----0-------------------------------------------0----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~
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+--------------------------------------1----------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+------------------------------------------0------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~0~~~~~~~~~0~~~~~0~~~~~~~~~~~~~~~
+-----------------------------------0-------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------------0---------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+--------------------------------------------0----0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+----------------------------------------------1--0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-----------------------------------------------0-0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~
+------------------------------------------------00---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
+--------------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-----------------------------------0--------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+---------------------------------------0----------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+--------------------------------------------0-----1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+--0----------------------------------------------10--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~
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+---------------------------------------1---------10--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+-------------------------------------------------0-1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~
+-------------------------------------------0-----110-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~
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+----1-00-0-------------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0
+------1------1---------------------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~
+-------------------------------------------0------10-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+1----0--------1----------------------------0------10-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
+-----0--------10---------------------------0------10-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
+-----0--------1----------------1-----------0------10-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
+-----0--------1----------------0-----------0------10-1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
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+-------------------------------------0-0--------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------1--1-------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+------------------------------------------------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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+-------------------------------------0--1-------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~
+---------------------------------------01-------------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~
+-------------------------------------------------0----0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~
+--------------------------------------------------1---0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~
+----1-00-0----------------------------------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0
+------------------------------------------0-------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~
+-------------------------------------------0------10----0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~
+-----------------------------------------------------0--0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~
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+----0---------1----------------------------1-------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
+----0---------1-----------------------------------0------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
+----0---------1------------------------------------1-----0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
+----0---------1--------------------------------------0---0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
+----01----------------------------------------------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
+----0---------1----------------------------1--------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
+----0---------1-----------------------------------0-------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
+----0---------1------------------------------------1------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
+----0---------1--------------------------------------0----0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
+----0------------------------------------------------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~
+1----0--------0---------------------------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
+-----0--------00--------------------------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
+-----0--------0----------------1----------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
+-----0--------0----------------0----------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
+----0---------0------------------------------------------0--0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~
+----0---------0-------------------------------------------0-0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~
+-------------------------------------------------0--1--------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~
+--------------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~
+----------------------------------------------------0---------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~
+-------------------------------------------------------1-------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~00~~~~~~~
+----------------------------------------------------0--0-------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~
+--------------------------------------------------------------11-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~
+----------------------------------------------------1--1------01-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~
+----------------------------------------------------0--1-------0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~
+-------------------------------------------------------0-------0-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~
+--------------------------------------------------------------00-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~
+----------------------------------------------------1--0------00-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~
+----------1--------------------------1000-----0--1----1---------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~
+-------------------------------------------------0--------------0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
+------------------------------------------------------------0---0------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~
+-------------------------------------------1---------------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~
+--------------------------------------------------0--------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~
+---------------------------------------------------1-------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~
+-----------------------------------------------------0-----------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~
+------------------------------------------------------------0----0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~
+-------------------------------------------------0----------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~
+---------------------------------------------1--1-----------------0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~
+-------------------------------------------------------------0----0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~
+----------------------------------------------------------------0-0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~
+-------------------------------------------------1-----------------0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~
+----------------------------------------------------0--------------0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~
+--------------------------------------------------------0----------0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~
+-------------------------------------------------------------0-----0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~
+-------------0------------------------------------------------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~
+----0------------------------------------------------0--------------0--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~
+-------0-1-----------------------------------------------------------0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0
+------------------------------------------0---------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~
+----------1-----------------------------------1--1--------------1------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~
.end
diff --git a/Logic/68030_tk.tt4 b/Logic/68030_tk.tt4
index da90562..08dad3a 100644
--- a/Logic/68030_tk.tt4
+++ b/Logic/68030_tk.tt4
@@ -1,151 +1,163 @@
#$ TOOL ispLEVER Classic 1.7.00.05.28.13
-#$ DATE Fri May 16 17:07:08 2014
+#$ DATE Sun May 18 21:01:47 2014
#$ MODULE BUS68030
-#$ PINS 59 A_17_ A_16_ SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 A_0_ nEXP_SPACE
- BERR BG_030 IPL_1_ IPL_0_ DSACK_0_ BGACK_000 FC_0_ CLK_030 CLK_000 CLK_OSZI
- CLK_DIV_OUT AVEC AVEC_EXP VPA RST RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR
- AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_
- A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ IPL_030_2_ DSACK_1_ AS_000 UDS_000 LDS_000
- IPL_030_1_ IPL_030_0_ BG_000 BGACK_030 CLK_EXP FPU_CS DTACK E VMA RESET
-#$ NODES 19 cpu_est_0_ cpu_est_1_ inst_AS_030_000_SYNC inst_DTACK_SYNC
- inst_VPA_D inst_VPA_SYNC inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_OUT_PRE
- cpu_est_2_ CLK_CNT_0_ SM_AMIGA_6_ SM_AMIGA_7_ SM_AMIGA_1_ SM_AMIGA_4_
- SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_
+#$ PINS 59 SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 SIZE_0_ A_30_ nEXP_SPACE
+ A_29_ BERR A_28_ BG_030 A_27_ A_26_ A_25_ BGACK_000 A_24_ CLK_030 A_23_ CLK_000
+ A_22_ CLK_OSZI A_21_ CLK_DIV_OUT A_20_ A_19_ A_18_ A_17_ AVEC A_16_ AVEC_EXP VPA
+ RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN A_0_ IPL_1_ IPL_0_ DSACK_0_
+ FC_0_ IPL_030_2_ DSACK_1_ AS_000 UDS_000 LDS_000 BG_000 BGACK_030 CLK_EXP FPU_CS
+ DTACK E VMA RESET AMIGA_BUS_ENABLE IPL_030_1_ IPL_030_0_
+#$ NODES 22 cpu_est_0_ cpu_est_1_ inst_AS_030_000_SYNC inst_DTACK_SYNC
+ inst_VPA_D inst_VPA_SYNC inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2
+ inst_CLK_OUT_PRE SM_AMIGA_6_ cpu_est_2_ CLK_REF_1_ SM_AMIGA_7_ SM_AMIGA_4_
+ SM_AMIGA_1_ CLK_CNT_0_ CLK_CNT_1_ SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_
+ SM_AMIGA_0_
.type f
-.i 68
-.o 111
+.i 72
+.o 120
.ilb SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 nEXP_SPACE BG_030 BGACK_000
CLK_030 CLK_000 CLK_OSZI VPA RST RW SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_
A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ A_0_ IPL_1_ IPL_0_ FC_0_
- BGACK_030.Q FPU_CS.Q E.Q VMA.Q cpu_est_0_.Q cpu_est_1_.Q AS_000.Q
- inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_D.Q inst_VPA_SYNC.Q
- inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_OUT_PRE.Q cpu_est_2_.Q CLK_CNT_0_.Q
- SM_AMIGA_6_.Q SM_AMIGA_7_.Q UDS_000.Q LDS_000.Q DSACK_1_.Q SM_AMIGA_1_.Q
- SM_AMIGA_4_.Q SM_AMIGA_3_.Q SM_AMIGA_5_.Q SM_AMIGA_2_.Q SM_AMIGA_0_.Q BG_000.Q
- IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q DSACK_1_.PIN DTACK.PIN
-.ob BERR BERR.OE DSACK_0_ DSACK_0_.OE CLK_DIV_OUT.D CLK_DIV_OUT.C AVEC AVEC_EXP
- AVEC_EXP.OE AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN
- CIIN.OE IPL_030_2_.D IPL_030_2_.C IPL_030_2_.AP DSACK_1_.D% DSACK_1_.C
- DSACK_1_.AP DSACK_1_.OE AS_000.D% AS_000.C AS_000.AP AS_000.OE UDS_000.D%
- UDS_000.C UDS_000.AP UDS_000.OE LDS_000.D% LDS_000.C LDS_000.AP LDS_000.OE
- IPL_030_1_.D IPL_030_1_.C IPL_030_1_.AP IPL_030_0_.D IPL_030_0_.C IPL_030_0_.AP
- BG_000.D% BG_000.C BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_EXP.D
- CLK_EXP.C FPU_CS.D% FPU_CS.C FPU_CS.AP DTACK.D% DTACK.C DTACK.AP DTACK.OE E.T
- E.C VMA.T VMA.C VMA.AP RESET.D RESET.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.T
- cpu_est_1_.C inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C
- inst_AS_030_000_SYNC.AP inst_DTACK_SYNC.D% inst_DTACK_SYNC.C inst_DTACK_SYNC.AP
- inst_VPA_D.D inst_VPA_D.C inst_VPA_SYNC.D% inst_VPA_SYNC.C inst_VPA_SYNC.AP
- inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D1.D inst_CLK_000_D1.C
- inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C cpu_est_2_.D.X1 cpu_est_2_.D.X2
- cpu_est_2_.C CLK_CNT_0_.D CLK_CNT_0_.C SM_AMIGA_6_.D% SM_AMIGA_6_.C
- SM_AMIGA_6_.AR SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_1_.D
- SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR
+ BGACK_030.Q FPU_CS.Q E.Q VMA.Q cpu_est_0_.Q cpu_est_1_.Q IPL_030_0_.Q AS_000.Q
+ inst_AS_030_000_SYNC.Q IPL_030_1_.Q inst_DTACK_SYNC.Q inst_VPA_D.Q IPL_030_2_.Q
+ inst_VPA_SYNC.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q
+ inst_CLK_OUT_PRE.Q SM_AMIGA_6_.Q cpu_est_2_.Q CLK_REF_1_.Q SM_AMIGA_7_.Q
+ UDS_000.Q LDS_000.Q DSACK_1_.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q CLK_CNT_0_.Q
+ CLK_CNT_1_.Q SM_AMIGA_3_.Q SM_AMIGA_5_.Q SM_AMIGA_2_.Q SM_AMIGA_0_.Q
+ AMIGA_BUS_ENABLE.Q BG_000.Q DSACK_1_.PIN DTACK.PIN
+.ob BERR BERR.OE CLK_DIV_OUT.D CLK_DIV_OUT.C AVEC AVEC_EXP AVEC_EXP.OE
+ AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN CIIN.OE DSACK_0_ DSACK_0_.OE
+ IPL_030_2_.D IPL_030_2_.C IPL_030_2_.AP DSACK_1_.D% DSACK_1_.C DSACK_1_.AP
+ DSACK_1_.OE AS_000.D% AS_000.C AS_000.AP AS_000.OE UDS_000.D% UDS_000.C
+ UDS_000.AP UDS_000.OE LDS_000.D% LDS_000.C LDS_000.AP LDS_000.OE BG_000.D%
+ BG_000.C BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_EXP.D CLK_EXP.C
+ FPU_CS.D% FPU_CS.C FPU_CS.AP DTACK.D% DTACK.C DTACK.AP DTACK.OE E.T E.C VMA.T
+ VMA.C VMA.AP RESET.D RESET.C AMIGA_BUS_ENABLE.D% AMIGA_BUS_ENABLE.C IPL_030_1_.D
+ IPL_030_1_.C IPL_030_1_.AP IPL_030_0_.D IPL_030_0_.C IPL_030_0_.AP cpu_est_0_.D
+ cpu_est_0_.C cpu_est_1_.T cpu_est_1_.C inst_AS_030_000_SYNC.D
+ inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_DTACK_SYNC.D%
+ inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_VPA_D.D inst_VPA_D.C inst_VPA_SYNC.D%
+ inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_CLK_000_D0.D inst_CLK_000_D0.C
+ inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D2.D inst_CLK_000_D2.C
+ inst_CLK_OUT_PRE.D.X1 inst_CLK_OUT_PRE.D.X2 inst_CLK_OUT_PRE.C SM_AMIGA_6_.D
+ SM_AMIGA_6_.C SM_AMIGA_6_.AR cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C
+ CLK_REF_1_.D CLK_REF_1_.LH CLK_REF_1_.AR SM_AMIGA_7_.D SM_AMIGA_7_.C
+ SM_AMIGA_7_.AP SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_1_.D
+ SM_AMIGA_1_.C SM_AMIGA_1_.AR CLK_CNT_0_.D CLK_CNT_0_.C CLK_CNT_1_.D CLK_CNT_1_.C
SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C
SM_AMIGA_5_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_0_.D
SM_AMIGA_0_.C SM_AMIGA_0_.AR
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-.p 103
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.end
diff --git a/Logic/68030_tk.tte b/Logic/68030_tk.tte
index 347e4cf..35fb4e4 100644
--- a/Logic/68030_tk.tte
+++ b/Logic/68030_tk.tte
@@ -1,151 +1,163 @@
#$ TOOL ispLEVER Classic 1.7.00.05.28.13
-#$ DATE Fri May 16 17:07:08 2014
+#$ DATE Sun May 18 21:01:47 2014
#$ MODULE BUS68030
-#$ PINS 59 A_17_ A_16_ SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 A_0_ nEXP_SPACE
- BERR BG_030 IPL_1_ IPL_0_ DSACK_0_ BGACK_000 FC_0_ CLK_030 CLK_000 CLK_OSZI
- CLK_DIV_OUT AVEC AVEC_EXP VPA RST RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR
- AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_
- A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ IPL_030_2_ DSACK_1_ AS_000 UDS_000 LDS_000
- IPL_030_1_ IPL_030_0_ BG_000 BGACK_030 CLK_EXP FPU_CS DTACK E VMA RESET
-#$ NODES 19 cpu_est_0_ cpu_est_1_ inst_AS_030_000_SYNC inst_DTACK_SYNC
- inst_VPA_D inst_VPA_SYNC inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_OUT_PRE
- cpu_est_2_ CLK_CNT_0_ SM_AMIGA_6_ SM_AMIGA_7_ SM_AMIGA_1_ SM_AMIGA_4_
- SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_ SM_AMIGA_0_
+#$ PINS 59 SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 SIZE_0_ A_30_ nEXP_SPACE
+ A_29_ BERR A_28_ BG_030 A_27_ A_26_ A_25_ BGACK_000 A_24_ CLK_030 A_23_ CLK_000
+ A_22_ CLK_OSZI A_21_ CLK_DIV_OUT A_20_ A_19_ A_18_ A_17_ AVEC A_16_ AVEC_EXP VPA
+ RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN A_0_ IPL_1_ IPL_0_ DSACK_0_
+ FC_0_ IPL_030_2_ DSACK_1_ AS_000 UDS_000 LDS_000 BG_000 BGACK_030 CLK_EXP FPU_CS
+ DTACK E VMA RESET AMIGA_BUS_ENABLE IPL_030_1_ IPL_030_0_
+#$ NODES 22 cpu_est_0_ cpu_est_1_ inst_AS_030_000_SYNC inst_DTACK_SYNC
+ inst_VPA_D inst_VPA_SYNC inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2
+ inst_CLK_OUT_PRE SM_AMIGA_6_ cpu_est_2_ CLK_REF_1_ SM_AMIGA_7_ SM_AMIGA_4_
+ SM_AMIGA_1_ CLK_CNT_0_ CLK_CNT_1_ SM_AMIGA_3_ SM_AMIGA_5_ SM_AMIGA_2_
+ SM_AMIGA_0_
.type f
-.i 68
-.o 111
+.i 72
+.o 120
.ilb SIZE_1_ A_31_ IPL_2_ FC_1_ AS_030 DS_030 nEXP_SPACE BG_030 BGACK_000
CLK_030 CLK_000 CLK_OSZI VPA RST RW SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_
A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ A_0_ IPL_1_ IPL_0_ FC_0_
- BGACK_030.Q FPU_CS.Q E.Q VMA.Q cpu_est_0_.Q cpu_est_1_.Q AS_000.Q
- inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_D.Q inst_VPA_SYNC.Q
- inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_OUT_PRE.Q cpu_est_2_.Q CLK_CNT_0_.Q
- SM_AMIGA_6_.Q SM_AMIGA_7_.Q UDS_000.Q LDS_000.Q DSACK_1_.Q SM_AMIGA_1_.Q
- SM_AMIGA_4_.Q SM_AMIGA_3_.Q SM_AMIGA_5_.Q SM_AMIGA_2_.Q SM_AMIGA_0_.Q BG_000.Q
- IPL_030_0_.Q IPL_030_1_.Q IPL_030_2_.Q DSACK_1_.PIN DTACK.PIN
-.ob BERR BERR.OE DSACK_0_ DSACK_0_.OE CLK_DIV_OUT.D CLK_DIV_OUT.C AVEC AVEC_EXP
- AVEC_EXP.OE AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN
- CIIN.OE IPL_030_2_.D IPL_030_2_.C IPL_030_2_.AP DSACK_1_.D- DSACK_1_.C
- DSACK_1_.AP DSACK_1_.OE AS_000.D- AS_000.C AS_000.AP AS_000.OE UDS_000.D-
- UDS_000.C UDS_000.AP UDS_000.OE LDS_000.D- LDS_000.C LDS_000.AP LDS_000.OE
- IPL_030_1_.D IPL_030_1_.C IPL_030_1_.AP IPL_030_0_.D IPL_030_0_.C IPL_030_0_.AP
- BG_000.D- BG_000.C BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_EXP.D
- CLK_EXP.C FPU_CS.D- FPU_CS.C FPU_CS.AP DTACK.D- DTACK.C DTACK.AP DTACK.OE E.T
- E.C VMA.T VMA.C VMA.AP RESET.D RESET.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.T
- cpu_est_1_.C inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C
- inst_AS_030_000_SYNC.AP inst_DTACK_SYNC.D- inst_DTACK_SYNC.C inst_DTACK_SYNC.AP
- inst_VPA_D.D inst_VPA_D.C inst_VPA_SYNC.D- inst_VPA_SYNC.C inst_VPA_SYNC.AP
- inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D1.D inst_CLK_000_D1.C
- inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C cpu_est_2_.D.X1 cpu_est_2_.D.X2
- cpu_est_2_.C CLK_CNT_0_.D CLK_CNT_0_.C SM_AMIGA_6_.D- SM_AMIGA_6_.C
- SM_AMIGA_6_.AR SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_1_.D
- SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR
+ BGACK_030.Q FPU_CS.Q E.Q VMA.Q cpu_est_0_.Q cpu_est_1_.Q IPL_030_0_.Q AS_000.Q
+ inst_AS_030_000_SYNC.Q IPL_030_1_.Q inst_DTACK_SYNC.Q inst_VPA_D.Q IPL_030_2_.Q
+ inst_VPA_SYNC.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q
+ inst_CLK_OUT_PRE.Q SM_AMIGA_6_.Q cpu_est_2_.Q CLK_REF_1_.Q SM_AMIGA_7_.Q
+ UDS_000.Q LDS_000.Q DSACK_1_.Q SM_AMIGA_4_.Q SM_AMIGA_1_.Q CLK_CNT_0_.Q
+ CLK_CNT_1_.Q SM_AMIGA_3_.Q SM_AMIGA_5_.Q SM_AMIGA_2_.Q SM_AMIGA_0_.Q
+ AMIGA_BUS_ENABLE.Q BG_000.Q DSACK_1_.PIN DTACK.PIN
+.ob BERR BERR.OE CLK_DIV_OUT.D CLK_DIV_OUT.C AVEC AVEC_EXP AVEC_EXP.OE
+ AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN CIIN.OE DSACK_0_ DSACK_0_.OE
+ IPL_030_2_.D IPL_030_2_.C IPL_030_2_.AP DSACK_1_.D- DSACK_1_.C DSACK_1_.AP
+ DSACK_1_.OE AS_000.D- AS_000.C AS_000.AP AS_000.OE UDS_000.D- UDS_000.C
+ UDS_000.AP UDS_000.OE LDS_000.D- LDS_000.C LDS_000.AP LDS_000.OE BG_000.D-
+ BG_000.C BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_EXP.D CLK_EXP.C
+ FPU_CS.D- FPU_CS.C FPU_CS.AP DTACK.D- DTACK.C DTACK.AP DTACK.OE E.T E.C VMA.T
+ VMA.C VMA.AP RESET.D RESET.C AMIGA_BUS_ENABLE.D- AMIGA_BUS_ENABLE.C IPL_030_1_.D
+ IPL_030_1_.C IPL_030_1_.AP IPL_030_0_.D IPL_030_0_.C IPL_030_0_.AP cpu_est_0_.D
+ cpu_est_0_.C cpu_est_1_.T cpu_est_1_.C inst_AS_030_000_SYNC.D
+ inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_DTACK_SYNC.D-
+ inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_VPA_D.D inst_VPA_D.C inst_VPA_SYNC.D-
+ inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_CLK_000_D0.D inst_CLK_000_D0.C
+ inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D2.D inst_CLK_000_D2.C
+ inst_CLK_OUT_PRE.D.X1 inst_CLK_OUT_PRE.D.X2 inst_CLK_OUT_PRE.C SM_AMIGA_6_.D
+ SM_AMIGA_6_.C SM_AMIGA_6_.AR cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C
+ CLK_REF_1_.D CLK_REF_1_.LH CLK_REF_1_.AR SM_AMIGA_7_.D SM_AMIGA_7_.C
+ SM_AMIGA_7_.AP SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_1_.D
+ SM_AMIGA_1_.C SM_AMIGA_1_.AR CLK_CNT_0_.D CLK_CNT_0_.C CLK_CNT_1_.D CLK_CNT_1_.C
SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C
SM_AMIGA_5_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_0_.D
SM_AMIGA_0_.C SM_AMIGA_0_.AR
-.phase 111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111
-.p 103
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+.phase 111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111
+.p 111
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+------------------------------------------------------1----------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000000000000000000000000000
+-------------------------------------------------1------1--------------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000000000000
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+-------------------------------------------------------1------00-------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000000000000
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.end
diff --git a/Logic/68030_tk.vcl b/Logic/68030_tk.vcl
index 7a19c18..adc8366 100644
--- a/Logic/68030_tk.vcl
+++ b/Logic/68030_tk.vcl
@@ -17,8 +17,8 @@ Parent = m4a5.lci;
SDS_file = m4a5.sds;
Design = 68030_tk.tt4;
Rev = 0.01;
-DATE = 5/16/14;
-TIME = 17:07:12;
+DATE = 5/18/14;
+TIME = 21:01:51;
Type = TT2;
Pre_Fit_Time = 1;
Source_Format = Pure_VHDL;
@@ -136,6 +136,7 @@ DTACK = OUTPUT,30,3,-;
LDS_000 = OUTPUT,31,3,-;
UDS_000 = OUTPUT,32,3,-;
E = OUTPUT,66,6,-;
+AMIGA_BUS_ENABLE = OUTPUT,34,3,-;
BG_000 = OUTPUT,29,3,-;
IPL_030_2_ = OUTPUT,9,1,-;
IPL_030_0_ = OUTPUT,8,1,-;
@@ -150,40 +151,43 @@ CLK_DIV_OUT = OUTPUT,65,6,-;
AMIGA_BUS_DATA_DIR = OUTPUT,48,4,-;
CIIN = OUTPUT,47,4,-;
BERR = OUTPUT,41,4,-;
-AMIGA_BUS_ENABLE = OUTPUT,34,3,-;
AVEC_EXP = OUTPUT,22,2,-;
AMIGA_BUS_ENABLE_LOW = OUTPUT,20,2,-;
CLK_EXP = OUTPUT,10,1,-;
RESET = OUTPUT,3,1,-;
+inst_CLK_000_D1 = NODE,*,6,-;
inst_CLK_000_D0 = NODE,*,6,-;
-inst_CLK_000_D1 = NODE,*,3,-;
inst_AS_030_000_SYNC = NODE,*,7,-;
+SM_AMIGA_6_ = NODE,*,0,-;
+inst_CLK_OUT_PRE = NODE,*,1,-;
RN_FPU_CS = NODE,-1,7,-;
-SM_AMIGA_4_ = NODE,*,5,-;
-inst_CLK_OUT_PRE = NODE,*,7,-;
+RN_AS_000 = NODE,-1,3,-;
+SM_AMIGA_4_ = NODE,*,1,-;
+SM_AMIGA_7_ = NODE,*,1,-;
+inst_CLK_000_D2 = NODE,*,6,-;
cpu_est_1_ = NODE,*,3,-;
RN_E = NODE,-1,6,-;
-SM_AMIGA_1_ = NODE,*,6,-;
-SM_AMIGA_6_ = NODE,*,3,-;
-cpu_est_2_ = NODE,*,3,-;
+SM_AMIGA_0_ = NODE,*,6,-;
+SM_AMIGA_2_ = NODE,*,6,-;
+SM_AMIGA_1_ = NODE,*,7,-;
+cpu_est_2_ = NODE,*,6,-;
cpu_est_0_ = NODE,*,3,-;
RN_VMA = NODE,-1,3,-;
RN_BGACK_030 = NODE,-1,7,-;
-RN_AS_000 = NODE,-1,3,-;
-SM_AMIGA_5_ = NODE,*,0,-;
-SM_AMIGA_7_ = NODE,*,7,-;
inst_VPA_D = NODE,*,7,-;
RN_LDS_000 = NODE,-1,3,-;
RN_UDS_000 = NODE,-1,3,-;
-RN_BG_000 = NODE,-1,3,-;
RN_IPL_030_0_ = NODE,-1,1,-;
RN_IPL_030_1_ = NODE,-1,1,-;
+RN_AMIGA_BUS_ENABLE = NODE,-1,3,-;
+RN_BG_000 = NODE,-1,3,-;
RN_IPL_030_2_ = NODE,-1,1,-;
-SM_AMIGA_0_ = NODE,*,7,-;
-SM_AMIGA_2_ = NODE,*,6,-;
SM_AMIGA_3_ = NODE,*,6,-;
RN_DSACK_1_ = NODE,-1,7,-;
+SM_AMIGA_5_ = NODE,*,1,-;
+CLK_CNT_1_ = NODE,*,1,-;
+CLK_CNT_0_ = NODE,*,1,-;
inst_VPA_SYNC = NODE,*,6,-;
inst_DTACK_SYNC = NODE,*,6,-;
-CLK_CNT_0_ = NODE,*,7,-;
+CLK_REF_1_ = NODE,*,3,-;
CLK_OSZI = INPUT,61,-,-;
diff --git a/Logic/68030_tk.vco b/Logic/68030_tk.vco
index dcec33a..cd2c1d4 100644
--- a/Logic/68030_tk.vco
+++ b/Logic/68030_tk.vco
@@ -17,8 +17,8 @@ Parent = m4a5.lci;
SDS_file = m4a5.sds;
Design = 68030_tk.tt4;
Rev = 0.01;
-DATE = 5/16/14;
-TIME = 17:07:12;
+DATE = 5/18/14;
+TIME = 21:01:51;
Type = TT2;
Pre_Fit_Time = 1;
Source_Format = Pure_VHDL;
@@ -131,57 +131,54 @@ Usercode_Format = Hex;
[LOCATION ASSIGNMENT]
Layer = OFF;
-A_17_ = INPUT,59, F,-;
-A_16_ = INPUT,96, A,-;
SIZE_1_ = INPUT,79, H,-;
A_31_ = INPUT,4, B,-;
IPL_2_ = INPUT,68, G,-;
FC_1_ = INPUT,58, F,-;
AS_030 = INPUT,82, H,-;
DS_030 = INPUT,98, A,-;
-A_0_ = INPUT,69, G,-;
+SIZE_0_ = INPUT,70, G,-;
+A_30_ = INPUT,5, B,-;
nEXP_SPACE = INPUT,14,-,-;
+A_29_ = INPUT,6, B,-;
BERR = OUTPUT,41, E,-;
+A_28_ = INPUT,15, C,-;
BG_030 = INPUT,21, C,-;
-IPL_1_ = INPUT,56, F,-;
-IPL_0_ = INPUT,67, G,-;
-DSACK_0_ = OUTPUT,80, H,-;
+A_27_ = INPUT,16, C,-;
+A_26_ = INPUT,17, C,-;
+A_25_ = INPUT,18, C,-;
BGACK_000 = INPUT,28, D,-;
-FC_0_ = INPUT,57, F,-;
+A_24_ = INPUT,19, C,-;
CLK_030 = INPUT,64,-,-;
+A_23_ = INPUT,84, H,-;
CLK_000 = INPUT,11,-,-;
+A_22_ = INPUT,85, H,-;
CLK_OSZI = INPUT,61,-,-;
+A_21_ = INPUT,94, A,-;
CLK_DIV_OUT = OUTPUT,65, G,-;
+A_20_ = INPUT,93, A,-;
+A_19_ = INPUT,97, A,-;
+A_18_ = INPUT,95, A,-;
+A_17_ = INPUT,59, F,-;
AVEC = OUTPUT,92, A,-;
+A_16_ = INPUT,96, A,-;
AVEC_EXP = OUTPUT,22, C,-;
VPA = INPUT,36,-,-;
RST = INPUT,86,-,-;
RW = INPUT,71, G,-;
-AMIGA_BUS_ENABLE = OUTPUT,34, D,-;
AMIGA_BUS_DATA_DIR = OUTPUT,48, E,-;
AMIGA_BUS_ENABLE_LOW = OUTPUT,20, C,-;
CIIN = OUTPUT,47, E,-;
-SIZE_0_ = INPUT,70, G,-;
-A_30_ = INPUT,5, B,-;
-A_29_ = INPUT,6, B,-;
-A_28_ = INPUT,15, C,-;
-A_27_ = INPUT,16, C,-;
-A_26_ = INPUT,17, C,-;
-A_25_ = INPUT,18, C,-;
-A_24_ = INPUT,19, C,-;
-A_23_ = INPUT,84, H,-;
-A_22_ = INPUT,85, H,-;
-A_21_ = INPUT,94, A,-;
-A_20_ = INPUT,93, A,-;
-A_19_ = INPUT,97, A,-;
-A_18_ = INPUT,95, A,-;
+A_0_ = INPUT,69, G,-;
+IPL_1_ = INPUT,56, F,-;
+IPL_0_ = INPUT,67, G,-;
+DSACK_0_ = OUTPUT,80, H,-;
+FC_0_ = INPUT,57, F,-;
IPL_030_2_ = OUTPUT,9, B,-;
DSACK_1_ = BIDIR,81, H,-;
AS_000 = OUTPUT,33, D,-;
UDS_000 = OUTPUT,32, D,-;
LDS_000 = OUTPUT,31, D,-;
-IPL_030_1_ = OUTPUT,7, B,-;
-IPL_030_0_ = OUTPUT,8, B,-;
BG_000 = OUTPUT,29, D,-;
BGACK_030 = OUTPUT,83, H,-;
CLK_EXP = OUTPUT,10, B,-;
@@ -190,22 +187,28 @@ DTACK = BIDIR,30, D,-;
E = OUTPUT,66, G,-;
VMA = OUTPUT,35, D,-;
RESET = OUTPUT,3, B,-;
-cpu_est_0_ = NODE,14, D,-;
-cpu_est_1_ = NODE,2, D,-;
+AMIGA_BUS_ENABLE = OUTPUT,34, D,-;
+IPL_030_1_ = OUTPUT,7, B,-;
+IPL_030_0_ = OUTPUT,8, B,-;
+cpu_est_0_ = NODE,2, D,-;
+cpu_est_1_ = NODE,13, D,-;
inst_AS_030_000_SYNC = NODE,1, H,-;
-inst_DTACK_SYNC = NODE,13, G,-;
-inst_VPA_D = NODE,13, H,-;
-inst_VPA_SYNC = NODE,9, G,-;
-inst_CLK_000_D0 = NODE,8, G,-;
-inst_CLK_000_D1 = NODE,13, D,-;
-inst_CLK_OUT_PRE = NODE,5, H,-;
-cpu_est_2_ = NODE,10, D,-;
-CLK_CNT_0_ = NODE,6, H,-;
-SM_AMIGA_6_ = NODE,6, D,-;
-SM_AMIGA_7_ = NODE,9, H,-;
-SM_AMIGA_1_ = NODE,12, G,-;
-SM_AMIGA_4_ = NODE,0, F,-;
-SM_AMIGA_3_ = NODE,5, G,-;
-SM_AMIGA_5_ = NODE,0, A,-;
-SM_AMIGA_2_ = NODE,1, G,-;
-SM_AMIGA_0_ = NODE,2, H,-;
+inst_DTACK_SYNC = NODE,10, G,-;
+inst_VPA_D = NODE,9, H,-;
+inst_VPA_SYNC = NODE,6, G,-;
+inst_CLK_000_D0 = NODE,12, G,-;
+inst_CLK_000_D1 = NODE,8, G,-;
+inst_CLK_000_D2 = NODE,1, G,-;
+inst_CLK_OUT_PRE = NODE,5, B,-;
+SM_AMIGA_6_ = NODE,0, A,-;
+cpu_est_2_ = NODE,13, G,-;
+CLK_REF_1_ = NODE,6, D,-;
+SM_AMIGA_7_ = NODE,13, B,-;
+SM_AMIGA_4_ = NODE,9, B,-;
+SM_AMIGA_1_ = NODE,5, H,-;
+CLK_CNT_0_ = NODE,10, B,-;
+CLK_CNT_1_ = NODE,6, B,-;
+SM_AMIGA_3_ = NODE,2, G,-;
+SM_AMIGA_5_ = NODE,2, B,-;
+SM_AMIGA_2_ = NODE,9, G,-;
+SM_AMIGA_0_ = NODE,5, G,-;
diff --git a/Logic/68030_tk.xrf b/Logic/68030_tk.xrf
index 5a79260..b58e03a 100644
--- a/Logic/68030_tk.xrf
+++ b/Logic/68030_tk.xrf
@@ -2,7 +2,7 @@ Signal Name Cross Reference File
ispLEVER Classic 1.7.00.05.28.13
-Design '68030_tk' created Fri May 16 17:07:08 2014
+Design '68030_tk' created Sun May 18 21:01:47 2014
LEGEND: '>' Functional Block Port Separator
diff --git a/Logic/BUS68030.bl0 b/Logic/BUS68030.bl0
index 2df46a2..e92f3ce 100644
--- a/Logic/BUS68030.bl0
+++ b/Logic/BUS68030.bl0
@@ -1,127 +1,135 @@
-#$ DATE Fri May 16 17:07:08 2014
+#$ DATE Sun May 18 21:01:47 2014
#$ TOOL EDIF2BLIF version IspLever 1.0
#$ MODULE bus68030
-#$ PINS 74 A_17_ A_16_ SIZE_1_ A_15_ A_14_ A_31_ A_13_ A_12_ IPL_030_2_ A_11_ A_10_ IPL_2_ A_9_ A_8_ DSACK_1_ A_7_ A_6_ FC_1_ A_5_ AS_030 A_4_ AS_000 A_3_ DS_030 A_2_ UDS_000 A_1_ LDS_000 A_0_ nEXP_SPACE IPL_030_1_ BERR IPL_030_0_ BG_030 IPL_1_ BG_000 IPL_0_ BGACK_030 DSACK_0_ BGACK_000 FC_0_ CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS DTACK AVEC AVEC_EXP E VPA VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_
-#$ NODES 340 ipl_c_0__n ipl_c_1__n ipl_c_2__n inst_BGACK_030_INTreg inst_FPU_CS_INTreg dsack_c_1__n cpu_est_3_reg inst_VMA_INTreg DTACK_c cpu_est_0_ \
-# cpu_est_1_ inst_AS_000_INTreg inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_D inst_VPA_SYNC inst_CLK_000_D0 RST_c inst_CLK_000_D1 inst_CLK_OUT_PRE \
-# RESETDFFreg vcc_n_n gnd_n_n RW_c cpu_est_2_ CLK_CNT_0_ fc_c_0__n SM_AMIGA_6_ SM_AMIGA_7_ fc_c_1__n \
-# inst_UDS_000_INTreg inst_LDS_000_INTreg DSACK_INT_1_ state_machine_un60_clk_000_d0_n SM_AMIGA_1_ inst_DTACK_DMA N_100_i SM_AMIGA_4_ sm_amiga_ns_0_2__n SM_AMIGA_3_ \
-# N_103_i DSACK_INT_1_sqmuxa N_104_i state_machine_un13_as_000_int_n VPA_SYNC_1_sqmuxa_1 N_106_i un1_as_030_4 N_105_i SM_AMIGA_5_ sm_amiga_ns_0_5__n \
-# SM_AMIGA_2_ N_107_i SM_AMIGA_0_ N_108_i state_machine_lds_000_int_8_n sm_amiga_ns_0_6__n state_machine_uds_000_int_8_n N_90_i N_93_0 N_128_i \
-# N_126_i N_127_i N_129_i clk_cpu_est_11_0_1__n N_133_i N_132_i N_134_i clk_cpu_est_11_0_3__n N_125_i cpu_est_0_0_ \
-# N_124_i N_130_i N_131_i N_121_i N_91_0 N_109_i sm_amiga_ns_0_7__n CLK_OUT_PRE_0 state_machine_un8_clk_000_d0_i_n state_machine_un13_clk_000_d0_i_n \
-# state_machine_un15_clk_000_d0_0_n BG_030_c_i state_machine_un1_clk_030_0_n clk_un4_clk_000_d1_n state_machine_un17_clk_030_0_n N_144 un1_as_030_3_0 N_101 state_machine_as_030_000_sync_3_2_n VPA_SYNC_1_sqmuxa \
-# N_96_i N_97 un1_bg_030_0 state_machine_un34_clk_000_d0_n clk_un4_clk_000_d1_i_n N_96 state_machine_un6_bgack_000_0_n N_102 N_98_i UDS_000_INT_0_sqmuxa \
-# UDS_000_INT_0_sqmuxa_1 N_111_i N_167 N_99_i N_170 N_92 N_92_0 N_91 state_machine_un34_clk_000_d0_i_n N_99 \
-# a_c_i_0__n N_111 size_c_i_1__n N_98 N_102_i state_machine_un6_bgack_000_n state_machine_un42_clk_030_n N_144_i DTACK_SYNC_1_sqmuxa state_machine_lds_000_int_8_0_n \
-# un1_bg_030 state_machine_uds_000_int_8_0_n state_machine_as_030_000_sync_3_n state_machine_un60_clk_000_d0_i_n DTACK_SYNC_1_sqmuxa_1 un1_bg_030_0_1 un1_as_030_3 un1_bg_030_0_2 state_machine_un17_clk_030_n state_machine_as_030_000_sync_3_2_1_n \
-# state_machine_un1_clk_030_n clk_cpu_est_11_0_1_3__n VPA_SYNC_1_sqmuxa_1_0 clk_cpu_est_11_0_1_1__n state_machine_un15_clk_000_d0_n clk_cpu_est_11_0_2_1__n state_machine_un13_clk_000_d0_n N_167_1 state_machine_un8_clk_000_d0_n N_167_2 \
-# N_109 N_167_3 state_machine_un13_clk_000_d0_1_n N_167_4 N_129 N_167_5 state_machine_un13_clk_000_d0_2_n N_167_6 N_130 N_170_1 \
-# N_131 N_170_2 N_124 UDS_000_INT_0_sqmuxa_1_1 N_125 UDS_000_INT_0_sqmuxa_1_2 N_134 UDS_000_INT_0_sqmuxa_1_3 N_134_1 UDS_000_INT_0_sqmuxa_1_0 \
-# N_106 UDS_000_INT_0_sqmuxa_2 clk_cpu_est_11_3__n state_machine_un34_clk_000_d0_i_1_n N_132 state_machine_un42_clk_030_1_n N_133 state_machine_un42_clk_030_2_n clk_cpu_est_11_1__n state_machine_un42_clk_030_3_n \
-# N_127 state_machine_un42_clk_030_4_n N_126 state_machine_un42_clk_030_5_n N_128 DTACK_SYNC_1_sqmuxa_1_0 N_93 N_130_1 N_90 N_131_1 \
-# N_107 state_machine_un8_clk_000_d0_1_n N_108 state_machine_un8_clk_000_d0_2_n N_105 state_machine_un8_clk_000_d0_3_n N_103 state_machine_un8_clk_000_d0_4_n N_104 state_machine_un13_clk_000_d0_1_0_n \
-# N_100 state_machine_un13_clk_000_d0_2_0_n AS_000_INT_1_sqmuxa VPA_SYNC_1_sqmuxa_1_1 RW_i VPA_SYNC_1_sqmuxa_2 nEXP_SPACE_i VPA_SYNC_1_sqmuxa_3 N_101_i VPA_SYNC_1_sqmuxa_4 \
-# AS_000_INT_i N_106_1 dsack_i_1__n cpu_est_0_3__un3_n AS_030_i cpu_est_0_3__un1_n CLK_000_D0_i cpu_est_0_3__un0_n sm_amiga_i_3__n cpu_est_0_1__un3_n \
-# sm_amiga_i_4__n cpu_est_0_1__un1_n CLK_000_D1_i cpu_est_0_1__un0_n cpu_est_i_0__n as_000_int_0_un3_n cpu_est_i_3__n as_000_int_0_un1_n cpu_est_i_2__n as_000_int_0_un0_n \
-# VPA_D_i bg_000_0_un3_n VMA_INT_i bg_000_0_un1_n cpu_est_i_1__n bg_000_0_un0_n state_machine_un13_clk_000_d0_2_i_n as_030_000_sync_0_un3_n state_machine_un13_clk_000_d0_1_i_n as_030_000_sync_0_un1_n \
-# DTACK_i as_030_000_sync_0_un0_n DTACK_SYNC_1_sqmuxa_i fpu_cs_int_0_un3_n a_i_18__n fpu_cs_int_0_un1_n a_i_16__n fpu_cs_int_0_un0_n a_i_19__n dtack_sync_0_un3_n \
-# CLK_030_i dtack_sync_0_un1_n state_machine_un42_clk_030_i_n dtack_sync_0_un0_n sm_amiga_i_6__n vma_int_0_un3_n sm_amiga_i_7__n vma_int_0_un1_n AS_030_000_SYNC_i vma_int_0_un0_n \
-# DS_030_i cpu_est_0_2__un3_n UDS_000_INT_0_sqmuxa_1_i cpu_est_0_2__un1_n UDS_000_INT_0_sqmuxa_i cpu_est_0_2__un0_n sm_amiga_i_5__n ipl_030_0_0__un3_n VPA_SYNC_1_sqmuxa_i ipl_030_0_0__un1_n \
-# N_97_i ipl_030_0_0__un0_n a_i_30__n ipl_030_0_1__un3_n a_i_31__n ipl_030_0_1__un1_n a_i_28__n ipl_030_0_1__un0_n a_i_29__n ipl_030_0_2__un3_n \
-# a_i_26__n ipl_030_0_2__un1_n a_i_27__n ipl_030_0_2__un0_n a_i_24__n bgack_030_int_0_un3_n a_i_25__n bgack_030_int_0_un1_n bgack_030_int_0_un0_n RST_i \
-# uds_000_int_0_un3_n uds_000_int_0_un1_n FPU_CS_INT_i uds_000_int_0_un0_n BGACK_030_INT_i lds_000_int_0_un3_n AS_030_c lds_000_int_0_un1_n lds_000_int_0_un0_n vpa_sync_0_un3_n \
-# DS_030_c vpa_sync_0_un1_n vpa_sync_0_un0_n dsack_int_0_1__un3_n dsack_int_0_1__un1_n size_c_0__n dsack_int_0_1__un0_n a_15__n size_c_1__n a_14__n \
-# a_c_0__n a_13__n a_12__n a_11__n a_10__n a_9__n a_8__n a_7__n a_6__n a_c_16__n \
-# a_5__n a_c_17__n a_4__n a_c_18__n a_3__n a_c_19__n a_2__n a_c_20__n a_1__n a_c_21__n \
-# a_c_22__n a_c_23__n a_c_24__n a_c_25__n a_c_26__n a_c_27__n a_c_28__n a_c_29__n a_c_30__n a_c_31__n \
-# nEXP_SPACE_c BG_030_c BG_000DFFSHreg BGACK_000_c CLK_030_c CLK_OSZI_c CLK_OUT_INTreg IPL_030DFFSH_0_reg IPL_030DFFSH_1_reg IPL_030DFFSH_2_reg \
-#
+#$ PINS 74 SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 DS_030 UDS_000 SIZE_0_ LDS_000 A_30_ nEXP_SPACE A_29_ BERR A_28_ BG_030 A_27_ BG_000 A_26_ BGACK_030 A_25_ BGACK_000 A_24_ CLK_030 A_23_ CLK_000 A_22_ CLK_OSZI A_21_ CLK_DIV_OUT A_20_ CLK_EXP A_19_ FPU_CS A_18_ DTACK A_17_ AVEC A_16_ AVEC_EXP A_15_ E A_14_ VPA A_13_ VMA A_12_ RST A_11_ RESET A_10_ RW A_9_ AMIGA_BUS_ENABLE A_8_ AMIGA_BUS_DATA_DIR A_7_ AMIGA_BUS_ENABLE_LOW A_6_ CIIN A_5_ A_4_ A_3_ A_2_ A_1_ A_0_ IPL_030_1_ IPL_030_0_ IPL_1_ IPL_0_ DSACK_0_ FC_0_
+#$ NODES 369 BGACK_000_c CLK_030_c CLK_000_c CLK_OSZI_c inst_BGACK_030_INTreg inst_FPU_CS_INTreg cpu_est_3_reg CLK_OUT_INTreg inst_VMA_INTreg cpu_est_0_ \
+# cpu_est_1_ IPL_030DFFSH_0_reg inst_AS_000_INTreg inst_AS_030_000_SYNC IPL_030DFFSH_1_reg inst_DTACK_SYNC inst_VPA_D IPL_030DFFSH_2_reg inst_VPA_SYNC inst_CLK_000_D0 \
+# ipl_c_0__n inst_CLK_000_D1 inst_CLK_000_D2 ipl_c_1__n inst_CLK_OUT_PRE SM_AMIGA_6_ ipl_c_2__n vcc_n_n gnd_n_n cpu_est_2_ \
+# dsack_c_1__n CLK_REF_1_ SM_AMIGA_7_ DTACK_c inst_UDS_000_INTreg inst_LDS_000_INTreg DSACK_INT_1_ clk_un4_clk_000_d1_n SM_AMIGA_4_ SM_AMIGA_1_ \
+# inst_DTACK_DMA clk_clk_cnt_n RST_c CLK_CNT_0_ CLK_CNT_1_ RESETDFFreg state_machine_un14_as_000_int_n SM_AMIGA_3_ RW_c fc_c_0__n \
+# un1_as_030_4 SM_AMIGA_5_ fc_c_1__n SM_AMIGA_2_ SM_AMIGA_0_ AMIGA_BUS_ENABLEDFFreg state_machine_lds_000_int_7_n state_machine_uds_000_int_7_n N_101_i N_102_i \
+# N_103_i N_90_0 N_91_0 N_127_i N_128_i CLK_OUT_PRE_0 N_118_i N_125_i cpu_est_0_0_ N_123_i \
+# N_124_i N_126_i clk_cpu_est_11_0_1__n N_131_i clk_cpu_est_11_0_3__n N_130_i N_129_i N_122_i N_121_i N_108_i \
+# G_86 sm_amiga_ns_0_7__n state_machine_un30_clk_000_d1_n state_machine_un8_clk_000_d0_i_n N_147 state_machine_un13_clk_000_d0_i_n N_96 state_machine_un15_clk_000_d0_0_n state_machine_un44_clk_000_d1_n state_machine_un23_clk_000_d0_i_n \
+# G_90 N_100_i N_89 sm_amiga_ns_0_2__n N_97 BG_030_c_i N_90 state_machine_un1_clk_030_0_n N_98 clk_un4_clk_000_d1_i_n \
+# N_99 state_machine_un6_bgack_000_0_n UDS_000_INT_0_sqmuxa state_machine_un17_clk_030_0_n UDS_000_INT_0_sqmuxa_1 un1_as_030_3_0 N_167 N_89_i N_170 AMIGA_BUS_ENABLE_i_m_i \
+# N_105 nEXP_SPACE_m_i N_92 state_machine_amiga_bus_enable_2_iv_i_n N_106 state_machine_as_030_000_sync_3_2_n N_107 N_94_i N_104 un1_bg_030_0 \
+# state_machine_un42_clk_030_n N_105_i un1_bg_030 N_104_i N_94 sm_amiga_ns_0_5__n state_machine_as_030_000_sync_3_n N_106_i AMIGA_BUS_ENABLE_i_m N_107_i \
+# nEXP_SPACE_m N_95 CLK_OUT_PRE_i un1_as_030_3 N_92_0 state_machine_un17_clk_030_n state_machine_un44_clk_000_d1_i_n state_machine_un6_bgack_000_n a_c_i_0__n state_machine_un1_clk_030_n \
+# size_c_i_1__n AS_000_INT_1_sqmuxa N_98_i DSACK_INT_1_sqmuxa N_99_i N_100 sm_amiga_ns_0_1__n state_machine_un23_clk_000_d0_n N_97_i DTACK_SYNC_1_sqmuxa \
+# DTACK_SYNC_1_sqmuxa_1 N_147_i VPA_SYNC_1_sqmuxa state_machine_lds_000_int_7_0_n VPA_SYNC_1_sqmuxa_1 state_machine_uds_000_int_7_0_n state_machine_un15_clk_000_d0_n un1_bg_030_0_1 clk_cpu_est_11_3__n un1_bg_030_0_2 \
+# state_machine_un2_clk_000_n state_machine_as_030_000_sync_3_2_1_n state_machine_un13_clk_000_d0_n clk_cpu_est_11_0_1_1__n state_machine_un8_clk_000_d0_n clk_cpu_est_11_0_2_1__n N_108 N_167_1 state_machine_un13_clk_000_d0_1_n N_167_2 \
+# N_124 N_167_3 N_126 N_167_4 state_machine_un13_clk_000_d0_2_n N_167_5 N_129 N_167_6 N_122 N_170_1 \
+# N_130 N_170_2 N_121 UDS_000_INT_0_sqmuxa_1_1 N_131 UDS_000_INT_0_sqmuxa_1_2 N_127 UDS_000_INT_0_sqmuxa_1_3 clk_cpu_est_11_1__n UDS_000_INT_0_sqmuxa_1_0 \
+# N_128 state_machine_un44_clk_000_d1_i_1_n N_123 state_machine_un42_clk_030_1_n N_125 state_machine_un42_clk_030_2_n N_91 state_machine_un42_clk_030_3_n N_102 state_machine_un42_clk_030_4_n \
+# N_103 state_machine_un42_clk_030_5_n N_101 N_96_1 RW_i AMIGA_BUS_ENABLE_i_m_1 AS_000_INT_i N_131_1 dsack_i_1__n clk_cpu_est_11_0_1_3__n \
+# sm_amiga_i_4__n N_105_1 sm_amiga_i_5__n VPA_SYNC_1_sqmuxa_1_0 CLK_000_D0_i VPA_SYNC_1_sqmuxa_2 sm_amiga_i_3__n VPA_SYNC_1_sqmuxa_3 cpu_est_i_0__n VPA_SYNC_1_sqmuxa_4 \
+# cpu_est_i_2__n VPA_SYNC_1_sqmuxa_5 state_machine_un13_clk_000_d0_2_i_n VPA_SYNC_1_sqmuxa_6 cpu_est_i_3__n DTACK_SYNC_1_sqmuxa_1_0 VPA_D_i DTACK_SYNC_1_sqmuxa_2 cpu_est_i_1__n state_machine_un8_clk_000_d0_1_n \
+# DTACK_i state_machine_un8_clk_000_d0_2_n VMA_INT_i state_machine_un8_clk_000_d0_3_n state_machine_un13_clk_000_d0_1_i_n state_machine_un8_clk_000_d0_4_n AS_030_i state_machine_un13_clk_000_d0_1_0_n DTACK_SYNC_1_sqmuxa_i state_machine_un13_clk_000_d0_2_0_n \
+# VPA_SYNC_1_sqmuxa_i N_127_1 CLK_000_D1_i N_128_1 N_95_i ipl_030_0_2__un3_n N_96_i ipl_030_0_2__un1_n a_i_18__n ipl_030_0_2__un0_n \
+# a_i_16__n ipl_030_0_1__un3_n a_i_19__n ipl_030_0_1__un1_n CLK_030_i ipl_030_0_1__un0_n CLK_000_D2_i ipl_030_0_0__un3_n state_machine_un42_clk_030_i_n ipl_030_0_0__un1_n \
+# sm_amiga_i_6__n ipl_030_0_0__un0_n sm_amiga_i_7__n cpu_est_0_2__un3_n AMIGA_BUS_ENABLE_i cpu_est_0_2__un1_n nEXP_SPACE_i cpu_est_0_2__un0_n sm_amiga_i_2__n cpu_est_0_1__un3_n \
+# sm_amiga_i_1__n cpu_est_0_1__un1_n DS_030_i cpu_est_0_1__un0_n AS_030_000_SYNC_i vpa_sync_0_un3_n UDS_000_INT_0_sqmuxa_1_i vpa_sync_0_un1_n UDS_000_INT_0_sqmuxa_i vpa_sync_0_un0_n \
+# clk_clk_cnt_i_n vma_int_0_un3_n clk_cnt_i_0__n vma_int_0_un1_n a_i_30__n vma_int_0_un0_n a_i_31__n cpu_est_0_3__un3_n a_i_28__n cpu_est_0_3__un1_n \
+# a_i_29__n cpu_est_0_3__un0_n a_i_26__n bgack_030_int_0_un3_n a_i_27__n bgack_030_int_0_un1_n a_i_24__n bgack_030_int_0_un0_n a_i_25__n bg_000_0_un3_n \
+# N_132_i bg_000_0_un1_n bg_000_0_un0_n RST_i amiga_bus_enable_0_un3_n FPU_CS_INT_i amiga_bus_enable_0_un1_n BGACK_030_INT_i amiga_bus_enable_0_un0_n AS_030_c \
+# as_030_000_sync_0_un3_n as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n DS_030_c fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n fpu_cs_int_0_un0_n as_000_int_0_un3_n size_c_0__n as_000_int_0_un1_n \
+# as_000_int_0_un0_n size_c_1__n dsack_int_0_1__un3_n dsack_int_0_1__un1_n a_c_0__n dsack_int_0_1__un0_n dtack_sync_0_un3_n dtack_sync_0_un1_n dtack_sync_0_un0_n uds_000_int_0_un3_n \
+# uds_000_int_0_un1_n uds_000_int_0_un0_n lds_000_int_0_un3_n lds_000_int_0_un1_n lds_000_int_0_un0_n a_15__n a_14__n a_13__n a_12__n a_c_16__n \
+# a_11__n a_c_17__n a_10__n a_c_18__n a_9__n a_c_19__n a_8__n a_c_20__n a_7__n a_c_21__n \
+# a_6__n a_c_22__n a_5__n a_c_23__n a_4__n a_c_24__n a_3__n a_c_25__n a_2__n a_c_26__n \
+# a_1__n a_c_27__n a_c_28__n a_c_29__n a_c_30__n a_c_31__n nEXP_SPACE_c BG_030_c BG_000DFFSHreg
.model bus68030
.inputs SIZE_1_.BLIF A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF AS_030.BLIF DS_030.BLIF nEXP_SPACE.BLIF BG_030.BLIF BGACK_000.BLIF \
CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF VPA.BLIF RST.BLIF RW.BLIF SIZE_0_.BLIF A_30_.BLIF A_29_.BLIF \
A_28_.BLIF A_27_.BLIF A_26_.BLIF A_25_.BLIF A_24_.BLIF A_23_.BLIF A_22_.BLIF A_21_.BLIF A_20_.BLIF \
A_19_.BLIF A_18_.BLIF A_17_.BLIF A_16_.BLIF A_15_.BLIF A_14_.BLIF A_13_.BLIF A_12_.BLIF A_11_.BLIF \
A_10_.BLIF A_9_.BLIF A_8_.BLIF A_7_.BLIF A_6_.BLIF A_5_.BLIF A_4_.BLIF A_3_.BLIF A_2_.BLIF \
- A_1_.BLIF A_0_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF DSACK_1_.BLIF DTACK.BLIF DSACK_0_.BLIF ipl_c_0__n.BLIF ipl_c_1__n.BLIF ipl_c_2__n.BLIF inst_BGACK_030_INTreg.BLIF \
- inst_FPU_CS_INTreg.BLIF dsack_c_1__n.BLIF cpu_est_3_reg.BLIF inst_VMA_INTreg.BLIF DTACK_c.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF inst_AS_000_INTreg.BLIF inst_AS_030_000_SYNC.BLIF \
- inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF RST_c.BLIF inst_CLK_000_D1.BLIF inst_CLK_OUT_PRE.BLIF RESETDFFreg.BLIF vcc_n_n.BLIF \
- gnd_n_n.BLIF RW_c.BLIF cpu_est_2_.BLIF CLK_CNT_0_.BLIF fc_c_0__n.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_7_.BLIF fc_c_1__n.BLIF inst_UDS_000_INTreg.BLIF \
- inst_LDS_000_INTreg.BLIF DSACK_INT_1_.BLIF state_machine_un60_clk_000_d0_n.BLIF SM_AMIGA_1_.BLIF inst_DTACK_DMA.BLIF N_100_i.BLIF SM_AMIGA_4_.BLIF sm_amiga_ns_0_2__n.BLIF SM_AMIGA_3_.BLIF \
- N_103_i.BLIF DSACK_INT_1_sqmuxa.BLIF N_104_i.BLIF state_machine_un13_as_000_int_n.BLIF VPA_SYNC_1_sqmuxa_1.BLIF N_106_i.BLIF un1_as_030_4.BLIF N_105_i.BLIF SM_AMIGA_5_.BLIF \
- sm_amiga_ns_0_5__n.BLIF SM_AMIGA_2_.BLIF N_107_i.BLIF SM_AMIGA_0_.BLIF N_108_i.BLIF state_machine_lds_000_int_8_n.BLIF sm_amiga_ns_0_6__n.BLIF state_machine_uds_000_int_8_n.BLIF N_90_i.BLIF \
- N_93_0.BLIF N_128_i.BLIF N_126_i.BLIF N_127_i.BLIF N_129_i.BLIF clk_cpu_est_11_0_1__n.BLIF N_133_i.BLIF N_132_i.BLIF N_134_i.BLIF \
- clk_cpu_est_11_0_3__n.BLIF N_125_i.BLIF cpu_est_0_0_.BLIF N_124_i.BLIF N_130_i.BLIF N_131_i.BLIF N_121_i.BLIF N_91_0.BLIF N_109_i.BLIF \
- sm_amiga_ns_0_7__n.BLIF CLK_OUT_PRE_0.BLIF state_machine_un8_clk_000_d0_i_n.BLIF state_machine_un13_clk_000_d0_i_n.BLIF state_machine_un15_clk_000_d0_0_n.BLIF BG_030_c_i.BLIF state_machine_un1_clk_030_0_n.BLIF clk_un4_clk_000_d1_n.BLIF state_machine_un17_clk_030_0_n.BLIF \
- N_144.BLIF un1_as_030_3_0.BLIF N_101.BLIF state_machine_as_030_000_sync_3_2_n.BLIF VPA_SYNC_1_sqmuxa.BLIF N_96_i.BLIF N_97.BLIF un1_bg_030_0.BLIF state_machine_un34_clk_000_d0_n.BLIF \
- clk_un4_clk_000_d1_i_n.BLIF N_96.BLIF state_machine_un6_bgack_000_0_n.BLIF N_102.BLIF N_98_i.BLIF UDS_000_INT_0_sqmuxa.BLIF UDS_000_INT_0_sqmuxa_1.BLIF N_111_i.BLIF N_167.BLIF \
- N_99_i.BLIF N_170.BLIF N_92.BLIF N_92_0.BLIF N_91.BLIF state_machine_un34_clk_000_d0_i_n.BLIF N_99.BLIF a_c_i_0__n.BLIF N_111.BLIF \
- size_c_i_1__n.BLIF N_98.BLIF N_102_i.BLIF state_machine_un6_bgack_000_n.BLIF state_machine_un42_clk_030_n.BLIF N_144_i.BLIF DTACK_SYNC_1_sqmuxa.BLIF state_machine_lds_000_int_8_0_n.BLIF un1_bg_030.BLIF \
- state_machine_uds_000_int_8_0_n.BLIF state_machine_as_030_000_sync_3_n.BLIF state_machine_un60_clk_000_d0_i_n.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF un1_bg_030_0_1.BLIF un1_as_030_3.BLIF un1_bg_030_0_2.BLIF state_machine_un17_clk_030_n.BLIF state_machine_as_030_000_sync_3_2_1_n.BLIF \
- state_machine_un1_clk_030_n.BLIF clk_cpu_est_11_0_1_3__n.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF clk_cpu_est_11_0_1_1__n.BLIF state_machine_un15_clk_000_d0_n.BLIF clk_cpu_est_11_0_2_1__n.BLIF state_machine_un13_clk_000_d0_n.BLIF N_167_1.BLIF state_machine_un8_clk_000_d0_n.BLIF \
- N_167_2.BLIF N_109.BLIF N_167_3.BLIF state_machine_un13_clk_000_d0_1_n.BLIF N_167_4.BLIF N_129.BLIF N_167_5.BLIF state_machine_un13_clk_000_d0_2_n.BLIF N_167_6.BLIF \
- N_130.BLIF N_170_1.BLIF N_131.BLIF N_170_2.BLIF N_124.BLIF UDS_000_INT_0_sqmuxa_1_1.BLIF N_125.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF N_134.BLIF \
- UDS_000_INT_0_sqmuxa_1_3.BLIF N_134_1.BLIF UDS_000_INT_0_sqmuxa_1_0.BLIF N_106.BLIF UDS_000_INT_0_sqmuxa_2.BLIF clk_cpu_est_11_3__n.BLIF state_machine_un34_clk_000_d0_i_1_n.BLIF N_132.BLIF state_machine_un42_clk_030_1_n.BLIF \
- N_133.BLIF state_machine_un42_clk_030_2_n.BLIF clk_cpu_est_11_1__n.BLIF state_machine_un42_clk_030_3_n.BLIF N_127.BLIF state_machine_un42_clk_030_4_n.BLIF N_126.BLIF state_machine_un42_clk_030_5_n.BLIF N_128.BLIF \
- DTACK_SYNC_1_sqmuxa_1_0.BLIF N_93.BLIF N_130_1.BLIF N_90.BLIF N_131_1.BLIF N_107.BLIF state_machine_un8_clk_000_d0_1_n.BLIF N_108.BLIF state_machine_un8_clk_000_d0_2_n.BLIF \
- N_105.BLIF state_machine_un8_clk_000_d0_3_n.BLIF N_103.BLIF state_machine_un8_clk_000_d0_4_n.BLIF N_104.BLIF state_machine_un13_clk_000_d0_1_0_n.BLIF N_100.BLIF state_machine_un13_clk_000_d0_2_0_n.BLIF AS_000_INT_1_sqmuxa.BLIF \
- VPA_SYNC_1_sqmuxa_1_1.BLIF RW_i.BLIF VPA_SYNC_1_sqmuxa_2.BLIF nEXP_SPACE_i.BLIF VPA_SYNC_1_sqmuxa_3.BLIF N_101_i.BLIF VPA_SYNC_1_sqmuxa_4.BLIF AS_000_INT_i.BLIF N_106_1.BLIF \
- dsack_i_1__n.BLIF cpu_est_0_3__un3_n.BLIF AS_030_i.BLIF cpu_est_0_3__un1_n.BLIF CLK_000_D0_i.BLIF cpu_est_0_3__un0_n.BLIF sm_amiga_i_3__n.BLIF cpu_est_0_1__un3_n.BLIF sm_amiga_i_4__n.BLIF \
- cpu_est_0_1__un1_n.BLIF CLK_000_D1_i.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_i_0__n.BLIF as_000_int_0_un3_n.BLIF cpu_est_i_3__n.BLIF as_000_int_0_un1_n.BLIF cpu_est_i_2__n.BLIF as_000_int_0_un0_n.BLIF \
- VPA_D_i.BLIF bg_000_0_un3_n.BLIF VMA_INT_i.BLIF bg_000_0_un1_n.BLIF cpu_est_i_1__n.BLIF bg_000_0_un0_n.BLIF state_machine_un13_clk_000_d0_2_i_n.BLIF as_030_000_sync_0_un3_n.BLIF state_machine_un13_clk_000_d0_1_i_n.BLIF \
- as_030_000_sync_0_un1_n.BLIF DTACK_i.BLIF as_030_000_sync_0_un0_n.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF fpu_cs_int_0_un3_n.BLIF a_i_18__n.BLIF fpu_cs_int_0_un1_n.BLIF a_i_16__n.BLIF fpu_cs_int_0_un0_n.BLIF \
- a_i_19__n.BLIF dtack_sync_0_un3_n.BLIF CLK_030_i.BLIF dtack_sync_0_un1_n.BLIF state_machine_un42_clk_030_i_n.BLIF dtack_sync_0_un0_n.BLIF sm_amiga_i_6__n.BLIF vma_int_0_un3_n.BLIF sm_amiga_i_7__n.BLIF \
- vma_int_0_un1_n.BLIF AS_030_000_SYNC_i.BLIF vma_int_0_un0_n.BLIF DS_030_i.BLIF cpu_est_0_2__un3_n.BLIF UDS_000_INT_0_sqmuxa_1_i.BLIF cpu_est_0_2__un1_n.BLIF UDS_000_INT_0_sqmuxa_i.BLIF cpu_est_0_2__un0_n.BLIF \
- sm_amiga_i_5__n.BLIF ipl_030_0_0__un3_n.BLIF VPA_SYNC_1_sqmuxa_i.BLIF ipl_030_0_0__un1_n.BLIF N_97_i.BLIF ipl_030_0_0__un0_n.BLIF a_i_30__n.BLIF ipl_030_0_1__un3_n.BLIF a_i_31__n.BLIF \
- ipl_030_0_1__un1_n.BLIF a_i_28__n.BLIF ipl_030_0_1__un0_n.BLIF a_i_29__n.BLIF ipl_030_0_2__un3_n.BLIF a_i_26__n.BLIF ipl_030_0_2__un1_n.BLIF a_i_27__n.BLIF ipl_030_0_2__un0_n.BLIF \
- a_i_24__n.BLIF bgack_030_int_0_un3_n.BLIF a_i_25__n.BLIF bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF RST_i.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un1_n.BLIF FPU_CS_INT_i.BLIF \
- uds_000_int_0_un0_n.BLIF BGACK_030_INT_i.BLIF lds_000_int_0_un3_n.BLIF AS_030_c.BLIF lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF vpa_sync_0_un3_n.BLIF DS_030_c.BLIF vpa_sync_0_un1_n.BLIF \
- vpa_sync_0_un0_n.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un1_n.BLIF size_c_0__n.BLIF dsack_int_0_1__un0_n.BLIF a_15__n.BLIF size_c_1__n.BLIF a_14__n.BLIF a_c_0__n.BLIF \
- a_13__n.BLIF a_12__n.BLIF a_11__n.BLIF a_10__n.BLIF a_9__n.BLIF a_8__n.BLIF a_7__n.BLIF a_6__n.BLIF a_c_16__n.BLIF \
- a_5__n.BLIF a_c_17__n.BLIF a_4__n.BLIF a_c_18__n.BLIF a_3__n.BLIF a_c_19__n.BLIF a_2__n.BLIF a_c_20__n.BLIF a_1__n.BLIF \
- a_c_21__n.BLIF a_c_22__n.BLIF a_c_23__n.BLIF a_c_24__n.BLIF a_c_25__n.BLIF a_c_26__n.BLIF a_c_27__n.BLIF a_c_28__n.BLIF a_c_29__n.BLIF \
- a_c_30__n.BLIF a_c_31__n.BLIF nEXP_SPACE_c.BLIF BG_030_c.BLIF BG_000DFFSHreg.BLIF BGACK_000_c.BLIF CLK_030_c.BLIF CLK_OSZI_c.BLIF CLK_OUT_INTreg.BLIF \
- IPL_030DFFSH_0_reg.BLIF IPL_030DFFSH_1_reg.BLIF IPL_030DFFSH_2_reg.BLIF DSACK_1_.PIN DTACK.PIN
+ A_1_.BLIF A_0_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF DSACK_1_.BLIF DTACK.BLIF DSACK_0_.BLIF BGACK_000_c.BLIF CLK_030_c.BLIF CLK_000_c.BLIF CLK_OSZI_c.BLIF \
+ inst_BGACK_030_INTreg.BLIF inst_FPU_CS_INTreg.BLIF cpu_est_3_reg.BLIF CLK_OUT_INTreg.BLIF inst_VMA_INTreg.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF IPL_030DFFSH_0_reg.BLIF inst_AS_000_INTreg.BLIF \
+ inst_AS_030_000_SYNC.BLIF IPL_030DFFSH_1_reg.BLIF inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF IPL_030DFFSH_2_reg.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF ipl_c_0__n.BLIF inst_CLK_000_D1.BLIF \
+ inst_CLK_000_D2.BLIF ipl_c_1__n.BLIF inst_CLK_OUT_PRE.BLIF SM_AMIGA_6_.BLIF ipl_c_2__n.BLIF vcc_n_n.BLIF gnd_n_n.BLIF cpu_est_2_.BLIF dsack_c_1__n.BLIF \
+ CLK_REF_1_.BLIF SM_AMIGA_7_.BLIF DTACK_c.BLIF inst_UDS_000_INTreg.BLIF inst_LDS_000_INTreg.BLIF DSACK_INT_1_.BLIF clk_un4_clk_000_d1_n.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_1_.BLIF \
+ inst_DTACK_DMA.BLIF clk_clk_cnt_n.BLIF RST_c.BLIF CLK_CNT_0_.BLIF CLK_CNT_1_.BLIF RESETDFFreg.BLIF state_machine_un14_as_000_int_n.BLIF SM_AMIGA_3_.BLIF RW_c.BLIF \
+ fc_c_0__n.BLIF un1_as_030_4.BLIF SM_AMIGA_5_.BLIF fc_c_1__n.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_0_.BLIF AMIGA_BUS_ENABLEDFFreg.BLIF state_machine_lds_000_int_7_n.BLIF state_machine_uds_000_int_7_n.BLIF \
+ N_101_i.BLIF N_102_i.BLIF N_103_i.BLIF N_90_0.BLIF N_91_0.BLIF N_127_i.BLIF N_128_i.BLIF CLK_OUT_PRE_0.BLIF N_118_i.BLIF \
+ N_125_i.BLIF cpu_est_0_0_.BLIF N_123_i.BLIF N_124_i.BLIF N_126_i.BLIF clk_cpu_est_11_0_1__n.BLIF N_131_i.BLIF clk_cpu_est_11_0_3__n.BLIF N_130_i.BLIF \
+ N_129_i.BLIF N_122_i.BLIF N_121_i.BLIF N_108_i.BLIF G_86.BLIF sm_amiga_ns_0_7__n.BLIF state_machine_un30_clk_000_d1_n.BLIF state_machine_un8_clk_000_d0_i_n.BLIF N_147.BLIF \
+ state_machine_un13_clk_000_d0_i_n.BLIF N_96.BLIF state_machine_un15_clk_000_d0_0_n.BLIF state_machine_un44_clk_000_d1_n.BLIF state_machine_un23_clk_000_d0_i_n.BLIF G_90.BLIF N_100_i.BLIF N_89.BLIF sm_amiga_ns_0_2__n.BLIF \
+ N_97.BLIF BG_030_c_i.BLIF N_90.BLIF state_machine_un1_clk_030_0_n.BLIF N_98.BLIF clk_un4_clk_000_d1_i_n.BLIF N_99.BLIF state_machine_un6_bgack_000_0_n.BLIF UDS_000_INT_0_sqmuxa.BLIF \
+ state_machine_un17_clk_030_0_n.BLIF UDS_000_INT_0_sqmuxa_1.BLIF un1_as_030_3_0.BLIF N_167.BLIF N_89_i.BLIF N_170.BLIF AMIGA_BUS_ENABLE_i_m_i.BLIF N_105.BLIF nEXP_SPACE_m_i.BLIF \
+ N_92.BLIF state_machine_amiga_bus_enable_2_iv_i_n.BLIF N_106.BLIF state_machine_as_030_000_sync_3_2_n.BLIF N_107.BLIF N_94_i.BLIF N_104.BLIF un1_bg_030_0.BLIF state_machine_un42_clk_030_n.BLIF \
+ N_105_i.BLIF un1_bg_030.BLIF N_104_i.BLIF N_94.BLIF sm_amiga_ns_0_5__n.BLIF state_machine_as_030_000_sync_3_n.BLIF N_106_i.BLIF AMIGA_BUS_ENABLE_i_m.BLIF N_107_i.BLIF \
+ nEXP_SPACE_m.BLIF N_95.BLIF CLK_OUT_PRE_i.BLIF un1_as_030_3.BLIF N_92_0.BLIF state_machine_un17_clk_030_n.BLIF state_machine_un44_clk_000_d1_i_n.BLIF state_machine_un6_bgack_000_n.BLIF a_c_i_0__n.BLIF \
+ state_machine_un1_clk_030_n.BLIF size_c_i_1__n.BLIF AS_000_INT_1_sqmuxa.BLIF N_98_i.BLIF DSACK_INT_1_sqmuxa.BLIF N_99_i.BLIF N_100.BLIF sm_amiga_ns_0_1__n.BLIF state_machine_un23_clk_000_d0_n.BLIF \
+ N_97_i.BLIF DTACK_SYNC_1_sqmuxa.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF N_147_i.BLIF VPA_SYNC_1_sqmuxa.BLIF state_machine_lds_000_int_7_0_n.BLIF VPA_SYNC_1_sqmuxa_1.BLIF state_machine_uds_000_int_7_0_n.BLIF state_machine_un15_clk_000_d0_n.BLIF \
+ un1_bg_030_0_1.BLIF clk_cpu_est_11_3__n.BLIF un1_bg_030_0_2.BLIF state_machine_un2_clk_000_n.BLIF state_machine_as_030_000_sync_3_2_1_n.BLIF state_machine_un13_clk_000_d0_n.BLIF clk_cpu_est_11_0_1_1__n.BLIF state_machine_un8_clk_000_d0_n.BLIF clk_cpu_est_11_0_2_1__n.BLIF \
+ N_108.BLIF N_167_1.BLIF state_machine_un13_clk_000_d0_1_n.BLIF N_167_2.BLIF N_124.BLIF N_167_3.BLIF N_126.BLIF N_167_4.BLIF state_machine_un13_clk_000_d0_2_n.BLIF \
+ N_167_5.BLIF N_129.BLIF N_167_6.BLIF N_122.BLIF N_170_1.BLIF N_130.BLIF N_170_2.BLIF N_121.BLIF UDS_000_INT_0_sqmuxa_1_1.BLIF \
+ N_131.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF N_127.BLIF UDS_000_INT_0_sqmuxa_1_3.BLIF clk_cpu_est_11_1__n.BLIF UDS_000_INT_0_sqmuxa_1_0.BLIF N_128.BLIF state_machine_un44_clk_000_d1_i_1_n.BLIF N_123.BLIF \
+ state_machine_un42_clk_030_1_n.BLIF N_125.BLIF state_machine_un42_clk_030_2_n.BLIF N_91.BLIF state_machine_un42_clk_030_3_n.BLIF N_102.BLIF state_machine_un42_clk_030_4_n.BLIF N_103.BLIF state_machine_un42_clk_030_5_n.BLIF \
+ N_101.BLIF N_96_1.BLIF RW_i.BLIF AMIGA_BUS_ENABLE_i_m_1.BLIF AS_000_INT_i.BLIF N_131_1.BLIF dsack_i_1__n.BLIF clk_cpu_est_11_0_1_3__n.BLIF sm_amiga_i_4__n.BLIF \
+ N_105_1.BLIF sm_amiga_i_5__n.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF CLK_000_D0_i.BLIF VPA_SYNC_1_sqmuxa_2.BLIF sm_amiga_i_3__n.BLIF VPA_SYNC_1_sqmuxa_3.BLIF cpu_est_i_0__n.BLIF VPA_SYNC_1_sqmuxa_4.BLIF \
+ cpu_est_i_2__n.BLIF VPA_SYNC_1_sqmuxa_5.BLIF state_machine_un13_clk_000_d0_2_i_n.BLIF VPA_SYNC_1_sqmuxa_6.BLIF cpu_est_i_3__n.BLIF DTACK_SYNC_1_sqmuxa_1_0.BLIF VPA_D_i.BLIF DTACK_SYNC_1_sqmuxa_2.BLIF cpu_est_i_1__n.BLIF \
+ state_machine_un8_clk_000_d0_1_n.BLIF DTACK_i.BLIF state_machine_un8_clk_000_d0_2_n.BLIF VMA_INT_i.BLIF state_machine_un8_clk_000_d0_3_n.BLIF state_machine_un13_clk_000_d0_1_i_n.BLIF state_machine_un8_clk_000_d0_4_n.BLIF AS_030_i.BLIF state_machine_un13_clk_000_d0_1_0_n.BLIF \
+ DTACK_SYNC_1_sqmuxa_i.BLIF state_machine_un13_clk_000_d0_2_0_n.BLIF VPA_SYNC_1_sqmuxa_i.BLIF N_127_1.BLIF CLK_000_D1_i.BLIF N_128_1.BLIF N_95_i.BLIF ipl_030_0_2__un3_n.BLIF N_96_i.BLIF \
+ ipl_030_0_2__un1_n.BLIF a_i_18__n.BLIF ipl_030_0_2__un0_n.BLIF a_i_16__n.BLIF ipl_030_0_1__un3_n.BLIF a_i_19__n.BLIF ipl_030_0_1__un1_n.BLIF CLK_030_i.BLIF ipl_030_0_1__un0_n.BLIF \
+ CLK_000_D2_i.BLIF ipl_030_0_0__un3_n.BLIF state_machine_un42_clk_030_i_n.BLIF ipl_030_0_0__un1_n.BLIF sm_amiga_i_6__n.BLIF ipl_030_0_0__un0_n.BLIF sm_amiga_i_7__n.BLIF cpu_est_0_2__un3_n.BLIF AMIGA_BUS_ENABLE_i.BLIF \
+ cpu_est_0_2__un1_n.BLIF nEXP_SPACE_i.BLIF cpu_est_0_2__un0_n.BLIF sm_amiga_i_2__n.BLIF cpu_est_0_1__un3_n.BLIF sm_amiga_i_1__n.BLIF cpu_est_0_1__un1_n.BLIF DS_030_i.BLIF cpu_est_0_1__un0_n.BLIF \
+ AS_030_000_SYNC_i.BLIF vpa_sync_0_un3_n.BLIF UDS_000_INT_0_sqmuxa_1_i.BLIF vpa_sync_0_un1_n.BLIF UDS_000_INT_0_sqmuxa_i.BLIF vpa_sync_0_un0_n.BLIF clk_clk_cnt_i_n.BLIF vma_int_0_un3_n.BLIF clk_cnt_i_0__n.BLIF \
+ vma_int_0_un1_n.BLIF a_i_30__n.BLIF vma_int_0_un0_n.BLIF a_i_31__n.BLIF cpu_est_0_3__un3_n.BLIF a_i_28__n.BLIF cpu_est_0_3__un1_n.BLIF a_i_29__n.BLIF cpu_est_0_3__un0_n.BLIF \
+ a_i_26__n.BLIF bgack_030_int_0_un3_n.BLIF a_i_27__n.BLIF bgack_030_int_0_un1_n.BLIF a_i_24__n.BLIF bgack_030_int_0_un0_n.BLIF a_i_25__n.BLIF bg_000_0_un3_n.BLIF N_132_i.BLIF \
+ bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF RST_i.BLIF amiga_bus_enable_0_un3_n.BLIF FPU_CS_INT_i.BLIF amiga_bus_enable_0_un1_n.BLIF BGACK_030_INT_i.BLIF amiga_bus_enable_0_un0_n.BLIF AS_030_c.BLIF \
+ as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF DS_030_c.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF as_000_int_0_un3_n.BLIF size_c_0__n.BLIF \
+ as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF size_c_1__n.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un1_n.BLIF a_c_0__n.BLIF dsack_int_0_1__un0_n.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un1_n.BLIF \
+ dtack_sync_0_un0_n.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF a_15__n.BLIF a_14__n.BLIF \
+ a_13__n.BLIF a_12__n.BLIF a_c_16__n.BLIF a_11__n.BLIF a_c_17__n.BLIF a_10__n.BLIF a_c_18__n.BLIF a_9__n.BLIF a_c_19__n.BLIF \
+ a_8__n.BLIF a_c_20__n.BLIF a_7__n.BLIF a_c_21__n.BLIF a_6__n.BLIF a_c_22__n.BLIF a_5__n.BLIF a_c_23__n.BLIF a_4__n.BLIF \
+ a_c_24__n.BLIF a_3__n.BLIF a_c_25__n.BLIF a_2__n.BLIF a_c_26__n.BLIF a_1__n.BLIF a_c_27__n.BLIF a_c_28__n.BLIF a_c_29__n.BLIF \
+ a_c_30__n.BLIF a_c_31__n.BLIF nEXP_SPACE_c.BLIF BG_030_c.BLIF BG_000DFFSHreg.BLIF DSACK_1_.PIN DTACK.PIN
.outputs IPL_030_2_ AS_000 UDS_000 LDS_000 BERR BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS AVEC \
- AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_3_.D \
- SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR \
- IPL_030DFFSH_0_reg.D IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D SM_AMIGA_7_.C \
- SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR DSACK_INT_1_.D \
- DSACK_INT_1_.C DSACK_INT_1_.AP inst_VMA_INTreg.D inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C cpu_est_0_.D \
- cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C cpu_est_2_.D cpu_est_2_.C cpu_est_3_reg.D cpu_est_3_reg.C inst_LDS_000_INTreg.D inst_LDS_000_INTreg.C inst_LDS_000_INTreg.AP inst_DTACK_SYNC.D \
- inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_FPU_CS_INTreg.D inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_AS_000_INTreg.D inst_AS_000_INTreg.C inst_AS_000_INTreg.AP \
- inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP inst_DTACK_DMA.D inst_DTACK_DMA.C inst_DTACK_DMA.AP inst_UDS_000_INTreg.D inst_UDS_000_INTreg.C \
- inst_UDS_000_INTreg.AP CLK_CNT_0_.D CLK_CNT_0_.C inst_VPA_D.D inst_VPA_D.C inst_CLK_000_D0.D inst_CLK_000_D0.C RESETDFFreg.D RESETDFFreg.C inst_CLK_000_D1.D inst_CLK_000_D1.C \
- CLK_OUT_INTreg.D CLK_OUT_INTreg.C cpu_est_0_0_.X1 cpu_est_0_0_.X2 CLK_OUT_PRE_0.X1 CLK_OUT_PRE_0.X2 DSACK_1_ DTACK DSACK_0_ ipl_c_0__n ipl_c_1__n ipl_c_2__n dsack_c_1__n DTACK_c \
- RST_c vcc_n_n gnd_n_n RW_c fc_c_0__n fc_c_1__n state_machine_un60_clk_000_d0_n N_100_i sm_amiga_ns_0_2__n N_103_i DSACK_INT_1_sqmuxa \
- N_104_i state_machine_un13_as_000_int_n VPA_SYNC_1_sqmuxa_1 N_106_i un1_as_030_4 N_105_i sm_amiga_ns_0_5__n N_107_i N_108_i state_machine_lds_000_int_8_n sm_amiga_ns_0_6__n \
- state_machine_uds_000_int_8_n N_90_i N_93_0 N_128_i N_126_i N_127_i N_129_i clk_cpu_est_11_0_1__n N_133_i N_132_i N_134_i \
- clk_cpu_est_11_0_3__n N_125_i N_124_i N_130_i N_131_i N_121_i N_91_0 N_109_i sm_amiga_ns_0_7__n state_machine_un8_clk_000_d0_i_n state_machine_un13_clk_000_d0_i_n \
- state_machine_un15_clk_000_d0_0_n BG_030_c_i state_machine_un1_clk_030_0_n clk_un4_clk_000_d1_n state_machine_un17_clk_030_0_n N_144 un1_as_030_3_0 N_101 state_machine_as_030_000_sync_3_2_n VPA_SYNC_1_sqmuxa N_96_i \
- N_97 un1_bg_030_0 state_machine_un34_clk_000_d0_n clk_un4_clk_000_d1_i_n N_96 state_machine_un6_bgack_000_0_n N_102 N_98_i UDS_000_INT_0_sqmuxa UDS_000_INT_0_sqmuxa_1 N_111_i \
- N_167 N_99_i N_170 N_92 N_92_0 N_91 state_machine_un34_clk_000_d0_i_n N_99 a_c_i_0__n N_111 size_c_i_1__n \
- N_98 N_102_i state_machine_un6_bgack_000_n state_machine_un42_clk_030_n N_144_i DTACK_SYNC_1_sqmuxa state_machine_lds_000_int_8_0_n un1_bg_030 state_machine_uds_000_int_8_0_n state_machine_as_030_000_sync_3_n state_machine_un60_clk_000_d0_i_n \
- DTACK_SYNC_1_sqmuxa_1 un1_bg_030_0_1 un1_as_030_3 un1_bg_030_0_2 state_machine_un17_clk_030_n state_machine_as_030_000_sync_3_2_1_n state_machine_un1_clk_030_n clk_cpu_est_11_0_1_3__n VPA_SYNC_1_sqmuxa_1_0 clk_cpu_est_11_0_1_1__n state_machine_un15_clk_000_d0_n \
- clk_cpu_est_11_0_2_1__n state_machine_un13_clk_000_d0_n N_167_1 state_machine_un8_clk_000_d0_n N_167_2 N_109 N_167_3 state_machine_un13_clk_000_d0_1_n N_167_4 N_129 N_167_5 \
- state_machine_un13_clk_000_d0_2_n N_167_6 N_130 N_170_1 N_131 N_170_2 N_124 UDS_000_INT_0_sqmuxa_1_1 N_125 UDS_000_INT_0_sqmuxa_1_2 N_134 \
- UDS_000_INT_0_sqmuxa_1_3 N_134_1 UDS_000_INT_0_sqmuxa_1_0 N_106 UDS_000_INT_0_sqmuxa_2 clk_cpu_est_11_3__n state_machine_un34_clk_000_d0_i_1_n N_132 state_machine_un42_clk_030_1_n N_133 state_machine_un42_clk_030_2_n \
- clk_cpu_est_11_1__n state_machine_un42_clk_030_3_n N_127 state_machine_un42_clk_030_4_n N_126 state_machine_un42_clk_030_5_n N_128 DTACK_SYNC_1_sqmuxa_1_0 N_93 N_130_1 N_90 \
- N_131_1 N_107 state_machine_un8_clk_000_d0_1_n N_108 state_machine_un8_clk_000_d0_2_n N_105 state_machine_un8_clk_000_d0_3_n N_103 state_machine_un8_clk_000_d0_4_n N_104 state_machine_un13_clk_000_d0_1_0_n \
- N_100 state_machine_un13_clk_000_d0_2_0_n AS_000_INT_1_sqmuxa VPA_SYNC_1_sqmuxa_1_1 RW_i VPA_SYNC_1_sqmuxa_2 nEXP_SPACE_i VPA_SYNC_1_sqmuxa_3 N_101_i VPA_SYNC_1_sqmuxa_4 AS_000_INT_i \
- N_106_1 dsack_i_1__n cpu_est_0_3__un3_n AS_030_i cpu_est_0_3__un1_n CLK_000_D0_i cpu_est_0_3__un0_n sm_amiga_i_3__n cpu_est_0_1__un3_n sm_amiga_i_4__n cpu_est_0_1__un1_n \
- CLK_000_D1_i cpu_est_0_1__un0_n cpu_est_i_0__n as_000_int_0_un3_n cpu_est_i_3__n as_000_int_0_un1_n cpu_est_i_2__n as_000_int_0_un0_n VPA_D_i bg_000_0_un3_n VMA_INT_i \
- bg_000_0_un1_n cpu_est_i_1__n bg_000_0_un0_n state_machine_un13_clk_000_d0_2_i_n as_030_000_sync_0_un3_n state_machine_un13_clk_000_d0_1_i_n as_030_000_sync_0_un1_n DTACK_i as_030_000_sync_0_un0_n DTACK_SYNC_1_sqmuxa_i fpu_cs_int_0_un3_n \
- a_i_18__n fpu_cs_int_0_un1_n a_i_16__n fpu_cs_int_0_un0_n a_i_19__n dtack_sync_0_un3_n CLK_030_i dtack_sync_0_un1_n state_machine_un42_clk_030_i_n dtack_sync_0_un0_n sm_amiga_i_6__n \
- vma_int_0_un3_n sm_amiga_i_7__n vma_int_0_un1_n AS_030_000_SYNC_i vma_int_0_un0_n DS_030_i cpu_est_0_2__un3_n UDS_000_INT_0_sqmuxa_1_i cpu_est_0_2__un1_n UDS_000_INT_0_sqmuxa_i cpu_est_0_2__un0_n \
- sm_amiga_i_5__n ipl_030_0_0__un3_n VPA_SYNC_1_sqmuxa_i ipl_030_0_0__un1_n N_97_i ipl_030_0_0__un0_n a_i_30__n ipl_030_0_1__un3_n a_i_31__n ipl_030_0_1__un1_n a_i_28__n \
- ipl_030_0_1__un0_n a_i_29__n ipl_030_0_2__un3_n a_i_26__n ipl_030_0_2__un1_n a_i_27__n ipl_030_0_2__un0_n a_i_24__n bgack_030_int_0_un3_n a_i_25__n bgack_030_int_0_un1_n \
- bgack_030_int_0_un0_n RST_i uds_000_int_0_un3_n uds_000_int_0_un1_n FPU_CS_INT_i uds_000_int_0_un0_n BGACK_030_INT_i lds_000_int_0_un3_n AS_030_c lds_000_int_0_un1_n lds_000_int_0_un0_n \
- vpa_sync_0_un3_n DS_030_c vpa_sync_0_un1_n vpa_sync_0_un0_n dsack_int_0_1__un3_n dsack_int_0_1__un1_n size_c_0__n dsack_int_0_1__un0_n a_15__n size_c_1__n a_14__n \
- a_c_0__n a_13__n a_12__n a_11__n a_10__n a_9__n a_8__n a_7__n a_6__n a_c_16__n a_5__n \
- a_c_17__n a_4__n a_c_18__n a_3__n a_c_19__n a_2__n a_c_20__n a_1__n a_c_21__n a_c_22__n a_c_23__n \
- a_c_24__n a_c_25__n a_c_26__n a_c_27__n a_c_28__n a_c_29__n a_c_30__n a_c_31__n nEXP_SPACE_c BG_030_c BGACK_000_c \
- CLK_030_c CLK_OSZI_c DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE LDS_000.OE BERR.OE DSACK_0_.OE \
- AVEC_EXP.OE CIIN.OE
+ AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_5_.D \
+ SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR \
+ SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR cpu_est_2_.D cpu_est_2_.C cpu_est_3_reg.D cpu_est_3_reg.C IPL_030DFFSH_0_reg.D \
+ IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP \
+ SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP CLK_CNT_0_.D CLK_CNT_0_.C CLK_CNT_1_.D \
+ CLK_CNT_1_.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_FPU_CS_INTreg.D inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP \
+ inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_AS_000_INTreg.D inst_AS_000_INTreg.C inst_AS_000_INTreg.AP AMIGA_BUS_ENABLEDFFreg.D AMIGA_BUS_ENABLEDFFreg.C BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP \
+ DSACK_INT_1_.D DSACK_INT_1_.C DSACK_INT_1_.AP inst_VMA_INTreg.D inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_UDS_000_INTreg.D inst_UDS_000_INTreg.C inst_UDS_000_INTreg.AP inst_LDS_000_INTreg.D inst_LDS_000_INTreg.C \
+ inst_LDS_000_INTreg.AP inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_DTACK_DMA.D inst_DTACK_DMA.C inst_DTACK_DMA.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_000_D2.D inst_CLK_000_D2.C \
+ inst_VPA_D.D inst_VPA_D.C inst_CLK_000_D0.D inst_CLK_000_D0.C RESETDFFreg.D RESETDFFreg.C inst_CLK_000_D1.D inst_CLK_000_D1.C CLK_REF_1_.D CLK_REF_1_.LH CLK_REF_1_.AR \
+ cpu_est_0_0_.X1 cpu_est_0_0_.X2 G_90.X1 G_90.X2 G_86.X1 G_86.X2 CLK_OUT_PRE_0.X1 CLK_OUT_PRE_0.X2 DSACK_1_ DTACK DSACK_0_ BGACK_000_c CLK_030_c CLK_000_c \
+ CLK_OSZI_c ipl_c_0__n ipl_c_1__n ipl_c_2__n vcc_n_n gnd_n_n dsack_c_1__n DTACK_c clk_un4_clk_000_d1_n clk_clk_cnt_n RST_c \
+ state_machine_un14_as_000_int_n RW_c fc_c_0__n un1_as_030_4 fc_c_1__n state_machine_lds_000_int_7_n state_machine_uds_000_int_7_n N_101_i N_102_i N_103_i N_90_0 \
+ N_91_0 N_127_i N_128_i N_118_i N_125_i N_123_i N_124_i N_126_i clk_cpu_est_11_0_1__n N_131_i clk_cpu_est_11_0_3__n \
+ N_130_i N_129_i N_122_i N_121_i N_108_i sm_amiga_ns_0_7__n state_machine_un30_clk_000_d1_n state_machine_un8_clk_000_d0_i_n N_147 state_machine_un13_clk_000_d0_i_n N_96 \
+ state_machine_un15_clk_000_d0_0_n state_machine_un44_clk_000_d1_n state_machine_un23_clk_000_d0_i_n N_100_i N_89 sm_amiga_ns_0_2__n N_97 BG_030_c_i N_90 state_machine_un1_clk_030_0_n N_98 \
+ clk_un4_clk_000_d1_i_n N_99 state_machine_un6_bgack_000_0_n UDS_000_INT_0_sqmuxa state_machine_un17_clk_030_0_n UDS_000_INT_0_sqmuxa_1 un1_as_030_3_0 N_167 N_89_i N_170 AMIGA_BUS_ENABLE_i_m_i \
+ N_105 nEXP_SPACE_m_i N_92 state_machine_amiga_bus_enable_2_iv_i_n N_106 state_machine_as_030_000_sync_3_2_n N_107 N_94_i N_104 un1_bg_030_0 state_machine_un42_clk_030_n \
+ N_105_i un1_bg_030 N_104_i N_94 sm_amiga_ns_0_5__n state_machine_as_030_000_sync_3_n N_106_i AMIGA_BUS_ENABLE_i_m N_107_i nEXP_SPACE_m N_95 \
+ CLK_OUT_PRE_i un1_as_030_3 N_92_0 state_machine_un17_clk_030_n state_machine_un44_clk_000_d1_i_n state_machine_un6_bgack_000_n a_c_i_0__n state_machine_un1_clk_030_n size_c_i_1__n AS_000_INT_1_sqmuxa N_98_i \
+ DSACK_INT_1_sqmuxa N_99_i N_100 sm_amiga_ns_0_1__n state_machine_un23_clk_000_d0_n N_97_i DTACK_SYNC_1_sqmuxa DTACK_SYNC_1_sqmuxa_1 N_147_i VPA_SYNC_1_sqmuxa state_machine_lds_000_int_7_0_n \
+ VPA_SYNC_1_sqmuxa_1 state_machine_uds_000_int_7_0_n state_machine_un15_clk_000_d0_n un1_bg_030_0_1 clk_cpu_est_11_3__n un1_bg_030_0_2 state_machine_un2_clk_000_n state_machine_as_030_000_sync_3_2_1_n state_machine_un13_clk_000_d0_n clk_cpu_est_11_0_1_1__n state_machine_un8_clk_000_d0_n \
+ clk_cpu_est_11_0_2_1__n N_108 N_167_1 state_machine_un13_clk_000_d0_1_n N_167_2 N_124 N_167_3 N_126 N_167_4 state_machine_un13_clk_000_d0_2_n N_167_5 \
+ N_129 N_167_6 N_122 N_170_1 N_130 N_170_2 N_121 UDS_000_INT_0_sqmuxa_1_1 N_131 UDS_000_INT_0_sqmuxa_1_2 N_127 \
+ UDS_000_INT_0_sqmuxa_1_3 clk_cpu_est_11_1__n UDS_000_INT_0_sqmuxa_1_0 N_128 state_machine_un44_clk_000_d1_i_1_n N_123 state_machine_un42_clk_030_1_n N_125 state_machine_un42_clk_030_2_n N_91 state_machine_un42_clk_030_3_n \
+ N_102 state_machine_un42_clk_030_4_n N_103 state_machine_un42_clk_030_5_n N_101 N_96_1 RW_i AMIGA_BUS_ENABLE_i_m_1 AS_000_INT_i N_131_1 dsack_i_1__n \
+ clk_cpu_est_11_0_1_3__n sm_amiga_i_4__n N_105_1 sm_amiga_i_5__n VPA_SYNC_1_sqmuxa_1_0 CLK_000_D0_i VPA_SYNC_1_sqmuxa_2 sm_amiga_i_3__n VPA_SYNC_1_sqmuxa_3 cpu_est_i_0__n VPA_SYNC_1_sqmuxa_4 \
+ cpu_est_i_2__n VPA_SYNC_1_sqmuxa_5 state_machine_un13_clk_000_d0_2_i_n VPA_SYNC_1_sqmuxa_6 cpu_est_i_3__n DTACK_SYNC_1_sqmuxa_1_0 VPA_D_i DTACK_SYNC_1_sqmuxa_2 cpu_est_i_1__n state_machine_un8_clk_000_d0_1_n DTACK_i \
+ state_machine_un8_clk_000_d0_2_n VMA_INT_i state_machine_un8_clk_000_d0_3_n state_machine_un13_clk_000_d0_1_i_n state_machine_un8_clk_000_d0_4_n AS_030_i state_machine_un13_clk_000_d0_1_0_n DTACK_SYNC_1_sqmuxa_i state_machine_un13_clk_000_d0_2_0_n VPA_SYNC_1_sqmuxa_i N_127_1 \
+ CLK_000_D1_i N_128_1 N_95_i ipl_030_0_2__un3_n N_96_i ipl_030_0_2__un1_n a_i_18__n ipl_030_0_2__un0_n a_i_16__n ipl_030_0_1__un3_n a_i_19__n \
+ ipl_030_0_1__un1_n CLK_030_i ipl_030_0_1__un0_n CLK_000_D2_i ipl_030_0_0__un3_n state_machine_un42_clk_030_i_n ipl_030_0_0__un1_n sm_amiga_i_6__n ipl_030_0_0__un0_n sm_amiga_i_7__n cpu_est_0_2__un3_n \
+ AMIGA_BUS_ENABLE_i cpu_est_0_2__un1_n nEXP_SPACE_i cpu_est_0_2__un0_n sm_amiga_i_2__n cpu_est_0_1__un3_n sm_amiga_i_1__n cpu_est_0_1__un1_n DS_030_i cpu_est_0_1__un0_n AS_030_000_SYNC_i \
+ vpa_sync_0_un3_n UDS_000_INT_0_sqmuxa_1_i vpa_sync_0_un1_n UDS_000_INT_0_sqmuxa_i vpa_sync_0_un0_n clk_clk_cnt_i_n vma_int_0_un3_n clk_cnt_i_0__n vma_int_0_un1_n a_i_30__n vma_int_0_un0_n \
+ a_i_31__n cpu_est_0_3__un3_n a_i_28__n cpu_est_0_3__un1_n a_i_29__n cpu_est_0_3__un0_n a_i_26__n bgack_030_int_0_un3_n a_i_27__n bgack_030_int_0_un1_n a_i_24__n \
+ bgack_030_int_0_un0_n a_i_25__n bg_000_0_un3_n N_132_i bg_000_0_un1_n bg_000_0_un0_n RST_i amiga_bus_enable_0_un3_n FPU_CS_INT_i amiga_bus_enable_0_un1_n BGACK_030_INT_i \
+ amiga_bus_enable_0_un0_n AS_030_c as_030_000_sync_0_un3_n as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n DS_030_c fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n fpu_cs_int_0_un0_n as_000_int_0_un3_n size_c_0__n \
+ as_000_int_0_un1_n as_000_int_0_un0_n size_c_1__n dsack_int_0_1__un3_n dsack_int_0_1__un1_n a_c_0__n dsack_int_0_1__un0_n dtack_sync_0_un3_n dtack_sync_0_un1_n dtack_sync_0_un0_n uds_000_int_0_un3_n \
+ uds_000_int_0_un1_n uds_000_int_0_un0_n lds_000_int_0_un3_n lds_000_int_0_un1_n lds_000_int_0_un0_n a_15__n a_14__n a_13__n a_12__n a_c_16__n a_11__n \
+ a_c_17__n a_10__n a_c_18__n a_9__n a_c_19__n a_8__n a_c_20__n a_7__n a_c_21__n a_6__n a_c_22__n \
+ a_5__n a_c_23__n a_4__n a_c_24__n a_3__n a_c_25__n a_2__n a_c_26__n a_1__n a_c_27__n a_c_28__n \
+ a_c_29__n a_c_30__n a_c_31__n nEXP_SPACE_c BG_030_c DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE \
+ LDS_000.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE
.names DSACK_INT_1_.BLIF DSACK_1_
1 1
.names DSACK_1_.PIN dsack_c_1__n
@@ -162,844 +170,917 @@
1 1
.names N_167.BLIF CIIN.OE
1 1
-.names AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un3_n
+.names N_91_0.BLIF N_91
0 1
-.names inst_AS_000_INTreg.BLIF AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un1_n
+.names N_127.BLIF N_127_i
+0 1
+.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_101
11 1
-.names N_101_i.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n
+.names inst_AS_000_INTreg.BLIF AS_000_INT_i
+0 1
+.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C
+1 1
+.names dsack_c_1__n.BLIF dsack_i_1__n
+0 1
+.names AS_000_INT_i.BLIF dsack_i_1__n.BLIF state_machine_un14_as_000_int_n
11 1
-.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INTreg.D
+.names RST_i.BLIF SM_AMIGA_3_.AR
+1 1
+.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_2__un3_n
+0 1
+.names ipl_c_2__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_2__un1_n
+11 1
+.names IPL_030DFFSH_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n
+11 1
+.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF IPL_030DFFSH_2_reg.D
1- 1
-1 1
-.names CLK_OSZI_c.BLIF SM_AMIGA_7_.C
+.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C
1 1
-.names RW_c.BLIF RW_i
+.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_1__un3_n
0 1
-.names nEXP_SPACE_c.BLIF nEXP_SPACE_i
-0 1
-.names RST_i.BLIF SM_AMIGA_7_.AP
+.names ipl_c_1__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_1__un1_n
+11 1
+.names RST_i.BLIF SM_AMIGA_2_.AR
1 1
-.names N_100_i.BLIF N_101_i.BLIF sm_amiga_ns_0_2__n
+.names IPL_030DFFSH_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n
11 1
-.names inst_CLK_000_D1.BLIF CLK_000_D1_i
-0 1
-.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF clk_un4_clk_000_d1_n
-11 1
-.names inst_CLK_000_D0.BLIF SM_AMIGA_2_.BLIF N_108
-11 1
-.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C
-1 1
-.names N_90.BLIF SM_AMIGA_1_.BLIF N_107
-11 1
-.names CLK_000_D0_i.BLIF SM_AMIGA_2_.BLIF N_105
-11 1
-.names RST_i.BLIF SM_AMIGA_6_.AR
-1 1
-.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n
-0 1
-.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n
-0 1
-.names sm_amiga_i_3__n.BLIF sm_amiga_i_4__n.BLIF N_104
-11 1
-.names inst_CLK_000_D0.BLIF CLK_000_D0_i
-0 1
-.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C
-1 1
-.names CLK_000_D0_i.BLIF N_93.BLIF N_103
-11 1
-.names inst_CLK_000_D0.BLIF SM_AMIGA_5_.BLIF N_100
-11 1
-.names RST_i.BLIF SM_AMIGA_5_.AR
-1 1
-.names N_90_i.BLIF SM_AMIGA_1_.BLIF N_97
-11 1
-.names AS_030_c.BLIF AS_030_i
-0 1
-.names AS_030_i.BLIF N_101_i.BLIF AS_000_INT_1_sqmuxa
-11 1
-.names inst_CLK_000_D0.BLIF SM_AMIGA_3_.BLIF VPA_SYNC_1_sqmuxa_1_0
-11 1
-.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C
-1 1
-.names inst_AS_000_INTreg.BLIF inst_CLK_000_D0.BLIF state_machine_un13_clk_000_d0_1_n
-11 1
-.names N_125_i.BLIF cpu_est_i_2__n.BLIF N_133
-11 1
-.names RST_i.BLIF SM_AMIGA_4_.AR
-1 1
-.names N_125.BLIF cpu_est_3_reg.BLIF N_132
-11 1
-.names N_124_i.BLIF cpu_est_0_.BLIF N_128
-11 1
-.names cpu_est_3_reg.BLIF cpu_est_i_3__n
-0 1
-.names cpu_est_2_.BLIF cpu_est_i_2__n
-0 1
-.names CLK_OSZI_c.BLIF DSACK_INT_1_.C
-1 1
-.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_127
-11 1
-.names cpu_est_0_.BLIF cpu_est_i_0__n
-0 1
-.names RST_i.BLIF DSACK_INT_1_.AP
-1 1
-.names N_124.BLIF cpu_est_i_0__n.BLIF N_126
-11 1
-.names SM_AMIGA_3_.BLIF state_machine_un60_clk_000_d0_i_n.BLIF N_93_0
-11 1
-.names CLK_000_D1_i.BLIF inst_CLK_OUT_PRE.BLIF N_90_i
-11 1
-.names N_107_i.BLIF N_108_i.BLIF sm_amiga_ns_0_6__n
-11 1
-.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C
-1 1
-.names N_105_i.BLIF N_106_i.BLIF sm_amiga_ns_0_5__n
-11 1
-.names N_103_i.BLIF N_104_i.BLIF SM_AMIGA_3_.D
-11 1
-.names RST_i.BLIF inst_VMA_INTreg.AP
-1 1
-.names N_97_i.BLIF N_109_i.BLIF sm_amiga_ns_0_7__n
-11 1
-.names inst_AS_000_INTreg.BLIF SM_AMIGA_0_.BLIF N_91_0
-11 1
-.names cpu_est_3_reg.BLIF state_machine_un13_clk_000_d0_2_n.BLIF N_129
-11 1
-.names N_130_i.BLIF N_131_i.BLIF N_121_i
-11 1
-.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C
-1 1
-.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_124_i
-11 1
-.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_125_i
-11 1
-.names RST_i.BLIF inst_BGACK_030_INTreg.AP
-1 1
-.names state_machine_un13_clk_000_d0_2_n.BLIF state_machine_un13_clk_000_d0_2_i_n
-0 1
-.names N_134_1.BLIF cpu_est_i_2__n.BLIF N_134
-11 1
-.names cpu_est_1_.BLIF cpu_est_2_.BLIF state_machine_un13_clk_000_d0_2_n
-11 1
-.names cpu_est_1_.BLIF cpu_est_i_1__n
-0 1
-.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C
-1 1
-.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_134_1
-11 1
-.names inst_VPA_D.BLIF VPA_D_i
-0 1
-.names inst_VMA_INTreg.BLIF VMA_INT_i
-0 1
-.names CLK_OSZI_c.BLIF cpu_est_0_.C
-1 1
-.names a_c_16__n.BLIF a_i_16__n
-0 1
-.names state_machine_un1_clk_030_n.BLIF bg_000_0_un3_n
-0 1
-.names un1_bg_030.BLIF state_machine_un1_clk_030_n.BLIF bg_000_0_un1_n
-11 1
-.names CLK_OSZI_c.BLIF cpu_est_1_.C
-1 1
-.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n
-11 1
-.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF BG_000DFFSHreg.D
+.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF IPL_030DFFSH_1_reg.D
1- 1
-1 1
-.names state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un3_n
-0 1
-.names state_machine_as_030_000_sync_3_n.BLIF state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un1_n
-11 1
-.names CLK_OSZI_c.BLIF cpu_est_2_.C
-1 1
-.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n
-11 1
-.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF inst_AS_030_000_SYNC.D
-1- 1
--1 1
-.names state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un3_n
-0 1
-.names un1_as_030_3.BLIF state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un1_n
-11 1
-.names CLK_OSZI_c.BLIF cpu_est_3_reg.C
-1 1
-.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n
-11 1
-.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D
-1- 1
--1 1
-.names DTACK_SYNC_1_sqmuxa.BLIF DTACK_SYNC_1_sqmuxa_i
-0 1
-.names DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un3_n
-0 1
-.names CLK_OSZI_c.BLIF inst_LDS_000_INTreg.C
-1 1
-.names inst_DTACK_SYNC.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un1_n
-11 1
-.names DTACK_SYNC_1_sqmuxa_i.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n
-11 1
-.names RST_i.BLIF inst_LDS_000_INTreg.AP
-1 1
-.names dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.D
-1- 1
--1 1
-.names DTACK_c.BLIF DTACK_i
-0 1
-.names state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un3_n
-0 1
-.names N_124.BLIF state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un1_n
-11 1
-.names CLK_OSZI_c.BLIF inst_DTACK_SYNC.C
-1 1
-.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n
-11 1
-.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF inst_VMA_INTreg.D
-1- 1
--1 1
-.names RST_i.BLIF inst_DTACK_SYNC.AP
-1 1
-.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_2__un3_n
-0 1
-.names N_121_i.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_2__un1_n
-11 1
-.names cpu_est_2_.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n
-11 1
-.names AS_030.BLIF AS_030_c
-1 1
-.names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D
-1- 1
--1 1
-.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C
-1 1
.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_0__un3_n
0 1
-.names DS_030.BLIF DS_030_c
-1 1
.names ipl_c_0__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_0__un1_n
11 1
-.names RST_i.BLIF inst_FPU_CS_INTreg.AP
+.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C
1 1
.names IPL_030DFFSH_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n
11 1
.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF IPL_030DFFSH_0_reg.D
1- 1
-1 1
-.names SIZE_0_.BLIF size_c_0__n
+.names RST_i.BLIF SM_AMIGA_1_.AR
1 1
-.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_1__un3_n
+.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_2__un3_n
0 1
-.names SIZE_1_.BLIF size_c_1__n
-1 1
-.names ipl_c_1__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_1__un1_n
+.names N_118_i.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_2__un1_n
11 1
-.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C
-1 1
-.names A_0_.BLIF a_c_0__n
-1 1
-.names IPL_030DFFSH_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n
+.names cpu_est_2_.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n
11 1
-.names A_16_.BLIF a_c_16__n
-1 1
-.names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF IPL_030DFFSH_1_reg.D
+.names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D
1- 1
-1 1
-.names RST_i.BLIF inst_AS_030_000_SYNC.AP
+.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C
1 1
-.names A_17_.BLIF a_c_17__n
-1 1
-.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_2__un3_n
+.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_1__un3_n
0 1
-.names A_18_.BLIF a_c_18__n
-1 1
-.names ipl_c_2__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_2__un1_n
+.names clk_cpu_est_11_1__n.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_1__un1_n
11 1
-.names A_19_.BLIF a_c_19__n
+.names RST_i.BLIF SM_AMIGA_0_.AR
1 1
-.names IPL_030DFFSH_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n
+.names cpu_est_1_.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n
11 1
-.names A_20_.BLIF a_c_20__n
-1 1
-.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF IPL_030DFFSH_2_reg.D
+.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D
1- 1
-1 1
-.names CLK_OSZI_c.BLIF inst_AS_000_INTreg.C
-1 1
-.names A_21_.BLIF a_c_21__n
-1 1
-.names state_machine_un8_clk_000_d0_i_n.BLIF state_machine_un13_clk_000_d0_i_n.BLIF state_machine_un15_clk_000_d0_0_n
-11 1
-.names A_22_.BLIF a_c_22__n
-1 1
-.names state_machine_un13_clk_000_d0_1_n.BLIF state_machine_un13_clk_000_d0_1_i_n
+.names RW_c.BLIF RW_i
0 1
-.names RST_i.BLIF inst_AS_000_INTreg.AP
-1 1
-.names A_23_.BLIF a_c_23__n
-1 1
-.names SM_AMIGA_0_.BLIF state_machine_un13_clk_000_d0_1_i_n.BLIF N_109
-11 1
-.names A_24_.BLIF a_c_24__n
-1 1
-.names N_92.BLIF sm_amiga_i_6__n.BLIF N_99
-11 1
-.names A_25_.BLIF a_c_25__n
-1 1
-.names N_91.BLIF sm_amiga_i_7__n.BLIF N_98
-11 1
-.names A_26_.BLIF a_c_26__n
-1 1
-.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n
+.names cpu_est_2_.BLIF cpu_est_i_2__n
0 1
-.names CLK_OSZI_c.BLIF inst_VPA_SYNC.C
+.names CLK_OSZI_c.BLIF cpu_est_2_.C
1 1
-.names A_27_.BLIF a_c_27__n
-1 1
-.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n
+.names N_127_i.BLIF N_128_i.BLIF N_118_i
+11 1
+.names N_121_i.BLIF cpu_est_0_.BLIF N_125
+11 1
+.names cpu_est_0_.BLIF cpu_est_i_0__n
0 1
-.names A_28_.BLIF a_c_28__n
-1 1
-.names sm_amiga_i_6__n.BLIF sm_amiga_i_7__n.BLIF N_96
+.names N_121.BLIF cpu_est_i_0__n.BLIF N_123
11 1
-.names RST_i.BLIF inst_VPA_SYNC.AP
+.names CLK_OSZI_c.BLIF cpu_est_3_reg.C
1 1
-.names A_29_.BLIF a_c_29__n
-1 1
-.names BGACK_000_c.BLIF clk_un4_clk_000_d1_i_n.BLIF state_machine_un6_bgack_000_0_n
+.names SM_AMIGA_3_.BLIF state_machine_un23_clk_000_d0_i_n.BLIF N_91_0
11 1
-.names A_30_.BLIF a_c_30__n
+.names inst_AS_000_INTreg.BLIF SM_AMIGA_0_.BLIF N_90_0
+11 1
+.names N_102_i.BLIF N_103_i.BLIF SM_AMIGA_3_.D
+11 1
+.names CLK_000_D0_i.BLIF N_101_i.BLIF SM_AMIGA_4_.D
+11 1
+.names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C
1 1
-.names state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n
+.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n
0 1
-.names A_31_.BLIF a_c_31__n
-1 1
-.names BGACK_000_c.BLIF state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n
+.names sm_amiga_i_3__n.BLIF sm_amiga_i_4__n.BLIF N_103
11 1
-.names nEXP_SPACE.BLIF nEXP_SPACE_c
+.names RST_i.BLIF IPL_030DFFSH_0_reg.AP
1 1
-.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un0_n
-11 1
-.names CLK_OSZI_c.BLIF BG_000DFFSHreg.C
-1 1
-.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF inst_BGACK_030_INTreg.D
-1- 1
--1 1
-.names BG_030.BLIF BG_030_c
-1 1
-.names AS_030_i.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF DTACK_SYNC_1_sqmuxa_1
-11 1
-.names RST_i.BLIF BG_000DFFSHreg.AP
-1 1
-.names BG_000DFFSHreg.BLIF BG_000
-1 1
-.names state_machine_un42_clk_030_n.BLIF state_machine_un42_clk_030_i_n
+.names inst_CLK_000_D0.BLIF CLK_000_D0_i
0 1
-.names inst_BGACK_030_INTreg.BLIF BGACK_030
-1 1
-.names AS_030_i.BLIF state_machine_un42_clk_030_n.BLIF un1_as_030_3_0
+.names CLK_000_D0_i.BLIF N_91.BLIF N_102
11 1
-.names BGACK_000.BLIF BGACK_000_c
-1 1
-.names AS_030_i.BLIF CLK_030_i.BLIF state_machine_un17_clk_030_0_n
-11 1
-.names CLK_030.BLIF CLK_030_c
-1 1
-.names CLK_030_c.BLIF CLK_030_i
+.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n
0 1
-.names CLK_OSZI_c.BLIF inst_DTACK_DMA.C
-1 1
-.names CLK_000.BLIF inst_CLK_000_D0.D
-1 1
-.names BG_030_c_i.BLIF CLK_030_c.BLIF state_machine_un1_clk_030_0_n
-11 1
-.names CLK_OSZI.BLIF CLK_OSZI_c
-1 1
-.names a_c_19__n.BLIF a_i_19__n
-0 1
-.names RST_i.BLIF inst_DTACK_DMA.AP
-1 1
-.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT
-1 1
-.names a_c_18__n.BLIF a_i_18__n
-0 1
-.names CLK_OUT_INTreg.BLIF CLK_EXP
-1 1
-.names a_c_i_0__n.BLIF N_144_i.BLIF state_machine_uds_000_int_8_0_n
-11 1
-.names inst_FPU_CS_INTreg.BLIF FPU_CS
-1 1
-.names N_144_i.BLIF state_machine_un34_clk_000_d0_n.BLIF state_machine_lds_000_int_8_0_n
-11 1
-.names IPL_030DFFSH_0_reg.BLIF IPL_030_0_
-1 1
.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n
0 1
-.names CLK_OSZI_c.BLIF inst_UDS_000_INTreg.C
+.names CLK_OSZI_c.BLIF IPL_030DFFSH_1_reg.C
1 1
-.names IPL_030DFFSH_1_reg.BLIF IPL_030_1_
-1 1
-.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_102
+.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_124
11 1
-.names IPL_030DFFSH_2_reg.BLIF IPL_030_2_
-1 1
-.names CLK_000_D0_i.BLIF N_102_i.BLIF SM_AMIGA_4_.D
+.names cpu_est_3_reg.BLIF state_machine_un13_clk_000_d0_2_n.BLIF N_126
11 1
-.names RST_i.BLIF inst_UDS_000_INTreg.AP
+.names RST_i.BLIF IPL_030DFFSH_1_reg.AP
1 1
-.names IPL_0_.BLIF ipl_c_0__n
+.names N_122.BLIF cpu_est_3_reg.BLIF N_129
+11 1
+.names N_122_i.BLIF cpu_est_i_2__n.BLIF N_130
+11 1
+.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_121_i
+11 1
+.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_122_i
+11 1
+.names CLK_OSZI_c.BLIF IPL_030DFFSH_2_reg.C
1 1
-.names UDS_000_INT_0_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_1_i
+.names inst_VMA_INTreg.BLIF VMA_INT_i
0 1
-.names IPL_1_.BLIF ipl_c_1__n
-1 1
-.names UDS_000_INT_0_sqmuxa.BLIF UDS_000_INT_0_sqmuxa_i
+.names DTACK_c.BLIF DTACK_i
0 1
-.names IPL_2_.BLIF ipl_c_2__n
+.names RST_i.BLIF IPL_030DFFSH_2_reg.AP
1 1
-.names UDS_000_INT_0_sqmuxa_1_i.BLIF UDS_000_INT_0_sqmuxa_i.BLIF N_144
-11 1
-.names DS_030_c.BLIF DS_030_i
+.names cpu_est_1_.BLIF cpu_est_i_1__n
0 1
-.names CLK_OSZI_c.BLIF CLK_CNT_0_.C
-1 1
-.names CLK_000_D0_i.BLIF SM_AMIGA_7_.BLIF N_92_0
-11 1
-.names N_99_i.BLIF N_111_i.BLIF SM_AMIGA_6_.D
-11 1
-.names vcc_n_n.BLIF AVEC
-1 1
-.names inst_CLK_000_D0.BLIF N_98_i.BLIF SM_AMIGA_7_.D
-11 1
-.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i
+.names inst_VPA_D.BLIF VPA_D_i
0 1
-.names CLK_OSZI_c.BLIF inst_VPA_D.C
-1 1
-.names cpu_est_3_reg.BLIF E
-1 1
-.names AS_030_000_SYNC_i.BLIF clk_un4_clk_000_d1_n.BLIF N_111
+.names inst_AS_000_INTreg.BLIF inst_CLK_000_D0.BLIF state_machine_un13_clk_000_d0_1_n
11 1
-.names VPA.BLIF inst_VPA_D.D
-1 1
-.names N_111.BLIF SM_AMIGA_6_.BLIF N_101
+.names cpu_est_1_.BLIF cpu_est_2_.BLIF state_machine_un13_clk_000_d0_2_n
11 1
-.names inst_VMA_INTreg.BLIF VMA
+.names CLK_OSZI_c.BLIF SM_AMIGA_7_.C
1 1
-.names a_c_24__n.BLIF a_i_24__n
+.names cpu_est_3_reg.BLIF cpu_est_i_3__n
0 1
-.names RST.BLIF RST_c
+.names RST_i.BLIF SM_AMIGA_7_.AP
1 1
-.names a_c_25__n.BLIF a_i_25__n
+.names state_machine_un13_clk_000_d0_2_n.BLIF state_machine_un13_clk_000_d0_2_i_n
0 1
-.names CLK_OSZI_c.BLIF inst_CLK_000_D0.C
-1 1
-.names RESETDFFreg.BLIF RESET
-1 1
-.names a_c_26__n.BLIF a_i_26__n
-0 1
-.names RW.BLIF RW_c
-1 1
-.names a_c_27__n.BLIF a_i_27__n
-0 1
-.names FC_0_.BLIF fc_c_0__n
-1 1
-.names a_c_28__n.BLIF a_i_28__n
-0 1
-.names RST_c.BLIF RESETDFFreg.D
-1 1
-.names FC_1_.BLIF fc_c_1__n
-1 1
-.names a_c_29__n.BLIF a_i_29__n
-0 1
-.names nEXP_SPACE_i.BLIF AMIGA_BUS_ENABLE
-1 1
-.names a_c_30__n.BLIF a_i_30__n
-0 1
-.names CLK_OSZI_c.BLIF RESETDFFreg.C
-1 1
-.names RW_i.BLIF AMIGA_BUS_DATA_DIR
-1 1
-.names a_c_31__n.BLIF a_i_31__n
-0 1
-.names vcc_n_n.BLIF AMIGA_BUS_ENABLE_LOW
-1 1
-.names N_97.BLIF N_97_i
-0 1
-.names AS_030_i.BLIF N_97_i.BLIF DSACK_INT_1_sqmuxa
-11 1
-.names inst_CLK_000_D0.BLIF inst_CLK_000_D1.D
-1 1
-.names state_machine_un8_clk_000_d0_4_n.BLIF state_machine_un8_clk_000_d0_3_n.BLIF state_machine_un8_clk_000_d0_n
-11 1
-.names VPA_SYNC_1_sqmuxa.BLIF VPA_SYNC_1_sqmuxa_i
-0 1
-.names cpu_est_i_0__n.BLIF cpu_est_i_3__n.BLIF state_machine_un13_clk_000_d0_1_0_n
-11 1
-.names AS_030_i.BLIF VPA_SYNC_1_sqmuxa_i.BLIF VPA_SYNC_1_sqmuxa_1
-11 1
-.names CLK_OSZI_c.BLIF inst_CLK_000_D1.C
-1 1
-.names state_machine_un13_clk_000_d0_1_n.BLIF state_machine_un13_clk_000_d0_2_n.BLIF state_machine_un13_clk_000_d0_2_0_n
-11 1
-.names AS_030_i.BLIF N_144.BLIF un1_as_030_4
-11 1
-.names state_machine_un13_clk_000_d0_1_0_n.BLIF state_machine_un13_clk_000_d0_2_0_n.BLIF state_machine_un13_clk_000_d0_n
-11 1
-.names state_machine_un13_as_000_int_n.BLIF inst_DTACK_DMA.D
-0 1
-.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF VPA_SYNC_1_sqmuxa_1_1
-11 1
-.names RST_c.BLIF RST_i
-0 1
-.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D
-1 1
-.names N_134_1.BLIF VMA_INT_i.BLIF VPA_SYNC_1_sqmuxa_2
-11 1
-.names CLK_CNT_0_.BLIF CLK_CNT_0_.D
-0 1
-.names VPA_D_i.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_3
-11 1
-.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF state_machine_un60_clk_000_d0_i_n
-11 1
-.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C
-1 1
-.names VPA_SYNC_1_sqmuxa_1_1.BLIF VPA_SYNC_1_sqmuxa_2.BLIF VPA_SYNC_1_sqmuxa_4
-11 1
-.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i
-0 1
-.names VPA_SYNC_1_sqmuxa_4.BLIF VPA_SYNC_1_sqmuxa_3.BLIF VPA_SYNC_1_sqmuxa
-11 1
-.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i
-0 1
-.names CLK_000_D0_i.BLIF SM_AMIGA_3_.BLIF N_106_1
-11 1
-.names un1_as_030_4.BLIF uds_000_int_0_un3_n
-0 1
-.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_0_.X1
-1 1
-.names N_106_1.BLIF state_machine_un60_clk_000_d0_n.BLIF N_106
-11 1
-.names inst_UDS_000_INTreg.BLIF un1_as_030_4.BLIF uds_000_int_0_un1_n
-11 1
-.names a_i_18__n.BLIF a_i_19__n.BLIF state_machine_un42_clk_030_2_n
-11 1
-.names state_machine_uds_000_int_8_n.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n
-11 1
-.names cpu_est_0_.BLIF cpu_est_0_0_.X2
-1 1
-.names fc_c_1__n.BLIF BGACK_000_c.BLIF state_machine_un42_clk_030_3_n
-11 1
-.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF inst_UDS_000_INTreg.D
-1- 1
--1 1
-.names state_machine_un42_clk_030_1_n.BLIF state_machine_un42_clk_030_2_n.BLIF state_machine_un42_clk_030_4_n
-11 1
-.names un1_as_030_4.BLIF lds_000_int_0_un3_n
-0 1
-.names state_machine_un42_clk_030_3_n.BLIF fc_c_0__n.BLIF state_machine_un42_clk_030_5_n
-11 1
-.names inst_LDS_000_INTreg.BLIF un1_as_030_4.BLIF lds_000_int_0_un1_n
-11 1
-.names CLK_CNT_0_.BLIF CLK_OUT_PRE_0.X1
-1 1
-.names state_machine_un42_clk_030_4_n.BLIF state_machine_un42_clk_030_5_n.BLIF state_machine_un42_clk_030_n
-11 1
-.names state_machine_lds_000_int_8_n.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n
-11 1
-.names DTACK_i.BLIF inst_VPA_D.BLIF DTACK_SYNC_1_sqmuxa_1_0
-11 1
-.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INTreg.D
-1- 1
--1 1
-.names inst_CLK_OUT_PRE.BLIF CLK_OUT_PRE_0.X2
-1 1
-.names DTACK_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF DTACK_SYNC_1_sqmuxa
-11 1
.names VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un3_n
0 1
-.names cpu_est_0_.BLIF cpu_est_i_3__n.BLIF N_130_1
-11 1
.names inst_VPA_SYNC.BLIF VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un1_n
11 1
-.names N_130_1.BLIF state_machine_un13_clk_000_d0_2_i_n.BLIF N_130
-11 1
.names VPA_SYNC_1_sqmuxa_i.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n
11 1
-.names CLK_OUT_PRE_0.BLIF inst_CLK_OUT_PRE.D
+.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C
1 1
-.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_131_1
-11 1
.names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D
1- 1
-1 1
-.names cpu_est_0_0_.BLIF cpu_est_0_.D
-1 1
-.names N_131_1.BLIF cpu_est_i_2__n.BLIF N_131
-11 1
-.names DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un3_n
+.names state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un3_n
0 1
-.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF state_machine_un8_clk_000_d0_1_n
+.names RST_i.BLIF SM_AMIGA_6_.AR
+1 1
+.names N_121.BLIF state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un1_n
11 1
-.names DSACK_INT_1_.BLIF DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un1_n
+.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n
11 1
-.names CLK_000_D0_i.BLIF VPA_D_i.BLIF state_machine_un8_clk_000_d0_2_n
-11 1
-.names N_97_i.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un0_n
-11 1
-.names cpu_est_0_.BLIF cpu_est_2_.BLIF state_machine_un8_clk_000_d0_3_n
-11 1
-.names dsack_int_0_1__un1_n.BLIF dsack_int_0_1__un0_n.BLIF DSACK_INT_1_.D
+.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF inst_VMA_INTreg.D
1- 1
-1 1
-.names state_machine_un8_clk_000_d0_1_n.BLIF state_machine_un8_clk_000_d0_2_n.BLIF state_machine_un8_clk_000_d0_4_n
-11 1
-.names vcc_n_n
-1
-.names N_167_3.BLIF N_167_4.BLIF N_167_6
-11 1
-.names gnd_n_n
-.names N_167_5.BLIF N_167_6.BLIF N_167
-11 1
-.names A_15_.BLIF a_15__n
-1 1
-.names a_c_20__n.BLIF a_c_21__n.BLIF N_170_1
-11 1
-.names A_14_.BLIF a_14__n
-1 1
-.names a_c_22__n.BLIF a_c_23__n.BLIF N_170_2
-11 1
-.names A_13_.BLIF a_13__n
-1 1
-.names N_170_1.BLIF N_170_2.BLIF N_170
-11 1
-.names A_12_.BLIF a_12__n
-1 1
-.names AS_030_000_SYNC_i.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_1
-11 1
-.names A_11_.BLIF a_11__n
-1 1
-.names RW_c.BLIF SM_AMIGA_6_.BLIF UDS_000_INT_0_sqmuxa_1_2
-11 1
-.names A_10_.BLIF a_10__n
-1 1
-.names UDS_000_INT_0_sqmuxa_1_1.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF UDS_000_INT_0_sqmuxa_1_3
-11 1
-.names A_9_.BLIF a_9__n
-1 1
-.names UDS_000_INT_0_sqmuxa_1_3.BLIF clk_un4_clk_000_d1_n.BLIF UDS_000_INT_0_sqmuxa_1
-11 1
-.names A_8_.BLIF a_8__n
-1 1
-.names inst_CLK_000_D0.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_0
-11 1
-.names A_7_.BLIF a_7__n
-1 1
-.names RW_i.BLIF SM_AMIGA_4_.BLIF UDS_000_INT_0_sqmuxa_2
-11 1
-.names A_6_.BLIF a_6__n
-1 1
-.names UDS_000_INT_0_sqmuxa_1_0.BLIF UDS_000_INT_0_sqmuxa_2.BLIF UDS_000_INT_0_sqmuxa
-11 1
-.names A_5_.BLIF a_5__n
-1 1
-.names size_c_i_1__n.BLIF a_c_i_0__n.BLIF state_machine_un34_clk_000_d0_i_1_n
-11 1
-.names A_4_.BLIF a_4__n
-1 1
-.names state_machine_un34_clk_000_d0_i_1_n.BLIF size_c_0__n.BLIF state_machine_un34_clk_000_d0_i_n
-11 1
-.names A_3_.BLIF a_3__n
-1 1
-.names a_c_17__n.BLIF a_i_16__n.BLIF state_machine_un42_clk_030_1_n
-11 1
-.names A_2_.BLIF a_2__n
-1 1
-.names BG_030_c_i.BLIF N_96_i.BLIF un1_bg_030_0_1
-11 1
-.names A_1_.BLIF a_1__n
-1 1
-.names AS_030_c.BLIF nEXP_SPACE_i.BLIF un1_bg_030_0_2
-11 1
-.names un1_bg_030_0_1.BLIF un1_bg_030_0_2.BLIF un1_bg_030_0
-11 1
-.names AS_030_i.BLIF nEXP_SPACE_c.BLIF state_machine_as_030_000_sync_3_2_1_n
-11 1
-.names state_machine_as_030_000_sync_3_2_1_n.BLIF state_machine_un42_clk_030_i_n.BLIF state_machine_as_030_000_sync_3_2_n
-11 1
-.names N_134_i.BLIF N_132_i.BLIF clk_cpu_est_11_0_1_3__n
-11 1
-.names clk_cpu_est_11_0_1_3__n.BLIF N_133_i.BLIF clk_cpu_est_11_0_3__n
-11 1
-.names N_129_i.BLIF N_127_i.BLIF clk_cpu_est_11_0_1_1__n
-11 1
-.names N_126_i.BLIF N_128_i.BLIF clk_cpu_est_11_0_2_1__n
-11 1
-.names clk_cpu_est_11_0_1_1__n.BLIF clk_cpu_est_11_0_2_1__n.BLIF clk_cpu_est_11_0_1__n
-11 1
-.names a_i_24__n.BLIF a_i_25__n.BLIF N_167_1
-11 1
-.names a_i_26__n.BLIF a_i_27__n.BLIF N_167_2
-11 1
-.names a_i_28__n.BLIF a_i_29__n.BLIF N_167_3
-11 1
-.names a_i_30__n.BLIF a_i_31__n.BLIF N_167_4
-11 1
-.names N_167_1.BLIF N_167_2.BLIF N_167_5
-11 1
-.names un1_bg_030_0.BLIF un1_bg_030
-0 1
-.names clk_un4_clk_000_d1_n.BLIF clk_un4_clk_000_d1_i_n
-0 1
-.names state_machine_un6_bgack_000_0_n.BLIF state_machine_un6_bgack_000_n
-0 1
-.names N_98.BLIF N_98_i
-0 1
-.names N_111.BLIF N_111_i
-0 1
-.names N_99.BLIF N_99_i
-0 1
-.names N_92_0.BLIF N_92
-0 1
-.names state_machine_un34_clk_000_d0_i_n.BLIF state_machine_un34_clk_000_d0_n
-0 1
-.names a_c_0__n.BLIF a_c_i_0__n
-0 1
-.names size_c_1__n.BLIF size_c_i_1__n
-0 1
-.names N_102.BLIF N_102_i
-0 1
-.names N_144.BLIF N_144_i
-0 1
-.names state_machine_lds_000_int_8_0_n.BLIF state_machine_lds_000_int_8_n
-0 1
-.names state_machine_uds_000_int_8_0_n.BLIF state_machine_uds_000_int_8_n
-0 1
-.names state_machine_un60_clk_000_d0_i_n.BLIF state_machine_un60_clk_000_d0_n
-0 1
-.names N_124_i.BLIF N_124
-0 1
-.names N_130.BLIF N_130_i
-0 1
-.names N_131.BLIF N_131_i
-0 1
-.names N_91_0.BLIF N_91
-0 1
-.names N_109.BLIF N_109_i
-0 1
-.names sm_amiga_ns_0_7__n.BLIF SM_AMIGA_0_.D
-0 1
-.names state_machine_un8_clk_000_d0_n.BLIF state_machine_un8_clk_000_d0_i_n
-0 1
-.names state_machine_un13_clk_000_d0_n.BLIF state_machine_un13_clk_000_d0_i_n
-0 1
-.names state_machine_un15_clk_000_d0_0_n.BLIF state_machine_un15_clk_000_d0_n
-0 1
-.names BG_030_c.BLIF BG_030_c_i
-0 1
-.names state_machine_un1_clk_030_0_n.BLIF state_machine_un1_clk_030_n
-0 1
-.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C
-1 1
-.names state_machine_un17_clk_030_0_n.BLIF state_machine_un17_clk_030_n
-0 1
-.names un1_as_030_3_0.BLIF un1_as_030_3
-0 1
-.names RST_i.BLIF SM_AMIGA_3_.AR
-1 1
-.names state_machine_as_030_000_sync_3_2_n.BLIF state_machine_as_030_000_sync_3_n
-0 1
-.names N_96.BLIF N_96_i
-0 1
-.names N_107.BLIF N_107_i
-0 1
-.names N_108.BLIF N_108_i
-0 1
-.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C
-1 1
-.names sm_amiga_ns_0_6__n.BLIF SM_AMIGA_1_.D
-0 1
-.names N_90_i.BLIF N_90
-0 1
-.names RST_i.BLIF SM_AMIGA_2_.AR
-1 1
-.names N_93_0.BLIF N_93
-0 1
-.names N_128.BLIF N_128_i
-0 1
-.names N_126.BLIF N_126_i
-0 1
-.names N_127.BLIF N_127_i
-0 1
-.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C
-1 1
-.names N_129.BLIF N_129_i
-0 1
-.names clk_cpu_est_11_0_1__n.BLIF clk_cpu_est_11_1__n
-0 1
-.names RST_i.BLIF SM_AMIGA_1_.AR
-1 1
-.names N_133.BLIF N_133_i
-0 1
-.names N_132.BLIF N_132_i
-0 1
-.names N_134.BLIF N_134_i
-0 1
-.names clk_cpu_est_11_0_3__n.BLIF clk_cpu_est_11_3__n
-0 1
-.names CLK_OSZI_c.BLIF SM_AMIGA_0_.C
-1 1
-.names N_125_i.BLIF N_125
-0 1
-.names N_100.BLIF N_100_i
-0 1
-.names RST_i.BLIF SM_AMIGA_0_.AR
-1 1
-.names sm_amiga_ns_0_2__n.BLIF SM_AMIGA_5_.D
-0 1
-.names N_103.BLIF N_103_i
-0 1
-.names N_104.BLIF N_104_i
-0 1
-.names N_106.BLIF N_106_i
-0 1
-.names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C
-1 1
-.names N_105.BLIF N_105_i
-0 1
-.names sm_amiga_ns_0_5__n.BLIF SM_AMIGA_2_.D
-0 1
-.names RST_i.BLIF IPL_030DFFSH_0_reg.AP
-1 1
-.names inst_AS_000_INTreg.BLIF AS_000_INT_i
-0 1
-.names dsack_c_1__n.BLIF dsack_i_1__n
-0 1
-.names AS_000_INT_i.BLIF dsack_i_1__n.BLIF state_machine_un13_as_000_int_n
-11 1
.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_3__un3_n
0 1
-.names CLK_OSZI_c.BLIF IPL_030DFFSH_1_reg.C
+.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C
1 1
.names clk_cpu_est_11_3__n.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_3__un1_n
11 1
.names cpu_est_3_reg.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n
11 1
-.names RST_i.BLIF IPL_030DFFSH_1_reg.AP
-1 1
.names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_reg.D
1- 1
-1 1
-.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_1__un3_n
-0 1
-.names clk_cpu_est_11_1__n.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_1__un1_n
+.names inst_CLK_000_D0.BLIF CLK_000_c.BLIF state_machine_un2_clk_000_n
11 1
-.names cpu_est_1_.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n
-11 1
-.names CLK_OSZI_c.BLIF IPL_030DFFSH_2_reg.C
+.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C
1 1
-.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D
+.names inst_CLK_000_D1.BLIF CLK_000_D1_i
+0 1
+.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF clk_un4_clk_000_d1_n
+11 1
+.names RST_i.BLIF inst_BGACK_030_INTreg.AP
+1 1
+.names state_machine_un8_clk_000_d0_i_n.BLIF state_machine_un13_clk_000_d0_i_n.BLIF state_machine_un15_clk_000_d0_0_n
+11 1
+.names VPA_SYNC_1_sqmuxa.BLIF VPA_SYNC_1_sqmuxa_i
+0 1
+.names AS_030_i.BLIF VPA_SYNC_1_sqmuxa_i.BLIF VPA_SYNC_1_sqmuxa_1
+11 1
+.names AS_030_c.BLIF AS_030_i
+0 1
+.names CLK_OSZI_c.BLIF CLK_CNT_0_.C
+1 1
+.names DTACK_SYNC_1_sqmuxa.BLIF DTACK_SYNC_1_sqmuxa_i
+0 1
+.names AS_030_i.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF DTACK_SYNC_1_sqmuxa_1
+11 1
+.names state_machine_un13_clk_000_d0_1_n.BLIF state_machine_un13_clk_000_d0_1_i_n
+0 1
+.names SM_AMIGA_0_.BLIF state_machine_un13_clk_000_d0_1_i_n.BLIF N_108
+11 1
+.names CLK_OSZI_c.BLIF CLK_CNT_1_.C
+1 1
+.names AS_030.BLIF AS_030_c
+1 1
+.names N_96_i.BLIF N_108_i.BLIF sm_amiga_ns_0_7__n
+11 1
+.names state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n
+0 1
+.names DS_030.BLIF DS_030_c
+1 1
+.names BGACK_000_c.BLIF state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n
+11 1
+.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un0_n
+11 1
+.names CLK_OSZI_c.BLIF cpu_est_0_.C
+1 1
+.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF inst_BGACK_030_INTreg.D
1- 1
-1 1
+.names SIZE_0_.BLIF size_c_0__n
+1 1
+.names state_machine_un1_clk_030_n.BLIF bg_000_0_un3_n
+0 1
+.names SIZE_1_.BLIF size_c_1__n
+1 1
+.names un1_bg_030.BLIF state_machine_un1_clk_030_n.BLIF bg_000_0_un1_n
+11 1
+.names A_0_.BLIF a_c_0__n
+1 1
+.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n
+11 1
+.names CLK_OSZI_c.BLIF cpu_est_1_.C
+1 1
+.names A_16_.BLIF a_c_16__n
+1 1
+.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF BG_000DFFSHreg.D
+1- 1
+-1 1
+.names A_17_.BLIF a_c_17__n
+1 1
+.names RST_c.BLIF amiga_bus_enable_0_un3_n
+0 1
+.names A_18_.BLIF a_c_18__n
+1 1
+.names state_machine_amiga_bus_enable_2_iv_i_n.BLIF RST_c.BLIF amiga_bus_enable_0_un1_n
+11 1
+.names A_19_.BLIF a_c_19__n
+1 1
+.names AMIGA_BUS_ENABLEDFFreg.BLIF amiga_bus_enable_0_un3_n.BLIF amiga_bus_enable_0_un0_n
+11 1
+.names CLK_OSZI_c.BLIF inst_VPA_SYNC.C
+1 1
+.names A_20_.BLIF a_c_20__n
+1 1
+.names amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF AMIGA_BUS_ENABLEDFFreg.D
+1- 1
+-1 1
+.names A_21_.BLIF a_c_21__n
+1 1
+.names state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un3_n
+0 1
+.names RST_i.BLIF inst_VPA_SYNC.AP
+1 1
+.names A_22_.BLIF a_c_22__n
+1 1
+.names state_machine_as_030_000_sync_3_n.BLIF state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un1_n
+11 1
+.names A_23_.BLIF a_c_23__n
+1 1
+.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n
+11 1
+.names A_24_.BLIF a_c_24__n
+1 1
+.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF inst_AS_030_000_SYNC.D
+1- 1
+-1 1
+.names A_25_.BLIF a_c_25__n
+1 1
+.names state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un3_n
+0 1
+.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C
+1 1
+.names A_26_.BLIF a_c_26__n
+1 1
+.names un1_as_030_3.BLIF state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un1_n
+11 1
+.names A_27_.BLIF a_c_27__n
+1 1
+.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n
+11 1
+.names RST_i.BLIF inst_FPU_CS_INTreg.AP
+1 1
+.names A_28_.BLIF a_c_28__n
+1 1
+.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D
+1- 1
+-1 1
+.names A_29_.BLIF a_c_29__n
+1 1
+.names AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un3_n
+0 1
+.names A_30_.BLIF a_c_30__n
+1 1
+.names inst_AS_000_INTreg.BLIF AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un1_n
+11 1
+.names A_31_.BLIF a_c_31__n
+1 1
+.names N_95_i.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n
+11 1
+.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C
+1 1
+.names nEXP_SPACE.BLIF nEXP_SPACE_c
+1 1
+.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INTreg.D
+1- 1
+-1 1
+.names DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un3_n
+0 1
+.names RST_i.BLIF inst_AS_030_000_SYNC.AP
+1 1
+.names BG_030.BLIF BG_030_c
+1 1
+.names DSACK_INT_1_.BLIF DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un1_n
+11 1
+.names BG_000DFFSHreg.BLIF BG_000
+1 1
+.names N_96_i.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un0_n
+11 1
+.names inst_BGACK_030_INTreg.BLIF BGACK_030
+1 1
+.names dsack_int_0_1__un1_n.BLIF dsack_int_0_1__un0_n.BLIF DSACK_INT_1_.D
+1- 1
+-1 1
+.names BGACK_000.BLIF BGACK_000_c
+1 1
+.names N_96.BLIF N_96_i
+0 1
+.names CLK_OSZI_c.BLIF inst_AS_000_INTreg.C
+1 1
+.names CLK_030.BLIF CLK_030_c
+1 1
+.names AS_030_i.BLIF N_96_i.BLIF DSACK_INT_1_sqmuxa
+11 1
+.names CLK_000.BLIF CLK_000_c
+1 1
+.names N_95.BLIF N_95_i
+0 1
+.names RST_i.BLIF inst_AS_000_INTreg.AP
+1 1
+.names CLK_OSZI.BLIF CLK_OSZI_c
+1 1
+.names AS_030_i.BLIF N_95_i.BLIF AS_000_INT_1_sqmuxa
+11 1
+.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT
+1 1
+.names inst_CLK_000_D0.BLIF SM_AMIGA_5_.BLIF N_100
+11 1
+.names CLK_OUT_INTreg.BLIF CLK_EXP
+1 1
+.names N_95_i.BLIF N_100_i.BLIF sm_amiga_ns_0_2__n
+11 1
+.names inst_FPU_CS_INTreg.BLIF FPU_CS
+1 1
+.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF state_machine_un23_clk_000_d0_i_n
+11 1
+.names CLK_OSZI_c.BLIF AMIGA_BUS_ENABLEDFFreg.C
+1 1
+.names IPL_030DFFSH_0_reg.BLIF IPL_030_0_
+1 1
+.names DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un3_n
+0 1
+.names IPL_030DFFSH_1_reg.BLIF IPL_030_1_
+1 1
+.names inst_DTACK_SYNC.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un1_n
+11 1
+.names IPL_030DFFSH_2_reg.BLIF IPL_030_2_
+1 1
+.names DTACK_SYNC_1_sqmuxa_i.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n
+11 1
+.names IPL_0_.BLIF ipl_c_0__n
+1 1
+.names dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.D
+1- 1
+-1 1
+.names CLK_OSZI_c.BLIF BG_000DFFSHreg.C
+1 1
+.names IPL_1_.BLIF ipl_c_1__n
+1 1
+.names N_89_i.BLIF SM_AMIGA_6_.BLIF N_95
+11 1
+.names IPL_2_.BLIF ipl_c_2__n
+1 1
+.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n
+0 1
+.names RST_i.BLIF BG_000DFFSHreg.AP
+1 1
+.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n
+0 1
+.names sm_amiga_i_6__n.BLIF sm_amiga_i_7__n.BLIF N_94
+11 1
+.names state_machine_un42_clk_030_n.BLIF state_machine_un42_clk_030_i_n
+0 1
+.names vcc_n_n.BLIF AVEC
+1 1
+.names AS_030_i.BLIF state_machine_un42_clk_030_n.BLIF un1_as_030_3_0
+11 1
+.names CLK_OSZI_c.BLIF DSACK_INT_1_.C
+1 1
+.names AS_030_i.BLIF CLK_030_i.BLIF state_machine_un17_clk_030_0_n
+11 1
+.names cpu_est_3_reg.BLIF E
+1 1
+.names BGACK_000_c.BLIF clk_un4_clk_000_d1_i_n.BLIF state_machine_un6_bgack_000_0_n
+11 1
+.names RST_i.BLIF DSACK_INT_1_.AP
+1 1
+.names VPA.BLIF inst_VPA_D.D
+1 1
+.names inst_CLK_000_D2.BLIF CLK_000_D2_i
+0 1
+.names inst_VMA_INTreg.BLIF VMA
+1 1
+.names inst_CLK_000_D1.BLIF CLK_000_D2_i.BLIF state_machine_un30_clk_000_d1_n
+11 1
+.names RST.BLIF RST_c
+1 1
+.names CLK_030_c.BLIF CLK_030_i
+0 1
+.names RESETDFFreg.BLIF RESET
+1 1
+.names BG_030_c_i.BLIF CLK_030_c.BLIF state_machine_un1_clk_030_0_n
+11 1
+.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C
+1 1
+.names RW.BLIF RW_c
+1 1
+.names a_c_19__n.BLIF a_i_19__n
+0 1
+.names FC_0_.BLIF fc_c_0__n
+1 1
+.names a_c_18__n.BLIF a_i_18__n
+0 1
+.names RST_i.BLIF inst_VMA_INTreg.AP
+1 1
+.names FC_1_.BLIF fc_c_1__n
+1 1
+.names a_c_16__n.BLIF a_i_16__n
+0 1
+.names AMIGA_BUS_ENABLEDFFreg.BLIF AMIGA_BUS_ENABLE
+1 1
+.names RW_i.BLIF AMIGA_BUS_DATA_DIR
+1 1
+.names vcc_n_n.BLIF AMIGA_BUS_ENABLE_LOW
+1 1
+.names CLK_OUT_PRE_i.BLIF sm_amiga_i_2__n.BLIF N_92_0
+11 1
+.names CLK_OSZI_c.BLIF inst_UDS_000_INTreg.C
+1 1
+.names N_106_i.BLIF N_107_i.BLIF SM_AMIGA_1_.D
+11 1
+.names state_machine_un8_clk_000_d0_4_n.BLIF state_machine_un8_clk_000_d0_3_n.BLIF state_machine_un8_clk_000_d0_n
+11 1
+.names N_104_i.BLIF N_105_i.BLIF sm_amiga_ns_0_5__n
+11 1
+.names RST_i.BLIF inst_UDS_000_INTreg.AP
+1 1
+.names cpu_est_i_0__n.BLIF cpu_est_i_3__n.BLIF state_machine_un13_clk_000_d0_1_0_n
+11 1
+.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n
+0 1
+.names state_machine_un13_clk_000_d0_1_n.BLIF state_machine_un13_clk_000_d0_2_n.BLIF state_machine_un13_clk_000_d0_2_0_n
+11 1
+.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n
+0 1
+.names state_machine_un13_clk_000_d0_1_0_n.BLIF state_machine_un13_clk_000_d0_2_0_n.BLIF state_machine_un13_clk_000_d0_n
+11 1
+.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_107
+11 1
+.names cpu_est_0_.BLIF cpu_est_i_3__n.BLIF N_127_1
+11 1
+.names CLK_000_D0_i.BLIF N_92.BLIF N_106
+11 1
+.names CLK_OSZI_c.BLIF inst_LDS_000_INTreg.C
+1 1
+.names N_127_1.BLIF state_machine_un13_clk_000_d0_2_i_n.BLIF N_127
+11 1
+.names CLK_000_D0_i.BLIF SM_AMIGA_2_.BLIF N_104
+11 1
+.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_128_1
+11 1
+.names nEXP_SPACE_c.BLIF nEXP_SPACE_i
+0 1
+.names RST_i.BLIF inst_LDS_000_INTreg.AP
+1 1
+.names N_128_1.BLIF cpu_est_i_2__n.BLIF N_128
+11 1
+.names AMIGA_BUS_ENABLEDFFreg.BLIF AMIGA_BUS_ENABLE_i
+0 1
+.names N_105_1.BLIF state_machine_un23_clk_000_d0_n.BLIF N_105
+11 1
+.names AMIGA_BUS_ENABLE_i_m_i.BLIF nEXP_SPACE_m_i.BLIF state_machine_amiga_bus_enable_2_iv_i_n
+11 1
+.names SM_AMIGA_3_.BLIF VMA_INT_i.BLIF VPA_SYNC_1_sqmuxa_1_0
+11 1
+.names SM_AMIGA_6_.BLIF nEXP_SPACE_c.BLIF nEXP_SPACE_m
+11 1
+.names VPA_D_i.BLIF cpu_est_2_.BLIF VPA_SYNC_1_sqmuxa_2
+11 1
+.names AS_030_000_SYNC_i.BLIF state_machine_un30_clk_000_d1_n.BLIF N_89_i
+11 1
+.names CLK_OSZI_c.BLIF inst_DTACK_SYNC.C
+1 1
+.names cpu_est_3_reg.BLIF cpu_est_i_0__n.BLIF VPA_SYNC_1_sqmuxa_3
+11 1
+.names CLK_CNT_0_.BLIF clk_cnt_i_0__n
+0 1
+.names cpu_est_i_1__n.BLIF state_machine_un2_clk_000_n.BLIF VPA_SYNC_1_sqmuxa_4
+11 1
+.names clk_cnt_i_0__n.BLIF clk_clk_cnt_i_n.BLIF CLK_CNT_0_.D
+11 1
+.names RST_i.BLIF inst_DTACK_SYNC.AP
+1 1
+.names VPA_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_2.BLIF VPA_SYNC_1_sqmuxa_5
+11 1
+.names clk_clk_cnt_n.BLIF clk_clk_cnt_i_n
+0 1
+.names VPA_SYNC_1_sqmuxa_3.BLIF VPA_SYNC_1_sqmuxa_4.BLIF VPA_SYNC_1_sqmuxa_6
+11 1
+.names clk_clk_cnt_i_n.BLIF G_90.BLIF CLK_CNT_1_.D
+11 1
+.names VPA_SYNC_1_sqmuxa_5.BLIF VPA_SYNC_1_sqmuxa_6.BLIF VPA_SYNC_1_sqmuxa
+11 1
+.names N_90.BLIF sm_amiga_i_7__n.BLIF N_97
+11 1
+.names DTACK_i.BLIF SM_AMIGA_3_.BLIF DTACK_SYNC_1_sqmuxa_1_0
+11 1
+.names N_89.BLIF SM_AMIGA_6_.BLIF N_98
+11 1
+.names CLK_OSZI_c.BLIF inst_DTACK_DMA.C
+1 1
+.names inst_VPA_D.BLIF state_machine_un2_clk_000_n.BLIF DTACK_SYNC_1_sqmuxa_2
+11 1
+.names CLK_000_D0_i.BLIF SM_AMIGA_7_.BLIF N_99
+11 1
+.names DTACK_SYNC_1_sqmuxa_1_0.BLIF DTACK_SYNC_1_sqmuxa_2.BLIF DTACK_SYNC_1_sqmuxa
+11 1
+.names inst_CLK_000_D0.BLIF N_97_i.BLIF SM_AMIGA_7_.D
+11 1
+.names RST_i.BLIF inst_DTACK_DMA.AP
+1 1
+.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF state_machine_un8_clk_000_d0_1_n
+11 1
+.names N_98_i.BLIF N_99_i.BLIF sm_amiga_ns_0_1__n
+11 1
+.names CLK_000_D0_i.BLIF VPA_D_i.BLIF state_machine_un8_clk_000_d0_2_n
+11 1
+.names UDS_000_INT_0_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_1_i
+0 1
+.names cpu_est_0_.BLIF cpu_est_2_.BLIF state_machine_un8_clk_000_d0_3_n
+11 1
+.names UDS_000_INT_0_sqmuxa.BLIF UDS_000_INT_0_sqmuxa_i
+0 1
+.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D
+1 1
+.names state_machine_un8_clk_000_d0_1_n.BLIF state_machine_un8_clk_000_d0_2_n.BLIF state_machine_un8_clk_000_d0_4_n
+11 1
+.names UDS_000_INT_0_sqmuxa_1_i.BLIF UDS_000_INT_0_sqmuxa_i.BLIF N_147
+11 1
+.names a_c_17__n.BLIF a_i_16__n.BLIF state_machine_un42_clk_030_1_n
+11 1
+.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i
+0 1
+.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C
+1 1
+.names a_i_18__n.BLIF a_i_19__n.BLIF state_machine_un42_clk_030_2_n
+11 1
+.names DS_030_c.BLIF DS_030_i
+0 1
+.names fc_c_1__n.BLIF BGACK_000_c.BLIF state_machine_un42_clk_030_3_n
+11 1
+.names state_machine_un42_clk_030_1_n.BLIF state_machine_un42_clk_030_2_n.BLIF state_machine_un42_clk_030_4_n
+11 1
+.names G_86.BLIF N_132_i
+0 1
+.names inst_CLK_000_D1.BLIF inst_CLK_000_D2.D
+1 1
+.names state_machine_un42_clk_030_3_n.BLIF fc_c_0__n.BLIF state_machine_un42_clk_030_5_n
+11 1
+.names clk_cnt_i_0__n.BLIF N_132_i.BLIF clk_clk_cnt_n
+11 1
+.names state_machine_un42_clk_030_4_n.BLIF state_machine_un42_clk_030_5_n.BLIF state_machine_un42_clk_030_n
+11 1
+.names a_c_24__n.BLIF a_i_24__n
+0 1
+.names CLK_OSZI_c.BLIF inst_CLK_000_D2.C
+1 1
+.names CLK_000_D0_i.BLIF inst_CLK_OUT_PRE.BLIF N_96_1
+11 1
+.names a_c_25__n.BLIF a_i_25__n
+0 1
+.names N_96_1.BLIF SM_AMIGA_1_.BLIF N_96
+11 1
+.names a_c_26__n.BLIF a_i_26__n
+0 1
+.names AMIGA_BUS_ENABLE_i.BLIF AS_030_i.BLIF AMIGA_BUS_ENABLE_i_m_1
+11 1
+.names a_c_27__n.BLIF a_i_27__n
+0 1
+.names AMIGA_BUS_ENABLE_i_m_1.BLIF sm_amiga_i_6__n.BLIF AMIGA_BUS_ENABLE_i_m
+11 1
+.names a_c_28__n.BLIF a_i_28__n
+0 1
+.names CLK_OSZI_c.BLIF inst_VPA_D.C
+1 1
+.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_131_1
+11 1
+.names a_c_29__n.BLIF a_i_29__n
+0 1
+.names N_131_1.BLIF cpu_est_i_2__n.BLIF N_131
+11 1
+.names a_c_30__n.BLIF a_i_30__n
+0 1
+.names N_131_i.BLIF N_129_i.BLIF clk_cpu_est_11_0_1_3__n
+11 1
+.names a_c_31__n.BLIF a_i_31__n
+0 1
+.names CLK_000_c.BLIF inst_CLK_000_D0.D
+1 1
+.names clk_cpu_est_11_0_1_3__n.BLIF N_130_i.BLIF clk_cpu_est_11_0_3__n
+11 1
+.names AS_030_i.BLIF N_147.BLIF un1_as_030_4
+11 1
+.names CLK_000_D0_i.BLIF SM_AMIGA_3_.BLIF N_105_1
+11 1
+.names a_c_i_0__n.BLIF N_147_i.BLIF state_machine_uds_000_int_7_0_n
+11 1
+.names CLK_OSZI_c.BLIF inst_CLK_000_D0.C
+1 1
+.names a_i_30__n.BLIF a_i_31__n.BLIF N_167_4
+11 1
+.names N_147_i.BLIF state_machine_un44_clk_000_d1_n.BLIF state_machine_lds_000_int_7_0_n
+11 1
+.names N_167_1.BLIF N_167_2.BLIF N_167_5
+11 1
+.names state_machine_un14_as_000_int_n.BLIF inst_DTACK_DMA.D
+0 1
+.names N_167_3.BLIF N_167_4.BLIF N_167_6
+11 1
+.names RST_c.BLIF RST_i
+0 1
+.names RST_c.BLIF RESETDFFreg.D
+1 1
+.names N_167_5.BLIF N_167_6.BLIF N_167
+11 1
+.names a_c_20__n.BLIF a_c_21__n.BLIF N_170_1
+11 1
+.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i
+0 1
+.names CLK_OSZI_c.BLIF RESETDFFreg.C
+1 1
+.names a_c_22__n.BLIF a_c_23__n.BLIF N_170_2
+11 1
+.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i
+0 1
+.names N_170_1.BLIF N_170_2.BLIF N_170
+11 1
+.names un1_as_030_4.BLIF uds_000_int_0_un3_n
+0 1
+.names AS_030_000_SYNC_i.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_1
+11 1
+.names inst_UDS_000_INTreg.BLIF un1_as_030_4.BLIF uds_000_int_0_un1_n
+11 1
+.names inst_CLK_000_D0.BLIF inst_CLK_000_D1.D
+1 1
+.names RW_c.BLIF SM_AMIGA_6_.BLIF UDS_000_INT_0_sqmuxa_1_2
+11 1
+.names state_machine_uds_000_int_7_n.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n
+11 1
+.names UDS_000_INT_0_sqmuxa_1_1.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF UDS_000_INT_0_sqmuxa_1_3
+11 1
+.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF inst_UDS_000_INTreg.D
+1- 1
+-1 1
+.names CLK_OSZI_c.BLIF inst_CLK_000_D1.C
+1 1
+.names UDS_000_INT_0_sqmuxa_1_3.BLIF state_machine_un30_clk_000_d1_n.BLIF UDS_000_INT_0_sqmuxa_1
+11 1
+.names un1_as_030_4.BLIF lds_000_int_0_un3_n
+0 1
+.names SM_AMIGA_4_.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_0
+11 1
+.names inst_LDS_000_INTreg.BLIF un1_as_030_4.BLIF lds_000_int_0_un1_n
+11 1
+.names UDS_000_INT_0_sqmuxa_1_0.BLIF RW_i.BLIF UDS_000_INT_0_sqmuxa
+11 1
+.names state_machine_lds_000_int_7_n.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n
+11 1
+.names gnd_n_n.BLIF CLK_REF_1_.D
+1 1
+.names size_c_i_1__n.BLIF a_c_i_0__n.BLIF state_machine_un44_clk_000_d1_i_1_n
+11 1
+.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INTreg.D
+1- 1
+-1 1
+.names state_machine_un44_clk_000_d1_i_1_n.BLIF size_c_0__n.BLIF state_machine_un44_clk_000_d1_i_n
+11 1
+.names vcc_n_n
+1
+.names gnd_n_n.BLIF CLK_REF_1_.LH
+1 1
+.names N_97.BLIF N_97_i
+0 1
+.names gnd_n_n
+.names N_147.BLIF N_147_i
+0 1
+.names A_15_.BLIF a_15__n
+1 1
+.names RST_i.BLIF CLK_REF_1_.AR
+1 1
+.names state_machine_lds_000_int_7_0_n.BLIF state_machine_lds_000_int_7_n
+0 1
+.names A_14_.BLIF a_14__n
+1 1
+.names state_machine_uds_000_int_7_0_n.BLIF state_machine_uds_000_int_7_n
+0 1
+.names A_13_.BLIF a_13__n
+1 1
+.names BG_030_c_i.BLIF N_94_i.BLIF un1_bg_030_0_1
+11 1
+.names A_12_.BLIF a_12__n
+1 1
+.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_0_.X1
+1 1
+.names AS_030_c.BLIF nEXP_SPACE_i.BLIF un1_bg_030_0_2
+11 1
+.names A_11_.BLIF a_11__n
+1 1
+.names un1_bg_030_0_1.BLIF un1_bg_030_0_2.BLIF un1_bg_030_0
+11 1
+.names A_10_.BLIF a_10__n
+1 1
+.names cpu_est_0_.BLIF cpu_est_0_0_.X2
+1 1
+.names AS_030_i.BLIF nEXP_SPACE_c.BLIF state_machine_as_030_000_sync_3_2_1_n
+11 1
+.names A_9_.BLIF a_9__n
+1 1
+.names state_machine_as_030_000_sync_3_2_1_n.BLIF state_machine_un42_clk_030_i_n.BLIF state_machine_as_030_000_sync_3_2_n
+11 1
+.names A_8_.BLIF a_8__n
+1 1
+.names N_126_i.BLIF N_124_i.BLIF clk_cpu_est_11_0_1_1__n
+11 1
+.names A_7_.BLIF a_7__n
+1 1
+.names CLK_CNT_0_.BLIF G_90.X1
+1 1
+.names N_123_i.BLIF N_125_i.BLIF clk_cpu_est_11_0_2_1__n
+11 1
+.names A_6_.BLIF a_6__n
+1 1
+.names clk_cpu_est_11_0_1_1__n.BLIF clk_cpu_est_11_0_2_1__n.BLIF clk_cpu_est_11_0_1__n
+11 1
+.names A_5_.BLIF a_5__n
+1 1
+.names CLK_CNT_1_.BLIF G_90.X2
+1 1
+.names a_i_24__n.BLIF a_i_25__n.BLIF N_167_1
+11 1
+.names A_4_.BLIF a_4__n
+1 1
+.names a_i_26__n.BLIF a_i_27__n.BLIF N_167_2
+11 1
+.names A_3_.BLIF a_3__n
+1 1
+.names a_i_28__n.BLIF a_i_29__n.BLIF N_167_3
+11 1
+.names A_2_.BLIF a_2__n
+1 1
+.names CLK_CNT_1_.BLIF G_86.X1
+1 1
+.names N_94.BLIF N_94_i
+0 1
+.names A_1_.BLIF a_1__n
+1 1
+.names un1_bg_030_0.BLIF un1_bg_030
+0 1
+.names CLK_REF_1_.BLIF G_86.X2
+1 1
+.names N_105.BLIF N_105_i
+0 1
+.names N_104.BLIF N_104_i
+0 1
+.names sm_amiga_ns_0_5__n.BLIF SM_AMIGA_2_.D
+0 1
+.names inst_CLK_OUT_PRE.BLIF CLK_OUT_PRE_0.X1
+1 1
+.names N_106.BLIF N_106_i
+0 1
+.names N_107.BLIF N_107_i
+0 1
+.names clk_clk_cnt_n.BLIF CLK_OUT_PRE_0.X2
+1 1
+.names inst_CLK_OUT_PRE.BLIF CLK_OUT_PRE_i
+0 1
+.names N_92_0.BLIF N_92
+0 1
+.names state_machine_un44_clk_000_d1_i_n.BLIF state_machine_un44_clk_000_d1_n
+0 1
+.names CLK_OUT_PRE_0.BLIF inst_CLK_OUT_PRE.D
+1 1
+.names a_c_0__n.BLIF a_c_i_0__n
+0 1
+.names cpu_est_0_0_.BLIF cpu_est_0_.D
+1 1
+.names size_c_1__n.BLIF size_c_i_1__n
+0 1
+.names N_98.BLIF N_98_i
+0 1
+.names N_99.BLIF N_99_i
+0 1
+.names sm_amiga_ns_0_1__n.BLIF SM_AMIGA_6_.D
+0 1
+.names state_machine_un13_clk_000_d0_n.BLIF state_machine_un13_clk_000_d0_i_n
+0 1
+.names state_machine_un15_clk_000_d0_0_n.BLIF state_machine_un15_clk_000_d0_n
+0 1
+.names state_machine_un23_clk_000_d0_i_n.BLIF state_machine_un23_clk_000_d0_n
+0 1
+.names N_100.BLIF N_100_i
+0 1
+.names sm_amiga_ns_0_2__n.BLIF SM_AMIGA_5_.D
+0 1
+.names BG_030_c.BLIF BG_030_c_i
+0 1
+.names state_machine_un1_clk_030_0_n.BLIF state_machine_un1_clk_030_n
+0 1
+.names clk_un4_clk_000_d1_n.BLIF clk_un4_clk_000_d1_i_n
+0 1
+.names state_machine_un6_bgack_000_0_n.BLIF state_machine_un6_bgack_000_n
+0 1
+.names state_machine_un17_clk_030_0_n.BLIF state_machine_un17_clk_030_n
+0 1
+.names un1_as_030_3_0.BLIF un1_as_030_3
+0 1
+.names N_89_i.BLIF N_89
+0 1
+.names AMIGA_BUS_ENABLE_i_m.BLIF AMIGA_BUS_ENABLE_i_m_i
+0 1
+.names nEXP_SPACE_m.BLIF nEXP_SPACE_m_i
+0 1
+.names state_machine_as_030_000_sync_3_2_n.BLIF state_machine_as_030_000_sync_3_n
+0 1
+.names N_128.BLIF N_128_i
+0 1
+.names N_125.BLIF N_125_i
+0 1
+.names N_123.BLIF N_123_i
+0 1
+.names N_124.BLIF N_124_i
+0 1
+.names N_126.BLIF N_126_i
+0 1
+.names clk_cpu_est_11_0_1__n.BLIF clk_cpu_est_11_1__n
+0 1
+.names N_131.BLIF N_131_i
+0 1
+.names clk_cpu_est_11_0_3__n.BLIF clk_cpu_est_11_3__n
+0 1
+.names N_130.BLIF N_130_i
+0 1
+.names N_129.BLIF N_129_i
+0 1
+.names N_122_i.BLIF N_122
+0 1
+.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C
+1 1
+.names N_121_i.BLIF N_121
+0 1
+.names N_108.BLIF N_108_i
+0 1
+.names RST_i.BLIF SM_AMIGA_5_.AR
+1 1
+.names sm_amiga_ns_0_7__n.BLIF SM_AMIGA_0_.D
+0 1
+.names state_machine_un8_clk_000_d0_n.BLIF state_machine_un8_clk_000_d0_i_n
+0 1
.names N_101.BLIF N_101_i
0 1
-.names RST_i.BLIF IPL_030DFFSH_2_reg.AP
+.names N_102.BLIF N_102_i
+0 1
+.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C
+1 1
+.names N_103.BLIF N_103_i
+0 1
+.names N_90_0.BLIF N_90
+0 1
+.names RST_i.BLIF SM_AMIGA_4_.AR
1 1
.end
diff --git a/Logic/BUS68030.bl1 b/Logic/BUS68030.bl1
index 29ce7d1..503f953 100644
--- a/Logic/BUS68030.bl1
+++ b/Logic/BUS68030.bl1
@@ -1,85 +1,92 @@
#$ TOOL ispLEVER Classic 1.7.00.05.28.13
-#$ DATE Fri May 16 17:07:08 2014
+#$ DATE Sun May 18 21:01:47 2014
#$ MODULE bus68030
-#$ PINS 74 A_17_ A_16_ SIZE_1_ A_15_ A_14_ A_31_ A_13_ A_12_ IPL_030_2_ A_11_ A_10_ \
-# IPL_2_ A_9_ A_8_ DSACK_1_ A_7_ A_6_ FC_1_ A_5_ AS_030 A_4_ AS_000 A_3_ DS_030 A_2_ UDS_000 \
-# A_1_ LDS_000 A_0_ nEXP_SPACE IPL_030_1_ BERR IPL_030_0_ BG_030 IPL_1_ BG_000 IPL_0_ \
-# BGACK_030 DSACK_0_ BGACK_000 FC_0_ CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS \
-# DTACK AVEC AVEC_EXP E VPA VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \
-# AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ \
-# A_21_ A_20_ A_19_ A_18_
-#$ NODES 340 ipl_c_0__n ipl_c_1__n ipl_c_2__n inst_BGACK_030_INTreg \
-# inst_FPU_CS_INTreg dsack_c_1__n cpu_est_3_reg inst_VMA_INTreg DTACK_c cpu_est_0_ \
-# cpu_est_1_ inst_AS_000_INTreg inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_D \
-# inst_VPA_SYNC inst_CLK_000_D0 RST_c inst_CLK_000_D1 inst_CLK_OUT_PRE RESETDFFreg \
-# vcc_n_n gnd_n_n RW_c cpu_est_2_ CLK_CNT_0_ fc_c_0__n SM_AMIGA_6_ SM_AMIGA_7_ fc_c_1__n \
-# inst_UDS_000_INTreg inst_LDS_000_INTreg DSACK_INT_1_ \
-# state_machine_un60_clk_000_d0_n SM_AMIGA_1_ inst_DTACK_DMA N_100_i SM_AMIGA_4_ \
-# sm_amiga_ns_0_2__n SM_AMIGA_3_ N_103_i DSACK_INT_1_sqmuxa N_104_i \
-# state_machine_un13_as_000_int_n VPA_SYNC_1_sqmuxa_1 N_106_i un1_as_030_4 N_105_i \
-# SM_AMIGA_5_ sm_amiga_ns_0_5__n SM_AMIGA_2_ N_107_i SM_AMIGA_0_ N_108_i \
-# state_machine_lds_000_int_8_n sm_amiga_ns_0_6__n state_machine_uds_000_int_8_n \
-# N_90_i N_93_0 N_128_i N_126_i N_127_i N_129_i clk_cpu_est_11_0_1__n N_133_i N_132_i \
-# N_134_i clk_cpu_est_11_0_3__n N_125_i cpu_est_0_0_ N_124_i N_130_i N_131_i N_121_i \
-# N_91_0 N_109_i sm_amiga_ns_0_7__n CLK_OUT_PRE_0 state_machine_un8_clk_000_d0_i_n \
-# state_machine_un13_clk_000_d0_i_n state_machine_un15_clk_000_d0_0_n BG_030_c_i \
-# state_machine_un1_clk_030_0_n clk_un4_clk_000_d1_n \
-# state_machine_un17_clk_030_0_n N_144 un1_as_030_3_0 N_101 \
-# state_machine_as_030_000_sync_3_2_n VPA_SYNC_1_sqmuxa N_96_i N_97 un1_bg_030_0 \
-# state_machine_un34_clk_000_d0_n clk_un4_clk_000_d1_i_n N_96 \
-# state_machine_un6_bgack_000_0_n N_102 N_98_i UDS_000_INT_0_sqmuxa \
-# UDS_000_INT_0_sqmuxa_1 N_111_i N_167 N_99_i N_170 N_92 N_92_0 N_91 \
-# state_machine_un34_clk_000_d0_i_n N_99 a_c_i_0__n N_111 size_c_i_1__n N_98 N_102_i \
-# state_machine_un6_bgack_000_n state_machine_un42_clk_030_n N_144_i \
-# DTACK_SYNC_1_sqmuxa state_machine_lds_000_int_8_0_n un1_bg_030 \
-# state_machine_uds_000_int_8_0_n state_machine_as_030_000_sync_3_n \
-# state_machine_un60_clk_000_d0_i_n DTACK_SYNC_1_sqmuxa_1 un1_bg_030_0_1 \
-# un1_as_030_3 un1_bg_030_0_2 state_machine_un17_clk_030_n \
-# state_machine_as_030_000_sync_3_2_1_n state_machine_un1_clk_030_n \
-# clk_cpu_est_11_0_1_3__n VPA_SYNC_1_sqmuxa_1_0 clk_cpu_est_11_0_1_1__n \
-# state_machine_un15_clk_000_d0_n clk_cpu_est_11_0_2_1__n \
-# state_machine_un13_clk_000_d0_n N_167_1 state_machine_un8_clk_000_d0_n N_167_2 \
-# N_109 N_167_3 state_machine_un13_clk_000_d0_1_n N_167_4 N_129 N_167_5 \
-# state_machine_un13_clk_000_d0_2_n N_167_6 N_130 N_170_1 N_131 N_170_2 N_124 \
-# UDS_000_INT_0_sqmuxa_1_1 N_125 UDS_000_INT_0_sqmuxa_1_2 N_134 \
-# UDS_000_INT_0_sqmuxa_1_3 N_134_1 UDS_000_INT_0_sqmuxa_1_0 N_106 \
-# UDS_000_INT_0_sqmuxa_2 clk_cpu_est_11_3__n state_machine_un34_clk_000_d0_i_1_n \
-# N_132 state_machine_un42_clk_030_1_n N_133 state_machine_un42_clk_030_2_n \
-# clk_cpu_est_11_1__n state_machine_un42_clk_030_3_n N_127 \
-# state_machine_un42_clk_030_4_n N_126 state_machine_un42_clk_030_5_n N_128 \
-# DTACK_SYNC_1_sqmuxa_1_0 N_93 N_130_1 N_90 N_131_1 N_107 \
-# state_machine_un8_clk_000_d0_1_n N_108 state_machine_un8_clk_000_d0_2_n N_105 \
-# state_machine_un8_clk_000_d0_3_n N_103 state_machine_un8_clk_000_d0_4_n N_104 \
-# state_machine_un13_clk_000_d0_1_0_n N_100 state_machine_un13_clk_000_d0_2_0_n \
-# AS_000_INT_1_sqmuxa VPA_SYNC_1_sqmuxa_1_1 RW_i VPA_SYNC_1_sqmuxa_2 nEXP_SPACE_i \
-# VPA_SYNC_1_sqmuxa_3 N_101_i VPA_SYNC_1_sqmuxa_4 AS_000_INT_i N_106_1 dsack_i_1__n \
-# cpu_est_0_3__un3_n AS_030_i cpu_est_0_3__un1_n CLK_000_D0_i cpu_est_0_3__un0_n \
-# sm_amiga_i_3__n cpu_est_0_1__un3_n sm_amiga_i_4__n cpu_est_0_1__un1_n CLK_000_D1_i \
-# cpu_est_0_1__un0_n cpu_est_i_0__n as_000_int_0_un3_n cpu_est_i_3__n \
-# as_000_int_0_un1_n cpu_est_i_2__n as_000_int_0_un0_n VPA_D_i bg_000_0_un3_n \
-# VMA_INT_i bg_000_0_un1_n cpu_est_i_1__n bg_000_0_un0_n \
-# state_machine_un13_clk_000_d0_2_i_n as_030_000_sync_0_un3_n \
-# state_machine_un13_clk_000_d0_1_i_n as_030_000_sync_0_un1_n DTACK_i \
-# as_030_000_sync_0_un0_n DTACK_SYNC_1_sqmuxa_i fpu_cs_int_0_un3_n a_i_18__n \
-# fpu_cs_int_0_un1_n a_i_16__n fpu_cs_int_0_un0_n a_i_19__n dtack_sync_0_un3_n \
-# CLK_030_i dtack_sync_0_un1_n state_machine_un42_clk_030_i_n dtack_sync_0_un0_n \
-# sm_amiga_i_6__n vma_int_0_un3_n sm_amiga_i_7__n vma_int_0_un1_n AS_030_000_SYNC_i \
-# vma_int_0_un0_n DS_030_i cpu_est_0_2__un3_n UDS_000_INT_0_sqmuxa_1_i \
-# cpu_est_0_2__un1_n UDS_000_INT_0_sqmuxa_i cpu_est_0_2__un0_n sm_amiga_i_5__n \
-# ipl_030_0_0__un3_n VPA_SYNC_1_sqmuxa_i ipl_030_0_0__un1_n N_97_i \
-# ipl_030_0_0__un0_n a_i_30__n ipl_030_0_1__un3_n a_i_31__n ipl_030_0_1__un1_n \
-# a_i_28__n ipl_030_0_1__un0_n a_i_29__n ipl_030_0_2__un3_n a_i_26__n \
-# ipl_030_0_2__un1_n a_i_27__n ipl_030_0_2__un0_n a_i_24__n bgack_030_int_0_un3_n \
-# a_i_25__n bgack_030_int_0_un1_n bgack_030_int_0_un0_n RST_i uds_000_int_0_un3_n \
-# uds_000_int_0_un1_n FPU_CS_INT_i uds_000_int_0_un0_n BGACK_030_INT_i \
-# lds_000_int_0_un3_n AS_030_c lds_000_int_0_un1_n lds_000_int_0_un0_n \
-# vpa_sync_0_un3_n DS_030_c vpa_sync_0_un1_n vpa_sync_0_un0_n dsack_int_0_1__un3_n \
-# dsack_int_0_1__un1_n size_c_0__n dsack_int_0_1__un0_n a_15__n size_c_1__n a_14__n \
-# a_c_0__n a_13__n a_12__n a_11__n a_10__n a_9__n a_8__n a_7__n a_6__n a_c_16__n a_5__n \
-# a_c_17__n a_4__n a_c_18__n a_3__n a_c_19__n a_2__n a_c_20__n a_1__n a_c_21__n a_c_22__n \
-# a_c_23__n a_c_24__n a_c_25__n a_c_26__n a_c_27__n a_c_28__n a_c_29__n a_c_30__n \
-# a_c_31__n nEXP_SPACE_c BG_030_c BG_000DFFSHreg BGACK_000_c CLK_030_c CLK_OSZI_c \
-# CLK_OUT_INTreg IPL_030DFFSH_0_reg IPL_030DFFSH_1_reg IPL_030DFFSH_2_reg
+#$ PINS 74 SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 DS_030 UDS_000 \
+# SIZE_0_ LDS_000 A_30_ nEXP_SPACE A_29_ BERR A_28_ BG_030 A_27_ BG_000 A_26_ BGACK_030 \
+# A_25_ BGACK_000 A_24_ CLK_030 A_23_ CLK_000 A_22_ CLK_OSZI A_21_ CLK_DIV_OUT A_20_ \
+# CLK_EXP A_19_ FPU_CS A_18_ DTACK A_17_ AVEC A_16_ AVEC_EXP A_15_ E A_14_ VPA A_13_ VMA A_12_ \
+# RST A_11_ RESET A_10_ RW A_9_ AMIGA_BUS_ENABLE A_8_ AMIGA_BUS_DATA_DIR A_7_ \
+# AMIGA_BUS_ENABLE_LOW A_6_ CIIN A_5_ A_4_ A_3_ A_2_ A_1_ A_0_ IPL_030_1_ IPL_030_0_ IPL_1_ \
+# IPL_0_ DSACK_0_ FC_0_
+#$ NODES 369 BGACK_000_c CLK_030_c CLK_000_c CLK_OSZI_c inst_BGACK_030_INTreg \
+# inst_FPU_CS_INTreg cpu_est_3_reg CLK_OUT_INTreg inst_VMA_INTreg cpu_est_0_ \
+# cpu_est_1_ IPL_030DFFSH_0_reg inst_AS_000_INTreg inst_AS_030_000_SYNC \
+# IPL_030DFFSH_1_reg inst_DTACK_SYNC inst_VPA_D IPL_030DFFSH_2_reg inst_VPA_SYNC \
+# inst_CLK_000_D0 ipl_c_0__n inst_CLK_000_D1 inst_CLK_000_D2 ipl_c_1__n \
+# inst_CLK_OUT_PRE SM_AMIGA_6_ ipl_c_2__n vcc_n_n gnd_n_n cpu_est_2_ dsack_c_1__n \
+# CLK_REF_1_ SM_AMIGA_7_ DTACK_c inst_UDS_000_INTreg inst_LDS_000_INTreg DSACK_INT_1_ \
+# clk_un4_clk_000_d1_n SM_AMIGA_4_ SM_AMIGA_1_ inst_DTACK_DMA clk_clk_cnt_n RST_c \
+# CLK_CNT_0_ CLK_CNT_1_ RESETDFFreg state_machine_un14_as_000_int_n SM_AMIGA_3_ RW_c \
+# fc_c_0__n un1_as_030_4 SM_AMIGA_5_ fc_c_1__n SM_AMIGA_2_ SM_AMIGA_0_ \
+# AMIGA_BUS_ENABLEDFFreg state_machine_lds_000_int_7_n \
+# state_machine_uds_000_int_7_n N_101_i N_102_i N_103_i N_90_0 N_91_0 N_127_i N_128_i \
+# CLK_OUT_PRE_0 N_118_i N_125_i cpu_est_0_0_ N_123_i N_124_i N_126_i \
+# clk_cpu_est_11_0_1__n N_131_i clk_cpu_est_11_0_3__n N_130_i N_129_i N_122_i N_121_i \
+# N_108_i G_86 sm_amiga_ns_0_7__n state_machine_un30_clk_000_d1_n \
+# state_machine_un8_clk_000_d0_i_n N_147 state_machine_un13_clk_000_d0_i_n N_96 \
+# state_machine_un15_clk_000_d0_0_n state_machine_un44_clk_000_d1_n \
+# state_machine_un23_clk_000_d0_i_n G_90 N_100_i N_89 sm_amiga_ns_0_2__n N_97 \
+# BG_030_c_i N_90 state_machine_un1_clk_030_0_n N_98 clk_un4_clk_000_d1_i_n N_99 \
+# state_machine_un6_bgack_000_0_n UDS_000_INT_0_sqmuxa \
+# state_machine_un17_clk_030_0_n UDS_000_INT_0_sqmuxa_1 un1_as_030_3_0 N_167 N_89_i \
+# N_170 AMIGA_BUS_ENABLE_i_m_i N_105 nEXP_SPACE_m_i N_92 \
+# state_machine_amiga_bus_enable_2_iv_i_n N_106 \
+# state_machine_as_030_000_sync_3_2_n N_107 N_94_i N_104 un1_bg_030_0 \
+# state_machine_un42_clk_030_n N_105_i un1_bg_030 N_104_i N_94 sm_amiga_ns_0_5__n \
+# state_machine_as_030_000_sync_3_n N_106_i AMIGA_BUS_ENABLE_i_m N_107_i \
+# nEXP_SPACE_m N_95 CLK_OUT_PRE_i un1_as_030_3 N_92_0 state_machine_un17_clk_030_n \
+# state_machine_un44_clk_000_d1_i_n state_machine_un6_bgack_000_n a_c_i_0__n \
+# state_machine_un1_clk_030_n size_c_i_1__n AS_000_INT_1_sqmuxa N_98_i \
+# DSACK_INT_1_sqmuxa N_99_i N_100 sm_amiga_ns_0_1__n state_machine_un23_clk_000_d0_n \
+# N_97_i DTACK_SYNC_1_sqmuxa DTACK_SYNC_1_sqmuxa_1 N_147_i VPA_SYNC_1_sqmuxa \
+# state_machine_lds_000_int_7_0_n VPA_SYNC_1_sqmuxa_1 \
+# state_machine_uds_000_int_7_0_n state_machine_un15_clk_000_d0_n un1_bg_030_0_1 \
+# clk_cpu_est_11_3__n un1_bg_030_0_2 state_machine_un2_clk_000_n \
+# state_machine_as_030_000_sync_3_2_1_n state_machine_un13_clk_000_d0_n \
+# clk_cpu_est_11_0_1_1__n state_machine_un8_clk_000_d0_n clk_cpu_est_11_0_2_1__n \
+# N_108 N_167_1 state_machine_un13_clk_000_d0_1_n N_167_2 N_124 N_167_3 N_126 N_167_4 \
+# state_machine_un13_clk_000_d0_2_n N_167_5 N_129 N_167_6 N_122 N_170_1 N_130 N_170_2 \
+# N_121 UDS_000_INT_0_sqmuxa_1_1 N_131 UDS_000_INT_0_sqmuxa_1_2 N_127 \
+# UDS_000_INT_0_sqmuxa_1_3 clk_cpu_est_11_1__n UDS_000_INT_0_sqmuxa_1_0 N_128 \
+# state_machine_un44_clk_000_d1_i_1_n N_123 state_machine_un42_clk_030_1_n N_125 \
+# state_machine_un42_clk_030_2_n N_91 state_machine_un42_clk_030_3_n N_102 \
+# state_machine_un42_clk_030_4_n N_103 state_machine_un42_clk_030_5_n N_101 N_96_1 \
+# RW_i AMIGA_BUS_ENABLE_i_m_1 AS_000_INT_i N_131_1 dsack_i_1__n \
+# clk_cpu_est_11_0_1_3__n sm_amiga_i_4__n N_105_1 sm_amiga_i_5__n \
+# VPA_SYNC_1_sqmuxa_1_0 CLK_000_D0_i VPA_SYNC_1_sqmuxa_2 sm_amiga_i_3__n \
+# VPA_SYNC_1_sqmuxa_3 cpu_est_i_0__n VPA_SYNC_1_sqmuxa_4 cpu_est_i_2__n \
+# VPA_SYNC_1_sqmuxa_5 state_machine_un13_clk_000_d0_2_i_n VPA_SYNC_1_sqmuxa_6 \
+# cpu_est_i_3__n DTACK_SYNC_1_sqmuxa_1_0 VPA_D_i DTACK_SYNC_1_sqmuxa_2 \
+# cpu_est_i_1__n state_machine_un8_clk_000_d0_1_n DTACK_i \
+# state_machine_un8_clk_000_d0_2_n VMA_INT_i state_machine_un8_clk_000_d0_3_n \
+# state_machine_un13_clk_000_d0_1_i_n state_machine_un8_clk_000_d0_4_n AS_030_i \
+# state_machine_un13_clk_000_d0_1_0_n DTACK_SYNC_1_sqmuxa_i \
+# state_machine_un13_clk_000_d0_2_0_n VPA_SYNC_1_sqmuxa_i N_127_1 CLK_000_D1_i \
+# N_128_1 N_95_i ipl_030_0_2__un3_n N_96_i ipl_030_0_2__un1_n a_i_18__n \
+# ipl_030_0_2__un0_n a_i_16__n ipl_030_0_1__un3_n a_i_19__n ipl_030_0_1__un1_n \
+# CLK_030_i ipl_030_0_1__un0_n CLK_000_D2_i ipl_030_0_0__un3_n \
+# state_machine_un42_clk_030_i_n ipl_030_0_0__un1_n sm_amiga_i_6__n \
+# ipl_030_0_0__un0_n sm_amiga_i_7__n cpu_est_0_2__un3_n AMIGA_BUS_ENABLE_i \
+# cpu_est_0_2__un1_n nEXP_SPACE_i cpu_est_0_2__un0_n sm_amiga_i_2__n \
+# cpu_est_0_1__un3_n sm_amiga_i_1__n cpu_est_0_1__un1_n DS_030_i cpu_est_0_1__un0_n \
+# AS_030_000_SYNC_i vpa_sync_0_un3_n UDS_000_INT_0_sqmuxa_1_i vpa_sync_0_un1_n \
+# UDS_000_INT_0_sqmuxa_i vpa_sync_0_un0_n clk_clk_cnt_i_n vma_int_0_un3_n \
+# clk_cnt_i_0__n vma_int_0_un1_n a_i_30__n vma_int_0_un0_n a_i_31__n \
+# cpu_est_0_3__un3_n a_i_28__n cpu_est_0_3__un1_n a_i_29__n cpu_est_0_3__un0_n \
+# a_i_26__n bgack_030_int_0_un3_n a_i_27__n bgack_030_int_0_un1_n a_i_24__n \
+# bgack_030_int_0_un0_n a_i_25__n bg_000_0_un3_n N_132_i bg_000_0_un1_n \
+# bg_000_0_un0_n RST_i amiga_bus_enable_0_un3_n FPU_CS_INT_i \
+# amiga_bus_enable_0_un1_n BGACK_030_INT_i amiga_bus_enable_0_un0_n AS_030_c \
+# as_030_000_sync_0_un3_n as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n DS_030_c \
+# fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n fpu_cs_int_0_un0_n as_000_int_0_un3_n \
+# size_c_0__n as_000_int_0_un1_n as_000_int_0_un0_n size_c_1__n dsack_int_0_1__un3_n \
+# dsack_int_0_1__un1_n a_c_0__n dsack_int_0_1__un0_n dtack_sync_0_un3_n \
+# dtack_sync_0_un1_n dtack_sync_0_un0_n uds_000_int_0_un3_n uds_000_int_0_un1_n \
+# uds_000_int_0_un0_n lds_000_int_0_un3_n lds_000_int_0_un1_n lds_000_int_0_un0_n \
+# a_15__n a_14__n a_13__n a_12__n a_c_16__n a_11__n a_c_17__n a_10__n a_c_18__n a_9__n \
+# a_c_19__n a_8__n a_c_20__n a_7__n a_c_21__n a_6__n a_c_22__n a_5__n a_c_23__n a_4__n \
+# a_c_24__n a_3__n a_c_25__n a_2__n a_c_26__n a_1__n a_c_27__n a_c_28__n a_c_29__n \
+# a_c_30__n a_c_31__n nEXP_SPACE_c BG_030_c BG_000DFFSHreg
.model bus68030
.inputs SIZE_1_.BLIF A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF AS_030.BLIF DS_030.BLIF \
nEXP_SPACE.BLIF BG_030.BLIF BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF \
@@ -89,214 +96,241 @@ A_21_.BLIF A_20_.BLIF A_19_.BLIF A_18_.BLIF A_17_.BLIF A_16_.BLIF A_15_.BLIF \
A_14_.BLIF A_13_.BLIF A_12_.BLIF A_11_.BLIF A_10_.BLIF A_9_.BLIF A_8_.BLIF \
A_7_.BLIF A_6_.BLIF A_5_.BLIF A_4_.BLIF A_3_.BLIF A_2_.BLIF A_1_.BLIF \
A_0_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF DSACK_1_.BLIF DTACK.BLIF \
-DSACK_0_.BLIF ipl_c_0__n.BLIF ipl_c_1__n.BLIF ipl_c_2__n.BLIF \
-inst_BGACK_030_INTreg.BLIF inst_FPU_CS_INTreg.BLIF dsack_c_1__n.BLIF \
-cpu_est_3_reg.BLIF inst_VMA_INTreg.BLIF DTACK_c.BLIF cpu_est_0_.BLIF \
-cpu_est_1_.BLIF inst_AS_000_INTreg.BLIF inst_AS_030_000_SYNC.BLIF \
-inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF \
-RST_c.BLIF inst_CLK_000_D1.BLIF inst_CLK_OUT_PRE.BLIF RESETDFFreg.BLIF \
-vcc_n_n.BLIF gnd_n_n.BLIF RW_c.BLIF cpu_est_2_.BLIF CLK_CNT_0_.BLIF \
-fc_c_0__n.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_7_.BLIF fc_c_1__n.BLIF \
-inst_UDS_000_INTreg.BLIF inst_LDS_000_INTreg.BLIF DSACK_INT_1_.BLIF \
-state_machine_un60_clk_000_d0_n.BLIF SM_AMIGA_1_.BLIF inst_DTACK_DMA.BLIF \
-N_100_i.BLIF SM_AMIGA_4_.BLIF sm_amiga_ns_0_2__n.BLIF SM_AMIGA_3_.BLIF \
-N_103_i.BLIF DSACK_INT_1_sqmuxa.BLIF N_104_i.BLIF \
-state_machine_un13_as_000_int_n.BLIF VPA_SYNC_1_sqmuxa_1.BLIF N_106_i.BLIF \
-un1_as_030_4.BLIF N_105_i.BLIF SM_AMIGA_5_.BLIF sm_amiga_ns_0_5__n.BLIF \
-SM_AMIGA_2_.BLIF N_107_i.BLIF SM_AMIGA_0_.BLIF N_108_i.BLIF \
-state_machine_lds_000_int_8_n.BLIF sm_amiga_ns_0_6__n.BLIF \
-state_machine_uds_000_int_8_n.BLIF N_90_i.BLIF N_93_0.BLIF N_128_i.BLIF \
-N_126_i.BLIF N_127_i.BLIF N_129_i.BLIF clk_cpu_est_11_0_1__n.BLIF N_133_i.BLIF \
-N_132_i.BLIF N_134_i.BLIF clk_cpu_est_11_0_3__n.BLIF N_125_i.BLIF \
-cpu_est_0_0_.BLIF N_124_i.BLIF N_130_i.BLIF N_131_i.BLIF N_121_i.BLIF \
-N_91_0.BLIF N_109_i.BLIF sm_amiga_ns_0_7__n.BLIF CLK_OUT_PRE_0.BLIF \
-state_machine_un8_clk_000_d0_i_n.BLIF state_machine_un13_clk_000_d0_i_n.BLIF \
-state_machine_un15_clk_000_d0_0_n.BLIF BG_030_c_i.BLIF \
-state_machine_un1_clk_030_0_n.BLIF clk_un4_clk_000_d1_n.BLIF \
-state_machine_un17_clk_030_0_n.BLIF N_144.BLIF un1_as_030_3_0.BLIF N_101.BLIF \
-state_machine_as_030_000_sync_3_2_n.BLIF VPA_SYNC_1_sqmuxa.BLIF N_96_i.BLIF \
-N_97.BLIF un1_bg_030_0.BLIF state_machine_un34_clk_000_d0_n.BLIF \
-clk_un4_clk_000_d1_i_n.BLIF N_96.BLIF state_machine_un6_bgack_000_0_n.BLIF \
-N_102.BLIF N_98_i.BLIF UDS_000_INT_0_sqmuxa.BLIF UDS_000_INT_0_sqmuxa_1.BLIF \
-N_111_i.BLIF N_167.BLIF N_99_i.BLIF N_170.BLIF N_92.BLIF N_92_0.BLIF N_91.BLIF \
-state_machine_un34_clk_000_d0_i_n.BLIF N_99.BLIF a_c_i_0__n.BLIF N_111.BLIF \
-size_c_i_1__n.BLIF N_98.BLIF N_102_i.BLIF state_machine_un6_bgack_000_n.BLIF \
-state_machine_un42_clk_030_n.BLIF N_144_i.BLIF DTACK_SYNC_1_sqmuxa.BLIF \
-state_machine_lds_000_int_8_0_n.BLIF un1_bg_030.BLIF \
-state_machine_uds_000_int_8_0_n.BLIF state_machine_as_030_000_sync_3_n.BLIF \
-state_machine_un60_clk_000_d0_i_n.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF \
-un1_bg_030_0_1.BLIF un1_as_030_3.BLIF un1_bg_030_0_2.BLIF \
-state_machine_un17_clk_030_n.BLIF state_machine_as_030_000_sync_3_2_1_n.BLIF \
-state_machine_un1_clk_030_n.BLIF clk_cpu_est_11_0_1_3__n.BLIF \
-VPA_SYNC_1_sqmuxa_1_0.BLIF clk_cpu_est_11_0_1_1__n.BLIF \
-state_machine_un15_clk_000_d0_n.BLIF clk_cpu_est_11_0_2_1__n.BLIF \
-state_machine_un13_clk_000_d0_n.BLIF N_167_1.BLIF \
-state_machine_un8_clk_000_d0_n.BLIF N_167_2.BLIF N_109.BLIF N_167_3.BLIF \
-state_machine_un13_clk_000_d0_1_n.BLIF N_167_4.BLIF N_129.BLIF N_167_5.BLIF \
-state_machine_un13_clk_000_d0_2_n.BLIF N_167_6.BLIF N_130.BLIF N_170_1.BLIF \
-N_131.BLIF N_170_2.BLIF N_124.BLIF UDS_000_INT_0_sqmuxa_1_1.BLIF N_125.BLIF \
-UDS_000_INT_0_sqmuxa_1_2.BLIF N_134.BLIF UDS_000_INT_0_sqmuxa_1_3.BLIF \
-N_134_1.BLIF UDS_000_INT_0_sqmuxa_1_0.BLIF N_106.BLIF \
-UDS_000_INT_0_sqmuxa_2.BLIF clk_cpu_est_11_3__n.BLIF \
-state_machine_un34_clk_000_d0_i_1_n.BLIF N_132.BLIF \
-state_machine_un42_clk_030_1_n.BLIF N_133.BLIF \
-state_machine_un42_clk_030_2_n.BLIF clk_cpu_est_11_1__n.BLIF \
-state_machine_un42_clk_030_3_n.BLIF N_127.BLIF \
-state_machine_un42_clk_030_4_n.BLIF N_126.BLIF \
-state_machine_un42_clk_030_5_n.BLIF N_128.BLIF DTACK_SYNC_1_sqmuxa_1_0.BLIF \
-N_93.BLIF N_130_1.BLIF N_90.BLIF N_131_1.BLIF N_107.BLIF \
-state_machine_un8_clk_000_d0_1_n.BLIF N_108.BLIF \
-state_machine_un8_clk_000_d0_2_n.BLIF N_105.BLIF \
-state_machine_un8_clk_000_d0_3_n.BLIF N_103.BLIF \
-state_machine_un8_clk_000_d0_4_n.BLIF N_104.BLIF \
-state_machine_un13_clk_000_d0_1_0_n.BLIF N_100.BLIF \
-state_machine_un13_clk_000_d0_2_0_n.BLIF AS_000_INT_1_sqmuxa.BLIF \
-VPA_SYNC_1_sqmuxa_1_1.BLIF RW_i.BLIF VPA_SYNC_1_sqmuxa_2.BLIF \
-nEXP_SPACE_i.BLIF VPA_SYNC_1_sqmuxa_3.BLIF N_101_i.BLIF \
-VPA_SYNC_1_sqmuxa_4.BLIF AS_000_INT_i.BLIF N_106_1.BLIF dsack_i_1__n.BLIF \
-cpu_est_0_3__un3_n.BLIF AS_030_i.BLIF cpu_est_0_3__un1_n.BLIF \
-CLK_000_D0_i.BLIF cpu_est_0_3__un0_n.BLIF sm_amiga_i_3__n.BLIF \
-cpu_est_0_1__un3_n.BLIF sm_amiga_i_4__n.BLIF cpu_est_0_1__un1_n.BLIF \
-CLK_000_D1_i.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_i_0__n.BLIF \
-as_000_int_0_un3_n.BLIF cpu_est_i_3__n.BLIF as_000_int_0_un1_n.BLIF \
-cpu_est_i_2__n.BLIF as_000_int_0_un0_n.BLIF VPA_D_i.BLIF bg_000_0_un3_n.BLIF \
-VMA_INT_i.BLIF bg_000_0_un1_n.BLIF cpu_est_i_1__n.BLIF bg_000_0_un0_n.BLIF \
-state_machine_un13_clk_000_d0_2_i_n.BLIF as_030_000_sync_0_un3_n.BLIF \
-state_machine_un13_clk_000_d0_1_i_n.BLIF as_030_000_sync_0_un1_n.BLIF \
-DTACK_i.BLIF as_030_000_sync_0_un0_n.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF \
-fpu_cs_int_0_un3_n.BLIF a_i_18__n.BLIF fpu_cs_int_0_un1_n.BLIF a_i_16__n.BLIF \
-fpu_cs_int_0_un0_n.BLIF a_i_19__n.BLIF dtack_sync_0_un3_n.BLIF CLK_030_i.BLIF \
-dtack_sync_0_un1_n.BLIF state_machine_un42_clk_030_i_n.BLIF \
-dtack_sync_0_un0_n.BLIF sm_amiga_i_6__n.BLIF vma_int_0_un3_n.BLIF \
-sm_amiga_i_7__n.BLIF vma_int_0_un1_n.BLIF AS_030_000_SYNC_i.BLIF \
-vma_int_0_un0_n.BLIF DS_030_i.BLIF cpu_est_0_2__un3_n.BLIF \
-UDS_000_INT_0_sqmuxa_1_i.BLIF cpu_est_0_2__un1_n.BLIF \
-UDS_000_INT_0_sqmuxa_i.BLIF cpu_est_0_2__un0_n.BLIF sm_amiga_i_5__n.BLIF \
-ipl_030_0_0__un3_n.BLIF VPA_SYNC_1_sqmuxa_i.BLIF ipl_030_0_0__un1_n.BLIF \
-N_97_i.BLIF ipl_030_0_0__un0_n.BLIF a_i_30__n.BLIF ipl_030_0_1__un3_n.BLIF \
-a_i_31__n.BLIF ipl_030_0_1__un1_n.BLIF a_i_28__n.BLIF ipl_030_0_1__un0_n.BLIF \
-a_i_29__n.BLIF ipl_030_0_2__un3_n.BLIF a_i_26__n.BLIF ipl_030_0_2__un1_n.BLIF \
-a_i_27__n.BLIF ipl_030_0_2__un0_n.BLIF a_i_24__n.BLIF \
-bgack_030_int_0_un3_n.BLIF a_i_25__n.BLIF bgack_030_int_0_un1_n.BLIF \
-bgack_030_int_0_un0_n.BLIF RST_i.BLIF uds_000_int_0_un3_n.BLIF \
-uds_000_int_0_un1_n.BLIF FPU_CS_INT_i.BLIF uds_000_int_0_un0_n.BLIF \
-BGACK_030_INT_i.BLIF lds_000_int_0_un3_n.BLIF AS_030_c.BLIF \
-lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF vpa_sync_0_un3_n.BLIF \
-DS_030_c.BLIF vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF \
-dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un1_n.BLIF size_c_0__n.BLIF \
-dsack_int_0_1__un0_n.BLIF a_15__n.BLIF size_c_1__n.BLIF a_14__n.BLIF \
-a_c_0__n.BLIF a_13__n.BLIF a_12__n.BLIF a_11__n.BLIF a_10__n.BLIF a_9__n.BLIF \
-a_8__n.BLIF a_7__n.BLIF a_6__n.BLIF a_c_16__n.BLIF a_5__n.BLIF a_c_17__n.BLIF \
-a_4__n.BLIF a_c_18__n.BLIF a_3__n.BLIF a_c_19__n.BLIF a_2__n.BLIF \
-a_c_20__n.BLIF a_1__n.BLIF a_c_21__n.BLIF a_c_22__n.BLIF a_c_23__n.BLIF \
-a_c_24__n.BLIF a_c_25__n.BLIF a_c_26__n.BLIF a_c_27__n.BLIF a_c_28__n.BLIF \
-a_c_29__n.BLIF a_c_30__n.BLIF a_c_31__n.BLIF nEXP_SPACE_c.BLIF BG_030_c.BLIF \
-BG_000DFFSHreg.BLIF BGACK_000_c.BLIF CLK_030_c.BLIF CLK_OSZI_c.BLIF \
-CLK_OUT_INTreg.BLIF IPL_030DFFSH_0_reg.BLIF IPL_030DFFSH_1_reg.BLIF \
-IPL_030DFFSH_2_reg.BLIF DSACK_1_.PIN.BLIF DTACK.PIN.BLIF
+DSACK_0_.BLIF BGACK_000_c.BLIF CLK_030_c.BLIF CLK_000_c.BLIF CLK_OSZI_c.BLIF \
+inst_BGACK_030_INTreg.BLIF inst_FPU_CS_INTreg.BLIF cpu_est_3_reg.BLIF \
+CLK_OUT_INTreg.BLIF inst_VMA_INTreg.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF \
+IPL_030DFFSH_0_reg.BLIF inst_AS_000_INTreg.BLIF inst_AS_030_000_SYNC.BLIF \
+IPL_030DFFSH_1_reg.BLIF inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF \
+IPL_030DFFSH_2_reg.BLIF inst_VPA_SYNC.BLIF inst_CLK_000_D0.BLIF \
+ipl_c_0__n.BLIF inst_CLK_000_D1.BLIF inst_CLK_000_D2.BLIF ipl_c_1__n.BLIF \
+inst_CLK_OUT_PRE.BLIF SM_AMIGA_6_.BLIF ipl_c_2__n.BLIF vcc_n_n.BLIF \
+gnd_n_n.BLIF cpu_est_2_.BLIF dsack_c_1__n.BLIF CLK_REF_1_.BLIF \
+SM_AMIGA_7_.BLIF DTACK_c.BLIF inst_UDS_000_INTreg.BLIF \
+inst_LDS_000_INTreg.BLIF DSACK_INT_1_.BLIF clk_un4_clk_000_d1_n.BLIF \
+SM_AMIGA_4_.BLIF SM_AMIGA_1_.BLIF inst_DTACK_DMA.BLIF clk_clk_cnt_n.BLIF \
+RST_c.BLIF CLK_CNT_0_.BLIF CLK_CNT_1_.BLIF RESETDFFreg.BLIF \
+state_machine_un14_as_000_int_n.BLIF SM_AMIGA_3_.BLIF RW_c.BLIF fc_c_0__n.BLIF \
+un1_as_030_4.BLIF SM_AMIGA_5_.BLIF fc_c_1__n.BLIF SM_AMIGA_2_.BLIF \
+SM_AMIGA_0_.BLIF AMIGA_BUS_ENABLEDFFreg.BLIF \
+state_machine_lds_000_int_7_n.BLIF state_machine_uds_000_int_7_n.BLIF \
+N_101_i.BLIF N_102_i.BLIF N_103_i.BLIF N_90_0.BLIF N_91_0.BLIF N_127_i.BLIF \
+N_128_i.BLIF CLK_OUT_PRE_0.BLIF N_118_i.BLIF N_125_i.BLIF cpu_est_0_0_.BLIF \
+N_123_i.BLIF N_124_i.BLIF N_126_i.BLIF clk_cpu_est_11_0_1__n.BLIF N_131_i.BLIF \
+clk_cpu_est_11_0_3__n.BLIF N_130_i.BLIF N_129_i.BLIF N_122_i.BLIF N_121_i.BLIF \
+N_108_i.BLIF G_86.BLIF sm_amiga_ns_0_7__n.BLIF \
+state_machine_un30_clk_000_d1_n.BLIF state_machine_un8_clk_000_d0_i_n.BLIF \
+N_147.BLIF state_machine_un13_clk_000_d0_i_n.BLIF N_96.BLIF \
+state_machine_un15_clk_000_d0_0_n.BLIF state_machine_un44_clk_000_d1_n.BLIF \
+state_machine_un23_clk_000_d0_i_n.BLIF G_90.BLIF N_100_i.BLIF N_89.BLIF \
+sm_amiga_ns_0_2__n.BLIF N_97.BLIF BG_030_c_i.BLIF N_90.BLIF \
+state_machine_un1_clk_030_0_n.BLIF N_98.BLIF clk_un4_clk_000_d1_i_n.BLIF \
+N_99.BLIF state_machine_un6_bgack_000_0_n.BLIF UDS_000_INT_0_sqmuxa.BLIF \
+state_machine_un17_clk_030_0_n.BLIF UDS_000_INT_0_sqmuxa_1.BLIF \
+un1_as_030_3_0.BLIF N_167.BLIF N_89_i.BLIF N_170.BLIF \
+AMIGA_BUS_ENABLE_i_m_i.BLIF N_105.BLIF nEXP_SPACE_m_i.BLIF N_92.BLIF \
+state_machine_amiga_bus_enable_2_iv_i_n.BLIF N_106.BLIF \
+state_machine_as_030_000_sync_3_2_n.BLIF N_107.BLIF N_94_i.BLIF N_104.BLIF \
+un1_bg_030_0.BLIF state_machine_un42_clk_030_n.BLIF N_105_i.BLIF \
+un1_bg_030.BLIF N_104_i.BLIF N_94.BLIF sm_amiga_ns_0_5__n.BLIF \
+state_machine_as_030_000_sync_3_n.BLIF N_106_i.BLIF AMIGA_BUS_ENABLE_i_m.BLIF \
+N_107_i.BLIF nEXP_SPACE_m.BLIF N_95.BLIF CLK_OUT_PRE_i.BLIF un1_as_030_3.BLIF \
+N_92_0.BLIF state_machine_un17_clk_030_n.BLIF \
+state_machine_un44_clk_000_d1_i_n.BLIF state_machine_un6_bgack_000_n.BLIF \
+a_c_i_0__n.BLIF state_machine_un1_clk_030_n.BLIF size_c_i_1__n.BLIF \
+AS_000_INT_1_sqmuxa.BLIF N_98_i.BLIF DSACK_INT_1_sqmuxa.BLIF N_99_i.BLIF \
+N_100.BLIF sm_amiga_ns_0_1__n.BLIF state_machine_un23_clk_000_d0_n.BLIF \
+N_97_i.BLIF DTACK_SYNC_1_sqmuxa.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF N_147_i.BLIF \
+VPA_SYNC_1_sqmuxa.BLIF state_machine_lds_000_int_7_0_n.BLIF \
+VPA_SYNC_1_sqmuxa_1.BLIF state_machine_uds_000_int_7_0_n.BLIF \
+state_machine_un15_clk_000_d0_n.BLIF un1_bg_030_0_1.BLIF \
+clk_cpu_est_11_3__n.BLIF un1_bg_030_0_2.BLIF state_machine_un2_clk_000_n.BLIF \
+state_machine_as_030_000_sync_3_2_1_n.BLIF \
+state_machine_un13_clk_000_d0_n.BLIF clk_cpu_est_11_0_1_1__n.BLIF \
+state_machine_un8_clk_000_d0_n.BLIF clk_cpu_est_11_0_2_1__n.BLIF N_108.BLIF \
+N_167_1.BLIF state_machine_un13_clk_000_d0_1_n.BLIF N_167_2.BLIF N_124.BLIF \
+N_167_3.BLIF N_126.BLIF N_167_4.BLIF state_machine_un13_clk_000_d0_2_n.BLIF \
+N_167_5.BLIF N_129.BLIF N_167_6.BLIF N_122.BLIF N_170_1.BLIF N_130.BLIF \
+N_170_2.BLIF N_121.BLIF UDS_000_INT_0_sqmuxa_1_1.BLIF N_131.BLIF \
+UDS_000_INT_0_sqmuxa_1_2.BLIF N_127.BLIF UDS_000_INT_0_sqmuxa_1_3.BLIF \
+clk_cpu_est_11_1__n.BLIF UDS_000_INT_0_sqmuxa_1_0.BLIF N_128.BLIF \
+state_machine_un44_clk_000_d1_i_1_n.BLIF N_123.BLIF \
+state_machine_un42_clk_030_1_n.BLIF N_125.BLIF \
+state_machine_un42_clk_030_2_n.BLIF N_91.BLIF \
+state_machine_un42_clk_030_3_n.BLIF N_102.BLIF \
+state_machine_un42_clk_030_4_n.BLIF N_103.BLIF \
+state_machine_un42_clk_030_5_n.BLIF N_101.BLIF N_96_1.BLIF RW_i.BLIF \
+AMIGA_BUS_ENABLE_i_m_1.BLIF AS_000_INT_i.BLIF N_131_1.BLIF dsack_i_1__n.BLIF \
+clk_cpu_est_11_0_1_3__n.BLIF sm_amiga_i_4__n.BLIF N_105_1.BLIF \
+sm_amiga_i_5__n.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF CLK_000_D0_i.BLIF \
+VPA_SYNC_1_sqmuxa_2.BLIF sm_amiga_i_3__n.BLIF VPA_SYNC_1_sqmuxa_3.BLIF \
+cpu_est_i_0__n.BLIF VPA_SYNC_1_sqmuxa_4.BLIF cpu_est_i_2__n.BLIF \
+VPA_SYNC_1_sqmuxa_5.BLIF state_machine_un13_clk_000_d0_2_i_n.BLIF \
+VPA_SYNC_1_sqmuxa_6.BLIF cpu_est_i_3__n.BLIF DTACK_SYNC_1_sqmuxa_1_0.BLIF \
+VPA_D_i.BLIF DTACK_SYNC_1_sqmuxa_2.BLIF cpu_est_i_1__n.BLIF \
+state_machine_un8_clk_000_d0_1_n.BLIF DTACK_i.BLIF \
+state_machine_un8_clk_000_d0_2_n.BLIF VMA_INT_i.BLIF \
+state_machine_un8_clk_000_d0_3_n.BLIF state_machine_un13_clk_000_d0_1_i_n.BLIF \
+state_machine_un8_clk_000_d0_4_n.BLIF AS_030_i.BLIF \
+state_machine_un13_clk_000_d0_1_0_n.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF \
+state_machine_un13_clk_000_d0_2_0_n.BLIF VPA_SYNC_1_sqmuxa_i.BLIF N_127_1.BLIF \
+CLK_000_D1_i.BLIF N_128_1.BLIF N_95_i.BLIF ipl_030_0_2__un3_n.BLIF N_96_i.BLIF \
+ipl_030_0_2__un1_n.BLIF a_i_18__n.BLIF ipl_030_0_2__un0_n.BLIF a_i_16__n.BLIF \
+ipl_030_0_1__un3_n.BLIF a_i_19__n.BLIF ipl_030_0_1__un1_n.BLIF CLK_030_i.BLIF \
+ipl_030_0_1__un0_n.BLIF CLK_000_D2_i.BLIF ipl_030_0_0__un3_n.BLIF \
+state_machine_un42_clk_030_i_n.BLIF ipl_030_0_0__un1_n.BLIF \
+sm_amiga_i_6__n.BLIF ipl_030_0_0__un0_n.BLIF sm_amiga_i_7__n.BLIF \
+cpu_est_0_2__un3_n.BLIF AMIGA_BUS_ENABLE_i.BLIF cpu_est_0_2__un1_n.BLIF \
+nEXP_SPACE_i.BLIF cpu_est_0_2__un0_n.BLIF sm_amiga_i_2__n.BLIF \
+cpu_est_0_1__un3_n.BLIF sm_amiga_i_1__n.BLIF cpu_est_0_1__un1_n.BLIF \
+DS_030_i.BLIF cpu_est_0_1__un0_n.BLIF AS_030_000_SYNC_i.BLIF \
+vpa_sync_0_un3_n.BLIF UDS_000_INT_0_sqmuxa_1_i.BLIF vpa_sync_0_un1_n.BLIF \
+UDS_000_INT_0_sqmuxa_i.BLIF vpa_sync_0_un0_n.BLIF clk_clk_cnt_i_n.BLIF \
+vma_int_0_un3_n.BLIF clk_cnt_i_0__n.BLIF vma_int_0_un1_n.BLIF a_i_30__n.BLIF \
+vma_int_0_un0_n.BLIF a_i_31__n.BLIF cpu_est_0_3__un3_n.BLIF a_i_28__n.BLIF \
+cpu_est_0_3__un1_n.BLIF a_i_29__n.BLIF cpu_est_0_3__un0_n.BLIF a_i_26__n.BLIF \
+bgack_030_int_0_un3_n.BLIF a_i_27__n.BLIF bgack_030_int_0_un1_n.BLIF \
+a_i_24__n.BLIF bgack_030_int_0_un0_n.BLIF a_i_25__n.BLIF bg_000_0_un3_n.BLIF \
+N_132_i.BLIF bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF RST_i.BLIF \
+amiga_bus_enable_0_un3_n.BLIF FPU_CS_INT_i.BLIF amiga_bus_enable_0_un1_n.BLIF \
+BGACK_030_INT_i.BLIF amiga_bus_enable_0_un0_n.BLIF AS_030_c.BLIF \
+as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un1_n.BLIF \
+as_030_000_sync_0_un0_n.BLIF DS_030_c.BLIF fpu_cs_int_0_un3_n.BLIF \
+fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF as_000_int_0_un3_n.BLIF \
+size_c_0__n.BLIF as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF \
+size_c_1__n.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un1_n.BLIF \
+a_c_0__n.BLIF dsack_int_0_1__un0_n.BLIF dtack_sync_0_un3_n.BLIF \
+dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF uds_000_int_0_un3_n.BLIF \
+uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF lds_000_int_0_un3_n.BLIF \
+lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF a_15__n.BLIF a_14__n.BLIF \
+a_13__n.BLIF a_12__n.BLIF a_c_16__n.BLIF a_11__n.BLIF a_c_17__n.BLIF \
+a_10__n.BLIF a_c_18__n.BLIF a_9__n.BLIF a_c_19__n.BLIF a_8__n.BLIF \
+a_c_20__n.BLIF a_7__n.BLIF a_c_21__n.BLIF a_6__n.BLIF a_c_22__n.BLIF \
+a_5__n.BLIF a_c_23__n.BLIF a_4__n.BLIF a_c_24__n.BLIF a_3__n.BLIF \
+a_c_25__n.BLIF a_2__n.BLIF a_c_26__n.BLIF a_1__n.BLIF a_c_27__n.BLIF \
+a_c_28__n.BLIF a_c_29__n.BLIF a_c_30__n.BLIF a_c_31__n.BLIF nEXP_SPACE_c.BLIF \
+BG_030_c.BLIF BG_000DFFSHreg.BLIF DSACK_1_.PIN.BLIF DTACK.PIN.BLIF
.outputs IPL_030_2_ AS_000 UDS_000 LDS_000 BERR BG_000 BGACK_030 CLK_DIV_OUT \
CLK_EXP FPU_CS AVEC AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \
-AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_3_.D SM_AMIGA_3_.C \
-SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D \
-SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR \
+AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ SM_AMIGA_5_.D SM_AMIGA_5_.C \
+SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D \
+SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR \
+SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C \
+SM_AMIGA_0_.AR cpu_est_2_.D cpu_est_2_.C cpu_est_3_reg.D cpu_est_3_reg.C \
IPL_030DFFSH_0_reg.D IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP \
IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP \
IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D \
SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR \
-SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C \
-SM_AMIGA_4_.AR DSACK_INT_1_.D DSACK_INT_1_.C DSACK_INT_1_.AP inst_VMA_INTreg.D \
-inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_BGACK_030_INTreg.D \
-inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE.D \
-inst_CLK_OUT_PRE.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C \
-cpu_est_2_.D cpu_est_2_.C cpu_est_3_reg.D cpu_est_3_reg.C \
-inst_LDS_000_INTreg.D inst_LDS_000_INTreg.C inst_LDS_000_INTreg.AP \
-inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_FPU_CS_INTreg.D \
+inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C inst_BGACK_030_INTreg.D \
+inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP CLK_CNT_0_.D CLK_CNT_0_.C \
+CLK_CNT_1_.D CLK_CNT_1_.C cpu_est_0_.D cpu_est_0_.C cpu_est_1_.D cpu_est_1_.C \
+inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_FPU_CS_INTreg.D \
inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP inst_AS_030_000_SYNC.D \
inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_AS_000_INTreg.D \
-inst_AS_000_INTreg.C inst_AS_000_INTreg.AP inst_VPA_SYNC.D inst_VPA_SYNC.C \
-inst_VPA_SYNC.AP BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP \
-inst_DTACK_DMA.D inst_DTACK_DMA.C inst_DTACK_DMA.AP inst_UDS_000_INTreg.D \
-inst_UDS_000_INTreg.C inst_UDS_000_INTreg.AP CLK_CNT_0_.D CLK_CNT_0_.C \
-inst_VPA_D.D inst_VPA_D.C inst_CLK_000_D0.D inst_CLK_000_D0.C RESETDFFreg.D \
-RESETDFFreg.C inst_CLK_000_D1.D inst_CLK_000_D1.C CLK_OUT_INTreg.D \
-CLK_OUT_INTreg.C DSACK_1_ DTACK DSACK_0_ ipl_c_0__n ipl_c_1__n ipl_c_2__n \
-dsack_c_1__n DTACK_c RST_c vcc_n_n gnd_n_n RW_c fc_c_0__n fc_c_1__n \
-state_machine_un60_clk_000_d0_n N_100_i sm_amiga_ns_0_2__n N_103_i \
-DSACK_INT_1_sqmuxa N_104_i state_machine_un13_as_000_int_n VPA_SYNC_1_sqmuxa_1 \
-N_106_i un1_as_030_4 N_105_i sm_amiga_ns_0_5__n N_107_i N_108_i \
-state_machine_lds_000_int_8_n sm_amiga_ns_0_6__n state_machine_uds_000_int_8_n \
-N_90_i N_93_0 N_128_i N_126_i N_127_i N_129_i clk_cpu_est_11_0_1__n N_133_i \
-N_132_i N_134_i clk_cpu_est_11_0_3__n N_125_i N_124_i N_130_i N_131_i N_121_i \
-N_91_0 N_109_i sm_amiga_ns_0_7__n state_machine_un8_clk_000_d0_i_n \
-state_machine_un13_clk_000_d0_i_n state_machine_un15_clk_000_d0_0_n BG_030_c_i \
-state_machine_un1_clk_030_0_n clk_un4_clk_000_d1_n \
-state_machine_un17_clk_030_0_n N_144 un1_as_030_3_0 N_101 \
-state_machine_as_030_000_sync_3_2_n VPA_SYNC_1_sqmuxa N_96_i N_97 un1_bg_030_0 \
-state_machine_un34_clk_000_d0_n clk_un4_clk_000_d1_i_n N_96 \
-state_machine_un6_bgack_000_0_n N_102 N_98_i UDS_000_INT_0_sqmuxa \
-UDS_000_INT_0_sqmuxa_1 N_111_i N_167 N_99_i N_170 N_92 N_92_0 N_91 \
-state_machine_un34_clk_000_d0_i_n N_99 a_c_i_0__n N_111 size_c_i_1__n N_98 \
-N_102_i state_machine_un6_bgack_000_n state_machine_un42_clk_030_n N_144_i \
-DTACK_SYNC_1_sqmuxa state_machine_lds_000_int_8_0_n un1_bg_030 \
-state_machine_uds_000_int_8_0_n state_machine_as_030_000_sync_3_n \
-state_machine_un60_clk_000_d0_i_n DTACK_SYNC_1_sqmuxa_1 un1_bg_030_0_1 \
-un1_as_030_3 un1_bg_030_0_2 state_machine_un17_clk_030_n \
-state_machine_as_030_000_sync_3_2_1_n state_machine_un1_clk_030_n \
-clk_cpu_est_11_0_1_3__n VPA_SYNC_1_sqmuxa_1_0 clk_cpu_est_11_0_1_1__n \
-state_machine_un15_clk_000_d0_n clk_cpu_est_11_0_2_1__n \
-state_machine_un13_clk_000_d0_n N_167_1 state_machine_un8_clk_000_d0_n N_167_2 \
-N_109 N_167_3 state_machine_un13_clk_000_d0_1_n N_167_4 N_129 N_167_5 \
-state_machine_un13_clk_000_d0_2_n N_167_6 N_130 N_170_1 N_131 N_170_2 N_124 \
-UDS_000_INT_0_sqmuxa_1_1 N_125 UDS_000_INT_0_sqmuxa_1_2 N_134 \
-UDS_000_INT_0_sqmuxa_1_3 N_134_1 UDS_000_INT_0_sqmuxa_1_0 N_106 \
-UDS_000_INT_0_sqmuxa_2 clk_cpu_est_11_3__n state_machine_un34_clk_000_d0_i_1_n \
-N_132 state_machine_un42_clk_030_1_n N_133 state_machine_un42_clk_030_2_n \
-clk_cpu_est_11_1__n state_machine_un42_clk_030_3_n N_127 \
-state_machine_un42_clk_030_4_n N_126 state_machine_un42_clk_030_5_n N_128 \
-DTACK_SYNC_1_sqmuxa_1_0 N_93 N_130_1 N_90 N_131_1 N_107 \
-state_machine_un8_clk_000_d0_1_n N_108 state_machine_un8_clk_000_d0_2_n N_105 \
-state_machine_un8_clk_000_d0_3_n N_103 state_machine_un8_clk_000_d0_4_n N_104 \
-state_machine_un13_clk_000_d0_1_0_n N_100 state_machine_un13_clk_000_d0_2_0_n \
-AS_000_INT_1_sqmuxa VPA_SYNC_1_sqmuxa_1_1 RW_i VPA_SYNC_1_sqmuxa_2 \
-nEXP_SPACE_i VPA_SYNC_1_sqmuxa_3 N_101_i VPA_SYNC_1_sqmuxa_4 AS_000_INT_i \
-N_106_1 dsack_i_1__n cpu_est_0_3__un3_n AS_030_i cpu_est_0_3__un1_n \
-CLK_000_D0_i cpu_est_0_3__un0_n sm_amiga_i_3__n cpu_est_0_1__un3_n \
-sm_amiga_i_4__n cpu_est_0_1__un1_n CLK_000_D1_i cpu_est_0_1__un0_n \
-cpu_est_i_0__n as_000_int_0_un3_n cpu_est_i_3__n as_000_int_0_un1_n \
-cpu_est_i_2__n as_000_int_0_un0_n VPA_D_i bg_000_0_un3_n VMA_INT_i \
-bg_000_0_un1_n cpu_est_i_1__n bg_000_0_un0_n \
-state_machine_un13_clk_000_d0_2_i_n as_030_000_sync_0_un3_n \
-state_machine_un13_clk_000_d0_1_i_n as_030_000_sync_0_un1_n DTACK_i \
-as_030_000_sync_0_un0_n DTACK_SYNC_1_sqmuxa_i fpu_cs_int_0_un3_n a_i_18__n \
-fpu_cs_int_0_un1_n a_i_16__n fpu_cs_int_0_un0_n a_i_19__n dtack_sync_0_un3_n \
-CLK_030_i dtack_sync_0_un1_n state_machine_un42_clk_030_i_n dtack_sync_0_un0_n \
-sm_amiga_i_6__n vma_int_0_un3_n sm_amiga_i_7__n vma_int_0_un1_n \
-AS_030_000_SYNC_i vma_int_0_un0_n DS_030_i cpu_est_0_2__un3_n \
-UDS_000_INT_0_sqmuxa_1_i cpu_est_0_2__un1_n UDS_000_INT_0_sqmuxa_i \
-cpu_est_0_2__un0_n sm_amiga_i_5__n ipl_030_0_0__un3_n VPA_SYNC_1_sqmuxa_i \
-ipl_030_0_0__un1_n N_97_i ipl_030_0_0__un0_n a_i_30__n ipl_030_0_1__un3_n \
-a_i_31__n ipl_030_0_1__un1_n a_i_28__n ipl_030_0_1__un0_n a_i_29__n \
-ipl_030_0_2__un3_n a_i_26__n ipl_030_0_2__un1_n a_i_27__n ipl_030_0_2__un0_n \
-a_i_24__n bgack_030_int_0_un3_n a_i_25__n bgack_030_int_0_un1_n \
-bgack_030_int_0_un0_n RST_i uds_000_int_0_un3_n uds_000_int_0_un1_n \
-FPU_CS_INT_i uds_000_int_0_un0_n BGACK_030_INT_i lds_000_int_0_un3_n AS_030_c \
-lds_000_int_0_un1_n lds_000_int_0_un0_n vpa_sync_0_un3_n DS_030_c \
-vpa_sync_0_un1_n vpa_sync_0_un0_n dsack_int_0_1__un3_n dsack_int_0_1__un1_n \
-size_c_0__n dsack_int_0_1__un0_n a_15__n size_c_1__n a_14__n a_c_0__n a_13__n \
-a_12__n a_11__n a_10__n a_9__n a_8__n a_7__n a_6__n a_c_16__n a_5__n a_c_17__n \
-a_4__n a_c_18__n a_3__n a_c_19__n a_2__n a_c_20__n a_1__n a_c_21__n a_c_22__n \
-a_c_23__n a_c_24__n a_c_25__n a_c_26__n a_c_27__n a_c_28__n a_c_29__n \
-a_c_30__n a_c_31__n nEXP_SPACE_c BG_030_c BGACK_000_c CLK_030_c CLK_OSZI_c \
-DSACK_1_.OE DTACK.OE AS_000.OE UDS_000.OE LDS_000.OE BERR.OE DSACK_0_.OE \
-AVEC_EXP.OE CIIN.OE cpu_est_0_0_ CLK_OUT_PRE_0
-.names N_103_i.BLIF N_104_i.BLIF SM_AMIGA_3_.D
+inst_AS_000_INTreg.C inst_AS_000_INTreg.AP AMIGA_BUS_ENABLEDFFreg.D \
+AMIGA_BUS_ENABLEDFFreg.C BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP \
+DSACK_INT_1_.D DSACK_INT_1_.C DSACK_INT_1_.AP inst_VMA_INTreg.D \
+inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_UDS_000_INTreg.D \
+inst_UDS_000_INTreg.C inst_UDS_000_INTreg.AP inst_LDS_000_INTreg.D \
+inst_LDS_000_INTreg.C inst_LDS_000_INTreg.AP inst_DTACK_SYNC.D \
+inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_DTACK_DMA.D inst_DTACK_DMA.C \
+inst_DTACK_DMA.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C inst_CLK_000_D2.D \
+inst_CLK_000_D2.C inst_VPA_D.D inst_VPA_D.C inst_CLK_000_D0.D \
+inst_CLK_000_D0.C RESETDFFreg.D RESETDFFreg.C inst_CLK_000_D1.D \
+inst_CLK_000_D1.C CLK_REF_1_.D CLK_REF_1_.LH CLK_REF_1_.AR DSACK_1_ DTACK \
+DSACK_0_ BGACK_000_c CLK_030_c CLK_000_c CLK_OSZI_c ipl_c_0__n ipl_c_1__n \
+ipl_c_2__n vcc_n_n gnd_n_n dsack_c_1__n DTACK_c clk_un4_clk_000_d1_n \
+clk_clk_cnt_n RST_c state_machine_un14_as_000_int_n RW_c fc_c_0__n \
+un1_as_030_4 fc_c_1__n state_machine_lds_000_int_7_n \
+state_machine_uds_000_int_7_n N_101_i N_102_i N_103_i N_90_0 N_91_0 N_127_i \
+N_128_i N_118_i N_125_i N_123_i N_124_i N_126_i clk_cpu_est_11_0_1__n N_131_i \
+clk_cpu_est_11_0_3__n N_130_i N_129_i N_122_i N_121_i N_108_i \
+sm_amiga_ns_0_7__n state_machine_un30_clk_000_d1_n \
+state_machine_un8_clk_000_d0_i_n N_147 state_machine_un13_clk_000_d0_i_n N_96 \
+state_machine_un15_clk_000_d0_0_n state_machine_un44_clk_000_d1_n \
+state_machine_un23_clk_000_d0_i_n N_100_i N_89 sm_amiga_ns_0_2__n N_97 \
+BG_030_c_i N_90 state_machine_un1_clk_030_0_n N_98 clk_un4_clk_000_d1_i_n N_99 \
+state_machine_un6_bgack_000_0_n UDS_000_INT_0_sqmuxa \
+state_machine_un17_clk_030_0_n UDS_000_INT_0_sqmuxa_1 un1_as_030_3_0 N_167 \
+N_89_i N_170 AMIGA_BUS_ENABLE_i_m_i N_105 nEXP_SPACE_m_i N_92 \
+state_machine_amiga_bus_enable_2_iv_i_n N_106 \
+state_machine_as_030_000_sync_3_2_n N_107 N_94_i N_104 un1_bg_030_0 \
+state_machine_un42_clk_030_n N_105_i un1_bg_030 N_104_i N_94 \
+sm_amiga_ns_0_5__n state_machine_as_030_000_sync_3_n N_106_i \
+AMIGA_BUS_ENABLE_i_m N_107_i nEXP_SPACE_m N_95 CLK_OUT_PRE_i un1_as_030_3 \
+N_92_0 state_machine_un17_clk_030_n state_machine_un44_clk_000_d1_i_n \
+state_machine_un6_bgack_000_n a_c_i_0__n state_machine_un1_clk_030_n \
+size_c_i_1__n AS_000_INT_1_sqmuxa N_98_i DSACK_INT_1_sqmuxa N_99_i N_100 \
+sm_amiga_ns_0_1__n state_machine_un23_clk_000_d0_n N_97_i DTACK_SYNC_1_sqmuxa \
+DTACK_SYNC_1_sqmuxa_1 N_147_i VPA_SYNC_1_sqmuxa \
+state_machine_lds_000_int_7_0_n VPA_SYNC_1_sqmuxa_1 \
+state_machine_uds_000_int_7_0_n state_machine_un15_clk_000_d0_n un1_bg_030_0_1 \
+clk_cpu_est_11_3__n un1_bg_030_0_2 state_machine_un2_clk_000_n \
+state_machine_as_030_000_sync_3_2_1_n state_machine_un13_clk_000_d0_n \
+clk_cpu_est_11_0_1_1__n state_machine_un8_clk_000_d0_n clk_cpu_est_11_0_2_1__n \
+N_108 N_167_1 state_machine_un13_clk_000_d0_1_n N_167_2 N_124 N_167_3 N_126 \
+N_167_4 state_machine_un13_clk_000_d0_2_n N_167_5 N_129 N_167_6 N_122 N_170_1 \
+N_130 N_170_2 N_121 UDS_000_INT_0_sqmuxa_1_1 N_131 UDS_000_INT_0_sqmuxa_1_2 \
+N_127 UDS_000_INT_0_sqmuxa_1_3 clk_cpu_est_11_1__n UDS_000_INT_0_sqmuxa_1_0 \
+N_128 state_machine_un44_clk_000_d1_i_1_n N_123 state_machine_un42_clk_030_1_n \
+N_125 state_machine_un42_clk_030_2_n N_91 state_machine_un42_clk_030_3_n N_102 \
+state_machine_un42_clk_030_4_n N_103 state_machine_un42_clk_030_5_n N_101 \
+N_96_1 RW_i AMIGA_BUS_ENABLE_i_m_1 AS_000_INT_i N_131_1 dsack_i_1__n \
+clk_cpu_est_11_0_1_3__n sm_amiga_i_4__n N_105_1 sm_amiga_i_5__n \
+VPA_SYNC_1_sqmuxa_1_0 CLK_000_D0_i VPA_SYNC_1_sqmuxa_2 sm_amiga_i_3__n \
+VPA_SYNC_1_sqmuxa_3 cpu_est_i_0__n VPA_SYNC_1_sqmuxa_4 cpu_est_i_2__n \
+VPA_SYNC_1_sqmuxa_5 state_machine_un13_clk_000_d0_2_i_n VPA_SYNC_1_sqmuxa_6 \
+cpu_est_i_3__n DTACK_SYNC_1_sqmuxa_1_0 VPA_D_i DTACK_SYNC_1_sqmuxa_2 \
+cpu_est_i_1__n state_machine_un8_clk_000_d0_1_n DTACK_i \
+state_machine_un8_clk_000_d0_2_n VMA_INT_i state_machine_un8_clk_000_d0_3_n \
+state_machine_un13_clk_000_d0_1_i_n state_machine_un8_clk_000_d0_4_n AS_030_i \
+state_machine_un13_clk_000_d0_1_0_n DTACK_SYNC_1_sqmuxa_i \
+state_machine_un13_clk_000_d0_2_0_n VPA_SYNC_1_sqmuxa_i N_127_1 CLK_000_D1_i \
+N_128_1 N_95_i ipl_030_0_2__un3_n N_96_i ipl_030_0_2__un1_n a_i_18__n \
+ipl_030_0_2__un0_n a_i_16__n ipl_030_0_1__un3_n a_i_19__n ipl_030_0_1__un1_n \
+CLK_030_i ipl_030_0_1__un0_n CLK_000_D2_i ipl_030_0_0__un3_n \
+state_machine_un42_clk_030_i_n ipl_030_0_0__un1_n sm_amiga_i_6__n \
+ipl_030_0_0__un0_n sm_amiga_i_7__n cpu_est_0_2__un3_n AMIGA_BUS_ENABLE_i \
+cpu_est_0_2__un1_n nEXP_SPACE_i cpu_est_0_2__un0_n sm_amiga_i_2__n \
+cpu_est_0_1__un3_n sm_amiga_i_1__n cpu_est_0_1__un1_n DS_030_i \
+cpu_est_0_1__un0_n AS_030_000_SYNC_i vpa_sync_0_un3_n UDS_000_INT_0_sqmuxa_1_i \
+vpa_sync_0_un1_n UDS_000_INT_0_sqmuxa_i vpa_sync_0_un0_n clk_clk_cnt_i_n \
+vma_int_0_un3_n clk_cnt_i_0__n vma_int_0_un1_n a_i_30__n vma_int_0_un0_n \
+a_i_31__n cpu_est_0_3__un3_n a_i_28__n cpu_est_0_3__un1_n a_i_29__n \
+cpu_est_0_3__un0_n a_i_26__n bgack_030_int_0_un3_n a_i_27__n \
+bgack_030_int_0_un1_n a_i_24__n bgack_030_int_0_un0_n a_i_25__n bg_000_0_un3_n \
+N_132_i bg_000_0_un1_n bg_000_0_un0_n RST_i amiga_bus_enable_0_un3_n \
+FPU_CS_INT_i amiga_bus_enable_0_un1_n BGACK_030_INT_i amiga_bus_enable_0_un0_n \
+AS_030_c as_030_000_sync_0_un3_n as_030_000_sync_0_un1_n \
+as_030_000_sync_0_un0_n DS_030_c fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n \
+fpu_cs_int_0_un0_n as_000_int_0_un3_n size_c_0__n as_000_int_0_un1_n \
+as_000_int_0_un0_n size_c_1__n dsack_int_0_1__un3_n dsack_int_0_1__un1_n \
+a_c_0__n dsack_int_0_1__un0_n dtack_sync_0_un3_n dtack_sync_0_un1_n \
+dtack_sync_0_un0_n uds_000_int_0_un3_n uds_000_int_0_un1_n uds_000_int_0_un0_n \
+lds_000_int_0_un3_n lds_000_int_0_un1_n lds_000_int_0_un0_n a_15__n a_14__n \
+a_13__n a_12__n a_c_16__n a_11__n a_c_17__n a_10__n a_c_18__n a_9__n a_c_19__n \
+a_8__n a_c_20__n a_7__n a_c_21__n a_6__n a_c_22__n a_5__n a_c_23__n a_4__n \
+a_c_24__n a_3__n a_c_25__n a_2__n a_c_26__n a_1__n a_c_27__n a_c_28__n \
+a_c_29__n a_c_30__n a_c_31__n nEXP_SPACE_c BG_030_c DSACK_1_.OE DTACK.OE \
+AS_000.OE UDS_000.OE LDS_000.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE \
+CLK_OUT_PRE_0 cpu_est_0_0_ G_86 G_90
+.names sm_amiga_ns_0_2__n.BLIF SM_AMIGA_5_.D
+0 1
+.names CLK_000_D0_i.BLIF N_101_i.BLIF SM_AMIGA_4_.D
+11 1
+.names N_102_i.BLIF N_103_i.BLIF SM_AMIGA_3_.D
11 1
.names sm_amiga_ns_0_5__n.BLIF SM_AMIGA_2_.D
0 1
-.names sm_amiga_ns_0_6__n.BLIF SM_AMIGA_1_.D
-0 1
+.names N_106_i.BLIF N_107_i.BLIF SM_AMIGA_1_.D
+11 1
.names sm_amiga_ns_0_7__n.BLIF SM_AMIGA_0_.D
0 1
+.names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D
+1- 1
+-1 1
+.names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_reg.D
+1- 1
+-1 1
.names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF IPL_030DFFSH_0_reg.D
1- 1
-1 1
@@ -306,37 +340,22 @@ AVEC_EXP.OE CIIN.OE cpu_est_0_0_ CLK_OUT_PRE_0
.names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF IPL_030DFFSH_2_reg.D
1- 1
-1 1
-.names inst_CLK_000_D0.BLIF N_98_i.BLIF SM_AMIGA_7_.D
+.names inst_CLK_000_D0.BLIF N_97_i.BLIF SM_AMIGA_7_.D
11 1
-.names N_99_i.BLIF N_111_i.BLIF SM_AMIGA_6_.D
-11 1
-.names sm_amiga_ns_0_2__n.BLIF SM_AMIGA_5_.D
+.names sm_amiga_ns_0_1__n.BLIF SM_AMIGA_6_.D
0 1
-.names CLK_000_D0_i.BLIF N_102_i.BLIF SM_AMIGA_4_.D
-11 1
-.names dsack_int_0_1__un1_n.BLIF dsack_int_0_1__un0_n.BLIF DSACK_INT_1_.D
-1- 1
--1 1
-.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF inst_VMA_INTreg.D
-1- 1
--1 1
.names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF \
inst_BGACK_030_INTreg.D
1- 1
-1 1
+.names clk_cnt_i_0__n.BLIF clk_clk_cnt_i_n.BLIF CLK_CNT_0_.D
+11 1
+.names clk_clk_cnt_i_n.BLIF G_90.BLIF CLK_CNT_1_.D
+11 1
.names cpu_est_0_1__un1_n.BLIF cpu_est_0_1__un0_n.BLIF cpu_est_1_.D
1- 1
-1 1
-.names cpu_est_0_2__un1_n.BLIF cpu_est_0_2__un0_n.BLIF cpu_est_2_.D
-1- 1
--1 1
-.names cpu_est_0_3__un1_n.BLIF cpu_est_0_3__un0_n.BLIF cpu_est_3_reg.D
-1- 1
--1 1
-.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INTreg.D
-1- 1
--1 1
-.names dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.D
+.names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D
1- 1
-1 1
.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D
@@ -349,555 +368,613 @@ inst_AS_030_000_SYNC.D
.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INTreg.D
1- 1
-1 1
-.names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D
+.names amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF \
+AMIGA_BUS_ENABLEDFFreg.D
1- 1
-1 1
.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF BG_000DFFSHreg.D
1- 1
-1 1
-.names state_machine_un13_as_000_int_n.BLIF inst_DTACK_DMA.D
-0 1
+.names dsack_int_0_1__un1_n.BLIF dsack_int_0_1__un0_n.BLIF DSACK_INT_1_.D
+1- 1
+-1 1
+.names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF inst_VMA_INTreg.D
+1- 1
+-1 1
.names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF inst_UDS_000_INTreg.D
1- 1
-1 1
-.names CLK_CNT_0_.BLIF CLK_CNT_0_.D
+.names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INTreg.D
+1- 1
+-1 1
+.names dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.D
+1- 1
+-1 1
+.names state_machine_un14_as_000_int_n.BLIF inst_DTACK_DMA.D
0 1
.names vcc_n_n
1
.names gnd_n_n
-.names state_machine_un60_clk_000_d0_i_n.BLIF state_machine_un60_clk_000_d0_n
-0 1
-.names N_100.BLIF N_100_i
-0 1
-.names N_100_i.BLIF N_101_i.BLIF sm_amiga_ns_0_2__n
+.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF clk_un4_clk_000_d1_n
11 1
+.names clk_cnt_i_0__n.BLIF N_132_i.BLIF clk_clk_cnt_n
+11 1
+.names AS_000_INT_i.BLIF dsack_i_1__n.BLIF state_machine_un14_as_000_int_n
+11 1
+.names AS_030_i.BLIF N_147.BLIF un1_as_030_4
+11 1
+.names state_machine_lds_000_int_7_0_n.BLIF state_machine_lds_000_int_7_n
+0 1
+.names state_machine_uds_000_int_7_0_n.BLIF state_machine_uds_000_int_7_n
+0 1
+.names N_101.BLIF N_101_i
+0 1
+.names N_102.BLIF N_102_i
+0 1
.names N_103.BLIF N_103_i
0 1
-.names AS_030_i.BLIF N_97_i.BLIF DSACK_INT_1_sqmuxa
+.names inst_AS_000_INTreg.BLIF SM_AMIGA_0_.BLIF N_90_0
11 1
-.names N_104.BLIF N_104_i
-0 1
-.names AS_000_INT_i.BLIF dsack_i_1__n.BLIF state_machine_un13_as_000_int_n
+.names SM_AMIGA_3_.BLIF state_machine_un23_clk_000_d0_i_n.BLIF N_91_0
11 1
-.names AS_030_i.BLIF VPA_SYNC_1_sqmuxa_i.BLIF VPA_SYNC_1_sqmuxa_1
-11 1
-.names N_106.BLIF N_106_i
-0 1
-.names AS_030_i.BLIF N_144.BLIF un1_as_030_4
-11 1
-.names N_105.BLIF N_105_i
-0 1
-.names N_105_i.BLIF N_106_i.BLIF sm_amiga_ns_0_5__n
-11 1
-.names N_107.BLIF N_107_i
-0 1
-.names N_108.BLIF N_108_i
-0 1
-.names state_machine_lds_000_int_8_0_n.BLIF state_machine_lds_000_int_8_n
-0 1
-.names N_107_i.BLIF N_108_i.BLIF sm_amiga_ns_0_6__n
-11 1
-.names state_machine_uds_000_int_8_0_n.BLIF state_machine_uds_000_int_8_n
-0 1
-.names CLK_000_D1_i.BLIF inst_CLK_OUT_PRE.BLIF N_90_i
-11 1
-.names SM_AMIGA_3_.BLIF state_machine_un60_clk_000_d0_i_n.BLIF N_93_0
-11 1
-.names N_128.BLIF N_128_i
-0 1
-.names N_126.BLIF N_126_i
-0 1
.names N_127.BLIF N_127_i
0 1
-.names N_129.BLIF N_129_i
+.names N_128.BLIF N_128_i
+0 1
+.names N_127_i.BLIF N_128_i.BLIF N_118_i
+11 1
+.names N_125.BLIF N_125_i
+0 1
+.names N_123.BLIF N_123_i
+0 1
+.names N_124.BLIF N_124_i
+0 1
+.names N_126.BLIF N_126_i
0 1
.names clk_cpu_est_11_0_1_1__n.BLIF clk_cpu_est_11_0_2_1__n.BLIF \
clk_cpu_est_11_0_1__n
11 1
-.names N_133.BLIF N_133_i
+.names N_131.BLIF N_131_i
0 1
-.names N_132.BLIF N_132_i
-0 1
-.names N_134.BLIF N_134_i
-0 1
-.names clk_cpu_est_11_0_1_3__n.BLIF N_133_i.BLIF clk_cpu_est_11_0_3__n
-11 1
-.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_125_i
-11 1
-.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_124_i
+.names clk_cpu_est_11_0_1_3__n.BLIF N_130_i.BLIF clk_cpu_est_11_0_3__n
11 1
.names N_130.BLIF N_130_i
0 1
-.names N_131.BLIF N_131_i
+.names N_129.BLIF N_129_i
0 1
-.names N_130_i.BLIF N_131_i.BLIF N_121_i
+.names cpu_est_0_.BLIF cpu_est_1_.BLIF N_122_i
11 1
-.names inst_AS_000_INTreg.BLIF SM_AMIGA_0_.BLIF N_91_0
+.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF N_121_i
11 1
-.names N_109.BLIF N_109_i
+.names N_108.BLIF N_108_i
0 1
-.names N_97_i.BLIF N_109_i.BLIF sm_amiga_ns_0_7__n
+.names N_96_i.BLIF N_108_i.BLIF sm_amiga_ns_0_7__n
+11 1
+.names inst_CLK_000_D1.BLIF CLK_000_D2_i.BLIF state_machine_un30_clk_000_d1_n
11 1
.names state_machine_un8_clk_000_d0_n.BLIF state_machine_un8_clk_000_d0_i_n
0 1
+.names UDS_000_INT_0_sqmuxa_1_i.BLIF UDS_000_INT_0_sqmuxa_i.BLIF N_147
+11 1
.names state_machine_un13_clk_000_d0_n.BLIF state_machine_un13_clk_000_d0_i_n
0 1
+.names N_96_1.BLIF SM_AMIGA_1_.BLIF N_96
+11 1
.names state_machine_un8_clk_000_d0_i_n.BLIF \
state_machine_un13_clk_000_d0_i_n.BLIF state_machine_un15_clk_000_d0_0_n
11 1
+.names state_machine_un44_clk_000_d1_i_n.BLIF state_machine_un44_clk_000_d1_n
+0 1
+.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \
+state_machine_un23_clk_000_d0_i_n
+11 1
+.names N_100.BLIF N_100_i
+0 1
+.names N_89_i.BLIF N_89
+0 1
+.names N_95_i.BLIF N_100_i.BLIF sm_amiga_ns_0_2__n
+11 1
+.names N_90.BLIF sm_amiga_i_7__n.BLIF N_97
+11 1
.names BG_030_c.BLIF BG_030_c_i
0 1
+.names N_90_0.BLIF N_90
+0 1
.names BG_030_c_i.BLIF CLK_030_c.BLIF state_machine_un1_clk_030_0_n
11 1
-.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF clk_un4_clk_000_d1_n
+.names N_89.BLIF SM_AMIGA_6_.BLIF N_98
11 1
-.names AS_030_i.BLIF CLK_030_i.BLIF state_machine_un17_clk_030_0_n
-11 1
-.names UDS_000_INT_0_sqmuxa_1_i.BLIF UDS_000_INT_0_sqmuxa_i.BLIF N_144
-11 1
-.names AS_030_i.BLIF state_machine_un42_clk_030_n.BLIF un1_as_030_3_0
-11 1
-.names N_111.BLIF SM_AMIGA_6_.BLIF N_101
-11 1
-.names state_machine_as_030_000_sync_3_2_1_n.BLIF \
-state_machine_un42_clk_030_i_n.BLIF state_machine_as_030_000_sync_3_2_n
-11 1
-.names VPA_SYNC_1_sqmuxa_4.BLIF VPA_SYNC_1_sqmuxa_3.BLIF VPA_SYNC_1_sqmuxa
-11 1
-.names N_96.BLIF N_96_i
-0 1
-.names N_90_i.BLIF SM_AMIGA_1_.BLIF N_97
-11 1
-.names un1_bg_030_0_1.BLIF un1_bg_030_0_2.BLIF un1_bg_030_0
-11 1
-.names state_machine_un34_clk_000_d0_i_n.BLIF state_machine_un34_clk_000_d0_n
-0 1
.names clk_un4_clk_000_d1_n.BLIF clk_un4_clk_000_d1_i_n
0 1
-.names sm_amiga_i_6__n.BLIF sm_amiga_i_7__n.BLIF N_96
+.names CLK_000_D0_i.BLIF SM_AMIGA_7_.BLIF N_99
11 1
.names BGACK_000_c.BLIF clk_un4_clk_000_d1_i_n.BLIF \
state_machine_un6_bgack_000_0_n
11 1
-.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_102
+.names UDS_000_INT_0_sqmuxa_1_0.BLIF RW_i.BLIF UDS_000_INT_0_sqmuxa
11 1
-.names N_98.BLIF N_98_i
-0 1
-.names UDS_000_INT_0_sqmuxa_1_0.BLIF UDS_000_INT_0_sqmuxa_2.BLIF \
-UDS_000_INT_0_sqmuxa
+.names AS_030_i.BLIF CLK_030_i.BLIF state_machine_un17_clk_030_0_n
11 1
-.names UDS_000_INT_0_sqmuxa_1_3.BLIF clk_un4_clk_000_d1_n.BLIF \
+.names UDS_000_INT_0_sqmuxa_1_3.BLIF state_machine_un30_clk_000_d1_n.BLIF \
UDS_000_INT_0_sqmuxa_1
11 1
-.names N_111.BLIF N_111_i
-0 1
+.names AS_030_i.BLIF state_machine_un42_clk_030_n.BLIF un1_as_030_3_0
+11 1
.names N_167_5.BLIF N_167_6.BLIF N_167
11 1
-.names N_99.BLIF N_99_i
-0 1
+.names AS_030_000_SYNC_i.BLIF state_machine_un30_clk_000_d1_n.BLIF N_89_i
+11 1
.names N_170_1.BLIF N_170_2.BLIF N_170
11 1
+.names AMIGA_BUS_ENABLE_i_m.BLIF AMIGA_BUS_ENABLE_i_m_i
+0 1
+.names N_105_1.BLIF state_machine_un23_clk_000_d0_n.BLIF N_105
+11 1
+.names nEXP_SPACE_m.BLIF nEXP_SPACE_m_i
+0 1
.names N_92_0.BLIF N_92
0 1
-.names CLK_000_D0_i.BLIF SM_AMIGA_7_.BLIF N_92_0
+.names AMIGA_BUS_ENABLE_i_m_i.BLIF nEXP_SPACE_m_i.BLIF \
+state_machine_amiga_bus_enable_2_iv_i_n
11 1
-.names N_91_0.BLIF N_91
-0 1
-.names state_machine_un34_clk_000_d0_i_1_n.BLIF size_c_0__n.BLIF \
-state_machine_un34_clk_000_d0_i_n
+.names CLK_000_D0_i.BLIF N_92.BLIF N_106
11 1
-.names N_92.BLIF sm_amiga_i_6__n.BLIF N_99
+.names state_machine_as_030_000_sync_3_2_1_n.BLIF \
+state_machine_un42_clk_030_i_n.BLIF state_machine_as_030_000_sync_3_2_n
11 1
-.names a_c_0__n.BLIF a_c_i_0__n
-0 1
-.names AS_030_000_SYNC_i.BLIF clk_un4_clk_000_d1_n.BLIF N_111
+.names sm_amiga_i_1__n.BLIF sm_amiga_i_2__n.BLIF N_107
11 1
-.names size_c_1__n.BLIF size_c_i_1__n
+.names N_94.BLIF N_94_i
0 1
-.names N_91.BLIF sm_amiga_i_7__n.BLIF N_98
+.names CLK_000_D0_i.BLIF SM_AMIGA_2_.BLIF N_104
+11 1
+.names un1_bg_030_0_1.BLIF un1_bg_030_0_2.BLIF un1_bg_030_0
11 1
-.names N_102.BLIF N_102_i
-0 1
-.names state_machine_un6_bgack_000_0_n.BLIF state_machine_un6_bgack_000_n
-0 1
.names state_machine_un42_clk_030_4_n.BLIF state_machine_un42_clk_030_5_n.BLIF \
state_machine_un42_clk_030_n
11 1
-.names N_144.BLIF N_144_i
+.names N_105.BLIF N_105_i
0 1
-.names DTACK_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF \
-DTACK_SYNC_1_sqmuxa
-11 1
-.names N_144_i.BLIF state_machine_un34_clk_000_d0_n.BLIF \
-state_machine_lds_000_int_8_0_n
-11 1
.names un1_bg_030_0.BLIF un1_bg_030
0 1
-.names a_c_i_0__n.BLIF N_144_i.BLIF state_machine_uds_000_int_8_0_n
+.names N_104.BLIF N_104_i
+0 1
+.names sm_amiga_i_6__n.BLIF sm_amiga_i_7__n.BLIF N_94
+11 1
+.names N_104_i.BLIF N_105_i.BLIF sm_amiga_ns_0_5__n
11 1
.names state_machine_as_030_000_sync_3_2_n.BLIF \
state_machine_as_030_000_sync_3_n
0 1
-.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \
-state_machine_un60_clk_000_d0_i_n
+.names N_106.BLIF N_106_i
+0 1
+.names AMIGA_BUS_ENABLE_i_m_1.BLIF sm_amiga_i_6__n.BLIF AMIGA_BUS_ENABLE_i_m
11 1
-.names AS_030_i.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF DTACK_SYNC_1_sqmuxa_1
+.names N_107.BLIF N_107_i
+0 1
+.names SM_AMIGA_6_.BLIF nEXP_SPACE_c.BLIF nEXP_SPACE_m
11 1
-.names BG_030_c_i.BLIF N_96_i.BLIF un1_bg_030_0_1
+.names N_89_i.BLIF SM_AMIGA_6_.BLIF N_95
11 1
+.names inst_CLK_OUT_PRE.BLIF CLK_OUT_PRE_i
+0 1
.names un1_as_030_3_0.BLIF un1_as_030_3
0 1
-.names AS_030_c.BLIF nEXP_SPACE_i.BLIF un1_bg_030_0_2
+.names CLK_OUT_PRE_i.BLIF sm_amiga_i_2__n.BLIF N_92_0
11 1
.names state_machine_un17_clk_030_0_n.BLIF state_machine_un17_clk_030_n
0 1
-.names AS_030_i.BLIF nEXP_SPACE_c.BLIF state_machine_as_030_000_sync_3_2_1_n
+.names state_machine_un44_clk_000_d1_i_1_n.BLIF size_c_0__n.BLIF \
+state_machine_un44_clk_000_d1_i_n
11 1
+.names state_machine_un6_bgack_000_0_n.BLIF state_machine_un6_bgack_000_n
+0 1
+.names a_c_0__n.BLIF a_c_i_0__n
+0 1
.names state_machine_un1_clk_030_0_n.BLIF state_machine_un1_clk_030_n
0 1
-.names N_134_i.BLIF N_132_i.BLIF clk_cpu_est_11_0_1_3__n
+.names size_c_1__n.BLIF size_c_i_1__n
+0 1
+.names AS_030_i.BLIF N_95_i.BLIF AS_000_INT_1_sqmuxa
11 1
-.names inst_CLK_000_D0.BLIF SM_AMIGA_3_.BLIF VPA_SYNC_1_sqmuxa_1_0
+.names N_98.BLIF N_98_i
+0 1
+.names AS_030_i.BLIF N_96_i.BLIF DSACK_INT_1_sqmuxa
11 1
-.names N_129_i.BLIF N_127_i.BLIF clk_cpu_est_11_0_1_1__n
+.names N_99.BLIF N_99_i
+0 1
+.names inst_CLK_000_D0.BLIF SM_AMIGA_5_.BLIF N_100
+11 1
+.names N_98_i.BLIF N_99_i.BLIF sm_amiga_ns_0_1__n
+11 1
+.names state_machine_un23_clk_000_d0_i_n.BLIF state_machine_un23_clk_000_d0_n
+0 1
+.names N_97.BLIF N_97_i
+0 1
+.names DTACK_SYNC_1_sqmuxa_1_0.BLIF DTACK_SYNC_1_sqmuxa_2.BLIF \
+DTACK_SYNC_1_sqmuxa
+11 1
+.names AS_030_i.BLIF DTACK_SYNC_1_sqmuxa_i.BLIF DTACK_SYNC_1_sqmuxa_1
+11 1
+.names N_147.BLIF N_147_i
+0 1
+.names VPA_SYNC_1_sqmuxa_5.BLIF VPA_SYNC_1_sqmuxa_6.BLIF VPA_SYNC_1_sqmuxa
+11 1
+.names N_147_i.BLIF state_machine_un44_clk_000_d1_n.BLIF \
+state_machine_lds_000_int_7_0_n
+11 1
+.names AS_030_i.BLIF VPA_SYNC_1_sqmuxa_i.BLIF VPA_SYNC_1_sqmuxa_1
+11 1
+.names a_c_i_0__n.BLIF N_147_i.BLIF state_machine_uds_000_int_7_0_n
11 1
.names state_machine_un15_clk_000_d0_0_n.BLIF state_machine_un15_clk_000_d0_n
0 1
-.names N_126_i.BLIF N_128_i.BLIF clk_cpu_est_11_0_2_1__n
+.names BG_030_c_i.BLIF N_94_i.BLIF un1_bg_030_0_1
+11 1
+.names clk_cpu_est_11_0_3__n.BLIF clk_cpu_est_11_3__n
+0 1
+.names AS_030_c.BLIF nEXP_SPACE_i.BLIF un1_bg_030_0_2
+11 1
+.names inst_CLK_000_D0.BLIF CLK_000_c.BLIF state_machine_un2_clk_000_n
+11 1
+.names AS_030_i.BLIF nEXP_SPACE_c.BLIF state_machine_as_030_000_sync_3_2_1_n
11 1
.names state_machine_un13_clk_000_d0_1_0_n.BLIF \
state_machine_un13_clk_000_d0_2_0_n.BLIF state_machine_un13_clk_000_d0_n
11 1
-.names a_i_24__n.BLIF a_i_25__n.BLIF N_167_1
+.names N_126_i.BLIF N_124_i.BLIF clk_cpu_est_11_0_1_1__n
11 1
.names state_machine_un8_clk_000_d0_4_n.BLIF \
state_machine_un8_clk_000_d0_3_n.BLIF state_machine_un8_clk_000_d0_n
11 1
-.names a_i_26__n.BLIF a_i_27__n.BLIF N_167_2
+.names N_123_i.BLIF N_125_i.BLIF clk_cpu_est_11_0_2_1__n
11 1
-.names SM_AMIGA_0_.BLIF state_machine_un13_clk_000_d0_1_i_n.BLIF N_109
+.names SM_AMIGA_0_.BLIF state_machine_un13_clk_000_d0_1_i_n.BLIF N_108
11 1
-.names a_i_28__n.BLIF a_i_29__n.BLIF N_167_3
+.names a_i_24__n.BLIF a_i_25__n.BLIF N_167_1
11 1
.names inst_AS_000_INTreg.BLIF inst_CLK_000_D0.BLIF \
state_machine_un13_clk_000_d0_1_n
11 1
+.names a_i_26__n.BLIF a_i_27__n.BLIF N_167_2
+11 1
+.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_124
+11 1
+.names a_i_28__n.BLIF a_i_29__n.BLIF N_167_3
+11 1
+.names cpu_est_3_reg.BLIF state_machine_un13_clk_000_d0_2_n.BLIF N_126
+11 1
.names a_i_30__n.BLIF a_i_31__n.BLIF N_167_4
11 1
-.names cpu_est_3_reg.BLIF state_machine_un13_clk_000_d0_2_n.BLIF N_129
-11 1
-.names N_167_1.BLIF N_167_2.BLIF N_167_5
-11 1
.names cpu_est_1_.BLIF cpu_est_2_.BLIF state_machine_un13_clk_000_d0_2_n
11 1
+.names N_167_1.BLIF N_167_2.BLIF N_167_5
+11 1
+.names N_122.BLIF cpu_est_3_reg.BLIF N_129
+11 1
.names N_167_3.BLIF N_167_4.BLIF N_167_6
11 1
-.names N_130_1.BLIF state_machine_un13_clk_000_d0_2_i_n.BLIF N_130
-11 1
+.names N_122_i.BLIF N_122
+0 1
.names a_c_20__n.BLIF a_c_21__n.BLIF N_170_1
11 1
-.names N_131_1.BLIF cpu_est_i_2__n.BLIF N_131
+.names N_122_i.BLIF cpu_est_i_2__n.BLIF N_130
11 1
.names a_c_22__n.BLIF a_c_23__n.BLIF N_170_2
11 1
-.names N_124_i.BLIF N_124
+.names N_121_i.BLIF N_121
0 1
.names AS_030_000_SYNC_i.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_1
11 1
-.names N_125_i.BLIF N_125
-0 1
+.names N_131_1.BLIF cpu_est_i_2__n.BLIF N_131
+11 1
.names RW_c.BLIF SM_AMIGA_6_.BLIF UDS_000_INT_0_sqmuxa_1_2
11 1
-.names N_134_1.BLIF cpu_est_i_2__n.BLIF N_134
+.names N_127_1.BLIF state_machine_un13_clk_000_d0_2_i_n.BLIF N_127
11 1
.names UDS_000_INT_0_sqmuxa_1_1.BLIF UDS_000_INT_0_sqmuxa_1_2.BLIF \
UDS_000_INT_0_sqmuxa_1_3
11 1
-.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_134_1
-11 1
-.names inst_CLK_000_D0.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_0
-11 1
-.names N_106_1.BLIF state_machine_un60_clk_000_d0_n.BLIF N_106
-11 1
-.names RW_i.BLIF SM_AMIGA_4_.BLIF UDS_000_INT_0_sqmuxa_2
-11 1
-.names clk_cpu_est_11_0_3__n.BLIF clk_cpu_est_11_3__n
+.names clk_cpu_est_11_0_1__n.BLIF clk_cpu_est_11_1__n
0 1
-.names size_c_i_1__n.BLIF a_c_i_0__n.BLIF state_machine_un34_clk_000_d0_i_1_n
+.names SM_AMIGA_4_.BLIF DS_030_i.BLIF UDS_000_INT_0_sqmuxa_1_0
11 1
-.names N_125.BLIF cpu_est_3_reg.BLIF N_132
+.names N_128_1.BLIF cpu_est_i_2__n.BLIF N_128
+11 1
+.names size_c_i_1__n.BLIF a_c_i_0__n.BLIF state_machine_un44_clk_000_d1_i_1_n
+11 1
+.names N_121.BLIF cpu_est_i_0__n.BLIF N_123
11 1
.names a_c_17__n.BLIF a_i_16__n.BLIF state_machine_un42_clk_030_1_n
11 1
-.names N_125_i.BLIF cpu_est_i_2__n.BLIF N_133
+.names N_121_i.BLIF cpu_est_0_.BLIF N_125
11 1
.names a_i_18__n.BLIF a_i_19__n.BLIF state_machine_un42_clk_030_2_n
11 1
-.names clk_cpu_est_11_0_1__n.BLIF clk_cpu_est_11_1__n
+.names N_91_0.BLIF N_91
0 1
.names fc_c_1__n.BLIF BGACK_000_c.BLIF state_machine_un42_clk_030_3_n
11 1
-.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_127
+.names CLK_000_D0_i.BLIF N_91.BLIF N_102
11 1
.names state_machine_un42_clk_030_1_n.BLIF state_machine_un42_clk_030_2_n.BLIF \
state_machine_un42_clk_030_4_n
11 1
-.names N_124.BLIF cpu_est_i_0__n.BLIF N_126
+.names sm_amiga_i_3__n.BLIF sm_amiga_i_4__n.BLIF N_103
11 1
.names state_machine_un42_clk_030_3_n.BLIF fc_c_0__n.BLIF \
state_machine_un42_clk_030_5_n
11 1
-.names N_124_i.BLIF cpu_est_0_.BLIF N_128
+.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_101
11 1
-.names DTACK_i.BLIF inst_VPA_D.BLIF DTACK_SYNC_1_sqmuxa_1_0
-11 1
-.names N_93_0.BLIF N_93
-0 1
-.names cpu_est_0_.BLIF cpu_est_i_3__n.BLIF N_130_1
-11 1
-.names N_90_i.BLIF N_90
-0 1
-.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_131_1
-11 1
-.names N_90.BLIF SM_AMIGA_1_.BLIF N_107
-11 1
-.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF \
-state_machine_un8_clk_000_d0_1_n
-11 1
-.names inst_CLK_000_D0.BLIF SM_AMIGA_2_.BLIF N_108
-11 1
-.names CLK_000_D0_i.BLIF VPA_D_i.BLIF state_machine_un8_clk_000_d0_2_n
-11 1
-.names CLK_000_D0_i.BLIF SM_AMIGA_2_.BLIF N_105
-11 1
-.names cpu_est_0_.BLIF cpu_est_2_.BLIF state_machine_un8_clk_000_d0_3_n
-11 1
-.names CLK_000_D0_i.BLIF N_93.BLIF N_103
-11 1
-.names state_machine_un8_clk_000_d0_1_n.BLIF \
-state_machine_un8_clk_000_d0_2_n.BLIF state_machine_un8_clk_000_d0_4_n
-11 1
-.names sm_amiga_i_3__n.BLIF sm_amiga_i_4__n.BLIF N_104
-11 1
-.names cpu_est_i_0__n.BLIF cpu_est_i_3__n.BLIF \
-state_machine_un13_clk_000_d0_1_0_n
-11 1
-.names inst_CLK_000_D0.BLIF SM_AMIGA_5_.BLIF N_100
-11 1
-.names state_machine_un13_clk_000_d0_1_n.BLIF \
-state_machine_un13_clk_000_d0_2_n.BLIF state_machine_un13_clk_000_d0_2_0_n
-11 1
-.names AS_030_i.BLIF N_101_i.BLIF AS_000_INT_1_sqmuxa
-11 1
-.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF VPA_SYNC_1_sqmuxa_1_1
+.names CLK_000_D0_i.BLIF inst_CLK_OUT_PRE.BLIF N_96_1
11 1
.names RW_c.BLIF RW_i
0 1
-.names N_134_1.BLIF VMA_INT_i.BLIF VPA_SYNC_1_sqmuxa_2
-11 1
-.names nEXP_SPACE_c.BLIF nEXP_SPACE_i
-0 1
-.names VPA_D_i.BLIF VPA_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_3
-11 1
-.names N_101.BLIF N_101_i
-0 1
-.names VPA_SYNC_1_sqmuxa_1_1.BLIF VPA_SYNC_1_sqmuxa_2.BLIF VPA_SYNC_1_sqmuxa_4
+.names AMIGA_BUS_ENABLE_i.BLIF AS_030_i.BLIF AMIGA_BUS_ENABLE_i_m_1
11 1
.names inst_AS_000_INTreg.BLIF AS_000_INT_i
0 1
-.names CLK_000_D0_i.BLIF SM_AMIGA_3_.BLIF N_106_1
+.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_131_1
11 1
.names dsack_c_1__n.BLIF dsack_i_1__n
0 1
-.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_3__un3_n
+.names N_131_i.BLIF N_129_i.BLIF clk_cpu_est_11_0_1_3__n
+11 1
+.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n
0 1
-.names AS_030_c.BLIF AS_030_i
+.names CLK_000_D0_i.BLIF SM_AMIGA_3_.BLIF N_105_1
+11 1
+.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n
0 1
-.names clk_cpu_est_11_3__n.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_3__un1_n
+.names SM_AMIGA_3_.BLIF VMA_INT_i.BLIF VPA_SYNC_1_sqmuxa_1_0
11 1
.names inst_CLK_000_D0.BLIF CLK_000_D0_i
0 1
-.names cpu_est_3_reg.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n
+.names VPA_D_i.BLIF cpu_est_2_.BLIF VPA_SYNC_1_sqmuxa_2
11 1
.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n
0 1
-.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_1__un3_n
-0 1
-.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n
-0 1
-.names clk_cpu_est_11_1__n.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_1__un1_n
-11 1
-.names inst_CLK_000_D1.BLIF CLK_000_D1_i
-0 1
-.names cpu_est_1_.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n
+.names cpu_est_3_reg.BLIF cpu_est_i_0__n.BLIF VPA_SYNC_1_sqmuxa_3
11 1
.names cpu_est_0_.BLIF cpu_est_i_0__n
0 1
-.names AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un3_n
-0 1
-.names cpu_est_3_reg.BLIF cpu_est_i_3__n
-0 1
-.names inst_AS_000_INTreg.BLIF AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un1_n
+.names cpu_est_i_1__n.BLIF state_machine_un2_clk_000_n.BLIF \
+VPA_SYNC_1_sqmuxa_4
11 1
.names cpu_est_2_.BLIF cpu_est_i_2__n
0 1
-.names N_101_i.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n
-11 1
-.names inst_VPA_D.BLIF VPA_D_i
-0 1
-.names state_machine_un1_clk_030_n.BLIF bg_000_0_un3_n
-0 1
-.names inst_VMA_INTreg.BLIF VMA_INT_i
-0 1
-.names un1_bg_030.BLIF state_machine_un1_clk_030_n.BLIF bg_000_0_un1_n
-11 1
-.names cpu_est_1_.BLIF cpu_est_i_1__n
-0 1
-.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n
+.names VPA_SYNC_1_sqmuxa_1_0.BLIF VPA_SYNC_1_sqmuxa_2.BLIF VPA_SYNC_1_sqmuxa_5
11 1
.names state_machine_un13_clk_000_d0_2_n.BLIF \
state_machine_un13_clk_000_d0_2_i_n
0 1
-.names state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un3_n
+.names VPA_SYNC_1_sqmuxa_3.BLIF VPA_SYNC_1_sqmuxa_4.BLIF VPA_SYNC_1_sqmuxa_6
+11 1
+.names cpu_est_3_reg.BLIF cpu_est_i_3__n
0 1
-.names state_machine_un13_clk_000_d0_1_n.BLIF \
-state_machine_un13_clk_000_d0_1_i_n
+.names DTACK_i.BLIF SM_AMIGA_3_.BLIF DTACK_SYNC_1_sqmuxa_1_0
+11 1
+.names inst_VPA_D.BLIF VPA_D_i
0 1
-.names state_machine_as_030_000_sync_3_n.BLIF \
-state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un1_n
+.names inst_VPA_D.BLIF state_machine_un2_clk_000_n.BLIF DTACK_SYNC_1_sqmuxa_2
+11 1
+.names cpu_est_1_.BLIF cpu_est_i_1__n
+0 1
+.names cpu_est_i_1__n.BLIF cpu_est_i_3__n.BLIF \
+state_machine_un8_clk_000_d0_1_n
11 1
.names DTACK_c.BLIF DTACK_i
0 1
-.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \
-as_030_000_sync_0_un0_n
+.names CLK_000_D0_i.BLIF VPA_D_i.BLIF state_machine_un8_clk_000_d0_2_n
+11 1
+.names inst_VMA_INTreg.BLIF VMA_INT_i
+0 1
+.names cpu_est_0_.BLIF cpu_est_2_.BLIF state_machine_un8_clk_000_d0_3_n
+11 1
+.names state_machine_un13_clk_000_d0_1_n.BLIF \
+state_machine_un13_clk_000_d0_1_i_n
+0 1
+.names state_machine_un8_clk_000_d0_1_n.BLIF \
+state_machine_un8_clk_000_d0_2_n.BLIF state_machine_un8_clk_000_d0_4_n
+11 1
+.names AS_030_c.BLIF AS_030_i
+0 1
+.names cpu_est_i_0__n.BLIF cpu_est_i_3__n.BLIF \
+state_machine_un13_clk_000_d0_1_0_n
11 1
.names DTACK_SYNC_1_sqmuxa.BLIF DTACK_SYNC_1_sqmuxa_i
0 1
-.names state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un3_n
-0 1
-.names a_c_18__n.BLIF a_i_18__n
-0 1
-.names un1_as_030_3.BLIF state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un1_n
+.names state_machine_un13_clk_000_d0_1_n.BLIF \
+state_machine_un13_clk_000_d0_2_n.BLIF state_machine_un13_clk_000_d0_2_0_n
11 1
-.names a_c_16__n.BLIF a_i_16__n
-0 1
-.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n
-11 1
-.names a_c_19__n.BLIF a_i_19__n
-0 1
-.names DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un3_n
-0 1
-.names CLK_030_c.BLIF CLK_030_i
-0 1
-.names inst_DTACK_SYNC.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un1_n
-11 1
-.names state_machine_un42_clk_030_n.BLIF state_machine_un42_clk_030_i_n
-0 1
-.names DTACK_SYNC_1_sqmuxa_i.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n
-11 1
-.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n
-0 1
-.names state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un3_n
-0 1
-.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n
-0 1
-.names N_124.BLIF state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un1_n
-11 1
-.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i
-0 1
-.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n
-11 1
-.names DS_030_c.BLIF DS_030_i
-0 1
-.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_2__un3_n
-0 1
-.names UDS_000_INT_0_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_1_i
-0 1
-.names N_121_i.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_2__un1_n
-11 1
-.names UDS_000_INT_0_sqmuxa.BLIF UDS_000_INT_0_sqmuxa_i
-0 1
-.names cpu_est_2_.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n
-11 1
-.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n
-0 1
-.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_0__un3_n
-0 1
.names VPA_SYNC_1_sqmuxa.BLIF VPA_SYNC_1_sqmuxa_i
0 1
-.names ipl_c_0__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_0__un1_n
+.names cpu_est_0_.BLIF cpu_est_i_3__n.BLIF N_127_1
11 1
-.names N_97.BLIF N_97_i
+.names inst_CLK_000_D1.BLIF CLK_000_D1_i
0 1
-.names IPL_030DFFSH_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n
+.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_128_1
11 1
-.names a_c_30__n.BLIF a_i_30__n
-0 1
-.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_1__un3_n
-0 1
-.names a_c_31__n.BLIF a_i_31__n
-0 1
-.names ipl_c_1__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_1__un1_n
-11 1
-.names a_c_28__n.BLIF a_i_28__n
-0 1
-.names IPL_030DFFSH_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n
-11 1
-.names a_c_29__n.BLIF a_i_29__n
+.names N_95.BLIF N_95_i
0 1
.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_2__un3_n
0 1
-.names a_c_26__n.BLIF a_i_26__n
+.names N_96.BLIF N_96_i
0 1
.names ipl_c_2__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_2__un1_n
11 1
-.names a_c_27__n.BLIF a_i_27__n
+.names a_c_18__n.BLIF a_i_18__n
0 1
.names IPL_030DFFSH_2_reg.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n
11 1
-.names a_c_24__n.BLIF a_i_24__n
+.names a_c_16__n.BLIF a_i_16__n
+0 1
+.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_1__un3_n
+0 1
+.names a_c_19__n.BLIF a_i_19__n
+0 1
+.names ipl_c_1__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_1__un1_n
+11 1
+.names CLK_030_c.BLIF CLK_030_i
+0 1
+.names IPL_030DFFSH_1_reg.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n
+11 1
+.names inst_CLK_000_D2.BLIF CLK_000_D2_i
+0 1
+.names clk_un4_clk_000_d1_n.BLIF ipl_030_0_0__un3_n
+0 1
+.names state_machine_un42_clk_030_n.BLIF state_machine_un42_clk_030_i_n
+0 1
+.names ipl_c_0__n.BLIF clk_un4_clk_000_d1_n.BLIF ipl_030_0_0__un1_n
+11 1
+.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n
+0 1
+.names IPL_030DFFSH_0_reg.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n
+11 1
+.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n
+0 1
+.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_2__un3_n
+0 1
+.names AMIGA_BUS_ENABLEDFFreg.BLIF AMIGA_BUS_ENABLE_i
+0 1
+.names N_118_i.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_2__un1_n
+11 1
+.names nEXP_SPACE_c.BLIF nEXP_SPACE_i
+0 1
+.names cpu_est_2_.BLIF cpu_est_0_2__un3_n.BLIF cpu_est_0_2__un0_n
+11 1
+.names SM_AMIGA_2_.BLIF sm_amiga_i_2__n
+0 1
+.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_1__un3_n
+0 1
+.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n
+0 1
+.names clk_cpu_est_11_1__n.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_1__un1_n
+11 1
+.names DS_030_c.BLIF DS_030_i
+0 1
+.names cpu_est_1_.BLIF cpu_est_0_1__un3_n.BLIF cpu_est_0_1__un0_n
+11 1
+.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i
+0 1
+.names VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un3_n
+0 1
+.names UDS_000_INT_0_sqmuxa_1.BLIF UDS_000_INT_0_sqmuxa_1_i
+0 1
+.names inst_VPA_SYNC.BLIF VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un1_n
+11 1
+.names UDS_000_INT_0_sqmuxa.BLIF UDS_000_INT_0_sqmuxa_i
+0 1
+.names VPA_SYNC_1_sqmuxa_i.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n
+11 1
+.names clk_clk_cnt_n.BLIF clk_clk_cnt_i_n
+0 1
+.names state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un3_n
+0 1
+.names CLK_CNT_0_.BLIF clk_cnt_i_0__n
+0 1
+.names N_121.BLIF state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un1_n
+11 1
+.names a_c_30__n.BLIF a_i_30__n
+0 1
+.names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n
+11 1
+.names a_c_31__n.BLIF a_i_31__n
+0 1
+.names clk_un4_clk_000_d1_n.BLIF cpu_est_0_3__un3_n
+0 1
+.names a_c_28__n.BLIF a_i_28__n
+0 1
+.names clk_cpu_est_11_3__n.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_3__un1_n
+11 1
+.names a_c_29__n.BLIF a_i_29__n
+0 1
+.names cpu_est_3_reg.BLIF cpu_est_0_3__un3_n.BLIF cpu_est_0_3__un0_n
+11 1
+.names a_c_26__n.BLIF a_i_26__n
0 1
.names state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n
0 1
-.names a_c_25__n.BLIF a_i_25__n
+.names a_c_27__n.BLIF a_i_27__n
0 1
.names BGACK_000_c.BLIF state_machine_un6_bgack_000_n.BLIF \
bgack_030_int_0_un1_n
11 1
+.names a_c_24__n.BLIF a_i_24__n
+0 1
.names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \
bgack_030_int_0_un0_n
11 1
+.names a_c_25__n.BLIF a_i_25__n
+0 1
+.names state_machine_un1_clk_030_n.BLIF bg_000_0_un3_n
+0 1
+.names G_86.BLIF N_132_i
+0 1
+.names un1_bg_030.BLIF state_machine_un1_clk_030_n.BLIF bg_000_0_un1_n
+11 1
+.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n
+11 1
.names RST_c.BLIF RST_i
0 1
-.names un1_as_030_4.BLIF uds_000_int_0_un3_n
+.names RST_c.BLIF amiga_bus_enable_0_un3_n
0 1
-.names inst_UDS_000_INTreg.BLIF un1_as_030_4.BLIF uds_000_int_0_un1_n
-11 1
.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i
0 1
-.names state_machine_uds_000_int_8_n.BLIF uds_000_int_0_un3_n.BLIF \
-uds_000_int_0_un0_n
+.names state_machine_amiga_bus_enable_2_iv_i_n.BLIF RST_c.BLIF \
+amiga_bus_enable_0_un1_n
11 1
.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i
0 1
-.names un1_as_030_4.BLIF lds_000_int_0_un3_n
+.names AMIGA_BUS_ENABLEDFFreg.BLIF amiga_bus_enable_0_un3_n.BLIF \
+amiga_bus_enable_0_un0_n
+11 1
+.names state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un3_n
0 1
-.names inst_LDS_000_INTreg.BLIF un1_as_030_4.BLIF lds_000_int_0_un1_n
+.names state_machine_as_030_000_sync_3_n.BLIF \
+state_machine_un17_clk_030_n.BLIF as_030_000_sync_0_un1_n
11 1
-.names state_machine_lds_000_int_8_n.BLIF lds_000_int_0_un3_n.BLIF \
-lds_000_int_0_un0_n
+.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \
+as_030_000_sync_0_un0_n
11 1
-.names VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un3_n
+.names state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un3_n
0 1
-.names inst_VPA_SYNC.BLIF VPA_SYNC_1_sqmuxa_1.BLIF vpa_sync_0_un1_n
+.names un1_as_030_3.BLIF state_machine_un17_clk_030_n.BLIF fpu_cs_int_0_un1_n
11 1
-.names VPA_SYNC_1_sqmuxa_i.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n
+.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n
+11 1
+.names AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un3_n
+0 1
+.names inst_AS_000_INTreg.BLIF AS_000_INT_1_sqmuxa.BLIF as_000_int_0_un1_n
+11 1
+.names N_95_i.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n
11 1
.names DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un3_n
0 1
.names DSACK_INT_1_.BLIF DSACK_INT_1_sqmuxa.BLIF dsack_int_0_1__un1_n
11 1
-.names N_97_i.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un0_n
+.names N_96_i.BLIF dsack_int_0_1__un3_n.BLIF dsack_int_0_1__un0_n
+11 1
+.names DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un3_n
+0 1
+.names inst_DTACK_SYNC.BLIF DTACK_SYNC_1_sqmuxa_1.BLIF dtack_sync_0_un1_n
+11 1
+.names DTACK_SYNC_1_sqmuxa_i.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n
+11 1
+.names un1_as_030_4.BLIF uds_000_int_0_un3_n
+0 1
+.names inst_UDS_000_INTreg.BLIF un1_as_030_4.BLIF uds_000_int_0_un1_n
+11 1
+.names state_machine_uds_000_int_7_n.BLIF uds_000_int_0_un3_n.BLIF \
+uds_000_int_0_un0_n
+11 1
+.names un1_as_030_4.BLIF lds_000_int_0_un3_n
+0 1
+.names inst_LDS_000_INTreg.BLIF un1_as_030_4.BLIF lds_000_int_0_un1_n
+11 1
+.names state_machine_lds_000_int_7_n.BLIF lds_000_int_0_un3_n.BLIF \
+lds_000_int_0_un0_n
11 1
.names IPL_030DFFSH_2_reg.BLIF IPL_030_2_
1 1
@@ -944,7 +1021,7 @@ lds_000_int_0_un0_n
.names RESETDFFreg.BLIF RESET
1 1
0 0
-.names nEXP_SPACE_i.BLIF AMIGA_BUS_ENABLE
+.names AMIGA_BUS_ENABLEDFFreg.BLIF AMIGA_BUS_ENABLE
1 1
0 0
.names RW_i.BLIF AMIGA_BUS_DATA_DIR
@@ -962,6 +1039,18 @@ lds_000_int_0_un0_n
.names IPL_030DFFSH_0_reg.BLIF IPL_030_0_
1 1
0 0
+.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C
+1 1
+0 0
+.names RST_i.BLIF SM_AMIGA_5_.AR
+1 1
+0 0
+.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C
+1 1
+0 0
+.names RST_i.BLIF SM_AMIGA_4_.AR
+1 1
+0 0
.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C
1 1
0 0
@@ -986,6 +1075,12 @@ lds_000_int_0_un0_n
.names RST_i.BLIF SM_AMIGA_0_.AR
1 1
0 0
+.names CLK_OSZI_c.BLIF cpu_est_2_.C
+1 1
+0 0
+.names CLK_OSZI_c.BLIF cpu_est_3_reg.C
+1 1
+0 0
.names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C
1 1
0 0
@@ -1016,28 +1111,10 @@ lds_000_int_0_un0_n
.names RST_i.BLIF SM_AMIGA_6_.AR
1 1
0 0
-.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C
+.names CLK_OUT_PRE_0.BLIF inst_CLK_OUT_PRE.D
1 1
0 0
-.names RST_i.BLIF SM_AMIGA_5_.AR
-1 1
-0 0
-.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C
-1 1
-0 0
-.names RST_i.BLIF SM_AMIGA_4_.AR
-1 1
-0 0
-.names CLK_OSZI_c.BLIF DSACK_INT_1_.C
-1 1
-0 0
-.names RST_i.BLIF DSACK_INT_1_.AP
-1 1
-0 0
-.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C
-1 1
-0 0
-.names RST_i.BLIF inst_VMA_INTreg.AP
+.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C
1 1
0 0
.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C
@@ -1046,10 +1123,10 @@ lds_000_int_0_un0_n
.names RST_i.BLIF inst_BGACK_030_INTreg.AP
1 1
0 0
-.names CLK_OUT_PRE_0.BLIF inst_CLK_OUT_PRE.D
+.names CLK_OSZI_c.BLIF CLK_CNT_0_.C
1 1
0 0
-.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C
+.names CLK_OSZI_c.BLIF CLK_CNT_1_.C
1 1
0 0
.names cpu_est_0_0_.BLIF cpu_est_0_.D
@@ -1061,22 +1138,10 @@ lds_000_int_0_un0_n
.names CLK_OSZI_c.BLIF cpu_est_1_.C
1 1
0 0
-.names CLK_OSZI_c.BLIF cpu_est_2_.C
+.names CLK_OSZI_c.BLIF inst_VPA_SYNC.C
1 1
0 0
-.names CLK_OSZI_c.BLIF cpu_est_3_reg.C
-1 1
-0 0
-.names CLK_OSZI_c.BLIF inst_LDS_000_INTreg.C
-1 1
-0 0
-.names RST_i.BLIF inst_LDS_000_INTreg.AP
-1 1
-0 0
-.names CLK_OSZI_c.BLIF inst_DTACK_SYNC.C
-1 1
-0 0
-.names RST_i.BLIF inst_DTACK_SYNC.AP
+.names RST_i.BLIF inst_VPA_SYNC.AP
1 1
0 0
.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C
@@ -1097,10 +1162,7 @@ lds_000_int_0_un0_n
.names RST_i.BLIF inst_AS_000_INTreg.AP
1 1
0 0
-.names CLK_OSZI_c.BLIF inst_VPA_SYNC.C
-1 1
-0 0
-.names RST_i.BLIF inst_VPA_SYNC.AP
+.names CLK_OSZI_c.BLIF AMIGA_BUS_ENABLEDFFreg.C
1 1
0 0
.names CLK_OSZI_c.BLIF BG_000DFFSHreg.C
@@ -1109,10 +1171,16 @@ lds_000_int_0_un0_n
.names RST_i.BLIF BG_000DFFSHreg.AP
1 1
0 0
-.names CLK_OSZI_c.BLIF inst_DTACK_DMA.C
+.names CLK_OSZI_c.BLIF DSACK_INT_1_.C
1 1
0 0
-.names RST_i.BLIF inst_DTACK_DMA.AP
+.names RST_i.BLIF DSACK_INT_1_.AP
+1 1
+0 0
+.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C
+1 1
+0 0
+.names RST_i.BLIF inst_VMA_INTreg.AP
1 1
0 0
.names CLK_OSZI_c.BLIF inst_UDS_000_INTreg.C
@@ -1121,7 +1189,34 @@ lds_000_int_0_un0_n
.names RST_i.BLIF inst_UDS_000_INTreg.AP
1 1
0 0
-.names CLK_OSZI_c.BLIF CLK_CNT_0_.C
+.names CLK_OSZI_c.BLIF inst_LDS_000_INTreg.C
+1 1
+0 0
+.names RST_i.BLIF inst_LDS_000_INTreg.AP
+1 1
+0 0
+.names CLK_OSZI_c.BLIF inst_DTACK_SYNC.C
+1 1
+0 0
+.names RST_i.BLIF inst_DTACK_SYNC.AP
+1 1
+0 0
+.names CLK_OSZI_c.BLIF inst_DTACK_DMA.C
+1 1
+0 0
+.names RST_i.BLIF inst_DTACK_DMA.AP
+1 1
+0 0
+.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D
+1 1
+0 0
+.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C
+1 1
+0 0
+.names inst_CLK_000_D1.BLIF inst_CLK_000_D2.D
+1 1
+0 0
+.names CLK_OSZI_c.BLIF inst_CLK_000_D2.C
1 1
0 0
.names VPA.BLIF inst_VPA_D.D
@@ -1130,7 +1225,7 @@ lds_000_int_0_un0_n
.names CLK_OSZI_c.BLIF inst_VPA_D.C
1 1
0 0
-.names CLK_000.BLIF inst_CLK_000_D0.D
+.names CLK_000_c.BLIF inst_CLK_000_D0.D
1 1
0 0
.names CLK_OSZI_c.BLIF inst_CLK_000_D0.C
@@ -1148,10 +1243,13 @@ lds_000_int_0_un0_n
.names CLK_OSZI_c.BLIF inst_CLK_000_D1.C
1 1
0 0
-.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D
+.names gnd_n_n.BLIF CLK_REF_1_.D
1 1
0 0
-.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C
+.names gnd_n_n.BLIF CLK_REF_1_.LH
+1 1
+0 0
+.names RST_i.BLIF CLK_REF_1_.AR
1 1
0 0
.names DSACK_INT_1_.BLIF DSACK_1_
@@ -1163,6 +1261,18 @@ lds_000_int_0_un0_n
.names vcc_n_n.BLIF DSACK_0_
1 1
0 0
+.names BGACK_000.BLIF BGACK_000_c
+1 1
+0 0
+.names CLK_030.BLIF CLK_030_c
+1 1
+0 0
+.names CLK_000.BLIF CLK_000_c
+1 1
+0 0
+.names CLK_OSZI.BLIF CLK_OSZI_c
+1 1
+0 0
.names IPL_0_.BLIF ipl_c_0__n
1 1
0 0
@@ -1199,16 +1309,16 @@ lds_000_int_0_un0_n
.names SIZE_0_.BLIF size_c_0__n
1 1
0 0
-.names A_15_.BLIF a_15__n
-1 1
-0 0
.names SIZE_1_.BLIF size_c_1__n
1 1
0 0
-.names A_14_.BLIF a_14__n
+.names A_0_.BLIF a_c_0__n
1 1
0 0
-.names A_0_.BLIF a_c_0__n
+.names A_15_.BLIF a_15__n
+1 1
+0 0
+.names A_14_.BLIF a_14__n
1 1
0 0
.names A_13_.BLIF a_13__n
@@ -1217,72 +1327,72 @@ lds_000_int_0_un0_n
.names A_12_.BLIF a_12__n
1 1
0 0
-.names A_11_.BLIF a_11__n
-1 1
-0 0
-.names A_10_.BLIF a_10__n
-1 1
-0 0
-.names A_9_.BLIF a_9__n
-1 1
-0 0
-.names A_8_.BLIF a_8__n
-1 1
-0 0
-.names A_7_.BLIF a_7__n
-1 1
-0 0
-.names A_6_.BLIF a_6__n
-1 1
-0 0
.names A_16_.BLIF a_c_16__n
1 1
0 0
-.names A_5_.BLIF a_5__n
+.names A_11_.BLIF a_11__n
1 1
0 0
.names A_17_.BLIF a_c_17__n
1 1
0 0
-.names A_4_.BLIF a_4__n
+.names A_10_.BLIF a_10__n
1 1
0 0
.names A_18_.BLIF a_c_18__n
1 1
0 0
-.names A_3_.BLIF a_3__n
+.names A_9_.BLIF a_9__n
1 1
0 0
.names A_19_.BLIF a_c_19__n
1 1
0 0
-.names A_2_.BLIF a_2__n
+.names A_8_.BLIF a_8__n
1 1
0 0
.names A_20_.BLIF a_c_20__n
1 1
0 0
-.names A_1_.BLIF a_1__n
+.names A_7_.BLIF a_7__n
1 1
0 0
.names A_21_.BLIF a_c_21__n
1 1
0 0
+.names A_6_.BLIF a_6__n
+1 1
+0 0
.names A_22_.BLIF a_c_22__n
1 1
0 0
+.names A_5_.BLIF a_5__n
+1 1
+0 0
.names A_23_.BLIF a_c_23__n
1 1
0 0
+.names A_4_.BLIF a_4__n
+1 1
+0 0
.names A_24_.BLIF a_c_24__n
1 1
0 0
+.names A_3_.BLIF a_3__n
+1 1
+0 0
.names A_25_.BLIF a_c_25__n
1 1
0 0
+.names A_2_.BLIF a_2__n
+1 1
+0 0
.names A_26_.BLIF a_c_26__n
1 1
0 0
+.names A_1_.BLIF a_1__n
+1 1
+0 0
.names A_27_.BLIF a_c_27__n
1 1
0 0
@@ -1304,15 +1414,6 @@ lds_000_int_0_un0_n
.names BG_030.BLIF BG_030_c
1 1
0 0
-.names BGACK_000.BLIF BGACK_000_c
-1 1
-0 0
-.names CLK_030.BLIF CLK_030_c
-1 1
-0 0
-.names CLK_OSZI.BLIF CLK_OSZI_c
-1 1
-0 0
.names nEXP_SPACE_c.BLIF DSACK_1_.OE
1 1
0 0
@@ -1340,12 +1441,22 @@ lds_000_int_0_un0_n
.names N_167.BLIF CIIN.OE
1 1
0 0
+.names inst_CLK_OUT_PRE.BLIF clk_clk_cnt_n.BLIF CLK_OUT_PRE_0
+01 1
+10 1
+11 0
+00 0
.names cpu_est_0_.BLIF clk_un4_clk_000_d1_n.BLIF cpu_est_0_0_
01 1
10 1
11 0
00 0
-.names inst_CLK_OUT_PRE.BLIF CLK_CNT_0_.BLIF CLK_OUT_PRE_0
+.names CLK_REF_1_.BLIF CLK_CNT_1_.BLIF G_86
+01 1
+10 1
+11 0
+00 0
+.names CLK_CNT_0_.BLIF CLK_CNT_1_.BLIF G_90
01 1
10 1
11 0
diff --git a/Logic/BUS68030.edi b/Logic/BUS68030.edi
index 556c3c3..7f3061f 100644
--- a/Logic/BUS68030.edi
+++ b/Logic/BUS68030.edi
@@ -4,7 +4,7 @@
(keywordMap (keywordLevel 0))
(status
(written
- (timeStamp 2014 5 16 17 7 4)
+ (timeStamp 2014 5 18 21 1 42)
(author "Synopsys, Inc.")
(program "Synplify Pro" (version "G-2012.09LC-SP1 , mapper maplat, Build 621R"))
)
@@ -69,6 +69,16 @@
)
)
)
+ (cell DLATRH (cellType GENERIC)
+ (view prim (viewType NETLIST)
+ (interface
+ (port Q (direction OUTPUT))
+ (port D (direction INPUT))
+ (port LAT (direction INPUT))
+ (port R (direction INPUT))
+ )
+ )
+ )
(cell IBUF (cellType GENERIC)
(view prim (viewType NETLIST)
(interface
@@ -156,6 +166,10 @@
(port CIIN (direction OUTPUT))
)
(contents
+ (instance (rename SM_AMIGA_5 "SM_AMIGA[5]") (viewRef prim (cellRef DFFRH (libraryRef mach)))
+ )
+ (instance (rename SM_AMIGA_4 "SM_AMIGA[4]") (viewRef prim (cellRef DFFRH (libraryRef mach)))
+ )
(instance (rename SM_AMIGA_3 "SM_AMIGA[3]") (viewRef prim (cellRef DFFRH (libraryRef mach)))
)
(instance (rename SM_AMIGA_2 "SM_AMIGA[2]") (viewRef prim (cellRef DFFRH (libraryRef mach)))
@@ -164,6 +178,10 @@
)
(instance (rename SM_AMIGA_0 "SM_AMIGA[0]") (viewRef prim (cellRef DFFRH (libraryRef mach)))
)
+ (instance (rename cpu_est_2 "cpu_est[2]") (viewRef prim (cellRef DFF (libraryRef mach)))
+ )
+ (instance (rename cpu_est_3 "cpu_est[3]") (viewRef prim (cellRef DFF (libraryRef mach)))
+ )
(instance (rename IPL_030DFFSH_0 "IPL_030DFFSH[0]") (viewRef prim (cellRef DFFSH (libraryRef mach)))
)
(instance (rename IPL_030DFFSH_1 "IPL_030DFFSH[1]") (viewRef prim (cellRef DFFSH (libraryRef mach)))
@@ -174,29 +192,19 @@
)
(instance (rename SM_AMIGA_6 "SM_AMIGA[6]") (viewRef prim (cellRef DFFRH (libraryRef mach)))
)
- (instance (rename SM_AMIGA_5 "SM_AMIGA[5]") (viewRef prim (cellRef DFFRH (libraryRef mach)))
- )
- (instance (rename SM_AMIGA_4 "SM_AMIGA[4]") (viewRef prim (cellRef DFFRH (libraryRef mach)))
- )
- (instance (rename DSACK_INT_1 "DSACK_INT[1]") (viewRef prim (cellRef DFFSH (libraryRef mach)))
- )
- (instance VMA_INT (viewRef prim (cellRef DFFSH (libraryRef mach)))
+ (instance CLK_OUT_PRE (viewRef prim (cellRef DFF (libraryRef mach)))
)
(instance BGACK_030_INT (viewRef prim (cellRef DFFSH (libraryRef mach)))
)
- (instance CLK_OUT_PRE (viewRef prim (cellRef DFF (libraryRef mach)))
+ (instance (rename CLK_CNT_0 "CLK_CNT[0]") (viewRef prim (cellRef DFF (libraryRef mach)))
+ )
+ (instance (rename CLK_CNT_1 "CLK_CNT[1]") (viewRef prim (cellRef DFF (libraryRef mach)))
)
(instance (rename cpu_est_0 "cpu_est[0]") (viewRef prim (cellRef DFF (libraryRef mach)))
)
(instance (rename cpu_est_1 "cpu_est[1]") (viewRef prim (cellRef DFF (libraryRef mach)))
)
- (instance (rename cpu_est_2 "cpu_est[2]") (viewRef prim (cellRef DFF (libraryRef mach)))
- )
- (instance (rename cpu_est_3 "cpu_est[3]") (viewRef prim (cellRef DFF (libraryRef mach)))
- )
- (instance LDS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach)))
- )
- (instance DTACK_SYNC (viewRef prim (cellRef DFFSH (libraryRef mach)))
+ (instance VPA_SYNC (viewRef prim (cellRef DFFSH (libraryRef mach)))
)
(instance FPU_CS_INT (viewRef prim (cellRef DFFSH (libraryRef mach)))
)
@@ -204,15 +212,25 @@
)
(instance AS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach)))
)
- (instance VPA_SYNC (viewRef prim (cellRef DFFSH (libraryRef mach)))
+ (instance AMIGA_BUS_ENABLEDFF (viewRef prim (cellRef DFF (libraryRef mach)))
)
(instance BG_000DFFSH (viewRef prim (cellRef DFFSH (libraryRef mach)))
)
- (instance DTACK_DMA (viewRef prim (cellRef DFFSH (libraryRef mach)))
+ (instance (rename DSACK_INT_1 "DSACK_INT[1]") (viewRef prim (cellRef DFFSH (libraryRef mach)))
+ )
+ (instance VMA_INT (viewRef prim (cellRef DFFSH (libraryRef mach)))
)
(instance UDS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach)))
)
- (instance (rename CLK_CNT_0 "CLK_CNT[0]") (viewRef prim (cellRef DFF (libraryRef mach)))
+ (instance LDS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach)))
+ )
+ (instance DTACK_SYNC (viewRef prim (cellRef DFFSH (libraryRef mach)))
+ )
+ (instance DTACK_DMA (viewRef prim (cellRef DFFSH (libraryRef mach)))
+ )
+ (instance CLK_OUT_INT (viewRef prim (cellRef DFF (libraryRef mach)))
+ )
+ (instance CLK_000_D2 (viewRef prim (cellRef DFF (libraryRef mach)))
)
(instance VPA_D (viewRef prim (cellRef DFF (libraryRef mach)))
)
@@ -222,8 +240,6 @@
)
(instance CLK_000_D1 (viewRef prim (cellRef DFF (libraryRef mach)))
)
- (instance CLK_OUT_INT (viewRef prim (cellRef DFF (libraryRef mach)))
- )
(instance AS_030 (viewRef prim (cellRef IBUF (libraryRef mach))) )
(instance AS_000 (viewRef prim (cellRef BUFTH (libraryRef mach))) )
(instance DS_030 (viewRef prim (cellRef IBUF (libraryRef mach))) )
@@ -287,28 +303,42 @@
(instance (rename state_machine_un13_clk_000_d0_1_0 "state_machine.un13_clk_000_d0_1_0") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename state_machine_un13_clk_000_d0_2_0 "state_machine.un13_clk_000_d0_2_0") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename state_machine_un13_clk_000_d0 "state_machine.un13_clk_000_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance VPA_SYNC_1_sqmuxa_1_1 (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_i_a4_1_2 "clk.cpu_est_11_i_a4_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_i_a4_2 "clk.cpu_est_11_i_a4[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_i_a4_0_1_2 "clk.cpu_est_11_i_a4_0_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_i_a4_0_2 "clk.cpu_est_11_i_a4_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_a3_0_5 "SM_AMIGA_ns_a3_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance VPA_SYNC_1_sqmuxa_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance VPA_SYNC_1_sqmuxa_2 (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance VPA_SYNC_1_sqmuxa_3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance VPA_SYNC_1_sqmuxa_3 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance VPA_SYNC_1_sqmuxa_4 (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance VPA_SYNC_1_sqmuxa_5 (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance VPA_SYNC_1_sqmuxa_6 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance VPA_SYNC_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_a2_0_1_5 "SM_AMIGA_ns_a2_0_1[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_a2_0_5 "SM_AMIGA_ns_a2_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance DTACK_SYNC_1_sqmuxa_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance DTACK_SYNC_1_sqmuxa_2 (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance DTACK_SYNC_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename state_machine_un8_clk_000_d0_1 "state_machine.un8_clk_000_d0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename state_machine_un8_clk_000_d0_2 "state_machine.un8_clk_000_d0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename state_machine_un8_clk_000_d0_3 "state_machine.un8_clk_000_d0_3") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename state_machine_un8_clk_000_d0_4 "state_machine.un8_clk_000_d0_4") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename state_machine_un42_clk_030_1 "state_machine.un42_clk_030_1") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename state_machine_un42_clk_030_2 "state_machine.un42_clk_030_2") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename state_machine_un42_clk_030_3 "state_machine.un42_clk_030_3") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename state_machine_un42_clk_030_4 "state_machine.un42_clk_030_4") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename state_machine_un42_clk_030_5 "state_machine.un42_clk_030_5") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename state_machine_un42_clk_030 "state_machine.un42_clk_030") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance DTACK_SYNC_1_sqmuxa_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance DTACK_SYNC_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename clk_cpu_est_11_i_a4_1_2 "clk.cpu_est_11_i_a4_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename clk_cpu_est_11_i_a4_2 "clk.cpu_est_11_i_a4[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename clk_cpu_est_11_i_a4_0_1_2 "clk.cpu_est_11_i_a4_0_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename clk_cpu_est_11_i_a4_0_2 "clk.cpu_est_11_i_a4_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename state_machine_un8_clk_000_d0_1 "state_machine.un8_clk_000_d0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename state_machine_un8_clk_000_d0_2 "state_machine.un8_clk_000_d0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename state_machine_un8_clk_000_d0_3 "state_machine.un8_clk_000_d0_3") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename state_machine_un8_clk_000_d0_4 "state_machine.un8_clk_000_d0_4") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance un1_DSACK_INT_0_sqmuxa_i_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance un1_DSACK_INT_0_sqmuxa_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance AMIGA_BUS_ENABLE_i_m_1 (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance AMIGA_BUS_ENABLE_i_m (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_0_a4_1_1_3 "clk.cpu_est_11_0_a4_1_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_0_a4_1_3 "clk.cpu_est_11_0_a4_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_0_1_3 "clk.cpu_est_11_0_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_0_3 "clk.cpu_est_11_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_a3_0_1_5 "SM_AMIGA_ns_a3_0_1[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance un8_ciin_4 (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance un8_ciin_5 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance un8_ciin_6 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance un8_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance un4_ciin_1 (viewRef prim (cellRef AND2 (libraryRef mach))) )
@@ -319,146 +349,166 @@
(instance UDS_000_INT_0_sqmuxa_1_3 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance UDS_000_INT_0_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance UDS_000_INT_0_sqmuxa_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance UDS_000_INT_0_sqmuxa_2 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance UDS_000_INT_0_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename state_machine_un34_clk_000_d0_1 "state_machine.un34_clk_000_d0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename state_machine_un34_clk_000_d0 "state_machine.un34_clk_000_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename state_machine_un42_clk_030_1 "state_machine.un42_clk_030_1") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename state_machine_un44_clk_000_d1_1 "state_machine.un44_clk_000_d1_1") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename state_machine_un44_clk_000_d1 "state_machine.un44_clk_000_d1") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance N_97_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_147_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename state_machine_LDS_000_INT_7_i "state_machine.LDS_000_INT_7_i") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename state_machine_UDS_000_INT_7_i "state_machine.UDS_000_INT_7_i") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance un1_bg_030_1 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance un1_bg_030_2 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance un1_bg_030 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename state_machine_AS_030_000_SYNC_3_1 "state_machine.AS_030_000_SYNC_3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename state_machine_AS_030_000_SYNC_3 "state_machine.AS_030_000_SYNC_3") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename clk_cpu_est_11_0_1_3 "clk.cpu_est_11_0_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename clk_cpu_est_11_0_3 "clk.cpu_est_11_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename clk_cpu_est_11_0_1_1 "clk.cpu_est_11_0_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename clk_cpu_est_11_0_2_1 "clk.cpu_est_11_0_2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename clk_cpu_est_11_0_1 "clk.cpu_est_11_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance un8_ciin_1 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance un8_ciin_2 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance un8_ciin_3 (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance un8_ciin_4 (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance un8_ciin_5 (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance N_94_i (viewRef prim (cellRef INV (libraryRef mach))) )
(instance un1_bg_030_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename clk_un4_clk_000_d1_i "clk.un4_clk_000_d1_i") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename state_machine_un6_bgack_000_i "state_machine.un6_bgack_000_i") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_98_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_111_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_99_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_o2_i_1 "SM_AMIGA_ns_i_o2_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename state_machine_un34_clk_000_d0_i_0 "state_machine.un34_clk_000_d0_i_0") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_105_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_104_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_5 "SM_AMIGA_ns_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_106_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_107_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance CLK_OUT_PRE_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_o3_i_6 "SM_AMIGA_ns_i_o3_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename state_machine_un44_clk_000_d1_i_0 "state_machine.un44_clk_000_d1_i_0") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename A_c_i_0 "A_c_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename SIZE_c_i_1 "SIZE_c_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_102_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_144_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename state_machine_LDS_000_INT_8_i "state_machine.LDS_000_INT_8_i") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename state_machine_UDS_000_INT_8_i "state_machine.UDS_000_INT_8_i") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename state_machine_un60_clk_000_d0_i_0 "state_machine.un60_clk_000_d0_i_0") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename clk_cpu_est_11_0_o4_i_1 "clk.cpu_est_11_0_o4_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_130_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_131_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_o2_i_0 "SM_AMIGA_ns_i_o2_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_109_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_7 "SM_AMIGA_ns_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename state_machine_un8_clk_000_d0_i "state_machine.un8_clk_000_d0_i") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_98_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_99_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_1 "SM_AMIGA_ns_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename state_machine_un13_clk_000_d0_i "state_machine.un13_clk_000_d0_i") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename state_machine_un15_clk_000_d0_i "state_machine.un15_clk_000_d0_i") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance BG_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename state_machine_un1_clk_030_i "state_machine.un1_clk_030_i") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename state_machine_un17_clk_030_i "state_machine.un17_clk_030_i") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance un1_as_030_3_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename state_machine_AS_030_000_SYNC_3_i "state_machine.AS_030_000_SYNC_3_i") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_96_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_107_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_108_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_6 "SM_AMIGA_ns_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_o2_i_6 "SM_AMIGA_ns_o2_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_o2_i_4 "SM_AMIGA_ns_i_o2_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_128_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_126_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_127_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_129_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename clk_cpu_est_11_0_i_1 "clk.cpu_est_11_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_133_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_132_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_134_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename clk_cpu_est_11_0_i_3 "clk.cpu_est_11_0_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename clk_cpu_est_11_0_o4_i_3 "clk.cpu_est_11_0_o4_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename state_machine_un23_clk_000_d0_i_0 "state_machine.un23_clk_000_d0_i_0") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance N_100_i (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename SM_AMIGA_ns_i_2 "SM_AMIGA_ns_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance BG_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename state_machine_un1_clk_030_i "state_machine.un1_clk_030_i") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename clk_un4_clk_000_d1_i "clk.un4_clk_000_d1_i") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename state_machine_un6_bgack_000_i "state_machine.un6_bgack_000_i") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename state_machine_un17_clk_030_i "state_machine.un17_clk_030_i") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance un1_as_030_3_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_o3_i_1 "SM_AMIGA_ns_o3_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance AMIGA_BUS_ENABLE_i_m_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance nEXP_SPACE_m_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename state_machine_AS_030_000_SYNC_3_i "state_machine.AS_030_000_SYNC_3_i") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_128_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_125_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_123_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_124_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_126_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_0_i_1 "clk.cpu_est_11_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_131_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_0_i_3 "clk.cpu_est_11_0_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_130_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_129_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_0_o4_i_3 "clk.cpu_est_11_0_o4_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_0_o4_i_1 "clk.cpu_est_11_0_o4_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_108_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_7 "SM_AMIGA_ns_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename state_machine_un8_clk_000_d0_i "state_machine.un8_clk_000_d0_i") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_101_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_102_i (viewRef prim (cellRef INV (libraryRef mach))) )
(instance N_103_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_104_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_106_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_105_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_5 "SM_AMIGA_ns_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_o3_i_0 "SM_AMIGA_ns_i_o3_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_o3_i_4 "SM_AMIGA_ns_i_o3_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance N_127_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_a3_3 "SM_AMIGA_ns_i_a3[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance AS_000_INT_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance I_104 (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename state_machine_un13_as_000_int "state_machine.un13_as_000_int") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename cpu_est_0_3__r "cpu_est_0_3_.r") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename cpu_est_0_3__m "cpu_est_0_3_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename cpu_est_0_3__n "cpu_est_0_3_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename cpu_est_0_3__p "cpu_est_0_3_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
+ (instance I_108 (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename state_machine_un14_as_000_int "state_machine.un14_as_000_int") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename IPL_030_0_2__r "IPL_030_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename IPL_030_0_2__m "IPL_030_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename IPL_030_0_2__n "IPL_030_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename IPL_030_0_2__p "IPL_030_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
+ (instance (rename IPL_030_0_1__r "IPL_030_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename IPL_030_0_1__m "IPL_030_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename IPL_030_0_1__n "IPL_030_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename IPL_030_0_1__p "IPL_030_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
+ (instance (rename IPL_030_0_0__r "IPL_030_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename IPL_030_0_0__m "IPL_030_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename IPL_030_0_0__n "IPL_030_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename IPL_030_0_0__p "IPL_030_0_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
+ (instance (rename cpu_est_0_2__r "cpu_est_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename cpu_est_0_2__m "cpu_est_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename cpu_est_0_2__n "cpu_est_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename cpu_est_0_2__p "cpu_est_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
(instance (rename cpu_est_0_1__r "cpu_est_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename cpu_est_0_1__m "cpu_est_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename cpu_est_0_1__n "cpu_est_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename cpu_est_0_1__p "cpu_est_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
- (instance N_101_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename AS_000_INT_0_r "AS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename AS_000_INT_0_m "AS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename AS_000_INT_0_n "AS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename AS_000_INT_0_p "AS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
(instance RW_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance nEXP_SPACE_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_2 "SM_AMIGA_ns[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance CLK_000_D1_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename clk_un4_clk_000_d1_0_a2 "clk.un4_clk_000_d1_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_a2_0_6 "SM_AMIGA_ns_a2_0[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_a2_6 "SM_AMIGA_ns_a2[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_a2_5 "SM_AMIGA_ns_a2[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_a2_0_4 "SM_AMIGA_ns_i_a2_0[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance CLK_000_D0_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_a2_4 "SM_AMIGA_ns_i_a2[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_a2_2 "SM_AMIGA_ns_a2[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance un1_DSACK_INT_0_sqmuxa_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance AS_030_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance AS_000_INT_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance VPA_SYNC_1_sqmuxa_1_0 (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename state_machine_un13_clk_000_d0_1 "state_machine.un13_clk_000_d0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename clk_cpu_est_11_0_a4_0_3 "clk.cpu_est_11_0_a4_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename clk_cpu_est_11_0_a4_3 "clk.cpu_est_11_0_a4[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename clk_cpu_est_11_0_a4_1_1 "clk.cpu_est_11_0_a4_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename cpu_est_i_3 "cpu_est_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename cpu_est_i_2 "cpu_est_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename clk_cpu_est_11_0_a4_0_1 "clk.cpu_est_11_0_a4_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_i_2 "clk.cpu_est_11_i[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_0_a4_1_1 "clk.cpu_est_11_0_a4_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename cpu_est_i_0 "cpu_est_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename clk_cpu_est_11_0_a4_1 "clk.cpu_est_11_0_a4[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_o2_4 "SM_AMIGA_ns_i_o2[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_o2_6 "SM_AMIGA_ns_o2[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_6 "SM_AMIGA_ns[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_5 "SM_AMIGA_ns[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_o3_4 "SM_AMIGA_ns_i_o3[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_o3_0 "SM_AMIGA_ns_i_o3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename SM_AMIGA_ns_i_4 "SM_AMIGA_ns_i[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_7 "SM_AMIGA_ns[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_o2_0 "SM_AMIGA_ns_i_o2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_3 "SM_AMIGA_ns_i[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_a3_0_4 "SM_AMIGA_ns_i_a3_0[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance CLK_000_D0_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_a3_4 "SM_AMIGA_ns_i_a3[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_0_a4_0_1 "clk.cpu_est_11_0_a4_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename clk_cpu_est_11_0_a4_2_1 "clk.cpu_est_11_0_a4_2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename clk_cpu_est_11_i_2 "clk.cpu_est_11_i[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_0_a4_3 "clk.cpu_est_11_0_a4[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename clk_cpu_est_11_0_a4_0_3 "clk.cpu_est_11_0_a4_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename clk_cpu_est_11_0_o4_1 "clk.cpu_est_11_0_o4[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename clk_cpu_est_11_0_o4_3 "clk.cpu_est_11_0_o4[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename state_machine_un13_clk_000_d0_2_i "state_machine.un13_clk_000_d0_2_i") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename clk_cpu_est_11_0_a4_1_3 "clk.cpu_est_11_0_a4_1[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename state_machine_un13_clk_000_d0_2 "state_machine.un13_clk_000_d0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename cpu_est_i_1 "cpu_est_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance VPA_SYNC_1_sqmuxa_3 (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance VPA_D_i (viewRef prim (cellRef INV (libraryRef mach))) )
(instance VMA_INT_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance I_109 (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename cpu_est_i_1 "cpu_est_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance VPA_D_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename state_machine_un13_clk_000_d0_1 "state_machine.un13_clk_000_d0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename state_machine_un13_clk_000_d0_2 "state_machine.un13_clk_000_d0_2") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename cpu_est_0_0 "cpu_est_0[0]") (viewRef prim (cellRef XOR2 (libraryRef mach))) )
- (instance CLK_OUT_PRE_0 (viewRef prim (cellRef XOR2 (libraryRef mach))) )
- (instance (rename A_i_16 "A_i[16]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename cpu_est_i_3 "cpu_est_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename state_machine_un13_clk_000_d0_2_i "state_machine.un13_clk_000_d0_2_i") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename VPA_SYNC_0_r "VPA_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename VPA_SYNC_0_m "VPA_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename VPA_SYNC_0_n "VPA_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename VPA_SYNC_0_p "VPA_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
+ (instance (rename VMA_INT_0_r "VMA_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename VMA_INT_0_m "VMA_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename VMA_INT_0_n "VMA_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename VMA_INT_0_p "VMA_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
+ (instance (rename cpu_est_0_3__r "cpu_est_0_3_.r") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename cpu_est_0_3__m "cpu_est_0_3_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename cpu_est_0_3__n "cpu_est_0_3_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename cpu_est_0_3__p "cpu_est_0_3_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
+ (instance (rename state_machine_un2_clk_000 "state_machine.un2_clk_000") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance CLK_000_D1_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename clk_un4_clk_000_d1 "clk.un4_clk_000_d1") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename state_machine_un15_clk_000_d0 "state_machine.un15_clk_000_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance VPA_SYNC_1_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance VPA_SYNC_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance AS_030_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance DTACK_SYNC_1_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance DTACK_SYNC_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename state_machine_un13_clk_000_d0_1_i "state_machine.un13_clk_000_d0_1_i") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_a3_7 "SM_AMIGA_ns_a3[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_7 "SM_AMIGA_ns[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename BGACK_030_INT_0_r "BGACK_030_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename BGACK_030_INT_0_m "BGACK_030_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename BGACK_030_INT_0_n "BGACK_030_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename BGACK_030_INT_0_p "BGACK_030_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
(instance (rename BG_000_0_r "BG_000_0.r") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename BG_000_0_m "BG_000_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename BG_000_0_n "BG_000_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename BG_000_0_p "BG_000_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
+ (instance (rename AMIGA_BUS_ENABLE_0_r "AMIGA_BUS_ENABLE_0.r") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename AMIGA_BUS_ENABLE_0_m "AMIGA_BUS_ENABLE_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename AMIGA_BUS_ENABLE_0_n "AMIGA_BUS_ENABLE_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename AMIGA_BUS_ENABLE_0_p "AMIGA_BUS_ENABLE_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
(instance (rename AS_030_000_SYNC_0_r "AS_030_000_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename AS_030_000_SYNC_0_m "AS_030_000_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename AS_030_000_SYNC_0_n "AS_030_000_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
@@ -467,68 +517,72 @@
(instance (rename FPU_CS_INT_0_m "FPU_CS_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename FPU_CS_INT_0_n "FPU_CS_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename FPU_CS_INT_0_p "FPU_CS_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
- (instance DTACK_SYNC_1_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename AS_000_INT_0_r "AS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename AS_000_INT_0_m "AS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename AS_000_INT_0_n "AS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename AS_000_INT_0_p "AS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
+ (instance (rename DSACK_INT_0_1__r "DSACK_INT_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename DSACK_INT_0_1__m "DSACK_INT_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename DSACK_INT_0_1__n "DSACK_INT_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename DSACK_INT_0_1__p "DSACK_INT_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
+ (instance N_96_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance DSACK_INT_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance N_95_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance AS_000_INT_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_a3_2 "SM_AMIGA_ns_a3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_2 "SM_AMIGA_ns[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename state_machine_un23_clk_000_d0 "state_machine.un23_clk_000_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename DTACK_SYNC_0_r "DTACK_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename DTACK_SYNC_0_m "DTACK_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename DTACK_SYNC_0_n "DTACK_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename DTACK_SYNC_0_p "DTACK_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
- (instance I_105 (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename VMA_INT_0_r "VMA_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename VMA_INT_0_m "VMA_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename VMA_INT_0_n "VMA_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename VMA_INT_0_p "VMA_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
- (instance (rename cpu_est_0_2__r "cpu_est_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename cpu_est_0_2__m "cpu_est_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename cpu_est_0_2__n "cpu_est_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename cpu_est_0_2__p "cpu_est_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
- (instance (rename IPL_030_0_0__r "IPL_030_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename IPL_030_0_0__m "IPL_030_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename IPL_030_0_0__n "IPL_030_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename IPL_030_0_0__p "IPL_030_0_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
- (instance (rename IPL_030_0_1__r "IPL_030_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename IPL_030_0_1__m "IPL_030_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename IPL_030_0_1__n "IPL_030_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename IPL_030_0_1__p "IPL_030_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
- (instance (rename IPL_030_0_2__r "IPL_030_0_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename IPL_030_0_2__m "IPL_030_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename IPL_030_0_2__n "IPL_030_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename IPL_030_0_2__p "IPL_030_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
- (instance (rename state_machine_un15_clk_000_d0 "state_machine.un15_clk_000_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename state_machine_un13_clk_000_d0_1_i "state_machine.un13_clk_000_d0_1_i") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_a2_7 "SM_AMIGA_ns_a2[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_a2_1 "SM_AMIGA_ns_i_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_a2_0 "SM_AMIGA_ns_i_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance un1_SM_AMIGA_0_sqmuxa_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename state_machine_un5_clk_030_i_a2 "state_machine.un5_clk_030_i_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename state_machine_un6_bgack_000 "state_machine.un6_bgack_000") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename BGACK_030_INT_0_r "BGACK_030_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename BGACK_030_INT_0_m "BGACK_030_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename BGACK_030_INT_0_n "BGACK_030_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename BGACK_030_INT_0_p "BGACK_030_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
- (instance DTACK_SYNC_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename state_machine_un5_clk_030_i_a3 "state_machine.un5_clk_030_i_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename state_machine_un42_clk_030_i "state_machine.un42_clk_030_i") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance un1_as_030_3 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename state_machine_un17_clk_030 "state_machine.un17_clk_030") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename state_machine_un6_bgack_000 "state_machine.un6_bgack_000") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance CLK_000_D2_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename state_machine_un30_clk_000_d1 "state_machine.un30_clk_000_d1") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance CLK_030_i (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename state_machine_un1_clk_030 "state_machine.un1_clk_030") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename A_i_19 "A_i[19]") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename A_i_18 "A_i[18]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename state_machine_UDS_000_INT_8 "state_machine.UDS_000_INT_8") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename state_machine_LDS_000_INT_8 "state_machine.LDS_000_INT_8") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_a2_3 "SM_AMIGA_ns_i_a2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_3 "SM_AMIGA_ns_i[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename A_i_16 "A_i[16]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance G_90 (viewRef prim (cellRef XOR2 (libraryRef mach))) )
+ (instance G_86 (viewRef prim (cellRef XOR2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_o3_6 "SM_AMIGA_ns_i_o3[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_6 "SM_AMIGA_ns_i[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_5 "SM_AMIGA_ns[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_a3_0_6 "SM_AMIGA_ns_i_a3_0[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_a3_6 "SM_AMIGA_ns_i_a3[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_a3_5 "SM_AMIGA_ns_a3[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance nEXP_SPACE_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance AMIGA_BUS_ENABLE_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename state_machine_AMIGA_BUS_ENABLE_2_iv "state_machine.AMIGA_BUS_ENABLE_2_iv") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance nEXP_SPACE_m (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_o3_1 "SM_AMIGA_ns_o3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename CLK_CNT_i_0 "CLK_CNT_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename clk_CLK_CNT_3_0 "clk.CLK_CNT_3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename clk_clk_cnt_i "clk.clk_cnt_i") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename clk_CLK_CNT_3_1 "clk.CLK_CNT_3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_a3_0 "SM_AMIGA_ns_i_a3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_a3_1 "SM_AMIGA_ns_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_a3_0_1 "SM_AMIGA_ns_a3_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_i_0 "SM_AMIGA_ns_i[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename SM_AMIGA_ns_1 "SM_AMIGA_ns[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance UDS_000_INT_0_sqmuxa_1_i (viewRef prim (cellRef INV (libraryRef mach))) )
(instance UDS_000_INT_0_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance un1_as_030_4_91 (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance DS_030_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_o2_1 "SM_AMIGA_ns_i_o2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_1 "SM_AMIGA_ns_i[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_0 "SM_AMIGA_ns_i[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance un1_as_030_4_95 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance AS_030_000_SYNC_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_i_a2_0_1 "SM_AMIGA_ns_i_a2_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename SM_AMIGA_ns_a2_0_2 "SM_AMIGA_ns_a2_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance DS_030_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance CLK_OUT_PRE_0 (viewRef prim (cellRef XOR2 (libraryRef mach))) )
+ (instance N_132_i (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance G_87 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename A_i_24 "A_i[24]") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename A_i_25 "A_i[25]") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename A_i_26 "A_i[26]") (viewRef prim (cellRef INV (libraryRef mach))) )
@@ -537,15 +591,12 @@
(instance (rename A_i_29 "A_i[29]") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename A_i_30 "A_i[30]") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename A_i_31 "A_i[31]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance N_97_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance DSACK_INT_1_sqmuxa (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance VPA_SYNC_1_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance VPA_SYNC_1_sqmuxa_1 (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance un1_as_030_4 (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename state_machine_un13_as_000_int_i "state_machine.un13_as_000_int_i") (viewRef prim (cellRef INV (libraryRef mach))) )
+ (instance (rename state_machine_UDS_000_INT_7 "state_machine.UDS_000_INT_7") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename state_machine_LDS_000_INT_7 "state_machine.LDS_000_INT_7") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename state_machine_un14_as_000_int_i "state_machine.un14_as_000_int_i") (viewRef prim (cellRef INV (libraryRef mach))) )
(instance RST_i (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename CLK_CNT_i_0 "CLK_CNT_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename state_machine_un60_clk_000_d0 "state_machine.un60_clk_000_d0") (viewRef prim (cellRef AND2 (libraryRef mach))) )
+ (instance (rename CLK_REF_1 "CLK_REF[1]") (viewRef prim (cellRef DLATRH (libraryRef mach))) )
(instance BGACK_030_INT_i (viewRef prim (cellRef INV (libraryRef mach))) )
(instance FPU_CS_INT_i (viewRef prim (cellRef INV (libraryRef mach))) )
(instance (rename UDS_000_INT_0_r "UDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) )
@@ -556,14 +607,6 @@
(instance (rename LDS_000_INT_0_m "LDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename LDS_000_INT_0_n "LDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
(instance (rename LDS_000_INT_0_p "LDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
- (instance (rename VPA_SYNC_0_r "VPA_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename VPA_SYNC_0_m "VPA_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename VPA_SYNC_0_n "VPA_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename VPA_SYNC_0_p "VPA_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
- (instance (rename DSACK_INT_0_1__r "DSACK_INT_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) )
- (instance (rename DSACK_INT_0_1__m "DSACK_INT_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename DSACK_INT_0_1__n "DSACK_INT_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) )
- (instance (rename DSACK_INT_0_1__p "DSACK_INT_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) )
(net BGACK_030_INT (joined
(portRef Q (instanceRef BGACK_030_INT))
(portRef I0 (instanceRef BGACK_030_INT_i))
@@ -581,11 +624,11 @@
))
(net (rename cpu_est_3 "cpu_est[3]") (joined
(portRef Q (instanceRef cpu_est_3))
- (portRef I0 (instanceRef clk_cpu_est_11_0_a4_2_1))
+ (portRef I0 (instanceRef cpu_est_0_3__n))
(portRef I0 (instanceRef cpu_est_i_3))
(portRef I1 (instanceRef clk_cpu_est_11_0_a4_3))
- (portRef I0 (instanceRef cpu_est_0_3__n))
- (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_1_1))
+ (portRef I0 (instanceRef clk_cpu_est_11_0_a4_2_1))
+ (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_3))
(portRef I0 (instanceRef E))
))
(net VMA_INT (joined
@@ -605,17 +648,17 @@
))
(net (rename cpu_est_1 "cpu_est[1]") (joined
(portRef Q (instanceRef cpu_est_1))
- (portRef I0 (instanceRef cpu_est_i_1))
(portRef I0 (instanceRef state_machine_un13_clk_000_d0_2))
+ (portRef I0 (instanceRef cpu_est_i_1))
(portRef I1 (instanceRef clk_cpu_est_11_0_o4_3))
(portRef I0 (instanceRef cpu_est_0_1__n))
(portRef I0 (instanceRef clk_cpu_est_11_i_a4_0_1_2))
))
(net AS_000_INT (joined
(portRef Q (instanceRef AS_000_INT))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_0))
- (portRef I0 (instanceRef state_machine_un13_clk_000_d0_1))
(portRef I0 (instanceRef AS_000_INT_0_m))
+ (portRef I0 (instanceRef state_machine_un13_clk_000_d0_1))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_o3_0))
(portRef I0 (instanceRef AS_000_INT_i))
(portRef I0 (instanceRef AS_000))
))
@@ -626,72 +669,80 @@
))
(net DTACK_SYNC (joined
(portRef Q (instanceRef DTACK_SYNC))
- (portRef I0 (instanceRef state_machine_un60_clk_000_d0))
(portRef I0 (instanceRef DTACK_SYNC_0_m))
+ (portRef I0 (instanceRef state_machine_un23_clk_000_d0))
))
(net VPA_D (joined
(portRef Q (instanceRef VPA_D))
(portRef I0 (instanceRef VPA_D_i))
- (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa_1_0))
+ (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_2))
))
(net VPA_SYNC (joined
(portRef Q (instanceRef VPA_SYNC))
+ (portRef I1 (instanceRef state_machine_un23_clk_000_d0))
(portRef I0 (instanceRef VPA_SYNC_0_m))
- (portRef I1 (instanceRef state_machine_un60_clk_000_d0))
))
(net CLK_000_D0 (joined
(portRef Q (instanceRef CLK_000_D0))
(portRef I0 (instanceRef SM_AMIGA_ns_i_0))
+ (portRef I0 (instanceRef SM_AMIGA_ns_a3_2))
+ (portRef I0 (instanceRef clk_un4_clk_000_d1))
+ (portRef I0 (instanceRef state_machine_un2_clk_000))
(portRef I1 (instanceRef state_machine_un13_clk_000_d0_1))
- (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_1_0))
- (portRef I0 (instanceRef SM_AMIGA_ns_a2_2))
(portRef I0 (instanceRef CLK_000_D0_i))
- (portRef I0 (instanceRef SM_AMIGA_ns_a2_0_6))
- (portRef I0 (instanceRef clk_un4_clk_000_d1_0_a2))
- (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_1_0))
(portRef D (instanceRef CLK_000_D1))
))
(net CLK_000_D1 (joined
(portRef Q (instanceRef CLK_000_D1))
+ (portRef I0 (instanceRef state_machine_un30_clk_000_d1))
(portRef I0 (instanceRef CLK_000_D1_i))
+ (portRef D (instanceRef CLK_000_D2))
+ ))
+ (net CLK_000_D2 (joined
+ (portRef Q (instanceRef CLK_000_D2))
+ (portRef I0 (instanceRef CLK_000_D2_i))
))
(net CLK_OUT_PRE (joined
(portRef Q (instanceRef CLK_OUT_PRE))
- (portRef I1 (instanceRef CLK_OUT_PRE_0))
- (portRef I1 (instanceRef SM_AMIGA_ns_o2_6))
+ (portRef I0 (instanceRef CLK_OUT_PRE_0))
+ (portRef I0 (instanceRef CLK_OUT_PRE_i))
+ (portRef I1 (instanceRef un1_DSACK_INT_0_sqmuxa_i_a3_1))
(portRef D (instanceRef CLK_OUT_INT))
))
+ (net (rename SM_AMIGA_6 "SM_AMIGA[6]") (joined
+ (portRef Q (instanceRef SM_AMIGA_6))
+ (portRef I1 (instanceRef SM_AMIGA_ns_a3_1))
+ (portRef I0 (instanceRef nEXP_SPACE_m))
+ (portRef I0 (instanceRef SM_AMIGA_i_6))
+ (portRef I1 (instanceRef un1_SM_AMIGA_0_sqmuxa_i_a3))
+ (portRef I1 (instanceRef UDS_000_INT_0_sqmuxa_1_2))
+ ))
(net VCC (joined
(portRef I0 (instanceRef AMIGA_BUS_ENABLE_LOW))
(portRef I0 (instanceRef AVEC))
(portRef I0 (instanceRef DSACK_0))
))
(net GND (joined
+ (portRef LAT (instanceRef CLK_REF_1))
+ (portRef D (instanceRef CLK_REF_1))
(portRef I0 (instanceRef AVEC_EXP))
(portRef I0 (instanceRef BERR))
))
(net (rename cpu_est_2 "cpu_est[2]") (joined
(portRef Q (instanceRef cpu_est_2))
- (portRef I0 (instanceRef cpu_est_0_2__n))
(portRef I1 (instanceRef state_machine_un13_clk_000_d0_2))
(portRef I0 (instanceRef cpu_est_i_2))
+ (portRef I0 (instanceRef cpu_est_0_2__n))
(portRef I1 (instanceRef state_machine_un8_clk_000_d0_3))
- (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_1_1))
+ (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_2))
))
- (net (rename CLK_CNT_0 "CLK_CNT[0]") (joined
- (portRef Q (instanceRef CLK_CNT_0))
- (portRef I0 (instanceRef CLK_CNT_i_0))
- (portRef I0 (instanceRef CLK_OUT_PRE_0))
- ))
- (net (rename SM_AMIGA_6 "SM_AMIGA[6]") (joined
- (portRef Q (instanceRef SM_AMIGA_6))
- (portRef I1 (instanceRef SM_AMIGA_ns_a2_0_2))
- (portRef I0 (instanceRef SM_AMIGA_i_6))
- (portRef I1 (instanceRef UDS_000_INT_0_sqmuxa_1_2))
+ (net (rename CLK_REF_1 "CLK_REF[1]") (joined
+ (portRef Q (instanceRef CLK_REF_1))
+ (portRef I1 (instanceRef G_86))
))
(net (rename SM_AMIGA_7 "SM_AMIGA[7]") (joined
(portRef Q (instanceRef SM_AMIGA_7))
- (portRef I1 (instanceRef SM_AMIGA_ns_i_o2_1))
+ (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_1))
(portRef I0 (instanceRef SM_AMIGA_i_7))
))
(net UDS_000_INT (joined
@@ -709,44 +760,71 @@
(portRef I0 (instanceRef DSACK_INT_0_1__m))
(portRef I0 (instanceRef DSACK_1))
))
- (net (rename state_machine_un60_clk_000_d0 "state_machine.un60_clk_000_d0") (joined
- (portRef O (instanceRef state_machine_un60_clk_000_d0_i_0))
- (portRef I1 (instanceRef SM_AMIGA_ns_a2_0_5))
+ (net (rename clk_un4_clk_000_d1 "clk.un4_clk_000_d1") (joined
+ (portRef O (instanceRef clk_un4_clk_000_d1))
+ (portRef I1 (instanceRef cpu_est_0_3__m))
+ (portRef I0 (instanceRef cpu_est_0_3__r))
+ (portRef I0 (instanceRef cpu_est_0_0))
+ (portRef I1 (instanceRef cpu_est_0_1__m))
+ (portRef I0 (instanceRef cpu_est_0_1__r))
+ (portRef I1 (instanceRef cpu_est_0_2__m))
+ (portRef I0 (instanceRef cpu_est_0_2__r))
+ (portRef I1 (instanceRef IPL_030_0_0__m))
+ (portRef I0 (instanceRef IPL_030_0_0__r))
+ (portRef I1 (instanceRef IPL_030_0_1__m))
+ (portRef I0 (instanceRef IPL_030_0_1__r))
+ (portRef I1 (instanceRef IPL_030_0_2__m))
+ (portRef I0 (instanceRef IPL_030_0_2__r))
+ (portRef I0 (instanceRef clk_un4_clk_000_d1_i))
+ ))
+ (net (rename SM_AMIGA_4 "SM_AMIGA[4]") (joined
+ (portRef Q (instanceRef SM_AMIGA_4))
+ (portRef I0 (instanceRef SM_AMIGA_i_4))
+ (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_1_0))
))
(net (rename SM_AMIGA_1 "SM_AMIGA[1]") (joined
(portRef Q (instanceRef SM_AMIGA_1))
- (portRef I1 (instanceRef un1_DSACK_INT_0_sqmuxa_i_a2))
- (portRef I1 (instanceRef SM_AMIGA_ns_a2_6))
+ (portRef I0 (instanceRef SM_AMIGA_i_1))
+ (portRef I1 (instanceRef un1_DSACK_INT_0_sqmuxa_i_a3))
))
(net DTACK_DMA (joined
(portRef Q (instanceRef DTACK_DMA))
(portRef I0 (instanceRef DTACK))
))
- (net (rename SM_AMIGA_4 "SM_AMIGA[4]") (joined
- (portRef Q (instanceRef SM_AMIGA_4))
- (portRef I0 (instanceRef SM_AMIGA_i_4))
- (portRef I1 (instanceRef UDS_000_INT_0_sqmuxa_2))
+ (net (rename clk_clk_cnt "clk.clk_cnt") (joined
+ (portRef O (instanceRef G_87))
+ (portRef I1 (instanceRef CLK_OUT_PRE_0))
+ (portRef I0 (instanceRef clk_clk_cnt_i))
+ ))
+ (net (rename CLK_CNT_0 "CLK_CNT[0]") (joined
+ (portRef Q (instanceRef CLK_CNT_0))
+ (portRef I0 (instanceRef CLK_CNT_i_0))
+ (portRef I0 (instanceRef G_90))
+ ))
+ (net (rename CLK_CNT_1 "CLK_CNT[1]") (joined
+ (portRef Q (instanceRef CLK_CNT_1))
+ (portRef I0 (instanceRef G_86))
+ (portRef I1 (instanceRef G_90))
+ ))
+ (net (rename state_machine_un14_as_000_int "state_machine.un14_as_000_int") (joined
+ (portRef O (instanceRef state_machine_un14_as_000_int))
+ (portRef I0 (instanceRef state_machine_un14_as_000_int_i))
))
(net (rename SM_AMIGA_3 "SM_AMIGA[3]") (joined
(portRef Q (instanceRef SM_AMIGA_3))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_4))
- (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_1_0))
(portRef I0 (instanceRef SM_AMIGA_i_3))
- (portRef I1 (instanceRef SM_AMIGA_ns_a2_0_1_5))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_o3_4))
+ (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_1_5))
+ (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa_1_0))
+ (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_1_0))
))
- (net DSACK_INT_1_sqmuxa (joined
- (portRef O (instanceRef DSACK_INT_1_sqmuxa))
- (portRef I1 (instanceRef DSACK_INT_0_1__m))
- (portRef I0 (instanceRef DSACK_INT_0_1__r))
+ (net (rename clk_CLK_CNT_3_0 "clk.CLK_CNT_3[0]") (joined
+ (portRef O (instanceRef clk_CLK_CNT_3_0))
+ (portRef D (instanceRef CLK_CNT_0))
))
- (net (rename state_machine_un13_as_000_int "state_machine.un13_as_000_int") (joined
- (portRef O (instanceRef state_machine_un13_as_000_int))
- (portRef I0 (instanceRef state_machine_un13_as_000_int_i))
- ))
- (net VPA_SYNC_1_sqmuxa_1 (joined
- (portRef O (instanceRef VPA_SYNC_1_sqmuxa_1))
- (portRef I1 (instanceRef VPA_SYNC_0_m))
- (portRef I0 (instanceRef VPA_SYNC_0_r))
+ (net (rename clk_CLK_CNT_3_1 "clk.CLK_CNT_3[1]") (joined
+ (portRef O (instanceRef clk_CLK_CNT_3_1))
+ (portRef D (instanceRef CLK_CNT_1))
))
(net un1_as_030_4 (joined
(portRef O (instanceRef un1_as_030_4))
@@ -757,25 +835,25 @@
))
(net (rename SM_AMIGA_5 "SM_AMIGA[5]") (joined
(portRef Q (instanceRef SM_AMIGA_5))
+ (portRef I1 (instanceRef SM_AMIGA_ns_a3_2))
(portRef I0 (instanceRef SM_AMIGA_i_5))
- (portRef I1 (instanceRef SM_AMIGA_ns_a2_2))
))
(net (rename SM_AMIGA_2 "SM_AMIGA[2]") (joined
(portRef Q (instanceRef SM_AMIGA_2))
- (portRef I1 (instanceRef SM_AMIGA_ns_a2_5))
- (portRef I1 (instanceRef SM_AMIGA_ns_a2_0_6))
+ (portRef I1 (instanceRef SM_AMIGA_ns_a3_5))
+ (portRef I0 (instanceRef SM_AMIGA_i_2))
))
(net (rename SM_AMIGA_0 "SM_AMIGA[0]") (joined
(portRef Q (instanceRef SM_AMIGA_0))
- (portRef I0 (instanceRef SM_AMIGA_ns_a2_7))
- (portRef I1 (instanceRef SM_AMIGA_ns_i_o2_0))
+ (portRef I0 (instanceRef SM_AMIGA_ns_a3_7))
+ (portRef I1 (instanceRef SM_AMIGA_ns_i_o3_0))
))
- (net (rename state_machine_LDS_000_INT_8 "state_machine.LDS_000_INT_8") (joined
- (portRef O (instanceRef state_machine_LDS_000_INT_8_i))
+ (net (rename state_machine_LDS_000_INT_7 "state_machine.LDS_000_INT_7") (joined
+ (portRef O (instanceRef state_machine_LDS_000_INT_7_i))
(portRef I0 (instanceRef LDS_000_INT_0_n))
))
- (net (rename state_machine_UDS_000_INT_8 "state_machine.UDS_000_INT_8") (joined
- (portRef O (instanceRef state_machine_UDS_000_INT_8_i))
+ (net (rename state_machine_UDS_000_INT_7 "state_machine.UDS_000_INT_7") (joined
+ (portRef O (instanceRef state_machine_UDS_000_INT_7_i))
(portRef I0 (instanceRef UDS_000_INT_0_n))
))
(net N_1 (joined
@@ -791,68 +869,76 @@
(portRef D (instanceRef DTACK_SYNC))
))
(net N_4 (joined
- (portRef O (instanceRef FPU_CS_INT_0_p))
- (portRef D (instanceRef FPU_CS_INT))
- ))
- (net N_5 (joined
- (portRef O (instanceRef AS_030_000_SYNC_0_p))
- (portRef D (instanceRef AS_030_000_SYNC))
- ))
- (net N_6 (joined
- (portRef O (instanceRef AS_000_INT_0_p))
- (portRef D (instanceRef AS_000_INT))
- ))
- (net N_7 (joined
(portRef O (instanceRef VPA_SYNC_0_p))
(portRef D (instanceRef VPA_SYNC))
))
+ (net N_5 (joined
+ (portRef O (instanceRef FPU_CS_INT_0_p))
+ (portRef D (instanceRef FPU_CS_INT))
+ ))
+ (net N_6 (joined
+ (portRef O (instanceRef AS_030_000_SYNC_0_p))
+ (portRef D (instanceRef AS_030_000_SYNC))
+ ))
+ (net N_7 (joined
+ (portRef O (instanceRef AS_000_INT_0_p))
+ (portRef D (instanceRef AS_000_INT))
+ ))
(net N_8 (joined
+ (portRef O (instanceRef AMIGA_BUS_ENABLE_0_p))
+ (portRef D (instanceRef AMIGA_BUS_ENABLEDFF))
+ ))
+ (net N_9 (joined
(portRef O (instanceRef BG_000_0_p))
(portRef D (instanceRef BG_000DFFSH))
))
- (net N_9 (joined
+ (net N_10 (joined
(portRef O (instanceRef DSACK_INT_0_1__p))
(portRef D (instanceRef DSACK_INT_1))
))
- (net N_10 (joined
+ (net N_11 (joined
(portRef O (instanceRef VMA_INT_0_p))
(portRef D (instanceRef VMA_INT))
))
- (net N_11 (joined
+ (net N_12 (joined
+ (portRef O (instanceRef CLK_OUT_PRE_0))
+ (portRef D (instanceRef CLK_OUT_PRE))
+ ))
+ (net N_13 (joined
(portRef O (instanceRef BGACK_030_INT_0_p))
(portRef D (instanceRef BGACK_030_INT))
))
- (net N_12 (joined
+ (net N_14 (joined
(portRef O (instanceRef cpu_est_0_0))
(portRef D (instanceRef cpu_est_0))
))
- (net N_13 (joined
+ (net N_15 (joined
(portRef O (instanceRef cpu_est_0_1__p))
(portRef D (instanceRef cpu_est_1))
))
- (net N_14 (joined
+ (net N_16 (joined
(portRef O (instanceRef cpu_est_0_2__p))
(portRef D (instanceRef cpu_est_2))
))
- (net N_15 (joined
+ (net N_17 (joined
(portRef O (instanceRef cpu_est_0_3__p))
(portRef D (instanceRef cpu_est_3))
))
- (net N_16 (joined
+ (net N_18 (joined
(portRef O (instanceRef IPL_030_0_0__p))
(portRef D (instanceRef IPL_030DFFSH_0))
))
- (net N_17 (joined
+ (net N_19 (joined
(portRef O (instanceRef IPL_030_0_1__p))
(portRef D (instanceRef IPL_030DFFSH_1))
))
- (net N_18 (joined
+ (net N_20 (joined
(portRef O (instanceRef IPL_030_0_2__p))
(portRef D (instanceRef IPL_030DFFSH_2))
))
- (net N_19 (joined
- (portRef O (instanceRef CLK_OUT_PRE_0))
- (portRef D (instanceRef CLK_OUT_PRE))
+ (net (rename SM_AMIGA_ns_1 "SM_AMIGA_ns[1]") (joined
+ (portRef O (instanceRef SM_AMIGA_ns_i_1))
+ (portRef D (instanceRef SM_AMIGA_6))
))
(net (rename SM_AMIGA_ns_2 "SM_AMIGA_ns[2]") (joined
(portRef O (instanceRef SM_AMIGA_ns_i_2))
@@ -862,61 +948,55 @@
(portRef O (instanceRef SM_AMIGA_ns_i_5))
(portRef D (instanceRef SM_AMIGA_2))
))
- (net (rename SM_AMIGA_ns_6 "SM_AMIGA_ns[6]") (joined
- (portRef O (instanceRef SM_AMIGA_ns_i_6))
- (portRef D (instanceRef SM_AMIGA_1))
- ))
(net (rename SM_AMIGA_ns_7 "SM_AMIGA_ns[7]") (joined
(portRef O (instanceRef SM_AMIGA_ns_i_7))
(portRef D (instanceRef SM_AMIGA_0))
))
- (net (rename clk_un4_clk_000_d1 "clk.un4_clk_000_d1") (joined
- (portRef O (instanceRef clk_un4_clk_000_d1_0_a2))
- (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_0_1))
- (portRef I1 (instanceRef IPL_030_0_2__m))
- (portRef I0 (instanceRef IPL_030_0_2__r))
- (portRef I1 (instanceRef IPL_030_0_1__m))
- (portRef I0 (instanceRef IPL_030_0_1__r))
- (portRef I1 (instanceRef IPL_030_0_0__m))
- (portRef I0 (instanceRef IPL_030_0_0__r))
- (portRef I1 (instanceRef cpu_est_0_2__m))
- (portRef I0 (instanceRef cpu_est_0_2__r))
- (portRef I0 (instanceRef cpu_est_0_0))
- (portRef I1 (instanceRef cpu_est_0_1__m))
- (portRef I0 (instanceRef cpu_est_0_1__r))
- (portRef I1 (instanceRef cpu_est_0_3__m))
- (portRef I0 (instanceRef cpu_est_0_3__r))
- (portRef I0 (instanceRef clk_un4_clk_000_d1_i))
+ (net N_132 (joined
+ (portRef O (instanceRef G_86))
+ (portRef I0 (instanceRef N_132_i))
+ ))
+ (net (rename state_machine_un30_clk_000_d1 "state_machine.un30_clk_000_d1") (joined
+ (portRef O (instanceRef state_machine_un30_clk_000_d1))
+ (portRef I1 (instanceRef SM_AMIGA_ns_o3_1))
(portRef I1 (instanceRef UDS_000_INT_0_sqmuxa_1))
))
- (net N_144 (joined
- (portRef O (instanceRef un1_as_030_4_91))
+ (net N_147 (joined
+ (portRef O (instanceRef un1_as_030_4_95))
(portRef I1 (instanceRef un1_as_030_4))
- (portRef I0 (instanceRef N_144_i))
- ))
- (net N_101 (joined
- (portRef O (instanceRef SM_AMIGA_ns_a2_0_2))
- (portRef I0 (instanceRef N_101_i))
- ))
- (net VPA_SYNC_1_sqmuxa (joined
- (portRef O (instanceRef VPA_SYNC_1_sqmuxa))
- (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_i))
- ))
- (net N_97 (joined
- (portRef O (instanceRef un1_DSACK_INT_0_sqmuxa_i_a2))
- (portRef I0 (instanceRef N_97_i))
- ))
- (net (rename state_machine_un34_clk_000_d0 "state_machine.un34_clk_000_d0") (joined
- (portRef O (instanceRef state_machine_un34_clk_000_d0_i_0))
- (portRef I1 (instanceRef state_machine_LDS_000_INT_8))
+ (portRef I0 (instanceRef N_147_i))
))
(net N_96 (joined
- (portRef O (instanceRef state_machine_un5_clk_030_i_a2))
+ (portRef O (instanceRef un1_DSACK_INT_0_sqmuxa_i_a3))
(portRef I0 (instanceRef N_96_i))
))
- (net N_102 (joined
- (portRef O (instanceRef SM_AMIGA_ns_i_a2_3))
- (portRef I0 (instanceRef N_102_i))
+ (net (rename state_machine_un44_clk_000_d1 "state_machine.un44_clk_000_d1") (joined
+ (portRef O (instanceRef state_machine_un44_clk_000_d1_i_0))
+ (portRef I1 (instanceRef state_machine_LDS_000_INT_7))
+ ))
+ (net (rename un3_clk_cnt_1 "un3_clk_cnt[1]") (joined
+ (portRef O (instanceRef G_90))
+ (portRef I1 (instanceRef clk_CLK_CNT_3_1))
+ ))
+ (net N_89 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_o3_i_1))
+ (portRef I0 (instanceRef SM_AMIGA_ns_a3_1))
+ ))
+ (net N_97 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_i_a3_0))
+ (portRef I0 (instanceRef N_97_i))
+ ))
+ (net N_90 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_i_o3_i_0))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_a3_0))
+ ))
+ (net N_98 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_a3_1))
+ (portRef I0 (instanceRef N_98_i))
+ ))
+ (net N_99 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_a3_0_1))
+ (portRef I0 (instanceRef N_99_i))
))
(net UDS_000_INT_0_sqmuxa (joined
(portRef O (instanceRef UDS_000_INT_0_sqmuxa))
@@ -934,53 +1014,54 @@
(portRef O (instanceRef un4_ciin))
(portRef I0 (instanceRef CIIN))
))
+ (net N_105 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_a3_0_5))
+ (portRef I0 (instanceRef N_105_i))
+ ))
(net N_92 (joined
- (portRef O (instanceRef SM_AMIGA_ns_i_o2_i_1))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_1))
+ (portRef O (instanceRef SM_AMIGA_ns_i_o3_i_6))
+ (portRef I1 (instanceRef SM_AMIGA_ns_i_a3_6))
))
- (net N_91 (joined
- (portRef O (instanceRef SM_AMIGA_ns_i_o2_i_0))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_0))
+ (net N_106 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_i_a3_6))
+ (portRef I0 (instanceRef N_106_i))
))
- (net N_99 (joined
- (portRef O (instanceRef SM_AMIGA_ns_i_a2_1))
- (portRef I0 (instanceRef N_99_i))
+ (net N_107 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_i_a3_0_6))
+ (portRef I0 (instanceRef N_107_i))
))
- (net N_111 (joined
- (portRef O (instanceRef SM_AMIGA_ns_i_a2_0_1))
- (portRef I0 (instanceRef SM_AMIGA_ns_a2_0_2))
- (portRef I0 (instanceRef N_111_i))
- ))
- (net N_98 (joined
- (portRef O (instanceRef SM_AMIGA_ns_i_a2_0))
- (portRef I0 (instanceRef N_98_i))
- ))
- (net (rename state_machine_un6_bgack_000 "state_machine.un6_bgack_000") (joined
- (portRef O (instanceRef state_machine_un6_bgack_000_i))
- (portRef I1 (instanceRef BGACK_030_INT_0_m))
- (portRef I0 (instanceRef BGACK_030_INT_0_r))
+ (net N_104 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_a3_5))
+ (portRef I0 (instanceRef N_104_i))
))
(net (rename state_machine_un42_clk_030 "state_machine.un42_clk_030") (joined
(portRef O (instanceRef state_machine_un42_clk_030))
(portRef I1 (instanceRef un1_as_030_3))
(portRef I0 (instanceRef state_machine_un42_clk_030_i))
))
- (net DTACK_SYNC_1_sqmuxa (joined
- (portRef O (instanceRef DTACK_SYNC_1_sqmuxa))
- (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_i))
- ))
(net un1_bg_030 (joined
(portRef O (instanceRef un1_bg_030_i))
(portRef I0 (instanceRef BG_000_0_m))
))
+ (net N_94 (joined
+ (portRef O (instanceRef state_machine_un5_clk_030_i_a3))
+ (portRef I0 (instanceRef N_94_i))
+ ))
(net (rename state_machine_AS_030_000_SYNC_3 "state_machine.AS_030_000_SYNC_3") (joined
(portRef O (instanceRef state_machine_AS_030_000_SYNC_3_i))
(portRef I0 (instanceRef AS_030_000_SYNC_0_m))
))
- (net DTACK_SYNC_1_sqmuxa_1 (joined
- (portRef O (instanceRef DTACK_SYNC_1_sqmuxa_1))
- (portRef I1 (instanceRef DTACK_SYNC_0_m))
- (portRef I0 (instanceRef DTACK_SYNC_0_r))
+ (net AMIGA_BUS_ENABLE_i_m (joined
+ (portRef O (instanceRef AMIGA_BUS_ENABLE_i_m))
+ (portRef I0 (instanceRef AMIGA_BUS_ENABLE_i_m_i))
+ ))
+ (net nEXP_SPACE_m (joined
+ (portRef O (instanceRef nEXP_SPACE_m))
+ (portRef I0 (instanceRef nEXP_SPACE_m_i))
+ ))
+ (net N_95 (joined
+ (portRef O (instanceRef un1_SM_AMIGA_0_sqmuxa_i_a3))
+ (portRef I0 (instanceRef N_95_i))
))
(net un1_as_030_3 (joined
(portRef O (instanceRef un1_as_030_3_i))
@@ -993,21 +1074,66 @@
(portRef I1 (instanceRef AS_030_000_SYNC_0_m))
(portRef I0 (instanceRef AS_030_000_SYNC_0_r))
))
+ (net (rename state_machine_un6_bgack_000 "state_machine.un6_bgack_000") (joined
+ (portRef O (instanceRef state_machine_un6_bgack_000_i))
+ (portRef I1 (instanceRef BGACK_030_INT_0_m))
+ (portRef I0 (instanceRef BGACK_030_INT_0_r))
+ ))
(net (rename state_machine_un1_clk_030 "state_machine.un1_clk_030") (joined
(portRef O (instanceRef state_machine_un1_clk_030_i))
(portRef I1 (instanceRef BG_000_0_m))
(portRef I0 (instanceRef BG_000_0_r))
))
- (net VPA_SYNC_1_sqmuxa_1_0 (joined
- (portRef O (instanceRef VPA_SYNC_1_sqmuxa_1_0))
- (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa))
- (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_3_0))
+ (net AS_000_INT_1_sqmuxa (joined
+ (portRef O (instanceRef AS_000_INT_1_sqmuxa))
+ (portRef I1 (instanceRef AS_000_INT_0_m))
+ (portRef I0 (instanceRef AS_000_INT_0_r))
+ ))
+ (net DSACK_INT_1_sqmuxa (joined
+ (portRef O (instanceRef DSACK_INT_1_sqmuxa))
+ (portRef I1 (instanceRef DSACK_INT_0_1__m))
+ (portRef I0 (instanceRef DSACK_INT_0_1__r))
+ ))
+ (net N_100 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_a3_2))
+ (portRef I0 (instanceRef N_100_i))
+ ))
+ (net (rename state_machine_un23_clk_000_d0 "state_machine.un23_clk_000_d0") (joined
+ (portRef O (instanceRef state_machine_un23_clk_000_d0_i_0))
+ (portRef I1 (instanceRef SM_AMIGA_ns_a3_0_5))
+ ))
+ (net DTACK_SYNC_1_sqmuxa (joined
+ (portRef O (instanceRef DTACK_SYNC_1_sqmuxa))
+ (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_i))
+ ))
+ (net DTACK_SYNC_1_sqmuxa_1 (joined
+ (portRef O (instanceRef DTACK_SYNC_1_sqmuxa_1))
+ (portRef I1 (instanceRef DTACK_SYNC_0_m))
+ (portRef I0 (instanceRef DTACK_SYNC_0_r))
+ ))
+ (net VPA_SYNC_1_sqmuxa (joined
+ (portRef O (instanceRef VPA_SYNC_1_sqmuxa))
+ (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_i))
+ ))
+ (net VPA_SYNC_1_sqmuxa_1 (joined
+ (portRef O (instanceRef VPA_SYNC_1_sqmuxa_1))
+ (portRef I1 (instanceRef VPA_SYNC_0_m))
+ (portRef I0 (instanceRef VPA_SYNC_0_r))
))
(net (rename state_machine_un15_clk_000_d0 "state_machine.un15_clk_000_d0") (joined
(portRef O (instanceRef state_machine_un15_clk_000_d0_i))
(portRef I1 (instanceRef VMA_INT_0_m))
(portRef I0 (instanceRef VMA_INT_0_r))
))
+ (net (rename clk_cpu_est_11_3 "clk.cpu_est_11[3]") (joined
+ (portRef O (instanceRef clk_cpu_est_11_0_i_3))
+ (portRef I0 (instanceRef cpu_est_0_3__m))
+ ))
+ (net (rename state_machine_un2_clk_000 "state_machine.un2_clk_000") (joined
+ (portRef O (instanceRef state_machine_un2_clk_000))
+ (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa_2))
+ (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_4))
+ ))
(net (rename state_machine_un13_clk_000_d0 "state_machine.un13_clk_000_d0") (joined
(portRef O (instanceRef state_machine_un13_clk_000_d0))
(portRef I0 (instanceRef state_machine_un13_clk_000_d0_i))
@@ -1016,18 +1142,22 @@
(portRef O (instanceRef state_machine_un8_clk_000_d0))
(portRef I0 (instanceRef state_machine_un8_clk_000_d0_i))
))
- (net N_109 (joined
- (portRef O (instanceRef SM_AMIGA_ns_a2_7))
- (portRef I0 (instanceRef N_109_i))
+ (net N_108 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_a3_7))
+ (portRef I0 (instanceRef N_108_i))
))
(net (rename state_machine_un13_clk_000_d0_1 "state_machine.un13_clk_000_d0_1") (joined
(portRef O (instanceRef state_machine_un13_clk_000_d0_1))
(portRef I0 (instanceRef state_machine_un13_clk_000_d0_1_i))
(portRef I0 (instanceRef state_machine_un13_clk_000_d0_2_0))
))
- (net N_129 (joined
+ (net N_124 (joined
+ (portRef O (instanceRef clk_cpu_est_11_0_a4_0_1))
+ (portRef I0 (instanceRef N_124_i))
+ ))
+ (net N_126 (joined
(portRef O (instanceRef clk_cpu_est_11_0_a4_2_1))
- (portRef I0 (instanceRef N_129_i))
+ (portRef I0 (instanceRef N_126_i))
))
(net (rename state_machine_un13_clk_000_d0_2 "state_machine.un13_clk_000_d0_2") (joined
(portRef O (instanceRef state_machine_un13_clk_000_d0_2))
@@ -1035,166 +1165,119 @@
(portRef I1 (instanceRef clk_cpu_est_11_0_a4_2_1))
(portRef I1 (instanceRef state_machine_un13_clk_000_d0_2_0))
))
+ (net N_129 (joined
+ (portRef O (instanceRef clk_cpu_est_11_0_a4_3))
+ (portRef I0 (instanceRef N_129_i))
+ ))
+ (net N_122 (joined
+ (portRef O (instanceRef clk_cpu_est_11_0_o4_i_3))
+ (portRef I0 (instanceRef clk_cpu_est_11_0_a4_3))
+ ))
(net N_130 (joined
- (portRef O (instanceRef clk_cpu_est_11_i_a4_2))
+ (portRef O (instanceRef clk_cpu_est_11_0_a4_0_3))
(portRef I0 (instanceRef N_130_i))
))
- (net N_131 (joined
- (portRef O (instanceRef clk_cpu_est_11_i_a4_0_2))
- (portRef I0 (instanceRef N_131_i))
- ))
- (net N_124 (joined
+ (net N_121 (joined
(portRef O (instanceRef clk_cpu_est_11_0_o4_i_1))
(portRef I0 (instanceRef VMA_INT_0_m))
(portRef I0 (instanceRef clk_cpu_est_11_0_a4_1))
))
- (net N_125 (joined
- (portRef O (instanceRef clk_cpu_est_11_0_o4_i_3))
- (portRef I0 (instanceRef clk_cpu_est_11_0_a4_3))
- ))
- (net N_134 (joined
+ (net N_131 (joined
(portRef O (instanceRef clk_cpu_est_11_0_a4_1_3))
- (portRef I0 (instanceRef N_134_i))
+ (portRef I0 (instanceRef N_131_i))
))
- (net N_134_1 (joined
- (portRef O (instanceRef VPA_SYNC_1_sqmuxa_3))
- (portRef I0 (instanceRef clk_cpu_est_11_0_a4_1_3))
- (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_2))
- ))
- (net N_106 (joined
- (portRef O (instanceRef SM_AMIGA_ns_a2_0_5))
- (portRef I0 (instanceRef N_106_i))
- ))
- (net (rename clk_cpu_est_11_3 "clk.cpu_est_11[3]") (joined
- (portRef O (instanceRef clk_cpu_est_11_0_i_3))
- (portRef I0 (instanceRef cpu_est_0_3__m))
- ))
- (net N_132 (joined
- (portRef O (instanceRef clk_cpu_est_11_0_a4_3))
- (portRef I0 (instanceRef N_132_i))
- ))
- (net N_133 (joined
- (portRef O (instanceRef clk_cpu_est_11_0_a4_0_3))
- (portRef I0 (instanceRef N_133_i))
+ (net N_127 (joined
+ (portRef O (instanceRef clk_cpu_est_11_i_a4_2))
+ (portRef I0 (instanceRef N_127_i))
))
(net (rename clk_cpu_est_11_1 "clk.cpu_est_11[1]") (joined
(portRef O (instanceRef clk_cpu_est_11_0_i_1))
(portRef I0 (instanceRef cpu_est_0_1__m))
))
- (net N_127 (joined
- (portRef O (instanceRef clk_cpu_est_11_0_a4_0_1))
- (portRef I0 (instanceRef N_127_i))
- ))
- (net N_126 (joined
- (portRef O (instanceRef clk_cpu_est_11_0_a4_1))
- (portRef I0 (instanceRef N_126_i))
- ))
(net N_128 (joined
- (portRef O (instanceRef clk_cpu_est_11_0_a4_1_1))
+ (portRef O (instanceRef clk_cpu_est_11_i_a4_0_2))
(portRef I0 (instanceRef N_128_i))
))
- (net N_93 (joined
- (portRef O (instanceRef SM_AMIGA_ns_i_o2_i_4))
- (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_4))
+ (net N_123 (joined
+ (portRef O (instanceRef clk_cpu_est_11_0_a4_1))
+ (portRef I0 (instanceRef N_123_i))
))
- (net N_90 (joined
- (portRef O (instanceRef SM_AMIGA_ns_o2_i_6))
- (portRef I0 (instanceRef SM_AMIGA_ns_a2_6))
+ (net N_125 (joined
+ (portRef O (instanceRef clk_cpu_est_11_0_a4_1_1))
+ (portRef I0 (instanceRef N_125_i))
))
- (net N_107 (joined
- (portRef O (instanceRef SM_AMIGA_ns_a2_6))
- (portRef I0 (instanceRef N_107_i))
+ (net N_91 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_i_o3_i_4))
+ (portRef I1 (instanceRef SM_AMIGA_ns_i_a3_4))
))
- (net N_108 (joined
- (portRef O (instanceRef SM_AMIGA_ns_a2_0_6))
- (portRef I0 (instanceRef N_108_i))
- ))
- (net N_105 (joined
- (portRef O (instanceRef SM_AMIGA_ns_a2_5))
- (portRef I0 (instanceRef N_105_i))
+ (net N_102 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_i_a3_4))
+ (portRef I0 (instanceRef N_102_i))
))
(net N_103 (joined
- (portRef O (instanceRef SM_AMIGA_ns_i_a2_4))
+ (portRef O (instanceRef SM_AMIGA_ns_i_a3_0_4))
(portRef I0 (instanceRef N_103_i))
))
- (net N_104 (joined
- (portRef O (instanceRef SM_AMIGA_ns_i_a2_0_4))
- (portRef I0 (instanceRef N_104_i))
- ))
- (net N_100 (joined
- (portRef O (instanceRef SM_AMIGA_ns_a2_2))
- (portRef I0 (instanceRef N_100_i))
- ))
- (net AS_000_INT_1_sqmuxa (joined
- (portRef O (instanceRef AS_000_INT_1_sqmuxa))
- (portRef I1 (instanceRef AS_000_INT_0_m))
- (portRef I0 (instanceRef AS_000_INT_0_r))
+ (net N_101 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_i_a3_3))
+ (portRef I0 (instanceRef N_101_i))
))
(net RW_i (joined
(portRef O (instanceRef RW_i))
- (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_2))
+ (portRef I1 (instanceRef UDS_000_INT_0_sqmuxa))
(portRef I0 (instanceRef AMIGA_BUS_DATA_DIR))
))
- (net nEXP_SPACE_i (joined
- (portRef O (instanceRef nEXP_SPACE_i))
- (portRef I1 (instanceRef un1_bg_030_2))
- (portRef I0 (instanceRef AMIGA_BUS_ENABLE))
- ))
- (net N_101_i (joined
- (portRef O (instanceRef N_101_i))
- (portRef I1 (instanceRef AS_000_INT_1_sqmuxa))
- (portRef I1 (instanceRef SM_AMIGA_ns_2))
- (portRef I0 (instanceRef AS_000_INT_0_n))
- ))
(net AS_000_INT_i (joined
(portRef O (instanceRef AS_000_INT_i))
- (portRef I0 (instanceRef state_machine_un13_as_000_int))
+ (portRef I0 (instanceRef state_machine_un14_as_000_int))
))
(net (rename DSACK_i_1 "DSACK_i[1]") (joined
- (portRef O (instanceRef I_104))
- (portRef I1 (instanceRef state_machine_un13_as_000_int))
- ))
- (net AS_030_i (joined
- (portRef O (instanceRef AS_030_i))
- (portRef I0 (instanceRef un1_as_030_4))
- (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_1))
- (portRef I0 (instanceRef DSACK_INT_1_sqmuxa))
- (portRef I0 (instanceRef state_machine_un17_clk_030))
- (portRef I0 (instanceRef un1_as_030_3))
- (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_1))
- (portRef I0 (instanceRef AS_000_INT_1_sqmuxa))
- (portRef I0 (instanceRef state_machine_AS_030_000_SYNC_3_1))
- ))
- (net CLK_000_D0_i (joined
- (portRef O (instanceRef CLK_000_D0_i))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_1))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_3))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_4))
- (portRef I0 (instanceRef SM_AMIGA_ns_a2_5))
- (portRef I0 (instanceRef state_machine_un8_clk_000_d0_2))
- (portRef I0 (instanceRef SM_AMIGA_ns_a2_0_1_5))
- ))
- (net (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (joined
- (portRef O (instanceRef SM_AMIGA_i_3))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_0_4))
+ (portRef O (instanceRef I_108))
+ (portRef I1 (instanceRef state_machine_un14_as_000_int))
))
(net (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (joined
(portRef O (instanceRef SM_AMIGA_i_4))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_3))
- (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_0_4))
+ (portRef I1 (instanceRef SM_AMIGA_ns_i_a3_0_4))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_a3_3))
))
- (net CLK_000_D1_i (joined
- (portRef O (instanceRef CLK_000_D1_i))
- (portRef I0 (instanceRef SM_AMIGA_ns_o2_6))
- (portRef I1 (instanceRef clk_un4_clk_000_d1_0_a2))
+ (net (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (joined
+ (portRef O (instanceRef SM_AMIGA_i_5))
+ (portRef I1 (instanceRef SM_AMIGA_ns_i_a3_3))
+ ))
+ (net CLK_000_D0_i (joined
+ (portRef O (instanceRef CLK_000_D0_i))
+ (portRef I0 (instanceRef SM_AMIGA_ns_a3_0_1))
+ (portRef I0 (instanceRef SM_AMIGA_ns_a3_5))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_a3_6))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_a3_4))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_3))
+ (portRef I0 (instanceRef SM_AMIGA_ns_a3_0_1_5))
+ (portRef I0 (instanceRef un1_DSACK_INT_0_sqmuxa_i_a3_1))
+ (portRef I0 (instanceRef state_machine_un8_clk_000_d0_2))
+ ))
+ (net (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (joined
+ (portRef O (instanceRef SM_AMIGA_i_3))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_a3_0_4))
))
(net (rename cpu_est_i_0 "cpu_est_i[0]") (joined
(portRef O (instanceRef cpu_est_i_0))
- (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_3))
(portRef I1 (instanceRef clk_cpu_est_11_0_a4_1))
+ (portRef I0 (instanceRef clk_cpu_est_11_0_a4_1_1_3))
+ (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_3))
(portRef I1 (instanceRef clk_cpu_est_11_i_a4_0_1_2))
(portRef I0 (instanceRef state_machine_un13_clk_000_d0_1_0))
))
+ (net (rename cpu_est_i_2 "cpu_est_i[2]") (joined
+ (portRef O (instanceRef cpu_est_i_2))
+ (portRef I1 (instanceRef clk_cpu_est_11_0_a4_0_3))
+ (portRef I0 (instanceRef clk_cpu_est_11_0_a4_0_1))
+ (portRef I1 (instanceRef clk_cpu_est_11_0_a4_1_3))
+ (portRef I1 (instanceRef clk_cpu_est_11_i_a4_0_2))
+ ))
+ (net (rename state_machine_un13_clk_000_d0_2_i "state_machine.un13_clk_000_d0_2_i") (joined
+ (portRef O (instanceRef state_machine_un13_clk_000_d0_2_i))
+ (portRef I1 (instanceRef clk_cpu_est_11_i_a4_2))
+ ))
(net (rename cpu_est_i_3 "cpu_est_i[3]") (joined
(portRef O (instanceRef cpu_est_i_3))
(portRef I1 (instanceRef clk_cpu_est_11_0_o4_1))
@@ -1203,44 +1286,67 @@
(portRef I1 (instanceRef clk_cpu_est_11_i_a4_1_2))
(portRef I1 (instanceRef state_machine_un13_clk_000_d0_1_0))
))
- (net (rename cpu_est_i_2 "cpu_est_i[2]") (joined
- (portRef O (instanceRef cpu_est_i_2))
- (portRef I1 (instanceRef clk_cpu_est_11_0_a4_1_3))
- (portRef I0 (instanceRef clk_cpu_est_11_0_a4_0_1))
- (portRef I1 (instanceRef clk_cpu_est_11_0_a4_0_3))
- (portRef I1 (instanceRef clk_cpu_est_11_i_a4_0_2))
- ))
(net VPA_D_i (joined
(portRef O (instanceRef VPA_D_i))
(portRef I1 (instanceRef state_machine_un8_clk_000_d0_2))
- (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_3_0))
- ))
- (net VMA_INT_i (joined
- (portRef O (instanceRef VMA_INT_i))
- (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_2))
+ (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_2))
))
(net (rename cpu_est_i_1 "cpu_est_i[1]") (joined
(portRef O (instanceRef cpu_est_i_1))
- (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_3))
(portRef I0 (instanceRef clk_cpu_est_11_0_o4_1))
+ (portRef I1 (instanceRef clk_cpu_est_11_0_a4_1_1_3))
(portRef I0 (instanceRef state_machine_un8_clk_000_d0_1))
+ (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_4))
))
- (net (rename state_machine_un13_clk_000_d0_2_i "state_machine.un13_clk_000_d0_2_i") (joined
- (portRef O (instanceRef state_machine_un13_clk_000_d0_2_i))
- (portRef I1 (instanceRef clk_cpu_est_11_i_a4_2))
+ (net DTACK_i (joined
+ (portRef O (instanceRef I_109))
+ (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_1_0))
+ ))
+ (net VMA_INT_i (joined
+ (portRef O (instanceRef VMA_INT_i))
+ (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_1_0))
))
(net (rename state_machine_un13_clk_000_d0_1_i "state_machine.un13_clk_000_d0_1_i") (joined
(portRef O (instanceRef state_machine_un13_clk_000_d0_1_i))
- (portRef I1 (instanceRef SM_AMIGA_ns_a2_7))
+ (portRef I1 (instanceRef SM_AMIGA_ns_a3_7))
))
- (net DTACK_i (joined
- (portRef O (instanceRef I_105))
- (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_1_0))
+ (net AS_030_i (joined
+ (portRef O (instanceRef AS_030_i))
+ (portRef I0 (instanceRef un1_as_030_4))
+ (portRef I0 (instanceRef state_machine_un17_clk_030))
+ (portRef I0 (instanceRef un1_as_030_3))
+ (portRef I0 (instanceRef AS_000_INT_1_sqmuxa))
+ (portRef I0 (instanceRef DSACK_INT_1_sqmuxa))
+ (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_1))
+ (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_1))
+ (portRef I0 (instanceRef state_machine_AS_030_000_SYNC_3_1))
+ (portRef I1 (instanceRef AMIGA_BUS_ENABLE_i_m_1))
))
(net DTACK_SYNC_1_sqmuxa_i (joined
(portRef O (instanceRef DTACK_SYNC_1_sqmuxa_i))
- (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa_1))
(portRef I0 (instanceRef DTACK_SYNC_0_n))
+ (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa_1))
+ ))
+ (net VPA_SYNC_1_sqmuxa_i (joined
+ (portRef O (instanceRef VPA_SYNC_1_sqmuxa_i))
+ (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_1))
+ (portRef I0 (instanceRef VPA_SYNC_0_n))
+ ))
+ (net CLK_000_D1_i (joined
+ (portRef O (instanceRef CLK_000_D1_i))
+ (portRef I1 (instanceRef clk_un4_clk_000_d1))
+ ))
+ (net N_95_i (joined
+ (portRef O (instanceRef N_95_i))
+ (portRef I0 (instanceRef SM_AMIGA_ns_2))
+ (portRef I1 (instanceRef AS_000_INT_1_sqmuxa))
+ (portRef I0 (instanceRef AS_000_INT_0_n))
+ ))
+ (net N_96_i (joined
+ (portRef O (instanceRef N_96_i))
+ (portRef I1 (instanceRef DSACK_INT_1_sqmuxa))
+ (portRef I0 (instanceRef DSACK_INT_0_1__n))
+ (portRef I0 (instanceRef SM_AMIGA_ns_7))
))
(net (rename A_i_18 "A_i[18]") (joined
(portRef O (instanceRef A_i_18))
@@ -1258,52 +1364,68 @@
(portRef O (instanceRef CLK_030_i))
(portRef I1 (instanceRef state_machine_un17_clk_030))
))
+ (net CLK_000_D2_i (joined
+ (portRef O (instanceRef CLK_000_D2_i))
+ (portRef I1 (instanceRef state_machine_un30_clk_000_d1))
+ ))
(net (rename state_machine_un42_clk_030_i "state_machine.un42_clk_030_i") (joined
(portRef O (instanceRef state_machine_un42_clk_030_i))
(portRef I1 (instanceRef state_machine_AS_030_000_SYNC_3))
))
(net (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (joined
(portRef O (instanceRef SM_AMIGA_i_6))
- (portRef I0 (instanceRef state_machine_un5_clk_030_i_a2))
- (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_1))
+ (portRef I0 (instanceRef state_machine_un5_clk_030_i_a3))
+ (portRef I1 (instanceRef AMIGA_BUS_ENABLE_i_m))
))
(net (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (joined
(portRef O (instanceRef SM_AMIGA_i_7))
- (portRef I1 (instanceRef state_machine_un5_clk_030_i_a2))
- (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_0))
+ (portRef I1 (instanceRef SM_AMIGA_ns_i_a3_0))
+ (portRef I1 (instanceRef state_machine_un5_clk_030_i_a3))
))
- (net AS_030_000_SYNC_i (joined
- (portRef O (instanceRef AS_030_000_SYNC_i))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_0_1))
- (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_1_1))
+ (net AMIGA_BUS_ENABLE_i (joined
+ (portRef O (instanceRef AMIGA_BUS_ENABLE_i))
+ (portRef I0 (instanceRef AMIGA_BUS_ENABLE_i_m_1))
+ ))
+ (net nEXP_SPACE_i (joined
+ (portRef O (instanceRef nEXP_SPACE_i))
+ (portRef I1 (instanceRef un1_bg_030_2))
+ ))
+ (net (rename SM_AMIGA_i_2 "SM_AMIGA_i[2]") (joined
+ (portRef O (instanceRef SM_AMIGA_i_2))
+ (portRef I1 (instanceRef SM_AMIGA_ns_i_a3_0_6))
+ (portRef I1 (instanceRef SM_AMIGA_ns_i_o3_6))
+ ))
+ (net (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (joined
+ (portRef O (instanceRef SM_AMIGA_i_1))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_a3_0_6))
))
(net DS_030_i (joined
(portRef O (instanceRef DS_030_i))
(portRef I1 (instanceRef UDS_000_INT_0_sqmuxa_1_0))
(portRef I1 (instanceRef UDS_000_INT_0_sqmuxa_1_1))
))
+ (net AS_030_000_SYNC_i (joined
+ (portRef O (instanceRef AS_030_000_SYNC_i))
+ (portRef I0 (instanceRef SM_AMIGA_ns_o3_1))
+ (portRef I0 (instanceRef UDS_000_INT_0_sqmuxa_1_1))
+ ))
(net UDS_000_INT_0_sqmuxa_1_i (joined
(portRef O (instanceRef UDS_000_INT_0_sqmuxa_1_i))
- (portRef I0 (instanceRef un1_as_030_4_91))
+ (portRef I0 (instanceRef un1_as_030_4_95))
))
(net UDS_000_INT_0_sqmuxa_i (joined
(portRef O (instanceRef UDS_000_INT_0_sqmuxa_i))
- (portRef I1 (instanceRef un1_as_030_4_91))
+ (portRef I1 (instanceRef un1_as_030_4_95))
))
- (net (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (joined
- (portRef O (instanceRef SM_AMIGA_i_5))
- (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_3))
+ (net (rename clk_clk_cnt_i "clk.clk_cnt_i") (joined
+ (portRef O (instanceRef clk_clk_cnt_i))
+ (portRef I0 (instanceRef clk_CLK_CNT_3_1))
+ (portRef I1 (instanceRef clk_CLK_CNT_3_0))
))
- (net VPA_SYNC_1_sqmuxa_i (joined
- (portRef O (instanceRef VPA_SYNC_1_sqmuxa_i))
- (portRef I0 (instanceRef VPA_SYNC_0_n))
- (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_1))
- ))
- (net N_97_i (joined
- (portRef O (instanceRef N_97_i))
- (portRef I0 (instanceRef DSACK_INT_0_1__n))
- (portRef I1 (instanceRef DSACK_INT_1_sqmuxa))
- (portRef I0 (instanceRef SM_AMIGA_ns_7))
+ (net (rename CLK_CNT_i_0 "CLK_CNT_i[0]") (joined
+ (portRef O (instanceRef CLK_CNT_i_0))
+ (portRef I0 (instanceRef G_87))
+ (portRef I0 (instanceRef clk_CLK_CNT_3_0))
))
(net (rename A_i_30 "A_i[30]") (joined
(portRef O (instanceRef A_i_30))
@@ -1337,12 +1459,17 @@
(portRef O (instanceRef A_i_25))
(portRef I1 (instanceRef un8_ciin_1))
))
- (net (rename CLK_CNT_i_0 "CLK_CNT_i[0]") (joined
- (portRef O (instanceRef CLK_CNT_i_0))
- (portRef D (instanceRef CLK_CNT_0))
+ (net N_132_i (joined
+ (portRef O (instanceRef N_132_i))
+ (portRef I1 (instanceRef G_87))
+ ))
+ (net (rename state_machine_un14_as_000_int_i "state_machine.un14_as_000_int_i") (joined
+ (portRef O (instanceRef state_machine_un14_as_000_int_i))
+ (portRef D (instanceRef DTACK_DMA))
))
(net RST_i (joined
(portRef O (instanceRef RST_i))
+ (portRef R (instanceRef CLK_REF_1))
(portRef S (instanceRef AS_000_INT))
(portRef S (instanceRef AS_030_000_SYNC))
(portRef S (instanceRef BGACK_030_INT))
@@ -1367,10 +1494,6 @@
(portRef S (instanceRef VMA_INT))
(portRef S (instanceRef VPA_SYNC))
))
- (net (rename state_machine_un13_as_000_int_i "state_machine.un13_as_000_int_i") (joined
- (portRef O (instanceRef state_machine_un13_as_000_int_i))
- (portRef D (instanceRef DTACK_DMA))
- ))
(net FPU_CS_INT_i (joined
(portRef O (instanceRef FPU_CS_INT_i))
(portRef OE (instanceRef AVEC_EXP))
@@ -1411,7 +1534,7 @@
))
(net (rename SIZE_c_0 "SIZE_c[0]") (joined
(portRef O (instanceRef SIZE_0))
- (portRef I1 (instanceRef state_machine_un34_clk_000_d0))
+ (portRef I1 (instanceRef state_machine_un44_clk_000_d1))
))
(net (rename SIZE_0 "SIZE[0]") (joined
(portRef (member size 1))
@@ -1608,6 +1731,7 @@
))
(net nEXP_SPACE_c (joined
(portRef O (instanceRef nEXP_SPACE))
+ (portRef I1 (instanceRef nEXP_SPACE_m))
(portRef I0 (instanceRef nEXP_SPACE_i))
(portRef I1 (instanceRef state_machine_AS_030_000_SYNC_3_1))
(portRef OE (instanceRef DSACK_0))
@@ -1644,8 +1768,8 @@
))
(net BGACK_000_c (joined
(portRef O (instanceRef BGACK_000))
- (portRef I0 (instanceRef BGACK_030_INT_0_m))
(portRef I0 (instanceRef state_machine_un6_bgack_000))
+ (portRef I0 (instanceRef BGACK_030_INT_0_m))
(portRef I1 (instanceRef state_machine_un42_clk_030_3))
))
(net BGACK_000 (joined
@@ -1663,6 +1787,7 @@
))
(net CLK_000_c (joined
(portRef O (instanceRef CLK_000))
+ (portRef I1 (instanceRef state_machine_un2_clk_000))
(portRef D (instanceRef CLK_000_D0))
))
(net CLK_000 (joined
@@ -1671,13 +1796,16 @@
))
(net CLK_OSZI_c (joined
(portRef O (instanceRef CLK_OSZI))
+ (portRef CLK (instanceRef AMIGA_BUS_ENABLEDFF))
(portRef CLK (instanceRef AS_000_INT))
(portRef CLK (instanceRef AS_030_000_SYNC))
(portRef CLK (instanceRef BGACK_030_INT))
(portRef CLK (instanceRef BG_000DFFSH))
(portRef CLK (instanceRef CLK_000_D0))
(portRef CLK (instanceRef CLK_000_D1))
+ (portRef CLK (instanceRef CLK_000_D2))
(portRef CLK (instanceRef CLK_CNT_0))
+ (portRef CLK (instanceRef CLK_CNT_1))
(portRef CLK (instanceRef CLK_OUT_INT))
(portRef CLK (instanceRef CLK_OUT_PRE))
(portRef CLK (instanceRef DSACK_INT_1))
@@ -1784,7 +1912,7 @@
))
(net (rename DSACK_c_1 "DSACK_c[1]") (joined
(portRef O (instanceRef DSACK_1))
- (portRef I0 (instanceRef I_104))
+ (portRef I0 (instanceRef I_108))
))
(net (rename DSACK_1 "DSACK[1]") (joined
(portRef (member dsack 0))
@@ -1792,7 +1920,7 @@
))
(net DTACK_c (joined
(portRef O (instanceRef DTACK))
- (portRef I0 (instanceRef I_105))
+ (portRef I0 (instanceRef I_109))
))
(net DTACK (joined
(portRef IO (instanceRef DTACK))
@@ -1825,6 +1953,8 @@
(net RST_c (joined
(portRef O (instanceRef RST))
(portRef I0 (instanceRef RST_i))
+ (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_m))
+ (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_r))
(portRef D (instanceRef RESETDFF))
))
(net RST (joined
@@ -1864,6 +1994,12 @@
(portRef (member fc 0))
(portRef I0 (instanceRef FC_1))
))
+ (net AMIGA_BUS_ENABLE_c (joined
+ (portRef Q (instanceRef AMIGA_BUS_ENABLEDFF))
+ (portRef I0 (instanceRef AMIGA_BUS_ENABLE_i))
+ (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_n))
+ (portRef I0 (instanceRef AMIGA_BUS_ENABLE))
+ ))
(net AMIGA_BUS_ENABLE (joined
(portRef O (instanceRef AMIGA_BUS_ENABLE))
(portRef AMIGA_BUS_ENABLE)
@@ -1880,123 +2016,94 @@
(portRef O (instanceRef CIIN))
(portRef CIIN)
))
- (net N_100_i (joined
- (portRef O (instanceRef N_100_i))
- (portRef I0 (instanceRef SM_AMIGA_ns_2))
+ (net N_101_i (joined
+ (portRef O (instanceRef N_101_i))
+ (portRef I1 (instanceRef SM_AMIGA_ns_i_3))
))
- (net (rename SM_AMIGA_ns_0_2 "SM_AMIGA_ns_0[2]") (joined
- (portRef O (instanceRef SM_AMIGA_ns_2))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_2))
+ (net N_82_i (joined
+ (portRef O (instanceRef SM_AMIGA_ns_i_3))
+ (portRef D (instanceRef SM_AMIGA_4))
+ ))
+ (net N_102_i (joined
+ (portRef O (instanceRef N_102_i))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_4))
))
(net N_103_i (joined
(portRef O (instanceRef N_103_i))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_4))
- ))
- (net N_104_i (joined
- (portRef O (instanceRef N_104_i))
(portRef I1 (instanceRef SM_AMIGA_ns_i_4))
))
- (net N_82_i (joined
+ (net N_84_i (joined
(portRef O (instanceRef SM_AMIGA_ns_i_4))
(portRef D (instanceRef SM_AMIGA_3))
))
- (net N_106_i (joined
- (portRef O (instanceRef N_106_i))
- (portRef I1 (instanceRef SM_AMIGA_ns_5))
+ (net N_90_0 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_i_o3_0))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_o3_i_0))
))
- (net N_105_i (joined
- (portRef O (instanceRef N_105_i))
- (portRef I0 (instanceRef SM_AMIGA_ns_5))
- ))
- (net (rename SM_AMIGA_ns_0_5 "SM_AMIGA_ns_0[5]") (joined
- (portRef O (instanceRef SM_AMIGA_ns_5))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_5))
- ))
- (net N_107_i (joined
- (portRef O (instanceRef N_107_i))
- (portRef I0 (instanceRef SM_AMIGA_ns_6))
- ))
- (net N_108_i (joined
- (portRef O (instanceRef N_108_i))
- (portRef I1 (instanceRef SM_AMIGA_ns_6))
- ))
- (net (rename SM_AMIGA_ns_0_6 "SM_AMIGA_ns_0[6]") (joined
- (portRef O (instanceRef SM_AMIGA_ns_6))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_6))
- ))
- (net N_90_i (joined
- (portRef O (instanceRef SM_AMIGA_ns_o2_6))
- (portRef I0 (instanceRef un1_DSACK_INT_0_sqmuxa_i_a2))
- (portRef I0 (instanceRef SM_AMIGA_ns_o2_i_6))
- ))
- (net N_93_0 (joined
- (portRef O (instanceRef SM_AMIGA_ns_i_o2_4))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_i_4))
- ))
- (net N_128_i (joined
- (portRef O (instanceRef N_128_i))
- (portRef I1 (instanceRef clk_cpu_est_11_0_2_1))
- ))
- (net N_126_i (joined
- (portRef O (instanceRef N_126_i))
- (portRef I0 (instanceRef clk_cpu_est_11_0_2_1))
+ (net N_91_0 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_i_o3_4))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_o3_i_4))
))
(net N_127_i (joined
(portRef O (instanceRef N_127_i))
+ (portRef I0 (instanceRef clk_cpu_est_11_i_2))
+ ))
+ (net N_128_i (joined
+ (portRef O (instanceRef N_128_i))
+ (portRef I1 (instanceRef clk_cpu_est_11_i_2))
+ ))
+ (net N_118_i (joined
+ (portRef O (instanceRef clk_cpu_est_11_i_2))
+ (portRef I0 (instanceRef cpu_est_0_2__m))
+ ))
+ (net N_125_i (joined
+ (portRef O (instanceRef N_125_i))
+ (portRef I1 (instanceRef clk_cpu_est_11_0_2_1))
+ ))
+ (net N_123_i (joined
+ (portRef O (instanceRef N_123_i))
+ (portRef I0 (instanceRef clk_cpu_est_11_0_2_1))
+ ))
+ (net N_124_i (joined
+ (portRef O (instanceRef N_124_i))
(portRef I1 (instanceRef clk_cpu_est_11_0_1_1))
))
- (net N_129_i (joined
- (portRef O (instanceRef N_129_i))
+ (net N_126_i (joined
+ (portRef O (instanceRef N_126_i))
(portRef I0 (instanceRef clk_cpu_est_11_0_1_1))
))
(net (rename clk_cpu_est_11_0_1 "clk.cpu_est_11_0[1]") (joined
(portRef O (instanceRef clk_cpu_est_11_0_1))
(portRef I0 (instanceRef clk_cpu_est_11_0_i_1))
))
- (net N_133_i (joined
- (portRef O (instanceRef N_133_i))
- (portRef I1 (instanceRef clk_cpu_est_11_0_3))
- ))
- (net N_132_i (joined
- (portRef O (instanceRef N_132_i))
- (portRef I1 (instanceRef clk_cpu_est_11_0_1_3))
- ))
- (net N_134_i (joined
- (portRef O (instanceRef N_134_i))
+ (net N_131_i (joined
+ (portRef O (instanceRef N_131_i))
(portRef I0 (instanceRef clk_cpu_est_11_0_1_3))
))
(net (rename clk_cpu_est_11_0_3 "clk.cpu_est_11_0[3]") (joined
(portRef O (instanceRef clk_cpu_est_11_0_3))
(portRef I0 (instanceRef clk_cpu_est_11_0_i_3))
))
- (net N_125_i (joined
+ (net N_130_i (joined
+ (portRef O (instanceRef N_130_i))
+ (portRef I1 (instanceRef clk_cpu_est_11_0_3))
+ ))
+ (net N_129_i (joined
+ (portRef O (instanceRef N_129_i))
+ (portRef I1 (instanceRef clk_cpu_est_11_0_1_3))
+ ))
+ (net N_122_i (joined
(portRef O (instanceRef clk_cpu_est_11_0_o4_3))
(portRef I0 (instanceRef clk_cpu_est_11_0_a4_0_3))
(portRef I0 (instanceRef clk_cpu_est_11_0_o4_i_3))
))
- (net N_124_i (joined
+ (net N_121_i (joined
(portRef O (instanceRef clk_cpu_est_11_0_o4_1))
(portRef I0 (instanceRef clk_cpu_est_11_0_a4_1_1))
(portRef I0 (instanceRef clk_cpu_est_11_0_o4_i_1))
))
- (net N_130_i (joined
- (portRef O (instanceRef N_130_i))
- (portRef I0 (instanceRef clk_cpu_est_11_i_2))
- ))
- (net N_131_i (joined
- (portRef O (instanceRef N_131_i))
- (portRef I1 (instanceRef clk_cpu_est_11_i_2))
- ))
- (net N_121_i (joined
- (portRef O (instanceRef clk_cpu_est_11_i_2))
- (portRef I0 (instanceRef cpu_est_0_2__m))
- ))
- (net N_91_0 (joined
- (portRef O (instanceRef SM_AMIGA_ns_i_o2_0))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_i_0))
- ))
- (net N_109_i (joined
- (portRef O (instanceRef N_109_i))
+ (net N_108_i (joined
+ (portRef O (instanceRef N_108_i))
(portRef I1 (instanceRef SM_AMIGA_ns_7))
))
(net (rename SM_AMIGA_ns_0_7 "SM_AMIGA_ns_0[7]") (joined
@@ -2015,6 +2122,19 @@
(portRef O (instanceRef state_machine_un15_clk_000_d0))
(portRef I0 (instanceRef state_machine_un15_clk_000_d0_i))
))
+ (net (rename state_machine_un23_clk_000_d0_i "state_machine.un23_clk_000_d0_i") (joined
+ (portRef O (instanceRef state_machine_un23_clk_000_d0))
+ (portRef I1 (instanceRef SM_AMIGA_ns_i_o3_4))
+ (portRef I0 (instanceRef state_machine_un23_clk_000_d0_i_0))
+ ))
+ (net N_100_i (joined
+ (portRef O (instanceRef N_100_i))
+ (portRef I1 (instanceRef SM_AMIGA_ns_2))
+ ))
+ (net (rename SM_AMIGA_ns_0_2 "SM_AMIGA_ns_0[2]") (joined
+ (portRef O (instanceRef SM_AMIGA_ns_2))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_2))
+ ))
(net BG_030_c_i (joined
(portRef O (instanceRef BG_030_c_i))
(portRef I0 (instanceRef state_machine_un1_clk_030))
@@ -2024,26 +2144,6 @@
(portRef O (instanceRef state_machine_un1_clk_030))
(portRef I0 (instanceRef state_machine_un1_clk_030_i))
))
- (net (rename state_machine_un17_clk_030_0 "state_machine.un17_clk_030_0") (joined
- (portRef O (instanceRef state_machine_un17_clk_030))
- (portRef I0 (instanceRef state_machine_un17_clk_030_i))
- ))
- (net un1_as_030_3_0 (joined
- (portRef O (instanceRef un1_as_030_3))
- (portRef I0 (instanceRef un1_as_030_3_i))
- ))
- (net (rename state_machine_AS_030_000_SYNC_3_2 "state_machine.AS_030_000_SYNC_3_2") (joined
- (portRef O (instanceRef state_machine_AS_030_000_SYNC_3))
- (portRef I0 (instanceRef state_machine_AS_030_000_SYNC_3_i))
- ))
- (net N_96_i (joined
- (portRef O (instanceRef N_96_i))
- (portRef I1 (instanceRef un1_bg_030_1))
- ))
- (net un1_bg_030_0 (joined
- (portRef O (instanceRef un1_bg_030))
- (portRef I0 (instanceRef un1_bg_030_i))
- ))
(net (rename clk_un4_clk_000_d1_i "clk.un4_clk_000_d1_i") (joined
(portRef O (instanceRef clk_un4_clk_000_d1_i))
(portRef I1 (instanceRef state_machine_un6_bgack_000))
@@ -2052,68 +2152,120 @@
(portRef O (instanceRef state_machine_un6_bgack_000))
(portRef I0 (instanceRef state_machine_un6_bgack_000_i))
))
- (net N_98_i (joined
- (portRef O (instanceRef N_98_i))
- (portRef I1 (instanceRef SM_AMIGA_ns_i_0))
+ (net (rename state_machine_un17_clk_030_0 "state_machine.un17_clk_030_0") (joined
+ (portRef O (instanceRef state_machine_un17_clk_030))
+ (portRef I0 (instanceRef state_machine_un17_clk_030_i))
))
- (net N_75_i (joined
- (portRef O (instanceRef SM_AMIGA_ns_i_0))
- (portRef D (instanceRef SM_AMIGA_7))
+ (net un1_as_030_3_0 (joined
+ (portRef O (instanceRef un1_as_030_3))
+ (portRef I0 (instanceRef un1_as_030_3_i))
))
- (net N_111_i (joined
- (portRef O (instanceRef N_111_i))
- (portRef I1 (instanceRef SM_AMIGA_ns_i_1))
+ (net N_89_i (joined
+ (portRef O (instanceRef SM_AMIGA_ns_o3_1))
+ (portRef I0 (instanceRef un1_SM_AMIGA_0_sqmuxa_i_a3))
+ (portRef I0 (instanceRef SM_AMIGA_ns_o3_i_1))
))
- (net N_99_i (joined
- (portRef O (instanceRef N_99_i))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_1))
+ (net AMIGA_BUS_ENABLE_i_m_i (joined
+ (portRef O (instanceRef AMIGA_BUS_ENABLE_i_m_i))
+ (portRef I0 (instanceRef state_machine_AMIGA_BUS_ENABLE_2_iv))
))
- (net N_77_i (joined
- (portRef O (instanceRef SM_AMIGA_ns_i_1))
- (portRef D (instanceRef SM_AMIGA_6))
+ (net nEXP_SPACE_m_i (joined
+ (portRef O (instanceRef nEXP_SPACE_m_i))
+ (portRef I1 (instanceRef state_machine_AMIGA_BUS_ENABLE_2_iv))
+ ))
+ (net (rename state_machine_AMIGA_BUS_ENABLE_2_iv_i "state_machine.AMIGA_BUS_ENABLE_2_iv_i") (joined
+ (portRef O (instanceRef state_machine_AMIGA_BUS_ENABLE_2_iv))
+ (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_m))
+ ))
+ (net (rename state_machine_AS_030_000_SYNC_3_2 "state_machine.AS_030_000_SYNC_3_2") (joined
+ (portRef O (instanceRef state_machine_AS_030_000_SYNC_3))
+ (portRef I0 (instanceRef state_machine_AS_030_000_SYNC_3_i))
+ ))
+ (net N_94_i (joined
+ (portRef O (instanceRef N_94_i))
+ (portRef I1 (instanceRef un1_bg_030_1))
+ ))
+ (net un1_bg_030_0 (joined
+ (portRef O (instanceRef un1_bg_030))
+ (portRef I0 (instanceRef un1_bg_030_i))
+ ))
+ (net N_105_i (joined
+ (portRef O (instanceRef N_105_i))
+ (portRef I1 (instanceRef SM_AMIGA_ns_5))
+ ))
+ (net N_104_i (joined
+ (portRef O (instanceRef N_104_i))
+ (portRef I0 (instanceRef SM_AMIGA_ns_5))
+ ))
+ (net (rename SM_AMIGA_ns_0_5 "SM_AMIGA_ns_0[5]") (joined
+ (portRef O (instanceRef SM_AMIGA_ns_5))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_5))
+ ))
+ (net N_106_i (joined
+ (portRef O (instanceRef N_106_i))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_6))
+ ))
+ (net N_107_i (joined
+ (portRef O (instanceRef N_107_i))
+ (portRef I1 (instanceRef SM_AMIGA_ns_i_6))
+ ))
+ (net N_87_i (joined
+ (portRef O (instanceRef SM_AMIGA_ns_i_6))
+ (portRef D (instanceRef SM_AMIGA_1))
+ ))
+ (net CLK_OUT_PRE_i (joined
+ (portRef O (instanceRef CLK_OUT_PRE_i))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_o3_6))
))
(net N_92_0 (joined
- (portRef O (instanceRef SM_AMIGA_ns_i_o2_1))
- (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_i_1))
+ (portRef O (instanceRef SM_AMIGA_ns_i_o3_6))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_o3_i_6))
))
- (net (rename state_machine_un34_clk_000_d0_i "state_machine.un34_clk_000_d0_i") (joined
- (portRef O (instanceRef state_machine_un34_clk_000_d0))
- (portRef I0 (instanceRef state_machine_un34_clk_000_d0_i_0))
+ (net (rename state_machine_un44_clk_000_d1_i "state_machine.un44_clk_000_d1_i") (joined
+ (portRef O (instanceRef state_machine_un44_clk_000_d1))
+ (portRef I0 (instanceRef state_machine_un44_clk_000_d1_i_0))
))
(net (rename A_c_i_0 "A_c_i[0]") (joined
(portRef O (instanceRef A_c_i_0))
- (portRef I0 (instanceRef state_machine_UDS_000_INT_8))
- (portRef I1 (instanceRef state_machine_un34_clk_000_d0_1))
+ (portRef I0 (instanceRef state_machine_UDS_000_INT_7))
+ (portRef I1 (instanceRef state_machine_un44_clk_000_d1_1))
))
(net (rename SIZE_c_i_1 "SIZE_c_i[1]") (joined
(portRef O (instanceRef SIZE_c_i_1))
- (portRef I0 (instanceRef state_machine_un34_clk_000_d0_1))
+ (portRef I0 (instanceRef state_machine_un44_clk_000_d1_1))
))
- (net N_102_i (joined
- (portRef O (instanceRef N_102_i))
- (portRef I1 (instanceRef SM_AMIGA_ns_i_3))
+ (net N_98_i (joined
+ (portRef O (instanceRef N_98_i))
+ (portRef I0 (instanceRef SM_AMIGA_ns_1))
))
- (net N_80_i (joined
- (portRef O (instanceRef SM_AMIGA_ns_i_3))
- (portRef D (instanceRef SM_AMIGA_4))
+ (net N_99_i (joined
+ (portRef O (instanceRef N_99_i))
+ (portRef I1 (instanceRef SM_AMIGA_ns_1))
))
- (net N_144_i (joined
- (portRef O (instanceRef N_144_i))
- (portRef I0 (instanceRef state_machine_LDS_000_INT_8))
- (portRef I1 (instanceRef state_machine_UDS_000_INT_8))
+ (net (rename SM_AMIGA_ns_0_1 "SM_AMIGA_ns_0[1]") (joined
+ (portRef O (instanceRef SM_AMIGA_ns_1))
+ (portRef I0 (instanceRef SM_AMIGA_ns_i_1))
))
- (net (rename state_machine_LDS_000_INT_8_0 "state_machine.LDS_000_INT_8_0") (joined
- (portRef O (instanceRef state_machine_LDS_000_INT_8))
- (portRef I0 (instanceRef state_machine_LDS_000_INT_8_i))
+ (net N_97_i (joined
+ (portRef O (instanceRef N_97_i))
+ (portRef I1 (instanceRef SM_AMIGA_ns_i_0))
))
- (net (rename state_machine_UDS_000_INT_8_0 "state_machine.UDS_000_INT_8_0") (joined
- (portRef O (instanceRef state_machine_UDS_000_INT_8))
- (portRef I0 (instanceRef state_machine_UDS_000_INT_8_i))
+ (net N_78_i (joined
+ (portRef O (instanceRef SM_AMIGA_ns_i_0))
+ (portRef D (instanceRef SM_AMIGA_7))
))
- (net (rename state_machine_un60_clk_000_d0_i "state_machine.un60_clk_000_d0_i") (joined
- (portRef O (instanceRef state_machine_un60_clk_000_d0))
- (portRef I1 (instanceRef SM_AMIGA_ns_i_o2_4))
- (portRef I0 (instanceRef state_machine_un60_clk_000_d0_i_0))
+ (net N_147_i (joined
+ (portRef O (instanceRef N_147_i))
+ (portRef I0 (instanceRef state_machine_LDS_000_INT_7))
+ (portRef I1 (instanceRef state_machine_UDS_000_INT_7))
+ ))
+ (net (rename state_machine_LDS_000_INT_7_0 "state_machine.LDS_000_INT_7_0") (joined
+ (portRef O (instanceRef state_machine_LDS_000_INT_7))
+ (portRef I0 (instanceRef state_machine_LDS_000_INT_7_i))
+ ))
+ (net (rename state_machine_UDS_000_INT_7_0 "state_machine.UDS_000_INT_7_0") (joined
+ (portRef O (instanceRef state_machine_UDS_000_INT_7))
+ (portRef I0 (instanceRef state_machine_UDS_000_INT_7_i))
))
(net un1_bg_030_0_1 (joined
(portRef O (instanceRef un1_bg_030_1))
@@ -2127,10 +2279,6 @@
(portRef O (instanceRef state_machine_AS_030_000_SYNC_3_1))
(portRef I0 (instanceRef state_machine_AS_030_000_SYNC_3))
))
- (net (rename clk_cpu_est_11_0_1_3 "clk.cpu_est_11_0_1[3]") (joined
- (portRef O (instanceRef clk_cpu_est_11_0_1_3))
- (portRef I0 (instanceRef clk_cpu_est_11_0_3))
- ))
(net (rename clk_cpu_est_11_0_1_1 "clk.cpu_est_11_0_1[1]") (joined
(portRef O (instanceRef clk_cpu_est_11_0_1_1))
(portRef I0 (instanceRef clk_cpu_est_11_0_1))
@@ -2187,13 +2335,9 @@
(portRef O (instanceRef UDS_000_INT_0_sqmuxa_1_0))
(portRef I0 (instanceRef UDS_000_INT_0_sqmuxa))
))
- (net UDS_000_INT_0_sqmuxa_2 (joined
- (portRef O (instanceRef UDS_000_INT_0_sqmuxa_2))
- (portRef I1 (instanceRef UDS_000_INT_0_sqmuxa))
- ))
- (net (rename state_machine_un34_clk_000_d0_i_1 "state_machine.un34_clk_000_d0_i_1") (joined
- (portRef O (instanceRef state_machine_un34_clk_000_d0_1))
- (portRef I0 (instanceRef state_machine_un34_clk_000_d0))
+ (net (rename state_machine_un44_clk_000_d1_i_1 "state_machine.un44_clk_000_d1_i_1") (joined
+ (portRef O (instanceRef state_machine_un44_clk_000_d1_1))
+ (portRef I0 (instanceRef state_machine_un44_clk_000_d1))
))
(net (rename state_machine_un42_clk_030_1 "state_machine.un42_clk_030_1") (joined
(portRef O (instanceRef state_machine_un42_clk_030_1))
@@ -2215,17 +2359,57 @@
(portRef O (instanceRef state_machine_un42_clk_030_5))
(portRef I1 (instanceRef state_machine_un42_clk_030))
))
+ (net N_96_1 (joined
+ (portRef O (instanceRef un1_DSACK_INT_0_sqmuxa_i_a3_1))
+ (portRef I0 (instanceRef un1_DSACK_INT_0_sqmuxa_i_a3))
+ ))
+ (net AMIGA_BUS_ENABLE_i_m_1 (joined
+ (portRef O (instanceRef AMIGA_BUS_ENABLE_i_m_1))
+ (portRef I0 (instanceRef AMIGA_BUS_ENABLE_i_m))
+ ))
+ (net N_131_1 (joined
+ (portRef O (instanceRef clk_cpu_est_11_0_a4_1_1_3))
+ (portRef I0 (instanceRef clk_cpu_est_11_0_a4_1_3))
+ ))
+ (net (rename clk_cpu_est_11_0_1_3 "clk.cpu_est_11_0_1[3]") (joined
+ (portRef O (instanceRef clk_cpu_est_11_0_1_3))
+ (portRef I0 (instanceRef clk_cpu_est_11_0_3))
+ ))
+ (net N_105_1 (joined
+ (portRef O (instanceRef SM_AMIGA_ns_a3_0_1_5))
+ (portRef I0 (instanceRef SM_AMIGA_ns_a3_0_5))
+ ))
+ (net VPA_SYNC_1_sqmuxa_1_0 (joined
+ (portRef O (instanceRef VPA_SYNC_1_sqmuxa_1_0))
+ (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_5))
+ ))
+ (net VPA_SYNC_1_sqmuxa_2 (joined
+ (portRef O (instanceRef VPA_SYNC_1_sqmuxa_2))
+ (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_5))
+ ))
+ (net VPA_SYNC_1_sqmuxa_3 (joined
+ (portRef O (instanceRef VPA_SYNC_1_sqmuxa_3))
+ (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_6))
+ ))
+ (net VPA_SYNC_1_sqmuxa_4 (joined
+ (portRef O (instanceRef VPA_SYNC_1_sqmuxa_4))
+ (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_6))
+ ))
+ (net VPA_SYNC_1_sqmuxa_5 (joined
+ (portRef O (instanceRef VPA_SYNC_1_sqmuxa_5))
+ (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa))
+ ))
+ (net VPA_SYNC_1_sqmuxa_6 (joined
+ (portRef O (instanceRef VPA_SYNC_1_sqmuxa_6))
+ (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa))
+ ))
(net DTACK_SYNC_1_sqmuxa_1_0 (joined
(portRef O (instanceRef DTACK_SYNC_1_sqmuxa_1_0))
(portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa))
))
- (net N_130_1 (joined
- (portRef O (instanceRef clk_cpu_est_11_i_a4_1_2))
- (portRef I0 (instanceRef clk_cpu_est_11_i_a4_2))
- ))
- (net N_131_1 (joined
- (portRef O (instanceRef clk_cpu_est_11_i_a4_0_1_2))
- (portRef I0 (instanceRef clk_cpu_est_11_i_a4_0_2))
+ (net DTACK_SYNC_1_sqmuxa_2 (joined
+ (portRef O (instanceRef DTACK_SYNC_1_sqmuxa_2))
+ (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa))
))
(net (rename state_machine_un8_clk_000_d0_1 "state_machine.un8_clk_000_d0_1") (joined
(portRef O (instanceRef state_machine_un8_clk_000_d0_1))
@@ -2251,37 +2435,61 @@
(portRef O (instanceRef state_machine_un13_clk_000_d0_2_0))
(portRef I1 (instanceRef state_machine_un13_clk_000_d0))
))
- (net VPA_SYNC_1_sqmuxa_1_1 (joined
- (portRef O (instanceRef VPA_SYNC_1_sqmuxa_1_1))
- (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_4))
+ (net N_127_1 (joined
+ (portRef O (instanceRef clk_cpu_est_11_i_a4_1_2))
+ (portRef I0 (instanceRef clk_cpu_est_11_i_a4_2))
))
- (net VPA_SYNC_1_sqmuxa_2 (joined
- (portRef O (instanceRef VPA_SYNC_1_sqmuxa_2))
- (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_4))
+ (net N_128_1 (joined
+ (portRef O (instanceRef clk_cpu_est_11_i_a4_0_1_2))
+ (portRef I0 (instanceRef clk_cpu_est_11_i_a4_0_2))
))
- (net VPA_SYNC_1_sqmuxa_3 (joined
- (portRef O (instanceRef VPA_SYNC_1_sqmuxa_3_0))
- (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa))
+ (net (rename IPL_030_0_2__un3 "IPL_030_0_2_.un3") (joined
+ (portRef O (instanceRef IPL_030_0_2__r))
+ (portRef I1 (instanceRef IPL_030_0_2__n))
))
- (net VPA_SYNC_1_sqmuxa_4 (joined
- (portRef O (instanceRef VPA_SYNC_1_sqmuxa_4))
- (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa))
+ (net (rename IPL_030_0_2__un1 "IPL_030_0_2_.un1") (joined
+ (portRef O (instanceRef IPL_030_0_2__m))
+ (portRef I0 (instanceRef IPL_030_0_2__p))
))
- (net N_106_1 (joined
- (portRef O (instanceRef SM_AMIGA_ns_a2_0_1_5))
- (portRef I0 (instanceRef SM_AMIGA_ns_a2_0_5))
+ (net (rename IPL_030_0_2__un0 "IPL_030_0_2_.un0") (joined
+ (portRef O (instanceRef IPL_030_0_2__n))
+ (portRef I1 (instanceRef IPL_030_0_2__p))
))
- (net (rename cpu_est_0_3__un3 "cpu_est_0_3_.un3") (joined
- (portRef O (instanceRef cpu_est_0_3__r))
- (portRef I1 (instanceRef cpu_est_0_3__n))
+ (net (rename IPL_030_0_1__un3 "IPL_030_0_1_.un3") (joined
+ (portRef O (instanceRef IPL_030_0_1__r))
+ (portRef I1 (instanceRef IPL_030_0_1__n))
))
- (net (rename cpu_est_0_3__un1 "cpu_est_0_3_.un1") (joined
- (portRef O (instanceRef cpu_est_0_3__m))
- (portRef I0 (instanceRef cpu_est_0_3__p))
+ (net (rename IPL_030_0_1__un1 "IPL_030_0_1_.un1") (joined
+ (portRef O (instanceRef IPL_030_0_1__m))
+ (portRef I0 (instanceRef IPL_030_0_1__p))
))
- (net (rename cpu_est_0_3__un0 "cpu_est_0_3_.un0") (joined
- (portRef O (instanceRef cpu_est_0_3__n))
- (portRef I1 (instanceRef cpu_est_0_3__p))
+ (net (rename IPL_030_0_1__un0 "IPL_030_0_1_.un0") (joined
+ (portRef O (instanceRef IPL_030_0_1__n))
+ (portRef I1 (instanceRef IPL_030_0_1__p))
+ ))
+ (net (rename IPL_030_0_0__un3 "IPL_030_0_0_.un3") (joined
+ (portRef O (instanceRef IPL_030_0_0__r))
+ (portRef I1 (instanceRef IPL_030_0_0__n))
+ ))
+ (net (rename IPL_030_0_0__un1 "IPL_030_0_0_.un1") (joined
+ (portRef O (instanceRef IPL_030_0_0__m))
+ (portRef I0 (instanceRef IPL_030_0_0__p))
+ ))
+ (net (rename IPL_030_0_0__un0 "IPL_030_0_0_.un0") (joined
+ (portRef O (instanceRef IPL_030_0_0__n))
+ (portRef I1 (instanceRef IPL_030_0_0__p))
+ ))
+ (net (rename cpu_est_0_2__un3 "cpu_est_0_2_.un3") (joined
+ (portRef O (instanceRef cpu_est_0_2__r))
+ (portRef I1 (instanceRef cpu_est_0_2__n))
+ ))
+ (net (rename cpu_est_0_2__un1 "cpu_est_0_2_.un1") (joined
+ (portRef O (instanceRef cpu_est_0_2__m))
+ (portRef I0 (instanceRef cpu_est_0_2__p))
+ ))
+ (net (rename cpu_est_0_2__un0 "cpu_est_0_2_.un0") (joined
+ (portRef O (instanceRef cpu_est_0_2__n))
+ (portRef I1 (instanceRef cpu_est_0_2__p))
))
(net (rename cpu_est_0_1__un3 "cpu_est_0_1_.un3") (joined
(portRef O (instanceRef cpu_est_0_1__r))
@@ -2295,17 +2503,53 @@
(portRef O (instanceRef cpu_est_0_1__n))
(portRef I1 (instanceRef cpu_est_0_1__p))
))
- (net (rename AS_000_INT_0_un3 "AS_000_INT_0.un3") (joined
- (portRef O (instanceRef AS_000_INT_0_r))
- (portRef I1 (instanceRef AS_000_INT_0_n))
+ (net (rename VPA_SYNC_0_un3 "VPA_SYNC_0.un3") (joined
+ (portRef O (instanceRef VPA_SYNC_0_r))
+ (portRef I1 (instanceRef VPA_SYNC_0_n))
))
- (net (rename AS_000_INT_0_un1 "AS_000_INT_0.un1") (joined
- (portRef O (instanceRef AS_000_INT_0_m))
- (portRef I0 (instanceRef AS_000_INT_0_p))
+ (net (rename VPA_SYNC_0_un1 "VPA_SYNC_0.un1") (joined
+ (portRef O (instanceRef VPA_SYNC_0_m))
+ (portRef I0 (instanceRef VPA_SYNC_0_p))
))
- (net (rename AS_000_INT_0_un0 "AS_000_INT_0.un0") (joined
- (portRef O (instanceRef AS_000_INT_0_n))
- (portRef I1 (instanceRef AS_000_INT_0_p))
+ (net (rename VPA_SYNC_0_un0 "VPA_SYNC_0.un0") (joined
+ (portRef O (instanceRef VPA_SYNC_0_n))
+ (portRef I1 (instanceRef VPA_SYNC_0_p))
+ ))
+ (net (rename VMA_INT_0_un3 "VMA_INT_0.un3") (joined
+ (portRef O (instanceRef VMA_INT_0_r))
+ (portRef I1 (instanceRef VMA_INT_0_n))
+ ))
+ (net (rename VMA_INT_0_un1 "VMA_INT_0.un1") (joined
+ (portRef O (instanceRef VMA_INT_0_m))
+ (portRef I0 (instanceRef VMA_INT_0_p))
+ ))
+ (net (rename VMA_INT_0_un0 "VMA_INT_0.un0") (joined
+ (portRef O (instanceRef VMA_INT_0_n))
+ (portRef I1 (instanceRef VMA_INT_0_p))
+ ))
+ (net (rename cpu_est_0_3__un3 "cpu_est_0_3_.un3") (joined
+ (portRef O (instanceRef cpu_est_0_3__r))
+ (portRef I1 (instanceRef cpu_est_0_3__n))
+ ))
+ (net (rename cpu_est_0_3__un1 "cpu_est_0_3_.un1") (joined
+ (portRef O (instanceRef cpu_est_0_3__m))
+ (portRef I0 (instanceRef cpu_est_0_3__p))
+ ))
+ (net (rename cpu_est_0_3__un0 "cpu_est_0_3_.un0") (joined
+ (portRef O (instanceRef cpu_est_0_3__n))
+ (portRef I1 (instanceRef cpu_est_0_3__p))
+ ))
+ (net (rename BGACK_030_INT_0_un3 "BGACK_030_INT_0.un3") (joined
+ (portRef O (instanceRef BGACK_030_INT_0_r))
+ (portRef I1 (instanceRef BGACK_030_INT_0_n))
+ ))
+ (net (rename BGACK_030_INT_0_un1 "BGACK_030_INT_0.un1") (joined
+ (portRef O (instanceRef BGACK_030_INT_0_m))
+ (portRef I0 (instanceRef BGACK_030_INT_0_p))
+ ))
+ (net (rename BGACK_030_INT_0_un0 "BGACK_030_INT_0.un0") (joined
+ (portRef O (instanceRef BGACK_030_INT_0_n))
+ (portRef I1 (instanceRef BGACK_030_INT_0_p))
))
(net (rename BG_000_0_un3 "BG_000_0.un3") (joined
(portRef O (instanceRef BG_000_0_r))
@@ -2319,6 +2563,18 @@
(portRef O (instanceRef BG_000_0_n))
(portRef I1 (instanceRef BG_000_0_p))
))
+ (net (rename AMIGA_BUS_ENABLE_0_un3 "AMIGA_BUS_ENABLE_0.un3") (joined
+ (portRef O (instanceRef AMIGA_BUS_ENABLE_0_r))
+ (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_n))
+ ))
+ (net (rename AMIGA_BUS_ENABLE_0_un1 "AMIGA_BUS_ENABLE_0.un1") (joined
+ (portRef O (instanceRef AMIGA_BUS_ENABLE_0_m))
+ (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_p))
+ ))
+ (net (rename AMIGA_BUS_ENABLE_0_un0 "AMIGA_BUS_ENABLE_0.un0") (joined
+ (portRef O (instanceRef AMIGA_BUS_ENABLE_0_n))
+ (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_p))
+ ))
(net (rename AS_030_000_SYNC_0_un3 "AS_030_000_SYNC_0.un3") (joined
(portRef O (instanceRef AS_030_000_SYNC_0_r))
(portRef I1 (instanceRef AS_030_000_SYNC_0_n))
@@ -2343,6 +2599,30 @@
(portRef O (instanceRef FPU_CS_INT_0_n))
(portRef I1 (instanceRef FPU_CS_INT_0_p))
))
+ (net (rename AS_000_INT_0_un3 "AS_000_INT_0.un3") (joined
+ (portRef O (instanceRef AS_000_INT_0_r))
+ (portRef I1 (instanceRef AS_000_INT_0_n))
+ ))
+ (net (rename AS_000_INT_0_un1 "AS_000_INT_0.un1") (joined
+ (portRef O (instanceRef AS_000_INT_0_m))
+ (portRef I0 (instanceRef AS_000_INT_0_p))
+ ))
+ (net (rename AS_000_INT_0_un0 "AS_000_INT_0.un0") (joined
+ (portRef O (instanceRef AS_000_INT_0_n))
+ (portRef I1 (instanceRef AS_000_INT_0_p))
+ ))
+ (net (rename DSACK_INT_0_1__un3 "DSACK_INT_0_1_.un3") (joined
+ (portRef O (instanceRef DSACK_INT_0_1__r))
+ (portRef I1 (instanceRef DSACK_INT_0_1__n))
+ ))
+ (net (rename DSACK_INT_0_1__un1 "DSACK_INT_0_1_.un1") (joined
+ (portRef O (instanceRef DSACK_INT_0_1__m))
+ (portRef I0 (instanceRef DSACK_INT_0_1__p))
+ ))
+ (net (rename DSACK_INT_0_1__un0 "DSACK_INT_0_1_.un0") (joined
+ (portRef O (instanceRef DSACK_INT_0_1__n))
+ (portRef I1 (instanceRef DSACK_INT_0_1__p))
+ ))
(net (rename DTACK_SYNC_0_un3 "DTACK_SYNC_0.un3") (joined
(portRef O (instanceRef DTACK_SYNC_0_r))
(portRef I1 (instanceRef DTACK_SYNC_0_n))
@@ -2355,78 +2635,6 @@
(portRef O (instanceRef DTACK_SYNC_0_n))
(portRef I1 (instanceRef DTACK_SYNC_0_p))
))
- (net (rename VMA_INT_0_un3 "VMA_INT_0.un3") (joined
- (portRef O (instanceRef VMA_INT_0_r))
- (portRef I1 (instanceRef VMA_INT_0_n))
- ))
- (net (rename VMA_INT_0_un1 "VMA_INT_0.un1") (joined
- (portRef O (instanceRef VMA_INT_0_m))
- (portRef I0 (instanceRef VMA_INT_0_p))
- ))
- (net (rename VMA_INT_0_un0 "VMA_INT_0.un0") (joined
- (portRef O (instanceRef VMA_INT_0_n))
- (portRef I1 (instanceRef VMA_INT_0_p))
- ))
- (net (rename cpu_est_0_2__un3 "cpu_est_0_2_.un3") (joined
- (portRef O (instanceRef cpu_est_0_2__r))
- (portRef I1 (instanceRef cpu_est_0_2__n))
- ))
- (net (rename cpu_est_0_2__un1 "cpu_est_0_2_.un1") (joined
- (portRef O (instanceRef cpu_est_0_2__m))
- (portRef I0 (instanceRef cpu_est_0_2__p))
- ))
- (net (rename cpu_est_0_2__un0 "cpu_est_0_2_.un0") (joined
- (portRef O (instanceRef cpu_est_0_2__n))
- (portRef I1 (instanceRef cpu_est_0_2__p))
- ))
- (net (rename IPL_030_0_0__un3 "IPL_030_0_0_.un3") (joined
- (portRef O (instanceRef IPL_030_0_0__r))
- (portRef I1 (instanceRef IPL_030_0_0__n))
- ))
- (net (rename IPL_030_0_0__un1 "IPL_030_0_0_.un1") (joined
- (portRef O (instanceRef IPL_030_0_0__m))
- (portRef I0 (instanceRef IPL_030_0_0__p))
- ))
- (net (rename IPL_030_0_0__un0 "IPL_030_0_0_.un0") (joined
- (portRef O (instanceRef IPL_030_0_0__n))
- (portRef I1 (instanceRef IPL_030_0_0__p))
- ))
- (net (rename IPL_030_0_1__un3 "IPL_030_0_1_.un3") (joined
- (portRef O (instanceRef IPL_030_0_1__r))
- (portRef I1 (instanceRef IPL_030_0_1__n))
- ))
- (net (rename IPL_030_0_1__un1 "IPL_030_0_1_.un1") (joined
- (portRef O (instanceRef IPL_030_0_1__m))
- (portRef I0 (instanceRef IPL_030_0_1__p))
- ))
- (net (rename IPL_030_0_1__un0 "IPL_030_0_1_.un0") (joined
- (portRef O (instanceRef IPL_030_0_1__n))
- (portRef I1 (instanceRef IPL_030_0_1__p))
- ))
- (net (rename IPL_030_0_2__un3 "IPL_030_0_2_.un3") (joined
- (portRef O (instanceRef IPL_030_0_2__r))
- (portRef I1 (instanceRef IPL_030_0_2__n))
- ))
- (net (rename IPL_030_0_2__un1 "IPL_030_0_2_.un1") (joined
- (portRef O (instanceRef IPL_030_0_2__m))
- (portRef I0 (instanceRef IPL_030_0_2__p))
- ))
- (net (rename IPL_030_0_2__un0 "IPL_030_0_2_.un0") (joined
- (portRef O (instanceRef IPL_030_0_2__n))
- (portRef I1 (instanceRef IPL_030_0_2__p))
- ))
- (net (rename BGACK_030_INT_0_un3 "BGACK_030_INT_0.un3") (joined
- (portRef O (instanceRef BGACK_030_INT_0_r))
- (portRef I1 (instanceRef BGACK_030_INT_0_n))
- ))
- (net (rename BGACK_030_INT_0_un1 "BGACK_030_INT_0.un1") (joined
- (portRef O (instanceRef BGACK_030_INT_0_m))
- (portRef I0 (instanceRef BGACK_030_INT_0_p))
- ))
- (net (rename BGACK_030_INT_0_un0 "BGACK_030_INT_0.un0") (joined
- (portRef O (instanceRef BGACK_030_INT_0_n))
- (portRef I1 (instanceRef BGACK_030_INT_0_p))
- ))
(net (rename UDS_000_INT_0_un3 "UDS_000_INT_0.un3") (joined
(portRef O (instanceRef UDS_000_INT_0_r))
(portRef I1 (instanceRef UDS_000_INT_0_n))
@@ -2451,30 +2659,6 @@
(portRef O (instanceRef LDS_000_INT_0_n))
(portRef I1 (instanceRef LDS_000_INT_0_p))
))
- (net (rename VPA_SYNC_0_un3 "VPA_SYNC_0.un3") (joined
- (portRef O (instanceRef VPA_SYNC_0_r))
- (portRef I1 (instanceRef VPA_SYNC_0_n))
- ))
- (net (rename VPA_SYNC_0_un1 "VPA_SYNC_0.un1") (joined
- (portRef O (instanceRef VPA_SYNC_0_m))
- (portRef I0 (instanceRef VPA_SYNC_0_p))
- ))
- (net (rename VPA_SYNC_0_un0 "VPA_SYNC_0.un0") (joined
- (portRef O (instanceRef VPA_SYNC_0_n))
- (portRef I1 (instanceRef VPA_SYNC_0_p))
- ))
- (net (rename DSACK_INT_0_1__un3 "DSACK_INT_0_1_.un3") (joined
- (portRef O (instanceRef DSACK_INT_0_1__r))
- (portRef I1 (instanceRef DSACK_INT_0_1__n))
- ))
- (net (rename DSACK_INT_0_1__un1 "DSACK_INT_0_1_.un1") (joined
- (portRef O (instanceRef DSACK_INT_0_1__m))
- (portRef I0 (instanceRef DSACK_INT_0_1__p))
- ))
- (net (rename DSACK_INT_0_1__un0 "DSACK_INT_0_1_.un0") (joined
- (portRef O (instanceRef DSACK_INT_0_1__n))
- (portRef I1 (instanceRef DSACK_INT_0_1__p))
- ))
)
(property orig_inst_of (string "BUS68030"))
)
diff --git a/Logic/BUS68030.fse b/Logic/BUS68030.fse
index 3bf3322..272dfbe 100644
--- a/Logic/BUS68030.fse
+++ b/Logic/BUS68030.fse
@@ -1,20 +1,20 @@
-fsm_encoding {717621761} onehot
+fsm_encoding {718321831} onehot
-fsm_state_encoding {717621761} idle_p {00000001}
+fsm_state_encoding {718321831} idle_p {00000001}
-fsm_state_encoding {717621761} idle_n {00000010}
+fsm_state_encoding {718321831} idle_n {00000010}
-fsm_state_encoding {717621761} as_set_p {00000100}
+fsm_state_encoding {718321831} as_set_p {00000100}
-fsm_state_encoding {717621761} as_set_n {00001000}
+fsm_state_encoding {718321831} as_set_n {00001000}
-fsm_state_encoding {717621761} sample_dtack_p {00010000}
+fsm_state_encoding {718321831} sample_dtack_p {00010000}
-fsm_state_encoding {717621761} data_fetch_n {00100000}
+fsm_state_encoding {718321831} data_fetch_n {00100000}
-fsm_state_encoding {717621761} data_fetch_p {01000000}
+fsm_state_encoding {718321831} data_fetch_p {01000000}
-fsm_state_encoding {717621761} end_cycle_n {10000000}
+fsm_state_encoding {718321831} end_cycle_n {10000000}
-fsm_registers {717621761} {SM_AMIGA[0]} {SM_AMIGA[1]} {SM_AMIGA[2]} {SM_AMIGA[3]} {SM_AMIGA[4]} {SM_AMIGA[5]} {SM_AMIGA[6]} {SM_AMIGA[7]}
+fsm_registers {718321831} {SM_AMIGA[0]} {SM_AMIGA[1]} {SM_AMIGA[2]} {SM_AMIGA[3]} {SM_AMIGA[4]} {SM_AMIGA[5]} {SM_AMIGA[6]} {SM_AMIGA[7]}
diff --git a/Logic/BUS68030.prj b/Logic/BUS68030.prj
index b55d46f..0d4b762 100644
--- a/Logic/BUS68030.prj
+++ b/Logic/BUS68030.prj
@@ -1,6 +1,6 @@
#-- Lattice Semiconductor Corporation Ltd.
#-- Synplify OEM project file c:/users/matze/documents/github/68030tk/logic\BUS68030.prj
-#-- Written on Fri May 16 17:07:02 2014
+#-- Written on Sun May 18 21:01:40 2014
#device options
diff --git a/Logic/BUS68030.srm b/Logic/BUS68030.srm
index c7b5230..247c835 100644
--- a/Logic/BUS68030.srm
+++ b/Logic/BUS68030.srm
@@ -34,8 +34,8 @@ af .child_list "-1";
af .parent_list "-1";
VNAME 'mach.MACH_DFF.prim'; # view id 0
VNAME 'mach.DFFRH.prim'; # view id 1
-VNAME 'mach.DFFSH.prim'; # view id 2
-VNAME 'mach.DFF.prim'; # view id 3
+VNAME 'mach.DFF.prim'; # view id 2
+VNAME 'mach.DFFSH.prim'; # view id 3
VNAME 'mach.IBUF.prim'; # view id 4
VNAME 'mach.BUFTH.prim'; # view id 5
VNAME 'mach.OBUF.prim'; # view id 6
@@ -44,7 +44,9 @@ VNAME 'mach.AND2.prim'; # view id 8
VNAME 'mach.INV.prim'; # view id 9
VNAME 'mach.OR2.prim'; # view id 10
VNAME 'mach.XOR2.prim'; # view id 11
-VNAME 'work.BUS68030.behavioral'; # view id 12
+VNAME 'mach.MACH_LATCH.prim'; # view id 12
+VNAME 'mach.DLATRH.prim'; # view id 13
+VNAME 'work.BUS68030.behavioral'; # view id 14
@ERMRlENORBvq]w_7wsRbH
l;N3ORCV8HMCF8V;R4
RNP3#8H#PFDCRlC4N;
@@ -85,40 +87,40 @@ SmwaQQ= )t;h7
fbRjR:jHRMPkRM4kRM4)b;
R:fjjsR0k0CRsRkCe;BB
fbRjR:jV#NDCNRVDR#Ct;h7
-RMRlENORw7w1b]Rs;Hl
-RNP3bH#sRHl4F;
-RkTRM
-j;H;R7
-BHRp
-i;H;R1
-RoMk;Mj
-RNM3P#NCC_M0D_VN4o#Rn.6;M
-oR4kM;M
+RMRlENORw7wRHbslN;
+PHR3#Hbsl;R4
+TFRRjkM;R
+H7H;
+RiBp;M
+oRjkM;M
NRN3#PMC_CV0_D#No46R.ns;
-R:fjjNRlOvERq_B]7RwwblsHR1Qh6T
+R:fjjNRlOvERq_B]7RwwblsHR1QhcT
S=jkM
=S77B
SpBi=pSi
)B=eB1
-S=4kM
+S=BeB
mShaQQw t)=h
-7;bjRf:HjRMkPRMk4RM14R;R
-bfjj:Rk0sCsR0keCRB
-B;bjRf:VjRNCD#RDVN#tCRh
-7;MlRRNROE7RwwblsH;P
+7;bjRf:0jRsRkC0CskRBeB;R
+bfjj:RDVN#VCRNCD#R7th;R
+MROlNEwR7wR1]blsH;P
NR#3HblsHR
4;FRRTk;Mj
7HR;R
HB;pi
-RoMk;Mj
-RNM3P#NCC_M0D_VN4o#Rn.6;R
-sfjj:ROlNEqRvB7]_wbwRsRHlQch1
-=STk
-MjS77=
-pSBip=Bi)
-S=BeB
-=S1e
-BBSahmQ wQ)h=t7b;
+1HR;M
+oRjkM;M
+NRN3#PMC_CV0_D#No46R.no;
+MMRk4N;
+M#R3N_PCM_C0VoDN#.4R6
+n;sjRf:ljRNROEv]qB_w7wRHbslhRQ1S6
+TM=kj7
+S=S7
+B=piB
+piSe)=BSB
+1M=k4h
+SmwaQQ= )t;h7
+fbRjR:jHRMPkRM4kRM41b;
R:fjjsR0k0CRsRkCe;BB
fbRjR:jV#NDCNRVDR#Ct;h7
RMRlENORzQAwsRbH
@@ -191,126 +193,169 @@ QHRjH;
R;Q4
fbRjR:j0CskRk0sCBReBb;
R:fjjNRVDR#CV#NDChRt7b;
-R:fjjFRGsmPRRQmRj4RQ;
-@
-ftell;
-@E@MR@nU::n(::R4cRsIF zRA1jnUdLjRCPENHNFsDN;
-PDR3HMMCFdR6;P
-NR#3HPDE8R
-4;N3PRHP#_ER8D4N;
-PNR3sVOEHRDC(N;
-PlR3FD8kCDVHC;R(
-RNP3M#$_NVlbIR"FRs \:"B\#\kC\s#\0lNx\C\8kFOl0CM#o\\Hk0ELn\\Ujjd0\ \DHFoOn\\Ujjd-jnUjLj-kP#3E"8\\;M"
-RNP3MOF#M0N0C_so7R"1iqB_aQhrRj94B\MpBi_h4ar9"Rj;P
-NRHFsoM_H#F0_VAR"zU1nj"dj;P
-NRs3FHNohl"CRAnz1Ujjd"N;
-PVR3D_FI#00NC
-R{N3PRVIDF_sbNC_M0H_b#NH##o8MCR
-4;N3PRVIDF_FbsbN#_bHbDC48R;P
-NRD3VFDI_F#Fb_FLs RCMjN;
-PVR3D_FIkJMHkHHVC48R;;
-}
-RNP3LO8_P#NC
-R{N#PR$sM_CsVCCCMO_FODO{ R
-RNP10$#C{lR
-RNP3M#$_VsCOODF $_0bgCR;;
-}
+R:fjjFRGsmPRRQmRj4RQ;R
+MROlNEqRvBp]_q]aBRHbslN;
+OCR38MHVFV8CR
+4;N3PR8#H#FCDPl4CR;P
+NR#3HblsHR
+4;F;RT
+7HR;R
+Hp;qa
+RNH#_$MHD#OFRO 4H;
+R
+);H;R1
+hHRmwaQQ; )
+RoMk;Mj
+RNM3P#NCC_M0D_VN4o#Rn.6;M
+oR4kM;M
+NRN3#PMC_CV0_D#No46R.nb;
+R:fjjMRHPMRkjMRkj;R1
+fbRjR:jHRMPkRM4kRM4)b;
+R:fjjsR0k0CRsRkCe;BB
+fbRjR:jV#NDCNRVDR#Ct;h7
+fbRjR:jDsN0#RRTTRR7pRqakRM4k;Mj
+RMRlENORq7paR)]blsH;P
+NR#3HblsHR
+4;FRRTk;Mj
+7HR;R
+Hp;qa
+)HR;M
+oRjkM;M
+NRN3#PMC_CV0_D#No46R.no;
+MMRk4N;
+M#R3N_PCM_C0VoDN#.4R6
+n;sjRf:ljRNROEv]qB_apqBb]RsRHlQ6h1
+=STk
+MjS77=
+qSpaq=pa)
+S=4kM
+=S1e
+BBSahmQ wQ)h=t7b;
+R:fjjMRHPMRk4MRk4;R)
+fbRjR:j0CskRk0sCBReBb;
+R:fjjNRVDR#CV#NDChRt7@;
+
-};}N;
-PFR3Lb#F0M8FC;R4
-@HR@gU::g4::qn:1d_jj1Rq_jjd;H
+
+
+ftell;
+@E@MR@4U:d::(44d:cIRRFRs Anz1UjjdRELCNFPHs;ND
+RNP3MDHCRMF6
+d;N3PRHE#P84DR;P
+NR#3H_8PED;R4
+RNP3ONsEDVHC;R(
+RNP38lFkVDCHRDC(N;
+P#R3$VM_lRNb"sIF "R\B\:\ks#C#l\\NC0x\F\8OCklM\0#\0oHE\kL\jnUd j0\F\Do\HO\jnUdnj-Ujjj-#Lk38PE\M"\"N;
+POR3F0M#N_M0sRCo"iBp_w) rRj9j7\M1iqB_aQhrRj94
+";NFPRs_HoH0M#_RFV"1AzndUjj
+";N3PRFosHhCNlRz"A1jnUd;j"
+RNP3FVDI0_#NR0C{P
+NRD3VFbI_NMsC0b_H##_N#MHoC48R;P
+NRD3VFbI_s#Fb_bNbD8HCR
+4;N3PRVIDF_FDFbL#_sCF M;Rj
+RNP3FVDIM_kHHJkV8HCR
+4;}N;
+POR38#L_NRPC{P
+NRM#$_VsCCMsCOOC_D FORN{
+P$R1#l0CRN{
+P#R3$sM_CDVOF_O 0C$bR
+g;}};
+;;
+}
+RNP3#FLF8b0FRMC4H;
+RU@@::4n4n:4:qn:1d_jj1Rq_jjd;H
NR03sDs_FHNoMl"CRqj1_d;j"
RNH3HFsos8HRM'HF'k0;R
-F@:@U44j:::4jn1:q_jjjR_q1j;jj
+F@:@U44(:::4(n1:q_jjjR_q1j;jj
RNH3Ds0_HFsolMNCqR"1j_jj
";N3HR#FDbs8HoH"sRHkMF0
";N3HRb0FsNHD8sFR"k;0"
-@HR@4U:4::44n4::_71jRdj7j1_d
+@HR@4U:U::44nU::_71jRdj7j1_d
j;N3HRs_0DFosHMCNlR1"7_jjd"N;
HFR3s8HoH'sRHkMF0
-';F@R@U.:4:44:.::(z_71jRjjz_71j;jj
+';F@R@Ug:4:44:g::(z_71jRjjz_71j;jj
RNH3Ds0_HFsolMNCzR"7j1_j;j"
RNH3b#DFosH8RHs"FHMk;0"
RNH3sbF08NDH"sRF"k0;R
-F@:@U44d:::4d(7:p1j_jj7Rp1j_jjN;
+F@:@U.4j:::.j(7:p1j_jj7Rp1j_jjN;
HsR30FD_sMHoNRlC"1p7_jjj"N;
H#R3DsbFHHo8sHR"M0Fk"N;
HbR3FNs0Ds8HRk"F0
-";H@R@Uc:4:44:c::c1 QZrj4:9QR1Z4 r:Rj91 QZrj4:9N;
+";H@R@U4:.:.4:4::c1 QZrj4:9QR1Z4 r:Rj91 QZrj4:9N;
HsR30FD_sMHoNRlC"Z1Q
";N3HRFosH8RHs'FHMk;0'
RNH3HC8VsNsNN$Ml'CR#CHx'H;
-RU@@::4646:4:q4:r:d4jq9Rr:d4jq9Rr:d4j
+RU@@::..4.:.:q4:r:d4jq9Rr:d4jq9Rr:d4j
9;N3HRs_0DFosHMCNlR""q;H
NRs3FHHo8sHR'M0Fk'N;
HCR38NHVs$sNMCNlR''N;R
-H@:@U44n:::4n4Mj: _Xu1Buq RMX1u_u qB;H
+H@:@U.4d:::.d4Mj: _Xu1Buq RMX1u_u qB;H
NR03sDs_FHNoMl"CRMu X_q1uB; "
-@FR@4U:(::44c(::)A ) RA)
+@FR@.U:c::4.cc::)A ) RA)
);N3HRs_0DFosHMCNlR "A);)"
RNH3b#DFosH8RHs"FHMk;0"
RNH3sbF08NDH"sRF"k0;R
-H@:@U44U:::4Unt:A_jjdR_Atj;dj
+H@:@U.46:::.6nt:A_jjdR_Atj;dj
RNH3Ds0_HFsolMNCAR"td_jj
-";F@R@Ug:4:44:g::nAjt_jAjRtj_jjN;
+";F@R@Un:.:.4:n::nAjt_jAjRtj_jjN;
HsR30FD_sMHoNRlC"_Atj"jj;R
-F@:@U.4j:::.jgt:Aq_BijRdjABtqid_jjN;
+F@:@U.4(:::.(gt:Aq_BijRdjABtqid_jjN;
HsR30FD_sMHoNRlC"qAtBji_d;j"
-@HR@.U:4::4.g4::qAtBji_jAjRtiqB_jjj;H
+@HR@.U:U::4.gU::qAtBji_jAjRtiqB_jjj;H
NR03sDs_FHNoMl"CRABtqij_jj
-";H@R@U.:.:.4:.::(B_pijRdjB_pij;dj
+";H@R@Ug:.:.4:g::(B_pijRdjB_pij;dj
RNH3Ds0_HFsolMNCBR"pji_d;j"
-@HR@.U:d::4.(d::iBp_jjjRiBp_jjj;H
+@HR@dU:j::4d(j::iBp_jjjRiBp_jjj;H
NR03sDs_FHNoMl"CRB_pij"jj;R
-H@:@U.4c:::.cUp:Bi1_mZBQRpmi_1;ZQ
+H@:@Ud44:::d4Up:Bi1_mZBQRpmi_1;ZQ
RNH3Ds0_HFsolMNCBR"pmi_1"ZQ;R
-F@:@U.46:::.64B4:p7i_Qme_zBaRp7i_Qme_z
+F@:@Ud4.:::d.4B4:p7i_Qme_zBaRp7i_Qme_z
a;N3HRs_0DFosHMCNlRp"BiQ_7ez_ma
-";F@R@Un:.:.4:n::(B_pi RXuB_pi ;Xu
+";F@R@Ud:d:d4:d::(B_pi RXuB_pi ;Xu
RNH3Ds0_HFsolMNCBR"p i_X;u"
-@FR@.U:(::4.n(::zwu_RB1w_uzB
+@FR@dU:c::4dnc::zwu_RB1w_uzB
1;N3HRs_0DFosHMCNlRu"wz1_B"F;
-RU@@::.U4U:.:Q(:ujp_d.jr:Rj9Q_upjrdj.9:jRpQu_jjdrj.:9N;
+RU@@::d646:d:Q(:ujp_d.jr:Rj9Q_upjrdj.9:jRpQu_jjdrj.:9N;
HsR30FD_sMHoNRlC"pQu_jjd"N;
HCR38NHVs$sNMCNlRb'HDd_jj
-';H@R@Ug:.:.4:g::dQrup.9:jRpQurj.:9uRQp:r.j
+';H@R@Un:d:d4:n::dQrup.9:jRpQurj.:9uRQp:r.j
9;N3HRs_0DFosHMCNlRu"Qp
";N3HRCV8HNNss$lMNCHR'b;D'
-@LR@dU:j::4d6j::q71B4ir:Rj97B1qi:r4j79R1iqBrj4:9N;
+@LR@dU:(::4d6(::q71B4ir:Rj97B1qi:r4j79R1iqBrj4:9N;
HsR30FD_sMHoNRlC"q71B;i"
RNH3b#DFosH8RHs"FHMk;0"
RNH3HC8VsNsNN$Ml'CR8O#N
-';L@R@U4:d:d4:4::67BaqiaR7q;Bi
+';L@R@UU:d:d4:U::67BaqiaR7q;Bi
RNH3Ds0_HFsolMNC7R"aiqB"N;
H$R#Ms_0HN#004CR;R
-F@:@Ud4.:::d.ce:q qBRe; B
+F@:@Ud4g:::dgce:q qBRe; B
RNH3Ds0_HFsolMNCqR"e" B;R
-F@:@Ud4d:::ddUe:q B_XquRe_ B ;Xu
+F@:@Uc4j:::cjUe:q B_XquRe_ B ;Xu
RNH3Ds0_HFsolMNCqR"e_ B "Xu;H
NRD3#bHFsos8HRM"HF"k0;H
NRF3bsD0N8RHs"0Fk"F;
-RU@@::dc4c:d: 4:R
+RU@@::c444:c: 4:R
;N3HRs_0DFosHMCNlR"" ;R
-H@:@Ud46:::d6du:equReqN;
+H@:@Uc4.:::c.du:equReqN;
HsR30FD_sMHoNRlC"qeu"F;
-RU@@::dn4n:d:ed:veqRv
+RU@@::cd4d:c:ed:veqRv
q;N3HRs_0DFosHMCNlRv"eq
-";H@R@U(:d:d4:(::d)R1a);1a
+";H@R@Uc:c:c4:c::d)R1a);1a
RNH3Ds0_HFsolMNC)R"1;a"
-@FR@dU:U::4d6U::1) )aR a1 ;H
+@FR@cU:6::4c66::1) )aR a1 ;H
NR03sDs_FHNoMl"CR) 1a
-";H@R@Ug:d:d4:g::.))WRWN;
+";H@R@Un:c:c4:n::.))WRWN;
HsR30FD_sMHoNRlC"")W;R
-H@:@Uc44:::c4.B:wrj4:9BRwrj4:9BRwrj4:9N;
+H@:@Uc4U:::cU.B:wrj4:9BRwrj4:9BRwrj4:9N;
HsR30FD_sMHoNRlC""wB;H
NR83CHsVNsMN$NRlC''VO;R
-F@:@Uc4.:::c.4qn:vqQt_1Az_q hARp qtvQqz_A1h_ q Ap;H
+F@:@Uc4g:::cg4qn:vqQt_1Az_q hARp qtvQqz_A1h_ q Ap;H
NR03sDs_FHNoMl"CRqtvQqz_A1h_ q Ap"F;
-RU@@::cd4d:c::4UqtvQqz_A1q_7a7q_Qq)RvqQt_1Az_a7qqQ_7)N;
+RU@@::6j4j:6::4UqtvQqz_A1q_7a7q_Qq)RvqQt_1Az_a7qqQ_7)N;
HsR30FD_sMHoNRlC"QqvtAq_z71_q_aq7"Q);R
-F@:@Uc4c:::cc.qj:vqQt_1Az_q hA_p pRmWqtvQqz_A1h_ q Ap_Wpm;H
+F@:@U644:::64.qj:vqQt_1Az_q hA_p pRmWqtvQqz_A1h_ q Ap_Wpm;H
NR03sDs_FHNoMl"CRqtvQqz_A1h_ q Ap_Wpm"F;
-RU@@::c646:c:Bc:QRQhBhQQ;H
+RU@@::6.4.:6:Bc:QRQhBhQQ;H
NR03sDs_FHNoMl"CRBhQQ"o;
L1R7qrBij
9;N3LRLbH0F8s0H.sR;M
@@ -370,99 +415,43 @@ RoMhn_.;M
NRN3#PMC_CV0_D#No46R.no;
M_Rh.
(;N3MR#CNP_0MC_NVDoR#4.;6n
-RoMhn_4(N;
-M#R3N_PCM_C0VoDN#.4R6
-n;ohMR_j4(;M
+RoMhU_.;M
NRN3#PMC_CV0_D#No46R.no;
-MbROk#_C0__jdk_3M
-d;N3MR#CNP_0MC_NVDoR#4.;6n
-RoMO_bkC_#0j__d34kM;M
-NRN3#PMC_CV0_D#No46R.no;
-MbROk#_C0__jdk_3M
-j;N3MR#CNP_0MC_NVDoR#4.;6n
-RoMO_bkC_#0j__43dkM;M
-NRN3#PMC_CV0_D#No46R.no;
-MbROk#_C0__j4k_3M
-4;N3MR#CNP_0MC_NVDoR#4.;6n
-RoMO_bkC_#0j__43jkM;M
-NRN3#PMC_CV0_D#No46R.no;
-M1Rq_jjj_aQh_kj3M
-d;N3MR#CNP_0MC_NVDoR#4.;6n
-RoMqj1_jQj_hja_34kM;M
-NRN3#PMC_CV0_D#No46R.no;
-M1Rq_jjj_aQh_kj3M
-j;N3MR#CNP_0MC_NVDoR#4.;6n
-RoMAjt_jjj_3dkM;M
-NRN3#PMC_CV0_D#No46R.no;
-MtRA_jjj_kj3M
-4;N3MR#CNP_0MC_NVDoR#4.;6n
-RoMAjt_jjj_3jkM;M
-NRN3#PMC_CV0_D#No46R.no;
-M1Rq_jjd_jjj_h1YB3_jk;Md
+M_Rh4;d.
RNM3P#NCC_M0D_VN4o#Rn.6;M
-oR_q1j_djj_jj1BYh_kj3M
-4;N3MR#CNP_0MC_NVDoR#4.;6n
-RoMqj1_djj_j1j_Y_hBjM3kjN;
+oR4h_n
+(;N3MR#CNP_0MC_NVDoR#4.;6n
+RoMh(_4jN;
M#R3N_PCM_C0VoDN#.4R6
-n;owMRuBz_1h_Qa3_jk;Md
+n;oQMRujp_djj__3._k;Md
RNM3P#NCC_M0D_VN4o#Rn.6;M
-oRzwu__B1Q_hajM3k4N;
+oRpQu_jjd_.j__M3k4N;
M#R3N_PCM_C0VoDN#.4R6
-n;owMRuBz_1h_Qa3_jk;Mj
+n;oQMRujp_djj__3._k;Mj
RNM3P#NCC_M0D_VN4o#Rn.6;M
-oRq7aB1i_Y_hBjM3kdN;
+oRpQu_jjd_4j__M3kdN;
M#R3N_PCM_C0VoDN#.4R6
-n;o7MRaiqB_h1YB3_jk;M4
+n;oQMRujp_djj__34_k;M4
RNM3P#NCC_M0D_VN4o#Rn.6;M
-oRq7aB1i_Y_hBjM3kjN;
+oRpQu_jjd_4j__M3kjN;
M#R3N_PCM_C0VoDN#.4R6
-n;oeMRvQq_hja_3dkM;M
-NRN3#PMC_CV0_D#No46R.no;
-MvReqh_Qa3_jk;M4
+n;oQMRujp_djj__3j_k;Md
RNM3P#NCC_M0D_VN4o#Rn.6;M
-oRqev_aQh_kj3M
-j;N3MR#CNP_0MC_NVDoR#4.;6n
-RoMO_bkC_#0j__.3dkM;M
-NRN3#PMC_CV0_D#No46R.no;
-MbROk#_C0__j.k_3M
-4;N3MR#CNP_0MC_NVDoR#4.;6n
-RoMO_bkC_#0j__.3jkM;M
-NRN3#PMC_CV0_D#No46R.no;
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oRqeu_h1YB3_jk;Md
RNM3P#NCC_M0D_VN4o#Rn.6;M
@@ -470,122 +459,97 @@ oRqeu_h1YB3_jk;M4
RNM3P#NCC_M0D_VN4o#Rn.6;M
oRqeu_h1YB3_jk;Mj
RNM3P#NCC_M0D_VN4o#Rn.6;M
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RNH3Ds0CF_0R
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HsR30FD_sMHoNRlC"_1vqtvQq
";N3HRV_#lVlsF#"0R1qv_vqQtR;d"
RNH3lV#_#0F01R"vv_qQRtqU
@@ -593,13 +557,13 @@ RNH3lV#_#0F01R"vv_qQRtqU
";N3HRV_#lFosHMCNlRv"1_Qqvt;q"
RNH3lV#_N#00CCso;R4
RNH3HFso#HM0lMNC1R'vv_qQrtqj9:('s;
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pSBip=Bi1_mZOQ_
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HsR30_DC04FR;H
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RNH3Ds0_HFsolMNC1R"vv_qQ"tq;H
NR#3Vls_VF0l#Rv"1_QqvtdqR"N;
HVR3#0l_FR#0"_1vqtvQq"RU;H
@@ -607,13 +571,13 @@ NR#3VlN_0L#DC0jR"j4jRjjjjjsjjjRj4jj4jjjjjsjj4R4jjjjjjj4sj4jRjjj4jj4jsjjjRj4jjjsj
NR#3Vls_FHNoMl"CR1qv_vqQt"N;
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RNH3Ds0CF_0R
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";N3HRV_#lVlsF#"0R1qv_vqQtR;d"
RNH3lV#_#0F01R"vv_qQRtqU
@@ -621,124 +585,213 @@ RNH3lV#_#0F01R"vv_qQRtqU
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RNH3lV#_N#00CCso;R4
RNH3HFso#HM0lMNC1R'vv_qQrtqj9:('s;
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+RNH3Ds0_HFsolMNC1R"vv_qQ"tq;H
+NR#3Vls_VF0l#Rv"1_QqvtdqR"N;
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+HVR3##l_0CN0sRCo4N;
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+@sR@dU:dc.::.dd:+.d41c:vv_qQrtqj9:(R:fjjNRlO7ERw]w)RHbslvR1_Qqvt4qr9T
+S=_1vqtvQq9r4
+=S7h(_U_SH
B=piB_pimQ1Z_SO
-11=)a;_H
-RNH3Ds0_HFsolMNCAR"tiqB_jjd_aQh"N;
-H#R3$HM_MPH0N"DR4
-";N3HRHDM_FRFbcs;
-RU@@:j4.:4.:.dj:+:4.B_pim_zauR) fjj:ROlNEwR7wsRbHBlRpmi_zua_)S
-Tp=Biz_ma)_u 7
-S=4h_gB
-SpBi=pmi_1_ZQON;
-HsR30FD_sMHoNRlC"iBp_amz_ u)"N;
-HHR3MF_DF6bR;H
-NR$3#MM_HHN0PD4R""s;
-RU@@:444::d.4:44d4c+.b:Ok#_C0:rdjf9RjR:jlENORw7wRHbslbROk#_C09rj
-=STO_bkCr#0jS9
-7_=h4S.
+)1=)a;_H
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+HsR30FD_sMHoNRlC"_1vqtvQq
+";N3HRV_#lVlsF#"0R1qv_vqQtR;d"
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+";N3HRV_#l0DNLCR#0"jjjRj4jjjjjjjsj44Rjjjjjjjjs4jjRjj4jjsjjjR44j4jjjjjjsj4jRjjjjj4jjjs44jRjj4jjj4js4jjRjjjjjs4j4R44jjjjj4jjs
+";N3HRV_#lFosHMCNlRv"1_Qqvt;q"
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+RU@@:(dd:dc:d.(:.c+4:_1vqtvQq:rj(f9RjR:jlENORw7w)b]RsRHl1qv_vqQtr
+j9S1T=vv_qQrtqjS9
+7v=1_QqvtMq_#9r(
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+=S))_1aHN;
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+NRM#$_lV#_RH8"U(4dU.4d;4"
+RNH3Ds0_HFsolMNC1R"vv_qQ"tq;H
+NR#3Vls_VF0l#Rv"1_QqvtdqR"N;
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+NR#3Vls_FHNoMl"CR1qv_vqQt"N;
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+Tb=Ok#_C09r.
+=S7hn_4
+pSBip=Bi1_mZOQ_;H
+NR03sDs_FHNoMl"CRO_bkC"#0;H
+NRM3kVOsN_8HMC.GR;H
+NR$3#MM_HHN0PDjR""s;
+RU@@:U44::d.4:4Ud4c+cb:Ok#_C0:rdjf9RjR:jlENORw7wRHbslbROk#_C09rd
+=STO_bkCr#0dS9
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B=piB_pimQ1Z_
O;N3HRs_0DFosHMCNlRb"Ok#_C0
";N3HRksMVNHO_MG8CR
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-@sR@4U:4d4:.4:44c:d+:4.O_bkCr#0d9:jR:fjjNRlO7ERwbwRsRHlO_bkCr#04S9
-Tb=Ok#_C09r4
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+S=pQu_jjd_jOr97
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+";N3HRksMVNHO_MG8CR
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+=STQ_upj_djO9r4
+=S7hg_4
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+=S1)_1aHN;
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+(9S1T=vv_qQrtq(S9
+7_=h(HU_
+pSBip=Bi1_mZOQ_
+=S1)_1aHN;
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+NRM#$_lV#_RH8"U(4dU.4d;4"
+RNH3Ds0_HFsolMNC1R"vv_qQ"tq;H
+NR#3Vls_VF0l#Rv"1_QqvtdqR"N;
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+";N3HRs_0DFosHMCNlRv"1_Qqvt;q"
+RNH3lV#_FVslR#0"_1vqtvQq"Rd;H
+NR#3VlF_0#"0R1qv_vqQtR;U"
+RNH3lV#_L0ND0C#Rj"jjjR4jjjjjjjsjj4R4jjjjsjjjR4jjjj4jjjjs4j4Rjjj4jjjjjs4jjRjjjj4j4jsjj4Rjjjj4sjj4R4jjjjjjjj4s444Rjjjjjjj4;s"
+RNH3lV#_HFsolMNC1R"vv_qQ"tq;H
+NR#3Vl0_#Ns0CC4oR;H
+NRs3FHMoH#N0Ml'CR1qv_vqQtr(j:9
+';s@R@U.:4(::.4:.(dc+4:iBp_amz_ u)R:fjjNRlO7ERwbwRsRHlB_pim_zau
+) SBT=pmi_zua_)S
+7_=h4S.
+B=piB_pimQ1Z_
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+";N3HRHDM_FRFb6N;
+H#R3$HM_MPH0N"DR4
+";s@R@Uj:4g.:6:g4j:+664Ac:tiqB_jjd_aQhR:fjjNRlO7ERw]w1RHbsltRAq_Bij_djQ
+haSAT=tiqB_jjd_aQh
=S7hd_4
+pSBip=Bi1_mZOQ_
+=S1)_1aHN;
+HsR30FD_sMHoNRlC"qAtBji_dQj_h;a"
+RNH3M#$_HHM0DPNR""4;H
+NRM3H_FDFb;Rc
+@sR@4U:..(::(4.:4d+cp:Bih_Ba:r4jf9RjR:jlENORw7wRHbslpRBih_Ba9rj
+=STB_piBrhajS9
+7D=O B\3pBi_hda_r
+j9SiBp=iBp_Zm1Q;_O
+RNH3Ds0_HFsolMNCBR"pBi_h;a"
+RNH3VkMs_NOHCM8G;Rj
+RNH3M#$_HHM0DPNR""j;R
+s@:@U4:.(..:4(+:d4Bc:pBi_h4ar:Rj9fjj:ROlNEwR7wsRbHBlRpBi_h4ar9T
+S=iBp_aBhr
+49SO7=D3 \B_piB_had9r4
pSBip=Bi1_mZOQ_;H
-NR03sDs_FHNoMl"CRO_bkC"#0;H
+NR03sDs_FHNoMl"CRB_piB"ha;H
NRM3kVOsN_8HMC4GR;H
NR$3#MM_HHN0PDjR""s;
-RU@@:444::d.4:44d4c+.b:Ok#_C0:rdjf9RjR:jlENORw7wRHbslbROk#_C09r.
-=STO_bkCr#0.S9
+RU@@:U44::d.4:4Ud4c+cb:Ok#_C0:rdjf9RjR:jlENORw7wRHbslbROk#_C09rj
+=STO_bkCr#0jS9
7_=h4Sc
B=piB_pimQ1Z_
O;N3HRs_0DFosHMCNlRb"Ok#_C0
";N3HRksMVNHO_MG8CR
-.;N3HR#_$MH0MHPRND";j"
-@sR@4U:4d4:.4:44c:d+:4.O_bkCr#0d9:jR:fjjNRlO7ERwbwRsRHlO_bkCr#0dS9
-Tb=Ok#_C09rd
+j;N3HR#_$MH0MHPRND";j"
+@sR@4U:4dU:.4:4Uc:d+:4cO_bkCr#0d9:jR:fjjNRlO7ERwbwRsRHlO_bkCr#04S9
+Tb=Ok#_C09r4
=S7h6_4
pSBip=Bi1_mZOQ_;H
NR03sDs_FHNoMl"CRO_bkC"#0;H
-NRM3kVOsN_8HMCdGR;H
+NRM3kVOsN_8HMC4GR;H
NR$3#MM_HHN0PDjR""s;
-RU@@:n4(:4.:(dn:+:4.p_71j_jjQRhafjj:ROlNEwR7wR1]blsHR1p7_jjj_aQh
-=STp_71j_jjQ
-haSh7=_S.
-B=piB_pimQ1Z_SO
-11=)a;_H
-RNH3Ds0_HFsolMNCpR"7j1_jQj_h;a"
-RNH3M#$_HHM0DPNR""4;H
-NRM3H_FDFb;R.
-@sR@4U:j6.:.j:4.6:6+:4.7BaqiY_1hfBRjR:jlENORw7w1b]RsRHl7BaqiY_1hSB
-Ta=7q_Bi1BYh
-=S7h
-_dSiBp=iBp_Zm1Q
-_OS)1=1Ha_;H
-NR03sDs_FHNoMl"CR7BaqiY_1h;B"
-RNH3M#$_HHM0DPNR""4;R
-s@:@U4:j.64.:j6.:6.+4:zwu__B1QRhafjj:ROlNEwR7wR1]blsHRzwu__B1Q
-haSwT=uBz_1h_Qa7
-S=ch_
-pSBip=Bi1_mZOQ_
-=S1)_1aHN;
-HsR30FD_sMHoNRlC"zwu__B1Q"ha;H
-NR$3#MM_HHN0PD4R""N;
-HHR3MF_DFnbR;R
-s@:@U4:(n.(:4n+:d4q.:1d_jjj_jjY_1hfBRjR:jlENORw7w1b]RsRHlqj1_djj_j1j_Y
-hBSqT=1d_jjj_jjY_1hSB
-7_=h6B
-SpBi=pmi_1_ZQO1
-S=a)1_
-H;N3HRs_0DFosHMCNlR1"q_jjd_jjj_h1YB
-";N3HR#_$MH0MHPRND";4"
-@sR@4U:(.n::n4(:4d+.1:q_jjj_aQhR:fjjNRlO7ERw]w1RHbsl1Rq_jjj_aQh
-=STqj1_jQj_hSa
-7_=hnB
-SpBi=pmi_1_ZQO1
-S=a)1_
-H;N3HRs_0DFosHMCNlR1"q_jjj_aQh"N;
-H#R3$HM_MPH0N"DR4
-";N3HRHDM_FRFbjs;
-RU@@:.4j::6.4:j.646+.u:eqY_1hfBRjR:jlENORw7w1b]RsRHle_uq1BYh
+RU@@:g4j::6.4:jg646+cu:eqY_1hfBRjR:jlENORw7w1b]RsRHle_uq1BYh
=STe_uq1BYh
=S7h
-_(SiBp=iBp_Zm1Q
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_OS)1=1Ha_;H
NR03sDs_FHNoMl"CRe_uq1BYh"N;
H#R3$HM_MPH0N"DR4
-";s@R@Uj:4..:6:.4j:+664A.:tj_jjjRf:ljRNROE71ww]sRbHAlRtj_jjw7w1S]
-Tt=A_jjj_SO
-7_=hUB
-SpBi=pmi_1_ZQO1
-S=a)1_
-H;N3HRs_0DFosHMCNlRt"A_jjj"N;
-HHR3MF_DFdbR;R
-s@:@U4:j.64.:j6.:6.+4:q7aB7i_vfqRjR:jlENORw7w1b]RsRHl7Baqiv_7qT
-S=q7aB7i_vSq
-70=#N_0ClENOH\MC34kMd#_N_jjj_0HM_SH
+";s@R@Uj:4g.:6:g4j:+664wc:uBz_1h_QajRf:ljRNROE71ww]sRbHwlRuBz_1h_QaT
+S=zwu__B1Q
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B=piB_pimQ1Z_SO
11=)a;_H
-RNH3Ds0_HFsolMNC7R"aiqB_q7v"N;
-H#R3$HM_MPH0N"DR4
-";s@R@U(:4n::.4:(nd.+4:1z7_jjj_aQhR:fjjNRlO7ERw]w1RHbsl7Rz1j_jjh_QaT
+RNH3Ds0_HFsolMNCwR"uBz_1h_Qa
+";N3HR#_$MH0MHPRND";4"
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+S=_q1j_djj_jj1BYh
+=S7h
+_nSiBp=iBp_Zm1Q
+_OS)1=1Ha_;H
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+RU@@:d4U:4.:Udd:+:4cqj1_jQj_hfaRjR:jlENORw7w1b]RsRHlqj1_jQj_hSa
+T1=q_jjj_aQh
+=S7h
+_(SiBp=iBp_Zm1Q
+_OS)1=1Ha_;H
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+RNH3M#$_HHM0DPNR""4;H
+NRM3H_FDFb;Rj
+@sR@4U:j6g:.j:4g6:6+:4cqtvQqz_A1h_ q ApR:fjjNRlO7ERwbwRsRHlqtvQqz_A1h_ q Ap7
+wwSqT=vqQt_1Az_q hA_p O7
+S=Uh_
+pSBip=Bi1_mZOQ_;H
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+s@:@U4:jg64.:j6g:6c+4:_AtjRjjfjj:ROlNEwR7wR1]blsHR_Atj7jjw]w1
+=STAjt_jOj_
+=S7h
+_gSiBp=iBp_Zm1Q
+_OS)1=1Ha_;H
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+RNH3_HMDbFFR
+d;s@R@Uj:4g.:6:g4j:+6647c:1iqB_aQhrR49fjj:ROlNEwR7wR1]blsHRq71BQi_h4ar9T
+S=q71BQi_h4ar97
+S=4h_jB
+SpBi=pmi_1_ZQO1
+S=a)1_
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+RNH3Ds0_HFsolMNC7R"1iqB_aQh"s;
+RU@@:g4j::6.4:jg646+cv:eqh_QajRf:ljRNROE71ww]sRbHelRvQq_hSa
+Tv=eqh_Qa7
+S=4h_4B
+SpBi=pmi_1_ZQO1
+S=a)1_
+H;N3HRs_0DFosHMCNlRv"eqh_Qa
+";N3HR#_$MH0MHPRND";4"
+RNH3_HMDbFFR
+(;s@R@UU:4d::.4:Uddc+4:1z7_jjj_aQhR:fjjNRlO7ERw]w1RHbsl7Rz1j_jjh_QaT
S=1z7_jjj_aQh
=S7h
_4SiBp=iBp_Zm1Q
@@ -746,40 +799,62 @@ _OS)1=1Ha_;H
NR03sDs_FHNoMl"CRz_71j_jjQ"ha;H
NR$3#MM_HHN0PD4R""N;
HHR3MF_DF4bR;R
-s@:@U4:.j..:4j+:d4B.:pBi_hjar9jRf:ljRNROE7RwwblsHRiBp_aBhr
-j9SBT=pBi_hjar97
-S=iBp_aBh_jHr9B
-SpBi=pmi_1_ZQON;
-H#R3$HM_MPH0N"DRj
-";N3HRs_0DFosHMCNlRp"Bih_Ba
-";s@R@U6:n::.6nd6:j.+4:qeu_f7RjR:jlENORw7wRHbsluReq
-_7SeT=u7q_
-=S7e_uqOB
-SpBi=pmi_1_ZQON;
-HsR30FD_sMHoNRlC"qeu_;7"
-RNH3M#$_HHM0DPNR""4;R
-s@:@U4:jcd44:jdc:d.+4:iBp_jjj_R7jfjj:ROlNEwR7wsRbHBlRpji_j7j_jT
-S=iBp_jjj_
-7jSB7=pji_jOj_
-pSBip=Bi1_mZOQ_;H
-NR03sDs_FHNoMl"CRB_pij_jj7;j"
-RNH3M#$_HHM0DPNR""4;R
-s@:@U4:.j..:4j+:d4).: a1 R:fjjNRlO7ERwbwRsRHl) 1aw7w
-=ST) 1a
-_OS)7=1Oa_
-pSBip=Bi1_mZOQ_;H
-NR03sDs_FHNoMl"CR) 1a
-";s@R@Uj:4n.:d:n4j:+dc4B.:pji_j7j_4jRf:ljRNROE7RwwblsHRiBp_jjj_
-74SBT=pji_j7j_47
-S=iBp_jjj_
-7jSiBp=iBp_Zm1Q;_O
-RNH3Ds0_HFsolMNCBR"pji_j7j_4
+s@:@U4:Ud.U:4d+:d4pc:7j1_jQj_hfaRjR:jlENORw7w1b]RsRHlp_71j_jjQ
+haSpT=7j1_jQj_hSa
+7_=h.B
+SpBi=pmi_1_ZQO1
+S=a)1_
+H;N3HRs_0DFosHMCNlR7"p1j_jjh_Qa
";N3HR#_$MH0MHPRND";4"
-@sR@4U:..j::j4.:4d+.p:Biz_mah_QajRf:ljRNROE7RwwblsHRiBp_amz_aQh
-=STB_pi _XuO7
-S=iBp_amz_ u)
+RNH3_HMDbFFR
+.;s@R@Uj:4g.:6:g4j:+6647c:aiqB_h1YBjRf:ljRNROE71ww]sRbH7lRaiqB_h1YBT
+S=q7aB1i_Y
+hBSh7=_Sd
+B=piB_pimQ1Z_SO
+11=)a;_H
+RNH3Ds0_HFsolMNC7R"aiqB_h1YB
+";N3HR#_$MH0MHPRND";4"
+@sR@4U:j6g:.j:4g6:6+:4c7Baqiv_7qjRf:ljRNROE71ww]sRbH7lRaiqB_q7v
+=ST7Baqiv_7q7
+S=N#00lC_NHOEM3C\kcM4__N#j_jjH_M0HB
+SpBi=pmi_1_ZQO1
+S=a)1_
+H;N3HRs_0DFosHMCNlRa"7q_Bi7"vq;H
+NR$3#MM_HHN0PD4R""s;
+RU@@:(4.:4.:.d(:+:4cB_pim_zaQRhafjj:ROlNEwR7wsRbHBlRpmi_zQa_hSa
+Tp=BiX_ u
+_OSB7=pmi_zua_)S
+B=piB_pimQ1Z_
+O;N3HRs_0DFosHMCNlRp"Biz_mah_Qa
+";N3HR#_$MH0MHPRND";4"
+@sR@4U:4dc:.4:4cc:d+:4cB_pij_jj7f.RjR:jlENORw7wRHbslpRBij_jj._7
+=STB_pij_jj7S.
+7p=Bij_jj4_7
pSBip=Bi1_mZOQ_;H
-NR03sDs_FHNoMl"CRB_pim_zaQ"ha;H
+NR03sDs_FHNoMl"CRB_pij_jj7;."
+RNH3M#$_HHM0DPNR""4;R
+s@:@U(..:6.:(:+dj4ec:u7q_R:fjjNRlO7ERwbwRsRHle_uq7T
+S=qeu_S7
+7u=eq
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diff --git a/Logic/BUS68030.srr b/Logic/BUS68030.srr
index 3566d12..d4247bf 100644
--- a/Logic/BUS68030.srr
+++ b/Logic/BUS68030.srr
@@ -6,32 +6,31 @@
#Implementation: logic
$ Start of Compile
-#Fri May 16 17:07:02 2014
+#Sun May 18 21:01:41 2014
Synopsys VHDL Compiler, version comp201209rcp1, Build 283R, built Mar 19 2013
@N|Running in 64-bit mode
Copyright (C) 1994-2012 Synopsys, Inc. This software the associated documentation are confidential and proprietary to Synopsys, Inc. Your use or disclosure of this software subject to the terms and conditions of a written license agreement between you, or your company, and Synopsys, Inc.
@N: CD720 :"C:\Program Files (x86)\ispLever\synpbase\lib\vhd\std.vhd":123:18:123:21|Setting time resolution to ns
-@N:"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":6:7:6:14|Top entity is set to BUS68030.
+@N:"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Top entity is set to BUS68030.
File C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd changed - recompiling
VHDL syntax check successful!
File C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd changed - recompiling
-@N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":6:7:6:14|Synthesizing work.bus68030.behavioral
-@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":105:7:105:15|Signal clk_030_d is undriven
+@N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral
+@W: CD638 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":112:7:112:15|Signal clk_030_d is undriven
Post processing for work.bus68030.behavioral
-@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":176:2:176:3|Pruning register CLK_REF(1 downto 0)
-@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":111:32:111:34|Pruning register cpu_est_d(3 downto 0)
-@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":110:32:110:34|Pruning register CLK_000_D5
-@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":109:32:109:34|Pruning register CLK_000_D4
-@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":108:32:108:34|Pruning register CLK_000_D3
-@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":107:32:107:34|Pruning register CLK_000_D2
-@W: CL190 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":102:52:102:55|Optimizing register bit DSACK_INT(0) to a constant 1
-@W: CL260 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":102:52:102:55|Pruning register bit 0 of DSACK_INT(1 downto 0)
-@W: CL189 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":120:2:120:3|Register bit CLK_CNT(1) is always 0, optimizing ...
-@W: CL260 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":120:2:120:3|Pruning register bit 1 of CLK_CNT(1 downto 0)
-@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":111:32:111:34|Trying to extract state machine for register cpu_est
-@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":176:2:176:3|Trying to extract state machine for register SM_AMIGA
+@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":118:32:118:34|Pruning register cpu_est_d(3 downto 0)
+@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":117:32:117:34|Pruning register CLK_000_D5
+@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":116:32:116:34|Pruning register CLK_000_D4
+@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":115:32:115:34|Pruning register CLK_000_D3
+@A: CL282 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":109:52:109:55|Feedback mux created for signal AMIGA_BUS_ENABLE -- possible set/reset assignment for signal missing. Specifying a reset value will improve timing and area.
+@W: CL111 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":183:2:183:3|All reachable assignments to CLK_REF(0) assign '0'; register removed by optimization
+@W: CL117 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":183:2:183:3|Latch generated from process for signal CLK_REF(1 downto 0); possible missing assignment in an if or case statement.
+@W: CL190 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":109:52:109:55|Optimizing register bit DSACK_INT(0) to a constant 1
+@W: CL260 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":109:52:109:55|Pruning register bit 0 of DSACK_INT(1 downto 0)
+@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":118:32:118:34|Trying to extract state machine for register cpu_est
+@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":183:2:183:3|Trying to extract state machine for register SM_AMIGA
Extracted state machine for register SM_AMIGA
State machine has 8 reachable states with original encodings of:
000
@@ -42,10 +41,10 @@ State machine has 8 reachable states with original encodings of:
101
110
111
-@W: CL249 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":176:2:176:3|Initial value is not supported on state machine SM_AMIGA
+@W: CL249 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":183:2:183:3|Initial value is not supported on state machine SM_AMIGA
@END
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
-# Fri May 16 17:07:02 2014
+# Sun May 18 21:01:41 2014
###########################################################]
Map & Optimize Report
@@ -64,22 +63,23 @@ original code -> new code
101 -> 00100000
110 -> 01000000
111 -> 10000000
-@N: MO106 :"c:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":145:4:145:7|Found ROM, 'clk\.cpu_est_11[3:0]', 16 words by 4 bits
+@N: MO106 :"c:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":152:4:152:7|Found ROM, 'clk\.cpu_est_11[3:0]', 16 words by 4 bits
---------------------------------------
Resource Usage Report
Simple gate primitives:
DFFRH 7 uses
+DFF 14 uses
DFFSH 16 uses
-DFF 11 uses
IBUF 35 uses
BUFTH 7 uses
OBUF 15 uses
BI_DIR 2 uses
-AND2 146 uses
-INV 116 uses
-OR2 17 uses
-XOR2 2 uses
+AND2 159 uses
+INV 126 uses
+OR2 18 uses
+XOR2 4 uses
+DLATRH 1 use
@N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis.
@@ -89,6 +89,6 @@ Mapper successful!
At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 31MB peak: 95MB)
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
-# Fri May 16 17:07:04 2014
+# Sun May 18 21:01:42 2014
###########################################################]
diff --git a/Logic/BUS68030.srs b/Logic/BUS68030.srs
index aff0e22..3ff0f39 100644
Binary files a/Logic/BUS68030.srs and b/Logic/BUS68030.srs differ
diff --git a/Logic/Programming.xcf b/Logic/Programming.xcf
index 4445d57..bbf60eb 100644
--- a/Logic/Programming.xcf
+++ b/Logic/Programming.xcf
@@ -19,8 +19,8 @@
0
C:\Users\Matze\Documents\GitHub\68030tk\Logic\68030_tk.jed
- 05/16/14 11:08:27
- 0xB88F
+ 05/17/14 14:58:17
+ 0x7C8A
Erase,Program,Verify