diff --git a/Logic/68030-68000-bus.vhd b/Logic/68030-68000-bus.vhd index 28268a5..a39c502 100644 --- a/Logic/68030-68000-bus.vhd +++ b/Logic/68030-68000-bus.vhd @@ -97,13 +97,11 @@ signal AS_000_INT:STD_LOGIC := '1'; signal AS_030_000_SYNC:STD_LOGIC := '1'; signal BGACK_030_INT:STD_LOGIC := '1'; signal BGACK_030_INT_D:STD_LOGIC := '1'; -signal DTACK_SYNC:STD_LOGIC := '1'; signal AS_000_DMA:STD_LOGIC := '1'; signal DS_000_DMA:STD_LOGIC := '1'; signal SIZE_DMA: STD_LOGIC_VECTOR ( 1 downto 0 ) := "11"; signal A0_DMA: STD_LOGIC := '1'; signal FPU_CS_INT:STD_LOGIC := '1'; -signal VPA_SYNC: STD_LOGIC := '1'; signal VMA_INT: STD_LOGIC := '1'; signal VPA_D: STD_LOGIC := '1'; signal UDS_000_INT: STD_LOGIC := '1'; @@ -112,8 +110,12 @@ signal DSACK1_INT: STD_LOGIC := '1'; signal CLK_CNT_P: STD_LOGIC_VECTOR ( 1 downto 0 ) := "00"; signal CLK_CNT_N: STD_LOGIC_VECTOR ( 1 downto 0 ) := "00"; signal CLK_REF: STD_LOGIC_VECTOR ( 1 downto 0 ) := "10"; -signal CLK_OUT_PRE: STD_LOGIC := '1'; +signal CLK_OUT_PRE_50: STD_LOGIC := '1'; +signal CLK_OUT_PRE_50_D: STD_LOGIC := '1'; +signal CLK_OUT_PRE_25: STD_LOGIC := '1'; +signal CLK_OUT_PRE_33: STD_LOGIC := '1'; signal CLK_OUT_INT: STD_LOGIC := '1'; +signal CLK_030_H: STD_LOGIC := '1'; signal CLK_000_D0: STD_LOGIC := '1'; signal CLK_000_D1: STD_LOGIC := '1'; signal CLK_000_D2: STD_LOGIC := '1'; @@ -121,7 +123,7 @@ signal CLK_000_D3: STD_LOGIC := '1'; signal CLK_000_D4: STD_LOGIC := '1'; signal CLK_000_D5: STD_LOGIC := '1'; signal CLK_000_D6: STD_LOGIC := '1'; - +signal DTACK_D0: STD_LOGIC := '1'; begin @@ -144,7 +146,10 @@ begin if(RST = '0' ) then CLK_CNT_P <= "00"; RESET <= '0'; - CLK_OUT_PRE <= '0'; + CLK_OUT_PRE_50 <= '0'; + CLK_OUT_PRE_50_D <= '0'; + CLK_OUT_PRE_33 <= '0'; + CLK_OUT_PRE_25 <= '0'; CLK_OUT_INT <= '0'; cpu_est <= E20; CLK_000_D0 <= '1'; @@ -155,35 +160,43 @@ begin CLK_000_D5 <= '1'; CLK_000_D6 <= '1'; VPA_D <= '1'; + DTACK_D0 <= '1'; elsif(rising_edge(CLK_OSZI)) then --reset buffer RESET <= '1'; - - --clk generation : up to now just half the clock - if(CLK_CNT_P = "01") then - CLK_OUT_PRE <= not CLK_OUT_PRE; + + --clk generation : + + CLK_OUT_PRE_50 <= not CLK_OUT_PRE_50; + CLK_OUT_PRE_50_D<= CLK_OUT_PRE_50; + if(CLK_CNT_P = "10") then CLK_CNT_P <= "00"; else CLK_CNT_P <= CLK_CNT_P+1; end if; - --if(CLK_CNT_P ="00" or CLK_CNT_N ="00")then --33MHz Clock - -- CLK_OUT_PRE <= '0'; - --else - -- CLK_OUT_PRE <= '1'; - --end if; + if(CLK_CNT_P ="00" or CLK_CNT_N ="00")then --33MHz Clock + CLK_OUT_PRE_33 <= '0'; + else + CLK_OUT_PRE_33 <= '1'; + end if; + + if(CLK_OUT_PRE_50='1' and CLK_OUT_PRE_50_D='0')then + CLK_OUT_PRE_25 <= not CLK_OUT_PRE_25; + end if; -- the external clock to the processor is generated here - CLK_OUT_INT <= CLK_OUT_PRE; --this way we know the clock of the next state: Its like looking in the future, cool! + CLK_OUT_INT <= CLK_OUT_PRE_25; --this way we know the clock of the next state: Its like looking in the future, cool! --delayed Clocks for edge detection - CLK_000_D0 <= CLK_000; - CLK_000_D1 <= CLK_000_D0; - CLK_000_D2 <= CLK_000_D1; - CLK_000_D3 <= CLK_000_D2; - CLK_000_D4 <= CLK_000_D3; - CLK_000_D5 <= CLK_000_D4; - CLK_000_D6 <= CLK_000_D5; - + CLK_000_D0 <= CLK_000; + CLK_000_D1 <= CLK_000_D0; + CLK_000_D2 <= CLK_000_D1; + CLK_000_D3 <= CLK_000_D2; + CLK_000_D4 <= CLK_000_D3; + CLK_000_D5 <= CLK_000_D4; + CLK_000_D6 <= CLK_000_D5; + DTACK_D0 <= DTACK; + VPA_D <= VPA; -- e-clock @@ -210,7 +223,6 @@ begin null; end case; end if; - VPA_D <= VPA; end if; end process clk; @@ -231,15 +243,12 @@ begin BGACK_030_INT <= '1'; BGACK_030_INT_D <= '1'; DSACK1_INT <= '1'; - DTACK_SYNC <= '1'; - VPA_SYNC <= '1'; IPL_030 <= "111"; AMIGA_BUS_ENABLE <= '1' ; AS_000_DMA <= '1'; DS_000_DMA <= '1'; SIZE_DMA <= "11"; A0_DMA <= '1'; - elsif(rising_edge(CLK_OSZI)) then @@ -278,15 +287,17 @@ begin AS_000_INT <= '1'; UDS_000_INT <= '1'; LDS_000_INT <= '1'; - DTACK_SYNC <= '1'; - VPA_SYNC <= '1'; --AMIGA_BUS_ENABLE <= '1'; - elsif( CLK_030 = '1' AND --68030 has a valid AS on high clocks - AS_030 = '0') then + elsif( CLK_030 = '1' AND --68030 has a valid AS on high clocks + + AS_030 = '0') then if(FC(1)='1' and FC(0)='1' and A(19)='0' and A(18)='0' and A(17)='1' and A(16)='0' AND BGACK_000='1') then FPU_CS_INT <= '0'; else - if(nEXP_SPACE ='1' and SM_AMIGA = IDLE_P )then + if( nEXP_SPACE ='1' and --not an expansion space cycle + SM_AMIGA = IDLE_P AND --last amiga cycle terminated + BGACK_030_INT = '1' --no dma -cycle + )then AS_030_000_SYNC <= '0'; end if; end if; @@ -295,55 +306,50 @@ begin -- VMA generation if(CLK_000_D0='0' AND VPA_D='0' AND cpu_est = E4)then --assert VMA_INT <= '0'; + elsif(CLK_000_D0='1' AND AS_000_INT='1' AND cpu_est=E1)then --deassert + VMA_INT <= '1'; end if; - if(BGACK_030_INT='1') then - if(BGACK_030_INT_D='0')then - AMIGA_BUS_ENABLE <= '1' ; --end of DMA cycle - AS_000_DMA <= '1'; - DS_000_DMA <= '1'; - SIZE_DMA <= "11"; - A0_DMA <= '0'; - end if; - --Amiga statemachine - case (SM_AMIGA) is - when IDLE_P => --68000:S0 wait for a falling edge - VMA_INT <= '1'; - if( CLK_000_D2='0' and CLK_000_D3= '1' and AS_030_000_SYNC = '0')then - SM_AMIGA<=IDLE_N; --go to s1 - end if; - when IDLE_N => --68000:S1 place Adress on bus and wait for rising edge, on a rising CLK_000 look for a amiga adressrobe - if(nEXP_SPACE ='1')then - AMIGA_BUS_ENABLE <= CLK_000_D4 ;--for now: allways on for amiga - else -- if this a delayed expansion space detection, aboard this cycle! - AS_030_000_SYNC <= '1'; - SM_AMIGA <= IDLE_P; --aboard - end if; - - if(CLK_000_D0='1')then --go to s2 - SM_AMIGA <= AS_SET_P; --as for amiga set! - end if; - when AS_SET_P => --68000:S2 Amiga cycle starts here: since AS is asserted during transition to this state we simply wait here - if(CLK_000_D4='1')then - AS_000_INT <= '0'; - if (RW='1' and DS_030 = '0') then --read: set udl/lds - if(A0='0') then - UDS_000_INT <= '0'; - else - UDS_000_INT <= '1'; - end if; - if((A0='1' OR SIZE(0)='0' OR SIZE(1)='1')) then - LDS_000_INT <= '0'; - else - LDS_000_INT <= '1'; - end if; + --Amiga statemachine + case (SM_AMIGA) is + when IDLE_P => --68000:S0 wait for a falling edge + --VMA_INT <= '1'; + if( CLK_000_D2='0' and CLK_000_D3= '1' and AS_030_000_SYNC = '0')then + SM_AMIGA<=IDLE_N; --go to s1 + end if; + when IDLE_N => --68000:S1 place Adress on bus and wait for rising edge, on a rising CLK_000 look for a amiga adressrobe + if(nEXP_SPACE ='1')then + AMIGA_BUS_ENABLE <= CLK_000_D4 ;--for now: allways on for amiga + else -- if this a delayed expansion space detection, aboard this cycle! + AS_030_000_SYNC <= '1'; + SM_AMIGA <= IDLE_P; --aboard + end if; + + if(CLK_000_D0='1')then --go to s2 + SM_AMIGA <= AS_SET_P; --as for amiga set! + end if; + when AS_SET_P => --68000:S2 Amiga cycle starts here: since AS is asserted during transition to this state we simply wait here + if(CLK_000_D4='1')then + AS_000_INT <= '0'; + if (RW='1' and DS_030 = '0') then --read: set udl/lds + if(A0='0') then + UDS_000_INT <= '0'; + else + UDS_000_INT <= '1'; + end if; + if((A0='1' OR SIZE(0)='0' OR SIZE(1)='1')) then + LDS_000_INT <= '0'; + else + LDS_000_INT <= '1'; end if; end if; - - if(CLK_000_D0='0')then --go to s3 - SM_AMIGA<=AS_SET_N; - end if; - when AS_SET_N => --68000:S3: nothing happens here; on a transition to s4: assert uds/lds on write + end if; + + if(CLK_000_D0='0')then --go to s3 + SM_AMIGA<=AS_SET_N; + end if; + when AS_SET_N => --68000:S3: nothing happens here; on a transition to s4: assert uds/lds on write + if(CLK_000_D0='1')then --go to s4 if (RW='0' and DS_030 = '0') then --write: set udl/lds earlier than in the specs. this does not seem to harm anything and is saver, than sampling uds/lds too late if(A0='0') then UDS_000_INT <= '0'; @@ -356,85 +362,84 @@ begin LDS_000_INT <= '1'; end if; end if; - if(CLK_000_D0='1')then --go to s4 - SM_AMIGA <= SAMPLE_DTACK_P; - end if; - when SAMPLE_DTACK_P=> --68000:S4 wait for dtack or VMA - if(CLK_000_D0='0' )then --go to s5 - if(DTACK_SYNC = '0' OR VPA_SYNC ='0')then - SM_AMIGA<=DATA_FETCH_N; - end if; - elsif(CLK_000_D0='1' )then -- high clock: sample DTACK - if(VPA_D = '1' AND DTACK='0') then - DTACK_SYNC <= '0'; - elsif(VPA_D='0' AND cpu_est=E9 AND VMA_INT='0') then --vpa/vma cycle: sync VPA on E9: one 7M-clock to latch! - VPA_SYNC <= '0'; - end if; - end if; - when DATA_FETCH_N=> --68000:S5 nothing happens here just wait for positive clock - if(CLK_000_D0='1')then --go to s6 - SM_AMIGA<=DATA_FETCH_P; - end if; - when DATA_FETCH_P => --68000:S6: READ: here comes the data on the bus! - if( CLK_000_D4 ='1' AND CLK_000_D5 = '0' ) then --go to s7 next 030-clock is high: dsack is sampled at the falling edge - DSACK1_INT <='0'; - AS_030_000_SYNC <= '1'; --cycle end - elsif( CLK_000_D0 ='0') then --go to s7 next 030-clock is high: dsack is sampled at the falling edge - --DSACK1_INT<='0'; - SM_AMIGA<=END_CYCLE_N; - --AS_030_000_SYNC <= '1'; --cycle end - end if; - if(AS_030 = '1' )then - AMIGA_BUS_ENABLE <= '1'; - end if; - when END_CYCLE_N =>--68000:S7: Latch/Store data. Wait here for new cycle and go to IDLE on high clock - if(AS_030 = '1' )then - AMIGA_BUS_ENABLE <= '1'; - end if; - if(CLK_000_D0='1' and AS_000_INT = '1' )then --go to s0 - SM_AMIGA<=IDLE_P; - end if; - end case; + SM_AMIGA <= SAMPLE_DTACK_P; + end if; + when SAMPLE_DTACK_P=> --68000:S4 wait for dtack or VMA + if( CLK_000_D0 = '0' and CLK_000_D1='1' and --falling edge + ((VPA_D = '1' AND DTACK_D0='0') OR --DTACK end cycle + (VPA_D='0' AND cpu_est=E9 AND VMA_INT='0')) --VPA end cycle + )then --go to s5 + SM_AMIGA<=DATA_FETCH_N; + end if; + when DATA_FETCH_N=> --68000:S5 nothing happens here just wait for positive clock + if(CLK_000_D0='1')then --go to s6 + SM_AMIGA<=DATA_FETCH_P; + end if; + when DATA_FETCH_P => --68000:S6: READ: here comes the data on the bus! + if( CLK_000_D3 ='1' AND CLK_000_D4 = '0' ) then --go to s7 next 030-clock is high: dsack is sampled at the falling edge + DSACK1_INT <='0'; + AS_030_000_SYNC <= '1'; --cycle end + elsif( CLK_000_D0 ='0') then --go to s7 next 030-clock is high: dsack is sampled at the falling edge + --DSACK1_INT<='0'; + SM_AMIGA<=END_CYCLE_N; + --AS_030_000_SYNC <= '1'; --cycle end + end if; + if(AS_030 = '1' )then + AMIGA_BUS_ENABLE <= '1'; + end if; + when END_CYCLE_N =>--68000:S7: Latch/Store data. Wait here for new cycle and go to IDLE on high clock + if(AS_030 = '1' )then + AMIGA_BUS_ENABLE <= '1'; + end if; + if(CLK_000_D0='1' and AS_000_INT = '1' )then --go to s0 + SM_AMIGA<=IDLE_P; + end if; + end case; - - else - --dma stuff + if(BGACK_030_INT='0')then + --switch amiga bus on for DMA-Cycles + AMIGA_BUS_ENABLE <= '0' ; + elsif(BGACK_030_INT_D='0' and BGACK_030_INT='1')then + AMIGA_BUS_ENABLE <= '1' ; + end if; - --switch amiga bus on/off on the edges - if(BGACK_030_INT_D='1' )then - AMIGA_BUS_ENABLE <= '0' ; - end if; - --as can only be done if we know the uds/lds! - if(AS_000='0' and CLK_030='0' and (UDS_000='0' or LDS_000='0'))then --sampled on rising edges! + --dma stuff + --as can only be done if we know the uds/lds! + if(BGACK_030_INT='0' and AS_000='0' and (UDS_000='0' or LDS_000='0'))then --sampled on rising edges! - --set AS_000 + --set AS_000 + if( CLK_030='0') then AS_000_DMA <= '0'; - if(RW='1') then - DS_000_DMA <='0'; - else - DS_000_DMA <=AS_000_DMA; -- write: one clock delayed! - end if; - -- now determine the size: if both uds and lds is set its 16 bit else 8 bit! - if(UDS_000='0' and LDS_000='0') then - SIZE_DMA <= "10"; --16bit - else - SIZE_DMA <= "01"; --8 bit - end if; - - --now calculate the offset: - --if uds is set low, a0 is so too. - --if only lds is set a1 is high - --therefore a1 = uds - --great! life is simple here! - A0_DMA <= UDS_000; - - --A1 is set by the amiga side + elsif(AS_000_DMA = '0' and CLK_030='1')then + CLK_030_H <= '1'; + end if; + + if(RW='1') then + DS_000_DMA <=AS_000_DMA; + elsif(RW='0' and CLK_030_H = '1' and CLK_030='0')then + DS_000_DMA <=AS_000_DMA; -- write: one clock delayed! + end if; + -- now determine the size: if both uds and lds is set its 16 bit else 8 bit! + if(UDS_000='0' and LDS_000='0') then + SIZE_DMA <= "10"; --16bit else - AS_000_DMA <= '1'; - DS_000_DMA <= '1'; - SIZE_DMA <= "11"; - A0_DMA <= '0'; - end if; + SIZE_DMA <= "01"; --8 bit + end if; + + --now calculate the offset: + --if uds is set low, a0 is so too. + --if only lds is set a1 is high + --therefore a1 = uds + --great! life is simple here! + A0_DMA <= UDS_000; + + --A1 is set by the amiga side + else + AS_000_DMA <= '1'; + DS_000_DMA <= '1'; + SIZE_DMA <= "11"; + A0_DMA <= '0'; + CLK_030_H <= '0'; end if; end if; end process state_machine; @@ -473,8 +478,8 @@ begin --bus buffers AMIGA_BUS_DATA_DIR <= '1' WHEN (RW='0' AND BGACK_030_INT ='1') ELSE --Amiga WRITE '0' WHEN (RW='1' AND BGACK_030_INT ='1') ELSE --Amiga READ - '1' WHEN (RW='1' AND BGACK_030_INT ='0' AND nEXP_SPACE = '0') ELSE --DMA READ to expansion space - '0' WHEN (RW='0' AND BGACK_030_INT ='0' AND nEXP_SPACE = '0') ELSE --DMA WRITE to expansion space + '1' WHEN (RW='1' AND BGACK_030_INT ='0' AND nEXP_SPACE = '0' AND AS_000 = '0') ELSE --DMA READ to expansion space + '0' WHEN (RW='0' AND BGACK_030_INT ='0' AND nEXP_SPACE = '0' AND AS_000 = '0') ELSE --DMA WRITE to expansion space '0'; --Point towarts TK AMIGA_BUS_ENABLE_LOW <= '1'; --for now: allways off diff --git a/Logic/68030_TK.tcl b/Logic/68030_TK.tcl index 0fad691..719824d 100644 --- a/Logic/68030_TK.tcl +++ b/Logic/68030_TK.tcl @@ -163810,3 +163810,3663 @@ if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 6 ########## Tcl recorder end at 05/25/14 21:18:44 ########### + +########## Tcl recorder starts at 05/25/14 21:35:35 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 21:35:35 ########### + + +########## Tcl recorder starts at 05/25/14 21:35:35 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 21:35:35 ########### + + +########## Tcl recorder starts at 05/25/14 21:36:51 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 21:36:51 ########### + + +########## Tcl recorder starts at 05/25/14 21:36:51 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 21:36:51 ########### + + +########## Tcl recorder starts at 05/25/14 21:38:15 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 21:38:15 ########### + + +########## Tcl recorder starts at 05/25/14 21:38:15 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 21:38:15 ########### + + +########## Tcl recorder starts at 05/25/14 21:40:16 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 21:40:17 ########### + + +########## Tcl recorder starts at 05/25/14 21:40:17 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 21:40:17 ########### + + +########## Tcl recorder starts at 05/25/14 21:45:38 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 21:45:38 ########### + + +########## Tcl recorder starts at 05/25/14 21:45:39 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 21:45:39 ########### + + +########## Tcl recorder starts at 05/25/14 21:45:58 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 21:45:58 ########### + + +########## Tcl recorder starts at 05/25/14 21:45:58 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/25/14 21:45:58 ########### + + +########## Tcl recorder starts at 05/26/14 18:16:00 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/26/14 18:16:00 ########### + + +########## Tcl recorder starts at 05/26/14 18:16:01 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/26/14 18:16:01 ########### + + +########## Tcl recorder starts at 05/26/14 18:16:28 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/26/14 18:16:28 ########### + + +########## Tcl recorder starts at 05/26/14 18:16:28 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/26/14 18:16:28 ########### + + +########## Tcl recorder starts at 05/26/14 18:21:12 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/26/14 18:21:12 ########### + + +########## Tcl recorder starts at 05/26/14 18:21:12 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/26/14 18:21:12 ########### + + +########## Tcl recorder starts at 05/26/14 18:22:36 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/26/14 18:22:36 ########### + + +########## Tcl recorder starts at 05/26/14 18:22:37 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/26/14 18:22:37 ########### + + +########## Tcl recorder starts at 05/26/14 18:40:51 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/26/14 18:40:51 ########### + + +########## Tcl recorder starts at 05/26/14 18:40:51 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/26/14 18:40:51 ########### + + +########## Tcl recorder starts at 05/27/14 18:06:27 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/27/14 18:06:27 ########### + + +########## Tcl recorder starts at 05/27/14 18:06:27 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/27/14 18:06:27 ########### + + +########## Tcl recorder starts at 05/27/14 18:07:41 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/27/14 18:07:41 ########### + + +########## Tcl recorder starts at 05/27/14 18:07:41 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/27/14 18:07:41 ########### + + +########## Tcl recorder starts at 05/27/14 19:31:05 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/27/14 19:31:05 ########### + + +########## Tcl recorder starts at 05/27/14 19:31:06 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/27/14 19:31:06 ########### + + +########## Tcl recorder starts at 05/27/14 19:32:19 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/27/14 19:32:19 ########### + + +########## Tcl recorder starts at 05/27/14 19:32:19 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/27/14 19:32:19 ########### + + +########## Tcl recorder starts at 05/27/14 20:02:19 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/27/14 20:02:19 ########### + + +########## Tcl recorder starts at 05/27/14 20:02:20 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/27/14 20:02:20 ########### + + +########## Tcl recorder starts at 05/27/14 20:05:21 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/27/14 20:05:21 ########### + + +########## Tcl recorder starts at 05/27/14 20:05:21 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/27/14 20:05:21 ########### + + +########## Tcl recorder starts at 05/28/14 13:55:53 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/28/14 13:55:54 ########### + + +########## Tcl recorder starts at 05/28/14 13:55:54 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/28/14 13:55:54 ########### + + +########## Tcl recorder starts at 05/28/14 21:22:42 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/28/14 21:22:42 ########### + + +########## Tcl recorder starts at 05/28/14 21:22:42 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/28/14 21:22:42 ########### + + +########## Tcl recorder starts at 05/28/14 21:24:48 ########## + +# Commands to make the Process: +# Hierarchy +if [runCmd "\"$cpld_bin/vhd2jhd\" 68030-68000-bus.vhd -o 68030-68000-bus.jhd -m \"$install_dir/ispcpld/generic/lib/vhd/location.map\" -p \"$install_dir/ispcpld/generic/lib\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/28/14 21:24:48 ########### + + +########## Tcl recorder starts at 05/28/14 21:24:48 ########## + +# Commands to make the Process: +# JEDEC File +if [catch {open BUS68030.cmd w} rspFile] { + puts stderr "Cannot create response file BUS68030.cmd: $rspFile" +} else { + puts $rspFile "STYFILENAME: 68030_tk.sty +PROJECT: BUS68030 +WORKING_PATH: \"$proj_dir\" +MODULE: BUS68030 +VHDL_FILE_LIST: 68030-68000-bus.vhd +OUTPUT_FILE_NAME: BUS68030 +SUFFIX_NAME: edi +PART: M4A5-128/64-10VC +" + close $rspFile +} +if [runCmd "\"$cpld_bin/Synpwrap\" -e BUS68030 -target mach -pro "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete BUS68030.cmd +if [runCmd "\"$cpld_bin/edif2blf\" -edf BUS68030.edi -out BUS68030.bl0 -err automake.err -log BUS68030.log -prj 68030_tk -lib \"$install_dir/ispcpld/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" BUS68030.bl0 -collapse none -reduce none -keepwires -err automake.err -family"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblflink\" \"BUS68030.bl1\" -o \"68030_tk.bl2\" -omod \"68030_tk\" -err \"automake.err\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/impsrc\" -prj 68030_tk -lci 68030_tk.lct -log 68030_tk.imp -err automake.err -tti 68030_tk.bl2 -dir $proj_dir"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -blifopt 68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mblifopt\" 68030_tk.bl2 -sweep -mergefb -err automake.err -o 68030_tk.bl3 @68030_tk.b2_"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -diofft 68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/mdiofft\" 68030_tk.bl3 -pla -family AMDMACH -idev van -o 68030_tk.tt2 -oxrf 68030_tk.xrf -err automake.err @68030_tk.d0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/tt2tott3\" -prj 68030_tk -dir $proj_dir -log 68030_tk.log -tti 68030_tk.tt2 -tto 68030_tk.tt3"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/abelvci\" -vci 68030_tk.lct -dev mach4a -prefit 68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/prefit\" -inp 68030_tk.tt3 -out 68030_tk.tt4 -err automake.err -log 68030_tk.log -percent 68030_tk.tte -mod BUS68030 @68030_tk.l0"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/blif2eqn\" 68030_tk.tte -o 68030_tk.eq3 -use_short -err automake.err "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/lci2vci\" -lci 68030_tk.lct -out 68030_tk.vct -log 68030_tk.l2v"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [catch {open 68030_tk.rsp w} rspFile] { + puts stderr "Cannot create response file 68030_tk.rsp: $rspFile" +} else { + puts $rspFile "-inp \"68030_tk.tt4\" -vci \"68030_tk.vct\" -log \"68030_tk.log\" -eqn \"68030_tk.eq3\" -dev mach447a -dat \"$install_dir/ispcpld/dat/mach4a/\" -msg \"$install_dir/ispcpld/dat/\" -err automake.err -tmv \"NoInput.tmv\" +" + close $rspFile +} +if [runCmd "\"$cpld_bin/machfitr\" \"@68030_tk.rsp\""] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +file delete 68030_tk.rsp +if [runCmd "\"$cpld_bin/lci2vci\" -vci 68030_tk.vco -out 68030_tk.lco -log 68030_tk.v2l"] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} +if [runCmd "\"$cpld_bin/synsvf\" -exe \"$install_dir/ispvmsystem/ispufw\" -prj 68030_tk -if 68030_tk.jed -j2s -log 68030_tk.svl "] { + return +} else { + vwait done + if [checkResult $done] { + return + } +} + +########## Tcl recorder end at 05/28/14 21:24:48 ########### + diff --git a/Logic/68030_tk.bl2 b/Logic/68030_tk.bl2 index 936b478..0d3eb41 100644 --- a/Logic/68030_tk.bl2 +++ b/Logic/68030_tk.bl2 @@ -1,85 +1,82 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Sun May 25 21:18:50 2014 +#$ DATE Wed May 28 21:24:55 2014 #$ MODULE 68030_tk -#$ PINS 59 SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 SIZE_0_ DS_030 \ -# A_30_ UDS_000 A_29_ LDS_000 A_28_ A0 A_27_ nEXP_SPACE A_26_ BERR A_25_ BG_030 A_24_ BG_000 \ -# A_23_ BGACK_030 A_22_ BGACK_000 A_21_ CLK_030 A_20_ CLK_000 A_19_ CLK_OSZI A_18_ \ -# CLK_DIV_OUT A_17_ CLK_EXP A_16_ FPU_CS IPL_030_1_ DTACK IPL_030_0_ AVEC IPL_1_ AVEC_EXP \ -# IPL_0_ E DSACK_0_ VPA FC_0_ VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \ -# AMIGA_BUS_ENABLE_LOW CIIN -#$ NODES 429 BG_030_c as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n \ -# BG_000DFFSHreg ds_000_dma_0_un3_n ds_000_dma_0_un1_n ds_000_dma_0_un0_n \ -# BGACK_000_c fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n inst_BGACK_030_INTreg CLK_030_c \ -# fpu_cs_int_0_un0_n inst_FPU_CS_INTreg dtack_sync_0_un3_n inst_VMA_INTreg CLK_000_c \ -# dtack_sync_0_un1_n inst_AS_030_000_SYNC dtack_sync_0_un0_n inst_DTACK_SYNC \ -# CLK_OSZI_c a0_dma_0_un3_n inst_VPA_SYNC a0_dma_0_un1_n inst_VPA_D a0_dma_0_un0_n \ -# inst_CLK_000_D0 CLK_OUT_INTreg bg_000_0_un3_n inst_CLK_000_D1 bg_000_0_un1_n \ -# inst_CLK_000_D2 bg_000_0_un0_n inst_CLK_000_D5 IPL_030DFFSH_0_reg inst_CLK_OUT_PRE \ -# inst_BGACK_030_INT_D IPL_030DFFSH_1_reg vcc_n_n gnd_n_n IPL_030DFFSH_2_reg \ -# CLK_CNT_P_0_ SM_AMIGA_5_ ipl_c_0__n inst_CLK_000_D4 SM_AMIGA_7_ ipl_c_1__n \ -# SM_AMIGA_1_ SM_AMIGA_0_ ipl_c_2__n SM_AMIGA_6_ inst_AS_000_DMA inst_AS_000_INT \ -# dsack_c_1__n inst_UDS_000_INT inst_LDS_000_INT DTACK_c inst_DSACK1_INT \ -# inst_CLK_000_D3 state_machine_un59_bgack_030_int_n SM_AMIGA_3_ \ -# state_machine_un6_bgack_000_n inst_DS_000_DMA SIZE_DMA_0_ SIZE_DMA_1_ RST_c \ -# inst_A0_DMA SM_AMIGA_4_ RESETDFFRHreg SM_AMIGA_2_ state_machine_un10_bg_030_n RW_c \ -# un1_AS_030_000_SYNC_1_sqmuxa_1 SIZE_DMA_0_sqmuxa fc_c_0__n \ -# state_machine_a0_dma_4_n state_machine_ds_000_dma_5_n fc_c_1__n \ -# state_machine_lds_000_int_7_n state_machine_uds_000_int_7_n \ -# AMIGA_BUS_ENABLEDFFSHreg AMIGA_BUS_DATA_DIR_c N_88_0 N_86_0 A0_DMA_0_sqmuxa_i_0_0 \ -# N_83_i AS_030_000_SYNC_i N_81_i N_80_i DS_030_c_i N_79_i N_172_i \ -# un1_AS_030_000_SYNC_1_sqmuxa_1_0 CLK_030_c_i N_77_i N_174_i N_76_0 CLK_OUT_PRE_0 \ -# N_74_i CLK_000_D1_i N_73_i sm_amiga_i_1__n cpu_est_0_ N_72_i cpu_est_1_ N_171_i \ -# cpu_est_2_ N_66_i cpu_est_3_reg AS_030_c_i N_65_i N_64_i N_63_i N_167_i \ -# cpu_est_ns_1__n N_168_i cpu_est_ns_2__n cpu_est_ns_e_0_0__n A0_DMA_0_sqmuxa_i_0 \ -# N_163_i N_224 N_164_i N_225 N_165_i N_226 sm_amiga_ns_e_0_0__n N_227 N_160_i N_228 \ -# N_161_i N_31 N_162_i N_33 sm_amiga_ns_e_0_1__n N_35 N_98_i N_37 N_159_i N_39 \ -# cpu_est_ns_0_2__n N_158_i N_63 state_machine_amiga_bus_enable_6_iv_i_n N_64 N_157_i \ -# N_65 state_machine_ds_000_dma_5_0_n N_66 N_155_i N_67 N_156_i N_72 \ -# AMIGA_BUS_DATA_DIR_c_0 N_73 N_153_i N_74 N_154_i N_76 N_177_i N_80 N_176_i N_81 N_179_i \ -# N_83 cpu_est_ns_0_1__n N_86 N_152_i N_88 N_98 N_151_i N_108 N_109 N_150_i N_126 N_197_i \ -# N_231 N_232 N_148_i N_233 N_149_i N_234 sm_amiga_ns_e_0_5__n N_235 N_146_i N_236 N_147_i \ -# N_237 N_46_0 N_239 N_145_i N_240 N_198_i N_241 N_144 N_67_i N_145 \ -# state_machine_uds_000_int_7_0_n N_146 N_144_i N_147 \ -# state_machine_lds_000_int_7_0_n N_148 N_96_i_i N_149 N_240_i N_150 N_241_i N_151 \ -# N_39_0 N_152 N_237_i N_153 N_239_i N_154 N_37_0 N_155 N_236_i N_156 N_35_0 N_157 N_235_i \ -# N_158 N_33_0 N_159 N_175_i N_160 N_31_0 N_161 N_228_0 N_162 BG_030_c_i N_163 N_233_i N_164 \ -# state_machine_un10_bg_030_0_n N_165 N_227_0 N_166 N_226_0 N_167 N_108_i N_168 N_109_i \ -# N_171 N_225_0 N_172 state_machine_un6_bgack_000_0_n N_173 N_224_0 N_174 CLK_000_D2_i \ -# N_175 state_machine_un59_bgack_030_int_0_n N_176 N_253_1 N_179 N_253_2 N_197 N_263_1 \ -# N_198 N_263_2 un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 N_263_3 cpu_est_ns_0_0_x2_1_ \ -# N_263_4 N_236_1 N_263_5 N_253 N_263_6 N_263 N_74_i_1 VMA_INT_i N_74_i_2 VPA_D_i N_74_i_3 \ -# DTACK_i N_74_i_4 LDS_000_i N_74_i_5 AS_000_i N_83_i_1 cpu_est_i_0__n N_83_i_2 \ -# sm_amiga_i_4__n A0_DMA_0_sqmuxa_i_0_0_1 BGACK_030_INT_i \ -# state_machine_a0_dma_4_1_n sm_amiga_i_5__n state_machine_a0_dma_4_2_n \ -# cpu_est_i_3__n N_236_1_0 CLK_000_D0_i N_234_1 CLK_000_D4_i N_234_2 cpu_est_i_1__n \ -# N_233_1 UDS_000_i N_231_1 CLK_000_D5_i N_231_2 nEXP_SPACE_i N_231_3 AS_000_DMA_i \ -# sm_amiga_ns_e_0_1_0__n RW_i sm_amiga_ns_e_0_1_1__n sm_amiga_i_3__n \ -# cpu_est_ns_0_1_1__n sm_amiga_i_0__n N_44_i_1 A0_i \ -# state_machine_uds_000_int_7_0_1_n size_i_1__n state_machine_lds_000_int_7_0_1_n \ -# a_i_30__n N_39_0_1 a_i_31__n N_37_0_1 a_i_28__n N_166_1 a_i_29__n N_164_1 a_i_26__n \ -# N_156_1 a_i_27__n N_144_1 a_i_24__n N_240_1 a_i_25__n N_239_1 a_i_19__n N_237_1 \ -# a_i_16__n SIZE_DMA_0_sqmuxa_1 a_i_18__n N_232_1 RST_i N_109_1 \ -# cpu_est_ns_0_0_m3_2__un3_n SIZE_DMA_0_sqmuxa_i cpu_est_ns_0_0_m3_2__un1_n N_231_i \ -# cpu_est_ns_0_0_m3_2__un0_n N_126_i state_machine_lds_000_int_7_0_m3_un3_n N_232_i \ -# state_machine_lds_000_int_7_0_m3_un1_n N_234_i \ -# state_machine_lds_000_int_7_0_m3_un0_n FPU_CS_INT_i cpu_estse_0_un3_n AS_030_c \ -# cpu_estse_0_un1_n cpu_estse_0_un0_n AS_000_c cpu_estse_1_un3_n cpu_estse_1_un1_n \ -# DS_030_c cpu_estse_1_un0_n cpu_estse_2_un3_n UDS_000_c cpu_estse_2_un1_n \ -# cpu_estse_2_un0_n LDS_000_c dsack1_int_0_un3_n dsack1_int_0_un1_n size_c_0__n \ -# dsack1_int_0_un0_n as_000_dma_0_un3_n size_c_1__n as_000_dma_0_un1_n \ -# as_000_dma_0_un0_n a_c_16__n as_000_int_0_un3_n as_000_int_0_un1_n a_c_17__n \ -# as_000_int_0_un0_n vpa_sync_0_un3_n a_c_18__n vpa_sync_0_un1_n vpa_sync_0_un0_n \ -# a_c_19__n vma_int_0_un3_n vma_int_0_un1_n a_c_20__n vma_int_0_un0_n \ -# bgack_030_int_0_un3_n a_c_21__n bgack_030_int_0_un1_n bgack_030_int_0_un0_n \ -# a_c_22__n size_dma_0_0__un3_n size_dma_0_0__un1_n a_c_23__n size_dma_0_0__un0_n \ -# size_dma_0_1__un3_n a_c_24__n size_dma_0_1__un1_n size_dma_0_1__un0_n a_c_25__n \ -# ipl_030_0_0__un3_n ipl_030_0_0__un1_n a_c_26__n ipl_030_0_0__un0_n \ -# ipl_030_0_1__un3_n a_c_27__n ipl_030_0_1__un1_n ipl_030_0_1__un0_n a_c_28__n \ -# ipl_030_0_2__un3_n ipl_030_0_2__un1_n a_c_29__n ipl_030_0_2__un0_n \ -# amiga_bus_enable_0_un3_n a_c_30__n amiga_bus_enable_0_un1_n \ -# amiga_bus_enable_0_un0_n a_c_31__n uds_000_int_0_un3_n uds_000_int_0_un1_n A0_c \ -# uds_000_int_0_un0_n lds_000_int_0_un3_n nEXP_SPACE_c lds_000_int_0_un1_n \ -# lds_000_int_0_un0_n as_030_000_sync_0_un3_n +#$ PINS 59 A_21_ A_20_ SIZE_1_ A_19_ A_18_ A_31_ A_17_ A_16_ IPL_030_2_ IPL_030_1_ \ +# IPL_030_0_ IPL_2_ IPL_1_ IPL_0_ DSACK_1_ DSACK_0_ FC_0_ FC_1_ AS_030 AS_000 DS_030 \ +# UDS_000 LDS_000 A0 nEXP_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 \ +# CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS DTACK AVEC AVEC_EXP E VPA VMA RST RESET RW \ +# AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ \ +# A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ +#$ NODES 405 CLK_030_c CLK_000_c CLK_OSZI_c inst_BGACK_030_INTreg CLK_OUT_INTreg \ +# inst_FPU_CS_INTreg inst_VMA_INTreg inst_AS_030_000_SYNC IPL_030DFFSH_0_reg \ +# inst_BGACK_030_INT_D inst_AS_000_DMA IPL_030DFFSH_1_reg inst_VPA_D \ +# inst_CLK_OUT_PRE_50_D IPL_030DFFSH_2_reg inst_CLK_000_D0 inst_CLK_000_D1 \ +# ipl_c_0__n inst_CLK_000_D2 inst_CLK_000_D4 ipl_c_1__n inst_DTACK_D0 \ +# inst_CLK_OUT_PRE_50 ipl_c_2__n inst_CLK_OUT_PRE_25 vcc_n_n gnd_n_n dsack_c_1__n \ +# state_machine_un13_clk_000_d0_n inst_AS_000_INT SM_AMIGA_1_ SM_AMIGA_0_ \ +# SM_AMIGA_6_ SM_AMIGA_5_ inst_UDS_000_INT inst_LDS_000_INT inst_DSACK1_INT \ +# clk_un3_clk_out_pre_50_n RST_c inst_CLK_000_D3 inst_CLK_030_H RESETDFFRHreg \ +# state_machine_un6_bgack_000_n state_machine_un15_clk_000_d0_n RW_c \ +# inst_DS_000_DMA SIZE_DMA_0_ fc_c_0__n SIZE_DMA_1_ inst_A0_DMA fc_c_1__n SM_AMIGA_7_ \ +# un1_AMIGA_BUS_ENABLE_1_sqmuxa_2 AMIGA_BUS_ENABLEDFFSHreg SM_AMIGA_4_ \ +# AMIGA_BUS_DATA_DIR_c state_machine_ds_000_dma_3_n SM_AMIGA_3_ SM_AMIGA_2_ \ +# cpu_est_ns_0_1__n state_machine_un10_bg_030_n N_134_i \ +# state_machine_lds_000_int_7_n N_169_i state_machine_uds_000_int_7_n N_133_i \ +# N_167_i N_51_0 N_140_i N_202_0 N_86_0 N_171_i un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0 \ +# N_82_i sm_amiga_i_1__n N_78_i N_170_i N_77_0 CLK_000_D1_i CLK_OUT_PRE_25_0 N_76_i \ +# N_74_i N_72_0 AS_030_000_SYNC_i CLK_000_D2_i \ +# state_machine_un8_bgack_030_int_i_0_0_n cpu_est_0_ N_69_i cpu_est_1_ AS_030_c_i \ +# cpu_est_2_ N_65_i cpu_est_3_reg N_64_i N_62_i N_152_i N_153_i cpu_est_ns_1__n N_61_0 \ +# cpu_est_ns_2__n N_150_i state_machine_un8_bgack_030_int_i_0_n N_148_i N_197 N_149_i \ +# N_198 N_199 N_123_i N_200 N_145_i N_201 N_146_i sm_amiga_ns_0_0__n N_51 N_142_i N_53 \ +# N_143_i N_61 N_144_i N_62 cpu_est_ns_0_2__n N_64 N_141_i N_65 N_53_0 N_66 N_139_i N_69 \ +# state_machine_amiga_bus_enable_4_iv_i_n N_72 N_138_i N_74 N_48_i N_76 N_136_i N_77 \ +# N_137_i N_78 AMIGA_BUS_DATA_DIR_c_0 N_82 N_135_i N_86 N_168_i N_202 N_151_i N_203 \ +# N_132_i N_205 N_164_i N_206 N_115 N_130_i N_116 N_131_i N_117 N_41_0 N_118 N_128_i N_120 \ +# N_129_i N_121 sm_amiga_ns_0_5__n N_122 N_126_i N_123 N_127_i N_124 N_125 N_125_i N_126 \ +# N_127 N_124_i N_128 N_129 N_122_i N_130 N_131 N_172_i N_132 \ +# state_machine_size_dma_4_0_1__n N_133 state_machine_ds_000_dma_3_0_n N_134 N_66_i \ +# N_135 N_120_i N_136 state_machine_lds_000_int_7_0_n N_137 \ +# state_machine_uds_000_int_7_0_n N_138 N_118_i N_139 N_201_0 N_140 N_117_i N_141 \ +# N_200_0 N_142 N_115_i N_143 N_116_i N_144 N_199_0 N_145 BG_030_c_i N_146 N_206_i N_147 \ +# state_machine_un10_bg_030_0_n N_148 N_198_0 N_149 N_197_0 N_150 N_203_i N_152 \ +# state_machine_un13_clk_000_d0_i_n N_153 state_machine_un15_clk_000_d0_0_n N_164 \ +# state_machine_un6_bgack_000_0_n N_167 N_225_1 N_168 N_225_2 N_169 N_225_3 N_170 \ +# N_225_4 N_171 N_225_5 N_172 N_225_6 N_173 N_228_1 N_225 N_228_2 N_228 N_69_i_1 \ +# CLK_000_D0_i N_69_i_2 BGACK_030_INT_i N_69_i_3 CLK_030_i N_69_i_4 cpu_est_i_3__n \ +# N_69_i_5 sm_amiga_i_6__n state_machine_un8_bgack_030_int_i_0_0_1_n nEXP_SPACE_i \ +# N_72_0_1 CLK_000_D4_i N_51_0_1 sm_amiga_i_5__n N_51_0_2 sm_amiga_i_4__n \ +# cpu_est_ns_0_1_1__n AS_000_i cpu_est_ns_0_2_1__n LDS_000_i N_128_1 UDS_000_i N_128_2 \ +# cpu_est_i_1__n N_118_1 cpu_est_i_0__n N_118_2 DTACK_D0_i N_118_3 VMA_INT_i N_206_1 \ +# VPA_D_i N_206_2 AS_000_DMA_i sm_amiga_ns_0_1_0__n CLK_030_H_i cpu_est_ns_0_1_2__n \ +# RW_i N_53_0_1 cpu_est_i_2__n N_43_i_1 sm_amiga_i_0__n \ +# state_machine_lds_000_int_7_0_1_n sm_amiga_i_3__n \ +# state_machine_uds_000_int_7_0_1_n sm_amiga_i_7__n N_199_0_1 A0_i N_152_1 \ +# size_i_1__n N_147_1 DS_030_i N_139_1 a_i_19__n N_137_1 a_i_16__n N_127_1 a_i_18__n \ +# N_120_1 a_i_30__n state_machine_a0_dma_2_1_n a_i_31__n N_116_1 a_i_28__n N_115_1 \ +# a_i_29__n state_machine_un13_clk_000_d0_1_n a_i_26__n N_203_1 a_i_27__n \ +# state_machine_uds_000_int_7_0_m3_un3_n a_i_24__n \ +# state_machine_uds_000_int_7_0_m3_un1_n a_i_25__n \ +# state_machine_uds_000_int_7_0_m3_un0_n RST_i dsack1_int_0_un3_n \ +# dsack1_int_0_un1_n dsack1_int_0_un0_n N_205_i vma_int_0_un3_n FPU_CS_INT_i \ +# vma_int_0_un1_n CLK_OUT_PRE_50_D_i vma_int_0_un0_n AS_030_c bgack_030_int_0_un3_n \ +# bgack_030_int_0_un1_n AS_000_c bgack_030_int_0_un0_n ipl_030_0_0__un3_n DS_030_c \ +# ipl_030_0_0__un1_n ipl_030_0_0__un0_n UDS_000_c ipl_030_0_1__un3_n \ +# ipl_030_0_1__un1_n LDS_000_c ipl_030_0_1__un0_n ipl_030_0_2__un3_n size_c_0__n \ +# ipl_030_0_2__un1_n ipl_030_0_2__un0_n size_c_1__n cpu_estse_0_un3_n \ +# cpu_estse_0_un1_n a_c_16__n cpu_estse_0_un0_n cpu_estse_1_un3_n a_c_17__n \ +# cpu_estse_1_un1_n cpu_estse_1_un0_n a_c_18__n cpu_estse_2_un3_n cpu_estse_2_un1_n \ +# a_c_19__n cpu_estse_2_un0_n amiga_bus_enable_0_un3_n a_c_20__n \ +# amiga_bus_enable_0_un1_n amiga_bus_enable_0_un0_n a_c_21__n \ +# as_030_000_sync_0_un3_n as_030_000_sync_0_un1_n a_c_22__n as_030_000_sync_0_un0_n \ +# clk_030_h_0_un3_n a_c_23__n clk_030_h_0_un1_n clk_030_h_0_un0_n a_c_24__n \ +# uds_000_int_0_un3_n uds_000_int_0_un1_n a_c_25__n uds_000_int_0_un0_n \ +# lds_000_int_0_un3_n a_c_26__n lds_000_int_0_un1_n lds_000_int_0_un0_n a_c_27__n \ +# fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n a_c_28__n fpu_cs_int_0_un0_n bg_000_0_un3_n \ +# a_c_29__n bg_000_0_un1_n bg_000_0_un0_n a_c_30__n ds_000_dma_0_un3_n \ +# ds_000_dma_0_un1_n a_c_31__n ds_000_dma_0_un0_n as_000_dma_0_un3_n A0_c \ +# as_000_dma_0_un1_n as_000_dma_0_un0_n nEXP_SPACE_c as_000_int_0_un3_n \ +# as_000_int_0_un1_n as_000_int_0_un0_n BG_030_c BG_000DFFSHreg BGACK_000_c .model bus68030 .inputs A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF \ BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF VPA.BLIF RST.BLIF \ @@ -87,232 +84,222 @@ RW.BLIF A_30_.BLIF A_29_.BLIF A_28_.BLIF A_27_.BLIF A_26_.BLIF A_25_.BLIF \ A_24_.BLIF A_23_.BLIF A_22_.BLIF A_21_.BLIF A_20_.BLIF A_19_.BLIF A_18_.BLIF \ A_17_.BLIF A_16_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF SIZE_1_.BLIF \ DSACK_1_.BLIF AS_030.BLIF AS_000.BLIF DS_030.BLIF UDS_000.BLIF LDS_000.BLIF \ -A0.BLIF DTACK.BLIF SIZE_0_.BLIF DSACK_0_.BLIF BG_030_c.BLIF \ -as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF BG_000DFFSHreg.BLIF \ -ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF \ -BGACK_000_c.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un1_n.BLIF \ -inst_BGACK_030_INTreg.BLIF CLK_030_c.BLIF fpu_cs_int_0_un0_n.BLIF \ -inst_FPU_CS_INTreg.BLIF dtack_sync_0_un3_n.BLIF inst_VMA_INTreg.BLIF \ -CLK_000_c.BLIF dtack_sync_0_un1_n.BLIF inst_AS_030_000_SYNC.BLIF \ -dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.BLIF CLK_OSZI_c.BLIF \ -a0_dma_0_un3_n.BLIF inst_VPA_SYNC.BLIF a0_dma_0_un1_n.BLIF inst_VPA_D.BLIF \ -a0_dma_0_un0_n.BLIF inst_CLK_000_D0.BLIF CLK_OUT_INTreg.BLIF \ -bg_000_0_un3_n.BLIF inst_CLK_000_D1.BLIF bg_000_0_un1_n.BLIF \ -inst_CLK_000_D2.BLIF bg_000_0_un0_n.BLIF inst_CLK_000_D5.BLIF \ -IPL_030DFFSH_0_reg.BLIF inst_CLK_OUT_PRE.BLIF inst_BGACK_030_INT_D.BLIF \ -IPL_030DFFSH_1_reg.BLIF vcc_n_n.BLIF gnd_n_n.BLIF IPL_030DFFSH_2_reg.BLIF \ -CLK_CNT_P_0_.BLIF SM_AMIGA_5_.BLIF ipl_c_0__n.BLIF inst_CLK_000_D4.BLIF \ -SM_AMIGA_7_.BLIF ipl_c_1__n.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF \ -ipl_c_2__n.BLIF SM_AMIGA_6_.BLIF inst_AS_000_DMA.BLIF inst_AS_000_INT.BLIF \ -dsack_c_1__n.BLIF inst_UDS_000_INT.BLIF inst_LDS_000_INT.BLIF DTACK_c.BLIF \ -inst_DSACK1_INT.BLIF inst_CLK_000_D3.BLIF \ -state_machine_un59_bgack_030_int_n.BLIF SM_AMIGA_3_.BLIF \ -state_machine_un6_bgack_000_n.BLIF inst_DS_000_DMA.BLIF SIZE_DMA_0_.BLIF \ -SIZE_DMA_1_.BLIF RST_c.BLIF inst_A0_DMA.BLIF SM_AMIGA_4_.BLIF \ -RESETDFFRHreg.BLIF SM_AMIGA_2_.BLIF state_machine_un10_bg_030_n.BLIF RW_c.BLIF \ -un1_AS_030_000_SYNC_1_sqmuxa_1.BLIF SIZE_DMA_0_sqmuxa.BLIF fc_c_0__n.BLIF \ -state_machine_a0_dma_4_n.BLIF state_machine_ds_000_dma_5_n.BLIF fc_c_1__n.BLIF \ -state_machine_lds_000_int_7_n.BLIF state_machine_uds_000_int_7_n.BLIF \ -AMIGA_BUS_ENABLEDFFSHreg.BLIF AMIGA_BUS_DATA_DIR_c.BLIF N_88_0.BLIF \ -N_86_0.BLIF A0_DMA_0_sqmuxa_i_0_0.BLIF N_83_i.BLIF AS_030_000_SYNC_i.BLIF \ -N_81_i.BLIF N_80_i.BLIF DS_030_c_i.BLIF N_79_i.BLIF N_172_i.BLIF \ -un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF CLK_030_c_i.BLIF N_77_i.BLIF \ -N_174_i.BLIF N_76_0.BLIF CLK_OUT_PRE_0.BLIF N_74_i.BLIF CLK_000_D1_i.BLIF \ -N_73_i.BLIF sm_amiga_i_1__n.BLIF cpu_est_0_.BLIF N_72_i.BLIF cpu_est_1_.BLIF \ -N_171_i.BLIF cpu_est_2_.BLIF N_66_i.BLIF cpu_est_3_reg.BLIF AS_030_c_i.BLIF \ -N_65_i.BLIF N_64_i.BLIF N_63_i.BLIF N_167_i.BLIF cpu_est_ns_1__n.BLIF \ -N_168_i.BLIF cpu_est_ns_2__n.BLIF cpu_est_ns_e_0_0__n.BLIF \ -A0_DMA_0_sqmuxa_i_0.BLIF N_163_i.BLIF N_224.BLIF N_164_i.BLIF N_225.BLIF \ -N_165_i.BLIF N_226.BLIF sm_amiga_ns_e_0_0__n.BLIF N_227.BLIF N_160_i.BLIF \ -N_228.BLIF N_161_i.BLIF N_31.BLIF N_162_i.BLIF N_33.BLIF \ -sm_amiga_ns_e_0_1__n.BLIF N_35.BLIF N_98_i.BLIF N_37.BLIF N_159_i.BLIF \ -N_39.BLIF cpu_est_ns_0_2__n.BLIF N_158_i.BLIF N_63.BLIF \ -state_machine_amiga_bus_enable_6_iv_i_n.BLIF N_64.BLIF N_157_i.BLIF N_65.BLIF \ -state_machine_ds_000_dma_5_0_n.BLIF N_66.BLIF N_155_i.BLIF N_67.BLIF \ -N_156_i.BLIF N_72.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF N_73.BLIF N_153_i.BLIF \ -N_74.BLIF N_154_i.BLIF N_76.BLIF N_177_i.BLIF N_80.BLIF N_176_i.BLIF N_81.BLIF \ -N_179_i.BLIF N_83.BLIF cpu_est_ns_0_1__n.BLIF N_86.BLIF N_152_i.BLIF N_88.BLIF \ -N_98.BLIF N_151_i.BLIF N_108.BLIF N_109.BLIF N_150_i.BLIF N_126.BLIF \ -N_197_i.BLIF N_231.BLIF N_232.BLIF N_148_i.BLIF N_233.BLIF N_149_i.BLIF \ -N_234.BLIF sm_amiga_ns_e_0_5__n.BLIF N_235.BLIF N_146_i.BLIF N_236.BLIF \ -N_147_i.BLIF N_237.BLIF N_46_0.BLIF N_239.BLIF N_145_i.BLIF N_240.BLIF \ -N_198_i.BLIF N_241.BLIF N_144.BLIF N_67_i.BLIF N_145.BLIF \ -state_machine_uds_000_int_7_0_n.BLIF N_146.BLIF N_144_i.BLIF N_147.BLIF \ -state_machine_lds_000_int_7_0_n.BLIF N_148.BLIF N_96_i_i.BLIF N_149.BLIF \ -N_240_i.BLIF N_150.BLIF N_241_i.BLIF N_151.BLIF N_39_0.BLIF N_152.BLIF \ -N_237_i.BLIF N_153.BLIF N_239_i.BLIF N_154.BLIF N_37_0.BLIF N_155.BLIF \ -N_236_i.BLIF N_156.BLIF N_35_0.BLIF N_157.BLIF N_235_i.BLIF N_158.BLIF \ -N_33_0.BLIF N_159.BLIF N_175_i.BLIF N_160.BLIF N_31_0.BLIF N_161.BLIF \ -N_228_0.BLIF N_162.BLIF BG_030_c_i.BLIF N_163.BLIF N_233_i.BLIF N_164.BLIF \ -state_machine_un10_bg_030_0_n.BLIF N_165.BLIF N_227_0.BLIF N_166.BLIF \ -N_226_0.BLIF N_167.BLIF N_108_i.BLIF N_168.BLIF N_109_i.BLIF N_171.BLIF \ -N_225_0.BLIF N_172.BLIF state_machine_un6_bgack_000_0_n.BLIF N_173.BLIF \ -N_224_0.BLIF N_174.BLIF CLK_000_D2_i.BLIF N_175.BLIF \ -state_machine_un59_bgack_030_int_0_n.BLIF N_176.BLIF N_253_1.BLIF N_179.BLIF \ -N_253_2.BLIF N_197.BLIF N_263_1.BLIF N_198.BLIF N_263_2.BLIF \ -un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2.BLIF N_263_3.BLIF \ -cpu_est_ns_0_0_x2_1_.BLIF N_263_4.BLIF N_236_1.BLIF N_263_5.BLIF N_253.BLIF \ -N_263_6.BLIF N_263.BLIF N_74_i_1.BLIF VMA_INT_i.BLIF N_74_i_2.BLIF \ -VPA_D_i.BLIF N_74_i_3.BLIF DTACK_i.BLIF N_74_i_4.BLIF LDS_000_i.BLIF \ -N_74_i_5.BLIF AS_000_i.BLIF N_83_i_1.BLIF cpu_est_i_0__n.BLIF N_83_i_2.BLIF \ -sm_amiga_i_4__n.BLIF A0_DMA_0_sqmuxa_i_0_0_1.BLIF BGACK_030_INT_i.BLIF \ -state_machine_a0_dma_4_1_n.BLIF sm_amiga_i_5__n.BLIF \ -state_machine_a0_dma_4_2_n.BLIF cpu_est_i_3__n.BLIF N_236_1_0.BLIF \ -CLK_000_D0_i.BLIF N_234_1.BLIF CLK_000_D4_i.BLIF N_234_2.BLIF \ -cpu_est_i_1__n.BLIF N_233_1.BLIF UDS_000_i.BLIF N_231_1.BLIF CLK_000_D5_i.BLIF \ -N_231_2.BLIF nEXP_SPACE_i.BLIF N_231_3.BLIF AS_000_DMA_i.BLIF \ -sm_amiga_ns_e_0_1_0__n.BLIF RW_i.BLIF sm_amiga_ns_e_0_1_1__n.BLIF \ -sm_amiga_i_3__n.BLIF cpu_est_ns_0_1_1__n.BLIF sm_amiga_i_0__n.BLIF \ -N_44_i_1.BLIF A0_i.BLIF state_machine_uds_000_int_7_0_1_n.BLIF \ -size_i_1__n.BLIF state_machine_lds_000_int_7_0_1_n.BLIF a_i_30__n.BLIF \ -N_39_0_1.BLIF a_i_31__n.BLIF N_37_0_1.BLIF a_i_28__n.BLIF N_166_1.BLIF \ -a_i_29__n.BLIF N_164_1.BLIF a_i_26__n.BLIF N_156_1.BLIF a_i_27__n.BLIF \ -N_144_1.BLIF a_i_24__n.BLIF N_240_1.BLIF a_i_25__n.BLIF N_239_1.BLIF \ -a_i_19__n.BLIF N_237_1.BLIF a_i_16__n.BLIF SIZE_DMA_0_sqmuxa_1.BLIF \ -a_i_18__n.BLIF N_232_1.BLIF RST_i.BLIF N_109_1.BLIF \ -cpu_est_ns_0_0_m3_2__un3_n.BLIF SIZE_DMA_0_sqmuxa_i.BLIF \ -cpu_est_ns_0_0_m3_2__un1_n.BLIF N_231_i.BLIF cpu_est_ns_0_0_m3_2__un0_n.BLIF \ -N_126_i.BLIF state_machine_lds_000_int_7_0_m3_un3_n.BLIF N_232_i.BLIF \ -state_machine_lds_000_int_7_0_m3_un1_n.BLIF N_234_i.BLIF \ -state_machine_lds_000_int_7_0_m3_un0_n.BLIF FPU_CS_INT_i.BLIF \ -cpu_estse_0_un3_n.BLIF AS_030_c.BLIF cpu_estse_0_un1_n.BLIF \ -cpu_estse_0_un0_n.BLIF AS_000_c.BLIF cpu_estse_1_un3_n.BLIF \ -cpu_estse_1_un1_n.BLIF DS_030_c.BLIF cpu_estse_1_un0_n.BLIF \ -cpu_estse_2_un3_n.BLIF UDS_000_c.BLIF cpu_estse_2_un1_n.BLIF \ -cpu_estse_2_un0_n.BLIF LDS_000_c.BLIF dsack1_int_0_un3_n.BLIF \ -dsack1_int_0_un1_n.BLIF size_c_0__n.BLIF dsack1_int_0_un0_n.BLIF \ -as_000_dma_0_un3_n.BLIF size_c_1__n.BLIF as_000_dma_0_un1_n.BLIF \ -as_000_dma_0_un0_n.BLIF a_c_16__n.BLIF as_000_int_0_un3_n.BLIF \ -as_000_int_0_un1_n.BLIF a_c_17__n.BLIF as_000_int_0_un0_n.BLIF \ -vpa_sync_0_un3_n.BLIF a_c_18__n.BLIF vpa_sync_0_un1_n.BLIF \ -vpa_sync_0_un0_n.BLIF a_c_19__n.BLIF vma_int_0_un3_n.BLIF vma_int_0_un1_n.BLIF \ -a_c_20__n.BLIF vma_int_0_un0_n.BLIF bgack_030_int_0_un3_n.BLIF a_c_21__n.BLIF \ -bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF a_c_22__n.BLIF \ -size_dma_0_0__un3_n.BLIF size_dma_0_0__un1_n.BLIF a_c_23__n.BLIF \ -size_dma_0_0__un0_n.BLIF size_dma_0_1__un3_n.BLIF a_c_24__n.BLIF \ -size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF a_c_25__n.BLIF \ -ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un1_n.BLIF a_c_26__n.BLIF \ -ipl_030_0_0__un0_n.BLIF ipl_030_0_1__un3_n.BLIF a_c_27__n.BLIF \ -ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF a_c_28__n.BLIF \ -ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un1_n.BLIF a_c_29__n.BLIF \ -ipl_030_0_2__un0_n.BLIF amiga_bus_enable_0_un3_n.BLIF a_c_30__n.BLIF \ -amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF a_c_31__n.BLIF \ -uds_000_int_0_un3_n.BLIF uds_000_int_0_un1_n.BLIF A0_c.BLIF \ -uds_000_int_0_un0_n.BLIF lds_000_int_0_un3_n.BLIF nEXP_SPACE_c.BLIF \ -lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF as_030_000_sync_0_un3_n.BLIF \ -AS_030.PIN.BLIF AS_000.PIN.BLIF DS_030.PIN.BLIF UDS_000.PIN.BLIF \ -LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF A0.PIN.BLIF \ -DSACK_1_.PIN.BLIF DTACK.PIN.BLIF +A0.BLIF DTACK.BLIF SIZE_0_.BLIF DSACK_0_.BLIF CLK_030_c.BLIF CLK_000_c.BLIF \ +CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.BLIF CLK_OUT_INTreg.BLIF \ +inst_FPU_CS_INTreg.BLIF inst_VMA_INTreg.BLIF inst_AS_030_000_SYNC.BLIF \ +IPL_030DFFSH_0_reg.BLIF inst_BGACK_030_INT_D.BLIF inst_AS_000_DMA.BLIF \ +IPL_030DFFSH_1_reg.BLIF inst_VPA_D.BLIF inst_CLK_OUT_PRE_50_D.BLIF \ +IPL_030DFFSH_2_reg.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \ +ipl_c_0__n.BLIF inst_CLK_000_D2.BLIF inst_CLK_000_D4.BLIF ipl_c_1__n.BLIF \ +inst_DTACK_D0.BLIF inst_CLK_OUT_PRE_50.BLIF ipl_c_2__n.BLIF \ +inst_CLK_OUT_PRE_25.BLIF vcc_n_n.BLIF gnd_n_n.BLIF dsack_c_1__n.BLIF \ +state_machine_un13_clk_000_d0_n.BLIF inst_AS_000_INT.BLIF SM_AMIGA_1_.BLIF \ +SM_AMIGA_0_.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_5_.BLIF inst_UDS_000_INT.BLIF \ +inst_LDS_000_INT.BLIF inst_DSACK1_INT.BLIF clk_un3_clk_out_pre_50_n.BLIF \ +RST_c.BLIF inst_CLK_000_D3.BLIF inst_CLK_030_H.BLIF RESETDFFRHreg.BLIF \ +state_machine_un6_bgack_000_n.BLIF state_machine_un15_clk_000_d0_n.BLIF \ +RW_c.BLIF inst_DS_000_DMA.BLIF SIZE_DMA_0_.BLIF fc_c_0__n.BLIF \ +SIZE_DMA_1_.BLIF inst_A0_DMA.BLIF fc_c_1__n.BLIF SM_AMIGA_7_.BLIF \ +un1_AMIGA_BUS_ENABLE_1_sqmuxa_2.BLIF AMIGA_BUS_ENABLEDFFSHreg.BLIF \ +SM_AMIGA_4_.BLIF AMIGA_BUS_DATA_DIR_c.BLIF state_machine_ds_000_dma_3_n.BLIF \ +SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF cpu_est_ns_0_1__n.BLIF \ +state_machine_un10_bg_030_n.BLIF N_134_i.BLIF \ +state_machine_lds_000_int_7_n.BLIF N_169_i.BLIF \ +state_machine_uds_000_int_7_n.BLIF N_133_i.BLIF N_167_i.BLIF N_51_0.BLIF \ +N_140_i.BLIF N_202_0.BLIF N_86_0.BLIF N_171_i.BLIF \ +un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0.BLIF N_82_i.BLIF sm_amiga_i_1__n.BLIF \ +N_78_i.BLIF N_170_i.BLIF N_77_0.BLIF CLK_000_D1_i.BLIF CLK_OUT_PRE_25_0.BLIF \ +N_76_i.BLIF N_74_i.BLIF N_72_0.BLIF AS_030_000_SYNC_i.BLIF CLK_000_D2_i.BLIF \ +state_machine_un8_bgack_030_int_i_0_0_n.BLIF cpu_est_0_.BLIF N_69_i.BLIF \ +cpu_est_1_.BLIF AS_030_c_i.BLIF cpu_est_2_.BLIF N_65_i.BLIF cpu_est_3_reg.BLIF \ +N_64_i.BLIF N_62_i.BLIF N_152_i.BLIF N_153_i.BLIF cpu_est_ns_1__n.BLIF \ +N_61_0.BLIF cpu_est_ns_2__n.BLIF N_150_i.BLIF \ +state_machine_un8_bgack_030_int_i_0_n.BLIF N_148_i.BLIF N_197.BLIF \ +N_149_i.BLIF N_198.BLIF N_199.BLIF N_123_i.BLIF N_200.BLIF N_145_i.BLIF \ +N_201.BLIF N_146_i.BLIF sm_amiga_ns_0_0__n.BLIF N_51.BLIF N_142_i.BLIF \ +N_53.BLIF N_143_i.BLIF N_61.BLIF N_144_i.BLIF N_62.BLIF cpu_est_ns_0_2__n.BLIF \ +N_64.BLIF N_141_i.BLIF N_65.BLIF N_53_0.BLIF N_66.BLIF N_139_i.BLIF N_69.BLIF \ +state_machine_amiga_bus_enable_4_iv_i_n.BLIF N_72.BLIF N_138_i.BLIF N_74.BLIF \ +N_48_i.BLIF N_76.BLIF N_136_i.BLIF N_77.BLIF N_137_i.BLIF N_78.BLIF \ +AMIGA_BUS_DATA_DIR_c_0.BLIF N_82.BLIF N_135_i.BLIF N_86.BLIF N_168_i.BLIF \ +N_202.BLIF N_151_i.BLIF N_203.BLIF N_132_i.BLIF N_205.BLIF N_164_i.BLIF \ +N_206.BLIF N_115.BLIF N_130_i.BLIF N_116.BLIF N_131_i.BLIF N_117.BLIF \ +N_41_0.BLIF N_118.BLIF N_128_i.BLIF N_120.BLIF N_129_i.BLIF N_121.BLIF \ +sm_amiga_ns_0_5__n.BLIF N_122.BLIF N_126_i.BLIF N_123.BLIF N_127_i.BLIF \ +N_124.BLIF N_125.BLIF N_125_i.BLIF N_126.BLIF N_127.BLIF N_124_i.BLIF \ +N_128.BLIF N_129.BLIF N_122_i.BLIF N_130.BLIF N_131.BLIF N_172_i.BLIF \ +N_132.BLIF state_machine_size_dma_4_0_1__n.BLIF N_133.BLIF \ +state_machine_ds_000_dma_3_0_n.BLIF N_134.BLIF N_66_i.BLIF N_135.BLIF \ +N_120_i.BLIF N_136.BLIF state_machine_lds_000_int_7_0_n.BLIF N_137.BLIF \ +state_machine_uds_000_int_7_0_n.BLIF N_138.BLIF N_118_i.BLIF N_139.BLIF \ +N_201_0.BLIF N_140.BLIF N_117_i.BLIF N_141.BLIF N_200_0.BLIF N_142.BLIF \ +N_115_i.BLIF N_143.BLIF N_116_i.BLIF N_144.BLIF N_199_0.BLIF N_145.BLIF \ +BG_030_c_i.BLIF N_146.BLIF N_206_i.BLIF N_147.BLIF \ +state_machine_un10_bg_030_0_n.BLIF N_148.BLIF N_198_0.BLIF N_149.BLIF \ +N_197_0.BLIF N_150.BLIF N_203_i.BLIF N_152.BLIF \ +state_machine_un13_clk_000_d0_i_n.BLIF N_153.BLIF \ +state_machine_un15_clk_000_d0_0_n.BLIF N_164.BLIF \ +state_machine_un6_bgack_000_0_n.BLIF N_167.BLIF N_225_1.BLIF N_168.BLIF \ +N_225_2.BLIF N_169.BLIF N_225_3.BLIF N_170.BLIF N_225_4.BLIF N_171.BLIF \ +N_225_5.BLIF N_172.BLIF N_225_6.BLIF N_173.BLIF N_228_1.BLIF N_225.BLIF \ +N_228_2.BLIF N_228.BLIF N_69_i_1.BLIF CLK_000_D0_i.BLIF N_69_i_2.BLIF \ +BGACK_030_INT_i.BLIF N_69_i_3.BLIF CLK_030_i.BLIF N_69_i_4.BLIF \ +cpu_est_i_3__n.BLIF N_69_i_5.BLIF sm_amiga_i_6__n.BLIF \ +state_machine_un8_bgack_030_int_i_0_0_1_n.BLIF nEXP_SPACE_i.BLIF N_72_0_1.BLIF \ +CLK_000_D4_i.BLIF N_51_0_1.BLIF sm_amiga_i_5__n.BLIF N_51_0_2.BLIF \ +sm_amiga_i_4__n.BLIF cpu_est_ns_0_1_1__n.BLIF AS_000_i.BLIF \ +cpu_est_ns_0_2_1__n.BLIF LDS_000_i.BLIF N_128_1.BLIF UDS_000_i.BLIF \ +N_128_2.BLIF cpu_est_i_1__n.BLIF N_118_1.BLIF cpu_est_i_0__n.BLIF N_118_2.BLIF \ +DTACK_D0_i.BLIF N_118_3.BLIF VMA_INT_i.BLIF N_206_1.BLIF VPA_D_i.BLIF \ +N_206_2.BLIF AS_000_DMA_i.BLIF sm_amiga_ns_0_1_0__n.BLIF CLK_030_H_i.BLIF \ +cpu_est_ns_0_1_2__n.BLIF RW_i.BLIF N_53_0_1.BLIF cpu_est_i_2__n.BLIF \ +N_43_i_1.BLIF sm_amiga_i_0__n.BLIF state_machine_lds_000_int_7_0_1_n.BLIF \ +sm_amiga_i_3__n.BLIF state_machine_uds_000_int_7_0_1_n.BLIF \ +sm_amiga_i_7__n.BLIF N_199_0_1.BLIF A0_i.BLIF N_152_1.BLIF size_i_1__n.BLIF \ +N_147_1.BLIF DS_030_i.BLIF N_139_1.BLIF a_i_19__n.BLIF N_137_1.BLIF \ +a_i_16__n.BLIF N_127_1.BLIF a_i_18__n.BLIF N_120_1.BLIF a_i_30__n.BLIF \ +state_machine_a0_dma_2_1_n.BLIF a_i_31__n.BLIF N_116_1.BLIF a_i_28__n.BLIF \ +N_115_1.BLIF a_i_29__n.BLIF state_machine_un13_clk_000_d0_1_n.BLIF \ +a_i_26__n.BLIF N_203_1.BLIF a_i_27__n.BLIF \ +state_machine_uds_000_int_7_0_m3_un3_n.BLIF a_i_24__n.BLIF \ +state_machine_uds_000_int_7_0_m3_un1_n.BLIF a_i_25__n.BLIF \ +state_machine_uds_000_int_7_0_m3_un0_n.BLIF RST_i.BLIF dsack1_int_0_un3_n.BLIF \ +dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF N_205_i.BLIF \ +vma_int_0_un3_n.BLIF FPU_CS_INT_i.BLIF vma_int_0_un1_n.BLIF \ +CLK_OUT_PRE_50_D_i.BLIF vma_int_0_un0_n.BLIF AS_030_c.BLIF \ +bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un1_n.BLIF AS_000_c.BLIF \ +bgack_030_int_0_un0_n.BLIF ipl_030_0_0__un3_n.BLIF DS_030_c.BLIF \ +ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF UDS_000_c.BLIF \ +ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un1_n.BLIF LDS_000_c.BLIF \ +ipl_030_0_1__un0_n.BLIF ipl_030_0_2__un3_n.BLIF size_c_0__n.BLIF \ +ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF size_c_1__n.BLIF \ +cpu_estse_0_un3_n.BLIF cpu_estse_0_un1_n.BLIF a_c_16__n.BLIF \ +cpu_estse_0_un0_n.BLIF cpu_estse_1_un3_n.BLIF a_c_17__n.BLIF \ +cpu_estse_1_un1_n.BLIF cpu_estse_1_un0_n.BLIF a_c_18__n.BLIF \ +cpu_estse_2_un3_n.BLIF cpu_estse_2_un1_n.BLIF a_c_19__n.BLIF \ +cpu_estse_2_un0_n.BLIF amiga_bus_enable_0_un3_n.BLIF a_c_20__n.BLIF \ +amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF a_c_21__n.BLIF \ +as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un1_n.BLIF a_c_22__n.BLIF \ +as_030_000_sync_0_un0_n.BLIF clk_030_h_0_un3_n.BLIF a_c_23__n.BLIF \ +clk_030_h_0_un1_n.BLIF clk_030_h_0_un0_n.BLIF a_c_24__n.BLIF \ +uds_000_int_0_un3_n.BLIF uds_000_int_0_un1_n.BLIF a_c_25__n.BLIF \ +uds_000_int_0_un0_n.BLIF lds_000_int_0_un3_n.BLIF a_c_26__n.BLIF \ +lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF a_c_27__n.BLIF \ +fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un1_n.BLIF a_c_28__n.BLIF \ +fpu_cs_int_0_un0_n.BLIF bg_000_0_un3_n.BLIF a_c_29__n.BLIF bg_000_0_un1_n.BLIF \ +bg_000_0_un0_n.BLIF a_c_30__n.BLIF ds_000_dma_0_un3_n.BLIF \ +ds_000_dma_0_un1_n.BLIF a_c_31__n.BLIF ds_000_dma_0_un0_n.BLIF \ +as_000_dma_0_un3_n.BLIF A0_c.BLIF as_000_dma_0_un1_n.BLIF \ +as_000_dma_0_un0_n.BLIF nEXP_SPACE_c.BLIF as_000_int_0_un3_n.BLIF \ +as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF BG_030_c.BLIF \ +BG_000DFFSHreg.BLIF BGACK_000_c.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF \ +DS_030.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF \ +SIZE_1_.PIN.BLIF A0.PIN.BLIF DSACK_1_.PIN.BLIF DTACK.PIN.BLIF .outputs IPL_030_2_ BERR BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS AVEC \ AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ CIIN IPL_030_1_ IPL_030_0_ cpu_est_0_.D cpu_est_0_.C cpu_est_0_.AR \ cpu_est_1_.D cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.D cpu_est_2_.C \ -cpu_est_2_.AR cpu_est_3_reg.D cpu_est_3_reg.C cpu_est_3_reg.AR SM_AMIGA_1_.D \ -SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR \ +cpu_est_2_.AR cpu_est_3_reg.D cpu_est_3_reg.C cpu_est_3_reg.AR SM_AMIGA_0_.D \ +SM_AMIGA_0_.C SM_AMIGA_0_.AR SIZE_DMA_1_.D SIZE_DMA_1_.C SIZE_DMA_1_.AP \ IPL_030DFFSH_0_reg.D IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP \ IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP \ IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D \ SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR \ SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C \ SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D \ -SM_AMIGA_2_.C SM_AMIGA_2_.AR inst_AS_000_INT.D inst_AS_000_INT.C \ -inst_AS_000_INT.AP inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP \ -inst_VMA_INTreg.D inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_BGACK_030_INTreg.D \ -inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE.D \ -inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR SIZE_DMA_0_.D SIZE_DMA_0_.C \ -SIZE_DMA_0_.AP SIZE_DMA_1_.D SIZE_DMA_1_.C SIZE_DMA_1_.AP inst_DS_000_DMA.D \ -inst_DS_000_DMA.C inst_DS_000_DMA.AP inst_FPU_CS_INTreg.D inst_FPU_CS_INTreg.C \ -inst_FPU_CS_INTreg.AP inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP \ -inst_A0_DMA.D inst_A0_DMA.C inst_A0_DMA.AP BG_000DFFSHreg.D BG_000DFFSHreg.C \ -BG_000DFFSHreg.AP inst_DSACK1_INT.D inst_DSACK1_INT.C inst_DSACK1_INT.AP \ -inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_000_DMA.AP \ -AMIGA_BUS_ENABLEDFFSHreg.D AMIGA_BUS_ENABLEDFFSHreg.C \ -AMIGA_BUS_ENABLEDFFSHreg.AP inst_UDS_000_INT.D inst_UDS_000_INT.C \ -inst_UDS_000_INT.AP inst_LDS_000_INT.D inst_LDS_000_INT.C inst_LDS_000_INT.AP \ -inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP \ -inst_CLK_000_D4.D inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_CLK_000_D5.D \ -inst_CLK_000_D5.C inst_CLK_000_D5.AP inst_CLK_000_D3.D inst_CLK_000_D3.C \ -inst_CLK_000_D3.AP CLK_CNT_P_0_.D CLK_CNT_P_0_.C CLK_CNT_P_0_.AR \ -inst_CLK_000_D2.D inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D1.D \ -inst_CLK_000_D1.C inst_CLK_000_D1.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C \ -CLK_OUT_INTreg.AR inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C \ -inst_BGACK_030_INT_D.AP inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D0.AP \ -inst_VPA_D.D inst_VPA_D.C inst_VPA_D.AP RESETDFFRHreg.D RESETDFFRHreg.C \ -RESETDFFRHreg.AR SIZE_1_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 \ -DTACK SIZE_0_ DSACK_0_ BG_030_c as_030_000_sync_0_un1_n \ -as_030_000_sync_0_un0_n ds_000_dma_0_un3_n ds_000_dma_0_un1_n \ -ds_000_dma_0_un0_n BGACK_000_c fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n CLK_030_c \ -fpu_cs_int_0_un0_n dtack_sync_0_un3_n CLK_000_c dtack_sync_0_un1_n \ -dtack_sync_0_un0_n CLK_OSZI_c a0_dma_0_un3_n a0_dma_0_un1_n a0_dma_0_un0_n \ -bg_000_0_un3_n bg_000_0_un1_n bg_000_0_un0_n vcc_n_n gnd_n_n ipl_c_0__n \ -ipl_c_1__n ipl_c_2__n dsack_c_1__n DTACK_c state_machine_un59_bgack_030_int_n \ -state_machine_un6_bgack_000_n RST_c state_machine_un10_bg_030_n RW_c \ -un1_AS_030_000_SYNC_1_sqmuxa_1 SIZE_DMA_0_sqmuxa fc_c_0__n \ -state_machine_a0_dma_4_n state_machine_ds_000_dma_5_n fc_c_1__n \ -state_machine_lds_000_int_7_n state_machine_uds_000_int_7_n \ -AMIGA_BUS_DATA_DIR_c N_88_0 N_86_0 A0_DMA_0_sqmuxa_i_0_0 N_83_i \ -AS_030_000_SYNC_i N_81_i N_80_i DS_030_c_i N_79_i N_172_i \ -un1_AS_030_000_SYNC_1_sqmuxa_1_0 CLK_030_c_i N_77_i N_174_i N_76_0 N_74_i \ -CLK_000_D1_i N_73_i sm_amiga_i_1__n N_72_i N_171_i N_66_i AS_030_c_i N_65_i \ -N_64_i N_63_i N_167_i cpu_est_ns_1__n N_168_i cpu_est_ns_2__n \ -cpu_est_ns_e_0_0__n A0_DMA_0_sqmuxa_i_0 N_163_i N_224 N_164_i N_225 N_165_i \ -N_226 sm_amiga_ns_e_0_0__n N_227 N_160_i N_228 N_161_i N_31 N_162_i N_33 \ -sm_amiga_ns_e_0_1__n N_35 N_98_i N_37 N_159_i N_39 cpu_est_ns_0_2__n N_158_i \ -N_63 state_machine_amiga_bus_enable_6_iv_i_n N_64 N_157_i N_65 \ -state_machine_ds_000_dma_5_0_n N_66 N_155_i N_67 N_156_i N_72 \ -AMIGA_BUS_DATA_DIR_c_0 N_73 N_153_i N_74 N_154_i N_76 N_177_i N_80 N_176_i \ -N_81 N_179_i N_83 cpu_est_ns_0_1__n N_86 N_152_i N_88 N_98 N_151_i N_108 N_109 \ -N_150_i N_126 N_197_i N_231 N_232 N_148_i N_233 N_149_i N_234 \ -sm_amiga_ns_e_0_5__n N_235 N_146_i N_236 N_147_i N_237 N_46_0 N_239 N_145_i \ -N_240 N_198_i N_241 N_144 N_67_i N_145 state_machine_uds_000_int_7_0_n N_146 \ -N_144_i N_147 state_machine_lds_000_int_7_0_n N_148 N_96_i_i N_149 N_240_i \ -N_150 N_241_i N_151 N_39_0 N_152 N_237_i N_153 N_239_i N_154 N_37_0 N_155 \ -N_236_i N_156 N_35_0 N_157 N_235_i N_158 N_33_0 N_159 N_175_i N_160 N_31_0 \ -N_161 N_228_0 N_162 BG_030_c_i N_163 N_233_i N_164 \ -state_machine_un10_bg_030_0_n N_165 N_227_0 N_166 N_226_0 N_167 N_108_i N_168 \ -N_109_i N_171 N_225_0 N_172 state_machine_un6_bgack_000_0_n N_173 N_224_0 \ -N_174 CLK_000_D2_i N_175 state_machine_un59_bgack_030_int_0_n N_176 N_253_1 \ -N_179 N_253_2 N_197 N_263_1 N_198 N_263_2 N_263_3 N_263_4 N_236_1 N_263_5 \ -N_253 N_263_6 N_263 N_74_i_1 VMA_INT_i N_74_i_2 VPA_D_i N_74_i_3 DTACK_i \ -N_74_i_4 LDS_000_i N_74_i_5 AS_000_i N_83_i_1 cpu_est_i_0__n N_83_i_2 \ -sm_amiga_i_4__n A0_DMA_0_sqmuxa_i_0_0_1 BGACK_030_INT_i \ -state_machine_a0_dma_4_1_n sm_amiga_i_5__n state_machine_a0_dma_4_2_n \ -cpu_est_i_3__n N_236_1_0 CLK_000_D0_i N_234_1 CLK_000_D4_i N_234_2 \ -cpu_est_i_1__n N_233_1 UDS_000_i N_231_1 CLK_000_D5_i N_231_2 nEXP_SPACE_i \ -N_231_3 AS_000_DMA_i sm_amiga_ns_e_0_1_0__n RW_i sm_amiga_ns_e_0_1_1__n \ -sm_amiga_i_3__n cpu_est_ns_0_1_1__n sm_amiga_i_0__n N_44_i_1 A0_i \ -state_machine_uds_000_int_7_0_1_n size_i_1__n \ -state_machine_lds_000_int_7_0_1_n a_i_30__n N_39_0_1 a_i_31__n N_37_0_1 \ -a_i_28__n N_166_1 a_i_29__n N_164_1 a_i_26__n N_156_1 a_i_27__n N_144_1 \ -a_i_24__n N_240_1 a_i_25__n N_239_1 a_i_19__n N_237_1 a_i_16__n \ -SIZE_DMA_0_sqmuxa_1 a_i_18__n N_232_1 RST_i N_109_1 cpu_est_ns_0_0_m3_2__un3_n \ -SIZE_DMA_0_sqmuxa_i cpu_est_ns_0_0_m3_2__un1_n N_231_i \ -cpu_est_ns_0_0_m3_2__un0_n N_126_i state_machine_lds_000_int_7_0_m3_un3_n \ -N_232_i state_machine_lds_000_int_7_0_m3_un1_n N_234_i \ -state_machine_lds_000_int_7_0_m3_un0_n FPU_CS_INT_i cpu_estse_0_un3_n AS_030_c \ -cpu_estse_0_un1_n cpu_estse_0_un0_n AS_000_c cpu_estse_1_un3_n \ -cpu_estse_1_un1_n DS_030_c cpu_estse_1_un0_n cpu_estse_2_un3_n UDS_000_c \ -cpu_estse_2_un1_n cpu_estse_2_un0_n LDS_000_c dsack1_int_0_un3_n \ -dsack1_int_0_un1_n size_c_0__n dsack1_int_0_un0_n as_000_dma_0_un3_n \ -size_c_1__n as_000_dma_0_un1_n as_000_dma_0_un0_n a_c_16__n as_000_int_0_un3_n \ -as_000_int_0_un1_n a_c_17__n as_000_int_0_un0_n vpa_sync_0_un3_n a_c_18__n \ -vpa_sync_0_un1_n vpa_sync_0_un0_n a_c_19__n vma_int_0_un3_n vma_int_0_un1_n \ -a_c_20__n vma_int_0_un0_n bgack_030_int_0_un3_n a_c_21__n \ -bgack_030_int_0_un1_n bgack_030_int_0_un0_n a_c_22__n size_dma_0_0__un3_n \ -size_dma_0_0__un1_n a_c_23__n size_dma_0_0__un0_n size_dma_0_1__un3_n \ -a_c_24__n size_dma_0_1__un1_n size_dma_0_1__un0_n a_c_25__n ipl_030_0_0__un3_n \ -ipl_030_0_0__un1_n a_c_26__n ipl_030_0_0__un0_n ipl_030_0_1__un3_n a_c_27__n \ -ipl_030_0_1__un1_n ipl_030_0_1__un0_n a_c_28__n ipl_030_0_2__un3_n \ -ipl_030_0_2__un1_n a_c_29__n ipl_030_0_2__un0_n amiga_bus_enable_0_un3_n \ -a_c_30__n amiga_bus_enable_0_un1_n amiga_bus_enable_0_un0_n a_c_31__n \ -uds_000_int_0_un3_n uds_000_int_0_un1_n A0_c uds_000_int_0_un0_n \ -lds_000_int_0_un3_n nEXP_SPACE_c lds_000_int_0_un1_n lds_000_int_0_un0_n \ -as_030_000_sync_0_un3_n AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE \ -SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE DSACK_0_.OE \ -AVEC_EXP.OE CIIN.OE CLK_OUT_PRE_0 un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 \ -cpu_est_ns_0_0_x2_1_ -.names cpu_est_ns_e_0_0__n.BLIF cpu_est_0_.D -0 1 +SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR \ +inst_DSACK1_INT.D inst_DSACK1_INT.C inst_DSACK1_INT.AP inst_VMA_INTreg.D \ +inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_BGACK_030_INTreg.D \ +inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE_25.D \ +inst_CLK_OUT_PRE_25.C inst_CLK_OUT_PRE_25.AR SIZE_DMA_0_.D SIZE_DMA_0_.C \ +SIZE_DMA_0_.AP inst_UDS_000_INT.D inst_UDS_000_INT.C inst_UDS_000_INT.AP \ +inst_LDS_000_INT.D inst_LDS_000_INT.C inst_LDS_000_INT.AP inst_FPU_CS_INTreg.D \ +inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP BG_000DFFSHreg.D BG_000DFFSHreg.C \ +BG_000DFFSHreg.AP inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DS_000_DMA.AP \ +inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_000_DMA.AP inst_AS_000_INT.D \ +inst_AS_000_INT.C inst_AS_000_INT.AP AMIGA_BUS_ENABLEDFFSHreg.D \ +AMIGA_BUS_ENABLEDFFSHreg.C AMIGA_BUS_ENABLEDFFSHreg.AP inst_AS_030_000_SYNC.D \ +inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_CLK_030_H.D \ +inst_CLK_030_H.C inst_A0_DMA.D inst_A0_DMA.C inst_A0_DMA.AP inst_CLK_000_D4.D \ +inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_DTACK_D0.D inst_DTACK_D0.C \ +inst_DTACK_D0.AP inst_CLK_000_D3.D inst_CLK_000_D3.C inst_CLK_000_D3.AP \ +inst_CLK_000_D2.D inst_CLK_000_D2.C inst_CLK_000_D2.AP CLK_OUT_INTreg.D \ +CLK_OUT_INTreg.C CLK_OUT_INTreg.AR inst_CLK_000_D1.D inst_CLK_000_D1.C \ +inst_CLK_000_D1.AP inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C \ +inst_BGACK_030_INT_D.AP inst_CLK_OUT_PRE_50_D.D inst_CLK_OUT_PRE_50_D.C \ +inst_CLK_OUT_PRE_50_D.AR inst_CLK_000_D0.D inst_CLK_000_D0.C \ +inst_CLK_000_D0.AP inst_VPA_D.D inst_VPA_D.C inst_VPA_D.AP \ +inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_50.AR \ +RESETDFFRHreg.D RESETDFFRHreg.C RESETDFFRHreg.AR SIZE_1_ DSACK_1_ AS_030 \ +AS_000 DS_030 UDS_000 LDS_000 A0 DTACK SIZE_0_ DSACK_0_ CLK_030_c CLK_000_c \ +CLK_OSZI_c ipl_c_0__n ipl_c_1__n ipl_c_2__n vcc_n_n gnd_n_n dsack_c_1__n \ +state_machine_un13_clk_000_d0_n clk_un3_clk_out_pre_50_n RST_c \ +state_machine_un6_bgack_000_n state_machine_un15_clk_000_d0_n RW_c fc_c_0__n \ +fc_c_1__n un1_AMIGA_BUS_ENABLE_1_sqmuxa_2 AMIGA_BUS_DATA_DIR_c \ +state_machine_ds_000_dma_3_n cpu_est_ns_0_1__n state_machine_un10_bg_030_n \ +N_134_i state_machine_lds_000_int_7_n N_169_i state_machine_uds_000_int_7_n \ +N_133_i N_167_i N_51_0 N_140_i N_202_0 N_86_0 N_171_i \ +un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0 N_82_i sm_amiga_i_1__n N_78_i N_170_i N_77_0 \ +CLK_000_D1_i N_76_i N_74_i N_72_0 AS_030_000_SYNC_i CLK_000_D2_i \ +state_machine_un8_bgack_030_int_i_0_0_n N_69_i AS_030_c_i N_65_i N_64_i N_62_i \ +N_152_i N_153_i cpu_est_ns_1__n N_61_0 cpu_est_ns_2__n N_150_i \ +state_machine_un8_bgack_030_int_i_0_n N_148_i N_197 N_149_i N_198 N_199 \ +N_123_i N_200 N_145_i N_201 N_146_i sm_amiga_ns_0_0__n N_51 N_142_i N_53 \ +N_143_i N_61 N_144_i N_62 cpu_est_ns_0_2__n N_64 N_141_i N_65 N_53_0 N_66 \ +N_139_i N_69 state_machine_amiga_bus_enable_4_iv_i_n N_72 N_138_i N_74 N_48_i \ +N_76 N_136_i N_77 N_137_i N_78 AMIGA_BUS_DATA_DIR_c_0 N_82 N_135_i N_86 \ +N_168_i N_202 N_151_i N_203 N_132_i N_205 N_164_i N_206 N_115 N_130_i N_116 \ +N_131_i N_117 N_41_0 N_118 N_128_i N_120 N_129_i N_121 sm_amiga_ns_0_5__n \ +N_122 N_126_i N_123 N_127_i N_124 N_125 N_125_i N_126 N_127 N_124_i N_128 \ +N_129 N_122_i N_130 N_131 N_172_i N_132 state_machine_size_dma_4_0_1__n N_133 \ +state_machine_ds_000_dma_3_0_n N_134 N_66_i N_135 N_120_i N_136 \ +state_machine_lds_000_int_7_0_n N_137 state_machine_uds_000_int_7_0_n N_138 \ +N_118_i N_139 N_201_0 N_140 N_117_i N_141 N_200_0 N_142 N_115_i N_143 N_116_i \ +N_144 N_199_0 N_145 BG_030_c_i N_146 N_206_i N_147 \ +state_machine_un10_bg_030_0_n N_148 N_198_0 N_149 N_197_0 N_150 N_203_i N_152 \ +state_machine_un13_clk_000_d0_i_n N_153 state_machine_un15_clk_000_d0_0_n \ +N_164 state_machine_un6_bgack_000_0_n N_167 N_225_1 N_168 N_225_2 N_169 \ +N_225_3 N_170 N_225_4 N_171 N_225_5 N_172 N_225_6 N_173 N_228_1 N_225 N_228_2 \ +N_228 N_69_i_1 CLK_000_D0_i N_69_i_2 BGACK_030_INT_i N_69_i_3 CLK_030_i \ +N_69_i_4 cpu_est_i_3__n N_69_i_5 sm_amiga_i_6__n \ +state_machine_un8_bgack_030_int_i_0_0_1_n nEXP_SPACE_i N_72_0_1 CLK_000_D4_i \ +N_51_0_1 sm_amiga_i_5__n N_51_0_2 sm_amiga_i_4__n cpu_est_ns_0_1_1__n AS_000_i \ +cpu_est_ns_0_2_1__n LDS_000_i N_128_1 UDS_000_i N_128_2 cpu_est_i_1__n N_118_1 \ +cpu_est_i_0__n N_118_2 DTACK_D0_i N_118_3 VMA_INT_i N_206_1 VPA_D_i N_206_2 \ +AS_000_DMA_i sm_amiga_ns_0_1_0__n CLK_030_H_i cpu_est_ns_0_1_2__n RW_i \ +N_53_0_1 cpu_est_i_2__n N_43_i_1 sm_amiga_i_0__n \ +state_machine_lds_000_int_7_0_1_n sm_amiga_i_3__n \ +state_machine_uds_000_int_7_0_1_n sm_amiga_i_7__n N_199_0_1 A0_i N_152_1 \ +size_i_1__n N_147_1 DS_030_i N_139_1 a_i_19__n N_137_1 a_i_16__n N_127_1 \ +a_i_18__n N_120_1 a_i_30__n state_machine_a0_dma_2_1_n a_i_31__n N_116_1 \ +a_i_28__n N_115_1 a_i_29__n state_machine_un13_clk_000_d0_1_n a_i_26__n \ +N_203_1 a_i_27__n state_machine_uds_000_int_7_0_m3_un3_n a_i_24__n \ +state_machine_uds_000_int_7_0_m3_un1_n a_i_25__n \ +state_machine_uds_000_int_7_0_m3_un0_n RST_i dsack1_int_0_un3_n \ +dsack1_int_0_un1_n dsack1_int_0_un0_n N_205_i vma_int_0_un3_n FPU_CS_INT_i \ +vma_int_0_un1_n CLK_OUT_PRE_50_D_i vma_int_0_un0_n AS_030_c \ +bgack_030_int_0_un3_n bgack_030_int_0_un1_n AS_000_c bgack_030_int_0_un0_n \ +ipl_030_0_0__un3_n DS_030_c ipl_030_0_0__un1_n ipl_030_0_0__un0_n UDS_000_c \ +ipl_030_0_1__un3_n ipl_030_0_1__un1_n LDS_000_c ipl_030_0_1__un0_n \ +ipl_030_0_2__un3_n size_c_0__n ipl_030_0_2__un1_n ipl_030_0_2__un0_n \ +size_c_1__n cpu_estse_0_un3_n cpu_estse_0_un1_n a_c_16__n cpu_estse_0_un0_n \ +cpu_estse_1_un3_n a_c_17__n cpu_estse_1_un1_n cpu_estse_1_un0_n a_c_18__n \ +cpu_estse_2_un3_n cpu_estse_2_un1_n a_c_19__n cpu_estse_2_un0_n \ +amiga_bus_enable_0_un3_n a_c_20__n amiga_bus_enable_0_un1_n \ +amiga_bus_enable_0_un0_n a_c_21__n as_030_000_sync_0_un3_n \ +as_030_000_sync_0_un1_n a_c_22__n as_030_000_sync_0_un0_n clk_030_h_0_un3_n \ +a_c_23__n clk_030_h_0_un1_n clk_030_h_0_un0_n a_c_24__n uds_000_int_0_un3_n \ +uds_000_int_0_un1_n a_c_25__n uds_000_int_0_un0_n lds_000_int_0_un3_n \ +a_c_26__n lds_000_int_0_un1_n lds_000_int_0_un0_n a_c_27__n fpu_cs_int_0_un3_n \ +fpu_cs_int_0_un1_n a_c_28__n fpu_cs_int_0_un0_n bg_000_0_un3_n a_c_29__n \ +bg_000_0_un1_n bg_000_0_un0_n a_c_30__n ds_000_dma_0_un3_n ds_000_dma_0_un1_n \ +a_c_31__n ds_000_dma_0_un0_n as_000_dma_0_un3_n A0_c as_000_dma_0_un1_n \ +as_000_dma_0_un0_n nEXP_SPACE_c as_000_int_0_un3_n as_000_int_0_un1_n \ +as_000_int_0_un0_n BG_030_c BGACK_000_c AS_030.OE AS_000.OE DS_030.OE \ +UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE \ +DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_OUT_PRE_25_0 +.names N_148_i.BLIF N_149_i.BLIF cpu_est_0_.D +11 1 .names cpu_estse_0_un1_n.BLIF cpu_estse_0_un0_n.BLIF cpu_est_1_.D 1- 1 -1 1 @@ -322,10 +309,10 @@ cpu_est_ns_0_0_x2_1_ .names cpu_estse_2_un1_n.BLIF cpu_estse_2_un0_n.BLIF cpu_est_3_reg.D 1- 1 -1 1 -.names N_46_0.BLIF SM_AMIGA_1_.D -0 1 -.names N_44_i_1.BLIF N_198_i.BLIF SM_AMIGA_0_.D +.names N_43_i_1.BLIF N_164_i.BLIF SM_AMIGA_0_.D 11 1 +.names state_machine_size_dma_4_0_1__n.BLIF SIZE_DMA_1_.D +0 1 .names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF IPL_030DFFSH_0_reg.D 1- 1 -1 1 @@ -335,22 +322,21 @@ cpu_est_ns_0_0_x2_1_ .names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF IPL_030DFFSH_2_reg.D 1- 1 -1 1 -.names sm_amiga_ns_e_0_0__n.BLIF SM_AMIGA_7_.D +.names sm_amiga_ns_0_0__n.BLIF SM_AMIGA_7_.D 0 1 -.names sm_amiga_ns_e_0_1__n.BLIF SM_AMIGA_6_.D +.names N_122_i.BLIF N_123_i.BLIF SM_AMIGA_6_.D +11 1 +.names inst_CLK_000_D0.BLIF N_124_i.BLIF SM_AMIGA_5_.D +11 1 +.names CLK_000_D0_i.BLIF N_125_i.BLIF SM_AMIGA_4_.D +11 1 +.names N_126_i.BLIF N_127_i.BLIF SM_AMIGA_3_.D +11 1 +.names sm_amiga_ns_0_5__n.BLIF SM_AMIGA_2_.D 0 1 -.names N_64.BLIF N_152_i.BLIF SM_AMIGA_5_.D -11 1 -.names N_63.BLIF N_151_i.BLIF SM_AMIGA_4_.D -11 1 -.names N_150_i.BLIF N_197_i.BLIF SM_AMIGA_3_.D -11 1 -.names sm_amiga_ns_e_0_5__n.BLIF SM_AMIGA_2_.D +.names N_41_0.BLIF SM_AMIGA_1_.D 0 1 -.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INT.D -1- 1 --1 1 -.names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D +.names dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF inst_DSACK1_INT.D 1- 1 -1 1 .names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF inst_VMA_INTreg.D @@ -360,688 +346,597 @@ cpu_est_ns_0_0_x2_1_ inst_BGACK_030_INTreg.D 1- 1 -1 1 -.names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D -1- 1 --1 1 -.names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D -1- 1 --1 1 -.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF inst_DS_000_DMA.D -1- 1 --1 1 -.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D -1- 1 --1 1 -.names dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.D -1- 1 --1 1 -.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF inst_A0_DMA.D -1- 1 --1 1 -.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF BG_000DFFSHreg.D -1- 1 --1 1 -.names dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF inst_DSACK1_INT.D -1- 1 --1 1 -.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF inst_AS_000_DMA.D -1- 1 --1 1 -.names amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF \ -AMIGA_BUS_ENABLEDFFSHreg.D -1- 1 --1 1 +.names N_121.BLIF SIZE_DMA_0_.D +0 1 .names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF inst_UDS_000_INT.D 1- 1 -1 1 .names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INT.D 1- 1 -1 1 +.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D +1- 1 +-1 1 +.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF BG_000DFFSHreg.D +1- 1 +-1 1 +.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF inst_DS_000_DMA.D +1- 1 +-1 1 +.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF inst_AS_000_DMA.D +1- 1 +-1 1 +.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INT.D +1- 1 +-1 1 +.names amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF \ +AMIGA_BUS_ENABLEDFFSHreg.D +1- 1 +-1 1 .names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF \ inst_AS_030_000_SYNC.D 1- 1 -1 1 -.names CLK_CNT_P_0_.BLIF CLK_CNT_P_0_.D +.names clk_030_h_0_un1_n.BLIF clk_030_h_0_un0_n.BLIF inst_CLK_030_H.D +1- 1 +-1 1 +.names state_machine_a0_dma_2_1_n.BLIF N_173.BLIF inst_A0_DMA.D +11 1 +.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D 0 1 -.names un1_AS_030_000_SYNC_1_sqmuxa_1.BLIF N_35.BLIF as_030_000_sync_0_un1_n -11 1 -.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ -as_030_000_sync_0_un0_n -11 1 -.names N_224.BLIF ds_000_dma_0_un3_n -0 1 -.names state_machine_ds_000_dma_5_n.BLIF N_224.BLIF ds_000_dma_0_un1_n -11 1 -.names inst_DS_000_DMA.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n -11 1 -.names N_33.BLIF fpu_cs_int_0_un3_n -0 1 -.names AS_030_c.BLIF N_33.BLIF fpu_cs_int_0_un1_n -11 1 -.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n -11 1 -.names N_228.BLIF dtack_sync_0_un3_n -0 1 -.names N_234_i.BLIF N_228.BLIF dtack_sync_0_un1_n -11 1 -.names inst_DTACK_SYNC.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n -11 1 -.names N_224.BLIF a0_dma_0_un3_n -0 1 -.names state_machine_a0_dma_4_n.BLIF N_224.BLIF a0_dma_0_un1_n -11 1 -.names inst_A0_DMA.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n -11 1 -.names state_machine_un10_bg_030_n.BLIF bg_000_0_un3_n -0 1 -.names BG_030_c.BLIF state_machine_un10_bg_030_n.BLIF bg_000_0_un1_n -11 1 -.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n -11 1 .names vcc_n_n 1 .names gnd_n_n -.names state_machine_un59_bgack_030_int_0_n.BLIF \ -state_machine_un59_bgack_030_int_n -0 1 +.names state_machine_un13_clk_000_d0_1_n.BLIF N_168.BLIF \ +state_machine_un13_clk_000_d0_n +11 1 +.names inst_CLK_OUT_PRE_50.BLIF CLK_OUT_PRE_50_D_i.BLIF \ +clk_un3_clk_out_pre_50_n +11 1 .names state_machine_un6_bgack_000_0_n.BLIF state_machine_un6_bgack_000_n 0 1 -.names state_machine_un10_bg_030_0_n.BLIF state_machine_un10_bg_030_n +.names state_machine_un15_clk_000_d0_0_n.BLIF state_machine_un15_clk_000_d0_n 0 1 -.names un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1 -0 1 -.names SIZE_DMA_0_sqmuxa_1.BLIF N_77_i.BLIF SIZE_DMA_0_sqmuxa -11 1 -.names state_machine_a0_dma_4_1_n.BLIF state_machine_a0_dma_4_2_n.BLIF \ -state_machine_a0_dma_4_n -11 1 -.names state_machine_ds_000_dma_5_0_n.BLIF state_machine_ds_000_dma_5_n -0 1 -.names state_machine_lds_000_int_7_0_n.BLIF state_machine_lds_000_int_7_n -0 1 -.names state_machine_uds_000_int_7_0_n.BLIF state_machine_uds_000_int_7_n +.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_2 0 1 .names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c 0 1 -.names N_63_i.BLIF SM_AMIGA_4_.BLIF N_88_0 -11 1 -.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_5_.BLIF N_86_0 -11 1 -.names A0_DMA_0_sqmuxa_i_0_0_1.BLIF N_171_i.BLIF A0_DMA_0_sqmuxa_i_0_0 -11 1 -.names N_83_i_1.BLIF N_83_i_2.BLIF N_83_i -11 1 -.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i +.names state_machine_ds_000_dma_3_0_n.BLIF state_machine_ds_000_dma_3_n 0 1 -.names cpu_est_3_reg.BLIF cpu_est_i_1__n.BLIF N_81_i +.names cpu_est_ns_0_1_1__n.BLIF cpu_est_ns_0_2_1__n.BLIF cpu_est_ns_0_1__n 11 1 -.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_6_.BLIF N_80_i -11 1 -.names DS_030_c.BLIF DS_030_c_i +.names state_machine_un10_bg_030_0_n.BLIF state_machine_un10_bg_030_n 0 1 -.names inst_BGACK_030_INTreg.BLIF DS_030_c_i.BLIF N_79_i -11 1 -.names N_172.BLIF N_172_i +.names N_134.BLIF N_134_i 0 1 -.names N_65_i.BLIF N_172_i.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1_0 -11 1 -.names CLK_030_c.BLIF CLK_030_c_i +.names state_machine_lds_000_int_7_0_n.BLIF state_machine_lds_000_int_7_n 0 1 -.names BGACK_030_INT_i.BLIF CLK_030_c_i.BLIF N_77_i -11 1 -.names N_174.BLIF N_174_i +.names N_169.BLIF N_169_i 0 1 -.names N_64_i.BLIF N_174_i.BLIF N_76_0 -11 1 -.names N_74_i_4.BLIF N_74_i_5.BLIF N_74_i -11 1 -.names inst_CLK_000_D1.BLIF CLK_000_D1_i +.names state_machine_uds_000_int_7_0_n.BLIF state_machine_uds_000_int_7_n 0 1 -.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF N_73_i -11 1 -.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +.names N_133.BLIF N_133_i 0 1 -.names sm_amiga_i_0__n.BLIF sm_amiga_i_1__n.BLIF N_72_i +.names N_167.BLIF N_167_i +0 1 +.names N_51_0_1.BLIF N_51_0_2.BLIF N_51_0 +11 1 +.names N_140.BLIF N_140_i +0 1 +.names AS_000_DMA_i.BLIF CLK_030_c.BLIF N_202_0 +11 1 +.names CLK_000_D0_i.BLIF N_74_i.BLIF N_86_0 11 1 .names N_171.BLIF N_171_i 0 1 -.names inst_CLK_000_D4.BLIF SM_AMIGA_5_.BLIF N_66_i +.names N_65_i.BLIF N_171_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0 +11 1 +.names cpu_est_3_reg.BLIF cpu_est_i_1__n.BLIF N_82_i +11 1 +.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +0 1 +.names sm_amiga_i_0__n.BLIF sm_amiga_i_1__n.BLIF N_78_i +11 1 +.names N_170.BLIF N_170_i +0 1 +.names CLK_000_D0_i.BLIF N_170_i.BLIF N_77_0 +11 1 +.names inst_CLK_000_D1.BLIF CLK_000_D1_i +0 1 +.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF N_76_i +11 1 +.names SM_AMIGA_6_.BLIF nEXP_SPACE_c.BLIF N_74_i +11 1 +.names N_72_0_1.BLIF CLK_000_D2_i.BLIF N_72_0 +11 1 +.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i +0 1 +.names inst_CLK_000_D2.BLIF CLK_000_D2_i +0 1 +.names state_machine_un8_bgack_030_int_i_0_0_1_n.BLIF BGACK_030_INT_i.BLIF \ +state_machine_un8_bgack_030_int_i_0_0_n +11 1 +.names N_69_i_4.BLIF N_69_i_5.BLIF N_69_i 11 1 .names AS_030_c.BLIF AS_030_c_i 0 1 -.names AS_030_c_i.BLIF N_232_i.BLIF N_65_i +.names AS_030_c_i.BLIF N_205_i.BLIF N_65_i 11 1 -.names inst_BGACK_030_INTreg.BLIF CLK_000_D0_i.BLIF N_64_i +.names inst_CLK_000_D4.BLIF SM_AMIGA_5_.BLIF N_64_i 11 1 -.names inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF N_63_i +.names inst_CLK_000_D0.BLIF SM_AMIGA_4_.BLIF N_62_i 11 1 -.names N_167.BLIF N_167_i -0 1 -.names cpu_est_ns_0_1__n.BLIF cpu_est_ns_1__n -0 1 -.names N_168.BLIF N_168_i -0 1 -.names cpu_est_ns_0_2__n.BLIF cpu_est_ns_2__n -0 1 -.names N_167_i.BLIF N_168_i.BLIF cpu_est_ns_e_0_0__n -11 1 -.names A0_DMA_0_sqmuxa_i_0_0.BLIF A0_DMA_0_sqmuxa_i_0 -0 1 -.names N_163.BLIF N_163_i -0 1 -.names N_224_0.BLIF N_224 -0 1 -.names N_164.BLIF N_164_i -0 1 -.names N_225_0.BLIF N_225 -0 1 -.names N_165.BLIF N_165_i -0 1 -.names N_226_0.BLIF N_226 -0 1 -.names sm_amiga_ns_e_0_1_0__n.BLIF N_164_i.BLIF sm_amiga_ns_e_0_0__n -11 1 -.names N_227_0.BLIF N_227 -0 1 -.names N_160.BLIF N_160_i -0 1 -.names N_228_0.BLIF N_228 -0 1 -.names N_161.BLIF N_161_i -0 1 -.names N_31_0.BLIF N_31 -0 1 -.names N_162.BLIF N_162_i -0 1 -.names N_33_0.BLIF N_33 -0 1 -.names sm_amiga_ns_e_0_1_1__n.BLIF N_161_i.BLIF sm_amiga_ns_e_0_1__n -11 1 -.names N_35_0.BLIF N_35 -0 1 -.names N_98.BLIF N_98_i -0 1 -.names N_37_0.BLIF N_37 -0 1 -.names N_159.BLIF N_159_i -0 1 -.names N_39_0.BLIF N_39 -0 1 -.names N_98_i.BLIF N_159_i.BLIF cpu_est_ns_0_2__n -11 1 -.names N_158.BLIF N_158_i -0 1 -.names N_63_i.BLIF N_63 -0 1 -.names inst_BGACK_030_INTreg.BLIF N_158_i.BLIF \ -state_machine_amiga_bus_enable_6_iv_i_n -11 1 -.names N_64_i.BLIF N_64 -0 1 -.names N_157.BLIF N_157_i -0 1 -.names N_65_i.BLIF N_65 -0 1 -.names A0_DMA_0_sqmuxa_i_0_0.BLIF N_157_i.BLIF state_machine_ds_000_dma_5_0_n -11 1 -.names N_66_i.BLIF N_66 -0 1 -.names N_155.BLIF N_155_i -0 1 -.names state_machine_lds_000_int_7_0_m3_un1_n.BLIF \ -state_machine_lds_000_int_7_0_m3_un0_n.BLIF N_67 -1- 1 --1 1 -.names N_156.BLIF N_156_i -0 1 -.names N_72_i.BLIF N_72 -0 1 -.names N_155_i.BLIF N_156_i.BLIF AMIGA_BUS_DATA_DIR_c_0 -11 1 -.names N_73_i.BLIF N_73 +.names N_152.BLIF N_152_i 0 1 .names N_153.BLIF N_153_i 0 1 -.names N_74_i.BLIF N_74 +.names cpu_est_ns_0_1__n.BLIF cpu_est_ns_1__n 0 1 -.names N_154.BLIF N_154_i -0 1 -.names N_76_0.BLIF N_76 -0 1 -.names N_153_i.BLIF N_154_i.BLIF N_177_i +.names N_152_i.BLIF N_153_i.BLIF N_61_0 11 1 -.names N_80_i.BLIF N_80 +.names cpu_est_ns_0_2__n.BLIF cpu_est_ns_2__n 0 1 -.names N_176.BLIF N_176_i -0 1 -.names N_81_i.BLIF N_81 -0 1 -.names N_179.BLIF N_179_i -0 1 -.names N_83_i.BLIF N_83 -0 1 -.names cpu_est_ns_0_1_1__n.BLIF N_179_i.BLIF cpu_est_ns_0_1__n -11 1 -.names N_86_0.BLIF N_86 -0 1 -.names N_152.BLIF N_152_i -0 1 -.names N_88_0.BLIF N_88 -0 1 -.names cpu_est_ns_0_0_m3_2__un1_n.BLIF cpu_est_ns_0_0_m3_2__un0_n.BLIF N_98 -1- 1 --1 1 -.names N_151.BLIF N_151_i -0 1 -.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_7_.BLIF N_108 -11 1 -.names N_109_1.BLIF VPA_D_i.BLIF N_109 -11 1 .names N_150.BLIF N_150_i 0 1 -.names inst_BGACK_030_INTreg.BLIF N_66_i.BLIF N_126 -11 1 -.names N_197.BLIF N_197_i +.names state_machine_un8_bgack_030_int_i_0_0_n.BLIF \ +state_machine_un8_bgack_030_int_i_0_n 0 1 -.names N_231_3.BLIF VPA_D_i.BLIF N_231 -11 1 -.names N_232_1.BLIF SM_AMIGA_1_.BLIF N_232 -11 1 .names N_148.BLIF N_148_i 0 1 -.names N_233_1.BLIF N_236_1.BLIF N_233 -11 1 +.names N_197_0.BLIF N_197 +0 1 .names N_149.BLIF N_149_i 0 1 -.names N_234_1.BLIF N_234_2.BLIF N_234 -11 1 -.names N_148_i.BLIF N_149_i.BLIF sm_amiga_ns_e_0_5__n -11 1 -.names CLK_030_c.BLIF N_74_i.BLIF N_235 -11 1 -.names N_146.BLIF N_146_i +.names N_198_0.BLIF N_198 0 1 -.names N_236_1_0.BLIF N_74.BLIF N_236 -11 1 -.names N_147.BLIF N_147_i +.names N_199_0.BLIF N_199 +0 1 +.names N_123.BLIF N_123_i +0 1 +.names N_200_0.BLIF N_200 0 1 -.names N_237_1.BLIF SM_AMIGA_4_.BLIF N_237 -11 1 -.names N_146_i.BLIF N_147_i.BLIF N_46_0 -11 1 -.names N_239_1.BLIF RW_c.BLIF N_239 -11 1 .names N_145.BLIF N_145_i 0 1 -.names N_240_1.BLIF inst_BGACK_030_INT_D.BLIF N_240 -11 1 -.names N_198.BLIF N_198_i +.names N_201_0.BLIF N_201 0 1 -.names inst_BGACK_030_INT_D.BLIF N_173.BLIF N_241 -11 1 -.names N_144_1.BLIF size_i_1__n.BLIF N_144 -11 1 -.names N_67.BLIF N_67_i +.names N_146.BLIF N_146_i 0 1 -.names N_76.BLIF sm_amiga_i_0__n.BLIF N_145 -11 1 -.names state_machine_uds_000_int_7_0_1_n.BLIF N_67_i.BLIF \ -state_machine_uds_000_int_7_0_n -11 1 -.names N_76.BLIF SM_AMIGA_1_.BLIF N_146 +.names sm_amiga_ns_0_1_0__n.BLIF N_145_i.BLIF sm_amiga_ns_0_0__n 11 1 +.names N_51_0.BLIF N_51 +0 1 +.names N_142.BLIF N_142_i +0 1 +.names N_53_0.BLIF N_53 +0 1 +.names N_143.BLIF N_143_i +0 1 +.names N_61_0.BLIF N_61 +0 1 .names N_144.BLIF N_144_i 0 1 -.names N_63_i.BLIF SM_AMIGA_2_.BLIF N_147 -11 1 -.names state_machine_lds_000_int_7_0_1_n.BLIF N_79_i.BLIF \ -state_machine_lds_000_int_7_0_n -11 1 -.names N_63.BLIF SM_AMIGA_2_.BLIF N_148 -11 1 -.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2.BLIF N_96_i_i +.names N_62_i.BLIF N_62 0 1 -.names N_197.BLIF SM_AMIGA_3_.BLIF N_149 +.names cpu_est_ns_0_1_2__n.BLIF N_143_i.BLIF cpu_est_ns_0_2__n 11 1 -.names N_240.BLIF N_240_i +.names N_64_i.BLIF N_64 0 1 -.names N_88.BLIF sm_amiga_i_3__n.BLIF N_150 -11 1 -.names N_241.BLIF N_241_i +.names N_141.BLIF N_141_i 0 1 -.names N_86.BLIF sm_amiga_i_4__n.BLIF N_151 -11 1 -.names N_39_0_1.BLIF N_241_i.BLIF N_39_0 -11 1 -.names N_80.BLIF sm_amiga_i_5__n.BLIF N_152 -11 1 -.names N_237.BLIF N_237_i +.names N_65_i.BLIF N_65 0 1 -.names N_81.BLIF cpu_est_2_.BLIF N_153 +.names N_53_0_1.BLIF state_machine_un8_bgack_030_int_i_0_0_n.BLIF N_53_0 11 1 -.names N_239.BLIF N_239_i +.names state_machine_uds_000_int_7_0_m3_un1_n.BLIF \ +state_machine_uds_000_int_7_0_m3_un0_n.BLIF N_66 +1- 1 +-1 1 +.names N_139.BLIF N_139_i 0 1 -.names N_176.BLIF cpu_est_i_3__n.BLIF N_154 -11 1 -.names N_37_0_1.BLIF N_239_i.BLIF N_37_0 -11 1 -.names inst_BGACK_030_INTreg.BLIF RW_i.BLIF N_155 -11 1 -.names N_236.BLIF N_236_i +.names N_69_i.BLIF N_69 0 1 -.names N_156_1.BLIF nEXP_SPACE_i.BLIF N_156 +.names inst_BGACK_030_INTreg.BLIF N_139_i.BLIF \ +state_machine_amiga_bus_enable_4_iv_i_n 11 1 -.names N_236_i.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF N_35_0 -11 1 -.names inst_AS_000_DMA.BLIF RW_i.BLIF N_157 -11 1 -.names N_235.BLIF N_235_i +.names N_72_0.BLIF N_72 0 1 -.names CLK_000_D4_i.BLIF N_173.BLIF N_158 -11 1 -.names AS_030_c_i.BLIF N_235_i.BLIF N_33_0 -11 1 -.names cpu_est_0_.BLIF cpu_est_3_reg.BLIF N_159 -11 1 -.names N_175.BLIF N_175_i +.names N_138.BLIF N_138_i 0 1 -.names BGACK_030_INT_i.BLIF SM_AMIGA_6_.BLIF N_160 -11 1 -.names A0_DMA_0_sqmuxa_i_0_0.BLIF N_175_i.BLIF N_31_0 -11 1 -.names CLK_000_D0_i.BLIF N_173.BLIF N_161 -11 1 -.names AS_030_c_i.BLIF N_234_i.BLIF N_228_0 -11 1 -.names N_83_i.BLIF SM_AMIGA_7_.BLIF N_162 -11 1 -.names BG_030_c.BLIF BG_030_c_i +.names N_74_i.BLIF N_74 0 1 -.names N_83.BLIF SM_AMIGA_7_.BLIF N_163 +.names N_138_i.BLIF state_machine_un8_bgack_030_int_i_0_0_n.BLIF N_48_i 11 1 -.names N_233.BLIF N_233_i +.names N_76_i.BLIF N_76 0 1 -.names N_164_1.BLIF nEXP_SPACE_i.BLIF N_164 -11 1 -.names BG_030_c_i.BLIF N_233_i.BLIF state_machine_un10_bg_030_0_n -11 1 -.names N_198.BLIF SM_AMIGA_0_.BLIF N_165 -11 1 -.names AS_030_c_i.BLIF N_231_i.BLIF N_227_0 -11 1 -.names N_166_1.BLIF nEXP_SPACE_i.BLIF N_166 -11 1 -.names AS_030_c_i.BLIF N_126_i.BLIF N_226_0 -11 1 -.names N_73.BLIF cpu_est_0_.BLIF N_167 -11 1 -.names N_108.BLIF N_108_i +.names N_136.BLIF N_136_i 0 1 -.names N_73_i.BLIF cpu_est_i_0__n.BLIF N_168 -11 1 -.names N_109.BLIF N_109_i +.names N_77_0.BLIF N_77 0 1 -.names LDS_000_c.BLIF UDS_000_c.BLIF N_171 -11 1 -.names N_108_i.BLIF N_109_i.BLIF N_225_0 -11 1 -.names N_80_i.BLIF nEXP_SPACE_i.BLIF N_172 -11 1 -.names BGACK_000_c.BLIF N_73.BLIF state_machine_un6_bgack_000_0_n -11 1 -.names SM_AMIGA_6_.BLIF nEXP_SPACE_c.BLIF N_173 -11 1 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_224_0 -11 1 -.names inst_CLK_000_D4.BLIF CLK_000_D5_i.BLIF N_174 -11 1 -.names inst_CLK_000_D2.BLIF CLK_000_D2_i +.names N_137.BLIF N_137_i 0 1 -.names LDS_000_i.BLIF UDS_000_i.BLIF N_175 -11 1 -.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \ -state_machine_un59_bgack_030_int_0_n -11 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_176 -11 1 -.names a_c_20__n.BLIF a_c_21__n.BLIF N_253_1 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_179 -11 1 -.names a_c_22__n.BLIF a_c_23__n.BLIF N_253_2 -11 1 -.names N_64_i.BLIF state_machine_un59_bgack_030_int_n.BLIF N_197 -11 1 -.names a_i_24__n.BLIF a_i_25__n.BLIF N_263_1 -11 1 -.names inst_AS_000_INT.BLIF N_63_i.BLIF N_198 -11 1 -.names a_i_26__n.BLIF a_i_27__n.BLIF N_263_2 -11 1 -.names a_i_28__n.BLIF a_i_29__n.BLIF N_263_3 -11 1 -.names a_i_30__n.BLIF a_i_31__n.BLIF N_263_4 -11 1 -.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF N_236_1 -11 1 -.names N_263_1.BLIF N_263_2.BLIF N_263_5 -11 1 -.names N_253_1.BLIF N_253_2.BLIF N_253 -11 1 -.names N_263_3.BLIF N_263_4.BLIF N_263_6 -11 1 -.names N_263_5.BLIF N_263_6.BLIF N_263 -11 1 -.names a_c_17__n.BLIF BGACK_000_c.BLIF N_74_i_1 -11 1 -.names inst_VMA_INTreg.BLIF VMA_INT_i +.names N_78_i.BLIF N_78 0 1 -.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_74_i_2 +.names N_136_i.BLIF N_137_i.BLIF AMIGA_BUS_DATA_DIR_c_0 11 1 -.names inst_VPA_D.BLIF VPA_D_i +.names N_82_i.BLIF N_82 0 1 -.names a_i_19__n.BLIF a_i_16__n.BLIF N_74_i_3 +.names N_135.BLIF N_135_i +0 1 +.names N_86_0.BLIF N_86 +0 1 +.names N_168.BLIF N_168_i +0 1 +.names N_202_0.BLIF N_202 +0 1 +.names N_135_i.BLIF N_168_i.BLIF N_151_i 11 1 -.names DTACK_c.BLIF DTACK_i -0 1 -.names N_74_i_1.BLIF N_74_i_2.BLIF N_74_i_4 +.names N_203_1.BLIF VPA_D_i.BLIF N_203 11 1 -.names LDS_000_c.BLIF LDS_000_i +.names N_132.BLIF N_132_i 0 1 -.names N_74_i_3.BLIF a_i_18__n.BLIF N_74_i_5 +.names N_170.BLIF SM_AMIGA_1_.BLIF N_205 11 1 -.names AS_000_c.BLIF AS_000_i +.names N_164.BLIF N_164_i 0 1 -.names AS_030_000_SYNC_i.BLIF inst_BGACK_030_INTreg.BLIF N_83_i_1 +.names N_206_1.BLIF N_206_2.BLIF N_206 11 1 -.names cpu_est_0_.BLIF cpu_est_i_0__n -0 1 -.names CLK_000_D2_i.BLIF inst_CLK_000_D3.BLIF N_83_i_2 +.names N_115_1.BLIF RW_c.BLIF N_115 11 1 -.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n +.names N_130.BLIF N_130_i 0 1 -.names AS_000_i.BLIF N_77_i.BLIF A0_DMA_0_sqmuxa_i_0_0_1 +.names N_116_1.BLIF RW_i.BLIF N_116 11 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +.names N_131.BLIF N_131_i 0 1 -.names AS_000_i.BLIF LDS_000_i.BLIF state_machine_a0_dma_4_1_n +.names CLK_030_c.BLIF N_69_i.BLIF N_117 11 1 -.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n -0 1 -.names N_77_i.BLIF UDS_000_c.BLIF state_machine_a0_dma_4_2_n +.names N_130_i.BLIF N_131_i.BLIF N_41_0 11 1 -.names cpu_est_3_reg.BLIF cpu_est_i_3__n -0 1 -.names N_236_1.BLIF CLK_030_c.BLIF N_236_1_0 +.names N_118_3.BLIF nEXP_SPACE_c.BLIF N_118 11 1 -.names inst_CLK_000_D0.BLIF CLK_000_D0_i +.names N_128.BLIF N_128_i 0 1 -.names DTACK_i.BLIF N_63_i.BLIF N_234_1 +.names N_120_1.BLIF size_i_1__n.BLIF N_120 11 1 -.names inst_CLK_000_D4.BLIF CLK_000_D4_i +.names N_129.BLIF N_129_i 0 1 -.names SM_AMIGA_3_.BLIF inst_VPA_D.BLIF N_234_2 +.names N_172.BLIF N_173.BLIF N_121 11 1 -.names cpu_est_1_.BLIF cpu_est_i_1__n -0 1 -.names AS_030_c.BLIF CLK_000_c.BLIF N_233_1 +.names N_128_i.BLIF N_129_i.BLIF sm_amiga_ns_0_5__n 11 1 -.names UDS_000_c.BLIF UDS_000_i -0 1 -.names N_63_i.BLIF N_81_i.BLIF N_231_1 -11 1 -.names inst_CLK_000_D5.BLIF CLK_000_D5_i -0 1 -.names SM_AMIGA_3_.BLIF VMA_INT_i.BLIF N_231_2 -11 1 -.names nEXP_SPACE_c.BLIF nEXP_SPACE_i -0 1 -.names N_231_1.BLIF N_231_2.BLIF N_231_3 -11 1 -.names inst_AS_000_DMA.BLIF AS_000_DMA_i -0 1 -.names N_165_i.BLIF N_163_i.BLIF sm_amiga_ns_e_0_1_0__n -11 1 -.names RW_c.BLIF RW_i -0 1 -.names N_162_i.BLIF N_160_i.BLIF sm_amiga_ns_e_0_1_1__n -11 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n -0 1 -.names cpu_est_ns_0_0_x2_1_.BLIF N_176_i.BLIF cpu_est_ns_0_1_1__n -11 1 -.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n -0 1 -.names N_72.BLIF N_145_i.BLIF N_44_i_1 -11 1 -.names A0_c.BLIF A0_i -0 1 -.names N_79_i.BLIF A0_i.BLIF state_machine_uds_000_int_7_0_1_n -11 1 -.names size_c_1__n.BLIF size_i_1__n -0 1 -.names N_144_i.BLIF N_67_i.BLIF state_machine_lds_000_int_7_0_1_n -11 1 -.names a_c_30__n.BLIF a_i_30__n -0 1 -.names N_96_i_i.BLIF N_240_i.BLIF N_39_0_1 -11 1 -.names a_c_31__n.BLIF a_i_31__n -0 1 -.names AS_030_c_i.BLIF N_237_i.BLIF N_37_0_1 -11 1 -.names a_c_28__n.BLIF a_i_28__n -0 1 -.names AS_000_DMA_i.BLIF BGACK_030_INT_i.BLIF N_166_1 -11 1 -.names a_c_29__n.BLIF a_i_29__n -0 1 -.names N_64_i.BLIF SM_AMIGA_6_.BLIF N_164_1 -11 1 -.names a_c_26__n.BLIF a_i_26__n -0 1 -.names BGACK_030_INT_i.BLIF RW_c.BLIF N_156_1 -11 1 -.names a_c_27__n.BLIF a_i_27__n -0 1 -.names A0_i.BLIF size_c_0__n.BLIF N_144_1 -11 1 -.names a_c_24__n.BLIF a_i_24__n -0 1 -.names N_72.BLIF AS_030_c.BLIF N_240_1 -11 1 -.names a_c_25__n.BLIF a_i_25__n -0 1 -.names N_66_i.BLIF N_79_i.BLIF N_239_1 -11 1 -.names a_c_19__n.BLIF a_i_19__n -0 1 -.names N_79_i.BLIF RW_i.BLIF N_237_1 -11 1 -.names a_c_16__n.BLIF a_i_16__n -0 1 -.names N_175.BLIF AS_000_i.BLIF SIZE_DMA_0_sqmuxa_1 -11 1 -.names a_c_18__n.BLIF a_i_18__n -0 1 -.names inst_BGACK_030_INTreg.BLIF N_174.BLIF N_232_1 -11 1 -.names RST_c.BLIF RST_i -0 1 -.names CLK_000_D0_i.BLIF N_179.BLIF N_109_1 -11 1 -.names cpu_est_1_.BLIF cpu_est_ns_0_0_m3_2__un3_n -0 1 -.names SIZE_DMA_0_sqmuxa.BLIF SIZE_DMA_0_sqmuxa_i -0 1 -.names cpu_est_2_.BLIF cpu_est_1_.BLIF cpu_est_ns_0_0_m3_2__un1_n -11 1 -.names N_231.BLIF N_231_i -0 1 -.names cpu_est_i_0__n.BLIF cpu_est_ns_0_0_m3_2__un3_n.BLIF \ -cpu_est_ns_0_0_m3_2__un0_n +.names N_86.BLIF sm_amiga_i_7__n.BLIF N_122 11 1 .names N_126.BLIF N_126_i 0 1 -.names RW_c.BLIF state_machine_lds_000_int_7_0_m3_un3_n +.names N_72.BLIF SM_AMIGA_7_.BLIF N_123 +11 1 +.names N_127.BLIF N_127_i 0 1 -.names N_232.BLIF N_232_i +.names sm_amiga_i_5__n.BLIF sm_amiga_i_6__n.BLIF N_124 +11 1 +.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_125 +11 1 +.names N_125.BLIF N_125_i 0 1 -.names N_66.BLIF RW_c.BLIF state_machine_lds_000_int_7_0_m3_un1_n +.names N_62.BLIF sm_amiga_i_3__n.BLIF N_126 11 1 -.names N_234.BLIF N_234_i +.names N_127_1.BLIF inst_CLK_000_D1.BLIF N_127 +11 1 +.names N_124.BLIF N_124_i 0 1 -.names sm_amiga_i_4__n.BLIF state_machine_lds_000_int_7_0_m3_un3_n.BLIF \ -state_machine_lds_000_int_7_0_m3_un0_n +.names N_128_1.BLIF N_128_2.BLIF N_128 11 1 -.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i +.names CLK_000_D0_i.BLIF SM_AMIGA_2_.BLIF N_129 +11 1 +.names N_122.BLIF N_122_i 0 1 -.names N_73.BLIF cpu_estse_0_un3_n +.names N_77.BLIF SM_AMIGA_1_.BLIF N_130 +11 1 +.names inst_CLK_000_D0.BLIF SM_AMIGA_2_.BLIF N_131 +11 1 +.names N_172.BLIF N_172_i 0 1 -.names cpu_est_1_.BLIF N_73.BLIF cpu_estse_0_un1_n +.names N_77.BLIF sm_amiga_i_0__n.BLIF N_132 11 1 -.names cpu_est_ns_1__n.BLIF cpu_estse_0_un3_n.BLIF cpu_estse_0_un0_n +.names N_172_i.BLIF state_machine_un8_bgack_030_int_i_0_0_n.BLIF \ +state_machine_size_dma_4_0_1__n 11 1 -.names N_73.BLIF cpu_estse_1_un3_n +.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF N_133 +11 1 +.names AS_000_DMA_i.BLIF state_machine_un8_bgack_030_int_i_0_0_n.BLIF \ +state_machine_ds_000_dma_3_0_n +11 1 +.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_134 +11 1 +.names N_66.BLIF N_66_i 0 1 -.names cpu_est_2_.BLIF N_73.BLIF cpu_estse_1_un1_n +.names N_82.BLIF cpu_est_2_.BLIF N_135 11 1 -.names cpu_est_ns_2__n.BLIF cpu_estse_1_un3_n.BLIF cpu_estse_1_un0_n -11 1 -.names N_73.BLIF cpu_estse_2_un3_n +.names N_120.BLIF N_120_i 0 1 -.names cpu_est_3_reg.BLIF N_73.BLIF cpu_estse_2_un1_n +.names inst_BGACK_030_INTreg.BLIF RW_i.BLIF N_136 11 1 -.names N_177_i.BLIF cpu_estse_2_un3_n.BLIF cpu_estse_2_un0_n +.names state_machine_lds_000_int_7_0_1_n.BLIF N_66_i.BLIF \ +state_machine_lds_000_int_7_0_n 11 1 +.names N_137_1.BLIF nEXP_SPACE_i.BLIF N_137 +11 1 +.names state_machine_uds_000_int_7_0_1_n.BLIF DS_030_i.BLIF \ +state_machine_uds_000_int_7_0_n +11 1 +.names CLK_030_H_i.BLIF N_202.BLIF N_138 +11 1 +.names N_118.BLIF N_118_i +0 1 +.names N_139_1.BLIF CLK_000_D4_i.BLIF N_139 +11 1 +.names N_118_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0.BLIF N_201_0 +11 1 +.names AS_030_c.BLIF N_78.BLIF N_140 +11 1 +.names N_117.BLIF N_117_i +0 1 +.names inst_CLK_030_H.BLIF CLK_030_i.BLIF N_141 +11 1 +.names AS_030_c_i.BLIF N_117_i.BLIF N_200_0 +11 1 +.names cpu_est_1_.BLIF cpu_est_2_.BLIF N_142 +11 1 +.names N_115.BLIF N_115_i +0 1 +.names cpu_est_0_.BLIF cpu_est_3_reg.BLIF N_143 +11 1 +.names N_116.BLIF N_116_i +0 1 +.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_144 +11 1 +.names N_199_0_1.BLIF N_115_i.BLIF N_199_0 +11 1 +.names CLK_000_D0_i.BLIF N_171.BLIF N_145 +11 1 +.names BG_030_c.BLIF BG_030_c_i +0 1 +.names N_164.BLIF SM_AMIGA_0_.BLIF N_146 +11 1 +.names N_206.BLIF N_206_i +0 1 +.names N_147_1.BLIF nEXP_SPACE_i.BLIF N_147 +11 1 +.names BG_030_c_i.BLIF N_206_i.BLIF state_machine_un10_bg_030_0_n +11 1 +.names N_76.BLIF cpu_est_i_0__n.BLIF N_148 +11 1 +.names CLK_030_c.BLIF state_machine_un8_bgack_030_int_i_0_0_n.BLIF N_198_0 +11 1 +.names N_76_i.BLIF cpu_est_0_.BLIF N_149 +11 1 +.names AS_030_c_i.BLIF N_64.BLIF N_197_0 +11 1 +.names LDS_000_c.BLIF UDS_000_c.BLIF N_150 +11 1 +.names N_203.BLIF N_203_i +0 1 +.names N_152_1.BLIF VPA_D_i.BLIF N_152 +11 1 +.names state_machine_un13_clk_000_d0_n.BLIF state_machine_un13_clk_000_d0_i_n +0 1 +.names DTACK_D0_i.BLIF inst_VPA_D.BLIF N_153 +11 1 +.names N_203_i.BLIF state_machine_un13_clk_000_d0_i_n.BLIF \ +state_machine_un15_clk_000_d0_0_n +11 1 +.names inst_AS_000_INT.BLIF inst_CLK_000_D0.BLIF N_164 +11 1 +.names BGACK_000_c.BLIF N_76.BLIF state_machine_un6_bgack_000_0_n +11 1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_167 +11 1 +.names a_i_24__n.BLIF a_i_25__n.BLIF N_225_1 +11 1 +.names N_167.BLIF cpu_est_i_3__n.BLIF N_168 +11 1 +.names a_i_26__n.BLIF a_i_27__n.BLIF N_225_2 +11 1 +.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_169 +11 1 +.names a_i_28__n.BLIF a_i_29__n.BLIF N_225_3 +11 1 +.names inst_CLK_000_D3.BLIF CLK_000_D4_i.BLIF N_170 +11 1 +.names a_i_30__n.BLIF a_i_31__n.BLIF N_225_4 +11 1 +.names SM_AMIGA_6_.BLIF nEXP_SPACE_i.BLIF N_171 +11 1 +.names N_225_1.BLIF N_225_2.BLIF N_225_5 +11 1 +.names LDS_000_i.BLIF UDS_000_i.BLIF N_172 +11 1 +.names N_225_3.BLIF N_225_4.BLIF N_225_6 +11 1 +.names AS_000_i.BLIF BGACK_030_INT_i.BLIF N_173 +11 1 +.names a_c_20__n.BLIF a_c_21__n.BLIF N_228_1 +11 1 +.names N_225_5.BLIF N_225_6.BLIF N_225 +11 1 +.names a_c_22__n.BLIF a_c_23__n.BLIF N_228_2 +11 1 +.names N_228_1.BLIF N_228_2.BLIF N_228 +11 1 +.names a_c_17__n.BLIF BGACK_000_c.BLIF N_69_i_1 +11 1 +.names inst_CLK_000_D0.BLIF CLK_000_D0_i +0 1 +.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_69_i_2 +11 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +0 1 +.names a_i_19__n.BLIF a_i_16__n.BLIF N_69_i_3 +11 1 +.names CLK_030_c.BLIF CLK_030_i +0 1 +.names N_69_i_1.BLIF N_69_i_2.BLIF N_69_i_4 +11 1 +.names cpu_est_3_reg.BLIF cpu_est_i_3__n +0 1 +.names N_69_i_3.BLIF a_i_18__n.BLIF N_69_i_5 +11 1 +.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n +0 1 +.names N_150_i.BLIF AS_000_i.BLIF state_machine_un8_bgack_030_int_i_0_0_1_n +11 1 +.names nEXP_SPACE_c.BLIF nEXP_SPACE_i +0 1 +.names inst_CLK_000_D3.BLIF AS_030_000_SYNC_i.BLIF N_72_0_1 +11 1 +.names inst_CLK_000_D4.BLIF CLK_000_D4_i +0 1 +.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_51_0_1 +11 1 +.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n +0 1 +.names N_74.BLIF N_140_i.BLIF N_51_0_2 +11 1 +.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n +0 1 +.names N_133_i.BLIF N_134_i.BLIF cpu_est_ns_0_1_1__n +11 1 +.names AS_000_c.BLIF AS_000_i +0 1 +.names N_167_i.BLIF N_169_i.BLIF cpu_est_ns_0_2_1__n +11 1 +.names LDS_000_c.BLIF LDS_000_i +0 1 +.names CLK_000_D0_i.BLIF inst_CLK_000_D1.BLIF N_128_1 +11 1 +.names UDS_000_c.BLIF UDS_000_i +0 1 +.names N_61.BLIF SM_AMIGA_3_.BLIF N_128_2 +11 1 +.names cpu_est_1_.BLIF cpu_est_i_1__n +0 1 +.names inst_BGACK_030_INTreg.BLIF CLK_030_c.BLIF N_118_1 +11 1 +.names cpu_est_0_.BLIF cpu_est_i_0__n +0 1 +.names N_69.BLIF SM_AMIGA_7_.BLIF N_118_2 +11 1 +.names inst_DTACK_D0.BLIF DTACK_D0_i +0 1 +.names N_118_1.BLIF N_118_2.BLIF N_118_3 +11 1 +.names inst_VMA_INTreg.BLIF VMA_INT_i +0 1 +.names AS_030_c.BLIF CLK_000_c.BLIF N_206_1 +11 1 +.names inst_VPA_D.BLIF VPA_D_i +0 1 +.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF N_206_2 +11 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_i +0 1 +.names N_146_i.BLIF N_123_i.BLIF sm_amiga_ns_0_1_0__n +11 1 +.names inst_CLK_030_H.BLIF CLK_030_H_i +0 1 +.names N_144_i.BLIF N_142_i.BLIF cpu_est_ns_0_1_2__n +11 1 +.names RW_c.BLIF RW_i +0 1 +.names N_141_i.BLIF RW_i.BLIF N_53_0_1 +11 1 +.names cpu_est_2_.BLIF cpu_est_i_2__n +0 1 +.names N_78.BLIF N_132_i.BLIF N_43_i_1 +11 1 +.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n +0 1 +.names N_120_i.BLIF DS_030_i.BLIF state_machine_lds_000_int_7_0_1_n +11 1 +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names N_66_i.BLIF A0_i.BLIF state_machine_uds_000_int_7_0_1_n +11 1 +.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n +0 1 +.names N_116_i.BLIF AS_030_c_i.BLIF N_199_0_1 +11 1 +.names A0_c.BLIF A0_i +0 1 +.names N_82_i.BLIF VMA_INT_i.BLIF N_152_1 +11 1 +.names size_c_1__n.BLIF size_i_1__n +0 1 +.names AS_000_DMA_i.BLIF BGACK_030_INT_i.BLIF N_147_1 +11 1 +.names DS_030_c.BLIF DS_030_i +0 1 +.names N_74_i.BLIF inst_BGACK_030_INT_D.BLIF N_139_1 +11 1 +.names a_c_19__n.BLIF a_i_19__n +0 1 +.names N_173.BLIF RW_c.BLIF N_137_1 +11 1 +.names a_c_16__n.BLIF a_i_16__n +0 1 +.names N_61.BLIF CLK_000_D0_i.BLIF N_127_1 +11 1 +.names a_c_18__n.BLIF a_i_18__n +0 1 +.names A0_i.BLIF size_c_0__n.BLIF N_120_1 +11 1 +.names a_c_30__n.BLIF a_i_30__n +0 1 +.names UDS_000_c.BLIF LDS_000_i.BLIF state_machine_a0_dma_2_1_n +11 1 +.names a_c_31__n.BLIF a_i_31__n +0 1 +.names DS_030_i.BLIF N_62_i.BLIF N_116_1 +11 1 +.names a_c_28__n.BLIF a_i_28__n +0 1 +.names DS_030_i.BLIF N_64_i.BLIF N_115_1 +11 1 +.names a_c_29__n.BLIF a_i_29__n +0 1 +.names cpu_est_2_.BLIF N_164.BLIF state_machine_un13_clk_000_d0_1_n +11 1 +.names a_c_26__n.BLIF a_i_26__n +0 1 +.names CLK_000_D0_i.BLIF N_169.BLIF N_203_1 +11 1 +.names a_c_27__n.BLIF a_i_27__n +0 1 +.names RW_c.BLIF state_machine_uds_000_int_7_0_m3_un3_n +0 1 +.names a_c_24__n.BLIF a_i_24__n +0 1 +.names N_64.BLIF RW_c.BLIF state_machine_uds_000_int_7_0_m3_un1_n +11 1 +.names a_c_25__n.BLIF a_i_25__n +0 1 +.names N_62.BLIF state_machine_uds_000_int_7_0_m3_un3_n.BLIF \ +state_machine_uds_000_int_7_0_m3_un0_n +11 1 +.names RST_c.BLIF RST_i +0 1 .names N_65.BLIF dsack1_int_0_un3_n 0 1 -.names N_232_i.BLIF N_65.BLIF dsack1_int_0_un1_n +.names N_205_i.BLIF N_65.BLIF dsack1_int_0_un1_n 11 1 .names inst_DSACK1_INT.BLIF dsack1_int_0_un3_n.BLIF dsack1_int_0_un0_n 11 1 -.names N_224.BLIF as_000_dma_0_un3_n +.names N_205.BLIF N_205_i 0 1 -.names A0_DMA_0_sqmuxa_i_0.BLIF N_224.BLIF as_000_dma_0_un1_n -11 1 -.names inst_AS_000_DMA.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n -11 1 -.names N_226.BLIF as_000_int_0_un3_n +.names state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un3_n 0 1 -.names N_126_i.BLIF N_226.BLIF as_000_int_0_un1_n -11 1 -.names inst_AS_000_INT.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n -11 1 -.names N_227.BLIF vpa_sync_0_un3_n +.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i 0 1 -.names N_231_i.BLIF N_227.BLIF vpa_sync_0_un1_n +.names state_machine_un13_clk_000_d0_n.BLIF \ +state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un1_n 11 1 -.names inst_VPA_SYNC.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n -11 1 -.names N_225.BLIF vma_int_0_un3_n +.names inst_CLK_OUT_PRE_50_D.BLIF CLK_OUT_PRE_50_D_i 0 1 -.names N_108.BLIF N_225.BLIF vma_int_0_un1_n -11 1 .names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n 11 1 .names state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n @@ -1052,70 +947,107 @@ bgack_030_int_0_un1_n .names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \ bgack_030_int_0_un0_n 11 1 -.names N_224.BLIF size_dma_0_0__un3_n +.names N_76.BLIF ipl_030_0_0__un3_n 0 1 -.names SIZE_DMA_0_sqmuxa_i.BLIF N_224.BLIF size_dma_0_0__un1_n -11 1 -.names SIZE_DMA_0_.BLIF size_dma_0_0__un3_n.BLIF size_dma_0_0__un0_n -11 1 -.names N_224.BLIF size_dma_0_1__un3_n -0 1 -.names N_31.BLIF N_224.BLIF size_dma_0_1__un1_n -11 1 -.names SIZE_DMA_1_.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un0_n -11 1 -.names N_73.BLIF ipl_030_0_0__un3_n -0 1 -.names IPL_030DFFSH_0_reg.BLIF N_73.BLIF ipl_030_0_0__un1_n +.names IPL_030DFFSH_0_reg.BLIF N_76.BLIF ipl_030_0_0__un1_n 11 1 .names ipl_c_0__n.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n 11 1 -.names N_73.BLIF ipl_030_0_1__un3_n +.names N_76.BLIF ipl_030_0_1__un3_n 0 1 -.names IPL_030DFFSH_1_reg.BLIF N_73.BLIF ipl_030_0_1__un1_n +.names IPL_030DFFSH_1_reg.BLIF N_76.BLIF ipl_030_0_1__un1_n 11 1 .names ipl_c_1__n.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n 11 1 -.names N_73.BLIF ipl_030_0_2__un3_n +.names N_76.BLIF ipl_030_0_2__un3_n 0 1 -.names IPL_030DFFSH_2_reg.BLIF N_73.BLIF ipl_030_0_2__un1_n +.names IPL_030DFFSH_2_reg.BLIF N_76.BLIF ipl_030_0_2__un1_n 11 1 .names ipl_c_2__n.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n 11 1 -.names N_39.BLIF amiga_bus_enable_0_un3_n +.names N_76.BLIF cpu_estse_0_un3_n 0 1 -.names state_machine_amiga_bus_enable_6_iv_i_n.BLIF N_39.BLIF \ +.names cpu_est_1_.BLIF N_76.BLIF cpu_estse_0_un1_n +11 1 +.names cpu_est_ns_1__n.BLIF cpu_estse_0_un3_n.BLIF cpu_estse_0_un0_n +11 1 +.names N_76.BLIF cpu_estse_1_un3_n +0 1 +.names cpu_est_2_.BLIF N_76.BLIF cpu_estse_1_un1_n +11 1 +.names cpu_est_ns_2__n.BLIF cpu_estse_1_un3_n.BLIF cpu_estse_1_un0_n +11 1 +.names N_76.BLIF cpu_estse_2_un3_n +0 1 +.names cpu_est_3_reg.BLIF N_76.BLIF cpu_estse_2_un1_n +11 1 +.names N_151_i.BLIF cpu_estse_2_un3_n.BLIF cpu_estse_2_un0_n +11 1 +.names N_51.BLIF amiga_bus_enable_0_un3_n +0 1 +.names state_machine_amiga_bus_enable_4_iv_i_n.BLIF N_51.BLIF \ amiga_bus_enable_0_un1_n 11 1 .names AMIGA_BUS_ENABLEDFFSHreg.BLIF amiga_bus_enable_0_un3_n.BLIF \ amiga_bus_enable_0_un0_n 11 1 -.names N_37.BLIF uds_000_int_0_un3_n +.names N_201.BLIF as_030_000_sync_0_un3_n 0 1 -.names state_machine_uds_000_int_7_n.BLIF N_37.BLIF uds_000_int_0_un1_n +.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_2.BLIF N_201.BLIF as_030_000_sync_0_un1_n +11 1 +.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ +as_030_000_sync_0_un0_n +11 1 +.names RST_c.BLIF clk_030_h_0_un3_n +0 1 +.names N_48_i.BLIF RST_c.BLIF clk_030_h_0_un1_n +11 1 +.names inst_CLK_030_H.BLIF clk_030_h_0_un3_n.BLIF clk_030_h_0_un0_n +11 1 +.names N_199.BLIF uds_000_int_0_un3_n +0 1 +.names state_machine_uds_000_int_7_n.BLIF N_199.BLIF uds_000_int_0_un1_n 11 1 .names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n 11 1 -.names N_37.BLIF lds_000_int_0_un3_n +.names N_199.BLIF lds_000_int_0_un3_n 0 1 -.names state_machine_lds_000_int_7_n.BLIF N_37.BLIF lds_000_int_0_un1_n +.names state_machine_lds_000_int_7_n.BLIF N_199.BLIF lds_000_int_0_un1_n 11 1 .names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n 11 1 -.names N_35.BLIF as_030_000_sync_0_un3_n +.names N_200.BLIF fpu_cs_int_0_un3_n 0 1 -.names inst_CLK_OUT_PRE.BLIF CLK_CNT_P_0_.BLIF CLK_OUT_PRE_0 -01 1 -10 1 -11 0 -00 0 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 -01 1 -10 1 -11 0 -00 0 -.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF cpu_est_ns_0_0_x2_1_ +.names AS_030_c.BLIF N_200.BLIF fpu_cs_int_0_un1_n +11 1 +.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n +11 1 +.names state_machine_un10_bg_030_n.BLIF bg_000_0_un3_n +0 1 +.names BG_030_c.BLIF state_machine_un10_bg_030_n.BLIF bg_000_0_un1_n +11 1 +.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +11 1 +.names N_53.BLIF ds_000_dma_0_un3_n +0 1 +.names state_machine_ds_000_dma_3_n.BLIF N_53.BLIF ds_000_dma_0_un1_n +11 1 +.names inst_DS_000_DMA.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n +11 1 +.names N_198.BLIF as_000_dma_0_un3_n +0 1 +.names state_machine_un8_bgack_030_int_i_0_n.BLIF N_198.BLIF \ +as_000_dma_0_un1_n +11 1 +.names inst_AS_000_DMA.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n +11 1 +.names N_197.BLIF as_000_int_0_un3_n +0 1 +.names N_64.BLIF N_197.BLIF as_000_int_0_un1_n +11 1 +.names inst_AS_000_INT.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n +11 1 +.names inst_CLK_OUT_PRE_25.BLIF clk_un3_clk_out_pre_50_n.BLIF CLK_OUT_PRE_25_0 01 1 10 1 11 0 @@ -1165,7 +1097,7 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names vcc_n_n.BLIF AMIGA_BUS_ENABLE_LOW 1 1 0 0 -.names N_253.BLIF CIIN +.names N_228.BLIF CIIN 1 1 0 0 .names IPL_030DFFSH_1_reg.BLIF IPL_030_1_ @@ -1198,18 +1130,18 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names RST_i.BLIF cpu_est_3_reg.AR 1 1 0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C -1 1 -0 0 -.names RST_i.BLIF SM_AMIGA_1_.AR -1 1 -0 0 .names CLK_OSZI_c.BLIF SM_AMIGA_0_.C 1 1 0 0 .names RST_i.BLIF SM_AMIGA_0_.AR 1 1 0 0 +.names CLK_OSZI_c.BLIF SIZE_DMA_1_.C +1 1 +0 0 +.names RST_i.BLIF SIZE_DMA_1_.AP +1 1 +0 0 .names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C 1 1 0 0 @@ -1264,16 +1196,16 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names RST_i.BLIF SM_AMIGA_2_.AR 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_AS_000_INT.C +.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C 1 1 0 0 -.names RST_i.BLIF inst_AS_000_INT.AP +.names RST_i.BLIF SM_AMIGA_1_.AR 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_VPA_SYNC.C +.names CLK_OSZI_c.BLIF inst_DSACK1_INT.C 1 1 0 0 -.names RST_i.BLIF inst_VPA_SYNC.AP +.names RST_i.BLIF inst_DSACK1_INT.AP 1 1 0 0 .names CLK_OSZI_c.BLIF inst_VMA_INTreg.C @@ -1288,13 +1220,13 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names RST_i.BLIF inst_BGACK_030_INTreg.AP 1 1 0 0 -.names CLK_OUT_PRE_0.BLIF inst_CLK_OUT_PRE.D +.names CLK_OUT_PRE_25_0.BLIF inst_CLK_OUT_PRE_25.D 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_25.C 1 1 0 0 -.names RST_i.BLIF inst_CLK_OUT_PRE.AR +.names RST_i.BLIF inst_CLK_OUT_PRE_25.AR 1 1 0 0 .names CLK_OSZI_c.BLIF SIZE_DMA_0_.C @@ -1303,60 +1235,6 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names RST_i.BLIF SIZE_DMA_0_.AP 1 1 0 0 -.names CLK_OSZI_c.BLIF SIZE_DMA_1_.C -1 1 -0 0 -.names RST_i.BLIF SIZE_DMA_1_.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_DS_000_DMA.C -1 1 -0 0 -.names RST_i.BLIF inst_DS_000_DMA.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C -1 1 -0 0 -.names RST_i.BLIF inst_FPU_CS_INTreg.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_DTACK_SYNC.C -1 1 -0 0 -.names RST_i.BLIF inst_DTACK_SYNC.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_A0_DMA.C -1 1 -0 0 -.names RST_i.BLIF inst_A0_DMA.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF BG_000DFFSHreg.C -1 1 -0 0 -.names RST_i.BLIF BG_000DFFSHreg.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_DSACK1_INT.C -1 1 -0 0 -.names RST_i.BLIF inst_DSACK1_INT.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C -1 1 -0 0 -.names RST_i.BLIF inst_AS_000_DMA.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF AMIGA_BUS_ENABLEDFFSHreg.C -1 1 -0 0 -.names RST_i.BLIF AMIGA_BUS_ENABLEDFFSHreg.AP -1 1 -0 0 .names CLK_OSZI_c.BLIF inst_UDS_000_INT.C 1 1 0 0 @@ -1369,12 +1247,57 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names RST_i.BLIF inst_LDS_000_INT.AP 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C +1 1 +0 0 +.names RST_i.BLIF inst_FPU_CS_INTreg.AP +1 1 +0 0 +.names CLK_OSZI_c.BLIF BG_000DFFSHreg.C +1 1 +0 0 +.names RST_i.BLIF BG_000DFFSHreg.AP +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_DS_000_DMA.C +1 1 +0 0 +.names RST_i.BLIF inst_DS_000_DMA.AP +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C +1 1 +0 0 +.names RST_i.BLIF inst_AS_000_DMA.AP +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_AS_000_INT.C +1 1 +0 0 +.names RST_i.BLIF inst_AS_000_INT.AP +1 1 +0 0 +.names CLK_OSZI_c.BLIF AMIGA_BUS_ENABLEDFFSHreg.C +1 1 +0 0 +.names RST_i.BLIF AMIGA_BUS_ENABLEDFFSHreg.AP +1 1 +0 0 .names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C 1 1 0 0 .names RST_i.BLIF inst_AS_030_000_SYNC.AP 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_CLK_030_H.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_A0_DMA.C +1 1 +0 0 +.names RST_i.BLIF inst_A0_DMA.AP +1 1 +0 0 .names inst_CLK_000_D3.BLIF inst_CLK_000_D4.D 1 1 0 0 @@ -1384,13 +1307,13 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names RST_i.BLIF inst_CLK_000_D4.AP 1 1 0 0 -.names inst_CLK_000_D4.BLIF inst_CLK_000_D5.D +.names DTACK.PIN.BLIF inst_DTACK_D0.D 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_CLK_000_D5.C +.names CLK_OSZI_c.BLIF inst_DTACK_D0.C 1 1 0 0 -.names RST_i.BLIF inst_CLK_000_D5.AP +.names RST_i.BLIF inst_DTACK_D0.AP 1 1 0 0 .names inst_CLK_000_D2.BLIF inst_CLK_000_D3.D @@ -1402,12 +1325,6 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names RST_i.BLIF inst_CLK_000_D3.AP 1 1 0 0 -.names CLK_OSZI_c.BLIF CLK_CNT_P_0_.C -1 1 -0 0 -.names RST_i.BLIF CLK_CNT_P_0_.AR -1 1 -0 0 .names inst_CLK_000_D1.BLIF inst_CLK_000_D2.D 1 1 0 0 @@ -1417,6 +1334,15 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names RST_i.BLIF inst_CLK_000_D2.AP 1 1 0 0 +.names inst_CLK_OUT_PRE_25.BLIF CLK_OUT_INTreg.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C +1 1 +0 0 +.names RST_i.BLIF CLK_OUT_INTreg.AR +1 1 +0 0 .names inst_CLK_000_D0.BLIF inst_CLK_000_D1.D 1 1 0 0 @@ -1426,15 +1352,6 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names RST_i.BLIF inst_CLK_000_D1.AP 1 1 0 0 -.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C -1 1 -0 0 -.names RST_i.BLIF CLK_OUT_INTreg.AR -1 1 -0 0 .names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.D 1 1 0 0 @@ -1444,6 +1361,15 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names RST_i.BLIF inst_BGACK_030_INT_D.AP 1 1 0 0 +.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50_D.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_50_D.C +1 1 +0 0 +.names RST_i.BLIF inst_CLK_OUT_PRE_50_D.AR +1 1 +0 0 .names CLK_000_c.BLIF inst_CLK_000_D0.D 1 1 0 0 @@ -1462,6 +1388,12 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names RST_i.BLIF inst_VPA_D.AP 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_50.C +1 1 +0 0 +.names RST_i.BLIF inst_CLK_OUT_PRE_50.AR +1 1 +0 0 .names vcc_n_n.BLIF RESETDFFRHreg.D 1 1 0 0 @@ -1504,12 +1436,6 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names vcc_n_n.BLIF DSACK_0_ 1 1 0 0 -.names BG_030.BLIF BG_030_c -1 1 -0 0 -.names BGACK_000.BLIF BGACK_000_c -1 1 -0 0 .names CLK_030.BLIF CLK_030_c 1 1 0 0 @@ -1531,9 +1457,6 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names DSACK_1_.PIN.BLIF dsack_c_1__n 1 1 0 0 -.names DTACK.PIN.BLIF DTACK_c -1 1 -0 0 .names RST.BLIF RST_c 1 1 0 0 @@ -1621,13 +1544,19 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names nEXP_SPACE.BLIF nEXP_SPACE_c 1 1 0 0 -.names N_166.BLIF AS_030.OE +.names BG_030.BLIF BG_030_c +1 1 +0 0 +.names BGACK_000.BLIF BGACK_000_c +1 1 +0 0 +.names N_147.BLIF AS_030.OE 1 1 0 0 .names inst_BGACK_030_INTreg.BLIF AS_000.OE 1 1 0 0 -.names N_166.BLIF DS_030.OE +.names N_147.BLIF DS_030.OE 1 1 0 0 .names inst_BGACK_030_INTreg.BLIF UDS_000.OE @@ -1636,19 +1565,19 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names inst_BGACK_030_INTreg.BLIF LDS_000.OE 1 1 0 0 -.names N_166.BLIF SIZE_0_.OE +.names N_147.BLIF SIZE_0_.OE 1 1 0 0 -.names N_166.BLIF SIZE_1_.OE +.names N_147.BLIF SIZE_1_.OE 1 1 0 0 -.names N_166.BLIF A0.OE +.names N_147.BLIF A0.OE 1 1 0 0 .names nEXP_SPACE_c.BLIF DSACK_1_.OE 1 1 0 0 -.names N_166.BLIF DTACK.OE +.names N_147.BLIF DTACK.OE 1 1 0 0 .names FPU_CS_INT_i.BLIF BERR.OE @@ -1660,7 +1589,7 @@ un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 .names FPU_CS_INT_i.BLIF AVEC_EXP.OE 1 1 0 0 -.names N_263.BLIF CIIN.OE +.names N_225.BLIF CIIN.OE 1 1 0 0 .end diff --git a/Logic/68030_tk.bl3 b/Logic/68030_tk.bl3 index 3186494..cdbde17 100644 --- a/Logic/68030_tk.bl3 +++ b/Logic/68030_tk.bl3 @@ -1,81 +1,84 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Sun May 25 21:18:50 2014 +#$ DATE Wed May 28 21:24:55 2014 #$ MODULE 68030_tk -#$ PINS 59 SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 SIZE_0_ DS_030 \ -# A_30_ UDS_000 A_29_ LDS_000 A_28_ A0 A_27_ nEXP_SPACE A_26_ BERR A_25_ BG_030 A_24_ BG_000 \ -# A_23_ BGACK_030 A_22_ BGACK_000 A_21_ CLK_030 A_20_ CLK_000 A_19_ CLK_OSZI A_18_ \ -# CLK_DIV_OUT A_17_ CLK_EXP A_16_ FPU_CS IPL_030_1_ DTACK IPL_030_0_ AVEC IPL_1_ AVEC_EXP \ -# IPL_0_ E DSACK_0_ VPA FC_0_ VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \ -# AMIGA_BUS_ENABLE_LOW CIIN -#$ NODES 44 BG_000DFFSHreg inst_BGACK_030_INTreg inst_FPU_CS_INTreg \ -# inst_VMA_INTreg inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_SYNC inst_VPA_D \ -# inst_CLK_000_D0 CLK_OUT_INTreg inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D5 \ -# IPL_030DFFSH_0_reg inst_CLK_OUT_PRE inst_BGACK_030_INT_D IPL_030DFFSH_1_reg \ -# IPL_030DFFSH_2_reg CLK_CNT_P_0_ SM_AMIGA_5_ inst_CLK_000_D4 SM_AMIGA_7_ SM_AMIGA_1_ \ -# SM_AMIGA_0_ SM_AMIGA_6_ inst_AS_000_DMA inst_AS_000_INT inst_UDS_000_INT \ -# inst_LDS_000_INT inst_DSACK1_INT inst_CLK_000_D3 SM_AMIGA_3_ inst_DS_000_DMA \ -# SIZE_DMA_0_ SIZE_DMA_1_ inst_A0_DMA SM_AMIGA_4_ RESETDFFRHreg SM_AMIGA_2_ \ -# AMIGA_BUS_ENABLEDFFSHreg cpu_est_0_ cpu_est_1_ cpu_est_2_ cpu_est_3_reg +#$ PINS 59 A_21_ A_20_ SIZE_1_ A_19_ A_18_ A_31_ A_17_ A_16_ IPL_030_2_ IPL_030_1_ \ +# IPL_030_0_ IPL_2_ IPL_1_ IPL_0_ DSACK_1_ DSACK_0_ FC_0_ FC_1_ AS_030 AS_000 DS_030 \ +# UDS_000 LDS_000 A0 nEXP_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 \ +# CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS DTACK AVEC AVEC_EXP E VPA VMA RST RESET RW \ +# AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ \ +# A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ +#$ NODES 44 inst_BGACK_030_INTreg CLK_OUT_INTreg inst_FPU_CS_INTreg \ +# inst_VMA_INTreg inst_AS_030_000_SYNC IPL_030DFFSH_0_reg inst_BGACK_030_INT_D \ +# inst_AS_000_DMA IPL_030DFFSH_1_reg inst_VPA_D inst_CLK_OUT_PRE_50_D \ +# IPL_030DFFSH_2_reg inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D4 \ +# inst_DTACK_D0 inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_25 inst_AS_000_INT SM_AMIGA_1_ \ +# SM_AMIGA_0_ SM_AMIGA_6_ SM_AMIGA_5_ inst_UDS_000_INT inst_LDS_000_INT \ +# inst_DSACK1_INT inst_CLK_000_D3 inst_CLK_030_H RESETDFFRHreg inst_DS_000_DMA \ +# SIZE_DMA_0_ SIZE_DMA_1_ inst_A0_DMA SM_AMIGA_7_ AMIGA_BUS_ENABLEDFFSHreg \ +# SM_AMIGA_4_ SM_AMIGA_3_ SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ cpu_est_2_ cpu_est_3_reg \ +# BG_000DFFSHreg .model bus68030 .inputs A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF \ BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF VPA.BLIF RST.BLIF \ RW.BLIF A_30_.BLIF A_29_.BLIF A_28_.BLIF A_27_.BLIF A_26_.BLIF A_25_.BLIF \ A_24_.BLIF A_23_.BLIF A_22_.BLIF A_21_.BLIF A_20_.BLIF A_19_.BLIF A_18_.BLIF \ -A_17_.BLIF A_16_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF BG_000DFFSHreg.BLIF \ -inst_BGACK_030_INTreg.BLIF inst_FPU_CS_INTreg.BLIF inst_VMA_INTreg.BLIF \ -inst_AS_030_000_SYNC.BLIF inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \ -inst_VPA_D.BLIF inst_CLK_000_D0.BLIF CLK_OUT_INTreg.BLIF inst_CLK_000_D1.BLIF \ -inst_CLK_000_D2.BLIF inst_CLK_000_D5.BLIF IPL_030DFFSH_0_reg.BLIF \ -inst_CLK_OUT_PRE.BLIF inst_BGACK_030_INT_D.BLIF IPL_030DFFSH_1_reg.BLIF \ -IPL_030DFFSH_2_reg.BLIF CLK_CNT_P_0_.BLIF SM_AMIGA_5_.BLIF \ -inst_CLK_000_D4.BLIF SM_AMIGA_7_.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF \ -SM_AMIGA_6_.BLIF inst_AS_000_DMA.BLIF inst_AS_000_INT.BLIF \ -inst_UDS_000_INT.BLIF inst_LDS_000_INT.BLIF inst_DSACK1_INT.BLIF \ -inst_CLK_000_D3.BLIF SM_AMIGA_3_.BLIF inst_DS_000_DMA.BLIF SIZE_DMA_0_.BLIF \ -SIZE_DMA_1_.BLIF inst_A0_DMA.BLIF SM_AMIGA_4_.BLIF RESETDFFRHreg.BLIF \ -SM_AMIGA_2_.BLIF AMIGA_BUS_ENABLEDFFSHreg.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF \ -cpu_est_2_.BLIF cpu_est_3_reg.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF \ +A_17_.BLIF A_16_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF \ +inst_BGACK_030_INTreg.BLIF CLK_OUT_INTreg.BLIF inst_FPU_CS_INTreg.BLIF \ +inst_VMA_INTreg.BLIF inst_AS_030_000_SYNC.BLIF IPL_030DFFSH_0_reg.BLIF \ +inst_BGACK_030_INT_D.BLIF inst_AS_000_DMA.BLIF IPL_030DFFSH_1_reg.BLIF \ +inst_VPA_D.BLIF inst_CLK_OUT_PRE_50_D.BLIF IPL_030DFFSH_2_reg.BLIF \ +inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF inst_CLK_000_D2.BLIF \ +inst_CLK_000_D4.BLIF inst_DTACK_D0.BLIF inst_CLK_OUT_PRE_50.BLIF \ +inst_CLK_OUT_PRE_25.BLIF inst_AS_000_INT.BLIF SM_AMIGA_1_.BLIF \ +SM_AMIGA_0_.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_5_.BLIF inst_UDS_000_INT.BLIF \ +inst_LDS_000_INT.BLIF inst_DSACK1_INT.BLIF inst_CLK_000_D3.BLIF \ +inst_CLK_030_H.BLIF RESETDFFRHreg.BLIF inst_DS_000_DMA.BLIF SIZE_DMA_0_.BLIF \ +SIZE_DMA_1_.BLIF inst_A0_DMA.BLIF SM_AMIGA_7_.BLIF \ +AMIGA_BUS_ENABLEDFFSHreg.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_3_.BLIF \ +SM_AMIGA_2_.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF \ +cpu_est_3_reg.BLIF BG_000DFFSHreg.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF \ DS_030.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF \ SIZE_1_.PIN.BLIF A0.PIN.BLIF DSACK_1_.PIN.BLIF DTACK.PIN.BLIF .outputs IPL_030_2_ BERR BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS AVEC \ AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ CIIN IPL_030_1_ IPL_030_0_ cpu_est_0_.D cpu_est_0_.C cpu_est_0_.AR \ cpu_est_1_.D cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.D cpu_est_2_.C \ -cpu_est_2_.AR cpu_est_3_reg.C cpu_est_3_reg.AR SM_AMIGA_1_.D SM_AMIGA_1_.C \ -SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR IPL_030DFFSH_0_reg.D \ +cpu_est_2_.AR cpu_est_3_reg.C cpu_est_3_reg.AR SM_AMIGA_0_.D SM_AMIGA_0_.C \ +SM_AMIGA_0_.AR SIZE_DMA_1_.D SIZE_DMA_1_.C SIZE_DMA_1_.AP IPL_030DFFSH_0_reg.D \ IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP IPL_030DFFSH_1_reg.D \ IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D \ IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D SM_AMIGA_7_.C \ SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.D \ SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR \ SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C \ -SM_AMIGA_2_.AR inst_AS_000_INT.D inst_AS_000_INT.C inst_AS_000_INT.AP \ -inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_VMA_INTreg.D \ -inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_BGACK_030_INTreg.D \ -inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE.D \ -inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR SIZE_DMA_0_.D SIZE_DMA_0_.C \ -SIZE_DMA_0_.AP SIZE_DMA_1_.D SIZE_DMA_1_.C SIZE_DMA_1_.AP inst_DS_000_DMA.D \ -inst_DS_000_DMA.C inst_DS_000_DMA.AP inst_FPU_CS_INTreg.D inst_FPU_CS_INTreg.C \ -inst_FPU_CS_INTreg.AP inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP \ -inst_A0_DMA.D inst_A0_DMA.C inst_A0_DMA.AP BG_000DFFSHreg.D BG_000DFFSHreg.C \ -BG_000DFFSHreg.AP inst_DSACK1_INT.D inst_DSACK1_INT.C inst_DSACK1_INT.AP \ -inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_000_DMA.AP \ -AMIGA_BUS_ENABLEDFFSHreg.D AMIGA_BUS_ENABLEDFFSHreg.C \ -AMIGA_BUS_ENABLEDFFSHreg.AP inst_UDS_000_INT.D inst_UDS_000_INT.C \ -inst_UDS_000_INT.AP inst_LDS_000_INT.D inst_LDS_000_INT.C inst_LDS_000_INT.AP \ -inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP \ -inst_CLK_000_D4.D inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_CLK_000_D5.D \ -inst_CLK_000_D5.C inst_CLK_000_D5.AP inst_CLK_000_D3.D inst_CLK_000_D3.C \ -inst_CLK_000_D3.AP CLK_CNT_P_0_.D CLK_CNT_P_0_.C CLK_CNT_P_0_.AR \ -inst_CLK_000_D2.D inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D1.D \ -inst_CLK_000_D1.C inst_CLK_000_D1.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C \ -CLK_OUT_INTreg.AR inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C \ -inst_BGACK_030_INT_D.AP inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D0.AP \ -inst_VPA_D.D inst_VPA_D.C inst_VPA_D.AP RESETDFFRHreg.D RESETDFFRHreg.C \ -RESETDFFRHreg.AR SIZE_1_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 \ -DTACK SIZE_0_ DSACK_0_ AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE \ -SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE DSACK_0_.OE \ -AVEC_EXP.OE CIIN.OE cpu_est_3_reg.D.X1 cpu_est_3_reg.D.X2 +SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR inst_DSACK1_INT.D \ +inst_DSACK1_INT.C inst_DSACK1_INT.AP inst_VMA_INTreg.C inst_VMA_INTreg.AP \ +inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP \ +inst_CLK_OUT_PRE_25.D inst_CLK_OUT_PRE_25.C inst_CLK_OUT_PRE_25.AR \ +SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_0_.AP inst_UDS_000_INT.D \ +inst_UDS_000_INT.C inst_UDS_000_INT.AP inst_LDS_000_INT.D inst_LDS_000_INT.C \ +inst_LDS_000_INT.AP inst_FPU_CS_INTreg.D inst_FPU_CS_INTreg.C \ +inst_FPU_CS_INTreg.AP BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP \ +inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DS_000_DMA.AP inst_AS_000_DMA.D \ +inst_AS_000_DMA.C inst_AS_000_DMA.AP inst_AS_000_INT.D inst_AS_000_INT.C \ +inst_AS_000_INT.AP AMIGA_BUS_ENABLEDFFSHreg.D AMIGA_BUS_ENABLEDFFSHreg.C \ +AMIGA_BUS_ENABLEDFFSHreg.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C \ +inst_AS_030_000_SYNC.AP inst_CLK_030_H.D inst_CLK_030_H.C inst_A0_DMA.D \ +inst_A0_DMA.C inst_A0_DMA.AP inst_CLK_000_D4.D inst_CLK_000_D4.C \ +inst_CLK_000_D4.AP inst_DTACK_D0.D inst_DTACK_D0.C inst_DTACK_D0.AP \ +inst_CLK_000_D3.D inst_CLK_000_D3.C inst_CLK_000_D3.AP inst_CLK_000_D2.D \ +inst_CLK_000_D2.C inst_CLK_000_D2.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C \ +CLK_OUT_INTreg.AR inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D1.AP \ +inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP \ +inst_CLK_OUT_PRE_50_D.D inst_CLK_OUT_PRE_50_D.C inst_CLK_OUT_PRE_50_D.AR \ +inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D0.AP inst_VPA_D.D \ +inst_VPA_D.C inst_VPA_D.AP inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C \ +inst_CLK_OUT_PRE_50.AR RESETDFFRHreg.D RESETDFFRHreg.C RESETDFFRHreg.AR \ +SIZE_1_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 DTACK SIZE_0_ \ +DSACK_0_ AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE SIZE_0_.OE \ +SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE \ +inst_VMA_INTreg.D.X1 inst_VMA_INTreg.D.X2 cpu_est_3_reg.D.X1 \ +cpu_est_3_reg.D.X2 .names inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF cpu_est_0_.BLIF cpu_est_0_.D 100 1 -11 1 @@ -109,169 +112,131 @@ cpu_est_1_.BLIF cpu_est_2_.BLIF cpu_est_3_reg.BLIF cpu_est_2_.D --010- 0 -1--0- 0 0---0- 0 -.names inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D5.BLIF \ -inst_CLK_000_D4.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_1_.D ---011- 1 -11---1 1 +.names inst_CLK_000_D0.BLIF inst_CLK_000_D4.BLIF inst_AS_000_INT.BLIF \ +SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF inst_CLK_000_D3.BLIF SM_AMIGA_0_.D +01-1-- 1 +--0-1- 1 +0--1-0 1 0---1- 1 --1--1- 1 -10-0-- 0 -101--- 0 -0---0- 0 --0--0- 0 -----00 0 -.names inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D5.BLIF \ -inst_CLK_000_D4.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF inst_AS_000_INT.BLIF \ -SM_AMIGA_0_.D -10-01-- 1 -101-1-- 1 -0----1- 1 --0---1- 1 ------10 1 ---01-0- 0 -11----1 0 -----00- 0 -0----0- 0 --1---0- 0 -.names IPL_0_.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \ -IPL_030DFFSH_0_reg.BLIF IPL_030DFFSH_0_reg.D -110- 1 ---11 1 --0-1 1 -010- 0 ---10 0 --0-0 0 -.names IPL_1_.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \ -IPL_030DFFSH_1_reg.BLIF IPL_030DFFSH_1_reg.D -110- 1 ---11 1 --0-1 1 -010- 0 ---10 0 --0-0 0 -.names IPL_2_.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \ -IPL_030DFFSH_2_reg.BLIF IPL_030DFFSH_2_reg.D -110- 1 ---11 1 --0-1 1 -010- 0 ---10 0 --0-0 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_030_000_SYNC.BLIF \ -inst_CLK_000_D0.BLIF inst_CLK_000_D2.BLIF SM_AMIGA_7_.BLIF SM_AMIGA_0_.BLIF \ -SM_AMIGA_6_.BLIF inst_AS_000_INT.BLIF inst_CLK_000_D3.BLIF SM_AMIGA_7_.D --1-1--1-1- 1 -01-0---1-- 1 -----11---- 1 ---1--1---- 1 --0---1---- 1 ------1---0 1 --1010---01 0 --1000--0-1 0 --1010-0--1 0 -11000----1 0 ----1-0--0- 0 ----0-0-0-- 0 ----1-00--- 0 -1--0-0---- 0 --0---0---- 0 -.names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_030_000_SYNC.BLIF \ -inst_CLK_000_D0.BLIF inst_CLK_000_D2.BLIF SM_AMIGA_7_.BLIF SM_AMIGA_6_.BLIF \ -inst_CLK_000_D3.BLIF SM_AMIGA_6_.D --10-01-1 1 -1--0--1- 1 --0----1- 1 --1-1-0-- 0 -01---0-- 0 --1-11--- 0 -01--1--- 0 --111---- 0 -011----- 0 --1-1---0 0 -01-----0 0 --0----0- 0 ------00- 0 -----1-0- 0 ---1---0- 0 -------00 0 -.names inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF SM_AMIGA_5_.BLIF \ -SM_AMIGA_6_.BLIF SM_AMIGA_5_.D -11-1 1 -0-1- 1 --11- 1 -0-0- 0 -10-- 0 ---00 0 -.names inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF SM_AMIGA_5_.BLIF \ -SM_AMIGA_4_.BLIF SM_AMIGA_4_.D -101- 1 -0--1 1 --0-1 1 -11-- 0 ---00 0 -0--0 0 -.names inst_BGACK_030_INTreg.BLIF inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \ -inst_CLK_000_D0.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_3_.D --11-1- 1 -1--1-1 1 -0---1- 1 ----11- 1 -1-00-- 0 -10-0-- 0 -0---0- 0 +1-1--- 0 ---00- 0 -----00 0 -.names inst_BGACK_030_INTreg.BLIF inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \ -inst_CLK_000_D0.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_2_.D -1-001- 1 -10-01- 1 -0----1 1 ----0-1 1 -1--1-- 0 --11--0 0 -----00 0 -0----0 0 -.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_5_.BLIF inst_CLK_000_D4.BLIF \ -inst_AS_000_INT.BLIF AS_030.PIN.BLIF inst_AS_000_INT.D ---01- 1 --0-1- 1 -0--1- 1 ---0-1 1 --0--1 1 -0---1 1 -111-- 0 ----00 0 -.names inst_BGACK_030_INTreg.BLIF inst_VMA_INTreg.BLIF inst_VPA_SYNC.BLIF \ -inst_VPA_D.BLIF inst_CLK_000_D0.BLIF SM_AMIGA_3_.BLIF cpu_est_1_.BLIF \ -cpu_est_3_reg.BLIF AS_030.PIN.BLIF inst_VPA_SYNC.D ---1----0- 1 ---1---1-- 1 ---1--0--- 1 ---1-0---- 1 ---11----- 1 --11------ 1 -0-1------ 1 +-0--01 0 +1---0- 0 +.names inst_BGACK_030_INTreg.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF \ +LDS_000.PIN.BLIF SIZE_DMA_1_.D +--00 1 +--11 1 +-1-- 1 +1--- 1 +0010 0 +0001 0 +.names IPL_0_.BLIF IPL_030DFFSH_0_reg.BLIF inst_CLK_000_D0.BLIF \ +inst_CLK_000_D1.BLIF IPL_030DFFSH_0_reg.D +1-10 1 +-10- 1 +-1-1 1 +0-10 0 +-00- 0 +-0-1 0 +.names IPL_1_.BLIF IPL_030DFFSH_1_reg.BLIF inst_CLK_000_D0.BLIF \ +inst_CLK_000_D1.BLIF IPL_030DFFSH_1_reg.D +1-10 1 +-10- 1 +-1-1 1 +0-10 0 +-00- 0 +-0-1 0 +.names IPL_2_.BLIF IPL_030DFFSH_2_reg.BLIF inst_CLK_000_D0.BLIF \ +inst_CLK_000_D1.BLIF IPL_030DFFSH_2_reg.D +1-10 1 +-10- 1 +-1-1 1 +0-10 0 +-00- 0 +-0-1 0 +.names nEXP_SPACE.BLIF inst_AS_030_000_SYNC.BLIF inst_CLK_000_D0.BLIF \ +inst_CLK_000_D2.BLIF inst_AS_000_INT.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_6_.BLIF \ +inst_CLK_000_D3.BLIF SM_AMIGA_7_.BLIF SM_AMIGA_7_.D +0-0---1-- 1 +--1-11--- 1 -------01 1 -------1-1 1 ------0--1 1 -----0---1 1 ---1----1 1 -1------1 1 -0-------1 1 -10-01101- 0 ---0-----0 0 -.names inst_BGACK_030_INTreg.BLIF inst_VMA_INTreg.BLIF inst_VPA_D.BLIF \ -inst_CLK_000_D0.BLIF SM_AMIGA_7_.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF \ -inst_VMA_INTreg.D -1---1-- 1 --1---0- 1 --1-1--- 1 --11---- 1 --1----1 1 ---00010 0 -0-00-10 0 --0--0-- 0 -00----- 0 +-000--01- 0 +-010-0-1- 0 +-0100--1- 0 +1000---1- 0 +--0---0-0 0 +--1--0--0 0 +--1-0---0 0 +1-0-----0 0 +.names nEXP_SPACE.BLIF inst_AS_030_000_SYNC.BLIF inst_CLK_000_D0.BLIF \ +inst_CLK_000_D2.BLIF SM_AMIGA_6_.BLIF inst_CLK_000_D3.BLIF SM_AMIGA_7_.BLIF \ +SM_AMIGA_6_.D +1-0-1-0 1 +-0-0-11 1 +----0-0 0 +--1---0 0 +0-----0 0 +-----01 0 +---1--1 0 +-1----1 0 +.names inst_CLK_000_D0.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_5_.D +11- 1 +1-1 1 +-00 0 +0-- 0 +.names inst_CLK_000_D0.BLIF SM_AMIGA_5_.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_4_.D +01- 1 +0-1 1 +-00 0 +1-- 0 +.names inst_VMA_INTreg.BLIF inst_VPA_D.BLIF inst_CLK_000_D0.BLIF \ +inst_CLK_000_D1.BLIF inst_DTACK_D0.BLIF SM_AMIGA_4_.BLIF SM_AMIGA_3_.BLIF \ +cpu_est_1_.BLIF cpu_est_3_reg.BLIF SM_AMIGA_3_.D +--1--1--- 1 +-0----11- 1 +-1--1-1-- 1 +10----1-- 1 +---0--1-- 1 +-0----1-0 1 +--1---1-- 1 +0001---01 0 +-1010---- 0 +-----00-- 0 +--0---0-- 0 +.names inst_VMA_INTreg.BLIF inst_VPA_D.BLIF inst_CLK_000_D0.BLIF \ +inst_CLK_000_D1.BLIF inst_DTACK_D0.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF \ +cpu_est_1_.BLIF cpu_est_3_reg.BLIF SM_AMIGA_2_.D +0001-1-01 1 +-10101--- 1 +--0---1-- 1 +-1--1-0-- 0 +-0----01- 0 +10----0-- 0 +-----00-- 0 +---0--0-- 0 +-0----0-0 0 +--1------ 0 +.names inst_CLK_000_D0.BLIF inst_CLK_000_D4.BLIF SM_AMIGA_1_.BLIF \ +inst_CLK_000_D3.BLIF SM_AMIGA_2_.BLIF SM_AMIGA_1_.D +-011- 1 +1-1-- 1 +1---1 1 +0--0- 0 +01--- 0 +0-0-- 0 +--0-0 0 +.names inst_CLK_000_D4.BLIF SM_AMIGA_1_.BLIF inst_DSACK1_INT.BLIF \ +inst_CLK_000_D3.BLIF AS_030.PIN.BLIF inst_DSACK1_INT.D +--10- 1 +-01-- 1 +1-1-- 1 +---01 1 +-0--1 1 +1---1 1 +01-1- 0 +--0-0 0 .names BGACK_000.BLIF inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF \ inst_CLK_000_D1.BLIF inst_BGACK_030_INTreg.D 1-10 1 @@ -279,43 +244,61 @@ inst_CLK_000_D1.BLIF inst_BGACK_030_INTreg.D -00- 0 0--- 0 -0-1 0 -.names CLK_030.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -SIZE_DMA_0_.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ -SIZE_DMA_0_.D --1-1--- 1 --0---1- 1 --0--1-- 1 -10----- 1 --10---- 1 --0----1 1 -00--000 0 --110--- 0 -.names CLK_030.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -SIZE_DMA_1_.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ -SIZE_DMA_1_.D --1-1--- 1 --0---00 1 --0---11 1 --0--1-- 1 -10----- 1 --10---- 1 -00--010 0 -00--001 0 --110--- 0 -.names CLK_030.BLIF RW.BLIF inst_BGACK_030_INTreg.BLIF \ -inst_BGACK_030_INT_D.BLIF inst_AS_000_DMA.BLIF inst_DS_000_DMA.BLIF \ -AS_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF inst_DS_000_DMA.D ---1--1--- 1 --00-1---- 1 ---0---1-- 1 -1-0------ 1 ---0----11 1 ---10----- 1 -0-0-0-00- 0 -010---00- 0 ---11-0--- 0 -0-0-0-0-0 0 -010---0-0 0 +.names inst_BGACK_030_INTreg.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF \ +LDS_000.PIN.BLIF SIZE_DMA_0_.D +--1- 1 +-1-- 1 +1--- 1 +---1 1 +0000 0 +.names RW.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D4.BLIF SM_AMIGA_5_.BLIF \ +inst_UDS_000_INT.BLIF SM_AMIGA_4_.BLIF AS_030.PIN.BLIF DS_030.PIN.BLIF \ +A0.PIN.BLIF inst_UDS_000_INT.D +01---1-01 1 +1-11---01 1 +0---10--- 1 +1--01---- 1 +1-0-1---- 1 +00--1---- 1 +0----01-- 1 +1--0--1-- 1 +1-0---1-- 1 +00----1-- 1 +----1--1- 1 +------11- 1 +01---1-00 0 +1-11---00 0 +0---000-- 0 +1--00-0-- 0 +1-0-0-0-- 0 +00--0-0-- 0 +----0-01- 0 +.names RW.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D4.BLIF SM_AMIGA_5_.BLIF \ +inst_LDS_000_INT.BLIF SM_AMIGA_4_.BLIF AS_030.PIN.BLIF DS_030.PIN.BLIF \ +SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF A0.PIN.BLIF inst_LDS_000_INT.D +01---1-0100 1 +1-11---0100 1 +0---10----- 1 +1--01------ 1 +1-0-1------ 1 +00--1------ 1 +----1--1--- 1 +0----01---- 1 +1--0--1---- 1 +1-0---1---- 1 +00----1---- 1 +------11--- 1 +01---1-0-1- 0 +1-11---0-1- 0 +01---1-00-- 0 +1-11---00-- 0 +01---1-0--1 0 +1-11---0--1 0 +0---000---- 0 +1--00-0---- 0 +1-0-0-0---- 0 +00--0-0---- 0 +----0-01--- 0 .names FC_1_.BLIF BGACK_000.BLIF CLK_030.BLIF A_19_.BLIF A_18_.BLIF A_17_.BLIF \ A_16_.BLIF FC_0_.BLIF inst_FPU_CS_INTreg.BLIF AS_030.PIN.BLIF \ inst_FPU_CS_INTreg.D @@ -330,181 +313,130 @@ inst_FPU_CS_INTreg.D ---------1 1 11100101-0 0 --------00 0 -.names inst_BGACK_030_INTreg.BLIF inst_DTACK_SYNC.BLIF inst_VPA_D.BLIF \ -inst_CLK_000_D0.BLIF SM_AMIGA_3_.BLIF AS_030.PIN.BLIF DTACK.PIN.BLIF \ -inst_DTACK_SYNC.D --1--0-- 1 --1-0--- 1 --10---- 1 -01----- 1 --1----1 1 -----01- 1 ----0-1- 1 ---0--1- 1 -0----1- 1 ------11 1 -1-111-0 0 --0---0- 0 -.names CLK_030.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -inst_A0_DMA.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ -inst_A0_DMA.D -00--010 1 --111--- 1 --1-0--- 0 --10---- 0 --0---0- 0 --0--1-- 0 -10----- 0 --0----1 0 -.names nEXP_SPACE.BLIF BG_030.BLIF CLK_000.BLIF BG_000DFFSHreg.BLIF \ -SM_AMIGA_7_.BLIF AS_030.PIN.BLIF BG_000DFFSHreg.D ----10- 1 ---01-- 1 -0--1-- 1 ----1-0 1 --1---- 1 -101-11 0 --0-0-- 0 -.names inst_BGACK_030_INTreg.BLIF inst_CLK_000_D5.BLIF inst_CLK_000_D4.BLIF \ -SM_AMIGA_1_.BLIF inst_DSACK1_INT.BLIF AS_030.PIN.BLIF inst_DSACK1_INT.D +.names nEXP_SPACE.BLIF BG_030.BLIF CLK_000.BLIF SM_AMIGA_7_.BLIF \ +BG_000DFFSHreg.BLIF AS_030.PIN.BLIF BG_000DFFSHreg.D ---01- 1 --0-1- 1 --1--1- 1 0---1- 1 ----0-1 1 ---0--1 1 --1---1 1 -0----1 1 -1011-- 0 -----00 0 -.names CLK_030.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -inst_AS_000_DMA.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ -inst_AS_000_DMA.D --1-1--- 1 --0--1-- 1 -10----- 1 --0---11 1 --10---- 1 -00--00- 0 -00--0-0 0 --110--- 0 +----10 1 +-1---- 1 +1011-1 0 +-0--0- 0 +.names CLK_030.BLIF RW.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_000_DMA.BLIF \ +inst_CLK_030_H.BLIF inst_DS_000_DMA.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF \ +LDS_000.PIN.BLIF inst_DS_000_DMA.D +0--11---- 1 +-0--01--- 1 +10---1--- 1 +-1-1----- 1 +------1-- 1 +--1------ 1 +-------11 1 +0-001-00- 0 +-00-0000- 0 +100--000- 0 +0-001-0-0 0 +-00-000-0 0 +100--00-0 0 +-100--00- 0 +-100--0-0 0 +.names CLK_030.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_000_DMA.BLIF \ +AS_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF inst_AS_000_DMA.D +1-1--- 1 +---1-- 1 +-1---- 1 +----11 1 +-0000- 0 +00-00- 0 +-000-0 0 +00-0-0 0 +.names inst_CLK_000_D4.BLIF inst_AS_000_INT.BLIF SM_AMIGA_5_.BLIF \ +AS_030.PIN.BLIF inst_AS_000_INT.D +-10- 1 +01-- 1 +--01 1 +0--1 1 +1-1- 0 +-0-0 0 .names nEXP_SPACE.BLIF inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ inst_CLK_000_D4.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_6_.BLIF \ AMIGA_BUS_ENABLEDFFSHreg.BLIF AS_030.PIN.BLIF AMIGA_BUS_ENABLEDFFSHreg.D -1----01- 1 01-----1- 1 11-1--1-- 1 --00----1- 1 --10---0-- 1 -010------ 1 -1---10-1 1 -1--1-0-1 1 01---1--1 1 01--1---1 1 -11-0--1-- 0 +-10------ 1 --1-0000- 0 0-1-00-0- 0 +1-10--1-- 0 --1---000 0 0-1----00 0 --0-----0- 0 --01------ 0 -.names RW.BLIF inst_BGACK_030_INTreg.BLIF SM_AMIGA_5_.BLIF \ -inst_CLK_000_D4.BLIF inst_UDS_000_INT.BLIF SM_AMIGA_4_.BLIF AS_030.PIN.BLIF \ -DS_030.PIN.BLIF A0.PIN.BLIF inst_UDS_000_INT.D -1111---01 1 -01---1-01 1 -0---10--- 1 -1--01---- 1 -1-0-1---- 1 -0----01-- 1 -1--0--1-- 1 -1-0---1-- 1 -----1--1- 1 --0--1---- 1 -------11- 1 --0----1-- 1 -1111---00 0 -01---1-00 0 -0---000-- 0 -1--00-0-- 0 -1-0-0-0-- 0 -----0-01- 0 --0--0-0-- 0 -.names RW.BLIF inst_BGACK_030_INTreg.BLIF SM_AMIGA_5_.BLIF \ -inst_CLK_000_D4.BLIF inst_LDS_000_INT.BLIF SM_AMIGA_4_.BLIF AS_030.PIN.BLIF \ -DS_030.PIN.BLIF SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF A0.PIN.BLIF \ -inst_LDS_000_INT.D -1111---0100 1 -01---1-0100 1 -0---10----- 1 -1--01------ 1 -1-0-1------ 1 -0----01---- 1 -----1--1--- 1 --0--1------ 1 -1--0--1---- 1 -1-0---1---- 1 -------11--- 1 --0----1---- 1 -1111---0-1- 0 -1111---00-- 0 -01---1-0-1- 0 -01---1-00-- 0 -1111---0--1 0 -01---1-0--1 0 -0---000---- 0 -1--00-0---- 0 -1-0-0-0---- 0 -----0-01--- 0 --0--0-0---- 0 +-0------- 0 .names FC_1_.BLIF nEXP_SPACE.BLIF BGACK_000.BLIF CLK_030.BLIF A_19_.BLIF \ A_18_.BLIF A_17_.BLIF A_16_.BLIF FC_0_.BLIF inst_BGACK_030_INTreg.BLIF \ -inst_AS_030_000_SYNC.BLIF inst_CLK_000_D5.BLIF inst_CLK_000_D4.BLIF \ -SM_AMIGA_7_.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_6_.BLIF AS_030.PIN.BLIF \ +inst_AS_030_000_SYNC.BLIF inst_CLK_000_D4.BLIF SM_AMIGA_1_.BLIF \ +SM_AMIGA_6_.BLIF inst_CLK_000_D3.BLIF SM_AMIGA_7_.BLIF AS_030.PIN.BLIF \ inst_AS_030_000_SYNC.D 1-1-00101-1------ 1 ----------1-01-1-- 1 --0-------1-----1- 1 -----------1--0--- 1 +-----------01-1-- 1 +-0-----------1--- 1 +----------1----0- 1 +---------01------ 1 ---0------1------ 1 -0--------1------ 1 ----------------1 1 -----------0---000 0 -----------0-0--00 0 -----------01---00 0 --1-1----00---1--0 0 --1-1---1-0---1--0 0 --1-1--0--0---1--0 0 --1-1-1---0---1--0 0 --1-11----0---1--0 0 --101-----0---1--0 0 -01-1-----0---1--0 0 --1-1----0----10-0 0 --1-1---1-----10-0 0 --1-1--0------10-0 0 --1-1-1-------10-0 0 --1-11--------10-0 0 --101---------10-0 0 -01-1---------10-0 0 --1-1----0---01--0 0 --1-1---1----01--0 0 --1-1--0-----01--0 0 --1-1-1------01--0 0 --1-11-------01--0 0 --101--------01--0 0 -01-1--------01--0 0 --1-1----0--1-1--0 0 --1-1---1---1-1--0 0 --1-1--0----1-1--0 0 --1-1-1-----1-1--0 0 --1-11------1-1--0 0 --101-------1-1--0 0 -01-1-------1-1--0 0 +-1-1----01----010 0 +-1-1---1-1----010 0 +-1-1--0--1----010 0 +-1-1-1---1----010 0 +-1-11----1----010 0 +-101-----1----010 0 +01-1-----1----010 0 +-1-1----01--0--10 0 +-1-1---1-1--0--10 0 +-1-1--0--1--0--10 0 +-1-1-1---1--0--10 0 +-1-11----1--0--10 0 +-101-----1--0--10 0 +01-1-----1--0--10 0 +-1-1----01-1---10 0 +-1-1---1-1-1---10 0 +-1-1--0--1-1---10 0 +-1-1-1---1-1---10 0 +-1-11----1-1---10 0 +-101-----1-1---10 0 +01-1-----1-1---10 0 +----------0--00-0 0 +----------0-00--0 0 +----------01-0--0 0 -1--------0---0-0 0 -1--------0-0---0 0 -1--------01----0 0 ----------00-----0 0 -.names CLK_CNT_P_0_.BLIF CLK_CNT_P_0_.D +.names CLK_030.BLIF RST.BLIF inst_BGACK_030_INTreg.BLIF inst_AS_000_DMA.BLIF \ +inst_CLK_030_H.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF \ +inst_CLK_030_H.D +1100-00- 1 +1100-0-0 1 +--0-100- 1 +--0-10-0 1 +-0--1--- 1 +-1---1-- 0 +-11----- 0 +-1----11 0 +---10--- 0 +-0--0--- 0 +0---0--- 0 +.names inst_BGACK_030_INTreg.BLIF AS_000.PIN.BLIF UDS_000.PIN.BLIF \ +LDS_000.PIN.BLIF inst_A0_DMA.D +0010 1 +--0- 0 +-1-- 0 +1--- 0 +---1 0 +.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D 0 1 1 0 .names IPL_030DFFSH_2_reg.BLIF IPL_030_2_ @@ -543,12 +475,14 @@ inst_AS_030_000_SYNC.D .names AMIGA_BUS_ENABLEDFFSHreg.BLIF AMIGA_BUS_ENABLE 1 1 0 0 -.names nEXP_SPACE.BLIF RW.BLIF inst_BGACK_030_INTreg.BLIF AMIGA_BUS_DATA_DIR -010 1 --01 1 -1-0 0 --00 0 --11 0 +.names nEXP_SPACE.BLIF RW.BLIF inst_BGACK_030_INTreg.BLIF AS_000.PIN.BLIF \ +AMIGA_BUS_DATA_DIR +0100 1 +-01- 1 +1-0- 0 +--01 0 +-00- 0 +-11- 0 .names AMIGA_BUS_ENABLE_LOW 1 .names A_23_.BLIF A_22_.BLIF A_21_.BLIF A_20_.BLIF CIIN @@ -587,18 +521,18 @@ inst_AS_030_000_SYNC.D .names RST.BLIF cpu_est_3_reg.AR 0 1 1 0 -.names CLK_OSZI.BLIF SM_AMIGA_1_.C -1 1 -0 0 -.names RST.BLIF SM_AMIGA_1_.AR -0 1 -1 0 .names CLK_OSZI.BLIF SM_AMIGA_0_.C 1 1 0 0 .names RST.BLIF SM_AMIGA_0_.AR 0 1 1 0 +.names CLK_OSZI.BLIF SIZE_DMA_1_.C +1 1 +0 0 +.names RST.BLIF SIZE_DMA_1_.AP +0 1 +1 0 .names CLK_OSZI.BLIF IPL_030DFFSH_0_reg.C 1 1 0 0 @@ -653,16 +587,16 @@ inst_AS_030_000_SYNC.D .names RST.BLIF SM_AMIGA_2_.AR 0 1 1 0 -.names CLK_OSZI.BLIF inst_AS_000_INT.C +.names CLK_OSZI.BLIF SM_AMIGA_1_.C 1 1 0 0 -.names RST.BLIF inst_AS_000_INT.AP +.names RST.BLIF SM_AMIGA_1_.AR 0 1 1 0 -.names CLK_OSZI.BLIF inst_VPA_SYNC.C +.names CLK_OSZI.BLIF inst_DSACK1_INT.C 1 1 0 0 -.names RST.BLIF inst_VPA_SYNC.AP +.names RST.BLIF inst_DSACK1_INT.AP 0 1 1 0 .names CLK_OSZI.BLIF inst_VMA_INTreg.C @@ -677,15 +611,18 @@ inst_AS_030_000_SYNC.D .names RST.BLIF inst_BGACK_030_INTreg.AP 0 1 1 0 -.names inst_CLK_OUT_PRE.BLIF CLK_CNT_P_0_.BLIF inst_CLK_OUT_PRE.D -10 1 -01 1 -00 0 -11 0 -.names CLK_OSZI.BLIF inst_CLK_OUT_PRE.C +.names inst_CLK_OUT_PRE_50_D.BLIF inst_CLK_OUT_PRE_50.BLIF \ +inst_CLK_OUT_PRE_25.BLIF inst_CLK_OUT_PRE_25.D +010 1 +-01 1 +1-1 1 +011 0 +-00 0 +1-0 0 +.names CLK_OSZI.BLIF inst_CLK_OUT_PRE_25.C 1 1 0 0 -.names RST.BLIF inst_CLK_OUT_PRE.AR +.names RST.BLIF inst_CLK_OUT_PRE_25.AR 0 1 1 0 .names CLK_OSZI.BLIF SIZE_DMA_0_.C @@ -694,60 +631,6 @@ inst_AS_030_000_SYNC.D .names RST.BLIF SIZE_DMA_0_.AP 0 1 1 0 -.names CLK_OSZI.BLIF SIZE_DMA_1_.C -1 1 -0 0 -.names RST.BLIF SIZE_DMA_1_.AP -0 1 -1 0 -.names CLK_OSZI.BLIF inst_DS_000_DMA.C -1 1 -0 0 -.names RST.BLIF inst_DS_000_DMA.AP -0 1 -1 0 -.names CLK_OSZI.BLIF inst_FPU_CS_INTreg.C -1 1 -0 0 -.names RST.BLIF inst_FPU_CS_INTreg.AP -0 1 -1 0 -.names CLK_OSZI.BLIF inst_DTACK_SYNC.C -1 1 -0 0 -.names RST.BLIF inst_DTACK_SYNC.AP -0 1 -1 0 -.names CLK_OSZI.BLIF inst_A0_DMA.C -1 1 -0 0 -.names RST.BLIF inst_A0_DMA.AP -0 1 -1 0 -.names CLK_OSZI.BLIF BG_000DFFSHreg.C -1 1 -0 0 -.names RST.BLIF BG_000DFFSHreg.AP -0 1 -1 0 -.names CLK_OSZI.BLIF inst_DSACK1_INT.C -1 1 -0 0 -.names RST.BLIF inst_DSACK1_INT.AP -0 1 -1 0 -.names CLK_OSZI.BLIF inst_AS_000_DMA.C -1 1 -0 0 -.names RST.BLIF inst_AS_000_DMA.AP -0 1 -1 0 -.names CLK_OSZI.BLIF AMIGA_BUS_ENABLEDFFSHreg.C -1 1 -0 0 -.names RST.BLIF AMIGA_BUS_ENABLEDFFSHreg.AP -0 1 -1 0 .names CLK_OSZI.BLIF inst_UDS_000_INT.C 1 1 0 0 @@ -760,12 +643,57 @@ inst_AS_030_000_SYNC.D .names RST.BLIF inst_LDS_000_INT.AP 0 1 1 0 +.names CLK_OSZI.BLIF inst_FPU_CS_INTreg.C +1 1 +0 0 +.names RST.BLIF inst_FPU_CS_INTreg.AP +0 1 +1 0 +.names CLK_OSZI.BLIF BG_000DFFSHreg.C +1 1 +0 0 +.names RST.BLIF BG_000DFFSHreg.AP +0 1 +1 0 +.names CLK_OSZI.BLIF inst_DS_000_DMA.C +1 1 +0 0 +.names RST.BLIF inst_DS_000_DMA.AP +0 1 +1 0 +.names CLK_OSZI.BLIF inst_AS_000_DMA.C +1 1 +0 0 +.names RST.BLIF inst_AS_000_DMA.AP +0 1 +1 0 +.names CLK_OSZI.BLIF inst_AS_000_INT.C +1 1 +0 0 +.names RST.BLIF inst_AS_000_INT.AP +0 1 +1 0 +.names CLK_OSZI.BLIF AMIGA_BUS_ENABLEDFFSHreg.C +1 1 +0 0 +.names RST.BLIF AMIGA_BUS_ENABLEDFFSHreg.AP +0 1 +1 0 .names CLK_OSZI.BLIF inst_AS_030_000_SYNC.C 1 1 0 0 .names RST.BLIF inst_AS_030_000_SYNC.AP 0 1 1 0 +.names CLK_OSZI.BLIF inst_CLK_030_H.C +1 1 +0 0 +.names CLK_OSZI.BLIF inst_A0_DMA.C +1 1 +0 0 +.names RST.BLIF inst_A0_DMA.AP +0 1 +1 0 .names inst_CLK_000_D3.BLIF inst_CLK_000_D4.D 1 1 0 0 @@ -775,13 +703,13 @@ inst_AS_030_000_SYNC.D .names RST.BLIF inst_CLK_000_D4.AP 0 1 1 0 -.names inst_CLK_000_D4.BLIF inst_CLK_000_D5.D +.names DTACK.PIN.BLIF inst_DTACK_D0.D 1 1 0 0 -.names CLK_OSZI.BLIF inst_CLK_000_D5.C +.names CLK_OSZI.BLIF inst_DTACK_D0.C 1 1 0 0 -.names RST.BLIF inst_CLK_000_D5.AP +.names RST.BLIF inst_DTACK_D0.AP 0 1 1 0 .names inst_CLK_000_D2.BLIF inst_CLK_000_D3.D @@ -793,12 +721,6 @@ inst_AS_030_000_SYNC.D .names RST.BLIF inst_CLK_000_D3.AP 0 1 1 0 -.names CLK_OSZI.BLIF CLK_CNT_P_0_.C -1 1 -0 0 -.names RST.BLIF CLK_CNT_P_0_.AR -0 1 -1 0 .names inst_CLK_000_D1.BLIF inst_CLK_000_D2.D 1 1 0 0 @@ -808,6 +730,15 @@ inst_AS_030_000_SYNC.D .names RST.BLIF inst_CLK_000_D2.AP 0 1 1 0 +.names inst_CLK_OUT_PRE_25.BLIF CLK_OUT_INTreg.D +1 1 +0 0 +.names CLK_OSZI.BLIF CLK_OUT_INTreg.C +1 1 +0 0 +.names RST.BLIF CLK_OUT_INTreg.AR +0 1 +1 0 .names inst_CLK_000_D0.BLIF inst_CLK_000_D1.D 1 1 0 0 @@ -817,15 +748,6 @@ inst_AS_030_000_SYNC.D .names RST.BLIF inst_CLK_000_D1.AP 0 1 1 0 -.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D -1 1 -0 0 -.names CLK_OSZI.BLIF CLK_OUT_INTreg.C -1 1 -0 0 -.names RST.BLIF CLK_OUT_INTreg.AR -0 1 -1 0 .names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.D 1 1 0 0 @@ -835,6 +757,15 @@ inst_AS_030_000_SYNC.D .names RST.BLIF inst_BGACK_030_INT_D.AP 0 1 1 0 +.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50_D.D +1 1 +0 0 +.names CLK_OSZI.BLIF inst_CLK_OUT_PRE_50_D.C +1 1 +0 0 +.names RST.BLIF inst_CLK_OUT_PRE_50_D.AR +0 1 +1 0 .names CLK_000.BLIF inst_CLK_000_D0.D 1 1 0 0 @@ -853,6 +784,12 @@ inst_AS_030_000_SYNC.D .names RST.BLIF inst_VPA_D.AP 0 1 1 0 +.names CLK_OSZI.BLIF inst_CLK_OUT_PRE_50.C +1 1 +0 0 +.names RST.BLIF inst_CLK_OUT_PRE_50.AR +0 1 +1 0 .names RESETDFFRHreg.D 1 .names CLK_OSZI.BLIF RESETDFFRHreg.C @@ -960,6 +897,24 @@ A_25_.BLIF A_24_.BLIF CIIN.OE -1------ 0 1------- 0 -------1 0 +.names inst_VMA_INTreg.BLIF inst_CLK_000_D0.BLIF inst_VMA_INTreg.D.X1 +10 1 +0- 0 +-1 0 +.names inst_VMA_INTreg.BLIF inst_VPA_D.BLIF inst_CLK_000_D0.BLIF \ +inst_AS_000_INT.BLIF cpu_est_0_.BLIF cpu_est_1_.BLIF cpu_est_2_.BLIF \ +cpu_est_3_reg.BLIF inst_VMA_INTreg.D.X2 +10--10-- 1 +1-1----- 1 +--110110 1 +-10----- 0 +0--0---- 0 +0---1--- 0 +--0-0--- 0 +--0--1-- 0 +0----0-- 0 +0-----0- 0 +0------1 0 .names inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF cpu_est_1_.BLIF \ cpu_est_2_.BLIF cpu_est_3_reg.BLIF cpu_est_3_reg.D.X1 10111 1 diff --git a/Logic/68030_tk.crf b/Logic/68030_tk.crf index 4f036de..35a611d 100644 --- a/Logic/68030_tk.crf +++ b/Logic/68030_tk.crf @@ -1,7 +1,7 @@ // Signal Name Cross Reference File // ispLEVER Classic 1.7.00.05.28.13 -// Design '68030_tk' created Sun May 25 21:18:50 2014 +// Design '68030_tk' created Wed May 28 21:24:55 2014 // LEGEND: '>' Functional Block Port Separator diff --git a/Logic/68030_tk.eq3 b/Logic/68030_tk.eq3 index ecfde72..45eb4d9 100644 --- a/Logic/68030_tk.eq3 +++ b/Logic/68030_tk.eq3 @@ -2,11 +2,13 @@ Copyright(C), 1992-2013, Lattice Semiconductor Corp. All Rights Reserved. -Design bus68030 created Sun May 25 21:18:50 2014 +Design bus68030 created Wed May 28 21:24:55 2014 P-Terms Fan-in Fan-out Type Name (attributes) --------- ------ ------- ---- ----------------- + 1 0 1 Pin DSACK_0_ + 1 1 1 Pin DSACK_0_.OE 0 0 1 Pin BERR 1 1 1 Pin BERR.OE 1 1 1 Pin CLK_DIV_OUT.AR @@ -17,37 +19,37 @@ Design bus68030 created Sun May 25 21:18:50 2014 1 0 1 Pin AVEC 0 0 1 Pin AVEC_EXP 1 1 1 Pin AVEC_EXP.OE - 1 0 1 Pin DSACK_0_ - 1 1 1 Pin DSACK_0_.OE - 2 3 1 Pin AMIGA_BUS_DATA_DIR + 2 4 1 Pin AMIGA_BUS_DATA_DIR 1 0 1 Pin AMIGA_BUS_ENABLE_LOW 1 4 1 Pin CIIN 1 8 1 Pin CIIN.OE 1 3 1 Pin SIZE_1_.OE - 3 7 1 Pin SIZE_1_.D- + 2 4 1 Pin SIZE_1_.D- 1 1 1 Pin SIZE_1_.AP 1 1 1 Pin SIZE_1_.C 3 4 1 Pin IPL_030_2_.D 1 1 1 Pin IPL_030_2_.AP 1 1 1 Pin IPL_030_2_.C + 3 4 1 Pin IPL_030_1_.D + 1 1 1 Pin IPL_030_1_.AP + 1 1 1 Pin IPL_030_1_.C + 3 4 1 Pin IPL_030_0_.D + 1 1 1 Pin IPL_030_0_.AP + 1 1 1 Pin IPL_030_0_.C 1 1 1 Pin DSACK_1_.OE - 2 6 1 Pin DSACK_1_.D- + 2 5 1 Pin DSACK_1_.D- 1 1 1 Pin DSACK_1_.AP 1 1 1 Pin DSACK_1_.C 1 3 1 Pin AS_030.OE - 3 7 1 Pin AS_030.D- + 4 6 1 Pin AS_030.D 1 1 1 Pin AS_030.AP 1 1 1 Pin AS_030.C 1 1 1 Pin AS_000.OE - 2 5 1 Pin AS_000.D- + 2 4 1 Pin AS_000.D- 1 1 1 Pin AS_000.AP 1 1 1 Pin AS_000.C - 1 3 1 Pin SIZE_0_.OE - 2 7 1 Pin SIZE_0_.D- - 1 1 1 Pin SIZE_0_.AP - 1 1 1 Pin SIZE_0_.C 1 3 1 Pin DS_030.OE - 5 9 1 Pin DS_030.D- + 7 9 1 Pin DS_030.D 1 1 1 Pin DS_030.AP 1 1 1 Pin DS_030.C 1 1 1 Pin UDS_000.OE @@ -59,7 +61,7 @@ Design bus68030 created Sun May 25 21:18:50 2014 1 1 1 Pin LDS_000.AP 1 1 1 Pin LDS_000.C 1 3 1 Pin A0.OE - 2 7 1 Pin A0.D + 1 4 1 Pin A0.D 1 1 1 Pin A0.AP 1 1 1 Pin A0.C 2 6 1 Pin BG_000.D- @@ -74,37 +76,36 @@ Design bus68030 created Sun May 25 21:18:50 2014 2 10 1 Pin FPU_CS.D- 1 1 1 Pin FPU_CS.AP 1 1 1 Pin FPU_CS.C - 3 4 1 Pin IPL_030_1_.D - 1 1 1 Pin IPL_030_1_.AP - 1 1 1 Pin IPL_030_1_.C - 3 4 1 Pin IPL_030_0_.D - 1 1 1 Pin IPL_030_0_.AP - 1 1 1 Pin IPL_030_0_.C 3 6 1 PinX1 E.D.X1 1 1 1 PinX2 E.D.X2 1 1 1 Pin E.AR 1 1 1 Pin E.C - 4 7 1 Pin VMA.D- + 2 7 1 PinX1 VMA.D.X1 + 1 5 1 PinX2 VMA.D.X2 1 1 1 Pin VMA.AP 1 1 1 Pin VMA.C 1 1 1 Pin RESET.AR 1 0 1 Pin RESET.D 1 1 1 Pin RESET.C - 7 9 1 Pin AMIGA_BUS_ENABLE.D- + 6 9 1 Pin AMIGA_BUS_ENABLE.D- 1 1 1 Pin AMIGA_BUS_ENABLE.AP 1 1 1 Pin AMIGA_BUS_ENABLE.C - 7 17 1 Node inst_AS_030_000_SYNC.D + 1 3 1 Pin SIZE_0_.OE + 1 4 1 Pin SIZE_0_.D- + 1 1 1 Pin SIZE_0_.AP + 1 1 1 Pin SIZE_0_.C + 8 17 1 Node inst_AS_030_000_SYNC.D 1 1 1 Node inst_AS_030_000_SYNC.AP 1 1 1 Node inst_AS_030_000_SYNC.C - 2 7 1 Node inst_DTACK_SYNC.D- - 1 1 1 Node inst_DTACK_SYNC.AP - 1 1 1 Node inst_DTACK_SYNC.C - 2 9 1 Node inst_VPA_SYNC.D- - 1 1 1 Node inst_VPA_SYNC.AP - 1 1 1 Node inst_VPA_SYNC.C + 1 1 1 Node inst_BGACK_030_INT_D.D + 1 1 1 Node inst_BGACK_030_INT_D.AP + 1 1 1 Node inst_BGACK_030_INT_D.C 1 1 1 Node inst_VPA_D.D 1 1 1 Node inst_VPA_D.AP 1 1 1 Node inst_VPA_D.C + 1 1 1 Node inst_CLK_OUT_PRE_50_D.AR + 1 1 1 Node inst_CLK_OUT_PRE_50_D.D + 1 1 1 Node inst_CLK_OUT_PRE_50_D.C 1 1 1 Node inst_CLK_000_D0.D 1 1 1 Node inst_CLK_000_D0.AP 1 1 1 Node inst_CLK_000_D0.C @@ -114,48 +115,46 @@ Design bus68030 created Sun May 25 21:18:50 2014 1 1 1 Node inst_CLK_000_D2.D 1 1 1 Node inst_CLK_000_D2.AP 1 1 1 Node inst_CLK_000_D2.C - 1 1 1 Node inst_CLK_000_D5.D - 1 1 1 Node inst_CLK_000_D5.AP - 1 1 1 Node inst_CLK_000_D5.C - 1 1 1 Node inst_CLK_OUT_PRE.AR - 2 2 1 Node inst_CLK_OUT_PRE.D - 1 1 1 Node inst_CLK_OUT_PRE.C - 1 1 1 Node inst_BGACK_030_INT_D.D - 1 1 1 Node inst_BGACK_030_INT_D.AP - 1 1 1 Node inst_BGACK_030_INT_D.C - 1 1 1 Node CLK_CNT_P_0_.AR - 1 1 1 Node CLK_CNT_P_0_.D - 1 1 1 Node CLK_CNT_P_0_.C - 1 1 1 Node SM_AMIGA_5_.AR - 3 4 1 Node SM_AMIGA_5_.D - 1 1 1 Node SM_AMIGA_5_.C 1 1 1 Node inst_CLK_000_D4.D 1 1 1 Node inst_CLK_000_D4.AP 1 1 1 Node inst_CLK_000_D4.C - 6 10 1 Node SM_AMIGA_7_.D - 1 1 1 Node SM_AMIGA_7_.AP - 1 1 1 Node SM_AMIGA_7_.C + 1 1 1 Node inst_DTACK_D0.D + 1 1 1 Node inst_DTACK_D0.AP + 1 1 1 Node inst_DTACK_D0.C + 1 1 1 Node inst_CLK_OUT_PRE_50.AR + 1 1 1 Node inst_CLK_OUT_PRE_50.D + 1 1 1 Node inst_CLK_OUT_PRE_50.C + 1 1 1 Node inst_CLK_OUT_PRE_25.AR + 3 3 1 Node inst_CLK_OUT_PRE_25.D + 1 1 1 Node inst_CLK_OUT_PRE_25.C 1 1 1 Node SM_AMIGA_1_.AR - 4 6 1 Node SM_AMIGA_1_.D + 3 5 1 Node SM_AMIGA_1_.D 1 1 1 Node SM_AMIGA_1_.C - 3 6 1 NodeX1 SM_AMIGA_0_.D.X1 - 1 4 1 NodeX2 SM_AMIGA_0_.D.X2 1 1 1 Node SM_AMIGA_0_.AR + 4 6 1 Node SM_AMIGA_0_.D 1 1 1 Node SM_AMIGA_0_.C 1 1 1 Node SM_AMIGA_6_.AR - 3 8 1 Node SM_AMIGA_6_.D + 2 7 1 Node SM_AMIGA_6_.D 1 1 1 Node SM_AMIGA_6_.C + 1 1 1 Node SM_AMIGA_5_.AR + 2 3 1 Node SM_AMIGA_5_.D + 1 1 1 Node SM_AMIGA_5_.C 1 1 1 Node inst_CLK_000_D3.D 1 1 1 Node inst_CLK_000_D3.AP 1 1 1 Node inst_CLK_000_D3.C - 1 1 1 Node SM_AMIGA_3_.AR - 4 6 1 Node SM_AMIGA_3_.D - 1 1 1 Node SM_AMIGA_3_.C + 5 8 1 Node inst_CLK_030_H.D + 1 1 1 Node inst_CLK_030_H.C + 5 9 1 Node SM_AMIGA_7_.D + 1 1 1 Node SM_AMIGA_7_.AP + 1 1 1 Node SM_AMIGA_7_.C 1 1 1 Node SM_AMIGA_4_.AR - 3 4 1 Node SM_AMIGA_4_.D + 2 3 1 Node SM_AMIGA_4_.D 1 1 1 Node SM_AMIGA_4_.C + 1 1 1 Node SM_AMIGA_3_.AR + 4 9 1 Node SM_AMIGA_3_.D- + 1 1 1 Node SM_AMIGA_3_.C 1 1 1 Node SM_AMIGA_2_.AR - 4 6 1 Node SM_AMIGA_2_.D + 3 9 1 Node SM_AMIGA_2_.D 1 1 1 Node SM_AMIGA_2_.C 1 1 1 Node cpu_est_0_.AR 3 3 1 Node cpu_est_0_.D @@ -168,7 +167,7 @@ Design bus68030 created Sun May 25 21:18:50 2014 1 1 1 Node cpu_est_2_.AR 1 1 1 Node cpu_est_2_.C ========= - 245 P-Term Total: 245 + 240 P-Term Total: 240 Total Pins: 59 Total Nodes: 24 Average P-Term/Output: 2 @@ -176,13 +175,17 @@ Design bus68030 created Sun May 25 21:18:50 2014 Equations: +DSACK_0_ = (1); + +DSACK_0_.OE = (nEXP_SPACE); + BERR = (0); BERR.OE = (!FPU_CS.Q); CLK_DIV_OUT.AR = (!RST); -CLK_DIV_OUT.D = (inst_CLK_OUT_PRE.Q); +CLK_DIV_OUT.D = (inst_CLK_OUT_PRE_25.Q); CLK_DIV_OUT.C = (CLK_OSZI); @@ -196,12 +199,8 @@ AVEC_EXP = (0); AVEC_EXP.OE = (!FPU_CS.Q); -DSACK_0_ = (1); - -DSACK_0_.OE = (nEXP_SPACE); - AMIGA_BUS_DATA_DIR = (!RW & BGACK_030.Q - # !nEXP_SPACE & RW & !BGACK_030.Q); + # !nEXP_SPACE & RW & !BGACK_030.Q & !AS_000.PIN); AMIGA_BUS_ENABLE_LOW = (1); @@ -211,26 +210,41 @@ CIIN.OE = (!A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_ SIZE_1_.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); -!SIZE_1_.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !SIZE_1_.Q - # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & LDS_000.PIN - # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN); +!SIZE_1_.D = (!BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & LDS_000.PIN + # !BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN); SIZE_1_.AP = (!RST); SIZE_1_.C = (CLK_OSZI); -IPL_030_2_.D = (!inst_CLK_000_D0.Q & IPL_030_2_.Q - # inst_CLK_000_D1.Q & IPL_030_2_.Q +IPL_030_2_.D = (IPL_030_2_.Q & !inst_CLK_000_D0.Q + # IPL_030_2_.Q & inst_CLK_000_D1.Q # IPL_2_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); IPL_030_2_.AP = (!RST); IPL_030_2_.C = (CLK_OSZI); +IPL_030_1_.D = (IPL_030_1_.Q & !inst_CLK_000_D0.Q + # IPL_030_1_.Q & inst_CLK_000_D1.Q + # IPL_1_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); + +IPL_030_1_.AP = (!RST); + +IPL_030_1_.C = (CLK_OSZI); + +IPL_030_0_.D = (IPL_030_0_.Q & !inst_CLK_000_D0.Q + # IPL_030_0_.Q & inst_CLK_000_D1.Q + # IPL_0_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); + +IPL_030_0_.AP = (!RST); + +IPL_030_0_.C = (CLK_OSZI); + DSACK_1_.OE = (nEXP_SPACE); !DSACK_1_.D = (!DSACK_1_.Q & !AS_030.PIN - # BGACK_030.Q & !inst_CLK_000_D5.Q & inst_CLK_000_D4.Q & SM_AMIGA_1_.Q); + # !inst_CLK_000_D4.Q & SM_AMIGA_1_.Q & inst_CLK_000_D3.Q); DSACK_1_.AP = (!RST); @@ -238,9 +252,10 @@ DSACK_1_.C = (CLK_OSZI); AS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); -!AS_030.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !AS_030.Q - # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN - # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !LDS_000.PIN); +AS_030.D = (BGACK_030.Q + # AS_000.PIN + # CLK_030 & AS_030.Q + # UDS_000.PIN & LDS_000.PIN); AS_030.AP = (!RST); @@ -248,29 +263,22 @@ AS_030.C = (CLK_OSZI); AS_000.OE = (BGACK_030.Q); -!AS_000.D = (!AS_000.Q & !AS_030.PIN - # BGACK_030.Q & SM_AMIGA_5_.Q & inst_CLK_000_D4.Q); +!AS_000.D = (inst_CLK_000_D4.Q & SM_AMIGA_5_.Q + # !AS_000.Q & !AS_030.PIN); AS_000.AP = (!RST); AS_000.C = (CLK_OSZI); -SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); - -!SIZE_0_.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !SIZE_0_.Q - # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & !LDS_000.PIN); - -SIZE_0_.AP = (!RST); - -SIZE_0_.C = (CLK_OSZI); - DS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); -!DS_030.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !DS_030.Q - # !CLK_030 & RW & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN - # !CLK_030 & !BGACK_030.Q & !AS_030.Q & !AS_000.PIN & !UDS_000.PIN - # !CLK_030 & RW & !BGACK_030.Q & !AS_000.PIN & !LDS_000.PIN - # !CLK_030 & !BGACK_030.Q & !AS_030.Q & !AS_000.PIN & !LDS_000.PIN); +DS_030.D = (BGACK_030.Q + # AS_000.PIN + # RW & AS_030.Q + # UDS_000.PIN & LDS_000.PIN + # !CLK_030 & AS_030.Q & inst_CLK_030_H.Q + # CLK_030 & !RW & DS_030.Q + # !RW & !inst_CLK_030_H.Q & DS_030.Q); DS_030.AP = (!RST); @@ -278,13 +286,13 @@ DS_030.C = (CLK_OSZI); UDS_000.OE = (BGACK_030.Q); -!UDS_000.D = (!BGACK_030.Q & !UDS_000.Q & !AS_030.PIN - # !UDS_000.Q & !AS_030.PIN & DS_030.PIN - # RW & !SM_AMIGA_5_.Q & !UDS_000.Q & !AS_030.PIN +!UDS_000.D = (!UDS_000.Q & !AS_030.PIN & DS_030.PIN + # !RW & !inst_CLK_000_D0.Q & !UDS_000.Q & !AS_030.PIN # RW & !inst_CLK_000_D4.Q & !UDS_000.Q & !AS_030.PIN + # RW & !SM_AMIGA_5_.Q & !UDS_000.Q & !AS_030.PIN # !RW & !UDS_000.Q & !SM_AMIGA_4_.Q & !AS_030.PIN - # !RW & BGACK_030.Q & SM_AMIGA_4_.Q & !DS_030.PIN & !A0.PIN - # RW & BGACK_030.Q & SM_AMIGA_5_.Q & inst_CLK_000_D4.Q & !DS_030.PIN & !A0.PIN); + # RW & inst_CLK_000_D4.Q & SM_AMIGA_5_.Q & !DS_030.PIN & !A0.PIN + # !RW & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q & !DS_030.PIN & !A0.PIN); UDS_000.AP = (!RST); @@ -292,17 +300,17 @@ UDS_000.C = (CLK_OSZI); LDS_000.OE = (BGACK_030.Q); -!LDS_000.D = (!BGACK_030.Q & !LDS_000.Q & !AS_030.PIN - # !LDS_000.Q & !AS_030.PIN & DS_030.PIN - # RW & !SM_AMIGA_5_.Q & !LDS_000.Q & !AS_030.PIN +!LDS_000.D = (!LDS_000.Q & !AS_030.PIN & DS_030.PIN + # !RW & !inst_CLK_000_D0.Q & !LDS_000.Q & !AS_030.PIN # RW & !inst_CLK_000_D4.Q & !LDS_000.Q & !AS_030.PIN + # RW & !SM_AMIGA_5_.Q & !LDS_000.Q & !AS_030.PIN # !RW & !LDS_000.Q & !SM_AMIGA_4_.Q & !AS_030.PIN - # !RW & BGACK_030.Q & SM_AMIGA_4_.Q & !DS_030.PIN & !SIZE_0_.PIN - # !RW & BGACK_030.Q & SM_AMIGA_4_.Q & !DS_030.PIN & SIZE_1_.PIN - # !RW & BGACK_030.Q & SM_AMIGA_4_.Q & !DS_030.PIN & A0.PIN - # RW & BGACK_030.Q & SM_AMIGA_5_.Q & inst_CLK_000_D4.Q & !DS_030.PIN & !SIZE_0_.PIN - # RW & BGACK_030.Q & SM_AMIGA_5_.Q & inst_CLK_000_D4.Q & !DS_030.PIN & SIZE_1_.PIN - # RW & BGACK_030.Q & SM_AMIGA_5_.Q & inst_CLK_000_D4.Q & !DS_030.PIN & A0.PIN); + # RW & inst_CLK_000_D4.Q & SM_AMIGA_5_.Q & !DS_030.PIN & !SIZE_0_.PIN + # !RW & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q & !DS_030.PIN & !SIZE_0_.PIN + # RW & inst_CLK_000_D4.Q & SM_AMIGA_5_.Q & !DS_030.PIN & SIZE_1_.PIN + # !RW & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q & !DS_030.PIN & SIZE_1_.PIN + # RW & inst_CLK_000_D4.Q & SM_AMIGA_5_.Q & !DS_030.PIN & A0.PIN + # !RW & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q & !DS_030.PIN & A0.PIN); LDS_000.AP = (!RST); @@ -310,8 +318,7 @@ LDS_000.C = (CLK_OSZI); A0.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); -A0.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & A0.Q - # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN); +A0.D = (!BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN); A0.AP = (!RST); @@ -333,7 +340,7 @@ BGACK_030.C = (CLK_OSZI); CLK_EXP.AR = (!RST); -CLK_EXP.D = (inst_CLK_OUT_PRE.Q); +CLK_EXP.D = (inst_CLK_OUT_PRE_25.Q); CLK_EXP.C = (CLK_OSZI); @@ -344,22 +351,6 @@ FPU_CS.AP = (!RST); FPU_CS.C = (CLK_OSZI); -IPL_030_1_.D = (!inst_CLK_000_D0.Q & IPL_030_1_.Q - # inst_CLK_000_D1.Q & IPL_030_1_.Q - # IPL_1_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); - -IPL_030_1_.AP = (!RST); - -IPL_030_1_.C = (CLK_OSZI); - -IPL_030_0_.D = (!inst_CLK_000_D0.Q & IPL_030_0_.Q - # inst_CLK_000_D1.Q & IPL_030_0_.Q - # IPL_0_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); - -IPL_030_0_.AP = (!RST); - -IPL_030_0_.C = (CLK_OSZI); - E.D.X1 = (inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & cpu_est_1_.Q & cpu_est_2_.Q & E.Q # inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & cpu_est_0_.Q & !cpu_est_2_.Q & !E.Q # inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !E.Q); @@ -370,10 +361,10 @@ E.AR = (!RST); E.C = (CLK_OSZI); -!VMA.D = (!BGACK_030.Q & !VMA.Q - # !VMA.Q & !SM_AMIGA_7_.Q - # !BGACK_030.Q & !inst_VPA_D.Q & !inst_CLK_000_D0.Q & cpu_est_0_.Q & !cpu_est_1_.Q - # !inst_VPA_D.Q & !inst_CLK_000_D0.Q & !SM_AMIGA_7_.Q & cpu_est_0_.Q & !cpu_est_1_.Q); +VMA.D.X1 = (VMA.Q + # !VMA.Q & inst_CLK_000_D0.Q & AS_000.Q & !cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & !E.Q); + +VMA.D.X2 = (VMA.Q & !inst_VPA_D.Q & !inst_CLK_000_D0.Q & cpu_est_0_.Q & !cpu_est_1_.Q); VMA.AP = (!RST); @@ -385,9 +376,8 @@ RESET.D = (1); RESET.C = (CLK_OSZI); -!AMIGA_BUS_ENABLE.D = (!BGACK_030.Q & inst_BGACK_030_INT_D.Q - # !BGACK_030.Q & !AMIGA_BUS_ENABLE.Q - # nEXP_SPACE & BGACK_030.Q & !inst_CLK_000_D4.Q & SM_AMIGA_6_.Q +!AMIGA_BUS_ENABLE.D = (!BGACK_030.Q + # nEXP_SPACE & inst_BGACK_030_INT_D.Q & !inst_CLK_000_D4.Q & SM_AMIGA_6_.Q # !nEXP_SPACE & inst_BGACK_030_INT_D.Q & !AMIGA_BUS_ENABLE.Q & !AS_030.PIN # inst_BGACK_030_INT_D.Q & !SM_AMIGA_6_.Q & !AMIGA_BUS_ENABLE.Q & !AS_030.PIN # !nEXP_SPACE & inst_BGACK_030_INT_D.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q & !AMIGA_BUS_ENABLE.Q @@ -397,31 +387,32 @@ AMIGA_BUS_ENABLE.AP = (!RST); AMIGA_BUS_ENABLE.C = (CLK_OSZI); +SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); + +!SIZE_0_.D = (!BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & !LDS_000.PIN); + +SIZE_0_.AP = (!RST); + +SIZE_0_.C = (CLK_OSZI); + inst_AS_030_000_SYNC.D = (AS_030.PIN # !nEXP_SPACE & inst_AS_030_000_SYNC.Q # !CLK_030 & inst_AS_030_000_SYNC.Q + # !BGACK_030.Q & inst_AS_030_000_SYNC.Q + # !nEXP_SPACE & SM_AMIGA_6_.Q # inst_AS_030_000_SYNC.Q & !SM_AMIGA_7_.Q - # !nEXP_SPACE & BGACK_030.Q & SM_AMIGA_6_.Q - # BGACK_030.Q & !inst_CLK_000_D5.Q & inst_CLK_000_D4.Q & SM_AMIGA_1_.Q + # !inst_CLK_000_D4.Q & SM_AMIGA_1_.Q & inst_CLK_000_D3.Q # FC_1_ & BGACK_000 & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & inst_AS_030_000_SYNC.Q); inst_AS_030_000_SYNC.AP = (!RST); inst_AS_030_000_SYNC.C = (CLK_OSZI); -!inst_DTACK_SYNC.D = (!inst_DTACK_SYNC.Q & !AS_030.PIN - # BGACK_030.Q & inst_VPA_D.Q & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !DTACK.PIN); +inst_BGACK_030_INT_D.D = (BGACK_030.Q); -inst_DTACK_SYNC.AP = (!RST); +inst_BGACK_030_INT_D.AP = (!RST); -inst_DTACK_SYNC.C = (CLK_OSZI); - -!inst_VPA_SYNC.D = (!inst_VPA_SYNC.Q & !AS_030.PIN - # BGACK_030.Q & !VMA.Q & !inst_VPA_D.Q & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !cpu_est_1_.Q & E.Q); - -inst_VPA_SYNC.AP = (!RST); - -inst_VPA_SYNC.C = (CLK_OSZI); +inst_BGACK_030_INT_D.C = (CLK_OSZI); inst_VPA_D.D = (VPA); @@ -429,6 +420,12 @@ inst_VPA_D.AP = (!RST); inst_VPA_D.C = (CLK_OSZI); +inst_CLK_OUT_PRE_50_D.AR = (!RST); + +inst_CLK_OUT_PRE_50_D.D = (inst_CLK_OUT_PRE_50.Q); + +inst_CLK_OUT_PRE_50_D.C = (CLK_OSZI); + inst_CLK_000_D0.D = (CLK_000); inst_CLK_000_D0.AP = (!RST); @@ -447,112 +444,108 @@ inst_CLK_000_D2.AP = (!RST); inst_CLK_000_D2.C = (CLK_OSZI); -inst_CLK_000_D5.D = (inst_CLK_000_D4.Q); - -inst_CLK_000_D5.AP = (!RST); - -inst_CLK_000_D5.C = (CLK_OSZI); - -inst_CLK_OUT_PRE.AR = (!RST); - -inst_CLK_OUT_PRE.D = (!inst_CLK_OUT_PRE.Q & CLK_CNT_P_0_.Q - # inst_CLK_OUT_PRE.Q & !CLK_CNT_P_0_.Q); - -inst_CLK_OUT_PRE.C = (CLK_OSZI); - -inst_BGACK_030_INT_D.D = (BGACK_030.Q); - -inst_BGACK_030_INT_D.AP = (!RST); - -inst_BGACK_030_INT_D.C = (CLK_OSZI); - -CLK_CNT_P_0_.AR = (!RST); - -CLK_CNT_P_0_.D = (!CLK_CNT_P_0_.Q); - -CLK_CNT_P_0_.C = (CLK_OSZI); - -SM_AMIGA_5_.AR = (!RST); - -SM_AMIGA_5_.D = (!BGACK_030.Q & SM_AMIGA_5_.Q - # inst_CLK_000_D0.Q & SM_AMIGA_5_.Q - # BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_6_.Q); - -SM_AMIGA_5_.C = (CLK_OSZI); - inst_CLK_000_D4.D = (inst_CLK_000_D3.Q); inst_CLK_000_D4.AP = (!RST); inst_CLK_000_D4.C = (CLK_OSZI); -SM_AMIGA_7_.D = (!BGACK_030.Q & SM_AMIGA_7_.Q - # inst_AS_030_000_SYNC.Q & SM_AMIGA_7_.Q - # inst_CLK_000_D2.Q & SM_AMIGA_7_.Q - # SM_AMIGA_7_.Q & !inst_CLK_000_D3.Q - # !nEXP_SPACE & BGACK_030.Q & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q - # BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_0_.Q & AS_000.Q); +inst_DTACK_D0.D = (DTACK.PIN); -SM_AMIGA_7_.AP = (!RST); +inst_DTACK_D0.AP = (!RST); -SM_AMIGA_7_.C = (CLK_OSZI); +inst_DTACK_D0.C = (CLK_OSZI); + +inst_CLK_OUT_PRE_50.AR = (!RST); + +inst_CLK_OUT_PRE_50.D = (!inst_CLK_OUT_PRE_50.Q); + +inst_CLK_OUT_PRE_50.C = (CLK_OSZI); + +inst_CLK_OUT_PRE_25.AR = (!RST); + +inst_CLK_OUT_PRE_25.D = (inst_CLK_OUT_PRE_50_D.Q & inst_CLK_OUT_PRE_25.Q + # !inst_CLK_OUT_PRE_50.Q & inst_CLK_OUT_PRE_25.Q + # !inst_CLK_OUT_PRE_50_D.Q & inst_CLK_OUT_PRE_50.Q & !inst_CLK_OUT_PRE_25.Q); + +inst_CLK_OUT_PRE_25.C = (CLK_OSZI); SM_AMIGA_1_.AR = (!RST); -SM_AMIGA_1_.D = (!BGACK_030.Q & SM_AMIGA_1_.Q - # inst_CLK_000_D0.Q & SM_AMIGA_1_.Q - # !inst_CLK_000_D5.Q & inst_CLK_000_D4.Q & SM_AMIGA_1_.Q - # BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_2_.Q); +SM_AMIGA_1_.D = (inst_CLK_000_D0.Q & SM_AMIGA_1_.Q + # inst_CLK_000_D0.Q & SM_AMIGA_2_.Q + # !inst_CLK_000_D4.Q & SM_AMIGA_1_.Q & inst_CLK_000_D3.Q); SM_AMIGA_1_.C = (CLK_OSZI); -SM_AMIGA_0_.D.X1 = (SM_AMIGA_0_.Q - # BGACK_030.Q & !inst_CLK_000_D0.Q & inst_CLK_000_D5.Q & SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q - # BGACK_030.Q & !inst_CLK_000_D0.Q & !inst_CLK_000_D4.Q & SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q); - -SM_AMIGA_0_.D.X2 = (BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_0_.Q & AS_000.Q); - SM_AMIGA_0_.AR = (!RST); +SM_AMIGA_0_.D = (!inst_CLK_000_D0.Q & SM_AMIGA_0_.Q + # !AS_000.Q & SM_AMIGA_0_.Q + # !inst_CLK_000_D0.Q & inst_CLK_000_D4.Q & SM_AMIGA_1_.Q + # !inst_CLK_000_D0.Q & SM_AMIGA_1_.Q & !inst_CLK_000_D3.Q); + SM_AMIGA_0_.C = (CLK_OSZI); SM_AMIGA_6_.AR = (!RST); -SM_AMIGA_6_.D = (!BGACK_030.Q & SM_AMIGA_6_.Q - # nEXP_SPACE & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q - # BGACK_030.Q & !inst_AS_030_000_SYNC.Q & !inst_CLK_000_D2.Q & SM_AMIGA_7_.Q & inst_CLK_000_D3.Q); +SM_AMIGA_6_.D = (!inst_AS_030_000_SYNC.Q & !inst_CLK_000_D2.Q & inst_CLK_000_D3.Q & SM_AMIGA_7_.Q + # nEXP_SPACE & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q & !SM_AMIGA_7_.Q); SM_AMIGA_6_.C = (CLK_OSZI); +SM_AMIGA_5_.AR = (!RST); + +SM_AMIGA_5_.D = (inst_CLK_000_D0.Q & SM_AMIGA_6_.Q + # inst_CLK_000_D0.Q & SM_AMIGA_5_.Q); + +SM_AMIGA_5_.C = (CLK_OSZI); + inst_CLK_000_D3.D = (inst_CLK_000_D2.Q); inst_CLK_000_D3.AP = (!RST); inst_CLK_000_D3.C = (CLK_OSZI); -SM_AMIGA_3_.AR = (!RST); +inst_CLK_030_H.D = (!RST & inst_CLK_030_H.Q + # !BGACK_030.Q & inst_CLK_030_H.Q & !AS_000.PIN & !UDS_000.PIN + # !BGACK_030.Q & inst_CLK_030_H.Q & !AS_000.PIN & !LDS_000.PIN + # CLK_030 & RST & !BGACK_030.Q & !AS_030.Q & !AS_000.PIN & !UDS_000.PIN + # CLK_030 & RST & !BGACK_030.Q & !AS_030.Q & !AS_000.PIN & !LDS_000.PIN); -SM_AMIGA_3_.D = (!BGACK_030.Q & SM_AMIGA_3_.Q - # inst_CLK_000_D0.Q & SM_AMIGA_3_.Q - # inst_DTACK_SYNC.Q & inst_VPA_SYNC.Q & SM_AMIGA_3_.Q - # BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q); +inst_CLK_030_H.C = (CLK_OSZI); -SM_AMIGA_3_.C = (CLK_OSZI); +SM_AMIGA_7_.D = (inst_AS_030_000_SYNC.Q & SM_AMIGA_7_.Q + # inst_CLK_000_D2.Q & SM_AMIGA_7_.Q + # !inst_CLK_000_D3.Q & SM_AMIGA_7_.Q + # inst_CLK_000_D0.Q & AS_000.Q & SM_AMIGA_0_.Q + # !nEXP_SPACE & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q); + +SM_AMIGA_7_.AP = (!RST); + +SM_AMIGA_7_.C = (CLK_OSZI); SM_AMIGA_4_.AR = (!RST); -SM_AMIGA_4_.D = (!BGACK_030.Q & SM_AMIGA_4_.Q - # !inst_CLK_000_D0.Q & SM_AMIGA_4_.Q - # BGACK_030.Q & !inst_CLK_000_D0.Q & SM_AMIGA_5_.Q); +SM_AMIGA_4_.D = (!inst_CLK_000_D0.Q & SM_AMIGA_5_.Q + # !inst_CLK_000_D0.Q & SM_AMIGA_4_.Q); SM_AMIGA_4_.C = (CLK_OSZI); +SM_AMIGA_3_.AR = (!RST); + +!SM_AMIGA_3_.D = (!inst_CLK_000_D0.Q & !SM_AMIGA_3_.Q + # !SM_AMIGA_4_.Q & !SM_AMIGA_3_.Q + # inst_VPA_D.Q & !inst_CLK_000_D0.Q & inst_CLK_000_D1.Q & !inst_DTACK_D0.Q + # !VMA.Q & !inst_VPA_D.Q & !inst_CLK_000_D0.Q & inst_CLK_000_D1.Q & !cpu_est_1_.Q & E.Q); + +SM_AMIGA_3_.C = (CLK_OSZI); + SM_AMIGA_2_.AR = (!RST); -SM_AMIGA_2_.D = (!BGACK_030.Q & SM_AMIGA_2_.Q - # !inst_CLK_000_D0.Q & SM_AMIGA_2_.Q - # BGACK_030.Q & !inst_DTACK_SYNC.Q & !inst_CLK_000_D0.Q & SM_AMIGA_3_.Q - # BGACK_030.Q & !inst_VPA_SYNC.Q & !inst_CLK_000_D0.Q & SM_AMIGA_3_.Q); +SM_AMIGA_2_.D = (!inst_CLK_000_D0.Q & SM_AMIGA_2_.Q + # inst_VPA_D.Q & !inst_CLK_000_D0.Q & inst_CLK_000_D1.Q & !inst_DTACK_D0.Q & SM_AMIGA_3_.Q + # !VMA.Q & !inst_VPA_D.Q & !inst_CLK_000_D0.Q & inst_CLK_000_D1.Q & SM_AMIGA_3_.Q & !cpu_est_1_.Q & E.Q); SM_AMIGA_2_.C = (CLK_OSZI); diff --git a/Logic/68030_tk.fti b/Logic/68030_tk.fti index 811f2c4..55610c5 100644 --- a/Logic/68030_tk.fti +++ b/Logic/68030_tk.fti @@ -3,11 +3,11 @@ #DESIGN #DEVICE mach447a -DATA LOCATION A0:G_8_69 // IO {RN_A0} +DATA LOCATION A0:G_8_69 // IO DATA LOCATION AMIGA_BUS_DATA_DIR:E_0_48 // OUT -DATA LOCATION AMIGA_BUS_ENABLE:D_2_34 // IO {RN_AMIGA_BUS_ENABLE} +DATA LOCATION AMIGA_BUS_ENABLE:D_7_34 // IO {RN_AMIGA_BUS_ENABLE} DATA LOCATION AMIGA_BUS_ENABLE_LOW:C_1_20 // OUT -DATA LOCATION AS_000:D_4_33 // IO {RN_AS_000} +DATA LOCATION AS_000:D_5_33 // IO {RN_AS_000} DATA LOCATION AS_030:H_6_82 // IO {RN_AS_030} DATA LOCATION AVEC:A_2_92 // OUT DATA LOCATION AVEC_EXP:C_0_22 // OUT @@ -29,19 +29,18 @@ DATA LOCATION A_30_:B_*_5 // INP DATA LOCATION A_31_:B_*_4 // INP DATA LOCATION BERR:E_2_41 // OUT DATA LOCATION BGACK_000:D_*_28 // INP -DATA LOCATION BGACK_030:H_4_83 // IO {RN_BGACK_030} -DATA LOCATION BG_000:D_3_29 // IO {RN_BG_000} +DATA LOCATION BGACK_030:H_5_83 // IO {RN_BGACK_030} +DATA LOCATION BG_000:D_1_29 // IO {RN_BG_000} DATA LOCATION BG_030:C_*_21 // INP DATA LOCATION CIIN:E_1_47 // OUT DATA LOCATION CLK_000:*_*_11 // INP DATA LOCATION CLK_030:*_*_64 // INP -DATA LOCATION CLK_CNT_P_0_:H_11 // NOD -DATA LOCATION CLK_DIV_OUT:G_1_65 // OUT +DATA LOCATION CLK_DIV_OUT:G_0_65 // OUT DATA LOCATION CLK_EXP:B_0_10 // OUT DATA LOCATION CLK_OSZI:*_*_61 // Cin DATA LOCATION DSACK_0_:H_10_80 // OUT -DATA LOCATION DSACK_1_:H_8_81 // IO {RN_DSACK_1_} -DATA LOCATION DS_030:A_4_98 // IO {RN_DS_030} +DATA LOCATION DSACK_1_:H_11_81 // IO {RN_DSACK_1_} +DATA LOCATION DS_030:A_5_98 // IO {RN_DS_030} DATA LOCATION DTACK:D_0_30 // IO DATA LOCATION E:G_2_66 // IO {RN_E} DATA LOCATION FC_0_:F_*_57 // INP @@ -53,56 +52,54 @@ DATA LOCATION IPL_030_2_:B_2_9 // IO {RN_IPL_030_2_} DATA LOCATION IPL_0_:G_*_67 // INP DATA LOCATION IPL_1_:F_*_56 // INP DATA LOCATION IPL_2_:G_*_68 // INP -DATA LOCATION LDS_000:D_10_31 // IO {RN_LDS_000} +DATA LOCATION LDS_000:D_9_31 // IO {RN_LDS_000} DATA LOCATION RESET:B_1_3 // OUT -DATA LOCATION RN_A0:G_8 // NOD {A0} -DATA LOCATION RN_AMIGA_BUS_ENABLE:D_2 // NOD {AMIGA_BUS_ENABLE} -DATA LOCATION RN_AS_000:D_4 // NOD {AS_000} +DATA LOCATION RN_AMIGA_BUS_ENABLE:D_7 // NOD {AMIGA_BUS_ENABLE} +DATA LOCATION RN_AS_000:D_5 // NOD {AS_000} DATA LOCATION RN_AS_030:H_6 // NOD {AS_030} -DATA LOCATION RN_BGACK_030:H_4 // NOD {BGACK_030} -DATA LOCATION RN_BG_000:D_3 // NOD {BG_000} -DATA LOCATION RN_DSACK_1_:H_8 // NOD {DSACK_1_} -DATA LOCATION RN_DS_030:A_4 // NOD {DS_030} +DATA LOCATION RN_BGACK_030:H_5 // NOD {BGACK_030} +DATA LOCATION RN_BG_000:D_1 // NOD {BG_000} +DATA LOCATION RN_DSACK_1_:H_11 // NOD {DSACK_1_} +DATA LOCATION RN_DS_030:A_5 // NOD {DS_030} DATA LOCATION RN_E:G_2 // NOD {E} DATA LOCATION RN_FPU_CS:H_1 // NOD {FPU_CS} DATA LOCATION RN_IPL_030_0_:B_4 // NOD {IPL_030_0_} DATA LOCATION RN_IPL_030_1_:B_6 // NOD {IPL_030_1_} DATA LOCATION RN_IPL_030_2_:B_2 // NOD {IPL_030_2_} -DATA LOCATION RN_LDS_000:D_10 // NOD {LDS_000} -DATA LOCATION RN_SIZE_0_:G_0 // NOD {SIZE_0_} -DATA LOCATION RN_SIZE_1_:H_0 // NOD {SIZE_1_} +DATA LOCATION RN_LDS_000:D_9 // NOD {LDS_000} DATA LOCATION RN_UDS_000:D_6 // NOD {UDS_000} -DATA LOCATION RN_VMA:D_1 // NOD {VMA} +DATA LOCATION RN_VMA:D_3 // NOD {VMA} DATA LOCATION RST:*_*_86 // INP DATA LOCATION RW:G_*_71 // INP -DATA LOCATION SIZE_0_:G_0_70 // IO {RN_SIZE_0_} -DATA LOCATION SIZE_1_:H_0_79 // IO {RN_SIZE_1_} -DATA LOCATION SM_AMIGA_0_:A_3 // NOD -DATA LOCATION SM_AMIGA_1_:H_7 // NOD -DATA LOCATION SM_AMIGA_2_:G_7 // NOD -DATA LOCATION SM_AMIGA_3_:G_9 // NOD -DATA LOCATION SM_AMIGA_4_:D_9 // NOD -DATA LOCATION SM_AMIGA_5_:D_11 // NOD -DATA LOCATION SM_AMIGA_6_:G_4 // NOD -DATA LOCATION SM_AMIGA_7_:A_1 // NOD +DATA LOCATION SIZE_0_:G_14_70 // IO +DATA LOCATION SIZE_1_:H_0_79 // IO +DATA LOCATION SM_AMIGA_0_:B_5 // NOD +DATA LOCATION SM_AMIGA_1_:B_10 // NOD +DATA LOCATION SM_AMIGA_2_:G_6 // NOD +DATA LOCATION SM_AMIGA_3_:G_7 // NOD +DATA LOCATION SM_AMIGA_4_:B_7 // NOD +DATA LOCATION SM_AMIGA_5_:D_2 // NOD +DATA LOCATION SM_AMIGA_6_:H_7 // NOD +DATA LOCATION SM_AMIGA_7_:A_11 // NOD DATA LOCATION UDS_000:D_6_32 // IO {RN_UDS_000} -DATA LOCATION VMA:D_1_35 // IO {RN_VMA} +DATA LOCATION VMA:D_3_35 // IO {RN_VMA} DATA LOCATION VPA:*_*_36 // INP -DATA LOCATION cpu_est_0_:H_2 // NOD -DATA LOCATION cpu_est_1_:G_5 // NOD -DATA LOCATION cpu_est_2_:B_3 // NOD -DATA LOCATION inst_AS_030_000_SYNC:H_5 // NOD -DATA LOCATION inst_BGACK_030_INT_D:H_3 // NOD -DATA LOCATION inst_CLK_000_D0:D_5 // NOD -DATA LOCATION inst_CLK_000_D1:D_7 // NOD -DATA LOCATION inst_CLK_000_D2:H_13 // NOD -DATA LOCATION inst_CLK_000_D3:G_11 // NOD -DATA LOCATION inst_CLK_000_D4:G_6 // NOD -DATA LOCATION inst_CLK_000_D5:H_12 // NOD -DATA LOCATION inst_CLK_OUT_PRE:G_10 // NOD -DATA LOCATION inst_DTACK_SYNC:B_7 // NOD -DATA LOCATION inst_VPA_D:B_8 // NOD -DATA LOCATION inst_VPA_SYNC:B_5 // NOD +DATA LOCATION cpu_est_0_:B_8 // NOD +DATA LOCATION cpu_est_1_:G_4 // NOD +DATA LOCATION cpu_est_2_:G_5 // NOD +DATA LOCATION inst_AS_030_000_SYNC:H_9 // NOD +DATA LOCATION inst_BGACK_030_INT_D:D_10 // NOD +DATA LOCATION inst_CLK_000_D0:D_12 // NOD +DATA LOCATION inst_CLK_000_D1:H_3 // NOD +DATA LOCATION inst_CLK_000_D2:H_12 // NOD +DATA LOCATION inst_CLK_000_D3:H_2 // NOD +DATA LOCATION inst_CLK_000_D4:H_8 // NOD +DATA LOCATION inst_CLK_030_H:A_0 // NOD +DATA LOCATION inst_CLK_OUT_PRE_25:B_9 // NOD +DATA LOCATION inst_CLK_OUT_PRE_50:G_1 // NOD +DATA LOCATION inst_CLK_OUT_PRE_50_D:A_3 // NOD +DATA LOCATION inst_DTACK_D0:A_1 // NOD +DATA LOCATION inst_VPA_D:H_14 // NOD DATA LOCATION nEXP_SPACE:*_*_14 // INP DATA IO_DIR A0:BI DATA IO_DIR AMIGA_BUS_DATA_DIR:OUT @@ -164,69 +161,51 @@ DATA IO_DIR VMA:OUT DATA IO_DIR VPA:IN DATA IO_DIR nEXP_SPACE:IN DATA GLB_CLOCK CLK_OSZI -DATA PW_LEVEL A_31_:1 -DATA SLEW A_31_:1 -DATA PW_LEVEL IPL_2_:1 -DATA SLEW IPL_2_:1 -DATA PW_LEVEL FC_1_:1 -DATA SLEW FC_1_:1 -DATA PW_LEVEL A_30_:1 -DATA SLEW A_30_:1 -DATA PW_LEVEL A_29_:1 -DATA SLEW A_29_:1 -DATA PW_LEVEL A_28_:1 -DATA SLEW A_28_:1 -DATA PW_LEVEL A_27_:1 -DATA SLEW A_27_:1 -DATA SLEW nEXP_SPACE:1 -DATA PW_LEVEL A_26_:1 -DATA SLEW A_26_:1 -DATA PW_LEVEL BERR:1 -DATA SLEW BERR:1 -DATA PW_LEVEL A_25_:1 -DATA SLEW A_25_:1 -DATA PW_LEVEL BG_030:1 -DATA SLEW BG_030:1 -DATA PW_LEVEL A_24_:1 -DATA SLEW A_24_:1 -DATA PW_LEVEL A_23_:1 -DATA SLEW A_23_:1 -DATA PW_LEVEL A_22_:1 -DATA SLEW A_22_:1 -DATA PW_LEVEL BGACK_000:1 -DATA SLEW BGACK_000:1 DATA PW_LEVEL A_21_:1 DATA SLEW A_21_:1 -DATA SLEW CLK_030:1 DATA PW_LEVEL A_20_:1 DATA SLEW A_20_:1 -DATA SLEW CLK_000:1 DATA PW_LEVEL A_19_:1 DATA SLEW A_19_:1 -DATA SLEW CLK_OSZI:1 DATA PW_LEVEL A_18_:1 DATA SLEW A_18_:1 -DATA PW_LEVEL CLK_DIV_OUT:1 -DATA SLEW CLK_DIV_OUT:1 +DATA PW_LEVEL A_31_:1 +DATA SLEW A_31_:1 DATA PW_LEVEL A_17_:1 DATA SLEW A_17_:1 DATA PW_LEVEL A_16_:1 DATA SLEW A_16_:1 -DATA PW_LEVEL DTACK:1 -DATA SLEW DTACK:1 -DATA PW_LEVEL AVEC:1 -DATA SLEW AVEC:1 +DATA PW_LEVEL IPL_2_:1 +DATA SLEW IPL_2_:1 DATA PW_LEVEL IPL_1_:1 DATA SLEW IPL_1_:1 -DATA PW_LEVEL AVEC_EXP:1 -DATA SLEW AVEC_EXP:1 DATA PW_LEVEL IPL_0_:1 DATA SLEW IPL_0_:1 DATA PW_LEVEL DSACK_0_:1 DATA SLEW DSACK_0_:1 -DATA SLEW VPA:1 DATA PW_LEVEL FC_0_:1 DATA SLEW FC_0_:1 +DATA PW_LEVEL FC_1_:1 +DATA SLEW FC_1_:1 +DATA SLEW nEXP_SPACE:1 +DATA PW_LEVEL BERR:1 +DATA SLEW BERR:1 +DATA PW_LEVEL BG_030:1 +DATA SLEW BG_030:1 +DATA PW_LEVEL BGACK_000:1 +DATA SLEW BGACK_000:1 +DATA SLEW CLK_030:1 +DATA SLEW CLK_000:1 +DATA SLEW CLK_OSZI:1 +DATA PW_LEVEL CLK_DIV_OUT:1 +DATA SLEW CLK_DIV_OUT:1 +DATA PW_LEVEL DTACK:1 +DATA SLEW DTACK:1 +DATA PW_LEVEL AVEC:1 +DATA SLEW AVEC:1 +DATA PW_LEVEL AVEC_EXP:1 +DATA SLEW AVEC_EXP:1 +DATA SLEW VPA:1 DATA SLEW RST:1 DATA PW_LEVEL RW:1 DATA SLEW RW:1 @@ -236,18 +215,38 @@ DATA PW_LEVEL AMIGA_BUS_ENABLE_LOW:1 DATA SLEW AMIGA_BUS_ENABLE_LOW:1 DATA PW_LEVEL CIIN:1 DATA SLEW CIIN:1 +DATA PW_LEVEL A_30_:1 +DATA SLEW A_30_:1 +DATA PW_LEVEL A_29_:1 +DATA SLEW A_29_:1 +DATA PW_LEVEL A_28_:1 +DATA SLEW A_28_:1 +DATA PW_LEVEL A_27_:1 +DATA SLEW A_27_:1 +DATA PW_LEVEL A_26_:1 +DATA SLEW A_26_:1 +DATA PW_LEVEL A_25_:1 +DATA SLEW A_25_:1 +DATA PW_LEVEL A_24_:1 +DATA SLEW A_24_:1 +DATA PW_LEVEL A_23_:1 +DATA SLEW A_23_:1 +DATA PW_LEVEL A_22_:1 +DATA SLEW A_22_:1 DATA PW_LEVEL SIZE_1_:1 DATA SLEW SIZE_1_:1 DATA PW_LEVEL IPL_030_2_:1 DATA SLEW IPL_030_2_:1 +DATA PW_LEVEL IPL_030_1_:1 +DATA SLEW IPL_030_1_:1 +DATA PW_LEVEL IPL_030_0_:1 +DATA SLEW IPL_030_0_:1 DATA PW_LEVEL DSACK_1_:1 DATA SLEW DSACK_1_:1 DATA PW_LEVEL AS_030:1 DATA SLEW AS_030:1 DATA PW_LEVEL AS_000:1 DATA SLEW AS_000:1 -DATA PW_LEVEL SIZE_0_:1 -DATA SLEW SIZE_0_:1 DATA PW_LEVEL DS_030:1 DATA SLEW DS_030:1 DATA PW_LEVEL UDS_000:1 @@ -264,10 +263,6 @@ DATA PW_LEVEL CLK_EXP:1 DATA SLEW CLK_EXP:1 DATA PW_LEVEL FPU_CS:1 DATA SLEW FPU_CS:1 -DATA PW_LEVEL IPL_030_1_:1 -DATA SLEW IPL_030_1_:1 -DATA PW_LEVEL IPL_030_0_:1 -DATA SLEW IPL_030_0_:1 DATA PW_LEVEL E:1 DATA SLEW E:1 DATA PW_LEVEL VMA:1 @@ -276,46 +271,48 @@ DATA PW_LEVEL RESET:1 DATA SLEW RESET:1 DATA PW_LEVEL AMIGA_BUS_ENABLE:1 DATA SLEW AMIGA_BUS_ENABLE:1 +DATA PW_LEVEL SIZE_0_:1 +DATA SLEW SIZE_0_:1 DATA PW_LEVEL inst_AS_030_000_SYNC:1 DATA SLEW inst_AS_030_000_SYNC:1 -DATA PW_LEVEL inst_DTACK_SYNC:1 -DATA SLEW inst_DTACK_SYNC:1 -DATA PW_LEVEL inst_VPA_SYNC:1 -DATA SLEW inst_VPA_SYNC:1 +DATA PW_LEVEL inst_BGACK_030_INT_D:1 +DATA SLEW inst_BGACK_030_INT_D:1 DATA PW_LEVEL inst_VPA_D:1 DATA SLEW inst_VPA_D:1 +DATA PW_LEVEL inst_CLK_OUT_PRE_50_D:1 +DATA SLEW inst_CLK_OUT_PRE_50_D:1 DATA PW_LEVEL inst_CLK_000_D0:1 DATA SLEW inst_CLK_000_D0:1 DATA PW_LEVEL inst_CLK_000_D1:1 DATA SLEW inst_CLK_000_D1:1 DATA PW_LEVEL inst_CLK_000_D2:1 DATA SLEW inst_CLK_000_D2:1 -DATA PW_LEVEL inst_CLK_000_D5:1 -DATA SLEW inst_CLK_000_D5:1 -DATA PW_LEVEL inst_CLK_OUT_PRE:1 -DATA SLEW inst_CLK_OUT_PRE:1 -DATA PW_LEVEL inst_BGACK_030_INT_D:1 -DATA SLEW inst_BGACK_030_INT_D:1 -DATA PW_LEVEL CLK_CNT_P_0_:1 -DATA SLEW CLK_CNT_P_0_:1 -DATA PW_LEVEL SM_AMIGA_5_:1 -DATA SLEW SM_AMIGA_5_:1 DATA PW_LEVEL inst_CLK_000_D4:1 DATA SLEW inst_CLK_000_D4:1 -DATA PW_LEVEL SM_AMIGA_7_:1 -DATA SLEW SM_AMIGA_7_:1 +DATA PW_LEVEL inst_DTACK_D0:1 +DATA SLEW inst_DTACK_D0:1 +DATA PW_LEVEL inst_CLK_OUT_PRE_50:1 +DATA SLEW inst_CLK_OUT_PRE_50:1 +DATA PW_LEVEL inst_CLK_OUT_PRE_25:1 +DATA SLEW inst_CLK_OUT_PRE_25:1 DATA PW_LEVEL SM_AMIGA_1_:1 DATA SLEW SM_AMIGA_1_:1 DATA PW_LEVEL SM_AMIGA_0_:1 DATA SLEW SM_AMIGA_0_:1 DATA PW_LEVEL SM_AMIGA_6_:1 DATA SLEW SM_AMIGA_6_:1 +DATA PW_LEVEL SM_AMIGA_5_:1 +DATA SLEW SM_AMIGA_5_:1 DATA PW_LEVEL inst_CLK_000_D3:1 DATA SLEW inst_CLK_000_D3:1 -DATA PW_LEVEL SM_AMIGA_3_:1 -DATA SLEW SM_AMIGA_3_:1 +DATA PW_LEVEL inst_CLK_030_H:1 +DATA SLEW inst_CLK_030_H:1 +DATA PW_LEVEL SM_AMIGA_7_:1 +DATA SLEW SM_AMIGA_7_:1 DATA PW_LEVEL SM_AMIGA_4_:1 DATA SLEW SM_AMIGA_4_:1 +DATA PW_LEVEL SM_AMIGA_3_:1 +DATA SLEW SM_AMIGA_3_:1 DATA PW_LEVEL SM_AMIGA_2_:1 DATA SLEW SM_AMIGA_2_:1 DATA PW_LEVEL cpu_est_0_:1 @@ -324,21 +321,18 @@ DATA PW_LEVEL cpu_est_1_:1 DATA SLEW cpu_est_1_:1 DATA PW_LEVEL cpu_est_2_:1 DATA SLEW cpu_est_2_:1 -DATA PW_LEVEL RN_SIZE_1_:1 DATA PW_LEVEL RN_IPL_030_2_:1 +DATA PW_LEVEL RN_IPL_030_1_:1 +DATA PW_LEVEL RN_IPL_030_0_:1 DATA PW_LEVEL RN_DSACK_1_:1 DATA PW_LEVEL RN_AS_030:1 DATA PW_LEVEL RN_AS_000:1 -DATA PW_LEVEL RN_SIZE_0_:1 DATA PW_LEVEL RN_DS_030:1 DATA PW_LEVEL RN_UDS_000:1 DATA PW_LEVEL RN_LDS_000:1 -DATA PW_LEVEL RN_A0:1 DATA PW_LEVEL RN_BG_000:1 DATA PW_LEVEL RN_BGACK_030:1 DATA PW_LEVEL RN_FPU_CS:1 -DATA PW_LEVEL RN_IPL_030_1_:1 -DATA PW_LEVEL RN_IPL_030_0_:1 DATA PW_LEVEL RN_E:1 DATA PW_LEVEL RN_VMA:1 DATA PW_LEVEL RN_AMIGA_BUS_ENABLE:1 diff --git a/Logic/68030_tk.grp b/Logic/68030_tk.grp index 683545a..91c939d 100644 --- a/Logic/68030_tk.grp +++ b/Logic/68030_tk.grp @@ -1,17 +1,17 @@ -GROUP MACH_SEG_A DS_030 RN_DS_030 SM_AMIGA_7_ SM_AMIGA_0_ AVEC +GROUP MACH_SEG_A DS_030 RN_DS_030 SM_AMIGA_7_ inst_DTACK_D0 inst_CLK_OUT_PRE_50_D + AVEC inst_CLK_030_H GROUP MACH_SEG_B IPL_030_1_ RN_IPL_030_1_ IPL_030_0_ RN_IPL_030_0_ IPL_030_2_ - RN_IPL_030_2_ CLK_EXP RESET inst_VPA_SYNC inst_DTACK_SYNC cpu_est_2_ - inst_VPA_D + RN_IPL_030_2_ CLK_EXP RESET SM_AMIGA_0_ SM_AMIGA_1_ inst_CLK_OUT_PRE_25 + SM_AMIGA_4_ cpu_est_0_ GROUP MACH_SEG_C AVEC_EXP AMIGA_BUS_ENABLE_LOW GROUP MACH_SEG_D LDS_000 RN_LDS_000 UDS_000 RN_UDS_000 AMIGA_BUS_ENABLE RN_AMIGA_BUS_ENABLE VMA RN_VMA BG_000 RN_BG_000 AS_000 RN_AS_000 - SM_AMIGA_4_ SM_AMIGA_5_ inst_CLK_000_D0 inst_CLK_000_D1 DTACK + SM_AMIGA_5_ inst_CLK_000_D0 inst_BGACK_030_INT_D DTACK GROUP MACH_SEG_E CIIN AMIGA_BUS_DATA_DIR BERR -GROUP MACH_SEG_G A0 RN_A0 SIZE_0_ RN_SIZE_0_ E RN_E CLK_DIV_OUT SM_AMIGA_6_ - cpu_est_1_ SM_AMIGA_2_ SM_AMIGA_3_ inst_CLK_OUT_PRE inst_CLK_000_D4 - inst_CLK_000_D3 -GROUP MACH_SEG_H FPU_CS RN_FPU_CS SIZE_1_ RN_SIZE_1_ AS_030 RN_AS_030 DSACK_1_ - RN_DSACK_1_ BGACK_030 RN_BGACK_030 inst_AS_030_000_SYNC SM_AMIGA_1_ - cpu_est_0_ CLK_CNT_P_0_ inst_CLK_000_D2 inst_CLK_000_D5 inst_BGACK_030_INT_D - DSACK_0_ \ No newline at end of file +GROUP MACH_SEG_G E RN_E A0 SIZE_0_ CLK_DIV_OUT SM_AMIGA_2_ SM_AMIGA_3_ + cpu_est_1_ cpu_est_2_ inst_CLK_OUT_PRE_50 +GROUP MACH_SEG_H FPU_CS RN_FPU_CS AS_030 RN_AS_030 DSACK_1_ RN_DSACK_1_ + SIZE_1_ BGACK_030 RN_BGACK_030 inst_AS_030_000_SYNC SM_AMIGA_6_ inst_VPA_D + inst_CLK_000_D3 inst_CLK_000_D4 inst_CLK_000_D2 inst_CLK_000_D1 DSACK_0_ + \ No newline at end of file diff --git a/Logic/68030_tk.ipr b/Logic/68030_tk.ipr index f0ee308..47e1a10 100644 --- a/Logic/68030_tk.ipr +++ b/Logic/68030_tk.ipr @@ -1 +1 @@ -0276057}WPa2#&, \ No newline at end of file +5826467DGX@r^. \ No newline at end of file diff --git a/Logic/68030_tk.jed b/Logic/68030_tk.jed index 920ac0f..27a3e5d 100644 --- a/Logic/68030_tk.jed +++ b/Logic/68030_tk.jed @@ -10,7 +10,7 @@ AUTHOR: PATTERN: COMPANY: REVISION: -DATE: Sun May 25 21:18:55 2014 +DATE: Wed May 28 21:25:00 2014 ABEL mach447a * @@ -31,80 +31,80 @@ NOTE Spread Placement? N * NOTE Run Time Upper Bound in 15 minutes 0 * NOTE Zero Hold Time For Input Registers? Y * NOTE Table of pin names and numbers* -NOTE PINS A_31_:4 IPL_2_:68 FC_1_:58 A_30_:5 A_29_:6 A_28_:15* -NOTE PINS A_27_:16 nEXP_SPACE:14 A_26_:17 BERR:41 A_25_:18* -NOTE PINS BG_030:21 A_24_:19 A_23_:84 A_22_:85 BGACK_000:28* -NOTE PINS A_21_:94 CLK_030:64 A_20_:93 CLK_000:11 A_19_:97* -NOTE PINS CLK_OSZI:61 A_18_:95 CLK_DIV_OUT:65 A_17_:59 A_16_:96* -NOTE PINS DTACK:30 AVEC:92 IPL_1_:56 AVEC_EXP:22 IPL_0_:67* -NOTE PINS DSACK_0_:80 VPA:36 FC_0_:57 RST:86 RW:71 AMIGA_BUS_DATA_DIR:48* -NOTE PINS AMIGA_BUS_ENABLE_LOW:20 CIIN:47 SIZE_1_:79 IPL_030_2_:9* -NOTE PINS DSACK_1_:81 AS_030:82 AS_000:33 SIZE_0_:70 DS_030:98* -NOTE PINS UDS_000:32 LDS_000:31 A0:69 BG_000:29 BGACK_030:83* -NOTE PINS CLK_EXP:10 FPU_CS:78 IPL_030_1_:7 IPL_030_0_:8* -NOTE PINS E:66 VMA:35 RESET:3 AMIGA_BUS_ENABLE:34 * +NOTE PINS A_21_:94 A_20_:93 A_19_:97 A_18_:95 A_31_:4 A_17_:59* +NOTE PINS A_16_:96 IPL_2_:68 IPL_1_:56 IPL_0_:67 DSACK_0_:80* +NOTE PINS FC_0_:57 FC_1_:58 nEXP_SPACE:14 BERR:41 BG_030:21* +NOTE PINS BGACK_000:28 CLK_030:64 CLK_000:11 CLK_OSZI:61* +NOTE PINS CLK_DIV_OUT:65 DTACK:30 AVEC:92 AVEC_EXP:22 VPA:36* +NOTE PINS RST:86 RW:71 AMIGA_BUS_DATA_DIR:48 AMIGA_BUS_ENABLE_LOW:20* +NOTE PINS CIIN:47 A_30_:5 A_29_:6 A_28_:15 A_27_:16 A_26_:17* +NOTE PINS A_25_:18 A_24_:19 A_23_:84 A_22_:85 SIZE_1_:79* +NOTE PINS IPL_030_2_:9 IPL_030_1_:7 IPL_030_0_:8 DSACK_1_:81* +NOTE PINS AS_030:82 AS_000:33 DS_030:98 UDS_000:32 LDS_000:31* +NOTE PINS A0:69 BG_000:29 BGACK_030:83 CLK_EXP:10 FPU_CS:78* +NOTE PINS E:66 VMA:35 RESET:3 AMIGA_BUS_ENABLE:34 SIZE_0_:70* NOTE Table of node names and numbers* NOTE NODES RN_DTACK:173 RN_SIZE_1_:269 RN_IPL_030_2_:128 * -NOTE NODES RN_DSACK_1_:281 RN_AS_030:278 RN_AS_000:179 RN_SIZE_0_:245 * -NOTE NODES RN_DS_030:107 RN_UDS_000:182 RN_LDS_000:188 RN_A0:257 * -NOTE NODES RN_BG_000:178 RN_BGACK_030:275 RN_FPU_CS:271 * -NOTE NODES RN_IPL_030_1_:134 RN_IPL_030_0_:131 RN_E:248 * -NOTE NODES RN_VMA:175 RN_AMIGA_BUS_ENABLE:176 inst_AS_030_000_SYNC:277 * -NOTE NODES inst_DTACK_SYNC:136 inst_VPA_SYNC:133 inst_VPA_D:137 * -NOTE NODES inst_CLK_000_D0:181 inst_CLK_000_D1:184 inst_CLK_000_D2:289 * -NOTE NODES inst_CLK_000_D5:287 inst_CLK_OUT_PRE:260 inst_BGACK_030_INT_D:274 * -NOTE NODES CLK_CNT_P_0_:286 SM_AMIGA_5_:190 inst_CLK_000_D4:254 * -NOTE NODES SM_AMIGA_7_:103 SM_AMIGA_1_:280 SM_AMIGA_0_:106 * -NOTE NODES SM_AMIGA_6_:251 inst_CLK_000_D3:262 SM_AMIGA_3_:259 * -NOTE NODES SM_AMIGA_4_:187 SM_AMIGA_2_:256 cpu_est_0_:272 * -NOTE NODES cpu_est_1_:253 cpu_est_2_:130 * +NOTE NODES RN_IPL_030_1_:134 RN_IPL_030_0_:131 RN_DSACK_1_:286 * +NOTE NODES RN_AS_030:278 RN_AS_000:181 RN_DS_030:109 RN_UDS_000:182 * +NOTE NODES RN_LDS_000:187 RN_A0:257 RN_BG_000:175 RN_BGACK_030:277 * +NOTE NODES RN_FPU_CS:271 RN_E:248 RN_VMA:178 RN_AMIGA_BUS_ENABLE:184 * +NOTE NODES RN_SIZE_0_:266 inst_AS_030_000_SYNC:283 inst_BGACK_030_INT_D:188 * +NOTE NODES inst_VPA_D:290 inst_CLK_OUT_PRE_50_D:106 inst_CLK_000_D0:191 * +NOTE NODES inst_CLK_000_D1:274 inst_CLK_000_D2:287 inst_CLK_000_D4:281 * +NOTE NODES inst_DTACK_D0:103 inst_CLK_OUT_PRE_50:247 inst_CLK_OUT_PRE_25:139 * +NOTE NODES SM_AMIGA_1_:140 SM_AMIGA_0_:133 SM_AMIGA_6_:280 * +NOTE NODES SM_AMIGA_5_:176 inst_CLK_000_D3:272 inst_CLK_030_H:101 * +NOTE NODES SM_AMIGA_7_:118 SM_AMIGA_4_:136 SM_AMIGA_3_:256 * +NOTE NODES SM_AMIGA_2_:254 cpu_est_0_:137 cpu_est_1_:251 * +NOTE NODES cpu_est_2_:253 * NOTE BLOCK 0 * L000000 - 111111111011111111111111111111111111111111111111111111111111111111 - 111111111101111111101110111111111111111111111111111111111111111111 - 111111111111111111111111111111111111111111111110111111111111111111 - 111110111111111111111111111111111111111111111111111111111111111111 + 111111111111111111111111111111111111111110111111111111111111111111 + 111111111111111111111111111111011111111111111111111011111111111111 + 111111111111111111111111111111111111111111111111111111110111111111 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111111111111111101111111011111111111111111111111111 - 111111111111111111111111111111111111111110111111111111011111111111 - 100111111111011001111011111001111111111111111111011101111111111111 - 111111111111111111111111011111111111111111101111111111111111111111* + 111111111111111111111111111111111111111111111111101111111111111111 + 111111111111111110111111110111111101111111111111111111111111111111 + 011111111110111111011111111111111111111111111111111111111110111111 + 111101111111111011111101011111111111111111111101111111101111111111 + 111111110111111111111111111110111111111111101111111111111111111111* L000594 000000000000000000000000000000000000000000000000000000000000000000* -L000660 111111111111111111111111111111111111111111111111111111111111111111* -L000726 111111111111111111111111111111111111111111111111111111111111111111* -L000792 111111111111111111111111111111111111111111111111111111111111111111* -L000858 111111111111111111111111111111111111111111111111111111111111111111* -L000924 111111111111111111111111111111111111111111111111111111111111111111* -L000990 101111111111111111111111011111111111111111111111111111111111111111* -L001056 111111111111111111111111010111111111111111111111111111111111111111* -L001122 111111111111111111111111011111111111110111111111111111111111111111* -L001188 011101111110111111111111111111111111111111111111101111111111111111* -L001254 011111111111011111111111111101111111111111111111011111111111111111* +L000660 111111110111111111111111111111111111111111101111111111111111111111* +L000726 111111111111111011111111101111111111111101011110111111101111111111* +L000792 111111110111111111111111101111111111111111111110111111101111111111* +L000858 101111111111111011111111111111111111111101011110111111101111111111* +L000924 101111110111111111111111111111111111111111111110111111101111111111* +L000990 111111111111111111011111111111111111111111111111111111111111111111* +L001056 000000000000000000000000000000000000000000000000000000000000000000* +L001122 000000000000000000000000000000000000000000000000000000000000000000* +L001188 000000000000000000000000000000000000000000000000000000000000000000* +L001254 000000000000000000000000000000000000000000000000000000000000000000* L001320 111111111111111111111111111111111111111111111111111111111111111111* L001386 111111111111111111111111111111111111111111111111111111111111111111* -L001452 111111111111111111101111011111111111111111111111111111111111111111* +L001452 000000000000000000000000000000000000000000000000000000000000000000* L001518 000000000000000000000000000000000000000000000000000000000000000000* L001584 000000000000000000000000000000000000000000000000000000000000000000* L001650 000000000000000000000000000000000000000000000000000000000000000000* -L001716 011111111111011111111111111101111111111111111111011111111111111111* -L001782 111111111111011111111111111111111111111111111111111111111111111111* -L001848 011111111111101111111111111111111111111101111110101111111111111111* -L001914 011111111111101111111111111111011111111101111111101111111111111111* -L001980 000000000000000000000000000000000000000000000000000000000000000000* +L001716 111111111111111111111111111111111111111111111111011111111111111111* +L001782 111111111111111111111111111111111111111111111111111111111111111111* +L001848 111111111111111111111111111111111111111111111111111111111111111111* +L001914 111111111111111111111111111111111111111111111111111111111111111111* +L001980 111111111111111111111111111111111111111111111111111111111111111111* L002046 000000000000000000000000000000000000000000000000000000000000000000* -L002112 011011111111111111110111111111111111111111111111111111111111111111* -L002178 101111111011111110111101111111111111111111111111111110111111111111* -L002244 101111111011111010111111111111111111111111111111111110111111111111* -L002310 101111111011111111111101111111111111111111111111111110101111111111* -L002376 101111111011111011111111111111111111111111111111111110101111111111* -L002442 111111111111111111111111111111111111111111111111111111111111111111* -L002508 111111111111111111111111111111111111111111111111111111111111111111* -L002574 111111111111111111111111111111111111111111111111111111111111111111* -L002640 111111111111111111111111111111111111111111111111111111111111111111* -L002706 111111111111111111111111111111111111111111111111111111111111111111* +L002112 111111111111111111111111111111111111111111111111111111111111111111* +L002178 111111111111111111111111111111111111111111111111111111111111111111* +L002244 111111111111111111111111111111111111111111111111111111111111111111* +L002310 111111111111111111111111111111111111111111111111111111111111111111* +L002376 111111111111111111111111111111111111111111111111111111111111111111* +L002442 111111111111111111111111111111111111111111111111111111011111111111* +L002508 111111111111111111111111111111111111111111111101111111111111111111* +L002574 011111111111111111111111011111111111111111111111111111111111111111* +L002640 111111111111110111111111111111111111111111111111110111111111111111* +L002706 111111110111110111111111111111111111111110111111111111111111111111* L002772 000000000000000000000000000000000000000000000000000000000000000000* L002838 111111111111111111111111111111111111111111111111111111111111111111* @@ -112,11 +112,11 @@ L002904 111111111111111111111111111111111111111111111111111111111111111111* L002970 111111111111111111111111111111111111111111111111111111111111111111* L003036 111111111111111111111111111111111111111111111111111111111111111111* L003102 111111111111111111111111111111111111111111111111111111111111111111* -L003168 111111111111111111111111111111111111111111111111111111111111111111* -L003234 111111111111111111111111111111111111111111111111111111111111111111* -L003300 111111111111111111111111111111111111111111111111111111111111111111* -L003366 111111111111111111111111111111111111111111111111111111111111111111* -L003432 111111111111111111111111111111111111111111111111111111111111111111* +L003168 111101111111111111111111111111111111111101111111111011111111111111* +L003234 111101111011111111111111111111111111111111111111111011111111111111* +L003300 000000000000000000000000000000000000000000000000000000000000000000* +L003366 000000000000000000000000000000000000000000000000000000000000000000* +L003432 000000000000000000000000000000000000000000000000000000000000000000* L003498 000000000000000000000000000000000000000000000000000000000000000000* L003564 111111111111111111111111111111111111111111111111111111111111111111* @@ -136,11 +136,11 @@ L004356 111111111111111111111111111111111111111111111111111111111111111111* L004422 111111111111111111111111111111111111111111111111111111111111111111* L004488 111111111111111111111111111111111111111111111111111111111111111111* L004554 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+154,7 @@ L005478 111111111111111111111111111111111111111111111111111111111111111111* L005544 111111111111111111111111111111111111111111111111111111111111111111* L005610 111111111111111111111111111111111111111111111111111111111111111111* L005676 - 101111111110111011111111111111111111111111111111111111111111111111* + 111111111111111011111111111111101111111111111111111111101111111111* L005742 111111111111111111111111111111111111111111111111111111111111111111* L005808 111111111111111111111111111111111111111111111111111111111111111111* L005874 111111111111111111111111111111111111111111111111111111111111111111* @@ -169,36 +169,36 @@ L006402 000000000000000000000000000000000000000000000000000000000000000000 111111111111111111111111111111111111111111101111111111111111111111* L006534 0010* -L006538 11100011110000* -L006552 10100110011111* -L006566 00110011110001* -L006580 00100100011111* -L006594 11100110011000* -L006608 11011011110011* -L006622 11110011110001* -L006636 11110111110011* +L006538 10100110010000* +L006552 00100110011110* +L006566 00101111110000* +L006580 00010100011111* +L006594 11101111110000* +L006608 10100110010010* +L006622 11001111110000* +L006636 11001011110011* L006650 11110011110000* L006664 11111011110010* -L006678 11110111110001* -L006692 11111111110011* -L006706 11110011110000* -L006720 11111011110011* -L006734 11110111110111* +L006678 11111111110000* +L006692 10100110010011* +L006706 11000011110000* +L006720 11111011110010* +L006734 11110111111111* L006748 11111111110011* NOTE BLOCK 1 * L006762 111111111111111111111111111111111111111111111111111111111111111111 - 111111111110111111111111101111111111111111111111111111111111111111 - 110111101011111111111101111111111101111111111111111111110111111111 - 101111111111111111111111110111111111011111111010111111011111111111 - 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111111111111111111111111111111111111111111111111111 - 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111111111111111111111111111111111111111111111111111111111111111111* -L010722 111111111111111111111111111111111111111111111111111111111111111111* -L010788 111111111111111111111111111111111111111111111111111111111111111111* -L010854 111111111111111111111111111111111111111111111111111111111111111111* -L010920 111111111111111111111111111111111111111111111111111111111111111111* +L010326 111111111111111101111111111111111110111111111111111111111111111111* +L010392 111111111111111101111101111111111111111111111111111111111111111111* +L010458 111111111111111110111110111111111101111111111111111111111111111111* +L010524 000000000000000000000000000000000000000000000000000000000000000000* +L010590 000000000000000000000000000000000000000000000000000000000000000000* +L010656 111111111111011111111111111111111111111111111111111111111111110111* +L010722 111111111111111111111111111111111111111111111111101111111111110111* +L010788 111111111111101111111111111111111111111111111111011111111111111011* +L010854 000000000000000000000000000000000000000000000000000000000000000000* +L010920 000000000000000000000000000000000000000000000000000000000000000000* L010986 000000000000000000000000000000000000000000000000000000000000000000* -L011052 111111111111111111111111111111111111111111111111111111111111111111* -L011118 111111111111111111111111111111111111111111111111111111111111111111* -L011184 111111111111111111111111111111111111111111111111111111111111111111* -L011250 111111111111111111111111111111111111111111111111111111111111111111* -L011316 111111111111111111111111111111111111111111111111111111111111111111* +L011052 111111111111111111111111011001111111111111111111111111111111111111* +L011118 111111111111111111111111011111111101111111111111111111111111111111* +L011184 111111111101111111111111111111111101111111111111111111111111111111* +L011250 000000000000000000000000000000000000000000000000000000000000000000* +L011316 000000000000000000000000000000000000000000000000000000000000000000* L011382 111111111111111111111111111111111111111111111111111111111111111111* L011448 111111111111111111111111111111111111111111111111111111111111111111* L011514 111111111111111111111111111111111111111111111111111111111111111111* @@ -299,19 +299,19 @@ L013296 0010* L013300 00100100010000* L013314 00100100011110* L013328 10100110010000* -L013342 00100100011111* +L013342 11100011111111* L013356 10100110010001* -L013370 11100110011111* +L013370 10100100011111* L013384 10100110010000* -L013398 11100110011110* -L013412 00010110010000* -L013426 11011111110011* -L013440 11110011110001* -L013454 11111011110011* -L013468 11111111110000* -L013482 11110011110010* -L013496 11111011111100* -L013510 11111111111111* +L013398 10100100011111* +L013412 10100100010001* +L013426 10100100010011* +L013440 10100100010000* +L013454 11010011110010* +L013468 11111011110000* +L013482 11111111110011* +L013496 11110011111101* +L013510 11111011111111* NOTE BLOCK 2 * L013524 111111111111111111111111111111111111111111111111111111111111111111 @@ -441,94 +441,94 @@ L020258 11110111110101* L020272 11111111111111* NOTE BLOCK 3 * L020286 - 111111111111111111111111111111111111111111111111011111111111111111 - 101111111101111110111111111111111111111111110111111111111111111111 - 111111111111111111111111111111101101111111111110111111111111111111 - 111111101111111111111110111111111111111111111111111111111111111111 - 111111111111111111111111111111111111011111111111111111111111111111 - 111101111111101111111111111111111111111111111111111111111111110111 - 111111111111111111111111011111111111111111111111111111111110111110 - 111111111111110111111011110101110111111010111111110111111111101111 - 111111111011111111011111111111111111111111101111111111010111111111* + 111111011111111111111111111111111111111111111111111111111111111111 + 111111110111111111111110011110011111111111111111111111111111111111 + 100111111111111101111111111111111111111111111111111111111111110111 + 111110111111111111111111111111111111111111111110111111111111111110 + 111111111111111111111111111111111111011111111011111111111111111111 + 111111111101101111111111111111111111111101111111111101111111111111 + 111111111111110111111011110111111111111111111111111011111110111111 + 111111111111111111011111111111110111111011111111011111101111101111 + 111111111111111111111111111111111101111111101111111111110111111111* L020880 111111111111111111111111111111111111111111111111111111111111111111* -L020946 111111111111111111111111111111111111111111111111111111111111111101* +L020946 111111111111111111110111111111111111111111111111111111111111111111* L021012 000000000000000000000000000000000000000000000000000000000000000000* L021078 000000000000000000000000000000000000000000000000000000000000000000* L021144 000000000000000000000000000000000000000000000000000000000000000000* L021210 000000000000000000000000000000000000000000000000000000000000000000* -L021276 111111111111111111111111111111111111111110111111111111101111111111* -L021342 111111111111111111101111111111111111111111111111111111101111111111* -L021408 111111100111111011111111111111111110111110111111111111111111111111* -L021474 111111100111111011101111111111111110111111111111111111111111111111* +L021276 111111111011111111111111111111111110111111111111111111111111111111* +L021342 111111011011111111111111111111011111110111111111111101111111111111* +L021408 000000000000000000000000000000000000000000000000000000000000000000* +L021474 000000000000000000000000000000000000000000000000000000000000000000* L021540 000000000000000000000000000000000000000000000000000000000000000000* L021606 111111111111111111111111111111111111111111111111111111111111111111* -L021672 111111111111111111110111111111111111111110111111111111111111111111* -L021738 111111111101111111111101111111111111111101111110111111111111111111* -L021804 111111111111111111111111111111111111111110111111111111111011111111* -L021870 111111111110111111110111111111111111111111111111111011111010111111* -L021936 111111111111111111110110111111111111111111111111111011111010111111* -L022002 111111111111111111111111111011111111111111111011111111111111111111* -L022068 111111111101111111011111111111111111110111111011011111111111111111* -L022134 000000000000000000000000000000000000000000000000000000000000000000* +L021672 111111111101111111111111111111111111111111111111111111111101111111* +L021738 111111111101111111111111111111111111111111111111111111110111111111* +L021804 000000000000000000000000000000000000000000000000000000000000000000* +L021870 000000000000000000000000000000000000000000000000000000000000000000* +L021936 000000000000000000000000000000000000000000000000000000000000000000* +L022002 111110111110111101011111111111111111111111111011111111111111111111* +L022068 111111111111111111011111111111111111111111111111111111111111111111* +L022134 111101111101111110101111111111111111111111111110011111111111111101* L022200 000000000000000000000000000000000000000000000000000000000000000000* L022266 000000000000000000000000000000000000000000000000000000000000000000* L022332 - 111111111111111111111111111111111111111101111111111111111111111111* -L022398 111111111110111111110111111111111111111011111111111111111011111111* -L022464 111111111111111111110110111111111111111011111111111111111011111111* + 111111111111111111111111111111111111111111111111111111011111111111* +L022398 111111111111111111111111111111111111111111111111110111110111111111* +L022464 111111111111111111111111111111111111111011111111101111111111111111* L022530 000000000000000000000000000000000000000000000000000000000000000000* L022596 000000000000000000000000000000000000000000000000000000000000000000* L022662 000000000000000000000000000000000000000000000000000000000000000000* -L022728 111111111111111111111111111111111111111111111111011111111111111111* -L022794 111111111111111111111111111111111111111101111101111111111111110111* -L022860 111111111111111111111111111110111111111011111111111111111111111111* -L022926 000000000000000000000000000000000000000000000000000000000000000000* -L022992 000000000000000000000000000000000000000000000000000000000000000000* +L022728 111111111110111111111110111111111011111011111111111111111111111111* +L022794 111111111111111111111101111111111011111011111111111011111111111111* +L022860 111111111111111111111101111111111011111011111111111111111011111111* +L022926 111011111111111111111110111111111011111011111111111111111111111111* +L022992 111111111111111111111111111111111011011011111111111111111111111111* L023058 - 111111111111111111111111111111111111111101111111111111111111111111* -L023124 111111111111111111111111111111111011111010111111111111111111111111* -L023190 111111111111111101111111111111111011111011111111111111111111111011* -L023256 111111111111111101111111111111111011111011111110111111111111111111* -L023322 111111111111111110111111101111111011111011111111111111111111111111* -L023388 111111111111111111111111111111111011011011111111111111111111111111* -L023454 111111111111110111111111111111111111111111111111111111111111111111* -L023520 111111111111111101111111111111101111101101111101111111111111110111* -L023586 111111111111111110111111011111101111101101111111111111111111111111* -L023652 000000000000000000000000000000000000000000000000000000000000000000* -L023718 000000000000000000000000000000000000000000000000000000000000000000* + 111111111111111111111111111111111111111111111111111111011111111111* +L023124 101111111111111111111101111111111111101111111111110111110111111111* +L023190 100111111101111111111110111111111111101111111111111111111111111111* +L023256 000000000000000000000000000000000000000000000000000000000000000000* +L023322 000000000000000000000000000000000000000000000000000000000000000000* +L023388 000000000000000000000000000000000000000000000000000000000000000000* +L023454 111111111111111111111111111111111111111111111111111111101111111111* +L023520 111111111111111111111111111111011111111101111111111011111101111111* +L023586 111111111111111111111111101011101111111101111111111111111111111011* +L023652 111111111111111111111111101011111111111101111111111111111110111011* +L023718 111111111111111111111111111011101111111001111111111111111111111111* L023784 - 111111111111111111111111111111111111111101111111111111111111111111* -L023850 111111111111111011111111111111111111111101111111111111111111110111* -L023916 111111111111111111111111011111111111111110111111111111111111111111* -L023982 111111111111111011111111011111111111111111111111111111111111111111* + 111111111111111111111111111111111111111111111111111111011111111111* +L023850 111111111111111111111111111011111111111001111111111111111110111111* +L023916 000000000000000000000000000000000000000000000000000000000000000000* +L023982 000000000000000000000000000000000000000000000000000000000000000000* L024048 000000000000000000000000000000000000000000000000000000000000000000* L024114 000000000000000000000000000000000000000000000000000000000000000000* -L024180 111110111111111111111111111111111111111010111111111111111111111111* -L024246 111110111111111101111111111111111111111011111111111111111111111011* -L024312 111110111111111101111111111111111111111011111110111111111111111111* -L024378 111110111111111110111111101111111111111011111111111111111111111111* -L024444 111110111111111111111111111111111111011011111111111111111111111111* +L024180 111111111110111011111110111111111111111011111111111111111111111111* +L024246 111111111111111011111101111111111111111011111111111011111111111111* +L024312 111111111111111011111101111111111111111011111111111111111011111111* +L024378 111011111111111011111110111111111111111011111111111111111111111111* +L024444 111111111111111011111111111111111111011011111111111111111111111111* L024510 - 111111111110111111111111111111111111111110111111111111111111101111* -L024576 101111111111111101111111111111111111101101111101111111111111110111* -L024642 101111111111111110111111011111111111101101111111111111111111111111* -L024708 111111111111011101111111111111111111101101111101111111111111110111* -L024774 111111111111011110111111011111111111101101111111111111111111111111* -L024840 111111111111111101111111111111011111101101111101111111111111110111* -L024906 111111111111111111111111111111111111111110111111111111111111110111* -L024972 111111111111110111111111111111111111111111111111111111111111110111* -L025038 111111111111110111111101111111111111111101111111111111111111111111* + 111111111111111111111111111111101111111111111111111111101111101111* +L024576 111111111111111111111111111111111111111111111111111111011111111111* +L024642 111111111111111111111101111110111111101111111111110111110111111111* +L024708 110111111101111111111110111110111111101111111111111111111111111111* +L024774 111111111111011111111101111111111111101111111111110111110111111111* +L024840 110111111101011111111110111111111111101111111111111111111111111111* +L024906 011111111111111111111101111111111111101111111111110111110111111111* +L024972 010111111101111111111110111111111111101111111111111111111111111111* +L025038 000000000000000000000000000000000000000000000000000000000000000000* L025104 000000000000000000000000000000000000000000000000000000000000000000* L025170 000000000000000000000000000000000000000000000000000000000000000000* L025236 111111111111111111111111111111111111111111111111111111111111111111* -L025302 111111111111111110111111011111011111101101111111111111111111111111* -L025368 000000000000000000000000000000000000000000000000000000000000000000* -L025434 000000000000000000000000000000000000000000000000000000000000000000* -L025500 000000000000000000000000000000000000000000000000000000000000000000* -L025566 000000000000000000000000000000000000000000000000000000000000000000* +L025302 111111011111111111111111111111111111111111111111111111111111111111* +L025368 111111111111111111111111111111111111111111111111111111111111111111* +L025434 111111111111111111111111111111111111111111111111111111111111111111* +L025500 111111111111111111111111111111111111111111111111111111111111111111* +L025566 111111111111111111111111111111111111111111111111111111111111111111* L025632 111111111111111111111111111111111111111111111111111111111111111111* L025698 111111111111111111111111111111111111111111111111111111111111111111* L025764 111111111111111111111111111111111111111111111111111111111111111111* @@ -550,22 +550,22 @@ L026688 000000000000000000000000000000000000000000000000000000000000000000 111111111111111111111111111111111111111111101111111111111111111111* L026820 0010* -L026824 00100011111000* +L026824 00100011111100* L026838 11100110011111* -L026852 11100110010001* -L026866 11100110011111* -L026880 11000110010000* -L026894 00110110010010* +L026852 10100100011011* +L026866 00100110011111* +L026880 11011111111000* +L026894 11010110010010* L026908 11100110010000* -L026922 00110110010011* -L026936 11010011110101* -L026950 10010100010011* -L026964 11100110010110* -L026978 10100100010010* -L026992 11001011111110* -L027006 11111111111111* -L027020 11110011110001* -L027034 11111011110011* +L026922 11100110010011* +L026936 11111011111000* +L026950 11100110010010* +L026964 00110110010110* +L026978 11001111110011* +L026992 00110110011011* +L027006 11000011111111* +L027020 11111011110000* +L027034 11111111110010* NOTE BLOCK 4 * L027048 111111111111111111111111111111111111111111111111111111111111111111 @@ -575,12 +575,12 @@ L027048 111111111111110111111111111111111111111111111111111111111111111111 111111111111111111111111111111111111111111111111111111111111111111 111111111111111111111111111111111111111111111111111111111111111111 - 101111111111111111111111111111011111111111111111111111111101111111 + 011111111111111111111111111011011111111111111111111111111101111111 111111111111111110111010111111111111111111111111111111111111111111* L027642 111111111111111111111011111111111111111111111111111111111111111111* -L027708 011111111111111111111111111111111111111111111111111011111111111111* -L027774 101111111111111111111111111111111111111111101111110111111111111111* +L027708 111111111111111111111111110111111111111111111111111011111111111111* +L027774 101111111111111111111111111011111111111111101111110111111111111111* L027840 000000000000000000000000000000000000000000000000000000000000000000* L027906 000000000000000000000000000000000000000000000000000000000000000000* L027972 000000000000000000000000000000000000000000000000000000000000000000* @@ -822,33 +822,33 @@ L040544 11110111111111* L040558 11111111111111* NOTE BLOCK 6 * L040572 - 111111111011111111111111111111111111111111111111111111111111111111 - 111111111111111111101111111111011111111111111011111111101111111111 - 111111111111111111111011111111111111111111111111111110110111111101 - 111110101101111111111111111111111111111111111111111111111111111011 - 111111111111111111111111111111111110111111111111111111111111111111 - 111011111111111111111111111111111111111011111111111111111111111111 - 011111111111111101111111111111111111111111111111110111111111111111 - 111111111111110111111110011011111111111110111101111111111111101111 - 111111111111111111111111111110111111111111011111101111111111111111* + 111111111111111111111111111111111111111111111111111111111111111111 + 111111111111011111111111111111011111111111111111111111111111111111 + 110111111111111110111111111111111101111111111110111111111111111111 + 111111101011111111111110111111111111111111111111111111111111111111 + 111110111111111111111111111111111111111111111111101111111111111111 + 111111111101111111111111111111111111111111111111111111111111111111 + 011111111111111111111111111111111111111111111111111111111111111111 + 111111111111111011111011010111111111111111111111111101101111111111 + 111111111111111111011111111111111111111111101111111111111111111111* L041166 111111111111111111111111111111111111111111111111111111111111111111* -L041232 111111111111111111111101111111111110111101111111111111111111111111* -L041298 101111111011111111111111101111111111111110111110111111111111111111* +L041232 111111111111011111111111111111111111111111111111111111111111111111* +L041298 000000000000000000000000000000000000000000000000000000000000000000* L041364 000000000000000000000000000000000000000000000000000000000000000000* L041430 000000000000000000000000000000000000000000000000000000000000000000* L041496 000000000000000000000000000000000000000000000000000000000000000000* -L041562 111111111111111111111111111111111111111111110111111111111111111111* +L041562 111111111111111111111111111111111111111111111111101111111111111111* L041628 000000000000000000000000000000000000000000000000000000000000000000* L041694 000000000000000000000000000000000000000000000000000000000000000000* L041760 000000000000000000000000000000000000000000000000000000000000000000* L041826 000000000000000000000000000000000000000000000000000000000000000000* L041892 111111111111111111111111111111111111111111111111111111111111111111* -L041958 111111111111111111111111111111111111111111111111111111111111110111* -L042024 111111011101110110111111111111111111111111111111111111111111110111* -L042090 111111101110110110111111111111111111111111111111111111111111111011* -L042156 111111111110110110111111111101111111111111111111111111111111111011* +L041958 111111110111111111111111111111111111111111111111111111111111111111* +L042024 111111010101111111111001111111111111111111111111111111111111111111* +L042090 111111101001111111111010111111111111111111111111111111111111111111* +L042156 111111101001111111111011111111111101111111111111111111111111111111* L042222 000000000000000000000000000000000000000000000000000000000000000000* L042288 111111111111111111111111111111111111111111111111111111111111111111* L042354 111111111111111111111111111111111111111111111111111111111111111111* @@ -857,48 +857,48 @@ L042486 111111111111111111111111111111111111111111111111111111111111111111* L042552 111111111111111111111111111111111111111111111111111111111111111111* L042618 000000000000000000000000000000000000000000000000000000000000000000* -L042684 111101111111111111111111111111111111111110111111111111111111111111* -L042750 111101111111111011111111111111011111111111111111111111111111111111* -L042816 111111111111111111011111111011111111111001011111111111111111111111* -L042882 000000000000000000000000000000000000000000000000000000000000000000* +L042684 111111101001111111111010111111111111111111111111111111111111111111* +L042750 111111010101111111111010111111111111111111111111111111111111111111* +L042816 111111100101111111111011111111111101111111111111111111111111111111* +L042882 111111011001111111111011111111111101111111111111111111111111111111* L042948 000000000000000000000000000000000000000000000000000000000000000000* -L043014 111111101110110110111111111111111111111111111111111111111111111011* -L043080 111111101101110110111111111111111111111111111111111111111111110111* -L043146 111111111110110110111111111101111111111111111111111111111111110111* -L043212 111111111101110110111111111101111111111111111111111111111111111011* +L043014 111111011111111111111111111111111111111111111111111111111111111111* +L043080 111111100101111111111011111111111101111111111111111111111111111111* +L043146 111111101101111111111010111111111110111111111111111111111111111111* +L043212 111111011001111111111010111111111101111111111111111111111111111111* L043278 000000000000000000000000000000000000000000000000000000000000000000* L043344 000000000000000000000000000000000000000000000000000000000000000000* -L043410 111111111111111111011111111111111111111111111111111111111111111111* -L043476 000000000000000000000000000000000000000000000000000000000000000000* -L043542 000000000000000000000000000000000000000000000000000000000000000000* +L043410 111101111110111101100111111111111111111111111111111111111111111111* +L043476 111111111110111111111111111111111111111111111101111111111111111111* +L043542 111110110110111101110110111011111111111111111111111111111111111111* L043608 000000000000000000000000000000000000000000000000000000000000000000* L043674 000000000000000000000000000000000000000000000000000000000000000000* -L043740 111111111111111011111111111111111111111101111111111111011111111110* -L043806 111111111111111011111111111111111111111101111111111111011011111111* -L043872 111111111111111111111111111111111111111110111111111101111111111111* -L043938 111111111111111011111111111111111111111111111111111101111111111111* +L043740 111101111110111111100111111111111111111111111111111111111111111111* +L043806 111111111110111110111111111111111111111111111111111111111111111111* +L043872 111011111111111110111111111111111111111111111111111111111111111111* +L043938 111110110110111111110110111011111111111111111111111111111111111111* L044004 000000000000000000000000000000000000000000000000000000000000000000* L044070 - 111111111111111111111111111111101111111110111111111111111111101111* -L044136 101111111011111111111111011111111111111110111110111111111111111111* -L044202 111111111111111111110101111111111111111101111111111111111111111111* -L044268 000000000000000000000000000000000000000000000000000000000000000000* -L044334 000000000000000000000000000000000000000000000000000000000000000000* -L044400 000000000000000000000000000000000000000000000000000000000000000000* -L044466 111111111111111111111111111111111111111110111111111111011111111111* -L044532 111111111111111111111111111111111111111111111111111111010111111101* -L044598 111111111111110111111111111111111111111111111111111111011111111111* -L044664 111111111111110111111111111111111111111101111111110111111111111111* -L044730 000000000000000000000000000000000000000000000000000000000000000000* + 111111111111111011111111111111101111111111111111111111101111111111* +L044136 101111111111111111111111011111111111111111111111111110101111111111* +L044202 111111111111111111111111111111111111111111111111111111111111111111* +L044268 111111111111111111111111111111111111111111111111111111111111111111* +L044334 111111111111111111111111111111111111111111111111111111111111111111* +L044400 111111111111111111111111111111111111111111111111111111111111111111* +L044466 111111111111111111111111111111111111111111111111111111111111111111* +L044532 111111111111111111111111111111111111111111111111111111111111111111* +L044598 111111111111111111111111111111111111111111111111111111111111111111* +L044664 111111111111111111111111111111111111111111111111111111111111111111* +L044730 111111111111111111111111111111111111111111111111111111111111111111* L044796 - 111111111111111111111111111111101111111110111111111111111111101111* -L044862 110111111111111111111111111111111111111111111011111111111111111111* -L044928 111011111111111111111111111111111111111111110111111111111111111111* -L044994 000000000000000000000000000000000000000000000000000000000000000000* -L045060 000000000000000000000000000000000000000000000000000000000000000000* -L045126 000000000000000000000000000000000000000000000000000000000000000000* -L045192 111111111111111111111111111111111111110111111111111111111111111111* + 111111111111111011111111111111101111111111111111111111101111111111* +L044862 111111111111111111111111111111111111111111111111111111111111111111* +L044928 111111111111111111111111111111111111111111111111111111111111111111* +L044994 111111111111111111111111111111111111111111111111111111111111111111* +L045060 111111111111111111111111111111111111111111111111111111111111111111* +L045126 111111111111111111111111111111111111111111111111111111111111111111* +L045192 111111111111111111111111111111111111111111111111111111111111111111* L045258 111111111111111111111111111111111111111111111111111111111111111111* L045324 111111111111111111111111111111111111111111111111111111111111111111* L045390 111111111111111111111111111111111111111111111111111111111111111111* @@ -917,7 +917,7 @@ L046116 111111111111111111111111111111111111111111111111111111111111111111* L046182 111111111111111111111111111111111111111111111111111111111111111111* L046248 000000000000000000000000000000000000000000000000000000000000000000* -L046314 111111111111111111111111111111111111111111111111111111111111111111* +L046314 101111111111111111111111101111111111111111111111111110101111111111* L046380 111111111111111111111111111111111111111111111111111111111111111111* L046446 111111111111111111111111111111111111111111111111111111111111111111* L046512 111111111111111111111111111111111111111111111111111111111111111111* @@ -928,123 +928,123 @@ L046776 111111111111111111111111111111111111111111111111111111111111111111* L046842 111111111111111111111111111111111111111111111111111111111111111111* L046908 111111111111111111111111111111111111111111111111111111111111111111* L046974 - 000000000000000000000000000000000000000000000000000000000000000000 - 111111111111111111111111111111111111111111111111101111111111111111* + 111111111111111111111111111111111111111111101111111111111111111111 + 000000000000000000000000000000000000000000000000000000000000000000* L047106 0010* -L047110 11100110011000* -L047124 00100100011110* -L047138 00100100010000* +L047110 00100110010000* +L047124 00100110011110* +L047138 00100110010000* L047152 11100011111111* -L047166 10100100010001* -L047180 10100101010011* -L047194 00100110010000* -L047208 10100100010011* -L047222 10100110010001* -L047236 10100100010011* -L047250 10100100010110* -L047264 00010110010010* -L047278 11010011110000* +L047166 10100111010001* +L047180 00100110010011* +L047194 10100110010000* +L047208 11100110010011* +L047222 00010100010001* +L047236 11010011110011* +L047250 11111011110010* +L047264 11111111110010* +L047278 11110011110000* L047292 11111011110011* -L047306 11111111110001* -L047320 11110011111111* +L047306 01110100011001* +L047320 11001111111111* NOTE BLOCK 7 * L047334 - 111111111111111111111111111111111111111111111111111111111011111111 - 111111111101111111111111111111111111111111111111111111111111111111 - 111111111111111111111111111111111110111111111111111110111110111111 - 111010111111111111111111111011111111111111111111111111111111111111 + 111111111011111111111111111111111111111111111111111111111111111111 + 111101111111111111111111111111011111111111111111111111111111111111 + 111111111111111111111111111111111110111111111111111111111111111111 + 111011111111111111111111111011111111111111111111111111111111111111 111111111111111111111111111111111111111111111111111111111111111111 - 111111111111111111111111111111101111011111111011111111011111111111 - 011111101111011001111111111111111111111111111111111111111111110111 - 111111111011111111111001011111111111111110101101111111111111111110 - 111111111111111111011111111110111111111011111111101111111111101111* + 111111111111110111111101011110111111111111111111111111111110111101 + 111111101110011111111111111111111111111110111111011111111111110111 + 111111111111111101101111111111111111101111101101111111101111111111 + 101111111111111111110111111111111111111011111111111111111011111111* L047928 000000000000000000000000000000000000000000000000000000000000000000* -L047994 111111111111111111110111111111111111111101111111111111111111101111* -L048060 011111111111111111111111101111111111111110111110111111111011111111* -L048126 101111111111111111111111011111111111111110111110111111111011111111* +L047994 111111111111111110111111111111111111111111111110011111101111111111* +L048060 111111111111111101111111111111111111111111111110101111101111111111* +L048126 000000000000000000000000000000000000000000000000000000000000000000* L048192 000000000000000000000000000000000000000000000000000000000000000000* L048258 000000000000000000000000000000000000000000000000000000000000000000* -L048324 110111111111101111111111110111111101011111111111111111100111111010* -L048390 111111111111111111111111111111111111111011111111111111111111111110* +L048324 110111110111101111101111100111111101111111111111111111111111111001* +L048390 111111111111111111101111111111111111111011111111111111111111111111* L048456 000000000000000000000000000000000000000000000000000000000000000000* L048522 000000000000000000000000000000000000000000000000000000000000000000* L048588 000000000000000000000000000000000000000000000000000000000000000000* L048654 000000000000000000000000000000000000000000000000000000000000000000* -L048720 111111111111111111111110111101111111111111111111111111111111111111* -L048786 111111111111111101111111111101111111111111111111111111111111111111* -L048852 111111111111111110111101111110111111111111111111111111111111111111* +L048720 111111111111111111111111111111111111111111111111111111111101111111* +L048786 000000000000000000000000000000000000000000000000000000000000000000* +L048852 000000000000000000000000000000000000000000000000000000000000000000* L048918 000000000000000000000000000000000000000000000000000000000000000000* L048984 000000000000000000000000000000000000000000000000000000000000000000* -L049050 111111111111111111111111111111111111111101111111111111111111111111* -L049116 111111111111111111111111111111111111011101111111111111111111111111* -L049182 111111111111111110111101111111111111011111111111111111111111111111* -L049248 000000000000000000000000000000000000000000000000000000000000000000* -L049314 000000000000000000000000000000000000000000000000000000000000000000* +L049050 111111111111111111111101111111111111111111111111111111111111111111* +L049116 111111111111111111111111111111111111111111111111111111111111111111* +L049182 111111111111111111111111111111111111111111111111111111111111111111* +L049248 111111111111111111111111111111111111111111111111111111111111111111* +L049314 111111111111111111111111111111111111111111111111111111111111111111* L049380 111111111111111111111111111111111111111111111111111111111111111111* -L049446 111111111111110111111111111111101111111101111111111111111101111111* -L049512 111111110110111111111111111111111111111111111111111111111111111111* -L049578 111111110111111111111111111111111111111111111111111111111011111111* -L049644 110111110111101111111111110111111101011111111111111111101111111011* -L049710 111111110111111111101111111111111111111111111111111111111111111111* -L049776 111101111110111111111111111111111111111101111111111111111111111111* -L049842 111111111111111111111111111111111111111111111111111111111111111101* +L049446 111111111111111111111111111111111111111111111111111111111111111111* +L049512 111111111111111111111111111111111111111111111111111111111111111111* +L049578 111111111111111111111111111111111111111111111111111111111111111111* +L049644 111111111111111111111111111111111111111111111111111111111111111111* +L049710 111111111111111111111111111111111111111111111111111111111111111111* +L049776 111111111111111111111111111111111111111111111111111111011111111101* +L049842 111111111111111111111101111111111111101111111111111111111111111101* L049908 000000000000000000000000000000000000000000000000000000000000000000* L049974 000000000000000000000000000000000000000000000000000000000000000000* L050040 000000000000000000000000000000000000000000000000000000000000000000* L050106 - 111111111110111111111111111111111111111110101111111111111111111111* -L050172 111111111111111111110111111111111111111101101111111111111111111111* -L050238 111111111111111111111111101111111111111110111110111111111011111111* -L050304 101111111111111111111111111111111111111110111110111111111011111111* -L050370 000000000000000000000000000000000000000000000000000000000000000000* + 111111111111111111111111111111101111111111101111111111101111111111* +L050172 111111111111111111111111111111111111111111111111111111011111111111* +L050238 111111110111111111111111111111111111111111011111111111111111111111* +L050304 111111111111111111111111111111111111111111111101111111111111111111* +L050370 111111111111111101111111111111111111111111111111011111111111111111* L050436 000000000000000000000000000000000000000000000000000000000000000000* -L050502 111111111111110111111111111111111111111110111111111111111111111111* -L050568 111111111111110111111101111111111111111111111111111111111111111111* -L050634 111111111111110111111111111111101111111111111111111111111101111111* -L050700 111111111111111111111101111111111111111101111111111101111111111111* +L050502 111111111110110111111111111111111111111111111111111111110110111111* +L050568 111111111111111011111110111111011111111101111111111111111111111111* +L050634 000000000000000000000000000000000000000000000000000000000000000000* +L050700 000000000000000000000000000000000000000000000000000000000000000000* L050766 000000000000000000000000000000000000000000000000000000000000000000* L050832 - 111111111101111111111111111111111111111111111111111111111111111111* -L050898 111111111111110111111111111111101111111101111111111111111101111111* -L050964 111111101111111111111111111111111111111111111111111111111111111110* + 111111111111111111111111111111011111111111111111111111111111111111* +L050898 111111111111111111111111111111111111111111111111111111110111111111* +L050964 000000000000000000000000000000000000000000000000000000000000000000* L051030 000000000000000000000000000000000000000000000000000000000000000000* L051096 000000000000000000000000000000000000000000000000000000000000000000* L051162 000000000000000000000000000000000000000000000000000000000000000000* -L051228 111111111111111111111111111111111111111111111111111111111111111111* -L051294 111111111111111111111111111111111111111111111111111111111111111111* -L051360 111111111111111111111111111111111111111111111111111111111111111111* -L051426 111111111111111111111111111111111111111111111111111111111111111111* -L051492 111111111111111111111111111111111111111111111111111111111111111111* +L051228 111101101111111111111111111111111111111111111111111111110111111111* +L051294 111111111101111111111111111111101111111111111111111111111111111111* +L051360 111111111001111111111111111111111111111111111111111111111111111111* +L051426 110111111101101111111111100111111101111111111111111111111111111001* +L051492 111111111101111111111111111111111111111111111111111111101111111111* L051558 - 111111111101111111111111111111111111111111111111111111111111111111* + 111111111111111111111111111111011111111111111111111111111111111111* L051624 111111111111111111111111111111111111111111111111111111111111111111* -L051690 111111111111111111111111111111111111111111111111111111111111111111* -L051756 111111111111111111111111111111111111111111111111111111111111111111* -L051822 111111111111111111111111111111111111111111111111111111111111111111* -L051888 111111111111111111111111111111111111111111111111111111111111111111* -L051954 111111111111111111111111111111111111111111111011111111111111111111* -L052020 111111111111111111111111111111111111111111111111111111111111111111* -L052086 111111111111111111111111111111111111111111111111111111111111111111* -L052152 111111111111111111111111111111111111111111111111111111111111111111* -L052218 111111111111111111111111111111111111111111111111111111111111111111* +L051690 111111111111111111111111111111101111111101111111111111111111111111* +L051756 111111111101111011111111111111111111111111111111111111111111111111* +L051822 111111111111111111011111111111111111111111111111111111111111111111* +L051888 000000000000000000000000000000000000000000000000000000000000000000* +L051954 111101101111111111111111111111111111111111111111111111110111111111* +L052020 111111111111111111101111111110111111111111111111111111111111111111* +L052086 000000000000000000000000000000000000000000000000000000000000000000* +L052152 000000000000000000000000000000000000000000000000000000000000000000* +L052218 000000000000000000000000000000000000000000000000000000000000000000* L052284 - 111111111110111111111111111111111111111110101111111111111111111111* -L052350 111111111111111111111111111111111111111111111111111111111101111111* -L052416 000000000000000000000000000000000000000000000000000000000000000000* -L052482 000000000000000000000000000000000000000000000000000000000000000000* -L052548 000000000000000000000000000000000000000000000000000000000000000000* -L052614 000000000000000000000000000000000000000000000000000000000000000000* -L052680 111111111111111101111111111111111111111111111111111111111111111111* + 111111111111111111111111111111101111111111101111111111101111111111* +L052350 111111111111111111111111111111111111011111111111111111111111111111* +L052416 111111111111111111111111111111111111111111111111111111111111111111* +L052482 111111111111111111111111111111111111111111111111111111111111111111* +L052548 111111111111111111111111111111111111111111111111111111111111111111* +L052614 111111111111111111111111111111111111111111111111111111111111111111* +L052680 111111111111111111111111111111111111111111111111111111111111111111* L052746 111111111111111111111111111111111111111111111111111111111111111111* L052812 111111111111111111111111111111111111111111111111111111111111111111* L052878 111111111111111111111111111111111111111111111111111111111111111111* L052944 111111111111111111111111111111111111111111111111111111111111111111* L053010 111111111111111111111111111111111111111111111111111111111111111111* -L053076 111111111111111111111111111111111111111111111111111111111111111111* +L053076 111111111111111111110111111111111111111111111111111111111111111111* L053142 111111111111111111111111111111111111111111111111111111111111111111* L053208 111111111111111111111111111111111111111111111111111111111111111111* L053274 111111111111111111111111111111111111111111111111111111111111111111* @@ -1056,24 +1056,24 @@ L053604 111111111111111111111111111111111111111111111111111111111111111111* L053670 111111111111111111111111111111111111111111111111111111111111111111* L053736 000000000000000000000000000000000000000000000000000000000000000000 - 111111111111111111111111111111111111111111111111101111111111111111* + 101111111111111111111111111111111111111111111111111111111111111111* L053868 0010* L053872 11100110011100* L053886 11100110010010* -L053900 10100100010000* +L053900 00100110010000* L053914 00010110010011* -L053928 10010110010001* +L053928 11101011111001* L053942 10100110011111* -L053956 11100110010000* +L053956 10100110010000* L053970 10100100010010* -L053984 11100110010000* -L053998 11101111110011* -L054012 00110011110001* -L054026 00000100011111* -L054040 00100110010010* -L054054 00010110010010* -L054068 11011011111100* -L054082 11111111111111* +L053984 00100110011101* +L053998 10100110010011* +L054012 00110011110000* +L054026 11100110011110* +L054040 00010110010010* +L054054 11101011110011* +L054068 00110110011101* +L054082 11001111111111* E1 1 11111100 @@ -1093,6 +1093,6 @@ E1 10000010 1 * -CD1E0* +CA8F5* U00000000000000000000000000000000* -DC00 +DF40 diff --git a/Logic/68030_tk.lco b/Logic/68030_tk.lco index a6d97a1..26df4fe 100644 --- a/Logic/68030_tk.lco +++ b/Logic/68030_tk.lco @@ -16,8 +16,8 @@ RCS = "$Revision: 1.2 $"; Parent = m4a5.lci; SDS_File = m4a5.sds; Design = 68030_tk.tt4; -DATE = 5/25/14; -TIME = 21:18:55; +DATE = 5/28/14; +TIME = 21:25:00; Source_Format = Pure_VHDL; Type = TT2; Pre_Fit_Time = 1; @@ -76,51 +76,52 @@ Usercode_Format = Hex; [LOCATION ASSIGNMENTS] Layer = OFF; -A_31_ = pin,4,-,B,-; -IPL_2_ = pin,68,-,G,-; -FC_1_ = pin,58,-,F,-; -A_30_ = pin,5,-,B,-; -A_29_ = pin,6,-,B,-; -A_28_ = pin,15,-,C,-; -A_27_ = pin,16,-,C,-; -nEXP_SPACE = pin,14,-,-,-; -A_26_ = pin,17,-,C,-; -BERR = pin,41,-,E,-; -A_25_ = pin,18,-,C,-; -BG_030 = pin,21,-,C,-; -A_24_ = pin,19,-,C,-; -A_23_ = pin,84,-,H,-; -A_22_ = pin,85,-,H,-; -BGACK_000 = pin,28,-,D,-; A_21_ = pin,94,-,A,-; -CLK_030 = pin,64,-,-,-; A_20_ = pin,93,-,A,-; -CLK_000 = pin,11,-,-,-; A_19_ = pin,97,-,A,-; -CLK_OSZI = pin,61,-,-,-; A_18_ = pin,95,-,A,-; -CLK_DIV_OUT = pin,65,-,G,-; +A_31_ = pin,4,-,B,-; A_17_ = pin,59,-,F,-; A_16_ = pin,96,-,A,-; -DTACK = pin,30,-,D,-; -AVEC = pin,92,-,A,-; +IPL_2_ = pin,68,-,G,-; IPL_1_ = pin,56,-,F,-; -AVEC_EXP = pin,22,-,C,-; IPL_0_ = pin,67,-,G,-; DSACK_0_ = pin,80,-,H,-; -VPA = pin,36,-,-,-; FC_0_ = pin,57,-,F,-; +FC_1_ = pin,58,-,F,-; +nEXP_SPACE = pin,14,-,-,-; +BERR = pin,41,-,E,-; +BG_030 = pin,21,-,C,-; +BGACK_000 = pin,28,-,D,-; +CLK_030 = pin,64,-,-,-; +CLK_000 = pin,11,-,-,-; +CLK_OSZI = pin,61,-,-,-; +CLK_DIV_OUT = pin,65,-,G,-; +DTACK = pin,30,-,D,-; +AVEC = pin,92,-,A,-; +AVEC_EXP = pin,22,-,C,-; +VPA = pin,36,-,-,-; RST = pin,86,-,-,-; RW = pin,71,-,G,-; AMIGA_BUS_DATA_DIR = pin,48,-,E,-; AMIGA_BUS_ENABLE_LOW = pin,20,-,C,-; CIIN = pin,47,-,E,-; +A_30_ = pin,5,-,B,-; +A_29_ = pin,6,-,B,-; +A_28_ = pin,15,-,C,-; +A_27_ = pin,16,-,C,-; +A_26_ = pin,17,-,C,-; +A_25_ = pin,18,-,C,-; +A_24_ = pin,19,-,C,-; +A_23_ = pin,84,-,H,-; +A_22_ = pin,85,-,H,-; SIZE_1_ = pin,79,-,H,-; IPL_030_2_ = pin,9,-,B,-; +IPL_030_1_ = pin,7,-,B,-; +IPL_030_0_ = pin,8,-,B,-; DSACK_1_ = pin,81,-,H,-; AS_030 = pin,82,-,H,-; AS_000 = pin,33,-,D,-; -SIZE_0_ = pin,70,-,G,-; DS_030 = pin,98,-,A,-; UDS_000 = pin,32,-,D,-; LDS_000 = pin,31,-,D,-; @@ -129,36 +130,35 @@ BG_000 = pin,29,-,D,-; BGACK_030 = pin,83,-,H,-; CLK_EXP = pin,10,-,B,-; FPU_CS = pin,78,-,H,-; -IPL_030_1_ = pin,7,-,B,-; -IPL_030_0_ = pin,8,-,B,-; E = pin,66,-,G,-; VMA = pin,35,-,D,-; RESET = pin,3,-,B,-; AMIGA_BUS_ENABLE = pin,34,-,D,-; -inst_AS_030_000_SYNC = node,-,-,H,5; -inst_DTACK_SYNC = node,-,-,B,7; -inst_VPA_SYNC = node,-,-,B,5; -inst_VPA_D = node,-,-,B,8; -inst_CLK_000_D0 = node,-,-,D,5; -inst_CLK_000_D1 = node,-,-,D,7; -inst_CLK_000_D2 = node,-,-,H,13; -inst_CLK_000_D5 = node,-,-,H,12; -inst_CLK_OUT_PRE = node,-,-,G,10; -inst_BGACK_030_INT_D = node,-,-,H,3; -CLK_CNT_P_0_ = node,-,-,H,11; -SM_AMIGA_5_ = node,-,-,D,11; -inst_CLK_000_D4 = node,-,-,G,6; -SM_AMIGA_7_ = node,-,-,A,1; -SM_AMIGA_1_ = node,-,-,H,7; -SM_AMIGA_0_ = node,-,-,A,3; -SM_AMIGA_6_ = node,-,-,G,4; -inst_CLK_000_D3 = node,-,-,G,11; -SM_AMIGA_3_ = node,-,-,G,9; -SM_AMIGA_4_ = node,-,-,D,9; -SM_AMIGA_2_ = node,-,-,G,7; -cpu_est_0_ = node,-,-,H,2; -cpu_est_1_ = node,-,-,G,5; -cpu_est_2_ = node,-,-,B,3; +SIZE_0_ = pin,70,-,G,-; +inst_AS_030_000_SYNC = node,-,-,H,9; +inst_BGACK_030_INT_D = node,-,-,D,10; +inst_VPA_D = node,-,-,H,14; +inst_CLK_OUT_PRE_50_D = node,-,-,A,3; +inst_CLK_000_D0 = node,-,-,D,12; +inst_CLK_000_D1 = node,-,-,H,3; +inst_CLK_000_D2 = node,-,-,H,12; +inst_CLK_000_D4 = node,-,-,H,8; +inst_DTACK_D0 = node,-,-,A,1; +inst_CLK_OUT_PRE_50 = node,-,-,G,1; +inst_CLK_OUT_PRE_25 = node,-,-,B,9; +SM_AMIGA_1_ = node,-,-,B,10; +SM_AMIGA_0_ = node,-,-,B,5; +SM_AMIGA_6_ = node,-,-,H,7; +SM_AMIGA_5_ = node,-,-,D,2; +inst_CLK_000_D3 = node,-,-,H,2; +inst_CLK_030_H = node,-,-,A,0; +SM_AMIGA_7_ = node,-,-,A,11; +SM_AMIGA_4_ = node,-,-,B,7; +SM_AMIGA_3_ = node,-,-,G,7; +SM_AMIGA_2_ = node,-,-,G,6; +cpu_est_0_ = node,-,-,B,8; +cpu_est_1_ = node,-,-,G,4; +cpu_est_2_ = node,-,-,G,5; [GROUP ASSIGNMENTS] Layer = OFF; diff --git a/Logic/68030_tk.out b/Logic/68030_tk.out index 05b4679..0a6c1eb 100644 --- a/Logic/68030_tk.out +++ b/Logic/68030_tk.out @@ -71696,6 +71696,1797 @@ 16 A_26_ 1 -1 -1 1 4 16 -1 15 A_27_ 1 -1 -1 1 4 15 -1 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +101 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 320 7 4 0 1 3 7 81 -1 3 0 21 + 30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21 + 31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21 + 32 AS_000 5 321 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 322 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 317 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 328 6 1 3 69 -1 2 0 21 + 68 A0 5 325 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 1 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 7 0 21 + 34 VMA 5 331 3 0 34 -1 4 0 21 + 65 E 5 330 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 334 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 333 1 0 6 -1 3 0 21 + 82 BGACK_030 5 327 7 0 82 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 28 BG_000 5 326 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 327 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21 + 297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21 + 320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 302 inst_BGACK_030_INT_D 3 -1 3 4 0 3 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D1 3 -1 3 4 0 1 6 7 -1 -1 1 0 21 + 306 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 6 0 21 + 315 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 307 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 21 + 314 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 + 309 SM_AMIGA_6_ 3 -1 6 3 3 6 7 -1 -1 3 0 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 296 inst_VPA_D 3 -1 1 3 0 1 3 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 7 0 21 + 331 RN_VMA 3 34 3 2 0 3 34 -1 4 0 21 + 313 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 4 0 21 + 311 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 4 0 21 + 330 RN_E 3 65 6 2 0 6 65 -1 3 1 21 + 312 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 3 0 21 + 308 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21 + 301 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21 + 310 inst_CLK_000_D4 3 -1 3 2 6 7 -1 -1 1 0 21 + 305 inst_CLK_000_D3 3 -1 6 2 3 6 -1 -1 1 0 21 + 303 CLK_CNT_P_0_ 3 -1 3 2 3 6 -1 -1 1 0 21 + 300 inst_CLK_000_D5 3 -1 7 2 6 7 -1 -1 1 0 21 + 324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21 + 332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21 + 323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21 + 322 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 334 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 333 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 317 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 316 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21 + 304 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21 + 328 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 325 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21 + 299 inst_CLK_000_D2 3 -1 7 1 6 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 63 CLK_030 1 -1 -1 3 0 6 7 63 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +101 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 320 7 4 0 1 3 7 81 -1 3 0 21 + 30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21 + 31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21 + 32 AS_000 5 321 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 322 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 317 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 323 6 1 3 69 -1 2 0 21 + 68 A0 5 326 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 1 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 7 0 21 + 34 VMA 5 333 3 0 34 -1 4 0 21 + 65 E 5 332 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21 + 82 BGACK_030 5 328 7 0 82 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 328 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21 + 297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21 + 320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 302 inst_BGACK_030_INT_D 3 -1 3 4 0 3 6 7 -1 -1 1 0 21 + 305 SM_AMIGA_7_ 3 -1 6 3 3 6 7 -1 -1 6 0 21 + 315 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 306 SM_AMIGA_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 21 + 308 SM_AMIGA_6_ 3 -1 6 3 3 6 7 -1 -1 3 0 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 298 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 1 3 0 1 3 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 7 2 6 7 -1 -1 7 0 21 + 333 RN_VMA 3 34 3 2 0 3 34 -1 4 0 21 + 313 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 4 0 21 + 311 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 4 0 21 + 332 RN_E 3 65 6 2 0 6 65 -1 3 1 21 + 314 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 312 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 3 0 21 + 307 SM_AMIGA_0_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 321 RN_AS_000 3 32 3 2 3 6 32 -1 2 0 21 + 301 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21 + 310 inst_CLK_000_D4 3 -1 3 2 6 7 -1 -1 1 0 21 + 309 inst_CLK_000_D3 3 -1 3 2 3 6 -1 -1 1 0 21 + 303 CLK_CNT_P_0_ 3 -1 0 2 0 6 -1 -1 1 0 21 + 300 inst_CLK_000_D5 3 -1 7 2 6 7 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 7 2 3 6 -1 -1 1 0 21 + 325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21 + 334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21 + 324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21 + 322 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 317 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 316 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21 + 304 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 326 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 323 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 63 CLK_030 1 -1 -1 3 0 6 7 63 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +101 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 320 7 4 0 1 3 7 81 -1 3 0 21 + 30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21 + 31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21 + 32 AS_000 5 321 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 322 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 317 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 323 6 1 3 69 -1 2 0 21 + 68 A0 5 326 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 0 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 7 0 21 + 34 VMA 5 333 3 0 34 -1 4 0 21 + 65 E 5 332 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21 + 82 BGACK_030 5 328 7 0 82 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 328 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21 + 297 inst_CLK_000_D0 3 -1 7 5 0 1 3 6 7 -1 -1 1 0 21 + 305 SM_AMIGA_7_ 3 -1 0 4 0 3 6 7 -1 -1 6 0 21 + 320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 308 SM_AMIGA_6_ 3 -1 6 4 0 3 6 7 -1 -1 3 0 21 + 302 inst_BGACK_030_INT_D 3 -1 3 4 0 3 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 7 3 0 6 7 -1 -1 7 0 21 + 315 cpu_est_1_ 3 -1 1 3 1 3 6 -1 -1 4 0 21 + 311 SM_AMIGA_3_ 3 -1 6 3 0 1 6 -1 -1 4 0 21 + 306 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 4 0 21 + 314 cpu_est_0_ 3 -1 3 3 1 3 6 -1 -1 3 0 21 + 307 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 3 1 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 321 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21 + 301 inst_CLK_OUT_PRE 3 -1 7 3 1 6 7 -1 -1 2 0 21 + 309 inst_CLK_000_D3 3 -1 7 3 0 3 6 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 7 3 0 6 7 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 6 3 0 1 3 -1 -1 1 0 21 + 333 RN_VMA 3 34 3 2 1 3 34 -1 4 0 21 + 313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 4 0 21 + 332 RN_E 3 65 6 2 1 6 65 -1 3 1 21 + 316 cpu_est_2_ 3 -1 6 2 1 6 -1 -1 3 1 21 + 312 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 304 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 295 inst_VPA_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 0 2 0 6 -1 -1 2 0 21 + 310 inst_CLK_000_D4 3 -1 3 2 1 7 -1 -1 1 0 21 + 300 inst_CLK_000_D5 3 -1 7 2 1 7 -1 -1 1 0 21 + 325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21 + 334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21 + 324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21 + 322 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 317 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 326 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 323 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 303 CLK_CNT_P_0_ 3 -1 7 1 7 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 63 CLK_030 1 -1 -1 3 0 6 7 63 -1 + 10 CLK_000 1 -1 -1 2 3 7 10 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +102 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 322 7 4 0 1 3 7 81 -1 3 0 21 + 30 LDS_000 5 326 3 3 0 6 7 30 -1 11 0 21 + 31 UDS_000 5 325 3 3 0 6 7 31 -1 7 0 21 + 32 AS_000 5 323 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 324 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 318 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 320 6 1 3 69 -1 2 0 21 + 68 A0 5 327 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 1 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 335 3 0 33 -1 7 0 21 + 34 VMA 5 334 3 0 34 -1 4 0 21 + 65 E 5 333 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 331 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21 + 82 BGACK_030 5 329 7 0 82 -1 2 0 21 + 77 FPU_CS 5 332 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 28 BG_000 5 328 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 329 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21 + 297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21 + 305 SM_AMIGA_7_ 3 -1 0 4 0 3 6 7 -1 -1 6 0 21 + 306 SM_AMIGA_1_ 3 -1 6 4 1 3 6 7 -1 -1 4 0 21 + 322 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 308 SM_AMIGA_6_ 3 -1 6 4 0 3 6 7 -1 -1 3 0 21 + 302 inst_BGACK_030_INT_D 3 -1 3 4 0 3 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 7 3 0 6 7 -1 -1 7 0 21 + 316 cpu_est_1_ 3 -1 6 3 0 3 6 -1 -1 4 0 21 + 307 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 3 1 21 + 332 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 323 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21 + 310 inst_CLK_000_D5 3 -1 6 3 1 6 7 -1 -1 1 0 21 + 309 inst_CLK_000_D3 3 -1 6 3 0 3 6 -1 -1 1 0 21 + 300 inst_CLK_000_D6 3 -1 7 3 1 6 7 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 1 3 0 1 3 -1 -1 1 0 21 + 334 RN_VMA 3 34 3 2 0 3 34 -1 4 0 21 + 314 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 4 0 21 + 311 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 4 0 21 + 333 RN_E 3 65 6 2 0 6 65 -1 3 1 21 + 315 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 313 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 3 0 21 + 301 inst_CLK_OUT_PRE 3 -1 6 2 1 6 -1 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21 + 303 CLK_CNT_P_0_ 3 -1 7 2 6 7 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 7 2 0 6 -1 -1 1 0 21 + 326 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21 + 335 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21 + 325 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21 + 324 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 331 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 318 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 317 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21 + 304 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21 + 328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 327 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 320 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 1 1 1 -1 -1 2 0 21 + 312 inst_CLK_000_D4 3 -1 3 1 6 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 63 CLK_030 1 -1 -1 3 0 6 7 63 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +102 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 321 7 4 0 1 3 7 81 -1 3 0 21 + 30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21 + 31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21 + 32 AS_000 5 322 3 3 0 6 7 32 -1 2 0 21 + 97 DS_030 5 323 0 1 3 97 -1 5 0 21 + 78 SIZE_1_ 5 318 7 1 3 78 -1 3 0 21 + 80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21 + 69 SIZE_0_ 5 327 6 1 3 69 -1 2 0 21 + 68 A0 5 326 6 1 3 68 -1 2 0 21 + 29 DTACK 5 -1 3 1 0 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 335 3 0 33 -1 7 0 21 + 34 VMA 5 334 3 0 34 -1 4 0 21 + 65 E 5 331 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 333 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 332 1 0 6 -1 3 0 21 + 82 BGACK_030 5 329 7 0 82 -1 2 0 21 + 77 FPU_CS 5 330 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 28 BG_000 5 328 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 329 RN_BGACK_030 3 82 7 6 0 1 3 4 6 7 82 -1 2 0 21 + 298 inst_CLK_000_D0 3 -1 6 5 0 1 3 6 7 -1 -1 1 0 21 + 321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 3 0 21 + 304 inst_BGACK_030_INT_D 3 -1 1 4 0 3 6 7 -1 -1 1 0 21 + 307 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 6 0 21 + 316 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21 + 308 SM_AMIGA_1_ 3 -1 6 3 3 6 7 -1 -1 4 0 21 + 310 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 3 0 21 + 309 SM_AMIGA_0_ 3 -1 6 3 0 3 6 -1 -1 3 1 21 + 330 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 322 RN_AS_000 3 32 3 3 0 3 6 32 -1 2 0 21 + 306 inst_CLK_000_D4 3 -1 7 3 3 6 7 -1 -1 1 0 21 + 299 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 6 3 0 1 3 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 7 0 21 + 334 RN_VMA 3 34 3 2 1 3 34 -1 4 0 21 + 314 SM_AMIGA_2_ 3 -1 1 2 1 6 -1 -1 4 0 21 + 312 SM_AMIGA_3_ 3 -1 1 2 0 1 -1 -1 4 0 21 + 331 RN_E 3 65 6 2 1 6 65 -1 3 1 21 + 315 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 313 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 3 0 21 + 303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21 + 294 inst_DTACK_SYNC 3 -1 0 2 0 1 -1 -1 2 0 21 + 311 inst_CLK_000_D3 3 -1 7 2 0 7 -1 -1 1 0 21 + 302 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21 + 301 inst_CLK_000_D5 3 -1 3 2 6 7 -1 -1 1 0 21 + 300 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21 + 325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21 + 335 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 7 0 21 + 324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21 + 323 RN_DS_030 3 97 0 1 0 97 -1 5 0 21 + 333 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 332 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 318 RN_SIZE_1_ 3 78 7 1 7 78 -1 3 0 21 + 317 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21 + 305 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 3 0 21 + 328 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 327 RN_SIZE_0_ 3 69 6 1 6 69 -1 2 0 21 + 326 RN_A0 3 68 6 1 6 68 -1 2 0 21 + 320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 1 1 1 -1 -1 2 0 21 + 297 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 63 CLK_030 1 -1 -1 3 0 6 7 63 -1 + 10 CLK_000 1 -1 -1 2 3 6 10 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 320 7 4 0 3 6 7 81 -1 4 0 21 + 32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21 + 30 LDS_000 5 326 3 3 0 6 7 30 -1 10 0 21 + 31 UDS_000 5 324 3 3 0 6 7 31 -1 6 0 21 + 97 DS_030 5 322 0 1 3 97 -1 7 0 21 + 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 68 A0 5 -1 6 1 3 68 -1 1 0 21 + 29 DTACK 5 -1 3 1 6 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21 + 65 E 5 330 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 325 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21 + 82 BGACK_030 5 328 7 0 82 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 331 3 0 34 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 298 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21 + 320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21 + 299 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21 + 304 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21 + 306 SM_AMIGA_0_ 3 -1 0 3 0 1 3 -1 -1 4 0 21 + 315 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21 + 305 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 3 0 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 321 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21 + 313 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21 + 307 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21 + 309 inst_CLK_000_D4 3 -1 7 3 0 3 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 7 0 21 + 311 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21 + 316 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 303 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21 + 331 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21 + 308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21 + 310 inst_CLK_000_D3 3 -1 1 2 1 7 -1 -1 1 0 21 + 302 inst_CLK_OUT_PRE_50 3 -1 3 2 3 6 -1 -1 1 0 21 + 301 inst_CLK_000_D5 3 -1 3 2 0 7 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21 + 326 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21 + 322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21 + 332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 324 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21 + 330 RN_E 3 65 6 1 6 65 -1 3 1 21 + 325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 317 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21 + 312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 21 + 300 inst_CLK_000_D2 3 -1 3 1 1 -1 -1 1 0 21 + 297 inst_CLK_OUT_PRE_50_D 3 -1 3 1 6 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 0 7 96 -1 + 95 A_16_ 1 -1 -1 2 0 7 95 -1 + 94 A_18_ 1 -1 -1 2 0 7 94 -1 + 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 58 A_17_ 1 -1 -1 2 0 7 58 -1 + 57 FC_1_ 1 -1 -1 2 0 7 57 -1 + 56 FC_0_ 1 -1 -1 2 0 7 56 -1 + 27 BGACK_000 1 -1 -1 2 0 7 27 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +101 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 322 7 4 0 3 6 7 81 -1 4 0 21 + 32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21 + 30 LDS_000 5 326 3 3 0 6 7 30 -1 10 0 21 + 31 UDS_000 5 325 3 3 0 6 7 31 -1 6 0 21 + 97 DS_030 5 324 0 1 3 97 -1 7 0 21 + 80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 68 A0 5 -1 6 1 3 68 -1 1 0 21 + 29 DTACK 5 -1 3 1 6 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 334 3 0 33 -1 6 0 21 + 65 E 5 332 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 328 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 327 1 0 6 -1 3 0 21 + 82 BGACK_030 5 330 7 0 82 -1 2 0 21 + 77 FPU_CS 5 331 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 333 3 0 34 -1 2 0 21 + 28 BG_000 5 329 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 330 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 322 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21 + 302 SM_AMIGA_1_ 3 -1 6 4 0 3 6 7 -1 -1 3 0 21 + 306 inst_CLK_000_D4 3 -1 1 4 0 3 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21 + 297 inst_CLK_000_D0 3 -1 3 4 1 3 6 7 -1 -1 1 0 21 + 301 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21 + 303 SM_AMIGA_0_ 3 -1 6 3 1 3 6 -1 -1 4 0 21 + 331 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 323 RN_AS_000 3 32 3 3 1 3 6 32 -1 2 0 21 + 304 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21 + 300 inst_CLK_000_D5 3 -1 3 3 0 6 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 7 0 21 + 308 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21 + 318 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 315 inst_CLK_OUT_PRE_33 3 -1 1 2 1 6 -1 -1 4 0 21 + 317 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 309 SM_AMIGA_3_ 3 -1 1 2 1 6 -1 -1 3 0 21 + 333 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21 + 314 SM_AMIGA_4_ 3 -1 3 2 1 3 -1 -1 2 0 21 + 312 CLK_CNT_P_0_ 3 -1 7 2 1 7 -1 -1 2 0 21 + 310 CLK_CNT_N_0_ 3 -1 1 2 0 1 -1 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21 + 313 CLK_CNT_P_1_ 3 -1 7 2 1 7 -1 -1 1 0 21 + 299 inst_CLK_000_D2 3 -1 3 2 1 7 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21 + 326 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21 + 324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21 + 334 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 325 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21 + 332 RN_E 3 65 6 1 6 65 -1 3 1 21 + 328 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 327 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 319 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21 + 316 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 21 + 329 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 305 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21 + 311 CLK_CNT_N_1_ 3 -1 0 1 1 -1 -1 1 0 21 + 307 inst_CLK_000_D3 3 -1 7 1 1 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 0 7 96 -1 + 95 A_16_ 1 -1 -1 2 0 7 95 -1 + 94 A_18_ 1 -1 -1 2 0 7 94 -1 + 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 58 A_17_ 1 -1 -1 2 0 7 58 -1 + 57 FC_1_ 1 -1 -1 2 0 7 57 -1 + 56 FC_0_ 1 -1 -1 2 0 7 56 -1 + 27 BGACK_000 1 -1 -1 2 0 7 27 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 320 7 4 0 3 6 7 81 -1 4 0 21 + 32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21 + 30 LDS_000 5 326 3 3 0 6 7 30 -1 10 0 21 + 31 UDS_000 5 324 3 3 0 6 7 31 -1 6 0 21 + 97 DS_030 5 322 0 1 3 97 -1 7 0 21 + 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 68 A0 5 -1 6 1 3 68 -1 1 0 21 + 29 DTACK 5 -1 3 1 6 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21 + 65 E 5 330 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 325 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 323 1 0 6 -1 3 0 21 + 82 BGACK_030 5 328 7 0 82 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 331 3 0 34 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 298 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21 + 320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21 + 299 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21 + 304 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21 + 306 SM_AMIGA_0_ 3 -1 0 3 0 1 3 -1 -1 4 0 21 + 315 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21 + 305 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 3 0 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 321 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21 + 313 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21 + 307 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21 + 309 inst_CLK_000_D4 3 -1 7 3 0 3 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 7 0 21 + 311 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21 + 316 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 303 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21 + 331 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21 + 308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21 + 310 inst_CLK_000_D3 3 -1 1 2 1 7 -1 -1 1 0 21 + 302 inst_CLK_OUT_PRE_50 3 -1 3 2 3 6 -1 -1 1 0 21 + 301 inst_CLK_000_D5 3 -1 3 2 0 7 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21 + 326 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21 + 322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21 + 332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 324 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21 + 330 RN_E 3 65 6 1 6 65 -1 3 1 21 + 325 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 323 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 317 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21 + 312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 21 + 300 inst_CLK_000_D2 3 -1 3 1 1 -1 -1 1 0 21 + 297 inst_CLK_OUT_PRE_50_D 3 -1 3 1 6 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 0 7 96 -1 + 95 A_16_ 1 -1 -1 2 0 7 95 -1 + 94 A_18_ 1 -1 -1 2 0 7 94 -1 + 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 58 A_17_ 1 -1 -1 2 0 7 58 -1 + 57 FC_1_ 1 -1 -1 2 0 7 57 -1 + 56 FC_0_ 1 -1 -1 2 0 7 56 -1 + 27 BGACK_000 1 -1 -1 2 0 7 27 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 320 7 4 0 3 6 7 81 -1 4 0 21 + 32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21 + 30 LDS_000 5 325 3 3 0 6 7 30 -1 10 0 21 + 31 UDS_000 5 323 3 3 0 6 7 31 -1 6 0 21 + 97 DS_030 5 322 0 1 3 97 -1 7 0 21 + 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 68 A0 5 -1 6 1 3 68 -1 1 0 21 + 29 DTACK 5 -1 3 1 6 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21 + 65 E 5 330 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 326 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 324 1 0 6 -1 3 0 21 + 82 BGACK_030 5 328 7 0 82 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 331 3 0 34 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 298 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21 + 320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21 + 299 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21 + 304 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21 + 306 SM_AMIGA_0_ 3 -1 0 3 0 1 3 -1 -1 4 0 21 + 315 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21 + 305 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 3 0 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 321 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21 + 313 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21 + 307 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21 + 309 inst_CLK_000_D4 3 -1 7 3 0 3 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 8 0 21 + 311 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21 + 316 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 314 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 303 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21 + 331 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21 + 308 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21 + 310 inst_CLK_000_D3 3 -1 1 2 1 7 -1 -1 1 0 21 + 302 inst_CLK_OUT_PRE_50 3 -1 3 2 3 6 -1 -1 1 0 21 + 301 inst_CLK_000_D5 3 -1 3 2 0 7 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21 + 325 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21 + 322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21 + 332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21 + 330 RN_E 3 65 6 1 6 65 -1 3 1 21 + 326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 324 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 317 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21 + 312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 3 0 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 6 1 6 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 6 1 6 -1 -1 2 0 21 + 300 inst_CLK_000_D2 3 -1 3 1 1 -1 -1 1 0 21 + 297 inst_CLK_OUT_PRE_50_D 3 -1 3 1 6 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 0 7 96 -1 + 95 A_16_ 1 -1 -1 2 0 7 95 -1 + 94 A_18_ 1 -1 -1 2 0 7 94 -1 + 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 58 A_17_ 1 -1 -1 2 0 7 58 -1 + 57 FC_1_ 1 -1 -1 2 0 7 57 -1 + 56 FC_0_ 1 -1 -1 2 0 7 56 -1 + 27 BGACK_000 1 -1 -1 2 0 7 27 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 81 AS_030 5 321 7 4 0 3 6 7 81 -1 4 0 21 + 32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21 + 30 LDS_000 5 326 3 3 0 6 7 30 -1 10 0 21 + 31 UDS_000 5 325 3 3 0 6 7 31 -1 6 0 21 + 97 DS_030 5 324 0 1 3 97 -1 7 0 21 + 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 68 A0 5 -1 6 1 3 68 -1 1 0 21 + 29 DTACK 5 -1 3 1 6 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21 + 65 E 5 330 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 322 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 320 1 0 6 -1 3 0 21 + 82 BGACK_030 5 328 7 0 82 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 331 3 0 34 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21 + 309 inst_CLK_000_D4 3 -1 1 4 0 3 6 7 -1 -1 1 0 21 + 299 inst_CLK_000_D1 3 -1 6 4 1 3 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D0 3 -1 3 4 1 3 6 7 -1 -1 1 0 21 + 304 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21 + 306 SM_AMIGA_0_ 3 -1 7 3 1 3 7 -1 -1 4 0 21 + 305 SM_AMIGA_1_ 3 -1 7 3 0 3 7 -1 -1 3 0 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 323 RN_AS_000 3 32 3 3 1 3 7 32 -1 2 0 21 + 307 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21 + 301 inst_CLK_000_D5 3 -1 3 3 0 6 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 8 0 21 + 316 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 315 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 314 SM_AMIGA_2_ 3 -1 1 2 1 7 -1 -1 3 0 21 + 313 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 21 + 303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21 + 331 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21 + 312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 6 2 1 6 -1 -1 2 0 21 + 302 inst_CLK_OUT_PRE_50 3 -1 6 2 1 6 -1 -1 1 0 21 + 300 inst_CLK_000_D2 3 -1 3 2 1 3 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21 + 326 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21 + 324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21 + 332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 325 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21 + 311 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21 + 330 RN_E 3 65 6 1 6 65 -1 3 1 21 + 322 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 320 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 317 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 308 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21 + 310 inst_CLK_000_D3 3 -1 3 1 1 -1 -1 1 0 21 + 297 inst_CLK_OUT_PRE_50_D 3 -1 1 1 1 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 0 7 96 -1 + 95 A_16_ 1 -1 -1 2 0 7 95 -1 + 94 A_18_ 1 -1 -1 2 0 7 94 -1 + 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 58 A_17_ 1 -1 -1 2 0 7 58 -1 + 57 FC_1_ 1 -1 -1 2 0 7 57 -1 + 56 FC_0_ 1 -1 -1 2 0 7 56 -1 + 27 BGACK_000 1 -1 -1 2 0 7 27 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21 + 30 LDS_000 5 324 3 3 0 6 7 30 -1 10 0 21 + 31 UDS_000 5 323 3 3 0 6 7 31 -1 6 0 21 + 81 AS_030 5 320 7 3 1 3 7 81 -1 4 0 21 + 97 DS_030 5 322 0 1 3 97 -1 7 0 21 + 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 68 A0 5 -1 6 1 3 68 -1 1 0 21 + 29 DTACK 5 -1 3 1 1 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21 + 65 E 5 330 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 326 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 325 1 0 6 -1 3 0 21 + 82 BGACK_030 5 328 7 0 82 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 331 3 0 34 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 298 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21 + 320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21 + 305 SM_AMIGA_1_ 3 -1 0 4 0 3 6 7 -1 -1 3 0 21 + 309 inst_CLK_000_D4 3 -1 7 4 0 3 6 7 -1 -1 1 0 21 + 316 cpu_est_1_ 3 -1 6 3 1 3 6 -1 -1 4 0 21 + 306 SM_AMIGA_0_ 3 -1 6 3 3 6 7 -1 -1 4 0 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 321 RN_AS_000 3 32 3 3 3 6 7 32 -1 2 0 21 + 301 inst_CLK_000_D5 3 -1 7 3 0 6 7 -1 -1 1 0 21 + 299 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21 + 304 SM_AMIGA_7_ 3 -1 7 2 3 7 -1 -1 5 0 21 + 330 RN_E 3 65 6 2 1 6 65 -1 3 1 21 + 315 cpu_est_0_ 3 -1 6 2 3 6 -1 -1 3 0 21 + 314 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21 + 312 SM_AMIGA_3_ 3 -1 6 2 1 6 -1 -1 3 0 21 + 303 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21 + 331 RN_VMA 3 34 3 2 1 3 34 -1 2 0 21 + 313 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21 + 307 SM_AMIGA_6_ 3 -1 7 2 3 7 -1 -1 2 0 21 + 295 inst_VPA_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21 + 294 inst_DTACK_SYNC 3 -1 1 2 1 6 -1 -1 2 0 21 + 302 inst_CLK_OUT_PRE_50 3 -1 1 2 1 6 -1 -1 1 0 21 + 296 inst_VPA_D 3 -1 1 2 1 3 -1 -1 1 0 21 + 324 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21 + 293 inst_AS_030_000_SYNC 3 -1 7 1 7 -1 -1 8 0 21 + 322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21 + 332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21 + 311 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21 + 326 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 325 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 317 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 308 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21 + 310 inst_CLK_000_D3 3 -1 7 1 7 -1 -1 1 0 21 + 300 inst_CLK_000_D2 3 -1 7 1 7 -1 -1 1 0 21 + 297 inst_CLK_OUT_PRE_50_D 3 -1 6 1 6 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 10 CLK_000 1 -1 -1 2 1 3 10 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +97 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21 + 30 LDS_000 5 324 3 3 0 6 7 30 -1 10 0 21 + 31 UDS_000 5 323 3 3 0 6 7 31 -1 6 0 21 + 81 AS_030 5 320 7 3 0 3 7 81 -1 4 0 21 + 97 DS_030 5 322 0 1 3 97 -1 7 0 21 + 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 68 A0 5 -1 6 1 3 68 -1 1 0 21 + 29 DTACK 5 -1 3 1 6 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 6 0 21 + 65 E 5 328 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 317 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 316 1 0 6 -1 3 0 21 + 82 BGACK_030 5 326 7 0 82 -1 2 0 21 + 77 FPU_CS 5 327 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 329 3 0 34 -1 2 0 21 + 28 BG_000 5 325 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 326 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21 + 303 SM_AMIGA_1_ 3 -1 7 4 0 1 3 7 -1 -1 3 0 21 + 307 inst_CLK_000_D4 3 -1 0 4 0 1 3 7 -1 -1 1 0 21 + 297 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21 + 296 inst_CLK_000_D0 3 -1 6 4 1 3 6 7 -1 -1 1 0 21 + 302 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21 + 327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 305 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21 + 299 inst_CLK_000_D5 3 -1 3 3 0 1 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 8 0 21 + 309 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21 + 314 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 304 SM_AMIGA_0_ 3 -1 1 2 1 3 -1 -1 4 0 21 + 313 cpu_est_0_ 3 -1 3 2 3 6 -1 -1 3 0 21 + 312 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 301 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21 + 329 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21 + 321 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21 + 310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21 + 308 inst_CLK_000_D3 3 -1 1 2 0 1 -1 -1 1 0 21 + 300 inst_CLK_OUT_PRE_50 3 -1 7 2 1 7 -1 -1 1 0 21 + 294 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21 + 324 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21 + 322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21 + 330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 323 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21 + 311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21 + 328 RN_E 3 65 6 1 6 65 -1 3 1 21 + 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 315 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21 + 325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 306 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21 + 298 inst_CLK_000_D2 3 -1 3 1 1 -1 -1 1 0 21 + 295 inst_CLK_OUT_PRE_50_D 3 -1 7 1 1 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 0 7 96 -1 + 95 A_16_ 1 -1 -1 2 0 7 95 -1 + 94 A_18_ 1 -1 -1 2 0 7 94 -1 + 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 58 A_17_ 1 -1 -1 2 0 7 58 -1 + 57 FC_1_ 1 -1 -1 2 0 7 57 -1 + 56 FC_0_ 1 -1 -1 2 0 7 56 -1 + 27 BGACK_000 1 -1 -1 2 0 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 6 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +98 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21 + 30 LDS_000 5 325 3 3 0 6 7 30 -1 10 0 21 + 31 UDS_000 5 324 3 3 0 6 7 31 -1 6 0 21 + 81 AS_030 5 321 7 3 0 3 7 81 -1 4 0 21 + 97 DS_030 5 323 0 1 3 97 -1 7 0 21 + 80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 68 A0 5 -1 6 1 3 68 -1 1 0 21 + 29 DTACK 5 -1 3 1 0 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21 + 65 E 5 329 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 319 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 318 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 317 1 0 6 -1 3 0 21 + 82 BGACK_030 5 327 7 0 82 -1 2 0 21 + 77 FPU_CS 5 328 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 330 3 0 34 -1 2 0 21 + 28 BG_000 5 326 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21 + 304 SM_AMIGA_1_ 3 -1 7 4 0 1 3 7 -1 -1 3 0 21 + 308 inst_CLK_000_D4 3 -1 1 4 0 1 3 7 -1 -1 1 0 21 + 296 inst_CLK_000_D0 3 -1 3 4 1 3 6 7 -1 -1 1 0 21 + 303 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21 + 314 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21 + 328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 306 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21 + 299 inst_CLK_000_D5 3 -1 3 3 0 1 7 -1 -1 1 0 21 + 297 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 8 0 21 + 315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 305 SM_AMIGA_0_ 3 -1 1 2 1 3 -1 -1 4 0 21 + 313 SM_AMIGA_2_ 3 -1 6 2 6 7 -1 -1 3 0 21 + 302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21 + 330 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21 + 322 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21 + 311 SM_AMIGA_4_ 3 -1 6 2 3 6 -1 -1 2 0 21 + 307 SM_AMIGA_5_ 3 -1 3 2 3 6 -1 -1 2 0 21 + 301 inst_CLK_OUT_PRE_50 3 -1 3 2 1 3 -1 -1 1 0 21 + 298 inst_CLK_000_D2 3 -1 7 2 1 7 -1 -1 1 0 21 + 294 inst_VPA_D 3 -1 6 2 3 6 -1 -1 1 0 21 + 325 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21 + 323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21 + 331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 324 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21 + 310 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21 + 312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21 + 329 RN_E 3 65 6 1 6 65 -1 3 1 21 + 319 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 318 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 317 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 316 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21 + 326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 309 inst_CLK_000_D3 3 -1 7 1 1 -1 -1 1 0 21 + 300 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21 + 295 inst_CLK_OUT_PRE_50_D 3 -1 3 1 1 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 0 7 96 -1 + 95 A_16_ 1 -1 -1 2 0 7 95 -1 + 94 A_18_ 1 -1 -1 2 0 7 94 -1 + 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 58 A_17_ 1 -1 -1 2 0 7 58 -1 + 57 FC_1_ 1 -1 -1 2 0 7 57 -1 + 56 FC_0_ 1 -1 -1 2 0 7 56 -1 + 27 BGACK_000 1 -1 -1 2 0 7 27 -1 + 10 CLK_000 1 -1 -1 2 3 6 10 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 6 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +99 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 32 AS_000 5 323 3 4 0 4 6 7 32 -1 2 0 21 + 30 LDS_000 5 326 3 3 0 6 7 30 -1 10 0 21 + 31 UDS_000 5 325 3 3 0 6 7 31 -1 6 0 21 + 81 AS_030 5 322 7 3 0 3 7 81 -1 4 0 21 + 97 DS_030 5 324 0 1 3 97 -1 7 0 21 + 80 DSACK_1_ 5 321 7 1 3 80 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 68 A0 5 -1 6 1 3 68 -1 1 0 21 + 29 DTACK 5 -1 3 1 6 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 332 3 0 33 -1 6 0 21 + 65 E 5 330 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 320 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21 + 82 BGACK_030 5 328 7 0 82 -1 2 0 21 + 77 FPU_CS 5 329 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 331 3 0 34 -1 2 0 21 + 28 BG_000 5 327 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 304 SM_AMIGA_1_ 3 -1 6 5 0 1 3 6 7 -1 -1 3 0 21 + 328 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 322 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21 + 310 inst_CLK_000_D5 3 -1 3 4 0 1 6 7 -1 -1 1 0 21 + 299 inst_CLK_000_D6 3 -1 0 4 0 1 6 7 -1 -1 1 0 21 + 297 inst_CLK_000_D1 3 -1 3 4 1 3 6 7 -1 -1 1 0 21 + 296 inst_CLK_000_D0 3 -1 3 4 1 3 6 7 -1 -1 1 0 21 + 303 SM_AMIGA_7_ 3 -1 1 3 0 1 3 -1 -1 5 0 21 + 316 cpu_est_1_ 3 -1 7 3 3 6 7 -1 -1 4 0 21 + 315 cpu_est_0_ 3 -1 3 3 3 6 7 -1 -1 3 0 21 + 329 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 306 SM_AMIGA_6_ 3 -1 1 3 0 1 3 -1 -1 2 0 21 + 301 inst_CLK_OUT_PRE_50 3 -1 7 3 0 1 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 0 2 0 1 -1 -1 8 0 21 + 311 inst_CLK_030_H 3 -1 7 2 0 7 -1 -1 5 0 21 + 305 SM_AMIGA_0_ 3 -1 1 2 1 3 -1 -1 4 0 21 + 330 RN_E 3 65 6 2 6 7 65 -1 3 1 21 + 317 cpu_est_2_ 3 -1 7 2 6 7 -1 -1 3 1 21 + 302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21 + 331 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21 + 323 RN_AS_000 3 32 3 2 1 3 32 -1 2 0 21 + 312 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21 + 298 inst_CLK_000_D2 3 -1 3 2 1 6 -1 -1 1 0 21 + 294 inst_VPA_D 3 -1 3 2 3 6 -1 -1 1 0 21 + 326 RN_LDS_000 3 30 3 1 3 30 -1 10 0 21 + 324 RN_DS_030 3 97 0 1 0 97 -1 7 0 21 + 332 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 325 RN_UDS_000 3 31 3 1 3 31 -1 6 0 21 + 313 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21 + 320 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 314 SM_AMIGA_2_ 3 -1 6 1 6 -1 -1 3 0 21 + 327 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 321 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 307 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21 + 309 inst_CLK_000_D3 3 -1 6 1 1 -1 -1 1 0 21 + 308 inst_CLK_000_D4 3 -1 1 1 3 -1 -1 1 0 21 + 300 inst_DTACK_D0 3 -1 6 1 6 -1 -1 1 0 21 + 295 inst_CLK_OUT_PRE_50_D 3 -1 0 1 1 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 96 A_19_ 1 -1 -1 2 0 7 96 -1 + 95 A_16_ 1 -1 -1 2 0 7 95 -1 + 94 A_18_ 1 -1 -1 2 0 7 94 -1 + 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 58 A_17_ 1 -1 -1 2 0 7 58 -1 + 57 FC_1_ 1 -1 -1 2 0 7 57 -1 + 56 FC_0_ 1 -1 -1 2 0 7 56 -1 + 27 BGACK_000 1 -1 -1 2 0 7 27 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 3 35 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +97 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 32 AS_000 5 320 3 4 0 4 6 7 32 -1 2 0 21 + 30 LDS_000 5 323 3 3 0 6 7 30 -1 11 0 21 + 31 UDS_000 5 322 3 3 0 6 7 31 -1 7 0 21 + 81 AS_030 5 319 7 2 3 7 81 -1 4 0 21 + 97 DS_030 5 321 0 1 3 97 -1 7 0 21 + 80 DSACK_1_ 5 318 7 1 3 80 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 68 A0 5 -1 6 1 3 68 -1 1 0 21 + 29 DTACK 5 -1 3 1 7 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 329 3 0 33 -1 6 0 21 + 65 E 5 327 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 316 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 330 1 0 6 -1 3 0 21 + 82 BGACK_030 5 325 7 0 82 -1 2 0 21 + 77 FPU_CS 5 326 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 328 3 0 34 -1 2 0 21 + 28 BG_000 5 324 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 325 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 296 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21 + 319 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21 + 304 SM_AMIGA_1_ 3 -1 0 4 0 1 3 7 -1 -1 3 0 21 + 306 SM_AMIGA_6_ 3 -1 7 4 0 3 6 7 -1 -1 2 0 21 + 299 inst_CLK_000_D4 3 -1 7 4 0 1 3 7 -1 -1 1 0 21 + 303 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21 + 305 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 4 0 21 + 313 cpu_est_0_ 3 -1 7 3 3 6 7 -1 -1 3 0 21 + 326 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 320 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21 + 308 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21 + 297 inst_CLK_000_D1 3 -1 3 3 1 6 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21 + 314 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 312 SM_AMIGA_2_ 3 -1 6 2 0 6 -1 -1 3 0 21 + 302 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21 + 328 RN_VMA 3 34 3 2 3 6 34 -1 2 0 21 + 310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21 + 307 SM_AMIGA_5_ 3 -1 6 2 3 6 -1 -1 2 0 21 + 298 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21 + 294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21 + 323 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21 + 322 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21 + 321 RN_DS_030 3 97 0 1 0 97 -1 7 0 21 + 329 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21 + 311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21 + 330 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 327 RN_E 3 65 6 1 6 65 -1 3 1 21 + 317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 316 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 315 cpu_est_2_ 3 -1 6 1 6 -1 -1 3 1 21 + 324 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 318 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 301 inst_CLK_OUT_PRE_50 3 -1 1 1 1 -1 -1 1 0 21 + 300 inst_DTACK_D0 3 -1 7 1 6 -1 -1 1 0 21 + 295 inst_CLK_OUT_PRE_50_D 3 -1 1 1 1 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 10 CLK_000 1 -1 -1 1 3 10 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +97 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 32 AS_000 5 321 3 4 0 4 6 7 32 -1 2 0 21 + 30 LDS_000 5 324 3 3 0 6 7 30 -1 11 0 21 + 31 UDS_000 5 323 3 3 0 6 7 31 -1 7 0 21 + 81 AS_030 5 320 7 2 3 7 81 -1 4 0 21 + 97 DS_030 5 322 0 1 3 97 -1 7 0 21 + 80 DSACK_1_ 5 319 7 1 3 80 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 68 A0 5 -1 6 1 3 68 -1 1 0 21 + 29 DTACK 5 -1 3 1 1 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 330 3 0 33 -1 6 0 21 + 65 E 5 328 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 318 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 317 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 316 1 0 6 -1 3 0 21 + 82 BGACK_030 5 326 7 0 82 -1 2 0 21 + 77 FPU_CS 5 327 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 329 3 0 34 -1 2 1 21 + 28 BG_000 5 325 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 326 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 296 inst_CLK_000_D0 3 -1 1 5 0 1 3 6 7 -1 -1 1 0 21 + 320 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21 + 303 SM_AMIGA_1_ 3 -1 1 4 0 1 3 7 -1 -1 3 0 21 + 299 inst_CLK_000_D4 3 -1 7 4 0 1 3 7 -1 -1 1 0 21 + 297 inst_CLK_000_D1 3 -1 3 4 0 1 6 7 -1 -1 1 0 21 + 309 SM_AMIGA_7_ 3 -1 1 3 1 3 7 -1 -1 5 0 21 + 314 cpu_est_1_ 3 -1 0 3 0 3 6 -1 -1 4 0 21 + 304 SM_AMIGA_0_ 3 -1 0 3 0 1 3 -1 -1 4 0 21 + 328 RN_E 3 65 6 3 0 3 6 65 -1 3 1 21 + 315 cpu_est_2_ 3 -1 6 3 0 3 6 -1 -1 3 1 21 + 313 cpu_est_0_ 3 -1 0 3 0 3 6 -1 -1 3 0 21 + 327 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 321 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21 + 305 SM_AMIGA_6_ 3 -1 7 3 1 3 7 -1 -1 2 0 21 + 307 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 7 2 1 7 -1 -1 8 0 21 + 308 inst_CLK_030_H 3 -1 6 2 0 6 -1 -1 5 0 21 + 312 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21 + 302 inst_CLK_OUT_PRE_25 3 -1 6 2 1 6 -1 -1 3 0 21 + 329 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21 + 310 SM_AMIGA_4_ 3 -1 3 2 3 6 -1 -1 2 0 21 + 301 inst_CLK_OUT_PRE_50 3 -1 7 2 6 7 -1 -1 1 0 21 + 298 inst_CLK_000_D2 3 -1 7 2 1 7 -1 -1 1 0 21 + 294 inst_VPA_D 3 -1 1 2 3 6 -1 -1 1 0 21 + 324 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21 + 323 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21 + 322 RN_DS_030 3 97 0 1 0 97 -1 7 0 21 + 330 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 311 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21 + 318 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 317 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 316 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 325 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 319 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 306 SM_AMIGA_5_ 3 -1 3 1 3 -1 -1 2 0 21 + 300 inst_DTACK_D0 3 -1 1 1 6 -1 -1 1 0 21 + 295 inst_CLK_OUT_PRE_50_D 3 -1 7 1 6 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 13 nEXP_SPACE 1 -1 -1 6 0 1 3 4 6 7 13 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 63 CLK_030 1 -1 -1 3 0 6 7 63 -1 + 10 CLK_000 1 -1 -1 2 1 3 10 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 1 35 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 + 5 A_29_ 1 -1 -1 1 4 5 -1 + 4 A_30_ 1 -1 -1 1 4 4 -1 + 3 A_31_ 1 -1 -1 1 4 3 -1 +98 "number of signals after reading design file" + +"sig sig sig pair blk fan PT xor sync" +"num name type sig num out pin node cnt PT type" +"--- ---- ---- ---- --- --- --- ---- --- --- ----" + + 32 AS_000 5 322 3 4 0 4 6 7 32 -1 2 0 21 + 30 LDS_000 5 325 3 3 0 6 7 30 -1 11 0 21 + 31 UDS_000 5 324 3 3 0 6 7 31 -1 7 0 21 + 81 AS_030 5 321 7 2 3 7 81 -1 4 0 21 + 97 DS_030 5 323 0 1 3 97 -1 7 0 21 + 80 DSACK_1_ 5 320 7 1 3 80 -1 2 0 21 + 78 SIZE_1_ 5 -1 7 1 3 78 -1 2 0 21 + 69 SIZE_0_ 5 -1 6 1 3 69 -1 1 0 21 + 68 A0 5 -1 6 1 3 68 -1 1 0 21 + 29 DTACK 5 -1 3 1 0 29 -1 1 0 21 + 33 AMIGA_BUS_ENABLE 5 331 3 0 33 -1 6 0 21 + 65 E 5 329 6 0 65 -1 3 1 21 + 8 IPL_030_2_ 5 317 1 0 8 -1 3 0 21 + 7 IPL_030_0_ 5 319 1 0 7 -1 3 0 21 + 6 IPL_030_1_ 5 318 1 0 6 -1 3 0 21 + 82 BGACK_030 5 327 7 0 82 -1 2 0 21 + 77 FPU_CS 5 328 7 0 77 -1 2 0 21 + 47 AMIGA_BUS_DATA_DIR 0 4 0 47 -1 2 0 21 + 34 VMA 5 330 3 0 34 -1 2 1 21 + 28 BG_000 5 326 3 0 28 -1 2 0 21 + 91 AVEC 0 0 0 91 -1 1 0 21 + 79 DSACK_0_ 0 7 0 79 -1 1 0 21 + 64 CLK_DIV_OUT 0 6 0 64 -1 1 0 21 + 46 CIIN 0 4 0 46 -1 1 0 21 + 40 BERR 0 4 0 40 -1 1 0 21 + 21 AVEC_EXP 0 2 0 21 -1 1 0 21 + 19 AMIGA_BUS_ENABLE_LOW 0 2 0 19 -1 1 0 21 + 9 CLK_EXP 0 1 0 9 -1 1 0 21 + 2 RESET 0 1 0 2 -1 1 0 21 + 327 RN_BGACK_030 3 82 7 5 0 3 4 6 7 82 -1 2 0 21 + 297 inst_CLK_000_D0 3 -1 3 5 0 1 3 6 7 -1 -1 1 0 21 + 321 RN_AS_030 3 81 7 4 0 3 6 7 81 -1 4 0 21 + 310 SM_AMIGA_7_ 3 -1 0 3 0 3 7 -1 -1 5 0 21 + 305 SM_AMIGA_0_ 3 -1 1 3 0 1 3 -1 -1 4 0 21 + 314 cpu_est_0_ 3 -1 1 3 1 3 6 -1 -1 3 0 21 + 304 SM_AMIGA_1_ 3 -1 1 3 1 3 7 -1 -1 3 0 21 + 328 RN_FPU_CS 3 77 7 3 2 4 7 77 -1 2 0 21 + 322 RN_AS_000 3 32 3 3 0 1 3 32 -1 2 0 21 + 311 SM_AMIGA_4_ 3 -1 1 3 1 3 6 -1 -1 2 0 21 + 306 SM_AMIGA_6_ 3 -1 7 3 0 3 7 -1 -1 2 0 21 + 308 inst_CLK_000_D3 3 -1 7 3 0 1 7 -1 -1 1 0 21 + 302 inst_CLK_OUT_PRE_50 3 -1 6 3 0 1 6 -1 -1 1 0 21 + 300 inst_CLK_000_D4 3 -1 7 3 1 3 7 -1 -1 1 0 21 + 298 inst_CLK_000_D1 3 -1 7 3 1 6 7 -1 -1 1 0 21 + 293 inst_AS_030_000_SYNC 3 -1 7 2 0 7 -1 -1 8 0 21 + 315 cpu_est_1_ 3 -1 6 2 3 6 -1 -1 4 0 21 + 329 RN_E 3 65 6 2 3 6 65 -1 3 1 21 + 316 cpu_est_2_ 3 -1 6 2 3 6 -1 -1 3 1 21 + 313 SM_AMIGA_2_ 3 -1 6 2 1 6 -1 -1 3 0 21 + 303 inst_CLK_OUT_PRE_25 3 -1 1 2 1 6 -1 -1 3 0 21 + 330 RN_VMA 3 34 3 2 3 6 34 -1 2 1 21 + 307 SM_AMIGA_5_ 3 -1 3 2 1 3 -1 -1 2 0 21 + 299 inst_CLK_000_D2 3 -1 7 2 0 7 -1 -1 1 0 21 + 295 inst_VPA_D 3 -1 7 2 3 6 -1 -1 1 0 21 + 325 RN_LDS_000 3 30 3 1 3 30 -1 11 0 21 + 324 RN_UDS_000 3 31 3 1 3 31 -1 7 0 21 + 323 RN_DS_030 3 97 0 1 0 97 -1 7 0 21 + 331 RN_AMIGA_BUS_ENABLE 3 33 3 1 3 33 -1 6 0 21 + 309 inst_CLK_030_H 3 -1 0 1 0 -1 -1 5 0 21 + 312 SM_AMIGA_3_ 3 -1 6 1 6 -1 -1 4 0 21 + 319 RN_IPL_030_0_ 3 7 1 1 1 7 -1 3 0 21 + 318 RN_IPL_030_1_ 3 6 1 1 1 6 -1 3 0 21 + 317 RN_IPL_030_2_ 3 8 1 1 1 8 -1 3 0 21 + 326 RN_BG_000 3 28 3 1 3 28 -1 2 0 21 + 320 RN_DSACK_1_ 3 80 7 1 7 80 -1 2 0 21 + 301 inst_DTACK_D0 3 -1 0 1 6 -1 -1 1 0 21 + 296 inst_CLK_OUT_PRE_50_D 3 -1 0 1 1 -1 -1 1 0 21 + 294 inst_BGACK_030_INT_D 3 -1 3 1 3 -1 -1 1 0 21 + 60 CLK_OSZI 9 -1 0 60 -1 + 85 RST 1 -1 -1 5 0 1 3 6 7 85 -1 + 13 nEXP_SPACE 1 -1 -1 5 0 3 4 6 7 13 -1 + 70 RW 1 -1 -1 3 0 3 4 70 -1 + 63 CLK_030 1 -1 -1 2 0 7 63 -1 + 96 A_19_ 1 -1 -1 1 7 96 -1 + 95 A_16_ 1 -1 -1 1 7 95 -1 + 94 A_18_ 1 -1 -1 1 7 94 -1 + 93 A_21_ 1 -1 -1 1 4 93 -1 + 92 A_20_ 1 -1 -1 1 4 92 -1 + 84 A_22_ 1 -1 -1 1 4 84 -1 + 83 A_23_ 1 -1 -1 1 4 83 -1 + 67 IPL_2_ 1 -1 -1 1 1 67 -1 + 66 IPL_0_ 1 -1 -1 1 1 66 -1 + 58 A_17_ 1 -1 -1 1 7 58 -1 + 57 FC_1_ 1 -1 -1 1 7 57 -1 + 56 FC_0_ 1 -1 -1 1 7 56 -1 + 55 IPL_1_ 1 -1 -1 1 1 55 -1 + 35 VPA 1 -1 -1 1 7 35 -1 + 27 BGACK_000 1 -1 -1 1 7 27 -1 + 20 BG_030 1 -1 -1 1 3 20 -1 + 18 A_24_ 1 -1 -1 1 4 18 -1 + 17 A_25_ 1 -1 -1 1 4 17 -1 + 16 A_26_ 1 -1 -1 1 4 16 -1 + 15 A_27_ 1 -1 -1 1 4 15 -1 + 14 A_28_ 1 -1 -1 1 4 14 -1 10 CLK_000 1 -1 -1 1 3 10 -1 5 A_29_ 1 -1 -1 1 4 5 -1 4 A_30_ 1 -1 -1 1 4 4 -1 diff --git a/Logic/68030_tk.plc b/Logic/68030_tk.plc index f180db5..4b5acb4 100644 --- a/Logic/68030_tk.plc +++ b/Logic/68030_tk.plc @@ -8,110 +8,110 @@ ; Source file 68030_tk.tt4 ; FITTER-generated Placements. ; DEVICE mach447a -; DATE Sun May 25 21:18:55 2014 +; DATE Wed May 28 21:25:00 2014 -Pin 4 A_31_ -Pin 68 IPL_2_ -Pin 58 FC_1_ -Pin 5 A_30_ -Pin 6 A_29_ -Pin 15 A_28_ -Pin 16 A_27_ -Pin 14 nEXP_SPACE -Pin 17 A_26_ -Pin 41 BERR Comb ; S6=1 S9=1 Pair 200 -Pin 18 A_25_ -Pin 21 BG_030 -Pin 19 A_24_ -Pin 84 A_23_ -Pin 85 A_22_ -Pin 28 BGACK_000 Pin 94 A_21_ -Pin 64 CLK_030 Pin 93 A_20_ -Pin 11 CLK_000 Pin 97 A_19_ -Pin 61 CLK_OSZI Pin 95 A_18_ -Pin 65 CLK_DIV_OUT Reg ; S6=0 S9=1 Pair 247 +Pin 4 A_31_ Pin 59 A_17_ Pin 96 A_16_ -Pin 30 DTACK Comb ; S6=1 S9=1 Pair 173 -Pin 92 AVEC Comb ; S6=1 S9=1 Pair 104 +Pin 68 IPL_2_ Pin 56 IPL_1_ -Pin 22 AVEC_EXP Comb ; S6=1 S9=1 Pair 149 Pin 67 IPL_0_ Pin 80 DSACK_0_ Comb ; S6=1 S9=1 Pair 284 -Pin 36 VPA Pin 57 FC_0_ +Pin 58 FC_1_ +Pin 14 nEXP_SPACE +Pin 41 BERR Comb ; S6=1 S9=1 Pair 200 +Pin 21 BG_030 +Pin 28 BGACK_000 +Pin 64 CLK_030 +Pin 11 CLK_000 +Pin 61 CLK_OSZI +Pin 65 CLK_DIV_OUT Reg ; S6=1 S9=1 Pair 245 +Pin 30 DTACK Comb ; S6=1 S9=1 Pair 173 +Pin 92 AVEC Comb ; S6=1 S9=1 Pair 104 +Pin 22 AVEC_EXP Comb ; S6=1 S9=1 Pair 149 +Pin 36 VPA Pin 86 RST Pin 71 RW Pin 48 AMIGA_BUS_DATA_DIR Comb ; S6=1 S9=1 Pair 197 Pin 20 AMIGA_BUS_ENABLE_LOW Comb ; S6=1 S9=1 Pair 151 Pin 47 CIIN Comb ; S6=1 S9=1 Pair 199 +Pin 5 A_30_ +Pin 6 A_29_ +Pin 15 A_28_ +Pin 16 A_27_ +Pin 17 A_26_ +Pin 18 A_25_ +Pin 19 A_24_ +Pin 84 A_23_ +Pin 85 A_22_ Pin 79 SIZE_1_ Reg ; S6=1 S9=1 Pair 269 Pin 9 IPL_030_2_ Reg ; S6=1 S9=1 Pair 128 -Pin 81 DSACK_1_ Reg ; S6=1 S9=1 Pair 281 -Pin 82 AS_030 Reg ; S6=1 S9=1 Pair 278 -Pin 33 AS_000 Reg ; S6=1 S9=1 Pair 179 -Pin 70 SIZE_0_ Reg ; S6=1 S9=1 Pair 245 -Pin 98 DS_030 Reg ; S6=1 S9=1 Pair 107 -Pin 32 UDS_000 Reg ; S6=1 S9=1 Pair 182 -Pin 31 LDS_000 Reg ; S6=1 S9=1 Pair 188 -Pin 69 A0 Reg ; S6=1 S9=1 Pair 257 -Pin 29 BG_000 Reg ; S6=1 S9=1 Pair 178 -Pin 83 BGACK_030 Reg ; S6=1 S9=1 Pair 275 -Pin 10 CLK_EXP Reg ; S6=0 S9=1 Pair 125 -Pin 78 FPU_CS Reg ; S6=1 S9=1 Pair 271 Pin 7 IPL_030_1_ Reg ; S6=1 S9=1 Pair 134 Pin 8 IPL_030_0_ Reg ; S6=1 S9=1 Pair 131 -Pin 66 E Reg ; S6=0 S9=1 Pair 248 -Pin 35 VMA Reg ; S6=1 S9=1 Pair 175 +Pin 81 DSACK_1_ Reg ; S6=1 S9=1 Pair 286 +Pin 82 AS_030 Reg ; S6=1 S9=1 Pair 278 +Pin 33 AS_000 Reg ; S6=1 S9=1 Pair 181 +Pin 98 DS_030 Reg ; S6=1 S9=1 Pair 109 +Pin 32 UDS_000 Reg ; S6=1 S9=1 Pair 182 +Pin 31 LDS_000 Reg ; S6=1 S9=1 Pair 187 +Pin 69 A0 Reg ; S6=0 S9=1 Pair 257 +Pin 29 BG_000 Reg ; S6=1 S9=1 Pair 175 +Pin 83 BGACK_030 Reg ; S6=1 S9=1 Pair 277 +Pin 10 CLK_EXP Reg ; S6=0 S9=1 Pair 125 +Pin 78 FPU_CS Reg ; S6=1 S9=1 Pair 271 +Pin 66 E Reg ; S6=1 S9=1 Pair 248 +Pin 35 VMA Reg ; S6=1 S9=1 Pair 178 Pin 3 RESET Reg ; S6=0 S9=1 Pair 127 -Pin 34 AMIGA_BUS_ENABLE Reg ; S6=1 S9=1 Pair 176 +Pin 34 AMIGA_BUS_ENABLE Reg ; S6=1 S9=1 Pair 184 +Pin 70 SIZE_0_ Reg ; S6=0 S9=1 Pair 266 Node 173 RN_DTACK Comb ; S6=1 S9=1 Node 269 RN_SIZE_1_ Reg ; S6=1 S9=1 Node 128 RN_IPL_030_2_ Reg ; S6=1 S9=1 -Node 281 RN_DSACK_1_ Reg ; S6=1 S9=1 -Node 278 RN_AS_030 Reg ; S6=1 S9=1 -Node 179 RN_AS_000 Reg ; S6=1 S9=1 -Node 245 RN_SIZE_0_ Reg ; S6=1 S9=1 -Node 107 RN_DS_030 Reg ; S6=1 S9=1 -Node 182 RN_UDS_000 Reg ; S6=1 S9=1 -Node 188 RN_LDS_000 Reg ; S6=1 S9=1 -Node 257 RN_A0 Reg ; S6=1 S9=1 -Node 178 RN_BG_000 Reg ; S6=1 S9=1 -Node 275 RN_BGACK_030 Reg ; S6=1 S9=1 -Node 271 RN_FPU_CS Reg ; S6=1 S9=1 Node 134 RN_IPL_030_1_ Reg ; S6=1 S9=1 Node 131 RN_IPL_030_0_ Reg ; S6=1 S9=1 -Node 248 RN_E Reg ; S6=0 S9=1 -Node 175 RN_VMA Reg ; S6=1 S9=1 -Node 176 RN_AMIGA_BUS_ENABLE Reg ; S6=1 S9=1 -Node 277 inst_AS_030_000_SYNC Reg ; S6=1 S9=1 -Node 136 inst_DTACK_SYNC Reg ; S6=1 S9=1 -Node 133 inst_VPA_SYNC Reg ; S6=1 S9=1 -Node 137 inst_VPA_D Reg ; S6=1 S9=1 -Node 181 inst_CLK_000_D0 Reg ; S6=1 S9=1 -Node 184 inst_CLK_000_D1 Reg ; S6=1 S9=1 -Node 289 inst_CLK_000_D2 Reg ; S6=1 S9=1 -Node 287 inst_CLK_000_D5 Reg ; S6=1 S9=1 -Node 260 inst_CLK_OUT_PRE Reg ; S6=0 S9=1 -Node 274 inst_BGACK_030_INT_D Reg ; S6=1 S9=1 -Node 286 CLK_CNT_P_0_ Reg ; S6=0 S9=1 -Node 190 SM_AMIGA_5_ Reg ; S6=0 S9=1 -Node 254 inst_CLK_000_D4 Reg ; S6=1 S9=1 -Node 103 SM_AMIGA_7_ Reg ; S6=1 S9=1 -Node 280 SM_AMIGA_1_ Reg ; S6=0 S9=1 -Node 106 SM_AMIGA_0_ Reg ; S6=0 S9=1 -Node 251 SM_AMIGA_6_ Reg ; S6=0 S9=1 -Node 262 inst_CLK_000_D3 Reg ; S6=1 S9=1 -Node 259 SM_AMIGA_3_ Reg ; S6=0 S9=1 -Node 187 SM_AMIGA_4_ Reg ; S6=0 S9=1 -Node 256 SM_AMIGA_2_ Reg ; S6=0 S9=1 -Node 272 cpu_est_0_ Reg ; S6=0 S9=1 -Node 253 cpu_est_1_ Reg ; S6=0 S9=1 -Node 130 cpu_est_2_ Reg ; S6=0 S9=1 +Node 286 RN_DSACK_1_ Reg ; S6=1 S9=1 +Node 278 RN_AS_030 Reg ; S6=1 S9=1 +Node 181 RN_AS_000 Reg ; S6=1 S9=1 +Node 109 RN_DS_030 Reg ; S6=1 S9=1 +Node 182 RN_UDS_000 Reg ; S6=1 S9=1 +Node 187 RN_LDS_000 Reg ; S6=1 S9=1 +Node 257 RN_A0 Reg ; S6=0 S9=1 +Node 175 RN_BG_000 Reg ; S6=1 S9=1 +Node 277 RN_BGACK_030 Reg ; S6=1 S9=1 +Node 271 RN_FPU_CS Reg ; S6=1 S9=1 +Node 248 RN_E Reg ; S6=1 S9=1 +Node 178 RN_VMA Reg ; S6=1 S9=1 +Node 184 RN_AMIGA_BUS_ENABLE Reg ; S6=1 S9=1 +Node 266 RN_SIZE_0_ Reg ; S6=0 S9=1 +Node 283 inst_AS_030_000_SYNC Reg ; S6=1 S9=1 +Node 188 inst_BGACK_030_INT_D Reg ; S6=1 S9=1 +Node 290 inst_VPA_D Reg ; S6=1 S9=1 +Node 106 inst_CLK_OUT_PRE_50_D Reg ; S6=0 S9=1 +Node 191 inst_CLK_000_D0 Reg ; S6=1 S9=1 +Node 274 inst_CLK_000_D1 Reg ; S6=1 S9=1 +Node 287 inst_CLK_000_D2 Reg ; S6=1 S9=1 +Node 281 inst_CLK_000_D4 Reg ; S6=1 S9=1 +Node 103 inst_DTACK_D0 Reg ; S6=1 S9=1 +Node 247 inst_CLK_OUT_PRE_50 Reg ; S6=1 S9=1 +Node 139 inst_CLK_OUT_PRE_25 Reg ; S6=0 S9=1 +Node 140 SM_AMIGA_1_ Reg ; S6=0 S9=1 +Node 133 SM_AMIGA_0_ Reg ; S6=0 S9=1 +Node 280 SM_AMIGA_6_ Reg ; S6=0 S9=1 +Node 176 SM_AMIGA_5_ Reg ; S6=0 S9=1 +Node 272 inst_CLK_000_D3 Reg ; S6=1 S9=1 +Node 101 inst_CLK_030_H Reg ; S6=1 S9=1 +Node 118 SM_AMIGA_7_ Reg ; S6=1 S9=1 +Node 136 SM_AMIGA_4_ Reg ; S6=0 S9=1 +Node 256 SM_AMIGA_3_ Reg ; S6=1 S9=1 +Node 254 SM_AMIGA_2_ Reg ; S6=1 S9=1 +Node 137 cpu_est_0_ Reg ; S6=0 S9=1 +Node 251 cpu_est_1_ Reg ; S6=1 S9=1 +Node 253 cpu_est_2_ Reg ; S6=1 S9=1 ; Unused Pins & Nodes ; -> None Found. diff --git a/Logic/68030_tk.prd b/Logic/68030_tk.prd index 12008d3..0a03a77 100644 --- a/Logic/68030_tk.prd +++ b/Logic/68030_tk.prd @@ -5,8 +5,8 @@ |--------------------------------------------| -Start: Sun May 25 21:18:55 2014 -End : Sun May 25 21:18:55 2014 $$$ Elapsed time: 00:00:00 +Start: Wed May 28 21:24:59 2014 +End : Wed May 28 21:25:00 2014 $$$ Elapsed time: 00:00:01 =========================================================================== Part [C:/Program Files (x86)/ispLever/ispcpld/dat/mach4a/mach447a] Design [68030_tk.tt4] @@ -21,16 +21,16 @@ Part [C:/Program Files (x86)/ispLever/ispcpld/dat/mach4a/mach447a] Design [68030 | | +- Signals to Place | | +----- Logic Array Inputs | | | +- Placed | | | +- Array Inputs Used _|____|____|____|_______________|____|_____________|___|________________ - 0 | 16 | 4 | 4 => 100% | 8 | 7 => 87% | 33 | 22 => 66% - 1 | 16 | 9 | 9 => 100% | 8 | 8 => 100% | 33 | 23 => 69% + 0 | 16 | 6 | 6 => 100% | 8 | 7 => 87% | 33 | 21 => 63% + 1 | 16 | 10 | 10 => 100% | 8 | 8 => 100% | 33 | 21 => 63% 2 | 16 | 2 | 2 => 100% | 8 | 8 => 100% | 33 | 1 => 3% - 3 | 16 | 11 | 11 => 100% | 8 | 8 => 100% | 33 | 31 => 93% - 4 | 16 | 3 | 3 => 100% | 8 | 3 => 37% | 33 | 16 => 48% + 3 | 16 | 10 | 10 => 100% | 8 | 8 => 100% | 33 | 33 => 100% + 4 | 16 | 3 | 3 => 100% | 8 | 3 => 37% | 33 | 17 => 51% 5 | 16 | 0 | 0 => n/a | 8 | 4 => 50% | 33 | 0 => 0% - 6 | 16 | 11 | 11 => 100% | 8 | 7 => 87% | 33 | 29 => 87% - 7 | 16 | 13 | 13 => 100% | 8 | 8 => 100% | 33 | 31 => 93% + 6 | 16 | 9 | 9 => 100% | 8 | 7 => 87% | 33 | 21 => 63% + 7 | 16 | 13 | 13 => 100% | 8 | 8 => 100% | 33 | 28 => 84% ---|----|----|------------|-------|------------|-----|------------------ - | Avg number of array inputs in used blocks : 21.86 => 66% + | Avg number of array inputs in used blocks : 20.29 => 61% * Input/Clock Signal count: 30 -> placed: 30 = 100% @@ -42,12 +42,12 @@ _|____|____|____|_______________|____|_____________|___|________________ Clock/Input Pins : 4 4 => 100% Logic Blocks : 8 7 => 87% Macrocells : 128 53 => 41% - PT Clusters : 128 40 => 31% - - Single PT Clusters : 128 19 => 14% + PT Clusters : 128 37 => 28% + - Single PT Clusters : 128 22 => 17% Input Registers : 0 * Routing Completion: 100% -* Attempts: Place [ 509] Route [ 0] +* Attempts: Place [ 7682] Route [ 0] =========================================================================== Signal Fanout Table =========================================================================== @@ -58,14 +58,13 @@ _|____|____|____|_______________|____|_____________|___|________________ | | | | Fanout to Logic Blocks Signal Name ___|__|__|____|____________________________________________________________ 1| 6| IO| 69|=> ...3|....| A0 - |=> Paired w/: RN_A0 2| 4|OUT| 48|=> ....|....| AMIGA_BUS_DATA_DIR 3| 3| IO| 34|=> ....|....| AMIGA_BUS_ENABLE |=> Paired w/: RN_AMIGA_BUS_ENABLE 4| 2|OUT| 20|=> ....|....| AMIGA_BUS_ENABLE_LOW - 5| 3| IO| 33|=> 0...|..67| AS_000 + 5| 3| IO| 33|=> 0...|4.67| AS_000 |=> Paired w/: RN_AS_000 - 6| 7| IO| 82|=> .1.3|...7| AS_030 + 6| 7| IO| 82|=> ...3|...7| AS_030 |=> Paired w/: RN_AS_030 7| 0|OUT| 92|=> ....|....| AVEC 8| 2|OUT| 22|=> ....|....| AVEC_EXP @@ -94,106 +93,98 @@ ___|__|__|____|____________________________________________________________ 29| 2|INP| 21|=> ...3|....| BG_030 30| 4|OUT| 47|=> ....|....| CIIN 31| +|INP| 11|=> ...3|....| CLK_000 - 32| +|INP| 64|=> 0...|..67| CLK_030 - 33| 7|NOD| . |=> ....|..67| CLK_CNT_P_0_ - 34| 6|OUT| 65|=> ....|....| CLK_DIV_OUT - 35| 1|OUT| 10|=> ....|....| CLK_EXP - 36| +|Cin| 61|=> ....|....| CLK_OSZI - 37| 7|OUT| 80|=> ....|....| DSACK_0_ - 38| 7| IO| 81|=> ...3|....| DSACK_1_ + 32| +|INP| 64|=> 0...|...7| CLK_030 + 33| 6|OUT| 65|=> ....|....| CLK_DIV_OUT + 34| 1|OUT| 10|=> ....|....| CLK_EXP + 35| +|Cin| 61|=> ....|....| CLK_OSZI + 36| 7|OUT| 80|=> ....|....| DSACK_0_ + 37| 7| IO| 81|=> ...3|....| DSACK_1_ |=> Paired w/: RN_DSACK_1_ - 39| 0| IO| 98|=> ...3|....| DS_030 + 38| 0| IO| 98|=> ...3|....| DS_030 |=> Paired w/: RN_DS_030 - 40| 3| IO| 30|=> .1..|....| DTACK - 41| 6| IO| 66|=> ....|....| E + 39| 3| IO| 30|=> 0...|....| DTACK + 40| 6| IO| 66|=> ....|....| E |=> Paired w/: RN_E - 42| 5|INP| 57|=> ....|...7| FC_0_ - 43| 5|INP| 58|=> ....|...7| FC_1_ - 44| 7| IO| 78|=> ....|....| FPU_CS + 41| 5|INP| 57|=> ....|...7| FC_0_ + 42| 5|INP| 58|=> ....|...7| FC_1_ + 43| 7| IO| 78|=> ....|....| FPU_CS |=> Paired w/: RN_FPU_CS - 45| 1| IO| 8|=> ....|....| IPL_030_0_ + 44| 1| IO| 8|=> ....|....| IPL_030_0_ |=> Paired w/: RN_IPL_030_0_ - 46| 1| IO| 7|=> ....|....| IPL_030_1_ + 45| 1| IO| 7|=> ....|....| IPL_030_1_ |=> Paired w/: RN_IPL_030_1_ - 47| 1| IO| 9|=> ....|....| IPL_030_2_ + 46| 1| IO| 9|=> ....|....| IPL_030_2_ |=> Paired w/: RN_IPL_030_2_ - 48| 6|INP| 67|=> .1..|....| IPL_0_ - 49| 5|INP| 56|=> .1..|....| IPL_1_ - 50| 6|INP| 68|=> .1..|....| IPL_2_ - 51| 3| IO| 31|=> 0...|..67| LDS_000 + 47| 6|INP| 67|=> .1..|....| IPL_0_ + 48| 5|INP| 56|=> .1..|....| IPL_1_ + 49| 6|INP| 68|=> .1..|....| IPL_2_ + 50| 3| IO| 31|=> 0...|..67| LDS_000 |=> Paired w/: RN_LDS_000 - 52| 1|OUT| 3|=> ....|....| RESET - 53| 6|NOD| . |=> ....|..6.| RN_A0 - |=> Paired w/: A0 - 54| 3|NOD| . |=> ...3|....| RN_AMIGA_BUS_ENABLE + 51| 1|OUT| 3|=> ....|....| RESET + 52| 3|NOD| . |=> ...3|....| RN_AMIGA_BUS_ENABLE |=> Paired w/: AMIGA_BUS_ENABLE - 55| 3|NOD| . |=> 0..3|....| RN_AS_000 + 53| 3|NOD| . |=> 01.3|....| RN_AS_000 |=> Paired w/: AS_000 - 56| 7|NOD| . |=> 0..3|..67| RN_AS_030 + 54| 7|NOD| . |=> 0..3|..67| RN_AS_030 |=> Paired w/: AS_030 - 57| 7|NOD| . |=> 01.3|4.67| RN_BGACK_030 + 55| 7|NOD| . |=> 0..3|4.67| RN_BGACK_030 |=> Paired w/: BGACK_030 - 58| 3|NOD| . |=> ...3|....| RN_BG_000 + 56| 3|NOD| . |=> ...3|....| RN_BG_000 |=> Paired w/: BG_000 - 59| 7|NOD| . |=> ....|...7| RN_DSACK_1_ + 57| 7|NOD| . |=> ....|...7| RN_DSACK_1_ |=> Paired w/: DSACK_1_ - 60| 0|NOD| . |=> 0...|....| RN_DS_030 + 58| 0|NOD| . |=> 0...|....| RN_DS_030 |=> Paired w/: DS_030 - 61| 6|NOD| . |=> .1..|..6.| RN_E + 59| 6|NOD| . |=> ...3|..6.| RN_E |=> Paired w/: E - 62| 7|NOD| . |=> ..2.|4..7| RN_FPU_CS + 60| 7|NOD| . |=> ..2.|4..7| RN_FPU_CS |=> Paired w/: FPU_CS - 63| 1|NOD| . |=> .1..|....| RN_IPL_030_0_ + 61| 1|NOD| . |=> .1..|....| RN_IPL_030_0_ |=> Paired w/: IPL_030_0_ - 64| 1|NOD| . |=> .1..|....| RN_IPL_030_1_ + 62| 1|NOD| . |=> .1..|....| RN_IPL_030_1_ |=> Paired w/: IPL_030_1_ - 65| 1|NOD| . |=> .1..|....| RN_IPL_030_2_ + 63| 1|NOD| . |=> .1..|....| RN_IPL_030_2_ |=> Paired w/: IPL_030_2_ - 66| 3|NOD| . |=> ...3|....| RN_LDS_000 + 64| 3|NOD| . |=> ...3|....| RN_LDS_000 |=> Paired w/: LDS_000 - 67| 6|NOD| . |=> ....|..6.| RN_SIZE_0_ - |=> Paired w/: SIZE_0_ - 68| 7|NOD| . |=> ....|...7| RN_SIZE_1_ - |=> Paired w/: SIZE_1_ - 69| 3|NOD| . |=> ...3|....| RN_UDS_000 + 65| 3|NOD| . |=> ...3|....| RN_UDS_000 |=> Paired w/: UDS_000 - 70| 3|NOD| . |=> .1.3|....| RN_VMA + 66| 3|NOD| . |=> ...3|..6.| RN_VMA |=> Paired w/: VMA - 71| +|INP| 86|=> 01.3|..67| RST - 72| 6|INP| 71|=> 0..3|4...| RW - 73| 6| IO| 70|=> ...3|....| SIZE_0_ - |=> Paired w/: RN_SIZE_0_ - 74| 7| IO| 79|=> ...3|....| SIZE_1_ - |=> Paired w/: RN_SIZE_1_ - 75| 0|NOD| . |=> 0..3|....| SM_AMIGA_0_ - 76| 7|NOD| . |=> 0..3|...7| SM_AMIGA_1_ - 77| 6|NOD| . |=> ....|..67| SM_AMIGA_2_ - 78| 6|NOD| . |=> .1..|..6.| SM_AMIGA_3_ - 79| 3|NOD| . |=> ...3|..6.| SM_AMIGA_4_ - 80| 3|NOD| . |=> ...3|....| SM_AMIGA_5_ - 81| 6|NOD| . |=> 0..3|..67| SM_AMIGA_6_ - 82| 0|NOD| . |=> 0..3|..67| SM_AMIGA_7_ - 83| 3| IO| 32|=> 0...|..67| UDS_000 + 67| +|INP| 86|=> 01.3|..67| RST + 68| 6|INP| 71|=> 0..3|4...| RW + 69| 6| IO| 70|=> ...3|....| SIZE_0_ + 70| 7| IO| 79|=> ...3|....| SIZE_1_ + 71| 1|NOD| . |=> 01.3|....| SM_AMIGA_0_ + 72| 1|NOD| . |=> .1.3|...7| SM_AMIGA_1_ + 73| 6|NOD| . |=> .1..|..6.| SM_AMIGA_2_ + 74| 6|NOD| . |=> ....|..6.| SM_AMIGA_3_ + 75| 1|NOD| . |=> .1.3|..6.| SM_AMIGA_4_ + 76| 3|NOD| . |=> .1.3|....| SM_AMIGA_5_ + 77| 7|NOD| . |=> 0..3|...7| SM_AMIGA_6_ + 78| 0|NOD| . |=> 0..3|...7| SM_AMIGA_7_ + 79| 3| IO| 32|=> 0...|..67| UDS_000 |=> Paired w/: RN_UDS_000 - 84| 3| IO| 35|=> ....|....| VMA + 80| 3| IO| 35|=> ....|....| VMA |=> Paired w/: RN_VMA - 85| +|INP| 36|=> .1..|....| VPA - 86| 7|NOD| . |=> .1.3|..67| cpu_est_0_ - 87| 6|NOD| . |=> .1.3|..6.| cpu_est_1_ - 88| 1|NOD| . |=> .1..|..6.| cpu_est_2_ - 89| 7|NOD| . |=> 0...|..67| inst_AS_030_000_SYNC - 90| 7|NOD| . |=> 0..3|..67| inst_BGACK_030_INT_D - 91| 3|NOD| . |=> 01.3|..67| inst_CLK_000_D0 - 92| 3|NOD| . |=> .1..|..67| inst_CLK_000_D1 - 93| 7|NOD| . |=> 0...|..6.| inst_CLK_000_D2 - 94| 6|NOD| . |=> 0...|..6.| inst_CLK_000_D3 - 95| 6|NOD| . |=> 0..3|...7| inst_CLK_000_D4 - 96| 7|NOD| . |=> 0...|...7| inst_CLK_000_D5 - 97| 6|NOD| . |=> .1..|..6.| inst_CLK_OUT_PRE - 98| 1|NOD| . |=> .1..|..6.| inst_DTACK_SYNC - 99| 1|NOD| . |=> .1.3|....| inst_VPA_D - 100| 1|NOD| . |=> .1..|..6.| inst_VPA_SYNC - 101| +|INP| 14|=> 0..3|4.67| nEXP_SPACE + 81| +|INP| 36|=> ....|...7| VPA + 82| 1|NOD| . |=> .1.3|..6.| cpu_est_0_ + 83| 6|NOD| . |=> ...3|..6.| cpu_est_1_ + 84| 6|NOD| . |=> ...3|..6.| cpu_est_2_ + 85| 7|NOD| . |=> 0...|...7| inst_AS_030_000_SYNC + 86| 3|NOD| . |=> ...3|....| inst_BGACK_030_INT_D + 87| 3|NOD| . |=> 01.3|..67| inst_CLK_000_D0 + 88| 7|NOD| . |=> .1..|..67| inst_CLK_000_D1 + 89| 7|NOD| . |=> 0...|...7| inst_CLK_000_D2 + 90| 7|NOD| . |=> 01..|...7| inst_CLK_000_D3 + 91| 7|NOD| . |=> .1.3|...7| inst_CLK_000_D4 + 92| 0|NOD| . |=> 0...|....| inst_CLK_030_H + 93| 1|NOD| . |=> .1..|..6.| inst_CLK_OUT_PRE_25 + 94| 6|NOD| . |=> 01..|..6.| inst_CLK_OUT_PRE_50 + 95| 0|NOD| . |=> .1..|....| inst_CLK_OUT_PRE_50_D + 96| 0|NOD| . |=> ....|..6.| inst_DTACK_D0 + 97| 7|NOD| . |=> ...3|..6.| inst_VPA_D + 98| +|INP| 14|=> 0..3|4.67| nEXP_SPACE --------------------------------------------------------------------------- =========================================================================== < C:/Program Files (x86)/ispLever/ispcpld/dat/mach4a/mach447a Device Pin Assignments > @@ -313,18 +304,18 @@ ____|_____|_________|______________________________________________________ | Sig Type-+ | | | | | | | XOR to Mcell Assignment | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| | ? | | S | | 4 free | 1 XOR free - 1| SM_AMIGA_7_|NOD| | S | 6 | 4 to [ 1]| 1 XOR to [ 1] as logic PT - 2| AVEC|OUT| | S | 1 | 4 to [ 1]| 1 XOR to [ 2] for 1 PT sig - 3| SM_AMIGA_0_|NOD| | S | 3 :+: 1| 4 to [ 3]| 1 XOR to [ 3] - 4| DS_030| IO| | S | 5 | 4 to [ 4]| 1 XOR to [ 4] as logic PT - 5| | ? | | S | | 4 free | 1 XOR free + 0|inst_CLK_030_H|NOD| | S | 5 | 4 to [ 0]| 1 XOR to [ 0] as logic PT + 1| inst_DTACK_D0|NOD| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig + 2| AVEC|OUT| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig + 3|inst_CLK_OUT_PRE_50_D|NOD| | S | 1 | 4 free | 1 XOR to [ 3] for 1 PT sig + 4| | ? | | S | | 4 free | 1 XOR free + 5| DS_030| IO| | S | 7 | 4 to [ 5]| 1 XOR to [ 5] as logic PT 6| | ? | | S | | 4 free | 1 XOR free - 7| | ? | | S | | 4 free | 1 XOR free + 7| | ? | | S | | 4 to [ 5]| 1 XOR free 8| | ? | | S | | 4 free | 1 XOR free 9| | ? | | S | | 4 free | 1 XOR free 10| | ? | | S | | 4 free | 1 XOR free -11| | ? | | S | | 4 free | 1 XOR free +11| SM_AMIGA_7_|NOD| | S | 5 | 4 to [11]| 1 XOR to [11] as logic PT 12| | ? | | S | | 4 free | 1 XOR free 13| | ? | | S | | 4 free | 1 XOR free 14| | ? | | S | | 4 free | 1 XOR free @@ -340,19 +331,19 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| | ? | | S | |=> can support up to [ 5] logic PT(s) - 1| SM_AMIGA_7_|NOD| | S | 6 |=> can support up to [ 14] logic PT(s) - 2| AVEC|OUT| | S | 1 |=> can support up to [ 1] logic PT(s) - 3| SM_AMIGA_0_|NOD| | S | 3 :+: 1|=> can support up to [ 9] logic PT(s) - 4| DS_030| IO| | S | 5 |=> can support up to [ 15] logic PT(s) - 5| | ? | | S | |=> can support up to [ 15] logic PT(s) - 6| | ? | | S | |=> can support up to [ 20] logic PT(s) - 7| | ? | | S | |=> can support up to [ 20] logic PT(s) - 8| | ? | | S | |=> can support up to [ 20] logic PT(s) - 9| | ? | | S | |=> can support up to [ 20] logic PT(s) -10| | ? | | S | |=> can support up to [ 20] logic PT(s) -11| | ? | | S | |=> can support up to [ 20] logic PT(s) -12| | ? | | S | |=> can support up to [ 20] logic PT(s) + 0|inst_CLK_030_H|NOD| | S | 5 |=> can support up to [ 13] logic PT(s) + 1| inst_DTACK_D0|NOD| | S | 1 |=> can support up to [ 13] logic PT(s) + 2| AVEC|OUT| | S | 1 |=> can support up to [ 18] logic PT(s) + 3|inst_CLK_OUT_PRE_50_D|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) + 4| | ? | | S | |=> can support up to [ 14] logic PT(s) + 5| DS_030| IO| | S | 7 |=> can support up to [ 20] logic PT(s) + 6| | ? | | S | |=> can support up to [ 10] logic PT(s) + 7| | ? | | S | |=> can support up to [ 16] logic PT(s) + 8| | ? | | S | |=> can support up to [ 15] logic PT(s) + 9| | ? | | S | |=> can support up to [ 15] logic PT(s) +10| | ? | | S | |=> can support up to [ 15] logic PT(s) +11| SM_AMIGA_7_|NOD| | S | 5 |=> can support up to [ 20] logic PT(s) +12| | ? | | S | |=> can support up to [ 15] logic PT(s) 13| | ? | | S | |=> can support up to [ 20] logic PT(s) 14| | ? | | S | |=> can support up to [ 15] logic PT(s) 15| | ? | | S | |=> can support up to [ 10] logic PT(s) @@ -365,18 +356,18 @@ _|_________________|__|__|___|_____|_______________________________________ | Sig Type---+ | to | Block [ 0] IO Pin | Device Pin | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ - 0| | | | => | 5 6 7 0 | 96 97 98 91 - 1| SM_AMIGA_7_|NOD| | => | 5 6 7 0 | 96 97 98 91 + 0|inst_CLK_030_H|NOD| | => | 5 6 7 0 | 96 97 98 91 + 1| inst_DTACK_D0|NOD| | => | 5 6 7 0 | 96 97 98 91 2| AVEC|OUT| | => | 6 7 0 ( 1)| 97 98 91 ( 92) - 3| SM_AMIGA_0_|NOD| | => | 6 7 0 1 | 97 98 91 92 - 4| DS_030| IO| | => |( 7) 0 1 2 |( 98) 91 92 93 - 5| | | | => | 7 0 1 2 | 98 91 92 93 + 3|inst_CLK_OUT_PRE_50_D|NOD| | => | 6 7 0 1 | 97 98 91 92 + 4| | | | => | 7 0 1 2 | 98 91 92 93 + 5| DS_030| IO| | => |( 7) 0 1 2 |( 98) 91 92 93 6| | | | => | 0 1 2 3 | 91 92 93 94 7| | | | => | 0 1 2 3 | 91 92 93 94 8| | | | => | 1 2 3 4 | 92 93 94 95 9| | | | => | 1 2 3 4 | 92 93 94 95 10| | | | => | 2 3 4 5 | 93 94 95 96 -11| | | | => | 2 3 4 5 | 93 94 95 96 +11| SM_AMIGA_7_|NOD| | => | 2 3 4 5 | 93 94 95 96 12| | | | => | 3 4 5 6 | 94 95 96 97 13| | | | => | 3 4 5 6 | 94 95 96 97 14| | | | => | 4 5 6 7 | 95 96 97 98 @@ -398,7 +389,7 @@ _|_________________|__|___|_____|___________________________________________ 4| A_18_|INP|*| 95| => | 8 9 10 11 12 13 14 15 5| A_16_|INP|*| 96| => | 10 11 12 13 14 15 0 1 6| A_19_|INP|*| 97| => | 12 13 14 15 0 1 2 3 - 7| DS_030| IO|*| 98| => | 14 15 0 1 2 3 ( 4) 5 + 7| DS_030| IO|*| 98| => | 14 15 0 1 2 3 4 ( 5) --------------------------------------------------------------------------- =========================================================================== < Block [ 0] > IO/Node and IO/Input Macrocell Pairing Table @@ -430,18 +421,18 @@ IMX No. | +---- Block IO Pin or Macrocell Number ---|-------|----|---|---|----------|------|-|------------------------------ 0 [IOpin 0 | 91| -| | ] [RegIn 0 |102| -| | ] - [MCell 0 |101| -| | ] - [MCell 1 |103|NOD SM_AMIGA_7_| |*] + [MCell 0 |101|NOD inst_CLK_030_H| |*] + [MCell 1 |103|NOD inst_DTACK_D0| |*] 1 [IOpin 1 | 92|OUT AVEC|*| ] [RegIn 1 |105| -| | ] [MCell 2 |104|OUT AVEC| | ] - [MCell 3 |106|NOD SM_AMIGA_0_| |*] + [MCell 3 |106|NOD inst_CLK_OUT_PRE_50_D| |*] 2 [IOpin 2 | 93|INP A_20_|*|*] [RegIn 2 |108| -| | ] - [MCell 4 |107|NOD RN_DS_030| |*] paired w/[ DS_030] - [MCell 5 |109| -| | ] + [MCell 4 |107| -| | ] + [MCell 5 |109|NOD RN_DS_030| |*] paired w/[ DS_030] 3 [IOpin 3 | 94|INP A_21_|*|*] [RegIn 3 |111| -| | ] @@ -456,7 +447,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 5 [IOpin 5 | 96|INP A_16_|*|*] [RegIn 5 |117| -| | ] [MCell 10 |116| -| | ] - [MCell 11 |118| -| | ] + [MCell 11 |118|NOD SM_AMIGA_7_| |*] 6 [IOpin 6 | 97|INP A_19_|*|*] [RegIn 6 |120| -| | ] @@ -474,36 +465,36 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux01| Mcel 0 4 ( 107)| RN_DS_030 -Mux02| Mcel 6 4 ( 251)| SM_AMIGA_6_ +Mux00| IOPin 3 4 ( 31)| LDS_000 +Mux01| ... | ... +Mux02| Mcel 0 5 ( 109)| RN_DS_030 Mux03| ... | ... -Mux04| Input Pin ( 64)| CLK_030 -Mux05| Input Pin ( 14)| nEXP_SPACE -Mux06| Mcel 0 3 ( 106)| SM_AMIGA_0_ +Mux04| Mcel 0 0 ( 101)| inst_CLK_030_H +Mux05| Mcel 7 9 ( 283)| inst_AS_030_000_SYNC +Mux06| ... | ... Mux07| Mcel 7 6 ( 278)| RN_AS_030 -Mux08| IOPin 3 3 ( 32)| UDS_000 -Mux09| Mcel 6 11 ( 262)| inst_CLK_000_D3 -Mux10| Mcel 7 3 ( 274)| inst_BGACK_030_INT_D -Mux11| IOPin 6 6 ( 71)| RW -Mux12| Mcel 0 1 ( 103)| SM_AMIGA_7_ -Mux13| Mcel 7 5 ( 277)| inst_AS_030_000_SYNC -Mux14| Mcel 3 4 ( 179)| RN_AS_000 -Mux15| Mcel 7 12 ( 287)| inst_CLK_000_D5 +Mux08| Mcel 7 12 ( 287)| inst_CLK_000_D2 +Mux09| IOPin 3 5 ( 30)| DTACK +Mux10| ... | ... +Mux11| Mcel 3 5 ( 181)| RN_AS_000 +Mux12| IOPin 3 3 ( 32)| UDS_000 +Mux13| Mcel 0 11 ( 118)| SM_AMIGA_7_ +Mux14| Mcel 7 2 ( 272)| inst_CLK_000_D3 +Mux15| Input Pin ( 14)| nEXP_SPACE Mux16| ... | ... -Mux17| ... | ... +Mux17| Mcel 3 12 ( 191)| inst_CLK_000_D0 Mux18| ... | ... -Mux19| Mcel 7 13 ( 289)| inst_CLK_000_D2 -Mux20| Mcel 7 7 ( 280)| SM_AMIGA_1_ +Mux19| ... | ... +Mux20| Input Pin ( 64)| CLK_030 Mux21| Input Pin ( 86)| RST Mux22| ... | ... -Mux23| Mcel 6 6 ( 254)| inst_CLK_000_D4 -Mux24| Mcel 3 5 ( 181)| inst_CLK_000_D0 -Mux25| ... | ... -Mux26| IOPin 3 2 ( 33)| AS_000 -Mux27| IOPin 3 4 ( 31)| LDS_000 -Mux28| ... | ... -Mux29| ... | ... +Mux23| IOPin 3 2 ( 33)| AS_000 +Mux24| Mcel 6 1 ( 247)| inst_CLK_OUT_PRE_50 +Mux25| IOPin 6 6 ( 71)| RW +Mux26| ... | ... +Mux27| Mcel 7 5 ( 277)| RN_BGACK_030 +Mux28| Mcel 1 5 ( 133)| SM_AMIGA_0_ +Mux29| Mcel 7 7 ( 280)| SM_AMIGA_6_ Mux30| ... | ... Mux31| ... | ... Mux32| ... | ... @@ -521,14 +512,14 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| CLK_EXP|OUT| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig 1| RESET|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig 2| IPL_030_2_| IO| | S | 3 | 4 to [ 2]| 1 XOR free - 3| cpu_est_2_|NOD| | S | 3 :+: 1| 4 to [ 3]| 1 XOR to [ 3] + 3| | ? | | S | | 4 free | 1 XOR free 4| IPL_030_0_| IO| | S | 3 | 4 to [ 4]| 1 XOR free - 5| inst_VPA_SYNC|NOD| | S | 2 | 4 to [ 5]| 1 XOR free + 5| SM_AMIGA_0_|NOD| | S | 4 | 4 to [ 5]| 1 XOR free 6| IPL_030_1_| IO| | S | 3 | 4 to [ 6]| 1 XOR free - 7|inst_DTACK_SYNC|NOD| | S | 2 | 4 to [ 7]| 1 XOR free - 8| inst_VPA_D|NOD| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig - 9| | ? | | S | | 4 free | 1 XOR free -10| | ? | | S | | 4 free | 1 XOR free + 7| SM_AMIGA_4_|NOD| | S | 2 | 4 to [ 7]| 1 XOR free + 8| cpu_est_0_|NOD| | S | 3 | 4 to [ 8]| 1 XOR free + 9|inst_CLK_OUT_PRE_25|NOD| | S | 3 | 4 to [ 9]| 1 XOR free +10| SM_AMIGA_1_|NOD| | S | 3 | 4 to [10]| 1 XOR free 11| | ? | | S | | 4 free | 1 XOR free 12| | ? | | S | | 4 free | 1 XOR free 13| | ? | | S | | 4 free | 1 XOR free @@ -546,17 +537,17 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ 0| CLK_EXP|OUT| | S | 1 |=> can support up to [ 9] logic PT(s) - 1| RESET|OUT| | S | 1 |=> can support up to [ 9] logic PT(s) - 2| IPL_030_2_| IO| | S | 3 |=> can support up to [ 9] logic PT(s) - 3| cpu_est_2_|NOD| | S | 3 :+: 1|=> can support up to [ 4] logic PT(s) - 4| IPL_030_0_| IO| | S | 3 |=> can support up to [ 5] logic PT(s) - 5| inst_VPA_SYNC|NOD| | S | 2 |=> can support up to [ 5] logic PT(s) - 6| IPL_030_1_| IO| | S | 3 |=> can support up to [ 9] logic PT(s) - 7|inst_DTACK_SYNC|NOD| | S | 2 |=> can support up to [ 14] logic PT(s) - 8| inst_VPA_D|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) - 9| | ? | | S | |=> can support up to [ 19] logic PT(s) -10| | ? | | S | |=> can support up to [ 20] logic PT(s) -11| | ? | | S | |=> can support up to [ 20] logic PT(s) + 1| RESET|OUT| | S | 1 |=> can support up to [ 14] logic PT(s) + 2| IPL_030_2_| IO| | S | 3 |=> can support up to [ 14] logic PT(s) + 3| | ? | | S | |=> can support up to [ 5] logic PT(s) + 4| IPL_030_0_| IO| | S | 3 |=> can support up to [ 10] logic PT(s) + 5| SM_AMIGA_0_|NOD| | S | 4 |=> can support up to [ 5] logic PT(s) + 6| IPL_030_1_| IO| | S | 3 |=> can support up to [ 5] logic PT(s) + 7| SM_AMIGA_4_|NOD| | S | 2 |=> can support up to [ 5] logic PT(s) + 8| cpu_est_0_|NOD| | S | 3 |=> can support up to [ 5] logic PT(s) + 9|inst_CLK_OUT_PRE_25|NOD| | S | 3 |=> can support up to [ 10] logic PT(s) +10| SM_AMIGA_1_|NOD| | S | 3 |=> can support up to [ 15] logic PT(s) +11| | ? | | S | |=> can support up to [ 15] logic PT(s) 12| | ? | | S | |=> can support up to [ 20] logic PT(s) 13| | ? | | S | |=> can support up to [ 20] logic PT(s) 14| | ? | | S | |=> can support up to [ 15] logic PT(s) @@ -573,14 +564,14 @@ _|_________________|__|_____|____________________|________________________ 0| CLK_EXP|OUT| | => | 5 6 7 ( 0)| 5 4 3 ( 10) 1| RESET|OUT| | => | 5 6 ( 7) 0 | 5 4 ( 3) 10 2| IPL_030_2_| IO| | => | 6 7 0 ( 1)| 4 3 10 ( 9) - 3| cpu_est_2_|NOD| | => | 6 7 0 1 | 4 3 10 9 + 3| | | | => | 6 7 0 1 | 4 3 10 9 4| IPL_030_0_| IO| | => | 7 0 1 ( 2)| 3 10 9 ( 8) - 5| inst_VPA_SYNC|NOD| | => | 7 0 1 2 | 3 10 9 8 + 5| SM_AMIGA_0_|NOD| | => | 7 0 1 2 | 3 10 9 8 6| IPL_030_1_| IO| | => | 0 1 2 ( 3)| 10 9 8 ( 7) - 7|inst_DTACK_SYNC|NOD| | => | 0 1 2 3 | 10 9 8 7 - 8| inst_VPA_D|NOD| | => | 1 2 3 4 | 9 8 7 6 - 9| | | | => | 1 2 3 4 | 9 8 7 6 -10| | | | => | 2 3 4 5 | 8 7 6 5 + 7| SM_AMIGA_4_|NOD| | => | 0 1 2 3 | 10 9 8 7 + 8| cpu_est_0_|NOD| | => | 1 2 3 4 | 9 8 7 6 + 9|inst_CLK_OUT_PRE_25|NOD| | => | 1 2 3 4 | 9 8 7 6 +10| SM_AMIGA_1_|NOD| | => | 2 3 4 5 | 8 7 6 5 11| | | | => | 2 3 4 5 | 8 7 6 5 12| | | | => | 3 4 5 6 | 7 6 5 4 13| | | | => | 3 4 5 6 | 7 6 5 4 @@ -643,26 +634,26 @@ IMX No. | +---- Block IO Pin or Macrocell Number 1 [IOpin 1 | 9| IO IPL_030_2_|*| ] paired w/[ RN_IPL_030_2_] [RegIn 1 |129| -| | ] [MCell 2 |128|NOD RN_IPL_030_2_| |*] paired w/[ IPL_030_2_] - [MCell 3 |130|NOD cpu_est_2_| |*] + [MCell 3 |130| -| | ] 2 [IOpin 2 | 8| IO IPL_030_0_|*| ] paired w/[ RN_IPL_030_0_] [RegIn 2 |132| -| | ] [MCell 4 |131|NOD RN_IPL_030_0_| |*] paired w/[ IPL_030_0_] - [MCell 5 |133|NOD inst_VPA_SYNC| |*] + [MCell 5 |133|NOD SM_AMIGA_0_| |*] 3 [IOpin 3 | 7| IO IPL_030_1_|*| ] paired w/[ RN_IPL_030_1_] [RegIn 3 |135| -| | ] [MCell 6 |134|NOD RN_IPL_030_1_| |*] paired w/[ IPL_030_1_] - [MCell 7 |136|NOD inst_DTACK_SYNC| |*] + [MCell 7 |136|NOD SM_AMIGA_4_| |*] 4 [IOpin 4 | 6|INP A_29_|*|*] [RegIn 4 |138| -| | ] - [MCell 8 |137|NOD inst_VPA_D| |*] - [MCell 9 |139| -| | ] + [MCell 8 |137|NOD cpu_est_0_| |*] + [MCell 9 |139|NOD inst_CLK_OUT_PRE_25| |*] 5 [IOpin 5 | 5|INP A_30_|*|*] [RegIn 5 |141| -| | ] - [MCell 10 |140| -| | ] + [MCell 10 |140|NOD SM_AMIGA_1_| |*] [MCell 11 |142| -| | ] 6 [IOpin 6 | 4|INP A_31_|*|*] @@ -682,37 +673,37 @@ IMX No. | +---- Block IO Pin or Macrocell Number | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- Mux00| IOPin 6 2 ( 67)| IPL_0_ -Mux01| Mcel 1 7 ( 136)| inst_DTACK_SYNC -Mux02| Mcel 3 1 ( 175)| RN_VMA +Mux01| Mcel 1 7 ( 136)| SM_AMIGA_4_ +Mux02| Mcel 1 6 ( 134)| RN_IPL_030_1_ Mux03| IOPin 5 4 ( 56)| IPL_1_ Mux04| IOPin 6 3 ( 68)| IPL_2_ -Mux05| Mcel 6 10 ( 260)| inst_CLK_OUT_PRE -Mux06| ... | ... -Mux07| Mcel 3 5 ( 181)| inst_CLK_000_D0 -Mux08| Mcel 3 7 ( 184)| inst_CLK_000_D1 -Mux09| IOPin 3 5 ( 30)| DTACK -Mux10| Input Pin ( 36)| VPA -Mux11| Mcel 1 6 ( 134)| RN_IPL_030_1_ -Mux12| Mcel 6 9 ( 259)| SM_AMIGA_3_ -Mux13| Mcel 1 3 ( 130)| cpu_est_2_ -Mux14| Mcel 7 2 ( 272)| cpu_est_0_ +Mux05| Mcel 6 6 ( 254)| SM_AMIGA_2_ +Mux06| Mcel 0 3 ( 106)| inst_CLK_OUT_PRE_50_D +Mux07| Mcel 3 5 ( 181)| RN_AS_000 +Mux08| Mcel 1 8 ( 137)| cpu_est_0_ +Mux09| ... | ... +Mux10| Mcel 1 2 ( 128)| RN_IPL_030_2_ +Mux11| Mcel 7 3 ( 274)| inst_CLK_000_D1 +Mux12| Mcel 1 10 ( 140)| SM_AMIGA_1_ +Mux13| Mcel 7 8 ( 281)| inst_CLK_000_D4 +Mux14| Mcel 7 2 ( 272)| inst_CLK_000_D3 Mux15| ... | ... -Mux16| ... | ... -Mux17| Mcel 1 8 ( 137)| inst_VPA_D -Mux18| Mcel 1 2 ( 128)| RN_IPL_030_2_ -Mux19| IOPin 7 3 ( 82)| AS_030 -Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux16| Mcel 3 2 ( 176)| SM_AMIGA_5_ +Mux17| Mcel 3 12 ( 191)| inst_CLK_000_D0 +Mux18| ... | ... +Mux19| ... | ... +Mux20| ... | ... Mux21| Input Pin ( 86)| RST -Mux22| Mcel 6 5 ( 253)| cpu_est_1_ -Mux23| Mcel 6 2 ( 248)| RN_E -Mux24| ... | ... +Mux22| ... | ... +Mux23| ... | ... +Mux24| Mcel 6 1 ( 247)| inst_CLK_OUT_PRE_50 Mux25| ... | ... Mux26| ... | ... Mux27| Mcel 1 4 ( 131)| RN_IPL_030_0_ -Mux28| Mcel 1 5 ( 133)| inst_VPA_SYNC +Mux28| Mcel 1 5 ( 133)| SM_AMIGA_0_ Mux29| ... | ... Mux30| ... | ... -Mux31| ... | ... +Mux31| Mcel 1 9 ( 139)| inst_CLK_OUT_PRE_25 Mux32| ... | ... --------------------------------------------------------------------------- =========================================================================== @@ -930,18 +921,18 @@ Mux32| ... | ... | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ 0| DTACK| IO| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig - 1| VMA| IO| | S | 4 | 4 to [ 1]| 1 XOR free - 2|AMIGA_BUS_ENABLE| IO| | S | 7 | 4 to [ 2]| 1 XOR to [ 2] as logic PT - 3| BG_000| IO| | S | 2 | 4 to [ 3]| 1 XOR free - 4| AS_000| IO| | S | 2 | 4 to [ 2]| 1 XOR free - 5|inst_CLK_000_D0|NOD| | S | 1 | 4 to [ 4]| 1 XOR to [ 5] for 1 PT sig + 1| BG_000| IO| | S | 2 | 4 to [ 1]| 1 XOR free + 2| SM_AMIGA_5_|NOD| | S | 2 | 4 to [ 2]| 1 XOR free + 3| VMA| IO| | S | 2 :+: 1| 4 to [ 3]| 1 XOR to [ 3] + 4| | ? | | S | | 4 to [ 5]| 1 XOR free + 5| AS_000| IO| | S | 2 | 4 to [ 6]| 1 XOR free 6| UDS_000| IO| | S | 7 | 4 to [ 6]| 1 XOR to [ 6] as logic PT - 7|inst_CLK_000_D1|NOD| | S | 1 | 4 to [ 6]| 1 XOR to [ 7] for 1 PT sig - 8| | ? | | S | | 4 to [ 9]| 1 XOR free - 9| SM_AMIGA_4_|NOD| | S | 3 | 4 to [10]| 1 XOR free -10| LDS_000| IO| | S |11 | 4 to [10]| 1 XOR to [10] as logic PT -11| SM_AMIGA_5_|NOD| | S | 3 | 4 to [11]| 1 XOR free -12| | ? | | S | | 4 to [10]| 1 XOR free + 7|AMIGA_BUS_ENABLE| IO| | S | 6 | 4 to [ 7]| 1 XOR to [ 7] as logic PT + 8| | ? | | S | | 4 to [ 7]| 1 XOR free + 9| LDS_000| IO| | S |11 | 4 to [ 9]| 1 XOR to [ 9] as logic PT +10|inst_BGACK_030_INT_D|NOD| | S | 1 | 4 to [ 9]| 1 XOR to [10] for 1 PT sig +11| | ? | | S | | 4 to [ 9]| 1 XOR free +12|inst_CLK_000_D0|NOD| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig 13| | ? | | S | | 4 free | 1 XOR free 14| | ? | | S | | 4 free | 1 XOR free 15| | ? | | S | | 4 free | 1 XOR free @@ -957,19 +948,19 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ 0| DTACK| IO| | S | 1 |=> can support up to [ 5] logic PT(s) - 1| VMA| IO| | S | 4 |=> can support up to [ 9] logic PT(s) - 2|AMIGA_BUS_ENABLE| IO| | S | 7 |=> can support up to [ 10] logic PT(s) - 3| BG_000| IO| | S | 2 |=> can support up to [ 5] logic PT(s) - 4| AS_000| IO| | S | 2 |=> can support up to [ 4] logic PT(s) - 5|inst_CLK_000_D0|NOD| | S | 1 |=> can support up to [ 1] logic PT(s) - 6| UDS_000| IO| | S | 7 |=> can support up to [ 9] logic PT(s) - 7|inst_CLK_000_D1|NOD| | S | 1 |=> can support up to [ 1] logic PT(s) + 1| BG_000| IO| | S | 2 |=> can support up to [ 9] logic PT(s) + 2| SM_AMIGA_5_|NOD| | S | 2 |=> can support up to [ 5] logic PT(s) + 3| VMA| IO| | S | 2 :+: 1|=> can support up to [ 4] logic PT(s) + 4| | ? | | S | |=> can support up to [ 1] logic PT(s) + 5| AS_000| IO| | S | 2 |=> can support up to [ 5] logic PT(s) + 6| UDS_000| IO| | S | 7 |=> can support up to [ 10] logic PT(s) + 7|AMIGA_BUS_ENABLE| IO| | S | 6 |=> can support up to [ 10] logic PT(s) 8| | ? | | S | |=> can support up to [ 1] logic PT(s) - 9| SM_AMIGA_4_|NOD| | S | 3 |=> can support up to [ 5] logic PT(s) -10| LDS_000| IO| | S |11 |=> can support up to [ 15] logic PT(s) -11| SM_AMIGA_5_|NOD| | S | 3 |=> can support up to [ 10] logic PT(s) -12| | ? | | S | |=> can support up to [ 11] logic PT(s) -13| | ? | | S | |=> can support up to [ 15] logic PT(s) + 9| LDS_000| IO| | S |11 |=> can support up to [ 14] logic PT(s) +10|inst_BGACK_030_INT_D|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) +11| | ? | | S | |=> can support up to [ 10] logic PT(s) +12|inst_CLK_000_D0|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) +13| | ? | | S | |=> can support up to [ 19] logic PT(s) 14| | ? | | S | |=> can support up to [ 15] logic PT(s) 15| | ? | | S | |=> can support up to [ 10] logic PT(s) --------------------------------------------------------------------------- @@ -982,18 +973,18 @@ _|_________________|__|__|___|_____|_______________________________________ | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ 0| DTACK| IO| | => |( 5) 6 7 0 |( 30) 29 28 35 - 1| VMA| IO| | => | 5 6 7 ( 0)| 30 29 28 ( 35) - 2|AMIGA_BUS_ENABLE| IO| | => | 6 7 0 ( 1)| 29 28 35 ( 34) - 3| BG_000| IO| | => |( 6) 7 0 1 |( 29) 28 35 34 - 4| AS_000| IO| | => | 7 0 1 ( 2)| 28 35 34 ( 33) - 5|inst_CLK_000_D0|NOD| | => | 7 0 1 2 | 28 35 34 33 + 1| BG_000| IO| | => | 5 ( 6) 7 0 | 30 ( 29) 28 35 + 2| SM_AMIGA_5_|NOD| | => | 6 7 0 1 | 29 28 35 34 + 3| VMA| IO| | => | 6 7 ( 0) 1 | 29 28 ( 35) 34 + 4| | | | => | 7 0 1 2 | 28 35 34 33 + 5| AS_000| IO| | => | 7 0 1 ( 2)| 28 35 34 ( 33) 6| UDS_000| IO| | => | 0 1 2 ( 3)| 35 34 33 ( 32) - 7|inst_CLK_000_D1|NOD| | => | 0 1 2 3 | 35 34 33 32 + 7|AMIGA_BUS_ENABLE| IO| | => | 0 ( 1) 2 3 | 35 ( 34) 33 32 8| | | | => | 1 2 3 4 | 34 33 32 31 - 9| SM_AMIGA_4_|NOD| | => | 1 2 3 4 | 34 33 32 31 -10| LDS_000| IO| | => | 2 3 ( 4) 5 | 33 32 ( 31) 30 -11| SM_AMIGA_5_|NOD| | => | 2 3 4 5 | 33 32 31 30 -12| | | | => | 3 4 5 6 | 32 31 30 29 + 9| LDS_000| IO| | => | 1 2 3 ( 4)| 34 33 32 ( 31) +10|inst_BGACK_030_INT_D|NOD| | => | 2 3 4 5 | 33 32 31 30 +11| | | | => | 2 3 4 5 | 33 32 31 30 +12|inst_CLK_000_D0|NOD| | => | 3 4 5 6 | 32 31 30 29 13| | | | => | 3 4 5 6 | 32 31 30 29 14| | | | => | 4 5 6 7 | 31 30 29 28 15| | | | => | 4 5 6 7 | 31 30 29 28 @@ -1007,13 +998,13 @@ _|_________________|__|_____|____________________|________________________ | Sig Type--+ | | | | Signal Name | | | | Node Destinations Via Output Matrix _|_________________|__|___|_____|___________________________________________ - 0| VMA| IO|*| 35| => | 0 ( 1) 2 3 4 5 6 7 - 1|AMIGA_BUS_ENABLE| IO|*| 34| => | ( 2) 3 4 5 6 7 8 9 - 2| AS_000| IO|*| 33| => | ( 4) 5 6 7 8 9 10 11 + 0| VMA| IO|*| 35| => | 0 1 2 ( 3) 4 5 6 7 + 1|AMIGA_BUS_ENABLE| IO|*| 34| => | 2 3 4 5 6 ( 7) 8 9 + 2| AS_000| IO|*| 33| => | 4 ( 5) 6 7 8 9 10 11 3| UDS_000| IO|*| 32| => | ( 6) 7 8 9 10 11 12 13 - 4| LDS_000| IO|*| 31| => | 8 9 (10) 11 12 13 14 15 + 4| LDS_000| IO|*| 31| => | 8 ( 9) 10 11 12 13 14 15 5| DTACK| IO|*| 30| => | 10 11 12 13 14 15 ( 0) 1 - 6| BG_000| IO|*| 29| => | 12 13 14 15 0 1 2 ( 3) + 6| BG_000| IO|*| 29| => | 12 13 14 15 0 ( 1) 2 3 7| BGACK_000|INP|*| 28| => | 14 15 0 1 2 3 4 5 --------------------------------------------------------------------------- =========================================================================== @@ -1052,36 +1043,36 @@ IMX No. | +---- Block IO Pin or Macrocell Number 0 [IOpin 0 | 35| IO VMA|*| ] paired w/[ RN_VMA] [RegIn 0 |174| -| | ] [MCell 0 |173| IO DTACK| | ] - [MCell 1 |175|NOD RN_VMA| |*] paired w/[ VMA] + [MCell 1 |175|NOD RN_BG_000| |*] paired w/[ BG_000] 1 [IOpin 1 | 34| IO AMIGA_BUS_ENABLE|*| ] paired w/[RN_AMIGA_BUS_ENABLE] [RegIn 1 |177| -| | ] - [MCell 2 |176|NOD RN_AMIGA_BUS_ENABLE| |*] paired w/[AMIGA_BUS_ENABLE] - [MCell 3 |178|NOD RN_BG_000| |*] paired w/[ BG_000] + [MCell 2 |176|NOD SM_AMIGA_5_| |*] + [MCell 3 |178|NOD RN_VMA| |*] paired w/[ VMA] 2 [IOpin 2 | 33| IO AS_000|*|*] paired w/[ RN_AS_000] [RegIn 2 |180| -| | ] - [MCell 4 |179|NOD RN_AS_000| |*] paired w/[ AS_000] - [MCell 5 |181|NOD inst_CLK_000_D0| |*] + [MCell 4 |179| -| | ] + [MCell 5 |181|NOD RN_AS_000| |*] paired w/[ AS_000] 3 [IOpin 3 | 32| IO UDS_000|*|*] paired w/[ RN_UDS_000] [RegIn 3 |183| -| | ] [MCell 6 |182|NOD RN_UDS_000| |*] paired w/[ UDS_000] - [MCell 7 |184|NOD inst_CLK_000_D1| |*] + [MCell 7 |184|NOD RN_AMIGA_BUS_ENABLE| |*] paired w/[AMIGA_BUS_ENABLE] 4 [IOpin 4 | 31| IO LDS_000|*|*] paired w/[ RN_LDS_000] [RegIn 4 |186| -| | ] [MCell 8 |185| -| | ] - [MCell 9 |187|NOD SM_AMIGA_4_| |*] + [MCell 9 |187|NOD RN_LDS_000| |*] paired w/[ LDS_000] 5 [IOpin 5 | 30| IO DTACK|*|*] [RegIn 5 |189| -| | ] - [MCell 10 |188|NOD RN_LDS_000| |*] paired w/[ LDS_000] - [MCell 11 |190|NOD SM_AMIGA_5_| |*] + [MCell 10 |188|NOD inst_BGACK_030_INT_D| |*] + [MCell 11 |190| -| | ] 6 [IOpin 6 | 29| IO BG_000|*| ] paired w/[ RN_BG_000] [RegIn 6 |192| -| | ] - [MCell 12 |191| -| | ] + [MCell 12 |191|NOD inst_CLK_000_D0| |*] [MCell 13 |193| -| | ] 7 [IOpin 7 | 28|INP BGACK_000|*|*] @@ -1095,39 +1086,39 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| IOPin 6 5 ( 70)| SIZE_0_ -Mux01| ... | ... -Mux02| Mcel 3 10 ( 188)| RN_LDS_000 -Mux03| Mcel 6 5 ( 253)| cpu_est_1_ -Mux04| Mcel 7 2 ( 272)| cpu_est_0_ -Mux05| Input Pin ( 14)| nEXP_SPACE +Mux00| IOPin 6 4 ( 69)| A0 +Mux01| Mcel 1 7 ( 136)| SM_AMIGA_4_ +Mux02| Mcel 6 4 ( 251)| cpu_est_1_ +Mux03| Input Pin ( 11)| CLK_000 +Mux04| IOPin 2 6 ( 21)| BG_030 +Mux05| Mcel 3 12 ( 191)| inst_CLK_000_D0 Mux06| IOPin 7 6 ( 79)| SIZE_1_ -Mux07| Mcel 3 5 ( 181)| inst_CLK_000_D0 -Mux08| IOPin 6 6 ( 71)| RW -Mux09| Mcel 0 1 ( 103)| SM_AMIGA_7_ -Mux10| Mcel 7 3 ( 274)| inst_BGACK_030_INT_D -Mux11| Mcel 6 4 ( 251)| SM_AMIGA_6_ -Mux12| Mcel 3 9 ( 187)| SM_AMIGA_4_ -Mux13| Mcel 3 3 ( 178)| RN_BG_000 -Mux14| Mcel 3 4 ( 179)| RN_AS_000 -Mux15| IOPin 6 4 ( 69)| A0 +Mux07| Mcel 3 9 ( 187)| RN_LDS_000 +Mux08| Mcel 1 8 ( 137)| cpu_est_0_ +Mux09| Mcel 3 3 ( 178)| RN_VMA +Mux10| IOPin 7 4 ( 81)| DSACK_1_ +Mux11| IOPin 6 6 ( 71)| RW +Mux12| Mcel 1 10 ( 140)| SM_AMIGA_1_ +Mux13| Mcel 3 7 ( 184)| RN_AMIGA_BUS_ENABLE +Mux14| IOPin 6 5 ( 70)| SIZE_0_ +Mux15| Input Pin ( 14)| nEXP_SPACE Mux16| Mcel 3 6 ( 182)| RN_UDS_000 -Mux17| Mcel 1 8 ( 137)| inst_VPA_D +Mux17| Mcel 3 1 ( 175)| RN_BG_000 Mux18| IOPin 0 7 ( 98)| DS_030 Mux19| IOPin 7 3 ( 82)| AS_030 -Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux20| Mcel 3 10 ( 188)| inst_BGACK_030_INT_D Mux21| Input Pin ( 86)| RST -Mux22| IOPin 2 6 ( 21)| BG_030 -Mux23| Mcel 6 6 ( 254)| inst_CLK_000_D4 -Mux24| Input Pin ( 11)| CLK_000 -Mux25| Mcel 0 3 ( 106)| SM_AMIGA_0_ -Mux26| ... | ... -Mux27| Mcel 3 1 ( 175)| RN_VMA -Mux28| Mcel 3 2 ( 176)| RN_AMIGA_BUS_ENABLE -Mux29| Mcel 7 7 ( 280)| SM_AMIGA_1_ +Mux22| Mcel 7 14 ( 290)| inst_VPA_D +Mux23| Mcel 6 2 ( 248)| RN_E +Mux24| Mcel 3 5 ( 181)| RN_AS_000 +Mux25| Mcel 7 8 ( 281)| inst_CLK_000_D4 +Mux26| Mcel 0 11 ( 118)| SM_AMIGA_7_ +Mux27| Mcel 7 5 ( 277)| RN_BGACK_030 +Mux28| Mcel 3 2 ( 176)| SM_AMIGA_5_ +Mux29| Mcel 7 7 ( 280)| SM_AMIGA_6_ Mux30| Mcel 7 6 ( 278)| RN_AS_030 -Mux31| Mcel 3 11 ( 190)| SM_AMIGA_5_ -Mux32| IOPin 7 4 ( 81)| DSACK_1_ +Mux31| Mcel 1 5 ( 133)| SM_AMIGA_0_ +Mux32| Mcel 6 5 ( 253)| cpu_est_2_ --------------------------------------------------------------------------- =========================================================================== < Block [ 4] > Macrocell (MCell) Cluster Assignments @@ -1299,7 +1290,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux00| IOPin 3 2 ( 33)| AS_000 Mux01| IOPin 1 6 ( 4)| A_31_ Mux02| ... | ... Mux03| IOPin 2 1 ( 16)| A_27_ @@ -1312,7 +1303,7 @@ Mux09| IOPin 1 5 ( 5)| A_30_ Mux10| Mcel 7 1 ( 271)| RN_FPU_CS Mux11| IOPin 7 1 ( 84)| A_23_ Mux12| IOPin 2 3 ( 18)| A_25_ -Mux13| ... | ... +Mux13| Mcel 7 5 ( 277)| RN_BGACK_030 Mux14| ... | ... Mux15| IOPin 0 3 ( 94)| A_21_ Mux16| ... | ... @@ -1428,21 +1419,21 @@ IMX No. | +---- Block IO Pin or Macrocell Number | Sig Type-+ | | | | | | | XOR to Mcell Assignment | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| SIZE_0_| IO| | S | 2 | 4 to [ 0]| 1 XOR free - 1| CLK_DIV_OUT|OUT| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig + 0| CLK_DIV_OUT|OUT| | S | 1 | 4 free | 1 XOR to [ 0] for 1 PT sig + 1|inst_CLK_OUT_PRE_50|NOD| | S | 1 | 4 free | 1 XOR to [ 1] for 1 PT sig 2| E| IO| | S | 3 :+: 1| 4 to [ 2]| 1 XOR to [ 2] 3| | ? | | S | | 4 free | 1 XOR free - 4| SM_AMIGA_6_|NOD| | S | 3 | 4 to [ 4]| 1 XOR free - 5| cpu_est_1_|NOD| | S | 4 | 4 to [ 5]| 1 XOR free - 6|inst_CLK_000_D4|NOD| | S | 1 | 4 free | 1 XOR to [ 6] for 1 PT sig - 7| SM_AMIGA_2_|NOD| | S | 4 | 4 to [ 7]| 1 XOR free - 8| A0| IO| | S | 2 | 4 to [ 8]| 1 XOR free - 9| SM_AMIGA_3_|NOD| | S | 4 | 4 to [ 9]| 1 XOR free -10|inst_CLK_OUT_PRE|NOD| | S | 2 | 4 to [10]| 1 XOR free -11|inst_CLK_000_D3|NOD| | S | 1 | 4 free | 1 XOR to [11] for 1 PT sig + 4| cpu_est_1_|NOD| | S | 4 | 4 to [ 4]| 1 XOR free + 5| cpu_est_2_|NOD| | S | 3 :+: 1| 4 to [ 5]| 1 XOR to [ 5] + 6| SM_AMIGA_2_|NOD| | S | 3 | 4 to [ 6]| 1 XOR free + 7| SM_AMIGA_3_|NOD| | S | 4 | 4 to [ 7]| 1 XOR free + 8| A0| IO| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig + 9| | ? | | S | | 4 free | 1 XOR free +10| | ? | | S | | 4 free | 1 XOR free +11| | ? | | S | | 4 free | 1 XOR free 12| | ? | | S | | 4 free | 1 XOR free 13| | ? | | S | | 4 free | 1 XOR free -14| | ? | | S | | 4 free | 1 XOR free +14| SIZE_0_| IO| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== @@ -1455,22 +1446,22 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| SIZE_0_| IO| | S | 2 |=> can support up to [ 9] logic PT(s) - 1| CLK_DIV_OUT|OUT| | S | 1 |=> can support up to [ 10] logic PT(s) + 0| CLK_DIV_OUT|OUT| | S | 1 |=> can support up to [ 9] logic PT(s) + 1|inst_CLK_OUT_PRE_50|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) 2| E| IO| | S | 3 :+: 1|=> can support up to [ 13] logic PT(s) 3| | ? | | S | |=> can support up to [ 5] logic PT(s) - 4| SM_AMIGA_6_|NOD| | S | 3 |=> can support up to [ 14] logic PT(s) - 5| cpu_est_1_|NOD| | S | 4 |=> can support up to [ 9] logic PT(s) - 6|inst_CLK_000_D4|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) - 7| SM_AMIGA_2_|NOD| | S | 4 |=> can support up to [ 9] logic PT(s) - 8| A0| IO| | S | 2 |=> can support up to [ 5] logic PT(s) - 9| SM_AMIGA_3_|NOD| | S | 4 |=> can support up to [ 9] logic PT(s) -10|inst_CLK_OUT_PRE|NOD| | S | 2 |=> can support up to [ 14] logic PT(s) -11|inst_CLK_000_D3|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) + 4| cpu_est_1_|NOD| | S | 4 |=> can support up to [ 10] logic PT(s) + 5| cpu_est_2_|NOD| | S | 3 :+: 1|=> can support up to [ 4] logic PT(s) + 6| SM_AMIGA_2_|NOD| | S | 3 |=> can support up to [ 9] logic PT(s) + 7| SM_AMIGA_3_|NOD| | S | 4 |=> can support up to [ 14] logic PT(s) + 8| A0| IO| | S | 1 |=> can support up to [ 15] logic PT(s) + 9| | ? | | S | |=> can support up to [ 19] logic PT(s) +10| | ? | | S | |=> can support up to [ 20] logic PT(s) +11| | ? | | S | |=> can support up to [ 20] logic PT(s) 12| | ? | | S | |=> can support up to [ 19] logic PT(s) -13| | ? | | S | |=> can support up to [ 20] logic PT(s) -14| | ? | | S | |=> can support up to [ 15] logic PT(s) -15| | ? | | S | |=> can support up to [ 10] logic PT(s) +13| | ? | | S | |=> can support up to [ 19] logic PT(s) +14| SIZE_0_| IO| | S | 1 |=> can support up to [ 15] logic PT(s) +15| | ? | | S | |=> can support up to [ 9] logic PT(s) --------------------------------------------------------------------------- =========================================================================== < Block [ 6] > Node-Pin Assignments @@ -1480,21 +1471,21 @@ _|_________________|__|__|___|_____|_______________________________________ | Sig Type---+ | to | Block [ 6] IO Pin | Device Pin | Signal Name | | pin | Numbers | Numbers _|_________________|__|_____|____________________|________________________ - 0| SIZE_0_| IO| | => |( 5) 6 7 0 |( 70) 71 72 65 - 1| CLK_DIV_OUT|OUT| | => | 5 6 7 ( 0)| 70 71 72 ( 65) + 0| CLK_DIV_OUT|OUT| | => | 5 6 7 ( 0)| 70 71 72 ( 65) + 1|inst_CLK_OUT_PRE_50|NOD| | => | 5 6 7 0 | 70 71 72 65 2| E| IO| | => | 6 7 0 ( 1)| 71 72 65 ( 66) 3| | | | => | 6 7 0 1 | 71 72 65 66 - 4| SM_AMIGA_6_|NOD| | => | 7 0 1 2 | 72 65 66 67 - 5| cpu_est_1_|NOD| | => | 7 0 1 2 | 72 65 66 67 - 6|inst_CLK_000_D4|NOD| | => | 0 1 2 3 | 65 66 67 68 - 7| SM_AMIGA_2_|NOD| | => | 0 1 2 3 | 65 66 67 68 + 4| cpu_est_1_|NOD| | => | 7 0 1 2 | 72 65 66 67 + 5| cpu_est_2_|NOD| | => | 7 0 1 2 | 72 65 66 67 + 6| SM_AMIGA_2_|NOD| | => | 0 1 2 3 | 65 66 67 68 + 7| SM_AMIGA_3_|NOD| | => | 0 1 2 3 | 65 66 67 68 8| A0| IO| | => | 1 2 3 ( 4)| 66 67 68 ( 69) - 9| SM_AMIGA_3_|NOD| | => | 1 2 3 4 | 66 67 68 69 -10|inst_CLK_OUT_PRE|NOD| | => | 2 3 4 5 | 67 68 69 70 -11|inst_CLK_000_D3|NOD| | => | 2 3 4 5 | 67 68 69 70 + 9| | | | => | 1 2 3 4 | 66 67 68 69 +10| | | | => | 2 3 4 5 | 67 68 69 70 +11| | | | => | 2 3 4 5 | 67 68 69 70 12| | | | => | 3 4 5 6 | 68 69 70 71 13| | | | => | 3 4 5 6 | 68 69 70 71 -14| | | | => | 4 5 6 7 | 69 70 71 72 +14| SIZE_0_| IO| | => | 4 ( 5) 6 7 | 69 ( 70) 71 72 15| | | | => | 4 5 6 7 | 69 70 71 72 --------------------------------------------------------------------------- =========================================================================== @@ -1506,12 +1497,12 @@ _|_________________|__|_____|____________________|________________________ | Sig Type--+ | | | | Signal Name | | | | Node Destinations Via Output Matrix _|_________________|__|___|_____|___________________________________________ - 0| CLK_DIV_OUT|OUT|*| 65| => | 0 ( 1) 2 3 4 5 6 7 + 0| CLK_DIV_OUT|OUT|*| 65| => | ( 0) 1 2 3 4 5 6 7 1| E| IO|*| 66| => | ( 2) 3 4 5 6 7 8 9 2| IPL_0_|INP|*| 67| => | 4 5 6 7 8 9 10 11 3| IPL_2_|INP|*| 68| => | 6 7 8 9 10 11 12 13 4| A0| IO|*| 69| => | ( 8) 9 10 11 12 13 14 15 - 5| SIZE_0_| IO|*| 70| => | 10 11 12 13 14 15 ( 0) 1 + 5| SIZE_0_| IO|*| 70| => | 10 11 12 13 (14) 15 0 1 6| RW|INP|*| 71| => | 12 13 14 15 0 1 2 3 7| | | | 72| => | 14 15 0 1 2 3 4 5 --------------------------------------------------------------------------- @@ -1530,9 +1521,7 @@ _|_________________|__|___|_____|__________________________________________ 2| IPL_0_|INP|*| 67| => | Input macrocell [ -] 3| IPL_2_|INP|*| 68| => | Input macrocell [ -] 4| A0| IO|*| 69| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_A0] 5| SIZE_0_| IO|*| 70| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_SIZE_0_] 6| RW|INP|*| 71| => | Input macrocell [ -] 7| | | | 72| => | Input macrocell [ -] --------------------------------------------------------------------------- @@ -1547,8 +1536,8 @@ IMX No. | +---- Block IO Pin or Macrocell Number ---|-------|----|---|---|----------|------|-|------------------------------ 0 [IOpin 0 | 65|OUT CLK_DIV_OUT|*| ] [RegIn 0 |246| -| | ] - [MCell 0 |245|NOD RN_SIZE_0_| |*] paired w/[ SIZE_0_] - [MCell 1 |247|OUT CLK_DIV_OUT| | ] + [MCell 0 |245|OUT CLK_DIV_OUT| | ] + [MCell 1 |247|NOD inst_CLK_OUT_PRE_50| |*] 1 [IOpin 1 | 66| IO E|*| ] paired w/[ RN_E] [RegIn 1 |249| -| | ] @@ -1557,23 +1546,23 @@ IMX No. | +---- Block IO Pin or Macrocell Number 2 [IOpin 2 | 67|INP IPL_0_|*|*] [RegIn 2 |252| -| | ] - [MCell 4 |251|NOD SM_AMIGA_6_| |*] - [MCell 5 |253|NOD cpu_est_1_| |*] + [MCell 4 |251|NOD cpu_est_1_| |*] + [MCell 5 |253|NOD cpu_est_2_| |*] 3 [IOpin 3 | 68|INP IPL_2_|*|*] [RegIn 3 |255| -| | ] - [MCell 6 |254|NOD inst_CLK_000_D4| |*] - [MCell 7 |256|NOD SM_AMIGA_2_| |*] + [MCell 6 |254|NOD SM_AMIGA_2_| |*] + [MCell 7 |256|NOD SM_AMIGA_3_| |*] - 4 [IOpin 4 | 69| IO A0|*|*] paired w/[ RN_A0] + 4 [IOpin 4 | 69| IO A0|*|*] [RegIn 4 |258| -| | ] - [MCell 8 |257|NOD RN_A0| |*] paired w/[ A0] - [MCell 9 |259|NOD SM_AMIGA_3_| |*] + [MCell 8 |257| IO A0| | ] + [MCell 9 |259| -| | ] - 5 [IOpin 5 | 70| IO SIZE_0_|*|*] paired w/[ RN_SIZE_0_] + 5 [IOpin 5 | 70| IO SIZE_0_|*|*] [RegIn 5 |261| -| | ] - [MCell 10 |260|NOD inst_CLK_OUT_PRE| |*] - [MCell 11 |262|NOD inst_CLK_000_D3| |*] + [MCell 10 |260| -| | ] + [MCell 11 |262| -| | ] 6 [IOpin 6 | 71|INP RW|*|*] [RegIn 6 |264| -| | ] @@ -1582,7 +1571,7 @@ IMX No. | +---- Block IO Pin or Macrocell Number 7 [IOpin 7 | 72| -| | ] [RegIn 7 |267| -| | ] - [MCell 14 |266| -| | ] + [MCell 14 |266| IO SIZE_0_| | ] [MCell 15 |268| -| | ] --------------------------------------------------------------------------- =========================================================================== @@ -1592,38 +1581,38 @@ IMX No. | +---- Block IO Pin or Macrocell Number | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- Mux00| IOPin 3 4 ( 31)| LDS_000 -Mux01| Mcel 7 11 ( 286)| CLK_CNT_P_0_ -Mux02| Mcel 6 4 ( 251)| SM_AMIGA_6_ -Mux03| Mcel 6 5 ( 253)| cpu_est_1_ -Mux04| Input Pin ( 64)| CLK_030 -Mux05| Mcel 1 3 ( 130)| cpu_est_2_ -Mux06| ... | ... -Mux07| Mcel 3 5 ( 181)| inst_CLK_000_D0 -Mux08| Mcel 3 7 ( 184)| inst_CLK_000_D1 -Mux09| Mcel 6 11 ( 262)| inst_CLK_000_D3 -Mux10| Mcel 6 8 ( 257)| RN_A0 -Mux11| Mcel 7 3 ( 274)| inst_BGACK_030_INT_D +Mux01| Mcel 1 7 ( 136)| SM_AMIGA_4_ +Mux02| Mcel 7 14 ( 290)| inst_VPA_D +Mux03| Mcel 6 5 ( 253)| cpu_est_2_ +Mux04| Mcel 6 2 ( 248)| RN_E +Mux05| Mcel 3 12 ( 191)| inst_CLK_000_D0 +Mux06| Mcel 1 9 ( 139)| inst_CLK_OUT_PRE_25 +Mux07| Mcel 7 6 ( 278)| RN_AS_030 +Mux08| Mcel 6 7 ( 256)| SM_AMIGA_3_ +Mux09| Mcel 0 1 ( 103)| inst_DTACK_D0 +Mux10| Mcel 7 3 ( 274)| inst_CLK_000_D1 +Mux11| Mcel 6 4 ( 251)| cpu_est_1_ Mux12| IOPin 3 3 ( 32)| UDS_000 -Mux13| Mcel 7 5 ( 277)| inst_AS_030_000_SYNC -Mux14| Mcel 7 2 ( 272)| cpu_est_0_ +Mux13| Mcel 3 3 ( 178)| RN_VMA +Mux14| ... | ... Mux15| Input Pin ( 14)| nEXP_SPACE Mux16| ... | ... -Mux17| Mcel 6 0 ( 245)| RN_SIZE_0_ +Mux17| Mcel 1 8 ( 137)| cpu_est_0_ Mux18| ... | ... -Mux19| Mcel 7 13 ( 289)| inst_CLK_000_D2 -Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 -Mux21| Mcel 0 1 ( 103)| SM_AMIGA_7_ -Mux22| Mcel 6 10 ( 260)| inst_CLK_OUT_PRE -Mux23| IOPin 3 2 ( 33)| AS_000 -Mux24| Input Pin ( 86)| RST -Mux25| Mcel 3 9 ( 187)| SM_AMIGA_4_ -Mux26| Mcel 6 7 ( 256)| SM_AMIGA_2_ -Mux27| Mcel 6 9 ( 259)| SM_AMIGA_3_ -Mux28| Mcel 1 5 ( 133)| inst_VPA_SYNC +Mux19| ... | ... +Mux20| ... | ... +Mux21| Input Pin ( 86)| RST +Mux22| ... | ... +Mux23| Mcel 6 6 ( 254)| SM_AMIGA_2_ +Mux24| Mcel 6 1 ( 247)| inst_CLK_OUT_PRE_50 +Mux25| ... | ... +Mux26| IOPin 3 2 ( 33)| AS_000 +Mux27| Mcel 7 5 ( 277)| RN_BGACK_030 +Mux28| ... | ... Mux29| ... | ... -Mux30| Mcel 7 6 ( 278)| RN_AS_030 -Mux31| Mcel 6 2 ( 248)| RN_E -Mux32| Mcel 1 7 ( 136)| inst_DTACK_SYNC +Mux30| ... | ... +Mux31| ... | ... +Mux32| ... | ... --------------------------------------------------------------------------- =========================================================================== < Block [ 7] > Macrocell (MCell) Cluster Assignments @@ -1635,21 +1624,21 @@ Mux32| Mcel 1 7 ( 136)| inst_DTACK_SYNC | Sig Type-+ | | | | | | | XOR to Mcell Assignment | Signal Name | | | | | | | | | _|_________________|__|__|___|_____|__|______|___|__________|______________ - 0| SIZE_1_| IO| | S | 3 | 4 to [ 0]| 1 XOR free + 0| SIZE_1_| IO| | S | 2 | 4 to [ 0]| 1 XOR free 1| FPU_CS| IO| | S | 2 | 4 to [ 1]| 1 XOR free - 2| cpu_est_0_|NOD| | S | 3 | 4 to [ 2]| 1 XOR free - 3|inst_BGACK_030_INT_D|NOD| | S | 1 | 4 to [ 4]| 1 XOR to [ 3] for 1 PT sig - 4| BGACK_030| IO| | S | 2 | 4 to [ 5]| 1 XOR free - 5|inst_AS_030_000_SYNC|NOD| | S | 7 | 4 to [ 5]| 1 XOR to [ 5] as logic PT - 6| AS_030| IO| | S | 3 | 4 to [ 6]| 1 XOR free - 7| SM_AMIGA_1_|NOD| | S | 4 | 4 to [ 7]| 1 XOR free - 8| DSACK_1_| IO| | S | 2 | 4 to [ 8]| 1 XOR free - 9| | ? | | S | | 4 free | 1 XOR free -10| DSACK_0_|OUT| | S | 1 | 4 free | 1 XOR to [10] for 1 PT sig -11| CLK_CNT_P_0_|NOD| | S | 1 | 4 free | 1 XOR to [11] for 1 PT sig -12|inst_CLK_000_D5|NOD| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig -13|inst_CLK_000_D2|NOD| | S | 1 | 4 free | 1 XOR to [13] for 1 PT sig -14| | ? | | S | | 4 free | 1 XOR free + 2|inst_CLK_000_D3|NOD| | S | 1 | 4 free | 1 XOR to [ 2] for 1 PT sig + 3|inst_CLK_000_D1|NOD| | S | 1 | 4 free | 1 XOR to [ 3] for 1 PT sig + 4| | ? | | S | | 4 free | 1 XOR free + 5| BGACK_030| IO| | S | 2 | 4 to [ 5]| 1 XOR free + 6| AS_030| IO| | S | 4 | 4 to [ 6]| 1 XOR free + 7| SM_AMIGA_6_|NOD| | S | 2 | 4 to [ 7]| 1 XOR free + 8|inst_CLK_000_D4|NOD| | S | 1 | 4 free | 1 XOR to [ 8] for 1 PT sig + 9|inst_AS_030_000_SYNC|NOD| | S | 8 | 4 to [ 9]| 1 XOR to [ 9] as logic PT +10| DSACK_0_|OUT| | S | 1 | 4 to [ 9]| 1 XOR to [10] for 1 PT sig +11| DSACK_1_| IO| | S | 2 | 4 to [11]| 1 XOR free +12|inst_CLK_000_D2|NOD| | S | 1 | 4 free | 1 XOR to [12] for 1 PT sig +13| | ? | | S | | 4 free | 1 XOR free +14| inst_VPA_D|NOD| | S | 1 | 4 free | 1 XOR to [14] for 1 PT sig 15| | ? | | S | | 4 free | 1 XOR free --------------------------------------------------------------------------- =========================================================================== @@ -1662,22 +1651,22 @@ _|_________________|__|__|___|_____|__|______|___|__________|______________ | Sig Type-+ | | | | | Signal Name | | | | | Maximum PT Capacity _|_________________|__|__|___|_____|_______________________________________ - 0| SIZE_1_| IO| | S | 3 |=> can support up to [ 5] logic PT(s) - 1| FPU_CS| IO| | S | 2 |=> can support up to [ 5] logic PT(s) - 2| cpu_est_0_|NOD| | S | 3 |=> can support up to [ 5] logic PT(s) - 3|inst_BGACK_030_INT_D|NOD| | S | 1 |=> can support up to [ 1] logic PT(s) - 4| BGACK_030| IO| | S | 2 |=> can support up to [ 4] logic PT(s) - 5|inst_AS_030_000_SYNC|NOD| | S | 7 |=> can support up to [ 10] logic PT(s) - 6| AS_030| IO| | S | 3 |=> can support up to [ 5] logic PT(s) - 7| SM_AMIGA_1_|NOD| | S | 4 |=> can support up to [ 10] logic PT(s) - 8| DSACK_1_| IO| | S | 2 |=> can support up to [ 14] logic PT(s) - 9| | ? | | S | |=> can support up to [ 13] logic PT(s) -10| DSACK_0_|OUT| | S | 1 |=> can support up to [ 18] logic PT(s) -11| CLK_CNT_P_0_|NOD| | S | 1 |=> can support up to [ 17] logic PT(s) -12|inst_CLK_000_D5|NOD| | S | 1 |=> can support up to [ 18] logic PT(s) -13|inst_CLK_000_D2|NOD| | S | 1 |=> can support up to [ 19] logic PT(s) -14| | ? | | S | |=> can support up to [ 14] logic PT(s) -15| | ? | | S | |=> can support up to [ 10] logic PT(s) + 0| SIZE_1_| IO| | S | 2 |=> can support up to [ 9] logic PT(s) + 1| FPU_CS| IO| | S | 2 |=> can support up to [ 13] logic PT(s) + 2|inst_CLK_000_D3|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) + 3|inst_CLK_000_D1|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) + 4| | ? | | S | |=> can support up to [ 9] logic PT(s) + 5| BGACK_030| IO| | S | 2 |=> can support up to [ 10] logic PT(s) + 6| AS_030| IO| | S | 4 |=> can support up to [ 9] logic PT(s) + 7| SM_AMIGA_6_|NOD| | S | 2 |=> can support up to [ 9] logic PT(s) + 8|inst_CLK_000_D4|NOD| | S | 1 |=> can support up to [ 5] logic PT(s) + 9|inst_AS_030_000_SYNC|NOD| | S | 8 |=> can support up to [ 13] logic PT(s) +10| DSACK_0_|OUT| | S | 1 |=> can support up to [ 5] logic PT(s) +11| DSACK_1_| IO| | S | 2 |=> can support up to [ 14] logic PT(s) +12|inst_CLK_000_D2|NOD| | S | 1 |=> can support up to [ 14] logic PT(s) +13| | ? | | S | |=> can support up to [ 18] logic PT(s) +14| inst_VPA_D|NOD| | S | 1 |=> can support up to [ 15] logic PT(s) +15| | ? | | S | |=> can support up to [ 9] logic PT(s) --------------------------------------------------------------------------- =========================================================================== < Block [ 7] > Node-Pin Assignments @@ -1689,19 +1678,19 @@ _|_________________|__|__|___|_____|_______________________________________ _|_________________|__|_____|____________________|________________________ 0| SIZE_1_| IO| | => | 5 ( 6) 7 0 | 80 ( 79) 78 85 1| FPU_CS| IO| | => | 5 6 ( 7) 0 | 80 79 ( 78) 85 - 2| cpu_est_0_|NOD| | => | 6 7 0 1 | 79 78 85 84 - 3|inst_BGACK_030_INT_D|NOD| | => | 6 7 0 1 | 79 78 85 84 - 4| BGACK_030| IO| | => | 7 0 1 ( 2)| 78 85 84 ( 83) - 5|inst_AS_030_000_SYNC|NOD| | => | 7 0 1 2 | 78 85 84 83 + 2|inst_CLK_000_D3|NOD| | => | 6 7 0 1 | 79 78 85 84 + 3|inst_CLK_000_D1|NOD| | => | 6 7 0 1 | 79 78 85 84 + 4| | | | => | 7 0 1 2 | 78 85 84 83 + 5| BGACK_030| IO| | => | 7 0 1 ( 2)| 78 85 84 ( 83) 6| AS_030| IO| | => | 0 1 2 ( 3)| 85 84 83 ( 82) - 7| SM_AMIGA_1_|NOD| | => | 0 1 2 3 | 85 84 83 82 - 8| DSACK_1_| IO| | => | 1 2 3 ( 4)| 84 83 82 ( 81) - 9| | | | => | 1 2 3 4 | 84 83 82 81 + 7| SM_AMIGA_6_|NOD| | => | 0 1 2 3 | 85 84 83 82 + 8|inst_CLK_000_D4|NOD| | => | 1 2 3 4 | 84 83 82 81 + 9|inst_AS_030_000_SYNC|NOD| | => | 1 2 3 4 | 84 83 82 81 10| DSACK_0_|OUT| | => | 2 3 4 ( 5)| 83 82 81 ( 80) -11| CLK_CNT_P_0_|NOD| | => | 2 3 4 5 | 83 82 81 80 -12|inst_CLK_000_D5|NOD| | => | 3 4 5 6 | 82 81 80 79 -13|inst_CLK_000_D2|NOD| | => | 3 4 5 6 | 82 81 80 79 -14| | | | => | 4 5 6 7 | 81 80 79 78 +11| DSACK_1_| IO| | => | 2 3 ( 4) 5 | 83 82 ( 81) 80 +12|inst_CLK_000_D2|NOD| | => | 3 4 5 6 | 82 81 80 79 +13| | | | => | 3 4 5 6 | 82 81 80 79 +14| inst_VPA_D|NOD| | => | 4 5 6 7 | 81 80 79 78 15| | | | => | 4 5 6 7 | 81 80 79 78 --------------------------------------------------------------------------- =========================================================================== @@ -1715,9 +1704,9 @@ _|_________________|__|_____|____________________|________________________ _|_________________|__|___|_____|___________________________________________ 0| A_22_|INP|*| 85| => | 0 1 2 3 4 5 6 7 1| A_23_|INP|*| 84| => | 2 3 4 5 6 7 8 9 - 2| BGACK_030| IO|*| 83| => | ( 4) 5 6 7 8 9 10 11 + 2| BGACK_030| IO|*| 83| => | 4 ( 5) 6 7 8 9 10 11 3| AS_030| IO|*| 82| => | ( 6) 7 8 9 10 11 12 13 - 4| DSACK_1_| IO|*| 81| => | ( 8) 9 10 11 12 13 14 15 + 4| DSACK_1_| IO|*| 81| => | 8 9 10 (11) 12 13 14 15 5| DSACK_0_|OUT|*| 80| => | (10) 11 12 13 14 15 0 1 6| SIZE_1_| IO|*| 79| => | 12 13 14 15 ( 0) 1 2 3 7| FPU_CS| IO|*| 78| => | 14 15 0 ( 1) 2 3 4 5 @@ -1741,7 +1730,6 @@ _|_________________|__|___|_____|__________________________________________ | | | | | | IO paired w/ node [ RN_DSACK_1_] 5| DSACK_0_|OUT|*| 80| => | Input macrocell [ -] 6| SIZE_1_| IO|*| 79| => | Input macrocell [ -] - | | | | | | IO paired w/ node [ RN_SIZE_1_] 7| FPU_CS| IO|*| 78| => | Input macrocell [ -] | | | | | | IO paired w/ node [ RN_FPU_CS] --------------------------------------------------------------------------- @@ -1756,42 +1744,42 @@ IMX No. | +---- Block IO Pin or Macrocell Number ---|-------|----|---|---|----------|------|-|------------------------------ 0 [IOpin 0 | 85|INP A_22_|*|*] [RegIn 0 |270| -| | ] - [MCell 0 |269|NOD RN_SIZE_1_| |*] paired w/[ SIZE_1_] + [MCell 0 |269| IO SIZE_1_| | ] [MCell 1 |271|NOD RN_FPU_CS| |*] paired w/[ FPU_CS] 1 [IOpin 1 | 84|INP A_23_|*|*] [RegIn 1 |273| -| | ] - [MCell 2 |272|NOD cpu_est_0_| |*] - [MCell 3 |274|NOD inst_BGACK_030_INT_D| |*] + [MCell 2 |272|NOD inst_CLK_000_D3| |*] + [MCell 3 |274|NOD inst_CLK_000_D1| |*] 2 [IOpin 2 | 83| IO BGACK_030|*| ] paired w/[ RN_BGACK_030] [RegIn 2 |276| -| | ] - [MCell 4 |275|NOD RN_BGACK_030| |*] paired w/[ BGACK_030] - [MCell 5 |277|NOD inst_AS_030_000_SYNC| |*] + [MCell 4 |275| -| | ] + [MCell 5 |277|NOD RN_BGACK_030| |*] paired w/[ BGACK_030] 3 [IOpin 3 | 82| IO AS_030|*|*] paired w/[ RN_AS_030] [RegIn 3 |279| -| | ] [MCell 6 |278|NOD RN_AS_030| |*] paired w/[ AS_030] - [MCell 7 |280|NOD SM_AMIGA_1_| |*] + [MCell 7 |280|NOD SM_AMIGA_6_| |*] 4 [IOpin 4 | 81| IO DSACK_1_|*|*] paired w/[ RN_DSACK_1_] [RegIn 4 |282| -| | ] - [MCell 8 |281|NOD RN_DSACK_1_| |*] paired w/[ DSACK_1_] - [MCell 9 |283| -| | ] + [MCell 8 |281|NOD inst_CLK_000_D4| |*] + [MCell 9 |283|NOD inst_AS_030_000_SYNC| |*] 5 [IOpin 5 | 80|OUT DSACK_0_|*| ] [RegIn 5 |285| -| | ] [MCell 10 |284|OUT DSACK_0_| | ] - [MCell 11 |286|NOD CLK_CNT_P_0_| |*] + [MCell 11 |286|NOD RN_DSACK_1_| |*] paired w/[ DSACK_1_] - 6 [IOpin 6 | 79| IO SIZE_1_|*|*] paired w/[ RN_SIZE_1_] + 6 [IOpin 6 | 79| IO SIZE_1_|*|*] [RegIn 6 |288| -| | ] - [MCell 12 |287|NOD inst_CLK_000_D5| |*] - [MCell 13 |289|NOD inst_CLK_000_D2| |*] + [MCell 12 |287|NOD inst_CLK_000_D2| |*] + [MCell 13 |289| -| | ] 7 [IOpin 7 | 78| IO FPU_CS|*| ] paired w/[ RN_FPU_CS] [RegIn 7 |291| -| | ] - [MCell 14 |290| -| | ] + [MCell 14 |290|NOD inst_VPA_D| |*] [MCell 15 |292| -| | ] --------------------------------------------------------------------------- =========================================================================== @@ -1800,37 +1788,37 @@ IMX No. | +---- Block IO Pin or Macrocell Number +- Central Switch Matrix No. | Src (ABEL Node/Pin#) Signal --|--|--------------------|--------------------------------------------------- -Mux00| IOPin 3 4 ( 31)| LDS_000 +Mux00| Input Pin ( 86)| RST Mux01| IOPin 5 2 ( 58)| FC_1_ -Mux02| Mcel 6 4 ( 251)| SM_AMIGA_6_ -Mux03| Mcel 7 8 ( 281)| RN_DSACK_1_ -Mux04| Mcel 7 5 ( 277)| inst_AS_030_000_SYNC -Mux05| Input Pin ( 14)| nEXP_SPACE +Mux02| Mcel 1 10 ( 140)| SM_AMIGA_1_ +Mux03| Mcel 7 8 ( 281)| inst_CLK_000_D4 +Mux04| Input Pin ( 64)| CLK_030 +Mux05| Mcel 7 9 ( 283)| inst_AS_030_000_SYNC Mux06| IOPin 0 5 ( 96)| A_16_ -Mux07| Mcel 7 7 ( 280)| SM_AMIGA_1_ -Mux08| Mcel 3 7 ( 184)| inst_CLK_000_D1 -Mux09| Mcel 0 1 ( 103)| SM_AMIGA_7_ -Mux10| Mcel 7 3 ( 274)| inst_BGACK_030_INT_D -Mux11| Mcel 3 5 ( 181)| inst_CLK_000_D0 -Mux12| IOPin 3 3 ( 32)| UDS_000 +Mux07| Mcel 0 11 ( 118)| SM_AMIGA_7_ +Mux08| IOPin 3 3 ( 32)| UDS_000 +Mux09| IOPin 7 3 ( 82)| AS_030 +Mux10| Input Pin ( 36)| VPA +Mux11| Mcel 3 12 ( 191)| inst_CLK_000_D0 +Mux12| IOPin 0 6 ( 97)| A_19_ Mux13| IOPin 5 1 ( 59)| A_17_ -Mux14| Mcel 7 2 ( 272)| cpu_est_0_ -Mux15| Mcel 7 12 ( 287)| inst_CLK_000_D5 +Mux14| Mcel 7 11 ( 286)| RN_DSACK_1_ +Mux15| Input Pin ( 14)| nEXP_SPACE Mux16| ... | ... Mux17| IOPin 5 3 ( 57)| FC_0_ -Mux18| IOPin 3 7 ( 28)| BGACK_000 +Mux18| Mcel 7 3 ( 274)| inst_CLK_000_D1 Mux19| Mcel 7 1 ( 271)| RN_FPU_CS -Mux20| Mcel 7 4 ( 275)| RN_BGACK_030 +Mux20| Mcel 7 7 ( 280)| SM_AMIGA_6_ Mux21| Mcel 7 6 ( 278)| RN_AS_030 -Mux22| Mcel 7 11 ( 286)| CLK_CNT_P_0_ +Mux22| ... | ... Mux23| IOPin 3 2 ( 33)| AS_000 -Mux24| Input Pin ( 86)| RST +Mux24| IOPin 3 4 ( 31)| LDS_000 Mux25| ... | ... -Mux26| Mcel 6 7 ( 256)| SM_AMIGA_2_ -Mux27| IOPin 0 6 ( 97)| A_19_ -Mux28| Input Pin ( 64)| CLK_030 -Mux29| Mcel 6 6 ( 254)| inst_CLK_000_D4 -Mux30| Mcel 7 0 ( 269)| RN_SIZE_1_ +Mux26| ... | ... +Mux27| Mcel 7 5 ( 277)| RN_BGACK_030 +Mux28| Mcel 7 2 ( 272)| inst_CLK_000_D3 +Mux29| Mcel 7 12 ( 287)| inst_CLK_000_D2 +Mux30| ... | ... Mux31| IOPin 0 4 ( 95)| A_18_ -Mux32| IOPin 7 3 ( 82)| AS_030 +Mux32| IOPin 3 7 ( 28)| BGACK_000 --------------------------------------------------------------------------- \ No newline at end of file diff --git a/Logic/68030_tk.rpt b/Logic/68030_tk.rpt index 127103c..1e4b137 100644 --- a/Logic/68030_tk.rpt +++ b/Logic/68030_tk.rpt @@ -12,7 +12,7 @@ Project_Summary Project Name : 68030_tk Project Path : C:\Users\Matze\Documents\GitHub\68030tk\Logic -Project Fitted on : Sun May 25 21:18:55 2014 +Project Fitted on : Wed May 28 21:25:00 2014 Device : M4A5-128/64 Package : 100TQFP @@ -41,7 +41,7 @@ Design_Summary Total Output Pins : 19 Total Bidir I/O Pins : 10 Total Flip-Flops : 45 - Total Product Terms : 140 + Total Product Terms : 136 Total Reserved Pins : 0 Total Reserved Blocks : 0 @@ -58,9 +58,9 @@ Logic Macrocells 128 53 75 --> 41% Input Registers 64 0 64 --> 0% Unusable Macrocells .. 0 .. -CSM Outputs/Total Block Inputs 264 153 111 --> 57% -Logical Product Terms 640 143 497 --> 22% -Product Term Clusters 128 40 88 --> 31% +CSM Outputs/Total Block Inputs 264 142 122 --> 53% +Logical Product Terms 640 139 501 --> 21% +Product Term Clusters 128 37 91 --> 28%  Blocks_Resource_Summary @@ -71,14 +71,14 @@ Blocks_Resource_Summary --------------------------------------------------------------------------------- Maximum 33 8 8 -- -- 16 80 16 - --------------------------------------------------------------------------------- -Block A 22 7 0 4 0 12 16 12 Lo -Block B 23 8 0 9 0 7 20 10 Lo +Block A 21 7 0 6 0 10 20 12 Lo +Block B 21 8 0 10 0 6 26 8 Lo Block C 1 8 0 2 0 14 2 16 Lo -Block D 31 8 0 11 0 5 42 4 Lo -Block E 16 3 0 3 0 13 4 15 Lo +Block D 33 8 0 10 0 6 36 5 Lo +Block E 17 3 0 3 0 13 4 15 Lo Block F 0 4 0 0 0 16 0 16 Lo -Block G 29 7 0 11 0 5 28 8 Lo -Block H 31 8 0 13 0 3 31 7 Lo +Block G 21 7 0 9 0 7 23 11 Lo +Block H 28 8 0 13 0 3 28 8 Lo --------------------------------------------------------------------------------- Four rightmost columns above reflect last status of the placement process. @@ -313,9 +313,9 @@ Pin Blk PTs Type e s E Fanout Pwr Slew Signal 71 G . I/O A--DE--- Low Slow RW 11 . . Ck/I ---D---- - Slow CLK_000 14 . . Ck/I A--DE-GH - Slow nEXP_SPACE - 36 . . Ded -B------ - Slow VPA + 36 . . Ded -------H - Slow VPA 61 . . Ck/I AB-D--GH - Slow CLK_OSZI - 64 . . Ck/I A-----GH - Slow CLK_030 + 64 . . Ck/I A------H - Slow CLK_030 86 . . Ded AB-D--GH - Slow RST ---------------------------------------------------------------------- @@ -333,7 +333,7 @@ Output_Signal_List Pin Blk PTs Type e s E Fanout Pwr Slew Signal ---------------------------------------------------------------------- 48 E 2 COM -------- Low Slow AMIGA_BUS_DATA_DIR - 34 D 7 DFF * -------- Low Slow AMIGA_BUS_ENABLE + 34 D 6 DFF * -------- Low Slow AMIGA_BUS_ENABLE 20 C 1 COM -------- Low Slow AMIGA_BUS_ENABLE_LOW 92 A 1 COM -------- Low Slow AVEC 22 C 1 COM -------- Low Slow AVEC_EXP @@ -350,7 +350,7 @@ Pin Blk PTs Type e s E Fanout Pwr Slew Signal 7 B 3 DFF * -------- Low Slow IPL_030_1_ 9 B 3 DFF * -------- Low Slow IPL_030_2_ 3 B 1 DFF * -------- Low Slow RESET - 35 D 4 DFF * -------- Low Slow VMA + 35 D 2 DFF * -------- Low Slow VMA ---------------------------------------------------------------------- Power : Hi = High @@ -366,15 +366,15 @@ Bidir_Signal_List Pin r e O Bidir Pin Blk PTs Type e s E Fanout Pwr Slew Signal ---------------------------------------------------------------------- - 69 G 2 DFF * ---D---- Low Slow A0 - 33 D 2 DFF * A-----GH Low Slow AS_000 - 82 H 3 DFF * -B-D---H Low Slow AS_030 + 69 G 1 DFF * ---D---- Low Slow A0 + 33 D 2 DFF * A---E-GH Low Slow AS_000 + 82 H 4 DFF * ---D---H Low Slow AS_030 81 H 2 DFF * ---D---- Low Slow DSACK_1_ - 98 A 5 DFF * ---D---- Low Slow DS_030 - 30 D 1 COM -B------ Low Slow DTACK + 98 A 7 DFF * ---D---- Low Slow DS_030 + 30 D 1 COM A------- Low Slow DTACK 31 D 11 DFF * A-----GH Low Slow LDS_000 - 70 G 2 DFF * ---D---- Low Slow SIZE_0_ - 79 H 3 DFF * ---D---- Low Slow SIZE_1_ + 70 G 1 DFF * ---D---- Low Slow SIZE_0_ + 79 H 2 DFF * ---D---- Low Slow SIZE_1_ 32 D 7 DFF * A-----GH Low Slow UDS_000 ---------------------------------------------------------------------- @@ -391,48 +391,45 @@ Buried_Signal_List Pin r e O Node #Mc Blk PTs Type e s E Fanout Pwr Slew Signal ---------------------------------------------------------------------- - H11 H 1 DFF * ------GH Low Slow CLK_CNT_P_0_ - G8 G 2 DFF * ------G- Low - RN_A0 --> A0 - D2 D 7 DFF * ---D---- Low - RN_AMIGA_BUS_ENABLE --> AMIGA_BUS_ENABLE - D4 D 2 DFF * A--D---- Low - RN_AS_000 --> AS_000 - H6 H 3 DFF * A--D--GH Low - RN_AS_030 --> AS_030 - H4 H 2 DFF * AB-DE-GH Low - RN_BGACK_030 --> BGACK_030 - D3 D 2 DFF * ---D---- Low - RN_BG_000 --> BG_000 - H8 H 2 DFF * -------H Low - RN_DSACK_1_ --> DSACK_1_ - A4 A 5 DFF * A------- Low - RN_DS_030 --> DS_030 - G2 G 3 DFF * -B----G- Low - RN_E --> E + D7 D 6 DFF * ---D---- Low - RN_AMIGA_BUS_ENABLE --> AMIGA_BUS_ENABLE + D5 D 2 DFF * AB-D---- Low - RN_AS_000 --> AS_000 + H6 H 4 DFF * A--D--GH Low - RN_AS_030 --> AS_030 + H5 H 2 DFF * A--DE-GH Low - RN_BGACK_030 --> BGACK_030 + D1 D 2 DFF * ---D---- Low - RN_BG_000 --> BG_000 + H11 H 2 DFF * -------H Low - RN_DSACK_1_ --> DSACK_1_ + A5 A 7 DFF * A------- Low - RN_DS_030 --> DS_030 + G2 G 3 DFF * ---D--G- Low - RN_E --> E H1 H 2 DFF * --C-E--H Low - RN_FPU_CS --> FPU_CS B4 B 3 DFF * -B------ Low - RN_IPL_030_0_ --> IPL_030_0_ B6 B 3 DFF * -B------ Low - RN_IPL_030_1_ --> IPL_030_1_ B2 B 3 DFF * -B------ Low - RN_IPL_030_2_ --> IPL_030_2_ - D10 D 11 DFF * ---D---- Low - RN_LDS_000 --> LDS_000 - G0 G 2 DFF * ------G- Low - RN_SIZE_0_ --> SIZE_0_ - H0 H 3 DFF * -------H Low - RN_SIZE_1_ --> SIZE_1_ + D9 D 11 DFF * ---D---- Low - RN_LDS_000 --> LDS_000 D6 D 7 DFF * ---D---- Low - RN_UDS_000 --> UDS_000 - D1 D 4 DFF * -B-D---- Low - RN_VMA --> VMA - A3 A 3 DFF * A--D---- Low Slow SM_AMIGA_0_ - H7 H 4 DFF * A--D---H Low Slow SM_AMIGA_1_ - G7 G 4 DFF * ------GH Low Slow SM_AMIGA_2_ - G9 G 4 DFF * -B----G- Low Slow SM_AMIGA_3_ - D9 D 3 DFF * ---D--G- Low Slow SM_AMIGA_4_ - D11 D 3 DFF * ---D---- Low Slow SM_AMIGA_5_ - G4 G 3 DFF * A--D--GH Low Slow SM_AMIGA_6_ - A1 A 6 DFF * A--D--GH Low Slow SM_AMIGA_7_ - H2 H 3 DFF * -B-D--GH Low Slow cpu_est_0_ - G5 G 4 TFF * -B-D--G- Low Slow cpu_est_1_ - B3 B 3 DFF * -B----G- Low Slow cpu_est_2_ - H5 H 7 DFF * A-----GH Low Slow inst_AS_030_000_SYNC - H3 H 1 DFF * A--D--GH Low Slow inst_BGACK_030_INT_D - D5 D 1 DFF * AB-D--GH Low Slow inst_CLK_000_D0 - D7 D 1 DFF * -B----GH Low Slow inst_CLK_000_D1 - H13 H 1 DFF * A-----G- Low Slow inst_CLK_000_D2 - G11 G 1 DFF * A-----G- Low Slow inst_CLK_000_D3 - G6 G 1 DFF * A--D---H Low Slow inst_CLK_000_D4 - H12 H 1 DFF * A------H Low Slow inst_CLK_000_D5 - G10 G 2 DFF * -B----G- Low Slow inst_CLK_OUT_PRE - B7 B 2 DFF * -B----G- Low Slow inst_DTACK_SYNC - B8 B 1 DFF * -B-D---- Low Slow inst_VPA_D - B5 B 2 DFF * -B----G- Low Slow inst_VPA_SYNC + D3 D 2 DFF * ---D--G- Low - RN_VMA --> VMA + B5 B 4 DFF * AB-D---- Low Slow SM_AMIGA_0_ + B10 B 3 DFF * -B-D---H Low Slow SM_AMIGA_1_ + G6 G 3 DFF * -B----G- Low Slow SM_AMIGA_2_ + G7 G 4 DFF * ------G- Low Slow SM_AMIGA_3_ + B7 B 2 DFF * -B-D--G- Low Slow SM_AMIGA_4_ + D2 D 2 DFF * -B-D---- Low Slow SM_AMIGA_5_ + H7 H 2 DFF * A--D---H Low Slow SM_AMIGA_6_ + A11 A 5 DFF * A--D---H Low Slow SM_AMIGA_7_ + B8 B 3 DFF * -B-D--G- Low Slow cpu_est_0_ + G4 G 4 TFF * ---D--G- Low Slow cpu_est_1_ + G5 G 3 DFF * ---D--G- Low Slow cpu_est_2_ + H9 H 8 DFF * A------H Low Slow inst_AS_030_000_SYNC + D10 D 1 DFF * ---D---- Low Slow inst_BGACK_030_INT_D + D12 D 1 DFF * AB-D--GH Low Slow inst_CLK_000_D0 + H3 H 1 DFF * -B----GH Low Slow inst_CLK_000_D1 + H12 H 1 DFF * A------H Low Slow inst_CLK_000_D2 + H2 H 1 DFF * AB-----H Low Slow inst_CLK_000_D3 + H8 H 1 DFF * -B-D---H Low Slow inst_CLK_000_D4 + A0 A 5 DFF A------- Low Slow inst_CLK_030_H + B9 B 3 DFF * -B----G- Low Slow inst_CLK_OUT_PRE_25 + G1 G 1 DFF * AB----G- Low Slow inst_CLK_OUT_PRE_50 + A3 A 1 DFF * -B------ Low Slow inst_CLK_OUT_PRE_50_D + A1 A 1 DFF * ------G- Low Slow inst_DTACK_D0 + H14 H 1 DFF * ---D--G- Low Slow inst_VPA_D ---------------------------------------------------------------------- Power : Hi = High @@ -447,144 +444,139 @@ Signals_Fanout_List ~~~~~~~~~~~~~~~~~~~ Signal Source : Fanout List ----------------------------------------------------------------------------- + A_21_{ B}: CIIN{ E} + A_20_{ B}: CIIN{ E} + A_19_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} + A_18_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} A_31_{ C}: CIIN{ E} + A_17_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} + A_16_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} IPL_2_{ H}: IPL_030_2_{ B} + IPL_1_{ G}: IPL_030_1_{ B} + IPL_0_{ H}: IPL_030_0_{ B} + FC_0_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} FC_1_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} + nEXP_SPACE{. }: DSACK_0_{ H} DTACK{ D}AMIGA_BUS_DATA_DIR{ E} + : SIZE_1_{ H} DSACK_1_{ H} AS_030{ H} + : DS_030{ A} A0{ G} BG_000{ D} + :AMIGA_BUS_ENABLE{ D} SIZE_0_{ G}inst_AS_030_000_SYNC{ H} + : SM_AMIGA_6_{ H} SM_AMIGA_7_{ A} + BG_030{ D}: BG_000{ D} + BGACK_000{ E}: BGACK_030{ H} FPU_CS{ H}inst_AS_030_000_SYNC{ H} + CLK_030{. }: AS_030{ H} DS_030{ A} FPU_CS{ H} + :inst_AS_030_000_SYNC{ H} inst_CLK_030_H{ A} + CLK_000{. }: BG_000{ D}inst_CLK_000_D0{ D} + DTACK{ E}: inst_DTACK_D0{ A} + VPA{. }: inst_VPA_D{ H} + RST{. }: CLK_DIV_OUT{ G} SIZE_1_{ H} IPL_030_2_{ B} + : IPL_030_1_{ B} IPL_030_0_{ B} DSACK_1_{ H} + : AS_030{ H} AS_000{ D} DS_030{ A} + : UDS_000{ D} LDS_000{ D} A0{ G} + : BG_000{ D} BGACK_030{ H} CLK_EXP{ B} + : FPU_CS{ H} E{ G} VMA{ D} + : RESET{ B}AMIGA_BUS_ENABLE{ D} SIZE_0_{ G} + :inst_AS_030_000_SYNC{ H}inst_BGACK_030_INT_D{ D} inst_VPA_D{ H} + :inst_CLK_OUT_PRE_50_D{ A}inst_CLK_000_D0{ D}inst_CLK_000_D1{ H} + :inst_CLK_000_D2{ H}inst_CLK_000_D4{ H} inst_DTACK_D0{ A} + :inst_CLK_OUT_PRE_50{ G}inst_CLK_OUT_PRE_25{ B} SM_AMIGA_1_{ B} + : SM_AMIGA_0_{ B} SM_AMIGA_6_{ H} SM_AMIGA_5_{ D} + :inst_CLK_000_D3{ H} inst_CLK_030_H{ A} SM_AMIGA_7_{ A} + : SM_AMIGA_4_{ B} SM_AMIGA_3_{ G} SM_AMIGA_2_{ G} + : cpu_est_0_{ B} cpu_est_1_{ G} cpu_est_2_{ G} + RW{ H}:AMIGA_BUS_DATA_DIR{ E} DS_030{ A} UDS_000{ D} + : LDS_000{ D} A_30_{ C}: CIIN{ E} A_29_{ C}: CIIN{ E} A_28_{ D}: CIIN{ E} A_27_{ D}: CIIN{ E} - nEXP_SPACE{. }: DTACK{ D} DSACK_0_{ H}AMIGA_BUS_DATA_DIR{ E} - : SIZE_1_{ H} DSACK_1_{ H} AS_030{ H} - : SIZE_0_{ G} DS_030{ A} A0{ G} - : BG_000{ D}AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ H} - : SM_AMIGA_7_{ A} SM_AMIGA_6_{ G} A_26_{ D}: CIIN{ E} A_25_{ D}: CIIN{ E} - BG_030{ D}: BG_000{ D} A_24_{ D}: CIIN{ E} A_23_{ I}: CIIN{ E} A_22_{ I}: CIIN{ E} - BGACK_000{ E}: BGACK_030{ H} FPU_CS{ H}inst_AS_030_000_SYNC{ H} - A_21_{ B}: CIIN{ E} - CLK_030{. }: SIZE_1_{ H} AS_030{ H} SIZE_0_{ G} - : DS_030{ A} A0{ G} FPU_CS{ H} - :inst_AS_030_000_SYNC{ H} - A_20_{ B}: CIIN{ E} - CLK_000{. }: BG_000{ D}inst_CLK_000_D0{ D} - A_19_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} - A_18_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} - A_17_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} - A_16_{ B}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} - DTACK{ E}:inst_DTACK_SYNC{ B} - IPL_1_{ G}: IPL_030_1_{ B} - IPL_0_{ H}: IPL_030_0_{ B} - VPA{. }: inst_VPA_D{ B} - FC_0_{ G}: FPU_CS{ H}inst_AS_030_000_SYNC{ H} - RST{. }: CLK_DIV_OUT{ G} SIZE_1_{ H} IPL_030_2_{ B} - : DSACK_1_{ H} AS_030{ H} AS_000{ D} - : SIZE_0_{ G} DS_030{ A} UDS_000{ D} - : LDS_000{ D} A0{ G} BG_000{ D} - : BGACK_030{ H} CLK_EXP{ B} FPU_CS{ H} - : IPL_030_1_{ B} IPL_030_0_{ B} E{ G} - : VMA{ D} RESET{ B}AMIGA_BUS_ENABLE{ D} - :inst_AS_030_000_SYNC{ H}inst_DTACK_SYNC{ B} inst_VPA_SYNC{ B} - : inst_VPA_D{ B}inst_CLK_000_D0{ D}inst_CLK_000_D1{ D} - :inst_CLK_000_D2{ H}inst_CLK_000_D5{ H}inst_CLK_OUT_PRE{ G} - :inst_BGACK_030_INT_D{ H} CLK_CNT_P_0_{ H} SM_AMIGA_5_{ D} - :inst_CLK_000_D4{ G} SM_AMIGA_7_{ A} SM_AMIGA_1_{ H} - : SM_AMIGA_0_{ A} SM_AMIGA_6_{ G}inst_CLK_000_D3{ G} - : SM_AMIGA_3_{ G} SM_AMIGA_4_{ D} SM_AMIGA_2_{ G} - : cpu_est_0_{ H} cpu_est_1_{ G} cpu_est_2_{ B} - RW{ H}:AMIGA_BUS_DATA_DIR{ E} DS_030{ A} UDS_000{ D} - : LDS_000{ D} SIZE_1_{ I}: LDS_000{ D} - RN_SIZE_1_{ I}: SIZE_1_{ H} RN_IPL_030_2_{ C}: IPL_030_2_{ B} +RN_IPL_030_1_{ C}: IPL_030_1_{ B} +RN_IPL_030_0_{ C}: IPL_030_0_{ B} DSACK_1_{ I}: DTACK{ D} RN_DSACK_1_{ I}: DSACK_1_{ H} AS_030{ I}: DSACK_1_{ H} AS_000{ D} UDS_000{ D} : LDS_000{ D} BG_000{ D} FPU_CS{ H} - :AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ H}inst_DTACK_SYNC{ B} - : inst_VPA_SYNC{ B} + :AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ H} RN_AS_030{ I}: DTACK{ D} SIZE_1_{ H} AS_030{ H} - : SIZE_0_{ G} DS_030{ A} A0{ G} - AS_000{ E}: SIZE_1_{ H} AS_030{ H} SIZE_0_{ G} - : DS_030{ A} A0{ G} - RN_AS_000{ E}: AS_000{ D} SM_AMIGA_7_{ A} SM_AMIGA_0_{ A} - SIZE_0_{ H}: LDS_000{ D} - RN_SIZE_0_{ H}: SIZE_0_{ G} + : DS_030{ A} A0{ G} SIZE_0_{ G} + : inst_CLK_030_H{ A} + AS_000{ E}:AMIGA_BUS_DATA_DIR{ E} SIZE_1_{ H} AS_030{ H} + : DS_030{ A} A0{ G} SIZE_0_{ G} + : inst_CLK_030_H{ A} + RN_AS_000{ E}: AS_000{ D} VMA{ D} SM_AMIGA_0_{ B} + : SM_AMIGA_7_{ A} DS_030{ B}: UDS_000{ D} LDS_000{ D} RN_DS_030{ B}: DS_030{ A} - UDS_000{ E}: SIZE_1_{ H} AS_030{ H} SIZE_0_{ G} - : DS_030{ A} A0{ G} + UDS_000{ E}: SIZE_1_{ H} AS_030{ H} DS_030{ A} + : A0{ G} SIZE_0_{ G} inst_CLK_030_H{ A} RN_UDS_000{ E}: UDS_000{ D} - LDS_000{ E}: SIZE_1_{ H} AS_030{ H} SIZE_0_{ G} - : DS_030{ A} A0{ G} + LDS_000{ E}: SIZE_1_{ H} AS_030{ H} DS_030{ A} + : A0{ G} SIZE_0_{ G} inst_CLK_030_H{ A} RN_LDS_000{ E}: LDS_000{ D} A0{ H}: UDS_000{ D} LDS_000{ D} - RN_A0{ H}: A0{ G} RN_BG_000{ E}: BG_000{ D} RN_BGACK_030{ I}: DTACK{ D}AMIGA_BUS_DATA_DIR{ E} SIZE_1_{ H} - : DSACK_1_{ H} AS_030{ H} AS_000{ D} - : SIZE_0_{ G} DS_030{ A} UDS_000{ D} - : LDS_000{ D} A0{ G} BGACK_030{ H} - : VMA{ D}AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ H} - :inst_DTACK_SYNC{ B} inst_VPA_SYNC{ B}inst_BGACK_030_INT_D{ H} - : SM_AMIGA_5_{ D} SM_AMIGA_7_{ A} SM_AMIGA_1_{ H} - : SM_AMIGA_0_{ A} SM_AMIGA_6_{ G} SM_AMIGA_3_{ G} - : SM_AMIGA_4_{ D} SM_AMIGA_2_{ G} + : AS_030{ H} AS_000{ D} DS_030{ A} + : UDS_000{ D} LDS_000{ D} A0{ G} + : BGACK_030{ H}AMIGA_BUS_ENABLE{ D} SIZE_0_{ G} + :inst_AS_030_000_SYNC{ H}inst_BGACK_030_INT_D{ D} inst_CLK_030_H{ A} RN_FPU_CS{ I}: BERR{ E} AVEC_EXP{ C} FPU_CS{ H} -RN_IPL_030_1_{ C}: IPL_030_1_{ B} -RN_IPL_030_0_{ C}: IPL_030_0_{ B} - RN_E{ H}: E{ G} inst_VPA_SYNC{ B} cpu_est_1_{ G} - : cpu_est_2_{ B} - RN_VMA{ E}: VMA{ D} inst_VPA_SYNC{ B} + RN_E{ H}: E{ G} VMA{ D} SM_AMIGA_3_{ G} + : SM_AMIGA_2_{ G} cpu_est_1_{ G} cpu_est_2_{ G} + RN_VMA{ E}: VMA{ D} SM_AMIGA_3_{ G} SM_AMIGA_2_{ G} RN_AMIGA_BUS_ENABLE{ E}:AMIGA_BUS_ENABLE{ D} -inst_AS_030_000_SYNC{ I}:inst_AS_030_000_SYNC{ H} SM_AMIGA_7_{ A} SM_AMIGA_6_{ G} -inst_DTACK_SYNC{ C}:inst_DTACK_SYNC{ B} SM_AMIGA_3_{ G} SM_AMIGA_2_{ G} -inst_VPA_SYNC{ C}: inst_VPA_SYNC{ B} SM_AMIGA_3_{ G} SM_AMIGA_2_{ G} - inst_VPA_D{ C}: VMA{ D}inst_DTACK_SYNC{ B} inst_VPA_SYNC{ B} -inst_CLK_000_D0{ E}: IPL_030_2_{ B} BGACK_030{ H} IPL_030_1_{ B} - : IPL_030_0_{ B} E{ G} VMA{ D} - :inst_DTACK_SYNC{ B} inst_VPA_SYNC{ B}inst_CLK_000_D1{ D} - : SM_AMIGA_5_{ D} SM_AMIGA_7_{ A} SM_AMIGA_1_{ H} - : SM_AMIGA_0_{ A} SM_AMIGA_6_{ G} SM_AMIGA_3_{ G} - : SM_AMIGA_4_{ D} SM_AMIGA_2_{ G} cpu_est_0_{ H} - : cpu_est_1_{ G} cpu_est_2_{ B} -inst_CLK_000_D1{ E}: IPL_030_2_{ B} BGACK_030{ H} IPL_030_1_{ B} - : IPL_030_0_{ B} E{ G}inst_CLK_000_D2{ H} - : cpu_est_0_{ H} cpu_est_1_{ G} cpu_est_2_{ B} -inst_CLK_000_D2{ I}: SM_AMIGA_7_{ A} SM_AMIGA_6_{ G}inst_CLK_000_D3{ G} -inst_CLK_000_D5{ I}: DSACK_1_{ H}inst_AS_030_000_SYNC{ H} SM_AMIGA_1_{ H} - : SM_AMIGA_0_{ A} -inst_CLK_OUT_PRE{ H}: CLK_DIV_OUT{ G} CLK_EXP{ B}inst_CLK_OUT_PRE{ G} -inst_BGACK_030_INT_D{ I}: SIZE_1_{ H} AS_030{ H} SIZE_0_{ G} - : DS_030{ A} A0{ G}AMIGA_BUS_ENABLE{ D} -CLK_CNT_P_0_{ I}:inst_CLK_OUT_PRE{ G} CLK_CNT_P_0_{ H} -SM_AMIGA_5_{ E}: AS_000{ D} UDS_000{ D} LDS_000{ D} - : SM_AMIGA_5_{ D} SM_AMIGA_4_{ D} -inst_CLK_000_D4{ H}: DSACK_1_{ H} AS_000{ D} UDS_000{ D} + SIZE_0_{ H}: LDS_000{ D} +inst_AS_030_000_SYNC{ I}:inst_AS_030_000_SYNC{ H} SM_AMIGA_6_{ H} SM_AMIGA_7_{ A} +inst_BGACK_030_INT_D{ E}:AMIGA_BUS_ENABLE{ D} + inst_VPA_D{ I}: VMA{ D} SM_AMIGA_3_{ G} SM_AMIGA_2_{ G} +inst_CLK_OUT_PRE_50_D{ B}:inst_CLK_OUT_PRE_25{ B} +inst_CLK_000_D0{ E}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} + : UDS_000{ D} LDS_000{ D} BGACK_030{ H} + : E{ G} VMA{ D}inst_CLK_000_D1{ H} + : SM_AMIGA_1_{ B} SM_AMIGA_0_{ B} SM_AMIGA_6_{ H} + : SM_AMIGA_5_{ D} SM_AMIGA_7_{ A} SM_AMIGA_4_{ B} + : SM_AMIGA_3_{ G} SM_AMIGA_2_{ G} cpu_est_0_{ B} + : cpu_est_1_{ G} cpu_est_2_{ G} +inst_CLK_000_D1{ I}: IPL_030_2_{ B} IPL_030_1_{ B} IPL_030_0_{ B} + : BGACK_030{ H} E{ G}inst_CLK_000_D2{ H} + : SM_AMIGA_3_{ G} SM_AMIGA_2_{ G} cpu_est_0_{ B} + : cpu_est_1_{ G} cpu_est_2_{ G} +inst_CLK_000_D2{ I}: SM_AMIGA_6_{ H}inst_CLK_000_D3{ H} SM_AMIGA_7_{ A} +inst_CLK_000_D4{ I}: DSACK_1_{ H} AS_000{ D} UDS_000{ D} : LDS_000{ D}AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ H} - :inst_CLK_000_D5{ H} SM_AMIGA_1_{ H} SM_AMIGA_0_{ A} -SM_AMIGA_7_{ B}: BG_000{ D} VMA{ D}inst_AS_030_000_SYNC{ H} - : SM_AMIGA_7_{ A} SM_AMIGA_6_{ G} -SM_AMIGA_1_{ I}: DSACK_1_{ H}AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ H} - : SM_AMIGA_1_{ H} SM_AMIGA_0_{ A} -SM_AMIGA_0_{ B}:AMIGA_BUS_ENABLE{ D} SM_AMIGA_7_{ A} SM_AMIGA_0_{ A} -SM_AMIGA_6_{ H}:AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ H} SM_AMIGA_5_{ D} - : SM_AMIGA_7_{ A} SM_AMIGA_6_{ G} -inst_CLK_000_D3{ H}:inst_CLK_000_D4{ G} SM_AMIGA_7_{ A} SM_AMIGA_6_{ G} -SM_AMIGA_3_{ H}:inst_DTACK_SYNC{ B} inst_VPA_SYNC{ B} SM_AMIGA_3_{ G} - : SM_AMIGA_2_{ G} -SM_AMIGA_4_{ E}: UDS_000{ D} LDS_000{ D} SM_AMIGA_3_{ G} - : SM_AMIGA_4_{ D} -SM_AMIGA_2_{ H}: SM_AMIGA_1_{ H} SM_AMIGA_2_{ G} - cpu_est_0_{ I}: E{ G} VMA{ D} cpu_est_0_{ H} - : cpu_est_1_{ G} cpu_est_2_{ B} - cpu_est_1_{ H}: E{ G} VMA{ D} inst_VPA_SYNC{ B} - : cpu_est_1_{ G} cpu_est_2_{ B} - cpu_est_2_{ C}: E{ G} cpu_est_1_{ G} cpu_est_2_{ B} + : SM_AMIGA_1_{ B} SM_AMIGA_0_{ B} +inst_DTACK_D0{ B}: SM_AMIGA_3_{ G} SM_AMIGA_2_{ G} +inst_CLK_OUT_PRE_50{ H}:inst_CLK_OUT_PRE_50_D{ A}inst_CLK_OUT_PRE_50{ G}inst_CLK_OUT_PRE_25{ B} +inst_CLK_OUT_PRE_25{ C}: CLK_DIV_OUT{ G} CLK_EXP{ B}inst_CLK_OUT_PRE_25{ B} +SM_AMIGA_1_{ C}: DSACK_1_{ H}AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ H} + : SM_AMIGA_1_{ B} SM_AMIGA_0_{ B} +SM_AMIGA_0_{ C}:AMIGA_BUS_ENABLE{ D} SM_AMIGA_0_{ B} SM_AMIGA_7_{ A} +SM_AMIGA_6_{ I}:AMIGA_BUS_ENABLE{ D}inst_AS_030_000_SYNC{ H} SM_AMIGA_6_{ H} + : SM_AMIGA_5_{ D} SM_AMIGA_7_{ A} +SM_AMIGA_5_{ E}: AS_000{ D} UDS_000{ D} LDS_000{ D} + : SM_AMIGA_5_{ D} SM_AMIGA_4_{ B} +inst_CLK_000_D3{ I}: DSACK_1_{ H}inst_AS_030_000_SYNC{ H}inst_CLK_000_D4{ H} + : SM_AMIGA_1_{ B} SM_AMIGA_0_{ B} SM_AMIGA_6_{ H} + : SM_AMIGA_7_{ A} +inst_CLK_030_H{ B}: DS_030{ A} inst_CLK_030_H{ A} +SM_AMIGA_7_{ B}: BG_000{ D}inst_AS_030_000_SYNC{ H} SM_AMIGA_6_{ H} + : SM_AMIGA_7_{ A} +SM_AMIGA_4_{ C}: UDS_000{ D} LDS_000{ D} SM_AMIGA_4_{ B} + : SM_AMIGA_3_{ G} +SM_AMIGA_3_{ H}: SM_AMIGA_3_{ G} SM_AMIGA_2_{ G} +SM_AMIGA_2_{ H}: SM_AMIGA_1_{ B} SM_AMIGA_2_{ G} + cpu_est_0_{ C}: E{ G} VMA{ D} cpu_est_0_{ B} + : cpu_est_1_{ G} cpu_est_2_{ G} + cpu_est_1_{ H}: E{ G} VMA{ D} SM_AMIGA_3_{ G} + : SM_AMIGA_2_{ G} cpu_est_1_{ G} cpu_est_2_{ G} + cpu_est_2_{ H}: E{ G} VMA{ D} cpu_est_1_{ G} + : cpu_est_2_{ G} ----------------------------------------------------------------------------- {.} : Indicates block location of signal @@ -603,8 +595,10 @@ Equations : | * | S | BS | BR | DS_030 | | | | | AVEC | * | S | BS | BR | SM_AMIGA_7_ -| * | S | BR | BS | SM_AMIGA_0_ | * | S | BS | BR | RN_DS_030 +| * | S | BR | BR | inst_CLK_030_H +| * | S | BS | BR | inst_DTACK_D0 +| * | S | BR | BS | inst_CLK_OUT_PRE_50_D | | | | | A_19_ | | | | | A_16_ | | | | | A_18_ @@ -624,10 +618,11 @@ Equations : | * | S | BS | BR | IPL_030_1_ | * | S | BR | BS | CLK_EXP | * | S | BR | BS | RESET -| * | S | BR | BS | cpu_est_2_ -| * | S | BS | BR | inst_VPA_SYNC -| * | S | BS | BR | inst_DTACK_SYNC -| * | S | BS | BR | inst_VPA_D +| * | S | BR | BS | SM_AMIGA_0_ +| * | S | BR | BS | cpu_est_0_ +| * | S | BR | BS | SM_AMIGA_1_ +| * | S | BR | BS | SM_AMIGA_4_ +| * | S | BR | BS | inst_CLK_OUT_PRE_25 | * | S | BS | BR | RN_IPL_030_0_ | * | S | BS | BR | RN_IPL_030_1_ | * | S | BS | BR | RN_IPL_030_2_ @@ -660,23 +655,22 @@ Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name +-----+-----+-----+-----+------------------------ +| * | S | BS | BR | AS_000 | * | S | BS | BR | LDS_000 | * | S | BS | BR | UDS_000 -| * | S | BS | BR | AS_000 | | | | | DTACK | * | S | BS | BR | AMIGA_BUS_ENABLE | * | S | BS | BR | VMA | * | S | BS | BR | BG_000 | * | S | BS | BR | inst_CLK_000_D0 -| * | S | BS | BR | inst_CLK_000_D1 -| * | S | BS | BR | RN_VMA -| * | S | BR | BS | SM_AMIGA_4_ | * | S | BS | BR | RN_AS_000 -| * | S | BS | BR | RN_LDS_000 -| * | S | BS | BR | RN_AMIGA_BUS_ENABLE -| * | S | BS | BR | RN_UDS_000 +| * | S | BS | BR | RN_VMA | * | S | BR | BS | SM_AMIGA_5_ +| * | S | BS | BR | RN_LDS_000 +| * | S | BS | BR | RN_UDS_000 +| * | S | BS | BR | RN_AMIGA_BUS_ENABLE | * | S | BS | BR | RN_BG_000 +| * | S | BS | BR | inst_BGACK_030_INT_D | | | | | BGACK_000 @@ -706,26 +700,22 @@ Equations : Block G -block level set pt : !RST -block level reset pt : +block level set pt : +block level reset pt : !RST Equations : | | |Block|Block| Signal | Reg |Mode |Set |Reset| Name +-----+-----+-----+-----+------------------------ -| * | S | BS | BR | SIZE_0_ -| * | S | BS | BR | A0 -| * | S | BR | BS | E -| * | S | BR | BS | CLK_DIV_OUT -| * | S | BR | BS | SM_AMIGA_6_ -| * | S | BR | BS | cpu_est_1_ -| * | S | BS | BR | inst_CLK_000_D4 -| * | S | BR | BS | SM_AMIGA_2_ -| * | S | BR | BS | SM_AMIGA_3_ -| * | S | BR | BS | RN_E -| * | S | BR | BS | inst_CLK_OUT_PRE -| * | S | BS | BR | inst_CLK_000_D3 -| * | S | BS | BR | RN_A0 -| * | S | BS | BR | RN_SIZE_0_ +| * | S | BR | BS | SIZE_0_ +| * | S | BR | BS | A0 +| * | S | BS | BR | E +| * | S | BS | BR | CLK_DIV_OUT +| * | S | BS | BR | inst_CLK_OUT_PRE_50 +| * | S | BS | BR | cpu_est_1_ +| * | S | BS | BR | RN_E +| * | S | BS | BR | cpu_est_2_ +| * | S | BS | BR | SM_AMIGA_2_ +| * | S | BS | BR | SM_AMIGA_3_ | | | | | RW | | | | | IPL_2_ | | | | | IPL_0_ @@ -739,22 +729,21 @@ Equations : | Reg |Mode |Set |Reset| Name +-----+-----+-----+-----+------------------------ | * | S | BS | BR | AS_030 -| * | S | BS | BR | SIZE_1_ | * | S | BS | BR | DSACK_1_ +| * | S | BS | BR | SIZE_1_ | * | S | BS | BR | BGACK_030 | * | S | BS | BR | FPU_CS | | | | | DSACK_0_ | * | S | BS | BR | RN_BGACK_030 | * | S | BS | BR | RN_AS_030 -| * | S | BR | BS | cpu_est_0_ -| * | S | BS | BR | inst_BGACK_030_INT_D -| * | S | BS | BR | inst_AS_030_000_SYNC -| * | S | BR | BS | SM_AMIGA_1_ | * | S | BS | BR | RN_FPU_CS -| * | S | BR | BS | CLK_CNT_P_0_ -| * | S | BS | BR | inst_CLK_000_D5 +| * | S | BR | BS | SM_AMIGA_6_ +| * | S | BS | BR | inst_CLK_000_D3 +| * | S | BS | BR | inst_CLK_000_D4 +| * | S | BS | BR | inst_CLK_000_D1 +| * | S | BS | BR | inst_AS_030_000_SYNC | * | S | BS | BR | inst_CLK_000_D2 -| * | S | BS | BR | RN_SIZE_1_ +| * | S | BS | BR | inst_VPA_D | * | S | BS | BR | RN_DSACK_1_ | | | | | A_22_ | | | | | A_23_ @@ -774,22 +763,22 @@ BLOCK_A_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx A0 RN_BGACK_030 mcell H4 mx A17 ... ... -mx A1 RN_DS_030 mcell A4 mx A18 ... ... -mx A2 SM_AMIGA_6_ mcell G4 mx A19 inst_CLK_000_D2 mcell H13 -mx A3 ... ... mx A20 SM_AMIGA_1_ mcell H7 -mx A4 CLK_030 pin 64 mx A21 RST pin 86 -mx A5 nEXP_SPACE pin 14 mx A22 ... ... -mx A6 SM_AMIGA_0_ mcell A3 mx A23 inst_CLK_000_D4 mcell G6 -mx A7 RN_AS_030 mcell H6 mx A24 inst_CLK_000_D0 mcell D5 -mx A8 UDS_000 pin 32 mx A25 ... ... -mx A9 inst_CLK_000_D3 mcell G11 mx A26 AS_000 pin 33 -mx A10inst_BGACK_030_INT_D mcell H3 mx A27 LDS_000 pin 31 -mx A11 RW pin 71 mx A28 ... ... -mx A12 SM_AMIGA_7_ mcell A1 mx A29 ... ... -mx A13inst_AS_030_000_SYNC mcell H5 mx A30 ... ... -mx A14 RN_AS_000 mcell D4 mx A31 ... ... -mx A15 inst_CLK_000_D5 mcell H12 mx A32 ... ... +mx A0 LDS_000 pin 31 mx A17 inst_CLK_000_D0 mcell D12 +mx A1 ... ... mx A18 ... ... +mx A2 RN_DS_030 mcell A5 mx A19 ... ... +mx A3 ... ... mx A20 CLK_030 pin 64 +mx A4 inst_CLK_030_H mcell A0 mx A21 RST pin 86 +mx A5inst_AS_030_000_SYNC mcell H9 mx A22 ... ... +mx A6 ... ... mx A23 AS_000 pin 33 +mx A7 RN_AS_030 mcell H6 mx A24inst_CLK_OUT_PRE_50 mcell G1 +mx A8 inst_CLK_000_D2 mcell H12 mx A25 RW pin 71 +mx A9 DTACK pin 30 mx A26 ... ... +mx A10 ... ... mx A27 RN_BGACK_030 mcell H5 +mx A11 RN_AS_000 mcell D5 mx A28 SM_AMIGA_0_ mcell B5 +mx A12 UDS_000 pin 32 mx A29 SM_AMIGA_6_ mcell H7 +mx A13 SM_AMIGA_7_ mcell A11 mx A30 ... ... +mx A14 inst_CLK_000_D3 mcell H2 mx A31 ... ... +mx A15 nEXP_SPACE pin 14 mx A32 ... ... mx A16 ... ... ---------------------------------------------------------------------------- @@ -798,23 +787,23 @@ BLOCK_B_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx B0 IPL_0_ pin 67 mx B17 inst_VPA_D mcell B8 -mx B1 inst_DTACK_SYNC mcell B7 mx B18 RN_IPL_030_2_ mcell B2 -mx B2 RN_VMA mcell D1 mx B19 AS_030 pin 82 -mx B3 IPL_1_ pin 56 mx B20 RN_BGACK_030 mcell H4 +mx B0 IPL_0_ pin 67 mx B17 inst_CLK_000_D0 mcell D12 +mx B1 SM_AMIGA_4_ mcell B7 mx B18 ... ... +mx B2 RN_IPL_030_1_ mcell B6 mx B19 ... ... +mx B3 IPL_1_ pin 56 mx B20 ... ... mx B4 IPL_2_ pin 68 mx B21 RST pin 86 -mx B5inst_CLK_OUT_PRE mcell G10 mx B22 cpu_est_1_ mcell G5 -mx B6 ... ... mx B23 RN_E mcell G2 -mx B7 inst_CLK_000_D0 mcell D5 mx B24 ... ... -mx B8 inst_CLK_000_D1 mcell D7 mx B25 ... ... -mx B9 DTACK pin 30 mx B26 ... ... -mx B10 VPA pin 36 mx B27 RN_IPL_030_0_ mcell B4 -mx B11 RN_IPL_030_1_ mcell B6 mx B28 inst_VPA_SYNC mcell B5 -mx B12 SM_AMIGA_3_ mcell G9 mx B29 ... ... -mx B13 cpu_est_2_ mcell B3 mx B30 ... ... -mx B14 cpu_est_0_ mcell H2 mx B31 ... ... +mx B5 SM_AMIGA_2_ mcell G6 mx B22 ... ... +mx B6inst_CLK_OUT_PRE_50_D mcell A3 mx B23 ... ... +mx B7 RN_AS_000 mcell D5 mx B24inst_CLK_OUT_PRE_50 mcell G1 +mx B8 cpu_est_0_ mcell B8 mx B25 ... ... +mx B9 ... ... mx B26 ... ... +mx B10 RN_IPL_030_2_ mcell B2 mx B27 RN_IPL_030_0_ mcell B4 +mx B11 inst_CLK_000_D1 mcell H3 mx B28 SM_AMIGA_0_ mcell B5 +mx B12 SM_AMIGA_1_ mcell B10 mx B29 ... ... +mx B13 inst_CLK_000_D4 mcell H8 mx B30 ... ... +mx B14 inst_CLK_000_D3 mcell H2 mx B31inst_CLK_OUT_PRE_25 mcell B9 mx B15 ... ... mx B32 ... ... -mx B16 ... ... +mx B16 SM_AMIGA_5_ mcell D2 ---------------------------------------------------------------------------- @@ -846,22 +835,22 @@ BLOCK_D_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx D0 SIZE_0_ pin 70 mx D17 inst_VPA_D mcell B8 -mx D1 ... ... mx D18 DS_030 pin 98 -mx D2 RN_LDS_000 mcell D10 mx D19 AS_030 pin 82 -mx D3 cpu_est_1_ mcell G5 mx D20 RN_BGACK_030 mcell H4 -mx D4 cpu_est_0_ mcell H2 mx D21 RST pin 86 -mx D5 nEXP_SPACE pin 14 mx D22 BG_030 pin 21 -mx D6 SIZE_1_ pin 79 mx D23 inst_CLK_000_D4 mcell G6 -mx D7 inst_CLK_000_D0 mcell D5 mx D24 CLK_000 pin 11 -mx D8 RW pin 71 mx D25 SM_AMIGA_0_ mcell A3 -mx D9 SM_AMIGA_7_ mcell A1 mx D26 ... ... -mx D10inst_BGACK_030_INT_D mcell H3 mx D27 RN_VMA mcell D1 -mx D11 SM_AMIGA_6_ mcell G4 mx D28RN_AMIGA_BUS_ENABLE mcell D2 -mx D12 SM_AMIGA_4_ mcell D9 mx D29 SM_AMIGA_1_ mcell H7 -mx D13 RN_BG_000 mcell D3 mx D30 RN_AS_030 mcell H6 -mx D14 RN_AS_000 mcell D4 mx D31 SM_AMIGA_5_ mcell D11 -mx D15 A0 pin 69 mx D32 DSACK_1_ pin 81 +mx D0 A0 pin 69 mx D17 RN_BG_000 mcell D1 +mx D1 SM_AMIGA_4_ mcell B7 mx D18 DS_030 pin 98 +mx D2 cpu_est_1_ mcell G4 mx D19 AS_030 pin 82 +mx D3 CLK_000 pin 11 mx D20inst_BGACK_030_INT_D mcell D10 +mx D4 BG_030 pin 21 mx D21 RST pin 86 +mx D5 inst_CLK_000_D0 mcell D12 mx D22 inst_VPA_D mcell H14 +mx D6 SIZE_1_ pin 79 mx D23 RN_E mcell G2 +mx D7 RN_LDS_000 mcell D9 mx D24 RN_AS_000 mcell D5 +mx D8 cpu_est_0_ mcell B8 mx D25 inst_CLK_000_D4 mcell H8 +mx D9 RN_VMA mcell D3 mx D26 SM_AMIGA_7_ mcell A11 +mx D10 DSACK_1_ pin 81 mx D27 RN_BGACK_030 mcell H5 +mx D11 RW pin 71 mx D28 SM_AMIGA_5_ mcell D2 +mx D12 SM_AMIGA_1_ mcell B10 mx D29 SM_AMIGA_6_ mcell H7 +mx D13RN_AMIGA_BUS_ENABLE mcell D7 mx D30 RN_AS_030 mcell H6 +mx D14 SIZE_0_ pin 70 mx D31 SM_AMIGA_0_ mcell B5 +mx D15 nEXP_SPACE pin 14 mx D32 cpu_est_2_ mcell G5 mx D16 RN_UDS_000 mcell D6 ---------------------------------------------------------------------------- @@ -870,7 +859,7 @@ BLOCK_E_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx E0 RN_BGACK_030 mcell H4 mx E17 A_26_ pin 17 +mx E0 AS_000 pin 33 mx E17 A_26_ pin 17 mx E1 A_31_ pin 4 mx E18 ... ... mx E2 ... ... mx E19 ... ... mx E3 A_27_ pin 16 mx E20 ... ... @@ -883,7 +872,7 @@ mx E9 A_30_ pin 5 mx E26 ... ... mx E10 RN_FPU_CS mcell H1 mx E27 ... ... mx E11 A_23_ pin 84 mx E28 ... ... mx E12 A_25_ pin 18 mx E29 A_20_ pin 93 -mx E13 ... ... mx E30 ... ... +mx E13 RN_BGACK_030 mcell H5 mx E30 ... ... mx E14 ... ... mx E31 ... ... mx E15 A_21_ pin 94 mx E32 ... ... mx E16 ... ... @@ -894,22 +883,22 @@ BLOCK_G_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx G0 LDS_000 pin 31 mx G17 RN_SIZE_0_ mcell G0 -mx G1 CLK_CNT_P_0_ mcell H11 mx G18 ... ... -mx G2 SM_AMIGA_6_ mcell G4 mx G19 inst_CLK_000_D2 mcell H13 -mx G3 cpu_est_1_ mcell G5 mx G20 RN_BGACK_030 mcell H4 -mx G4 CLK_030 pin 64 mx G21 SM_AMIGA_7_ mcell A1 -mx G5 cpu_est_2_ mcell B3 mx G22inst_CLK_OUT_PRE mcell G10 -mx G6 ... ... mx G23 AS_000 pin 33 -mx G7 inst_CLK_000_D0 mcell D5 mx G24 RST pin 86 -mx G8 inst_CLK_000_D1 mcell D7 mx G25 SM_AMIGA_4_ mcell D9 -mx G9 inst_CLK_000_D3 mcell G11 mx G26 SM_AMIGA_2_ mcell G7 -mx G10 RN_A0 mcell G8 mx G27 SM_AMIGA_3_ mcell G9 -mx G11inst_BGACK_030_INT_D mcell H3 mx G28 inst_VPA_SYNC mcell B5 +mx G0 LDS_000 pin 31 mx G17 cpu_est_0_ mcell B8 +mx G1 SM_AMIGA_4_ mcell B7 mx G18 ... ... +mx G2 inst_VPA_D mcell H14 mx G19 ... ... +mx G3 cpu_est_2_ mcell G5 mx G20 ... ... +mx G4 RN_E mcell G2 mx G21 RST pin 86 +mx G5 inst_CLK_000_D0 mcell D12 mx G22 ... ... +mx G6inst_CLK_OUT_PRE_25 mcell B9 mx G23 SM_AMIGA_2_ mcell G6 +mx G7 RN_AS_030 mcell H6 mx G24inst_CLK_OUT_PRE_50 mcell G1 +mx G8 SM_AMIGA_3_ mcell G7 mx G25 ... ... +mx G9 inst_DTACK_D0 mcell A1 mx G26 AS_000 pin 33 +mx G10 inst_CLK_000_D1 mcell H3 mx G27 RN_BGACK_030 mcell H5 +mx G11 cpu_est_1_ mcell G4 mx G28 ... ... mx G12 UDS_000 pin 32 mx G29 ... ... -mx G13inst_AS_030_000_SYNC mcell H5 mx G30 RN_AS_030 mcell H6 -mx G14 cpu_est_0_ mcell H2 mx G31 RN_E mcell G2 -mx G15 nEXP_SPACE pin 14 mx G32 inst_DTACK_SYNC mcell B7 +mx G13 RN_VMA mcell D3 mx G30 ... ... +mx G14 ... ... mx G31 ... ... +mx G15 nEXP_SPACE pin 14 mx G32 ... ... mx G16 ... ... ---------------------------------------------------------------------------- @@ -918,22 +907,22 @@ BLOCK_H_LOGIC_ARRAY_FANIN ~~~~~~~~~~~~~~~~~~~~~~~~~ CSM Signal Source CSM Signal Source ------------------------------------ ------------------------------------ -mx H0 LDS_000 pin 31 mx H17 FC_0_ pin 57 -mx H1 FC_1_ pin 58 mx H18 BGACK_000 pin 28 -mx H2 SM_AMIGA_6_ mcell G4 mx H19 RN_FPU_CS mcell H1 -mx H3 RN_DSACK_1_ mcell H8 mx H20 RN_BGACK_030 mcell H4 -mx H4inst_AS_030_000_SYNC mcell H5 mx H21 RN_AS_030 mcell H6 -mx H5 nEXP_SPACE pin 14 mx H22 CLK_CNT_P_0_ mcell H11 +mx H0 RST pin 86 mx H17 FC_0_ pin 57 +mx H1 FC_1_ pin 58 mx H18 inst_CLK_000_D1 mcell H3 +mx H2 SM_AMIGA_1_ mcell B10 mx H19 RN_FPU_CS mcell H1 +mx H3 inst_CLK_000_D4 mcell H8 mx H20 SM_AMIGA_6_ mcell H7 +mx H4 CLK_030 pin 64 mx H21 RN_AS_030 mcell H6 +mx H5inst_AS_030_000_SYNC mcell H9 mx H22 ... ... mx H6 A_16_ pin 96 mx H23 AS_000 pin 33 -mx H7 SM_AMIGA_1_ mcell H7 mx H24 RST pin 86 -mx H8 inst_CLK_000_D1 mcell D7 mx H25 ... ... -mx H9 SM_AMIGA_7_ mcell A1 mx H26 SM_AMIGA_2_ mcell G7 -mx H10inst_BGACK_030_INT_D mcell H3 mx H27 A_19_ pin 97 -mx H11 inst_CLK_000_D0 mcell D5 mx H28 CLK_030 pin 64 -mx H12 UDS_000 pin 32 mx H29 inst_CLK_000_D4 mcell G6 -mx H13 A_17_ pin 59 mx H30 RN_SIZE_1_ mcell H0 -mx H14 cpu_est_0_ mcell H2 mx H31 A_18_ pin 95 -mx H15 inst_CLK_000_D5 mcell H12 mx H32 AS_030 pin 82 +mx H7 SM_AMIGA_7_ mcell A11 mx H24 LDS_000 pin 31 +mx H8 UDS_000 pin 32 mx H25 ... ... +mx H9 AS_030 pin 82 mx H26 ... ... +mx H10 VPA pin 36 mx H27 RN_BGACK_030 mcell H5 +mx H11 inst_CLK_000_D0 mcell D12 mx H28 inst_CLK_000_D3 mcell H2 +mx H12 A_19_ pin 97 mx H29 inst_CLK_000_D2 mcell H12 +mx H13 A_17_ pin 59 mx H30 ... ... +mx H14 RN_DSACK_1_ mcell H11 mx H31 A_18_ pin 95 +mx H15 nEXP_SPACE pin 14 mx H32 BGACK_000 pin 28 mx H16 ... ... ---------------------------------------------------------------------------- @@ -949,6 +938,8 @@ PostFit_Equations P-Terms Fan-in Fan-out Type Name (attributes) --------- ------ ------- ---- ----------------- + 1 0 1 Pin DSACK_0_ + 1 1 1 Pin DSACK_0_.OE 0 0 1 Pin BERR 1 1 1 Pin BERR.OE 1 1 1 Pin CLK_DIV_OUT.AR @@ -959,37 +950,37 @@ PostFit_Equations 1 0 1 Pin AVEC 0 0 1 Pin AVEC_EXP 1 1 1 Pin AVEC_EXP.OE - 1 0 1 Pin DSACK_0_ - 1 1 1 Pin DSACK_0_.OE - 2 3 1 Pin AMIGA_BUS_DATA_DIR + 2 4 1 Pin AMIGA_BUS_DATA_DIR 1 0 1 Pin AMIGA_BUS_ENABLE_LOW 1 4 1 Pin CIIN 1 8 1 Pin CIIN.OE 1 3 1 Pin SIZE_1_.OE - 3 7 1 Pin SIZE_1_.D- + 2 4 1 Pin SIZE_1_.D- 1 1 1 Pin SIZE_1_.AP 1 1 1 Pin SIZE_1_.C 3 4 1 Pin IPL_030_2_.D 1 1 1 Pin IPL_030_2_.AP 1 1 1 Pin IPL_030_2_.C + 3 4 1 Pin IPL_030_1_.D + 1 1 1 Pin IPL_030_1_.AP + 1 1 1 Pin IPL_030_1_.C + 3 4 1 Pin IPL_030_0_.D + 1 1 1 Pin IPL_030_0_.AP + 1 1 1 Pin IPL_030_0_.C 1 1 1 Pin DSACK_1_.OE - 2 6 1 Pin DSACK_1_.D- + 2 5 1 Pin DSACK_1_.D- 1 1 1 Pin DSACK_1_.AP 1 1 1 Pin DSACK_1_.C 1 3 1 Pin AS_030.OE - 3 7 1 Pin AS_030.D- + 4 6 1 Pin AS_030.D 1 1 1 Pin AS_030.AP 1 1 1 Pin AS_030.C 1 1 1 Pin AS_000.OE - 2 5 1 Pin AS_000.D- + 2 4 1 Pin AS_000.D- 1 1 1 Pin AS_000.AP 1 1 1 Pin AS_000.C - 1 3 1 Pin SIZE_0_.OE - 2 7 1 Pin SIZE_0_.D- - 1 1 1 Pin SIZE_0_.AP - 1 1 1 Pin SIZE_0_.C 1 3 1 Pin DS_030.OE - 5 9 1 Pin DS_030.D- + 7 9 1 Pin DS_030.D 1 1 1 Pin DS_030.AP 1 1 1 Pin DS_030.C 1 1 1 Pin UDS_000.OE @@ -1001,7 +992,7 @@ PostFit_Equations 1 1 1 Pin LDS_000.AP 1 1 1 Pin LDS_000.C 1 3 1 Pin A0.OE - 2 7 1 Pin A0.D + 1 4 1 Pin A0.D 1 1 1 Pin A0.AP 1 1 1 Pin A0.C 2 6 1 Pin BG_000.D- @@ -1016,37 +1007,36 @@ PostFit_Equations 2 10 1 Pin FPU_CS.D- 1 1 1 Pin FPU_CS.AP 1 1 1 Pin FPU_CS.C - 3 4 1 Pin IPL_030_1_.D - 1 1 1 Pin IPL_030_1_.AP - 1 1 1 Pin IPL_030_1_.C - 3 4 1 Pin IPL_030_0_.D - 1 1 1 Pin IPL_030_0_.AP - 1 1 1 Pin IPL_030_0_.C 3 6 1 PinX1 E.D.X1 1 1 1 PinX2 E.D.X2 1 1 1 Pin E.AR 1 1 1 Pin E.C - 4 7 1 Pin VMA.D- + 2 7 1 PinX1 VMA.D.X1 + 1 5 1 PinX2 VMA.D.X2 1 1 1 Pin VMA.AP 1 1 1 Pin VMA.C 1 1 1 Pin RESET.AR 1 0 1 Pin RESET.D 1 1 1 Pin RESET.C - 7 9 1 Pin AMIGA_BUS_ENABLE.D- + 6 9 1 Pin AMIGA_BUS_ENABLE.D- 1 1 1 Pin AMIGA_BUS_ENABLE.AP 1 1 1 Pin AMIGA_BUS_ENABLE.C - 7 17 1 Node inst_AS_030_000_SYNC.D + 1 3 1 Pin SIZE_0_.OE + 1 4 1 Pin SIZE_0_.D- + 1 1 1 Pin SIZE_0_.AP + 1 1 1 Pin SIZE_0_.C + 8 17 1 Node inst_AS_030_000_SYNC.D 1 1 1 Node inst_AS_030_000_SYNC.AP 1 1 1 Node inst_AS_030_000_SYNC.C - 2 7 1 Node inst_DTACK_SYNC.D- - 1 1 1 Node inst_DTACK_SYNC.AP - 1 1 1 Node inst_DTACK_SYNC.C - 2 9 1 Node inst_VPA_SYNC.D- - 1 1 1 Node inst_VPA_SYNC.AP - 1 1 1 Node inst_VPA_SYNC.C + 1 1 1 Node inst_BGACK_030_INT_D.D + 1 1 1 Node inst_BGACK_030_INT_D.AP + 1 1 1 Node inst_BGACK_030_INT_D.C 1 1 1 Node inst_VPA_D.D 1 1 1 Node inst_VPA_D.AP 1 1 1 Node inst_VPA_D.C + 1 1 1 Node inst_CLK_OUT_PRE_50_D.AR + 1 1 1 Node inst_CLK_OUT_PRE_50_D.D + 1 1 1 Node inst_CLK_OUT_PRE_50_D.C 1 1 1 Node inst_CLK_000_D0.D 1 1 1 Node inst_CLK_000_D0.AP 1 1 1 Node inst_CLK_000_D0.C @@ -1056,48 +1046,46 @@ PostFit_Equations 1 1 1 Node inst_CLK_000_D2.D 1 1 1 Node inst_CLK_000_D2.AP 1 1 1 Node inst_CLK_000_D2.C - 1 1 1 Node inst_CLK_000_D5.D - 1 1 1 Node inst_CLK_000_D5.AP - 1 1 1 Node inst_CLK_000_D5.C - 1 1 1 Node inst_CLK_OUT_PRE.AR - 2 2 1 Node inst_CLK_OUT_PRE.D - 1 1 1 Node inst_CLK_OUT_PRE.C - 1 1 1 Node inst_BGACK_030_INT_D.D - 1 1 1 Node inst_BGACK_030_INT_D.AP - 1 1 1 Node inst_BGACK_030_INT_D.C - 1 1 1 Node CLK_CNT_P_0_.AR - 1 1 1 Node CLK_CNT_P_0_.D - 1 1 1 Node CLK_CNT_P_0_.C - 1 1 1 Node SM_AMIGA_5_.AR - 3 4 1 Node SM_AMIGA_5_.D - 1 1 1 Node SM_AMIGA_5_.C 1 1 1 Node inst_CLK_000_D4.D 1 1 1 Node inst_CLK_000_D4.AP 1 1 1 Node inst_CLK_000_D4.C - 6 10 1 Node SM_AMIGA_7_.D - 1 1 1 Node SM_AMIGA_7_.AP - 1 1 1 Node SM_AMIGA_7_.C + 1 1 1 Node inst_DTACK_D0.D + 1 1 1 Node inst_DTACK_D0.AP + 1 1 1 Node inst_DTACK_D0.C + 1 1 1 Node inst_CLK_OUT_PRE_50.AR + 1 1 1 Node inst_CLK_OUT_PRE_50.D + 1 1 1 Node inst_CLK_OUT_PRE_50.C + 1 1 1 Node inst_CLK_OUT_PRE_25.AR + 3 3 1 Node inst_CLK_OUT_PRE_25.D + 1 1 1 Node inst_CLK_OUT_PRE_25.C 1 1 1 Node SM_AMIGA_1_.AR - 4 6 1 Node SM_AMIGA_1_.D + 3 5 1 Node SM_AMIGA_1_.D 1 1 1 Node SM_AMIGA_1_.C - 3 6 1 NodeX1 SM_AMIGA_0_.D.X1 - 1 4 1 NodeX2 SM_AMIGA_0_.D.X2 1 1 1 Node SM_AMIGA_0_.AR + 4 6 1 Node SM_AMIGA_0_.D 1 1 1 Node SM_AMIGA_0_.C 1 1 1 Node SM_AMIGA_6_.AR - 3 8 1 Node SM_AMIGA_6_.D + 2 7 1 Node SM_AMIGA_6_.D 1 1 1 Node SM_AMIGA_6_.C + 1 1 1 Node SM_AMIGA_5_.AR + 2 3 1 Node SM_AMIGA_5_.D + 1 1 1 Node SM_AMIGA_5_.C 1 1 1 Node inst_CLK_000_D3.D 1 1 1 Node inst_CLK_000_D3.AP 1 1 1 Node inst_CLK_000_D3.C - 1 1 1 Node SM_AMIGA_3_.AR - 4 6 1 Node SM_AMIGA_3_.D - 1 1 1 Node SM_AMIGA_3_.C + 5 8 1 Node inst_CLK_030_H.D + 1 1 1 Node inst_CLK_030_H.C + 5 9 1 Node SM_AMIGA_7_.D + 1 1 1 Node SM_AMIGA_7_.AP + 1 1 1 Node SM_AMIGA_7_.C 1 1 1 Node SM_AMIGA_4_.AR - 3 4 1 Node SM_AMIGA_4_.D + 2 3 1 Node SM_AMIGA_4_.D 1 1 1 Node SM_AMIGA_4_.C + 1 1 1 Node SM_AMIGA_3_.AR + 4 9 1 Node SM_AMIGA_3_.D- + 1 1 1 Node SM_AMIGA_3_.C 1 1 1 Node SM_AMIGA_2_.AR - 4 6 1 Node SM_AMIGA_2_.D + 3 9 1 Node SM_AMIGA_2_.D 1 1 1 Node SM_AMIGA_2_.C 1 1 1 Node cpu_est_0_.AR 3 3 1 Node cpu_est_0_.D @@ -1110,7 +1098,7 @@ PostFit_Equations 1 1 1 Node cpu_est_2_.AR 1 1 1 Node cpu_est_2_.C ========= - 245 P-Term Total: 245 + 240 P-Term Total: 240 Total Pins: 59 Total Nodes: 24 Average P-Term/Output: 2 @@ -1118,13 +1106,17 @@ PostFit_Equations Equations: +DSACK_0_ = (1); + +DSACK_0_.OE = (nEXP_SPACE); + BERR = (0); BERR.OE = (!FPU_CS.Q); CLK_DIV_OUT.AR = (!RST); -CLK_DIV_OUT.D = (inst_CLK_OUT_PRE.Q); +CLK_DIV_OUT.D = (inst_CLK_OUT_PRE_25.Q); CLK_DIV_OUT.C = (CLK_OSZI); @@ -1138,12 +1130,8 @@ AVEC_EXP = (0); AVEC_EXP.OE = (!FPU_CS.Q); -DSACK_0_ = (1); - -DSACK_0_.OE = (nEXP_SPACE); - AMIGA_BUS_DATA_DIR = (!RW & BGACK_030.Q - # !nEXP_SPACE & RW & !BGACK_030.Q); + # !nEXP_SPACE & RW & !BGACK_030.Q & !AS_000.PIN); AMIGA_BUS_ENABLE_LOW = (1); @@ -1153,26 +1141,41 @@ CIIN.OE = (!A_31_ & !A_30_ & !A_29_ & !A_28_ & !A_27_ & !A_26_ & !A_25_ & !A_24_ SIZE_1_.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); -!SIZE_1_.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !SIZE_1_.Q - # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & LDS_000.PIN - # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN); +!SIZE_1_.D = (!BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & LDS_000.PIN + # !BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN); SIZE_1_.AP = (!RST); SIZE_1_.C = (CLK_OSZI); -IPL_030_2_.D = (!inst_CLK_000_D0.Q & IPL_030_2_.Q - # inst_CLK_000_D1.Q & IPL_030_2_.Q +IPL_030_2_.D = (IPL_030_2_.Q & !inst_CLK_000_D0.Q + # IPL_030_2_.Q & inst_CLK_000_D1.Q # IPL_2_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); IPL_030_2_.AP = (!RST); IPL_030_2_.C = (CLK_OSZI); +IPL_030_1_.D = (IPL_030_1_.Q & !inst_CLK_000_D0.Q + # IPL_030_1_.Q & inst_CLK_000_D1.Q + # IPL_1_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); + +IPL_030_1_.AP = (!RST); + +IPL_030_1_.C = (CLK_OSZI); + +IPL_030_0_.D = (IPL_030_0_.Q & !inst_CLK_000_D0.Q + # IPL_030_0_.Q & inst_CLK_000_D1.Q + # IPL_0_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); + +IPL_030_0_.AP = (!RST); + +IPL_030_0_.C = (CLK_OSZI); + DSACK_1_.OE = (nEXP_SPACE); !DSACK_1_.D = (!DSACK_1_.Q & !AS_030.PIN - # BGACK_030.Q & !inst_CLK_000_D5.Q & inst_CLK_000_D4.Q & SM_AMIGA_1_.Q); + # !inst_CLK_000_D4.Q & SM_AMIGA_1_.Q & inst_CLK_000_D3.Q); DSACK_1_.AP = (!RST); @@ -1180,9 +1183,10 @@ DSACK_1_.C = (CLK_OSZI); AS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); -!AS_030.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !AS_030.Q - # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN - # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !LDS_000.PIN); +AS_030.D = (BGACK_030.Q + # AS_000.PIN + # CLK_030 & AS_030.Q + # UDS_000.PIN & LDS_000.PIN); AS_030.AP = (!RST); @@ -1190,29 +1194,22 @@ AS_030.C = (CLK_OSZI); AS_000.OE = (BGACK_030.Q); -!AS_000.D = (!AS_000.Q & !AS_030.PIN - # BGACK_030.Q & SM_AMIGA_5_.Q & inst_CLK_000_D4.Q); +!AS_000.D = (inst_CLK_000_D4.Q & SM_AMIGA_5_.Q + # !AS_000.Q & !AS_030.PIN); AS_000.AP = (!RST); AS_000.C = (CLK_OSZI); -SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); - -!SIZE_0_.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !SIZE_0_.Q - # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & !LDS_000.PIN); - -SIZE_0_.AP = (!RST); - -SIZE_0_.C = (CLK_OSZI); - DS_030.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); -!DS_030.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & !DS_030.Q - # !CLK_030 & RW & !BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN - # !CLK_030 & !BGACK_030.Q & !AS_030.Q & !AS_000.PIN & !UDS_000.PIN - # !CLK_030 & RW & !BGACK_030.Q & !AS_000.PIN & !LDS_000.PIN - # !CLK_030 & !BGACK_030.Q & !AS_030.Q & !AS_000.PIN & !LDS_000.PIN); +DS_030.D = (BGACK_030.Q + # AS_000.PIN + # RW & AS_030.Q + # UDS_000.PIN & LDS_000.PIN + # !CLK_030 & AS_030.Q & inst_CLK_030_H.Q + # CLK_030 & !RW & DS_030.Q + # !RW & !inst_CLK_030_H.Q & DS_030.Q); DS_030.AP = (!RST); @@ -1220,13 +1217,13 @@ DS_030.C = (CLK_OSZI); UDS_000.OE = (BGACK_030.Q); -!UDS_000.D = (!BGACK_030.Q & !UDS_000.Q & !AS_030.PIN - # !UDS_000.Q & !AS_030.PIN & DS_030.PIN - # RW & !SM_AMIGA_5_.Q & !UDS_000.Q & !AS_030.PIN +!UDS_000.D = (!UDS_000.Q & !AS_030.PIN & DS_030.PIN + # !RW & !inst_CLK_000_D0.Q & !UDS_000.Q & !AS_030.PIN # RW & !inst_CLK_000_D4.Q & !UDS_000.Q & !AS_030.PIN + # RW & !SM_AMIGA_5_.Q & !UDS_000.Q & !AS_030.PIN # !RW & !UDS_000.Q & !SM_AMIGA_4_.Q & !AS_030.PIN - # !RW & BGACK_030.Q & SM_AMIGA_4_.Q & !DS_030.PIN & !A0.PIN - # RW & BGACK_030.Q & SM_AMIGA_5_.Q & inst_CLK_000_D4.Q & !DS_030.PIN & !A0.PIN); + # RW & inst_CLK_000_D4.Q & SM_AMIGA_5_.Q & !DS_030.PIN & !A0.PIN + # !RW & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q & !DS_030.PIN & !A0.PIN); UDS_000.AP = (!RST); @@ -1234,17 +1231,17 @@ UDS_000.C = (CLK_OSZI); LDS_000.OE = (BGACK_030.Q); -!LDS_000.D = (!BGACK_030.Q & !LDS_000.Q & !AS_030.PIN - # !LDS_000.Q & !AS_030.PIN & DS_030.PIN - # RW & !SM_AMIGA_5_.Q & !LDS_000.Q & !AS_030.PIN +!LDS_000.D = (!LDS_000.Q & !AS_030.PIN & DS_030.PIN + # !RW & !inst_CLK_000_D0.Q & !LDS_000.Q & !AS_030.PIN # RW & !inst_CLK_000_D4.Q & !LDS_000.Q & !AS_030.PIN + # RW & !SM_AMIGA_5_.Q & !LDS_000.Q & !AS_030.PIN # !RW & !LDS_000.Q & !SM_AMIGA_4_.Q & !AS_030.PIN - # !RW & BGACK_030.Q & SM_AMIGA_4_.Q & !DS_030.PIN & !SIZE_0_.PIN - # !RW & BGACK_030.Q & SM_AMIGA_4_.Q & !DS_030.PIN & SIZE_1_.PIN - # !RW & BGACK_030.Q & SM_AMIGA_4_.Q & !DS_030.PIN & A0.PIN - # RW & BGACK_030.Q & SM_AMIGA_5_.Q & inst_CLK_000_D4.Q & !DS_030.PIN & !SIZE_0_.PIN - # RW & BGACK_030.Q & SM_AMIGA_5_.Q & inst_CLK_000_D4.Q & !DS_030.PIN & SIZE_1_.PIN - # RW & BGACK_030.Q & SM_AMIGA_5_.Q & inst_CLK_000_D4.Q & !DS_030.PIN & A0.PIN); + # RW & inst_CLK_000_D4.Q & SM_AMIGA_5_.Q & !DS_030.PIN & !SIZE_0_.PIN + # !RW & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q & !DS_030.PIN & !SIZE_0_.PIN + # RW & inst_CLK_000_D4.Q & SM_AMIGA_5_.Q & !DS_030.PIN & SIZE_1_.PIN + # !RW & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q & !DS_030.PIN & SIZE_1_.PIN + # RW & inst_CLK_000_D4.Q & SM_AMIGA_5_.Q & !DS_030.PIN & A0.PIN + # !RW & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q & !DS_030.PIN & A0.PIN); LDS_000.AP = (!RST); @@ -1252,8 +1249,7 @@ LDS_000.C = (CLK_OSZI); A0.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); -A0.D = (BGACK_030.Q & inst_BGACK_030_INT_D.Q & A0.Q - # !CLK_030 & !BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN); +A0.D = (!BGACK_030.Q & !AS_000.PIN & UDS_000.PIN & !LDS_000.PIN); A0.AP = (!RST); @@ -1275,7 +1271,7 @@ BGACK_030.C = (CLK_OSZI); CLK_EXP.AR = (!RST); -CLK_EXP.D = (inst_CLK_OUT_PRE.Q); +CLK_EXP.D = (inst_CLK_OUT_PRE_25.Q); CLK_EXP.C = (CLK_OSZI); @@ -1286,22 +1282,6 @@ FPU_CS.AP = (!RST); FPU_CS.C = (CLK_OSZI); -IPL_030_1_.D = (!inst_CLK_000_D0.Q & IPL_030_1_.Q - # inst_CLK_000_D1.Q & IPL_030_1_.Q - # IPL_1_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); - -IPL_030_1_.AP = (!RST); - -IPL_030_1_.C = (CLK_OSZI); - -IPL_030_0_.D = (!inst_CLK_000_D0.Q & IPL_030_0_.Q - # inst_CLK_000_D1.Q & IPL_030_0_.Q - # IPL_0_ & inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q); - -IPL_030_0_.AP = (!RST); - -IPL_030_0_.C = (CLK_OSZI); - E.D.X1 = (inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & cpu_est_1_.Q & cpu_est_2_.Q & E.Q # inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & cpu_est_0_.Q & !cpu_est_2_.Q & !E.Q # inst_CLK_000_D0.Q & !inst_CLK_000_D1.Q & !cpu_est_1_.Q & !cpu_est_2_.Q & !E.Q); @@ -1312,10 +1292,10 @@ E.AR = (!RST); E.C = (CLK_OSZI); -!VMA.D = (!BGACK_030.Q & !VMA.Q - # !VMA.Q & !SM_AMIGA_7_.Q - # !BGACK_030.Q & !inst_VPA_D.Q & !inst_CLK_000_D0.Q & cpu_est_0_.Q & !cpu_est_1_.Q - # !inst_VPA_D.Q & !inst_CLK_000_D0.Q & !SM_AMIGA_7_.Q & cpu_est_0_.Q & !cpu_est_1_.Q); +VMA.D.X1 = (VMA.Q + # !VMA.Q & inst_CLK_000_D0.Q & AS_000.Q & !cpu_est_0_.Q & cpu_est_1_.Q & cpu_est_2_.Q & !E.Q); + +VMA.D.X2 = (VMA.Q & !inst_VPA_D.Q & !inst_CLK_000_D0.Q & cpu_est_0_.Q & !cpu_est_1_.Q); VMA.AP = (!RST); @@ -1327,9 +1307,8 @@ RESET.D = (1); RESET.C = (CLK_OSZI); -!AMIGA_BUS_ENABLE.D = (!BGACK_030.Q & inst_BGACK_030_INT_D.Q - # !BGACK_030.Q & !AMIGA_BUS_ENABLE.Q - # nEXP_SPACE & BGACK_030.Q & !inst_CLK_000_D4.Q & SM_AMIGA_6_.Q +!AMIGA_BUS_ENABLE.D = (!BGACK_030.Q + # nEXP_SPACE & inst_BGACK_030_INT_D.Q & !inst_CLK_000_D4.Q & SM_AMIGA_6_.Q # !nEXP_SPACE & inst_BGACK_030_INT_D.Q & !AMIGA_BUS_ENABLE.Q & !AS_030.PIN # inst_BGACK_030_INT_D.Q & !SM_AMIGA_6_.Q & !AMIGA_BUS_ENABLE.Q & !AS_030.PIN # !nEXP_SPACE & inst_BGACK_030_INT_D.Q & !SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q & !AMIGA_BUS_ENABLE.Q @@ -1339,31 +1318,32 @@ AMIGA_BUS_ENABLE.AP = (!RST); AMIGA_BUS_ENABLE.C = (CLK_OSZI); +SIZE_0_.OE = (!nEXP_SPACE & !BGACK_030.Q & !AS_030.Q); + +!SIZE_0_.D = (!BGACK_030.Q & !AS_000.PIN & !UDS_000.PIN & !LDS_000.PIN); + +SIZE_0_.AP = (!RST); + +SIZE_0_.C = (CLK_OSZI); + inst_AS_030_000_SYNC.D = (AS_030.PIN # !nEXP_SPACE & inst_AS_030_000_SYNC.Q # !CLK_030 & inst_AS_030_000_SYNC.Q + # !BGACK_030.Q & inst_AS_030_000_SYNC.Q + # !nEXP_SPACE & SM_AMIGA_6_.Q # inst_AS_030_000_SYNC.Q & !SM_AMIGA_7_.Q - # !nEXP_SPACE & BGACK_030.Q & SM_AMIGA_6_.Q - # BGACK_030.Q & !inst_CLK_000_D5.Q & inst_CLK_000_D4.Q & SM_AMIGA_1_.Q + # !inst_CLK_000_D4.Q & SM_AMIGA_1_.Q & inst_CLK_000_D3.Q # FC_1_ & BGACK_000 & !A_19_ & !A_18_ & A_17_ & !A_16_ & FC_0_ & inst_AS_030_000_SYNC.Q); inst_AS_030_000_SYNC.AP = (!RST); inst_AS_030_000_SYNC.C = (CLK_OSZI); -!inst_DTACK_SYNC.D = (!inst_DTACK_SYNC.Q & !AS_030.PIN - # BGACK_030.Q & inst_VPA_D.Q & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !DTACK.PIN); +inst_BGACK_030_INT_D.D = (BGACK_030.Q); -inst_DTACK_SYNC.AP = (!RST); +inst_BGACK_030_INT_D.AP = (!RST); -inst_DTACK_SYNC.C = (CLK_OSZI); - -!inst_VPA_SYNC.D = (!inst_VPA_SYNC.Q & !AS_030.PIN - # BGACK_030.Q & !VMA.Q & !inst_VPA_D.Q & inst_CLK_000_D0.Q & SM_AMIGA_3_.Q & !cpu_est_1_.Q & E.Q); - -inst_VPA_SYNC.AP = (!RST); - -inst_VPA_SYNC.C = (CLK_OSZI); +inst_BGACK_030_INT_D.C = (CLK_OSZI); inst_VPA_D.D = (VPA); @@ -1371,6 +1351,12 @@ inst_VPA_D.AP = (!RST); inst_VPA_D.C = (CLK_OSZI); +inst_CLK_OUT_PRE_50_D.AR = (!RST); + +inst_CLK_OUT_PRE_50_D.D = (inst_CLK_OUT_PRE_50.Q); + +inst_CLK_OUT_PRE_50_D.C = (CLK_OSZI); + inst_CLK_000_D0.D = (CLK_000); inst_CLK_000_D0.AP = (!RST); @@ -1389,112 +1375,108 @@ inst_CLK_000_D2.AP = (!RST); inst_CLK_000_D2.C = (CLK_OSZI); -inst_CLK_000_D5.D = (inst_CLK_000_D4.Q); - -inst_CLK_000_D5.AP = (!RST); - -inst_CLK_000_D5.C = (CLK_OSZI); - -inst_CLK_OUT_PRE.AR = (!RST); - -inst_CLK_OUT_PRE.D = (!inst_CLK_OUT_PRE.Q & CLK_CNT_P_0_.Q - # inst_CLK_OUT_PRE.Q & !CLK_CNT_P_0_.Q); - -inst_CLK_OUT_PRE.C = (CLK_OSZI); - -inst_BGACK_030_INT_D.D = (BGACK_030.Q); - -inst_BGACK_030_INT_D.AP = (!RST); - -inst_BGACK_030_INT_D.C = (CLK_OSZI); - -CLK_CNT_P_0_.AR = (!RST); - -CLK_CNT_P_0_.D = (!CLK_CNT_P_0_.Q); - -CLK_CNT_P_0_.C = (CLK_OSZI); - -SM_AMIGA_5_.AR = (!RST); - -SM_AMIGA_5_.D = (!BGACK_030.Q & SM_AMIGA_5_.Q - # inst_CLK_000_D0.Q & SM_AMIGA_5_.Q - # BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_6_.Q); - -SM_AMIGA_5_.C = (CLK_OSZI); - inst_CLK_000_D4.D = (inst_CLK_000_D3.Q); inst_CLK_000_D4.AP = (!RST); inst_CLK_000_D4.C = (CLK_OSZI); -SM_AMIGA_7_.D = (!BGACK_030.Q & SM_AMIGA_7_.Q - # inst_AS_030_000_SYNC.Q & SM_AMIGA_7_.Q - # inst_CLK_000_D2.Q & SM_AMIGA_7_.Q - # SM_AMIGA_7_.Q & !inst_CLK_000_D3.Q - # !nEXP_SPACE & BGACK_030.Q & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q - # BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_0_.Q & AS_000.Q); +inst_DTACK_D0.D = (DTACK.PIN); -SM_AMIGA_7_.AP = (!RST); +inst_DTACK_D0.AP = (!RST); -SM_AMIGA_7_.C = (CLK_OSZI); +inst_DTACK_D0.C = (CLK_OSZI); + +inst_CLK_OUT_PRE_50.AR = (!RST); + +inst_CLK_OUT_PRE_50.D = (!inst_CLK_OUT_PRE_50.Q); + +inst_CLK_OUT_PRE_50.C = (CLK_OSZI); + +inst_CLK_OUT_PRE_25.AR = (!RST); + +inst_CLK_OUT_PRE_25.D = (inst_CLK_OUT_PRE_50_D.Q & inst_CLK_OUT_PRE_25.Q + # !inst_CLK_OUT_PRE_50.Q & inst_CLK_OUT_PRE_25.Q + # !inst_CLK_OUT_PRE_50_D.Q & inst_CLK_OUT_PRE_50.Q & !inst_CLK_OUT_PRE_25.Q); + +inst_CLK_OUT_PRE_25.C = (CLK_OSZI); SM_AMIGA_1_.AR = (!RST); -SM_AMIGA_1_.D = (!BGACK_030.Q & SM_AMIGA_1_.Q - # inst_CLK_000_D0.Q & SM_AMIGA_1_.Q - # !inst_CLK_000_D5.Q & inst_CLK_000_D4.Q & SM_AMIGA_1_.Q - # BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_2_.Q); +SM_AMIGA_1_.D = (inst_CLK_000_D0.Q & SM_AMIGA_1_.Q + # inst_CLK_000_D0.Q & SM_AMIGA_2_.Q + # !inst_CLK_000_D4.Q & SM_AMIGA_1_.Q & inst_CLK_000_D3.Q); SM_AMIGA_1_.C = (CLK_OSZI); -SM_AMIGA_0_.D.X1 = (SM_AMIGA_0_.Q - # BGACK_030.Q & !inst_CLK_000_D0.Q & inst_CLK_000_D5.Q & SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q - # BGACK_030.Q & !inst_CLK_000_D0.Q & !inst_CLK_000_D4.Q & SM_AMIGA_1_.Q & !SM_AMIGA_0_.Q); - -SM_AMIGA_0_.D.X2 = (BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_0_.Q & AS_000.Q); - SM_AMIGA_0_.AR = (!RST); +SM_AMIGA_0_.D = (!inst_CLK_000_D0.Q & SM_AMIGA_0_.Q + # !AS_000.Q & SM_AMIGA_0_.Q + # !inst_CLK_000_D0.Q & inst_CLK_000_D4.Q & SM_AMIGA_1_.Q + # !inst_CLK_000_D0.Q & SM_AMIGA_1_.Q & !inst_CLK_000_D3.Q); + SM_AMIGA_0_.C = (CLK_OSZI); SM_AMIGA_6_.AR = (!RST); -SM_AMIGA_6_.D = (!BGACK_030.Q & SM_AMIGA_6_.Q - # nEXP_SPACE & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q - # BGACK_030.Q & !inst_AS_030_000_SYNC.Q & !inst_CLK_000_D2.Q & SM_AMIGA_7_.Q & inst_CLK_000_D3.Q); +SM_AMIGA_6_.D = (!inst_AS_030_000_SYNC.Q & !inst_CLK_000_D2.Q & inst_CLK_000_D3.Q & SM_AMIGA_7_.Q + # nEXP_SPACE & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q & !SM_AMIGA_7_.Q); SM_AMIGA_6_.C = (CLK_OSZI); +SM_AMIGA_5_.AR = (!RST); + +SM_AMIGA_5_.D = (inst_CLK_000_D0.Q & SM_AMIGA_6_.Q + # inst_CLK_000_D0.Q & SM_AMIGA_5_.Q); + +SM_AMIGA_5_.C = (CLK_OSZI); + inst_CLK_000_D3.D = (inst_CLK_000_D2.Q); inst_CLK_000_D3.AP = (!RST); inst_CLK_000_D3.C = (CLK_OSZI); -SM_AMIGA_3_.AR = (!RST); +inst_CLK_030_H.D = (!RST & inst_CLK_030_H.Q + # !BGACK_030.Q & inst_CLK_030_H.Q & !AS_000.PIN & !UDS_000.PIN + # !BGACK_030.Q & inst_CLK_030_H.Q & !AS_000.PIN & !LDS_000.PIN + # CLK_030 & RST & !BGACK_030.Q & !AS_030.Q & !AS_000.PIN & !UDS_000.PIN + # CLK_030 & RST & !BGACK_030.Q & !AS_030.Q & !AS_000.PIN & !LDS_000.PIN); -SM_AMIGA_3_.D = (!BGACK_030.Q & SM_AMIGA_3_.Q - # inst_CLK_000_D0.Q & SM_AMIGA_3_.Q - # inst_DTACK_SYNC.Q & inst_VPA_SYNC.Q & SM_AMIGA_3_.Q - # BGACK_030.Q & inst_CLK_000_D0.Q & SM_AMIGA_4_.Q); +inst_CLK_030_H.C = (CLK_OSZI); -SM_AMIGA_3_.C = (CLK_OSZI); +SM_AMIGA_7_.D = (inst_AS_030_000_SYNC.Q & SM_AMIGA_7_.Q + # inst_CLK_000_D2.Q & SM_AMIGA_7_.Q + # !inst_CLK_000_D3.Q & SM_AMIGA_7_.Q + # inst_CLK_000_D0.Q & AS_000.Q & SM_AMIGA_0_.Q + # !nEXP_SPACE & !inst_CLK_000_D0.Q & SM_AMIGA_6_.Q); + +SM_AMIGA_7_.AP = (!RST); + +SM_AMIGA_7_.C = (CLK_OSZI); SM_AMIGA_4_.AR = (!RST); -SM_AMIGA_4_.D = (!BGACK_030.Q & SM_AMIGA_4_.Q - # !inst_CLK_000_D0.Q & SM_AMIGA_4_.Q - # BGACK_030.Q & !inst_CLK_000_D0.Q & SM_AMIGA_5_.Q); +SM_AMIGA_4_.D = (!inst_CLK_000_D0.Q & SM_AMIGA_5_.Q + # !inst_CLK_000_D0.Q & SM_AMIGA_4_.Q); SM_AMIGA_4_.C = (CLK_OSZI); +SM_AMIGA_3_.AR = (!RST); + +!SM_AMIGA_3_.D = (!inst_CLK_000_D0.Q & !SM_AMIGA_3_.Q + # !SM_AMIGA_4_.Q & !SM_AMIGA_3_.Q + # inst_VPA_D.Q & !inst_CLK_000_D0.Q & inst_CLK_000_D1.Q & !inst_DTACK_D0.Q + # !VMA.Q & !inst_VPA_D.Q & !inst_CLK_000_D0.Q & inst_CLK_000_D1.Q & !cpu_est_1_.Q & E.Q); + +SM_AMIGA_3_.C = (CLK_OSZI); + SM_AMIGA_2_.AR = (!RST); -SM_AMIGA_2_.D = (!BGACK_030.Q & SM_AMIGA_2_.Q - # !inst_CLK_000_D0.Q & SM_AMIGA_2_.Q - # BGACK_030.Q & !inst_DTACK_SYNC.Q & !inst_CLK_000_D0.Q & SM_AMIGA_3_.Q - # BGACK_030.Q & !inst_VPA_SYNC.Q & !inst_CLK_000_D0.Q & SM_AMIGA_3_.Q); +SM_AMIGA_2_.D = (!inst_CLK_000_D0.Q & SM_AMIGA_2_.Q + # inst_VPA_D.Q & !inst_CLK_000_D0.Q & inst_CLK_000_D1.Q & !inst_DTACK_D0.Q & SM_AMIGA_3_.Q + # !VMA.Q & !inst_VPA_D.Q & !inst_CLK_000_D0.Q & inst_CLK_000_D1.Q & SM_AMIGA_3_.Q & !cpu_est_1_.Q & E.Q); SM_AMIGA_2_.C = (CLK_OSZI); diff --git a/Logic/68030_tk.tal b/Logic/68030_tk.tal index 38c590a..481277e 100644 --- a/Logic/68030_tk.tal +++ b/Logic/68030_tk.tal @@ -32,65 +32,62 @@ TCR, Clocked Output-to-Register Time, TSU TCO TPD TCR #passes #passes #passes #passes SIGNAL NAME min max min max min max min max - inst_DTACK_SYNC 1 2 .. .. .. .. 1 1 + inst_DTACK_D0 1 2 .. .. .. .. 1 1 DTACK .. .. .. .. 1 1 .. .. AMIGA_BUS_DATA_DIR .. .. .. .. 1 1 .. .. CIIN .. .. .. .. 1 1 .. .. - SIZE_1_ 1 1 0 0 .. .. 1 1 - RN_SIZE_1_ 1 1 0 0 .. .. 1 1 + SIZE_1_ 1 1 0 0 .. .. .. .. IPL_030_2_ 1 1 0 0 .. .. 1 1 RN_IPL_030_2_ 1 1 0 0 .. .. 1 1 + IPL_030_1_ 1 1 0 0 .. .. 1 1 + RN_IPL_030_1_ 1 1 0 0 .. .. 1 1 + IPL_030_0_ 1 1 0 0 .. .. 1 1 + RN_IPL_030_0_ 1 1 0 0 .. .. 1 1 DSACK_1_ 1 1 0 0 .. .. 1 1 RN_DSACK_1_ 1 1 0 0 .. .. 1 1 AS_030 1 1 0 0 .. .. 1 1 RN_AS_030 1 1 0 0 .. .. 1 1 AS_000 1 1 0 0 .. .. 1 1 RN_AS_000 1 1 0 0 .. .. 1 1 - SIZE_0_ 1 1 0 0 .. .. 1 1 - RN_SIZE_0_ 1 1 0 0 .. .. 1 1 DS_030 1 1 0 0 .. .. 1 1 RN_DS_030 1 1 0 0 .. .. 1 1 UDS_000 1 1 0 0 .. .. 1 1 RN_UDS_000 1 1 0 0 .. .. 1 1 LDS_000 1 1 0 0 .. .. 1 1 RN_LDS_000 1 1 0 0 .. .. 1 1 - A0 1 1 0 0 .. .. 1 1 - RN_A0 1 1 0 0 .. .. 1 1 + A0 1 1 0 0 .. .. .. .. BG_000 1 1 0 0 .. .. 1 1 RN_BG_000 1 1 0 0 .. .. 1 1 BGACK_030 1 1 0 1 .. .. 1 1 RN_BGACK_030 1 1 0 1 .. .. 1 1 FPU_CS 1 1 0 0 .. .. 1 1 RN_FPU_CS 1 1 0 0 .. .. 1 1 - IPL_030_1_ 1 1 0 0 .. .. 1 1 - RN_IPL_030_1_ 1 1 0 0 .. .. 1 1 - IPL_030_0_ 1 1 0 0 .. .. 1 1 - RN_IPL_030_0_ 1 1 0 0 .. .. 1 1 E .. .. 0 0 .. .. 1 1 RN_E .. .. 0 0 .. .. 1 1 VMA .. .. 0 0 .. .. 1 1 RN_VMA .. .. 0 0 .. .. 1 1 AMIGA_BUS_ENABLE 1 1 0 0 .. .. 1 1 RN_AMIGA_BUS_ENABLE 1 1 0 0 .. .. 1 1 + SIZE_0_ 1 1 0 0 .. .. .. .. inst_AS_030_000_SYNC 1 1 .. .. .. .. 1 1 - inst_VPA_SYNC 1 1 .. .. .. .. 1 1 +inst_BGACK_030_INT_D .. .. .. .. .. .. 1 1 inst_VPA_D 1 1 .. .. .. .. 1 1 +inst_CLK_OUT_PRE_50_D .. .. .. .. .. .. 1 1 inst_CLK_000_D0 1 1 .. .. .. .. 1 1 inst_CLK_000_D1 .. .. .. .. .. .. 1 1 inst_CLK_000_D2 .. .. .. .. .. .. 1 1 - inst_CLK_000_D5 .. .. .. .. .. .. 1 1 -inst_CLK_OUT_PRE .. .. .. .. .. .. 1 1 -inst_BGACK_030_INT_D .. .. .. .. .. .. 1 1 - CLK_CNT_P_0_ .. .. .. .. .. .. 1 1 - SM_AMIGA_5_ .. .. .. .. .. .. 1 1 inst_CLK_000_D4 .. .. .. .. .. .. 1 1 - SM_AMIGA_7_ 1 1 .. .. .. .. 1 1 +inst_CLK_OUT_PRE_50 .. .. .. .. .. .. 1 1 +inst_CLK_OUT_PRE_25 .. .. .. .. .. .. 1 1 SM_AMIGA_1_ .. .. .. .. .. .. 1 1 SM_AMIGA_0_ .. .. .. .. .. .. 1 1 SM_AMIGA_6_ 1 1 .. .. .. .. 1 1 + SM_AMIGA_5_ .. .. .. .. .. .. 1 1 inst_CLK_000_D3 .. .. .. .. .. .. 1 1 - SM_AMIGA_3_ .. .. .. .. .. .. 1 1 + inst_CLK_030_H 1 1 .. .. .. .. 1 1 + SM_AMIGA_7_ 1 1 .. .. .. .. 1 1 SM_AMIGA_4_ .. .. .. .. .. .. 1 1 + SM_AMIGA_3_ .. .. .. .. .. .. 1 1 SM_AMIGA_2_ .. .. .. .. .. .. 1 1 cpu_est_0_ .. .. .. .. .. .. 1 1 cpu_est_1_ .. .. .. .. .. .. 1 1 diff --git a/Logic/68030_tk.tt2 b/Logic/68030_tk.tt2 index eda603c..e99689d 100644 --- a/Logic/68030_tk.tt2 +++ b/Logic/68030_tk.tt2 @@ -1,402 +1,365 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Sun May 25 21:18:50 2014 +#$ DATE Wed May 28 21:24:55 2014 #$ MODULE 68030_tk -#$ PINS 59 A_31_ IPL_2_ FC_1_ A_30_ A_29_ A_28_ A_27_ nEXP_SPACE A_26_ BERR A_25_ BG_030 A_24_ A_23_ A_22_ BGACK_000 A_21_ CLK_030 A_20_ CLK_000 A_19_ CLK_OSZI A_18_ CLK_DIV_OUT A_17_ A_16_ DTACK AVEC IPL_1_ AVEC_EXP IPL_0_ DSACK_0_ VPA FC_0_ RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_1_ IPL_030_2_ DSACK_1_ AS_030 AS_000 SIZE_0_ DS_030 UDS_000 LDS_000 A0 BG_000 BGACK_030 CLK_EXP FPU_CS IPL_030_1_ IPL_030_0_ E VMA RESET AMIGA_BUS_ENABLE -#$ NODES 24 inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_SYNC inst_VPA_D inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D5 inst_CLK_OUT_PRE inst_BGACK_030_INT_D CLK_CNT_P_0_ SM_AMIGA_5_ inst_CLK_000_D4 SM_AMIGA_7_ SM_AMIGA_1_ SM_AMIGA_0_ SM_AMIGA_6_ inst_CLK_000_D3 SM_AMIGA_3_ SM_AMIGA_4_ SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ cpu_est_2_ +#$ PINS 59 A_21_ A_20_ A_19_ A_18_ A_31_ A_17_ A_16_ IPL_2_ IPL_1_ IPL_0_ DSACK_0_ FC_0_ FC_1_ nEXP_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT DTACK AVEC AVEC_EXP VPA RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ SIZE_1_ IPL_030_2_ IPL_030_1_ IPL_030_0_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 BG_000 BGACK_030 CLK_EXP FPU_CS E VMA RESET AMIGA_BUS_ENABLE SIZE_0_ +#$ NODES 24 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_VPA_D inst_CLK_OUT_PRE_50_D inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D4 inst_DTACK_D0 inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_25 SM_AMIGA_1_ SM_AMIGA_0_ SM_AMIGA_6_ SM_AMIGA_5_ inst_CLK_000_D3 inst_CLK_030_H SM_AMIGA_7_ SM_AMIGA_4_ SM_AMIGA_3_ SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ cpu_est_2_ .type fr -.i 82 -.o 157 -.ilb A_31_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BG_000.Q BGACK_030.Q FPU_CS.Q VMA.Q inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_SYNC.Q inst_VPA_D.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q inst_CLK_000_D5.Q IPL_030_0_.Q inst_CLK_OUT_PRE.Q inst_BGACK_030_INT_D.Q IPL_030_1_.Q IPL_030_2_.Q CLK_CNT_P_0_.Q SM_AMIGA_5_.Q inst_CLK_000_D4.Q SM_AMIGA_7_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q SM_AMIGA_6_.Q AS_030.Q AS_000.Q UDS_000.Q LDS_000.Q DSACK_1_.Q inst_CLK_000_D3.Q SM_AMIGA_3_.Q DS_030.Q SIZE_0_.Q SIZE_1_.Q A0.Q SM_AMIGA_4_.Q SM_AMIGA_2_.Q AMIGA_BUS_ENABLE.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q E.Q AS_030.PIN AS_000.PIN DS_030.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN A0.PIN DSACK_1_.PIN DTACK.PIN -.ob BERR AVEC AVEC_EXP AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN cpu_est_0_.C cpu_est_0_.AR cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.C cpu_est_2_.AR E.C E.AR SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.C SM_AMIGA_0_.AR IPL_030_0_.C IPL_030_0_.AP IPL_030_1_.C IPL_030_1_.AP IPL_030_2_.C IPL_030_2_.AP SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.C SM_AMIGA_2_.AR AS_000.C AS_000.AP inst_VPA_SYNC.C inst_VPA_SYNC.AP VMA.C VMA.AP BGACK_030.C BGACK_030.AP inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR SIZE_0_.C SIZE_0_.AP SIZE_1_.C SIZE_1_.AP DS_030.C DS_030.AP FPU_CS.C FPU_CS.AP inst_DTACK_SYNC.C inst_DTACK_SYNC.AP A0.C A0.AP BG_000.C BG_000.AP DSACK_1_.C DSACK_1_.AP AS_030.C AS_030.AP AMIGA_BUS_ENABLE.C AMIGA_BUS_ENABLE.AP UDS_000.C UDS_000.AP LDS_000.C LDS_000.AP inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_CLK_000_D5.C inst_CLK_000_D5.AP inst_CLK_000_D3.C inst_CLK_000_D3.AP CLK_CNT_P_0_.C CLK_CNT_P_0_.AR inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D1.C inst_CLK_000_D1.AP CLK_EXP.C CLK_EXP.AR inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP inst_CLK_000_D0.C inst_CLK_000_D0.AP inst_VPA_D.C inst_VPA_D.AP RESET.C RESET.AR DTACK DSACK_0_ AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_DIV_OUT.AR CLK_DIV_OUT.C CLK_DIV_OUT.D BG_000.D BGACK_030.D FPU_CS.D VMA.D inst_AS_030_000_SYNC.D inst_DTACK_SYNC.D inst_VPA_SYNC.D inst_VPA_D.D inst_CLK_000_D0.D CLK_EXP.D inst_CLK_000_D1.D inst_CLK_000_D2.D inst_CLK_000_D5.D IPL_030_0_.D inst_CLK_OUT_PRE.D inst_BGACK_030_INT_D.D IPL_030_1_.D IPL_030_2_.D CLK_CNT_P_0_.D SM_AMIGA_5_.D inst_CLK_000_D4.D SM_AMIGA_7_.D SM_AMIGA_1_.D SM_AMIGA_0_.D SM_AMIGA_6_.D AS_030.D AS_000.D UDS_000.D LDS_000.D DSACK_1_.D inst_CLK_000_D3.D SM_AMIGA_3_.D DS_030.D SIZE_0_.D SIZE_1_.D A0.D SM_AMIGA_4_.D RESET.D SM_AMIGA_2_.D AMIGA_BUS_ENABLE.D cpu_est_0_.D cpu_est_1_.T cpu_est_2_.D E.D -.p 390 ----------------------------------------------------------------------------------- ~1~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ ----1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----1----------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------1-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------1------------------------------------------------------------------------- ~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------1------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------0----------------------------------------------------------------------- ~~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -0-----------0000000--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------1111----------------------------------------------------------- ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0--------------------------1--------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 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-------0------------------------0-----------------------------------------0-01----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ -------0------------------------0-----------------------------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ -------0----1-------------------0-----------------------------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ -------0------------------------0----------------------0------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ -------0------------------------0-----------------------------------------0-10----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ -------0------------------------0-----------------------------------------0-00----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ ------------1-------------------1----------------11------------------------0--0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ ------------0-------------------1---------------------------------1--------0--0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ ------------1-------------------1----------------11------------------------0---1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ ------------0-------------------1---------------------------------1--------0---1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ ------------1-------------------1----------------11------------------------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ ------------0-------------------1---------------------------------1--------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ ------------1-------------------1----------------11------------------------0----0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ ------------0-------------------1---------------------------------1--------0----0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ ---------------------------------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------1-----11---------------------1--------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +.i 79 +.o 156 +.ilb A_31_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BGACK_030.Q FPU_CS.Q VMA.Q inst_AS_030_000_SYNC.Q IPL_030_0_.Q inst_BGACK_030_INT_D.Q AS_030.Q IPL_030_1_.Q inst_VPA_D.Q inst_CLK_OUT_PRE_50_D.Q IPL_030_2_.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q inst_CLK_000_D4.Q inst_DTACK_D0.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_25.Q AS_000.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q SM_AMIGA_6_.Q SM_AMIGA_5_.Q UDS_000.Q LDS_000.Q DSACK_1_.Q inst_CLK_000_D3.Q inst_CLK_030_H.Q DS_030.Q SM_AMIGA_7_.Q AMIGA_BUS_ENABLE.Q SM_AMIGA_4_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q E.Q BG_000.Q AS_030.PIN AS_000.PIN DS_030.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN A0.PIN DSACK_1_.PIN DTACK.PIN +.ob BERR AVEC AVEC_EXP AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN cpu_est_0_.C cpu_est_0_.AR cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.C cpu_est_2_.AR E.C E.AR SM_AMIGA_0_.C SM_AMIGA_0_.AR SIZE_1_.C SIZE_1_.AP IPL_030_0_.C IPL_030_0_.AP IPL_030_1_.C IPL_030_1_.AP IPL_030_2_.C IPL_030_2_.AP SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.C SM_AMIGA_1_.AR DSACK_1_.C DSACK_1_.AP VMA.C VMA.AP BGACK_030.C BGACK_030.AP inst_CLK_OUT_PRE_25.C inst_CLK_OUT_PRE_25.AR SIZE_0_.C SIZE_0_.AP UDS_000.C UDS_000.AP LDS_000.C LDS_000.AP FPU_CS.C FPU_CS.AP BG_000.C BG_000.AP DS_030.C DS_030.AP AS_030.C AS_030.AP AS_000.C AS_000.AP AMIGA_BUS_ENABLE.C AMIGA_BUS_ENABLE.AP inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_CLK_030_H.C A0.C A0.AP inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_DTACK_D0.C inst_DTACK_D0.AP inst_CLK_000_D3.C inst_CLK_000_D3.AP inst_CLK_000_D2.C inst_CLK_000_D2.AP CLK_EXP.C CLK_EXP.AR inst_CLK_000_D1.C inst_CLK_000_D1.AP inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP inst_CLK_OUT_PRE_50_D.C inst_CLK_OUT_PRE_50_D.AR inst_CLK_000_D0.C inst_CLK_000_D0.AP inst_VPA_D.C inst_VPA_D.AP inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_50.AR RESET.C RESET.AR DTACK DSACK_0_ AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_DIV_OUT.AR CLK_DIV_OUT.C CLK_DIV_OUT.D BGACK_030.D CLK_EXP.D FPU_CS.D VMA.D inst_AS_030_000_SYNC.D IPL_030_0_.D inst_BGACK_030_INT_D.D AS_030.D IPL_030_1_.D inst_VPA_D.D inst_CLK_OUT_PRE_50_D.D IPL_030_2_.D inst_CLK_000_D0.D inst_CLK_000_D1.D inst_CLK_000_D2.D inst_CLK_000_D4.D inst_DTACK_D0.D inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_25.D AS_000.D SM_AMIGA_1_.D SM_AMIGA_0_.D SM_AMIGA_6_.D SM_AMIGA_5_.D UDS_000.D LDS_000.D DSACK_1_.D inst_CLK_000_D3.D inst_CLK_030_H.D RESET.D DS_030.D SIZE_0_.D SIZE_1_.D A0.D SM_AMIGA_7_.D AMIGA_BUS_ENABLE.D SM_AMIGA_4_.D SM_AMIGA_3_.D SM_AMIGA_2_.D cpu_est_0_.D cpu_est_1_.T cpu_est_2_.D E.D BG_000.D +.p 353 +------------------------------------------------------------------------------- ~1~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +---1--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-------1----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------1---------------------------------------------------------------------- ~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~11~1~1~1~1~1~1~1~1~1~1~1~1~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------0-------------------------------------------------------------------- ~~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~~1~1~1~1~1~1~1~1~1~1~1~1~1~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +0-----------0000000------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------1111-------------------------------------------------------- ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~11~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~111~~~~~~~~~~~ +-----1------------------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0------------------1------------------------------------------------ ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--0----------------------------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----0-------------------------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0------------------------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1-------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------0-----1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1----1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------0-1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------0----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------------------------1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0--------------------------1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--1--1-----------------0010--1---1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0--1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1----0------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +------1-----------------------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +---0--------------------------0-----0------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~111~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1-----1---------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------1------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------1--------1------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------1------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------1---0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------10------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------1-------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------1----1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------1-1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-1---------------------------------------10------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----1-----------------------------------10------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------1-------------10------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------1------------10------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~ +----------------------------------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------1------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1-------1------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------01------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0------10------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------0---1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------1-------1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------0--1----1----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------0--------1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------1------1-1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +------------------------------------------------0-1---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +---0-----------------------------------------------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------1---------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +---0-------------------------------------0---------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +---1--------------------------1-------------1------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +-----------------------------------------1----------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------0----------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +------------------------------------------------1---0-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-----------------------------0-----------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------0--------1------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------------01------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------0-----------------------------0------------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------0---------1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------------0-1------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +--------------------------------------------1----------1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-------------------------------------------------0-----1----------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +--------------------------------------------------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------0----1------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------0-------1------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------10---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +----------0----------------------------------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +------0-----------------------------1--------------------1--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +------1----0----------------------------------------------1-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +-----------0---------------------------------------------01-------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~ +---------------------------------1-------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +-------------------------------------------1---------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +---------------------------------0---------0------------1--1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------0--1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~ +---------------------------------1-------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-------------------------------------0---------1-------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~ +---0--------------------------1-----------------------------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +------------------------------1--------------------0--------1------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +-----------------------------------------1-------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------------------------------------0-------------------1----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~ +-----------0-----------------------------------------1-------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------0------------------------------------------1------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +--------------------------------1-----0-----------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------------------------------------1--------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +------------------------------------------0-------------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +--------------------------------------1------1----------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +--------------------------------------1--01--0----------------1---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +-----------------------------------------1---------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------0---------------------1--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +-----------------------------------------0----------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +------------------------------------------1---------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +--------------------------------1-------------------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------10---------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~ +--------------------------------1--------------------------------1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------0-----------------------1--1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------------------------------------10---------------------00------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-----------------------------------------0------------------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +------------------------------------------1-----------------------1------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-----------------------------------------------------------------11------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-----------------------------------------10---------------------1-0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-----------------------------------------10----------------------00------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-----------------------------------------0-------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +------------------------------------------1------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-----------------------------------------10---------------------1--1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~ +-----------------------------------------------------------------0-1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +--------------------------------0-----0--01-------------------1--0-1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~ +-----------------------------------------10----------------------011----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +------------------------------------------------------------------01----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~ +-----------------------------------------10---------------------1-01----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +--------------------------------------0-----------------------1----0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ +-----------------------------------------10---------------------1-10----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +-----------------------------------------1------1---------------0110----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------10----------------------000----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~ +---0----------------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-------0------------------------------------------------------------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-----------------------------------------------------------0--------1---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +---------------------------------------------------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-----------------------------0---------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~ +--------------------------------------------1------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +--------------------------------------------0------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------0------------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~ +---0--------------------------1------------------1-------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +-------------------------------------------------0-------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +---0--------------------------1-------------------1------------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +------------------------------1------------------1-0-----------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +------------------------------1-------------------10-----------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~ +----------------------------------------------------0----------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------------0----------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------0------------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~ +-----------0-------------------------------------------------0-------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------------10--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +----------------------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~111~~~~~~~~~~~ +---0-------1------------------0---------------------------------------0-------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------1-----------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------1----------------1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +---------------------------------------------------------------------1-1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------1------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +------1---1-------------------0-----0---------------------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +------------------------------0--------------------------1------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +-------------------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~ +------------------------------------------------------------------------11----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~ +------1---1-------------------0-----0---------------------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +------------------------------0--------------------------1------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~ +------------------------------0---------------------------------------0-10----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~ +------------------------------------------------------------------------00----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~ +-----------1--------------------------------1-------1------------------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------0-----------------------------1-------------------1---------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------1-------1------------------0--100-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +-----------0-----------------------------1-------------------1---------0--100-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------1- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------1 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------- 0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~000~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----0------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------0----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------0---------------------------------------------------------------------- ~~~~~~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~00~0~0~0~0~0~0~0~0~0~0~0~0~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------0--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------1-------------------------------------------------------------------- ~~~~~~~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~0~~0~0~0~0~0~0~0~0~0~0~0~0~0~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------1------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------1----------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------1---------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------1--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------1-------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------1------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------1------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------0----------------------------------------------------------- ~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------0---------------------------------------------------------- ~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------0--------------------------------------------------------- ~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------0-------------------------------------------------------- ~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~000~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +----------1-------------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +-----------1------------------1------------------------------------------------ ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~00~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +---1--------------------------0------------------------------------------------ ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0------------------0------------------------------------------------ ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------1------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~000~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------1------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~ +-----------------------------------------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~0~~~~~~~~~~~~~~~~0~~~ +------------------------------0----------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------0--------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------0------0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------0---0------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------00------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +------------------------------0-----------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------0-------1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------0----1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------0-1------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------0------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-0---------------------------------------10------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------0-------------10------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------0------------10------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------0----------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ +-----------------------------------------0--1---------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------1--01--0--------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +----------------------------------------------1-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------0-------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------0------11------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------1-------0------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +----------------------------------------------00------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------1------1------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------0---------------0------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------0-------0----------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------1--------0---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------------00---------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +---1-------------------------------1--------0------1--------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +--------------------------------------------1-------1-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------------------------00-------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~ +---1-----------------------------0-------0-0------------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +---------------------------------0-------1-0----0-------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +--------------------------------------------0----1------1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +---------------------------------0-------1-0------0-----1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +--------------------------------------------0-----0-----1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------0-------0-0-------0----1---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +--------------------------------------------------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------0--------------0---------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ +------0--------------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +----------0----------------------------------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +------------------------------------1--------------------0--------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +---------------------------------1-------------------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +-------------------------------------------1---------------1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------0--1------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +---0-------------------------------------------------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------1-----------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +---1-------------------------------------0-----------------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +-----------------------------------------1------0----------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +-----------------------------------------1--------0--------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +---------------------------------------------------0-------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------0---------0-------0------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ +---0-------------------------------1-------------00---------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +-----------------------------------1-------------000--------0------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +----------------------------------------------------0--------0----------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~ +-----------------------------------------0--------------------0---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-------------------------------------------------------------00---------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +--------------------------------1-----0------------------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +------------------------------------------0--------------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +--------------------------------------1------1-----------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +-------------------------------------------------0-------------0--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------------------------------00--------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +--------------------------------0-------------------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------10---------------------1-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +-----------------------------------------0----------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +------------------------------------------1---------------------0-------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~ +--------------------------------------0------------------------0-1------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +--------------------------------0--------------------------------0------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------------0--0----------------------10------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------10----------------------11------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +--------------------------------0---------------------------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------0------------------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +------------------------------------------1-----------------------0------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +----------------------------------------------------------------010------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +--------------------------------0----------------------------------1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------------0-----0--01----------------------0-1----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~ +-----------------------------------------------------------------111----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +----------------------------------------------------------------0-01----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +-----------------------------------------0-------------------------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +------------------------------------------1------------------------0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +--------------------------------------0------------------------0---0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~ +----------------------------------------------------------------01-0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +-----------------------------------------10---------------------10-0----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +------------------------------------------------------------------10----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~ +----------------------------------------------------------------0-10----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +----------------------------------------------------------------1-00----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~ +-----------------------------------------------------------------100----------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~ +----0---------------------------------------------------------------0---------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +---10--1---------------------------------------------------1---------1--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0 +--1--11----------------0010--1---------------------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------0-------------------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-----------------------------0----------1------------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------0--------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~ +---1-----------------------------0---------------0-------------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------0----------1------0-----------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------0---------------0-0-----------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0-----------------------------0-----------0---------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------0--------0---------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------------00---------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-----------0-----------------------------0------------0--------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------0---------0--------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------1----------------------------------------0-0--------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-------------------------------------------------------0-------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~ +---1-----------------------------0----------------------0------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------------------------------0-----------------0----0------------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--01--1-----------------------1-------------1--------------1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-01-----------------------1-------------1--------------1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1----------------1------1-------------1--------------1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1-----------------1-----1-------------1--------------1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1------------------0----1-------------1--------------1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1-------------------1---1-------------1--------------1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1----------------------01-------------1--------------1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--01--1-----------------------1------------------0---------1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-01-----------------------1------------------0---------1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1----------------1------1------------------0---------1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1-----------------1-----1------------------0---------1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1------------------0----1------------------0---------1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1-------------------1---1------------------0---------1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1----------------------01------------------0---------1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--01--1-----------------------1-------------------------0--1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1-01-----------------------1-------------------------0--1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1----------------1------1-------------------------0--1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1-----------------1-----1-------------------------0--1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1------------------0----1-------------------------0--1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1-------------------1---1-------------------------0--1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---1--1----------------------01-------------------------0--1---------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-------------------------------1------------------------0--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +-----------------------------------1---------------0--------0--------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ +-----------0-----------------------------------------0-------0-------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-----------0------------------------------------------0------0-------0--------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +----------------------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +----------1-----------------------------------------------------------1-------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +------------------------------0---------------------------------------1-------- ~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------0---------------0-1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------0--------------0-1------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +------0-----------------------0---------------------------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0-----0---------------------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------0-----0---------------------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +------0-----------------------0-----0--------------------1------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +------1----0------------------0---------------------------0-----------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +-----------0------------------0--------------------------00-----------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +-------------------------------------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ +----------1-------------------------------------------------------------11----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ +------------------------------0---------------------------------------0-01----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +------0-----------------------0---------------------------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0-----0---------------------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------1------------------0-----0---------------------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +------0-----------------------0-----0--------------------1------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +------1----0------------------0---------------------------0-----------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +-----------0------------------0--------------------------00-----------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~ +------------------------------0---------------------------------------0-10----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ +------------------------------0---------------------------------------0-00----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~ +-----------1--------------------------------1-------1------------------0--0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------0-----------------------------1-------------------1---------0--0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------1-------1------------------0---1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------0-----------------------------1-------------------1---------0---1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------1-------1------------------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------0-----------------------------1-------------------1---------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------1-------1------------------0----0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-----------0-----------------------------1-------------------1---------0----0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ .end diff --git a/Logic/68030_tk.tt3 b/Logic/68030_tk.tt3 index 2b4c54d..36ed50f 100644 --- a/Logic/68030_tk.tt3 +++ b/Logic/68030_tk.tt3 @@ -1,402 +1,365 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Sun May 25 21:18:50 2014 +#$ DATE Wed May 28 21:24:55 2014 #$ MODULE 68030_tk -#$ PINS 59 A_31_ IPL_2_ FC_1_ A_30_ A_29_ A_28_ A_27_ nEXP_SPACE A_26_ BERR A_25_ BG_030 A_24_ A_23_ A_22_ BGACK_000 A_21_ CLK_030 A_20_ CLK_000 A_19_ CLK_OSZI A_18_ CLK_DIV_OUT A_17_ A_16_ DTACK AVEC IPL_1_ AVEC_EXP IPL_0_ DSACK_0_ VPA FC_0_ RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_1_ IPL_030_2_ DSACK_1_ AS_030 AS_000 SIZE_0_ DS_030 UDS_000 LDS_000 A0 BG_000 BGACK_030 CLK_EXP FPU_CS IPL_030_1_ IPL_030_0_ E VMA RESET AMIGA_BUS_ENABLE -#$ NODES 24 inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_SYNC inst_VPA_D inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D5 inst_CLK_OUT_PRE inst_BGACK_030_INT_D CLK_CNT_P_0_ SM_AMIGA_5_ inst_CLK_000_D4 SM_AMIGA_7_ SM_AMIGA_1_ SM_AMIGA_0_ SM_AMIGA_6_ inst_CLK_000_D3 SM_AMIGA_3_ SM_AMIGA_4_ SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ cpu_est_2_ +#$ PINS 59 A_21_ A_20_ A_19_ A_18_ A_31_ A_17_ A_16_ IPL_2_ IPL_1_ IPL_0_ DSACK_0_ FC_0_ FC_1_ nEXP_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT DTACK AVEC AVEC_EXP VPA RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ SIZE_1_ IPL_030_2_ IPL_030_1_ IPL_030_0_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 BG_000 BGACK_030 CLK_EXP FPU_CS E VMA RESET AMIGA_BUS_ENABLE SIZE_0_ +#$ NODES 24 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_VPA_D inst_CLK_OUT_PRE_50_D inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D4 inst_DTACK_D0 inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_25 SM_AMIGA_1_ SM_AMIGA_0_ SM_AMIGA_6_ SM_AMIGA_5_ inst_CLK_000_D3 inst_CLK_030_H SM_AMIGA_7_ SM_AMIGA_4_ SM_AMIGA_3_ SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ cpu_est_2_ .type fr -.i 82 -.o 157 -.ilb A_31_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BG_000.Q BGACK_030.Q FPU_CS.Q VMA.Q inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_SYNC.Q inst_VPA_D.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q inst_CLK_000_D5.Q IPL_030_0_.Q inst_CLK_OUT_PRE.Q inst_BGACK_030_INT_D.Q IPL_030_1_.Q IPL_030_2_.Q CLK_CNT_P_0_.Q SM_AMIGA_5_.Q inst_CLK_000_D4.Q SM_AMIGA_7_.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q SM_AMIGA_6_.Q AS_030.Q AS_000.Q UDS_000.Q LDS_000.Q DSACK_1_.Q inst_CLK_000_D3.Q SM_AMIGA_3_.Q DS_030.Q SIZE_0_.Q SIZE_1_.Q A0.Q SM_AMIGA_4_.Q SM_AMIGA_2_.Q AMIGA_BUS_ENABLE.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q E.Q AS_030.PIN AS_000.PIN DS_030.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN A0.PIN DSACK_1_.PIN DTACK.PIN -.ob BERR AVEC AVEC_EXP AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN cpu_est_0_.C cpu_est_0_.AR cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.C cpu_est_2_.AR E.C E.AR SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.C SM_AMIGA_0_.AR IPL_030_0_.C IPL_030_0_.AP IPL_030_1_.C IPL_030_1_.AP IPL_030_2_.C IPL_030_2_.AP SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.C SM_AMIGA_2_.AR AS_000.C AS_000.AP inst_VPA_SYNC.C inst_VPA_SYNC.AP VMA.C VMA.AP BGACK_030.C BGACK_030.AP inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR SIZE_0_.C SIZE_0_.AP SIZE_1_.C SIZE_1_.AP DS_030.C DS_030.AP FPU_CS.C FPU_CS.AP inst_DTACK_SYNC.C inst_DTACK_SYNC.AP A0.C A0.AP BG_000.C BG_000.AP DSACK_1_.C DSACK_1_.AP AS_030.C AS_030.AP AMIGA_BUS_ENABLE.C AMIGA_BUS_ENABLE.AP UDS_000.C UDS_000.AP LDS_000.C LDS_000.AP inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_CLK_000_D5.C inst_CLK_000_D5.AP inst_CLK_000_D3.C inst_CLK_000_D3.AP CLK_CNT_P_0_.C CLK_CNT_P_0_.AR inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D1.C inst_CLK_000_D1.AP CLK_EXP.C CLK_EXP.AR inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP inst_CLK_000_D0.C inst_CLK_000_D0.AP inst_VPA_D.C inst_VPA_D.AP RESET.C RESET.AR DTACK DSACK_0_ AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_DIV_OUT.AR CLK_DIV_OUT.C CLK_DIV_OUT.D BG_000.D BGACK_030.D FPU_CS.D VMA.D inst_AS_030_000_SYNC.D inst_DTACK_SYNC.D inst_VPA_SYNC.D inst_VPA_D.D inst_CLK_000_D0.D CLK_EXP.D inst_CLK_000_D1.D inst_CLK_000_D2.D inst_CLK_000_D5.D IPL_030_0_.D inst_CLK_OUT_PRE.D inst_BGACK_030_INT_D.D IPL_030_1_.D IPL_030_2_.D CLK_CNT_P_0_.D SM_AMIGA_5_.D inst_CLK_000_D4.D SM_AMIGA_7_.D SM_AMIGA_1_.D SM_AMIGA_0_.D SM_AMIGA_6_.D AS_030.D AS_000.D UDS_000.D LDS_000.D DSACK_1_.D inst_CLK_000_D3.D SM_AMIGA_3_.D DS_030.D SIZE_0_.D SIZE_1_.D A0.D SM_AMIGA_4_.D RESET.D SM_AMIGA_2_.D AMIGA_BUS_ENABLE.D cpu_est_0_.D cpu_est_1_.T cpu_est_2_.D E.D -.p 390 ----------------------------------------------------------------------------------- ~1~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~ ----1------------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----1----------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------1-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------1------------------------------------------------------------------------- ~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------1------------------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------0----------------------------------------------------------------------- ~~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -0-----------0000000--------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------1111----------------------------------------------------------- ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----0--------------------------1--------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------0----------------------1--------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~11~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------1-------------------------1-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------0-------------------1-------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------1------------------------0-------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~111~~~~~~~~~ ----0-------1-------------------0-------------------------------------------------- ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---0-----------------------------1------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------0--------------------------1------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------0-------------------------1------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------1--------1------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------1-------1------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------0------1------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------1-----1------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------0--1------------------------------------------------- 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -------------------------------------11-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------1-0-------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ---------------------------------------1------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------------1----1------------------------------------------- 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~ ------1--------------------------------10------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ----------------------------1----------10------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------1---------10------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -----------------------------------------1----------------------------------------- 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ -------0------------------------0----------------------0------------------0-0------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ --------------------------------0--------------------------------------------1----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~ -------0------------------------0-----------------------------------------0-01----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ -------0------------------------0-----------------------------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ -------0----1-------------------0-----------------------------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ -------0------------------------0----------------------0------------------0--0----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~ -------0------------------------0-----------------------------------------0-10----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~ -------0------------------------0-----------------------------------------0-00----- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~ ------------1-------------------1----------------11------------------------0--0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ ------------0-------------------1---------------------------------1--------0--0---- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ ------------1-------------------1----------------11------------------------0---1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ ------------0-------------------1---------------------------------1--------0---1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ ------------1-------------------1----------------11------------------------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ ------------0-------------------1---------------------------------1--------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~ ------------1-------------------1----------------11------------------------0----0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ ------------0-------------------1---------------------------------1--------0----0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~ ---------------------------------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ --------------------------------1-----11---------------------1--------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +.i 79 +.o 156 +.ilb A_31_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BGACK_030.Q FPU_CS.Q VMA.Q inst_AS_030_000_SYNC.Q IPL_030_0_.Q inst_BGACK_030_INT_D.Q AS_030.Q IPL_030_1_.Q inst_VPA_D.Q inst_CLK_OUT_PRE_50_D.Q IPL_030_2_.Q inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q inst_CLK_000_D4.Q inst_DTACK_D0.Q inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_25.Q AS_000.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q SM_AMIGA_6_.Q SM_AMIGA_5_.Q UDS_000.Q LDS_000.Q DSACK_1_.Q inst_CLK_000_D3.Q inst_CLK_030_H.Q DS_030.Q SM_AMIGA_7_.Q AMIGA_BUS_ENABLE.Q SM_AMIGA_4_.Q SM_AMIGA_3_.Q SM_AMIGA_2_.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q E.Q BG_000.Q AS_030.PIN AS_000.PIN DS_030.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN A0.PIN DSACK_1_.PIN DTACK.PIN +.ob BERR AVEC AVEC_EXP AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN cpu_est_0_.C cpu_est_0_.AR cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.C cpu_est_2_.AR E.C E.AR SM_AMIGA_0_.C SM_AMIGA_0_.AR SIZE_1_.C SIZE_1_.AP IPL_030_0_.C IPL_030_0_.AP IPL_030_1_.C IPL_030_1_.AP IPL_030_2_.C IPL_030_2_.AP SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.C SM_AMIGA_1_.AR DSACK_1_.C DSACK_1_.AP VMA.C VMA.AP BGACK_030.C BGACK_030.AP inst_CLK_OUT_PRE_25.C inst_CLK_OUT_PRE_25.AR SIZE_0_.C SIZE_0_.AP UDS_000.C UDS_000.AP LDS_000.C LDS_000.AP FPU_CS.C FPU_CS.AP BG_000.C BG_000.AP DS_030.C DS_030.AP AS_030.C AS_030.AP AS_000.C AS_000.AP AMIGA_BUS_ENABLE.C AMIGA_BUS_ENABLE.AP inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_CLK_030_H.C A0.C A0.AP inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_DTACK_D0.C inst_DTACK_D0.AP inst_CLK_000_D3.C inst_CLK_000_D3.AP inst_CLK_000_D2.C inst_CLK_000_D2.AP CLK_EXP.C CLK_EXP.AR inst_CLK_000_D1.C inst_CLK_000_D1.AP inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP inst_CLK_OUT_PRE_50_D.C inst_CLK_OUT_PRE_50_D.AR inst_CLK_000_D0.C inst_CLK_000_D0.AP inst_VPA_D.C inst_VPA_D.AP inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_50.AR RESET.C RESET.AR DTACK DSACK_0_ AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_DIV_OUT.AR CLK_DIV_OUT.C CLK_DIV_OUT.D BGACK_030.D CLK_EXP.D FPU_CS.D VMA.D inst_AS_030_000_SYNC.D IPL_030_0_.D inst_BGACK_030_INT_D.D AS_030.D IPL_030_1_.D inst_VPA_D.D inst_CLK_OUT_PRE_50_D.D IPL_030_2_.D inst_CLK_000_D0.D inst_CLK_000_D1.D inst_CLK_000_D2.D inst_CLK_000_D4.D inst_DTACK_D0.D inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_25.D AS_000.D SM_AMIGA_1_.D SM_AMIGA_0_.D SM_AMIGA_6_.D SM_AMIGA_5_.D UDS_000.D LDS_000.D DSACK_1_.D inst_CLK_000_D3.D inst_CLK_030_H.D RESET.D DS_030.D SIZE_0_.D SIZE_1_.D A0.D SM_AMIGA_7_.D AMIGA_BUS_ENABLE.D SM_AMIGA_4_.D SM_AMIGA_3_.D SM_AMIGA_2_.D cpu_est_0_.D cpu_est_1_.T cpu_est_2_.D E.D BG_000.D +.p 353 +------------------------------------------------------------------------------- ~1~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~ +---1--------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----1-------------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1 +-------1----------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------1---------------------------------------------------------------------- ~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~11~1~1~1~1~1~1~1~1~1~1~1~1~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---------1--------------------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +----------0-------------------------------------------------------------------- ~~~~~~~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~1~~1~1~1~1~1~1~1~1~1~1~1~1~1~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +0-----------0000000------------------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------1111-------------------------------------------------------- ~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~11~~~~~~~~~~~~~~~~~~11~~~~~~~~~~~~~~~~~~~~~~111~~~~~~~~~~~ +-----1------------------------1------------------------------------------------ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------0------------------1------------------------------------------------ ~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--0----------------------------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----0-------------------------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0------------------------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------1-------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------1------1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------0-----1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--------------------------1----1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-----------------------------0-1----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +-------------------------------0----------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +---0-----------------------------1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------0--------------------------1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +--1--1-----------------0010--1---1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------0--1--------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------1----0------------------------------------------- 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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------0-----------------------------1-------------------1---------0---1--- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------1-------1------------------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------0-----------------------------1-------------------1---------0----1-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~ +-----------1--------------------------------1-------1------------------0----0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-----------0-----------------------------1-------------------1---------0----0-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~ +-----------------------------------------------------------------------------0- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +------------------------------------------------------------------------------0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~0~~~~~~~~~~~~~~~~~~~~~~~~~~~ .end diff --git a/Logic/68030_tk.tt4 b/Logic/68030_tk.tt4 index 6d36760..5b5bf21 100644 --- a/Logic/68030_tk.tt4 +++ b/Logic/68030_tk.tt4 @@ -1,199 +1,191 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Sun May 25 21:18:50 2014 +#$ DATE Wed May 28 21:24:55 2014 #$ MODULE BUS68030 -#$ PINS 59 A_31_ IPL_2_ FC_1_ A_30_ A_29_ A_28_ A_27_ nEXP_SPACE A_26_ BERR - A_25_ BG_030 A_24_ A_23_ A_22_ BGACK_000 A_21_ CLK_030 A_20_ CLK_000 A_19_ - CLK_OSZI A_18_ CLK_DIV_OUT A_17_ A_16_ DTACK AVEC IPL_1_ AVEC_EXP IPL_0_ - DSACK_0_ VPA FC_0_ RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_1_ - IPL_030_2_ DSACK_1_ AS_030 AS_000 SIZE_0_ DS_030 UDS_000 LDS_000 A0 BG_000 - BGACK_030 CLK_EXP FPU_CS IPL_030_1_ IPL_030_0_ E VMA RESET AMIGA_BUS_ENABLE -#$ NODES 24 inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_SYNC inst_VPA_D - inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D5 inst_CLK_OUT_PRE - inst_BGACK_030_INT_D CLK_CNT_P_0_ SM_AMIGA_5_ inst_CLK_000_D4 SM_AMIGA_7_ - SM_AMIGA_1_ SM_AMIGA_0_ SM_AMIGA_6_ inst_CLK_000_D3 SM_AMIGA_3_ SM_AMIGA_4_ - SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ cpu_est_2_ +#$ PINS 59 A_21_ A_20_ A_19_ A_18_ A_31_ A_17_ A_16_ IPL_2_ IPL_1_ IPL_0_ + DSACK_0_ FC_0_ FC_1_ nEXP_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI + CLK_DIV_OUT DTACK AVEC AVEC_EXP VPA RST RW AMIGA_BUS_DATA_DIR + AMIGA_BUS_ENABLE_LOW CIIN A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ + SIZE_1_ IPL_030_2_ IPL_030_1_ IPL_030_0_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 + LDS_000 A0 BG_000 BGACK_030 CLK_EXP FPU_CS E VMA RESET AMIGA_BUS_ENABLE SIZE_0_ +#$ NODES 24 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_VPA_D + inst_CLK_OUT_PRE_50_D inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 + inst_CLK_000_D4 inst_DTACK_D0 inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_25 + SM_AMIGA_1_ SM_AMIGA_0_ SM_AMIGA_6_ SM_AMIGA_5_ inst_CLK_000_D3 inst_CLK_030_H + SM_AMIGA_7_ SM_AMIGA_4_ SM_AMIGA_3_ SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ cpu_est_2_ .type f -.i 82 -.o 160 +.i 79 +.o 159 .ilb A_31_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ - A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BG_000.Q BGACK_030.Q FPU_CS.Q VMA.Q - inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_SYNC.Q inst_VPA_D.Q - inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q inst_CLK_000_D5.Q - IPL_030_0_.Q inst_CLK_OUT_PRE.Q inst_BGACK_030_INT_D.Q IPL_030_1_.Q IPL_030_2_.Q - CLK_CNT_P_0_.Q SM_AMIGA_5_.Q inst_CLK_000_D4.Q SM_AMIGA_7_.Q SM_AMIGA_1_.Q - SM_AMIGA_0_.Q SM_AMIGA_6_.Q AS_030.Q AS_000.Q UDS_000.Q LDS_000.Q DSACK_1_.Q - inst_CLK_000_D3.Q SM_AMIGA_3_.Q DS_030.Q SIZE_0_.Q SIZE_1_.Q A0.Q SM_AMIGA_4_.Q - SM_AMIGA_2_.Q AMIGA_BUS_ENABLE.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q E.Q + A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BGACK_030.Q FPU_CS.Q VMA.Q + inst_AS_030_000_SYNC.Q IPL_030_0_.Q inst_BGACK_030_INT_D.Q AS_030.Q IPL_030_1_.Q + inst_VPA_D.Q inst_CLK_OUT_PRE_50_D.Q IPL_030_2_.Q inst_CLK_000_D0.Q + inst_CLK_000_D1.Q inst_CLK_000_D2.Q inst_CLK_000_D4.Q inst_DTACK_D0.Q + inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_25.Q AS_000.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q + SM_AMIGA_6_.Q SM_AMIGA_5_.Q UDS_000.Q LDS_000.Q DSACK_1_.Q inst_CLK_000_D3.Q + inst_CLK_030_H.Q DS_030.Q SM_AMIGA_7_.Q AMIGA_BUS_ENABLE.Q SM_AMIGA_4_.Q + SM_AMIGA_3_.Q SM_AMIGA_2_.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q E.Q BG_000.Q AS_030.PIN AS_000.PIN DS_030.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN A0.PIN DSACK_1_.PIN DTACK.PIN -.ob BERR BERR.OE CLK_DIV_OUT.D CLK_DIV_OUT.C CLK_DIV_OUT.AR DTACK DTACK.OE AVEC - AVEC_EXP AVEC_EXP.OE DSACK_0_ DSACK_0_.OE AMIGA_BUS_DATA_DIR - AMIGA_BUS_ENABLE_LOW CIIN CIIN.OE SIZE_1_.D% SIZE_1_.C SIZE_1_.AP SIZE_1_.OE - IPL_030_2_.D IPL_030_2_.C IPL_030_2_.AP DSACK_1_.D% DSACK_1_.C DSACK_1_.AP - DSACK_1_.OE AS_030.D% AS_030.C AS_030.AP AS_030.OE AS_000.D% AS_000.C AS_000.AP - AS_000.OE SIZE_0_.D% SIZE_0_.C SIZE_0_.AP SIZE_0_.OE DS_030.D% DS_030.C - DS_030.AP DS_030.OE UDS_000.D% UDS_000.C UDS_000.AP UDS_000.OE LDS_000.D% - LDS_000.C LDS_000.AP LDS_000.OE A0.D A0.C A0.AP A0.OE BG_000.D% BG_000.C - BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_EXP.D CLK_EXP.C CLK_EXP.AR - FPU_CS.D% FPU_CS.C FPU_CS.AP IPL_030_1_.D IPL_030_1_.C IPL_030_1_.AP - IPL_030_0_.D IPL_030_0_.C IPL_030_0_.AP E.D.X1 E.D.X2 E.C E.AR VMA.D% VMA.C - VMA.AP RESET.D RESET.C RESET.AR AMIGA_BUS_ENABLE.D% AMIGA_BUS_ENABLE.C - AMIGA_BUS_ENABLE.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C - inst_AS_030_000_SYNC.AP inst_DTACK_SYNC.D% inst_DTACK_SYNC.C inst_DTACK_SYNC.AP - inst_VPA_SYNC.D% inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_VPA_D.D inst_VPA_D.C - inst_VPA_D.AP inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D0.AP - inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D1.AP inst_CLK_000_D2.D - inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D5.D inst_CLK_000_D5.C - inst_CLK_000_D5.AP inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR +.ob DSACK_0_ DSACK_0_.OE BERR BERR.OE CLK_DIV_OUT.D CLK_DIV_OUT.C CLK_DIV_OUT.AR + DTACK DTACK.OE AVEC AVEC_EXP AVEC_EXP.OE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW + CIIN CIIN.OE SIZE_1_.D% SIZE_1_.C SIZE_1_.AP SIZE_1_.OE IPL_030_2_.D + IPL_030_2_.C IPL_030_2_.AP IPL_030_1_.D IPL_030_1_.C IPL_030_1_.AP IPL_030_0_.D + IPL_030_0_.C IPL_030_0_.AP DSACK_1_.D% DSACK_1_.C DSACK_1_.AP DSACK_1_.OE + AS_030.D AS_030.C AS_030.AP AS_030.OE AS_000.D% AS_000.C AS_000.AP AS_000.OE + DS_030.D DS_030.C DS_030.AP DS_030.OE UDS_000.D% UDS_000.C UDS_000.AP UDS_000.OE + LDS_000.D% LDS_000.C LDS_000.AP LDS_000.OE A0.D A0.C A0.AP A0.OE BG_000.D% + BG_000.C BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_EXP.D CLK_EXP.C + CLK_EXP.AR FPU_CS.D% FPU_CS.C FPU_CS.AP E.D.X1 E.D.X2 E.C E.AR VMA.D.X1 VMA.D.X2 + VMA.C VMA.AP RESET.D RESET.C RESET.AR AMIGA_BUS_ENABLE.D% AMIGA_BUS_ENABLE.C + AMIGA_BUS_ENABLE.AP SIZE_0_.D% SIZE_0_.C SIZE_0_.AP SIZE_0_.OE + inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP - CLK_CNT_P_0_.D CLK_CNT_P_0_.C CLK_CNT_P_0_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C - SM_AMIGA_5_.AR inst_CLK_000_D4.D inst_CLK_000_D4.C inst_CLK_000_D4.AP - SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_1_.D SM_AMIGA_1_.C - SM_AMIGA_1_.AR SM_AMIGA_0_.D.X1 SM_AMIGA_0_.D.X2 SM_AMIGA_0_.C SM_AMIGA_0_.AR - SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR inst_CLK_000_D3.D inst_CLK_000_D3.C - inst_CLK_000_D3.AP SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_4_.D - SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR + inst_VPA_D.D inst_VPA_D.C inst_VPA_D.AP inst_CLK_OUT_PRE_50_D.D + inst_CLK_OUT_PRE_50_D.C inst_CLK_OUT_PRE_50_D.AR inst_CLK_000_D0.D + inst_CLK_000_D0.C inst_CLK_000_D0.AP inst_CLK_000_D1.D inst_CLK_000_D1.C + inst_CLK_000_D1.AP inst_CLK_000_D2.D inst_CLK_000_D2.C inst_CLK_000_D2.AP + inst_CLK_000_D4.D inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_DTACK_D0.D + inst_DTACK_D0.C inst_DTACK_D0.AP inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C + inst_CLK_OUT_PRE_50.AR inst_CLK_OUT_PRE_25.D inst_CLK_OUT_PRE_25.C + inst_CLK_OUT_PRE_25.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D + SM_AMIGA_0_.C SM_AMIGA_0_.AR SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR + SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR inst_CLK_000_D3.D inst_CLK_000_D3.C + inst_CLK_000_D3.AP inst_CLK_030_H.D inst_CLK_030_H.C SM_AMIGA_7_.D SM_AMIGA_7_.C + SM_AMIGA_7_.AP SM_AMIGA_4_.D SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D% + SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR cpu_est_0_.D cpu_est_0_.C cpu_est_0_.AR cpu_est_1_.T cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.D.X1 cpu_est_2_.D.X2 cpu_est_2_.C cpu_est_2_.AR -.phase 1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 -.p 138 ----------------------------------------------------------------------------------- 0000000100100100000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000000000000 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000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000 +-----------------------------------------10---------------------000------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +-----------------------------------------10---------------------1010----------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------------------------------------------------------------1------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 .end diff --git a/Logic/68030_tk.tte b/Logic/68030_tk.tte index f932f5f..52ee256 100644 --- a/Logic/68030_tk.tte +++ b/Logic/68030_tk.tte @@ -1,199 +1,191 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Sun May 25 21:18:50 2014 +#$ DATE Wed May 28 21:24:55 2014 #$ MODULE BUS68030 -#$ PINS 59 A_31_ IPL_2_ FC_1_ A_30_ A_29_ A_28_ A_27_ nEXP_SPACE A_26_ BERR - A_25_ BG_030 A_24_ A_23_ A_22_ BGACK_000 A_21_ CLK_030 A_20_ CLK_000 A_19_ - CLK_OSZI A_18_ CLK_DIV_OUT A_17_ A_16_ DTACK AVEC IPL_1_ AVEC_EXP IPL_0_ - DSACK_0_ VPA FC_0_ RST RW AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_1_ - IPL_030_2_ DSACK_1_ AS_030 AS_000 SIZE_0_ DS_030 UDS_000 LDS_000 A0 BG_000 - BGACK_030 CLK_EXP FPU_CS IPL_030_1_ IPL_030_0_ E VMA RESET AMIGA_BUS_ENABLE -#$ NODES 24 inst_AS_030_000_SYNC inst_DTACK_SYNC inst_VPA_SYNC inst_VPA_D - inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 inst_CLK_000_D5 inst_CLK_OUT_PRE - inst_BGACK_030_INT_D CLK_CNT_P_0_ SM_AMIGA_5_ inst_CLK_000_D4 SM_AMIGA_7_ - SM_AMIGA_1_ SM_AMIGA_0_ SM_AMIGA_6_ inst_CLK_000_D3 SM_AMIGA_3_ SM_AMIGA_4_ - SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ cpu_est_2_ +#$ PINS 59 A_21_ A_20_ A_19_ A_18_ A_31_ A_17_ A_16_ IPL_2_ IPL_1_ IPL_0_ + DSACK_0_ FC_0_ FC_1_ nEXP_SPACE BERR BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI + CLK_DIV_OUT DTACK AVEC AVEC_EXP VPA RST RW AMIGA_BUS_DATA_DIR + AMIGA_BUS_ENABLE_LOW CIIN A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ + SIZE_1_ IPL_030_2_ IPL_030_1_ IPL_030_0_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 + LDS_000 A0 BG_000 BGACK_030 CLK_EXP FPU_CS E VMA RESET AMIGA_BUS_ENABLE SIZE_0_ +#$ NODES 24 inst_AS_030_000_SYNC inst_BGACK_030_INT_D inst_VPA_D + inst_CLK_OUT_PRE_50_D inst_CLK_000_D0 inst_CLK_000_D1 inst_CLK_000_D2 + inst_CLK_000_D4 inst_DTACK_D0 inst_CLK_OUT_PRE_50 inst_CLK_OUT_PRE_25 + SM_AMIGA_1_ SM_AMIGA_0_ SM_AMIGA_6_ SM_AMIGA_5_ inst_CLK_000_D3 inst_CLK_030_H + SM_AMIGA_7_ SM_AMIGA_4_ SM_AMIGA_3_ SM_AMIGA_2_ cpu_est_0_ cpu_est_1_ cpu_est_2_ .type f -.i 82 -.o 160 +.i 79 +.o 159 .ilb A_31_ IPL_2_ FC_1_ nEXP_SPACE BG_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI VPA RST RW A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ A_21_ A_20_ A_19_ - A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BG_000.Q BGACK_030.Q FPU_CS.Q VMA.Q - inst_AS_030_000_SYNC.Q inst_DTACK_SYNC.Q inst_VPA_SYNC.Q inst_VPA_D.Q - inst_CLK_000_D0.Q inst_CLK_000_D1.Q inst_CLK_000_D2.Q inst_CLK_000_D5.Q - IPL_030_0_.Q inst_CLK_OUT_PRE.Q inst_BGACK_030_INT_D.Q IPL_030_1_.Q IPL_030_2_.Q - CLK_CNT_P_0_.Q SM_AMIGA_5_.Q inst_CLK_000_D4.Q SM_AMIGA_7_.Q SM_AMIGA_1_.Q - SM_AMIGA_0_.Q SM_AMIGA_6_.Q AS_030.Q AS_000.Q UDS_000.Q LDS_000.Q DSACK_1_.Q - inst_CLK_000_D3.Q SM_AMIGA_3_.Q DS_030.Q SIZE_0_.Q SIZE_1_.Q A0.Q SM_AMIGA_4_.Q - SM_AMIGA_2_.Q AMIGA_BUS_ENABLE.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q E.Q + A_18_ A_17_ A_16_ IPL_1_ IPL_0_ FC_0_ BGACK_030.Q FPU_CS.Q VMA.Q + inst_AS_030_000_SYNC.Q IPL_030_0_.Q inst_BGACK_030_INT_D.Q AS_030.Q IPL_030_1_.Q + inst_VPA_D.Q inst_CLK_OUT_PRE_50_D.Q IPL_030_2_.Q inst_CLK_000_D0.Q + inst_CLK_000_D1.Q inst_CLK_000_D2.Q inst_CLK_000_D4.Q inst_DTACK_D0.Q + inst_CLK_OUT_PRE_50.Q inst_CLK_OUT_PRE_25.Q AS_000.Q SM_AMIGA_1_.Q SM_AMIGA_0_.Q + SM_AMIGA_6_.Q SM_AMIGA_5_.Q UDS_000.Q LDS_000.Q DSACK_1_.Q inst_CLK_000_D3.Q + inst_CLK_030_H.Q DS_030.Q SM_AMIGA_7_.Q AMIGA_BUS_ENABLE.Q SM_AMIGA_4_.Q + SM_AMIGA_3_.Q SM_AMIGA_2_.Q cpu_est_0_.Q cpu_est_1_.Q cpu_est_2_.Q E.Q BG_000.Q AS_030.PIN AS_000.PIN DS_030.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN A0.PIN DSACK_1_.PIN DTACK.PIN -.ob BERR BERR.OE CLK_DIV_OUT.D CLK_DIV_OUT.C CLK_DIV_OUT.AR DTACK DTACK.OE AVEC - AVEC_EXP AVEC_EXP.OE DSACK_0_ DSACK_0_.OE AMIGA_BUS_DATA_DIR - AMIGA_BUS_ENABLE_LOW CIIN CIIN.OE SIZE_1_.D- SIZE_1_.C SIZE_1_.AP SIZE_1_.OE - IPL_030_2_.D IPL_030_2_.C IPL_030_2_.AP DSACK_1_.D- DSACK_1_.C DSACK_1_.AP - DSACK_1_.OE AS_030.D- AS_030.C AS_030.AP AS_030.OE AS_000.D- AS_000.C AS_000.AP - AS_000.OE SIZE_0_.D- SIZE_0_.C SIZE_0_.AP SIZE_0_.OE DS_030.D- DS_030.C - DS_030.AP DS_030.OE UDS_000.D- UDS_000.C UDS_000.AP UDS_000.OE LDS_000.D- - LDS_000.C LDS_000.AP LDS_000.OE A0.D A0.C A0.AP A0.OE BG_000.D- BG_000.C - BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_EXP.D CLK_EXP.C CLK_EXP.AR - FPU_CS.D- FPU_CS.C FPU_CS.AP IPL_030_1_.D IPL_030_1_.C IPL_030_1_.AP - IPL_030_0_.D IPL_030_0_.C IPL_030_0_.AP E.D.X1 E.D.X2 E.C E.AR VMA.D- VMA.C - VMA.AP RESET.D RESET.C RESET.AR AMIGA_BUS_ENABLE.D- AMIGA_BUS_ENABLE.C - AMIGA_BUS_ENABLE.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C - inst_AS_030_000_SYNC.AP inst_DTACK_SYNC.D- inst_DTACK_SYNC.C inst_DTACK_SYNC.AP - inst_VPA_SYNC.D- inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_VPA_D.D inst_VPA_D.C - inst_VPA_D.AP inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D0.AP - inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D1.AP inst_CLK_000_D2.D - inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D5.D inst_CLK_000_D5.C - inst_CLK_000_D5.AP inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR +.ob DSACK_0_ DSACK_0_.OE BERR BERR.OE CLK_DIV_OUT.D CLK_DIV_OUT.C CLK_DIV_OUT.AR + DTACK DTACK.OE AVEC AVEC_EXP AVEC_EXP.OE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW + CIIN CIIN.OE SIZE_1_.D- SIZE_1_.C SIZE_1_.AP SIZE_1_.OE IPL_030_2_.D + IPL_030_2_.C IPL_030_2_.AP IPL_030_1_.D IPL_030_1_.C IPL_030_1_.AP IPL_030_0_.D + IPL_030_0_.C IPL_030_0_.AP DSACK_1_.D- DSACK_1_.C DSACK_1_.AP DSACK_1_.OE + AS_030.D AS_030.C AS_030.AP AS_030.OE AS_000.D- AS_000.C AS_000.AP AS_000.OE + DS_030.D DS_030.C DS_030.AP DS_030.OE UDS_000.D- UDS_000.C UDS_000.AP UDS_000.OE + LDS_000.D- LDS_000.C LDS_000.AP LDS_000.OE A0.D A0.C A0.AP A0.OE BG_000.D- + BG_000.C BG_000.AP BGACK_030.D BGACK_030.C BGACK_030.AP CLK_EXP.D CLK_EXP.C + CLK_EXP.AR FPU_CS.D- FPU_CS.C FPU_CS.AP E.D.X1 E.D.X2 E.C E.AR VMA.D.X1 VMA.D.X2 + VMA.C VMA.AP RESET.D RESET.C RESET.AR AMIGA_BUS_ENABLE.D- AMIGA_BUS_ENABLE.C + AMIGA_BUS_ENABLE.AP SIZE_0_.D- SIZE_0_.C SIZE_0_.AP SIZE_0_.OE + inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP - CLK_CNT_P_0_.D CLK_CNT_P_0_.C CLK_CNT_P_0_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C - SM_AMIGA_5_.AR inst_CLK_000_D4.D inst_CLK_000_D4.C inst_CLK_000_D4.AP - SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_1_.D SM_AMIGA_1_.C - SM_AMIGA_1_.AR SM_AMIGA_0_.D.X1 SM_AMIGA_0_.D.X2 SM_AMIGA_0_.C SM_AMIGA_0_.AR - SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR inst_CLK_000_D3.D inst_CLK_000_D3.C - inst_CLK_000_D3.AP SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_4_.D - SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR + inst_VPA_D.D inst_VPA_D.C inst_VPA_D.AP inst_CLK_OUT_PRE_50_D.D + inst_CLK_OUT_PRE_50_D.C inst_CLK_OUT_PRE_50_D.AR inst_CLK_000_D0.D + inst_CLK_000_D0.C inst_CLK_000_D0.AP inst_CLK_000_D1.D inst_CLK_000_D1.C + inst_CLK_000_D1.AP inst_CLK_000_D2.D inst_CLK_000_D2.C inst_CLK_000_D2.AP + inst_CLK_000_D4.D inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_DTACK_D0.D + inst_DTACK_D0.C inst_DTACK_D0.AP inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C + inst_CLK_OUT_PRE_50.AR inst_CLK_OUT_PRE_25.D inst_CLK_OUT_PRE_25.C + inst_CLK_OUT_PRE_25.AR SM_AMIGA_1_.D SM_AMIGA_1_.C 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000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000 +-----------------------------------------10---------------------000------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +-----------------------------------------10---------------------1010----------- 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000 +------------------------------------------------------------------1------------ 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100 .end diff --git a/Logic/68030_tk.vcl b/Logic/68030_tk.vcl index d326932..9999ecf 100644 --- a/Logic/68030_tk.vcl +++ b/Logic/68030_tk.vcl @@ -17,8 +17,8 @@ Parent = m4a5.lci; SDS_file = m4a5.sds; Design = 68030_tk.tt4; Rev = 0.01; -DATE = 5/25/14; -TIME = 21:18:55; +DATE = 5/28/14; +TIME = 21:24:59; Type = TT2; Pre_Fit_Time = 1; Source_Format = Pure_VHDL; @@ -134,18 +134,17 @@ layer = OFF; [LOCATION ASSIGNMENT] Layer = OFF +AS_000 = BIDIR,33,3,-; LDS_000 = BIDIR,31,3,-; UDS_000 = BIDIR,32,3,-; AS_030 = BIDIR,82,7,-; -AS_000 = BIDIR,33,3,-; DS_030 = BIDIR,98,0,-; -SIZE_1_ = BIDIR,79,7,-; DSACK_1_ = BIDIR,81,7,-; -SIZE_0_ = BIDIR,70,6,-; -A0 = BIDIR,69,6,-; +SIZE_1_ = OUTPUT,79,7,-; +SIZE_0_ = OUTPUT,70,6,-; +A0 = OUTPUT,69,6,-; DTACK = OUTPUT,30,3,-; AMIGA_BUS_ENABLE = OUTPUT,34,3,-; -VMA = OUTPUT,35,3,-; E = OUTPUT,66,6,-; IPL_030_2_ = OUTPUT,9,1,-; IPL_030_0_ = OUTPUT,8,1,-; @@ -153,6 +152,7 @@ IPL_030_1_ = OUTPUT,7,1,-; BGACK_030 = OUTPUT,83,7,-; FPU_CS = OUTPUT,78,7,-; AMIGA_BUS_DATA_DIR = OUTPUT,48,4,-; +VMA = OUTPUT,35,3,-; BG_000 = OUTPUT,29,3,-; AVEC = OUTPUT,92,0,-; DSACK_0_ = OUTPUT,80,7,-; @@ -165,44 +165,41 @@ CLK_EXP = OUTPUT,10,1,-; RESET = OUTPUT,3,1,-; RN_BGACK_030 = NODE,-1,7,-; inst_CLK_000_D0 = NODE,*,3,-; -SM_AMIGA_7_ = NODE,*,0,-; RN_AS_030 = NODE,-1,7,-; -cpu_est_0_ = NODE,*,7,-; -SM_AMIGA_6_ = NODE,*,6,-; -inst_BGACK_030_INT_D = NODE,*,7,-; +SM_AMIGA_7_ = NODE,*,0,-; +SM_AMIGA_0_ = NODE,*,1,-; +cpu_est_0_ = NODE,*,1,-; +SM_AMIGA_1_ = NODE,*,1,-; +RN_FPU_CS = NODE,-1,7,-; +RN_AS_000 = NODE,-1,3,-; +SM_AMIGA_4_ = NODE,*,1,-; +SM_AMIGA_6_ = NODE,*,7,-; +inst_CLK_000_D3 = NODE,*,7,-; +inst_CLK_OUT_PRE_50 = NODE,*,6,-; +inst_CLK_000_D4 = NODE,*,7,-; +inst_CLK_000_D1 = NODE,*,7,-; inst_AS_030_000_SYNC = NODE,*,7,-; cpu_est_1_ = NODE,*,6,-; -SM_AMIGA_1_ = NODE,*,7,-; -RN_FPU_CS = NODE,-1,7,-; -inst_CLK_000_D4 = NODE,*,6,-; -inst_CLK_000_D1 = NODE,*,3,-; -RN_VMA = NODE,-1,3,-; -SM_AMIGA_2_ = NODE,*,6,-; -SM_AMIGA_3_ = NODE,*,6,-; RN_E = NODE,-1,6,-; -cpu_est_2_ = NODE,*,1,-; -SM_AMIGA_4_ = NODE,*,3,-; -SM_AMIGA_0_ = NODE,*,0,-; -RN_AS_000 = NODE,-1,3,-; -inst_CLK_OUT_PRE = NODE,*,6,-; -inst_VPA_SYNC = NODE,*,1,-; -inst_DTACK_SYNC = NODE,*,1,-; -inst_CLK_000_D3 = NODE,*,6,-; -CLK_CNT_P_0_ = NODE,*,7,-; -inst_CLK_000_D5 = NODE,*,7,-; +cpu_est_2_ = NODE,*,6,-; +SM_AMIGA_2_ = NODE,*,6,-; +inst_CLK_OUT_PRE_25 = NODE,*,1,-; +RN_VMA = NODE,-1,3,-; +SM_AMIGA_5_ = NODE,*,3,-; inst_CLK_000_D2 = NODE,*,7,-; -inst_VPA_D = NODE,*,1,-; +inst_VPA_D = NODE,*,7,-; RN_LDS_000 = NODE,-1,3,-; -RN_AMIGA_BUS_ENABLE = NODE,-1,3,-; RN_UDS_000 = NODE,-1,3,-; RN_DS_030 = NODE,-1,0,-; +RN_AMIGA_BUS_ENABLE = NODE,-1,3,-; +inst_CLK_030_H = NODE,*,0,-; +SM_AMIGA_3_ = NODE,*,6,-; RN_IPL_030_0_ = NODE,-1,1,-; RN_IPL_030_1_ = NODE,-1,1,-; RN_IPL_030_2_ = NODE,-1,1,-; -RN_SIZE_1_ = NODE,-1,7,-; -SM_AMIGA_5_ = NODE,*,3,-; RN_BG_000 = NODE,-1,3,-; -RN_A0 = NODE,-1,6,-; -RN_SIZE_0_ = NODE,-1,6,-; RN_DSACK_1_ = NODE,-1,7,-; +inst_DTACK_D0 = NODE,*,0,-; +inst_CLK_OUT_PRE_50_D = NODE,*,0,-; +inst_BGACK_030_INT_D = NODE,*,3,-; CLK_OSZI = INPUT,61,-,-; diff --git a/Logic/68030_tk.vco b/Logic/68030_tk.vco index 2dc03be..99ac891 100644 --- a/Logic/68030_tk.vco +++ b/Logic/68030_tk.vco @@ -17,8 +17,8 @@ Parent = m4a5.lci; SDS_file = m4a5.sds; Design = 68030_tk.tt4; Rev = 0.01; -DATE = 5/25/14; -TIME = 21:18:55; +DATE = 5/28/14; +TIME = 21:25:00; Type = TT2; Pre_Fit_Time = 1; Source_Format = Pure_VHDL; @@ -134,51 +134,52 @@ layer = OFF; [LOCATION ASSIGNMENT] Layer = OFF; -A_31_ = INPUT,4, B,-; -IPL_2_ = INPUT,68, G,-; -FC_1_ = INPUT,58, F,-; -A_30_ = INPUT,5, B,-; -A_29_ = INPUT,6, B,-; -A_28_ = INPUT,15, C,-; -A_27_ = INPUT,16, C,-; -nEXP_SPACE = INPUT,14,-,-; -A_26_ = INPUT,17, C,-; -BERR = OUTPUT,41, E,-; -A_25_ = INPUT,18, C,-; -BG_030 = INPUT,21, C,-; -A_24_ = INPUT,19, C,-; -A_23_ = INPUT,84, H,-; -A_22_ = INPUT,85, H,-; -BGACK_000 = INPUT,28, D,-; A_21_ = INPUT,94, A,-; -CLK_030 = INPUT,64,-,-; A_20_ = INPUT,93, A,-; -CLK_000 = INPUT,11,-,-; A_19_ = INPUT,97, A,-; -CLK_OSZI = INPUT,61,-,-; A_18_ = INPUT,95, A,-; -CLK_DIV_OUT = OUTPUT,65, G,-; +A_31_ = INPUT,4, B,-; A_17_ = INPUT,59, F,-; A_16_ = INPUT,96, A,-; -DTACK = BIDIR,30, D,-; -AVEC = OUTPUT,92, A,-; +IPL_2_ = INPUT,68, G,-; IPL_1_ = INPUT,56, F,-; -AVEC_EXP = OUTPUT,22, C,-; IPL_0_ = INPUT,67, G,-; DSACK_0_ = OUTPUT,80, H,-; -VPA = INPUT,36,-,-; FC_0_ = INPUT,57, F,-; +FC_1_ = INPUT,58, F,-; +nEXP_SPACE = INPUT,14,-,-; +BERR = OUTPUT,41, E,-; +BG_030 = INPUT,21, C,-; +BGACK_000 = INPUT,28, D,-; +CLK_030 = INPUT,64,-,-; +CLK_000 = INPUT,11,-,-; +CLK_OSZI = INPUT,61,-,-; +CLK_DIV_OUT = OUTPUT,65, G,-; +DTACK = BIDIR,30, D,-; +AVEC = OUTPUT,92, A,-; +AVEC_EXP = OUTPUT,22, C,-; +VPA = INPUT,36,-,-; RST = INPUT,86,-,-; RW = INPUT,71, G,-; AMIGA_BUS_DATA_DIR = OUTPUT,48, E,-; AMIGA_BUS_ENABLE_LOW = OUTPUT,20, C,-; CIIN = OUTPUT,47, E,-; +A_30_ = INPUT,5, B,-; +A_29_ = INPUT,6, B,-; +A_28_ = INPUT,15, C,-; +A_27_ = INPUT,16, C,-; +A_26_ = INPUT,17, C,-; +A_25_ = INPUT,18, C,-; +A_24_ = INPUT,19, C,-; +A_23_ = INPUT,84, H,-; +A_22_ = INPUT,85, H,-; SIZE_1_ = BIDIR,79, H,-; IPL_030_2_ = OUTPUT,9, B,-; +IPL_030_1_ = OUTPUT,7, B,-; +IPL_030_0_ = OUTPUT,8, B,-; DSACK_1_ = BIDIR,81, H,-; AS_030 = BIDIR,82, H,-; AS_000 = BIDIR,33, D,-; -SIZE_0_ = BIDIR,70, G,-; DS_030 = BIDIR,98, A,-; UDS_000 = BIDIR,32, D,-; LDS_000 = BIDIR,31, D,-; @@ -187,33 +188,32 @@ BG_000 = OUTPUT,29, D,-; BGACK_030 = OUTPUT,83, H,-; CLK_EXP = OUTPUT,10, B,-; FPU_CS = OUTPUT,78, H,-; -IPL_030_1_ = OUTPUT,7, B,-; -IPL_030_0_ = OUTPUT,8, B,-; E = OUTPUT,66, G,-; VMA = OUTPUT,35, D,-; RESET = OUTPUT,3, B,-; AMIGA_BUS_ENABLE = OUTPUT,34, D,-; -inst_AS_030_000_SYNC = NODE,5, H,-; -inst_DTACK_SYNC = NODE,7, B,-; -inst_VPA_SYNC = NODE,5, B,-; -inst_VPA_D = NODE,8, B,-; -inst_CLK_000_D0 = NODE,5, D,-; -inst_CLK_000_D1 = NODE,7, D,-; -inst_CLK_000_D2 = NODE,13, H,-; -inst_CLK_000_D5 = NODE,12, H,-; -inst_CLK_OUT_PRE = NODE,10, G,-; -inst_BGACK_030_INT_D = NODE,3, H,-; -CLK_CNT_P_0_ = NODE,11, H,-; -SM_AMIGA_5_ = NODE,11, D,-; -inst_CLK_000_D4 = NODE,6, G,-; -SM_AMIGA_7_ = NODE,1, A,-; -SM_AMIGA_1_ = NODE,7, H,-; -SM_AMIGA_0_ = NODE,3, A,-; -SM_AMIGA_6_ = NODE,4, G,-; -inst_CLK_000_D3 = NODE,11, G,-; -SM_AMIGA_3_ = NODE,9, G,-; -SM_AMIGA_4_ = NODE,9, D,-; -SM_AMIGA_2_ = NODE,7, G,-; -cpu_est_0_ = NODE,2, H,-; -cpu_est_1_ = NODE,5, G,-; -cpu_est_2_ = NODE,3, B,-; +SIZE_0_ = BIDIR,70, G,-; +inst_AS_030_000_SYNC = NODE,9, H,-; +inst_BGACK_030_INT_D = NODE,10, D,-; +inst_VPA_D = NODE,14, H,-; +inst_CLK_OUT_PRE_50_D = NODE,3, A,-; +inst_CLK_000_D0 = NODE,12, D,-; +inst_CLK_000_D1 = NODE,3, H,-; +inst_CLK_000_D2 = NODE,12, H,-; +inst_CLK_000_D4 = NODE,8, H,-; +inst_DTACK_D0 = NODE,1, A,-; +inst_CLK_OUT_PRE_50 = NODE,1, G,-; +inst_CLK_OUT_PRE_25 = NODE,9, B,-; +SM_AMIGA_1_ = NODE,10, B,-; +SM_AMIGA_0_ = NODE,5, B,-; +SM_AMIGA_6_ = NODE,7, H,-; +SM_AMIGA_5_ = NODE,2, D,-; +inst_CLK_000_D3 = NODE,2, H,-; +inst_CLK_030_H = NODE,0, A,-; +SM_AMIGA_7_ = NODE,11, A,-; +SM_AMIGA_4_ = NODE,7, B,-; +SM_AMIGA_3_ = NODE,7, G,-; +SM_AMIGA_2_ = NODE,6, G,-; +cpu_est_0_ = NODE,8, B,-; +cpu_est_1_ = NODE,4, G,-; +cpu_est_2_ = NODE,5, G,-; diff --git a/Logic/68030_tk.xrf b/Logic/68030_tk.xrf index ca2c840..5cbeaf3 100644 --- a/Logic/68030_tk.xrf +++ b/Logic/68030_tk.xrf @@ -2,7 +2,7 @@ Signal Name Cross Reference File ispLEVER Classic 1.7.00.05.28.13 -Design '68030_tk' created Sun May 25 21:18:50 2014 +Design '68030_tk' created Wed May 28 21:24:55 2014 LEGEND: '>' Functional Block Port Separator diff --git a/Logic/BUS68030.bl0 b/Logic/BUS68030.bl0 index e42b71d..7093d27 100644 --- a/Logic/BUS68030.bl0 +++ b/Logic/BUS68030.bl0 @@ -1,160 +1,153 @@ -#$ DATE Sun May 25 21:18:50 2014 +#$ DATE Wed May 28 21:24:55 2014 #$ TOOL EDIF2BLIF version IspLever 1.0 #$ MODULE bus68030 -#$ PINS 59 SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 SIZE_0_ DS_030 A_30_ UDS_000 A_29_ LDS_000 A_28_ A0 A_27_ nEXP_SPACE A_26_ BERR A_25_ BG_030 A_24_ BG_000 A_23_ BGACK_030 A_22_ BGACK_000 A_21_ CLK_030 A_20_ CLK_000 A_19_ CLK_OSZI A_18_ CLK_DIV_OUT A_17_ CLK_EXP A_16_ FPU_CS IPL_030_1_ DTACK IPL_030_0_ AVEC IPL_1_ AVEC_EXP IPL_0_ E DSACK_0_ VPA FC_0_ VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN -#$ NODES 429 BG_030_c as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n BG_000DFFSHreg ds_000_dma_0_un3_n ds_000_dma_0_un1_n ds_000_dma_0_un0_n BGACK_000_c fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n \ -# inst_BGACK_030_INTreg CLK_030_c fpu_cs_int_0_un0_n inst_FPU_CS_INTreg dtack_sync_0_un3_n inst_VMA_INTreg CLK_000_c dtack_sync_0_un1_n inst_AS_030_000_SYNC dtack_sync_0_un0_n \ -# inst_DTACK_SYNC CLK_OSZI_c a0_dma_0_un3_n inst_VPA_SYNC a0_dma_0_un1_n inst_VPA_D a0_dma_0_un0_n inst_CLK_000_D0 CLK_OUT_INTreg bg_000_0_un3_n \ -# inst_CLK_000_D1 bg_000_0_un1_n inst_CLK_000_D2 bg_000_0_un0_n inst_CLK_000_D5 IPL_030DFFSH_0_reg inst_CLK_OUT_PRE inst_BGACK_030_INT_D IPL_030DFFSH_1_reg vcc_n_n \ -# gnd_n_n IPL_030DFFSH_2_reg CLK_CNT_P_0_ SM_AMIGA_5_ ipl_c_0__n inst_CLK_000_D4 SM_AMIGA_7_ ipl_c_1__n SM_AMIGA_1_ SM_AMIGA_0_ \ -# ipl_c_2__n SM_AMIGA_6_ inst_AS_000_DMA inst_AS_000_INT dsack_c_1__n inst_UDS_000_INT inst_LDS_000_INT DTACK_c inst_DSACK1_INT inst_CLK_000_D3 \ -# state_machine_un59_bgack_030_int_n SM_AMIGA_3_ state_machine_un6_bgack_000_n inst_DS_000_DMA SIZE_DMA_0_ SIZE_DMA_1_ RST_c inst_A0_DMA SM_AMIGA_4_ RESETDFFRHreg \ -# SM_AMIGA_2_ state_machine_un10_bg_030_n RW_c un1_AS_030_000_SYNC_1_sqmuxa_1 SIZE_DMA_0_sqmuxa fc_c_0__n state_machine_a0_dma_4_n state_machine_ds_000_dma_5_n fc_c_1__n state_machine_lds_000_int_7_n \ -# state_machine_uds_000_int_7_n AMIGA_BUS_ENABLEDFFSHreg AMIGA_BUS_DATA_DIR_c N_88_0 N_86_0 A0_DMA_0_sqmuxa_i_0_0 N_83_i AS_030_000_SYNC_i N_81_i N_80_i \ -# DS_030_c_i N_79_i N_172_i un1_AS_030_000_SYNC_1_sqmuxa_1_0 CLK_030_c_i N_77_i N_174_i N_76_0 CLK_OUT_PRE_0 N_74_i \ -# CLK_000_D1_i N_73_i sm_amiga_i_1__n cpu_est_0_ N_72_i cpu_est_1_ N_171_i cpu_est_2_ N_66_i cpu_est_3_reg \ -# AS_030_c_i N_65_i N_64_i N_63_i N_167_i cpu_est_ns_1__n N_168_i cpu_est_ns_2__n cpu_est_ns_e_0_0__n A0_DMA_0_sqmuxa_i_0 \ -# N_163_i N_224 N_164_i N_225 N_165_i N_226 sm_amiga_ns_e_0_0__n N_227 N_160_i N_228 \ -# N_161_i N_31 N_162_i N_33 sm_amiga_ns_e_0_1__n N_35 N_98_i N_37 N_159_i N_39 \ -# cpu_est_ns_0_2__n N_158_i N_63 state_machine_amiga_bus_enable_6_iv_i_n N_64 N_157_i N_65 state_machine_ds_000_dma_5_0_n N_66 N_155_i \ -# N_67 N_156_i N_72 AMIGA_BUS_DATA_DIR_c_0 N_73 N_153_i N_74 N_154_i N_76 N_177_i \ -# N_80 N_176_i N_81 N_179_i N_83 cpu_est_ns_0_1__n N_86 N_152_i N_88 N_98 \ -# N_151_i N_108 N_109 N_150_i N_126 N_197_i N_231 N_232 N_148_i N_233 \ -# N_149_i N_234 sm_amiga_ns_e_0_5__n N_235 N_146_i N_236 N_147_i N_237 N_46_0 N_239 \ -# N_145_i N_240 N_198_i N_241 N_144 N_67_i N_145 state_machine_uds_000_int_7_0_n N_146 N_144_i \ -# N_147 state_machine_lds_000_int_7_0_n N_148 N_96_i_i N_149 N_240_i N_150 N_241_i N_151 N_39_0 \ -# N_152 N_237_i N_153 N_239_i N_154 N_37_0 N_155 N_236_i N_156 N_35_0 \ -# N_157 N_235_i N_158 N_33_0 N_159 N_175_i N_160 N_31_0 N_161 N_228_0 \ -# N_162 BG_030_c_i N_163 N_233_i N_164 state_machine_un10_bg_030_0_n N_165 N_227_0 N_166 N_226_0 \ -# N_167 N_108_i N_168 N_109_i N_171 N_225_0 N_172 state_machine_un6_bgack_000_0_n N_173 N_224_0 \ -# N_174 CLK_000_D2_i N_175 state_machine_un59_bgack_030_int_0_n N_176 N_253_1 N_179 N_253_2 N_197 N_263_1 \ -# N_198 N_263_2 un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 N_263_3 cpu_est_ns_0_0_x2_1_ N_263_4 N_236_1 N_263_5 N_253 N_263_6 \ -# N_263 N_74_i_1 VMA_INT_i N_74_i_2 VPA_D_i N_74_i_3 DTACK_i N_74_i_4 LDS_000_i N_74_i_5 \ -# AS_000_i N_83_i_1 cpu_est_i_0__n N_83_i_2 sm_amiga_i_4__n A0_DMA_0_sqmuxa_i_0_0_1 BGACK_030_INT_i state_machine_a0_dma_4_1_n sm_amiga_i_5__n state_machine_a0_dma_4_2_n \ -# cpu_est_i_3__n N_236_1_0 CLK_000_D0_i N_234_1 CLK_000_D4_i N_234_2 cpu_est_i_1__n N_233_1 UDS_000_i N_231_1 \ -# CLK_000_D5_i N_231_2 nEXP_SPACE_i N_231_3 AS_000_DMA_i sm_amiga_ns_e_0_1_0__n RW_i sm_amiga_ns_e_0_1_1__n sm_amiga_i_3__n cpu_est_ns_0_1_1__n \ -# sm_amiga_i_0__n N_44_i_1 A0_i state_machine_uds_000_int_7_0_1_n size_i_1__n state_machine_lds_000_int_7_0_1_n a_i_30__n N_39_0_1 a_i_31__n N_37_0_1 \ -# a_i_28__n N_166_1 a_i_29__n N_164_1 a_i_26__n N_156_1 a_i_27__n N_144_1 a_i_24__n N_240_1 \ -# a_i_25__n N_239_1 a_i_19__n N_237_1 a_i_16__n SIZE_DMA_0_sqmuxa_1 a_i_18__n N_232_1 RST_i N_109_1 \ -# cpu_est_ns_0_0_m3_2__un3_n SIZE_DMA_0_sqmuxa_i cpu_est_ns_0_0_m3_2__un1_n N_231_i cpu_est_ns_0_0_m3_2__un0_n N_126_i state_machine_lds_000_int_7_0_m3_un3_n N_232_i state_machine_lds_000_int_7_0_m3_un1_n N_234_i \ -# state_machine_lds_000_int_7_0_m3_un0_n FPU_CS_INT_i cpu_estse_0_un3_n AS_030_c cpu_estse_0_un1_n cpu_estse_0_un0_n AS_000_c cpu_estse_1_un3_n cpu_estse_1_un1_n DS_030_c \ -# cpu_estse_1_un0_n cpu_estse_2_un3_n UDS_000_c cpu_estse_2_un1_n cpu_estse_2_un0_n LDS_000_c dsack1_int_0_un3_n dsack1_int_0_un1_n size_c_0__n dsack1_int_0_un0_n \ -# as_000_dma_0_un3_n size_c_1__n as_000_dma_0_un1_n as_000_dma_0_un0_n a_c_16__n as_000_int_0_un3_n as_000_int_0_un1_n a_c_17__n as_000_int_0_un0_n vpa_sync_0_un3_n \ -# a_c_18__n vpa_sync_0_un1_n vpa_sync_0_un0_n a_c_19__n vma_int_0_un3_n vma_int_0_un1_n a_c_20__n vma_int_0_un0_n bgack_030_int_0_un3_n a_c_21__n \ -# bgack_030_int_0_un1_n bgack_030_int_0_un0_n a_c_22__n size_dma_0_0__un3_n size_dma_0_0__un1_n a_c_23__n size_dma_0_0__un0_n size_dma_0_1__un3_n a_c_24__n size_dma_0_1__un1_n \ -# size_dma_0_1__un0_n a_c_25__n ipl_030_0_0__un3_n ipl_030_0_0__un1_n a_c_26__n ipl_030_0_0__un0_n ipl_030_0_1__un3_n a_c_27__n ipl_030_0_1__un1_n ipl_030_0_1__un0_n \ -# a_c_28__n ipl_030_0_2__un3_n ipl_030_0_2__un1_n a_c_29__n ipl_030_0_2__un0_n amiga_bus_enable_0_un3_n a_c_30__n amiga_bus_enable_0_un1_n amiga_bus_enable_0_un0_n a_c_31__n \ -# uds_000_int_0_un3_n uds_000_int_0_un1_n A0_c uds_000_int_0_un0_n lds_000_int_0_un3_n nEXP_SPACE_c lds_000_int_0_un1_n lds_000_int_0_un0_n as_030_000_sync_0_un3_n +#$ PINS 59 A_21_ A_20_ SIZE_1_ A_19_ A_18_ A_31_ A_17_ A_16_ IPL_030_2_ IPL_030_1_ IPL_030_0_ IPL_2_ IPL_1_ IPL_0_ DSACK_1_ DSACK_0_ FC_0_ FC_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 nEXP_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS DTACK AVEC AVEC_EXP E VPA VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ +#$ NODES 405 CLK_030_c CLK_000_c CLK_OSZI_c inst_BGACK_030_INTreg CLK_OUT_INTreg inst_FPU_CS_INTreg inst_VMA_INTreg inst_AS_030_000_SYNC IPL_030DFFSH_0_reg inst_BGACK_030_INT_D \ +# inst_AS_000_DMA IPL_030DFFSH_1_reg inst_VPA_D inst_CLK_OUT_PRE_50_D IPL_030DFFSH_2_reg inst_CLK_000_D0 inst_CLK_000_D1 ipl_c_0__n inst_CLK_000_D2 inst_CLK_000_D4 \ +# ipl_c_1__n inst_DTACK_D0 inst_CLK_OUT_PRE_50 ipl_c_2__n inst_CLK_OUT_PRE_25 vcc_n_n gnd_n_n dsack_c_1__n state_machine_un13_clk_000_d0_n inst_AS_000_INT \ +# SM_AMIGA_1_ SM_AMIGA_0_ SM_AMIGA_6_ SM_AMIGA_5_ inst_UDS_000_INT inst_LDS_000_INT inst_DSACK1_INT clk_un3_clk_out_pre_50_n RST_c inst_CLK_000_D3 \ +# inst_CLK_030_H RESETDFFRHreg state_machine_un6_bgack_000_n state_machine_un15_clk_000_d0_n RW_c inst_DS_000_DMA SIZE_DMA_0_ fc_c_0__n SIZE_DMA_1_ inst_A0_DMA \ +# fc_c_1__n SM_AMIGA_7_ un1_AMIGA_BUS_ENABLE_1_sqmuxa_2 AMIGA_BUS_ENABLEDFFSHreg SM_AMIGA_4_ AMIGA_BUS_DATA_DIR_c state_machine_ds_000_dma_3_n SM_AMIGA_3_ SM_AMIGA_2_ cpu_est_ns_0_1__n \ +# state_machine_un10_bg_030_n N_134_i state_machine_lds_000_int_7_n N_169_i state_machine_uds_000_int_7_n N_133_i N_167_i N_51_0 N_140_i N_202_0 \ +# N_86_0 N_171_i un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0 N_82_i sm_amiga_i_1__n N_78_i N_170_i N_77_0 CLK_000_D1_i CLK_OUT_PRE_25_0 \ +# N_76_i N_74_i N_72_0 AS_030_000_SYNC_i CLK_000_D2_i state_machine_un8_bgack_030_int_i_0_0_n cpu_est_0_ N_69_i cpu_est_1_ AS_030_c_i \ +# cpu_est_2_ N_65_i cpu_est_3_reg N_64_i N_62_i N_152_i N_153_i cpu_est_ns_1__n N_61_0 cpu_est_ns_2__n \ +# N_150_i state_machine_un8_bgack_030_int_i_0_n N_148_i N_197 N_149_i N_198 N_199 N_123_i N_200 N_145_i \ +# N_201 N_146_i sm_amiga_ns_0_0__n N_51 N_142_i N_53 N_143_i N_61 N_144_i N_62 \ +# cpu_est_ns_0_2__n N_64 N_141_i N_65 N_53_0 N_66 N_139_i N_69 state_machine_amiga_bus_enable_4_iv_i_n N_72 \ +# N_138_i N_74 N_48_i N_76 N_136_i N_77 N_137_i N_78 AMIGA_BUS_DATA_DIR_c_0 N_82 \ +# N_135_i N_86 N_168_i N_202 N_151_i N_203 N_132_i N_205 N_164_i N_206 \ +# N_115 N_130_i N_116 N_131_i N_117 N_41_0 N_118 N_128_i N_120 N_129_i \ +# N_121 sm_amiga_ns_0_5__n N_122 N_126_i N_123 N_127_i N_124 N_125 N_125_i N_126 \ +# N_127 N_124_i N_128 N_129 N_122_i N_130 N_131 N_172_i N_132 state_machine_size_dma_4_0_1__n \ +# N_133 state_machine_ds_000_dma_3_0_n N_134 N_66_i N_135 N_120_i N_136 state_machine_lds_000_int_7_0_n N_137 state_machine_uds_000_int_7_0_n \ +# N_138 N_118_i N_139 N_201_0 N_140 N_117_i N_141 N_200_0 N_142 N_115_i \ +# N_143 N_116_i N_144 N_199_0 N_145 BG_030_c_i N_146 N_206_i N_147 state_machine_un10_bg_030_0_n \ +# N_148 N_198_0 N_149 N_197_0 N_150 N_203_i N_152 state_machine_un13_clk_000_d0_i_n N_153 state_machine_un15_clk_000_d0_0_n \ +# N_164 state_machine_un6_bgack_000_0_n N_167 N_225_1 N_168 N_225_2 N_169 N_225_3 N_170 N_225_4 \ +# N_171 N_225_5 N_172 N_225_6 N_173 N_228_1 N_225 N_228_2 N_228 N_69_i_1 \ +# CLK_000_D0_i N_69_i_2 BGACK_030_INT_i N_69_i_3 CLK_030_i N_69_i_4 cpu_est_i_3__n N_69_i_5 sm_amiga_i_6__n state_machine_un8_bgack_030_int_i_0_0_1_n \ +# nEXP_SPACE_i N_72_0_1 CLK_000_D4_i N_51_0_1 sm_amiga_i_5__n N_51_0_2 sm_amiga_i_4__n cpu_est_ns_0_1_1__n AS_000_i cpu_est_ns_0_2_1__n \ +# LDS_000_i N_128_1 UDS_000_i N_128_2 cpu_est_i_1__n N_118_1 cpu_est_i_0__n N_118_2 DTACK_D0_i N_118_3 \ +# VMA_INT_i N_206_1 VPA_D_i N_206_2 AS_000_DMA_i sm_amiga_ns_0_1_0__n CLK_030_H_i cpu_est_ns_0_1_2__n RW_i N_53_0_1 \ +# cpu_est_i_2__n N_43_i_1 sm_amiga_i_0__n state_machine_lds_000_int_7_0_1_n sm_amiga_i_3__n state_machine_uds_000_int_7_0_1_n sm_amiga_i_7__n N_199_0_1 A0_i N_152_1 \ +# size_i_1__n N_147_1 DS_030_i N_139_1 a_i_19__n N_137_1 a_i_16__n N_127_1 a_i_18__n N_120_1 \ +# a_i_30__n state_machine_a0_dma_2_1_n a_i_31__n N_116_1 a_i_28__n N_115_1 a_i_29__n state_machine_un13_clk_000_d0_1_n a_i_26__n N_203_1 \ +# a_i_27__n state_machine_uds_000_int_7_0_m3_un3_n a_i_24__n state_machine_uds_000_int_7_0_m3_un1_n a_i_25__n state_machine_uds_000_int_7_0_m3_un0_n RST_i dsack1_int_0_un3_n dsack1_int_0_un1_n dsack1_int_0_un0_n \ +# N_205_i vma_int_0_un3_n FPU_CS_INT_i vma_int_0_un1_n CLK_OUT_PRE_50_D_i vma_int_0_un0_n AS_030_c bgack_030_int_0_un3_n bgack_030_int_0_un1_n AS_000_c \ +# bgack_030_int_0_un0_n ipl_030_0_0__un3_n DS_030_c ipl_030_0_0__un1_n ipl_030_0_0__un0_n UDS_000_c ipl_030_0_1__un3_n ipl_030_0_1__un1_n LDS_000_c ipl_030_0_1__un0_n \ +# ipl_030_0_2__un3_n size_c_0__n ipl_030_0_2__un1_n ipl_030_0_2__un0_n size_c_1__n cpu_estse_0_un3_n cpu_estse_0_un1_n a_c_16__n cpu_estse_0_un0_n cpu_estse_1_un3_n \ +# a_c_17__n cpu_estse_1_un1_n cpu_estse_1_un0_n a_c_18__n cpu_estse_2_un3_n cpu_estse_2_un1_n a_c_19__n cpu_estse_2_un0_n amiga_bus_enable_0_un3_n a_c_20__n \ +# amiga_bus_enable_0_un1_n amiga_bus_enable_0_un0_n a_c_21__n as_030_000_sync_0_un3_n as_030_000_sync_0_un1_n a_c_22__n as_030_000_sync_0_un0_n clk_030_h_0_un3_n a_c_23__n clk_030_h_0_un1_n \ +# clk_030_h_0_un0_n a_c_24__n uds_000_int_0_un3_n uds_000_int_0_un1_n a_c_25__n uds_000_int_0_un0_n lds_000_int_0_un3_n a_c_26__n lds_000_int_0_un1_n lds_000_int_0_un0_n \ +# a_c_27__n fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n a_c_28__n fpu_cs_int_0_un0_n bg_000_0_un3_n a_c_29__n bg_000_0_un1_n bg_000_0_un0_n a_c_30__n \ +# ds_000_dma_0_un3_n ds_000_dma_0_un1_n a_c_31__n ds_000_dma_0_un0_n as_000_dma_0_un3_n A0_c as_000_dma_0_un1_n as_000_dma_0_un0_n nEXP_SPACE_c as_000_int_0_un3_n \ +# as_000_int_0_un1_n as_000_int_0_un0_n BG_030_c BG_000DFFSHreg BGACK_000_c .model bus68030 .inputs A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF \ VPA.BLIF RST.BLIF RW.BLIF A_30_.BLIF A_29_.BLIF A_28_.BLIF A_27_.BLIF A_26_.BLIF A_25_.BLIF \ A_24_.BLIF A_23_.BLIF A_22_.BLIF A_21_.BLIF A_20_.BLIF A_19_.BLIF A_18_.BLIF A_17_.BLIF A_16_.BLIF \ - IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF SIZE_1_.BLIF DSACK_1_.BLIF AS_030.BLIF AS_000.BLIF DS_030.BLIF UDS_000.BLIF LDS_000.BLIF A0.BLIF DTACK.BLIF SIZE_0_.BLIF DSACK_0_.BLIF BG_030_c.BLIF as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF BG_000DFFSHreg.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un1_n.BLIF \ - ds_000_dma_0_un0_n.BLIF BGACK_000_c.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un1_n.BLIF inst_BGACK_030_INTreg.BLIF CLK_030_c.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.BLIF dtack_sync_0_un3_n.BLIF \ - inst_VMA_INTreg.BLIF CLK_000_c.BLIF dtack_sync_0_un1_n.BLIF inst_AS_030_000_SYNC.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.BLIF CLK_OSZI_c.BLIF a0_dma_0_un3_n.BLIF inst_VPA_SYNC.BLIF \ - a0_dma_0_un1_n.BLIF inst_VPA_D.BLIF a0_dma_0_un0_n.BLIF inst_CLK_000_D0.BLIF CLK_OUT_INTreg.BLIF bg_000_0_un3_n.BLIF inst_CLK_000_D1.BLIF bg_000_0_un1_n.BLIF inst_CLK_000_D2.BLIF \ - bg_000_0_un0_n.BLIF inst_CLK_000_D5.BLIF IPL_030DFFSH_0_reg.BLIF inst_CLK_OUT_PRE.BLIF inst_BGACK_030_INT_D.BLIF IPL_030DFFSH_1_reg.BLIF vcc_n_n.BLIF gnd_n_n.BLIF IPL_030DFFSH_2_reg.BLIF \ - CLK_CNT_P_0_.BLIF SM_AMIGA_5_.BLIF ipl_c_0__n.BLIF inst_CLK_000_D4.BLIF SM_AMIGA_7_.BLIF ipl_c_1__n.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF ipl_c_2__n.BLIF \ - SM_AMIGA_6_.BLIF inst_AS_000_DMA.BLIF inst_AS_000_INT.BLIF dsack_c_1__n.BLIF inst_UDS_000_INT.BLIF inst_LDS_000_INT.BLIF DTACK_c.BLIF inst_DSACK1_INT.BLIF inst_CLK_000_D3.BLIF \ - state_machine_un59_bgack_030_int_n.BLIF SM_AMIGA_3_.BLIF state_machine_un6_bgack_000_n.BLIF inst_DS_000_DMA.BLIF SIZE_DMA_0_.BLIF SIZE_DMA_1_.BLIF RST_c.BLIF inst_A0_DMA.BLIF SM_AMIGA_4_.BLIF \ - RESETDFFRHreg.BLIF SM_AMIGA_2_.BLIF state_machine_un10_bg_030_n.BLIF RW_c.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1.BLIF SIZE_DMA_0_sqmuxa.BLIF fc_c_0__n.BLIF state_machine_a0_dma_4_n.BLIF state_machine_ds_000_dma_5_n.BLIF \ - fc_c_1__n.BLIF state_machine_lds_000_int_7_n.BLIF state_machine_uds_000_int_7_n.BLIF AMIGA_BUS_ENABLEDFFSHreg.BLIF AMIGA_BUS_DATA_DIR_c.BLIF N_88_0.BLIF N_86_0.BLIF A0_DMA_0_sqmuxa_i_0_0.BLIF N_83_i.BLIF \ - AS_030_000_SYNC_i.BLIF N_81_i.BLIF N_80_i.BLIF DS_030_c_i.BLIF N_79_i.BLIF N_172_i.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF CLK_030_c_i.BLIF N_77_i.BLIF \ - N_174_i.BLIF N_76_0.BLIF CLK_OUT_PRE_0.BLIF N_74_i.BLIF CLK_000_D1_i.BLIF N_73_i.BLIF sm_amiga_i_1__n.BLIF cpu_est_0_.BLIF N_72_i.BLIF \ - cpu_est_1_.BLIF N_171_i.BLIF cpu_est_2_.BLIF N_66_i.BLIF cpu_est_3_reg.BLIF AS_030_c_i.BLIF N_65_i.BLIF N_64_i.BLIF N_63_i.BLIF \ - N_167_i.BLIF cpu_est_ns_1__n.BLIF N_168_i.BLIF cpu_est_ns_2__n.BLIF cpu_est_ns_e_0_0__n.BLIF A0_DMA_0_sqmuxa_i_0.BLIF N_163_i.BLIF N_224.BLIF N_164_i.BLIF \ - N_225.BLIF N_165_i.BLIF N_226.BLIF sm_amiga_ns_e_0_0__n.BLIF N_227.BLIF N_160_i.BLIF N_228.BLIF N_161_i.BLIF N_31.BLIF \ - N_162_i.BLIF N_33.BLIF sm_amiga_ns_e_0_1__n.BLIF N_35.BLIF N_98_i.BLIF N_37.BLIF N_159_i.BLIF N_39.BLIF cpu_est_ns_0_2__n.BLIF \ - N_158_i.BLIF N_63.BLIF state_machine_amiga_bus_enable_6_iv_i_n.BLIF N_64.BLIF N_157_i.BLIF N_65.BLIF state_machine_ds_000_dma_5_0_n.BLIF N_66.BLIF N_155_i.BLIF \ - N_67.BLIF N_156_i.BLIF N_72.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF N_73.BLIF N_153_i.BLIF N_74.BLIF N_154_i.BLIF N_76.BLIF \ - N_177_i.BLIF N_80.BLIF N_176_i.BLIF N_81.BLIF N_179_i.BLIF N_83.BLIF cpu_est_ns_0_1__n.BLIF N_86.BLIF N_152_i.BLIF \ - N_88.BLIF N_98.BLIF N_151_i.BLIF N_108.BLIF N_109.BLIF N_150_i.BLIF N_126.BLIF N_197_i.BLIF N_231.BLIF \ - N_232.BLIF N_148_i.BLIF N_233.BLIF N_149_i.BLIF N_234.BLIF sm_amiga_ns_e_0_5__n.BLIF N_235.BLIF N_146_i.BLIF N_236.BLIF \ - N_147_i.BLIF N_237.BLIF N_46_0.BLIF N_239.BLIF N_145_i.BLIF N_240.BLIF N_198_i.BLIF N_241.BLIF N_144.BLIF \ - N_67_i.BLIF N_145.BLIF state_machine_uds_000_int_7_0_n.BLIF N_146.BLIF N_144_i.BLIF N_147.BLIF state_machine_lds_000_int_7_0_n.BLIF N_148.BLIF N_96_i_i.BLIF \ - N_149.BLIF N_240_i.BLIF N_150.BLIF N_241_i.BLIF N_151.BLIF N_39_0.BLIF N_152.BLIF N_237_i.BLIF N_153.BLIF \ - N_239_i.BLIF N_154.BLIF N_37_0.BLIF N_155.BLIF N_236_i.BLIF N_156.BLIF N_35_0.BLIF N_157.BLIF N_235_i.BLIF \ - N_158.BLIF N_33_0.BLIF N_159.BLIF N_175_i.BLIF N_160.BLIF N_31_0.BLIF N_161.BLIF N_228_0.BLIF N_162.BLIF \ - BG_030_c_i.BLIF N_163.BLIF N_233_i.BLIF N_164.BLIF state_machine_un10_bg_030_0_n.BLIF N_165.BLIF N_227_0.BLIF N_166.BLIF N_226_0.BLIF \ - N_167.BLIF N_108_i.BLIF N_168.BLIF N_109_i.BLIF N_171.BLIF N_225_0.BLIF N_172.BLIF state_machine_un6_bgack_000_0_n.BLIF N_173.BLIF \ - N_224_0.BLIF N_174.BLIF CLK_000_D2_i.BLIF N_175.BLIF state_machine_un59_bgack_030_int_0_n.BLIF N_176.BLIF N_253_1.BLIF N_179.BLIF N_253_2.BLIF \ - N_197.BLIF N_263_1.BLIF N_198.BLIF N_263_2.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2.BLIF N_263_3.BLIF cpu_est_ns_0_0_x2_1_.BLIF N_263_4.BLIF N_236_1.BLIF \ - N_263_5.BLIF N_253.BLIF N_263_6.BLIF N_263.BLIF N_74_i_1.BLIF VMA_INT_i.BLIF N_74_i_2.BLIF VPA_D_i.BLIF N_74_i_3.BLIF \ - DTACK_i.BLIF N_74_i_4.BLIF LDS_000_i.BLIF N_74_i_5.BLIF AS_000_i.BLIF N_83_i_1.BLIF cpu_est_i_0__n.BLIF N_83_i_2.BLIF sm_amiga_i_4__n.BLIF \ - A0_DMA_0_sqmuxa_i_0_0_1.BLIF BGACK_030_INT_i.BLIF state_machine_a0_dma_4_1_n.BLIF sm_amiga_i_5__n.BLIF state_machine_a0_dma_4_2_n.BLIF cpu_est_i_3__n.BLIF N_236_1_0.BLIF CLK_000_D0_i.BLIF N_234_1.BLIF \ - CLK_000_D4_i.BLIF N_234_2.BLIF cpu_est_i_1__n.BLIF N_233_1.BLIF UDS_000_i.BLIF N_231_1.BLIF CLK_000_D5_i.BLIF N_231_2.BLIF nEXP_SPACE_i.BLIF \ - N_231_3.BLIF AS_000_DMA_i.BLIF sm_amiga_ns_e_0_1_0__n.BLIF RW_i.BLIF sm_amiga_ns_e_0_1_1__n.BLIF sm_amiga_i_3__n.BLIF cpu_est_ns_0_1_1__n.BLIF sm_amiga_i_0__n.BLIF N_44_i_1.BLIF \ - A0_i.BLIF state_machine_uds_000_int_7_0_1_n.BLIF size_i_1__n.BLIF state_machine_lds_000_int_7_0_1_n.BLIF a_i_30__n.BLIF N_39_0_1.BLIF a_i_31__n.BLIF N_37_0_1.BLIF a_i_28__n.BLIF \ - N_166_1.BLIF a_i_29__n.BLIF N_164_1.BLIF a_i_26__n.BLIF N_156_1.BLIF a_i_27__n.BLIF N_144_1.BLIF a_i_24__n.BLIF N_240_1.BLIF \ - a_i_25__n.BLIF N_239_1.BLIF a_i_19__n.BLIF N_237_1.BLIF a_i_16__n.BLIF SIZE_DMA_0_sqmuxa_1.BLIF a_i_18__n.BLIF N_232_1.BLIF RST_i.BLIF \ - N_109_1.BLIF cpu_est_ns_0_0_m3_2__un3_n.BLIF SIZE_DMA_0_sqmuxa_i.BLIF cpu_est_ns_0_0_m3_2__un1_n.BLIF N_231_i.BLIF cpu_est_ns_0_0_m3_2__un0_n.BLIF N_126_i.BLIF state_machine_lds_000_int_7_0_m3_un3_n.BLIF N_232_i.BLIF \ - state_machine_lds_000_int_7_0_m3_un1_n.BLIF N_234_i.BLIF state_machine_lds_000_int_7_0_m3_un0_n.BLIF FPU_CS_INT_i.BLIF cpu_estse_0_un3_n.BLIF AS_030_c.BLIF cpu_estse_0_un1_n.BLIF cpu_estse_0_un0_n.BLIF AS_000_c.BLIF \ - cpu_estse_1_un3_n.BLIF cpu_estse_1_un1_n.BLIF DS_030_c.BLIF cpu_estse_1_un0_n.BLIF cpu_estse_2_un3_n.BLIF UDS_000_c.BLIF cpu_estse_2_un1_n.BLIF cpu_estse_2_un0_n.BLIF LDS_000_c.BLIF \ - dsack1_int_0_un3_n.BLIF dsack1_int_0_un1_n.BLIF size_c_0__n.BLIF dsack1_int_0_un0_n.BLIF as_000_dma_0_un3_n.BLIF size_c_1__n.BLIF as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF a_c_16__n.BLIF \ - as_000_int_0_un3_n.BLIF as_000_int_0_un1_n.BLIF a_c_17__n.BLIF as_000_int_0_un0_n.BLIF vpa_sync_0_un3_n.BLIF a_c_18__n.BLIF vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF a_c_19__n.BLIF \ - vma_int_0_un3_n.BLIF vma_int_0_un1_n.BLIF a_c_20__n.BLIF vma_int_0_un0_n.BLIF bgack_030_int_0_un3_n.BLIF a_c_21__n.BLIF bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF a_c_22__n.BLIF \ - size_dma_0_0__un3_n.BLIF size_dma_0_0__un1_n.BLIF a_c_23__n.BLIF size_dma_0_0__un0_n.BLIF size_dma_0_1__un3_n.BLIF a_c_24__n.BLIF size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF a_c_25__n.BLIF \ - ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un1_n.BLIF a_c_26__n.BLIF ipl_030_0_0__un0_n.BLIF ipl_030_0_1__un3_n.BLIF a_c_27__n.BLIF ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF a_c_28__n.BLIF \ - ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un1_n.BLIF a_c_29__n.BLIF ipl_030_0_2__un0_n.BLIF amiga_bus_enable_0_un3_n.BLIF a_c_30__n.BLIF amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF a_c_31__n.BLIF \ - uds_000_int_0_un3_n.BLIF uds_000_int_0_un1_n.BLIF A0_c.BLIF uds_000_int_0_un0_n.BLIF lds_000_int_0_un3_n.BLIF nEXP_SPACE_c.BLIF lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF as_030_000_sync_0_un3_n.BLIF \ - AS_030.PIN AS_000.PIN DS_030.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN SIZE_1_.PIN A0.PIN DSACK_1_.PIN \ - DTACK.PIN + IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF SIZE_1_.BLIF DSACK_1_.BLIF AS_030.BLIF AS_000.BLIF DS_030.BLIF UDS_000.BLIF LDS_000.BLIF A0.BLIF DTACK.BLIF SIZE_0_.BLIF DSACK_0_.BLIF CLK_030_c.BLIF CLK_000_c.BLIF CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.BLIF CLK_OUT_INTreg.BLIF inst_FPU_CS_INTreg.BLIF \ + inst_VMA_INTreg.BLIF inst_AS_030_000_SYNC.BLIF IPL_030DFFSH_0_reg.BLIF inst_BGACK_030_INT_D.BLIF inst_AS_000_DMA.BLIF IPL_030DFFSH_1_reg.BLIF inst_VPA_D.BLIF inst_CLK_OUT_PRE_50_D.BLIF IPL_030DFFSH_2_reg.BLIF \ + inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF ipl_c_0__n.BLIF inst_CLK_000_D2.BLIF inst_CLK_000_D4.BLIF ipl_c_1__n.BLIF inst_DTACK_D0.BLIF inst_CLK_OUT_PRE_50.BLIF ipl_c_2__n.BLIF \ + inst_CLK_OUT_PRE_25.BLIF vcc_n_n.BLIF gnd_n_n.BLIF dsack_c_1__n.BLIF state_machine_un13_clk_000_d0_n.BLIF inst_AS_000_INT.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF SM_AMIGA_6_.BLIF \ + SM_AMIGA_5_.BLIF inst_UDS_000_INT.BLIF inst_LDS_000_INT.BLIF inst_DSACK1_INT.BLIF clk_un3_clk_out_pre_50_n.BLIF RST_c.BLIF inst_CLK_000_D3.BLIF inst_CLK_030_H.BLIF RESETDFFRHreg.BLIF \ + state_machine_un6_bgack_000_n.BLIF state_machine_un15_clk_000_d0_n.BLIF RW_c.BLIF inst_DS_000_DMA.BLIF SIZE_DMA_0_.BLIF fc_c_0__n.BLIF SIZE_DMA_1_.BLIF inst_A0_DMA.BLIF fc_c_1__n.BLIF \ + SM_AMIGA_7_.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_2.BLIF AMIGA_BUS_ENABLEDFFSHreg.BLIF SM_AMIGA_4_.BLIF AMIGA_BUS_DATA_DIR_c.BLIF state_machine_ds_000_dma_3_n.BLIF SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF cpu_est_ns_0_1__n.BLIF \ + state_machine_un10_bg_030_n.BLIF N_134_i.BLIF state_machine_lds_000_int_7_n.BLIF N_169_i.BLIF state_machine_uds_000_int_7_n.BLIF N_133_i.BLIF N_167_i.BLIF N_51_0.BLIF N_140_i.BLIF \ + N_202_0.BLIF N_86_0.BLIF N_171_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0.BLIF N_82_i.BLIF sm_amiga_i_1__n.BLIF N_78_i.BLIF N_170_i.BLIF N_77_0.BLIF \ + CLK_000_D1_i.BLIF CLK_OUT_PRE_25_0.BLIF N_76_i.BLIF N_74_i.BLIF N_72_0.BLIF AS_030_000_SYNC_i.BLIF CLK_000_D2_i.BLIF state_machine_un8_bgack_030_int_i_0_0_n.BLIF cpu_est_0_.BLIF \ + N_69_i.BLIF cpu_est_1_.BLIF AS_030_c_i.BLIF cpu_est_2_.BLIF N_65_i.BLIF cpu_est_3_reg.BLIF N_64_i.BLIF N_62_i.BLIF N_152_i.BLIF \ + N_153_i.BLIF cpu_est_ns_1__n.BLIF N_61_0.BLIF cpu_est_ns_2__n.BLIF N_150_i.BLIF state_machine_un8_bgack_030_int_i_0_n.BLIF N_148_i.BLIF N_197.BLIF N_149_i.BLIF \ + N_198.BLIF N_199.BLIF N_123_i.BLIF N_200.BLIF N_145_i.BLIF N_201.BLIF N_146_i.BLIF sm_amiga_ns_0_0__n.BLIF N_51.BLIF \ + N_142_i.BLIF N_53.BLIF N_143_i.BLIF N_61.BLIF N_144_i.BLIF N_62.BLIF cpu_est_ns_0_2__n.BLIF N_64.BLIF N_141_i.BLIF \ + N_65.BLIF N_53_0.BLIF N_66.BLIF N_139_i.BLIF N_69.BLIF state_machine_amiga_bus_enable_4_iv_i_n.BLIF N_72.BLIF N_138_i.BLIF N_74.BLIF \ + N_48_i.BLIF N_76.BLIF N_136_i.BLIF N_77.BLIF N_137_i.BLIF N_78.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF N_82.BLIF N_135_i.BLIF \ + N_86.BLIF N_168_i.BLIF N_202.BLIF N_151_i.BLIF N_203.BLIF N_132_i.BLIF N_205.BLIF N_164_i.BLIF N_206.BLIF \ + N_115.BLIF N_130_i.BLIF N_116.BLIF N_131_i.BLIF N_117.BLIF N_41_0.BLIF N_118.BLIF N_128_i.BLIF N_120.BLIF \ + N_129_i.BLIF N_121.BLIF sm_amiga_ns_0_5__n.BLIF N_122.BLIF N_126_i.BLIF N_123.BLIF N_127_i.BLIF N_124.BLIF N_125.BLIF \ + N_125_i.BLIF N_126.BLIF N_127.BLIF N_124_i.BLIF N_128.BLIF N_129.BLIF N_122_i.BLIF N_130.BLIF N_131.BLIF \ + N_172_i.BLIF N_132.BLIF state_machine_size_dma_4_0_1__n.BLIF N_133.BLIF state_machine_ds_000_dma_3_0_n.BLIF N_134.BLIF N_66_i.BLIF N_135.BLIF N_120_i.BLIF \ + N_136.BLIF state_machine_lds_000_int_7_0_n.BLIF N_137.BLIF state_machine_uds_000_int_7_0_n.BLIF N_138.BLIF N_118_i.BLIF N_139.BLIF N_201_0.BLIF N_140.BLIF \ + N_117_i.BLIF N_141.BLIF N_200_0.BLIF N_142.BLIF N_115_i.BLIF N_143.BLIF N_116_i.BLIF N_144.BLIF N_199_0.BLIF \ + N_145.BLIF BG_030_c_i.BLIF N_146.BLIF N_206_i.BLIF N_147.BLIF state_machine_un10_bg_030_0_n.BLIF N_148.BLIF N_198_0.BLIF N_149.BLIF \ + N_197_0.BLIF N_150.BLIF N_203_i.BLIF N_152.BLIF state_machine_un13_clk_000_d0_i_n.BLIF N_153.BLIF state_machine_un15_clk_000_d0_0_n.BLIF N_164.BLIF state_machine_un6_bgack_000_0_n.BLIF \ + N_167.BLIF N_225_1.BLIF N_168.BLIF N_225_2.BLIF N_169.BLIF N_225_3.BLIF N_170.BLIF N_225_4.BLIF N_171.BLIF \ + N_225_5.BLIF N_172.BLIF N_225_6.BLIF N_173.BLIF N_228_1.BLIF N_225.BLIF N_228_2.BLIF N_228.BLIF N_69_i_1.BLIF \ + CLK_000_D0_i.BLIF N_69_i_2.BLIF BGACK_030_INT_i.BLIF N_69_i_3.BLIF CLK_030_i.BLIF N_69_i_4.BLIF cpu_est_i_3__n.BLIF N_69_i_5.BLIF sm_amiga_i_6__n.BLIF \ + state_machine_un8_bgack_030_int_i_0_0_1_n.BLIF nEXP_SPACE_i.BLIF N_72_0_1.BLIF CLK_000_D4_i.BLIF N_51_0_1.BLIF sm_amiga_i_5__n.BLIF N_51_0_2.BLIF sm_amiga_i_4__n.BLIF cpu_est_ns_0_1_1__n.BLIF \ + AS_000_i.BLIF cpu_est_ns_0_2_1__n.BLIF LDS_000_i.BLIF N_128_1.BLIF UDS_000_i.BLIF N_128_2.BLIF cpu_est_i_1__n.BLIF N_118_1.BLIF cpu_est_i_0__n.BLIF \ + N_118_2.BLIF DTACK_D0_i.BLIF N_118_3.BLIF VMA_INT_i.BLIF N_206_1.BLIF VPA_D_i.BLIF N_206_2.BLIF AS_000_DMA_i.BLIF sm_amiga_ns_0_1_0__n.BLIF \ + CLK_030_H_i.BLIF cpu_est_ns_0_1_2__n.BLIF RW_i.BLIF N_53_0_1.BLIF cpu_est_i_2__n.BLIF N_43_i_1.BLIF sm_amiga_i_0__n.BLIF state_machine_lds_000_int_7_0_1_n.BLIF sm_amiga_i_3__n.BLIF \ + state_machine_uds_000_int_7_0_1_n.BLIF sm_amiga_i_7__n.BLIF N_199_0_1.BLIF A0_i.BLIF N_152_1.BLIF size_i_1__n.BLIF N_147_1.BLIF DS_030_i.BLIF N_139_1.BLIF \ + a_i_19__n.BLIF N_137_1.BLIF a_i_16__n.BLIF N_127_1.BLIF a_i_18__n.BLIF N_120_1.BLIF a_i_30__n.BLIF state_machine_a0_dma_2_1_n.BLIF a_i_31__n.BLIF \ + N_116_1.BLIF a_i_28__n.BLIF N_115_1.BLIF a_i_29__n.BLIF state_machine_un13_clk_000_d0_1_n.BLIF a_i_26__n.BLIF N_203_1.BLIF a_i_27__n.BLIF state_machine_uds_000_int_7_0_m3_un3_n.BLIF \ + a_i_24__n.BLIF state_machine_uds_000_int_7_0_m3_un1_n.BLIF a_i_25__n.BLIF state_machine_uds_000_int_7_0_m3_un0_n.BLIF RST_i.BLIF dsack1_int_0_un3_n.BLIF dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF N_205_i.BLIF \ + vma_int_0_un3_n.BLIF FPU_CS_INT_i.BLIF vma_int_0_un1_n.BLIF CLK_OUT_PRE_50_D_i.BLIF vma_int_0_un0_n.BLIF AS_030_c.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un1_n.BLIF AS_000_c.BLIF \ + bgack_030_int_0_un0_n.BLIF ipl_030_0_0__un3_n.BLIF DS_030_c.BLIF ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF UDS_000_c.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un1_n.BLIF LDS_000_c.BLIF \ + ipl_030_0_1__un0_n.BLIF ipl_030_0_2__un3_n.BLIF size_c_0__n.BLIF ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF size_c_1__n.BLIF cpu_estse_0_un3_n.BLIF cpu_estse_0_un1_n.BLIF a_c_16__n.BLIF \ + cpu_estse_0_un0_n.BLIF cpu_estse_1_un3_n.BLIF a_c_17__n.BLIF cpu_estse_1_un1_n.BLIF cpu_estse_1_un0_n.BLIF a_c_18__n.BLIF cpu_estse_2_un3_n.BLIF cpu_estse_2_un1_n.BLIF a_c_19__n.BLIF \ + cpu_estse_2_un0_n.BLIF amiga_bus_enable_0_un3_n.BLIF a_c_20__n.BLIF amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF a_c_21__n.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un1_n.BLIF a_c_22__n.BLIF \ + as_030_000_sync_0_un0_n.BLIF clk_030_h_0_un3_n.BLIF a_c_23__n.BLIF clk_030_h_0_un1_n.BLIF clk_030_h_0_un0_n.BLIF a_c_24__n.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un1_n.BLIF a_c_25__n.BLIF \ + uds_000_int_0_un0_n.BLIF lds_000_int_0_un3_n.BLIF a_c_26__n.BLIF lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF a_c_27__n.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un1_n.BLIF a_c_28__n.BLIF \ + fpu_cs_int_0_un0_n.BLIF bg_000_0_un3_n.BLIF a_c_29__n.BLIF bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF a_c_30__n.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un1_n.BLIF a_c_31__n.BLIF \ + ds_000_dma_0_un0_n.BLIF as_000_dma_0_un3_n.BLIF A0_c.BLIF as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF nEXP_SPACE_c.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF \ + BG_030_c.BLIF BG_000DFFSHreg.BLIF BGACK_000_c.BLIF AS_030.PIN AS_000.PIN DS_030.PIN UDS_000.PIN LDS_000.PIN SIZE_0_.PIN \ + SIZE_1_.PIN A0.PIN DSACK_1_.PIN DTACK.PIN .outputs IPL_030_2_ BERR BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS AVEC AVEC_EXP E VMA \ RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN IPL_030_1_ IPL_030_0_ cpu_est_0_.D cpu_est_0_.C cpu_est_0_.AR cpu_est_1_.D \ - cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.D cpu_est_2_.C cpu_est_2_.AR cpu_est_3_reg.D cpu_est_3_reg.C cpu_est_3_reg.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR \ - SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR IPL_030DFFSH_0_reg.D IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C \ + cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.D cpu_est_2_.C cpu_est_2_.AR cpu_est_3_reg.D cpu_est_3_reg.C cpu_est_3_reg.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR \ + SIZE_DMA_1_.D SIZE_DMA_1_.C SIZE_DMA_1_.AP IPL_030DFFSH_0_reg.D IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C \ IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D \ - SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR inst_AS_000_INT.D inst_AS_000_INT.C inst_AS_000_INT.AP \ - inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP inst_VMA_INTreg.D inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE.D inst_CLK_OUT_PRE.C \ - inst_CLK_OUT_PRE.AR SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_0_.AP SIZE_DMA_1_.D SIZE_DMA_1_.C SIZE_DMA_1_.AP inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DS_000_DMA.AP inst_FPU_CS_INTreg.D \ - inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP inst_A0_DMA.D inst_A0_DMA.C inst_A0_DMA.AP BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP \ - inst_DSACK1_INT.D inst_DSACK1_INT.C inst_DSACK1_INT.AP inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_000_DMA.AP AMIGA_BUS_ENABLEDFFSHreg.D AMIGA_BUS_ENABLEDFFSHreg.C AMIGA_BUS_ENABLEDFFSHreg.AP inst_UDS_000_INT.D inst_UDS_000_INT.C \ - inst_UDS_000_INT.AP inst_LDS_000_INT.D inst_LDS_000_INT.C inst_LDS_000_INT.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_CLK_000_D4.D inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_CLK_000_D5.D \ - inst_CLK_000_D5.C inst_CLK_000_D5.AP inst_CLK_000_D3.D inst_CLK_000_D3.C inst_CLK_000_D3.AP CLK_CNT_P_0_.D CLK_CNT_P_0_.C CLK_CNT_P_0_.AR inst_CLK_000_D2.D inst_CLK_000_D2.C inst_CLK_000_D2.AP \ - inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D1.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C CLK_OUT_INTreg.AR inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP inst_CLK_000_D0.D inst_CLK_000_D0.C \ - inst_CLK_000_D0.AP inst_VPA_D.D inst_VPA_D.C inst_VPA_D.AP RESETDFFRHreg.D RESETDFFRHreg.C RESETDFFRHreg.AR un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2.X1 un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2.X2 cpu_est_ns_0_0_x2_1_.X1 cpu_est_ns_0_0_x2_1_.X2 \ - CLK_OUT_PRE_0.X1 CLK_OUT_PRE_0.X2 SIZE_1_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 DTACK SIZE_0_ DSACK_0_ BG_030_c as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n ds_000_dma_0_un3_n ds_000_dma_0_un1_n ds_000_dma_0_un0_n BGACK_000_c fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n \ - CLK_030_c fpu_cs_int_0_un0_n dtack_sync_0_un3_n CLK_000_c dtack_sync_0_un1_n dtack_sync_0_un0_n CLK_OSZI_c a0_dma_0_un3_n a0_dma_0_un1_n a0_dma_0_un0_n bg_000_0_un3_n \ - bg_000_0_un1_n bg_000_0_un0_n vcc_n_n gnd_n_n ipl_c_0__n ipl_c_1__n ipl_c_2__n dsack_c_1__n DTACK_c state_machine_un59_bgack_030_int_n state_machine_un6_bgack_000_n \ - RST_c state_machine_un10_bg_030_n RW_c un1_AS_030_000_SYNC_1_sqmuxa_1 SIZE_DMA_0_sqmuxa fc_c_0__n state_machine_a0_dma_4_n state_machine_ds_000_dma_5_n fc_c_1__n state_machine_lds_000_int_7_n state_machine_uds_000_int_7_n \ - AMIGA_BUS_DATA_DIR_c N_88_0 N_86_0 A0_DMA_0_sqmuxa_i_0_0 N_83_i AS_030_000_SYNC_i N_81_i N_80_i DS_030_c_i N_79_i N_172_i \ - un1_AS_030_000_SYNC_1_sqmuxa_1_0 CLK_030_c_i N_77_i N_174_i N_76_0 N_74_i CLK_000_D1_i N_73_i sm_amiga_i_1__n N_72_i N_171_i \ - N_66_i AS_030_c_i N_65_i N_64_i N_63_i N_167_i cpu_est_ns_1__n N_168_i cpu_est_ns_2__n cpu_est_ns_e_0_0__n A0_DMA_0_sqmuxa_i_0 \ - N_163_i N_224 N_164_i N_225 N_165_i N_226 sm_amiga_ns_e_0_0__n N_227 N_160_i N_228 N_161_i \ - N_31 N_162_i N_33 sm_amiga_ns_e_0_1__n N_35 N_98_i N_37 N_159_i N_39 cpu_est_ns_0_2__n N_158_i \ - N_63 state_machine_amiga_bus_enable_6_iv_i_n N_64 N_157_i N_65 state_machine_ds_000_dma_5_0_n N_66 N_155_i N_67 N_156_i N_72 \ - AMIGA_BUS_DATA_DIR_c_0 N_73 N_153_i N_74 N_154_i N_76 N_177_i N_80 N_176_i N_81 N_179_i \ - N_83 cpu_est_ns_0_1__n N_86 N_152_i N_88 N_98 N_151_i N_108 N_109 N_150_i N_126 \ - N_197_i N_231 N_232 N_148_i N_233 N_149_i N_234 sm_amiga_ns_e_0_5__n N_235 N_146_i N_236 \ - N_147_i N_237 N_46_0 N_239 N_145_i N_240 N_198_i N_241 N_144 N_67_i N_145 \ - state_machine_uds_000_int_7_0_n N_146 N_144_i N_147 state_machine_lds_000_int_7_0_n N_148 N_96_i_i N_149 N_240_i N_150 N_241_i \ - N_151 N_39_0 N_152 N_237_i N_153 N_239_i N_154 N_37_0 N_155 N_236_i N_156 \ - N_35_0 N_157 N_235_i N_158 N_33_0 N_159 N_175_i N_160 N_31_0 N_161 N_228_0 \ - N_162 BG_030_c_i N_163 N_233_i N_164 state_machine_un10_bg_030_0_n N_165 N_227_0 N_166 N_226_0 N_167 \ - N_108_i N_168 N_109_i N_171 N_225_0 N_172 state_machine_un6_bgack_000_0_n N_173 N_224_0 N_174 CLK_000_D2_i \ - N_175 state_machine_un59_bgack_030_int_0_n N_176 N_253_1 N_179 N_253_2 N_197 N_263_1 N_198 N_263_2 N_263_3 \ - N_263_4 N_236_1 N_263_5 N_253 N_263_6 N_263 N_74_i_1 VMA_INT_i N_74_i_2 VPA_D_i N_74_i_3 \ - DTACK_i N_74_i_4 LDS_000_i N_74_i_5 AS_000_i N_83_i_1 cpu_est_i_0__n N_83_i_2 sm_amiga_i_4__n A0_DMA_0_sqmuxa_i_0_0_1 BGACK_030_INT_i \ - state_machine_a0_dma_4_1_n sm_amiga_i_5__n state_machine_a0_dma_4_2_n cpu_est_i_3__n N_236_1_0 CLK_000_D0_i N_234_1 CLK_000_D4_i N_234_2 cpu_est_i_1__n N_233_1 \ - UDS_000_i N_231_1 CLK_000_D5_i N_231_2 nEXP_SPACE_i N_231_3 AS_000_DMA_i sm_amiga_ns_e_0_1_0__n RW_i sm_amiga_ns_e_0_1_1__n sm_amiga_i_3__n \ - cpu_est_ns_0_1_1__n sm_amiga_i_0__n N_44_i_1 A0_i state_machine_uds_000_int_7_0_1_n size_i_1__n state_machine_lds_000_int_7_0_1_n a_i_30__n N_39_0_1 a_i_31__n N_37_0_1 \ - a_i_28__n N_166_1 a_i_29__n N_164_1 a_i_26__n N_156_1 a_i_27__n N_144_1 a_i_24__n N_240_1 a_i_25__n \ - N_239_1 a_i_19__n N_237_1 a_i_16__n SIZE_DMA_0_sqmuxa_1 a_i_18__n N_232_1 RST_i N_109_1 cpu_est_ns_0_0_m3_2__un3_n SIZE_DMA_0_sqmuxa_i \ - cpu_est_ns_0_0_m3_2__un1_n N_231_i cpu_est_ns_0_0_m3_2__un0_n N_126_i state_machine_lds_000_int_7_0_m3_un3_n N_232_i state_machine_lds_000_int_7_0_m3_un1_n N_234_i state_machine_lds_000_int_7_0_m3_un0_n FPU_CS_INT_i cpu_estse_0_un3_n \ - AS_030_c cpu_estse_0_un1_n cpu_estse_0_un0_n AS_000_c cpu_estse_1_un3_n cpu_estse_1_un1_n DS_030_c cpu_estse_1_un0_n cpu_estse_2_un3_n UDS_000_c cpu_estse_2_un1_n \ - cpu_estse_2_un0_n LDS_000_c dsack1_int_0_un3_n dsack1_int_0_un1_n size_c_0__n dsack1_int_0_un0_n as_000_dma_0_un3_n size_c_1__n as_000_dma_0_un1_n as_000_dma_0_un0_n a_c_16__n \ - as_000_int_0_un3_n as_000_int_0_un1_n a_c_17__n as_000_int_0_un0_n vpa_sync_0_un3_n a_c_18__n vpa_sync_0_un1_n vpa_sync_0_un0_n a_c_19__n vma_int_0_un3_n vma_int_0_un1_n \ - a_c_20__n vma_int_0_un0_n bgack_030_int_0_un3_n a_c_21__n bgack_030_int_0_un1_n bgack_030_int_0_un0_n a_c_22__n size_dma_0_0__un3_n size_dma_0_0__un1_n a_c_23__n size_dma_0_0__un0_n \ - size_dma_0_1__un3_n a_c_24__n size_dma_0_1__un1_n size_dma_0_1__un0_n a_c_25__n ipl_030_0_0__un3_n ipl_030_0_0__un1_n a_c_26__n ipl_030_0_0__un0_n ipl_030_0_1__un3_n a_c_27__n \ - ipl_030_0_1__un1_n ipl_030_0_1__un0_n a_c_28__n ipl_030_0_2__un3_n ipl_030_0_2__un1_n a_c_29__n ipl_030_0_2__un0_n amiga_bus_enable_0_un3_n a_c_30__n amiga_bus_enable_0_un1_n amiga_bus_enable_0_un0_n \ - a_c_31__n uds_000_int_0_un3_n uds_000_int_0_un1_n A0_c uds_000_int_0_un0_n lds_000_int_0_un3_n nEXP_SPACE_c lds_000_int_0_un1_n lds_000_int_0_un0_n as_030_000_sync_0_un3_n \ - AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE \ - DTACK.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE CIIN.OE + SM_AMIGA_4_.C SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR \ + inst_DSACK1_INT.D inst_DSACK1_INT.C inst_DSACK1_INT.AP inst_VMA_INTreg.D inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_BGACK_030_INTreg.D inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE_25.D inst_CLK_OUT_PRE_25.C \ + inst_CLK_OUT_PRE_25.AR SIZE_DMA_0_.D SIZE_DMA_0_.C SIZE_DMA_0_.AP inst_UDS_000_INT.D inst_UDS_000_INT.C inst_UDS_000_INT.AP inst_LDS_000_INT.D inst_LDS_000_INT.C inst_LDS_000_INT.AP inst_FPU_CS_INTreg.D \ + inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP BG_000DFFSHreg.D BG_000DFFSHreg.C BG_000DFFSHreg.AP inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DS_000_DMA.AP inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_000_DMA.AP \ + inst_AS_000_INT.D inst_AS_000_INT.C inst_AS_000_INT.AP AMIGA_BUS_ENABLEDFFSHreg.D AMIGA_BUS_ENABLEDFFSHreg.C AMIGA_BUS_ENABLEDFFSHreg.AP inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_CLK_030_H.D inst_CLK_030_H.C \ + inst_A0_DMA.D inst_A0_DMA.C inst_A0_DMA.AP inst_CLK_000_D4.D inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_DTACK_D0.D inst_DTACK_D0.C inst_DTACK_D0.AP inst_CLK_000_D3.D inst_CLK_000_D3.C \ + inst_CLK_000_D3.AP inst_CLK_000_D2.D inst_CLK_000_D2.C inst_CLK_000_D2.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C CLK_OUT_INTreg.AR inst_CLK_000_D1.D inst_CLK_000_D1.C inst_CLK_000_D1.AP inst_BGACK_030_INT_D.D \ + inst_BGACK_030_INT_D.C inst_BGACK_030_INT_D.AP inst_CLK_OUT_PRE_50_D.D inst_CLK_OUT_PRE_50_D.C inst_CLK_OUT_PRE_50_D.AR inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D0.AP inst_VPA_D.D inst_VPA_D.C inst_VPA_D.AP \ + inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_50.AR RESETDFFRHreg.D RESETDFFRHreg.C RESETDFFRHreg.AR CLK_OUT_PRE_25_0.X1 CLK_OUT_PRE_25_0.X2 SIZE_1_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 DTACK SIZE_0_ DSACK_0_ CLK_030_c CLK_000_c CLK_OSZI_c \ + ipl_c_0__n ipl_c_1__n ipl_c_2__n vcc_n_n gnd_n_n dsack_c_1__n state_machine_un13_clk_000_d0_n clk_un3_clk_out_pre_50_n RST_c state_machine_un6_bgack_000_n state_machine_un15_clk_000_d0_n \ + RW_c fc_c_0__n fc_c_1__n un1_AMIGA_BUS_ENABLE_1_sqmuxa_2 AMIGA_BUS_DATA_DIR_c state_machine_ds_000_dma_3_n cpu_est_ns_0_1__n state_machine_un10_bg_030_n N_134_i state_machine_lds_000_int_7_n N_169_i \ + state_machine_uds_000_int_7_n N_133_i N_167_i N_51_0 N_140_i N_202_0 N_86_0 N_171_i un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0 N_82_i sm_amiga_i_1__n \ + N_78_i N_170_i N_77_0 CLK_000_D1_i N_76_i N_74_i N_72_0 AS_030_000_SYNC_i CLK_000_D2_i state_machine_un8_bgack_030_int_i_0_0_n N_69_i \ + AS_030_c_i N_65_i N_64_i N_62_i N_152_i N_153_i cpu_est_ns_1__n N_61_0 cpu_est_ns_2__n N_150_i state_machine_un8_bgack_030_int_i_0_n \ + N_148_i N_197 N_149_i N_198 N_199 N_123_i N_200 N_145_i N_201 N_146_i sm_amiga_ns_0_0__n \ + N_51 N_142_i N_53 N_143_i N_61 N_144_i N_62 cpu_est_ns_0_2__n N_64 N_141_i N_65 \ + N_53_0 N_66 N_139_i N_69 state_machine_amiga_bus_enable_4_iv_i_n N_72 N_138_i N_74 N_48_i N_76 N_136_i \ + N_77 N_137_i N_78 AMIGA_BUS_DATA_DIR_c_0 N_82 N_135_i N_86 N_168_i N_202 N_151_i N_203 \ + N_132_i N_205 N_164_i N_206 N_115 N_130_i N_116 N_131_i N_117 N_41_0 N_118 \ + N_128_i N_120 N_129_i N_121 sm_amiga_ns_0_5__n N_122 N_126_i N_123 N_127_i N_124 N_125 \ + N_125_i N_126 N_127 N_124_i N_128 N_129 N_122_i N_130 N_131 N_172_i N_132 \ + state_machine_size_dma_4_0_1__n N_133 state_machine_ds_000_dma_3_0_n N_134 N_66_i N_135 N_120_i N_136 state_machine_lds_000_int_7_0_n N_137 state_machine_uds_000_int_7_0_n \ + N_138 N_118_i N_139 N_201_0 N_140 N_117_i N_141 N_200_0 N_142 N_115_i N_143 \ + N_116_i N_144 N_199_0 N_145 BG_030_c_i N_146 N_206_i N_147 state_machine_un10_bg_030_0_n N_148 N_198_0 \ + N_149 N_197_0 N_150 N_203_i N_152 state_machine_un13_clk_000_d0_i_n N_153 state_machine_un15_clk_000_d0_0_n N_164 state_machine_un6_bgack_000_0_n N_167 \ + N_225_1 N_168 N_225_2 N_169 N_225_3 N_170 N_225_4 N_171 N_225_5 N_172 N_225_6 \ + N_173 N_228_1 N_225 N_228_2 N_228 N_69_i_1 CLK_000_D0_i N_69_i_2 BGACK_030_INT_i N_69_i_3 CLK_030_i \ + N_69_i_4 cpu_est_i_3__n N_69_i_5 sm_amiga_i_6__n state_machine_un8_bgack_030_int_i_0_0_1_n nEXP_SPACE_i N_72_0_1 CLK_000_D4_i N_51_0_1 sm_amiga_i_5__n N_51_0_2 \ + sm_amiga_i_4__n cpu_est_ns_0_1_1__n AS_000_i cpu_est_ns_0_2_1__n LDS_000_i N_128_1 UDS_000_i N_128_2 cpu_est_i_1__n N_118_1 cpu_est_i_0__n \ + N_118_2 DTACK_D0_i N_118_3 VMA_INT_i N_206_1 VPA_D_i N_206_2 AS_000_DMA_i sm_amiga_ns_0_1_0__n CLK_030_H_i cpu_est_ns_0_1_2__n \ + RW_i N_53_0_1 cpu_est_i_2__n N_43_i_1 sm_amiga_i_0__n state_machine_lds_000_int_7_0_1_n sm_amiga_i_3__n state_machine_uds_000_int_7_0_1_n sm_amiga_i_7__n N_199_0_1 A0_i \ + N_152_1 size_i_1__n N_147_1 DS_030_i N_139_1 a_i_19__n N_137_1 a_i_16__n N_127_1 a_i_18__n N_120_1 \ + a_i_30__n state_machine_a0_dma_2_1_n a_i_31__n N_116_1 a_i_28__n N_115_1 a_i_29__n state_machine_un13_clk_000_d0_1_n a_i_26__n N_203_1 a_i_27__n \ + state_machine_uds_000_int_7_0_m3_un3_n a_i_24__n state_machine_uds_000_int_7_0_m3_un1_n a_i_25__n state_machine_uds_000_int_7_0_m3_un0_n RST_i dsack1_int_0_un3_n dsack1_int_0_un1_n dsack1_int_0_un0_n N_205_i vma_int_0_un3_n \ + FPU_CS_INT_i vma_int_0_un1_n CLK_OUT_PRE_50_D_i vma_int_0_un0_n AS_030_c bgack_030_int_0_un3_n bgack_030_int_0_un1_n AS_000_c bgack_030_int_0_un0_n ipl_030_0_0__un3_n DS_030_c \ + ipl_030_0_0__un1_n ipl_030_0_0__un0_n UDS_000_c ipl_030_0_1__un3_n ipl_030_0_1__un1_n LDS_000_c ipl_030_0_1__un0_n ipl_030_0_2__un3_n size_c_0__n ipl_030_0_2__un1_n ipl_030_0_2__un0_n \ + size_c_1__n cpu_estse_0_un3_n cpu_estse_0_un1_n a_c_16__n cpu_estse_0_un0_n cpu_estse_1_un3_n a_c_17__n cpu_estse_1_un1_n cpu_estse_1_un0_n a_c_18__n cpu_estse_2_un3_n \ + cpu_estse_2_un1_n a_c_19__n cpu_estse_2_un0_n amiga_bus_enable_0_un3_n a_c_20__n amiga_bus_enable_0_un1_n amiga_bus_enable_0_un0_n a_c_21__n as_030_000_sync_0_un3_n as_030_000_sync_0_un1_n a_c_22__n \ + as_030_000_sync_0_un0_n clk_030_h_0_un3_n a_c_23__n clk_030_h_0_un1_n clk_030_h_0_un0_n a_c_24__n uds_000_int_0_un3_n uds_000_int_0_un1_n a_c_25__n uds_000_int_0_un0_n lds_000_int_0_un3_n \ + a_c_26__n lds_000_int_0_un1_n lds_000_int_0_un0_n a_c_27__n fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n a_c_28__n fpu_cs_int_0_un0_n bg_000_0_un3_n a_c_29__n bg_000_0_un1_n \ + bg_000_0_un0_n a_c_30__n ds_000_dma_0_un3_n ds_000_dma_0_un1_n a_c_31__n ds_000_dma_0_un0_n as_000_dma_0_un3_n A0_c as_000_dma_0_un1_n as_000_dma_0_un0_n nEXP_SPACE_c \ + as_000_int_0_un3_n as_000_int_0_un1_n as_000_int_0_un0_n BG_030_c BGACK_000_c AS_030.OE AS_000.OE DS_030.OE UDS_000.OE \ + LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE DSACK_0_.OE AVEC_EXP.OE \ + CIIN.OE .names inst_AS_000_DMA.BLIF AS_030 1 1 .names AS_030.PIN AS_030_c 1 1 -.names N_166.BLIF AS_030.OE +.names N_147.BLIF AS_030.OE 1 1 .names inst_AS_000_INT.BLIF AS_000 1 1 @@ -166,7 +159,7 @@ 1 1 .names DS_030.PIN DS_030_c 1 1 -.names N_166.BLIF DS_030.OE +.names N_147.BLIF DS_030.OE 1 1 .names inst_UDS_000_INT.BLIF UDS_000 1 1 @@ -184,19 +177,19 @@ 1 1 .names SIZE_0_.PIN size_c_0__n 1 1 -.names N_166.BLIF SIZE_0_.OE +.names N_147.BLIF SIZE_0_.OE 1 1 .names SIZE_DMA_1_.BLIF SIZE_1_ 1 1 .names SIZE_1_.PIN size_c_1__n 1 1 -.names N_166.BLIF SIZE_1_.OE +.names N_147.BLIF SIZE_1_.OE 1 1 .names inst_A0_DMA.BLIF A0 1 1 .names A0.PIN A0_c 1 1 -.names N_166.BLIF A0.OE +.names N_147.BLIF A0.OE 1 1 .names inst_DSACK1_INT.BLIF DSACK_1_ 1 1 @@ -206,9 +199,9 @@ 1 1 .names dsack_c_1__n.BLIF DTACK 1 1 -.names DTACK.PIN DTACK_c +.names DTACK.PIN inst_DTACK_D0.D 1 1 -.names N_166.BLIF DTACK.OE +.names N_147.BLIF DTACK.OE 1 1 .names gnd_n_n.BLIF BERR 1 1 @@ -222,1082 +215,1023 @@ 1 1 .names FPU_CS_INT_i.BLIF AVEC_EXP.OE 1 1 -.names N_253.BLIF CIIN +.names N_228.BLIF CIIN 1 1 -.names N_263.BLIF CIIN.OE +.names N_225.BLIF CIIN.OE 1 1 -.names N_158.BLIF N_158_i +.names N_130.BLIF N_130_i 0 1 -.names N_234_i.BLIF N_228.BLIF dtack_sync_0_un1_n -11 1 -.names CLK_OSZI_c.BLIF CLK_CNT_P_0_.C -1 1 -.names N_157.BLIF N_157_i -0 1 -.names inst_DTACK_SYNC.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n -11 1 -.names state_machine_ds_000_dma_5_0_n.BLIF state_machine_ds_000_dma_5_n -0 1 -.names dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.D -1- 1 --1 1 -.names RST_i.BLIF CLK_CNT_P_0_.AR -1 1 -.names N_155.BLIF N_155_i -0 1 -.names N_224.BLIF a0_dma_0_un3_n -0 1 -.names N_156.BLIF N_156_i -0 1 -.names state_machine_a0_dma_4_n.BLIF N_224.BLIF a0_dma_0_un1_n -11 1 -.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c -0 1 -.names inst_A0_DMA.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n -11 1 -.names inst_CLK_000_D1.BLIF inst_CLK_000_D2.D -1 1 -.names N_153.BLIF N_153_i -0 1 -.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF inst_A0_DMA.D -1- 1 --1 1 -.names N_154.BLIF N_154_i -0 1 -.names state_machine_un10_bg_030_n.BLIF bg_000_0_un3_n -0 1 -.names CLK_OSZI_c.BLIF inst_CLK_000_D2.C -1 1 -.names N_176.BLIF N_176_i -0 1 -.names BG_030_c.BLIF state_machine_un10_bg_030_n.BLIF bg_000_0_un1_n -11 1 -.names N_179.BLIF N_179_i -0 1 -.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n -11 1 -.names RST_i.BLIF inst_CLK_000_D2.AP -1 1 -.names cpu_est_ns_0_1__n.BLIF cpu_est_ns_1__n -0 1 -.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF BG_000DFFSHreg.D -1- 1 --1 1 -.names N_152.BLIF N_152_i -0 1 -.names N_232.BLIF N_232_i -0 1 -.names N_151.BLIF N_151_i -0 1 -.names vcc_n_n -1 -.names inst_CLK_000_D0.BLIF inst_CLK_000_D1.D -1 1 -.names N_150.BLIF N_150_i -0 1 -.names gnd_n_n -.names N_197.BLIF N_197_i -0 1 -.names CLK_OSZI_c.BLIF inst_CLK_000_D1.C -1 1 -.names N_63_i.BLIF N_63 -0 1 -.names N_167.BLIF N_167_i -0 1 -.names RST_i.BLIF inst_CLK_000_D1.AP -1 1 -.names N_168.BLIF N_168_i -0 1 -.names cpu_est_ns_e_0_0__n.BLIF cpu_est_0_.D -0 1 -.names N_163.BLIF N_163_i -0 1 -.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D -1 1 -.names N_164.BLIF N_164_i -0 1 -.names N_165.BLIF N_165_i -0 1 -.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C -1 1 -.names sm_amiga_ns_e_0_0__n.BLIF SM_AMIGA_7_.D -0 1 -.names N_160.BLIF N_160_i -0 1 -.names RST_i.BLIF CLK_OUT_INTreg.AR -1 1 -.names N_161.BLIF N_161_i -0 1 -.names N_162.BLIF N_162_i -0 1 -.names sm_amiga_ns_e_0_1__n.BLIF SM_AMIGA_6_.D -0 1 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.D -1 1 -.names N_98.BLIF N_98_i -0 1 -.names N_159.BLIF N_159_i -0 1 -.names CLK_OSZI_c.BLIF inst_BGACK_030_INT_D.C -1 1 -.names cpu_est_ns_0_2__n.BLIF cpu_est_ns_2__n -0 1 -.names N_172.BLIF N_172_i -0 1 -.names RST_i.BLIF inst_BGACK_030_INT_D.AP -1 1 -.names un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1 -0 1 -.names CLK_030_c.BLIF CLK_030_c_i -0 1 -.names N_174.BLIF N_174_i +.names N_131.BLIF N_131_i 0 1 .names CLK_000_c.BLIF inst_CLK_000_D0.D 1 1 -.names N_76_0.BLIF N_76 +.names N_41_0.BLIF SM_AMIGA_1_.D 0 1 -.names N_74_i.BLIF N_74 +.names N_128.BLIF N_128_i 0 1 .names CLK_OSZI_c.BLIF inst_CLK_000_D0.C 1 1 -.names inst_CLK_000_D1.BLIF CLK_000_D1_i +.names N_129.BLIF N_129_i 0 1 -.names N_73_i.BLIF N_73 +.names sm_amiga_ns_0_5__n.BLIF SM_AMIGA_2_.D 0 1 -.names CLK_OSZI_c.BLIF cpu_est_0_.C -1 1 .names RST_i.BLIF inst_CLK_000_D0.AP 1 1 -.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +.names N_153.BLIF N_153_i 0 1 -.names N_72_i.BLIF N_72 +.names N_61_0.BLIF N_61 0 1 -.names RST_i.BLIF cpu_est_0_.AR -1 1 -.names N_171.BLIF N_171_i +.names N_150.BLIF N_150_i 0 1 -.names N_66_i.BLIF N_66 +.names N_148.BLIF N_148_i 0 1 .names CLK_OSZI_c.BLIF inst_VPA_D.C 1 1 -.names AS_030_c.BLIF AS_030_c_i +.names N_149.BLIF N_149_i 0 1 -.names N_65_i.BLIF N_65 +.names N_123.BLIF N_123_i +0 1 +.names RST_i.BLIF inst_VPA_D.AP +1 1 +.names N_145.BLIF N_145_i +0 1 +.names N_146.BLIF N_146_i +0 1 +.names CLK_OSZI_c.BLIF cpu_est_0_.C +1 1 +.names sm_amiga_ns_0_0__n.BLIF SM_AMIGA_7_.D +0 1 +.names N_142.BLIF N_142_i +0 1 +.names RST_i.BLIF cpu_est_0_.AR +1 1 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_50.C +1 1 +.names N_143.BLIF N_143_i +0 1 +.names N_144.BLIF N_144_i +0 1 +.names RST_i.BLIF inst_CLK_OUT_PRE_50.AR +1 1 +.names cpu_est_ns_0_2__n.BLIF cpu_est_ns_2__n +0 1 +.names N_141.BLIF N_141_i 0 1 .names CLK_OSZI_c.BLIF cpu_est_1_.C 1 1 -.names RST_i.BLIF inst_VPA_D.AP -1 1 -.names N_64_i.BLIF N_64 -0 1 -.names N_88_0.BLIF N_88 -0 1 -.names RST_i.BLIF cpu_est_1_.AR -1 1 -.names N_86_0.BLIF N_86 +.names N_53_0.BLIF N_53 0 1 .names vcc_n_n.BLIF RESETDFFRHreg.D 1 1 -.names A0_DMA_0_sqmuxa_i_0_0.BLIF A0_DMA_0_sqmuxa_i_0 +.names N_170.BLIF N_170_i 0 1 -.names N_83_i.BLIF N_83 +.names RST_i.BLIF cpu_est_1_.AR +1 1 +.names N_77_0.BLIF N_77 0 1 .names CLK_OSZI_c.BLIF RESETDFFRHreg.C 1 1 -.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i +.names inst_CLK_000_D1.BLIF CLK_000_D1_i 0 1 -.names CLK_OSZI_c.BLIF cpu_est_2_.C -1 1 -.names N_81_i.BLIF N_81 +.names N_76_i.BLIF N_76 0 1 .names RST_i.BLIF RESETDFFRHreg.AR 1 1 -.names N_80_i.BLIF N_80 +.names N_74_i.BLIF N_74 +0 1 +.names CLK_OSZI_c.BLIF cpu_est_2_.C +1 1 +.names N_72_0.BLIF N_72 +0 1 +.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i 0 1 .names RST_i.BLIF cpu_est_2_.AR 1 1 -.names DS_030_c.BLIF DS_030_c_i -0 1 -.names cpu_est_0_.BLIF cpu_est_i_0__n -0 1 -.names inst_BGACK_030_INTreg.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2.X1 +.names inst_CLK_OUT_PRE_25.BLIF CLK_OUT_PRE_25_0.X1 1 1 -.names cpu_est_1_.BLIF cpu_est_ns_0_0_m3_2__un3_n +.names inst_CLK_000_D2.BLIF CLK_000_D2_i +0 1 +.names state_machine_un8_bgack_030_int_i_0_0_n.BLIF state_machine_un8_bgack_030_int_i_0_n +0 1 +.names clk_un3_clk_out_pre_50_n.BLIF CLK_OUT_PRE_25_0.X2 +1 1 +.names N_69_i.BLIF N_69 +0 1 +.names AS_030_c.BLIF AS_030_c_i 0 1 -.names cpu_est_2_.BLIF cpu_est_1_.BLIF cpu_est_ns_0_0_m3_2__un1_n -11 1 .names CLK_OSZI_c.BLIF cpu_est_3_reg.C 1 1 -.names inst_BGACK_030_INT_D.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2.X2 +.names N_65_i.BLIF N_65 +0 1 +.names CLK_OUT_PRE_25_0.BLIF inst_CLK_OUT_PRE_25.D 1 1 -.names cpu_est_i_0__n.BLIF cpu_est_ns_0_0_m3_2__un3_n.BLIF cpu_est_ns_0_0_m3_2__un0_n -11 1 -.names cpu_est_ns_0_0_m3_2__un1_n.BLIF cpu_est_ns_0_0_m3_2__un0_n.BLIF N_98 -1- 1 --1 1 +.names N_64_i.BLIF N_64 +0 1 .names RST_i.BLIF cpu_est_3_reg.AR 1 1 -.names AS_000_c.BLIF AS_000_i +.names N_62_i.BLIF N_62 0 1 -.names cpu_est_2_.BLIF cpu_est_ns_0_0_x2_1_.X1 -1 1 -.names LDS_000_c.BLIF LDS_000_i +.names N_152.BLIF N_152_i 0 1 -.names DTACK_c.BLIF DTACK_i +.names cpu_est_ns_0_1__n.BLIF cpu_est_ns_1__n 0 1 -.names cpu_est_3_reg.BLIF cpu_est_ns_0_0_x2_1_.X2 -1 1 -.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF N_236_1 -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C -1 1 -.names inst_VPA_D.BLIF VPA_D_i +.names N_134.BLIF N_134_i 0 1 -.names inst_VMA_INTreg.BLIF VMA_INT_i -0 1 -.names RST_i.BLIF SM_AMIGA_1_.AR -1 1 -.names CLK_CNT_P_0_.BLIF CLK_OUT_PRE_0.X1 -1 1 -.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF N_73_i -11 1 -.names N_64_i.BLIF N_174_i.BLIF N_76_0 -11 1 -.names inst_CLK_OUT_PRE.BLIF CLK_OUT_PRE_0.X2 -1 1 -.names BGACK_030_INT_i.BLIF CLK_030_c_i.BLIF N_77_i -11 1 -.names N_65_i.BLIF N_172_i.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1_0 -11 1 .names CLK_OSZI_c.BLIF SM_AMIGA_0_.C 1 1 -.names inst_BGACK_030_INTreg.BLIF DS_030_c_i.BLIF N_79_i -11 1 -.names CLK_OUT_PRE_0.BLIF inst_CLK_OUT_PRE.D -1 1 -.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_6_.BLIF N_80_i -11 1 +.names N_169.BLIF N_169_i +0 1 +.names N_133.BLIF N_133_i +0 1 .names RST_i.BLIF SM_AMIGA_0_.AR 1 1 -.names cpu_est_3_reg.BLIF cpu_est_i_3__n +.names N_167.BLIF N_167_i 0 1 -.names cpu_est_3_reg.BLIF cpu_est_i_1__n.BLIF N_81_i -11 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +.names N_51_0.BLIF N_51 0 1 -.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n +.names N_140.BLIF N_140_i 0 1 -.names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C -1 1 -.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_5_.BLIF N_86_0 -11 1 -.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n -0 1 -.names RST_i.BLIF IPL_030DFFSH_0_reg.AP -1 1 -.names N_63_i.BLIF SM_AMIGA_4_.BLIF N_88_0 -11 1 -.names N_64.BLIF N_152_i.BLIF SM_AMIGA_5_.D -11 1 -.names CLK_OSZI_c.BLIF IPL_030DFFSH_1_reg.C -1 1 -.names N_153_i.BLIF N_154_i.BLIF N_177_i -11 1 -.names N_155_i.BLIF N_156_i.BLIF AMIGA_BUS_DATA_DIR_c_0 -11 1 -.names RST_i.BLIF IPL_030DFFSH_1_reg.AP -1 1 -.names A0_DMA_0_sqmuxa_i_0_0.BLIF N_157_i.BLIF state_machine_ds_000_dma_5_0_n -11 1 -.names inst_BGACK_030_INTreg.BLIF N_158_i.BLIF state_machine_amiga_bus_enable_6_iv_i_n -11 1 -.names N_98_i.BLIF N_159_i.BLIF cpu_est_ns_0_2__n -11 1 -.names N_167_i.BLIF N_168_i.BLIF cpu_est_ns_e_0_0__n -11 1 -.names CLK_OSZI_c.BLIF IPL_030DFFSH_2_reg.C -1 1 -.names inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF N_63_i -11 1 -.names inst_BGACK_030_INTreg.BLIF CLK_000_D0_i.BLIF N_64_i -11 1 -.names RST_i.BLIF IPL_030DFFSH_2_reg.AP -1 1 -.names AS_030_c_i.BLIF N_232_i.BLIF N_65_i -11 1 -.names inst_CLK_000_D4.BLIF CLK_000_D4_i -0 1 -.names inst_CLK_000_D4.BLIF SM_AMIGA_5_.BLIF N_66_i -11 1 -.names RW_c.BLIF state_machine_lds_000_int_7_0_m3_un3_n -0 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_7_.C -1 1 -.names N_66.BLIF RW_c.BLIF state_machine_lds_000_int_7_0_m3_un1_n -11 1 -.names sm_amiga_i_4__n.BLIF state_machine_lds_000_int_7_0_m3_un3_n.BLIF state_machine_lds_000_int_7_0_m3_un0_n -11 1 -.names RST_i.BLIF SM_AMIGA_7_.AP -1 1 -.names state_machine_lds_000_int_7_0_m3_un1_n.BLIF state_machine_lds_000_int_7_0_m3_un0_n.BLIF N_67 -1- 1 --1 1 -.names A_16_.BLIF a_c_16__n -1 1 -.names sm_amiga_i_0__n.BLIF sm_amiga_i_1__n.BLIF N_72_i -11 1 -.names A_17_.BLIF a_c_17__n -1 1 -.names inst_CLK_000_D0.BLIF CLK_000_D0_i -0 1 -.names A_18_.BLIF a_c_18__n -1 1 -.names inst_AS_000_INT.BLIF N_63_i.BLIF N_198 -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C -1 1 -.names A_19_.BLIF a_c_19__n -1 1 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_224_0 -11 1 -.names A_20_.BLIF a_c_20__n -1 1 -.names BGACK_000_c.BLIF N_73.BLIF state_machine_un6_bgack_000_0_n -11 1 -.names RST_i.BLIF SM_AMIGA_6_.AR -1 1 -.names A_21_.BLIF a_c_21__n -1 1 -.names N_108_i.BLIF N_109_i.BLIF N_225_0 -11 1 -.names A_22_.BLIF a_c_22__n -1 1 -.names AS_030_c_i.BLIF N_126_i.BLIF N_226_0 -11 1 -.names A_23_.BLIF a_c_23__n -1 1 -.names AS_030_c_i.BLIF N_231_i.BLIF N_227_0 -11 1 -.names A_24_.BLIF a_c_24__n -1 1 -.names BG_030_c_i.BLIF N_233_i.BLIF state_machine_un10_bg_030_0_n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C -1 1 -.names A_25_.BLIF a_c_25__n -1 1 -.names AS_030_c_i.BLIF N_234_i.BLIF N_228_0 -11 1 -.names A_26_.BLIF a_c_26__n -1 1 -.names A0_DMA_0_sqmuxa_i_0_0.BLIF N_175_i.BLIF N_31_0 -11 1 -.names RST_i.BLIF SM_AMIGA_5_.AR -1 1 -.names A_27_.BLIF a_c_27__n -1 1 -.names AS_030_c_i.BLIF N_235_i.BLIF N_33_0 -11 1 -.names A_28_.BLIF a_c_28__n -1 1 -.names N_236_i.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF N_35_0 -11 1 -.names A_29_.BLIF a_c_29__n -1 1 -.names N_146_i.BLIF N_147_i.BLIF N_46_0 -11 1 -.names A_30_.BLIF a_c_30__n -1 1 -.names N_148_i.BLIF N_149_i.BLIF sm_amiga_ns_e_0_5__n -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C -1 1 -.names A_31_.BLIF a_c_31__n -1 1 -.names N_150_i.BLIF N_197_i.BLIF SM_AMIGA_3_.D -11 1 -.names N_63.BLIF N_151_i.BLIF SM_AMIGA_4_.D -11 1 -.names RST_i.BLIF SM_AMIGA_4_.AR -1 1 -.names nEXP_SPACE.BLIF nEXP_SPACE_c -1 1 -.names inst_AS_000_DMA.BLIF AS_000_DMA_i -0 1 -.names N_73.BLIF cpu_est_0_.BLIF N_167 -11 1 -.names BG_030.BLIF BG_030_c -1 1 -.names N_73_i.BLIF cpu_est_i_0__n.BLIF N_168 -11 1 -.names BG_000DFFSHreg.BLIF BG_000 -1 1 -.names LDS_000_c.BLIF UDS_000_c.BLIF N_171 -11 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C -1 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030 -1 1 -.names nEXP_SPACE_c.BLIF nEXP_SPACE_i -0 1 -.names BGACK_000.BLIF BGACK_000_c -1 1 -.names N_80_i.BLIF nEXP_SPACE_i.BLIF N_172 -11 1 -.names RST_i.BLIF SM_AMIGA_3_.AR -1 1 -.names CLK_030.BLIF CLK_030_c -1 1 -.names SM_AMIGA_6_.BLIF nEXP_SPACE_c.BLIF N_173 -11 1 -.names CLK_000.BLIF CLK_000_c -1 1 -.names inst_CLK_000_D5.BLIF CLK_000_D5_i -0 1 -.names CLK_OSZI.BLIF CLK_OSZI_c -1 1 -.names inst_CLK_000_D4.BLIF CLK_000_D5_i.BLIF N_174 -11 1 -.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT -1 1 -.names UDS_000_c.BLIF UDS_000_i -0 1 -.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C -1 1 -.names CLK_OUT_INTreg.BLIF CLK_EXP -1 1 -.names LDS_000_i.BLIF UDS_000_i.BLIF N_175 -11 1 -.names inst_FPU_CS_INTreg.BLIF FPU_CS -1 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_176 -11 1 -.names RST_i.BLIF SM_AMIGA_2_.AR -1 1 -.names IPL_030DFFSH_0_reg.BLIF IPL_030_0_ -1 1 -.names cpu_est_1_.BLIF cpu_est_i_1__n -0 1 -.names IPL_030DFFSH_1_reg.BLIF IPL_030_1_ -1 1 -.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_179 -11 1 -.names IPL_030DFFSH_2_reg.BLIF IPL_030_2_ -1 1 -.names N_64_i.BLIF state_machine_un59_bgack_030_int_n.BLIF N_197 -11 1 -.names IPL_0_.BLIF ipl_c_0__n -1 1 -.names N_88.BLIF sm_amiga_i_3__n.BLIF N_150 -11 1 -.names CLK_OSZI_c.BLIF inst_AS_000_INT.C -1 1 -.names IPL_1_.BLIF ipl_c_1__n -1 1 -.names N_86.BLIF sm_amiga_i_4__n.BLIF N_151 -11 1 -.names IPL_2_.BLIF ipl_c_2__n -1 1 -.names N_80.BLIF sm_amiga_i_5__n.BLIF N_152 -11 1 -.names RST_i.BLIF inst_AS_000_INT.AP -1 1 -.names N_81.BLIF cpu_est_2_.BLIF N_153 -11 1 -.names N_176.BLIF cpu_est_i_3__n.BLIF N_154 -11 1 -.names inst_BGACK_030_INTreg.BLIF RW_i.BLIF N_155 -11 1 -.names vcc_n_n.BLIF AVEC -1 1 -.names RW_c.BLIF RW_i -0 1 -.names CLK_OSZI_c.BLIF inst_VPA_SYNC.C -1 1 -.names inst_AS_000_DMA.BLIF RW_i.BLIF N_157 -11 1 -.names cpu_est_3_reg.BLIF E -1 1 -.names CLK_000_D4_i.BLIF N_173.BLIF N_158 -11 1 -.names RST_i.BLIF inst_VPA_SYNC.AP -1 1 -.names VPA.BLIF inst_VPA_D.D -1 1 -.names cpu_est_0_.BLIF cpu_est_3_reg.BLIF N_159 -11 1 -.names inst_VMA_INTreg.BLIF VMA -1 1 -.names BGACK_030_INT_i.BLIF SM_AMIGA_6_.BLIF N_160 -11 1 -.names RST.BLIF RST_c -1 1 -.names CLK_000_D0_i.BLIF N_173.BLIF N_161 -11 1 -.names RESETDFFRHreg.BLIF RESET -1 1 -.names N_83_i.BLIF SM_AMIGA_7_.BLIF N_162 -11 1 -.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C -1 1 -.names RW.BLIF RW_c -1 1 -.names N_83.BLIF SM_AMIGA_7_.BLIF N_163 -11 1 -.names FC_0_.BLIF fc_c_0__n -1 1 -.names N_198.BLIF SM_AMIGA_0_.BLIF N_165 -11 1 -.names RST_i.BLIF inst_VMA_INTreg.AP -1 1 -.names FC_1_.BLIF fc_c_1__n -1 1 -.names a_c_31__n.BLIF a_i_31__n -0 1 -.names AMIGA_BUS_ENABLEDFFSHreg.BLIF AMIGA_BUS_ENABLE -1 1 -.names AMIGA_BUS_DATA_DIR_c.BLIF AMIGA_BUS_DATA_DIR -1 1 -.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_7_.BLIF N_108 -11 1 -.names vcc_n_n.BLIF AMIGA_BUS_ENABLE_LOW -1 1 -.names inst_BGACK_030_INTreg.BLIF N_66_i.BLIF N_126 -11 1 -.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C -1 1 -.names CLK_030_c.BLIF N_74_i.BLIF N_235 -11 1 -.names inst_BGACK_030_INTreg.BLIF N_174.BLIF N_232_1 -11 1 -.names inst_BGACK_030_INT_D.BLIF N_173.BLIF N_241 -11 1 -.names RST_i.BLIF inst_BGACK_030_INTreg.AP -1 1 -.names N_232_1.BLIF SM_AMIGA_1_.BLIF N_232 -11 1 -.names A0_c.BLIF A0_i -0 1 -.names CLK_000_D0_i.BLIF N_179.BLIF N_109_1 -11 1 -.names size_c_1__n.BLIF size_i_1__n -0 1 -.names N_109_1.BLIF VPA_D_i.BLIF N_109 -11 1 -.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n -0 1 -.names N_166_1.BLIF nEXP_SPACE_i.BLIF N_166 -11 1 -.names N_76.BLIF sm_amiga_i_0__n.BLIF N_145 -11 1 -.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C -1 1 -.names N_64_i.BLIF SM_AMIGA_6_.BLIF N_164_1 -11 1 -.names N_76.BLIF SM_AMIGA_1_.BLIF N_146 -11 1 -.names N_164_1.BLIF nEXP_SPACE_i.BLIF N_164 -11 1 -.names N_63_i.BLIF SM_AMIGA_2_.BLIF N_147 -11 1 -.names RST_i.BLIF inst_CLK_OUT_PRE.AR -1 1 -.names BGACK_030_INT_i.BLIF RW_c.BLIF N_156_1 -11 1 -.names N_63.BLIF SM_AMIGA_2_.BLIF N_148 -11 1 -.names N_156_1.BLIF nEXP_SPACE_i.BLIF N_156 -11 1 -.names N_197.BLIF SM_AMIGA_3_.BLIF N_149 -11 1 -.names A0_i.BLIF size_c_0__n.BLIF N_144_1 -11 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n -0 1 -.names N_144_1.BLIF size_i_1__n.BLIF N_144 -11 1 -.names RST_c.BLIF RST_i -0 1 -.names CLK_OSZI_c.BLIF SIZE_DMA_0_.C -1 1 -.names N_72.BLIF AS_030_c.BLIF N_240_1 -11 1 -.names a_c_16__n.BLIF a_i_16__n -0 1 -.names N_240_1.BLIF inst_BGACK_030_INT_D.BLIF N_240 -11 1 -.names a_c_18__n.BLIF a_i_18__n -0 1 -.names RST_i.BLIF SIZE_DMA_0_.AP -1 1 -.names N_66_i.BLIF N_79_i.BLIF N_239_1 -11 1 -.names a_c_19__n.BLIF a_i_19__n -0 1 -.names N_239_1.BLIF RW_c.BLIF N_239 -11 1 -.names a_c_24__n.BLIF a_i_24__n -0 1 -.names N_79_i.BLIF RW_i.BLIF N_237_1 -11 1 -.names a_c_25__n.BLIF a_i_25__n -0 1 -.names N_237_1.BLIF SM_AMIGA_4_.BLIF N_237 -11 1 -.names a_c_26__n.BLIF a_i_26__n +.names N_202_0.BLIF N_202 0 1 .names CLK_OSZI_c.BLIF SIZE_DMA_1_.C 1 1 -.names N_175.BLIF AS_000_i.BLIF SIZE_DMA_0_sqmuxa_1 -11 1 -.names a_c_27__n.BLIF a_i_27__n +.names N_86_0.BLIF N_86 0 1 -.names SIZE_DMA_0_sqmuxa_1.BLIF N_77_i.BLIF SIZE_DMA_0_sqmuxa -11 1 -.names a_c_28__n.BLIF a_i_28__n +.names N_171.BLIF N_171_i 0 1 .names RST_i.BLIF SIZE_DMA_1_.AP 1 1 -.names N_162_i.BLIF N_160_i.BLIF sm_amiga_ns_e_0_1_1__n +.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_2 +0 1 +.names N_82_i.BLIF N_82 +0 1 +.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +0 1 +.names N_78_i.BLIF N_78 +0 1 +.names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C +1 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +0 1 +.names inst_CLK_000_D0.BLIF CLK_000_D0_i +0 1 +.names RST_i.BLIF IPL_030DFFSH_0_reg.AP +1 1 +.names inst_CLK_000_D4.BLIF SM_AMIGA_5_.BLIF N_64_i +11 1 +.names AS_030_c_i.BLIF N_205_i.BLIF N_65_i +11 1 +.names RW_c.BLIF state_machine_uds_000_int_7_0_m3_un3_n +0 1 +.names N_64.BLIF RW_c.BLIF state_machine_uds_000_int_7_0_m3_un1_n +11 1 +.names CLK_OSZI_c.BLIF IPL_030DFFSH_1_reg.C +1 1 +.names N_62.BLIF state_machine_uds_000_int_7_0_m3_un3_n.BLIF state_machine_uds_000_int_7_0_m3_un0_n +11 1 +.names state_machine_uds_000_int_7_0_m3_un1_n.BLIF state_machine_uds_000_int_7_0_m3_un0_n.BLIF N_66 +1- 1 +-1 1 +.names RST_i.BLIF IPL_030DFFSH_1_reg.AP +1 1 +.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n +0 1 +.names nEXP_SPACE_c.BLIF nEXP_SPACE_i +0 1 +.names SM_AMIGA_6_.BLIF nEXP_SPACE_c.BLIF N_74_i +11 1 +.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF N_76_i +11 1 +.names CLK_OSZI_c.BLIF IPL_030DFFSH_2_reg.C +1 1 +.names CLK_000_D0_i.BLIF N_170_i.BLIF N_77_0 +11 1 +.names sm_amiga_i_0__n.BLIF sm_amiga_i_1__n.BLIF N_78_i +11 1 +.names RST_i.BLIF IPL_030DFFSH_2_reg.AP +1 1 +.names cpu_est_3_reg.BLIF cpu_est_i_3__n +0 1 +.names cpu_est_3_reg.BLIF cpu_est_i_1__n.BLIF N_82_i +11 1 +.names N_65_i.BLIF N_171_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0 +11 1 +.names CLK_000_D0_i.BLIF N_74_i.BLIF N_86_0 +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_7_.C +1 1 +.names CLK_030_c.BLIF CLK_030_i +0 1 +.names AS_000_DMA_i.BLIF CLK_030_c.BLIF N_202_0 +11 1 +.names RST_i.BLIF SM_AMIGA_7_.AP +1 1 +.names inst_CLK_000_D0.BLIF N_124_i.BLIF SM_AMIGA_5_.D +11 1 +.names CLK_000_D0_i.BLIF N_125_i.BLIF SM_AMIGA_4_.D +11 1 +.names N_126_i.BLIF N_127_i.BLIF SM_AMIGA_3_.D +11 1 +.names N_128_i.BLIF N_129_i.BLIF sm_amiga_ns_0_5__n +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_6_.C +1 1 +.names N_130_i.BLIF N_131_i.BLIF N_41_0 +11 1 +.names N_135_i.BLIF N_168_i.BLIF N_151_i +11 1 +.names RST_i.BLIF SM_AMIGA_6_.AR +1 1 +.names N_136_i.BLIF N_137_i.BLIF AMIGA_BUS_DATA_DIR_c_0 +11 1 +.names N_138_i.BLIF state_machine_un8_bgack_030_int_i_0_0_n.BLIF N_48_i +11 1 +.names inst_BGACK_030_INTreg.BLIF N_139_i.BLIF state_machine_amiga_bus_enable_4_iv_i_n +11 1 +.names N_148_i.BLIF N_149_i.BLIF cpu_est_0_.D +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_5_.C +1 1 +.names N_152_i.BLIF N_153_i.BLIF N_61_0 +11 1 +.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n +0 1 +.names RST_i.BLIF SM_AMIGA_5_.AR +1 1 +.names inst_CLK_000_D0.BLIF SM_AMIGA_4_.BLIF N_62_i +11 1 +.names inst_CLK_000_D4.BLIF CLK_000_D4_i +0 1 +.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n +0 1 +.names LDS_000_c.BLIF LDS_000_i +0 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_4_.C +1 1 +.names UDS_000_c.BLIF UDS_000_i +0 1 +.names LDS_000_i.BLIF UDS_000_i.BLIF N_172 +11 1 +.names RST_i.BLIF SM_AMIGA_4_.AR +1 1 +.names AS_000_c.BLIF AS_000_i +0 1 +.names AS_000_i.BLIF BGACK_030_INT_i.BLIF N_173 +11 1 +.names BGACK_000_c.BLIF N_76.BLIF state_machine_un6_bgack_000_0_n +11 1 +.names N_203_i.BLIF state_machine_un13_clk_000_d0_i_n.BLIF state_machine_un15_clk_000_d0_0_n +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_3_.C +1 1 +.names AS_030_c_i.BLIF N_64.BLIF N_197_0 +11 1 +.names CLK_030_c.BLIF state_machine_un8_bgack_030_int_i_0_0_n.BLIF N_198_0 +11 1 +.names RST_i.BLIF SM_AMIGA_3_.AR +1 1 +.names BG_030_c_i.BLIF N_206_i.BLIF state_machine_un10_bg_030_0_n +11 1 +.names A_16_.BLIF a_c_16__n +1 1 +.names AS_030_c_i.BLIF N_117_i.BLIF N_200_0 +11 1 +.names A_17_.BLIF a_c_17__n +1 1 +.names N_118_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0.BLIF N_201_0 +11 1 +.names A_18_.BLIF a_c_18__n +1 1 +.names AS_000_DMA_i.BLIF state_machine_un8_bgack_030_int_i_0_0_n.BLIF state_machine_ds_000_dma_3_0_n +11 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_2_.C +1 1 +.names A_19_.BLIF a_c_19__n +1 1 +.names N_172_i.BLIF state_machine_un8_bgack_030_int_i_0_0_n.BLIF state_machine_size_dma_4_0_1__n +11 1 +.names A_20_.BLIF a_c_20__n +1 1 +.names N_122_i.BLIF N_123_i.BLIF SM_AMIGA_6_.D +11 1 +.names RST_i.BLIF SM_AMIGA_2_.AR +1 1 +.names A_21_.BLIF a_c_21__n +1 1 +.names N_76.BLIF cpu_est_i_0__n.BLIF N_148 +11 1 +.names A_22_.BLIF a_c_22__n +1 1 +.names N_76_i.BLIF cpu_est_0_.BLIF N_149 +11 1 +.names A_23_.BLIF a_c_23__n +1 1 +.names LDS_000_c.BLIF UDS_000_c.BLIF N_150 +11 1 +.names A_24_.BLIF a_c_24__n +1 1 +.names inst_VMA_INTreg.BLIF VMA_INT_i +0 1 +.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C +1 1 +.names A_25_.BLIF a_c_25__n +1 1 +.names inst_VPA_D.BLIF VPA_D_i +0 1 +.names A_26_.BLIF a_c_26__n +1 1 +.names inst_DTACK_D0.BLIF DTACK_D0_i +0 1 +.names RST_i.BLIF SM_AMIGA_1_.AR +1 1 +.names A_27_.BLIF a_c_27__n +1 1 +.names DTACK_D0_i.BLIF inst_VPA_D.BLIF N_153 +11 1 +.names A_28_.BLIF a_c_28__n +1 1 +.names inst_AS_000_INT.BLIF inst_CLK_000_D0.BLIF N_164 +11 1 +.names A_29_.BLIF a_c_29__n +1 1 +.names cpu_est_0_.BLIF cpu_est_i_0__n +0 1 +.names A_30_.BLIF a_c_30__n +1 1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_167 +11 1 +.names CLK_OSZI_c.BLIF inst_DSACK1_INT.C +1 1 +.names A_31_.BLIF a_c_31__n +1 1 +.names N_167.BLIF cpu_est_i_3__n.BLIF N_168 +11 1 +.names cpu_est_1_.BLIF cpu_est_i_1__n +0 1 +.names RST_i.BLIF inst_DSACK1_INT.AP +1 1 +.names nEXP_SPACE.BLIF nEXP_SPACE_c +1 1 +.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_169 +11 1 +.names inst_CLK_000_D3.BLIF CLK_000_D4_i.BLIF N_170 +11 1 +.names BG_030.BLIF BG_030_c +1 1 +.names SM_AMIGA_6_.BLIF nEXP_SPACE_i.BLIF N_171 +11 1 +.names BG_000DFFSHreg.BLIF BG_000 +1 1 +.names cpu_est_2_.BLIF cpu_est_i_2__n +0 1 +.names CLK_OSZI_c.BLIF inst_VMA_INTreg.C +1 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030 +1 1 +.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_134 +11 1 +.names BGACK_000.BLIF BGACK_000_c +1 1 +.names N_82.BLIF cpu_est_2_.BLIF N_135 +11 1 +.names RST_i.BLIF inst_VMA_INTreg.AP +1 1 +.names CLK_030.BLIF CLK_030_c +1 1 +.names RW_c.BLIF RW_i +0 1 +.names CLK_000.BLIF CLK_000_c +1 1 +.names inst_BGACK_030_INTreg.BLIF RW_i.BLIF N_136 +11 1 +.names CLK_OSZI.BLIF CLK_OSZI_c +1 1 +.names inst_CLK_030_H.BLIF CLK_030_H_i +0 1 +.names CLK_OUT_INTreg.BLIF CLK_DIV_OUT +1 1 +.names CLK_030_H_i.BLIF N_202.BLIF N_138 +11 1 +.names CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.C +1 1 +.names CLK_OUT_INTreg.BLIF CLK_EXP +1 1 +.names AS_030_c.BLIF N_78.BLIF N_140 +11 1 +.names inst_FPU_CS_INTreg.BLIF FPU_CS +1 1 +.names inst_CLK_030_H.BLIF CLK_030_i.BLIF N_141 +11 1 +.names RST_i.BLIF inst_BGACK_030_INTreg.AP +1 1 +.names IPL_030DFFSH_0_reg.BLIF IPL_030_0_ +1 1 +.names cpu_est_1_.BLIF cpu_est_2_.BLIF N_142 +11 1 +.names IPL_030DFFSH_1_reg.BLIF IPL_030_1_ +1 1 +.names cpu_est_0_.BLIF cpu_est_3_reg.BLIF N_143 +11 1 +.names IPL_030DFFSH_2_reg.BLIF IPL_030_2_ +1 1 +.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_144 +11 1 +.names IPL_0_.BLIF ipl_c_0__n +1 1 +.names CLK_000_D0_i.BLIF N_171.BLIF N_145 +11 1 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_25.C +1 1 +.names IPL_1_.BLIF ipl_c_1__n +1 1 +.names N_164.BLIF SM_AMIGA_0_.BLIF N_146 +11 1 +.names IPL_2_.BLIF ipl_c_2__n +1 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_i +0 1 +.names RST_i.BLIF inst_CLK_OUT_PRE_25.AR +1 1 +.names size_c_1__n.BLIF size_i_1__n +0 1 +.names N_172.BLIF N_173.BLIF N_121 +11 1 +.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n +0 1 +.names vcc_n_n.BLIF AVEC +1 1 +.names N_86.BLIF sm_amiga_i_7__n.BLIF N_122 +11 1 +.names CLK_OSZI_c.BLIF SIZE_DMA_0_.C +1 1 +.names N_72.BLIF SM_AMIGA_7_.BLIF N_123 +11 1 +.names cpu_est_3_reg.BLIF E +1 1 +.names sm_amiga_i_5__n.BLIF sm_amiga_i_6__n.BLIF N_124 +11 1 +.names RST_i.BLIF SIZE_DMA_0_.AP +1 1 +.names VPA.BLIF inst_VPA_D.D +1 1 +.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_125 +11 1 +.names inst_VMA_INTreg.BLIF VMA +1 1 +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names RST.BLIF RST_c +1 1 +.names N_62.BLIF sm_amiga_i_3__n.BLIF N_126 +11 1 +.names RESETDFFRHreg.BLIF RESET +1 1 +.names CLK_000_D0_i.BLIF SM_AMIGA_2_.BLIF N_129 +11 1 +.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C +1 1 +.names RW.BLIF RW_c +1 1 +.names N_77.BLIF SM_AMIGA_1_.BLIF N_130 +11 1 +.names FC_0_.BLIF fc_c_0__n +1 1 +.names inst_CLK_000_D0.BLIF SM_AMIGA_2_.BLIF N_131 +11 1 +.names RST_i.BLIF inst_UDS_000_INT.AP +1 1 +.names FC_1_.BLIF fc_c_1__n +1 1 +.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n +0 1 +.names AMIGA_BUS_ENABLEDFFSHreg.BLIF AMIGA_BUS_ENABLE +1 1 +.names N_77.BLIF sm_amiga_i_0__n.BLIF N_132 +11 1 +.names AMIGA_BUS_DATA_DIR_c.BLIF AMIGA_BUS_DATA_DIR +1 1 +.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF N_133 +11 1 +.names vcc_n_n.BLIF AMIGA_BUS_ENABLE_LOW +1 1 +.names a_c_25__n.BLIF a_i_25__n +0 1 +.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C +1 1 +.names a_c_26__n.BLIF a_i_26__n +0 1 +.names UDS_000_c.BLIF LDS_000_i.BLIF state_machine_a0_dma_2_1_n +11 1 +.names a_c_27__n.BLIF a_i_27__n +0 1 +.names RST_i.BLIF inst_LDS_000_INT.AP +1 1 +.names state_machine_a0_dma_2_1_n.BLIF N_173.BLIF inst_A0_DMA.D +11 1 +.names a_c_28__n.BLIF a_i_28__n +0 1 +.names DS_030_i.BLIF N_62_i.BLIF N_116_1 11 1 .names a_c_29__n.BLIF a_i_29__n 0 1 -.names sm_amiga_ns_e_0_1_1__n.BLIF N_161_i.BLIF sm_amiga_ns_e_0_1__n +.names N_116_1.BLIF RW_i.BLIF N_116 11 1 .names a_c_30__n.BLIF a_i_30__n 0 1 -.names cpu_est_ns_0_0_x2_1_.BLIF N_176_i.BLIF cpu_est_ns_0_1_1__n +.names DS_030_i.BLIF N_64_i.BLIF N_115_1 11 1 -.names CLK_CNT_P_0_.BLIF CLK_CNT_P_0_.D +.names a_c_31__n.BLIF a_i_31__n 0 1 -.names cpu_est_ns_0_1_1__n.BLIF N_179_i.BLIF cpu_est_ns_0_1__n -11 1 -.names N_73.BLIF cpu_estse_0_un3_n -0 1 -.names CLK_OSZI_c.BLIF inst_DS_000_DMA.C -1 1 -.names N_72.BLIF N_145_i.BLIF N_44_i_1 -11 1 -.names cpu_est_1_.BLIF N_73.BLIF cpu_estse_0_un1_n -11 1 -.names N_44_i_1.BLIF N_198_i.BLIF SM_AMIGA_0_.D -11 1 -.names cpu_est_ns_1__n.BLIF cpu_estse_0_un3_n.BLIF cpu_estse_0_un0_n -11 1 -.names RST_i.BLIF inst_DS_000_DMA.AP -1 1 -.names N_79_i.BLIF A0_i.BLIF state_machine_uds_000_int_7_0_1_n -11 1 -.names cpu_estse_0_un1_n.BLIF cpu_estse_0_un0_n.BLIF cpu_est_1_.D -1- 1 --1 1 -.names state_machine_uds_000_int_7_0_1_n.BLIF N_67_i.BLIF state_machine_uds_000_int_7_0_n -11 1 -.names N_73.BLIF cpu_estse_1_un3_n -0 1 -.names N_144_i.BLIF N_67_i.BLIF state_machine_lds_000_int_7_0_1_n -11 1 -.names cpu_est_2_.BLIF N_73.BLIF cpu_estse_1_un1_n -11 1 -.names state_machine_lds_000_int_7_0_1_n.BLIF N_79_i.BLIF state_machine_lds_000_int_7_0_n -11 1 -.names cpu_est_ns_2__n.BLIF cpu_estse_1_un3_n.BLIF cpu_estse_1_un0_n -11 1 .names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C 1 1 -.names N_96_i_i.BLIF N_240_i.BLIF N_39_0_1 +.names N_115_1.BLIF RW_c.BLIF N_115 11 1 -.names cpu_estse_1_un1_n.BLIF cpu_estse_1_un0_n.BLIF cpu_est_2_.D -1- 1 --1 1 -.names N_39_0_1.BLIF N_241_i.BLIF N_39_0 +.names a_c_16__n.BLIF a_i_16__n +0 1 +.names cpu_est_2_.BLIF N_164.BLIF state_machine_un13_clk_000_d0_1_n 11 1 -.names N_73.BLIF cpu_estse_2_un3_n +.names a_c_18__n.BLIF a_i_18__n 0 1 .names RST_i.BLIF inst_FPU_CS_INTreg.AP 1 1 -.names AS_030_c_i.BLIF N_237_i.BLIF N_37_0_1 +.names state_machine_un13_clk_000_d0_1_n.BLIF N_168.BLIF state_machine_un13_clk_000_d0_n 11 1 -.names cpu_est_3_reg.BLIF N_73.BLIF cpu_estse_2_un1_n +.names a_c_19__n.BLIF a_i_19__n +0 1 +.names CLK_000_D0_i.BLIF N_169.BLIF N_203_1 11 1 -.names N_37_0_1.BLIF N_239_i.BLIF N_37_0 +.names N_203_1.BLIF VPA_D_i.BLIF N_203 11 1 -.names N_177_i.BLIF cpu_estse_2_un3_n.BLIF cpu_estse_2_un0_n +.names N_170.BLIF SM_AMIGA_1_.BLIF N_205 11 1 -.names AS_000_DMA_i.BLIF BGACK_030_INT_i.BLIF N_166_1 +.names state_machine_uds_000_int_7_0_1_n.BLIF DS_030_i.BLIF state_machine_uds_000_int_7_0_n 11 1 -.names cpu_estse_2_un1_n.BLIF cpu_estse_2_un0_n.BLIF cpu_est_3_reg.D -1- 1 --1 1 -.names N_77_i.BLIF UDS_000_c.BLIF state_machine_a0_dma_4_2_n +.names DS_030_c.BLIF DS_030_i +0 1 +.names CLK_OSZI_c.BLIF BG_000DFFSHreg.C +1 1 +.names N_116_i.BLIF AS_030_c_i.BLIF N_199_0_1 +11 1 +.names CLK_030_c.BLIF N_69_i.BLIF N_117 +11 1 +.names N_199_0_1.BLIF N_115_i.BLIF N_199_0 +11 1 +.names A0_c.BLIF A0_i +0 1 +.names RST_i.BLIF BG_000DFFSHreg.AP +1 1 +.names N_82_i.BLIF VMA_INT_i.BLIF N_152_1 +11 1 +.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D +0 1 +.names N_152_1.BLIF VPA_D_i.BLIF N_152 +11 1 +.names RST_c.BLIF RST_i +0 1 +.names AS_000_DMA_i.BLIF BGACK_030_INT_i.BLIF N_147_1 +11 1 +.names a_c_24__n.BLIF a_i_24__n +0 1 +.names N_147_1.BLIF nEXP_SPACE_i.BLIF N_147 +11 1 +.names N_121.BLIF SIZE_DMA_0_.D +0 1 +.names CLK_OSZI_c.BLIF inst_DS_000_DMA.C +1 1 +.names N_74_i.BLIF inst_BGACK_030_INT_D.BLIF N_139_1 +11 1 +.names N_205.BLIF N_205_i +0 1 +.names N_139_1.BLIF CLK_000_D4_i.BLIF N_139 11 1 .names N_65.BLIF dsack1_int_0_un3_n 0 1 -.names CLK_OSZI_c.BLIF inst_DTACK_SYNC.C +.names RST_i.BLIF inst_DS_000_DMA.AP 1 1 -.names state_machine_a0_dma_4_1_n.BLIF state_machine_a0_dma_4_2_n.BLIF state_machine_a0_dma_4_n +.names N_173.BLIF RW_c.BLIF N_137_1 11 1 -.names N_232_i.BLIF N_65.BLIF dsack1_int_0_un1_n +.names N_205_i.BLIF N_65.BLIF dsack1_int_0_un1_n 11 1 -.names N_236_1.BLIF CLK_030_c.BLIF N_236_1_0 +.names N_137_1.BLIF nEXP_SPACE_i.BLIF N_137 11 1 .names inst_DSACK1_INT.BLIF dsack1_int_0_un3_n.BLIF dsack1_int_0_un0_n 11 1 -.names RST_i.BLIF inst_DTACK_SYNC.AP -1 1 -.names N_236_1_0.BLIF N_74.BLIF N_236 +.names N_61.BLIF CLK_000_D0_i.BLIF N_127_1 11 1 .names dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF inst_DSACK1_INT.D 1- 1 -1 1 -.names DTACK_i.BLIF N_63_i.BLIF N_234_1 +.names N_127_1.BLIF inst_CLK_000_D1.BLIF N_127 11 1 -.names N_224.BLIF as_000_dma_0_un3_n +.names state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un3_n 0 1 -.names SM_AMIGA_3_.BLIF inst_VPA_D.BLIF N_234_2 -11 1 -.names A0_DMA_0_sqmuxa_i_0.BLIF N_224.BLIF as_000_dma_0_un1_n -11 1 -.names N_234_1.BLIF N_234_2.BLIF N_234 -11 1 -.names inst_AS_000_DMA.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n -11 1 -.names CLK_OSZI_c.BLIF inst_A0_DMA.C +.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C 1 1 -.names AS_030_c.BLIF CLK_000_c.BLIF N_233_1 +.names A0_i.BLIF size_c_0__n.BLIF N_120_1 11 1 -.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF inst_AS_000_DMA.D -1- 1 --1 1 -.names N_233_1.BLIF N_236_1.BLIF N_233 +.names state_machine_un13_clk_000_d0_n.BLIF state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un1_n 11 1 -.names N_126.BLIF N_126_i -0 1 -.names RST_i.BLIF inst_A0_DMA.AP -1 1 -.names N_63_i.BLIF N_81_i.BLIF N_231_1 -11 1 -.names N_226.BLIF as_000_int_0_un3_n -0 1 -.names SM_AMIGA_3_.BLIF VMA_INT_i.BLIF N_231_2 -11 1 -.names N_126_i.BLIF N_226.BLIF as_000_int_0_un1_n -11 1 -.names N_231_1.BLIF N_231_2.BLIF N_231_3 -11 1 -.names inst_AS_000_INT.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n -11 1 -.names N_231_3.BLIF VPA_D_i.BLIF N_231 -11 1 -.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INT.D -1- 1 --1 1 -.names CLK_OSZI_c.BLIF BG_000DFFSHreg.C -1 1 -.names N_165_i.BLIF N_163_i.BLIF sm_amiga_ns_e_0_1_0__n -11 1 -.names N_231.BLIF N_231_i -0 1 -.names sm_amiga_ns_e_0_1_0__n.BLIF N_164_i.BLIF sm_amiga_ns_e_0_0__n -11 1 -.names N_227.BLIF vpa_sync_0_un3_n -0 1 -.names RST_i.BLIF BG_000DFFSHreg.AP -1 1 -.names N_263_1.BLIF N_263_2.BLIF N_263_5 -11 1 -.names N_231_i.BLIF N_227.BLIF vpa_sync_0_un1_n -11 1 -.names N_263_3.BLIF N_263_4.BLIF N_263_6 -11 1 -.names inst_VPA_SYNC.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n -11 1 -.names N_263_5.BLIF N_263_6.BLIF N_263 -11 1 -.names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D -1- 1 --1 1 -.names a_c_17__n.BLIF BGACK_000_c.BLIF N_74_i_1 -11 1 -.names N_225.BLIF vma_int_0_un3_n -0 1 -.names CLK_OSZI_c.BLIF inst_DSACK1_INT.C -1 1 -.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_74_i_2 -11 1 -.names N_108.BLIF N_225.BLIF vma_int_0_un1_n -11 1 -.names a_i_19__n.BLIF a_i_16__n.BLIF N_74_i_3 +.names N_120_1.BLIF size_i_1__n.BLIF N_120 11 1 .names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n 11 1 -.names RST_i.BLIF inst_DSACK1_INT.AP +.names RST_i.BLIF inst_AS_000_DMA.AP 1 1 -.names N_74_i_1.BLIF N_74_i_2.BLIF N_74_i_4 +.names N_118_3.BLIF nEXP_SPACE_c.BLIF N_118 11 1 .names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF inst_VMA_INTreg.D 1- 1 -1 1 -.names N_74_i_3.BLIF a_i_18__n.BLIF N_74_i_5 +.names AS_030_c.BLIF CLK_000_c.BLIF N_206_1 11 1 .names state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n 0 1 -.names N_74_i_4.BLIF N_74_i_5.BLIF N_74_i +.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF N_206_2 11 1 .names BGACK_000_c.BLIF state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un1_n 11 1 -.names AS_030_000_SYNC_i.BLIF inst_BGACK_030_INTreg.BLIF N_83_i_1 +.names N_206_1.BLIF N_206_2.BLIF N_206 11 1 .names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un0_n 11 1 -.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C +.names CLK_OSZI_c.BLIF inst_AS_000_INT.C 1 1 -.names CLK_000_D2_i.BLIF inst_CLK_000_D3.BLIF N_83_i_2 +.names N_146_i.BLIF N_123_i.BLIF sm_amiga_ns_0_1_0__n 11 1 .names bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF inst_BGACK_030_INTreg.D 1- 1 -1 1 -.names N_83_i_1.BLIF N_83_i_2.BLIF N_83_i +.names sm_amiga_ns_0_1_0__n.BLIF N_145_i.BLIF sm_amiga_ns_0_0__n 11 1 -.names SIZE_DMA_0_sqmuxa.BLIF SIZE_DMA_0_sqmuxa_i +.names N_76.BLIF ipl_030_0_0__un3_n 0 1 -.names RST_i.BLIF inst_AS_000_DMA.AP +.names RST_i.BLIF inst_AS_000_INT.AP 1 1 -.names AS_000_i.BLIF N_77_i.BLIF A0_DMA_0_sqmuxa_i_0_0_1 +.names N_144_i.BLIF N_142_i.BLIF cpu_est_ns_0_1_2__n 11 1 -.names N_224.BLIF size_dma_0_0__un3_n -0 1 -.names A0_DMA_0_sqmuxa_i_0_0_1.BLIF N_171_i.BLIF A0_DMA_0_sqmuxa_i_0_0 +.names IPL_030DFFSH_0_reg.BLIF N_76.BLIF ipl_030_0_0__un1_n 11 1 -.names SIZE_DMA_0_sqmuxa_i.BLIF N_224.BLIF size_dma_0_0__un1_n +.names cpu_est_ns_0_1_2__n.BLIF N_143_i.BLIF cpu_est_ns_0_2__n 11 1 -.names AS_000_i.BLIF LDS_000_i.BLIF state_machine_a0_dma_4_1_n -11 1 -.names SIZE_DMA_0_.BLIF size_dma_0_0__un3_n.BLIF size_dma_0_0__un0_n -11 1 -.names N_226_0.BLIF N_226 -0 1 -.names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D -1- 1 --1 1 -.names CLK_OSZI_c.BLIF AMIGA_BUS_ENABLEDFFSHreg.C -1 1 -.names N_108.BLIF N_108_i -0 1 -.names N_224.BLIF size_dma_0_1__un3_n -0 1 -.names N_109.BLIF N_109_i -0 1 -.names N_31.BLIF N_224.BLIF size_dma_0_1__un1_n -11 1 -.names RST_i.BLIF AMIGA_BUS_ENABLEDFFSHreg.AP -1 1 -.names N_225_0.BLIF N_225 -0 1 -.names SIZE_DMA_1_.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un0_n -11 1 -.names state_machine_un6_bgack_000_0_n.BLIF state_machine_un6_bgack_000_n -0 1 -.names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D -1- 1 --1 1 -.names N_224_0.BLIF N_224 -0 1 -.names N_73.BLIF ipl_030_0_0__un3_n -0 1 -.names inst_CLK_000_D2.BLIF CLK_000_D2_i -0 1 -.names IPL_030DFFSH_0_reg.BLIF N_73.BLIF ipl_030_0_0__un1_n -11 1 -.names CLK_OSZI_c.BLIF inst_UDS_000_INT.C -1 1 -.names state_machine_un59_bgack_030_int_0_n.BLIF state_machine_un59_bgack_030_int_n -0 1 .names ipl_c_0__n.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n 11 1 -.names a_c_20__n.BLIF a_c_21__n.BLIF N_253_1 +.names N_141_i.BLIF RW_i.BLIF N_53_0_1 11 1 .names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF IPL_030DFFSH_0_reg.D 1- 1 -1 1 -.names RST_i.BLIF inst_UDS_000_INT.AP -1 1 -.names a_c_22__n.BLIF a_c_23__n.BLIF N_253_2 +.names N_53_0_1.BLIF state_machine_un8_bgack_030_int_i_0_0_n.BLIF N_53_0 11 1 -.names N_73.BLIF ipl_030_0_1__un3_n +.names N_76.BLIF ipl_030_0_1__un3_n 0 1 -.names N_253_1.BLIF N_253_2.BLIF N_253 +.names CLK_OSZI_c.BLIF AMIGA_BUS_ENABLEDFFSHreg.C +1 1 +.names N_78.BLIF N_132_i.BLIF N_43_i_1 11 1 -.names IPL_030DFFSH_1_reg.BLIF N_73.BLIF ipl_030_0_1__un1_n +.names IPL_030DFFSH_1_reg.BLIF N_76.BLIF ipl_030_0_1__un1_n 11 1 -.names a_i_24__n.BLIF a_i_25__n.BLIF N_263_1 +.names N_43_i_1.BLIF N_164_i.BLIF SM_AMIGA_0_.D 11 1 .names ipl_c_1__n.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n 11 1 -.names a_i_26__n.BLIF a_i_27__n.BLIF N_263_2 +.names RST_i.BLIF AMIGA_BUS_ENABLEDFFSHreg.AP +1 1 +.names N_120_i.BLIF DS_030_i.BLIF state_machine_lds_000_int_7_0_1_n 11 1 .names ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF IPL_030DFFSH_1_reg.D 1- 1 -1 1 -.names CLK_OSZI_c.BLIF inst_LDS_000_INT.C -1 1 -.names a_i_28__n.BLIF a_i_29__n.BLIF N_263_3 +.names state_machine_lds_000_int_7_0_1_n.BLIF N_66_i.BLIF state_machine_lds_000_int_7_0_n 11 1 -.names N_73.BLIF ipl_030_0_2__un3_n +.names N_76.BLIF ipl_030_0_2__un3_n 0 1 -.names a_i_30__n.BLIF a_i_31__n.BLIF N_263_4 +.names N_66_i.BLIF A0_i.BLIF state_machine_uds_000_int_7_0_1_n 11 1 -.names IPL_030DFFSH_2_reg.BLIF N_73.BLIF ipl_030_0_2__un1_n +.names IPL_030DFFSH_2_reg.BLIF N_76.BLIF ipl_030_0_2__un1_n +11 1 +.names state_machine_un8_bgack_030_int_i_0_0_1_n.BLIF BGACK_030_INT_i.BLIF state_machine_un8_bgack_030_int_i_0_0_n 11 1 -.names RST_i.BLIF inst_LDS_000_INT.AP -1 1 -.names N_39_0.BLIF N_39 -0 1 .names ipl_c_2__n.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n 11 1 -.names N_237.BLIF N_237_i -0 1 +.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C +1 1 +.names inst_CLK_000_D3.BLIF AS_030_000_SYNC_i.BLIF N_72_0_1 +11 1 .names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF IPL_030DFFSH_2_reg.D 1- 1 -1 1 -.names N_239.BLIF N_239_i -0 1 -.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF state_machine_un59_bgack_030_int_0_n +.names N_72_0_1.BLIF CLK_000_D2_i.BLIF N_72_0 11 1 -.names N_37_0.BLIF N_37 +.names N_76.BLIF cpu_estse_0_un3_n 0 1 -.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i -0 1 -.names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C -1 1 -.names N_236.BLIF N_236_i -0 1 -.names N_39.BLIF amiga_bus_enable_0_un3_n -0 1 -.names N_35_0.BLIF N_35 -0 1 -.names state_machine_amiga_bus_enable_6_iv_i_n.BLIF N_39.BLIF amiga_bus_enable_0_un1_n -11 1 .names RST_i.BLIF inst_AS_030_000_SYNC.AP 1 1 -.names N_235.BLIF N_235_i +.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_51_0_1 +11 1 +.names cpu_est_1_.BLIF N_76.BLIF cpu_estse_0_un1_n +11 1 +.names N_74.BLIF N_140_i.BLIF N_51_0_2 +11 1 +.names cpu_est_ns_1__n.BLIF cpu_estse_0_un3_n.BLIF cpu_estse_0_un0_n +11 1 +.names N_51_0_1.BLIF N_51_0_2.BLIF N_51_0 +11 1 +.names cpu_estse_0_un1_n.BLIF cpu_estse_0_un0_n.BLIF cpu_est_1_.D +1- 1 +-1 1 +.names N_133_i.BLIF N_134_i.BLIF cpu_est_ns_0_1_1__n +11 1 +.names N_76.BLIF cpu_estse_1_un3_n 0 1 +.names CLK_OSZI_c.BLIF inst_CLK_030_H.C +1 1 +.names N_167_i.BLIF N_169_i.BLIF cpu_est_ns_0_2_1__n +11 1 +.names cpu_est_2_.BLIF N_76.BLIF cpu_estse_1_un1_n +11 1 +.names cpu_est_ns_0_1_1__n.BLIF cpu_est_ns_0_2_1__n.BLIF cpu_est_ns_0_1__n +11 1 +.names cpu_est_ns_2__n.BLIF cpu_estse_1_un3_n.BLIF cpu_estse_1_un0_n +11 1 +.names CLK_000_D0_i.BLIF inst_CLK_000_D1.BLIF N_128_1 +11 1 +.names cpu_estse_1_un1_n.BLIF cpu_estse_1_un0_n.BLIF cpu_est_2_.D +1- 1 +-1 1 +.names N_61.BLIF SM_AMIGA_3_.BLIF N_128_2 +11 1 +.names N_76.BLIF cpu_estse_2_un3_n +0 1 +.names CLK_OSZI_c.BLIF inst_A0_DMA.C +1 1 +.names N_128_1.BLIF N_128_2.BLIF N_128 +11 1 +.names cpu_est_3_reg.BLIF N_76.BLIF cpu_estse_2_un1_n +11 1 +.names inst_BGACK_030_INTreg.BLIF CLK_030_c.BLIF N_118_1 +11 1 +.names N_151_i.BLIF cpu_estse_2_un3_n.BLIF cpu_estse_2_un0_n +11 1 +.names RST_i.BLIF inst_A0_DMA.AP +1 1 +.names N_69.BLIF SM_AMIGA_7_.BLIF N_118_2 +11 1 +.names cpu_estse_2_un1_n.BLIF cpu_estse_2_un0_n.BLIF cpu_est_3_reg.D +1- 1 +-1 1 +.names N_118_1.BLIF N_118_2.BLIF N_118_3 +11 1 +.names inst_CLK_OUT_PRE_50_D.BLIF CLK_OUT_PRE_50_D_i +0 1 +.names a_i_28__n.BLIF a_i_29__n.BLIF N_225_3 +11 1 +.names inst_CLK_OUT_PRE_50.BLIF CLK_OUT_PRE_50_D_i.BLIF clk_un3_clk_out_pre_50_n +11 1 +.names inst_CLK_000_D3.BLIF inst_CLK_000_D4.D +1 1 +.names a_i_30__n.BLIF a_i_31__n.BLIF N_225_4 +11 1 +.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i +0 1 +.names N_225_1.BLIF N_225_2.BLIF N_225_5 +11 1 +.names N_51.BLIF amiga_bus_enable_0_un3_n +0 1 +.names CLK_OSZI_c.BLIF inst_CLK_000_D4.C +1 1 +.names N_225_3.BLIF N_225_4.BLIF N_225_6 +11 1 +.names state_machine_amiga_bus_enable_4_iv_i_n.BLIF N_51.BLIF amiga_bus_enable_0_un1_n +11 1 +.names N_225_5.BLIF N_225_6.BLIF N_225 +11 1 .names AMIGA_BUS_ENABLEDFFSHreg.BLIF amiga_bus_enable_0_un3_n.BLIF amiga_bus_enable_0_un0_n 11 1 -.names N_33_0.BLIF N_33 -0 1 +.names RST_i.BLIF inst_CLK_000_D4.AP +1 1 +.names a_c_20__n.BLIF a_c_21__n.BLIF N_228_1 +11 1 .names amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF AMIGA_BUS_ENABLEDFFSHreg.D 1- 1 -1 1 -.names N_175.BLIF N_175_i -0 1 -.names N_37.BLIF uds_000_int_0_un3_n -0 1 -.names inst_CLK_000_D3.BLIF inst_CLK_000_D4.D -1 1 -.names N_31_0.BLIF N_31 -0 1 -.names state_machine_uds_000_int_7_n.BLIF N_37.BLIF uds_000_int_0_un1_n +.names a_c_22__n.BLIF a_c_23__n.BLIF N_228_2 11 1 -.names N_228_0.BLIF N_228 +.names N_201.BLIF as_030_000_sync_0_un3_n +0 1 +.names N_228_1.BLIF N_228_2.BLIF N_228 +11 1 +.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_2.BLIF N_201.BLIF as_030_000_sync_0_un1_n +11 1 +.names a_c_17__n.BLIF BGACK_000_c.BLIF N_69_i_1 +11 1 +.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF inst_DTACK_D0.C +1 1 +.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_69_i_2 +11 1 +.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF inst_AS_030_000_SYNC.D +1- 1 +-1 1 +.names a_i_19__n.BLIF a_i_16__n.BLIF N_69_i_3 +11 1 +.names RST_c.BLIF clk_030_h_0_un3_n +0 1 +.names RST_i.BLIF inst_DTACK_D0.AP +1 1 +.names N_69_i_1.BLIF N_69_i_2.BLIF N_69_i_4 +11 1 +.names N_48_i.BLIF RST_c.BLIF clk_030_h_0_un1_n +11 1 +.names N_69_i_3.BLIF a_i_18__n.BLIF N_69_i_5 +11 1 +.names inst_CLK_030_H.BLIF clk_030_h_0_un3_n.BLIF clk_030_h_0_un0_n +11 1 +.names N_69_i_4.BLIF N_69_i_5.BLIF N_69_i +11 1 +.names clk_030_h_0_un1_n.BLIF clk_030_h_0_un0_n.BLIF inst_CLK_030_H.D +1- 1 +-1 1 +.names inst_CLK_000_D2.BLIF inst_CLK_000_D3.D +1 1 +.names N_150_i.BLIF AS_000_i.BLIF state_machine_un8_bgack_030_int_i_0_0_1_n +11 1 +.names N_199.BLIF uds_000_int_0_un3_n +0 1 +.names N_200_0.BLIF N_200 +0 1 +.names state_machine_uds_000_int_7_n.BLIF N_199.BLIF uds_000_int_0_un1_n +11 1 +.names CLK_OSZI_c.BLIF inst_CLK_000_D3.C +1 1 +.names N_115.BLIF N_115_i 0 1 .names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n 11 1 -.names CLK_OSZI_c.BLIF inst_CLK_000_D4.C -1 1 -.names BG_030_c.BLIF BG_030_c_i +.names N_116.BLIF N_116_i 0 1 .names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF inst_UDS_000_INT.D 1- 1 -1 1 -.names N_233.BLIF N_233_i -0 1 -.names N_37.BLIF lds_000_int_0_un3_n -0 1 -.names RST_i.BLIF inst_CLK_000_D4.AP +.names RST_i.BLIF inst_CLK_000_D3.AP 1 1 -.names state_machine_un10_bg_030_0_n.BLIF state_machine_un10_bg_030_n +.names N_199_0.BLIF N_199 0 1 -.names state_machine_lds_000_int_7_n.BLIF N_37.BLIF lds_000_int_0_un1_n +.names N_199.BLIF lds_000_int_0_un3_n +0 1 +.names BG_030_c.BLIF BG_030_c_i +0 1 +.names state_machine_lds_000_int_7_n.BLIF N_199.BLIF lds_000_int_0_un1_n 11 1 -.names N_227_0.BLIF N_227 +.names N_206.BLIF N_206_i 0 1 .names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n 11 1 -.names N_148.BLIF N_148_i +.names inst_CLK_000_D1.BLIF inst_CLK_000_D2.D +1 1 +.names state_machine_un10_bg_030_0_n.BLIF state_machine_un10_bg_030_n 0 1 .names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INT.D 1- 1 -1 1 -.names inst_CLK_000_D4.BLIF inst_CLK_000_D5.D +.names N_198_0.BLIF N_198 +0 1 +.names N_200.BLIF fpu_cs_int_0_un3_n +0 1 +.names CLK_OSZI_c.BLIF inst_CLK_000_D2.C 1 1 -.names N_149.BLIF N_149_i +.names N_197_0.BLIF N_197 0 1 -.names N_35.BLIF as_030_000_sync_0_un3_n -0 1 -.names sm_amiga_ns_e_0_5__n.BLIF SM_AMIGA_2_.D -0 1 -.names un1_AS_030_000_SYNC_1_sqmuxa_1.BLIF N_35.BLIF as_030_000_sync_0_un1_n +.names AS_030_c.BLIF N_200.BLIF fpu_cs_int_0_un1_n 11 1 -.names CLK_OSZI_c.BLIF inst_CLK_000_D5.C -1 1 -.names N_146.BLIF N_146_i -0 1 -.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un0_n -11 1 -.names N_147.BLIF N_147_i -0 1 -.names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF inst_AS_030_000_SYNC.D -1- 1 --1 1 -.names RST_i.BLIF inst_CLK_000_D5.AP -1 1 -.names N_46_0.BLIF SM_AMIGA_1_.D -0 1 -.names N_224.BLIF ds_000_dma_0_un3_n -0 1 -.names N_145.BLIF N_145_i -0 1 -.names state_machine_ds_000_dma_5_n.BLIF N_224.BLIF ds_000_dma_0_un1_n -11 1 -.names N_198.BLIF N_198_i -0 1 -.names inst_DS_000_DMA.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n -11 1 -.names inst_CLK_000_D2.BLIF inst_CLK_000_D3.D -1 1 -.names N_67.BLIF N_67_i -0 1 -.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF inst_DS_000_DMA.D -1- 1 --1 1 -.names state_machine_uds_000_int_7_0_n.BLIF state_machine_uds_000_int_7_n -0 1 -.names N_33.BLIF fpu_cs_int_0_un3_n -0 1 -.names CLK_OSZI_c.BLIF inst_CLK_000_D3.C -1 1 -.names N_144.BLIF N_144_i -0 1 -.names AS_030_c.BLIF N_33.BLIF fpu_cs_int_0_un1_n -11 1 -.names state_machine_lds_000_int_7_0_n.BLIF state_machine_lds_000_int_7_n +.names N_203.BLIF N_203_i 0 1 .names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n 11 1 -.names RST_i.BLIF inst_CLK_000_D3.AP +.names RST_i.BLIF inst_CLK_000_D2.AP 1 1 -.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2.BLIF N_96_i_i +.names state_machine_un13_clk_000_d0_n.BLIF state_machine_un13_clk_000_d0_i_n 0 1 .names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D 1- 1 -1 1 -.names N_240.BLIF N_240_i +.names state_machine_un15_clk_000_d0_0_n.BLIF state_machine_un15_clk_000_d0_n 0 1 -.names N_234.BLIF N_234_i +.names state_machine_un10_bg_030_n.BLIF bg_000_0_un3_n 0 1 -.names N_241.BLIF N_241_i +.names state_machine_un6_bgack_000_0_n.BLIF state_machine_un6_bgack_000_n 0 1 -.names N_228.BLIF dtack_sync_0_un3_n +.names BG_030_c.BLIF state_machine_un10_bg_030_n.BLIF bg_000_0_un1_n +11 1 +.names inst_CLK_OUT_PRE_25.BLIF CLK_OUT_INTreg.D +1 1 +.names a_i_24__n.BLIF a_i_25__n.BLIF N_225_1 +11 1 +.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +11 1 +.names a_i_26__n.BLIF a_i_27__n.BLIF N_225_2 +11 1 +.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF BG_000DFFSHreg.D +1- 1 +-1 1 +.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C +1 1 +.names N_126.BLIF N_126_i +0 1 +.names N_53.BLIF ds_000_dma_0_un3_n +0 1 +.names N_127.BLIF N_127_i +0 1 +.names state_machine_ds_000_dma_3_n.BLIF N_53.BLIF ds_000_dma_0_un1_n +11 1 +.names RST_i.BLIF CLK_OUT_INTreg.AR +1 1 +.names N_125.BLIF N_125_i +0 1 +.names inst_DS_000_DMA.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n +11 1 +.names N_124.BLIF N_124_i +0 1 +.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF inst_DS_000_DMA.D +1- 1 +-1 1 +.names N_122.BLIF N_122_i +0 1 +.names N_198.BLIF as_000_dma_0_un3_n +0 1 +.names inst_CLK_000_D0.BLIF inst_CLK_000_D1.D +1 1 +.names N_172.BLIF N_172_i +0 1 +.names state_machine_un8_bgack_030_int_i_0_n.BLIF N_198.BLIF as_000_dma_0_un1_n +11 1 +.names state_machine_size_dma_4_0_1__n.BLIF SIZE_DMA_1_.D +0 1 +.names inst_AS_000_DMA.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n +11 1 +.names CLK_OSZI_c.BLIF inst_CLK_000_D1.C +1 1 +.names state_machine_ds_000_dma_3_0_n.BLIF state_machine_ds_000_dma_3_n +0 1 +.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF inst_AS_000_DMA.D +1- 1 +-1 1 +.names N_66.BLIF N_66_i +0 1 +.names N_197.BLIF as_000_int_0_un3_n +0 1 +.names RST_i.BLIF inst_CLK_000_D1.AP +1 1 +.names N_120.BLIF N_120_i +0 1 +.names N_64.BLIF N_197.BLIF as_000_int_0_un1_n +11 1 +.names state_machine_lds_000_int_7_0_n.BLIF state_machine_lds_000_int_7_n +0 1 +.names inst_AS_000_INT.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n +11 1 +.names state_machine_uds_000_int_7_0_n.BLIF state_machine_uds_000_int_7_n +0 1 +.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INT.D +1- 1 +-1 1 +.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.D +1 1 +.names N_118.BLIF N_118_i +0 1 +.names vcc_n_n +1 +.names N_201_0.BLIF N_201 +0 1 +.names gnd_n_n +.names CLK_OSZI_c.BLIF inst_BGACK_030_INT_D.C +1 1 +.names N_117.BLIF N_117_i +0 1 +.names N_139.BLIF N_139_i +0 1 +.names RST_i.BLIF inst_BGACK_030_INT_D.AP +1 1 +.names N_138.BLIF N_138_i +0 1 +.names N_136.BLIF N_136_i +0 1 +.names N_137.BLIF N_137_i +0 1 +.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50_D.D +1 1 +.names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c +0 1 +.names N_135.BLIF N_135_i +0 1 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_50_D.C +1 1 +.names N_168.BLIF N_168_i +0 1 +.names N_132.BLIF N_132_i +0 1 +.names RST_i.BLIF inst_CLK_OUT_PRE_50_D.AR +1 1 +.names N_164.BLIF N_164_i 0 1 .end diff --git a/Logic/BUS68030.bl1 b/Logic/BUS68030.bl1 index 5fbab2a..c306485 100644 --- a/Logic/BUS68030.bl1 +++ b/Logic/BUS68030.bl1 @@ -1,85 +1,82 @@ #$ TOOL ispLEVER Classic 1.7.00.05.28.13 -#$ DATE Sun May 25 21:18:50 2014 +#$ DATE Wed May 28 21:24:55 2014 #$ MODULE bus68030 -#$ PINS 59 SIZE_1_ A_31_ IPL_030_2_ IPL_2_ DSACK_1_ FC_1_ AS_030 AS_000 SIZE_0_ DS_030 \ -# A_30_ UDS_000 A_29_ LDS_000 A_28_ A0 A_27_ nEXP_SPACE A_26_ BERR A_25_ BG_030 A_24_ BG_000 \ -# A_23_ BGACK_030 A_22_ BGACK_000 A_21_ CLK_030 A_20_ CLK_000 A_19_ CLK_OSZI A_18_ \ -# CLK_DIV_OUT A_17_ CLK_EXP A_16_ FPU_CS IPL_030_1_ DTACK IPL_030_0_ AVEC IPL_1_ AVEC_EXP \ -# IPL_0_ E DSACK_0_ VPA FC_0_ VMA RST RESET RW AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR \ -# AMIGA_BUS_ENABLE_LOW CIIN -#$ NODES 429 BG_030_c as_030_000_sync_0_un1_n as_030_000_sync_0_un0_n \ -# BG_000DFFSHreg ds_000_dma_0_un3_n ds_000_dma_0_un1_n ds_000_dma_0_un0_n \ -# BGACK_000_c fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n inst_BGACK_030_INTreg CLK_030_c \ -# fpu_cs_int_0_un0_n inst_FPU_CS_INTreg dtack_sync_0_un3_n inst_VMA_INTreg CLK_000_c \ -# dtack_sync_0_un1_n inst_AS_030_000_SYNC dtack_sync_0_un0_n inst_DTACK_SYNC \ -# CLK_OSZI_c a0_dma_0_un3_n inst_VPA_SYNC a0_dma_0_un1_n inst_VPA_D a0_dma_0_un0_n \ -# inst_CLK_000_D0 CLK_OUT_INTreg bg_000_0_un3_n inst_CLK_000_D1 bg_000_0_un1_n \ -# inst_CLK_000_D2 bg_000_0_un0_n inst_CLK_000_D5 IPL_030DFFSH_0_reg inst_CLK_OUT_PRE \ -# inst_BGACK_030_INT_D IPL_030DFFSH_1_reg vcc_n_n gnd_n_n IPL_030DFFSH_2_reg \ -# CLK_CNT_P_0_ SM_AMIGA_5_ ipl_c_0__n inst_CLK_000_D4 SM_AMIGA_7_ ipl_c_1__n \ -# SM_AMIGA_1_ SM_AMIGA_0_ ipl_c_2__n SM_AMIGA_6_ inst_AS_000_DMA inst_AS_000_INT \ -# dsack_c_1__n inst_UDS_000_INT inst_LDS_000_INT DTACK_c inst_DSACK1_INT \ -# inst_CLK_000_D3 state_machine_un59_bgack_030_int_n SM_AMIGA_3_ \ -# state_machine_un6_bgack_000_n inst_DS_000_DMA SIZE_DMA_0_ SIZE_DMA_1_ RST_c \ -# inst_A0_DMA SM_AMIGA_4_ RESETDFFRHreg SM_AMIGA_2_ state_machine_un10_bg_030_n RW_c \ -# un1_AS_030_000_SYNC_1_sqmuxa_1 SIZE_DMA_0_sqmuxa fc_c_0__n \ -# state_machine_a0_dma_4_n state_machine_ds_000_dma_5_n fc_c_1__n \ -# state_machine_lds_000_int_7_n state_machine_uds_000_int_7_n \ -# AMIGA_BUS_ENABLEDFFSHreg AMIGA_BUS_DATA_DIR_c N_88_0 N_86_0 A0_DMA_0_sqmuxa_i_0_0 \ -# N_83_i AS_030_000_SYNC_i N_81_i N_80_i DS_030_c_i N_79_i N_172_i \ -# un1_AS_030_000_SYNC_1_sqmuxa_1_0 CLK_030_c_i N_77_i N_174_i N_76_0 CLK_OUT_PRE_0 \ -# N_74_i CLK_000_D1_i N_73_i sm_amiga_i_1__n cpu_est_0_ N_72_i cpu_est_1_ N_171_i \ -# cpu_est_2_ N_66_i cpu_est_3_reg AS_030_c_i N_65_i N_64_i N_63_i N_167_i \ -# cpu_est_ns_1__n N_168_i cpu_est_ns_2__n cpu_est_ns_e_0_0__n A0_DMA_0_sqmuxa_i_0 \ -# N_163_i N_224 N_164_i N_225 N_165_i N_226 sm_amiga_ns_e_0_0__n N_227 N_160_i N_228 \ -# N_161_i N_31 N_162_i N_33 sm_amiga_ns_e_0_1__n N_35 N_98_i N_37 N_159_i N_39 \ -# cpu_est_ns_0_2__n N_158_i N_63 state_machine_amiga_bus_enable_6_iv_i_n N_64 N_157_i \ -# N_65 state_machine_ds_000_dma_5_0_n N_66 N_155_i N_67 N_156_i N_72 \ -# AMIGA_BUS_DATA_DIR_c_0 N_73 N_153_i N_74 N_154_i N_76 N_177_i N_80 N_176_i N_81 N_179_i \ -# N_83 cpu_est_ns_0_1__n N_86 N_152_i N_88 N_98 N_151_i N_108 N_109 N_150_i N_126 N_197_i \ -# N_231 N_232 N_148_i N_233 N_149_i N_234 sm_amiga_ns_e_0_5__n N_235 N_146_i N_236 N_147_i \ -# N_237 N_46_0 N_239 N_145_i N_240 N_198_i N_241 N_144 N_67_i N_145 \ -# state_machine_uds_000_int_7_0_n N_146 N_144_i N_147 \ -# state_machine_lds_000_int_7_0_n N_148 N_96_i_i N_149 N_240_i N_150 N_241_i N_151 \ -# N_39_0 N_152 N_237_i N_153 N_239_i N_154 N_37_0 N_155 N_236_i N_156 N_35_0 N_157 N_235_i \ -# N_158 N_33_0 N_159 N_175_i N_160 N_31_0 N_161 N_228_0 N_162 BG_030_c_i N_163 N_233_i N_164 \ -# state_machine_un10_bg_030_0_n N_165 N_227_0 N_166 N_226_0 N_167 N_108_i N_168 N_109_i \ -# N_171 N_225_0 N_172 state_machine_un6_bgack_000_0_n N_173 N_224_0 N_174 CLK_000_D2_i \ -# N_175 state_machine_un59_bgack_030_int_0_n N_176 N_253_1 N_179 N_253_2 N_197 N_263_1 \ -# N_198 N_263_2 un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 N_263_3 cpu_est_ns_0_0_x2_1_ \ -# N_263_4 N_236_1 N_263_5 N_253 N_263_6 N_263 N_74_i_1 VMA_INT_i N_74_i_2 VPA_D_i N_74_i_3 \ -# DTACK_i N_74_i_4 LDS_000_i N_74_i_5 AS_000_i N_83_i_1 cpu_est_i_0__n N_83_i_2 \ -# sm_amiga_i_4__n A0_DMA_0_sqmuxa_i_0_0_1 BGACK_030_INT_i \ -# state_machine_a0_dma_4_1_n sm_amiga_i_5__n state_machine_a0_dma_4_2_n \ -# cpu_est_i_3__n N_236_1_0 CLK_000_D0_i N_234_1 CLK_000_D4_i N_234_2 cpu_est_i_1__n \ -# N_233_1 UDS_000_i N_231_1 CLK_000_D5_i N_231_2 nEXP_SPACE_i N_231_3 AS_000_DMA_i \ -# sm_amiga_ns_e_0_1_0__n RW_i sm_amiga_ns_e_0_1_1__n sm_amiga_i_3__n \ -# cpu_est_ns_0_1_1__n sm_amiga_i_0__n N_44_i_1 A0_i \ -# state_machine_uds_000_int_7_0_1_n size_i_1__n state_machine_lds_000_int_7_0_1_n \ -# a_i_30__n N_39_0_1 a_i_31__n N_37_0_1 a_i_28__n N_166_1 a_i_29__n N_164_1 a_i_26__n \ -# N_156_1 a_i_27__n N_144_1 a_i_24__n N_240_1 a_i_25__n N_239_1 a_i_19__n N_237_1 \ -# a_i_16__n SIZE_DMA_0_sqmuxa_1 a_i_18__n N_232_1 RST_i N_109_1 \ -# cpu_est_ns_0_0_m3_2__un3_n SIZE_DMA_0_sqmuxa_i cpu_est_ns_0_0_m3_2__un1_n N_231_i \ -# cpu_est_ns_0_0_m3_2__un0_n N_126_i state_machine_lds_000_int_7_0_m3_un3_n N_232_i \ -# state_machine_lds_000_int_7_0_m3_un1_n N_234_i \ -# state_machine_lds_000_int_7_0_m3_un0_n FPU_CS_INT_i cpu_estse_0_un3_n AS_030_c \ -# cpu_estse_0_un1_n cpu_estse_0_un0_n AS_000_c cpu_estse_1_un3_n cpu_estse_1_un1_n \ -# DS_030_c cpu_estse_1_un0_n cpu_estse_2_un3_n UDS_000_c cpu_estse_2_un1_n \ -# cpu_estse_2_un0_n LDS_000_c dsack1_int_0_un3_n dsack1_int_0_un1_n size_c_0__n \ -# dsack1_int_0_un0_n as_000_dma_0_un3_n size_c_1__n as_000_dma_0_un1_n \ -# as_000_dma_0_un0_n a_c_16__n as_000_int_0_un3_n as_000_int_0_un1_n a_c_17__n \ -# as_000_int_0_un0_n vpa_sync_0_un3_n a_c_18__n vpa_sync_0_un1_n vpa_sync_0_un0_n \ -# a_c_19__n vma_int_0_un3_n vma_int_0_un1_n a_c_20__n vma_int_0_un0_n \ -# bgack_030_int_0_un3_n a_c_21__n bgack_030_int_0_un1_n bgack_030_int_0_un0_n \ -# a_c_22__n size_dma_0_0__un3_n size_dma_0_0__un1_n a_c_23__n size_dma_0_0__un0_n \ -# size_dma_0_1__un3_n a_c_24__n size_dma_0_1__un1_n size_dma_0_1__un0_n a_c_25__n \ -# ipl_030_0_0__un3_n ipl_030_0_0__un1_n a_c_26__n ipl_030_0_0__un0_n \ -# ipl_030_0_1__un3_n a_c_27__n ipl_030_0_1__un1_n ipl_030_0_1__un0_n a_c_28__n \ -# ipl_030_0_2__un3_n ipl_030_0_2__un1_n a_c_29__n ipl_030_0_2__un0_n \ -# amiga_bus_enable_0_un3_n a_c_30__n amiga_bus_enable_0_un1_n \ -# amiga_bus_enable_0_un0_n a_c_31__n uds_000_int_0_un3_n uds_000_int_0_un1_n A0_c \ -# uds_000_int_0_un0_n lds_000_int_0_un3_n nEXP_SPACE_c lds_000_int_0_un1_n \ -# lds_000_int_0_un0_n as_030_000_sync_0_un3_n +#$ PINS 59 A_21_ A_20_ SIZE_1_ A_19_ A_18_ A_31_ A_17_ A_16_ IPL_030_2_ IPL_030_1_ \ +# IPL_030_0_ IPL_2_ IPL_1_ IPL_0_ DSACK_1_ DSACK_0_ FC_0_ FC_1_ AS_030 AS_000 DS_030 \ +# UDS_000 LDS_000 A0 nEXP_SPACE BERR BG_030 BG_000 BGACK_030 BGACK_000 CLK_030 CLK_000 \ +# CLK_OSZI CLK_DIV_OUT CLK_EXP FPU_CS DTACK AVEC AVEC_EXP E VPA VMA RST RESET RW \ +# AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW CIIN SIZE_0_ A_30_ A_29_ \ +# A_28_ A_27_ A_26_ A_25_ A_24_ A_23_ A_22_ +#$ NODES 405 CLK_030_c CLK_000_c CLK_OSZI_c inst_BGACK_030_INTreg CLK_OUT_INTreg \ +# inst_FPU_CS_INTreg inst_VMA_INTreg inst_AS_030_000_SYNC IPL_030DFFSH_0_reg \ +# inst_BGACK_030_INT_D inst_AS_000_DMA IPL_030DFFSH_1_reg inst_VPA_D \ +# inst_CLK_OUT_PRE_50_D IPL_030DFFSH_2_reg inst_CLK_000_D0 inst_CLK_000_D1 \ +# ipl_c_0__n inst_CLK_000_D2 inst_CLK_000_D4 ipl_c_1__n inst_DTACK_D0 \ +# inst_CLK_OUT_PRE_50 ipl_c_2__n inst_CLK_OUT_PRE_25 vcc_n_n gnd_n_n dsack_c_1__n \ +# state_machine_un13_clk_000_d0_n inst_AS_000_INT SM_AMIGA_1_ SM_AMIGA_0_ \ +# SM_AMIGA_6_ SM_AMIGA_5_ inst_UDS_000_INT inst_LDS_000_INT inst_DSACK1_INT \ +# clk_un3_clk_out_pre_50_n RST_c inst_CLK_000_D3 inst_CLK_030_H RESETDFFRHreg \ +# state_machine_un6_bgack_000_n state_machine_un15_clk_000_d0_n RW_c \ +# inst_DS_000_DMA SIZE_DMA_0_ fc_c_0__n SIZE_DMA_1_ inst_A0_DMA fc_c_1__n SM_AMIGA_7_ \ +# un1_AMIGA_BUS_ENABLE_1_sqmuxa_2 AMIGA_BUS_ENABLEDFFSHreg SM_AMIGA_4_ \ +# AMIGA_BUS_DATA_DIR_c state_machine_ds_000_dma_3_n SM_AMIGA_3_ SM_AMIGA_2_ \ +# cpu_est_ns_0_1__n state_machine_un10_bg_030_n N_134_i \ +# state_machine_lds_000_int_7_n N_169_i state_machine_uds_000_int_7_n N_133_i \ +# N_167_i N_51_0 N_140_i N_202_0 N_86_0 N_171_i un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0 \ +# N_82_i sm_amiga_i_1__n N_78_i N_170_i N_77_0 CLK_000_D1_i CLK_OUT_PRE_25_0 N_76_i \ +# N_74_i N_72_0 AS_030_000_SYNC_i CLK_000_D2_i \ +# state_machine_un8_bgack_030_int_i_0_0_n cpu_est_0_ N_69_i cpu_est_1_ AS_030_c_i \ +# cpu_est_2_ N_65_i cpu_est_3_reg N_64_i N_62_i N_152_i N_153_i cpu_est_ns_1__n N_61_0 \ +# cpu_est_ns_2__n N_150_i state_machine_un8_bgack_030_int_i_0_n N_148_i N_197 N_149_i \ +# N_198 N_199 N_123_i N_200 N_145_i N_201 N_146_i sm_amiga_ns_0_0__n N_51 N_142_i N_53 \ +# N_143_i N_61 N_144_i N_62 cpu_est_ns_0_2__n N_64 N_141_i N_65 N_53_0 N_66 N_139_i N_69 \ +# state_machine_amiga_bus_enable_4_iv_i_n N_72 N_138_i N_74 N_48_i N_76 N_136_i N_77 \ +# N_137_i N_78 AMIGA_BUS_DATA_DIR_c_0 N_82 N_135_i N_86 N_168_i N_202 N_151_i N_203 \ +# N_132_i N_205 N_164_i N_206 N_115 N_130_i N_116 N_131_i N_117 N_41_0 N_118 N_128_i N_120 \ +# N_129_i N_121 sm_amiga_ns_0_5__n N_122 N_126_i N_123 N_127_i N_124 N_125 N_125_i N_126 \ +# N_127 N_124_i N_128 N_129 N_122_i N_130 N_131 N_172_i N_132 \ +# state_machine_size_dma_4_0_1__n N_133 state_machine_ds_000_dma_3_0_n N_134 N_66_i \ +# N_135 N_120_i N_136 state_machine_lds_000_int_7_0_n N_137 \ +# state_machine_uds_000_int_7_0_n N_138 N_118_i N_139 N_201_0 N_140 N_117_i N_141 \ +# N_200_0 N_142 N_115_i N_143 N_116_i N_144 N_199_0 N_145 BG_030_c_i N_146 N_206_i N_147 \ +# state_machine_un10_bg_030_0_n N_148 N_198_0 N_149 N_197_0 N_150 N_203_i N_152 \ +# state_machine_un13_clk_000_d0_i_n N_153 state_machine_un15_clk_000_d0_0_n N_164 \ +# state_machine_un6_bgack_000_0_n N_167 N_225_1 N_168 N_225_2 N_169 N_225_3 N_170 \ +# N_225_4 N_171 N_225_5 N_172 N_225_6 N_173 N_228_1 N_225 N_228_2 N_228 N_69_i_1 \ +# CLK_000_D0_i N_69_i_2 BGACK_030_INT_i N_69_i_3 CLK_030_i N_69_i_4 cpu_est_i_3__n \ +# N_69_i_5 sm_amiga_i_6__n state_machine_un8_bgack_030_int_i_0_0_1_n nEXP_SPACE_i \ +# N_72_0_1 CLK_000_D4_i N_51_0_1 sm_amiga_i_5__n N_51_0_2 sm_amiga_i_4__n \ +# cpu_est_ns_0_1_1__n AS_000_i cpu_est_ns_0_2_1__n LDS_000_i N_128_1 UDS_000_i N_128_2 \ +# cpu_est_i_1__n N_118_1 cpu_est_i_0__n N_118_2 DTACK_D0_i N_118_3 VMA_INT_i N_206_1 \ +# VPA_D_i N_206_2 AS_000_DMA_i sm_amiga_ns_0_1_0__n CLK_030_H_i cpu_est_ns_0_1_2__n \ +# RW_i N_53_0_1 cpu_est_i_2__n N_43_i_1 sm_amiga_i_0__n \ +# state_machine_lds_000_int_7_0_1_n sm_amiga_i_3__n \ +# state_machine_uds_000_int_7_0_1_n sm_amiga_i_7__n N_199_0_1 A0_i N_152_1 \ +# size_i_1__n N_147_1 DS_030_i N_139_1 a_i_19__n N_137_1 a_i_16__n N_127_1 a_i_18__n \ +# N_120_1 a_i_30__n state_machine_a0_dma_2_1_n a_i_31__n N_116_1 a_i_28__n N_115_1 \ +# a_i_29__n state_machine_un13_clk_000_d0_1_n a_i_26__n N_203_1 a_i_27__n \ +# state_machine_uds_000_int_7_0_m3_un3_n a_i_24__n \ +# state_machine_uds_000_int_7_0_m3_un1_n a_i_25__n \ +# state_machine_uds_000_int_7_0_m3_un0_n RST_i dsack1_int_0_un3_n \ +# dsack1_int_0_un1_n dsack1_int_0_un0_n N_205_i vma_int_0_un3_n FPU_CS_INT_i \ +# vma_int_0_un1_n CLK_OUT_PRE_50_D_i vma_int_0_un0_n AS_030_c bgack_030_int_0_un3_n \ +# bgack_030_int_0_un1_n AS_000_c bgack_030_int_0_un0_n ipl_030_0_0__un3_n DS_030_c \ +# ipl_030_0_0__un1_n ipl_030_0_0__un0_n UDS_000_c ipl_030_0_1__un3_n \ +# ipl_030_0_1__un1_n LDS_000_c ipl_030_0_1__un0_n ipl_030_0_2__un3_n size_c_0__n \ +# ipl_030_0_2__un1_n ipl_030_0_2__un0_n size_c_1__n cpu_estse_0_un3_n \ +# cpu_estse_0_un1_n a_c_16__n cpu_estse_0_un0_n cpu_estse_1_un3_n a_c_17__n \ +# cpu_estse_1_un1_n cpu_estse_1_un0_n a_c_18__n cpu_estse_2_un3_n cpu_estse_2_un1_n \ +# a_c_19__n cpu_estse_2_un0_n amiga_bus_enable_0_un3_n a_c_20__n \ +# amiga_bus_enable_0_un1_n amiga_bus_enable_0_un0_n a_c_21__n \ +# as_030_000_sync_0_un3_n as_030_000_sync_0_un1_n a_c_22__n as_030_000_sync_0_un0_n \ +# clk_030_h_0_un3_n a_c_23__n clk_030_h_0_un1_n clk_030_h_0_un0_n a_c_24__n \ +# uds_000_int_0_un3_n uds_000_int_0_un1_n a_c_25__n uds_000_int_0_un0_n \ +# lds_000_int_0_un3_n a_c_26__n lds_000_int_0_un1_n lds_000_int_0_un0_n a_c_27__n \ +# fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n a_c_28__n fpu_cs_int_0_un0_n bg_000_0_un3_n \ +# a_c_29__n bg_000_0_un1_n bg_000_0_un0_n a_c_30__n ds_000_dma_0_un3_n \ +# ds_000_dma_0_un1_n a_c_31__n ds_000_dma_0_un0_n as_000_dma_0_un3_n A0_c \ +# as_000_dma_0_un1_n as_000_dma_0_un0_n nEXP_SPACE_c as_000_int_0_un3_n \ +# as_000_int_0_un1_n as_000_int_0_un0_n BG_030_c BG_000DFFSHreg BGACK_000_c .model bus68030 .inputs A_31_.BLIF IPL_2_.BLIF FC_1_.BLIF nEXP_SPACE.BLIF BG_030.BLIF \ BGACK_000.BLIF CLK_030.BLIF CLK_000.BLIF CLK_OSZI.BLIF VPA.BLIF RST.BLIF \ @@ -87,232 +84,222 @@ RW.BLIF A_30_.BLIF A_29_.BLIF A_28_.BLIF A_27_.BLIF A_26_.BLIF A_25_.BLIF \ A_24_.BLIF A_23_.BLIF A_22_.BLIF A_21_.BLIF A_20_.BLIF A_19_.BLIF A_18_.BLIF \ A_17_.BLIF A_16_.BLIF IPL_1_.BLIF IPL_0_.BLIF FC_0_.BLIF SIZE_1_.BLIF \ DSACK_1_.BLIF AS_030.BLIF AS_000.BLIF DS_030.BLIF UDS_000.BLIF LDS_000.BLIF \ -A0.BLIF DTACK.BLIF SIZE_0_.BLIF DSACK_0_.BLIF BG_030_c.BLIF \ -as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF BG_000DFFSHreg.BLIF \ -ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF \ -BGACK_000_c.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un1_n.BLIF \ -inst_BGACK_030_INTreg.BLIF CLK_030_c.BLIF fpu_cs_int_0_un0_n.BLIF \ -inst_FPU_CS_INTreg.BLIF dtack_sync_0_un3_n.BLIF inst_VMA_INTreg.BLIF \ -CLK_000_c.BLIF dtack_sync_0_un1_n.BLIF inst_AS_030_000_SYNC.BLIF \ -dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.BLIF CLK_OSZI_c.BLIF \ -a0_dma_0_un3_n.BLIF inst_VPA_SYNC.BLIF a0_dma_0_un1_n.BLIF inst_VPA_D.BLIF \ -a0_dma_0_un0_n.BLIF inst_CLK_000_D0.BLIF CLK_OUT_INTreg.BLIF \ -bg_000_0_un3_n.BLIF inst_CLK_000_D1.BLIF bg_000_0_un1_n.BLIF \ -inst_CLK_000_D2.BLIF bg_000_0_un0_n.BLIF inst_CLK_000_D5.BLIF \ -IPL_030DFFSH_0_reg.BLIF inst_CLK_OUT_PRE.BLIF inst_BGACK_030_INT_D.BLIF \ -IPL_030DFFSH_1_reg.BLIF vcc_n_n.BLIF gnd_n_n.BLIF IPL_030DFFSH_2_reg.BLIF \ -CLK_CNT_P_0_.BLIF SM_AMIGA_5_.BLIF ipl_c_0__n.BLIF inst_CLK_000_D4.BLIF \ -SM_AMIGA_7_.BLIF ipl_c_1__n.BLIF SM_AMIGA_1_.BLIF SM_AMIGA_0_.BLIF \ -ipl_c_2__n.BLIF SM_AMIGA_6_.BLIF inst_AS_000_DMA.BLIF inst_AS_000_INT.BLIF \ -dsack_c_1__n.BLIF inst_UDS_000_INT.BLIF inst_LDS_000_INT.BLIF DTACK_c.BLIF \ -inst_DSACK1_INT.BLIF inst_CLK_000_D3.BLIF \ -state_machine_un59_bgack_030_int_n.BLIF SM_AMIGA_3_.BLIF \ -state_machine_un6_bgack_000_n.BLIF inst_DS_000_DMA.BLIF SIZE_DMA_0_.BLIF \ -SIZE_DMA_1_.BLIF RST_c.BLIF inst_A0_DMA.BLIF SM_AMIGA_4_.BLIF \ -RESETDFFRHreg.BLIF SM_AMIGA_2_.BLIF state_machine_un10_bg_030_n.BLIF RW_c.BLIF \ -un1_AS_030_000_SYNC_1_sqmuxa_1.BLIF SIZE_DMA_0_sqmuxa.BLIF fc_c_0__n.BLIF \ -state_machine_a0_dma_4_n.BLIF state_machine_ds_000_dma_5_n.BLIF fc_c_1__n.BLIF \ -state_machine_lds_000_int_7_n.BLIF state_machine_uds_000_int_7_n.BLIF \ -AMIGA_BUS_ENABLEDFFSHreg.BLIF AMIGA_BUS_DATA_DIR_c.BLIF N_88_0.BLIF \ -N_86_0.BLIF A0_DMA_0_sqmuxa_i_0_0.BLIF N_83_i.BLIF AS_030_000_SYNC_i.BLIF \ -N_81_i.BLIF N_80_i.BLIF DS_030_c_i.BLIF N_79_i.BLIF N_172_i.BLIF \ -un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF CLK_030_c_i.BLIF N_77_i.BLIF \ -N_174_i.BLIF N_76_0.BLIF CLK_OUT_PRE_0.BLIF N_74_i.BLIF CLK_000_D1_i.BLIF \ -N_73_i.BLIF sm_amiga_i_1__n.BLIF cpu_est_0_.BLIF N_72_i.BLIF cpu_est_1_.BLIF \ -N_171_i.BLIF cpu_est_2_.BLIF N_66_i.BLIF cpu_est_3_reg.BLIF AS_030_c_i.BLIF \ -N_65_i.BLIF N_64_i.BLIF N_63_i.BLIF N_167_i.BLIF cpu_est_ns_1__n.BLIF \ -N_168_i.BLIF cpu_est_ns_2__n.BLIF cpu_est_ns_e_0_0__n.BLIF \ -A0_DMA_0_sqmuxa_i_0.BLIF N_163_i.BLIF N_224.BLIF N_164_i.BLIF N_225.BLIF \ -N_165_i.BLIF N_226.BLIF sm_amiga_ns_e_0_0__n.BLIF N_227.BLIF N_160_i.BLIF \ -N_228.BLIF N_161_i.BLIF N_31.BLIF N_162_i.BLIF N_33.BLIF \ -sm_amiga_ns_e_0_1__n.BLIF N_35.BLIF N_98_i.BLIF N_37.BLIF N_159_i.BLIF \ -N_39.BLIF cpu_est_ns_0_2__n.BLIF N_158_i.BLIF N_63.BLIF \ -state_machine_amiga_bus_enable_6_iv_i_n.BLIF N_64.BLIF N_157_i.BLIF N_65.BLIF \ -state_machine_ds_000_dma_5_0_n.BLIF N_66.BLIF N_155_i.BLIF N_67.BLIF \ -N_156_i.BLIF N_72.BLIF AMIGA_BUS_DATA_DIR_c_0.BLIF N_73.BLIF N_153_i.BLIF \ -N_74.BLIF N_154_i.BLIF N_76.BLIF N_177_i.BLIF N_80.BLIF N_176_i.BLIF N_81.BLIF \ -N_179_i.BLIF N_83.BLIF cpu_est_ns_0_1__n.BLIF N_86.BLIF N_152_i.BLIF N_88.BLIF \ -N_98.BLIF N_151_i.BLIF N_108.BLIF N_109.BLIF N_150_i.BLIF N_126.BLIF \ -N_197_i.BLIF N_231.BLIF N_232.BLIF N_148_i.BLIF N_233.BLIF N_149_i.BLIF \ -N_234.BLIF sm_amiga_ns_e_0_5__n.BLIF N_235.BLIF N_146_i.BLIF N_236.BLIF \ -N_147_i.BLIF N_237.BLIF N_46_0.BLIF N_239.BLIF N_145_i.BLIF N_240.BLIF \ -N_198_i.BLIF N_241.BLIF N_144.BLIF N_67_i.BLIF N_145.BLIF \ -state_machine_uds_000_int_7_0_n.BLIF N_146.BLIF N_144_i.BLIF N_147.BLIF \ -state_machine_lds_000_int_7_0_n.BLIF N_148.BLIF N_96_i_i.BLIF N_149.BLIF \ -N_240_i.BLIF N_150.BLIF N_241_i.BLIF N_151.BLIF N_39_0.BLIF N_152.BLIF \ -N_237_i.BLIF N_153.BLIF N_239_i.BLIF N_154.BLIF N_37_0.BLIF N_155.BLIF \ -N_236_i.BLIF N_156.BLIF N_35_0.BLIF N_157.BLIF N_235_i.BLIF N_158.BLIF \ -N_33_0.BLIF N_159.BLIF N_175_i.BLIF N_160.BLIF N_31_0.BLIF N_161.BLIF \ -N_228_0.BLIF N_162.BLIF BG_030_c_i.BLIF N_163.BLIF N_233_i.BLIF N_164.BLIF \ -state_machine_un10_bg_030_0_n.BLIF N_165.BLIF N_227_0.BLIF N_166.BLIF \ -N_226_0.BLIF N_167.BLIF N_108_i.BLIF N_168.BLIF N_109_i.BLIF N_171.BLIF \ -N_225_0.BLIF N_172.BLIF state_machine_un6_bgack_000_0_n.BLIF N_173.BLIF \ -N_224_0.BLIF N_174.BLIF CLK_000_D2_i.BLIF N_175.BLIF \ -state_machine_un59_bgack_030_int_0_n.BLIF N_176.BLIF N_253_1.BLIF N_179.BLIF \ -N_253_2.BLIF N_197.BLIF N_263_1.BLIF N_198.BLIF N_263_2.BLIF \ -un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2.BLIF N_263_3.BLIF \ -cpu_est_ns_0_0_x2_1_.BLIF N_263_4.BLIF N_236_1.BLIF N_263_5.BLIF N_253.BLIF \ -N_263_6.BLIF N_263.BLIF N_74_i_1.BLIF VMA_INT_i.BLIF N_74_i_2.BLIF \ -VPA_D_i.BLIF N_74_i_3.BLIF DTACK_i.BLIF N_74_i_4.BLIF LDS_000_i.BLIF \ -N_74_i_5.BLIF AS_000_i.BLIF N_83_i_1.BLIF cpu_est_i_0__n.BLIF N_83_i_2.BLIF \ -sm_amiga_i_4__n.BLIF A0_DMA_0_sqmuxa_i_0_0_1.BLIF BGACK_030_INT_i.BLIF \ -state_machine_a0_dma_4_1_n.BLIF sm_amiga_i_5__n.BLIF \ -state_machine_a0_dma_4_2_n.BLIF cpu_est_i_3__n.BLIF N_236_1_0.BLIF \ -CLK_000_D0_i.BLIF N_234_1.BLIF CLK_000_D4_i.BLIF N_234_2.BLIF \ -cpu_est_i_1__n.BLIF N_233_1.BLIF UDS_000_i.BLIF N_231_1.BLIF CLK_000_D5_i.BLIF \ -N_231_2.BLIF nEXP_SPACE_i.BLIF N_231_3.BLIF AS_000_DMA_i.BLIF \ -sm_amiga_ns_e_0_1_0__n.BLIF RW_i.BLIF sm_amiga_ns_e_0_1_1__n.BLIF \ -sm_amiga_i_3__n.BLIF cpu_est_ns_0_1_1__n.BLIF sm_amiga_i_0__n.BLIF \ -N_44_i_1.BLIF A0_i.BLIF state_machine_uds_000_int_7_0_1_n.BLIF \ -size_i_1__n.BLIF state_machine_lds_000_int_7_0_1_n.BLIF a_i_30__n.BLIF \ -N_39_0_1.BLIF a_i_31__n.BLIF N_37_0_1.BLIF a_i_28__n.BLIF N_166_1.BLIF \ -a_i_29__n.BLIF N_164_1.BLIF a_i_26__n.BLIF N_156_1.BLIF a_i_27__n.BLIF \ -N_144_1.BLIF a_i_24__n.BLIF N_240_1.BLIF a_i_25__n.BLIF N_239_1.BLIF \ -a_i_19__n.BLIF N_237_1.BLIF a_i_16__n.BLIF SIZE_DMA_0_sqmuxa_1.BLIF \ -a_i_18__n.BLIF N_232_1.BLIF RST_i.BLIF N_109_1.BLIF \ -cpu_est_ns_0_0_m3_2__un3_n.BLIF SIZE_DMA_0_sqmuxa_i.BLIF \ -cpu_est_ns_0_0_m3_2__un1_n.BLIF N_231_i.BLIF cpu_est_ns_0_0_m3_2__un0_n.BLIF \ -N_126_i.BLIF state_machine_lds_000_int_7_0_m3_un3_n.BLIF N_232_i.BLIF \ -state_machine_lds_000_int_7_0_m3_un1_n.BLIF N_234_i.BLIF \ -state_machine_lds_000_int_7_0_m3_un0_n.BLIF FPU_CS_INT_i.BLIF \ -cpu_estse_0_un3_n.BLIF AS_030_c.BLIF cpu_estse_0_un1_n.BLIF \ -cpu_estse_0_un0_n.BLIF AS_000_c.BLIF cpu_estse_1_un3_n.BLIF \ -cpu_estse_1_un1_n.BLIF DS_030_c.BLIF cpu_estse_1_un0_n.BLIF \ -cpu_estse_2_un3_n.BLIF UDS_000_c.BLIF cpu_estse_2_un1_n.BLIF \ -cpu_estse_2_un0_n.BLIF LDS_000_c.BLIF dsack1_int_0_un3_n.BLIF \ -dsack1_int_0_un1_n.BLIF size_c_0__n.BLIF dsack1_int_0_un0_n.BLIF \ -as_000_dma_0_un3_n.BLIF size_c_1__n.BLIF as_000_dma_0_un1_n.BLIF \ -as_000_dma_0_un0_n.BLIF a_c_16__n.BLIF as_000_int_0_un3_n.BLIF \ -as_000_int_0_un1_n.BLIF a_c_17__n.BLIF as_000_int_0_un0_n.BLIF \ -vpa_sync_0_un3_n.BLIF a_c_18__n.BLIF vpa_sync_0_un1_n.BLIF \ -vpa_sync_0_un0_n.BLIF a_c_19__n.BLIF vma_int_0_un3_n.BLIF vma_int_0_un1_n.BLIF \ -a_c_20__n.BLIF vma_int_0_un0_n.BLIF bgack_030_int_0_un3_n.BLIF a_c_21__n.BLIF \ -bgack_030_int_0_un1_n.BLIF bgack_030_int_0_un0_n.BLIF a_c_22__n.BLIF \ -size_dma_0_0__un3_n.BLIF size_dma_0_0__un1_n.BLIF a_c_23__n.BLIF \ -size_dma_0_0__un0_n.BLIF size_dma_0_1__un3_n.BLIF a_c_24__n.BLIF \ -size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF a_c_25__n.BLIF \ -ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un1_n.BLIF a_c_26__n.BLIF \ -ipl_030_0_0__un0_n.BLIF ipl_030_0_1__un3_n.BLIF a_c_27__n.BLIF \ -ipl_030_0_1__un1_n.BLIF ipl_030_0_1__un0_n.BLIF a_c_28__n.BLIF \ -ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un1_n.BLIF a_c_29__n.BLIF \ -ipl_030_0_2__un0_n.BLIF amiga_bus_enable_0_un3_n.BLIF a_c_30__n.BLIF \ -amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF a_c_31__n.BLIF \ -uds_000_int_0_un3_n.BLIF uds_000_int_0_un1_n.BLIF A0_c.BLIF \ -uds_000_int_0_un0_n.BLIF lds_000_int_0_un3_n.BLIF nEXP_SPACE_c.BLIF \ -lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF as_030_000_sync_0_un3_n.BLIF \ -AS_030.PIN.BLIF AS_000.PIN.BLIF DS_030.PIN.BLIF UDS_000.PIN.BLIF \ -LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF SIZE_1_.PIN.BLIF A0.PIN.BLIF \ -DSACK_1_.PIN.BLIF DTACK.PIN.BLIF +A0.BLIF DTACK.BLIF SIZE_0_.BLIF DSACK_0_.BLIF CLK_030_c.BLIF CLK_000_c.BLIF \ +CLK_OSZI_c.BLIF inst_BGACK_030_INTreg.BLIF CLK_OUT_INTreg.BLIF \ +inst_FPU_CS_INTreg.BLIF inst_VMA_INTreg.BLIF inst_AS_030_000_SYNC.BLIF \ +IPL_030DFFSH_0_reg.BLIF inst_BGACK_030_INT_D.BLIF inst_AS_000_DMA.BLIF \ +IPL_030DFFSH_1_reg.BLIF inst_VPA_D.BLIF inst_CLK_OUT_PRE_50_D.BLIF \ +IPL_030DFFSH_2_reg.BLIF inst_CLK_000_D0.BLIF inst_CLK_000_D1.BLIF \ +ipl_c_0__n.BLIF inst_CLK_000_D2.BLIF inst_CLK_000_D4.BLIF ipl_c_1__n.BLIF \ +inst_DTACK_D0.BLIF inst_CLK_OUT_PRE_50.BLIF ipl_c_2__n.BLIF \ +inst_CLK_OUT_PRE_25.BLIF vcc_n_n.BLIF gnd_n_n.BLIF dsack_c_1__n.BLIF \ +state_machine_un13_clk_000_d0_n.BLIF inst_AS_000_INT.BLIF SM_AMIGA_1_.BLIF \ +SM_AMIGA_0_.BLIF SM_AMIGA_6_.BLIF SM_AMIGA_5_.BLIF inst_UDS_000_INT.BLIF \ +inst_LDS_000_INT.BLIF inst_DSACK1_INT.BLIF clk_un3_clk_out_pre_50_n.BLIF \ +RST_c.BLIF inst_CLK_000_D3.BLIF inst_CLK_030_H.BLIF RESETDFFRHreg.BLIF \ +state_machine_un6_bgack_000_n.BLIF state_machine_un15_clk_000_d0_n.BLIF \ +RW_c.BLIF inst_DS_000_DMA.BLIF SIZE_DMA_0_.BLIF fc_c_0__n.BLIF \ +SIZE_DMA_1_.BLIF inst_A0_DMA.BLIF fc_c_1__n.BLIF SM_AMIGA_7_.BLIF \ +un1_AMIGA_BUS_ENABLE_1_sqmuxa_2.BLIF AMIGA_BUS_ENABLEDFFSHreg.BLIF \ +SM_AMIGA_4_.BLIF AMIGA_BUS_DATA_DIR_c.BLIF state_machine_ds_000_dma_3_n.BLIF \ +SM_AMIGA_3_.BLIF SM_AMIGA_2_.BLIF cpu_est_ns_0_1__n.BLIF \ +state_machine_un10_bg_030_n.BLIF N_134_i.BLIF \ +state_machine_lds_000_int_7_n.BLIF N_169_i.BLIF \ +state_machine_uds_000_int_7_n.BLIF N_133_i.BLIF N_167_i.BLIF N_51_0.BLIF \ +N_140_i.BLIF N_202_0.BLIF N_86_0.BLIF N_171_i.BLIF \ +un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0.BLIF N_82_i.BLIF sm_amiga_i_1__n.BLIF \ +N_78_i.BLIF N_170_i.BLIF N_77_0.BLIF CLK_000_D1_i.BLIF CLK_OUT_PRE_25_0.BLIF \ +N_76_i.BLIF N_74_i.BLIF N_72_0.BLIF AS_030_000_SYNC_i.BLIF CLK_000_D2_i.BLIF \ +state_machine_un8_bgack_030_int_i_0_0_n.BLIF cpu_est_0_.BLIF N_69_i.BLIF \ +cpu_est_1_.BLIF AS_030_c_i.BLIF cpu_est_2_.BLIF N_65_i.BLIF cpu_est_3_reg.BLIF \ +N_64_i.BLIF N_62_i.BLIF N_152_i.BLIF N_153_i.BLIF cpu_est_ns_1__n.BLIF \ +N_61_0.BLIF cpu_est_ns_2__n.BLIF N_150_i.BLIF \ +state_machine_un8_bgack_030_int_i_0_n.BLIF N_148_i.BLIF N_197.BLIF \ +N_149_i.BLIF N_198.BLIF N_199.BLIF N_123_i.BLIF N_200.BLIF N_145_i.BLIF \ +N_201.BLIF N_146_i.BLIF sm_amiga_ns_0_0__n.BLIF N_51.BLIF N_142_i.BLIF \ +N_53.BLIF N_143_i.BLIF N_61.BLIF N_144_i.BLIF N_62.BLIF cpu_est_ns_0_2__n.BLIF \ +N_64.BLIF N_141_i.BLIF N_65.BLIF N_53_0.BLIF N_66.BLIF N_139_i.BLIF N_69.BLIF \ +state_machine_amiga_bus_enable_4_iv_i_n.BLIF N_72.BLIF N_138_i.BLIF N_74.BLIF \ +N_48_i.BLIF N_76.BLIF N_136_i.BLIF N_77.BLIF N_137_i.BLIF N_78.BLIF \ +AMIGA_BUS_DATA_DIR_c_0.BLIF N_82.BLIF N_135_i.BLIF N_86.BLIF N_168_i.BLIF \ +N_202.BLIF N_151_i.BLIF N_203.BLIF N_132_i.BLIF N_205.BLIF N_164_i.BLIF \ +N_206.BLIF N_115.BLIF N_130_i.BLIF N_116.BLIF N_131_i.BLIF N_117.BLIF \ +N_41_0.BLIF N_118.BLIF N_128_i.BLIF N_120.BLIF N_129_i.BLIF N_121.BLIF \ +sm_amiga_ns_0_5__n.BLIF N_122.BLIF N_126_i.BLIF N_123.BLIF N_127_i.BLIF \ +N_124.BLIF N_125.BLIF N_125_i.BLIF N_126.BLIF N_127.BLIF N_124_i.BLIF \ +N_128.BLIF N_129.BLIF N_122_i.BLIF N_130.BLIF N_131.BLIF N_172_i.BLIF \ +N_132.BLIF state_machine_size_dma_4_0_1__n.BLIF N_133.BLIF \ +state_machine_ds_000_dma_3_0_n.BLIF N_134.BLIF N_66_i.BLIF N_135.BLIF \ +N_120_i.BLIF N_136.BLIF state_machine_lds_000_int_7_0_n.BLIF N_137.BLIF \ +state_machine_uds_000_int_7_0_n.BLIF N_138.BLIF N_118_i.BLIF N_139.BLIF \ +N_201_0.BLIF N_140.BLIF N_117_i.BLIF N_141.BLIF N_200_0.BLIF N_142.BLIF \ +N_115_i.BLIF N_143.BLIF N_116_i.BLIF N_144.BLIF N_199_0.BLIF N_145.BLIF \ +BG_030_c_i.BLIF N_146.BLIF N_206_i.BLIF N_147.BLIF \ +state_machine_un10_bg_030_0_n.BLIF N_148.BLIF N_198_0.BLIF N_149.BLIF \ +N_197_0.BLIF N_150.BLIF N_203_i.BLIF N_152.BLIF \ +state_machine_un13_clk_000_d0_i_n.BLIF N_153.BLIF \ +state_machine_un15_clk_000_d0_0_n.BLIF N_164.BLIF \ +state_machine_un6_bgack_000_0_n.BLIF N_167.BLIF N_225_1.BLIF N_168.BLIF \ +N_225_2.BLIF N_169.BLIF N_225_3.BLIF N_170.BLIF N_225_4.BLIF N_171.BLIF \ +N_225_5.BLIF N_172.BLIF N_225_6.BLIF N_173.BLIF N_228_1.BLIF N_225.BLIF \ +N_228_2.BLIF N_228.BLIF N_69_i_1.BLIF CLK_000_D0_i.BLIF N_69_i_2.BLIF \ +BGACK_030_INT_i.BLIF N_69_i_3.BLIF CLK_030_i.BLIF N_69_i_4.BLIF \ +cpu_est_i_3__n.BLIF N_69_i_5.BLIF sm_amiga_i_6__n.BLIF \ +state_machine_un8_bgack_030_int_i_0_0_1_n.BLIF nEXP_SPACE_i.BLIF N_72_0_1.BLIF \ +CLK_000_D4_i.BLIF N_51_0_1.BLIF sm_amiga_i_5__n.BLIF N_51_0_2.BLIF \ +sm_amiga_i_4__n.BLIF cpu_est_ns_0_1_1__n.BLIF AS_000_i.BLIF \ +cpu_est_ns_0_2_1__n.BLIF LDS_000_i.BLIF N_128_1.BLIF UDS_000_i.BLIF \ +N_128_2.BLIF cpu_est_i_1__n.BLIF N_118_1.BLIF cpu_est_i_0__n.BLIF N_118_2.BLIF \ +DTACK_D0_i.BLIF N_118_3.BLIF VMA_INT_i.BLIF N_206_1.BLIF VPA_D_i.BLIF \ +N_206_2.BLIF AS_000_DMA_i.BLIF sm_amiga_ns_0_1_0__n.BLIF CLK_030_H_i.BLIF \ +cpu_est_ns_0_1_2__n.BLIF RW_i.BLIF N_53_0_1.BLIF cpu_est_i_2__n.BLIF \ +N_43_i_1.BLIF sm_amiga_i_0__n.BLIF state_machine_lds_000_int_7_0_1_n.BLIF \ +sm_amiga_i_3__n.BLIF state_machine_uds_000_int_7_0_1_n.BLIF \ +sm_amiga_i_7__n.BLIF N_199_0_1.BLIF A0_i.BLIF N_152_1.BLIF size_i_1__n.BLIF \ +N_147_1.BLIF DS_030_i.BLIF N_139_1.BLIF a_i_19__n.BLIF N_137_1.BLIF \ +a_i_16__n.BLIF N_127_1.BLIF a_i_18__n.BLIF N_120_1.BLIF a_i_30__n.BLIF \ +state_machine_a0_dma_2_1_n.BLIF a_i_31__n.BLIF N_116_1.BLIF a_i_28__n.BLIF \ +N_115_1.BLIF a_i_29__n.BLIF state_machine_un13_clk_000_d0_1_n.BLIF \ +a_i_26__n.BLIF N_203_1.BLIF a_i_27__n.BLIF \ +state_machine_uds_000_int_7_0_m3_un3_n.BLIF a_i_24__n.BLIF \ +state_machine_uds_000_int_7_0_m3_un1_n.BLIF a_i_25__n.BLIF \ +state_machine_uds_000_int_7_0_m3_un0_n.BLIF RST_i.BLIF dsack1_int_0_un3_n.BLIF \ +dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF N_205_i.BLIF \ +vma_int_0_un3_n.BLIF FPU_CS_INT_i.BLIF vma_int_0_un1_n.BLIF \ +CLK_OUT_PRE_50_D_i.BLIF vma_int_0_un0_n.BLIF AS_030_c.BLIF \ +bgack_030_int_0_un3_n.BLIF bgack_030_int_0_un1_n.BLIF AS_000_c.BLIF \ +bgack_030_int_0_un0_n.BLIF ipl_030_0_0__un3_n.BLIF DS_030_c.BLIF \ +ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF UDS_000_c.BLIF \ +ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un1_n.BLIF LDS_000_c.BLIF \ +ipl_030_0_1__un0_n.BLIF ipl_030_0_2__un3_n.BLIF size_c_0__n.BLIF \ +ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF size_c_1__n.BLIF \ +cpu_estse_0_un3_n.BLIF cpu_estse_0_un1_n.BLIF a_c_16__n.BLIF \ +cpu_estse_0_un0_n.BLIF cpu_estse_1_un3_n.BLIF a_c_17__n.BLIF \ +cpu_estse_1_un1_n.BLIF cpu_estse_1_un0_n.BLIF a_c_18__n.BLIF \ +cpu_estse_2_un3_n.BLIF cpu_estse_2_un1_n.BLIF a_c_19__n.BLIF \ +cpu_estse_2_un0_n.BLIF amiga_bus_enable_0_un3_n.BLIF a_c_20__n.BLIF \ +amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF a_c_21__n.BLIF \ +as_030_000_sync_0_un3_n.BLIF as_030_000_sync_0_un1_n.BLIF a_c_22__n.BLIF \ +as_030_000_sync_0_un0_n.BLIF clk_030_h_0_un3_n.BLIF a_c_23__n.BLIF \ +clk_030_h_0_un1_n.BLIF clk_030_h_0_un0_n.BLIF a_c_24__n.BLIF \ +uds_000_int_0_un3_n.BLIF uds_000_int_0_un1_n.BLIF a_c_25__n.BLIF \ +uds_000_int_0_un0_n.BLIF lds_000_int_0_un3_n.BLIF a_c_26__n.BLIF \ +lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF a_c_27__n.BLIF \ +fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un1_n.BLIF a_c_28__n.BLIF \ +fpu_cs_int_0_un0_n.BLIF bg_000_0_un3_n.BLIF a_c_29__n.BLIF bg_000_0_un1_n.BLIF \ +bg_000_0_un0_n.BLIF a_c_30__n.BLIF ds_000_dma_0_un3_n.BLIF \ +ds_000_dma_0_un1_n.BLIF a_c_31__n.BLIF ds_000_dma_0_un0_n.BLIF \ +as_000_dma_0_un3_n.BLIF A0_c.BLIF as_000_dma_0_un1_n.BLIF \ +as_000_dma_0_un0_n.BLIF nEXP_SPACE_c.BLIF as_000_int_0_un3_n.BLIF \ +as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF BG_030_c.BLIF \ +BG_000DFFSHreg.BLIF BGACK_000_c.BLIF AS_030.PIN.BLIF AS_000.PIN.BLIF \ +DS_030.PIN.BLIF UDS_000.PIN.BLIF LDS_000.PIN.BLIF SIZE_0_.PIN.BLIF \ +SIZE_1_.PIN.BLIF A0.PIN.BLIF DSACK_1_.PIN.BLIF DTACK.PIN.BLIF .outputs IPL_030_2_ BERR BG_000 BGACK_030 CLK_DIV_OUT CLK_EXP FPU_CS AVEC \ AVEC_EXP E VMA RESET AMIGA_BUS_ENABLE AMIGA_BUS_DATA_DIR AMIGA_BUS_ENABLE_LOW \ CIIN IPL_030_1_ IPL_030_0_ cpu_est_0_.D cpu_est_0_.C cpu_est_0_.AR \ cpu_est_1_.D cpu_est_1_.C cpu_est_1_.AR cpu_est_2_.D cpu_est_2_.C \ -cpu_est_2_.AR cpu_est_3_reg.D cpu_est_3_reg.C cpu_est_3_reg.AR SM_AMIGA_1_.D \ -SM_AMIGA_1_.C SM_AMIGA_1_.AR SM_AMIGA_0_.D SM_AMIGA_0_.C SM_AMIGA_0_.AR \ +cpu_est_2_.AR cpu_est_3_reg.D cpu_est_3_reg.C cpu_est_3_reg.AR SM_AMIGA_0_.D \ +SM_AMIGA_0_.C SM_AMIGA_0_.AR SIZE_DMA_1_.D SIZE_DMA_1_.C SIZE_DMA_1_.AP \ IPL_030DFFSH_0_reg.D IPL_030DFFSH_0_reg.C IPL_030DFFSH_0_reg.AP \ IPL_030DFFSH_1_reg.D IPL_030DFFSH_1_reg.C IPL_030DFFSH_1_reg.AP \ IPL_030DFFSH_2_reg.D IPL_030DFFSH_2_reg.C IPL_030DFFSH_2_reg.AP SM_AMIGA_7_.D \ SM_AMIGA_7_.C SM_AMIGA_7_.AP SM_AMIGA_6_.D SM_AMIGA_6_.C SM_AMIGA_6_.AR \ SM_AMIGA_5_.D SM_AMIGA_5_.C SM_AMIGA_5_.AR SM_AMIGA_4_.D SM_AMIGA_4_.C \ SM_AMIGA_4_.AR SM_AMIGA_3_.D SM_AMIGA_3_.C SM_AMIGA_3_.AR SM_AMIGA_2_.D \ -SM_AMIGA_2_.C SM_AMIGA_2_.AR inst_AS_000_INT.D inst_AS_000_INT.C \ -inst_AS_000_INT.AP inst_VPA_SYNC.D inst_VPA_SYNC.C inst_VPA_SYNC.AP \ -inst_VMA_INTreg.D inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_BGACK_030_INTreg.D \ -inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE.D \ -inst_CLK_OUT_PRE.C inst_CLK_OUT_PRE.AR SIZE_DMA_0_.D SIZE_DMA_0_.C \ -SIZE_DMA_0_.AP SIZE_DMA_1_.D SIZE_DMA_1_.C SIZE_DMA_1_.AP inst_DS_000_DMA.D \ -inst_DS_000_DMA.C inst_DS_000_DMA.AP inst_FPU_CS_INTreg.D inst_FPU_CS_INTreg.C \ -inst_FPU_CS_INTreg.AP inst_DTACK_SYNC.D inst_DTACK_SYNC.C inst_DTACK_SYNC.AP \ -inst_A0_DMA.D inst_A0_DMA.C inst_A0_DMA.AP BG_000DFFSHreg.D BG_000DFFSHreg.C \ -BG_000DFFSHreg.AP inst_DSACK1_INT.D inst_DSACK1_INT.C inst_DSACK1_INT.AP \ -inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_000_DMA.AP \ -AMIGA_BUS_ENABLEDFFSHreg.D AMIGA_BUS_ENABLEDFFSHreg.C \ -AMIGA_BUS_ENABLEDFFSHreg.AP inst_UDS_000_INT.D inst_UDS_000_INT.C \ -inst_UDS_000_INT.AP inst_LDS_000_INT.D inst_LDS_000_INT.C inst_LDS_000_INT.AP \ -inst_AS_030_000_SYNC.D inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP \ -inst_CLK_000_D4.D inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_CLK_000_D5.D \ -inst_CLK_000_D5.C inst_CLK_000_D5.AP inst_CLK_000_D3.D inst_CLK_000_D3.C \ -inst_CLK_000_D3.AP CLK_CNT_P_0_.D CLK_CNT_P_0_.C CLK_CNT_P_0_.AR \ -inst_CLK_000_D2.D inst_CLK_000_D2.C inst_CLK_000_D2.AP inst_CLK_000_D1.D \ -inst_CLK_000_D1.C inst_CLK_000_D1.AP CLK_OUT_INTreg.D CLK_OUT_INTreg.C \ -CLK_OUT_INTreg.AR inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C \ -inst_BGACK_030_INT_D.AP inst_CLK_000_D0.D inst_CLK_000_D0.C inst_CLK_000_D0.AP \ -inst_VPA_D.D inst_VPA_D.C inst_VPA_D.AP RESETDFFRHreg.D RESETDFFRHreg.C \ -RESETDFFRHreg.AR SIZE_1_ DSACK_1_ AS_030 AS_000 DS_030 UDS_000 LDS_000 A0 \ -DTACK SIZE_0_ DSACK_0_ BG_030_c as_030_000_sync_0_un1_n \ -as_030_000_sync_0_un0_n ds_000_dma_0_un3_n ds_000_dma_0_un1_n \ -ds_000_dma_0_un0_n BGACK_000_c fpu_cs_int_0_un3_n fpu_cs_int_0_un1_n CLK_030_c \ -fpu_cs_int_0_un0_n dtack_sync_0_un3_n CLK_000_c dtack_sync_0_un1_n \ -dtack_sync_0_un0_n CLK_OSZI_c a0_dma_0_un3_n a0_dma_0_un1_n a0_dma_0_un0_n \ -bg_000_0_un3_n bg_000_0_un1_n bg_000_0_un0_n vcc_n_n gnd_n_n ipl_c_0__n \ -ipl_c_1__n ipl_c_2__n dsack_c_1__n DTACK_c state_machine_un59_bgack_030_int_n \ -state_machine_un6_bgack_000_n RST_c state_machine_un10_bg_030_n RW_c \ -un1_AS_030_000_SYNC_1_sqmuxa_1 SIZE_DMA_0_sqmuxa fc_c_0__n \ -state_machine_a0_dma_4_n state_machine_ds_000_dma_5_n fc_c_1__n \ -state_machine_lds_000_int_7_n state_machine_uds_000_int_7_n \ -AMIGA_BUS_DATA_DIR_c N_88_0 N_86_0 A0_DMA_0_sqmuxa_i_0_0 N_83_i \ -AS_030_000_SYNC_i N_81_i N_80_i DS_030_c_i N_79_i N_172_i \ -un1_AS_030_000_SYNC_1_sqmuxa_1_0 CLK_030_c_i N_77_i N_174_i N_76_0 N_74_i \ -CLK_000_D1_i N_73_i sm_amiga_i_1__n N_72_i N_171_i N_66_i AS_030_c_i N_65_i \ -N_64_i N_63_i N_167_i cpu_est_ns_1__n N_168_i cpu_est_ns_2__n \ -cpu_est_ns_e_0_0__n A0_DMA_0_sqmuxa_i_0 N_163_i N_224 N_164_i N_225 N_165_i \ -N_226 sm_amiga_ns_e_0_0__n N_227 N_160_i N_228 N_161_i N_31 N_162_i N_33 \ -sm_amiga_ns_e_0_1__n N_35 N_98_i N_37 N_159_i N_39 cpu_est_ns_0_2__n N_158_i \ -N_63 state_machine_amiga_bus_enable_6_iv_i_n N_64 N_157_i N_65 \ -state_machine_ds_000_dma_5_0_n N_66 N_155_i N_67 N_156_i N_72 \ -AMIGA_BUS_DATA_DIR_c_0 N_73 N_153_i N_74 N_154_i N_76 N_177_i N_80 N_176_i \ -N_81 N_179_i N_83 cpu_est_ns_0_1__n N_86 N_152_i N_88 N_98 N_151_i N_108 N_109 \ -N_150_i N_126 N_197_i N_231 N_232 N_148_i N_233 N_149_i N_234 \ -sm_amiga_ns_e_0_5__n N_235 N_146_i N_236 N_147_i N_237 N_46_0 N_239 N_145_i \ -N_240 N_198_i N_241 N_144 N_67_i N_145 state_machine_uds_000_int_7_0_n N_146 \ -N_144_i N_147 state_machine_lds_000_int_7_0_n N_148 N_96_i_i N_149 N_240_i \ -N_150 N_241_i N_151 N_39_0 N_152 N_237_i N_153 N_239_i N_154 N_37_0 N_155 \ -N_236_i N_156 N_35_0 N_157 N_235_i N_158 N_33_0 N_159 N_175_i N_160 N_31_0 \ -N_161 N_228_0 N_162 BG_030_c_i N_163 N_233_i N_164 \ -state_machine_un10_bg_030_0_n N_165 N_227_0 N_166 N_226_0 N_167 N_108_i N_168 \ -N_109_i N_171 N_225_0 N_172 state_machine_un6_bgack_000_0_n N_173 N_224_0 \ -N_174 CLK_000_D2_i N_175 state_machine_un59_bgack_030_int_0_n N_176 N_253_1 \ -N_179 N_253_2 N_197 N_263_1 N_198 N_263_2 N_263_3 N_263_4 N_236_1 N_263_5 \ -N_253 N_263_6 N_263 N_74_i_1 VMA_INT_i N_74_i_2 VPA_D_i N_74_i_3 DTACK_i \ -N_74_i_4 LDS_000_i N_74_i_5 AS_000_i N_83_i_1 cpu_est_i_0__n N_83_i_2 \ -sm_amiga_i_4__n A0_DMA_0_sqmuxa_i_0_0_1 BGACK_030_INT_i \ -state_machine_a0_dma_4_1_n sm_amiga_i_5__n state_machine_a0_dma_4_2_n \ -cpu_est_i_3__n N_236_1_0 CLK_000_D0_i N_234_1 CLK_000_D4_i N_234_2 \ -cpu_est_i_1__n N_233_1 UDS_000_i N_231_1 CLK_000_D5_i N_231_2 nEXP_SPACE_i \ -N_231_3 AS_000_DMA_i sm_amiga_ns_e_0_1_0__n RW_i sm_amiga_ns_e_0_1_1__n \ -sm_amiga_i_3__n cpu_est_ns_0_1_1__n sm_amiga_i_0__n N_44_i_1 A0_i \ -state_machine_uds_000_int_7_0_1_n size_i_1__n \ -state_machine_lds_000_int_7_0_1_n a_i_30__n N_39_0_1 a_i_31__n N_37_0_1 \ -a_i_28__n N_166_1 a_i_29__n N_164_1 a_i_26__n N_156_1 a_i_27__n N_144_1 \ -a_i_24__n N_240_1 a_i_25__n N_239_1 a_i_19__n N_237_1 a_i_16__n \ -SIZE_DMA_0_sqmuxa_1 a_i_18__n N_232_1 RST_i N_109_1 cpu_est_ns_0_0_m3_2__un3_n \ -SIZE_DMA_0_sqmuxa_i cpu_est_ns_0_0_m3_2__un1_n N_231_i \ -cpu_est_ns_0_0_m3_2__un0_n N_126_i state_machine_lds_000_int_7_0_m3_un3_n \ -N_232_i state_machine_lds_000_int_7_0_m3_un1_n N_234_i \ -state_machine_lds_000_int_7_0_m3_un0_n FPU_CS_INT_i cpu_estse_0_un3_n AS_030_c \ -cpu_estse_0_un1_n cpu_estse_0_un0_n AS_000_c cpu_estse_1_un3_n \ -cpu_estse_1_un1_n DS_030_c cpu_estse_1_un0_n cpu_estse_2_un3_n UDS_000_c \ -cpu_estse_2_un1_n cpu_estse_2_un0_n LDS_000_c dsack1_int_0_un3_n \ -dsack1_int_0_un1_n size_c_0__n dsack1_int_0_un0_n as_000_dma_0_un3_n \ -size_c_1__n as_000_dma_0_un1_n as_000_dma_0_un0_n a_c_16__n as_000_int_0_un3_n \ -as_000_int_0_un1_n a_c_17__n as_000_int_0_un0_n vpa_sync_0_un3_n a_c_18__n \ -vpa_sync_0_un1_n vpa_sync_0_un0_n a_c_19__n vma_int_0_un3_n vma_int_0_un1_n \ -a_c_20__n vma_int_0_un0_n bgack_030_int_0_un3_n a_c_21__n \ -bgack_030_int_0_un1_n bgack_030_int_0_un0_n a_c_22__n size_dma_0_0__un3_n \ -size_dma_0_0__un1_n a_c_23__n size_dma_0_0__un0_n size_dma_0_1__un3_n \ -a_c_24__n size_dma_0_1__un1_n size_dma_0_1__un0_n a_c_25__n ipl_030_0_0__un3_n \ -ipl_030_0_0__un1_n a_c_26__n ipl_030_0_0__un0_n ipl_030_0_1__un3_n a_c_27__n \ -ipl_030_0_1__un1_n ipl_030_0_1__un0_n a_c_28__n ipl_030_0_2__un3_n \ -ipl_030_0_2__un1_n a_c_29__n ipl_030_0_2__un0_n amiga_bus_enable_0_un3_n \ -a_c_30__n amiga_bus_enable_0_un1_n amiga_bus_enable_0_un0_n a_c_31__n \ -uds_000_int_0_un3_n uds_000_int_0_un1_n A0_c uds_000_int_0_un0_n \ -lds_000_int_0_un3_n nEXP_SPACE_c lds_000_int_0_un1_n lds_000_int_0_un0_n \ -as_030_000_sync_0_un3_n AS_030.OE AS_000.OE DS_030.OE UDS_000.OE LDS_000.OE \ -SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE DSACK_0_.OE \ -AVEC_EXP.OE CIIN.OE CLK_OUT_PRE_0 un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 \ -cpu_est_ns_0_0_x2_1_ -.names cpu_est_ns_e_0_0__n.BLIF cpu_est_0_.D -0 1 +SM_AMIGA_2_.C SM_AMIGA_2_.AR SM_AMIGA_1_.D SM_AMIGA_1_.C SM_AMIGA_1_.AR \ +inst_DSACK1_INT.D inst_DSACK1_INT.C inst_DSACK1_INT.AP inst_VMA_INTreg.D \ +inst_VMA_INTreg.C inst_VMA_INTreg.AP inst_BGACK_030_INTreg.D \ +inst_BGACK_030_INTreg.C inst_BGACK_030_INTreg.AP inst_CLK_OUT_PRE_25.D \ +inst_CLK_OUT_PRE_25.C inst_CLK_OUT_PRE_25.AR SIZE_DMA_0_.D SIZE_DMA_0_.C \ +SIZE_DMA_0_.AP inst_UDS_000_INT.D inst_UDS_000_INT.C inst_UDS_000_INT.AP \ +inst_LDS_000_INT.D inst_LDS_000_INT.C inst_LDS_000_INT.AP inst_FPU_CS_INTreg.D \ +inst_FPU_CS_INTreg.C inst_FPU_CS_INTreg.AP BG_000DFFSHreg.D BG_000DFFSHreg.C \ +BG_000DFFSHreg.AP inst_DS_000_DMA.D inst_DS_000_DMA.C inst_DS_000_DMA.AP \ +inst_AS_000_DMA.D inst_AS_000_DMA.C inst_AS_000_DMA.AP inst_AS_000_INT.D \ +inst_AS_000_INT.C inst_AS_000_INT.AP AMIGA_BUS_ENABLEDFFSHreg.D \ +AMIGA_BUS_ENABLEDFFSHreg.C AMIGA_BUS_ENABLEDFFSHreg.AP inst_AS_030_000_SYNC.D \ +inst_AS_030_000_SYNC.C inst_AS_030_000_SYNC.AP inst_CLK_030_H.D \ +inst_CLK_030_H.C inst_A0_DMA.D inst_A0_DMA.C inst_A0_DMA.AP inst_CLK_000_D4.D \ +inst_CLK_000_D4.C inst_CLK_000_D4.AP inst_DTACK_D0.D inst_DTACK_D0.C \ +inst_DTACK_D0.AP inst_CLK_000_D3.D inst_CLK_000_D3.C inst_CLK_000_D3.AP \ +inst_CLK_000_D2.D inst_CLK_000_D2.C inst_CLK_000_D2.AP CLK_OUT_INTreg.D \ +CLK_OUT_INTreg.C CLK_OUT_INTreg.AR inst_CLK_000_D1.D inst_CLK_000_D1.C \ +inst_CLK_000_D1.AP inst_BGACK_030_INT_D.D inst_BGACK_030_INT_D.C \ +inst_BGACK_030_INT_D.AP inst_CLK_OUT_PRE_50_D.D inst_CLK_OUT_PRE_50_D.C \ +inst_CLK_OUT_PRE_50_D.AR inst_CLK_000_D0.D inst_CLK_000_D0.C \ +inst_CLK_000_D0.AP inst_VPA_D.D inst_VPA_D.C inst_VPA_D.AP \ +inst_CLK_OUT_PRE_50.D inst_CLK_OUT_PRE_50.C inst_CLK_OUT_PRE_50.AR \ +RESETDFFRHreg.D RESETDFFRHreg.C RESETDFFRHreg.AR SIZE_1_ DSACK_1_ AS_030 \ +AS_000 DS_030 UDS_000 LDS_000 A0 DTACK SIZE_0_ DSACK_0_ CLK_030_c CLK_000_c \ +CLK_OSZI_c ipl_c_0__n ipl_c_1__n ipl_c_2__n vcc_n_n gnd_n_n dsack_c_1__n \ +state_machine_un13_clk_000_d0_n clk_un3_clk_out_pre_50_n RST_c \ +state_machine_un6_bgack_000_n state_machine_un15_clk_000_d0_n RW_c fc_c_0__n \ +fc_c_1__n un1_AMIGA_BUS_ENABLE_1_sqmuxa_2 AMIGA_BUS_DATA_DIR_c \ +state_machine_ds_000_dma_3_n cpu_est_ns_0_1__n state_machine_un10_bg_030_n \ +N_134_i state_machine_lds_000_int_7_n N_169_i state_machine_uds_000_int_7_n \ +N_133_i N_167_i N_51_0 N_140_i N_202_0 N_86_0 N_171_i \ +un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0 N_82_i sm_amiga_i_1__n N_78_i N_170_i N_77_0 \ +CLK_000_D1_i N_76_i N_74_i N_72_0 AS_030_000_SYNC_i CLK_000_D2_i \ +state_machine_un8_bgack_030_int_i_0_0_n N_69_i AS_030_c_i N_65_i N_64_i N_62_i \ +N_152_i N_153_i cpu_est_ns_1__n N_61_0 cpu_est_ns_2__n N_150_i \ +state_machine_un8_bgack_030_int_i_0_n N_148_i N_197 N_149_i N_198 N_199 \ +N_123_i N_200 N_145_i N_201 N_146_i sm_amiga_ns_0_0__n N_51 N_142_i N_53 \ +N_143_i N_61 N_144_i N_62 cpu_est_ns_0_2__n N_64 N_141_i N_65 N_53_0 N_66 \ +N_139_i N_69 state_machine_amiga_bus_enable_4_iv_i_n N_72 N_138_i N_74 N_48_i \ +N_76 N_136_i N_77 N_137_i N_78 AMIGA_BUS_DATA_DIR_c_0 N_82 N_135_i N_86 \ +N_168_i N_202 N_151_i N_203 N_132_i N_205 N_164_i N_206 N_115 N_130_i N_116 \ +N_131_i N_117 N_41_0 N_118 N_128_i N_120 N_129_i N_121 sm_amiga_ns_0_5__n \ +N_122 N_126_i N_123 N_127_i N_124 N_125 N_125_i N_126 N_127 N_124_i N_128 \ +N_129 N_122_i N_130 N_131 N_172_i N_132 state_machine_size_dma_4_0_1__n N_133 \ +state_machine_ds_000_dma_3_0_n N_134 N_66_i N_135 N_120_i N_136 \ +state_machine_lds_000_int_7_0_n N_137 state_machine_uds_000_int_7_0_n N_138 \ +N_118_i N_139 N_201_0 N_140 N_117_i N_141 N_200_0 N_142 N_115_i N_143 N_116_i \ +N_144 N_199_0 N_145 BG_030_c_i N_146 N_206_i N_147 \ +state_machine_un10_bg_030_0_n N_148 N_198_0 N_149 N_197_0 N_150 N_203_i N_152 \ +state_machine_un13_clk_000_d0_i_n N_153 state_machine_un15_clk_000_d0_0_n \ +N_164 state_machine_un6_bgack_000_0_n N_167 N_225_1 N_168 N_225_2 N_169 \ +N_225_3 N_170 N_225_4 N_171 N_225_5 N_172 N_225_6 N_173 N_228_1 N_225 N_228_2 \ +N_228 N_69_i_1 CLK_000_D0_i N_69_i_2 BGACK_030_INT_i N_69_i_3 CLK_030_i \ +N_69_i_4 cpu_est_i_3__n N_69_i_5 sm_amiga_i_6__n \ +state_machine_un8_bgack_030_int_i_0_0_1_n nEXP_SPACE_i N_72_0_1 CLK_000_D4_i \ +N_51_0_1 sm_amiga_i_5__n N_51_0_2 sm_amiga_i_4__n cpu_est_ns_0_1_1__n AS_000_i \ +cpu_est_ns_0_2_1__n LDS_000_i N_128_1 UDS_000_i N_128_2 cpu_est_i_1__n N_118_1 \ +cpu_est_i_0__n N_118_2 DTACK_D0_i N_118_3 VMA_INT_i N_206_1 VPA_D_i N_206_2 \ +AS_000_DMA_i sm_amiga_ns_0_1_0__n CLK_030_H_i cpu_est_ns_0_1_2__n RW_i \ +N_53_0_1 cpu_est_i_2__n N_43_i_1 sm_amiga_i_0__n \ +state_machine_lds_000_int_7_0_1_n sm_amiga_i_3__n \ +state_machine_uds_000_int_7_0_1_n sm_amiga_i_7__n N_199_0_1 A0_i N_152_1 \ +size_i_1__n N_147_1 DS_030_i N_139_1 a_i_19__n N_137_1 a_i_16__n N_127_1 \ +a_i_18__n N_120_1 a_i_30__n state_machine_a0_dma_2_1_n a_i_31__n N_116_1 \ +a_i_28__n N_115_1 a_i_29__n state_machine_un13_clk_000_d0_1_n a_i_26__n \ +N_203_1 a_i_27__n state_machine_uds_000_int_7_0_m3_un3_n a_i_24__n \ +state_machine_uds_000_int_7_0_m3_un1_n a_i_25__n \ +state_machine_uds_000_int_7_0_m3_un0_n RST_i dsack1_int_0_un3_n \ +dsack1_int_0_un1_n dsack1_int_0_un0_n N_205_i vma_int_0_un3_n FPU_CS_INT_i \ +vma_int_0_un1_n CLK_OUT_PRE_50_D_i vma_int_0_un0_n AS_030_c \ +bgack_030_int_0_un3_n bgack_030_int_0_un1_n AS_000_c bgack_030_int_0_un0_n \ +ipl_030_0_0__un3_n DS_030_c ipl_030_0_0__un1_n ipl_030_0_0__un0_n UDS_000_c \ +ipl_030_0_1__un3_n ipl_030_0_1__un1_n LDS_000_c ipl_030_0_1__un0_n \ +ipl_030_0_2__un3_n size_c_0__n ipl_030_0_2__un1_n ipl_030_0_2__un0_n \ +size_c_1__n cpu_estse_0_un3_n cpu_estse_0_un1_n a_c_16__n cpu_estse_0_un0_n \ +cpu_estse_1_un3_n a_c_17__n cpu_estse_1_un1_n cpu_estse_1_un0_n a_c_18__n \ +cpu_estse_2_un3_n cpu_estse_2_un1_n a_c_19__n cpu_estse_2_un0_n \ +amiga_bus_enable_0_un3_n a_c_20__n amiga_bus_enable_0_un1_n \ +amiga_bus_enable_0_un0_n a_c_21__n as_030_000_sync_0_un3_n \ +as_030_000_sync_0_un1_n a_c_22__n as_030_000_sync_0_un0_n clk_030_h_0_un3_n \ +a_c_23__n clk_030_h_0_un1_n clk_030_h_0_un0_n a_c_24__n uds_000_int_0_un3_n \ +uds_000_int_0_un1_n a_c_25__n uds_000_int_0_un0_n lds_000_int_0_un3_n \ +a_c_26__n lds_000_int_0_un1_n lds_000_int_0_un0_n a_c_27__n fpu_cs_int_0_un3_n \ +fpu_cs_int_0_un1_n a_c_28__n fpu_cs_int_0_un0_n bg_000_0_un3_n a_c_29__n \ +bg_000_0_un1_n bg_000_0_un0_n a_c_30__n ds_000_dma_0_un3_n ds_000_dma_0_un1_n \ +a_c_31__n ds_000_dma_0_un0_n as_000_dma_0_un3_n A0_c as_000_dma_0_un1_n \ +as_000_dma_0_un0_n nEXP_SPACE_c as_000_int_0_un3_n as_000_int_0_un1_n \ +as_000_int_0_un0_n BG_030_c BGACK_000_c AS_030.OE AS_000.OE DS_030.OE \ +UDS_000.OE LDS_000.OE SIZE_0_.OE SIZE_1_.OE A0.OE DSACK_1_.OE DTACK.OE BERR.OE \ +DSACK_0_.OE AVEC_EXP.OE CIIN.OE CLK_OUT_PRE_25_0 +.names N_148_i.BLIF N_149_i.BLIF cpu_est_0_.D +11 1 .names cpu_estse_0_un1_n.BLIF cpu_estse_0_un0_n.BLIF cpu_est_1_.D 1- 1 -1 1 @@ -322,10 +309,10 @@ cpu_est_ns_0_0_x2_1_ .names cpu_estse_2_un1_n.BLIF cpu_estse_2_un0_n.BLIF cpu_est_3_reg.D 1- 1 -1 1 -.names N_46_0.BLIF SM_AMIGA_1_.D -0 1 -.names N_44_i_1.BLIF N_198_i.BLIF SM_AMIGA_0_.D +.names N_43_i_1.BLIF N_164_i.BLIF SM_AMIGA_0_.D 11 1 +.names state_machine_size_dma_4_0_1__n.BLIF SIZE_DMA_1_.D +0 1 .names ipl_030_0_0__un1_n.BLIF ipl_030_0_0__un0_n.BLIF IPL_030DFFSH_0_reg.D 1- 1 -1 1 @@ -335,22 +322,21 @@ cpu_est_ns_0_0_x2_1_ .names ipl_030_0_2__un1_n.BLIF ipl_030_0_2__un0_n.BLIF IPL_030DFFSH_2_reg.D 1- 1 -1 1 -.names sm_amiga_ns_e_0_0__n.BLIF SM_AMIGA_7_.D +.names sm_amiga_ns_0_0__n.BLIF SM_AMIGA_7_.D 0 1 -.names sm_amiga_ns_e_0_1__n.BLIF SM_AMIGA_6_.D +.names N_122_i.BLIF N_123_i.BLIF SM_AMIGA_6_.D +11 1 +.names inst_CLK_000_D0.BLIF N_124_i.BLIF SM_AMIGA_5_.D +11 1 +.names CLK_000_D0_i.BLIF N_125_i.BLIF SM_AMIGA_4_.D +11 1 +.names N_126_i.BLIF N_127_i.BLIF SM_AMIGA_3_.D +11 1 +.names sm_amiga_ns_0_5__n.BLIF SM_AMIGA_2_.D 0 1 -.names N_64.BLIF N_152_i.BLIF SM_AMIGA_5_.D -11 1 -.names N_63.BLIF N_151_i.BLIF SM_AMIGA_4_.D -11 1 -.names N_150_i.BLIF N_197_i.BLIF SM_AMIGA_3_.D -11 1 -.names sm_amiga_ns_e_0_5__n.BLIF SM_AMIGA_2_.D +.names N_41_0.BLIF SM_AMIGA_1_.D 0 1 -.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INT.D -1- 1 --1 1 -.names vpa_sync_0_un1_n.BLIF vpa_sync_0_un0_n.BLIF inst_VPA_SYNC.D +.names dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF inst_DSACK1_INT.D 1- 1 -1 1 .names vma_int_0_un1_n.BLIF vma_int_0_un0_n.BLIF inst_VMA_INTreg.D @@ -360,688 +346,597 @@ cpu_est_ns_0_0_x2_1_ inst_BGACK_030_INTreg.D 1- 1 -1 1 -.names size_dma_0_0__un1_n.BLIF size_dma_0_0__un0_n.BLIF SIZE_DMA_0_.D -1- 1 --1 1 -.names size_dma_0_1__un1_n.BLIF size_dma_0_1__un0_n.BLIF SIZE_DMA_1_.D -1- 1 --1 1 -.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF inst_DS_000_DMA.D -1- 1 --1 1 -.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D -1- 1 --1 1 -.names dtack_sync_0_un1_n.BLIF dtack_sync_0_un0_n.BLIF inst_DTACK_SYNC.D -1- 1 --1 1 -.names a0_dma_0_un1_n.BLIF a0_dma_0_un0_n.BLIF inst_A0_DMA.D -1- 1 --1 1 -.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF BG_000DFFSHreg.D -1- 1 --1 1 -.names dsack1_int_0_un1_n.BLIF dsack1_int_0_un0_n.BLIF inst_DSACK1_INT.D -1- 1 --1 1 -.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF inst_AS_000_DMA.D -1- 1 --1 1 -.names amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF \ -AMIGA_BUS_ENABLEDFFSHreg.D -1- 1 --1 1 +.names N_121.BLIF SIZE_DMA_0_.D +0 1 .names uds_000_int_0_un1_n.BLIF uds_000_int_0_un0_n.BLIF inst_UDS_000_INT.D 1- 1 -1 1 .names lds_000_int_0_un1_n.BLIF lds_000_int_0_un0_n.BLIF inst_LDS_000_INT.D 1- 1 -1 1 +.names fpu_cs_int_0_un1_n.BLIF fpu_cs_int_0_un0_n.BLIF inst_FPU_CS_INTreg.D +1- 1 +-1 1 +.names bg_000_0_un1_n.BLIF bg_000_0_un0_n.BLIF BG_000DFFSHreg.D +1- 1 +-1 1 +.names ds_000_dma_0_un1_n.BLIF ds_000_dma_0_un0_n.BLIF inst_DS_000_DMA.D +1- 1 +-1 1 +.names as_000_dma_0_un1_n.BLIF as_000_dma_0_un0_n.BLIF inst_AS_000_DMA.D +1- 1 +-1 1 +.names as_000_int_0_un1_n.BLIF as_000_int_0_un0_n.BLIF inst_AS_000_INT.D +1- 1 +-1 1 +.names amiga_bus_enable_0_un1_n.BLIF amiga_bus_enable_0_un0_n.BLIF \ +AMIGA_BUS_ENABLEDFFSHreg.D +1- 1 +-1 1 .names as_030_000_sync_0_un1_n.BLIF as_030_000_sync_0_un0_n.BLIF \ inst_AS_030_000_SYNC.D 1- 1 -1 1 -.names CLK_CNT_P_0_.BLIF CLK_CNT_P_0_.D +.names clk_030_h_0_un1_n.BLIF clk_030_h_0_un0_n.BLIF inst_CLK_030_H.D +1- 1 +-1 1 +.names state_machine_a0_dma_2_1_n.BLIF N_173.BLIF inst_A0_DMA.D +11 1 +.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50.D 0 1 -.names un1_AS_030_000_SYNC_1_sqmuxa_1.BLIF N_35.BLIF as_030_000_sync_0_un1_n -11 1 -.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ -as_030_000_sync_0_un0_n -11 1 -.names N_224.BLIF ds_000_dma_0_un3_n -0 1 -.names state_machine_ds_000_dma_5_n.BLIF N_224.BLIF ds_000_dma_0_un1_n -11 1 -.names inst_DS_000_DMA.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n -11 1 -.names N_33.BLIF fpu_cs_int_0_un3_n -0 1 -.names AS_030_c.BLIF N_33.BLIF fpu_cs_int_0_un1_n -11 1 -.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n -11 1 -.names N_228.BLIF dtack_sync_0_un3_n -0 1 -.names N_234_i.BLIF N_228.BLIF dtack_sync_0_un1_n -11 1 -.names inst_DTACK_SYNC.BLIF dtack_sync_0_un3_n.BLIF dtack_sync_0_un0_n -11 1 -.names N_224.BLIF a0_dma_0_un3_n -0 1 -.names state_machine_a0_dma_4_n.BLIF N_224.BLIF a0_dma_0_un1_n -11 1 -.names inst_A0_DMA.BLIF a0_dma_0_un3_n.BLIF a0_dma_0_un0_n -11 1 -.names state_machine_un10_bg_030_n.BLIF bg_000_0_un3_n -0 1 -.names BG_030_c.BLIF state_machine_un10_bg_030_n.BLIF bg_000_0_un1_n -11 1 -.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n -11 1 .names vcc_n_n 1 .names gnd_n_n -.names state_machine_un59_bgack_030_int_0_n.BLIF \ -state_machine_un59_bgack_030_int_n -0 1 +.names state_machine_un13_clk_000_d0_1_n.BLIF N_168.BLIF \ +state_machine_un13_clk_000_d0_n +11 1 +.names inst_CLK_OUT_PRE_50.BLIF CLK_OUT_PRE_50_D_i.BLIF \ +clk_un3_clk_out_pre_50_n +11 1 .names state_machine_un6_bgack_000_0_n.BLIF state_machine_un6_bgack_000_n 0 1 -.names state_machine_un10_bg_030_0_n.BLIF state_machine_un10_bg_030_n +.names state_machine_un15_clk_000_d0_0_n.BLIF state_machine_un15_clk_000_d0_n 0 1 -.names un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1 -0 1 -.names SIZE_DMA_0_sqmuxa_1.BLIF N_77_i.BLIF SIZE_DMA_0_sqmuxa -11 1 -.names state_machine_a0_dma_4_1_n.BLIF state_machine_a0_dma_4_2_n.BLIF \ -state_machine_a0_dma_4_n -11 1 -.names state_machine_ds_000_dma_5_0_n.BLIF state_machine_ds_000_dma_5_n -0 1 -.names state_machine_lds_000_int_7_0_n.BLIF state_machine_lds_000_int_7_n -0 1 -.names state_machine_uds_000_int_7_0_n.BLIF state_machine_uds_000_int_7_n +.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_2 0 1 .names AMIGA_BUS_DATA_DIR_c_0.BLIF AMIGA_BUS_DATA_DIR_c 0 1 -.names N_63_i.BLIF SM_AMIGA_4_.BLIF N_88_0 -11 1 -.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_5_.BLIF N_86_0 -11 1 -.names A0_DMA_0_sqmuxa_i_0_0_1.BLIF N_171_i.BLIF A0_DMA_0_sqmuxa_i_0_0 -11 1 -.names N_83_i_1.BLIF N_83_i_2.BLIF N_83_i -11 1 -.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i +.names state_machine_ds_000_dma_3_0_n.BLIF state_machine_ds_000_dma_3_n 0 1 -.names cpu_est_3_reg.BLIF cpu_est_i_1__n.BLIF N_81_i +.names cpu_est_ns_0_1_1__n.BLIF cpu_est_ns_0_2_1__n.BLIF cpu_est_ns_0_1__n 11 1 -.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_6_.BLIF N_80_i -11 1 -.names DS_030_c.BLIF DS_030_c_i +.names state_machine_un10_bg_030_0_n.BLIF state_machine_un10_bg_030_n 0 1 -.names inst_BGACK_030_INTreg.BLIF DS_030_c_i.BLIF N_79_i -11 1 -.names N_172.BLIF N_172_i +.names N_134.BLIF N_134_i 0 1 -.names N_65_i.BLIF N_172_i.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1_0 -11 1 -.names CLK_030_c.BLIF CLK_030_c_i +.names state_machine_lds_000_int_7_0_n.BLIF state_machine_lds_000_int_7_n 0 1 -.names BGACK_030_INT_i.BLIF CLK_030_c_i.BLIF N_77_i -11 1 -.names N_174.BLIF N_174_i +.names N_169.BLIF N_169_i 0 1 -.names N_64_i.BLIF N_174_i.BLIF N_76_0 -11 1 -.names N_74_i_4.BLIF N_74_i_5.BLIF N_74_i -11 1 -.names inst_CLK_000_D1.BLIF CLK_000_D1_i +.names state_machine_uds_000_int_7_0_n.BLIF state_machine_uds_000_int_7_n 0 1 -.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF N_73_i -11 1 -.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +.names N_133.BLIF N_133_i 0 1 -.names sm_amiga_i_0__n.BLIF sm_amiga_i_1__n.BLIF N_72_i +.names N_167.BLIF N_167_i +0 1 +.names N_51_0_1.BLIF N_51_0_2.BLIF N_51_0 +11 1 +.names N_140.BLIF N_140_i +0 1 +.names AS_000_DMA_i.BLIF CLK_030_c.BLIF N_202_0 +11 1 +.names CLK_000_D0_i.BLIF N_74_i.BLIF N_86_0 11 1 .names N_171.BLIF N_171_i 0 1 -.names inst_CLK_000_D4.BLIF SM_AMIGA_5_.BLIF N_66_i +.names N_65_i.BLIF N_171_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0 +11 1 +.names cpu_est_3_reg.BLIF cpu_est_i_1__n.BLIF N_82_i +11 1 +.names SM_AMIGA_1_.BLIF sm_amiga_i_1__n +0 1 +.names sm_amiga_i_0__n.BLIF sm_amiga_i_1__n.BLIF N_78_i +11 1 +.names N_170.BLIF N_170_i +0 1 +.names CLK_000_D0_i.BLIF N_170_i.BLIF N_77_0 +11 1 +.names inst_CLK_000_D1.BLIF CLK_000_D1_i +0 1 +.names inst_CLK_000_D0.BLIF CLK_000_D1_i.BLIF N_76_i +11 1 +.names SM_AMIGA_6_.BLIF nEXP_SPACE_c.BLIF N_74_i +11 1 +.names N_72_0_1.BLIF CLK_000_D2_i.BLIF N_72_0 +11 1 +.names inst_AS_030_000_SYNC.BLIF AS_030_000_SYNC_i +0 1 +.names inst_CLK_000_D2.BLIF CLK_000_D2_i +0 1 +.names state_machine_un8_bgack_030_int_i_0_0_1_n.BLIF BGACK_030_INT_i.BLIF \ +state_machine_un8_bgack_030_int_i_0_0_n +11 1 +.names N_69_i_4.BLIF N_69_i_5.BLIF N_69_i 11 1 .names AS_030_c.BLIF AS_030_c_i 0 1 -.names AS_030_c_i.BLIF N_232_i.BLIF N_65_i +.names AS_030_c_i.BLIF N_205_i.BLIF N_65_i 11 1 -.names inst_BGACK_030_INTreg.BLIF CLK_000_D0_i.BLIF N_64_i +.names inst_CLK_000_D4.BLIF SM_AMIGA_5_.BLIF N_64_i 11 1 -.names inst_BGACK_030_INTreg.BLIF inst_CLK_000_D0.BLIF N_63_i +.names inst_CLK_000_D0.BLIF SM_AMIGA_4_.BLIF N_62_i 11 1 -.names N_167.BLIF N_167_i -0 1 -.names cpu_est_ns_0_1__n.BLIF cpu_est_ns_1__n -0 1 -.names N_168.BLIF N_168_i -0 1 -.names cpu_est_ns_0_2__n.BLIF cpu_est_ns_2__n -0 1 -.names N_167_i.BLIF N_168_i.BLIF cpu_est_ns_e_0_0__n -11 1 -.names A0_DMA_0_sqmuxa_i_0_0.BLIF A0_DMA_0_sqmuxa_i_0 -0 1 -.names N_163.BLIF N_163_i -0 1 -.names N_224_0.BLIF N_224 -0 1 -.names N_164.BLIF N_164_i -0 1 -.names N_225_0.BLIF N_225 -0 1 -.names N_165.BLIF N_165_i -0 1 -.names N_226_0.BLIF N_226 -0 1 -.names sm_amiga_ns_e_0_1_0__n.BLIF N_164_i.BLIF sm_amiga_ns_e_0_0__n -11 1 -.names N_227_0.BLIF N_227 -0 1 -.names N_160.BLIF N_160_i -0 1 -.names N_228_0.BLIF N_228 -0 1 -.names N_161.BLIF N_161_i -0 1 -.names N_31_0.BLIF N_31 -0 1 -.names N_162.BLIF N_162_i -0 1 -.names N_33_0.BLIF N_33 -0 1 -.names sm_amiga_ns_e_0_1_1__n.BLIF N_161_i.BLIF sm_amiga_ns_e_0_1__n -11 1 -.names N_35_0.BLIF N_35 -0 1 -.names N_98.BLIF N_98_i -0 1 -.names N_37_0.BLIF N_37 -0 1 -.names N_159.BLIF N_159_i -0 1 -.names N_39_0.BLIF N_39 -0 1 -.names N_98_i.BLIF N_159_i.BLIF cpu_est_ns_0_2__n -11 1 -.names N_158.BLIF N_158_i -0 1 -.names N_63_i.BLIF N_63 -0 1 -.names inst_BGACK_030_INTreg.BLIF N_158_i.BLIF \ -state_machine_amiga_bus_enable_6_iv_i_n -11 1 -.names N_64_i.BLIF N_64 -0 1 -.names N_157.BLIF N_157_i -0 1 -.names N_65_i.BLIF N_65 -0 1 -.names A0_DMA_0_sqmuxa_i_0_0.BLIF N_157_i.BLIF state_machine_ds_000_dma_5_0_n -11 1 -.names N_66_i.BLIF N_66 -0 1 -.names N_155.BLIF N_155_i -0 1 -.names state_machine_lds_000_int_7_0_m3_un1_n.BLIF \ -state_machine_lds_000_int_7_0_m3_un0_n.BLIF N_67 -1- 1 --1 1 -.names N_156.BLIF N_156_i -0 1 -.names N_72_i.BLIF N_72 -0 1 -.names N_155_i.BLIF N_156_i.BLIF AMIGA_BUS_DATA_DIR_c_0 -11 1 -.names N_73_i.BLIF N_73 +.names N_152.BLIF N_152_i 0 1 .names N_153.BLIF N_153_i 0 1 -.names N_74_i.BLIF N_74 +.names cpu_est_ns_0_1__n.BLIF cpu_est_ns_1__n 0 1 -.names N_154.BLIF N_154_i -0 1 -.names N_76_0.BLIF N_76 -0 1 -.names N_153_i.BLIF N_154_i.BLIF N_177_i +.names N_152_i.BLIF N_153_i.BLIF N_61_0 11 1 -.names N_80_i.BLIF N_80 +.names cpu_est_ns_0_2__n.BLIF cpu_est_ns_2__n 0 1 -.names N_176.BLIF N_176_i -0 1 -.names N_81_i.BLIF N_81 -0 1 -.names N_179.BLIF N_179_i -0 1 -.names N_83_i.BLIF N_83 -0 1 -.names cpu_est_ns_0_1_1__n.BLIF N_179_i.BLIF cpu_est_ns_0_1__n -11 1 -.names N_86_0.BLIF N_86 -0 1 -.names N_152.BLIF N_152_i -0 1 -.names N_88_0.BLIF N_88 -0 1 -.names cpu_est_ns_0_0_m3_2__un1_n.BLIF cpu_est_ns_0_0_m3_2__un0_n.BLIF N_98 -1- 1 --1 1 -.names N_151.BLIF N_151_i -0 1 -.names inst_BGACK_030_INTreg.BLIF SM_AMIGA_7_.BLIF N_108 -11 1 -.names N_109_1.BLIF VPA_D_i.BLIF N_109 -11 1 .names N_150.BLIF N_150_i 0 1 -.names inst_BGACK_030_INTreg.BLIF N_66_i.BLIF N_126 -11 1 -.names N_197.BLIF N_197_i +.names state_machine_un8_bgack_030_int_i_0_0_n.BLIF \ +state_machine_un8_bgack_030_int_i_0_n 0 1 -.names N_231_3.BLIF VPA_D_i.BLIF N_231 -11 1 -.names N_232_1.BLIF SM_AMIGA_1_.BLIF N_232 -11 1 .names N_148.BLIF N_148_i 0 1 -.names N_233_1.BLIF N_236_1.BLIF N_233 -11 1 +.names N_197_0.BLIF N_197 +0 1 .names N_149.BLIF N_149_i 0 1 -.names N_234_1.BLIF N_234_2.BLIF N_234 -11 1 -.names N_148_i.BLIF N_149_i.BLIF sm_amiga_ns_e_0_5__n -11 1 -.names CLK_030_c.BLIF N_74_i.BLIF N_235 -11 1 -.names N_146.BLIF N_146_i +.names N_198_0.BLIF N_198 0 1 -.names N_236_1_0.BLIF N_74.BLIF N_236 -11 1 -.names N_147.BLIF N_147_i +.names N_199_0.BLIF N_199 +0 1 +.names N_123.BLIF N_123_i +0 1 +.names N_200_0.BLIF N_200 0 1 -.names N_237_1.BLIF SM_AMIGA_4_.BLIF N_237 -11 1 -.names N_146_i.BLIF N_147_i.BLIF N_46_0 -11 1 -.names N_239_1.BLIF RW_c.BLIF N_239 -11 1 .names N_145.BLIF N_145_i 0 1 -.names N_240_1.BLIF inst_BGACK_030_INT_D.BLIF N_240 -11 1 -.names N_198.BLIF N_198_i +.names N_201_0.BLIF N_201 0 1 -.names inst_BGACK_030_INT_D.BLIF N_173.BLIF N_241 -11 1 -.names N_144_1.BLIF size_i_1__n.BLIF N_144 -11 1 -.names N_67.BLIF N_67_i +.names N_146.BLIF N_146_i 0 1 -.names N_76.BLIF sm_amiga_i_0__n.BLIF N_145 -11 1 -.names state_machine_uds_000_int_7_0_1_n.BLIF N_67_i.BLIF \ -state_machine_uds_000_int_7_0_n -11 1 -.names N_76.BLIF SM_AMIGA_1_.BLIF N_146 +.names sm_amiga_ns_0_1_0__n.BLIF N_145_i.BLIF sm_amiga_ns_0_0__n 11 1 +.names N_51_0.BLIF N_51 +0 1 +.names N_142.BLIF N_142_i +0 1 +.names N_53_0.BLIF N_53 +0 1 +.names N_143.BLIF N_143_i +0 1 +.names N_61_0.BLIF N_61 +0 1 .names N_144.BLIF N_144_i 0 1 -.names N_63_i.BLIF SM_AMIGA_2_.BLIF N_147 -11 1 -.names state_machine_lds_000_int_7_0_1_n.BLIF N_79_i.BLIF \ -state_machine_lds_000_int_7_0_n -11 1 -.names N_63.BLIF SM_AMIGA_2_.BLIF N_148 -11 1 -.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2.BLIF N_96_i_i +.names N_62_i.BLIF N_62 0 1 -.names N_197.BLIF SM_AMIGA_3_.BLIF N_149 +.names cpu_est_ns_0_1_2__n.BLIF N_143_i.BLIF cpu_est_ns_0_2__n 11 1 -.names N_240.BLIF N_240_i +.names N_64_i.BLIF N_64 0 1 -.names N_88.BLIF sm_amiga_i_3__n.BLIF N_150 -11 1 -.names N_241.BLIF N_241_i +.names N_141.BLIF N_141_i 0 1 -.names N_86.BLIF sm_amiga_i_4__n.BLIF N_151 -11 1 -.names N_39_0_1.BLIF N_241_i.BLIF N_39_0 -11 1 -.names N_80.BLIF sm_amiga_i_5__n.BLIF N_152 -11 1 -.names N_237.BLIF N_237_i +.names N_65_i.BLIF N_65 0 1 -.names N_81.BLIF cpu_est_2_.BLIF N_153 +.names N_53_0_1.BLIF state_machine_un8_bgack_030_int_i_0_0_n.BLIF N_53_0 11 1 -.names N_239.BLIF N_239_i +.names state_machine_uds_000_int_7_0_m3_un1_n.BLIF \ +state_machine_uds_000_int_7_0_m3_un0_n.BLIF N_66 +1- 1 +-1 1 +.names N_139.BLIF N_139_i 0 1 -.names N_176.BLIF cpu_est_i_3__n.BLIF N_154 -11 1 -.names N_37_0_1.BLIF N_239_i.BLIF N_37_0 -11 1 -.names inst_BGACK_030_INTreg.BLIF RW_i.BLIF N_155 -11 1 -.names N_236.BLIF N_236_i +.names N_69_i.BLIF N_69 0 1 -.names N_156_1.BLIF nEXP_SPACE_i.BLIF N_156 +.names inst_BGACK_030_INTreg.BLIF N_139_i.BLIF \ +state_machine_amiga_bus_enable_4_iv_i_n 11 1 -.names N_236_i.BLIF un1_AS_030_000_SYNC_1_sqmuxa_1_0.BLIF N_35_0 -11 1 -.names inst_AS_000_DMA.BLIF RW_i.BLIF N_157 -11 1 -.names N_235.BLIF N_235_i +.names N_72_0.BLIF N_72 0 1 -.names CLK_000_D4_i.BLIF N_173.BLIF N_158 -11 1 -.names AS_030_c_i.BLIF N_235_i.BLIF N_33_0 -11 1 -.names cpu_est_0_.BLIF cpu_est_3_reg.BLIF N_159 -11 1 -.names N_175.BLIF N_175_i +.names N_138.BLIF N_138_i 0 1 -.names BGACK_030_INT_i.BLIF SM_AMIGA_6_.BLIF N_160 -11 1 -.names A0_DMA_0_sqmuxa_i_0_0.BLIF N_175_i.BLIF N_31_0 -11 1 -.names CLK_000_D0_i.BLIF N_173.BLIF N_161 -11 1 -.names AS_030_c_i.BLIF N_234_i.BLIF N_228_0 -11 1 -.names N_83_i.BLIF SM_AMIGA_7_.BLIF N_162 -11 1 -.names BG_030_c.BLIF BG_030_c_i +.names N_74_i.BLIF N_74 0 1 -.names N_83.BLIF SM_AMIGA_7_.BLIF N_163 +.names N_138_i.BLIF state_machine_un8_bgack_030_int_i_0_0_n.BLIF N_48_i 11 1 -.names N_233.BLIF N_233_i +.names N_76_i.BLIF N_76 0 1 -.names N_164_1.BLIF nEXP_SPACE_i.BLIF N_164 -11 1 -.names BG_030_c_i.BLIF N_233_i.BLIF state_machine_un10_bg_030_0_n -11 1 -.names N_198.BLIF SM_AMIGA_0_.BLIF N_165 -11 1 -.names AS_030_c_i.BLIF N_231_i.BLIF N_227_0 -11 1 -.names N_166_1.BLIF nEXP_SPACE_i.BLIF N_166 -11 1 -.names AS_030_c_i.BLIF N_126_i.BLIF N_226_0 -11 1 -.names N_73.BLIF cpu_est_0_.BLIF N_167 -11 1 -.names N_108.BLIF N_108_i +.names N_136.BLIF N_136_i 0 1 -.names N_73_i.BLIF cpu_est_i_0__n.BLIF N_168 -11 1 -.names N_109.BLIF N_109_i +.names N_77_0.BLIF N_77 0 1 -.names LDS_000_c.BLIF UDS_000_c.BLIF N_171 -11 1 -.names N_108_i.BLIF N_109_i.BLIF N_225_0 -11 1 -.names N_80_i.BLIF nEXP_SPACE_i.BLIF N_172 -11 1 -.names BGACK_000_c.BLIF N_73.BLIF state_machine_un6_bgack_000_0_n -11 1 -.names SM_AMIGA_6_.BLIF nEXP_SPACE_c.BLIF N_173 -11 1 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_224_0 -11 1 -.names inst_CLK_000_D4.BLIF CLK_000_D5_i.BLIF N_174 -11 1 -.names inst_CLK_000_D2.BLIF CLK_000_D2_i +.names N_137.BLIF N_137_i 0 1 -.names LDS_000_i.BLIF UDS_000_i.BLIF N_175 -11 1 -.names inst_DTACK_SYNC.BLIF inst_VPA_SYNC.BLIF \ -state_machine_un59_bgack_030_int_0_n -11 1 -.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_176 -11 1 -.names a_c_20__n.BLIF a_c_21__n.BLIF N_253_1 -11 1 -.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_179 -11 1 -.names a_c_22__n.BLIF a_c_23__n.BLIF N_253_2 -11 1 -.names N_64_i.BLIF state_machine_un59_bgack_030_int_n.BLIF N_197 -11 1 -.names a_i_24__n.BLIF a_i_25__n.BLIF N_263_1 -11 1 -.names inst_AS_000_INT.BLIF N_63_i.BLIF N_198 -11 1 -.names a_i_26__n.BLIF a_i_27__n.BLIF N_263_2 -11 1 -.names a_i_28__n.BLIF a_i_29__n.BLIF N_263_3 -11 1 -.names a_i_30__n.BLIF a_i_31__n.BLIF N_263_4 -11 1 -.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF N_236_1 -11 1 -.names N_263_1.BLIF N_263_2.BLIF N_263_5 -11 1 -.names N_253_1.BLIF N_253_2.BLIF N_253 -11 1 -.names N_263_3.BLIF N_263_4.BLIF N_263_6 -11 1 -.names N_263_5.BLIF N_263_6.BLIF N_263 -11 1 -.names a_c_17__n.BLIF BGACK_000_c.BLIF N_74_i_1 -11 1 -.names inst_VMA_INTreg.BLIF VMA_INT_i +.names N_78_i.BLIF N_78 0 1 -.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_74_i_2 +.names N_136_i.BLIF N_137_i.BLIF AMIGA_BUS_DATA_DIR_c_0 11 1 -.names inst_VPA_D.BLIF VPA_D_i +.names N_82_i.BLIF N_82 0 1 -.names a_i_19__n.BLIF a_i_16__n.BLIF N_74_i_3 +.names N_135.BLIF N_135_i +0 1 +.names N_86_0.BLIF N_86 +0 1 +.names N_168.BLIF N_168_i +0 1 +.names N_202_0.BLIF N_202 +0 1 +.names N_135_i.BLIF N_168_i.BLIF N_151_i 11 1 -.names DTACK_c.BLIF DTACK_i -0 1 -.names N_74_i_1.BLIF N_74_i_2.BLIF N_74_i_4 +.names N_203_1.BLIF VPA_D_i.BLIF N_203 11 1 -.names LDS_000_c.BLIF LDS_000_i +.names N_132.BLIF N_132_i 0 1 -.names N_74_i_3.BLIF a_i_18__n.BLIF N_74_i_5 +.names N_170.BLIF SM_AMIGA_1_.BLIF N_205 11 1 -.names AS_000_c.BLIF AS_000_i +.names N_164.BLIF N_164_i 0 1 -.names AS_030_000_SYNC_i.BLIF inst_BGACK_030_INTreg.BLIF N_83_i_1 +.names N_206_1.BLIF N_206_2.BLIF N_206 11 1 -.names cpu_est_0_.BLIF cpu_est_i_0__n -0 1 -.names CLK_000_D2_i.BLIF inst_CLK_000_D3.BLIF N_83_i_2 +.names N_115_1.BLIF RW_c.BLIF N_115 11 1 -.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n +.names N_130.BLIF N_130_i 0 1 -.names AS_000_i.BLIF N_77_i.BLIF A0_DMA_0_sqmuxa_i_0_0_1 +.names N_116_1.BLIF RW_i.BLIF N_116 11 1 -.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +.names N_131.BLIF N_131_i 0 1 -.names AS_000_i.BLIF LDS_000_i.BLIF state_machine_a0_dma_4_1_n +.names CLK_030_c.BLIF N_69_i.BLIF N_117 11 1 -.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n -0 1 -.names N_77_i.BLIF UDS_000_c.BLIF state_machine_a0_dma_4_2_n +.names N_130_i.BLIF N_131_i.BLIF N_41_0 11 1 -.names cpu_est_3_reg.BLIF cpu_est_i_3__n -0 1 -.names N_236_1.BLIF CLK_030_c.BLIF N_236_1_0 +.names N_118_3.BLIF nEXP_SPACE_c.BLIF N_118 11 1 -.names inst_CLK_000_D0.BLIF CLK_000_D0_i +.names N_128.BLIF N_128_i 0 1 -.names DTACK_i.BLIF N_63_i.BLIF N_234_1 +.names N_120_1.BLIF size_i_1__n.BLIF N_120 11 1 -.names inst_CLK_000_D4.BLIF CLK_000_D4_i +.names N_129.BLIF N_129_i 0 1 -.names SM_AMIGA_3_.BLIF inst_VPA_D.BLIF N_234_2 +.names N_172.BLIF N_173.BLIF N_121 11 1 -.names cpu_est_1_.BLIF cpu_est_i_1__n -0 1 -.names AS_030_c.BLIF CLK_000_c.BLIF N_233_1 +.names N_128_i.BLIF N_129_i.BLIF sm_amiga_ns_0_5__n 11 1 -.names UDS_000_c.BLIF UDS_000_i -0 1 -.names N_63_i.BLIF N_81_i.BLIF N_231_1 -11 1 -.names inst_CLK_000_D5.BLIF CLK_000_D5_i -0 1 -.names SM_AMIGA_3_.BLIF VMA_INT_i.BLIF N_231_2 -11 1 -.names nEXP_SPACE_c.BLIF nEXP_SPACE_i -0 1 -.names N_231_1.BLIF N_231_2.BLIF N_231_3 -11 1 -.names inst_AS_000_DMA.BLIF AS_000_DMA_i -0 1 -.names N_165_i.BLIF N_163_i.BLIF sm_amiga_ns_e_0_1_0__n -11 1 -.names RW_c.BLIF RW_i -0 1 -.names N_162_i.BLIF N_160_i.BLIF sm_amiga_ns_e_0_1_1__n -11 1 -.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n -0 1 -.names cpu_est_ns_0_0_x2_1_.BLIF N_176_i.BLIF cpu_est_ns_0_1_1__n -11 1 -.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n -0 1 -.names N_72.BLIF N_145_i.BLIF N_44_i_1 -11 1 -.names A0_c.BLIF A0_i -0 1 -.names N_79_i.BLIF A0_i.BLIF state_machine_uds_000_int_7_0_1_n -11 1 -.names size_c_1__n.BLIF size_i_1__n -0 1 -.names N_144_i.BLIF N_67_i.BLIF state_machine_lds_000_int_7_0_1_n -11 1 -.names a_c_30__n.BLIF a_i_30__n -0 1 -.names N_96_i_i.BLIF N_240_i.BLIF N_39_0_1 -11 1 -.names a_c_31__n.BLIF a_i_31__n -0 1 -.names AS_030_c_i.BLIF N_237_i.BLIF N_37_0_1 -11 1 -.names a_c_28__n.BLIF a_i_28__n -0 1 -.names AS_000_DMA_i.BLIF BGACK_030_INT_i.BLIF N_166_1 -11 1 -.names a_c_29__n.BLIF a_i_29__n -0 1 -.names N_64_i.BLIF SM_AMIGA_6_.BLIF N_164_1 -11 1 -.names a_c_26__n.BLIF a_i_26__n -0 1 -.names BGACK_030_INT_i.BLIF RW_c.BLIF N_156_1 -11 1 -.names a_c_27__n.BLIF a_i_27__n -0 1 -.names A0_i.BLIF size_c_0__n.BLIF N_144_1 -11 1 -.names a_c_24__n.BLIF a_i_24__n -0 1 -.names N_72.BLIF AS_030_c.BLIF N_240_1 -11 1 -.names a_c_25__n.BLIF a_i_25__n -0 1 -.names N_66_i.BLIF N_79_i.BLIF N_239_1 -11 1 -.names a_c_19__n.BLIF a_i_19__n -0 1 -.names N_79_i.BLIF RW_i.BLIF N_237_1 -11 1 -.names a_c_16__n.BLIF a_i_16__n -0 1 -.names N_175.BLIF AS_000_i.BLIF SIZE_DMA_0_sqmuxa_1 -11 1 -.names a_c_18__n.BLIF a_i_18__n -0 1 -.names inst_BGACK_030_INTreg.BLIF N_174.BLIF N_232_1 -11 1 -.names RST_c.BLIF RST_i -0 1 -.names CLK_000_D0_i.BLIF N_179.BLIF N_109_1 -11 1 -.names cpu_est_1_.BLIF cpu_est_ns_0_0_m3_2__un3_n -0 1 -.names SIZE_DMA_0_sqmuxa.BLIF SIZE_DMA_0_sqmuxa_i -0 1 -.names cpu_est_2_.BLIF cpu_est_1_.BLIF cpu_est_ns_0_0_m3_2__un1_n -11 1 -.names N_231.BLIF N_231_i -0 1 -.names cpu_est_i_0__n.BLIF cpu_est_ns_0_0_m3_2__un3_n.BLIF \ -cpu_est_ns_0_0_m3_2__un0_n +.names N_86.BLIF sm_amiga_i_7__n.BLIF N_122 11 1 .names N_126.BLIF N_126_i 0 1 -.names RW_c.BLIF state_machine_lds_000_int_7_0_m3_un3_n +.names N_72.BLIF SM_AMIGA_7_.BLIF N_123 +11 1 +.names N_127.BLIF N_127_i 0 1 -.names N_232.BLIF N_232_i +.names sm_amiga_i_5__n.BLIF sm_amiga_i_6__n.BLIF N_124 +11 1 +.names sm_amiga_i_4__n.BLIF sm_amiga_i_5__n.BLIF N_125 +11 1 +.names N_125.BLIF N_125_i 0 1 -.names N_66.BLIF RW_c.BLIF state_machine_lds_000_int_7_0_m3_un1_n +.names N_62.BLIF sm_amiga_i_3__n.BLIF N_126 11 1 -.names N_234.BLIF N_234_i +.names N_127_1.BLIF inst_CLK_000_D1.BLIF N_127 +11 1 +.names N_124.BLIF N_124_i 0 1 -.names sm_amiga_i_4__n.BLIF state_machine_lds_000_int_7_0_m3_un3_n.BLIF \ -state_machine_lds_000_int_7_0_m3_un0_n +.names N_128_1.BLIF N_128_2.BLIF N_128 11 1 -.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i +.names CLK_000_D0_i.BLIF SM_AMIGA_2_.BLIF N_129 +11 1 +.names N_122.BLIF N_122_i 0 1 -.names N_73.BLIF cpu_estse_0_un3_n +.names N_77.BLIF SM_AMIGA_1_.BLIF N_130 +11 1 +.names inst_CLK_000_D0.BLIF SM_AMIGA_2_.BLIF N_131 +11 1 +.names N_172.BLIF N_172_i 0 1 -.names cpu_est_1_.BLIF N_73.BLIF cpu_estse_0_un1_n +.names N_77.BLIF sm_amiga_i_0__n.BLIF N_132 11 1 -.names cpu_est_ns_1__n.BLIF cpu_estse_0_un3_n.BLIF cpu_estse_0_un0_n +.names N_172_i.BLIF state_machine_un8_bgack_030_int_i_0_0_n.BLIF \ +state_machine_size_dma_4_0_1__n 11 1 -.names N_73.BLIF cpu_estse_1_un3_n +.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF N_133 +11 1 +.names AS_000_DMA_i.BLIF state_machine_un8_bgack_030_int_i_0_0_n.BLIF \ +state_machine_ds_000_dma_3_0_n +11 1 +.names cpu_est_i_2__n.BLIF cpu_est_i_3__n.BLIF N_134 +11 1 +.names N_66.BLIF N_66_i 0 1 -.names cpu_est_2_.BLIF N_73.BLIF cpu_estse_1_un1_n +.names N_82.BLIF cpu_est_2_.BLIF N_135 11 1 -.names cpu_est_ns_2__n.BLIF cpu_estse_1_un3_n.BLIF cpu_estse_1_un0_n -11 1 -.names N_73.BLIF cpu_estse_2_un3_n +.names N_120.BLIF N_120_i 0 1 -.names cpu_est_3_reg.BLIF N_73.BLIF cpu_estse_2_un1_n +.names inst_BGACK_030_INTreg.BLIF RW_i.BLIF N_136 11 1 -.names N_177_i.BLIF cpu_estse_2_un3_n.BLIF cpu_estse_2_un0_n +.names state_machine_lds_000_int_7_0_1_n.BLIF N_66_i.BLIF \ +state_machine_lds_000_int_7_0_n 11 1 +.names N_137_1.BLIF nEXP_SPACE_i.BLIF N_137 +11 1 +.names state_machine_uds_000_int_7_0_1_n.BLIF DS_030_i.BLIF \ +state_machine_uds_000_int_7_0_n +11 1 +.names CLK_030_H_i.BLIF N_202.BLIF N_138 +11 1 +.names N_118.BLIF N_118_i +0 1 +.names N_139_1.BLIF CLK_000_D4_i.BLIF N_139 +11 1 +.names N_118_i.BLIF un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0.BLIF N_201_0 +11 1 +.names AS_030_c.BLIF N_78.BLIF N_140 +11 1 +.names N_117.BLIF N_117_i +0 1 +.names inst_CLK_030_H.BLIF CLK_030_i.BLIF N_141 +11 1 +.names AS_030_c_i.BLIF N_117_i.BLIF N_200_0 +11 1 +.names cpu_est_1_.BLIF cpu_est_2_.BLIF N_142 +11 1 +.names N_115.BLIF N_115_i +0 1 +.names cpu_est_0_.BLIF cpu_est_3_reg.BLIF N_143 +11 1 +.names N_116.BLIF N_116_i +0 1 +.names cpu_est_i_0__n.BLIF cpu_est_i_1__n.BLIF N_144 +11 1 +.names N_199_0_1.BLIF N_115_i.BLIF N_199_0 +11 1 +.names CLK_000_D0_i.BLIF N_171.BLIF N_145 +11 1 +.names BG_030_c.BLIF BG_030_c_i +0 1 +.names N_164.BLIF SM_AMIGA_0_.BLIF N_146 +11 1 +.names N_206.BLIF N_206_i +0 1 +.names N_147_1.BLIF nEXP_SPACE_i.BLIF N_147 +11 1 +.names BG_030_c_i.BLIF N_206_i.BLIF state_machine_un10_bg_030_0_n +11 1 +.names N_76.BLIF cpu_est_i_0__n.BLIF N_148 +11 1 +.names CLK_030_c.BLIF state_machine_un8_bgack_030_int_i_0_0_n.BLIF N_198_0 +11 1 +.names N_76_i.BLIF cpu_est_0_.BLIF N_149 +11 1 +.names AS_030_c_i.BLIF N_64.BLIF N_197_0 +11 1 +.names LDS_000_c.BLIF UDS_000_c.BLIF N_150 +11 1 +.names N_203.BLIF N_203_i +0 1 +.names N_152_1.BLIF VPA_D_i.BLIF N_152 +11 1 +.names state_machine_un13_clk_000_d0_n.BLIF state_machine_un13_clk_000_d0_i_n +0 1 +.names DTACK_D0_i.BLIF inst_VPA_D.BLIF N_153 +11 1 +.names N_203_i.BLIF state_machine_un13_clk_000_d0_i_n.BLIF \ +state_machine_un15_clk_000_d0_0_n +11 1 +.names inst_AS_000_INT.BLIF inst_CLK_000_D0.BLIF N_164 +11 1 +.names BGACK_000_c.BLIF N_76.BLIF state_machine_un6_bgack_000_0_n +11 1 +.names cpu_est_1_.BLIF cpu_est_i_0__n.BLIF N_167 +11 1 +.names a_i_24__n.BLIF a_i_25__n.BLIF N_225_1 +11 1 +.names N_167.BLIF cpu_est_i_3__n.BLIF N_168 +11 1 +.names a_i_26__n.BLIF a_i_27__n.BLIF N_225_2 +11 1 +.names cpu_est_0_.BLIF cpu_est_i_1__n.BLIF N_169 +11 1 +.names a_i_28__n.BLIF a_i_29__n.BLIF N_225_3 +11 1 +.names inst_CLK_000_D3.BLIF CLK_000_D4_i.BLIF N_170 +11 1 +.names a_i_30__n.BLIF a_i_31__n.BLIF N_225_4 +11 1 +.names SM_AMIGA_6_.BLIF nEXP_SPACE_i.BLIF N_171 +11 1 +.names N_225_1.BLIF N_225_2.BLIF N_225_5 +11 1 +.names LDS_000_i.BLIF UDS_000_i.BLIF N_172 +11 1 +.names N_225_3.BLIF N_225_4.BLIF N_225_6 +11 1 +.names AS_000_i.BLIF BGACK_030_INT_i.BLIF N_173 +11 1 +.names a_c_20__n.BLIF a_c_21__n.BLIF N_228_1 +11 1 +.names N_225_5.BLIF N_225_6.BLIF N_225 +11 1 +.names a_c_22__n.BLIF a_c_23__n.BLIF N_228_2 +11 1 +.names N_228_1.BLIF N_228_2.BLIF N_228 +11 1 +.names a_c_17__n.BLIF BGACK_000_c.BLIF N_69_i_1 +11 1 +.names inst_CLK_000_D0.BLIF CLK_000_D0_i +0 1 +.names fc_c_0__n.BLIF fc_c_1__n.BLIF N_69_i_2 +11 1 +.names inst_BGACK_030_INTreg.BLIF BGACK_030_INT_i +0 1 +.names a_i_19__n.BLIF a_i_16__n.BLIF N_69_i_3 +11 1 +.names CLK_030_c.BLIF CLK_030_i +0 1 +.names N_69_i_1.BLIF N_69_i_2.BLIF N_69_i_4 +11 1 +.names cpu_est_3_reg.BLIF cpu_est_i_3__n +0 1 +.names N_69_i_3.BLIF a_i_18__n.BLIF N_69_i_5 +11 1 +.names SM_AMIGA_6_.BLIF sm_amiga_i_6__n +0 1 +.names N_150_i.BLIF AS_000_i.BLIF state_machine_un8_bgack_030_int_i_0_0_1_n +11 1 +.names nEXP_SPACE_c.BLIF nEXP_SPACE_i +0 1 +.names inst_CLK_000_D3.BLIF AS_030_000_SYNC_i.BLIF N_72_0_1 +11 1 +.names inst_CLK_000_D4.BLIF CLK_000_D4_i +0 1 +.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF N_51_0_1 +11 1 +.names SM_AMIGA_5_.BLIF sm_amiga_i_5__n +0 1 +.names N_74.BLIF N_140_i.BLIF N_51_0_2 +11 1 +.names SM_AMIGA_4_.BLIF sm_amiga_i_4__n +0 1 +.names N_133_i.BLIF N_134_i.BLIF cpu_est_ns_0_1_1__n +11 1 +.names AS_000_c.BLIF AS_000_i +0 1 +.names N_167_i.BLIF N_169_i.BLIF cpu_est_ns_0_2_1__n +11 1 +.names LDS_000_c.BLIF LDS_000_i +0 1 +.names CLK_000_D0_i.BLIF inst_CLK_000_D1.BLIF N_128_1 +11 1 +.names UDS_000_c.BLIF UDS_000_i +0 1 +.names N_61.BLIF SM_AMIGA_3_.BLIF N_128_2 +11 1 +.names cpu_est_1_.BLIF cpu_est_i_1__n +0 1 +.names inst_BGACK_030_INTreg.BLIF CLK_030_c.BLIF N_118_1 +11 1 +.names cpu_est_0_.BLIF cpu_est_i_0__n +0 1 +.names N_69.BLIF SM_AMIGA_7_.BLIF N_118_2 +11 1 +.names inst_DTACK_D0.BLIF DTACK_D0_i +0 1 +.names N_118_1.BLIF N_118_2.BLIF N_118_3 +11 1 +.names inst_VMA_INTreg.BLIF VMA_INT_i +0 1 +.names AS_030_c.BLIF CLK_000_c.BLIF N_206_1 +11 1 +.names inst_VPA_D.BLIF VPA_D_i +0 1 +.names SM_AMIGA_7_.BLIF nEXP_SPACE_c.BLIF N_206_2 +11 1 +.names inst_AS_000_DMA.BLIF AS_000_DMA_i +0 1 +.names N_146_i.BLIF N_123_i.BLIF sm_amiga_ns_0_1_0__n +11 1 +.names inst_CLK_030_H.BLIF CLK_030_H_i +0 1 +.names N_144_i.BLIF N_142_i.BLIF cpu_est_ns_0_1_2__n +11 1 +.names RW_c.BLIF RW_i +0 1 +.names N_141_i.BLIF RW_i.BLIF N_53_0_1 +11 1 +.names cpu_est_2_.BLIF cpu_est_i_2__n +0 1 +.names N_78.BLIF N_132_i.BLIF N_43_i_1 +11 1 +.names SM_AMIGA_0_.BLIF sm_amiga_i_0__n +0 1 +.names N_120_i.BLIF DS_030_i.BLIF state_machine_lds_000_int_7_0_1_n +11 1 +.names SM_AMIGA_3_.BLIF sm_amiga_i_3__n +0 1 +.names N_66_i.BLIF A0_i.BLIF state_machine_uds_000_int_7_0_1_n +11 1 +.names SM_AMIGA_7_.BLIF sm_amiga_i_7__n +0 1 +.names N_116_i.BLIF AS_030_c_i.BLIF N_199_0_1 +11 1 +.names A0_c.BLIF A0_i +0 1 +.names N_82_i.BLIF VMA_INT_i.BLIF N_152_1 +11 1 +.names size_c_1__n.BLIF size_i_1__n +0 1 +.names AS_000_DMA_i.BLIF BGACK_030_INT_i.BLIF N_147_1 +11 1 +.names DS_030_c.BLIF DS_030_i +0 1 +.names N_74_i.BLIF inst_BGACK_030_INT_D.BLIF N_139_1 +11 1 +.names a_c_19__n.BLIF a_i_19__n +0 1 +.names N_173.BLIF RW_c.BLIF N_137_1 +11 1 +.names a_c_16__n.BLIF a_i_16__n +0 1 +.names N_61.BLIF CLK_000_D0_i.BLIF N_127_1 +11 1 +.names a_c_18__n.BLIF a_i_18__n +0 1 +.names A0_i.BLIF size_c_0__n.BLIF N_120_1 +11 1 +.names a_c_30__n.BLIF a_i_30__n +0 1 +.names UDS_000_c.BLIF LDS_000_i.BLIF state_machine_a0_dma_2_1_n +11 1 +.names a_c_31__n.BLIF a_i_31__n +0 1 +.names DS_030_i.BLIF N_62_i.BLIF N_116_1 +11 1 +.names a_c_28__n.BLIF a_i_28__n +0 1 +.names DS_030_i.BLIF N_64_i.BLIF N_115_1 +11 1 +.names a_c_29__n.BLIF a_i_29__n +0 1 +.names cpu_est_2_.BLIF N_164.BLIF state_machine_un13_clk_000_d0_1_n +11 1 +.names a_c_26__n.BLIF a_i_26__n +0 1 +.names CLK_000_D0_i.BLIF N_169.BLIF N_203_1 +11 1 +.names a_c_27__n.BLIF a_i_27__n +0 1 +.names RW_c.BLIF state_machine_uds_000_int_7_0_m3_un3_n +0 1 +.names a_c_24__n.BLIF a_i_24__n +0 1 +.names N_64.BLIF RW_c.BLIF state_machine_uds_000_int_7_0_m3_un1_n +11 1 +.names a_c_25__n.BLIF a_i_25__n +0 1 +.names N_62.BLIF state_machine_uds_000_int_7_0_m3_un3_n.BLIF \ +state_machine_uds_000_int_7_0_m3_un0_n +11 1 +.names RST_c.BLIF RST_i +0 1 .names N_65.BLIF dsack1_int_0_un3_n 0 1 -.names N_232_i.BLIF N_65.BLIF dsack1_int_0_un1_n +.names N_205_i.BLIF N_65.BLIF dsack1_int_0_un1_n 11 1 .names inst_DSACK1_INT.BLIF dsack1_int_0_un3_n.BLIF dsack1_int_0_un0_n 11 1 -.names N_224.BLIF as_000_dma_0_un3_n +.names N_205.BLIF N_205_i 0 1 -.names A0_DMA_0_sqmuxa_i_0.BLIF N_224.BLIF as_000_dma_0_un1_n -11 1 -.names inst_AS_000_DMA.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n -11 1 -.names N_226.BLIF as_000_int_0_un3_n +.names state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un3_n 0 1 -.names N_126_i.BLIF N_226.BLIF as_000_int_0_un1_n -11 1 -.names inst_AS_000_INT.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n -11 1 -.names N_227.BLIF vpa_sync_0_un3_n +.names inst_FPU_CS_INTreg.BLIF FPU_CS_INT_i 0 1 -.names N_231_i.BLIF N_227.BLIF vpa_sync_0_un1_n +.names state_machine_un13_clk_000_d0_n.BLIF \ +state_machine_un15_clk_000_d0_n.BLIF vma_int_0_un1_n 11 1 -.names inst_VPA_SYNC.BLIF vpa_sync_0_un3_n.BLIF vpa_sync_0_un0_n -11 1 -.names N_225.BLIF vma_int_0_un3_n +.names inst_CLK_OUT_PRE_50_D.BLIF CLK_OUT_PRE_50_D_i 0 1 -.names N_108.BLIF N_225.BLIF vma_int_0_un1_n -11 1 .names inst_VMA_INTreg.BLIF vma_int_0_un3_n.BLIF vma_int_0_un0_n 11 1 .names state_machine_un6_bgack_000_n.BLIF bgack_030_int_0_un3_n @@ -1052,58 +947,106 @@ bgack_030_int_0_un1_n .names inst_BGACK_030_INTreg.BLIF bgack_030_int_0_un3_n.BLIF \ bgack_030_int_0_un0_n 11 1 -.names N_224.BLIF size_dma_0_0__un3_n +.names N_76.BLIF ipl_030_0_0__un3_n 0 1 -.names SIZE_DMA_0_sqmuxa_i.BLIF N_224.BLIF size_dma_0_0__un1_n -11 1 -.names SIZE_DMA_0_.BLIF size_dma_0_0__un3_n.BLIF size_dma_0_0__un0_n -11 1 -.names N_224.BLIF size_dma_0_1__un3_n -0 1 -.names N_31.BLIF N_224.BLIF size_dma_0_1__un1_n -11 1 -.names SIZE_DMA_1_.BLIF size_dma_0_1__un3_n.BLIF size_dma_0_1__un0_n -11 1 -.names N_73.BLIF ipl_030_0_0__un3_n -0 1 -.names IPL_030DFFSH_0_reg.BLIF N_73.BLIF ipl_030_0_0__un1_n +.names IPL_030DFFSH_0_reg.BLIF N_76.BLIF ipl_030_0_0__un1_n 11 1 .names ipl_c_0__n.BLIF ipl_030_0_0__un3_n.BLIF ipl_030_0_0__un0_n 11 1 -.names N_73.BLIF ipl_030_0_1__un3_n +.names N_76.BLIF ipl_030_0_1__un3_n 0 1 -.names IPL_030DFFSH_1_reg.BLIF N_73.BLIF ipl_030_0_1__un1_n +.names IPL_030DFFSH_1_reg.BLIF N_76.BLIF ipl_030_0_1__un1_n 11 1 .names ipl_c_1__n.BLIF ipl_030_0_1__un3_n.BLIF ipl_030_0_1__un0_n 11 1 -.names N_73.BLIF ipl_030_0_2__un3_n +.names N_76.BLIF ipl_030_0_2__un3_n 0 1 -.names IPL_030DFFSH_2_reg.BLIF N_73.BLIF ipl_030_0_2__un1_n +.names IPL_030DFFSH_2_reg.BLIF N_76.BLIF ipl_030_0_2__un1_n 11 1 .names ipl_c_2__n.BLIF ipl_030_0_2__un3_n.BLIF ipl_030_0_2__un0_n 11 1 -.names N_39.BLIF amiga_bus_enable_0_un3_n +.names N_76.BLIF cpu_estse_0_un3_n 0 1 -.names state_machine_amiga_bus_enable_6_iv_i_n.BLIF N_39.BLIF \ +.names cpu_est_1_.BLIF N_76.BLIF cpu_estse_0_un1_n +11 1 +.names cpu_est_ns_1__n.BLIF cpu_estse_0_un3_n.BLIF cpu_estse_0_un0_n +11 1 +.names N_76.BLIF cpu_estse_1_un3_n +0 1 +.names cpu_est_2_.BLIF N_76.BLIF cpu_estse_1_un1_n +11 1 +.names cpu_est_ns_2__n.BLIF cpu_estse_1_un3_n.BLIF cpu_estse_1_un0_n +11 1 +.names N_76.BLIF cpu_estse_2_un3_n +0 1 +.names cpu_est_3_reg.BLIF N_76.BLIF cpu_estse_2_un1_n +11 1 +.names N_151_i.BLIF cpu_estse_2_un3_n.BLIF cpu_estse_2_un0_n +11 1 +.names N_51.BLIF amiga_bus_enable_0_un3_n +0 1 +.names state_machine_amiga_bus_enable_4_iv_i_n.BLIF N_51.BLIF \ amiga_bus_enable_0_un1_n 11 1 .names AMIGA_BUS_ENABLEDFFSHreg.BLIF amiga_bus_enable_0_un3_n.BLIF \ amiga_bus_enable_0_un0_n 11 1 -.names N_37.BLIF uds_000_int_0_un3_n +.names N_201.BLIF as_030_000_sync_0_un3_n 0 1 -.names state_machine_uds_000_int_7_n.BLIF N_37.BLIF uds_000_int_0_un1_n +.names un1_AMIGA_BUS_ENABLE_1_sqmuxa_2.BLIF N_201.BLIF as_030_000_sync_0_un1_n +11 1 +.names inst_AS_030_000_SYNC.BLIF as_030_000_sync_0_un3_n.BLIF \ +as_030_000_sync_0_un0_n +11 1 +.names RST_c.BLIF clk_030_h_0_un3_n +0 1 +.names N_48_i.BLIF RST_c.BLIF clk_030_h_0_un1_n +11 1 +.names inst_CLK_030_H.BLIF clk_030_h_0_un3_n.BLIF clk_030_h_0_un0_n +11 1 +.names N_199.BLIF uds_000_int_0_un3_n +0 1 +.names state_machine_uds_000_int_7_n.BLIF N_199.BLIF uds_000_int_0_un1_n 11 1 .names inst_UDS_000_INT.BLIF uds_000_int_0_un3_n.BLIF uds_000_int_0_un0_n 11 1 -.names N_37.BLIF lds_000_int_0_un3_n +.names N_199.BLIF lds_000_int_0_un3_n 0 1 -.names state_machine_lds_000_int_7_n.BLIF N_37.BLIF lds_000_int_0_un1_n +.names state_machine_lds_000_int_7_n.BLIF N_199.BLIF lds_000_int_0_un1_n 11 1 .names inst_LDS_000_INT.BLIF lds_000_int_0_un3_n.BLIF lds_000_int_0_un0_n 11 1 -.names N_35.BLIF as_030_000_sync_0_un3_n +.names N_200.BLIF fpu_cs_int_0_un3_n 0 1 +.names AS_030_c.BLIF N_200.BLIF fpu_cs_int_0_un1_n +11 1 +.names inst_FPU_CS_INTreg.BLIF fpu_cs_int_0_un3_n.BLIF fpu_cs_int_0_un0_n +11 1 +.names state_machine_un10_bg_030_n.BLIF bg_000_0_un3_n +0 1 +.names BG_030_c.BLIF state_machine_un10_bg_030_n.BLIF bg_000_0_un1_n +11 1 +.names BG_000DFFSHreg.BLIF bg_000_0_un3_n.BLIF bg_000_0_un0_n +11 1 +.names N_53.BLIF ds_000_dma_0_un3_n +0 1 +.names state_machine_ds_000_dma_3_n.BLIF N_53.BLIF ds_000_dma_0_un1_n +11 1 +.names inst_DS_000_DMA.BLIF ds_000_dma_0_un3_n.BLIF ds_000_dma_0_un0_n +11 1 +.names N_198.BLIF as_000_dma_0_un3_n +0 1 +.names state_machine_un8_bgack_030_int_i_0_n.BLIF N_198.BLIF \ +as_000_dma_0_un1_n +11 1 +.names inst_AS_000_DMA.BLIF as_000_dma_0_un3_n.BLIF as_000_dma_0_un0_n +11 1 +.names N_197.BLIF as_000_int_0_un3_n +0 1 +.names N_64.BLIF N_197.BLIF as_000_int_0_un1_n +11 1 +.names inst_AS_000_INT.BLIF as_000_int_0_un3_n.BLIF as_000_int_0_un0_n +11 1 .names IPL_030DFFSH_2_reg.BLIF IPL_030_2_ 1 1 0 0 @@ -1149,7 +1092,7 @@ amiga_bus_enable_0_un0_n .names vcc_n_n.BLIF AMIGA_BUS_ENABLE_LOW 1 1 0 0 -.names N_253.BLIF CIIN +.names N_228.BLIF CIIN 1 1 0 0 .names IPL_030DFFSH_1_reg.BLIF IPL_030_1_ @@ -1182,18 +1125,18 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF cpu_est_3_reg.AR 1 1 0 0 -.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C -1 1 -0 0 -.names RST_i.BLIF SM_AMIGA_1_.AR -1 1 -0 0 .names CLK_OSZI_c.BLIF SM_AMIGA_0_.C 1 1 0 0 .names RST_i.BLIF SM_AMIGA_0_.AR 1 1 0 0 +.names CLK_OSZI_c.BLIF SIZE_DMA_1_.C +1 1 +0 0 +.names RST_i.BLIF SIZE_DMA_1_.AP +1 1 +0 0 .names CLK_OSZI_c.BLIF IPL_030DFFSH_0_reg.C 1 1 0 0 @@ -1248,16 +1191,16 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF SM_AMIGA_2_.AR 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_AS_000_INT.C +.names CLK_OSZI_c.BLIF SM_AMIGA_1_.C 1 1 0 0 -.names RST_i.BLIF inst_AS_000_INT.AP +.names RST_i.BLIF SM_AMIGA_1_.AR 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_VPA_SYNC.C +.names CLK_OSZI_c.BLIF inst_DSACK1_INT.C 1 1 0 0 -.names RST_i.BLIF inst_VPA_SYNC.AP +.names RST_i.BLIF inst_DSACK1_INT.AP 1 1 0 0 .names CLK_OSZI_c.BLIF inst_VMA_INTreg.C @@ -1272,13 +1215,13 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_BGACK_030_INTreg.AP 1 1 0 0 -.names CLK_OUT_PRE_0.BLIF inst_CLK_OUT_PRE.D +.names CLK_OUT_PRE_25_0.BLIF inst_CLK_OUT_PRE_25.D 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE.C +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_25.C 1 1 0 0 -.names RST_i.BLIF inst_CLK_OUT_PRE.AR +.names RST_i.BLIF inst_CLK_OUT_PRE_25.AR 1 1 0 0 .names CLK_OSZI_c.BLIF SIZE_DMA_0_.C @@ -1287,60 +1230,6 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF SIZE_DMA_0_.AP 1 1 0 0 -.names CLK_OSZI_c.BLIF SIZE_DMA_1_.C -1 1 -0 0 -.names RST_i.BLIF SIZE_DMA_1_.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_DS_000_DMA.C -1 1 -0 0 -.names RST_i.BLIF inst_DS_000_DMA.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C -1 1 -0 0 -.names RST_i.BLIF inst_FPU_CS_INTreg.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_DTACK_SYNC.C -1 1 -0 0 -.names RST_i.BLIF inst_DTACK_SYNC.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_A0_DMA.C -1 1 -0 0 -.names RST_i.BLIF inst_A0_DMA.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF BG_000DFFSHreg.C -1 1 -0 0 -.names RST_i.BLIF BG_000DFFSHreg.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_DSACK1_INT.C -1 1 -0 0 -.names RST_i.BLIF inst_DSACK1_INT.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C -1 1 -0 0 -.names RST_i.BLIF inst_AS_000_DMA.AP -1 1 -0 0 -.names CLK_OSZI_c.BLIF AMIGA_BUS_ENABLEDFFSHreg.C -1 1 -0 0 -.names RST_i.BLIF AMIGA_BUS_ENABLEDFFSHreg.AP -1 1 -0 0 .names CLK_OSZI_c.BLIF inst_UDS_000_INT.C 1 1 0 0 @@ -1353,12 +1242,57 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_LDS_000_INT.AP 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_FPU_CS_INTreg.C +1 1 +0 0 +.names RST_i.BLIF inst_FPU_CS_INTreg.AP +1 1 +0 0 +.names CLK_OSZI_c.BLIF BG_000DFFSHreg.C +1 1 +0 0 +.names RST_i.BLIF BG_000DFFSHreg.AP +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_DS_000_DMA.C +1 1 +0 0 +.names RST_i.BLIF inst_DS_000_DMA.AP +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_AS_000_DMA.C +1 1 +0 0 +.names RST_i.BLIF inst_AS_000_DMA.AP +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_AS_000_INT.C +1 1 +0 0 +.names RST_i.BLIF inst_AS_000_INT.AP +1 1 +0 0 +.names CLK_OSZI_c.BLIF AMIGA_BUS_ENABLEDFFSHreg.C +1 1 +0 0 +.names RST_i.BLIF AMIGA_BUS_ENABLEDFFSHreg.AP +1 1 +0 0 .names CLK_OSZI_c.BLIF inst_AS_030_000_SYNC.C 1 1 0 0 .names RST_i.BLIF inst_AS_030_000_SYNC.AP 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_CLK_030_H.C +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_A0_DMA.C +1 1 +0 0 +.names RST_i.BLIF inst_A0_DMA.AP +1 1 +0 0 .names inst_CLK_000_D3.BLIF inst_CLK_000_D4.D 1 1 0 0 @@ -1368,13 +1302,13 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_CLK_000_D4.AP 1 1 0 0 -.names inst_CLK_000_D4.BLIF inst_CLK_000_D5.D +.names DTACK.PIN.BLIF inst_DTACK_D0.D 1 1 0 0 -.names CLK_OSZI_c.BLIF inst_CLK_000_D5.C +.names CLK_OSZI_c.BLIF inst_DTACK_D0.C 1 1 0 0 -.names RST_i.BLIF inst_CLK_000_D5.AP +.names RST_i.BLIF inst_DTACK_D0.AP 1 1 0 0 .names inst_CLK_000_D2.BLIF inst_CLK_000_D3.D @@ -1386,12 +1320,6 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_CLK_000_D3.AP 1 1 0 0 -.names CLK_OSZI_c.BLIF CLK_CNT_P_0_.C -1 1 -0 0 -.names RST_i.BLIF CLK_CNT_P_0_.AR -1 1 -0 0 .names inst_CLK_000_D1.BLIF inst_CLK_000_D2.D 1 1 0 0 @@ -1401,6 +1329,15 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_CLK_000_D2.AP 1 1 0 0 +.names inst_CLK_OUT_PRE_25.BLIF CLK_OUT_INTreg.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C +1 1 +0 0 +.names RST_i.BLIF CLK_OUT_INTreg.AR +1 1 +0 0 .names inst_CLK_000_D0.BLIF inst_CLK_000_D1.D 1 1 0 0 @@ -1410,15 +1347,6 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_CLK_000_D1.AP 1 1 0 0 -.names inst_CLK_OUT_PRE.BLIF CLK_OUT_INTreg.D -1 1 -0 0 -.names CLK_OSZI_c.BLIF CLK_OUT_INTreg.C -1 1 -0 0 -.names RST_i.BLIF CLK_OUT_INTreg.AR -1 1 -0 0 .names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.D 1 1 0 0 @@ -1428,6 +1356,15 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_BGACK_030_INT_D.AP 1 1 0 0 +.names inst_CLK_OUT_PRE_50.BLIF inst_CLK_OUT_PRE_50_D.D +1 1 +0 0 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_50_D.C +1 1 +0 0 +.names RST_i.BLIF inst_CLK_OUT_PRE_50_D.AR +1 1 +0 0 .names CLK_000_c.BLIF inst_CLK_000_D0.D 1 1 0 0 @@ -1446,6 +1383,12 @@ amiga_bus_enable_0_un0_n .names RST_i.BLIF inst_VPA_D.AP 1 1 0 0 +.names CLK_OSZI_c.BLIF inst_CLK_OUT_PRE_50.C +1 1 +0 0 +.names RST_i.BLIF inst_CLK_OUT_PRE_50.AR +1 1 +0 0 .names vcc_n_n.BLIF RESETDFFRHreg.D 1 1 0 0 @@ -1488,12 +1431,6 @@ amiga_bus_enable_0_un0_n .names vcc_n_n.BLIF DSACK_0_ 1 1 0 0 -.names BG_030.BLIF BG_030_c -1 1 -0 0 -.names BGACK_000.BLIF BGACK_000_c -1 1 -0 0 .names CLK_030.BLIF CLK_030_c 1 1 0 0 @@ -1515,9 +1452,6 @@ amiga_bus_enable_0_un0_n .names DSACK_1_.PIN.BLIF dsack_c_1__n 1 1 0 0 -.names DTACK.PIN.BLIF DTACK_c -1 1 -0 0 .names RST.BLIF RST_c 1 1 0 0 @@ -1605,13 +1539,19 @@ amiga_bus_enable_0_un0_n .names nEXP_SPACE.BLIF nEXP_SPACE_c 1 1 0 0 -.names N_166.BLIF AS_030.OE +.names BG_030.BLIF BG_030_c +1 1 +0 0 +.names BGACK_000.BLIF BGACK_000_c +1 1 +0 0 +.names N_147.BLIF AS_030.OE 1 1 0 0 .names inst_BGACK_030_INTreg.BLIF AS_000.OE 1 1 0 0 -.names N_166.BLIF DS_030.OE +.names N_147.BLIF DS_030.OE 1 1 0 0 .names inst_BGACK_030_INTreg.BLIF UDS_000.OE @@ -1620,19 +1560,19 @@ amiga_bus_enable_0_un0_n .names inst_BGACK_030_INTreg.BLIF LDS_000.OE 1 1 0 0 -.names N_166.BLIF SIZE_0_.OE +.names N_147.BLIF SIZE_0_.OE 1 1 0 0 -.names N_166.BLIF SIZE_1_.OE +.names N_147.BLIF SIZE_1_.OE 1 1 0 0 -.names N_166.BLIF A0.OE +.names N_147.BLIF A0.OE 1 1 0 0 .names nEXP_SPACE_c.BLIF DSACK_1_.OE 1 1 0 0 -.names N_166.BLIF DTACK.OE +.names N_147.BLIF DTACK.OE 1 1 0 0 .names FPU_CS_INT_i.BLIF BERR.OE @@ -1644,21 +1584,10 @@ amiga_bus_enable_0_un0_n .names FPU_CS_INT_i.BLIF AVEC_EXP.OE 1 1 0 0 -.names N_263.BLIF CIIN.OE +.names N_225.BLIF CIIN.OE 1 1 0 0 -.names inst_CLK_OUT_PRE.BLIF CLK_CNT_P_0_.BLIF CLK_OUT_PRE_0 -01 1 -10 1 -11 0 -00 0 -.names inst_BGACK_030_INTreg.BLIF inst_BGACK_030_INT_D.BLIF \ -un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 -01 1 -10 1 -11 0 -00 0 -.names cpu_est_2_.BLIF cpu_est_3_reg.BLIF cpu_est_ns_0_0_x2_1_ +.names inst_CLK_OUT_PRE_25.BLIF clk_un3_clk_out_pre_50_n.BLIF CLK_OUT_PRE_25_0 01 1 10 1 11 0 diff --git a/Logic/BUS68030.edi b/Logic/BUS68030.edi index 311581e..253b36c 100644 --- a/Logic/BUS68030.edi +++ b/Logic/BUS68030.edi @@ -4,7 +4,7 @@ (keywordMap (keywordLevel 0)) (status (written - (timeStamp 2014 5 25 21 18 45) + (timeStamp 2014 5 28 21 24 50) (author "Synopsys, Inc.") (program "Synplify Pro" (version "G-2012.09LC-SP1 , mapper maplat, Build 621R")) ) @@ -40,6 +40,15 @@ ) ) ) + (cell DFF (cellType GENERIC) + (view prim (viewType NETLIST) + (interface + (port Q (direction OUTPUT)) + (port D (direction INPUT)) + (port CLK (direction INPUT)) + ) + ) + ) (cell DFFRH (cellType GENERIC) (view prim (viewType NETLIST) (interface @@ -156,10 +165,10 @@ ) (instance (rename cpu_est_3 "cpu_est[3]") (viewRef prim (cellRef DFFRH (libraryRef mach))) ) - (instance (rename SM_AMIGA_1 "SM_AMIGA[1]") (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) (instance (rename SM_AMIGA_0 "SM_AMIGA[0]") (viewRef prim (cellRef DFFRH (libraryRef mach))) ) + (instance (rename SIZE_DMA_1 "SIZE_DMA[1]") (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) (instance (rename IPL_030DFFSH_0 "IPL_030DFFSH[0]") (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance (rename IPL_030DFFSH_1 "IPL_030DFFSH[1]") (viewRef prim (cellRef DFFSH (libraryRef mach))) @@ -178,62 +187,62 @@ ) (instance (rename SM_AMIGA_2 "SM_AMIGA[2]") (viewRef prim (cellRef DFFRH (libraryRef mach))) ) - (instance AS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + (instance (rename SM_AMIGA_1 "SM_AMIGA[1]") (viewRef prim (cellRef DFFRH (libraryRef mach))) ) - (instance VPA_SYNC (viewRef prim (cellRef DFFSH (libraryRef mach))) + (instance DSACK1_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance VMA_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance BGACK_030_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) ) - (instance CLK_OUT_PRE (viewRef prim (cellRef DFFRH (libraryRef mach))) + (instance CLK_OUT_PRE_25 (viewRef prim (cellRef DFFRH (libraryRef mach))) ) (instance (rename SIZE_DMA_0 "SIZE_DMA[0]") (viewRef prim (cellRef DFFSH (libraryRef mach))) ) - (instance (rename SIZE_DMA_1 "SIZE_DMA[1]") (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance DS_000_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance FPU_CS_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance DTACK_SYNC (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance A0_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance BG_000DFFSH (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance DSACK1_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance AS_000_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) - (instance AMIGA_BUS_ENABLEDFFSH (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) (instance UDS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance LDS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) ) + (instance FPU_CS_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance BG_000DFFSH (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance DS_000_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance AS_000_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance AS_000_INT (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) + (instance AMIGA_BUS_ENABLEDFFSH (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) (instance AS_030_000_SYNC (viewRef prim (cellRef DFFSH (libraryRef mach))) ) + (instance CLK_030_H (viewRef prim (cellRef DFF (libraryRef mach))) + ) + (instance A0_DMA (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) (instance CLK_000_D4 (viewRef prim (cellRef DFFSH (libraryRef mach))) ) - (instance CLK_000_D5 (viewRef prim (cellRef DFFSH (libraryRef mach))) + (instance DTACK_D0 (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance CLK_000_D3 (viewRef prim (cellRef DFFSH (libraryRef mach))) ) - (instance (rename CLK_CNT_P_0 "CLK_CNT_P[0]") (viewRef prim (cellRef DFFRH (libraryRef mach))) - ) (instance CLK_000_D2 (viewRef prim (cellRef DFFSH (libraryRef mach))) ) - (instance CLK_000_D1 (viewRef prim (cellRef DFFSH (libraryRef mach))) - ) (instance CLK_OUT_INT (viewRef prim (cellRef DFFRH (libraryRef mach))) ) + (instance CLK_000_D1 (viewRef prim (cellRef DFFSH (libraryRef mach))) + ) (instance BGACK_030_INT_D (viewRef prim (cellRef DFFSH (libraryRef mach))) ) + (instance CLK_OUT_PRE_50_D (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) (instance CLK_000_D0 (viewRef prim (cellRef DFFSH (libraryRef mach))) ) (instance VPA_D (viewRef prim (cellRef DFFSH (libraryRef mach))) ) + (instance CLK_OUT_PRE_50 (viewRef prim (cellRef DFFRH (libraryRef mach))) + ) (instance RESETDFFRH (viewRef prim (cellRef DFFRH (libraryRef mach))) ) (instance AS_030 (viewRef prim (cellRef BI_DIR (libraryRef mach))) ) @@ -295,314 +304,284 @@ (instance AMIGA_BUS_DATA_DIR (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance AMIGA_BUS_ENABLE_LOW (viewRef prim (cellRef OBUF (libraryRef mach))) ) (instance CIIN (viewRef prim (cellRef BUFTH (libraryRef mach))) ) - (instance N_111_i_i_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance N_111_i_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VMA_INT_1_sqmuxa_i_a3_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VMA_INT_1_sqmuxa_i_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_A0_DMA_2_0_a3_1 "state_machine.A0_DMA_2_0_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_A0_DMA_2_0_a3 "state_machine.A0_DMA_2_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_AS_030_2_i_a3_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_AS_030_2_i_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_AS_030_2_i_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_AS_030_2_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un15_clk_000_d0_0_a3_0_1 "state_machine.un15_clk_000_d0_0_a3_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un15_clk_000_d0_0_a3_0 "state_machine.un15_clk_000_d0_0_a3_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un15_clk_000_d0_0_a3_1 "state_machine.un15_clk_000_d0_0_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un15_clk_000_d0_0_a3 "state_machine.un15_clk_000_d0_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_UDS_000_INT_7_0 "state_machine.UDS_000_INT_7_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_AS_030_2_i_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_AS_030_2_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a2_1_4 "SM_AMIGA_ns_i_a2_1[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a2_4 "SM_AMIGA_ns_i_a2[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un3_dtack_i_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un3_dtack_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_7_0_a3_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_7_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_AMIGA_BUS_ENABLE_4_iv_0_a3_1 "state_machine.AMIGA_BUS_ENABLE_4_iv_0_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_AMIGA_BUS_ENABLE_4_iv_0_a3 "state_machine.AMIGA_BUS_ENABLE_4_iv_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance AMIGA_BUS_DATA_DIR_0_0_a3_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance AMIGA_BUS_DATA_DIR_0_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a3_0_1_4 "SM_AMIGA_ns_i_a3_0_1[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a3_0_4 "SM_AMIGA_ns_i_a3_0[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_LDS_000_INT_7_0_a3_1 "state_machine.LDS_000_INT_7_0_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_LDS_000_INT_7_0_a3 "state_machine.LDS_000_INT_7_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance LDS_000_INT_1_sqmuxa_i_a3_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance LDS_000_INT_1_sqmuxa_i_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance LDS_000_INT_1_sqmuxa_i_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance LDS_000_INT_1_sqmuxa_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SIZE_DMA_0_sqmuxa_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SIZE_DMA_0_sqmuxa_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_0_0_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_0_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_1_1 "cpu_est_ns_0_0_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_1 "cpu_est_ns_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_6_0_i_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_6_0_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_UDS_000_INT_7_0_1 "state_machine.UDS_000_INT_7_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_UDS_000_INT_7_0 "state_machine.UDS_000_INT_7_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un10_bg_030_0_a3_1 "state_machine.un10_bg_030_0_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un10_bg_030_0_a3_2 "state_machine.un10_bg_030_0_a3_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un10_bg_030_0_a3 "state_machine.un10_bg_030_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_0_1_0 "SM_AMIGA_ns_0_1[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_0_0 "SM_AMIGA_ns_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_1_2 "cpu_est_ns_0_0_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_2 "cpu_est_ns_0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_DMA_1_sqmuxa_i_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_DMA_1_sqmuxa_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_1_7 "SM_AMIGA_ns_i_1[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_7 "SM_AMIGA_ns_i[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_LDS_000_INT_7_0_1 "state_machine.LDS_000_INT_7_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_LDS_000_INT_7_0 "state_machine.LDS_000_INT_7_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance LDS_000_INT_1_sqmuxa_i_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance LDS_000_INT_1_sqmuxa_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un3_dtack_i_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_A0_DMA_4_0_a3_2 "state_machine.A0_DMA_4_0_a3_2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_A0_DMA_4_0_a3 "state_machine.A0_DMA_4_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_1_i_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_1_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DTACK_SYNC_1_sqmuxa_1_i_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DTACK_SYNC_1_sqmuxa_1_i_a3_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DTACK_SYNC_1_sqmuxa_1_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un10_bg_030_0_a3_1_0 "state_machine.un10_bg_030_0_a3_1_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_un10_bg_030_0_a3 "state_machine.un10_bg_030_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_1_i_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_1_i_a3_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_1_i_a3_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_1_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_7_0_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_7_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_UDS_000_INT_7_0_1 "state_machine.UDS_000_INT_7_0_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_DMA_1_sqmuxa_i_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_1_1 "SM_AMIGA_ns_i_o2_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_1 "SM_AMIGA_ns_i_o2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_0_sqmuxa_2_i_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_0_sqmuxa_2_i_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_0_sqmuxa_2_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_1_1 "cpu_est_ns_0_0_1[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_2_1 "cpu_est_ns_0_0_2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_1 "cpu_est_ns_0_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_0_a3_1_5 "SM_AMIGA_ns_0_a3_1[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_0_a3_2_5 "SM_AMIGA_ns_0_a3_2[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_0_a3_5 "SM_AMIGA_ns_0_a3[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_i_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_i_a3_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_i_a3_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un8_ciin_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un8_ciin_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un8_ciin_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un8_ciin_6 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un8_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_1_i_o2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_1_i_o2_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_1_i_o2_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_1_i_o2_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_1_i_o2_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_1_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_7_0_o2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_7_0_o2_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_7_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SIZE_DMA_1_sqmuxa_i_o3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SIZE_DMA_1_sqmuxa_i_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_A0_DMA_4_0_a3_1 "state_machine.A0_DMA_4_0_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_INT_1_sqmuxa_1_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_108_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_109_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VMA_INT_1_sqmuxa_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un6_bgack_000_0_i "state_machine.un6_bgack_000_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance A0_DMA_1_sqmuxa_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_000_D2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un59_bgack_030_int_i "state_machine.un59_bgack_030_int_i") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance un4_ciin_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un4_ciin_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un4_ciin (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_i_o2_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_i_o2_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_i_o2_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_i_o2_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_i_o2_5 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_DMA_1_sqmuxa_i_o3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_as_030_000_sync8_1_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_115_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_116_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_AS_030_2_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance BG_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_206_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un10_bg_030_0_i "state_machine.un10_bg_030_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_000_DMA_1_sqmuxa_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_000_INT_1_sqmuxa_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_203_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un13_clk_000_d0_i "state_machine.un13_clk_000_d0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un15_clk_000_d0_0_i "state_machine.un15_clk_000_d0_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_un6_bgack_000_0_i "state_machine.un6_bgack_000_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance un8_ciin_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un8_ciin_2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un8_ciin_3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un8_ciin_4 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_237_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_239_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance LDS_000_INT_1_sqmuxa_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_236_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_1_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_235_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_as_030_000_sync8_1_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_175_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SIZE_DMA_1_sqmuxa_i_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DTACK_SYNC_1_sqmuxa_1_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance BG_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_233_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un10_bg_030_0_i "state_machine.un10_bg_030_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_1_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_126_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_127_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_125_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_124_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_122_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_172_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_SIZE_DMA_4_0_i_1 "state_machine.SIZE_DMA_4_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_DS_000_DMA_3_0_i "state_machine.DS_000_DMA_3_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_66_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_120_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_LDS_000_INT_7_0_i "state_machine.LDS_000_INT_7_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_UDS_000_INT_7_0_i "state_machine.UDS_000_INT_7_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_118_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_117_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_139_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_138_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_136_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_137_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_135_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_168_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_132_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_164_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_130_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_131_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_i_i_6 "SM_AMIGA_ns_i_i_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_128_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_129_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_0_i_5 "SM_AMIGA_ns_0_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_153_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_i_4 "SM_AMIGA_ns_i_o2_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_150_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_148_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_149_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGAse_4_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_146_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_147_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGAse_5_i_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_123_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_145_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_198_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_67_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_UDS_000_INT_7_0_i "state_machine.UDS_000_INT_7_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_146_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_0_i_0 "SM_AMIGA_ns_0_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_142_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_143_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance N_144_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_LDS_000_INT_7_0_i "state_machine.LDS_000_INT_7_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_96_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_240_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_241_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_158_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_157_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_DS_000_DMA_5_iv_0_i "state_machine.DS_000_DMA_5_iv_0_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_155_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_156_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_153_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_154_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_176_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_179_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_i_1 "cpu_est_ns_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_152_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_151_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_150_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_197_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGAse_4_0_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_167_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_168_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance cpu_estse_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_163_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_164_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_165_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGAse_7_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_160_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_161_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_162_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGAse_0_0_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_98_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_159_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename cpu_est_ns_0_0_i_2 "cpu_est_ns_0_0_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_172_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_AS_030_000_SYNC_1_sqmuxa_1_0_o3_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_174_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGAse_6_0_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_1_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_141_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DS_000_DMA_1_sqmuxa_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_170_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_i_o2_i_6 "SM_AMIGA_ns_i_i_o2_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance CLK_000_D1_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename clk_un3_clk_000_d1_0_o2_i "clk.un3_clk_000_d1_0_o2_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_171_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_LDS_000_INT_7_0_o2_i "state_machine.LDS_000_INT_7_0_o2_i") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance AS_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DSACK1_INT_1_sqmuxa_1_i_o3_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGAse_1_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGAse_3_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGAse_2_i_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SIZE_DMA_1_sqmuxa_i_o3_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGAse_7_0_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_0_sqmuxa_2_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_i_1 "SM_AMIGA_ns_i_o2_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance AS_030_000_SYNC_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_000_D2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_000_DMA_1_sqmuxa_i_o3_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DSACK1_INT_1_sqmuxa_i_o3_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_000_INT_1_sqmuxa_i_o2_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_0_i_4 "SM_AMIGA_ns_i_o2_0_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_152_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_i_1 "cpu_est_ns_0_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_134_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_169_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_133_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_167_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_0_sqmuxa_2_i_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_140_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_CLK_030_H_2_f0_i_o2_i "state_machine.CLK_030_H_2_f0_i_o2_i") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_0_i_1 "SM_AMIGA_ns_i_o2_0_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_171_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0_o3_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename cpu_est_ns_i_0_o2_i_3 "cpu_est_ns_i_0_o2_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGAse_1_i_0_o2_0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance DS_030_c_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_i_0 "cpu_est_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_m3_2__r "cpu_est_ns_0_0_m3_2_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_m3_2__m "cpu_est_ns_0_0_m3_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_m3_2__n "cpu_est_ns_0_0_m3_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_m3_2__p "cpu_est_ns_0_0_m3_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance I_158 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_157 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_156 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_un10_bg_030_0_a3_1 "state_machine.un10_bg_030_0_a3_1") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance VMA_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_i_7 "SM_AMIGA_ns_i_o2_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance BGACK_030_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_000_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AS_000_INT_1_sqmuxa_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DSACK1_INT_1_sqmuxa_i_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_UDS_000_INT_7_0_m3_r "state_machine.UDS_000_INT_7_0_m3.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_UDS_000_INT_7_0_m3_m "state_machine.UDS_000_INT_7_0_m3.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_UDS_000_INT_7_0_m3_n "state_machine.UDS_000_INT_7_0_m3.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_UDS_000_INT_7_0_m3_p "state_machine.UDS_000_INT_7_0_m3.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance nEXP_SPACE_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_0_sqmuxa_2_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename clk_un3_clk_000_d1_0_o2 "clk.un3_clk_000_d1_0_o2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_6_0_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SIZE_DMA_1_sqmuxa_i_o2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_AS_030_000_SYNC_1_sqmuxa_1_0_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_LDS_000_INT_7_0_o3 "state_machine.LDS_000_INT_7_0_o3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_1_i_0_o2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_i_o2_6 "SM_AMIGA_ns_i_i_o2[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_7 "SM_AMIGA_ns_i_o2[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_est_i_3 "cpu_est_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename cpu_est_ns_i_0_o2_3 "cpu_est_ns_i_0_o2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance BGACK_030_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGAse_2_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGAse_3_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_x2_1 "cpu_est_ns_0_0_x2[1]") (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance SM_AMIGAse_1_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_0_1 "SM_AMIGA_ns_i_o2_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance CLK_030_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_CLK_030_H_2_f0_i_o2 "state_machine.CLK_030_H_2_f0_i_o2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_0_2 "SM_AMIGA_ns_i_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_0_3 "SM_AMIGA_ns_i_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_4 "SM_AMIGA_ns_i[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_0_5 "SM_AMIGA_ns_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_i_6 "SM_AMIGA_ns_i_i[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_est_ns_i_0_3 "cpu_est_ns_i_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance AMIGA_BUS_DATA_DIR_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_DS_000_DMA_5_iv_0 "state_machine.DS_000_DMA_5_iv_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_AMIGA_BUS_ENABLE_6_iv_0 "state_machine.AMIGA_BUS_ENABLE_6_iv_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_ns_0_0_2 "cpu_est_ns_0_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance cpu_estse_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_4_0_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_1_i_0_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DSACK1_INT_1_sqmuxa_1_i_o3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_CLK_030_H_2_f0_i "state_machine.CLK_030_H_2_f0_i") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_AMIGA_BUS_ENABLE_4_iv_0 "state_machine.AMIGA_BUS_ENABLE_4_iv_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance cpu_estse_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_4 "SM_AMIGA_ns_i_o2[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_o2_0_4 "SM_AMIGA_ns_i_o2_0[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance CLK_000_D4_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_LDS_000_INT_7_0_o2 "state_machine.LDS_000_INT_7_0_o2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_LDS_000_INT_7_0_m3_r "state_machine.LDS_000_INT_7_0_m3.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_LDS_000_INT_7_0_m3_m "state_machine.LDS_000_INT_7_0_m3.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_LDS_000_INT_7_0_m3_n "state_machine.LDS_000_INT_7_0_m3.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_LDS_000_INT_7_0_m3_p "state_machine.LDS_000_INT_7_0_m3.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_o2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_000_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGAse_6_0_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance A0_DMA_1_sqmuxa_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_144 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_145 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_SIZE_DMA_4_0_a2_1 "state_machine.SIZE_DMA_4_0_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance I_143 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_A0_DMA_2_0_a2 "state_machine.A0_DMA_2_0_a2") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_un6_bgack_000_0 "state_machine.un6_bgack_000_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VMA_INT_1_sqmuxa_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_INT_1_sqmuxa_1_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance VPA_SYNC_1_sqmuxa_1_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_un15_clk_000_d0_0 "state_machine.un15_clk_000_d0_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_INT_1_sqmuxa_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_DMA_1_sqmuxa_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename state_machine_un10_bg_030_0 "state_machine.un10_bg_030_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance DTACK_SYNC_1_sqmuxa_1_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SIZE_DMA_1_sqmuxa_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance un1_as_030_000_sync8_1_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_030_000_SYNC_1_sqmuxa_1_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_5_i_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_4_0_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_3_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_2_i_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_DMA_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance cpu_estse_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance cpu_estse_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SIZE_DMA_1_sqmuxa_i_a2_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance nEXP_SPACE_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance un1_AS_030_000_SYNC_1_sqmuxa_1_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance CLK_000_D5_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance N_111_i_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance I_159 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SIZE_DMA_1_sqmuxa_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_030_000_SYNC_1_sqmuxa_i (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_DS_000_DMA_3_0 "state_machine.DS_000_DMA_3_0") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename state_machine_SIZE_DMA_4_0_1 "state_machine.SIZE_DMA_4_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_1 "SM_AMIGA_ns_i[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance cpu_estse_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance cpu_estse_i_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_DMA_1_sqmuxa_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance VMA_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance VPA_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance DTACK_D0_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a2_0_4 "SM_AMIGA_ns_i_a2_0[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a2_7 "SM_AMIGA_ns_i_a2[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_i_0 "cpu_est_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename cpu_est_ns_0_0_a2_1 "cpu_est_ns_0_0_a2[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_i_0_a2_3 "cpu_est_ns_i_0_a2[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_est_i_1 "cpu_est_i[1]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename cpu_est_ns_0_0_a2_0_1 "cpu_est_ns_0_0_a2_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_3_i_0_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_3_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_2_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_1_i_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance un1_DSACK1_INT_0_sqmuxa_i_o3_i_a2 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_0_a2_0 "SM_AMIGA_ns_0_a2[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_i_2 "cpu_est_i[2]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_a3_0_1 "cpu_est_ns_0_0_a3_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_est_ns_i_0_a3_3 "cpu_est_ns_i_0_a3[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_est_ns_i_0_a3_0_3 "cpu_est_ns_i_0_a3_0[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AMIGA_BUS_DATA_DIR_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance RW_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename state_machine_DS_000_DMA_5_iv_0_a3 "state_machine.DS_000_DMA_5_iv_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename state_machine_AMIGA_BUS_ENABLE_6_iv_0_a3 "state_machine.AMIGA_BUS_ENABLE_6_iv_0_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_DATA_DIR_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance CLK_030_H_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_CLK_030_H_2_f0_i_a3 "state_machine.CLK_030_H_2_f0_i_a3") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AMIGA_BUS_ENABLE_0_sqmuxa_2_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance DS_000_DMA_1_sqmuxa_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename cpu_est_ns_0_0_a3_2 "cpu_est_ns_0_0_a3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_0_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_0_0_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_0_0_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_7_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_7_0_a3_1 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename A_i_31 "A_i[31]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance CLK_OUT_PRE_0 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) - (instance VMA_INT_1_sqmuxa_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance AS_000_INT_1_sqmuxa_1_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_as_030_000_sync8_1_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance I_160 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance I_161 (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance SM_AMIGAse_6_0_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_5_i_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_5_i_i_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_4_0_0_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance SM_AMIGAse_4_0_0_a3_0 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_a3_0_2 "cpu_est_ns_0_0_a3_0[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_a3_1_2 "cpu_est_ns_0_0_a3_1[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_0_a3_0 "SM_AMIGA_ns_0_a3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_0_a3_0_0 "SM_AMIGA_ns_0_a3_0[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance AS_000_DMA_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance I_147 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename state_machine_SIZE_DMA_4_i_a3_0 "state_machine.SIZE_DMA_4_i_a3[0]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a3_1 "SM_AMIGA_ns_i_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a3_0_1 "SM_AMIGA_ns_i_a3_0[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_0_a3_2 "SM_AMIGA_ns_i_0_a3[2]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_0_a3_3 "SM_AMIGA_ns_i_0_a3[3]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance RST_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_16 "A_i[16]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_18 "A_i[18]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_19 "A_i[19]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A_i_24 "A_i[24]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a3_4 "SM_AMIGA_ns_i_a3[4]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_0_a3_0_5 "SM_AMIGA_ns_0_a3_0[5]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_i_a3_6 "SM_AMIGA_ns_i_i_a3[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_i_a3_0_6 "SM_AMIGA_ns_i_i_a3_0[6]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename SM_AMIGA_ns_i_a3_7 "SM_AMIGA_ns_i_a3[7]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_est_ns_0_0_a3_1 "cpu_est_ns_0_0_a3[1]") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename A_i_25 "A_i[25]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_i_26 "A_i[26]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_i_27 "A_i[27]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_i_28 "A_i[28]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_i_29 "A_i[29]") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename A_i_30 "A_i[30]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename CLK_CNT_P_i_0 "CLK_CNT_P_i[0]") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_estse_0_r "cpu_estse_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_estse_0_m "cpu_estse_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_estse_0_n "cpu_estse_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_estse_0_p "cpu_estse_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename cpu_estse_1_r "cpu_estse_1.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_estse_1_m "cpu_estse_1.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_estse_1_n "cpu_estse_1.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_estse_1_p "cpu_estse_1.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename cpu_estse_2_r "cpu_estse_2.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename cpu_estse_2_m "cpu_estse_2.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_estse_2_n "cpu_estse_2.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename cpu_estse_2_p "cpu_estse_2.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename A_i_31 "A_i[31]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_16 "A_i[16]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_18 "A_i[18]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_19 "A_i[19]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_OUT_PRE_25_0 (viewRef prim (cellRef XOR2 (libraryRef mach))) ) + (instance un1_DSACK1_INT_0_sqmuxa_i_o3_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance I_148 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance un1_as_030_000_sync8_1_i_a3 (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance I_146 (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance CLK_OUT_PRE_50_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance RST_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename A_i_24 "A_i[24]") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_121_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance N_205_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename DSACK1_INT_0_r "DSACK1_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename DSACK1_INT_0_m "DSACK1_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename DSACK1_INT_0_n "DSACK1_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename DSACK1_INT_0_p "DSACK1_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_r "AS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_m "AS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_n "AS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_DMA_0_p "AS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance N_126_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_INT_0_r "AS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_000_INT_0_m "AS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_INT_0_n "AS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_000_INT_0_p "AS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance N_231_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename VPA_SYNC_0_r "VPA_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename VPA_SYNC_0_m "VPA_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename VPA_SYNC_0_n "VPA_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename VPA_SYNC_0_p "VPA_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (instance (rename VMA_INT_0_r "VMA_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename VMA_INT_0_m "VMA_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename VMA_INT_0_n "VMA_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) @@ -611,15 +590,6 @@ (instance (rename BGACK_030_INT_0_m "BGACK_030_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename BGACK_030_INT_0_n "BGACK_030_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename BGACK_030_INT_0_p "BGACK_030_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance SIZE_DMA_0_sqmuxa_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_0__r "SIZE_DMA_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_0__m "SIZE_DMA_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_0__n "SIZE_DMA_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_0__p "SIZE_DMA_0_0_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_1__r "SIZE_DMA_0_1_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_1__m "SIZE_DMA_0_1_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_1__n "SIZE_DMA_0_1_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename SIZE_DMA_0_1__p "SIZE_DMA_0_1_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (instance (rename IPL_030_0_0__r "IPL_030_0_0_.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename IPL_030_0_0__m "IPL_030_0_0_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_0_0__n "IPL_030_0_0_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) @@ -632,12 +602,33 @@ (instance (rename IPL_030_0_2__m "IPL_030_0_2_.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_0_2__n "IPL_030_0_2_.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename IPL_030_0_2__p "IPL_030_0_2_.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename state_machine_un59_bgack_030_int "state_machine.un59_bgack_030_int") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_estse_0_r "cpu_estse_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_estse_0_m "cpu_estse_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_estse_0_n "cpu_estse_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_estse_0_p "cpu_estse_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename cpu_estse_1_r "cpu_estse_1.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_estse_1_m "cpu_estse_1.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_estse_1_n "cpu_estse_1.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_estse_1_p "cpu_estse_1.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename cpu_estse_2_r "cpu_estse_2.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename cpu_estse_2_m "cpu_estse_2.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_estse_2_n "cpu_estse_2.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename cpu_estse_2_p "cpu_estse_2.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance CLK_OUT_PRE_50_D_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename clk_un3_clk_out_pre_50 "clk.un3_clk_out_pre_50") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance FPU_CS_INT_i (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename AMIGA_BUS_ENABLE_0_r "AMIGA_BUS_ENABLE_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename AMIGA_BUS_ENABLE_0_m "AMIGA_BUS_ENABLE_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename AMIGA_BUS_ENABLE_0_n "AMIGA_BUS_ENABLE_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename AMIGA_BUS_ENABLE_0_p "AMIGA_BUS_ENABLE_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_r "AS_030_000_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_m "AS_030_000_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_n "AS_030_000_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_030_000_SYNC_0_p "AS_030_000_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename CLK_030_H_0_r "CLK_030_H_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename CLK_030_H_0_m "CLK_030_H_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename CLK_030_H_0_n "CLK_030_H_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename CLK_030_H_0_p "CLK_030_H_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (instance (rename UDS_000_INT_0_r "UDS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename UDS_000_INT_0_m "UDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename UDS_000_INT_0_n "UDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) @@ -646,49 +637,34 @@ (instance (rename LDS_000_INT_0_m "LDS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename LDS_000_INT_0_n "LDS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename LDS_000_INT_0_p "LDS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_r "AS_030_000_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_m "AS_030_000_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_n "AS_030_000_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename AS_030_000_SYNC_0_p "AS_030_000_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_r "DS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_m "DS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_n "DS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DS_000_DMA_0_p "DS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (instance (rename FPU_CS_INT_0_r "FPU_CS_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename FPU_CS_INT_0_m "FPU_CS_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename FPU_CS_INT_0_n "FPU_CS_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename FPU_CS_INT_0_p "FPU_CS_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance N_234_i (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DTACK_SYNC_0_r "DTACK_SYNC_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename DTACK_SYNC_0_m "DTACK_SYNC_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DTACK_SYNC_0_n "DTACK_SYNC_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename DTACK_SYNC_0_p "DTACK_SYNC_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance (rename A0_DMA_0_r "A0_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) - (instance (rename A0_DMA_0_m "A0_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename A0_DMA_0_n "A0_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) - (instance (rename A0_DMA_0_p "A0_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (instance (rename BG_000_0_r "BG_000_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) (instance (rename BG_000_0_m "BG_000_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename BG_000_0_n "BG_000_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) (instance (rename BG_000_0_p "BG_000_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) - (instance N_232_i (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_r "DS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_m "DS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_n "DS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename DS_000_DMA_0_p "DS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_r "AS_000_DMA_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_m "AS_000_DMA_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_n "AS_000_DMA_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_DMA_0_p "AS_000_DMA_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) + (instance (rename AS_000_INT_0_r "AS_000_INT_0.r") (viewRef prim (cellRef INV (libraryRef mach))) ) + (instance (rename AS_000_INT_0_m "AS_000_INT_0.m") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_INT_0_n "AS_000_INT_0.n") (viewRef prim (cellRef AND2 (libraryRef mach))) ) + (instance (rename AS_000_INT_0_p "AS_000_INT_0.p") (viewRef prim (cellRef OR2 (libraryRef mach))) ) (net BGACK_030_INT (joined (portRef Q (instanceRef BGACK_030_INT)) (portRef I0 (instanceRef BGACK_030_INT_0_n)) - (portRef I0 (instanceRef AS_000_INT_1_sqmuxa_1_i_a3)) - (portRef I0 (instanceRef VMA_INT_1_sqmuxa_i_a3)) (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_0_a3)) - (portRef I0 (instanceRef A0_DMA_1_sqmuxa_i)) - (portRef I0 (instanceRef SM_AMIGAse_1_i_0_o2)) - (portRef I0 (instanceRef SM_AMIGAse_4_0_0_o2)) - (portRef I0 (instanceRef state_machine_AMIGA_BUS_ENABLE_6_iv_0)) - (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2)) - (portRef I0 (instanceRef SM_AMIGAse_2_i_0_o2)) + (portRef I0 (instanceRef state_machine_AMIGA_BUS_ENABLE_4_iv_0)) (portRef I0 (instanceRef BGACK_030_INT_i)) - (portRef I0 (instanceRef SM_AMIGAse_1_i_0_o2_0)) - (portRef I0 (instanceRef state_machine_LDS_000_INT_7_0_o3)) - (portRef I1 (instanceRef SM_AMIGAse_7_0_o2_1)) - (portRef I0 (instanceRef N_111_i_i_a3_1)) + (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_a3_1)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_2_i_1)) (portRef OE (instanceRef AS_000)) (portRef I0 (instanceRef BGACK_030)) (portRef D (instanceRef BGACK_030_INT_D)) @@ -712,31 +688,41 @@ (portRef I0 (instanceRef AS_030_000_SYNC_0_n)) (portRef I0 (instanceRef AS_030_000_SYNC_i)) )) - (net DTACK_SYNC (joined - (portRef Q (instanceRef DTACK_SYNC)) - (portRef I0 (instanceRef DTACK_SYNC_0_n)) - (portRef I0 (instanceRef state_machine_un59_bgack_030_int)) + (net BGACK_030_INT_D (joined + (portRef Q (instanceRef BGACK_030_INT_D)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_2_i_1)) + (portRef I1 (instanceRef state_machine_AMIGA_BUS_ENABLE_4_iv_0_a3_1)) )) - (net VPA_SYNC (joined - (portRef Q (instanceRef VPA_SYNC)) - (portRef I1 (instanceRef state_machine_un59_bgack_030_int)) - (portRef I0 (instanceRef VPA_SYNC_0_n)) + (net AS_000_DMA (joined + (portRef Q (instanceRef AS_000_DMA)) + (portRef I0 (instanceRef AS_000_DMA_0_n)) + (portRef I0 (instanceRef AS_000_DMA_i)) + (portRef I0 (instanceRef AS_030)) )) (net VPA_D (joined (portRef Q (instanceRef VPA_D)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_0_4)) (portRef I0 (instanceRef VPA_D_i)) - (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa_1_i_a3_2)) + )) + (net CLK_OUT_PRE_50_D (joined + (portRef Q (instanceRef CLK_OUT_PRE_50_D)) + (portRef I0 (instanceRef CLK_OUT_PRE_50_D_i)) )) (net CLK_000_D0 (joined (portRef Q (instanceRef CLK_000_D0)) - (portRef I0 (instanceRef CLK_000_D0_i)) - (portRef I1 (instanceRef SM_AMIGAse_4_0_0_o2)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_i_a3_0_6)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_7)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_0_4)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_0_2)) (portRef I0 (instanceRef clk_un3_clk_000_d1_0_o2)) + (portRef I0 (instanceRef CLK_000_D0_i)) (portRef D (instanceRef CLK_000_D1)) )) (net CLK_000_D1 (joined (portRef Q (instanceRef CLK_000_D1)) (portRef I0 (instanceRef CLK_000_D1_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_0_a3_1_5)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a3_0_4)) (portRef D (instanceRef CLK_000_D2)) )) (net CLK_000_D2 (joined @@ -744,22 +730,26 @@ (portRef I0 (instanceRef CLK_000_D2_i)) (portRef D (instanceRef CLK_000_D3)) )) - (net CLK_000_D5 (joined - (portRef Q (instanceRef CLK_000_D5)) - (portRef I0 (instanceRef CLK_000_D5_i)) + (net CLK_000_D4 (joined + (portRef Q (instanceRef CLK_000_D4)) + (portRef I0 (instanceRef CLK_000_D4_i)) + (portRef I0 (instanceRef AS_000_INT_1_sqmuxa_i_o2)) )) - (net CLK_OUT_PRE (joined - (portRef Q (instanceRef CLK_OUT_PRE)) - (portRef I1 (instanceRef CLK_OUT_PRE_0)) + (net DTACK_D0 (joined + (portRef Q (instanceRef DTACK_D0)) + (portRef I0 (instanceRef DTACK_D0_i)) + )) + (net CLK_OUT_PRE_50 (joined + (portRef Q (instanceRef CLK_OUT_PRE_50)) + (portRef I0 (instanceRef clk_un3_clk_out_pre_50)) + (portRef I0 (instanceRef CLK_OUT_PRE_50_i)) + (portRef D (instanceRef CLK_OUT_PRE_50_D)) + )) + (net CLK_OUT_PRE_25 (joined + (portRef Q (instanceRef CLK_OUT_PRE_25)) + (portRef I0 (instanceRef CLK_OUT_PRE_25_0)) (portRef D (instanceRef CLK_OUT_INT)) )) - (net BGACK_030_INT_D (joined - (portRef Q (instanceRef BGACK_030_INT_D)) - (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_a3_0)) - (portRef I1 (instanceRef A0_DMA_1_sqmuxa_i)) - (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_x2)) - (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_a3)) - )) (net VCC (joined (portRef I0 (instanceRef AMIGA_BUS_ENABLE_LOW)) (portRef I0 (instanceRef AVEC)) @@ -770,62 +760,39 @@ (portRef I0 (instanceRef AVEC_EXP)) (portRef I0 (instanceRef BERR)) )) - (net (rename CLK_CNT_P_0 "CLK_CNT_P[0]") (joined - (portRef Q (instanceRef CLK_CNT_P_0)) - (portRef I0 (instanceRef CLK_CNT_P_i_0)) - (portRef I0 (instanceRef CLK_OUT_PRE_0)) - )) - (net (rename SM_AMIGA_5 "SM_AMIGA[5]") (joined - (portRef Q (instanceRef SM_AMIGA_5)) - (portRef I1 (instanceRef state_machine_LDS_000_INT_7_0_o2)) - (portRef I1 (instanceRef SM_AMIGAse_2_i_0_o2)) - (portRef I0 (instanceRef SM_AMIGA_i_5)) - )) - (net CLK_000_D4 (joined - (portRef Q (instanceRef CLK_000_D4)) - (portRef I0 (instanceRef N_111_i_i_a2)) - (portRef I0 (instanceRef state_machine_LDS_000_INT_7_0_o2)) - (portRef I0 (instanceRef CLK_000_D4_i)) - (portRef D (instanceRef CLK_000_D5)) - )) - (net (rename SM_AMIGA_7 "SM_AMIGA[7]") (joined - (portRef Q (instanceRef SM_AMIGA_7)) - (portRef I1 (instanceRef VMA_INT_1_sqmuxa_i_a3)) - (portRef I1 (instanceRef SM_AMIGAse_7_0_a3)) - (portRef I1 (instanceRef SM_AMIGAse_0_0_0_a3_1)) - (portRef I0 (instanceRef state_machine_un10_bg_030_0_a3_1)) - )) - (net (rename SM_AMIGA_1 "SM_AMIGA[1]") (joined - (portRef Q (instanceRef SM_AMIGA_1)) - (portRef I1 (instanceRef SM_AMIGAse_5_i_i_a3)) - (portRef I0 (instanceRef SM_AMIGA_i_1)) - (portRef I1 (instanceRef N_111_i_i_a3)) - )) - (net (rename SM_AMIGA_0 "SM_AMIGA[0]") (joined - (portRef Q (instanceRef SM_AMIGA_0)) - (portRef I0 (instanceRef SM_AMIGA_i_0)) - (portRef I1 (instanceRef SM_AMIGAse_7_0_a3_1)) - )) - (net (rename SM_AMIGA_6 "SM_AMIGA[6]") (joined - (portRef Q (instanceRef SM_AMIGA_6)) - (portRef I1 (instanceRef SM_AMIGAse_0_0_0_a3)) - (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_a2)) - (portRef I1 (instanceRef SM_AMIGAse_1_i_0_o2_0)) - (portRef I1 (instanceRef SM_AMIGAse_7_0_a3_0_1)) - )) - (net AS_000_DMA (joined - (portRef Q (instanceRef AS_000_DMA)) - (portRef I0 (instanceRef AS_000_DMA_0_n)) - (portRef I0 (instanceRef state_machine_DS_000_DMA_5_iv_0_a3)) - (portRef I0 (instanceRef AS_000_DMA_i)) - (portRef I0 (instanceRef AS_030)) + (net (rename state_machine_un13_clk_000_d0 "state_machine.un13_clk_000_d0") (joined + (portRef O (instanceRef state_machine_un15_clk_000_d0_0_a3_0)) + (portRef I0 (instanceRef VMA_INT_0_m)) + (portRef I0 (instanceRef state_machine_un13_clk_000_d0_i)) )) (net AS_000_INT (joined (portRef Q (instanceRef AS_000_INT)) (portRef I0 (instanceRef AS_000_INT_0_n)) - (portRef I0 (instanceRef SM_AMIGAse_6_0_i_a2)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_7)) (portRef I0 (instanceRef AS_000)) )) + (net (rename SM_AMIGA_1 "SM_AMIGA[1]") (joined + (portRef Q (instanceRef SM_AMIGA_1)) + (portRef I1 (instanceRef un1_DSACK1_INT_0_sqmuxa_i_o3_i_a3)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_i_a3_6)) + (portRef I0 (instanceRef SM_AMIGA_i_1)) + )) + (net (rename SM_AMIGA_0 "SM_AMIGA[0]") (joined + (portRef Q (instanceRef SM_AMIGA_0)) + (portRef I0 (instanceRef SM_AMIGA_i_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_0_a3_0_0)) + )) + (net (rename SM_AMIGA_6 "SM_AMIGA[6]") (joined + (portRef Q (instanceRef SM_AMIGA_6)) + (portRef I0 (instanceRef SM_AMIGA_ns_0_a2_0)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_2_i_o2)) + (portRef I0 (instanceRef SM_AMIGA_i_6)) + )) + (net (rename SM_AMIGA_5 "SM_AMIGA[5]") (joined + (portRef Q (instanceRef SM_AMIGA_5)) + (portRef I0 (instanceRef SM_AMIGA_i_5)) + (portRef I1 (instanceRef AS_000_INT_1_sqmuxa_i_o2)) + )) (net UDS_000_INT (joined (portRef Q (instanceRef UDS_000_INT)) (portRef I0 (instanceRef UDS_000_INT_0_n)) @@ -841,27 +808,32 @@ (portRef I0 (instanceRef DSACK1_INT_0_n)) (portRef I0 (instanceRef DSACK_1)) )) + (net (rename clk_un3_clk_out_pre_50 "clk.un3_clk_out_pre_50") (joined + (portRef O (instanceRef clk_un3_clk_out_pre_50)) + (portRef I1 (instanceRef CLK_OUT_PRE_25_0)) + )) (net CLK_000_D3 (joined (portRef Q (instanceRef CLK_000_D3)) - (portRef I1 (instanceRef SM_AMIGAse_7_0_o2_2)) + (portRef I0 (instanceRef un1_DSACK1_INT_0_sqmuxa_i_o3_i_a2)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_1_1)) (portRef D (instanceRef CLK_000_D4)) )) - (net (rename state_machine_un59_bgack_030_int "state_machine.un59_bgack_030_int") (joined - (portRef O (instanceRef state_machine_un59_bgack_030_int_i)) - (portRef I1 (instanceRef SM_AMIGAse_3_i_0_a2)) - )) - (net (rename SM_AMIGA_3 "SM_AMIGA[3]") (joined - (portRef Q (instanceRef SM_AMIGA_3)) - (portRef I0 (instanceRef SM_AMIGA_i_3)) - (portRef I1 (instanceRef SM_AMIGAse_4_0_0_a3_0)) - (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_1_i_a3_2)) - (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_1_i_a3_2)) + (net CLK_030_H (joined + (portRef Q (instanceRef CLK_030_H)) + (portRef I0 (instanceRef CLK_030_H_0_n)) + (portRef I0 (instanceRef DS_000_DMA_1_sqmuxa_i_a3)) + (portRef I0 (instanceRef CLK_030_H_i)) )) (net (rename state_machine_un6_bgack_000 "state_machine.un6_bgack_000") (joined (portRef O (instanceRef state_machine_un6_bgack_000_0_i)) (portRef I1 (instanceRef BGACK_030_INT_0_m)) (portRef I0 (instanceRef BGACK_030_INT_0_r)) )) + (net (rename state_machine_un15_clk_000_d0 "state_machine.un15_clk_000_d0") (joined + (portRef O (instanceRef state_machine_un15_clk_000_d0_0_i)) + (portRef I1 (instanceRef VMA_INT_0_m)) + (portRef I0 (instanceRef VMA_INT_0_r)) + )) (net DS_000_DMA (joined (portRef Q (instanceRef DS_000_DMA)) (portRef I0 (instanceRef DS_000_DMA_0_n)) @@ -869,51 +841,59 @@ )) (net (rename SIZE_DMA_0 "SIZE_DMA[0]") (joined (portRef Q (instanceRef SIZE_DMA_0)) - (portRef I0 (instanceRef SIZE_DMA_0_0__n)) (portRef I0 (instanceRef SIZE_0)) )) (net (rename SIZE_DMA_1 "SIZE_DMA[1]") (joined (portRef Q (instanceRef SIZE_DMA_1)) - (portRef I0 (instanceRef SIZE_DMA_0_1__n)) (portRef I0 (instanceRef SIZE_1)) )) (net A0_DMA (joined (portRef Q (instanceRef A0_DMA)) - (portRef I0 (instanceRef A0_DMA_0_n)) (portRef I0 (instanceRef A0)) )) + (net (rename SM_AMIGA_7 "SM_AMIGA[7]") (joined + (portRef Q (instanceRef SM_AMIGA_7)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a3_0_1)) + (portRef I0 (instanceRef SM_AMIGA_i_7)) + (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_a3_2)) + (portRef I0 (instanceRef state_machine_un10_bg_030_0_a3_2)) + )) + (net un1_AMIGA_BUS_ENABLE_1_sqmuxa_2 (joined + (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0_o3_i)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_m)) + )) (net (rename SM_AMIGA_4 "SM_AMIGA[4]") (joined (portRef Q (instanceRef SM_AMIGA_4)) - (portRef I1 (instanceRef SM_AMIGAse_3_i_0_o2)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_o2_0_4)) (portRef I0 (instanceRef SM_AMIGA_i_4)) - (portRef I1 (instanceRef LDS_000_INT_1_sqmuxa_i_a3)) + )) + (net (rename state_machine_A0_DMA_2 "state_machine.A0_DMA_2") (joined + (portRef O (instanceRef state_machine_A0_DMA_2_0_a3)) + (portRef D (instanceRef A0_DMA)) + )) + (net (rename state_machine_DS_000_DMA_3 "state_machine.DS_000_DMA_3") (joined + (portRef O (instanceRef state_machine_DS_000_DMA_3_0_i)) + (portRef I0 (instanceRef DS_000_DMA_0_m)) + )) + (net (rename state_machine_SIZE_DMA_4_1 "state_machine.SIZE_DMA_4[1]") (joined + (portRef O (instanceRef state_machine_SIZE_DMA_4_0_i_1)) + (portRef D (instanceRef SIZE_DMA_1)) + )) + (net (rename SM_AMIGA_3 "SM_AMIGA[3]") (joined + (portRef Q (instanceRef SM_AMIGA_3)) + (portRef I0 (instanceRef SM_AMIGA_i_3)) + (portRef I1 (instanceRef SM_AMIGA_ns_0_a3_2_5)) )) (net (rename SM_AMIGA_2 "SM_AMIGA[2]") (joined (portRef Q (instanceRef SM_AMIGA_2)) - (portRef I1 (instanceRef SM_AMIGAse_4_0_0_a3)) - (portRef I1 (instanceRef SM_AMIGAse_5_i_i_a3_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_i_a3_0_6)) + (portRef I1 (instanceRef SM_AMIGA_ns_0_a3_0_5)) )) (net (rename state_machine_un10_bg_030 "state_machine.un10_bg_030") (joined (portRef O (instanceRef state_machine_un10_bg_030_0_i)) (portRef I1 (instanceRef BG_000_0_m)) (portRef I0 (instanceRef BG_000_0_r)) )) - (net un1_AS_030_000_SYNC_1_sqmuxa_1 (joined - (portRef O (instanceRef un1_AS_030_000_SYNC_1_sqmuxa_1_0_o3_i)) - (portRef I0 (instanceRef AS_030_000_SYNC_0_m)) - )) - (net SIZE_DMA_0_sqmuxa (joined - (portRef O (instanceRef SIZE_DMA_0_sqmuxa_0_a3)) - (portRef I0 (instanceRef SIZE_DMA_0_sqmuxa_i)) - )) - (net (rename state_machine_A0_DMA_4 "state_machine.A0_DMA_4") (joined - (portRef O (instanceRef state_machine_A0_DMA_4_0_a3)) - (portRef I0 (instanceRef A0_DMA_0_m)) - )) - (net (rename state_machine_DS_000_DMA_5 "state_machine.DS_000_DMA_5") (joined - (portRef O (instanceRef state_machine_DS_000_DMA_5_iv_0_i)) - (portRef I0 (instanceRef DS_000_DMA_0_m)) - )) (net (rename state_machine_LDS_000_INT_7 "state_machine.LDS_000_INT_7") (joined (portRef O (instanceRef state_machine_LDS_000_INT_7_0_i)) (portRef I0 (instanceRef LDS_000_INT_0_m)) @@ -927,132 +907,109 @@ (portRef D (instanceRef AMIGA_BUS_ENABLEDFFSH)) )) (net N_2 (joined - (portRef O (instanceRef UDS_000_INT_0_p)) - (portRef D (instanceRef UDS_000_INT)) - )) - (net N_3 (joined - (portRef O (instanceRef LDS_000_INT_0_p)) - (portRef D (instanceRef LDS_000_INT)) - )) - (net N_4 (joined (portRef O (instanceRef AS_030_000_SYNC_0_p)) (portRef D (instanceRef AS_030_000_SYNC)) )) + (net N_3 (joined + (portRef O (instanceRef CLK_030_H_0_p)) + (portRef D (instanceRef CLK_030_H)) + )) + (net N_4 (joined + (portRef O (instanceRef UDS_000_INT_0_p)) + (portRef D (instanceRef UDS_000_INT)) + )) (net N_5 (joined - (portRef O (instanceRef DS_000_DMA_0_p)) - (portRef D (instanceRef DS_000_DMA)) + (portRef O (instanceRef LDS_000_INT_0_p)) + (portRef D (instanceRef LDS_000_INT)) )) (net N_6 (joined (portRef O (instanceRef FPU_CS_INT_0_p)) (portRef D (instanceRef FPU_CS_INT)) )) (net N_7 (joined - (portRef O (instanceRef SIZE_DMA_0_0__p)) - (portRef D (instanceRef SIZE_DMA_0)) - )) - (net N_8 (joined - (portRef O (instanceRef SIZE_DMA_0_1__p)) - (portRef D (instanceRef SIZE_DMA_1)) - )) - (net N_9 (joined - (portRef O (instanceRef DTACK_SYNC_0_p)) - (portRef D (instanceRef DTACK_SYNC)) - )) - (net N_10 (joined - (portRef O (instanceRef A0_DMA_0_p)) - (portRef D (instanceRef A0_DMA)) - )) - (net N_11 (joined (portRef O (instanceRef BG_000_0_p)) (portRef D (instanceRef BG_000DFFSH)) )) - (net N_12 (joined - (portRef O (instanceRef DSACK1_INT_0_p)) - (portRef D (instanceRef DSACK1_INT)) + (net N_8 (joined + (portRef O (instanceRef DS_000_DMA_0_p)) + (portRef D (instanceRef DS_000_DMA)) )) - (net N_13 (joined + (net N_9 (joined (portRef O (instanceRef AS_000_DMA_0_p)) (portRef D (instanceRef AS_000_DMA)) )) - (net N_14 (joined + (net N_10 (joined (portRef O (instanceRef AS_000_INT_0_p)) (portRef D (instanceRef AS_000_INT)) )) - (net N_15 (joined - (portRef O (instanceRef VPA_SYNC_0_p)) - (portRef D (instanceRef VPA_SYNC)) + (net N_11 (joined + (portRef O (instanceRef DSACK1_INT_0_p)) + (portRef D (instanceRef DSACK1_INT)) )) - (net N_16 (joined + (net N_12 (joined (portRef O (instanceRef VMA_INT_0_p)) (portRef D (instanceRef VMA_INT)) )) - (net N_17 (joined + (net N_13 (joined (portRef O (instanceRef BGACK_030_INT_0_p)) (portRef D (instanceRef BGACK_030_INT)) )) - (net N_18 (joined + (net N_14 (joined + (portRef O (instanceRef CLK_OUT_PRE_25_0)) + (portRef D (instanceRef CLK_OUT_PRE_25)) + )) + (net N_15 (joined (portRef O (instanceRef IPL_030_0_0__p)) (portRef D (instanceRef IPL_030DFFSH_0)) )) - (net N_19 (joined + (net N_16 (joined (portRef O (instanceRef IPL_030_0_1__p)) (portRef D (instanceRef IPL_030DFFSH_1)) )) - (net N_20 (joined + (net N_17 (joined (portRef O (instanceRef IPL_030_0_2__p)) (portRef D (instanceRef IPL_030DFFSH_2)) )) - (net N_21 (joined - (portRef O (instanceRef CLK_OUT_PRE_0)) - (portRef D (instanceRef CLK_OUT_PRE)) - )) - (net (rename SM_AMIGA_ns_e_0 "SM_AMIGA_ns_e[0]") (joined - (portRef O (instanceRef SM_AMIGAse_7_0_i)) + (net (rename SM_AMIGA_ns_0 "SM_AMIGA_ns[0]") (joined + (portRef O (instanceRef SM_AMIGA_ns_0_i_0)) (portRef D (instanceRef SM_AMIGA_7)) )) - (net (rename SM_AMIGA_ns_e_1 "SM_AMIGA_ns_e[1]") (joined - (portRef O (instanceRef SM_AMIGAse_0_0_0_i)) - (portRef D (instanceRef SM_AMIGA_6)) - )) - (net (rename SM_AMIGA_ns_e_5 "SM_AMIGA_ns_e[5]") (joined - (portRef O (instanceRef SM_AMIGAse_4_0_0_i)) + (net (rename SM_AMIGA_ns_5 "SM_AMIGA_ns[5]") (joined + (portRef O (instanceRef SM_AMIGA_ns_0_i_5)) (portRef D (instanceRef SM_AMIGA_2)) )) (net (rename cpu_est_0 "cpu_est[0]") (joined (portRef Q (instanceRef cpu_est_0)) - (portRef I0 (instanceRef cpu_est_ns_0_0_a3_2)) + (portRef I0 (instanceRef cpu_est_ns_0_0_a3_0_2)) (portRef I0 (instanceRef cpu_est_ns_0_0_a2_0_1)) - (portRef I1 (instanceRef cpu_estse_0_a3)) (portRef I0 (instanceRef cpu_est_i_0)) + (portRef I1 (instanceRef cpu_estse_i_a3_0)) )) (net (rename cpu_est_1 "cpu_est[1]") (joined (portRef Q (instanceRef cpu_est_1)) (portRef I0 (instanceRef cpu_estse_0_m)) + (portRef I0 (instanceRef cpu_est_ns_0_0_a3_2)) (portRef I0 (instanceRef cpu_est_i_1)) (portRef I0 (instanceRef cpu_est_ns_0_0_a2_1)) - (portRef I1 (instanceRef cpu_est_ns_0_0_m3_2__m)) - (portRef I0 (instanceRef cpu_est_ns_0_0_m3_2__r)) )) (net (rename cpu_est_2 "cpu_est[2]") (joined (portRef Q (instanceRef cpu_est_2)) (portRef I0 (instanceRef cpu_estse_1_m)) + (portRef I0 (instanceRef cpu_est_ns_0_0_a3_1)) + (portRef I1 (instanceRef cpu_est_ns_0_0_a3_2)) (portRef I1 (instanceRef cpu_est_ns_i_0_a3_3)) - (portRef I0 (instanceRef cpu_est_ns_0_0_x2_1)) - (portRef I0 (instanceRef cpu_est_ns_0_0_m3_2__m)) + (portRef I0 (instanceRef cpu_est_i_2)) + (portRef I0 (instanceRef state_machine_un15_clk_000_d0_0_a3_0_1)) )) (net (rename cpu_est_3 "cpu_est[3]") (joined (portRef Q (instanceRef cpu_est_3)) (portRef I0 (instanceRef cpu_estse_2_m)) - (portRef I1 (instanceRef cpu_est_ns_0_0_a3_2)) - (portRef I1 (instanceRef cpu_est_ns_0_0_x2_1)) + (portRef I1 (instanceRef cpu_est_ns_0_0_a3_1)) + (portRef I1 (instanceRef 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(net N_170 (joined + (portRef O (instanceRef un1_DSACK1_INT_0_sqmuxa_i_o3_i_a2)) + (portRef I0 (instanceRef un1_DSACK1_INT_0_sqmuxa_i_o3_i_a3)) + (portRef I0 (instanceRef N_170_i)) )) (net N_171 (joined - (portRef O (instanceRef SIZE_DMA_1_sqmuxa_i_a2_0)) + (portRef O (instanceRef SM_AMIGA_ns_0_a2_0)) + (portRef I1 (instanceRef SM_AMIGA_ns_0_a3_0)) (portRef I0 (instanceRef N_171_i)) )) (net N_172 (joined - (portRef O (instanceRef un1_AS_030_000_SYNC_1_sqmuxa_1_0_a2)) + (portRef O (instanceRef state_machine_SIZE_DMA_4_0_a2_1)) + (portRef I0 (instanceRef state_machine_SIZE_DMA_4_i_a3_0)) (portRef I0 (instanceRef N_172_i)) )) (net N_173 (joined - (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_a2)) - (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_a3_0)) - (portRef I1 (instanceRef SM_AMIGAse_0_0_0_a3_0)) - (portRef I1 (instanceRef state_machine_AMIGA_BUS_ENABLE_6_iv_0_a3)) + (portRef O (instanceRef state_machine_A0_DMA_2_0_a2)) + (portRef I1 (instanceRef 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(instanceRef VPA_SYNC_1_sqmuxa_1_i_a3)) - (portRef I1 (instanceRef VMA_INT_1_sqmuxa_i_a3_0)) - )) - (net DTACK_i (joined - (portRef O (instanceRef I_156)) - (portRef I0 (instanceRef DTACK_SYNC_1_sqmuxa_1_i_a3_1)) - )) - (net LDS_000_i (joined - (portRef O (instanceRef I_157)) - (portRef I0 (instanceRef SIZE_DMA_1_sqmuxa_i_a2)) - (portRef I1 (instanceRef state_machine_A0_DMA_4_0_a3_1)) - )) - (net AS_000_i (joined - (portRef O (instanceRef I_158)) - (portRef I0 (instanceRef state_machine_A0_DMA_4_0_a3_1)) - (portRef I0 (instanceRef SIZE_DMA_1_sqmuxa_i_o3_1)) - (portRef I1 (instanceRef SIZE_DMA_0_sqmuxa_0_a3_1)) - )) - (net (rename cpu_est_i_0 "cpu_est_i[0]") (joined - (portRef O (instanceRef cpu_est_i_0)) - (portRef I1 (instanceRef cpu_est_ns_0_0_a2_1)) - (portRef I1 (instanceRef cpu_estse_0_a3_0)) - (portRef I0 (instanceRef cpu_est_ns_0_0_m3_2__n)) - )) - (net (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (joined - (portRef O (instanceRef SM_AMIGA_i_4)) - (portRef I1 (instanceRef SM_AMIGAse_2_i_0_a3)) - (portRef I0 (instanceRef state_machine_LDS_000_INT_7_0_m3_n)) - )) - (net BGACK_030_INT_i (joined - (portRef O (instanceRef BGACK_030_INT_i)) - (portRef I0 (instanceRef SM_AMIGAse_0_0_0_a3)) - (portRef I0 (instanceRef SIZE_DMA_1_sqmuxa_i_o2_0)) - (portRef I1 (instanceRef un3_dtack_i_a3_1)) - (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_0_a3_0_1)) - )) - (net (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (joined - (portRef O (instanceRef SM_AMIGA_i_5)) - (portRef I1 (instanceRef SM_AMIGAse_1_i_0_a3)) - )) - (net (rename cpu_est_i_3 "cpu_est_i[3]") (joined - (portRef O (instanceRef cpu_est_i_3)) - (portRef I1 (instanceRef cpu_est_ns_i_0_a3_0_3)) + (net N_228 (joined + (portRef O (instanceRef un4_ciin)) + (portRef I0 (instanceRef CIIN)) )) (net CLK_000_D0_i (joined (portRef O (instanceRef CLK_000_D0_i)) - (portRef I0 (instanceRef SM_AMIGAse_0_0_0_a3_0)) - (portRef I1 (instanceRef SM_AMIGAse_1_i_0_o2)) - (portRef I0 (instanceRef VMA_INT_1_sqmuxa_i_a3_0_1)) + (portRef I0 (instanceRef SM_AMIGA_ns_0_a3_0_5)) + (portRef I0 (instanceRef SM_AMIGA_ns_0_a3_0)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_0_3)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_0_1)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_i_o2_6)) + (portRef I0 (instanceRef SM_AMIGA_ns_0_a3_1_5)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a3_0_1_4)) + (portRef I0 (instanceRef state_machine_un15_clk_000_d0_0_a3_1)) )) - (net CLK_000_D4_i (joined - (portRef O (instanceRef CLK_000_D4_i)) - (portRef I0 (instanceRef state_machine_AMIGA_BUS_ENABLE_6_iv_0_a3)) + (net BGACK_030_INT_i (joined + (portRef O (instanceRef BGACK_030_INT_i)) + (portRef I1 (instanceRef state_machine_A0_DMA_2_0_a2)) + (portRef I1 (instanceRef AS_000_DMA_1_sqmuxa_i_o3)) + (portRef I1 (instanceRef un3_dtack_i_a3_1)) )) - (net (rename cpu_est_i_1 "cpu_est_i[1]") (joined - (portRef O (instanceRef cpu_est_i_1)) - (portRef I1 (instanceRef cpu_est_ns_0_0_a2_0_1)) - (portRef I1 (instanceRef cpu_est_ns_i_0_o2_3)) + (net CLK_030_i (joined + (portRef O (instanceRef CLK_030_i)) + (portRef I1 (instanceRef DS_000_DMA_1_sqmuxa_i_a3)) )) - (net UDS_000_i (joined - (portRef O (instanceRef I_159)) - (portRef I1 (instanceRef SIZE_DMA_1_sqmuxa_i_a2)) + (net (rename cpu_est_i_3 "cpu_est_i[3]") (joined + (portRef O (instanceRef cpu_est_i_3)) + (portRef I1 (instanceRef cpu_est_ns_0_0_a3_0_1)) + (portRef I1 (instanceRef cpu_est_ns_i_0_a2_3)) )) - (net CLK_000_D5_i (joined - (portRef O (instanceRef CLK_000_D5_i)) - (portRef I1 (instanceRef N_111_i_i_a2)) + (net (rename SM_AMIGA_i_6 "SM_AMIGA_i[6]") (joined + (portRef O (instanceRef SM_AMIGA_i_6)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_0_a3_2)) )) (net nEXP_SPACE_i (joined (portRef O (instanceRef nEXP_SPACE_i)) - (portRef I1 (instanceRef un1_AS_030_000_SYNC_1_sqmuxa_1_0_a2)) + (portRef I1 (instanceRef SM_AMIGA_ns_0_a2_0)) (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_0_0_a3_0)) - (portRef I1 (instanceRef SM_AMIGAse_7_0_a3_0)) (portRef I1 (instanceRef un3_dtack_i_a3)) )) + (net CLK_000_D4_i (joined + (portRef O (instanceRef CLK_000_D4_i)) + (portRef I1 (instanceRef un1_DSACK1_INT_0_sqmuxa_i_o3_i_a2)) + (portRef I1 (instanceRef state_machine_AMIGA_BUS_ENABLE_4_iv_0_a3)) + )) + (net (rename SM_AMIGA_i_5 "SM_AMIGA_i[5]") (joined + (portRef O (instanceRef SM_AMIGA_i_5)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_0_a3_3)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_0_a3_2)) + )) + (net (rename SM_AMIGA_i_4 "SM_AMIGA_i[4]") (joined + (portRef O (instanceRef SM_AMIGA_i_4)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_0_a3_3)) + )) + (net AS_000_i (joined + (portRef O (instanceRef I_143)) + (portRef I0 (instanceRef state_machine_A0_DMA_2_0_a2)) + (portRef I1 (instanceRef AS_000_DMA_1_sqmuxa_i_o3_1)) + )) + (net LDS_000_i (joined + (portRef O (instanceRef I_144)) + (portRef I0 (instanceRef state_machine_SIZE_DMA_4_0_a2_1)) + (portRef I1 (instanceRef state_machine_A0_DMA_2_0_a3_1)) + )) + (net UDS_000_i (joined + (portRef O (instanceRef I_145)) + (portRef I1 (instanceRef state_machine_SIZE_DMA_4_0_a2_1)) + )) + (net (rename cpu_est_i_1 "cpu_est_i[1]") (joined + (portRef O (instanceRef cpu_est_i_1)) + (portRef I1 (instanceRef cpu_est_ns_0_0_a3_1_2)) + (portRef I1 (instanceRef cpu_est_ns_0_0_a2_0_1)) + (portRef I1 (instanceRef cpu_est_ns_i_0_o2_3)) + )) + (net (rename cpu_est_i_0 "cpu_est_i[0]") (joined + (portRef O (instanceRef cpu_est_i_0)) + (portRef I0 (instanceRef cpu_est_ns_0_0_a3_1_2)) + (portRef I1 (instanceRef cpu_est_ns_0_0_a2_1)) + (portRef I1 (instanceRef cpu_estse_i_a3)) + )) + (net DTACK_D0_i (joined + (portRef O (instanceRef DTACK_D0_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_0_4)) + )) + (net VMA_INT_i (joined + (portRef O (instanceRef VMA_INT_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_1_4)) + )) + (net VPA_D_i (joined + (portRef O (instanceRef VPA_D_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a2_4)) + (portRef I1 (instanceRef state_machine_un15_clk_000_d0_0_a3)) + )) (net AS_000_DMA_i (joined (portRef O (instanceRef AS_000_DMA_i)) + (portRef I0 (instanceRef state_machine_DS_000_DMA_3_0)) + (portRef I0 (instanceRef state_machine_CLK_030_H_2_f0_i_o2)) (portRef I0 (instanceRef un3_dtack_i_a3_1)) )) + (net CLK_030_H_i (joined + (portRef O (instanceRef CLK_030_H_i)) + (portRef I0 (instanceRef state_machine_CLK_030_H_2_f0_i_a3)) + )) (net RW_i (joined (portRef O (instanceRef RW_i)) - (portRef I1 (instanceRef state_machine_DS_000_DMA_5_iv_0_a3)) (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_0_0_a3)) - (portRef I1 (instanceRef LDS_000_INT_1_sqmuxa_i_a3_1)) + (portRef I1 (instanceRef DS_000_DMA_1_sqmuxa_i_1)) + (portRef I1 (instanceRef un1_AS_030_2_i_a3_0)) )) - (net (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (joined - (portRef O (instanceRef SM_AMIGA_i_3)) - (portRef I1 (instanceRef SM_AMIGAse_3_i_0_a3)) + (net (rename cpu_est_i_2 "cpu_est_i[2]") (joined + (portRef O (instanceRef cpu_est_i_2)) + (portRef I0 (instanceRef cpu_est_ns_0_0_a3_0_1)) )) (net (rename SM_AMIGA_i_0 "SM_AMIGA_i[0]") (joined (portRef O (instanceRef SM_AMIGA_i_0)) - (portRef I1 (instanceRef SM_AMIGAse_6_0_i_a3)) - (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_o2)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a3_7)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_7)) + )) + (net (rename SM_AMIGA_i_3 "SM_AMIGA_i[3]") (joined + (portRef O (instanceRef SM_AMIGA_i_3)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a3_4)) + )) + (net (rename SM_AMIGA_i_7 "SM_AMIGA_i[7]") (joined + (portRef O (instanceRef SM_AMIGA_i_7)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_a3_1)) )) (net A0_i (joined - (portRef O (instanceRef I_160)) + (portRef O (instanceRef I_146)) (portRef I1 (instanceRef state_machine_UDS_000_INT_7_0_1)) (portRef I0 (instanceRef state_machine_LDS_000_INT_7_0_a3_1)) )) (net (rename SIZE_i_1 "SIZE_i[1]") (joined - (portRef O (instanceRef I_161)) + (portRef O (instanceRef I_147)) (portRef I1 (instanceRef state_machine_LDS_000_INT_7_0_a3)) )) + (net DS_030_i (joined + (portRef O (instanceRef I_148)) + (portRef I1 (instanceRef state_machine_LDS_000_INT_7_0_1)) + (portRef I1 (instanceRef state_machine_UDS_000_INT_7_0)) + (portRef I0 (instanceRef un1_AS_030_2_i_a3_1)) + (portRef I0 (instanceRef un1_AS_030_2_i_a3_0_1)) + )) + (net (rename A_i_19 "A_i[19]") (joined + (portRef O (instanceRef A_i_19)) + (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_o2_3)) + )) + (net (rename A_i_16 "A_i[16]") (joined + (portRef O (instanceRef A_i_16)) + (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_o2_3)) + )) + (net (rename A_i_18 "A_i[18]") (joined + (portRef O (instanceRef A_i_18)) + (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_o2_5)) + )) (net (rename A_i_30 "A_i[30]") (joined (portRef O (instanceRef A_i_30)) (portRef I0 (instanceRef un8_ciin_4)) @@ -1580,18 +1548,6 @@ (portRef O (instanceRef A_i_25)) (portRef I1 (instanceRef un8_ciin_1)) )) - (net (rename A_i_19 "A_i[19]") (joined - (portRef O (instanceRef A_i_19)) - (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_o2_3)) - )) - (net (rename A_i_16 "A_i[16]") (joined - (portRef O (instanceRef A_i_16)) - (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_o2_3)) - )) - (net (rename A_i_18 "A_i[18]") (joined - (portRef O (instanceRef A_i_18)) - (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_o2_5)) - )) (net RST_i (joined (portRef O (instanceRef RST_i)) (portRef S (instanceRef A0_DMA)) @@ -1607,13 +1563,13 @@ (portRef S (instanceRef CLK_000_D2)) (portRef S (instanceRef CLK_000_D3)) (portRef S (instanceRef CLK_000_D4)) - (portRef S (instanceRef CLK_000_D5)) - (portRef R (instanceRef CLK_CNT_P_0)) (portRef R (instanceRef CLK_OUT_INT)) - (portRef R (instanceRef CLK_OUT_PRE)) + (portRef R (instanceRef CLK_OUT_PRE_25)) + (portRef R (instanceRef CLK_OUT_PRE_50)) + (portRef R (instanceRef CLK_OUT_PRE_50_D)) (portRef S (instanceRef DSACK1_INT)) (portRef S (instanceRef DS_000_DMA)) - (portRef S (instanceRef DTACK_SYNC)) + (portRef S (instanceRef DTACK_D0)) (portRef S (instanceRef FPU_CS_INT)) (portRef S (instanceRef IPL_030DFFSH_0)) (portRef S (instanceRef IPL_030DFFSH_1)) @@ -1633,51 +1589,39 @@ (portRef S (instanceRef UDS_000_INT)) (portRef S (instanceRef VMA_INT)) (portRef S (instanceRef VPA_D)) - (portRef S (instanceRef VPA_SYNC)) (portRef R (instanceRef cpu_est_0)) (portRef R (instanceRef cpu_est_1)) (portRef R (instanceRef cpu_est_2)) (portRef R (instanceRef cpu_est_3)) )) - (net (rename CLK_CNT_P_i_0 "CLK_CNT_P_i[0]") (joined - (portRef O (instanceRef CLK_CNT_P_i_0)) - (portRef D (instanceRef CLK_CNT_P_0)) + (net CLK_OUT_PRE_50_i (joined + (portRef O (instanceRef CLK_OUT_PRE_50_i)) + (portRef D (instanceRef CLK_OUT_PRE_50)) )) - (net SIZE_DMA_0_sqmuxa_i (joined - (portRef O (instanceRef SIZE_DMA_0_sqmuxa_i)) - (portRef I0 (instanceRef SIZE_DMA_0_0__m)) + (net N_121_i (joined + (portRef O (instanceRef N_121_i)) + (portRef D (instanceRef SIZE_DMA_0)) )) - (net N_231_i (joined - (portRef O (instanceRef N_231_i)) - (portRef I0 (instanceRef VPA_SYNC_0_m)) - (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_1_i)) - )) - (net N_126_i (joined - (portRef O (instanceRef N_126_i)) - (portRef I0 (instanceRef AS_000_INT_0_m)) - (portRef I1 (instanceRef AS_000_INT_1_sqmuxa_1_i)) - )) - (net N_232_i (joined - (portRef O (instanceRef N_232_i)) + (net N_205_i (joined + (portRef O (instanceRef N_205_i)) (portRef I0 (instanceRef DSACK1_INT_0_m)) - (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_1_i_o3)) - )) - (net N_234_i (joined - (portRef O (instanceRef N_234_i)) - (portRef I0 (instanceRef DTACK_SYNC_0_m)) - (portRef I1 (instanceRef DTACK_SYNC_1_sqmuxa_1_i)) + (portRef I1 (instanceRef DSACK1_INT_1_sqmuxa_i_o3)) )) (net FPU_CS_INT_i (joined (portRef O (instanceRef FPU_CS_INT_i)) (portRef OE (instanceRef AVEC_EXP)) (portRef OE (instanceRef BERR)) )) + (net CLK_OUT_PRE_50_D_i (joined + (portRef O (instanceRef CLK_OUT_PRE_50_D_i)) + (portRef I1 (instanceRef clk_un3_clk_out_pre_50)) + )) (net AS_030_c (joined (portRef O (instanceRef AS_030)) (portRef I0 (instanceRef FPU_CS_INT_0_m)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_2_i_a3)) (portRef I0 (instanceRef AS_030_c_i)) - (portRef I0 (instanceRef state_machine_un10_bg_030_0_a3_1_0)) - (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_a3_1)) + (portRef I0 (instanceRef state_machine_un10_bg_030_0_a3_1)) )) (net AS_030 (joined (portRef IO (instanceRef AS_030)) @@ -1685,7 +1629,7 @@ )) (net AS_000_c (joined (portRef O (instanceRef AS_000)) - (portRef I0 (instanceRef I_158)) + (portRef I0 (instanceRef I_143)) )) (net AS_000 (joined (portRef IO (instanceRef AS_000)) @@ -1693,7 +1637,7 @@ )) (net DS_030_c (joined (portRef O (instanceRef DS_030)) - (portRef I0 (instanceRef DS_030_c_i)) + (portRef I0 (instanceRef I_148)) )) (net DS_030 (joined (portRef IO (instanceRef DS_030)) @@ -1701,9 +1645,9 @@ )) (net UDS_000_c (joined (portRef O (instanceRef UDS_000)) - (portRef I0 (instanceRef I_159)) - (portRef I1 (instanceRef SIZE_DMA_1_sqmuxa_i_a2_0)) - (portRef I1 (instanceRef state_machine_A0_DMA_4_0_a3_2)) + (portRef I1 (instanceRef AS_000_DMA_1_sqmuxa_i_a2)) + (portRef I0 (instanceRef I_145)) + (portRef I0 (instanceRef state_machine_A0_DMA_2_0_a3_1)) )) (net UDS_000 (joined (portRef IO (instanceRef UDS_000)) @@ -1711,8 +1655,8 @@ )) (net LDS_000_c (joined (portRef O (instanceRef LDS_000)) - (portRef I0 (instanceRef SIZE_DMA_1_sqmuxa_i_a2_0)) - (portRef I0 (instanceRef I_157)) + (portRef I0 (instanceRef AS_000_DMA_1_sqmuxa_i_a2)) + (portRef I0 (instanceRef I_144)) )) (net LDS_000 (joined (portRef IO (instanceRef LDS_000)) @@ -1728,7 +1672,7 @@ )) (net (rename SIZE_c_1 "SIZE_c[1]") (joined (portRef O (instanceRef SIZE_1)) - (portRef I0 (instanceRef I_161)) + (portRef I0 (instanceRef I_147)) )) (net (rename SIZE_1 "SIZE[1]") (joined (portRef (member size 0)) @@ -1744,7 +1688,7 @@ )) (net (rename A_c_17 "A_c[17]") (joined (portRef O (instanceRef A_17)) - (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_o2_1)) + (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_o2_1)) )) (net (rename A_17 "A[17]") (joined (portRef (member a 14)) @@ -1864,7 +1808,7 @@ )) (net A0_c (joined (portRef O (instanceRef A0)) - (portRef I0 (instanceRef I_160)) + (portRef I0 (instanceRef I_146)) )) (net A0 (joined (portRef IO (instanceRef A0)) @@ -1872,9 +1816,10 @@ )) (net nEXP_SPACE_c (joined (portRef O (instanceRef nEXP_SPACE)) - (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_a2)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_2_i_o2)) (portRef I0 (instanceRef nEXP_SPACE_i)) - (portRef I1 (instanceRef state_machine_un10_bg_030_0_a3_1)) + (portRef I1 (instanceRef state_machine_un10_bg_030_0_a3_2)) + (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_a3)) (portRef OE (instanceRef DSACK_0)) (portRef OE (instanceRef DSACK_1)) )) @@ -1912,7 +1857,7 @@ (portRef O (instanceRef BGACK_000)) (portRef I0 (instanceRef BGACK_030_INT_0_m)) (portRef I0 (instanceRef state_machine_un6_bgack_000_0)) - (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_o2_1)) + (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_o2_1)) )) (net BGACK_000 (joined (portRef BGACK_000) @@ -1921,8 +1866,10 @@ (net CLK_030_c (joined (portRef O (instanceRef CLK_030)) (portRef I0 (instanceRef un1_as_030_000_sync8_1_i_a3)) - (portRef I0 (instanceRef CLK_030_c_i)) - (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_a3_1)) + (portRef I0 (instanceRef AS_000_DMA_1_sqmuxa_i)) + (portRef I1 (instanceRef state_machine_CLK_030_H_2_f0_i_o2)) + (portRef I0 (instanceRef CLK_030_i)) + (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_a3_1)) )) (net CLK_030 (joined (portRef CLK_030) @@ -1930,7 +1877,7 @@ )) (net CLK_000_c (joined (portRef O (instanceRef CLK_000)) - (portRef I1 (instanceRef state_machine_un10_bg_030_0_a3_1_0)) + (portRef I1 (instanceRef state_machine_un10_bg_030_0_a3_1)) (portRef D (instanceRef CLK_000_D0)) )) (net CLK_000 (joined @@ -1952,13 +1899,14 @@ (portRef CLK (instanceRef CLK_000_D2)) (portRef CLK (instanceRef CLK_000_D3)) (portRef CLK (instanceRef CLK_000_D4)) - (portRef CLK (instanceRef CLK_000_D5)) - (portRef CLK (instanceRef CLK_CNT_P_0)) + (portRef CLK (instanceRef CLK_030_H)) (portRef CLK (instanceRef CLK_OUT_INT)) - (portRef CLK (instanceRef CLK_OUT_PRE)) + (portRef CLK (instanceRef CLK_OUT_PRE_25)) + (portRef CLK (instanceRef CLK_OUT_PRE_50)) + (portRef CLK (instanceRef CLK_OUT_PRE_50_D)) (portRef CLK (instanceRef DSACK1_INT)) (portRef CLK (instanceRef DS_000_DMA)) - (portRef CLK (instanceRef DTACK_SYNC)) + (portRef CLK (instanceRef DTACK_D0)) (portRef CLK (instanceRef FPU_CS_INT)) (portRef CLK (instanceRef IPL_030DFFSH_0)) (portRef CLK (instanceRef IPL_030DFFSH_1)) @@ -1978,7 +1926,6 @@ (portRef CLK (instanceRef UDS_000_INT)) (portRef CLK (instanceRef VMA_INT)) (portRef CLK (instanceRef VPA_D)) - (portRef CLK (instanceRef VPA_SYNC)) (portRef CLK (instanceRef cpu_est_0)) (portRef CLK (instanceRef cpu_est_1)) (portRef CLK (instanceRef cpu_est_2)) @@ -2070,7 +2017,7 @@ )) (net DTACK_c (joined (portRef O (instanceRef DTACK)) - (portRef I0 (instanceRef I_156)) + (portRef D (instanceRef DTACK_D0)) )) (net DTACK (joined (portRef IO (instanceRef DTACK)) @@ -2102,6 +2049,8 @@ )) (net RST_c (joined (portRef O (instanceRef RST)) + (portRef I1 (instanceRef CLK_030_H_0_m)) + (portRef I0 (instanceRef CLK_030_H_0_r)) (portRef I0 (instanceRef RST_i)) )) (net RST (joined @@ -2119,10 +2068,10 @@ (net RW_c (joined (portRef O (instanceRef RW)) (portRef I0 (instanceRef RW_i)) - (portRef I1 (instanceRef state_machine_LDS_000_INT_7_0_m3_m)) - (portRef I0 (instanceRef state_machine_LDS_000_INT_7_0_m3_r)) - (portRef I1 (instanceRef LDS_000_INT_1_sqmuxa_i_a3_0)) + (portRef I1 (instanceRef state_machine_UDS_000_INT_7_0_m3_m)) + (portRef I0 (instanceRef state_machine_UDS_000_INT_7_0_m3_r)) (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_0_0_a3_0_1)) + (portRef I1 (instanceRef un1_AS_030_2_i_a3)) )) (net RW (joined (portRef RW) @@ -2130,7 +2079,7 @@ )) (net (rename FC_c_0 "FC_c[0]") (joined (portRef O (instanceRef FC_0)) - (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_o2_2)) + (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_o2_2)) )) (net (rename FC_0 "FC[0]") (joined (portRef (member fc 1)) @@ -2138,7 +2087,7 @@ )) (net (rename FC_c_1 "FC_c[1]") (joined (portRef O (instanceRef FC_1)) - (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_o2_2)) + (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_i_o2_2)) )) (net (rename FC_1 "FC[1]") (joined (portRef (member fc 0)) @@ -2169,663 +2118,596 @@ (portRef O (instanceRef CIIN)) (portRef CIIN) )) - (net N_88_0 (joined - (portRef O (instanceRef SM_AMIGAse_3_i_0_o2)) - (portRef I0 (instanceRef SM_AMIGAse_3_i_0_o2_i)) + (net (rename cpu_est_ns_0_1 "cpu_est_ns_0[1]") (joined + (portRef O (instanceRef cpu_est_ns_0_0_1)) + (portRef I0 (instanceRef cpu_est_ns_0_0_i_1)) + )) + (net N_134_i (joined + (portRef O (instanceRef N_134_i)) + (portRef I1 (instanceRef cpu_est_ns_0_0_1_1)) + )) + (net N_169_i (joined + (portRef O (instanceRef N_169_i)) + (portRef I1 (instanceRef cpu_est_ns_0_0_2_1)) + )) + (net N_133_i (joined + (portRef O (instanceRef N_133_i)) + (portRef I0 (instanceRef cpu_est_ns_0_0_1_1)) + )) + (net N_167_i (joined + (portRef O (instanceRef N_167_i)) + (portRef I0 (instanceRef cpu_est_ns_0_0_2_1)) + )) + (net N_51_0 (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_2_i)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_2_i_i)) + )) + (net N_140_i (joined + (portRef O (instanceRef N_140_i)) + (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_2_i_2)) + )) + (net N_202_0 (joined + (portRef O (instanceRef state_machine_CLK_030_H_2_f0_i_o2)) + (portRef I0 (instanceRef state_machine_CLK_030_H_2_f0_i_o2_i)) )) (net N_86_0 (joined - (portRef O (instanceRef SM_AMIGAse_2_i_0_o2)) - (portRef I0 (instanceRef SM_AMIGAse_2_i_0_o2_i)) + (portRef O (instanceRef SM_AMIGA_ns_i_o2_0_1)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_0_i_1)) )) - (net A0_DMA_0_sqmuxa_i_0_0 (joined - (portRef O (instanceRef SIZE_DMA_1_sqmuxa_i_o3)) - (portRef I0 (instanceRef SIZE_DMA_1_sqmuxa_i_0)) - (portRef I0 (instanceRef state_machine_DS_000_DMA_5_iv_0)) - (portRef I0 (instanceRef SIZE_DMA_1_sqmuxa_i_o3_i)) + (net N_171_i (joined + (portRef O (instanceRef N_171_i)) + (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0_o3)) )) - (net N_83_i (joined - (portRef O (instanceRef SM_AMIGAse_7_0_o2)) - (portRef I0 (instanceRef SM_AMIGAse_0_0_0_a3_1)) - (portRef I0 (instanceRef SM_AMIGAse_7_0_o2_i)) + (net un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0 (joined + (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0_o3)) + (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_i)) + (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0_o3_i)) )) - (net AS_030_000_SYNC_i (joined - (portRef O (instanceRef AS_030_000_SYNC_i)) - (portRef I0 (instanceRef SM_AMIGAse_7_0_o2_1)) - )) - (net N_81_i (joined + (net N_82_i (joined (portRef O (instanceRef cpu_est_ns_i_0_o2_3)) (portRef I0 (instanceRef cpu_est_ns_i_0_o2_i_3)) - (portRef I1 (instanceRef VPA_SYNC_1_sqmuxa_1_i_a3_1)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_a2_1_4)) )) - (net N_80_i (joined - (portRef O (instanceRef SM_AMIGAse_1_i_0_o2_0)) - (portRef I0 (instanceRef un1_AS_030_000_SYNC_1_sqmuxa_1_0_a2)) - (portRef I0 (instanceRef SM_AMIGAse_1_i_0_o2_0_i)) + (net (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (joined + (portRef O (instanceRef SM_AMIGA_i_1)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_o2_7)) )) - (net DS_030_c_i (joined - (portRef O (instanceRef DS_030_c_i)) - (portRef I1 (instanceRef state_machine_LDS_000_INT_7_0_o3)) + (net N_78_i (joined + (portRef O (instanceRef SM_AMIGA_ns_i_o2_7)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_i_7)) )) - (net N_79_i (joined - (portRef O (instanceRef state_machine_LDS_000_INT_7_0_o3)) - (portRef I1 (instanceRef state_machine_LDS_000_INT_7_0)) - (portRef I0 (instanceRef state_machine_UDS_000_INT_7_0_1)) - (portRef I0 (instanceRef LDS_000_INT_1_sqmuxa_i_a3_1)) - (portRef I1 (instanceRef LDS_000_INT_1_sqmuxa_i_a3_0_1)) + (net N_170_i (joined + (portRef O (instanceRef N_170_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_i_o2_6)) )) - (net N_172_i (joined - (portRef O (instanceRef N_172_i)) - (portRef I1 (instanceRef un1_AS_030_000_SYNC_1_sqmuxa_1_0_o3)) - )) - (net un1_AS_030_000_SYNC_1_sqmuxa_1_0 (joined - (portRef O (instanceRef un1_AS_030_000_SYNC_1_sqmuxa_1_0_o3)) - (portRef I1 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i)) - (portRef I0 (instanceRef un1_AS_030_000_SYNC_1_sqmuxa_1_0_o3_i)) - )) - (net CLK_030_c_i (joined - (portRef O (instanceRef CLK_030_c_i)) - (portRef I1 (instanceRef SIZE_DMA_1_sqmuxa_i_o2_0)) - )) - (net N_77_i (joined - (portRef O (instanceRef SIZE_DMA_1_sqmuxa_i_o2_0)) - (portRef I1 (instanceRef SIZE_DMA_1_sqmuxa_i_o3_1)) - (portRef I0 (instanceRef state_machine_A0_DMA_4_0_a3_2)) - (portRef I1 (instanceRef SIZE_DMA_0_sqmuxa_0_a3)) - )) - (net N_174_i (joined - (portRef O (instanceRef N_174_i)) - (portRef I1 (instanceRef SM_AMIGAse_6_0_i_o2)) - )) - (net N_76_0 (joined - (portRef O (instanceRef SM_AMIGAse_6_0_i_o2)) - (portRef I0 (instanceRef SM_AMIGAse_6_0_i_o2_i)) - )) - (net N_74_i (joined - (portRef O (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_o2)) - (portRef I1 (instanceRef un1_as_030_000_sync8_1_i_a3)) - (portRef I0 (instanceRef AS_030_000_SYNC_1_sqmuxa_1_i_o2_i)) + (net N_77_0 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_i_o2_6)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_i_o2_i_6)) )) (net CLK_000_D1_i (joined (portRef O (instanceRef CLK_000_D1_i)) (portRef I1 (instanceRef clk_un3_clk_000_d1_0_o2)) )) - (net N_73_i (joined + (net N_76_i (joined (portRef O (instanceRef clk_un3_clk_000_d1_0_o2)) - (portRef I0 (instanceRef cpu_estse_0_a3_0)) + (portRef I0 (instanceRef cpu_estse_i_a3_0)) (portRef I0 (instanceRef clk_un3_clk_000_d1_0_o2_i)) )) - (net (rename SM_AMIGA_i_1 "SM_AMIGA_i[1]") (joined - (portRef O (instanceRef SM_AMIGA_i_1)) - (portRef I1 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_o2)) + (net N_74_i (joined + (portRef O (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_2_i_o2)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_o2_0_1)) + (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_sqmuxa_2_i_o2_i)) + (portRef I0 (instanceRef state_machine_AMIGA_BUS_ENABLE_4_iv_0_a3_1)) )) - (net N_72_i (joined - (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_o2)) - (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_o2_i)) + (net N_72_0 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_o2_1)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_i_1)) )) - (net N_171_i (joined - (portRef O (instanceRef N_171_i)) - (portRef I1 (instanceRef SIZE_DMA_1_sqmuxa_i_o3)) + (net AS_030_000_SYNC_i (joined + (portRef O (instanceRef AS_030_000_SYNC_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_o2_1_1)) )) - (net N_66_i (joined - (portRef O (instanceRef state_machine_LDS_000_INT_7_0_o2)) - (portRef I1 (instanceRef AS_000_INT_1_sqmuxa_1_i_a3)) - (portRef I0 (instanceRef state_machine_LDS_000_INT_7_0_o2_i)) - (portRef I0 (instanceRef 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DTACK_SYNC_1_sqmuxa_1_i)) - (portRef I0 (instanceRef VPA_SYNC_1_sqmuxa_1_i)) - (portRef I0 (instanceRef AS_000_INT_1_sqmuxa_1_i)) - (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_1_i_o3)) - (portRef I0 (instanceRef LDS_000_INT_1_sqmuxa_i_1)) + (portRef I0 (instanceRef AS_000_INT_1_sqmuxa_i)) + (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_i_o3)) + (portRef I1 (instanceRef un1_AS_030_2_i_1)) )) (net N_65_i (joined - (portRef O (instanceRef DSACK1_INT_1_sqmuxa_1_i_o3)) - (portRef I0 (instanceRef un1_AS_030_000_SYNC_1_sqmuxa_1_0_o3)) - (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_1_i_o3_i)) + (portRef O (instanceRef DSACK1_INT_1_sqmuxa_i_o3)) + (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_2_0_o3)) + (portRef I0 (instanceRef DSACK1_INT_1_sqmuxa_i_o3_i)) )) (net N_64_i (joined - (portRef O (instanceRef SM_AMIGAse_1_i_0_o2)) - (portRef I0 (instanceRef SM_AMIGAse_3_i_0_a2)) - (portRef I0 (instanceRef SM_AMIGAse_6_0_i_o2)) - (portRef I0 (instanceRef SM_AMIGAse_1_i_0_o2_i)) - (portRef I0 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(portRef O (instanceRef N_168_i)) - (portRef I1 (instanceRef cpu_estse_0_0)) + (net N_153_i (joined + (portRef O (instanceRef N_153_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_o2_4)) )) - (net (rename cpu_est_ns_e_0_0 "cpu_est_ns_e_0[0]") (joined - (portRef O (instanceRef cpu_estse_0_0)) - (portRef I0 (instanceRef cpu_estse_0_0_i)) + (net N_61_0 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_o2_4)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_o2_i_4)) )) - (net N_163_i (joined - (portRef O (instanceRef N_163_i)) - (portRef I1 (instanceRef SM_AMIGAse_7_0_1)) + (net N_150_i (joined + (portRef O (instanceRef N_150_i)) + (portRef I0 (instanceRef AS_000_DMA_1_sqmuxa_i_o3_1)) )) - (net N_164_i (joined - (portRef O (instanceRef N_164_i)) - (portRef I1 (instanceRef SM_AMIGAse_7_0)) + (net N_148_i (joined + (portRef O (instanceRef N_148_i)) + (portRef I0 (instanceRef cpu_estse_i)) )) - (net N_165_i (joined - (portRef O (instanceRef N_165_i)) - (portRef I0 (instanceRef SM_AMIGAse_7_0_1)) + (net N_149_i (joined + (portRef O (instanceRef N_149_i)) + (portRef I1 (instanceRef cpu_estse_i)) )) - (net (rename SM_AMIGA_ns_e_0_0 "SM_AMIGA_ns_e_0[0]") (joined - (portRef O (instanceRef SM_AMIGAse_7_0)) - (portRef I0 (instanceRef SM_AMIGAse_7_0_i)) + (net N_59_i (joined + (portRef O (instanceRef cpu_estse_i)) + (portRef D (instanceRef cpu_est_0)) )) - (net N_160_i (joined - (portRef O (instanceRef N_160_i)) - (portRef I1 (instanceRef SM_AMIGAse_0_0_0_1)) + (net N_123_i (joined + (portRef O (instanceRef N_123_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_1)) + (portRef I1 (instanceRef SM_AMIGA_ns_0_1_0)) )) - (net N_161_i (joined - (portRef O (instanceRef N_161_i)) - (portRef I1 (instanceRef SM_AMIGAse_0_0_0)) + (net N_145_i (joined + (portRef O (instanceRef N_145_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_0_0)) )) - (net N_162_i (joined - (portRef O (instanceRef N_162_i)) - (portRef I0 (instanceRef SM_AMIGAse_0_0_0_1)) + (net N_146_i (joined + (portRef O (instanceRef N_146_i)) + (portRef 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(joined - (portRef O (instanceRef N_158_i)) - (portRef I1 (instanceRef state_machine_AMIGA_BUS_ENABLE_6_iv_0)) + (net N_141_i (joined + (portRef O (instanceRef N_141_i)) + (portRef I0 (instanceRef DS_000_DMA_1_sqmuxa_i_1)) )) - (net (rename state_machine_AMIGA_BUS_ENABLE_6_iv_i "state_machine.AMIGA_BUS_ENABLE_6_iv_i") (joined - (portRef O (instanceRef state_machine_AMIGA_BUS_ENABLE_6_iv_0)) + (net N_53_0 (joined + (portRef O (instanceRef DS_000_DMA_1_sqmuxa_i)) + (portRef I0 (instanceRef DS_000_DMA_1_sqmuxa_i_i)) + )) + (net N_139_i (joined + (portRef O (instanceRef N_139_i)) + (portRef I1 (instanceRef state_machine_AMIGA_BUS_ENABLE_4_iv_0)) + )) + (net (rename state_machine_AMIGA_BUS_ENABLE_4_iv_i "state_machine.AMIGA_BUS_ENABLE_4_iv_i") (joined + (portRef O (instanceRef state_machine_AMIGA_BUS_ENABLE_4_iv_0)) (portRef I0 (instanceRef AMIGA_BUS_ENABLE_0_m)) )) - (net N_157_i (joined - (portRef O (instanceRef N_157_i)) - (portRef I1 (instanceRef state_machine_DS_000_DMA_5_iv_0)) + (net N_138_i (joined + (portRef O (instanceRef N_138_i)) + (portRef I0 (instanceRef state_machine_CLK_030_H_2_f0_i)) )) - (net (rename state_machine_DS_000_DMA_5_0 "state_machine.DS_000_DMA_5_0") (joined - (portRef O (instanceRef state_machine_DS_000_DMA_5_iv_0)) - (portRef I0 (instanceRef state_machine_DS_000_DMA_5_iv_0_i)) + (net N_48_i (joined + (portRef O (instanceRef state_machine_CLK_030_H_2_f0_i)) + (portRef I0 (instanceRef CLK_030_H_0_m)) )) - (net N_155_i (joined - (portRef O (instanceRef N_155_i)) + (net N_136_i (joined + (portRef O (instanceRef N_136_i)) (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_0)) )) - (net N_156_i (joined - (portRef O (instanceRef N_156_i)) + (net N_137_i (joined + (portRef O (instanceRef N_137_i)) (portRef I1 (instanceRef AMIGA_BUS_DATA_DIR_0_0)) )) (net AMIGA_BUS_DATA_DIR_c_0 (joined (portRef O (instanceRef AMIGA_BUS_DATA_DIR_0_0)) (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_0_i)) )) - (net N_153_i (joined - (portRef O (instanceRef N_153_i)) + (net N_135_i (joined + (portRef O (instanceRef N_135_i)) (portRef I0 (instanceRef cpu_est_ns_i_0_3)) )) - (net N_154_i (joined - (portRef O (instanceRef N_154_i)) + (net N_168_i (joined + (portRef O (instanceRef N_168_i)) (portRef I1 (instanceRef cpu_est_ns_i_0_3)) )) - (net N_177_i (joined + (net N_151_i (joined (portRef O (instanceRef cpu_est_ns_i_0_3)) (portRef I0 (instanceRef cpu_estse_2_n)) )) - (net N_176_i (joined - (portRef O (instanceRef N_176_i)) - (portRef I1 (instanceRef cpu_est_ns_0_0_1_1)) + (net N_132_i (joined + (portRef O (instanceRef N_132_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_1_7)) )) - (net N_179_i (joined - (portRef O (instanceRef N_179_i)) - (portRef I1 (instanceRef cpu_est_ns_0_0_1)) + (net N_164_i (joined + (portRef O (instanceRef N_164_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_7)) )) - (net (rename cpu_est_ns_0_1 "cpu_est_ns_0[1]") (joined - (portRef O (instanceRef cpu_est_ns_0_0_1)) - (portRef I0 (instanceRef cpu_est_ns_0_0_i_1)) - )) - (net N_152_i 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(portRef I1 (instanceRef state_machine_UDS_000_INT_7_0)) + (net N_130_i (joined + (portRef O (instanceRef N_130_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_i_6)) )) - (net (rename state_machine_UDS_000_INT_7_0 "state_machine.UDS_000_INT_7_0") (joined - (portRef O (instanceRef state_machine_UDS_000_INT_7_0)) - (portRef I0 (instanceRef state_machine_UDS_000_INT_7_0_i)) + (net N_131_i (joined + (portRef O (instanceRef N_131_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_i_6)) )) - (net N_144_i (joined - (portRef O (instanceRef N_144_i)) + (net N_41_0 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_i_6)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_i_i_6)) + )) + (net N_128_i (joined + (portRef O (instanceRef N_128_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_0_5)) + )) + (net N_129_i (joined + (portRef O (instanceRef N_129_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_0_5)) + )) + (net (rename SM_AMIGA_ns_0_5 "SM_AMIGA_ns_0[5]") (joined + (portRef O (instanceRef SM_AMIGA_ns_0_5)) + (portRef I0 (instanceRef SM_AMIGA_ns_0_i_5)) + )) + (net N_126_i (joined + (portRef O (instanceRef N_126_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_4)) + )) + (net N_127_i (joined + (portRef O (instanceRef N_127_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_4)) + )) + (net N_38_i (joined + (portRef O (instanceRef SM_AMIGA_ns_i_4)) + (portRef D (instanceRef SM_AMIGA_3)) + )) + (net N_125_i (joined + (portRef O (instanceRef N_125_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_0_3)) + )) + (net N_75_i (joined + (portRef O (instanceRef SM_AMIGA_ns_i_0_3)) + (portRef D (instanceRef SM_AMIGA_4)) + )) + (net N_124_i (joined + (portRef O (instanceRef N_124_i)) + (portRef I1 (instanceRef SM_AMIGA_ns_i_0_2)) + )) + (net N_73_i (joined + (portRef O (instanceRef SM_AMIGA_ns_i_0_2)) + (portRef D (instanceRef SM_AMIGA_5)) + )) + (net N_122_i (joined + (portRef O (instanceRef N_122_i)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_1)) + )) + (net N_34_i (joined + (portRef O (instanceRef SM_AMIGA_ns_i_1)) + (portRef D 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un3_dtack_i_a3_1)) (portRef I0 (instanceRef un3_dtack_i_a3)) )) - (net N_164_1 (joined - (portRef O (instanceRef SM_AMIGAse_7_0_a3_0_1)) - (portRef I0 (instanceRef SM_AMIGAse_7_0_a3_0)) + (net N_139_1 (joined + (portRef O (instanceRef state_machine_AMIGA_BUS_ENABLE_4_iv_0_a3_1)) + (portRef I0 (instanceRef state_machine_AMIGA_BUS_ENABLE_4_iv_0_a3)) )) - (net N_156_1 (joined + (net N_137_1 (joined (portRef O (instanceRef AMIGA_BUS_DATA_DIR_0_0_a3_0_1)) (portRef I0 (instanceRef AMIGA_BUS_DATA_DIR_0_0_a3_0)) )) - (net N_144_1 (joined + (net N_127_1 (joined + (portRef O (instanceRef SM_AMIGA_ns_i_a3_0_1_4)) + (portRef I0 (instanceRef SM_AMIGA_ns_i_a3_0_4)) + )) + (net N_120_1 (joined (portRef O (instanceRef state_machine_LDS_000_INT_7_0_a3_1)) (portRef I0 (instanceRef state_machine_LDS_000_INT_7_0_a3)) )) - (net N_240_1 (joined - (portRef O (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_a3_1)) - (portRef I0 (instanceRef un1_AMIGA_BUS_ENABLE_1_sqmuxa_1_i_a3)) + (net (rename state_machine_A0_DMA_2_1 "state_machine.A0_DMA_2_1") (joined + (portRef O (instanceRef state_machine_A0_DMA_2_0_a3_1)) + (portRef I0 (instanceRef state_machine_A0_DMA_2_0_a3)) )) - (net N_239_1 (joined - (portRef O (instanceRef LDS_000_INT_1_sqmuxa_i_a3_0_1)) - (portRef I0 (instanceRef LDS_000_INT_1_sqmuxa_i_a3_0)) + (net N_116_1 (joined + (portRef O (instanceRef un1_AS_030_2_i_a3_0_1)) + (portRef I0 (instanceRef un1_AS_030_2_i_a3_0)) )) - (net N_237_1 (joined - (portRef O (instanceRef LDS_000_INT_1_sqmuxa_i_a3_1)) - (portRef I0 (instanceRef LDS_000_INT_1_sqmuxa_i_a3)) + (net N_115_1 (joined + (portRef O (instanceRef un1_AS_030_2_i_a3_1)) + (portRef I0 (instanceRef un1_AS_030_2_i_a3)) )) - (net SIZE_DMA_0_sqmuxa_1 (joined - (portRef O (instanceRef SIZE_DMA_0_sqmuxa_0_a3_1)) - (portRef I0 (instanceRef SIZE_DMA_0_sqmuxa_0_a3)) + (net (rename state_machine_un13_clk_000_d0_1 "state_machine.un13_clk_000_d0_1") (joined + (portRef O (instanceRef state_machine_un15_clk_000_d0_0_a3_0_1)) + (portRef I0 (instanceRef state_machine_un15_clk_000_d0_0_a3_0)) )) - (net N_232_1 (joined - (portRef O (instanceRef N_111_i_i_a3_1)) - (portRef I0 (instanceRef N_111_i_i_a3)) + (net N_203_1 (joined + (portRef O (instanceRef state_machine_un15_clk_000_d0_0_a3_1)) + (portRef I0 (instanceRef state_machine_un15_clk_000_d0_0_a3)) )) - (net N_109_1 (joined - (portRef O (instanceRef VMA_INT_1_sqmuxa_i_a3_0_1)) - (portRef I0 (instanceRef VMA_INT_1_sqmuxa_i_a3_0)) + (net (rename state_machine_UDS_000_INT_7_0_m3_un3 "state_machine.UDS_000_INT_7_0_m3.un3") (joined + (portRef O (instanceRef state_machine_UDS_000_INT_7_0_m3_r)) + (portRef I1 (instanceRef state_machine_UDS_000_INT_7_0_m3_n)) )) - (net (rename cpu_est_ns_0_0_m3_2__un3 "cpu_est_ns_0_0_m3_2_.un3") (joined - (portRef O (instanceRef cpu_est_ns_0_0_m3_2__r)) - (portRef I1 (instanceRef cpu_est_ns_0_0_m3_2__n)) + (net (rename state_machine_UDS_000_INT_7_0_m3_un1 "state_machine.UDS_000_INT_7_0_m3.un1") (joined + (portRef O (instanceRef state_machine_UDS_000_INT_7_0_m3_m)) + (portRef I0 (instanceRef state_machine_UDS_000_INT_7_0_m3_p)) )) - (net (rename cpu_est_ns_0_0_m3_2__un1 "cpu_est_ns_0_0_m3_2_.un1") (joined - (portRef O (instanceRef cpu_est_ns_0_0_m3_2__m)) - (portRef I0 (instanceRef cpu_est_ns_0_0_m3_2__p)) - )) - (net (rename cpu_est_ns_0_0_m3_2__un0 "cpu_est_ns_0_0_m3_2_.un0") (joined - (portRef O (instanceRef cpu_est_ns_0_0_m3_2__n)) - (portRef I1 (instanceRef cpu_est_ns_0_0_m3_2__p)) - )) - (net (rename state_machine_LDS_000_INT_7_0_m3_un3 "state_machine.LDS_000_INT_7_0_m3.un3") (joined - (portRef O (instanceRef state_machine_LDS_000_INT_7_0_m3_r)) - (portRef I1 (instanceRef state_machine_LDS_000_INT_7_0_m3_n)) - )) - (net (rename state_machine_LDS_000_INT_7_0_m3_un1 "state_machine.LDS_000_INT_7_0_m3.un1") (joined - (portRef O (instanceRef state_machine_LDS_000_INT_7_0_m3_m)) - (portRef I0 (instanceRef state_machine_LDS_000_INT_7_0_m3_p)) - )) - (net (rename state_machine_LDS_000_INT_7_0_m3_un0 "state_machine.LDS_000_INT_7_0_m3.un0") (joined - (portRef O (instanceRef state_machine_LDS_000_INT_7_0_m3_n)) - (portRef I1 (instanceRef state_machine_LDS_000_INT_7_0_m3_p)) - )) - (net (rename cpu_estse_0_un3 "cpu_estse_0.un3") (joined - (portRef O (instanceRef cpu_estse_0_r)) - (portRef I1 (instanceRef cpu_estse_0_n)) - )) - (net (rename cpu_estse_0_un1 "cpu_estse_0.un1") (joined - (portRef O (instanceRef cpu_estse_0_m)) - (portRef I0 (instanceRef cpu_estse_0_p)) - )) - (net (rename cpu_estse_0_un0 "cpu_estse_0.un0") (joined - (portRef O (instanceRef cpu_estse_0_n)) - (portRef I1 (instanceRef cpu_estse_0_p)) - )) - (net (rename cpu_estse_1_un3 "cpu_estse_1.un3") (joined - (portRef O (instanceRef cpu_estse_1_r)) - (portRef I1 (instanceRef cpu_estse_1_n)) - )) - (net (rename cpu_estse_1_un1 "cpu_estse_1.un1") (joined - (portRef O (instanceRef cpu_estse_1_m)) - (portRef I0 (instanceRef cpu_estse_1_p)) - )) - (net (rename cpu_estse_1_un0 "cpu_estse_1.un0") (joined - (portRef O (instanceRef cpu_estse_1_n)) - (portRef I1 (instanceRef cpu_estse_1_p)) - )) - (net (rename cpu_estse_2_un3 "cpu_estse_2.un3") (joined - (portRef O (instanceRef cpu_estse_2_r)) - (portRef I1 (instanceRef cpu_estse_2_n)) - )) - (net (rename cpu_estse_2_un1 "cpu_estse_2.un1") (joined - (portRef O (instanceRef cpu_estse_2_m)) - (portRef I0 (instanceRef cpu_estse_2_p)) - )) - (net (rename cpu_estse_2_un0 "cpu_estse_2.un0") (joined - (portRef O (instanceRef cpu_estse_2_n)) - (portRef I1 (instanceRef cpu_estse_2_p)) + (net (rename state_machine_UDS_000_INT_7_0_m3_un0 "state_machine.UDS_000_INT_7_0_m3.un0") (joined + (portRef O (instanceRef state_machine_UDS_000_INT_7_0_m3_n)) + (portRef I1 (instanceRef state_machine_UDS_000_INT_7_0_m3_p)) )) (net (rename DSACK1_INT_0_un3 "DSACK1_INT_0.un3") (joined (portRef O (instanceRef DSACK1_INT_0_r)) @@ -2839,42 +2721,6 @@ (portRef O (instanceRef DSACK1_INT_0_n)) (portRef I1 (instanceRef DSACK1_INT_0_p)) )) - (net (rename AS_000_DMA_0_un3 "AS_000_DMA_0.un3") (joined - (portRef O (instanceRef AS_000_DMA_0_r)) - (portRef I1 (instanceRef AS_000_DMA_0_n)) - )) - (net (rename AS_000_DMA_0_un1 "AS_000_DMA_0.un1") (joined - (portRef O (instanceRef AS_000_DMA_0_m)) - (portRef I0 (instanceRef AS_000_DMA_0_p)) - )) - (net (rename AS_000_DMA_0_un0 "AS_000_DMA_0.un0") (joined - (portRef O (instanceRef AS_000_DMA_0_n)) - (portRef I1 (instanceRef AS_000_DMA_0_p)) - )) - (net (rename AS_000_INT_0_un3 "AS_000_INT_0.un3") (joined - (portRef O (instanceRef AS_000_INT_0_r)) - (portRef I1 (instanceRef AS_000_INT_0_n)) - )) - (net (rename AS_000_INT_0_un1 "AS_000_INT_0.un1") (joined - (portRef O (instanceRef AS_000_INT_0_m)) - (portRef I0 (instanceRef AS_000_INT_0_p)) - )) - (net (rename AS_000_INT_0_un0 "AS_000_INT_0.un0") (joined - (portRef O (instanceRef AS_000_INT_0_n)) - (portRef I1 (instanceRef AS_000_INT_0_p)) - )) - (net (rename VPA_SYNC_0_un3 "VPA_SYNC_0.un3") (joined - (portRef O (instanceRef VPA_SYNC_0_r)) - (portRef I1 (instanceRef VPA_SYNC_0_n)) - )) - (net (rename VPA_SYNC_0_un1 "VPA_SYNC_0.un1") (joined - (portRef O (instanceRef VPA_SYNC_0_m)) - (portRef I0 (instanceRef VPA_SYNC_0_p)) - )) - (net (rename VPA_SYNC_0_un0 "VPA_SYNC_0.un0") (joined - (portRef O (instanceRef VPA_SYNC_0_n)) - (portRef I1 (instanceRef VPA_SYNC_0_p)) - )) (net (rename VMA_INT_0_un3 "VMA_INT_0.un3") (joined (portRef O (instanceRef VMA_INT_0_r)) (portRef I1 (instanceRef VMA_INT_0_n)) @@ -2899,30 +2745,6 @@ (portRef O (instanceRef BGACK_030_INT_0_n)) (portRef I1 (instanceRef BGACK_030_INT_0_p)) )) - (net (rename SIZE_DMA_0_0__un3 "SIZE_DMA_0_0_.un3") (joined - (portRef O (instanceRef SIZE_DMA_0_0__r)) - (portRef I1 (instanceRef SIZE_DMA_0_0__n)) - )) - (net (rename SIZE_DMA_0_0__un1 "SIZE_DMA_0_0_.un1") (joined - (portRef O (instanceRef SIZE_DMA_0_0__m)) - (portRef I0 (instanceRef SIZE_DMA_0_0__p)) - )) - (net (rename SIZE_DMA_0_0__un0 "SIZE_DMA_0_0_.un0") (joined - (portRef O (instanceRef SIZE_DMA_0_0__n)) - (portRef I1 (instanceRef SIZE_DMA_0_0__p)) - )) - (net (rename SIZE_DMA_0_1__un3 "SIZE_DMA_0_1_.un3") (joined - (portRef O (instanceRef SIZE_DMA_0_1__r)) - (portRef I1 (instanceRef SIZE_DMA_0_1__n)) - )) - (net (rename SIZE_DMA_0_1__un1 "SIZE_DMA_0_1_.un1") (joined - (portRef O (instanceRef SIZE_DMA_0_1__m)) - (portRef I0 (instanceRef SIZE_DMA_0_1__p)) - )) - (net (rename SIZE_DMA_0_1__un0 "SIZE_DMA_0_1_.un0") (joined - (portRef O (instanceRef SIZE_DMA_0_1__n)) - (portRef I1 (instanceRef SIZE_DMA_0_1__p)) - )) (net (rename IPL_030_0_0__un3 "IPL_030_0_0_.un3") (joined (portRef O (instanceRef IPL_030_0_0__r)) (portRef I1 (instanceRef IPL_030_0_0__n)) @@ -2959,6 +2781,42 @@ (portRef O (instanceRef IPL_030_0_2__n)) (portRef I1 (instanceRef IPL_030_0_2__p)) )) + (net (rename cpu_estse_0_un3 "cpu_estse_0.un3") (joined + (portRef O (instanceRef cpu_estse_0_r)) + (portRef I1 (instanceRef cpu_estse_0_n)) + )) + (net (rename cpu_estse_0_un1 "cpu_estse_0.un1") (joined + (portRef O (instanceRef cpu_estse_0_m)) + (portRef I0 (instanceRef cpu_estse_0_p)) + )) + (net (rename cpu_estse_0_un0 "cpu_estse_0.un0") (joined + (portRef O (instanceRef cpu_estse_0_n)) + (portRef I1 (instanceRef cpu_estse_0_p)) + )) + (net (rename cpu_estse_1_un3 "cpu_estse_1.un3") (joined + (portRef O (instanceRef cpu_estse_1_r)) + (portRef I1 (instanceRef cpu_estse_1_n)) + )) + (net (rename cpu_estse_1_un1 "cpu_estse_1.un1") (joined + (portRef O (instanceRef cpu_estse_1_m)) + (portRef I0 (instanceRef cpu_estse_1_p)) + )) + (net (rename cpu_estse_1_un0 "cpu_estse_1.un0") (joined + (portRef O (instanceRef cpu_estse_1_n)) + (portRef I1 (instanceRef cpu_estse_1_p)) + )) + (net (rename cpu_estse_2_un3 "cpu_estse_2.un3") (joined + (portRef O (instanceRef cpu_estse_2_r)) + (portRef I1 (instanceRef cpu_estse_2_n)) + )) + (net (rename cpu_estse_2_un1 "cpu_estse_2.un1") (joined + (portRef O (instanceRef cpu_estse_2_m)) + (portRef I0 (instanceRef cpu_estse_2_p)) + )) + (net (rename cpu_estse_2_un0 "cpu_estse_2.un0") (joined + (portRef O (instanceRef cpu_estse_2_n)) + (portRef I1 (instanceRef cpu_estse_2_p)) + )) (net (rename AMIGA_BUS_ENABLE_0_un3 "AMIGA_BUS_ENABLE_0.un3") (joined (portRef O (instanceRef AMIGA_BUS_ENABLE_0_r)) (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_n)) @@ -2971,6 +2829,30 @@ (portRef O (instanceRef AMIGA_BUS_ENABLE_0_n)) (portRef I1 (instanceRef AMIGA_BUS_ENABLE_0_p)) )) + (net (rename AS_030_000_SYNC_0_un3 "AS_030_000_SYNC_0.un3") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_r)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_n)) + )) + (net (rename AS_030_000_SYNC_0_un1 "AS_030_000_SYNC_0.un1") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_m)) + (portRef I0 (instanceRef AS_030_000_SYNC_0_p)) + )) + (net (rename AS_030_000_SYNC_0_un0 "AS_030_000_SYNC_0.un0") (joined + (portRef O (instanceRef AS_030_000_SYNC_0_n)) + (portRef I1 (instanceRef AS_030_000_SYNC_0_p)) + )) + (net (rename CLK_030_H_0_un3 "CLK_030_H_0.un3") (joined + (portRef O (instanceRef CLK_030_H_0_r)) + (portRef I1 (instanceRef CLK_030_H_0_n)) + )) + (net (rename CLK_030_H_0_un1 "CLK_030_H_0.un1") (joined + (portRef O (instanceRef CLK_030_H_0_m)) + (portRef I0 (instanceRef CLK_030_H_0_p)) + )) + (net (rename CLK_030_H_0_un0 "CLK_030_H_0.un0") (joined + (portRef O (instanceRef CLK_030_H_0_n)) + (portRef I1 (instanceRef CLK_030_H_0_p)) + )) (net (rename UDS_000_INT_0_un3 "UDS_000_INT_0.un3") (joined (portRef O (instanceRef UDS_000_INT_0_r)) (portRef I1 (instanceRef UDS_000_INT_0_n)) @@ -2995,30 +2877,6 @@ (portRef O (instanceRef LDS_000_INT_0_n)) (portRef I1 (instanceRef LDS_000_INT_0_p)) )) - (net (rename AS_030_000_SYNC_0_un3 "AS_030_000_SYNC_0.un3") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_r)) - (portRef I1 (instanceRef AS_030_000_SYNC_0_n)) - )) - (net (rename AS_030_000_SYNC_0_un1 "AS_030_000_SYNC_0.un1") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_m)) - (portRef I0 (instanceRef AS_030_000_SYNC_0_p)) - )) - (net (rename AS_030_000_SYNC_0_un0 "AS_030_000_SYNC_0.un0") (joined - (portRef O (instanceRef AS_030_000_SYNC_0_n)) - (portRef I1 (instanceRef AS_030_000_SYNC_0_p)) - )) - (net (rename DS_000_DMA_0_un3 "DS_000_DMA_0.un3") (joined - (portRef O (instanceRef DS_000_DMA_0_r)) - (portRef I1 (instanceRef DS_000_DMA_0_n)) - )) - (net (rename DS_000_DMA_0_un1 "DS_000_DMA_0.un1") (joined - (portRef O (instanceRef DS_000_DMA_0_m)) - (portRef I0 (instanceRef DS_000_DMA_0_p)) - )) - (net (rename DS_000_DMA_0_un0 "DS_000_DMA_0.un0") (joined - (portRef O (instanceRef DS_000_DMA_0_n)) - (portRef I1 (instanceRef DS_000_DMA_0_p)) - )) (net (rename FPU_CS_INT_0_un3 "FPU_CS_INT_0.un3") (joined (portRef O (instanceRef FPU_CS_INT_0_r)) (portRef I1 (instanceRef FPU_CS_INT_0_n)) @@ -3031,30 +2889,6 @@ (portRef O (instanceRef FPU_CS_INT_0_n)) (portRef I1 (instanceRef FPU_CS_INT_0_p)) )) - (net (rename DTACK_SYNC_0_un3 "DTACK_SYNC_0.un3") (joined - (portRef O (instanceRef DTACK_SYNC_0_r)) - (portRef I1 (instanceRef DTACK_SYNC_0_n)) - )) - (net (rename DTACK_SYNC_0_un1 "DTACK_SYNC_0.un1") (joined - (portRef O (instanceRef DTACK_SYNC_0_m)) - (portRef I0 (instanceRef DTACK_SYNC_0_p)) - )) - (net (rename DTACK_SYNC_0_un0 "DTACK_SYNC_0.un0") (joined - (portRef O (instanceRef DTACK_SYNC_0_n)) - (portRef I1 (instanceRef DTACK_SYNC_0_p)) - )) - (net (rename A0_DMA_0_un3 "A0_DMA_0.un3") (joined - (portRef O (instanceRef A0_DMA_0_r)) - (portRef I1 (instanceRef A0_DMA_0_n)) - )) - (net (rename A0_DMA_0_un1 "A0_DMA_0.un1") (joined - (portRef O (instanceRef A0_DMA_0_m)) - (portRef I0 (instanceRef A0_DMA_0_p)) - )) - (net (rename A0_DMA_0_un0 "A0_DMA_0.un0") (joined - (portRef O (instanceRef A0_DMA_0_n)) - (portRef I1 (instanceRef A0_DMA_0_p)) - )) (net (rename BG_000_0_un3 "BG_000_0.un3") (joined (portRef O (instanceRef BG_000_0_r)) (portRef I1 (instanceRef BG_000_0_n)) @@ -3067,6 +2901,42 @@ (portRef O (instanceRef BG_000_0_n)) (portRef I1 (instanceRef BG_000_0_p)) )) + (net (rename DS_000_DMA_0_un3 "DS_000_DMA_0.un3") (joined + (portRef O (instanceRef DS_000_DMA_0_r)) + (portRef I1 (instanceRef DS_000_DMA_0_n)) + )) + (net (rename DS_000_DMA_0_un1 "DS_000_DMA_0.un1") (joined + (portRef O (instanceRef DS_000_DMA_0_m)) + (portRef I0 (instanceRef DS_000_DMA_0_p)) + )) + (net (rename DS_000_DMA_0_un0 "DS_000_DMA_0.un0") (joined + (portRef O (instanceRef DS_000_DMA_0_n)) + (portRef I1 (instanceRef DS_000_DMA_0_p)) + )) + (net (rename AS_000_DMA_0_un3 "AS_000_DMA_0.un3") (joined + (portRef O (instanceRef AS_000_DMA_0_r)) + (portRef I1 (instanceRef AS_000_DMA_0_n)) + )) + (net (rename AS_000_DMA_0_un1 "AS_000_DMA_0.un1") (joined + (portRef O (instanceRef AS_000_DMA_0_m)) + (portRef I0 (instanceRef AS_000_DMA_0_p)) + )) + (net (rename AS_000_DMA_0_un0 "AS_000_DMA_0.un0") (joined + (portRef O (instanceRef AS_000_DMA_0_n)) + (portRef I1 (instanceRef AS_000_DMA_0_p)) + )) + (net (rename AS_000_INT_0_un3 "AS_000_INT_0.un3") (joined + (portRef O (instanceRef AS_000_INT_0_r)) + (portRef I1 (instanceRef AS_000_INT_0_n)) + )) + (net (rename AS_000_INT_0_un1 "AS_000_INT_0.un1") (joined + (portRef O (instanceRef AS_000_INT_0_m)) + (portRef I0 (instanceRef AS_000_INT_0_p)) + )) + (net (rename AS_000_INT_0_un0 "AS_000_INT_0.un0") (joined + (portRef O (instanceRef AS_000_INT_0_n)) + (portRef I1 (instanceRef AS_000_INT_0_p)) + )) ) (property orig_inst_of (string "BUS68030")) ) diff --git a/Logic/BUS68030.fse b/Logic/BUS68030.fse index 0e2a6ac..2d57677 100644 --- a/Logic/BUS68030.fse +++ b/Logic/BUS68030.fse @@ -1,46 +1,46 @@ -fsm_encoding {722122211} onehot +fsm_encoding {723322331} onehot -fsm_state_encoding {722122211} idle_p {00000001} +fsm_state_encoding {723322331} idle_p {00000001} -fsm_state_encoding {722122211} idle_n {00000010} +fsm_state_encoding {723322331} idle_n {00000010} -fsm_state_encoding {722122211} as_set_p {00000100} +fsm_state_encoding {723322331} as_set_p {00000100} -fsm_state_encoding {722122211} as_set_n {00001000} +fsm_state_encoding {723322331} as_set_n {00001000} -fsm_state_encoding {722122211} sample_dtack_p {00010000} +fsm_state_encoding {723322331} sample_dtack_p {00010000} -fsm_state_encoding {722122211} data_fetch_n {00100000} +fsm_state_encoding {723322331} data_fetch_n {00100000} -fsm_state_encoding {722122211} data_fetch_p {01000000} +fsm_state_encoding {723322331} data_fetch_p {01000000} -fsm_state_encoding {722122211} end_cycle_n {10000000} +fsm_state_encoding {723322331} end_cycle_n {10000000} -fsm_registers {722122211} {SM_AMIGA[0]} {SM_AMIGA[1]} {SM_AMIGA[2]} {SM_AMIGA[3]} {SM_AMIGA[4]} {SM_AMIGA[5]} {SM_AMIGA[6]} {SM_AMIGA[7]} +fsm_registers {723322331} {SM_AMIGA[0]} {SM_AMIGA[1]} {SM_AMIGA[2]} {SM_AMIGA[3]} {SM_AMIGA[4]} {SM_AMIGA[5]} {SM_AMIGA[6]} {SM_AMIGA[7]} -fsm_encoding {7116341162} original +fsm_encoding {7117341172} original -fsm_state_encoding {7116341162} e20 {0000} +fsm_state_encoding {7117341172} e20 {0000} -fsm_state_encoding {7116341162} e5 {0010} +fsm_state_encoding {7117341172} e5 {0010} -fsm_state_encoding {7116341162} e6 {0011} +fsm_state_encoding {7117341172} e6 {0011} -fsm_state_encoding {7116341162} e3 {0100} +fsm_state_encoding {7117341172} e3 {0100} -fsm_state_encoding {7116341162} e4 {0101} +fsm_state_encoding {7117341172} e4 {0101} -fsm_state_encoding {7116341162} e1 {0110} +fsm_state_encoding {7117341172} e1 {0110} -fsm_state_encoding {7116341162} e2 {0111} +fsm_state_encoding {7117341172} e2 {0111} -fsm_state_encoding {7116341162} e7 {1010} +fsm_state_encoding {7117341172} e7 {1010} -fsm_state_encoding {7116341162} e8 {1011} +fsm_state_encoding {7117341172} e8 {1011} -fsm_state_encoding {7116341162} e9 {1100} +fsm_state_encoding {7117341172} e9 {1100} -fsm_state_encoding {7116341162} e10 {1111} +fsm_state_encoding {7117341172} e10 {1111} -fsm_registers {7116341162} {cpu_est[3]} {cpu_est[2]} {cpu_est[1]} {cpu_est[0]} +fsm_registers {7117341172} {cpu_est[3]} {cpu_est[2]} {cpu_est[1]} {cpu_est[0]} diff --git a/Logic/BUS68030.prj b/Logic/BUS68030.prj index 5e0e02b..ad677ab 100644 --- a/Logic/BUS68030.prj +++ b/Logic/BUS68030.prj @@ -1,6 +1,6 @@ #-- Lattice Semiconductor Corporation Ltd. #-- Synplify OEM project file c:/users/matze/documents/github/68030tk/logic\BUS68030.prj -#-- Written on Sun May 25 21:18:44 2014 +#-- Written on Wed May 28 21:24:48 2014 #device options diff --git a/Logic/BUS68030.srm b/Logic/BUS68030.srm index 84110f8..1cee750 100644 --- a/Logic/BUS68030.srm +++ b/Logic/BUS68030.srm @@ -35,15 +35,16 @@ af .parent_list "-1"; VNAME 'mach.MACH_DFF.prim'; # view id 0 VNAME 'mach.DFFRH.prim'; # view id 1 VNAME 'mach.DFFSH.prim'; # view id 2 -VNAME 'mach.BI_DIR.prim'; # view id 3 -VNAME 'mach.IBUF.prim'; # view id 4 -VNAME 'mach.BUFTH.prim'; # view id 5 -VNAME 'mach.OBUF.prim'; # view id 6 -VNAME 'mach.AND2.prim'; # view id 7 -VNAME 'mach.INV.prim'; # view id 8 -VNAME 'mach.OR2.prim'; # view id 9 -VNAME 'mach.XOR2.prim'; # view id 10 -VNAME 'work.BUS68030.behavioral'; # view id 11 +VNAME 'mach.DFF.prim'; # view id 3 +VNAME 'mach.BI_DIR.prim'; # view id 4 +VNAME 'mach.IBUF.prim'; # view id 5 +VNAME 'mach.BUFTH.prim'; # view id 6 +VNAME 'mach.OBUF.prim'; # view id 7 +VNAME 'mach.AND2.prim'; # view id 8 +VNAME 'mach.INV.prim'; # view id 9 +VNAME 'mach.OR2.prim'; # view id 10 +VNAME 'mach.XOR2.prim'; # view id 11 +VNAME 'work.BUS68030.behavioral'; # view id 12 @ERMRlENORBvq]w_7wsRbH l;N3ORCV8HMCF8V;R4 RNP3#8H#PFDCRlC4N; @@ -104,79 +105,94 @@ mShaQQw t)=h 7;bjRf:HjRMkPRMk4RM14R;R bfjj:Rk0sCsR0keCRB B;bjRf:VjRNCD#RDVN#tCRh -7;MlRRNROEA7Q_Qb)Rs;Hl -RNP3bH#sRHl4F; -R -m;HjRQ;R -LQkmRM -4;N3HRHN#b8;R4 -RNH#_$M0#sH0CN0R -4;H Rm;M -oR4kM;M -NRN3#PMC_CV0_D#No46R.nb; +7;MlRRNROE7RwwblsH;P +NR#3HblsHR +4;FRRTk;Mj +7HR;R +HB;pi +RoMk;Mj +RNM3P#NCC_M0D_VN4o#Rn.6;R +sfjj:ROlNEqRvB7]_wbwRsRHlQch1 +=STk +MjS77= +pSBip=Bi) +S=BeB +=S1e +BBSahmQ wQ)h=t7b; R:fjjsR0k0CRsRkCe;BB fbRjR:jV#NDCNRVDR#Ct;h7 -fbRjR:j0RsHkrMjjk9RMQ4Rj Rm;R -bfjj:RVLkRmmRR4kM;R -MROlNEARQzbwRs;Hl -RNP3bH#sRHl4F; -R -m;HjRQ;H -NR#3HbRN84b; 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+fbRjR:j0CskRk0sCBReBb; +R:fjjNRVDR#CV#NDChRt7b; +R:fjjMRN8mPRRQmRj4RQ;R +MROlNEhRQesRbH +l;N3PRHs#bH4lR;R +FmH; R;Qj -fbRjR:jLRkVmRRmQ +fbRjR:jHRMPmRRmQ j;bjRf:0jRsRkC0CskRBeB;R bfjj:RDVN#VCRNCD#R7th;R -MROlNEhRq7b.Rs;Hl -RNP3bH#sRHl4F; -R -m;HjRQ;R -HQ -4;bjRf:0jRsRkC0CskRBeB;R -bfjj:RDVN#VCRNCD#R7th;R -bfjj:R8NMPRRmmjRQR;Q4 -RMRlENOReQhRHbslN; -PHR3#Hbsl;R4 -mFR;R -HQ -j;bjRf:HjRMmPRRQmRjb; +MROlNE)Rm.sRbH +l;N3PRHs#bH4lR;R +FmH; +R;Qj +QHR4b; R:fjjsR0k0CRsRkCe;BB fbRjR:jV#NDCNRVDR#Ct;h7 -RMRlENOR.m)RHbslN; -PHR3#Hbsl;R4 -mFR;R -HQ -j;H4RQ;R -bfjj:Rk0sCsR0keCRB -B;bjRf:VjRNCD#RDVN#tCRh -7;bjRf:FjRsmPRRQmRj4RQ;R -MROlNEmRX)b.Rs;Hl -RNP3bH#sRHl4F; -R -m;HjRQ;R -HQ -4;bjRf:0jRsRkC0CskRBeB;R -bfjj:RDVN#VCRNCD#R7th;R -bfjj:RsGFPRRmmjRQR;Q4 - -@ +fbRjR:jFRsPmRRmQQjR4M; +RNRlOXERmR).blsH;P +NR#3HblsHR +4;F;Rm +QHRjH; +R;Q4 +fbRjR:j0CskRk0sCBReBb; +R:fjjNRVDR#CV#NDChRt7b; +R:fjjFRGsmPRRQmRj4RQ; +@ ftell; @E@MR@4U:d::(44d:cIRRFRs Anz1UjjdRELCNFPHs;ND RNP3MDHCRMF6 @@ -185,313 +201,236 @@ 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+R:fjjNRlOqERhR7.blsHR_71j_jj7_vqj +3lS7m=1j_jjv_7q3_jk +M4S=Qj#00NCN_lOMEHC7\31j_jjv_7q +_dS=Q4hd_6;R sfjj:ROlNEhRq7b.RsRHl7j1_j7j_vjq_3SM m1=7_jjj_q7v_kj3MSj Q7j=1j_jjv_7qQ S41=7_jjj_q7v_kj3M d;sjRf:ljRNROEmR).blsHR_71j_jj7_vqj -3bShm=_S6 +3bShm=_SU Q7j=1j_jjv_7q3_jk M4S=Q47j1_j7j_vjq_3jkM;R -sfjj:ROlNEhRQesRbHwlRuBz_1h_Qa3_jsm -S=zwu__B1Q_hajM3kdQ -Sj_=hd -d;sjRf:ljRNROEq.h7RHbsluRwz1_B_aQh_lj3 -=Smw_uzBQ1_hja_34kM -jSQ=_q1j_djOQ -S4_=hd -d;sjRf:ljRNROEq.h7RHbsluRwz1_B_aQh_Mj3 -=Smw_uzBQ1_hja_3jkM -jSQ=zwu__B1Q -haS=Q4w_uzBQ1_hja_3dkM;R -sfjj:ROlNE)Rm.sRbHwlRuBz_1h_Qa3_jbm -S=nh_ -jSQ=zwu__B1Q_hajM3k4Q -S4u=wz1_B_aQh_kj3M -j;sjRf:ljRNROEQRheblsHR.h_dHc_ -=Smhd_.c -_HS=Qjhd_.cs; -R:fjjNRlOQERhbeRsRHl7BaqiY_1hjB_3Ss -ma=7q_Bi1BYh_kj3MSd -Qhj=_U..;R -sfjj:ROlNEhRq7b.RsRHl7BaqiY_1hjB_3Sl -ma=7q_Bi1BYh_kj3MS4 -Qhj=_c.d_SH -Qh4=_U..;R -sfjj:ROlNEhRq7b.RsRHl7BaqiY_1hjB_3SM -ma=7q_Bi1BYh_kj3MSj -Q7j=aiqB_h1YBQ -S4a=7q_Bi1BYh_kj3M -d;sjRf:ljRNROEmR).blsHRq7aB1i_Y_hBj +sfjj:ROlNEhRQesRbHqlR1j_jjv_7q3_jsm +S=_q1j_jj7_vqjM3kdQ +Sj_=h4;gU +fsRjR:jlENOR7qh.sRbHqlR1j_jjv_7q3_jlm +S=_q1j_jj7_vqjM3k4Q +Sj0=#N_0ClENOH\MC3UkM_NLoOj _dHj_MH0__Sj +Qh4=_U4g;R +sfjj:ROlNEhRq7b.RsRHlqj1_j7j_vjq_3SM +m1=q_jjj_q7v_kj3MSj +Qqj=1j_jjv_7qQ +S41=q_jjj_q7v_kj3M +d;sjRf:ljRNROEmR).blsHR_q1j_jj7_vqj 3bShm=_Sg -Q7j=aiqB_h1YB3_jk -M4S=Q47BaqiY_1hjB_3jkM;R -sfjj:ROlNEhRQesRbHqlRjv_7q3_jsm -S=_qj7_vqjM3kdQ -Sj_=h.;.c -fsRjR:jlENOR7qh.sRbHqlRjv_7q3_jlm -S=_qj7_vqjM3k4Q -Sj0=#N_0ClENOH\MC3_qj7_vqcQ -S4_=h.;.c -fsRjR:jlENOR7qh.sRbHqlRjv_7q3_jMm -S=_qj7_vqjM3kjQ -Sjj=q_q7v -4SQ=_qj7_vqjM3kds; -R:fjjNRlOmER)b.RsRHlq7j_vjq_3Sb -m_=h4Sj -Qqj=jv_7q3_jk -M4S=Q4q7j_vjq_3jkM;R -sfjj:ROlNEhRQesRbHAlRtj_jj3_jsm -S=_Atj_jjjM3kdQ -Sj0=#N_0ClENOH\MC34kMjo_L_jjd;R -sfjj:ROlNEhRq7b.RsRHlAjt_jjj_3Sl -mt=A_jjj_kj3MS4 -QAj=td_jj -_OS=Q4#00NCN_lOMEHCk\3M_4jLjo_d -j;sjRf:ljRNROEq.h7RHbsltRA_jjj_Mj3 -=SmAjt_jjj_3jkM -jSQ=_Atj_jjOQ -S4t=A_jjj_kj3M -d;sjRf:ljRNROEmR).blsHR_Atj_jjj +Qqj=1j_jjv_7q3_jk +M4S=Q4qj1_j7j_vjq_3jkM;R +sfjj:ROlNEhRQesRbHqlR1j_jjh_Qa3_jsm +S=_q1j_jjQ_hajM3kdQ +Sj_=h4;g( +fsRjR:jlENOR7qh.sRbHqlR1j_jjh_Qa3_jlm +S=_q1j_jjQ_hajM3k4Q +Sj_=hnSc +Qh4=_(4g;R +sfjj:ROlNEhRq7b.RsRHlqj1_jQj_hja_3SM +m1=q_jjj_aQh_kj3MSj +Qqj=1j_jjh_QaQ +S41=q_jjj_aQh_kj3M +d;sjRf:ljRNROEmR).blsHR_q1j_jjQ_haj 3bShm=_ -44S=QjAjt_jjj_34kM -4SQ=_Atj_jjjM3kjs; -R:fjjNRlOQERhbeRsRHlhd_.. -_HShm=_..d_SH -Qhj=_..d; - - +4jS=Qjqj1_jQj_hja_34kM +4SQ=_q1j_jjQ_hajM3kj +; diff --git a/Logic/BUS68030.srr b/Logic/BUS68030.srr index 5863313..b1b38eb 100644 --- a/Logic/BUS68030.srr +++ b/Logic/BUS68030.srr @@ -6,7 +6,7 @@ #Implementation: logic $ Start of Compile -#Sun May 25 21:18:44 2014 +#Wed May 28 21:24:48 2014 Synopsys VHDL Compiler, version comp201209rcp1, Build 283R, built Mar 19 2013 @N|Running in 64-bit mode @@ -19,12 +19,14 @@ VHDL syntax check successful! File C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd changed - recompiling @N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral Post processing for work.bus68030.behavioral -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":221:2:221:3|Pruning register CLK_REF(1 downto 0) -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":122:34:122:36|Pruning register CLK_000_D6 -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:2:131:3|Pruning register CLK_CNT_N(1 downto 0) -@W: CL190 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":144:2:144:3|Optimizing register bit CLK_CNT_P(1) to a constant 0 -@W: CL260 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":144:2:144:3|Pruning register bit 1 of CLK_CNT_P(1 downto 0) -@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":221:2:221:3|Trying to extract state machine for register SM_AMIGA +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":233:2:233:3|Pruning register CLK_REF(1 downto 0) +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":124:34:124:36|Pruning register CLK_000_D6 +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":123:34:123:36|Pruning register CLK_000_D5 +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":114:38:114:40|Pruning register CLK_OUT_PRE_33 +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":146:2:146:3|Pruning register CLK_CNT_P(1 downto 0) +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":133:2:133:3|Pruning register CLK_CNT_N(1 downto 0) +@A: CL282 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":99:36:99:38|Feedback mux created for signal CLK_030_H -- possible set/reset assignment for signal missing. Specifying a reset value will improve timing and area. +@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":233:2:233:3|Trying to extract state machine for register SM_AMIGA Extracted state machine for register SM_AMIGA State machine has 8 reachable states with original encodings of: 000 @@ -35,7 +37,7 @@ State machine has 8 reachable states with original encodings of: 101 110 111 -@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":116:34:116:36|Trying to extract state machine for register cpu_est +@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":117:34:117:36|Trying to extract state machine for register cpu_est Extracted state machine for register cpu_est State machine has 11 reachable states with original encodings of: 0000 @@ -51,7 +53,7 @@ State machine has 11 reachable states with original encodings of: 1111 @END Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Sun May 25 21:18:44 2014 +# Wed May 28 21:24:49 2014 ###########################################################] Map & Optimize Report @@ -87,16 +89,17 @@ original code -> new code Resource Usage Report Simple gate primitives: -DFFRH 15 uses -DFFSH 29 uses +DFFRH 16 uses +DFFSH 27 uses +DFF 1 use BI_DIR 10 uses IBUF 30 uses BUFTH 4 uses OBUF 15 uses -AND2 192 uses -INV 157 uses -OR2 25 uses -XOR2 3 uses +AND2 181 uses +INV 151 uses +OR2 20 uses +XOR2 1 use @N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis. @@ -106,6 +109,6 @@ Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 31MB peak: 95MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Sun May 25 21:18:46 2014 +# Wed May 28 21:24:50 2014 ###########################################################] diff --git a/Logic/BUS68030.srs b/Logic/BUS68030.srs index 74df555..c2a1ac0 100644 Binary files a/Logic/BUS68030.srs and b/Logic/BUS68030.srs differ diff --git a/Logic/bus68030.exf b/Logic/bus68030.exf index bdccf3a..cf93bb4 100644 --- a/Logic/bus68030.exf +++ b/Logic/bus68030.exf @@ -39,7 +39,7 @@ Section Member Rename Array-Notation Array Number Port FC_0_ FC[0] 3 1 End Section Cross Reference File -Design 'BUS68030' created Sun May 25 21:18:50 2014 +Design 'BUS68030' created Wed May 28 21:24:55 2014 Type New Name Original Name // ---------------------------------------------------------------------- Inst i_z2O2O AS_030 @@ -52,414 +52,449 @@ Design 'BUS68030' created Sun May 25 21:18:50 2014 Inst i_z4444 DTACK Inst i_z4646 AVEC_EXP Inst i_z4I4I CIIN - Inst DTACK_SYNC_0_m DTACK_SYNC_0.m - Inst DTACK_SYNC_0_n DTACK_SYNC_0.n - Inst state_machine_DS_000_DMA_5_iv_0_i state_machine.DS_000_DMA_5_iv_0_i - Inst DTACK_SYNC_0_p DTACK_SYNC_0.p - Inst A0_DMA_0_r A0_DMA_0.r - Inst A0_DMA_0_m A0_DMA_0.m - Inst A0_DMA_0_n A0_DMA_0.n - Inst A0_DMA_0_p A0_DMA_0.p - Inst BG_000_0_r BG_000_0.r - Inst BG_000_0_m BG_000_0.m - Inst BG_000_0_n BG_000_0.n - Inst cpu_est_ns_0_0_i_1_ cpu_est_ns_0_0_i[1] - Inst BG_000_0_p BG_000_0.p + Inst SM_AMIGA_ns_i_i_i_6_ SM_AMIGA_ns_i_i_i[6] + Inst SM_AMIGA_ns_0_i_5_ SM_AMIGA_ns_0_i[5] + Inst SM_AMIGA_ns_i_o2_i_4_ SM_AMIGA_ns_i_o2_i[4] + Inst SM_AMIGA_ns_0_i_0_ SM_AMIGA_ns_0_i[0] Inst cpu_est_ns_0_0_i_2_ cpu_est_ns_0_0_i[2] + Inst SM_AMIGA_ns_i_i_o2_i_6_ SM_AMIGA_ns_i_i_o2_i[6] Inst clk_un3_clk_000_d1_0_o2_i clk.un3_clk_000_d1_0_o2_i - Inst SM_AMIGA_i_1_ SM_AMIGA_i[1] - Inst state_machine_LDS_000_INT_7_0_o2_i state_machine.LDS_000_INT_7_0_o2_i + Inst SM_AMIGA_ns_i_o2_i_1_ SM_AMIGA_ns_i_o2_i[1] + Inst SM_AMIGA_ns_i_o2_0_i_4_ SM_AMIGA_ns_i_o2_0_i[4] + Inst cpu_est_ns_0_0_i_1_ cpu_est_ns_0_0_i[1] + Inst state_machine_CLK_030_H_2_f0_i_o2_i state_machine.CLK_030_H_2_f0_i_o2_i Inst cpu_est_0_ cpu_est[0] + Inst SM_AMIGA_ns_i_o2_0_i_1_ SM_AMIGA_ns_i_o2_0_i[1] Inst cpu_est_1_ cpu_est[1] Inst cpu_est_2_ cpu_est[2] Inst cpu_est_3_ cpu_est[3] - Inst SM_AMIGA_1_ SM_AMIGA[1] - Inst SM_AMIGA_0_ SM_AMIGA[0] - Inst IPL_030DFFSH_0_ IPL_030DFFSH[0] Inst cpu_est_ns_i_0_o2_i_3_ cpu_est_ns_i_0_o2_i[3] + Inst SM_AMIGA_0_ SM_AMIGA[0] + Inst SM_AMIGA_i_1_ SM_AMIGA_i[1] + Inst SIZE_DMA_1_ SIZE_DMA[1] + Inst SM_AMIGA_ns_i_o2_i_7_ SM_AMIGA_ns_i_o2_i[7] + Inst IPL_030DFFSH_0_ IPL_030DFFSH[0] Inst IPL_030DFFSH_1_ IPL_030DFFSH[1] Inst IPL_030DFFSH_2_ IPL_030DFFSH[2] Inst SM_AMIGA_7_ SM_AMIGA[7] - Inst cpu_est_i_0_ cpu_est_i[0] Inst SM_AMIGA_6_ SM_AMIGA[6] - Inst cpu_est_ns_0_0_m3_2__r cpu_est_ns_0_0_m3_2_.r + Inst state_machine_UDS_000_INT_7_0_m3_r state_machine.UDS_000_INT_7_0_m3.r Inst SM_AMIGA_5_ SM_AMIGA[5] - Inst cpu_est_ns_0_0_m3_2__m cpu_est_ns_0_0_m3_2_.m + Inst state_machine_UDS_000_INT_7_0_m3_m state_machine.UDS_000_INT_7_0_m3.m Inst SM_AMIGA_4_ SM_AMIGA[4] - Inst cpu_est_ns_0_0_m3_2__n cpu_est_ns_0_0_m3_2_.n + Inst state_machine_UDS_000_INT_7_0_m3_n state_machine.UDS_000_INT_7_0_m3.n Inst SM_AMIGA_3_ SM_AMIGA[3] - Inst cpu_est_ns_0_0_m3_2__p cpu_est_ns_0_0_m3_2_.p + Inst state_machine_UDS_000_INT_7_0_m3_p state_machine.UDS_000_INT_7_0_m3.p Inst SM_AMIGA_2_ SM_AMIGA[2] - Inst state_machine_un10_bg_030_0_a3_1 state_machine.un10_bg_030_0_a3_1 - Inst SIZE_DMA_0_ SIZE_DMA[0] + Inst SM_AMIGA_i_6_ SM_AMIGA_i[6] + Inst SM_AMIGA_1_ SM_AMIGA[1] Inst clk_un3_clk_000_d1_0_o2 clk.un3_clk_000_d1_0_o2 - Inst SIZE_DMA_1_ SIZE_DMA[1] - Inst state_machine_LDS_000_INT_7_0_o3 state_machine.LDS_000_INT_7_0_o3 + Inst SM_AMIGA_ns_i_i_o2_6_ SM_AMIGA_ns_i_i_o2[6] + Inst SM_AMIGA_ns_i_o2_7_ SM_AMIGA_ns_i_o2[7] + Inst SIZE_DMA_0_ SIZE_DMA[0] Inst cpu_est_i_3_ cpu_est_i[3] Inst cpu_est_ns_i_0_o2_3_ cpu_est_ns_i_0_o2[3] - Inst SM_AMIGA_i_5_ SM_AMIGA_i[5] - Inst SM_AMIGA_i_4_ SM_AMIGA_i[4] - Inst cpu_est_ns_0_0_x2_1_ cpu_est_ns_0_0_x2[1] - Inst CLK_CNT_P_0_ CLK_CNT_P[0] + Inst SM_AMIGA_ns_i_o2_0_1_ SM_AMIGA_ns_i_o2_0[1] + Inst state_machine_CLK_030_H_2_f0_i_o2 state_machine.CLK_030_H_2_f0_i_o2 + Inst SM_AMIGA_ns_i_0_2_ SM_AMIGA_ns_i_0[2] + Inst SM_AMIGA_ns_i_0_3_ SM_AMIGA_ns_i_0[3] + Inst SM_AMIGA_ns_i_4_ SM_AMIGA_ns_i[4] + Inst SM_AMIGA_ns_0_5_ SM_AMIGA_ns_0[5] + Inst SM_AMIGA_ns_i_i_6_ SM_AMIGA_ns_i_i[6] Inst cpu_est_ns_i_0_3_ cpu_est_ns_i_0[3] - Inst state_machine_DS_000_DMA_5_iv_0 state_machine.DS_000_DMA_5_iv_0 - Inst state_machine_AMIGA_BUS_ENABLE_6_iv_0 state_machine.AMIGA_BUS_ENABLE_6_iv_0 - Inst cpu_est_ns_0_0_2_ cpu_est_ns_0_0[2] - Inst state_machine_LDS_000_INT_7_0_o2 state_machine.LDS_000_INT_7_0_o2 - Inst state_machine_LDS_000_INT_7_0_m3_r state_machine.LDS_000_INT_7_0_m3.r - Inst state_machine_LDS_000_INT_7_0_m3_m state_machine.LDS_000_INT_7_0_m3.m + Inst state_machine_CLK_030_H_2_f0_i state_machine.CLK_030_H_2_f0_i + Inst state_machine_AMIGA_BUS_ENABLE_4_iv_0 state_machine.AMIGA_BUS_ENABLE_4_iv_0 + Inst SM_AMIGA_ns_i_o2_4_ SM_AMIGA_ns_i_o2[4] + Inst SM_AMIGA_i_4_ SM_AMIGA_i[4] + Inst SM_AMIGA_ns_i_o2_0_4_ SM_AMIGA_ns_i_o2_0[4] + Inst SM_AMIGA_i_5_ SM_AMIGA_i[5] + Inst state_machine_SIZE_DMA_4_0_a2_1_ state_machine.SIZE_DMA_4_0_a2[1] + Inst state_machine_A0_DMA_2_0_a2 state_machine.A0_DMA_2_0_a2 + Inst state_machine_un6_bgack_000_0 state_machine.un6_bgack_000_0 + Inst state_machine_un15_clk_000_d0_0 state_machine.un15_clk_000_d0_0 Inst SIZE_0_ SIZE[0] - Inst state_machine_LDS_000_INT_7_0_m3_n state_machine.LDS_000_INT_7_0_m3.n Inst SIZE_1_ SIZE[1] - Inst state_machine_LDS_000_INT_7_0_m3_p state_machine.LDS_000_INT_7_0_m3.p + Inst state_machine_un10_bg_030_0 state_machine.un10_bg_030_0 Inst A_16_ A[16] Inst A_17_ A[17] Inst A_18_ A[18] + Inst state_machine_DS_000_DMA_3_0 state_machine.DS_000_DMA_3_0 Inst A_19_ A[19] + Inst state_machine_SIZE_DMA_4_0_1_ state_machine.SIZE_DMA_4_0[1] Inst A_20_ A[20] - Inst state_machine_un6_bgack_000_0 state_machine.un6_bgack_000_0 + Inst SM_AMIGA_ns_i_1_ SM_AMIGA_ns_i[1] Inst A_21_ A[21] Inst A_22_ A[22] Inst A_23_ A[23] Inst A_24_ A[24] - Inst state_machine_un10_bg_030_0 state_machine.un10_bg_030_0 Inst A_25_ A[25] Inst A_26_ A[26] Inst A_27_ A[27] + Inst SM_AMIGA_ns_i_a2_0_4_ SM_AMIGA_ns_i_a2_0[4] Inst A_28_ A[28] + Inst SM_AMIGA_ns_i_a2_7_ SM_AMIGA_ns_i_a2[7] Inst A_29_ A[29] + Inst cpu_est_i_0_ cpu_est_i[0] Inst A_30_ A[30] - Inst A_31_ A[31] Inst cpu_est_ns_0_0_a2_1_ cpu_est_ns_0_0_a2[1] - Inst IPL_030_0_ IPL_030[0] + Inst A_31_ A[31] + Inst cpu_est_ns_i_0_a2_3_ cpu_est_ns_i_0_a2[3] Inst cpu_est_i_1_ cpu_est_i[1] - Inst IPL_030_1_ IPL_030[1] Inst cpu_est_ns_0_0_a2_0_1_ cpu_est_ns_0_0_a2_0[1] + Inst SM_AMIGA_ns_0_a2_0_ SM_AMIGA_ns_0_a2[0] + Inst cpu_est_i_2_ cpu_est_i[2] + Inst cpu_est_ns_0_0_a3_0_1_ cpu_est_ns_0_0_a3_0[1] + Inst cpu_est_ns_i_0_a3_3_ cpu_est_ns_i_0_a3[3] + Inst state_machine_CLK_030_H_2_f0_i_a3 state_machine.CLK_030_H_2_f0_i_a3 + Inst IPL_030_0_ IPL_030[0] + Inst cpu_est_ns_0_0_a3_2_ cpu_est_ns_0_0_a3[2] + Inst IPL_030_1_ IPL_030[1] + Inst cpu_est_ns_0_0_a3_0_2_ cpu_est_ns_0_0_a3_0[2] Inst IPL_030_2_ IPL_030[2] + Inst cpu_est_ns_0_0_a3_1_2_ cpu_est_ns_0_0_a3_1[2] Inst IPL_0_ IPL[0] + Inst SM_AMIGA_ns_0_a3_0_ SM_AMIGA_ns_0_a3[0] Inst IPL_1_ IPL[1] + Inst SM_AMIGA_ns_0_a3_0_0_ SM_AMIGA_ns_0_a3_0[0] Inst IPL_2_ IPL[2] Inst DSACK_0_ DSACK[0] - Inst cpu_est_ns_i_0_a3_3_ cpu_est_ns_i_0_a3[3] Inst DSACK_1_ DSACK[1] - Inst cpu_est_ns_i_0_a3_0_3_ cpu_est_ns_i_0_a3_0[3] - Inst state_machine_DS_000_DMA_5_iv_0_a3 state_machine.DS_000_DMA_5_iv_0_a3 - Inst state_machine_AMIGA_BUS_ENABLE_6_iv_0_a3 state_machine.AMIGA_BUS_ENABLE_6_iv_0_a3 - Inst cpu_est_ns_0_0_a3_2_ cpu_est_ns_0_0_a3[2] - Inst FC_0_ FC[0] - Inst FC_1_ FC[1] - Inst A_i_31_ A_i[31] - Inst SM_AMIGA_i_0_ SM_AMIGA_i[0] - Inst state_machine_LDS_000_INT_7_0_a3_1 state_machine.LDS_000_INT_7_0_a3_1 + Inst state_machine_SIZE_DMA_4_i_a3_0_ state_machine.SIZE_DMA_4_i_a3[0] + Inst SM_AMIGA_i_7_ SM_AMIGA_i[7] + Inst SM_AMIGA_ns_i_a3_1_ SM_AMIGA_ns_i_a3[1] + Inst SM_AMIGA_ns_i_a3_0_1_ SM_AMIGA_ns_i_a3_0[1] + Inst SM_AMIGA_ns_i_0_a3_2_ SM_AMIGA_ns_i_0_a3[2] + Inst SM_AMIGA_ns_i_0_a3_3_ SM_AMIGA_ns_i_0_a3[3] Inst SM_AMIGA_i_3_ SM_AMIGA_i[3] - Inst state_machine_LDS_000_INT_7_0_a3 state_machine.LDS_000_INT_7_0_a3 - Inst A_i_16_ A_i[16] - Inst A_i_18_ A_i[18] - Inst A_i_19_ A_i[19] - Inst A_i_24_ A_i[24] + Inst SM_AMIGA_ns_i_a3_4_ SM_AMIGA_ns_i_a3[4] + Inst SM_AMIGA_ns_0_a3_0_5_ SM_AMIGA_ns_0_a3_0[5] + Inst SM_AMIGA_ns_i_i_a3_6_ SM_AMIGA_ns_i_i_a3[6] + Inst FC_0_ FC[0] + Inst SM_AMIGA_ns_i_i_a3_0_6_ SM_AMIGA_ns_i_i_a3_0[6] + Inst FC_1_ FC[1] + Inst SM_AMIGA_i_0_ SM_AMIGA_i[0] + Inst SM_AMIGA_ns_i_a3_7_ SM_AMIGA_ns_i_a3[7] + Inst cpu_est_ns_0_0_a3_1_ cpu_est_ns_0_0_a3[1] Inst A_i_25_ A_i[25] Inst A_i_26_ A_i[26] + Inst state_machine_A0_DMA_2_0_a3_1 state_machine.A0_DMA_2_0_a3_1 Inst A_i_27_ A_i[27] + Inst state_machine_A0_DMA_2_0_a3 state_machine.A0_DMA_2_0_a3 Inst A_i_28_ A_i[28] Inst A_i_29_ A_i[29] Inst A_i_30_ A_i[30] - Inst cpu_est_ns_0_0_1_1_ cpu_est_ns_0_0_1[1] - Inst CLK_CNT_P_i_0_ CLK_CNT_P_i[0] - Inst cpu_est_ns_0_0_1_ cpu_est_ns_0_0[1] - Inst cpu_estse_0_r cpu_estse_0.r - Inst cpu_estse_0_m cpu_estse_0.m - Inst cpu_estse_0_n cpu_estse_0.n - Inst state_machine_UDS_000_INT_7_0_1 state_machine.UDS_000_INT_7_0_1 - Inst cpu_estse_0_p cpu_estse_0.p + Inst A_i_31_ A_i[31] + Inst A_i_16_ A_i[16] + Inst state_machine_un15_clk_000_d0_0_a3_0_1 state_machine.un15_clk_000_d0_0_a3_0_1 + Inst A_i_18_ A_i[18] + Inst state_machine_un15_clk_000_d0_0_a3_0 state_machine.un15_clk_000_d0_0_a3_0 + Inst A_i_19_ A_i[19] + Inst state_machine_un15_clk_000_d0_0_a3_1 state_machine.un15_clk_000_d0_0_a3_1 + Inst state_machine_un15_clk_000_d0_0_a3 state_machine.un15_clk_000_d0_0_a3 Inst state_machine_UDS_000_INT_7_0 state_machine.UDS_000_INT_7_0 - Inst cpu_estse_1_r cpu_estse_1.r - Inst state_machine_LDS_000_INT_7_0_1 state_machine.LDS_000_INT_7_0_1 - Inst cpu_estse_1_m cpu_estse_1.m - Inst state_machine_LDS_000_INT_7_0 state_machine.LDS_000_INT_7_0 - Inst cpu_estse_1_n cpu_estse_1.n - Inst cpu_estse_1_p cpu_estse_1.p - Inst cpu_estse_2_r cpu_estse_2.r - Inst cpu_estse_2_m cpu_estse_2.m - Inst cpu_estse_2_n cpu_estse_2.n - Inst cpu_estse_2_p cpu_estse_2.p - Inst state_machine_A0_DMA_4_0_a3_2 state_machine.A0_DMA_4_0_a3_2 + Inst SM_AMIGA_ns_i_a2_1_4_ SM_AMIGA_ns_i_a2_1[4] + Inst SM_AMIGA_ns_i_a2_4_ SM_AMIGA_ns_i_a2[4] + Inst A_i_24_ A_i[24] + Inst state_machine_AMIGA_BUS_ENABLE_4_iv_0_a3_1 state_machine.AMIGA_BUS_ENABLE_4_iv_0_a3_1 + Inst state_machine_AMIGA_BUS_ENABLE_4_iv_0_a3 state_machine.AMIGA_BUS_ENABLE_4_iv_0_a3 Inst DSACK1_INT_0_r DSACK1_INT_0.r - Inst state_machine_A0_DMA_4_0_a3 state_machine.A0_DMA_4_0_a3 Inst DSACK1_INT_0_m DSACK1_INT_0.m Inst DSACK1_INT_0_n DSACK1_INT_0.n + Inst SM_AMIGA_ns_i_a3_0_1_4_ SM_AMIGA_ns_i_a3_0_1[4] Inst DSACK1_INT_0_p DSACK1_INT_0.p - Inst AS_000_DMA_0_r AS_000_DMA_0.r - Inst AS_000_DMA_0_m AS_000_DMA_0.m - Inst AS_000_DMA_0_n AS_000_DMA_0.n - Inst state_machine_un10_bg_030_0_a3_1_0 state_machine.un10_bg_030_0_a3_1_0 - Inst AS_000_DMA_0_p AS_000_DMA_0.p - Inst state_machine_un10_bg_030_0_a3 state_machine.un10_bg_030_0_a3 - Inst AS_000_INT_0_r AS_000_INT_0.r - Inst AS_000_INT_0_m AS_000_INT_0.m - Inst AS_000_INT_0_n AS_000_INT_0.n - Inst AS_000_INT_0_p AS_000_INT_0.p - Inst VPA_SYNC_0_r VPA_SYNC_0.r - Inst VPA_SYNC_0_m VPA_SYNC_0.m - Inst VPA_SYNC_0_n VPA_SYNC_0.n - Inst VPA_SYNC_0_p VPA_SYNC_0.p + Inst SM_AMIGA_ns_i_a3_0_4_ SM_AMIGA_ns_i_a3_0[4] Inst VMA_INT_0_r VMA_INT_0.r + Inst state_machine_LDS_000_INT_7_0_a3_1 state_machine.LDS_000_INT_7_0_a3_1 Inst VMA_INT_0_m VMA_INT_0.m + Inst state_machine_LDS_000_INT_7_0_a3 state_machine.LDS_000_INT_7_0_a3 Inst VMA_INT_0_n VMA_INT_0.n Inst VMA_INT_0_p VMA_INT_0.p + Inst state_machine_un10_bg_030_0_a3_1 state_machine.un10_bg_030_0_a3_1 Inst BGACK_030_INT_0_r BGACK_030_INT_0.r + Inst state_machine_un10_bg_030_0_a3_2 state_machine.un10_bg_030_0_a3_2 Inst BGACK_030_INT_0_m BGACK_030_INT_0.m + Inst state_machine_un10_bg_030_0_a3 state_machine.un10_bg_030_0_a3 Inst BGACK_030_INT_0_n BGACK_030_INT_0.n + Inst SM_AMIGA_ns_0_1_0_ SM_AMIGA_ns_0_1[0] Inst BGACK_030_INT_0_p BGACK_030_INT_0.p - Inst SIZE_DMA_0_0__r SIZE_DMA_0_0_.r - Inst SIZE_DMA_0_0__m SIZE_DMA_0_0_.m - Inst state_machine_A0_DMA_4_0_a3_1 state_machine.A0_DMA_4_0_a3_1 - Inst SIZE_DMA_0_0__n SIZE_DMA_0_0_.n - Inst SIZE_DMA_0_0__p SIZE_DMA_0_0_.p - Inst SIZE_DMA_0_1__r SIZE_DMA_0_1_.r - Inst SIZE_DMA_0_1__m SIZE_DMA_0_1_.m - Inst SIZE_DMA_0_1__n SIZE_DMA_0_1_.n - Inst state_machine_un6_bgack_000_0_i state_machine.un6_bgack_000_0_i - Inst SIZE_DMA_0_1__p SIZE_DMA_0_1_.p + Inst SM_AMIGA_ns_0_0_ SM_AMIGA_ns_0[0] Inst IPL_030_0_0__r IPL_030_0_0_.r + Inst cpu_est_ns_0_0_1_2_ cpu_est_ns_0_0_1[2] Inst IPL_030_0_0__m IPL_030_0_0_.m - Inst state_machine_un59_bgack_030_int_i state_machine.un59_bgack_030_int_i + Inst cpu_est_ns_0_0_2_ cpu_est_ns_0_0[2] Inst IPL_030_0_0__n IPL_030_0_0_.n Inst IPL_030_0_0__p IPL_030_0_0_.p Inst IPL_030_0_1__r IPL_030_0_1_.r + Inst SM_AMIGA_ns_i_1_7_ SM_AMIGA_ns_i_1[7] Inst IPL_030_0_1__m IPL_030_0_1_.m + Inst SM_AMIGA_ns_i_7_ SM_AMIGA_ns_i[7] Inst IPL_030_0_1__n IPL_030_0_1_.n + Inst state_machine_LDS_000_INT_7_0_1 state_machine.LDS_000_INT_7_0_1 Inst IPL_030_0_1__p IPL_030_0_1_.p + Inst state_machine_LDS_000_INT_7_0 state_machine.LDS_000_INT_7_0 Inst IPL_030_0_2__r IPL_030_0_2_.r + Inst state_machine_UDS_000_INT_7_0_1 state_machine.UDS_000_INT_7_0_1 Inst IPL_030_0_2__m IPL_030_0_2_.m Inst IPL_030_0_2__n IPL_030_0_2_.n + Inst SM_AMIGA_ns_i_o2_1_1_ SM_AMIGA_ns_i_o2_1[1] Inst IPL_030_0_2__p IPL_030_0_2_.p - Inst state_machine_un59_bgack_030_int state_machine.un59_bgack_030_int + Inst SM_AMIGA_ns_i_o2_1_ SM_AMIGA_ns_i_o2[1] + Inst cpu_estse_0_r cpu_estse_0.r + Inst cpu_estse_0_m cpu_estse_0.m + Inst cpu_estse_0_n cpu_estse_0.n + Inst cpu_estse_0_p cpu_estse_0.p + Inst cpu_est_ns_0_0_1_1_ cpu_est_ns_0_0_1[1] + Inst cpu_estse_1_r cpu_estse_1.r + Inst cpu_est_ns_0_0_2_1_ cpu_est_ns_0_0_2[1] + Inst cpu_estse_1_m cpu_estse_1.m + Inst cpu_est_ns_0_0_1_ cpu_est_ns_0_0[1] + Inst cpu_estse_1_n cpu_estse_1.n + Inst SM_AMIGA_ns_0_a3_1_5_ SM_AMIGA_ns_0_a3_1[5] + Inst cpu_estse_1_p cpu_estse_1.p + Inst SM_AMIGA_ns_0_a3_2_5_ SM_AMIGA_ns_0_a3_2[5] + Inst cpu_estse_2_r cpu_estse_2.r + Inst SM_AMIGA_ns_0_a3_5_ SM_AMIGA_ns_0_a3[5] + Inst cpu_estse_2_m cpu_estse_2.m + Inst cpu_estse_2_n cpu_estse_2.n + Inst cpu_estse_2_p cpu_estse_2.p + Inst clk_un3_clk_out_pre_50 clk.un3_clk_out_pre_50 Inst AMIGA_BUS_ENABLE_0_r AMIGA_BUS_ENABLE_0.r Inst AMIGA_BUS_ENABLE_0_m AMIGA_BUS_ENABLE_0.m Inst AMIGA_BUS_ENABLE_0_n AMIGA_BUS_ENABLE_0.n Inst AMIGA_BUS_ENABLE_0_p AMIGA_BUS_ENABLE_0.p + Inst AS_030_000_SYNC_0_r AS_030_000_SYNC_0.r + Inst AS_030_000_SYNC_0_m AS_030_000_SYNC_0.m + Inst AS_030_000_SYNC_0_n AS_030_000_SYNC_0.n + Inst AS_030_000_SYNC_0_p AS_030_000_SYNC_0.p + Inst CLK_030_H_0_r CLK_030_H_0.r + Inst CLK_030_H_0_m CLK_030_H_0.m + Inst CLK_030_H_0_n CLK_030_H_0.n + Inst CLK_030_H_0_p CLK_030_H_0.p Inst UDS_000_INT_0_r UDS_000_INT_0.r Inst UDS_000_INT_0_m UDS_000_INT_0.m Inst UDS_000_INT_0_n UDS_000_INT_0.n Inst UDS_000_INT_0_p UDS_000_INT_0.p Inst LDS_000_INT_0_r LDS_000_INT_0.r - Inst state_machine_un10_bg_030_0_i state_machine.un10_bg_030_0_i Inst LDS_000_INT_0_m LDS_000_INT_0.m Inst LDS_000_INT_0_n LDS_000_INT_0.n + Inst state_machine_un10_bg_030_0_i state_machine.un10_bg_030_0_i Inst LDS_000_INT_0_p LDS_000_INT_0.p - Inst AS_030_000_SYNC_0_r AS_030_000_SYNC_0.r - Inst AS_030_000_SYNC_0_m AS_030_000_SYNC_0.m - Inst AS_030_000_SYNC_0_n AS_030_000_SYNC_0.n - Inst AS_030_000_SYNC_0_p AS_030_000_SYNC_0.p + Inst FPU_CS_INT_0_r FPU_CS_INT_0.r + Inst FPU_CS_INT_0_m FPU_CS_INT_0.m + Inst FPU_CS_INT_0_n FPU_CS_INT_0.n + Inst state_machine_un13_clk_000_d0_i state_machine.un13_clk_000_d0_i + Inst FPU_CS_INT_0_p FPU_CS_INT_0.p + Inst state_machine_un15_clk_000_d0_0_i state_machine.un15_clk_000_d0_0_i + Inst BG_000_0_r BG_000_0.r + Inst state_machine_un6_bgack_000_0_i state_machine.un6_bgack_000_0_i + Inst BG_000_0_m BG_000_0.m + Inst BG_000_0_n BG_000_0.n + Inst BG_000_0_p BG_000_0.p Inst DS_000_DMA_0_r DS_000_DMA_0.r Inst DS_000_DMA_0_m DS_000_DMA_0.m Inst DS_000_DMA_0_n DS_000_DMA_0.n Inst DS_000_DMA_0_p DS_000_DMA_0.p - Inst state_machine_UDS_000_INT_7_0_i state_machine.UDS_000_INT_7_0_i - Inst FPU_CS_INT_0_r FPU_CS_INT_0.r - Inst FPU_CS_INT_0_m FPU_CS_INT_0.m + Inst AS_000_DMA_0_r AS_000_DMA_0.r + Inst AS_000_DMA_0_m AS_000_DMA_0.m + Inst state_machine_SIZE_DMA_4_0_i_1_ state_machine.SIZE_DMA_4_0_i[1] + Inst AS_000_DMA_0_n AS_000_DMA_0.n + Inst state_machine_DS_000_DMA_3_0_i state_machine.DS_000_DMA_3_0_i + Inst AS_000_DMA_0_p AS_000_DMA_0.p + Inst AS_000_INT_0_r AS_000_INT_0.r + Inst AS_000_INT_0_m AS_000_INT_0.m Inst state_machine_LDS_000_INT_7_0_i state_machine.LDS_000_INT_7_0_i - Inst FPU_CS_INT_0_n FPU_CS_INT_0.n - Inst FPU_CS_INT_0_p FPU_CS_INT_0.p - Inst DTACK_SYNC_0_r DTACK_SYNC_0.r - Net as_030_000_sync_0_un1_n AS_030_000_SYNC_0.un1 - Net as_030_000_sync_0_un0_n AS_030_000_SYNC_0.un0 - Net ds_000_dma_0_un3_n DS_000_DMA_0.un3 - Net ds_000_dma_0_un1_n DS_000_DMA_0.un1 - Net ds_000_dma_0_un0_n DS_000_DMA_0.un0 - Net fpu_cs_int_0_un3_n FPU_CS_INT_0.un3 - Net fpu_cs_int_0_un1_n FPU_CS_INT_0.un1 - Net fpu_cs_int_0_un0_n FPU_CS_INT_0.un0 - Net dtack_sync_0_un3_n DTACK_SYNC_0.un3 - Net dtack_sync_0_un1_n DTACK_SYNC_0.un1 - Net dtack_sync_0_un0_n DTACK_SYNC_0.un0 - Net a0_dma_0_un3_n A0_DMA_0.un3 - Net a0_dma_0_un1_n A0_DMA_0.un1 - Net a0_dma_0_un0_n A0_DMA_0.un0 - Net bg_000_0_un3_n BG_000_0.un3 - Net bg_000_0_un1_n BG_000_0.un1 - Net bg_000_0_un0_n BG_000_0.un0 + Inst AS_000_INT_0_n AS_000_INT_0.n + Inst state_machine_UDS_000_INT_7_0_i state_machine.UDS_000_INT_7_0_i + Inst AS_000_INT_0_p AS_000_INT_0.p Net ipl_030_c_0__n IPL_030_c[0] Net ipl_030_0__n IPL_030[0] Net ipl_030_c_1__n IPL_030_c[1] - Net vcc_n_n VCC Net ipl_030_1__n IPL_030[1] - Net gnd_n_n GND Net ipl_030_c_2__n IPL_030_c[2] - Net clk_cnt_p_0__n CLK_CNT_P[0] - Net sm_amiga_5__n SM_AMIGA[5] Net ipl_c_0__n IPL_c[0] Net ipl_0__n IPL[0] - Net sm_amiga_7__n SM_AMIGA[7] Net ipl_c_1__n IPL_c[1] - Net sm_amiga_1__n SM_AMIGA[1] Net ipl_1__n IPL[1] - Net sm_amiga_0__n SM_AMIGA[0] Net ipl_c_2__n IPL_c[2] - Net sm_amiga_6__n SM_AMIGA[6] + Net vcc_n_n VCC Net dsack_0__n DSACK[0] + Net gnd_n_n GND Net dsack_c_1__n DSACK_c[1] - Net state_machine_un59_bgack_030_int_n state_machine.un59_bgack_030_int - Net sm_amiga_3__n SM_AMIGA[3] + Net state_machine_un13_clk_000_d0_n state_machine.un13_clk_000_d0 + Net sm_amiga_1__n SM_AMIGA[1] + Net sm_amiga_0__n SM_AMIGA[0] + Net sm_amiga_6__n SM_AMIGA[6] + Net sm_amiga_5__n SM_AMIGA[5] + Net clk_un3_clk_out_pre_50_n clk.un3_clk_out_pre_50 Net state_machine_un6_bgack_000_n state_machine.un6_bgack_000 + Net state_machine_un15_clk_000_d0_n state_machine.un15_clk_000_d0 Net size_dma_0__n SIZE_DMA[0] - Net size_dma_1__n SIZE_DMA[1] - Net sm_amiga_4__n SM_AMIGA[4] - Net sm_amiga_2__n SM_AMIGA[2] - Net state_machine_un10_bg_030_n state_machine.un10_bg_030 Net fc_c_0__n FC_c[0] - Net state_machine_a0_dma_4_n state_machine.A0_DMA_4 + Net size_dma_1__n SIZE_DMA[1] Net fc_0__n FC[0] - Net state_machine_ds_000_dma_5_n state_machine.DS_000_DMA_5 Net fc_c_1__n FC_c[1] + Net sm_amiga_7__n SM_AMIGA[7] + Net sm_amiga_4__n SM_AMIGA[4] + Net state_machine_a0_dma_2_n state_machine.A0_DMA_2 + Net state_machine_ds_000_dma_3_n state_machine.DS_000_DMA_3 + Net state_machine_size_dma_4_1__n state_machine.SIZE_DMA_4[1] + Net sm_amiga_3__n SM_AMIGA[3] + Net sm_amiga_2__n SM_AMIGA[2] + Net cpu_est_ns_0_1__n cpu_est_ns_0[1] + Net state_machine_un10_bg_030_n state_machine.un10_bg_030 Net state_machine_lds_000_int_7_n state_machine.LDS_000_INT_7 Net state_machine_uds_000_int_7_n state_machine.UDS_000_INT_7 - Net sm_amiga_ns_e_0__n SM_AMIGA_ns_e[0] - Net sm_amiga_ns_e_1__n SM_AMIGA_ns_e[1] - Net sm_amiga_ns_e_5__n SM_AMIGA_ns_e[5] Net sm_amiga_i_1__n SM_AMIGA_i[1] + Net sm_amiga_ns_0__n SM_AMIGA_ns[0] + Net sm_amiga_ns_5__n SM_AMIGA_ns[5] + Net state_machine_un8_bgack_030_int_i_0_0_n state_machine.un8_bgack_030_int_i_0_0 Net cpu_est_0__n cpu_est[0] Net cpu_est_1__n cpu_est[1] Net cpu_est_2__n cpu_est[2] Net cpu_est_3__n cpu_est[3] - Net cpu_est_ns_e_0__n cpu_est_ns_e[0] Net cpu_est_ns_e_1__n cpu_est_ns_e[1] Net cpu_est_ns_e_2__n cpu_est_ns_e[2] Net cpu_est_ns_e_3__n cpu_est_ns_e[3] Net cpu_est_ns_1__n cpu_est_ns[1] Net cpu_est_ns_2__n cpu_est_ns[2] - Net cpu_est_ns_e_0_0__n cpu_est_ns_e_0[0] - Net sm_amiga_ns_e_0_0__n SM_AMIGA_ns_e_0[0] - Net sm_amiga_ns_e_0_1__n SM_AMIGA_ns_e_0[1] + Net state_machine_un8_bgack_030_int_i_0_n state_machine.un8_bgack_030_int_i_0 + Net sm_amiga_ns_0_0__n SM_AMIGA_ns_0[0] Net cpu_est_ns_0_2__n cpu_est_ns_0[2] - Net state_machine_amiga_bus_enable_6_iv_i_n state_machine.AMIGA_BUS_ENABLE_6_iv_i - Net state_machine_ds_000_dma_5_0_n state_machine.DS_000_DMA_5_0 - Net cpu_est_ns_0_1__n cpu_est_ns_0[1] - Net sm_amiga_ns_e_0_5__n SM_AMIGA_ns_e_0[5] - Net state_machine_uds_000_int_7_0_n state_machine.UDS_000_INT_7_0 + Net state_machine_amiga_bus_enable_4_iv_i_n state_machine.AMIGA_BUS_ENABLE_4_iv_i + Net sm_amiga_ns_0_5__n SM_AMIGA_ns_0[5] + Net state_machine_size_dma_4_0_1__n state_machine.SIZE_DMA_4_0[1] + Net state_machine_ds_000_dma_3_0_n state_machine.DS_000_DMA_3_0 Net state_machine_lds_000_int_7_0_n state_machine.LDS_000_INT_7_0 + Net state_machine_uds_000_int_7_0_n state_machine.UDS_000_INT_7_0 Net state_machine_un10_bg_030_0_n state_machine.un10_bg_030_0 + Net state_machine_un13_clk_000_d0_i_n state_machine.un13_clk_000_d0_i + Net state_machine_un15_clk_000_d0_0_n state_machine.un15_clk_000_d0_0 Net state_machine_un6_bgack_000_0_n state_machine.un6_bgack_000_0 - Net state_machine_un59_bgack_030_int_0_n state_machine.un59_bgack_030_int_0 - Net cpu_est_i_0__n cpu_est_i[0] - Net sm_amiga_i_4__n SM_AMIGA_i[4] - Net state_machine_a0_dma_4_1_n state_machine.A0_DMA_4_1 - Net sm_amiga_i_5__n SM_AMIGA_i[5] - Net state_machine_a0_dma_4_2_n state_machine.A0_DMA_4_2 Net cpu_est_i_3__n cpu_est_i[3] - Net cpu_est_i_1__n cpu_est_i[1] - Net sm_amiga_ns_e_0_1_0__n SM_AMIGA_ns_e_0_1[0] - Net sm_amiga_ns_e_0_1_1__n SM_AMIGA_ns_e_0_1[1] - Net sm_amiga_i_3__n SM_AMIGA_i[3] + Net sm_amiga_i_6__n SM_AMIGA_i[6] + Net state_machine_un8_bgack_030_int_i_0_0_1_n state_machine.un8_bgack_030_int_i_0_0_1 + Net sm_amiga_i_5__n SM_AMIGA_i[5] + Net sm_amiga_i_4__n SM_AMIGA_i[4] Net cpu_est_ns_0_1_1__n cpu_est_ns_0_1[1] + Net cpu_est_ns_0_2_1__n cpu_est_ns_0_2[1] + Net cpu_est_i_1__n cpu_est_i[1] + Net cpu_est_i_0__n cpu_est_i[0] + Net sm_amiga_ns_0_1_0__n SM_AMIGA_ns_0_1[0] + Net cpu_est_ns_0_1_2__n cpu_est_ns_0_1[2] + Net cpu_est_i_2__n cpu_est_i[2] Net sm_amiga_i_0__n SM_AMIGA_i[0] - Net state_machine_uds_000_int_7_0_1_n state_machine.UDS_000_INT_7_0_1 - Net size_i_1__n SIZE_i[1] Net state_machine_lds_000_int_7_0_1_n state_machine.LDS_000_INT_7_0_1 - Net a_i_30__n A_i[30] - Net a_i_31__n A_i[31] - Net a_i_28__n A_i[28] - Net a_i_29__n A_i[29] - Net a_i_26__n A_i[26] - Net a_i_27__n A_i[27] - Net a_i_24__n A_i[24] - Net a_i_25__n A_i[25] + Net sm_amiga_i_3__n SM_AMIGA_i[3] + Net state_machine_uds_000_int_7_0_1_n state_machine.UDS_000_INT_7_0_1 + Net sm_amiga_i_7__n SM_AMIGA_i[7] + Net size_i_1__n SIZE_i[1] Net a_i_19__n A_i[19] Net a_i_16__n A_i[16] Net a_i_18__n A_i[18] - Net clk_cnt_p_i_0__n CLK_CNT_P_i[0] - Net cpu_est_ns_0_0_m3_2__un3_n cpu_est_ns_0_0_m3_2_.un3 - Net cpu_est_ns_0_0_m3_2__un1_n cpu_est_ns_0_0_m3_2_.un1 - Net cpu_est_ns_0_0_m3_2__un0_n cpu_est_ns_0_0_m3_2_.un0 - Net state_machine_lds_000_int_7_0_m3_un3_n state_machine.LDS_000_INT_7_0_m3.un3 - Net state_machine_lds_000_int_7_0_m3_un1_n state_machine.LDS_000_INT_7_0_m3.un1 - Net state_machine_lds_000_int_7_0_m3_un0_n state_machine.LDS_000_INT_7_0_m3.un0 - Net cpu_estse_0_un3_n cpu_estse_0.un3 - Net cpu_estse_0_un1_n cpu_estse_0.un1 - Net cpu_estse_0_un0_n cpu_estse_0.un0 - Net cpu_estse_1_un3_n cpu_estse_1.un3 - Net cpu_estse_1_un1_n cpu_estse_1.un1 - Net cpu_estse_1_un0_n cpu_estse_1.un0 - Net cpu_estse_2_un3_n cpu_estse_2.un3 - Net cpu_estse_2_un1_n cpu_estse_2.un1 - Net cpu_estse_2_un0_n cpu_estse_2.un0 + Net a_i_30__n A_i[30] + Net state_machine_a0_dma_2_1_n state_machine.A0_DMA_2_1 + Net a_i_31__n A_i[31] + Net a_i_28__n A_i[28] + Net a_i_29__n A_i[29] + Net state_machine_un13_clk_000_d0_1_n state_machine.un13_clk_000_d0_1 + Net a_i_26__n A_i[26] + Net a_i_27__n A_i[27] + Net state_machine_uds_000_int_7_0_m3_un3_n state_machine.UDS_000_INT_7_0_m3.un3 + Net a_i_24__n A_i[24] + Net state_machine_uds_000_int_7_0_m3_un1_n state_machine.UDS_000_INT_7_0_m3.un1 + Net a_i_25__n A_i[25] + Net state_machine_uds_000_int_7_0_m3_un0_n state_machine.UDS_000_INT_7_0_m3.un0 Net dsack1_int_0_un3_n DSACK1_INT_0.un3 Net dsack1_int_0_un1_n DSACK1_INT_0.un1 - Net size_c_0__n SIZE_c[0] Net dsack1_int_0_un0_n DSACK1_INT_0.un0 + Net vma_int_0_un3_n VMA_INT_0.un3 + Net vma_int_0_un1_n VMA_INT_0.un1 + Net vma_int_0_un0_n VMA_INT_0.un0 + Net bgack_030_int_0_un3_n BGACK_030_INT_0.un3 + Net bgack_030_int_0_un1_n BGACK_030_INT_0.un1 + Net bgack_030_int_0_un0_n BGACK_030_INT_0.un0 + Net ipl_030_0_0__un3_n IPL_030_0_0_.un3 + Net ipl_030_0_0__un1_n IPL_030_0_0_.un1 + Net ipl_030_0_0__un0_n IPL_030_0_0_.un0 + Net ipl_030_0_1__un3_n IPL_030_0_1_.un3 + Net ipl_030_0_1__un1_n IPL_030_0_1_.un1 + Net ipl_030_0_1__un0_n IPL_030_0_1_.un0 + Net ipl_030_0_2__un3_n IPL_030_0_2_.un3 + Net size_c_0__n SIZE_c[0] + Net ipl_030_0_2__un1_n IPL_030_0_2_.un1 Net size_0__n SIZE[0] - Net as_000_dma_0_un3_n AS_000_DMA_0.un3 + Net ipl_030_0_2__un0_n IPL_030_0_2_.un0 Net size_c_1__n SIZE_c[1] + Net cpu_estse_0_un3_n cpu_estse_0.un3 + Net cpu_estse_0_un1_n cpu_estse_0.un1 + Net a_c_16__n A_c[16] + Net cpu_estse_0_un0_n cpu_estse_0.un0 + Net a_16__n A[16] + Net cpu_estse_1_un3_n cpu_estse_1.un3 + Net a_c_17__n A_c[17] + Net cpu_estse_1_un1_n cpu_estse_1.un1 + Net a_17__n A[17] + Net cpu_estse_1_un0_n cpu_estse_1.un0 + Net a_c_18__n A_c[18] + Net cpu_estse_2_un3_n cpu_estse_2.un3 + Net a_18__n A[18] + Net cpu_estse_2_un1_n cpu_estse_2.un1 + Net a_c_19__n A_c[19] + Net cpu_estse_2_un0_n cpu_estse_2.un0 + Net a_19__n A[19] + Net amiga_bus_enable_0_un3_n AMIGA_BUS_ENABLE_0.un3 + Net a_c_20__n A_c[20] + Net amiga_bus_enable_0_un1_n AMIGA_BUS_ENABLE_0.un1 + Net a_20__n A[20] + Net amiga_bus_enable_0_un0_n AMIGA_BUS_ENABLE_0.un0 + Net a_c_21__n A_c[21] + Net as_030_000_sync_0_un3_n AS_030_000_SYNC_0.un3 + Net a_21__n A[21] + Net as_030_000_sync_0_un1_n AS_030_000_SYNC_0.un1 + Net a_c_22__n A_c[22] + Net as_030_000_sync_0_un0_n AS_030_000_SYNC_0.un0 + Net a_22__n A[22] + Net clk_030_h_0_un3_n CLK_030_H_0.un3 + Net a_c_23__n A_c[23] + Net clk_030_h_0_un1_n CLK_030_H_0.un1 + Net a_23__n A[23] + Net clk_030_h_0_un0_n CLK_030_H_0.un0 + Net a_c_24__n A_c[24] + Net uds_000_int_0_un3_n UDS_000_INT_0.un3 + Net a_24__n A[24] + Net uds_000_int_0_un1_n UDS_000_INT_0.un1 + Net a_c_25__n A_c[25] + Net uds_000_int_0_un0_n UDS_000_INT_0.un0 + Net a_25__n A[25] + Net lds_000_int_0_un3_n LDS_000_INT_0.un3 + Net a_c_26__n A_c[26] + Net lds_000_int_0_un1_n LDS_000_INT_0.un1 + Net a_26__n A[26] + Net lds_000_int_0_un0_n LDS_000_INT_0.un0 + Net a_c_27__n A_c[27] + Net fpu_cs_int_0_un3_n FPU_CS_INT_0.un3 + Net a_27__n A[27] + Net fpu_cs_int_0_un1_n FPU_CS_INT_0.un1 + Net a_c_28__n A_c[28] + Net fpu_cs_int_0_un0_n FPU_CS_INT_0.un0 + Net a_28__n A[28] + Net bg_000_0_un3_n BG_000_0.un3 + Net a_c_29__n A_c[29] + Net bg_000_0_un1_n BG_000_0.un1 + Net a_29__n A[29] + Net bg_000_0_un0_n BG_000_0.un0 + Net a_c_30__n A_c[30] + Net ds_000_dma_0_un3_n DS_000_DMA_0.un3 + Net a_30__n A[30] + Net ds_000_dma_0_un1_n DS_000_DMA_0.un1 + Net a_c_31__n A_c[31] + Net ds_000_dma_0_un0_n DS_000_DMA_0.un0 + Net as_000_dma_0_un3_n AS_000_DMA_0.un3 Net as_000_dma_0_un1_n AS_000_DMA_0.un1 Net as_000_dma_0_un0_n AS_000_DMA_0.un0 - Net a_c_16__n A_c[16] Net as_000_int_0_un3_n AS_000_INT_0.un3 - Net a_16__n A[16] Net as_000_int_0_un1_n AS_000_INT_0.un1 - Net a_c_17__n A_c[17] Net as_000_int_0_un0_n AS_000_INT_0.un0 - Net a_17__n A[17] - Net vpa_sync_0_un3_n VPA_SYNC_0.un3 - Net a_c_18__n A_c[18] - Net vpa_sync_0_un1_n VPA_SYNC_0.un1 - Net a_18__n A[18] - Net vpa_sync_0_un0_n VPA_SYNC_0.un0 - Net a_c_19__n A_c[19] - Net vma_int_0_un3_n VMA_INT_0.un3 - Net a_19__n A[19] - Net vma_int_0_un1_n VMA_INT_0.un1 - Net a_c_20__n A_c[20] - Net vma_int_0_un0_n VMA_INT_0.un0 - Net a_20__n A[20] - Net bgack_030_int_0_un3_n BGACK_030_INT_0.un3 - Net a_c_21__n A_c[21] - Net bgack_030_int_0_un1_n BGACK_030_INT_0.un1 - Net a_21__n A[21] - Net bgack_030_int_0_un0_n BGACK_030_INT_0.un0 - Net a_c_22__n A_c[22] - Net size_dma_0_0__un3_n SIZE_DMA_0_0_.un3 - Net a_22__n A[22] - Net size_dma_0_0__un1_n SIZE_DMA_0_0_.un1 - Net a_c_23__n A_c[23] - Net size_dma_0_0__un0_n SIZE_DMA_0_0_.un0 - Net a_23__n A[23] - Net size_dma_0_1__un3_n SIZE_DMA_0_1_.un3 - Net a_c_24__n A_c[24] - Net size_dma_0_1__un1_n SIZE_DMA_0_1_.un1 - Net a_24__n A[24] - Net size_dma_0_1__un0_n SIZE_DMA_0_1_.un0 - Net a_c_25__n A_c[25] - Net ipl_030_0_0__un3_n IPL_030_0_0_.un3 - Net a_25__n A[25] - Net ipl_030_0_0__un1_n IPL_030_0_0_.un1 - Net a_c_26__n A_c[26] - Net ipl_030_0_0__un0_n IPL_030_0_0_.un0 - Net a_26__n A[26] - Net ipl_030_0_1__un3_n IPL_030_0_1_.un3 - Net a_c_27__n A_c[27] - Net ipl_030_0_1__un1_n IPL_030_0_1_.un1 - Net a_27__n A[27] - Net ipl_030_0_1__un0_n IPL_030_0_1_.un0 - Net a_c_28__n A_c[28] - Net ipl_030_0_2__un3_n IPL_030_0_2_.un3 - Net a_28__n A[28] - Net ipl_030_0_2__un1_n IPL_030_0_2_.un1 - Net a_c_29__n A_c[29] - Net ipl_030_0_2__un0_n IPL_030_0_2_.un0 - Net a_29__n A[29] - Net amiga_bus_enable_0_un3_n AMIGA_BUS_ENABLE_0.un3 - Net a_c_30__n A_c[30] - Net amiga_bus_enable_0_un1_n AMIGA_BUS_ENABLE_0.un1 - Net a_30__n A[30] - Net amiga_bus_enable_0_un0_n AMIGA_BUS_ENABLE_0.un0 - Net a_c_31__n A_c[31] - Net uds_000_int_0_un3_n UDS_000_INT_0.un3 - Net uds_000_int_0_un1_n UDS_000_INT_0.un1 - Net uds_000_int_0_un0_n UDS_000_INT_0.un0 - Net lds_000_int_0_un3_n LDS_000_INT_0.un3 - Net lds_000_int_0_un1_n LDS_000_INT_0.un1 - Net lds_000_int_0_un0_n LDS_000_INT_0.un0 - Net as_030_000_sync_0_un3_n AS_030_000_SYNC_0.un3 End Section Type Name // ---------------------------------------------------------------------- diff --git a/Logic/bus68030.srf b/Logic/bus68030.srf index 5863313..b1b38eb 100644 --- a/Logic/bus68030.srf +++ b/Logic/bus68030.srf @@ -6,7 +6,7 @@ #Implementation: logic $ Start of Compile -#Sun May 25 21:18:44 2014 +#Wed May 28 21:24:48 2014 Synopsys VHDL Compiler, version comp201209rcp1, Build 283R, built Mar 19 2013 @N|Running in 64-bit mode @@ -19,12 +19,14 @@ VHDL syntax check successful! File C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd changed - recompiling @N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral Post processing for work.bus68030.behavioral -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":221:2:221:3|Pruning register CLK_REF(1 downto 0) -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":122:34:122:36|Pruning register CLK_000_D6 -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:2:131:3|Pruning register CLK_CNT_N(1 downto 0) -@W: CL190 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":144:2:144:3|Optimizing register bit CLK_CNT_P(1) to a constant 0 -@W: CL260 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":144:2:144:3|Pruning register bit 1 of CLK_CNT_P(1 downto 0) -@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":221:2:221:3|Trying to extract state machine for register SM_AMIGA +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":233:2:233:3|Pruning register CLK_REF(1 downto 0) +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":124:34:124:36|Pruning register CLK_000_D6 +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":123:34:123:36|Pruning register CLK_000_D5 +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":114:38:114:40|Pruning register CLK_OUT_PRE_33 +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":146:2:146:3|Pruning register CLK_CNT_P(1 downto 0) +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":133:2:133:3|Pruning register CLK_CNT_N(1 downto 0) +@A: CL282 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":99:36:99:38|Feedback mux created for signal CLK_030_H -- possible set/reset assignment for signal missing. Specifying a reset value will improve timing and area. +@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":233:2:233:3|Trying to extract state machine for register SM_AMIGA Extracted state machine for register SM_AMIGA State machine has 8 reachable states with original encodings of: 000 @@ -35,7 +37,7 @@ State machine has 8 reachable states with original encodings of: 101 110 111 -@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":116:34:116:36|Trying to extract state machine for register cpu_est +@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":117:34:117:36|Trying to extract state machine for register cpu_est Extracted state machine for register cpu_est State machine has 11 reachable states with original encodings of: 0000 @@ -51,7 +53,7 @@ State machine has 11 reachable states with original encodings of: 1111 @END Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Sun May 25 21:18:44 2014 +# Wed May 28 21:24:49 2014 ###########################################################] Map & Optimize Report @@ -87,16 +89,17 @@ original code -> new code Resource Usage Report Simple gate primitives: -DFFRH 15 uses -DFFSH 29 uses +DFFRH 16 uses +DFFSH 27 uses +DFF 1 use BI_DIR 10 uses IBUF 30 uses BUFTH 4 uses OBUF 15 uses -AND2 192 uses -INV 157 uses -OR2 25 uses -XOR2 3 uses +AND2 181 uses +INV 151 uses +OR2 20 uses +XOR2 1 use @N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis. @@ -106,6 +109,6 @@ Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 31MB peak: 95MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Sun May 25 21:18:46 2014 +# Wed May 28 21:24:50 2014 ###########################################################] diff --git a/Logic/dm/BUS68030_compiler.xdm b/Logic/dm/BUS68030_compiler.xdm index ca14f9b..6d06262 100644 --- a/Logic/dm/BUS68030_compiler.xdm +++ b/Logic/dm/BUS68030_compiler.xdm @@ -26,7 +26,6 @@ S7RCVMI="F3s Anz1Ujjd3ELCNFPHs"NDR"D=PDE8"S> SRSqS SRSqSSqS"/ diff --git a/Logic/run_options.txt b/Logic/run_options.txt index caeb04f..e0a365e 100644 --- a/Logic/run_options.txt +++ b/Logic/run_options.txt @@ -1,7 +1,7 @@ #-- Synopsys, Inc. #-- Version G-2012.09LC-SP1 #-- Project file C:\users\matze\documents\github\68030tk\logic\run_options.txt -#-- Written on Sun May 25 21:18:44 2014 +#-- Written on Wed May 28 21:24:48 2014 #project files diff --git a/Logic/synlog/bus68030_fpga_mapper.srr b/Logic/synlog/bus68030_fpga_mapper.srr index d6e82e1..da07660 100644 --- a/Logic/synlog/bus68030_fpga_mapper.srr +++ b/Logic/synlog/bus68030_fpga_mapper.srr @@ -29,16 +29,17 @@ original code -> new code Resource Usage Report Simple gate primitives: -DFFRH 15 uses -DFFSH 29 uses +DFFRH 16 uses +DFFSH 27 uses +DFF 1 use BI_DIR 10 uses IBUF 30 uses BUFTH 4 uses OBUF 15 uses -AND2 192 uses -INV 157 uses -OR2 25 uses -XOR2 3 uses +AND2 181 uses +INV 151 uses +OR2 20 uses +XOR2 1 use @N: FC100 |Timing Report not generated for this device, please use place and route tools for timing analysis. @@ -48,6 +49,6 @@ Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 31MB peak: 95MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime -# Sun May 25 21:18:46 2014 +# Wed May 28 21:24:50 2014 ###########################################################] diff --git a/Logic/synlog/report/BUS68030_compiler_errors.txt b/Logic/synlog/report/BUS68030_compiler_errors.txt index f63bd62..76d7ebe 100644 --- a/Logic/synlog/report/BUS68030_compiler_errors.txt +++ b/Logic/synlog/report/BUS68030_compiler_errors.txt @@ -1,3 +1,3 @@ -@E: CD200 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":426:5:426:13|Misspelled variable, signal or procedure name? +@E: CG119 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":367:34:367:35|Expecting closing ) @E|Parse errors encountered - exiting diff --git a/Logic/synlog/report/BUS68030_compiler_notes.txt b/Logic/synlog/report/BUS68030_compiler_notes.txt index 3fff7ea..caf9b56 100644 --- a/Logic/synlog/report/BUS68030_compiler_notes.txt +++ b/Logic/synlog/report/BUS68030_compiler_notes.txt @@ -2,6 +2,6 @@ @N: CD720 :"C:\Program Files (x86)\ispLever\synpbase\lib\vhd\std.vhd":123:18:123:21|Setting time resolution to ns @N:"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Top entity is set to BUS68030. @N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral -@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":221:2:221:3|Trying to extract state machine for register SM_AMIGA -@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":116:34:116:36|Trying to extract state machine for register cpu_est +@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":233:2:233:3|Trying to extract state machine for register SM_AMIGA +@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":117:34:117:36|Trying to extract state machine for register cpu_est diff --git a/Logic/synlog/report/BUS68030_compiler_runstatus.xml b/Logic/synlog/report/BUS68030_compiler_runstatus.xml index fcfe71c..2ed8362 100644 --- a/Logic/synlog/report/BUS68030_compiler_runstatus.xml +++ b/Logic/synlog/report/BUS68030_compiler_runstatus.xml @@ -18,7 +18,7 @@ The file contains the job information from compiler to be displayed as part of t C:\users\matze\documents\github\68030tk\logic\synlog\report\BUS68030_compiler_notes.txt - 5 + 6 C:\users\matze\documents\github\68030tk\logic\synlog\report\BUS68030_compiler_warnings.txt @@ -29,13 +29,13 @@ The file contains the job information from compiler to be displayed as part of t - - 0h:00m:00s + 0h:00m:01s - - 1401045524 + 1401305089 \ No newline at end of file diff --git a/Logic/synlog/report/BUS68030_compiler_warnings.txt b/Logic/synlog/report/BUS68030_compiler_warnings.txt index cf5549c..a83685b 100644 --- a/Logic/synlog/report/BUS68030_compiler_warnings.txt +++ b/Logic/synlog/report/BUS68030_compiler_warnings.txt @@ -1,6 +1,7 @@ -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":221:2:221:3|Pruning register CLK_REF(1 downto 0) -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":122:34:122:36|Pruning register CLK_000_D6 -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:2:131:3|Pruning register CLK_CNT_N(1 downto 0) -@W: CL190 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":144:2:144:3|Optimizing register bit CLK_CNT_P(1) to a constant 0 -@W: CL260 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":144:2:144:3|Pruning register bit 1 of CLK_CNT_P(1 downto 0) +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":233:2:233:3|Pruning register CLK_REF(1 downto 0) +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":124:34:124:36|Pruning register CLK_000_D6 +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":123:34:123:36|Pruning register CLK_000_D5 +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":114:38:114:40|Pruning register CLK_OUT_PRE_33 +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":146:2:146:3|Pruning register CLK_CNT_P(1 downto 0) +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":133:2:133:3|Pruning register CLK_CNT_N(1 downto 0) diff --git a/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml b/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml index 41b4692..65b312f 100644 --- a/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml +++ b/Logic/synlog/report/BUS68030_fpga_mapper_runstatus.xml @@ -39,7 +39,7 @@ The file contains the job information from mapper to be displayed as part of the 95MB -1401045526 +1401305090 diff --git a/Logic/syntmp/run_option.xml b/Logic/syntmp/run_option.xml index 86e5b57..8305939 100644 --- a/Logic/syntmp/run_option.xml +++ b/Logic/syntmp/run_option.xml @@ -3,7 +3,7 @@ Synopsys, Inc. Version G-2012.09LC-SP1 Project file C:\users\matze\documents\github\68030tk\logic\syntmp\run_option.xml - Written on Sun May 25 21:18:44 2014 + Written on Wed May 28 21:24:48 2014 --> diff --git a/Logic/synwork/BUS68030_compiler.fdep b/Logic/synwork/BUS68030_compiler.fdep index 55e83ba..9137a54 100644 --- a/Logic/synwork/BUS68030_compiler.fdep +++ b/Logic/synwork/BUS68030_compiler.fdep @@ -10,7 +10,7 @@ #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\umr_capim.vhd":1363694328 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\arith.vhd":1363694328 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\unsigned.vhd":1363694328 -#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1401045514 +#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1401305082 0 "C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd" vhdl # Dependency Lists (Uses list) diff --git a/Logic/synwork/BUS68030_compiler.fdeporig b/Logic/synwork/BUS68030_compiler.fdeporig index a8340cd..63d9afa 100644 --- a/Logic/synwork/BUS68030_compiler.fdeporig +++ b/Logic/synwork/BUS68030_compiler.fdeporig @@ -10,7 +10,7 @@ #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\umr_capim.vhd":1363694328 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\arith.vhd":1363694328 #CUR:"C:\\Program Files (x86)\\ispLever\\synpbase\\lib\\vhd\\unsigned.vhd":1363694328 -#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1401045514 +#CUR:"C:\\users\\matze\\documents\\github\\68030tk\\logic\\68030-68000-bus.vhd":1401305082 0 "C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd" vhdl # Dependency Lists (Uses list) diff --git a/Logic/synwork/BUS68030_compiler.srs b/Logic/synwork/BUS68030_compiler.srs index 74df555..c2a1ac0 100644 Binary files a/Logic/synwork/BUS68030_compiler.srs and b/Logic/synwork/BUS68030_compiler.srs differ diff --git a/Logic/synwork/BUS68030_compiler.tlg b/Logic/synwork/BUS68030_compiler.tlg index f5cc21e..6bd0619 100644 --- a/Logic/synwork/BUS68030_compiler.tlg +++ b/Logic/synwork/BUS68030_compiler.tlg @@ -1,11 +1,13 @@ @N: CD630 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral Post processing for work.bus68030.behavioral -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":221:2:221:3|Pruning register CLK_REF(1 downto 0) -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":122:34:122:36|Pruning register CLK_000_D6 -@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":131:2:131:3|Pruning register CLK_CNT_N(1 downto 0) -@W: CL190 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":144:2:144:3|Optimizing register bit CLK_CNT_P(1) to a constant 0 -@W: CL260 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":144:2:144:3|Pruning register bit 1 of CLK_CNT_P(1 downto 0) -@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":221:2:221:3|Trying to extract state machine for register SM_AMIGA +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":233:2:233:3|Pruning register CLK_REF(1 downto 0) +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":124:34:124:36|Pruning register CLK_000_D6 +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":123:34:123:36|Pruning register CLK_000_D5 +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":114:38:114:40|Pruning register CLK_OUT_PRE_33 +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":146:2:146:3|Pruning register CLK_CNT_P(1 downto 0) +@W: CL169 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":133:2:133:3|Pruning register CLK_CNT_N(1 downto 0) +@A: CL282 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":99:36:99:38|Feedback mux created for signal CLK_030_H -- possible set/reset assignment for signal missing. Specifying a reset value will improve timing and area. +@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":233:2:233:3|Trying to extract state machine for register SM_AMIGA Extracted state machine for register SM_AMIGA State machine has 8 reachable states with original encodings of: 000 @@ -16,7 +18,7 @@ State machine has 8 reachable states with original encodings of: 101 110 111 -@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":116:34:116:36|Trying to extract state machine for register cpu_est +@N: CL201 :"C:\users\matze\documents\github\68030tk\logic\68030-68000-bus.vhd":117:34:117:36|Trying to extract state machine for register cpu_est Extracted state machine for register cpu_est State machine has 11 reachable states with original encodings of: 0000