-
+
#Build: Synplify Pro I-2014.03LC , Build 063R, May 27 2014
#install: E:\ispLEVER_Classic2_0\synpbase
#OS: Windows 7 6.2
@@ -8,32 +8,36 @@
#Implementation: logic
$ Start of Compile
-#Thu Dec 29 16:01:49 2016
+#Sat Dec 30 00:43:29 2017
Synopsys VHDL Compiler, version comp201403rcp1, Build 060R, built May 27 2014
-@N: : | Running in 64-bit mode
+@N: : | Running in 64-bit mode
Copyright (C) 1994-2014 Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, or distribution of this software is strictly prohibited.
-@N:CD720 : std.vhd(123) | Setting time resolution to ns
-@N: : 68030-68000-bus.vhd(13) | Top entity is set to BUS68030.
+@N:CD720 : std.vhd(123) | Setting time resolution to ns
+@N: : 68030-68000-bus.vhd(13) | Top entity is set to BUS68030.
File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd changed - recompiling
VHDL syntax check successful!
File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd changed - recompiling
-@N:CD630 : 68030-68000-bus.vhd(13) | Synthesizing work.bus68030.behavioral
-@N:CD233 : 68030-68000-bus.vhd(70) | Using sequential encoding for type sm_e
-@N:CD233 : 68030-68000-bus.vhd(87) | Using sequential encoding for type sm_68000
-@W:CD638 : 68030-68000-bus.vhd(129) | Signal clk_out_pre is undriven
-@W:CD638 : 68030-68000-bus.vhd(133) | Signal clk_030_h is undriven
+@N:CD630 : 68030-68000-bus.vhd(13) | Synthesizing work.bus68030.behavioral
+@N:CD233 : 68030-68000-bus.vhd(70) | Using sequential encoding for type sm_e
+@N:CD233 : 68030-68000-bus.vhd(87) | Using sequential encoding for type sm_68000
+@W:CD638 : 68030-68000-bus.vhd(130) | Signal clk_out_pre is undriven
+@W:CD638 : 68030-68000-bus.vhd(134) | Signal clk_030_h is undriven
Post processing for work.bus68030.behavioral
-@W:CL169 : 68030-68000-bus.vhd(132) | Pruning register AS_000_D0_3
-@W:CL169 : 68030-68000-bus.vhd(132) | Pruning register DS_030_D0_3
-@W:CL169 : 68030-68000-bus.vhd(132) | Pruning register nEXP_SPACE_D0_3
-@W:CL169 : 68030-68000-bus.vhd(132) | Pruning register BGACK_030_INT_PRE_2
-@W:CL169 : 68030-68000-bus.vhd(131) | Pruning register CLK_OUT_EXP_INT_1
-@W:CL169 : 68030-68000-bus.vhd(127) | Pruning register CLK_OUT_PRE_25_3
-@W:CL169 : 68030-68000-bus.vhd(156) | Pruning register CLK_030_D0_2
-@W:CL271 : 68030-68000-bus.vhd(132) | Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ...
-@N:CL201 : 68030-68000-bus.vhd(132) | Trying to extract state machine for register SM_AMIGA
+@W:CL169 : 68030-68000-bus.vhd(133) | Pruning register DTACK_DMA_4
+@W:CL169 : 68030-68000-bus.vhd(133) | Pruning register CLK_030_PE_2(1 downto 0)
+@W:CL169 : 68030-68000-bus.vhd(133) | Pruning register AS_000_D0_3
+@W:CL169 : 68030-68000-bus.vhd(133) | Pruning register RESET_OUT_4
+@W:CL169 : 68030-68000-bus.vhd(133) | Pruning register RST_DLY_6(2 downto 0)
+@W:CL169 : 68030-68000-bus.vhd(133) | Pruning register DS_030_D0_3
+@W:CL169 : 68030-68000-bus.vhd(133) | Pruning register nEXP_SPACE_D0_3
+@W:CL169 : 68030-68000-bus.vhd(133) | Pruning register BGACK_030_INT_PRE_2
+@W:CL169 : 68030-68000-bus.vhd(132) | Pruning register CLK_OUT_EXP_INT_1
+@W:CL169 : 68030-68000-bus.vhd(128) | Pruning register CLK_OUT_PRE_25_3
+@W:CL169 : 68030-68000-bus.vhd(158) | Pruning register CLK_030_D0_2
+@W:CL271 : 68030-68000-bus.vhd(133) | Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ...
+@N:CL201 : 68030-68000-bus.vhd(133) | Trying to extract state machine for register SM_AMIGA
Extracted state machine for register SM_AMIGA
State machine has 8 reachable states with original encodings of:
000
@@ -44,24 +48,26 @@ State machine has 8 reachable states with original encodings of:
101
110
111
-@N:CL201 : 68030-68000-bus.vhd(132) | Trying to extract state machine for register cpu_est
-@W:CL246 : 68030-68000-bus.vhd(24) | Input port bits 15 to 2 of a_decode(23 downto 2) are unused
+@N:CL201 : 68030-68000-bus.vhd(133) | Trying to extract state machine for register cpu_est
+@W:CL246 : 68030-68000-bus.vhd(24) | Input port bits 15 to 2 of a_decode(23 downto 2) are unused
+@W:CL159 : 68030-68000-bus.vhd(34) | Input CLK_030 is unused
+@W:CL158 : 68030-68000-bus.vhd(50) | Inout RESET is unused
@END
At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 70MB peak: 71MB)
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
-# Thu Dec 29 16:01:49 2016
+# Sat Dec 30 00:43:29 2017
###########################################################]
Synopsys Netlist Linker, version comp201403rcp1, Build 060R, built May 27 2014
-@N: : | Running in 64-bit mode
+@N: : | Running in 64-bit mode
File C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\synwork\BUS68030_comp.srs changed - recompiling
At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
-# Thu Dec 29 16:01:50 2016
+# Sat Dec 30 00:43:31 2017
###########################################################]
Map & Optimize Report
@@ -69,8 +75,7 @@ Map & Optimize Report
Synopsys CPLD Technology Mapper, Version maplat, Build 923R, Built May 6 2014
Copyright (C) 1994-2013, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. All other use or distribution of the software is strictly prohibited.
Product Version I-2014.03LC
-@N:MF248 : | Running in 64-bit mode.
-@N: : 68030-68000-bus.vhd(132) | Found counter in view:work.BUS68030(behavioral) inst RST_DLY[2:0]
+@N:MF248 : | Running in 64-bit mode.
Encoding state machine SM_AMIGA[0:7] (view:work.BUS68030(behavioral))
original code -> new code
000 -> 00000000
@@ -85,25 +90,25 @@ original code -> new code
Resource Usage Report
Simple gate primitives:
-DFF 57 uses
-BI_DIR 19 uses
-BUFTH 3 uses
-IBUF 38 uses
-OBUF 15 uses
-AND2 277 uses
-INV 236 uses
-OR2 23 uses
-XOR2 8 uses
+DFF 52 uses
+BI_DIR 18 uses
+BUFTH 4 uses
+IBUF 39 uses
+OBUF 14 uses
+AND2 221 uses
+INV 203 uses
+OR2 17 uses
+XOR2 4 uses
-@N:FC100 : | Timing Report not generated for this device, please use place and route tools for timing analysis.
+@N:FC100 : | Timing Report not generated for this device, please use place and route tools for timing analysis.
I-2014.03LC
Mapper successful!
At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 39MB peak: 105MB)
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
-# Thu Dec 29 16:01:51 2016
+# Sat Dec 30 00:43:31 2017
###########################################################]
diff --git a/Logic/syntmp/BUS68030_toc.htm b/Logic/syntmp/BUS68030_toc.htm
index d33688c..a91f8d0 100644
--- a/Logic/syntmp/BUS68030_toc.htm
+++ b/Logic/syntmp/BUS68030_toc.htm
@@ -16,7 +16,7 @@
Mapper Report
-Session Log (16:01 29-Dec)
+Session Log (00:43 30-Dec)
diff --git a/Logic/syntmp/run_option.xml b/Logic/syntmp/run_option.xml
index a6aaffc..dfb2db3 100644
--- a/Logic/syntmp/run_option.xml
+++ b/Logic/syntmp/run_option.xml
@@ -3,7 +3,7 @@
Synopsys, Inc.
Version I-2014.03LC
Project file C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\syntmp\run_option.xml
- Written on Thu Dec 29 16:01:49 2016
+ Written on Sat Dec 30 00:43:29 2017
-->
diff --git a/Logic/syntmp/statusReport.html b/Logic/syntmp/statusReport.html
index ac2d20b..2ab31c4 100644
--- a/Logic/syntmp/statusReport.html
+++ b/Logic/syntmp/statusReport.html
@@ -33,12 +33,12 @@
Compile Input | Complete |
8 |
- 11 |
+ 17 |
0 |
- |
0m:00s |
- |
-29.12.2016 16:01:49 |
+30.12.2017 00:43:29 |
@@ -49,12 +49,12 @@
0m:00s |
0m:00s |
105MB |
-29.12.2016 16:01:51 |
+30.12.2017 00:43:31 |
Multi-srs Generator |
- Complete | | | | 0m:01s | | | 29.12.2016 16:01:50 |
+ Complete | | | | 0m:01s | | | 30.12.2017 00:43:31 |
\ No newline at end of file
diff --git a/Logic/synwork/BUS68030_comp.fdep b/Logic/synwork/BUS68030_comp.fdep
index 3048e9d..6086b1c 100644
--- a/Logic/synwork/BUS68030_comp.fdep
+++ b/Logic/synwork/BUS68030_comp.fdep
@@ -9,7 +9,7 @@
#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\umr_capim.vhd":1401220368
#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\arith.vhd":1401220122
#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\unsigned.vhd":1401220122
-#CUR:"C:\\users\\matze\\amiga\\hardwarehacks\\68030-tk\\github\\logic\\68030-68000-bus.vhd":1483023695
+#CUR:"C:\\users\\matze\\amiga\\hardwarehacks\\68030-tk\\github\\logic\\68030-68000-bus.vhd":1514590994
0 "C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd" vhdl
# Dependency Lists (Uses list)
diff --git a/Logic/synwork/BUS68030_comp.fdeporig b/Logic/synwork/BUS68030_comp.fdeporig
index 3ac167f..2796512 100644
--- a/Logic/synwork/BUS68030_comp.fdeporig
+++ b/Logic/synwork/BUS68030_comp.fdeporig
@@ -9,7 +9,7 @@
#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\umr_capim.vhd":1401220368
#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\arith.vhd":1401220122
#CUR:"E:\\ispLEVER_Classic2_0\\synpbase\\lib\\vhd\\unsigned.vhd":1401220122
-#CUR:"C:\\users\\matze\\amiga\\hardwarehacks\\68030-tk\\github\\logic\\68030-68000-bus.vhd":1483023695
+#CUR:"C:\\users\\matze\\amiga\\hardwarehacks\\68030-tk\\github\\logic\\68030-68000-bus.vhd":1514590994
0 "C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd" vhdl
# Dependency Lists (Uses list)
diff --git a/Logic/synwork/BUS68030_comp.srs b/Logic/synwork/BUS68030_comp.srs
index 1789330..f9230a3 100644
Binary files a/Logic/synwork/BUS68030_comp.srs and b/Logic/synwork/BUS68030_comp.srs differ
diff --git a/Logic/synwork/BUS68030_comp.tlg b/Logic/synwork/BUS68030_comp.tlg
index 7070e15..7dcb0d1 100644
--- a/Logic/synwork/BUS68030_comp.tlg
+++ b/Logic/synwork/BUS68030_comp.tlg
@@ -1,18 +1,22 @@
@N: CD630 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":13:7:13:14|Synthesizing work.bus68030.behavioral
@N: CD233 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":70:10:70:11|Using sequential encoding for type sm_e
@N: CD233 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":87:14:87:15|Using sequential encoding for type sm_68000
-@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":129:7:129:17|Signal clk_out_pre is undriven
-@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:7:133:15|Signal clk_030_h is undriven
+@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":130:7:130:17|Signal clk_out_pre is undriven
+@W: CD638 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":134:7:134:15|Signal clk_030_h is undriven
Post processing for work.bus68030.behavioral
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register AS_000_D0_3
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register DS_030_D0_3
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register nEXP_SPACE_D0_3
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning register BGACK_030_INT_PRE_2
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":131:34:131:36|Pruning register CLK_OUT_EXP_INT_1
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":127:36:127:38|Pruning register CLK_OUT_PRE_25_3
-@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":156:2:156:3|Pruning register CLK_030_D0_2
-@W: CL271 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ...
-@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Trying to extract state machine for register SM_AMIGA
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register DTACK_DMA_4
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register CLK_030_PE_2(1 downto 0)
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register AS_000_D0_3
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register RESET_OUT_4
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register RST_DLY_6(2 downto 0)
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register DS_030_D0_3
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register nEXP_SPACE_D0_3
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning register BGACK_030_INT_PRE_2
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:34:132:36|Pruning register CLK_OUT_EXP_INT_1
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":128:36:128:38|Pruning register CLK_OUT_PRE_25_3
+@W: CL169 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":158:2:158:3|Pruning register CLK_030_D0_2
+@W: CL271 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Pruning bits 12 to 5 of CLK_000_D_3(12 downto 0) -- not in use ...
+@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Trying to extract state machine for register SM_AMIGA
Extracted state machine for register SM_AMIGA
State machine has 8 reachable states with original encodings of:
000
@@ -23,5 +27,7 @@ State machine has 8 reachable states with original encodings of:
101
110
111
-@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":132:38:132:40|Trying to extract state machine for register cpu_est
+@N: CL201 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":133:38:133:40|Trying to extract state machine for register cpu_est
@W: CL246 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":24:1:24:8|Input port bits 15 to 2 of a_decode(23 downto 2) are unused
+@W: CL159 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":34:1:34:7|Input CLK_030 is unused
+@W: CL158 :"C:\users\matze\amiga\hardwarehacks\68030-tk\github\logic\68030-68000-bus.vhd":50:1:50:5|Inout RESET is unused
diff --git a/Logic/synwork/BUS68030_mult.srs b/Logic/synwork/BUS68030_mult.srs
index bc001f9..3bae7cf 100644
Binary files a/Logic/synwork/BUS68030_mult.srs and b/Logic/synwork/BUS68030_mult.srs differ
diff --git a/Logic/synwork/BUS68030_mult_srs/skeleton.srs b/Logic/synwork/BUS68030_mult_srs/skeleton.srs
index cad3475..2259468 100644
Binary files a/Logic/synwork/BUS68030_mult_srs/skeleton.srs and b/Logic/synwork/BUS68030_mult_srs/skeleton.srs differ
diff --git a/Logic/synwork/BUS68030_s.srs b/Logic/synwork/BUS68030_s.srs
index 1789330..f9230a3 100644
Binary files a/Logic/synwork/BUS68030_s.srs and b/Logic/synwork/BUS68030_s.srs differ